Sample records for nano-scale cmos technology

  1. Nano-electromechanical switch-CMOS hybrid technology and its applications.

    PubMed

    Lee, B H; Hwang, H J; Cho, C H; Lim, S K; Lee, S Y; Hwang, H

    2011-01-01

    Si-based CMOS technology is facing a serious challenge in terms of power consumption and variability. The increasing costs associated with physical scaling have motivated a search for alternative approaches. Hybridization of nano-electromechanical (NEM)-switch and Si-based CMOS devices has shown a theoretical feasibility for power management, but a huge technical gap must be bridged before a nanoscale NEM switch can be realized due to insufficient material development and the limited understanding of its reliability characteristics. These authors propose the use of a multilayer graphene as a nanoscale cantilever material for a nanoscale NEM switchwith dimensions comparable to those of the state-of-the-art Si-based CMOS devices. The optimal thickness for the multilayer graphene (about five layers) is suggested based on an analytical model. Multilayer graphene can provide the highest Young's modulus among the known electrode materials and a yielding strength that allows more than 15% bending. Further research on material screening and device integration is needed, however, to realize the promises of the hybridization of NEM-switch and Si-based CMOS devices.

  2. George E. Pake Prize Lecture: CMOS Technology Roadmap: Is Scaling Ending?

    NASA Astrophysics Data System (ADS)

    Chen, Tze-Chiang (T. C.)

    The development of silicon technology has been based on the principle of physics and driven by the system needs. Traditionally, the system needs have been satisfied by the increase in transistor density and performance, as suggested by Moore's Law and guided by ''Dennard CMOS scaling theory''. As the silicon industry moves towards the 14nm node and beyond, three of the most important challenges facing Moore's Law and continued CMOS scaling are the growing standby power dissipation, the increasing variability in device characteristics and the ever increasing manufacturing cost. Actually, the first two factors are the embodiments of CMOS approaching atomistic and quantum-mechanical physics boundaries. Industry directions for addressing these challenges are also developing along three primary approaches: Extending silicon scaling through innovations in materials and device structure, expanding the level of integration through three-dimensional structures comprised of through-silicon-vias holes and chip stacking in order to enhance functionality and parallelism and exploring post-silicon CMOS innovation with new nano-devices based on distinctly different principles of physics, new materials and new processes such as spintronics, carbon nanotubes and nanowires. Hence, the infusion of new materials, innovative integration and novel device structures will continue to extend CMOS technology scaling for at least another decade.

  3. Beyond CMOS: heterogeneous integration of III–V devices, RF MEMS and other dissimilar materials/devices with Si CMOS to create intelligent microsystems

    PubMed Central

    Kazior, Thomas E.

    2014-01-01

    Advances in silicon technology continue to revolutionize micro-/nano-electronics. However, Si cannot do everything, and devices/components based on other materials systems are required. What is the best way to integrate these dissimilar materials and to enhance the capabilities of Si, thereby continuing the micro-/nano-electronics revolution? In this paper, I review different approaches to heterogeneously integrate dissimilar materials with Si complementary metal oxide semiconductor (CMOS) technology. In particular, I summarize results on the successful integration of III–V electronic devices (InP heterojunction bipolar transistors (HBTs) and GaN high-electron-mobility transistors (HEMTs)) with Si CMOS on a common silicon-based wafer using an integration/fabrication process similar to a SiGe BiCMOS process (BiCMOS integrates bipolar junction and CMOS transistors). Our III–V BiCMOS process has been scaled to 200 mm diameter wafers for integration with scaled CMOS and used to fabricate radio-frequency (RF) and mixed signals circuits with on-chip digital control/calibration. I also show that RF microelectromechanical systems (MEMS) can be integrated onto this platform to create tunable or reconfigurable circuits. Thus, heterogeneous integration of III–V devices, MEMS and other dissimilar materials with Si CMOS enables a new class of high-performance integrated circuits that enhance the capabilities of existing systems, enable new circuit architectures and facilitate the continued proliferation of low-cost micro-/nano-electronics for a wide range of applications. PMID:24567473

  4. Beyond CMOS: heterogeneous integration of III-V devices, RF MEMS and other dissimilar materials/devices with Si CMOS to create intelligent microsystems.

    PubMed

    Kazior, Thomas E

    2014-03-28

    Advances in silicon technology continue to revolutionize micro-/nano-electronics. However, Si cannot do everything, and devices/components based on other materials systems are required. What is the best way to integrate these dissimilar materials and to enhance the capabilities of Si, thereby continuing the micro-/nano-electronics revolution? In this paper, I review different approaches to heterogeneously integrate dissimilar materials with Si complementary metal oxide semiconductor (CMOS) technology. In particular, I summarize results on the successful integration of III-V electronic devices (InP heterojunction bipolar transistors (HBTs) and GaN high-electron-mobility transistors (HEMTs)) with Si CMOS on a common silicon-based wafer using an integration/fabrication process similar to a SiGe BiCMOS process (BiCMOS integrates bipolar junction and CMOS transistors). Our III-V BiCMOS process has been scaled to 200 mm diameter wafers for integration with scaled CMOS and used to fabricate radio-frequency (RF) and mixed signals circuits with on-chip digital control/calibration. I also show that RF microelectromechanical systems (MEMS) can be integrated onto this platform to create tunable or reconfigurable circuits. Thus, heterogeneous integration of III-V devices, MEMS and other dissimilar materials with Si CMOS enables a new class of high-performance integrated circuits that enhance the capabilities of existing systems, enable new circuit architectures and facilitate the continued proliferation of low-cost micro-/nano-electronics for a wide range of applications.

  5. Variation and Defect Tolerance for Nano Crossbars

    NASA Astrophysics Data System (ADS)

    Tunc, Cihan

    With the extreme shrinking in CMOS technology, quantum effects and manufacturing issues are getting more crucial. Hence, additional shrinking in CMOS feature size seems becoming more challenging, difficult, and costly. On the other hand, emerging nanotechnology has attracted many researchers since additional scaling down has been demonstrated by manufacturing nanowires, Carbon nanotubes as well as molecular switches using bottom-up manufacturing techniques. In addition to the progress in manufacturing, developments in architecture show that emerging nanoelectronic devices will be promising for the future system designs. Using nano crossbars, which are composed of two sets of perpendicular nanowires with programmable intersections, it is possible to implement logic functions. In addition, nano crossbars present some important features as regularity, reprogrammability, and interchangeability. Combining these features, researchers have presented different effective architectures. Although bottom-up nanofabrication can greatly reduce manufacturing costs, due to low controllability in the manufacturing process, some critical issues occur. Bottom- up nanofabrication process results in high variation compared to conventional top- down lithography used in CMOS technology. In addition, an increased failure rate is expected. Variation and defect tolerance methods used for conventional CMOS technology seem inadequate for adapting to emerging nano technology because the variation and the defect rate for emerging nano technology is much more than current CMOS technology. Therefore, variations and defect tolerance methods for emerging nano technology are necessary for a successful transition. In this work, in order to tolerate variations for crossbars, we introduce a framework that is established based on reprogrammability and interchangeability features of nano crossbars. This framework is shown to be applicable for both FET-based and diode-based nano crossbars. We present a

  6. Single-photon sensitive fast ebCMOS camera system for multiple-target tracking of single fluorophores: application to nano-biophotonics

    NASA Astrophysics Data System (ADS)

    Cajgfinger, Thomas; Chabanat, Eric; Dominjon, Agnes; Doan, Quang T.; Guerin, Cyrille; Houles, Julien; Barbier, Remi

    2011-03-01

    Nano-biophotonics applications will benefit from new fluorescent microscopy methods based essentially on super-resolution techniques (beyond the diffraction limit) on large biological structures (membranes) with fast frame rate (1000 Hz). This trend tends to push the photon detectors to the single-photon counting regime and the camera acquisition system to real time dynamic multiple-target tracing. The LUSIPHER prototype presented in this paper aims to give a different approach than those of Electron Multiplied CCD (EMCCD) technology and try to answer to the stringent demands of the new nano-biophotonics imaging techniques. The electron bombarded CMOS (ebCMOS) device has the potential to respond to this challenge, thanks to the linear gain of the accelerating high voltage of the photo-cathode, to the possible ultra fast frame rate of CMOS sensors and to the single-photon sensitivity. We produced a camera system based on a 640 kPixels ebCMOS with its acquisition system. The proof of concept for single-photon based tracking for multiple single-emitters is the main result of this paper.

  7. Water soluble nano-scale transient material germanium oxide for zero toxic waste based environmentally benign nano-manufacturing

    NASA Astrophysics Data System (ADS)

    Almuslem, A. S.; Hanna, A. N.; Yapici, T.; Wehbe, N.; Diallo, E. M.; Kutbee, A. T.; Bahabry, R. R.; Hussain, M. M.

    2017-02-01

    In the recent past, with the advent of transient electronics for mostly implantable and secured electronic applications, the whole field effect transistor structure has been dissolved in a variety of chemicals. Here, we show simple water soluble nano-scale (sub-10 nm) germanium oxide (GeO2) as the dissolvable component to remove the functional structures of metal oxide semiconductor devices and then reuse the expensive germanium substrate again for functional device fabrication. This way, in addition to transiency, we also show an environmentally friendly manufacturing process for a complementary metal oxide semiconductor (CMOS) technology. Every year, trillions of complementary metal oxide semiconductor (CMOS) electronics are manufactured and billions are disposed, which extend the harmful impact to our environment. Therefore, this is a key study to show a pragmatic approach for water soluble high performance electronics for environmentally friendly manufacturing and bioresorbable electronic applications.

  8. A Hybrid CMOS-Memristor Neuromorphic Synapse.

    PubMed

    Azghadi, Mostafa Rahimi; Linares-Barranco, Bernabe; Abbott, Derek; Leong, Philip H W

    2017-04-01

    Although data processing technology continues to advance at an astonishing rate, computers with brain-like processing capabilities still elude us. It is envisioned that such computers may be achieved by the fusion of neuroscience and nano-electronics to realize a brain-inspired platform. This paper proposes a high-performance nano-scale Complementary Metal Oxide Semiconductor (CMOS)-memristive circuit, which mimics a number of essential learning properties of biological synapses. The proposed synaptic circuit that is composed of memristors and CMOS transistors, alters its memristance in response to timing differences among its pre- and post-synaptic action potentials, giving rise to a family of Spike Timing Dependent Plasticity (STDP). The presented design advances preceding memristive synapse designs with regards to the ability to replicate essential behaviours characterised in a number of electrophysiological experiments performed in the animal brain, which involve higher order spike interactions. Furthermore, the proposed hybrid device CMOS area is estimated as [Formula: see text] in a [Formula: see text] process-this represents a factor of ten reduction in area with respect to prior CMOS art. The new design is integrated with silicon neurons in a crossbar array structure amenable to large-scale neuromorphic architectures and may pave the way for future neuromorphic systems with spike timing-dependent learning features. These systems are emerging for deployment in various applications ranging from basic neuroscience research, to pattern recognition, to Brain-Machine-Interfaces.

  9. Hybrid CMOS/Molecular Integrated Circuits

    NASA Astrophysics Data System (ADS)

    Stan, M. R.; Rose, G. S.; Ziegler, M. M.

    CMOS silicon technologies are likely to run out of steam in the next 10-15 years despite revolutionary advances in the past few decades. Molecular and other nanoscale technologies show significant promise but it is unlikely that they will completely replace CMOS, at least in the near term. This chapter explores opportunities for using CMOS and nanotechnology to enhance and complement each other in hybrid circuits. As an example of such a hybrid CMOS/nano system, a nanoscale programmable logic array (PLA) based on majority logic is described along with its supplemental CMOS circuitry. It is believed that such systems will be able to sustain the historical advances in the semiconductor industry while addressing manufacturability, yield, power, cost, and performance challenges.

  10. High speed photodiodes in standard nanometer scale CMOS technology: a comparative study.

    PubMed

    Nakhkoob, Behrooz; Ray, Sagar; Hella, Mona M

    2012-05-07

    This paper compares various techniques for improving the frequency response of silicon photodiodes fabricated in mainstream CMOS technology for fully integrated optical receivers. The three presented photodiodes, Spatially Modulated Light detectors, Double, and Interrupted P-Finger photodiodes, aim at reducing the low speed diffusive component of the photo generated current. For the first photodiode, Spatially Modulated Light (SML) detectors, the low speed current component is canceled out by converting it to a common mode current driving a differential transimpedance amplifier. The Double Photodiode (DP) uses two depletion regions to increase the fast drift component, while the Interrupted-P Finger Photodiode (IPFPD) redirects the low speed component towards a different contact from the main fast terminal of the photodiode. Extensive device simulations using 130 nm CMOS technology-parameters are presented to compare their performance using the same technological platform. Finally a new type of photodiode that uses triple well CMOS technology is introduced that can achieve a bandwidth of roughly 10 GHz without any process modification or high reverse bias voltages that would jeopardize the photodetector and subsequent transimpedance amplifier reliability.

  11. Multi-scale Modeling and Analysis of Nano-RFID Systems on HPC Setup

    NASA Astrophysics Data System (ADS)

    Pathak, Rohit; Joshi, Satyadhar

    In this paper we have worked out on some the complex modeling aspects such as Multi Scale modeling, MATLAB Sugar based modeling and have shown the complexities involved in the analysis of Nano RFID (Radio Frequency Identification) systems. We have shown the modeling and simulation and demonstrated some novel ideas and library development for Nano RFID. Multi scale modeling plays a very important role in nanotech enabled devices properties of which cannot be explained sometimes by abstraction level theories. Reliability and packaging still remains one the major hindrances in practical implementation of Nano RFID based devices. And to work on them modeling and simulation will play a very important role. CNTs is the future low power material that will replace CMOS and its integration with CMOS, MEMS circuitry will play an important role in realizing the true power in Nano RFID systems. RFID based on innovations in nanotechnology has been shown. MEMS modeling of Antenna, sensors and its integration in the circuitry has been shown. Thus incorporating this we can design a Nano-RFID which can be used in areas like human implantation and complex banking applications. We have proposed modeling of RFID using the concept of multi scale modeling to accurately predict its properties. Also we give the modeling of MEMS devices that are proposed recently that can see possible application in RFID. We have also covered the applications and the advantages of Nano RFID in various areas. RF MEMS has been matured and its devices are being successfully commercialized but taking it to limits of nano domains and integration with singly chip RFID needs a novel approach which is being proposed. We have modeled MEMS based transponder and shown the distribution for multi scale modeling for Nano RFID.

  12. Prospects for charge sensitive amplifiers in scaled CMOS

    NASA Astrophysics Data System (ADS)

    O'Connor, Paul; De Geronimo, Gianluigi

    2002-03-01

    Due to its low cost and flexibility for custom design, monolithic CMOS technology is being increasingly employed in charge preamplifiers across a broad range of applications, including both scientific research and commercial products. The associated detectors have capacitances ranging from a few tens of fF to several hundred pF. Applications call for pulse shaping from tens of ns to tens of μs, and constrain the available power per channel from tens of μW to tens of mW. At the same time a new technology generation, with changed device parameters, appears every 2 years or so. The optimum design of the front-end circuitry is examined taking into account submicron device characteristics, weak inversion operation, the reset system, and power supply scaling. Experimental results from recent prototypes will be presented. We will also discuss the evolution of preamplifier topologies and anticipated performance limits as CMOS technology scales down to the 0.1 μm/1.0 V generation in 2006.

  13. CMOS compatible thin-film ALD tungsten nanoelectromechanical devices

    NASA Astrophysics Data System (ADS)

    Davidson, Bradley Darren

    This research focuses on the development of a novel, low-temperature, CMOS compatible, atomic-layer-deposition (ALD) enabled NEMS fabrication process for the development of ALD Tungsten (WALD) NEMS devices. The devices are intended for use in CMOS/NEMS hybrid systems, and NEMS based micro-processors/controllers capable of reliable operation in harsh environments not accessible to standard CMOS technologies. The majority of NEMS switches/devices to date have been based on carbon-nano-tube (CNT) designs. The devices consume little power during actuation, and as expected, have demonstrated actuation voltages much smaller than MEMS switches. Unfortunately, NEMS CNT switches are not typically CMOS integrable due to the high temperatures required for their growth, and their fabrication typically results in extremely low and unpredictable yields. Thin-film NEMS devices offer great advantages over reported CNT devices for several reasons, including: higher fabrication yields, low-temperature (CMOS compatible) deposition techniques like ALD, and increased control over design parameters/device performance metrics, i.e., device geometry. Furthermore, top-down, thin-film, nano-fabrication techniques are better capable of producing complicated device geometries than CNT based processes, enabling the design and development of multi-terminal switches well-suited for low-power hybrid NEMS/CMOS systems as well as electromechanical transistors and logic devices for use in temperature/radiation hard computing architectures. In this work several novel, low-temperature, CMOS compatible fabrication technologies, employing WALD as a structural layer for MEMS or NEMS devices, were developed. The technologies developed are top-down nano-scale fabrication processes based on traditional micro-machining techniques commonly used in the fabrication of MEMS devices. Using these processes a variety of novel WALD NEMS devices have been successfully fabricated and characterized. Using two different

  14. Product Reliability Trends, Derating Considerations and Failure Mechanisms with Scaled CMOS

    NASA Technical Reports Server (NTRS)

    White, Mark; Vu, Duc; Nguyen, Duc; Ruiz, Ron; Chen, Yuan; Bernstein, Joseph B.

    2006-01-01

    As microelectronics is scaled into the deep sub-micron regime, space and aerospace users of advanced technology CMOS are reassessing how scaling effects impact long-term product reliability. The effects of electromigration (EM), time-dependent-dielectric-breakdown (TDDB) and hot carrier degradation (HCI and NBTI) wearout mechanisms on scaled technologies and product reliability are investigated, accelerated stress testing across several technology nodes is performed, and FA is conducted to confirm the failure mechanism(s).

  15. Characterizations of and Radiation Effects in Several Emerging CMOS Technologies

    NASA Astrophysics Data System (ADS)

    Shufeng Ren

    As the conventional scaling of Si based CMOS is approaching its limit at 7 nm technology node, many perceive that the adoption of novel materials and/or device structures are inevitable to keep Moore's law going. High mobility channel materials such as III-V compound semiconductors or Ge are considered promising to replace Si in order to achieve high performance as well as low power consumption. However, interface and oxide traps have become a major obstacle for high-mobility semiconductors (such as Ge, GaAs, InGaAs, GaSb, etc) to replace Si CMOS technology. Therefore novel high-k dielectrics, such as epitaxially grown crystalline oxides, have been explored to be incorporated onto the high mobility channel materials. Moreover, to enable continued scaling, extremely scaled devices structures such as nanowire gate-all-around structure are needed in the near future. Moreover, as the CMOS industry moves into the 7 nm node and beyond, novel lithography techniques such as EUV are believed to be adopted soon, which can bring radiation damage to CMOS devices and circuit during the fabrication process. Therefore radiation hardening technology in future generations of CMOS devices has again become an interesting research topic to deal with the possible process-induced damage as well as damage caused by operating in radiation harsh environment such as outer space, nuclear plant, etc. In this thesis, the electrical properties of a few selected emerging novel CMOS devices are investigated, which include InGaAs based extremely scaled ultra-thin body nanowire gate-all-around MOSFETs, GOI (Ge On Insulator) CMOS with recessed channel and source/drain, GaAs MOSFETs with crystalline La based gate stack, and crystalline SrTiO3, are investigated to extend our understanding of their electrical characteristics, underlying physical mechanisms, and material properties. Furthermore, the radiation responses of these aforementioned novel devices are thoroughly investigated, with a focus on

  16. Co-integration of nano-scale vertical- and horizontal-channel metal-oxide-semiconductor field-effect transistors for low power CMOS technology.

    PubMed

    Sun, Min-Chul; Kim, Garam; Kim, Sang Wan; Kim, Hyun Woo; Kim, Hyungjin; Lee, Jong-Ho; Shin, Hyungcheol; Park, Byung-Gook

    2012-07-01

    In order to extend the conventional low power Si CMOS technology beyond the 20-nm node without SOI substrates, we propose a novel co-integration scheme to build horizontal- and vertical-channel MOSFETs together and verify the idea using TCAD simulations. From the fabrication viewpoint, it is highlighted that this scheme provides additional vertical devices with good scalability by adding a few steps to the conventional CMOS process flow for fin formation. In addition, the benefits of the co-integrated vertical devices are investigated using a TCAD device simulation. From this study, it is confirmed that the vertical device shows improved off-current control and a larger drive current when the body dimension is less than 20 nm, due to the electric field coupling effect at the double-gated channel. Finally, the benefits from the circuit design viewpoint, such as the larger midpoint gain and beta and lower power consumption, are confirmed by the mixed-mode circuit simulation study.

  17. The silicon chip: A versatile micro-scale platform for micro- and nano-scale systems

    NASA Astrophysics Data System (ADS)

    Choi, Edward

    Cutting-edge advances in micro- and nano-scale technology require instrumentation to interface with the external world. While technology feature sizes are continually being reduced, the size of experimentalists and their instrumentation do not mirror this trend. Hence there is a need for effective application-specific instrumentation to bridge the gap from the micro and nano-scale phenomena being studied to the comparative macro-scale of the human interfaces. This dissertation puts forward the idea that the silicon CMOS integrated circuit, or microchip in short, serves as an excellent platform to perform this functionality. The electronic interfaces designed for the semiconductor industry are particularly attractive as development platforms, and the reduction in feature sizes that has been a hallmark of the industry suggests that chip-scale instrumentation may be more closely coupled to the phenomena of interest, allowing finer control or improved measurement capabilities. Compatibility with commercial processes will further enable economies of scale through mass production, another welcome feature of this approach. Thus chip-scale instrumentation may replace the bulky, expensive, cumbersome-to-operate macro-scale prototypes currently in use for many of these applications. The dissertation examines four specific applications in which the chip may serve as the ideal instrumentation platform. These are nanorod manipulation, polypyrrole bilayer hinge microactuator control, organic transistor hybrid circuits, and contact fluorescence imaging. The thesis is structured around chapters devoted to each of these projects, in addition to a chapter on preliminary work on an RFID system that serves as a wireless interface model. Each of these chapters contains tools and techniques developed for chip-scale instrumentation, from custom scripts for automated layout and data collection to microfabrication processes. Implementation of these tools to develop systems for the

  18. Users Guide on Scaled CMOS Reliability: NASA Electronic Parts and Packaging (NEPP) Program Office of Safety and Mission Assurance

    NASA Technical Reports Server (NTRS)

    White, Mark; Cooper, Mark; Johnston, Allan

    2011-01-01

    Reliability of advanced CMOS technology is a complex problem that is usually addressed from the standpoint of specific failure mechanisms rather than overall reliability of a finished microcircuit. A detailed treatment of CMOS reliability in scaled devices can be found in Ref. 1; it should be consulted for a more thorough discussion. The present document provides a more concise treatment of the scaled CMOS reliability problem, emphasizing differences in the recommended approach for these advanced devices compared to that of less aggressively scaled devices. It includes specific recommendations that can be used by flight projects that use advanced CMOS. The primary emphasis is on conventional memories, microprocessors, and related devices.

  19. Nano-technology and nano-toxicology.

    PubMed

    Maynard, Robert L

    2012-01-01

    Rapid developments in nano-technology are likely to confer significant benefits on mankind. But, as with perhaps all new technologies, these benefits are likely to be accompanied by risks, perhaps by new risks. Nano-toxicology is developing in parallel with nano-technology and seeks to define the hazards and risks associated with nano-materials: only when risks have been identified they can be controlled. This article discusses the reasons for concern about the potential effects on health of exposure to nano-materials and relates these to the evidence of the effects on health of the ambient aerosol. A number of hypotheses are proposed and the dangers of adopting unsubstantiated hypotheses are stressed. Nano-toxicology presents many challenges and will need substantial financial support if it is to develop at a rate sufficient to cope with developments in nano-technology.

  20. Nano-technology and nano-toxicology

    PubMed Central

    Maynard, Robert L.

    2012-01-01

    Rapid developments in nano-technology are likely to confer significant benefits on mankind. But, as with perhaps all new technologies, these benefits are likely to be accompanied by risks, perhaps by new risks. Nano-toxicology is developing in parallel with nano-technology and seeks to define the hazards and risks associated with nano-materials: only when risks have been identified they can be controlled. This article discusses the reasons for concern about the potential effects on health of exposure to nano-materials and relates these to the evidence of the effects on health of the ambient aerosol. A number of hypotheses are proposed and the dangers of adopting unsubstantiated hypotheses are stressed. Nano-toxicology presents many challenges and will need substantial financial support if it is to develop at a rate sufficient to cope with developments in nano-technology. PMID:22662021

  1. Characterization of various Si-photodiode junction combinations and layout specialities in 0.18µm CMOS and HV-CMOS technologies

    NASA Astrophysics Data System (ADS)

    Jonak-Auer, I.; Synooka, O.; Kraxner, A.; Roger, F.

    2017-12-01

    With the ongoing miniaturization of CMOS technologies the need for integrated optical sensors on smaller scale CMOS nodes arises. In this paper we report on the development and implementation of different optical sensor concepts in high performance 0.18µm CMOS and high voltage (HV) CMOS technologies on three different substrate materials. The integration process is such that complete modularity of the CMOS processes remains untouched and no additional masks or ion implantation steps are necessary for the sensor integration. The investigated processes support 1.8V and 3V standard CMOS functionality as well as HV transistors capable of operating voltages of 20V and 50V. These processes intrinsically offer a wide variety of junction combinations, which can be exploited for optical sensing purposes. The availability of junction depths from submicron to several microns enables the selection of spectral range from blue to infrared wavelengths. By appropriate layout the contributions of photo-generated carriers outside the target spectral range can be kept to a minimum. Furthermore by making use of other features intrinsically available in 0.18µm CMOS and HV-CMOS processes dark current rates of optoelectronic devices can be minimized. We present TCAD simulations as well as spectral responsivity, dark current and capacitance data measured for various photodiode layouts and the influence of different EPI and Bulk substrate materials thereon. We show examples of spectral responsivity of junction combinations optimized for peak sensitivity in the ranges of 400-500nm, 550-650nm and 700-900nm. Appropriate junction combination enables good spectral resolution for colour sensing applications even without any additional filter implementation. We also show that by appropriate use of shallow trenches dark current values of photodiodes can further be reduced.

  2. JPL CMOS Active Pixel Sensor Technology

    NASA Technical Reports Server (NTRS)

    Fossum, E. R.

    1995-01-01

    This paper will present the JPL-developed complementary metal- oxide-semiconductor (CMOS) active pixel sensor (APS) technology. The CMOS APS has achieved performance comparable to charge coupled devices, yet features ultra low power operation, random access readout, on-chip timing and control, and on-chip analog to digital conversion. Previously published open literature will be reviewed.

  3. Technology modules from micro- and nano-electronics for the life sciences.

    PubMed

    Birkholz, M; Mai, A; Wenger, C; Meliani, C; Scholz, R

    2016-05-01

    The capabilities of modern semiconductor manufacturing offer remarkable possibilities to be applied in life science research as well as for its commercialization. In this review, the technology modules available in micro- and nano-electronics are exemplarily presented for the case of 250 and 130 nm technology nodes. Preparation procedures and the different transistor types as available in complementary metal-oxide-silicon devices (CMOS) and BipolarCMOS (BiCMOS) technologies are introduced as key elements of comprehensive chip architectures. Techniques for circuit design and the elements of completely integrated bioelectronics systems are outlined. The possibility for life scientists to make use of these technology modules for their research and development projects via so-called multi-project wafer services is emphasized. Various examples from diverse fields such as (1) immobilization of biomolecules and cells on semiconductor surfaces, (2) biosensors operating by different principles such as affinity viscosimetry, impedance spectroscopy, and dielectrophoresis, (3) complete systems for human body implants and monitors for bioreactors, and (4) the combination of microelectronics with microfluidics either by chip-in-polymer integration as well as Si-based microfluidics are demonstrated from joint developments with partners from biotechnology and medicine. WIREs Nanomed Nanobiotechnol 2016, 8:355-377. doi: 10.1002/wnan.1367 For further resources related to this article, please visit the WIREs website. © 2015 Wiley Periodicals, Inc.

  4. Survey of key technologies on millimeter-wave CMOS integrated circuits

    NASA Astrophysics Data System (ADS)

    Yu, Fei; Gao, Lei; Li, Lixiang; Cai, Shuo; Wang, Wei; Wang, Chunhua

    2018-05-01

    In order to provide guidance for the development of high performance millimeter-wave complementary metal oxide semiconductor (MMW-CMOS) integrated circuits (IC), this paper provides a survey of key technologies on MMW-CMOS IC. Technical background of MMW wireless communications is described. Then the recent development of the critical technologies of the MMW-CMOS IC are introduced in detail and compared. A summarization is given, and the development prospects on MMW-CMOS IC are also discussed.

  5. A capacitive CMOS-MEMS sensor designed by multi-physics simulation for integrated CMOS-MEMS technology

    NASA Astrophysics Data System (ADS)

    Konishi, Toshifumi; Yamane, Daisuke; Matsushima, Takaaki; Masu, Kazuya; Machida, Katsuyuki; Toshiyoshi, Hiroshi

    2014-01-01

    This paper reports the design and evaluation results of a capacitive CMOS-MEMS sensor that consists of the proposed sensor circuit and a capacitive MEMS device implemented on the circuit. To design a capacitive CMOS-MEMS sensor, a multi-physics simulation of the electromechanical behavior of both the MEMS structure and the sensing LSI was carried out simultaneously. In order to verify the validity of the design, we applied the capacitive CMOS-MEMS sensor to a MEMS accelerometer implemented by the post-CMOS process onto a 0.35-µm CMOS circuit. The experimental results of the CMOS-MEMS accelerometer exhibited good agreement with the simulation results within the input acceleration range between 0.5 and 6 G (1 G = 9.8 m/s2), corresponding to the output voltages between 908.6 and 915.4 mV, respectively. Therefore, we have confirmed that our capacitive CMOS-MEMS sensor and the multi-physics simulation will be beneficial method to realize integrated CMOS-MEMS technology.

  6. Scaled CMOS Technology Reliability Users Guide

    NASA Technical Reports Server (NTRS)

    White, Mark

    2010-01-01

    The desire to assess the reliability of emerging scaled microelectronics technologies through faster reliability trials and more accurate acceleration models is the precursor for further research and experimentation in this relevant field. The effect of semiconductor scaling on microelectronics product reliability is an important aspect to the high reliability application user. From the perspective of a customer or user, who in many cases must deal with very limited, if any, manufacturer's reliability data to assess the product for a highly-reliable application, product-level testing is critical in the characterization and reliability assessment of advanced nanometer semiconductor scaling effects on microelectronics reliability. A methodology on how to accomplish this and techniques for deriving the expected product-level reliability on commercial memory products are provided.Competing mechanism theory and the multiple failure mechanism model are applied to the experimental results of scaled SDRAM products. Accelerated stress testing at multiple conditions is applied at the product level of several scaled memory products to assess the performance degradation and product reliability. Acceleration models are derived for each case. For several scaled SDRAM products, retention time degradation is studied and two distinct soft error populations are observed with each technology generation: early breakdown, characterized by randomly distributed weak bits with Weibull slope (beta)=1, and a main population breakdown with an increasing failure rate. Retention time soft error rates are calculated and a multiple failure mechanism acceleration model with parameters is derived for each technology. Defect densities are calculated and reflect a decreasing trend in the percentage of random defective bits for each successive product generation. A normalized soft error failure rate of the memory data retention time in FIT/Gb and FIT/cm2 for several scaled SDRAM generations is

  7. Commercialisation of CMOS integrated circuit technology in multi-electrode arrays for neuroscience and cell-based biosensors.

    PubMed

    Graham, Anthony H D; Robbins, Jon; Bowen, Chris R; Taylor, John

    2011-01-01

    The adaptation of standard integrated circuit (IC) technology as a transducer in cell-based biosensors in drug discovery pharmacology, neural interface systems and electrophysiology requires electrodes that are electrochemically stable, biocompatible and affordable. Unfortunately, the ubiquitous Complementary Metal Oxide Semiconductor (CMOS) IC technology does not meet the first of these requirements. For devices intended only for research, modification of CMOS by post-processing using cleanroom facilities has been achieved. However, to enable adoption of CMOS as a basis for commercial biosensors, the economies of scale of CMOS fabrication must be maintained by using only low-cost post-processing techniques. This review highlights the methodologies employed in cell-based biosensor design where CMOS-based integrated circuits (ICs) form an integral part of the transducer system. Particular emphasis will be placed on the application of multi-electrode arrays for in vitro neuroscience applications. Identifying suitable IC packaging methods presents further significant challenges when considering specific applications. The various challenges and difficulties are reviewed and some potential solutions are presented.

  8. Advancement of CMOS Doping Technology in an External Development Framework

    NASA Astrophysics Data System (ADS)

    Jain, Amitabh; Chambers, James J.; Shaw, Judy B.

    2011-01-01

    The consumer appetite for a rich multimedia experience drives technology development for mobile hand-held devices and the infrastructure to support them. Enhancements in functionality, speed, and user experience are derived from advancements in CMOS technology. The technical challenges in developing each successive CMOS technology node to support these enhancements have become increasingly difficult. These trends have motivated the CMOS business towards a collaborative approach based on strategic partnerships. This paper describes our model and experience of CMOS development, based on multi-dimensional industrial and academic partnerships. We provide to our process equipment, materials, and simulation partners, as well as to our silicon foundry partners, the detailed requirements for future integrated circuit products. This is done very early in the development cycle to ensure that these requirements can be met. In order to determine these fundamental requirements, we rely on a strategy that requires strong interaction between process and device simulation, physical and chemical analytical methods, and research at academic institutions. This learning is shared with each project partner to address integration and manufacturing issues encountered during CMOS technology development from its inception through product ramp. We utilize TI's core strengths in physical analysis, unit processes and integration, yield ramp, reliability, and product engineering to support this technological development. Finally, this paper presents examples of the advancement of CMOS doping technology for the 28 nm node and beyond through this development model.

  9. Wide modulation bandwidth terahertz detection in 130 nm CMOS technology

    NASA Astrophysics Data System (ADS)

    Nahar, Shamsun; Shafee, Marwah; Blin, Stéphane; Pénarier, Annick; Nouvel, Philippe; Coquillat, Dominique; Safwa, Amr M. E.; Knap, Wojciech; Hella, Mona M.

    2016-11-01

    Design, manufacturing and measurements results for silicon plasma wave transistors based wireless communication wideband receivers operating at 300 GHz carrier frequency are presented. We show the possibility of Si-CMOS based integrated circuits, in which by: (i) specific physics based plasma wave transistor design allowing impedance matching to the antenna and the amplifier, (ii) engineering the shape of the patch antenna through a stacked resonator approach and (iii) applying bandwidth enhancement strategies to the design of integrated broadband amplifier, we achieve an integrated circuit of the 300 GHz carrier frequency receiver for wireless wideband operation up to/over 10 GHz. This is, to the best of our knowledge, the first demonstration of low cost 130 nm Si-CMOS technology, plasma wave transistors based fast/wideband integrated receiver operating at 300 GHz atmospheric window. These results pave the way towards future large scale (cost effective) silicon technology based terahertz wireless communication receivers.

  10. Electron transport in nano-scaled piezoelectronic devices

    NASA Astrophysics Data System (ADS)

    Jiang, Zhengping; Kuroda, Marcelo A.; Tan, Yaohua; Newns, Dennis M.; Povolotskyi, Michael; Boykin, Timothy B.; Kubis, Tillmann; Klimeck, Gerhard; Martyna, Glenn J.

    2013-05-01

    The Piezoelectronic Transistor (PET) has been proposed as a post-CMOS device for fast, low-power switching. In this device, the piezoresistive channel is metalized via the expansion of a relaxor piezoelectric element to turn the device on. The mixed-valence compound SmSe is a good choice of PET channel material because of its isostructural pressure-induced continuous metal insulator transition, which is well characterized in bulk single crystals. Prediction and optimization of the performance of a realistic, nano-scaled PET based on SmSe requires the understanding of quantum confinement, tunneling, and the effect of metal interface. In this work, a computationally efficient empirical tight binding (ETB) model is developed for SmSe to study quantum transport in these systems and the scaling limit of PET channel lengths. Modulation of the SmSe band gap under pressure is successfully captured by ETB, and ballistic conductance shows orders of magnitude change under hydrostatic strain, supporting operability of the PET device at nanoscale.

  11. Highly Flexible Hybrid CMOS Inverter Based on Si Nanomembrane and Molybdenum Disulfide.

    PubMed

    Das, Tanmoy; Chen, Xiang; Jang, Houk; Oh, Il-Kwon; Kim, Hyungjun; Ahn, Jong-Hyun

    2016-11-01

    2D semiconductor materials are being considered for next generation electronic device application such as thin-film transistors and complementary metal-oxide-semiconductor (CMOS) circuit due to their unique structural and superior electronics properties. Various approaches have already been taken to fabricate 2D complementary logics circuits. However, those CMOS devices mostly demonstrated based on exfoliated 2D materials show the performance of a single device. In this work, the design and fabrication of a complementary inverter is experimentally reported, based on a chemical vapor deposition MoS 2 n-type transistor and a Si nanomembrane p-type transistor on the same substrate. The advantages offered by such CMOS configuration allow to fabricate large area wafer scale integration of high performance Si technology with transition-metal dichalcogenide materials. The fabricated hetero-CMOS inverters which are composed of two isolated transistors exhibit a novel high performance air-stable voltage transfer characteristic with different supply voltages, with a maximum voltage gain of ≈16, and sub-nano watt power consumption. Moreover, the logic gates have been integrated on a plastic substrate and displayed reliable electrical properties paving a realistic path for the fabrication of flexible/transparent CMOS circuits in 2D electronics. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  12. CMOS Imaging Sensor Technology for Aerial Mapping Cameras

    NASA Astrophysics Data System (ADS)

    Neumann, Klaus; Welzenbach, Martin; Timm, Martin

    2016-06-01

    In June 2015 Leica Geosystems launched the first large format aerial mapping camera using CMOS sensor technology, the Leica DMC III. This paper describes the motivation to change from CCD sensor technology to CMOS for the development of this new aerial mapping camera. In 2002 the DMC first generation was developed by Z/I Imaging. It was the first large format digital frame sensor designed for mapping applications. In 2009 Z/I Imaging designed the DMC II which was the first digital aerial mapping camera using a single ultra large CCD sensor to avoid stitching of smaller CCDs. The DMC III is now the third generation of large format frame sensor developed by Z/I Imaging and Leica Geosystems for the DMC camera family. It is an evolution of the DMC II using the same system design with one large monolithic PAN sensor and four multi spectral camera heads for R,G, B and NIR. For the first time a 391 Megapixel large CMOS sensor had been used as PAN chromatic sensor, which is an industry record. Along with CMOS technology goes a range of technical benefits. The dynamic range of the CMOS sensor is approx. twice the range of a comparable CCD sensor and the signal to noise ratio is significantly better than with CCDs. Finally results from the first DMC III customer installations and test flights will be presented and compared with other CCD based aerial sensors.

  13. CMOS Image Sensors for High Speed Applications.

    PubMed

    El-Desouki, Munir; Deen, M Jamal; Fang, Qiyin; Liu, Louis; Tse, Frances; Armstrong, David

    2009-01-01

    Recent advances in deep submicron CMOS technologies and improved pixel designs have enabled CMOS-based imagers to surpass charge-coupled devices (CCD) imaging technology for mainstream applications. The parallel outputs that CMOS imagers can offer, in addition to complete camera-on-a-chip solutions due to being fabricated in standard CMOS technologies, result in compelling advantages in speed and system throughput. Since there is a practical limit on the minimum pixel size (4∼5 μm) due to limitations in the optics, CMOS technology scaling can allow for an increased number of transistors to be integrated into the pixel to improve both detection and signal processing. Such smart pixels truly show the potential of CMOS technology for imaging applications allowing CMOS imagers to achieve the image quality and global shuttering performance necessary to meet the demands of ultrahigh-speed applications. In this paper, a review of CMOS-based high-speed imager design is presented and the various implementations that target ultrahigh-speed imaging are described. This work also discusses the design, layout and simulation results of an ultrahigh acquisition rate CMOS active-pixel sensor imager that can take 8 frames at a rate of more than a billion frames per second (fps).

  14. Commercialisation of CMOS Integrated Circuit Technology in Multi-Electrode Arrays for Neuroscience and Cell-Based Biosensors

    PubMed Central

    Graham, Anthony H. D.; Robbins, Jon; Bowen, Chris R.; Taylor, John

    2011-01-01

    The adaptation of standard integrated circuit (IC) technology as a transducer in cell-based biosensors in drug discovery pharmacology, neural interface systems and electrophysiology requires electrodes that are electrochemically stable, biocompatible and affordable. Unfortunately, the ubiquitous Complementary Metal Oxide Semiconductor (CMOS) IC technology does not meet the first of these requirements. For devices intended only for research, modification of CMOS by post-processing using cleanroom facilities has been achieved. However, to enable adoption of CMOS as a basis for commercial biosensors, the economies of scale of CMOS fabrication must be maintained by using only low-cost post-processing techniques. This review highlights the methodologies employed in cell-based biosensor design where CMOS-based integrated circuits (ICs) form an integral part of the transducer system. Particular emphasis will be placed on the application of multi-electrode arrays for in vitro neuroscience applications. Identifying suitable IC packaging methods presents further significant challenges when considering specific applications. The various challenges and difficulties are reviewed and some potential solutions are presented. PMID:22163884

  15. A Grand Challenge for CMOS Scaling: Alternate Gate Dielectrics

    NASA Astrophysics Data System (ADS)

    Wallace, Robert M.

    2001-03-01

    Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.13 um complementary metal oxide semiconductor (CMOS) technology. The prospect of replacing SiO2 is a formidable task because the alternate gate dielectric must provide many properties that are, at a minimum, comparable to those of SiO2 yet with a much higher permittivity. A systematic examination of the required performance of gate dielectrics suggests that the key properties to consider in the selection an alternative gate dielectric candidate are (a) permittivity, band gap and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. We will review the performance requirements for materials associated with CMOS scaling, the challenges associated with these requirements, and the state-of-the-art in current research for alternate gate dielectrics. The requirements for process integration compatibility are remarkably demanding, and any serious candidates will emerge only through continued, intensive investigation.

  16. High responsivity CMOS imager pixel implemented in SOI technology

    NASA Technical Reports Server (NTRS)

    Zheng, X.; Wrigley, C.; Yang, G.; Pain, B.

    2000-01-01

    Availability of mature sub-micron CMOS technology and the advent of the new low noise active pixel sensor (APS) concept have enabled the development of low power, miniature, single-chip, CMOS digital imagers in the decade of the 1990's.

  17. Design and Fabrication of Millimeter Wave Hexagonal Nano-Ferrite Circulator on Silicon CMOS Substrate

    NASA Astrophysics Data System (ADS)

    Oukacha, Hassan

    The rapid advancement of Complementary Metal Oxide Semiconductor (CMOS) technology has formed the backbone of the modern computing revolution enabling the development of computationally intensive electronic devices that are smaller, faster, less expensive, and consume less power. This well-established technology has transformed the mobile computing and communications industries by providing high levels of system integration on a single substrate, high reliability and low manufacturing cost. The driving force behind this computing revolution is the scaling of semiconductor devices to smaller geometries which has resulted in faster switching speeds and the promise of replacing traditional, bulky radio frequency (RF) components with miniaturized devices. Such devices play an important role in our society enabling ubiquitous computing and on-demand data access. This thesis presents the design and development of a magnetic circulator component in a standard 180 nm CMOS process. The design approach involves integration of nanoscale ferrite materials on a CMOS chip to avoid using bulky magnetic materials employed in conventional circulators. This device constitutes the next generation broadband millimeter-wave circulator integrated in CMOS using ferrite materials operating in the 60GHz frequency band. The unlicensed ultra-high frequency spectrum around 60GHz offers many benefits: very high immunity to interference, high security, and frequency re-use. Results of both simulations and measurements are presented in this thesis. The presented results show the benefits of this technique and the potential that it has in incorporating a complete system-on-chip (SoC) that includes low noise amplifier, power amplier, and antenna. This system-on-chip can be used in the same applications where the conventional circulator has been employed, including communication systems, radar systems, navigation and air traffic control, and military equipment. This set of applications of

  18. Performance of a novel wafer scale CMOS active pixel sensor for bio-medical imaging.

    PubMed

    Esposito, M; Anaxagoras, T; Konstantinidis, A C; Zheng, Y; Speller, R D; Evans, P M; Allinson, N M; Wells, K

    2014-07-07

    Recently CMOS active pixels sensors (APSs) have become a valuable alternative to amorphous silicon and selenium flat panel imagers (FPIs) in bio-medical imaging applications. CMOS APSs can now be scaled up to the standard 20 cm diameter wafer size by means of a reticle stitching block process. However, despite wafer scale CMOS APS being monolithic, sources of non-uniformity of response and regional variations can persist representing a significant challenge for wafer scale sensor response. Non-uniformity of stitched sensors can arise from a number of factors related to the manufacturing process, including variation of amplification, variation between readout components, wafer defects and process variations across the wafer due to manufacturing processes. This paper reports on an investigation into the spatial non-uniformity and regional variations of a wafer scale stitched CMOS APS. For the first time a per-pixel analysis of the electro-optical performance of a wafer CMOS APS is presented, to address inhomogeneity issues arising from the stitching techniques used to manufacture wafer scale sensors. A complete model of the signal generation in the pixel array has been provided and proved capable of accounting for noise and gain variations across the pixel array. This novel analysis leads to readout noise and conversion gain being evaluated at pixel level, stitching block level and in regions of interest, resulting in a coefficient of variation ⩽1.9%. The uniformity of the image quality performance has been further investigated in a typical x-ray application, i.e. mammography, showing a uniformity in terms of CNR among the highest when compared with mammography detectors commonly used in clinical practice. Finally, in order to compare the detection capability of this novel APS with the technology currently used (i.e. FPIs), theoretical evaluation of the detection quantum efficiency (DQE) at zero-frequency has been performed, resulting in a higher DQE for this

  19. Assessment of a Low-Power 65 nm CMOS Technology for Analog Front-End Design

    NASA Astrophysics Data System (ADS)

    Manghisoni, Massimo; Gaioni, Luigi; Ratti, Lodovico; Re, Valerio; Traversi, Gianluca

    2014-02-01

    This work is concerned with the study of the analog properties of MOSFET devices belonging to a 65 nm CMOS technology with emphasis on intrinsic voltage gain and noise performance. This node appears to be a robust and promising solution to cope with the unprecedented requirements set by silicon vertex trackers in experiments upgrades and future colliders as well as by imaging detectors at light sources and free electron lasers. In this scaled-down technology, the impact of new dielectric materials and processing techniques on the analog behavior of MOSFETs has to be carefully evaluated. An inversion level design methodology has been adopted to analyze data obtained from device measurements and provide a powerful tool to establish design criteria for detector front-ends in this nanoscale CMOS process. A comparison with data coming from less scaled technologies, such as 90 nm and 130 nm nodes, is also provided and can be used to evaluate the resolution limits achievable for low-noise charge sensitive amplifiers in the 100 nm minimum feature size range.

  20. CMOL/CMOS hardware architectures and performance/price for Bayesian memory - The building block of intelligent systems

    NASA Astrophysics Data System (ADS)

    Zaveri, Mazad Shaheriar

    The semiconductor/computer industry has been following Moore's law for several decades and has reaped the benefits in speed and density of the resultant scaling. Transistor density has reached almost one billion per chip, and transistor delays are in picoseconds. However, scaling has slowed down, and the semiconductor industry is now facing several challenges. Hybrid CMOS/nano technologies, such as CMOL, are considered as an interim solution to some of the challenges. Another potential architectural solution includes specialized architectures for applications/models in the intelligent computing domain, one aspect of which includes abstract computational models inspired from the neuro/cognitive sciences. Consequently in this dissertation, we focus on the hardware implementations of Bayesian Memory (BM), which is a (Bayesian) Biologically Inspired Computational Model (BICM). This model is a simplified version of George and Hawkins' model of the visual cortex, which includes an inference framework based on Judea Pearl's belief propagation. We then present a "hardware design space exploration" methodology for implementing and analyzing the (digital and mixed-signal) hardware for the BM. This particular methodology involves: analyzing the computational/operational cost and the related micro-architecture, exploring candidate hardware components, proposing various custom hardware architectures using both traditional CMOS and hybrid nanotechnology - CMOL, and investigating the baseline performance/price of these architectures. The results suggest that CMOL is a promising candidate for implementing a BM. Such implementations can utilize the very high density storage/computation benefits of these new nano-scale technologies much more efficiently; for example, the throughput per 858 mm2 (TPM) obtained for CMOL based architectures is 32 to 40 times better than the TPM for a CMOS based multiprocessor/multi-FPGA system, and almost 2000 times better than the TPM for a PC

  1. Reliability Considerations of ULP Scaled CMOS in Spacecraft Systems

    NASA Technical Reports Server (NTRS)

    White, Mark; MacNeal, Kristen; Cooper, Mark

    2012-01-01

    NASA, the aerospace community, and other high reliability (hi-rel) users of advanced microelectronic products face many challenges as technology continues to scale into the deep sub-micron region. Decreasing the feature size of CMOS devices not only allows more components to be placed on a single chip, but it increases performance by allowing faster switching (or clock) speeds with reduced power compared to larger scaled devices. Higher performance, and lower operating and stand-by power characteristics of Ultra-Low Power (ULP) microelectronics are not only desirable, but also necessary to meet low power consumption design goals of critical spacecraft systems. The integration of these components in such systems, however, must be balanced with the overall risk tolerance of the project.

  2. The Next Technology Revolution - Nano Electronic Technology

    NASA Astrophysics Data System (ADS)

    Turlik, Iwona

    2004-03-01

    Nanotechnology is a revolutionary engine that will engender enormous changes in a vast majority of today's industries and markets, while potentially creating whole new industries. The impact of nanotechnology is particularly significant in the electronics industry, which is constantly driven by the need for higher performance, increased functionality, smaller size and lower cost. Nanotechnology can influence many of the hundreds of components that are typically assembled to manufacture modern electronic devices. Motorola manufactures electronics for a wide range of industries and communication products. In this presentation, the typical components of a cellular phone are outlined and technology requirements for future products, the customer benefits, and the potential impact of nanotechnology on many of the components are discussed. Technology needs include reliable materials supply, processes for high volume production, experimental and simulation tools, etc. For example, even routine procedures such as failure characterization may require the development of new tools for investigating nano-scale phenomena. Business needs include the development of an effective, high volume supply chain for nano-materials and devices, disruptive product platforms, and visible performance impact on the end consumer. An equally significant long-term industry need is the availability of science and engineering graduates with a multidisciplinary focus and a deep understanding of the fundamentals of nano-technology, that can harness the technology to create revolutionary products.

  3. Application of CMOS Technology to Silicon Photomultiplier Sensors.

    PubMed

    D'Ascenzo, Nicola; Zhang, Xi; Xie, Qingguo

    2017-09-25

    We use the 180 nm GLOBALFOUNDRIES (GF) BCDLite CMOS process for the production of a silicon photomultiplier prototype. We study the main characteristics of the developed sensor in comparison with commercial SiPMs obtained in custom technologies and other SiPMs developed with CMOS-compatible processes. We support our discussion with a transient modeling of the detection process of the silicon photomultiplier as well as with a series of static and dynamic experimental measurements in dark and illuminated environments.

  4. Critical issues for the application of integrated MEMS/CMOS technologies to inertial measurement units

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Smith, J.H.; Ellis, J.R.; Montague, S.

    1997-03-01

    One of the principal applications of monolithically integrated micromechanical/microelectronic systems has been accelerometers for automotive applications. As integrated MEMS/CMOS technologies such as those developed by U.C. Berkeley, Analog Devices, and Sandia National Laboratories mature, additional systems for more sensitive inertial measurements will enter the commercial marketplace. In this paper, the authors will examine key technology design rules which impact the performance and cost of inertial measurement devices manufactured in integrated MEMS/CMOS technologies. These design parameters include: (1) minimum MEMS feature size, (2) minimum CMOS feature size, (3) maximum MEMS linear dimension, (4) number of mechanical MEMS layers, (5) MEMS/CMOS spacing.more » In particular, the embedded approach to integration developed at Sandia will be examined in the context of these technology features. Presently, this technology offers MEMS feature sizes as small as 1 {micro}m, CMOS critical dimensions of 1.25 {micro}m, MEMS linear dimensions of 1,000 {micro}m, a single mechanical level of polysilicon, and a 100 {micro}m space between MEMS and CMOS. This is applicable to modern precision guided munitions.« less

  5. Area- and energy-efficient CORDIC accelerators in deep sub-micron CMOS technologies

    NASA Astrophysics Data System (ADS)

    Vishnoi, U.; Noll, T. G.

    2012-09-01

    simulation of extracted netlist is 768 MHz under typical, and 463 MHz under worst case technology and application corner conditions, respectively. Simulated dynamic power dissipation is 0.24 uW MHz-1 at 0.9 V; static power is 38 uW in slow corner, 65 uW in typical corner and 518 uW in fast corner, respectively. The latter can be reduced by 43% in a 40-nm CMOS technology using 0.5 V reverse-backbias. These features are compared with the results from different design styles as well as with an implementation in 28-nm CMOS technology. It is interesting that in the latter case area scales as expected, but worst case performance and energy do not scale well anymore.

  6. "Nano" Scale Biosignatures and the Search for Extraterrestrial Life

    NASA Technical Reports Server (NTRS)

    Oehler, D. Z.; Robert, F.; Meibom, A.; Mostefaoui, S.; Selo, M.; Walter, M. R.; Sugitani, K.; Allwood, A.; Mimura, K.; Gibson, E. K.

    2008-01-01

    A critical step in the search for remnants of potential life forms on other planets lies in our ability to recognize indigenous fragments of ancient microbes preserved in some of Earth's oldest rocks. To this end, we are building a database of nano-scale chemical and morphological characteristics of some of Earth's oldest organic microfossils. We are primarily using the new technology of Nano-Secondary ion mass spectrometry (NanoSIMS) which provides in-situ, nano-scale elemental analysis of trace quantities of organic residues. The initial step was to characterize element composition of well-preserved, organic microfossils from the late Proterozoic (0.8 Ga) Bitter Springs Formation of Australia. Results from that work provide morphologic detail and nitrogen/carbon ratios that appear to reflect the well-established biological origin of these 0.8 Ga fossils.

  7. Monolithic integration of a plasmonic sensor with CMOS technology

    NASA Astrophysics Data System (ADS)

    Shakoor, Abdul; Cheah, Boon C.; Hao, Danni; Al-Rawhani, Mohammed; Nagy, Bence; Grant, James; Dale, Carl; Keegan, Neil; McNeil, Calum; Cumming, David R. S.

    2017-02-01

    Monolithic integration of nanophotonic sensors with CMOS detectors can transform the laboratory based nanophotonic sensors into practical devices with a range of applications in everyday life. In this work, by monolithically integrating an array of gold nanodiscs with the CMOS photodiode we have developed a compact and miniaturized nanophotonic sensor system having direct electrical read out. Doing so eliminates the need of expensive and bulky laboratory based optical spectrum analyzers used currently for measurements of nanophotonic sensor chips. The experimental optical sensitivity of the gold nanodiscs is measured to be 275 nm/RIU which translates to an electrical sensitivity of 5.4 V/RIU. This integration of nanophotonic sensors with the CMOS electronics has the potential to revolutionize personalized medical diagnostics similar to the way in which the CMOS technology has revolutionized the electronics industry.

  8. Application of CMOS Technology to Silicon Photomultiplier Sensors

    PubMed Central

    D’Ascenzo, Nicola; Zhang, Xi; Xie, Qingguo

    2017-01-01

    We use the 180 nm GLOBALFOUNDRIES (GF) BCDLite CMOS process for the production of a silicon photomultiplier prototype. We study the main characteristics of the developed sensor in comparison with commercial SiPMs obtained in custom technologies and other SiPMs developed with CMOS-compatible processes. We support our discussion with a transient modeling of the detection process of the silicon photomultiplier as well as with a series of static and dynamic experimental measurements in dark and illuminated environments. PMID:28946675

  9. Nano-Electro-Mechanical (NEM) Relay Devices and Technology for Ultra-Low Energy Digital Integrated Circuits

    DTIC Science & Technology

    2013-05-01

    number. 1. REPORT DATE 01 MAY 2013 2. REPORT TYPE 3. DATES COVERED 00-00- 2013 to 00-00- 2013 4. TITLE AND SUBTITLE Nano-Electro-Mechanical (NEM...18 Copyright © 2013 , by the author( s ). All rights reserved. Permission to make digital or hard copies of all or part of this work for personal or...E. Ismail, S .-H. Lo, G. A. Sai- Halasz, R . G. Viswanathan, H.-J. C. Wann, S . J. Wind, and H.- S . Wong, “CMOS scaling into the nanometer regime

  10. Micro- and Nano-scale Technologies for Delivery into Adherent Cells

    PubMed Central

    Kang, Wonmo; McNaughton, Rebecca L.; Espinosa, Horacio D.

    2016-01-01

    process will require the ability to accurately monitor the sequence of intracellular events, within individual cells, in a non-destructive manner. In addition, neuronal maturation is influenced by interactions with surrounding cells and with extracellular matrix, so it is necessary to be able to simultaneously monitor events occurring in multiple cells that are interacting with each other and with the matrix. While the requirements are challenging, these experimental capabilities would provide unprecedented insight into the determinants of both the timing of cellular processes and their phenotype, the principles of cell heterogeneity, and the role of cell-cell communication in homogeneous cell populations and co-cultures. Because most cells adhere to a substrate or to other cells during their growth or differentiation [1], it is advantageous for new technologies to be capable of accessing adhered cells to avoid the need to disrupt cell processes by suspension and replating. Several technologies for studying adhered cells are currently being developed, and due to the need for individual cell access and non-destructive probing, micro- and nano-technologies are a natural choice because they interact with cells at the appropriate length scale, reduce the working volume of expensive reagents, require less time and space for replicates, allow for automation and integration of sequential analyses, enable portability, and reduce waste [2, 3]. Here we present an overview of recently developed micro- and nano-tools, with a focus on trends in intracellular delivery for in vitro studies of adhered cells, and highlight major advantages/disadvantages of these technologies with respect to features such as individual cell selectivity, spatial resolution, non-destructive cell analysis, and potential for high throughput or automation. Finally, we discuss the exciting promise for these technologies to cause a paradigm shift in biological research by providing methods to study cells over

  11. CMOS technology: a critical enabler for free-form electronics-based killer applications

    NASA Astrophysics Data System (ADS)

    Hussain, Muhammad M.; Hussain, Aftab M.; Hanna, Amir

    2016-05-01

    Complementary metal oxide semiconductor (CMOS) technology offers batch manufacturability by ultra-large-scaleintegration (ULSI) of high performance electronics with a performance/cost advantage and profound reliability. However, as of today their focus has been on rigid and bulky thin film based materials. Their applications have been limited to computation, communication, display and vehicular electronics. With the upcoming surge of Internet of Everything, we have critical opportunity to expand the world of electronics by bridging between CMOS technology and free form electronics which can be used as wearable, implantable and embedded form. The asymmetry of shape and softness of surface (skins) in natural living objects including human, other species, plants make them incompatible with the presently available uniformly shaped and rigidly structured today's CMOS electronics. But if we can break this barrier then we can use the physically free form electronics for applications like plant monitoring for expansion of agricultural productivity and quality, we can find monitoring and treatment focused consumer healthcare electronics - and many more creative applications. In our view, the fundamental challenge is to engage the mass users to materialize their creative ideas. Present form of electronics are too complex to understand, to work with and to use. By deploying game changing additive manufacturing, low-cost raw materials, transfer printing along with CMOS technology, we can potentially stick high quality CMOS electronics on any existing objects and embed such electronics into any future objects that will be made. The end goal is to make them smart to augment the quality of our life. We use a particular example on implantable electronics (brain machine interface) and its integration strategy enabled by CMOS device design and technology run path.

  12. A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit.

    PubMed

    Chakrabarti, B; Lastras-Montaño, M A; Adam, G; Prezioso, M; Hoskins, B; Payvand, M; Madhavan, A; Ghofrani, A; Theogarajan, L; Cheng, K-T; Strukov, D B

    2017-02-14

    Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore's law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (CMOS + "Molecular") architecture have been proposed to combine the extremely high density of the memristive devices with the robustness of CMOS technology, leading to terabit-scale memory and extremely efficient computing paradigm. In this work, we demonstrate a hybrid 3D CMOL circuit with 2 layers of memristive crossbars monolithically integrated on a pre-fabricated CMOS substrate. The integrated crossbars can be fully operated through the underlying CMOS circuitry. The memristive devices in both layers exhibit analog switching behavior with controlled tunability and stable multi-level operation. We perform dot-product operations with the 2D and 3D memristive crossbars to demonstrate the applicability of such 3D CMOL hybrid circuits as a multiply-add engine. To the best of our knowledge this is the first demonstration of a functional 3D CMOL hybrid circuit.

  13. A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit

    PubMed Central

    Chakrabarti, B.; Lastras-Montaño, M. A.; Adam, G.; Prezioso, M.; Hoskins, B.; Cheng, K.-T.; Strukov, D. B.

    2017-01-01

    Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore’s law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (CMOS + “Molecular”) architecture have been proposed to combine the extremely high density of the memristive devices with the robustness of CMOS technology, leading to terabit-scale memory and extremely efficient computing paradigm. In this work, we demonstrate a hybrid 3D CMOL circuit with 2 layers of memristive crossbars monolithically integrated on a pre-fabricated CMOS substrate. The integrated crossbars can be fully operated through the underlying CMOS circuitry. The memristive devices in both layers exhibit analog switching behavior with controlled tunability and stable multi-level operation. We perform dot-product operations with the 2D and 3D memristive crossbars to demonstrate the applicability of such 3D CMOL hybrid circuits as a multiply-add engine. To the best of our knowledge this is the first demonstration of a functional 3D CMOL hybrid circuit. PMID:28195239

  14. Brillouin gain enhancement in nano-scale photonic waveguide

    NASA Astrophysics Data System (ADS)

    Nouri Jouybari, Soodabeh

    2018-05-01

    The enhancement of stimulated Brillouin scattering in nano-scale waveguides has a great contribution in the improvement of the photonic devices technology. The key factors in Brillouin gain are the electrostriction force and radiation pressure generated by optical waves in the waveguide. In this article, we have proposed a new scheme of nano-scale waveguide in which the Brillouin gain is considerably improved compared to the previously-reported schemes. The role of radiation pressure in the Brillouin gain was much higher than the role of the electrostriction force. The Brillouin gain strongly depends on the structural parameters of the waveguide and the maximum value of 12127 W-1 m-1 is obtained for the Brillouin gain.

  15. Mixed-signal 0.18μm CMOS and SiGe BiCMOS foundry technologies for ROIC applications

    NASA Astrophysics Data System (ADS)

    Kar-Roy, Arjun; Howard, David; Racanelli, Marco; Scott, Mike; Hurwitz, Paul; Zwingman, Robert; Chaudhry, Samir; Jordan, Scott

    2010-10-01

    Today's readout integrated-circuits (ROICs) require a high level of integration of high performance analog and low power digital logic. TowerJazz offers a commercial 0.18μm CMOS technology platform for mixed-signal, RF, and high performance analog applications which can be used for ROIC applications. The commercial CA18HD dual gate oxide 1.8V/3.3V and CA18HA dual gate oxide 1.8V/5V RF/mixed signal processes, consisting of six layers of metallization, have high density stacked linear MIM capacitors, high-value resistors, triple-well isolation and thick top aluminum metal. The CA18HA process also has scalable drain extended LDMOS devices, up to 40V Vds, for high-voltage sensor applications, and high-performance bipolars for low noise requirements in ROICs. Also discussed are the available features of the commercial SBC18 SiGe BiCMOS platform with SiGe NPNs operating up to 200/200GHz (fT/fMAX frequencies in manufacturing and demonstrated to 270 GHz fT, for reduced noise and integrated RF capabilities which could be used in ROICs. Implementation of these technologies in a thick film SOI process for integrated RF switch and power management and the availability of high fT vertical PNPs to enable complementary BiCMOS (CBiCMOS), for RF enabled ROICs, are also described in this paper.

  16. Design and analysis of high gain and low noise figure CMOS low noise amplifier for Q-band nano-sensor application

    NASA Astrophysics Data System (ADS)

    Suganthi, K.; Malarvizhi, S.

    2018-03-01

    A high gain, low power, low Noise figure (NF) and wide band of milli-meter Wave (mmW) circuits design at 50 GHz are used for Radio Frequency (RF) front end. The fundamental necessity of a receiver front-end includes perfect output and input impedance matching and port-to-port isolation with high gain and low noise over the entire band of interest. In this paper, a design of Cascade-Cascode CMOS LNA circuit at 50 GHz for Q-band application is proposed. The design of Low noise amplifier at 50 GHz using Agilent ADS tool with microstrip lines which provides simplicity in fabrication and less chip area. The low off-leakage current Ioff can be maintained with high K-dielectrics CMOS structure. Nano-scale electronics can be achieved with increased robustness. The design has overall gain of 11.091 dB and noise figure of 2.673 dB for the Q-band of 48.3 GHz to 51.3 GHz. Impedance matching is done by T matching network and the obtained input and output reflection coefficients are S11 = <-10 dB and S22 = <-10 dB. Compared to Silicon (Si) material, Wide Band Gap semiconductor materials used attains higher junction temperatures which is well matched to ceramics used in packaging technology, the protection and reliability also can be achieved with the electronic packaging. The reverse transmission coefficient S21 is less than -21 dB has shown that LNA has better isolation between input and output, Stability factor greater than 1 and Power is also optimized in this design. Layout is designed, power gain of 4.6 dB is achieved and area is optimized which is nearly equal to 502 740 μm2. The observed results show that the proposed Cascade-Cascode LNA design can find its suitability in future milli-meter Wave Radar application.

  17. BiCMOS circuit technology for a 704 MHz ATM switch LSI

    NASA Astrophysics Data System (ADS)

    Ohtomo, Yusuke; Yasuda, Sadayuki; Togashi, Minoru; Ino, Masayuki; Tanabe, Yasuyuki; Inoue, Jun-Ichi; Nogawa, Masafumi; Hino, Shigeki

    1994-05-01

    This paper describes BiCMOS level-converter circuits and clock circuits that increase VLSI interface speed to 1 GHz, and their application to a 704 MHz ATM switch LSI. An LSI with high speed interface requires a BiCMOS multiplexer/demultiplexer (MUX/DEMUX) on the chip to reduce internal operation speed. A MUX/DEMUX with minimum power dissipation and a minimum pattern area can be designed using the proposed converter circuits. The converter circuits, using weakly cross-coupled CMOS inverters and a voltage regulator circuit, can convert signal levels between LCML and positive CMOS at a speed of 500 MHz. Data synchronization in the high speed region is ensured by a new BiCMOS clock circuit consisting of a pure ECL path and retiming circuits. The clock circuit reduces the chip latency fluctuation of the clock signal and absorbs the delay difference between the ECL clock and data through the CMOS circuits. A rerouting-Banyan (RRB) ATM switch, employing both the proposed converter circuits and the clock circuits, has been fabricated with 0.5 micron BiCMOS technology. The LSI, composed of CMOS 15 K gate LOGIC, 8 Kb RAM, 1 Kb FIFO and ECL 1.6 K gate LOGIC, achieved an operation speed of 704-MHz with power dissipation of 7.2 W.

  18. CMOS Active Pixel Sensor Technology and Reliability Characterization Methodology

    NASA Technical Reports Server (NTRS)

    Chen, Yuan; Guertin, Steven M.; Pain, Bedabrata; Kayaii, Sammy

    2006-01-01

    This paper describes the technology, design features and reliability characterization methodology of a CMOS Active Pixel Sensor. Both overall chip reliability and pixel reliability are projected for the imagers.

  19. Integration of micro-/nano-/quantum-scale photonic devices: scientific and technological considerations

    NASA Astrophysics Data System (ADS)

    Lee, El-Hang; Lee, Seung-Gol; O, Beom Hoan; Park, Se Geun

    2004-08-01

    Scientific and technological issues and considerations regarding the integration of miniaturized microphotonic devices, circuits and systems in micron, submicron, and quantum scale, are presented. First, we examine the issues regarding the miniaturization of photonic devices including the size effect, proximity effect, energy confinement effect, microcavity effect, optical and quantum interference effect, high field effect, nonlinear effect, noise effect, quantum optical effect, and chaotic effect. Secondly, we examine the issues regarding the interconnection including the optical alignment, minimizing the interconnection losses, and maintaining optical modes. Thirdly, we address the issues regarding the two-dimensional or three-dimensional integration either in a hybrid format or in a monolithic format between active devices and passive devices of varying functions. We find that the concept of optical printed circuit board (O-PCB) that we propose is highly attractive as a platform for micro/nano/quantum-scale photonic integration. We examine the technological issues to be addressed in the process of fabrication, characterization, and packaging for actual implementation of the miniaturization, interconnection and integration. Devices that we have used for our study include: mode conversion schemes, micro-ring and micro-racetrack resonator devices, multimode interference devices, lasers, vertical cavity surface emitting microlasers, and their arrays. Future prospects are also discussed.

  20. Nano/micro-scale magnetophoretic devices for biomedical applications

    NASA Astrophysics Data System (ADS)

    Lim, Byeonghwa; Vavassori, Paolo; Sooryakumar, R.; Kim, CheolGi

    2017-01-01

    In recent years there have been tremendous advances in the versatility of magnetic shuttle technology using nano/micro-scale magnets for digital magnetophoresis. While the technology has been used for a wide variety of single-cell manipulation tasks such as selection, capture, transport, encapsulation, transfection, or lysing of magnetically labeled and unlabeled cells, it has also expanded to include parallel actuation and study of multiple bio-entities. The use of nano/micro-patterned magnetic structures that enable remote control of the applied forces has greatly facilitated integration of the technology with microfluidics, thereby fostering applications in the biomedical arena. The basic design and fabrication of various scaled magnets for remote manipulation of individual and multiple beads/cells, and their associated energies and forces that underlie the broad functionalities of this approach, are presented. One of the most useful features enabled by such advanced integrated engineering is the capacity to remotely tune the magnetic field gradient and energy landscape, permitting such multipurpose shuttles to be implemented within lab-on-chip platforms for a wide range of applications at the intersection of cellular biology and biotechnology.

  1. Carbon Nanotube Integration with a CMOS Process

    PubMed Central

    Perez, Maximiliano S.; Lerner, Betiana; Resasco, Daniel E.; Pareja Obregon, Pablo D.; Julian, Pedro M.; Mandolesi, Pablo S.; Buffa, Fabian A.; Boselli, Alfredo; Lamagna, Alberto

    2010-01-01

    This work shows the integration of a sensor based on carbon nanotubes using CMOS technology. A chip sensor (CS) was designed and manufactured using a 0.30 μm CMOS process, leaving a free window on the passivation layer that allowed the deposition of SWCNTs over the electrodes. We successfully investigated with the CS the effect of humidity and temperature on the electrical transport properties of SWCNTs. The possibility of a large scale integration of SWCNTs with CMOS process opens a new route in the design of more efficient, low cost sensors with high reproducibility in their manufacture. PMID:22319330

  2. A CMOS-Compatible Poly-Si Nanowire Device with Hybrid Sensor/Memory Characteristics for System-on-Chip Applications

    PubMed Central

    Chen, Min-Cheng; Chen, Hao-Yu; Lin, Chia-Yi; Chien, Chao-Hsin; Hsieh, Tsung-Fan; Horng, Jim-Tong; Qiu, Jian-Tai; Huang, Chien-Chao; Ho, Chia-Hua; Yang, Fu-Liang

    2012-01-01

    This paper reports a versatile nano-sensor technology using “top-down” poly-silicon nanowire field-effect transistors (FETs) in the conventional Complementary Metal-Oxide Semiconductor (CMOS)-compatible semiconductor process. The nanowire manufacturing technique reduced nanowire width scaling to 50 nm without use of extra lithography equipment, and exhibited superior device uniformity. These n type polysilicon nanowire FETs have positive pH sensitivity (100 mV/pH) and sensitive deoxyribonucleic acid (DNA) detection ability (100 pM) at normal system operation voltages. Specially designed oxide-nitride-oxide buried oxide nanowire realizes an electrically Vth-adjustable sensor to compensate device variation. These nanowire FETs also enable non-volatile memory application for a large and steady Vth adjustment window (>2 V Programming/Erasing window). The CMOS-compatible manufacturing technique of polysilicon nanowire FETs offers a possible solution for commercial System-on-Chip biosensor application, which enables portable physiology monitoring and in situ recording. PMID:22666012

  3. A 65 nm CMOS LNA for Bolometer Application

    NASA Astrophysics Data System (ADS)

    Huang, Tom Nan; Boon, Chirn Chye; Zhu, Forest Xi; Yi, Xiang; He, Xiaofeng; Feng, Guangyin; Lim, Wei Meng; Liu, Bei

    2016-04-01

    Modern bolometers generally consist of large-scale arrays of detectors. Implemented in conventional technologies, such bolometer arrays suffer from integrability and productivity issues. Recently, the development of CMOS technologies has presented an opportunity for the massive production of high-performance and highly integrated bolometers. This paper presents a 65-nm CMOS LNA designed for a millimeter-wave bolometer's pre-amplification stage. By properly applying some positive feedback, the noise figure of the proposed LNA is minimized at under 6 dB and the bandwidth is extended to 30 GHz.

  4. CMOS-TDI detector technology for reconnaissance application

    NASA Astrophysics Data System (ADS)

    Eckardt, Andreas; Reulke, Ralf; Jung, Melanie; Sengebusch, Karsten

    2014-10-01

    The Institute of Optical Sensor Systems (OS) at the Robotics and Mechatronics Center of the German Aerospace Center (DLR) has more than 30 years of experience with high-resolution imaging technology. This paper shows the institute's scientific results of the leading-edge detector design CMOS in a TDI (Time Delay and Integration) architecture. This project includes the technological design of future high or multi-spectral resolution spaceborne instruments and the possibility of higher integration. DLR OS and the Fraunhofer Institute for Microelectronic Circuits and Systems (IMS) in Duisburg were driving the technology of new detectors and the FPA design for future projects, new manufacturing accuracy and on-chip processing capability in order to keep pace with the ambitious scientific and user requirements. In combination with the engineering research, the current generation of space borne sensor systems is focusing on VIS/NIR high spectral resolution to meet the requirements on earth and planetary observation systems. The combination of large-swath and high-spectral resolution with intelligent synchronization control, fast-readout ADC (analog digital converter) chains and new focal-plane concepts opens the door to new remote-sensing and smart deep-space instruments. The paper gives an overview of the detector development status and verification program at DLR, as well as of new control possibilities for CMOS-TDI detectors in synchronization control mode.

  5. CMOS serial link for fully duplexed data communication

    NASA Astrophysics Data System (ADS)

    Lee, Kyeongho; Kim, Sungjoon; Ahn, Gijung; Jeong, Deog-Kyoon

    1995-04-01

    This paper describes a CMOS serial link allowing fully duplexed 500 Mbaud serial data communication. The CMOS serial link is a robust and low-cost solution to high data rate requirements. A central charge pump PLL for generating multiphase clocks for oversampling is shared by several serial link channels. Fully duplexed serial data communication is realized in the bidirectional bridge by separating incoming data from the mixed signal on the cable end. The digital PLL accomplishes process-independent data recovery by using a low-ratio oversampling, a majority voting, and a parallel data recovery scheme. Mostly, digital approach could extend its bandwidth further with scaled CMOS technology. A single channel serial link and a charge pump PLL are integrated in a test chip using 1.2 micron CMOS process technology. The test chip confirms upto 500 Mbaud unidirectional mode operation and 320 Mbaud fully duplexed mode operation with pseudo random data patterns.

  6. Wafer Scale Integration of CMOS Chips for Biomedical Applications via Self-Aligned Masking.

    PubMed

    Uddin, Ashfaque; Milaninia, Kaveh; Chen, Chin-Hsuan; Theogarajan, Luke

    2011-12-01

    This paper presents a novel technique for the integration of small CMOS chips into a large area substrate. A key component of the technique is the CMOS chip based self-aligned masking. This allows for the fabrication of sockets in wafers that are at most 5 µm larger than the chip on each side. The chip and the large area substrate are bonded onto a carrier such that the top surfaces of the two components are flush. The unique features of this technique enable the integration of macroscale components, such as leads and microfluidics. Furthermore, the integration process allows for MEMS micromachining after CMOS die-wafer integration. To demonstrate the capabilities of the proposed technology, a low-power integrated potentiostat chip for biosensing implemented in the AMI 0.5 µm CMOS technology is integrated in a silicon substrate. The horizontal gap and the vertical displacement between the chip and the large area substrate measured after the integration were 4 µm and 0.5 µm, respectively. A number of 104 interconnects are patterned with high-precision alignment. Electrical measurements have shown that the functionality of the chip is not affected by the integration process.

  7. Nano-scale gene delivery systems; current technology, obstacles, and future directions.

    PubMed

    Garcia-Guerra, Antonio; Dunwell, Thomas L; Trigueros, Sonia

    2018-01-07

    Within the different applications of nanomedicine currently being developed, nano-gene delivery is appearing as an exciting new technique with the possibility to overcome recognised hurdles and fulfill several biological and medical needs. The central component of all delivery systems is the requirement for the delivery of genetic material into cells, and for them to eventually reside in the nucleus where their desired function will be exposed. However, genetic material does not passively enter cells; thus, a delivery system is necessary. The emerging field of nano-gene delivery exploits the use of new materials and the properties that arise at the nanometre-scale to produce delivery vectors that can effectively deliver genetic material into a variety of different types of cells. The novel physicochemical properties of the new delivery vectors can be used to address the current challenges existing in nucleic acid delivery in vitro and in vivo. While there is a growing interest in nanostructure-based gene delivery, the field is still in its infancy, and there is yet much to discover about nanostructures and their physicochemical properties in a biological context. We carry out an organized and focused search of bibliographic databases. Our results suggest that despite new breakthroughs in nanostructure synthesis and advanced characterization techniques, we still face many barriers in producing highly efficient and non-toxic delivery systems. In this review, we overview the types of systems currently used for clinical and biomedical research applications along with their advantages and disadvantages, as well as discussing barriers that arise from nano-scale interactions with biological material. In conclusion, we hope that by bringing the far reaching multidisciplinary nature of nano-gene delivery to light, new targeted nanotechnology-bases strategies are developed to overcome the major challenges covered in this review. Copyright© Bentham Science Publishers; For

  8. Investigation of HV/HR-CMOS technology for the ATLAS Phase-II Strip Tracker Upgrade

    NASA Astrophysics Data System (ADS)

    Fadeyev, V.; Galloway, Z.; Grabas, H.; Grillo, A. A.; Liang, Z.; Martinez-Mckinney, F.; Seiden, A.; Volk, J.; Affolder, A.; Buckland, M.; Meng, L.; Arndt, K.; Bortoletto, D.; Huffman, T.; John, J.; McMahon, S.; Nickerson, R.; Phillips, P.; Plackett, R.; Shipsey, I.; Vigani, L.; Bates, R.; Blue, A.; Buttar, C.; Kanisauskas, K.; Maneuski, D.; Benoit, M.; Di Bello, F.; Caragiulo, P.; Dragone, A.; Grenier, P.; Kenney, C.; Rubbo, F.; Segal, J.; Su, D.; Tamma, C.; Das, D.; Dopke, J.; Turchetta, R.; Wilson, F.; Worm, S.; Ehrler, F.; Peric, I.; Gregor, I. M.; Stanitzki, M.; Hoeferkamp, M.; Seidel, S.; Hommels, L. B. A.; Kramberger, G.; Mandić, I.; Mikuž, M.; Muenstermann, D.; Wang, R.; Zhang, J.; Warren, M.; Song, W.; Xiu, Q.; Zhu, H.

    2016-09-01

    ATLAS has formed strip CMOS project to study the use of CMOS MAPS devices as silicon strip sensors for the Phase-II Strip Tracker Upgrade. This choice of sensors promises several advantages over the conventional baseline design, such as better resolution, less material in the tracking volume, and faster construction speed. At the same time, many design features of the sensors are driven by the requirement of minimizing the impact on the rest of the detector. Hence the target devices feature long pixels which are grouped to form a virtual strip with binary-encoded z position. The key performance aspects are radiation hardness compatibility with HL-LHC environment, as well as extraction of the full hit position with full-reticle readout architecture. To date, several test chips have been submitted using two different CMOS technologies. The AMS 350 nm is a high voltage CMOS process (HV-CMOS), that features the sensor bias of up to 120 V. The TowerJazz 180 nm high resistivity CMOS process (HR-CMOS) uses a high resistivity epitaxial layer to provide the depletion region on top of the substrate. We have evaluated passive pixel performance, and charge collection projections. The results strongly support the radiation tolerance of these devices to radiation dose of the HL-LHC in the strip tracker region. We also describe design features for the next chip submission that are motivated by our technology evaluation.

  9. PREFACE: The 8th China International NanoScience and Technology Symposium

    NASA Astrophysics Data System (ADS)

    Cong, Hailin

    2009-09-01

    The 8th China International NanoScience and Technology Symposium, Xiangtan (2009) - Nano-products Exposition, sponsored by Chinese Society of Miro-nanoTechnology and IEEE Nanotechnology Council, etc will be held on 23-27 October 2009 in Xiangtan, China. This symposium is held in order to promote the technology for the development of micro- and nano-scale, cross-scale integration, to share new micro/nano technologies, to exchange information and knowledge over all fields and promote the industrialization and development of nanotechnology. This is a leading professional and traditional conference with at least 400 participants every year. Famous experts, professors and government officials at home and abroad will give lectures during the symposium, which provides a good platform for delegates to discover the latest developments and dynamics of nanotechnology. Researchers, teachers and students in colleges, and technical personnel in the industrial community are welcome to contribute and actively participate in the symposium. In our last symposium held in 2008, over 600 participants from all over the world attended, and we received over 570 abstract and paper submissions for the proceedings published in different languages in famous professional journals. And this year, we have already received over 400 submissions. After strict peer review, 60 of them are published in this volume of Journal of Physics: Conference Series. We are confident that the event will be even more successful this year. Consequently, the organizing committee and proceedings editorial committee would like to thank our colleagues at the IOP Publishing, the invited speakers, our sponsors and all the delegates for their great contributions in this conference. Hailin Cong Vice Chair of the proceedings editorial committee

  10. Electrochemical method of producing nano-scaled graphene platelets

    DOEpatents

    Zhamu, Aruna; Jang, Joan; Jang, Bor Z.

    2013-09-03

    A method of producing nano-scaled graphene platelets with an average thickness smaller than 30 nm from a layered graphite material. The method comprises (a) forming a carboxylic acid-intercalated graphite compound by an electrochemical reaction; (b) exposing the intercalated graphite compound to a thermal shock to produce exfoliated graphite; and (c) subjecting the exfoliated graphite to a mechanical shearing treatment to produce the nano-scaled graphene platelets. Preferred carboxylic acids are formic acid and acetic acid. The exfoliation step in the instant invention does not involve the evolution of undesirable species, such as NO.sub.x and SO.sub.x, which are common by-products of exfoliating conventional sulfuric or nitric acid-intercalated graphite compounds. The nano-scaled platelets are candidate reinforcement fillers for polymer nanocomposites. Nano-scaled graphene platelets are much lower-cost alternatives to carbon nano-tubes or carbon nano-fibers.

  11. Micro/nano-fabrication technologies for cell biology.

    PubMed

    Qian, Tongcheng; Wang, Yingxiao

    2010-10-01

    Micro/nano-fabrication techniques, such as soft lithography and electrospinning, have been well-developed and widely applied in many research fields in the past decade. Due to the low costs and simple procedures, these techniques have become important and popular for biological studies. In this review, we focus on the studies integrating micro/nano-fabrication work to elucidate the molecular mechanism of signaling transduction in cell biology. We first describe different micro/nano-fabrication technologies, including techniques generating three-dimensional scaffolds for tissue engineering. We then introduce the application of these technologies in manipulating the physical or chemical micro/nano-environment to regulate the cellular behavior and response, such as cell life and death, differentiation, proliferation, and cell migration. Recent advancement in integrating the micro/nano-technologies and live cell imaging are also discussed. Finally, potential schemes in cell biology involving micro/nano-fabrication technologies are proposed to provide perspectives on the future research activities.

  12. Micro/nano-fabrication technologies for cell biology

    PubMed Central

    Qian, Tongcheng

    2012-01-01

    Micro/nano-fabrication techniques, such as soft lithography and electrospinning, have been well-developed and widely applied in many research fields in the past decade. Due to the low costs and simple procedures, these techniques have become important and popular for biological studies. In this review, we focus on the studies integrating micro/nano-fabrication work to elucidate the molecular mechanism of signaling transduction in cell biology. We first describe different micro/nano-fabrication technologies, including techniques generating three-dimensional scaffolds for tissue engineering. We then introduce the application of these technologies in manipulating the physical or chemical micro/nano-environment to regulate the cellular behavior and response, such as cell life and death, differentiation, proliferation, and cell migration. Recent advancement in integrating the micro/nano-technologies and live cell imaging are also discussed. Finally, potential schemes in cell biology involving micro/nano-fabrication technologies are proposed to provide perspectives on the future research activities. PMID:20490938

  13. Structural and optical characterization of GaAs nano-crystals selectively grown on Si nano-tips by MOVPE.

    PubMed

    Skibitzki, Oliver; Prieto, Ivan; Kozak, Roksolana; Capellini, Giovanni; Zaumseil, Peter; Arroyo Rojas Dasilva, Yadira; Rossell, Marta D; Erni, Rolf; von Känel, Hans; Schroeder, Thomas

    2017-03-01

    We present the nanoheteroepitaxial growth of gallium arsenide (GaAs) on nano-patterned silicon (Si) (001) substrates fabricated using a CMOS technology compatible process. The selective growth of GaAs nano-crystals (NCs) was achieved at 570 °C by MOVPE. A detailed structure and defect characterization study of the grown nano-heterostructures was performed using scanning transmission electron microscopy, x-ray diffraction, micro-Raman, and micro-photoluminescence (μ-PL) spectroscopy. The results show single-crystalline, nearly relaxed GaAs NCs on top of slightly, by the SiO 2 -mask compressively strained Si nano-tips (NTs). Given the limited contact area, GaAs/Si nanostructures benefit from limited intermixing in contrast to planar GaAs films on Si. Even though a few growth defects (e.g. stacking faults, micro/nano-twins, etc) especially located at the GaAs/Si interface region were detected, the nanoheterostructures show intensive light emission, as investigated by μ-PL spectroscopy. Achieving well-ordered high quality GaAs NCs on Si NTs may provide opportunities for superior electronic, photonic, or photovoltaic device performances integrated on the silicon technology platform.

  14. TID Simulation of Advanced CMOS Devices for Space Applications

    NASA Astrophysics Data System (ADS)

    Sajid, Muhammad

    2016-07-01

    This paper focuses on Total Ionizing Dose (TID) effects caused by accumulation of charges at silicon dioxide, substrate/silicon dioxide interface, Shallow Trench Isolation (STI) for scaled CMOS bulk devices as well as at Buried Oxide (BOX) layer in devices based on Silicon-On-Insulator (SOI) technology to be operated in space radiation environment. The radiation induced leakage current and corresponding density/concentration electrons in leakage current path was presented/depicted for 180nm, 130nm and 65nm NMOS, PMOS transistors based on CMOS bulk as well as SOI process technologies on-board LEO and GEO satellites. On the basis of simulation results, the TID robustness analysis for advanced deep sub-micron technologies was accomplished up to 500 Krad. The correlation between the impact of technology scaling and magnitude of leakage current with corresponding total dose was established utilizing Visual TCAD Genius program.

  15. Plasmofluidics: Merging Light and Fluids at the Micro-/Nano-Scale

    PubMed Central

    Wang, Mingsong; Zhao, Chenglong; Miao, Xiaoyu; Zhao, Yanhui; Rufo, Joseph

    2016-01-01

    Plasmofluidics is the synergistic integration of plasmonics and micro/nano fluidics in devices and applications in order to enhance performance. There has been significant progress in the emerging field of plasmofluidics in recent years. By utilizing the capability of plasmonics to manipulate light at the nanoscale, combined with the unique optical properties of fluids, and precise manipulation via micro/nano fluidics, plasmofluidic technologies enable innovations in lab-on-a-chip systems, reconfigurable photonic devices, optical sensing, imaging, and spectroscopy. In this review article, we examine and categorize the most recent advances in plasmofluidics into plasmon-enhanced functionalities in microfluidics and microfluidics-enhanced plasmonic devices. The former focuses on plasmonic manipulations of fluids, bubbles, particles, biological cells, and molecules at the micro-/nano-scale. The latter includes technological advances that apply microfluidic principles to enable reconfigurable plasmonic devices and performance-enhanced plasmonic sensors. We conclude with our perspectives on the upcoming challenges, opportunities, and the possible future directions of the emerging field of plasmofluidics. PMID:26140612

  16. CMOS-compatible spintronic devices: a review

    NASA Astrophysics Data System (ADS)

    Makarov, Alexander; Windbacher, Thomas; Sverdlov, Viktor; Selberherr, Siegfried

    2016-11-01

    For many decades CMOS devices have been successfully scaled down to achieve higher speed and increased performance of integrated circuits at lower cost. Today’s charge-based CMOS electronics encounters two major challenges: power dissipation and variability. Spintronics is a rapidly evolving research and development field, which offers a potential solution to these issues by introducing novel ‘more than Moore’ devices. Spin-based magnetoresistive random-access memory (MRAM) is already recognized as one of the most promising candidates for future universal memory. Magnetic tunnel junctions, the main elements of MRAM cells, can also be used to build logic-in-memory circuits with non-volatile storage elements on top of CMOS logic circuits, as well as versatile compact on-chip oscillators with low power consumption. We give an overview of CMOS-compatible spintronics applications. First, we present a brief introduction to the physical background considering such effects as magnetoresistance, spin-transfer torque (STT), spin Hall effect, and magnetoelectric effects. We continue with a comprehensive review of the state-of-the-art spintronic devices for memory applications (STT-MRAM, domain wall-motion MRAM, and spin-orbit torque MRAM), oscillators (spin torque oscillators and spin Hall nano-oscillators), logic (logic-in-memory, all-spin logic, and buffered magnetic logic gate grid), sensors, and random number generators. Devices with different types of resistivity switching are analyzed and compared, with their advantages highlighted and challenges revealed. CMOS-compatible spintronic devices are demonstrated beginning with predictive simulations, proceeding to their experimental confirmation and realization, and finalized by the current status of application in modern integrated systems and circuits. We conclude the review with an outlook, where we share our vision on the future applications of the prospective devices in the area.

  17. Scaled CMOS Reliability and Considerations for Spacecraft Systems: Bottom-Up and Top-Down Perspective

    NASA Technical Reports Server (NTRS)

    White, Mark

    2012-01-01

    New space missions will increasingly rely on more advanced technologies because of system requirements for higher performance, particularly in instruments and high-speed processing. Component-level reliability challenges with scaled CMOS in spacecraft systems from a bottom-up perspective have been presented. Fundamental Front-end and Back-end processing reliability issues with more aggressively scaled parts have been discussed. Effective thermal management from system-level to the componentlevel (top-down) is a key element in overall design of reliable systems. Thermal management in space systems must consider a wide range of issues, including thermal loading of many different components, and frequent temperature cycling of some systems. Both perspectives (top-down and bottom-up) play a large role in robust, reliable spacecraft system design.

  18. Method of producing nano-scaled inorganic platelets

    DOEpatents

    Zhamu, Aruna; Jang, Bor Z.

    2012-11-13

    The present invention provides a method of exfoliating a layered material (e.g., transition metal dichalcogenide) to produce nano-scaled platelets having a thickness smaller than 100 nm, typically smaller than 10 nm. The method comprises (a) dispersing particles of a non-graphite laminar compound in a liquid medium containing therein a surfactant or dispersing agent to obtain a stable suspension or slurry; and (b) exposing the suspension or slurry to ultrasonic waves at an energy level for a sufficient length of time to produce separated nano-scaled platelets. The nano-scaled platelets are candidate reinforcement fillers for polymer nanocomposites.

  19. Low-Power RF SOI-CMOS Technology for Distributed Sensor Networks

    NASA Technical Reports Server (NTRS)

    Dogan, Numan S.

    2003-01-01

    The objective of this work is to design and develop Low-Power RF SOI-CMOS Technology for Distributed Sensor Networks. We briefly report on the accomplishments in this work. We also list the impact of this work on graduate student research training/involvement.

  20. Image sensor pixel with on-chip high extinction ratio polarizer based on 65-nm standard CMOS technology.

    PubMed

    Sasagawa, Kiyotaka; Shishido, Sanshiro; Ando, Keisuke; Matsuoka, Hitoshi; Noda, Toshihiko; Tokuda, Takashi; Kakiuchi, Kiyomi; Ohta, Jun

    2013-05-06

    In this study, we demonstrate a polarization sensitive pixel for a complementary metal-oxide-semiconductor (CMOS) image sensor based on 65-nm standard CMOS technology. Using such a deep-submicron CMOS technology, it is possible to design fine metal patterns smaller than the wavelengths of visible light by using a metal wire layer. We designed and fabricated a metal wire grid polarizer on a 20 × 20 μm(2) pixel for image sensor. An extinction ratio of 19.7 dB was observed at a wavelength 750 nm.

  1. CMOS-Compatible Silicon Nanowire Field-Effect Transistor Biosensor: Technology Development toward Commercialization

    PubMed Central

    Wolfrum, Bernhard; Thierry, Benjamin

    2018-01-01

    Owing to their two-dimensional confinements, silicon nanowires display remarkable optical, magnetic, and electronic properties. Of special interest has been the development of advanced biosensing approaches based on the field effect associated with silicon nanowires (SiNWs). Recent advancements in top-down fabrication technologies have paved the way to large scale production of high density and quality arrays of SiNW field effect transistor (FETs), a critical step towards their integration in real-life biosensing applications. A key requirement toward the fulfilment of SiNW FETs’ promises in the bioanalytical field is their efficient integration within functional devices. Aiming to provide a comprehensive roadmap for the development of SiNW FET based sensing platforms, we critically review and discuss the key design and fabrication aspects relevant to their development and integration within complementary metal-oxide-semiconductor (CMOS) technology. PMID:29751688

  2. CMOS-Compatible Silicon Nanowire Field-Effect Transistor Biosensor: Technology Development toward Commercialization.

    PubMed

    Tran, Duy Phu; Pham, Thuy Thi Thanh; Wolfrum, Bernhard; Offenhäusser, Andreas; Thierry, Benjamin

    2018-05-11

    Owing to their two-dimensional confinements, silicon nanowires display remarkable optical, magnetic, and electronic properties. Of special interest has been the development of advanced biosensing approaches based on the field effect associated with silicon nanowires (SiNWs). Recent advancements in top-down fabrication technologies have paved the way to large scale production of high density and quality arrays of SiNW field effect transistor (FETs), a critical step towards their integration in real-life biosensing applications. A key requirement toward the fulfilment of SiNW FETs' promises in the bioanalytical field is their efficient integration within functional devices. Aiming to provide a comprehensive roadmap for the development of SiNW FET based sensing platforms, we critically review and discuss the key design and fabrication aspects relevant to their development and integration within complementary metal-oxide-semiconductor (CMOS) technology.

  3. A Hybrid Readout Solution for GaN-Based Detectors Using CMOS Technology.

    PubMed

    Padmanabhan, Preethi; Hancock, Bruce; Nikzad, Shouleh; Bell, L Douglas; Kroep, Kees; Charbon, Edoardo

    2018-02-03

    Gallium nitride (GaN) and its alloys are becoming preferred materials for ultraviolet (UV) detectors due to their wide bandgap and tailorable out-of-band cutoff from 3.4 eV to 6.2 eV. GaN based avalanche photodiodes (APDs) are particularly suitable for their high photon sensitivity and quantum efficiency in the UV region and for their inherent insensitivity to visible wavelengths. Challenges exist however for practical utilization. With growing interests in such photodetectors, hybrid readout solutions are becoming prevalent with CMOS technology being adopted for its maturity, scalability, and reliability. In this paper, we describe our approach to combine GaN APDs with a CMOS readout circuit, comprising of a linear array of 1 × 8 capacitive transimpedance amplifiers (CTIAs), implemented in a 0.35 µm high voltage CMOS technology. Further, we present a simple, yet sustainable circuit technique to allow operation of APDs under high reverse biases, up to ≈80 V with verified measurement results. The readout offers a conversion gain of 0.43 µV/e - , obtaining avalanche gains up to 10³. Several parameters of the CTIA are discussed followed by a perspective on possible hybridization, exploiting the advantages of a 3D-stacked technology.

  4. Noise Reduction Techniques and Scaling Effects towards Photon Counting CMOS Image Sensors

    PubMed Central

    Boukhayma, Assim; Peizerat, Arnaud; Enz, Christian

    2016-01-01

    This paper presents an overview of the read noise in CMOS image sensors (CISs) based on four-transistors (4T) pixels, column-level amplification and correlated multiple sampling. Starting from the input-referred noise analytical formula, process level optimizations, device choices and circuit techniques at the pixel and column level of the readout chain are derived and discussed. The noise reduction techniques that can be implemented at the column and pixel level are verified by transient noise simulations, measurement and results from recently-published low noise CIS. We show how recently-reported process refinement, leading to the reduction of the sense node capacitance, can be combined with an optimal in-pixel source follower design to reach a sub-0.3erms- read noise at room temperature. This paper also discusses the impact of technology scaling on the CIS read noise. It shows how designers can take advantage of scaling and how the Metal-Oxide-Semiconductor (MOS) transistor gate leakage tunneling current appears as a challenging limitation. For this purpose, both simulation results of the gate leakage current and 1/f noise data reported from different foundries and technology nodes are used.

  5. Life Cycle Analysis of Dedicated Nano-Launch Technologies

    NASA Technical Reports Server (NTRS)

    Zapata, Edgar; McCleskey, Carey; Martin, John; Lepsch, Roger; Hernani, Tosoc

    2014-01-01

    Recent technology advancements have enabled the development of small cheap satellites that can perform useful functions in the space environment. Currently, the only low cost option for getting these payloads into orbit is through ride share programs. As a result, these launch opportunities await primary payload launches and a backlog exists. An alternative option would be dedicated nano-launch systems built and operated to provide more flexible launch services, higher availability, and affordable prices. The potential customer base that would drive requirements or support a business case includes commercial, academia, civil government and defense. Further, NASA technology investments could enable these alternative game changing options.With this context, in 2013 the Game Changing Development (GCD) program funded a NASA team to investigate the feasibility of dedicated nano-satellite launch systems with a recurring cost of less than $2 million per launch for a 5 kg payload to low Earth orbit. The team products would include potential concepts, technologies and factors for enabling the ambitious cost goal, exploring the nature of the goal itself, and informing the GCD program technology investment decision making process. This paper provides an overview of the life cycle analysis effort that was conducted in 2013 by an inter-center NASA team. This effort included the development of reference nano-launch system concepts, developing analysis processes and models, establishing a basis for cost estimates (development, manufacturing and launch) suitable to the scale of the systems, and especially, understanding the relationship of potential game changing technologies to life cycle costs, as well as other factors, such as flights per year.

  6. Integrated imaging sensor systems with CMOS active pixel sensor technology

    NASA Technical Reports Server (NTRS)

    Yang, G.; Cunningham, T.; Ortiz, M.; Heynssens, J.; Sun, C.; Hancock, B.; Seshadri, S.; Wrigley, C.; McCarty, K.; Pain, B.

    2002-01-01

    This paper discusses common approaches to CMOS APS technology, as well as specific results on the five-wire programmable digital camera-on-a-chip developed at JPL. The paper also reports recent research in the design, operation, and performance of APS imagers for several imager applications.

  7. The role of nano-particles in the field of thermal spray coating technology

    NASA Astrophysics Data System (ADS)

    Siegmann, Stephan; Leparoux, Marc; Rohr, Lukas

    2005-06-01

    Nano-particles play not only a key role in recent research fields, but also in the public discussions about health and safety in nanotechnology. Nevertheless, the worldwide activities in nano-particles research increased dramatically during the last 5 to 10 years. There are different potential routes for the future production of nano-particles at large scale. The main directions envisaged are mechanical milling, wet chemical reactions or gas phase processes. Each of the processes has its specific advantages and limitations. Mechanical milling and wet chemical reactions are typically time intensive and batch processes, whereas gas phase productions by flames or plasma can be carried out continuously. Materials of interest are mainly oxide ceramics, carbides, nitrides, and pure metals. Nano-ceramics are interesting candidates for coating technologies due to expected higher coating toughness, better thermal shock and wear resistance. Especially embedded nano-carbides and-nitrides offer homogenously distributed hard phases, which enhance coatings hardness. Thermal spraying, a nearly 100 years old and world wide established coating technology, gets new possibilities thanks to optimized, nano-sized and/or nano-structured powders. Latest coating system developments like high velocity flame spraying (HVOF), cold gas deposition or liquid suspension spraying in combination with new powder qualities may open new applications and markets. This article gives an overview on the latest activities in nano-particle research and production in special relation to thermal spray coating technology.

  8. A CMOS wireless biomolecular sensing system-on-chip based on polysilicon nanowire technology.

    PubMed

    Huang, C-W; Huang, Y-J; Yen, P-W; Tsai, H-H; Liao, H-H; Juang, Y-Z; Lu, S-S; Lin, C-T

    2013-11-21

    As developments of modern societies, an on-field and personalized diagnosis has become important for disease prevention and proper treatment. To address this need, in this work, a polysilicon nanowire (poly-Si NW) based biosensor system-on-chip (bio-SSoC) is designed and fabricated by a 0.35 μm 2-Poly-4-Metal (2P4M) complementary metal-oxide-semiconductor (CMOS) process provided by a commercialized semiconductor foundry. Because of the advantages of CMOS system-on-chip (SoC) technologies, the poly-Si NW biosensor is integrated with a chopper differential-difference amplifier (DDA) based analog-front-end (AFE), a successive approximation analog-to-digital converter (SAR ADC), and a microcontroller to have better sensing capabilities than a traditional Si NW discrete measuring system. In addition, an on-off key (OOK) wireless transceiver is also integrated to form a wireless bio-SSoC technology. This is pioneering work to harness the momentum of CMOS integrated technology into emerging bio-diagnosis technologies. This integrated technology is experimentally examined to have a label-free and low-concentration biomolecular detection for both Hepatitis B Virus DNA (10 fM) and cardiac troponin I protein (3.2 pM). Based on this work, the implemented wireless bio-SSoC has demonstrated a good biomolecular sensing characteristic and a potential for low-cost and mobile applications. As a consequence, this developed technology can be a promising candidate for on-field and personalized applications in biomedical diagnosis.

  9. Reverse micelle-loaded lipid nano-emulsions: new technology for nano-encapsulation of hydrophilic materials.

    PubMed

    Anton, Nicolas; Mojzisova, Halina; Porcher, Emilien; Benoit, Jean-Pierre; Saulnier, Patrick

    2010-10-15

    This study presents novel, recently patented technology for encapsulating hydrophilic species in lipid nano-emulsions. The method is based on the phase-inversion temperature method (the so-called PIT method), which follows a low-energy and solvent-free process. The nano-emulsions formed are stable for months, and exhibit droplet sizes ranging from 10 to 200 nm. Hydrophilic model molecules of fluorescein sodium salt are encapsulated in the oily core of these nano-emulsion droplets through their solubilisation in the reverse micellar system. As a result, original, multi-scaled nano-objects are generated with a 'hydrophilic molecule in a reverse-micelles-in-oil-in-water' structure. Once fluorescein has been encapsulated it remains stable, for thermodynamic reasons, and the encapsulation yields can reach 90%. The reason why such complex objects can be formed is due to the soft method used (PIT method) which allows the conservation of the structure of the reverse micelles throughout the formulation process, up to their entrapment in the nano-emulsion droplets. In this study, we focus the investigation on the process itself, revealing its potential and limits. Since the formulation of nanocarriers for the encapsulation of hydrophilic substances still remains a challenge, this study may constitute a significant advance in this field. Copyright 2010 Elsevier B.V. All rights reserved.

  10. Synchronized femtosecond laser pulse switching system based nano-patterning technology

    NASA Astrophysics Data System (ADS)

    Sohn, Ik-Bu; Choi, Hun-Kook; Yoo, Dongyoon; Noh, Young-Chul; Sung, Jae-Hee; Lee, Seong-Ku; Ahsan, Md. Shamim; Lee, Ho

    2017-07-01

    This paper demonstrates the design and development of a synchronized femtosecond laser pulse switching system and its applications in nano-patterning of transparent materials. Due to synchronization, we are able to control the location of each irradiated laser pulse in any kind of substrate. The control over the scanning speed and scanning step of the laser beam enables us to pattern periodic micro/nano-metric holes, voids, and/or lines in various materials. Using the synchronized laser system, we pattern synchronized nano-holes on the surface of and inside various transparent materials including fused silica glass and polymethyl methacrylate to replicate any image or pattern on the surface of or inside (transparent) materials. We also investigate the application areas of the proposed synchronized femtosecond laser pulse switching system in a diverse field of science and technology, especially in optical memory, color marking, and synchronized micro/nano-scale patterning of materials.

  11. A Hybrid Readout Solution for GaN-Based Detectors Using CMOS Technology

    PubMed Central

    Hancock, Bruce; Nikzad, Shouleh; Bell, L. Douglas; Kroep, Kees; Charbon, Edoardo

    2018-01-01

    Gallium nitride (GaN) and its alloys are becoming preferred materials for ultraviolet (UV) detectors due to their wide bandgap and tailorable out-of-band cutoff from 3.4 eV to 6.2 eV. GaN based avalanche photodiodes (APDs) are particularly suitable for their high photon sensitivity and quantum efficiency in the UV region and for their inherent insensitivity to visible wavelengths. Challenges exist however for practical utilization. With growing interests in such photodetectors, hybrid readout solutions are becoming prevalent with CMOS technology being adopted for its maturity, scalability, and reliability. In this paper, we describe our approach to combine GaN APDs with a CMOS readout circuit, comprising of a linear array of 1 × 8 capacitive transimpedance amplifiers (CTIAs), implemented in a 0.35 µm high voltage CMOS technology. Further, we present a simple, yet sustainable circuit technique to allow operation of APDs under high reverse biases, up to ≈80 V with verified measurement results. The readout offers a conversion gain of 0.43 µV/e−, obtaining avalanche gains up to 103. Several parameters of the CTIA are discussed followed by a perspective on possible hybridization, exploiting the advantages of a 3D-stacked technology. PMID:29401655

  12. Full-wafer fabrication by nanostencil lithography of micro/nanomechanical mass sensors monolithically integrated with CMOS.

    PubMed

    Arcamone, J; van den Boogaart, M A F; Serra-Graells, F; Fraxedas, J; Brugger, J; Pérez-Murano, F

    2008-07-30

    Wafer-scale nanostencil lithography (nSL) is used to define several types of silicon mechanical resonators, whose dimensions range from 20 µm down to 200 nm, monolithically integrated with CMOS circuits. We demonstrate the simultaneous patterning by nSL of ∼2000 nanodevices per wafer by post-processing standard CMOS substrates using one single metal evaporation, pattern transfer to silicon and subsequent etch of the sacrificial layer. Resonance frequencies in the MHz range were measured in air and vacuum. As proof-of-concept towards an application as high performance sensors, CMOS integrated nano/micromechanical resonators are successfully implemented as ultra-sensitive areal mass sensors. These devices demonstrate the ability to monitor the deposition of gold layers whose average thickness is smaller than a monolayer. Their areal mass sensitivity is in the range of 10(-11) g cm(-2) Hz(-1), and their thickness resolution corresponds to approximately a thousandth of a monolayer.

  13. Scaling laws for nanoFET sensors

    NASA Astrophysics Data System (ADS)

    Zhou, Fu-Shan; Wei, Qi-Huo

    2008-01-01

    The sensitive conductance change of semiconductor nanowires and carbon nanotubes in response to the binding of charged molecules provides a novel sensing modality which is generally denoted as nanoFET sensors. In this paper, we study the scaling laws of nanoplate FET sensors by simplifying nanoplates as random resistor networks with molecular receptors sitting on lattice sites. Nanowire/tube FETs are included as the limiting cases where the device width goes small. Computer simulations show that the field effect strength exerted by the binding molecules has significant impact on the scaling behaviors. When the field effect strength is small, nanoFETs have little size and shape dependence. In contrast, when the field effect strength becomes stronger, there exists a lower detection threshold for charge accumulation FETs and an upper detection threshold for charge depletion FET sensors. At these thresholds, the nanoFET devices undergo a transition between low and large sensitivities. These thresholds may set the detection limits of nanoFET sensors, while they could be eliminated by designing devices with very short source-drain distance and large width.

  14. Low Power Camera-on-a-Chip Using CMOS Active Pixel Sensor Technology

    NASA Technical Reports Server (NTRS)

    Fossum, E. R.

    1995-01-01

    A second generation image sensor technology has been developed at the NASA Jet Propulsion Laboratory as a result of the continuing need to miniaturize space science imaging instruments. Implemented using standard CMOS, the active pixel sensor (APS) technology permits the integration of the detector array with on-chip timing, control and signal chain electronics, including analog-to-digital conversion.

  15. 50 μm pixel pitch wafer-scale CMOS active pixel sensor x-ray detector for digital breast tomosynthesis.

    PubMed

    Zhao, C; Konstantinidis, A C; Zheng, Y; Anaxagoras, T; Speller, R D; Kanicki, J

    2015-12-07

    Wafer-scale CMOS active pixel sensors (APSs) have been developed recently for x-ray imaging applications. The small pixel pitch and low noise are very promising properties for medical imaging applications such as digital breast tomosynthesis (DBT). In this work, we evaluated experimentally and through modeling the imaging properties of a 50 μm pixel pitch CMOS APS x-ray detector named DynAMITe (Dynamic Range Adjustable for Medical Imaging Technology). A modified cascaded system model was developed for CMOS APS x-ray detectors by taking into account the device nonlinear signal and noise properties. The imaging properties such as modulation transfer function (MTF), noise power spectrum (NPS), and detective quantum efficiency (DQE) were extracted from both measurements and the nonlinear cascaded system analysis. The results show that the DynAMITe x-ray detector achieves a high spatial resolution of 10 mm(-1) and a DQE of around 0.5 at spatial frequencies  <1 mm(-1). In addition, the modeling results were used to calculate the image signal-to-noise ratio (SNRi) of microcalcifications at various mean glandular dose (MGD). For an average breast (5 cm thickness, 50% glandular fraction), 165 μm microcalcifications can be distinguished at a MGD of 27% lower than the clinical value (~1.3 mGy). To detect 100 μm microcalcifications, further optimizations of the CMOS APS x-ray detector, image aquisition geometry and image reconstruction techniques should be considered.

  16. CMOS dot matrix microdisplay

    NASA Astrophysics Data System (ADS)

    Venter, Petrus J.; Bogalecki, Alfons W.; du Plessis, Monuko; Goosen, Marius E.; Nell, Ilse J.; Rademeyer, P.

    2011-03-01

    Display technologies always seem to find a wide range of interesting applications. As devices develop towards miniaturization, niche applications for small displays may emerge. While OLEDs and LCDs dominate the market for small displays, they have some shortcomings as relatively expensive technologies. Although CMOS is certainly not the dominating semiconductor for photonics, its widespread use, favourable cost and robustness present an attractive potential if it could find application in the microdisplay environment. Advances in improving the quantum efficiency of avalanche electroluminescence and the favourable spectral characteristics of light generated through the said mechanism may afford CMOS the possibility to be used as a display technology. This work shows that it is possible to integrate a fully functional display in a completely standard CMOS technology mainly geared towards digital design while using light sources completely compatible with the process and without any post processing required.

  17. A novel high-speed CMOS circuit based on a gang of capacitors

    NASA Astrophysics Data System (ADS)

    Sharroush, Sherif M.

    2017-08-01

    There is no doubt that complementary metal-oxide semiconductor (CMOS) circuits with wide fan-in suffers from the relatively sluggish operation. In this paper, a circuit that contains a gang of capacitors sharing their charge with each other is proposed as an alternative to long N-channel MOS and P-channel MOS stacks. The proposed scheme is investigated quantitatively and verified by simulation using the 45-nm CMOS technology with VDD = 1 V. The time delay, area and power consumption of the proposed scheme are investigated and compared with the conventional static CMOS logic circuit. It is verified that the proposed scheme achieves 52% saving in the average propagation delay for eight inputs and that it has a smaller area compared to the conventional CMOS logic when the number of inputs exceeds three and a smaller power consumption for a number of inputs exceeding two. The impacts of process variations, component mismatches and technology scaling on the proposed scheme are also investigated.

  18. Characteristics of Various Photodiode Structures in CMOS Technology with Monolithic Signal Processing Electronics

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Mukhopadhyay, Sourav; Chandratre, V. B.; Sukhwani, Menka

    2011-10-20

    Monolithic optical sensor with readout electronics are needed in optical communication, medical imaging and scintillator based gamma spectroscopy system. This paper presents the design of three different CMOS photodiode test structures and two readout channels in a commercial CMOS technology catering to the need of nuclear instrumentation. The three photodiode structures each of 1 mm{sup 2} with readout electronics are fabricated in 0.35 um, 4 metal, double poly, N-well CMOS process. These photodiode structures are based on available P-N junction of standard CMOS process i.e. N-well/P-substrate, P+/N-well/P-substrate and inter-digitized P+/N-well/P-substrate. The comparisons of typical characteristics among three fabricated photo sensorsmore » are reported in terms of spectral sensitivity, dark current and junction capacitance. Among the three photodiode structures N-well/P-substrate photodiode shows higher spectral sensitivity compared to the other two photodiode structures. The inter-digitized P+/N-well/P-substrate structure has enhanced blue response compared to N-well/P-substrate and P+/N-well/P-substrate photodiode. Design and test results of monolithic readout electronics, for three different CMOS photodiode structures for application related to nuclear instrumentation, are also reported.« less

  19. Life Cycle Analysis of Dedicated Nano-Launch Technologies

    NASA Technical Reports Server (NTRS)

    Zapata, Edgar; McCleskey, Carey (Editor); Martin, John; Lepsch, Roger; Ternani, Tosoc

    2014-01-01

    Recent technology advancements have enabled the development of small cheap satellites that can perform useful functions in the space environment. Currently, the only low cost option for getting these payloads into orbit is through ride share programs - small satellites awaiting the launch of a larger satellite, and then riding along on the same launcher. As a result, these small satellite customers await primary payload launches and a backlog exists. An alternative option would be dedicated nano-launch systems built and operated to provide more flexible launch services, higher availability, and affordable prices. The potential customer base that would drive requirements or support a business case includes commercial, academia, civil government and defense. Further, NASA technology investments could enable these alternative game changing options. With this context, in 2013 the Game Changing Development (GCD) program funded a NASA team to investigate the feasibility of dedicated nano-satellite launch systems with a recurring cost of less than $2 million per launch for a 5 kg payload to low Earth orbit. The team products would include potential concepts, technologies and factors for enabling the ambitious cost goal, exploring the nature of the goal itself, and informing the GCD program technology investment decision making process. This paper provides an overview of the life cycle analysis effort that was conducted in 2013 by an inter-center NASA team. This effort included the development of reference nano-launch system concepts, developing analysis processes and models, establishing a basis for cost estimates (development, manufacturing and launch) suitable to the scale of the systems, and especially, understanding the relationship of potential game changing technologies to life cycle costs, as well as other factors, such as flights per year.

  20. CMOS Time-Resolved, Contact, and Multispectral Fluorescence Imaging for DNA Molecular Diagnostics

    PubMed Central

    Guo, Nan; Cheung, Ka Wai; Wong, Hiu Tung; Ho, Derek

    2014-01-01

    Instrumental limitations such as bulkiness and high cost prevent the fluorescence technique from becoming ubiquitous for point-of-care deoxyribonucleic acid (DNA) detection and other in-field molecular diagnostics applications. The complimentary metal-oxide-semiconductor (CMOS) technology, as benefited from process scaling, provides several advanced capabilities such as high integration density, high-resolution signal processing, and low power consumption, enabling sensitive, integrated, and low-cost fluorescence analytical platforms. In this paper, CMOS time-resolved, contact, and multispectral imaging are reviewed. Recently reported CMOS fluorescence analysis microsystem prototypes are surveyed to highlight the present state of the art. PMID:25365460

  1. Scaling Laws for NanoFET Sensors

    NASA Astrophysics Data System (ADS)

    Wei, Qi-Huo; Zhou, Fu-Shan

    2008-03-01

    In this paper, we report our numerical studies of the scaling laws for nanoplate field-effect transistor (FET) sensors by simplifying the nanoplates as random resistor networks. Nanowire/tube FETs are included as the limiting cases where the device width goes small. Computer simulations show that the field effect strength exerted by the binding molecules has significant impact on the scaling behaviors. When the field effect strength is small, nanoFETs have little size and shape dependence. In contrast, when the field-effect strength becomes stronger, there exists a lower detection threshold for charge accumulation FETs and an upper detection threshold for charge depletion FET sensors. At these thresholds, the nanoFET devices undergo a transition between low and large sensitivities. These thresholds may set the detection limits of nanoFET sensors. We propose to eliminate these detection thresholds by employing devices with very short source-drain distance and large width.

  2. Radiation Performance of 1 Gbit DDR SDRAMs Fabricated in the 90 nm CMOS Technology Node

    NASA Technical Reports Server (NTRS)

    Ladbury, Raymond L.; Gorelick, Jerry L.; Berg, M. D.; Kim, H.; LaBel, K.; Friendlich, M.; Koga, R.; George, J.; Crain, S.; Yu, P.; hide

    2006-01-01

    We present Single Event Effect (SEE) and Total Ionizing Dose (TID) data for 1 Gbit DDR SDRAMs (90 nm CMOS technology) as well as comparing this data with earlier technology nodes from the same manufacturer.

  3. Monolithic optical phased-array transceiver in a standard SOI CMOS process.

    PubMed

    Abediasl, Hooman; Hashemi, Hossein

    2015-03-09

    Monolithic microwave phased arrays are turning mainstream in automotive radars and high-speed wireless communications fulfilling Gordon Moores 1965 prophecy to this effect. Optical phased arrays enable imaging, lidar, display, sensing, and holography. Advancements in fabrication technology has led to monolithic nanophotonic phased arrays, albeit without independent phase and amplitude control ability, integration with electronic circuitry, or including receive and transmit functions. We report the first monolithic optical phased array transceiver with independent control of amplitude and phase for each element using electronic circuitry that is tightly integrated with the nanophotonic components on one substrate using a commercial foundry CMOS SOI process. The 8 × 8 phased array chip includes thermo-optical tunable phase shifters and attenuators, nano-photonic antennas, and dedicated control electronics realized using CMOS transistors. The complex chip includes over 300 distinct optical components and over 74,000 distinct electrical components achieving the highest level of integration for any electronic-photonic system.

  4. Nano-sized crystalline drug production by milling technology.

    PubMed

    Moribe, Kunikazu; Ueda, Keisuke; Limwikrant, Waree; Higashi, Kenjirou; Yamamoto, Keiji

    2013-01-01

    Nano-formulation of poorly water-soluble drugs has been developed to enhance drug dissolution. In this review, we introduce nano-milling technology described in recently published papers. Factors affecting the size of drug crystals are compared based on the preparation methods and drug and excipient types. A top-down approach using the comminution process is a method conventionally used to prepare crystalline drug nanoparticles. Wet milling using media is well studied and several wet-milled drug formulations are now on the market. Several trials on drug nanosuspension preparation using different apparatuses, materials, and conditions have been reported. Wet milling using a high-pressure homogenizer is another alternative to preparing production-scale drug nanosuspensions. Dry milling is a simple method of preparing a solid-state drug nano-formulation. The effect of size on the dissolution of a drug from nanoparticles is an area of fundamental research, but it is sometimes incorrectly evaluated. Here, we discuss evaluation procedures and the associated problems. Lastly, the importance of quality control, process optimization, and physicochemical characterization are briefly discussed.

  5. Nano-Scale Fabrication Using Optical-Near-Field

    NASA Astrophysics Data System (ADS)

    Yatsui, Takashi; Ohtsu, Motoichi

    This paper reviews the specific nature of nanophotonics, i.e., a novel optical nano-technology, utilizing dressed photon excited in the nano-material. As examples of nanophotnic fabrication, optical near-field etching and increased spatial homogeneity of contents in compound semiconductors is demonstrated with a self-organized manner.

  6. Nanometric Integrated Temperature and Thermal Sensors in CMOS-SOI Technology

    PubMed Central

    Malits, Maria; Nemirovsky, Yael

    2017-01-01

    This paper reviews and compares the thermal and noise characterization of CMOS (complementary metal-oxide-semiconductor) SOI (Silicon on insulator) transistors and lateral diodes used as temperature and thermal sensors. DC analysis of the measured sensors and the experimental results in a broad (300 K up to 550 K) temperature range are presented. It is shown that both sensors require small chip area, have low power consumption, and exhibit linearity and high sensitivity over the entire temperature range. However, the diode’s sensitivity to temperature variations in CMOS-SOI technology is highly dependent on the diode’s perimeter; hence, a careful calibration for each fabrication process is needed. In contrast, the short thermal time constant of the electrons in the transistor’s channel enables measuring the instantaneous heating of the channel and to determine the local true temperature of the transistor. This allows accurate “on-line” temperature sensing while no additional calibration is needed. In addition, the noise measurements indicate that the diode’s small area and perimeter causes a high 1/f noise in all measured bias currents. This is a severe drawback for the sensor accuracy when using the sensor as a thermal sensor; hence, CMOS-SOI transistors are a better choice for temperature sensing. PMID:28758932

  7. Nanometric Integrated Temperature and Thermal Sensors in CMOS-SOI Technology.

    PubMed

    Malits, Maria; Nemirovsky, Yael

    2017-07-29

    This paper reviews and compares the thermal and noise characterization of CMOS (complementary metal-oxide-semiconductor) SOI (Silicon on insulator) transistors and lateral diodes used as temperature and thermal sensors. DC analysis of the measured sensors and the experimental results in a broad (300 K up to 550 K) temperature range are presented. It is shown that both sensors require small chip area, have low power consumption, and exhibit linearity and high sensitivity over the entire temperature range. However, the diode's sensitivity to temperature variations in CMOS-SOI technology is highly dependent on the diode's perimeter; hence, a careful calibration for each fabrication process is needed. In contrast, the short thermal time constant of the electrons in the transistor's channel enables measuring the instantaneous heating of the channel and to determine the local true temperature of the transistor. This allows accurate "on-line" temperature sensing while no additional calibration is needed. In addition, the noise measurements indicate that the diode's small area and perimeter causes a high 1/ f noise in all measured bias currents. This is a severe drawback for the sensor accuracy when using the sensor as a thermal sensor; hence, CMOS-SOI transistors are a better choice for temperature sensing.

  8. All-CMOS night vision viewer with integrated microdisplay

    NASA Astrophysics Data System (ADS)

    Goosen, Marius E.; Venter, Petrus J.; du Plessis, Monuko; Faure, Nicolaas M.; Janse van Rensburg, Christo; Rademeyer, Pieter

    2014-02-01

    The unrivalled integration potential of CMOS has made it the dominant technology for digital integrated circuits. With the advent of visible light emission from silicon through hot carrier electroluminescence, several applications arose, all of which rely upon the advantages of mature CMOS technologies for a competitive edge in a very active and attractive market. In this paper we present a low-cost night vision viewer which employs only standard CMOS technologies. A commercial CMOS imager is utilized for near infrared image capturing with a 128x96 pixel all-CMOS microdisplay implemented to convey the image to the user. The display is implemented in a standard 0.35 μm CMOS process, with no process alterations or post processing. The display features a 25 μm pixel pitch and a 3.2 mm x 2.4 mm active area, which through magnification presents the virtual image to the user equivalent of a 19-inch display viewed from a distance of 3 meters. This work represents the first application of a CMOS microdisplay in a low-cost consumer product.

  9. Nano-tubular cellulose for bioprocess technology development.

    PubMed

    Koutinas, Athanasios A; Sypsas, Vasilios; Kandylis, Panagiotis; Michelis, Andreas; Bekatorou, Argyro; Kourkoutas, Yiannis; Kordulis, Christos; Lycourghiotis, Alexis; Banat, Ibrahim M; Nigam, Poonam; Marchant, Roger; Giannouli, Myrsini; Yianoulis, Panagiotis

    2012-01-01

    Delignified cellulosic material has shown a significant promotional effect on the alcoholic fermentation as yeast immobilization support. However, its potential for further biotechnological development is unexploited. This study reports the characterization of this tubular/porous cellulosic material, which was done by SEM, porosimetry and X-ray powder diffractometry. The results showed that the structure of nano-tubular cellulose (NC) justifies its suitability for use in "cold pasteurization" processes and its promoting activity in bioprocessing (fermentation). The last was explained by a glucose pump theory. Also, it was demonstrated that crystallization of viscous invert sugar solutions during freeze drying could not be otherwise achieved unless NC was present. This effect as well as the feasibility of extremely low temperature fermentation are due to reduction of the activation energy, and have facilitated the development of technologies such as wine fermentations at home scale (in a domestic refrigerator). Moreover, NC may lead to new perspectives in research such as the development of new composites, templates for cylindrical nano-particles, etc.

  10. Nanopore-CMOS Interfaces for DNA Sequencing

    PubMed Central

    Magierowski, Sebastian; Huang, Yiyun; Wang, Chengjie; Ghafar-Zadeh, Ebrahim

    2016-01-01

    DNA sequencers based on nanopore sensors present an opportunity for a significant break from the template-based incumbents of the last forty years. Key advantages ushered by nanopore technology include a simplified chemistry and the ability to interface to CMOS technology. The latter opportunity offers substantial promise for improvement in sequencing speed, size and cost. This paper reviews existing and emerging means of interfacing nanopores to CMOS technology with an emphasis on massively-arrayed structures. It presents this in the context of incumbent DNA sequencing techniques, reviews and quantifies nanopore characteristics and models and presents CMOS circuit methods for the amplification of low-current nanopore signals in such interfaces. PMID:27509529

  11. Nanopore-CMOS Interfaces for DNA Sequencing.

    PubMed

    Magierowski, Sebastian; Huang, Yiyun; Wang, Chengjie; Ghafar-Zadeh, Ebrahim

    2016-08-06

    DNA sequencers based on nanopore sensors present an opportunity for a significant break from the template-based incumbents of the last forty years. Key advantages ushered by nanopore technology include a simplified chemistry and the ability to interface to CMOS technology. The latter opportunity offers substantial promise for improvement in sequencing speed, size and cost. This paper reviews existing and emerging means of interfacing nanopores to CMOS technology with an emphasis on massively-arrayed structures. It presents this in the context of incumbent DNA sequencing techniques, reviews and quantifies nanopore characteristics and models and presents CMOS circuit methods for the amplification of low-current nanopore signals in such interfaces.

  12. CMOS-Technology-Enabled Flexible and Stretchable Electronics for Internet of Everything Applications.

    PubMed

    Hussain, Aftab M; Hussain, Muhammad M

    2016-06-01

    Flexible and stretchable electronics can dramatically enhance the application of electronics for the emerging Internet of Everything applications where people, processes, data and devices will be integrated and connected, to augment quality of life. Using naturally flexible and stretchable polymeric substrates in combination with emerging organic and molecular materials, nanowires, nanoribbons, nanotubes, and 2D atomic crystal structured materials, significant progress has been made in the general area of such electronics. However, high volume manufacturing, reliability and performance per cost remain elusive goals for wide commercialization of these electronics. On the other hand, highly sophisticated but extremely reliable, batch-fabrication-capable and mature complementary metal oxide semiconductor (CMOS)-based technology has facilitated tremendous growth of today's digital world using thin-film-based electronics; in particular, bulk monocrystalline silicon (100) which is used in most of the electronics existing today. However, one fundamental challenge is that state-of-the-art CMOS electronics are physically rigid and brittle. Therefore, in this work, how CMOS-technology-enabled flexible and stretchable electronics can be developed is discussed, with particular focus on bulk monocrystalline silicon (100). A comprehensive information base to realistically devise an integration strategy by rational design of materials, devices and processes for Internet of Everything electronics is offered. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  13. Criticality of Low-Energy Protons in Single-Event Effects Testing of Highly-Scaled Technologies

    NASA Technical Reports Server (NTRS)

    Pellish, Jonathan Allen; Marshall, Paul W.; Rodbell, K. P.; Gordon, M. S.; LaBel, K. A.; Schwank, J. R.; Dodds, N. A.; Castaneda, C. M.; Berg, M. D.; Kim, H. S.; hide

    2014-01-01

    We report low-energy proton and alpha particle SEE data on a 32 nm silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) static random access memory (SRAM) that demonstrates the criticality of understanding and using low-energy protons for SEE testing of highly-scaled technologies

  14. Step-gate polysilicon nanowires field effect transistor compatible with CMOS technology for label-free DNA biosensor.

    PubMed

    Wenga, G; Jacques, E; Salaün, A-C; Rogel, R; Pichon, L; Geneste, F

    2013-02-15

    Currently, detection of DNA hybridization using fluorescence-based detection technique requires expensive optical systems and complex bioinformatics tools. Hence, the development of new low cost devices that enable direct and highly sensitive detection stimulates a lot of research efforts. Particularly, devices based on silicon nanowires are emerging as ultrasensitive electrical sensors for the direct detection of biological species thanks to their high surface to volume ratio. In this study, we propose innovative devices using step-gate polycrystalline silicon nanowire FET (poly-Si NW FETs), achieved with simple and low cost fabrication process, and used as ultrasensitive electronic sensor for DNA hybridization. The poly-SiNWs are synthesized using the sidewall spacer formation technique. The detailed fabrication procedure for a step-gate NWFET sensor is described in this paper. No-complementary and complementary DNA sequences were clearly discriminated and detection limit to 1 fM range is observed. This first result using this nano-device is promising for the development of low cost and ultrasensitive polysilicon nanowires based DNA sensors compatible with the CMOS technology. Copyright © 2012 Elsevier B.V. All rights reserved.

  15. Method of producing exfoliated graphite, flexible graphite, and nano-scaled graphene platelets

    DOEpatents

    Zhamu, Aruna; Shi, Jinjun; Guo, Jiusheng; Jang, Bor Z.

    2010-11-02

    The present invention provides a method of exfoliating a layered material (e.g., graphite and graphite oxide) to produce nano-scaled platelets having a thickness smaller than 100 nm, typically smaller than 10 nm. The method comprises (a) dispersing particles of graphite, graphite oxide, or a non-graphite laminar compound in a liquid medium containing therein a surfactant or dispersing agent to obtain a stable suspension or slurry; and (b) exposing the suspension or slurry to ultrasonic waves at an energy level for a sufficient length of time to produce separated nano-scaled platelets. The nano-scaled platelets are candidate reinforcement fillers for polymer nanocomposites. Nano-scaled graphene platelets are much lower-cost alternatives to carbon nano-tubes or carbon nano-fibers.

  16. Application of exergetic sustainability index to a nano-scale irreversible Brayton cycle operating with ideal Bose and Fermi gasses

    NASA Astrophysics Data System (ADS)

    Açıkkalp, Emin; Caner, Necmettin

    2015-09-01

    In this study, a nano-scale irreversible Brayton cycle operating with quantum gasses including Bose and Fermi gasses is researched. Developments in the nano-technology cause searching the nano-scale machines including thermal systems to be unavoidable. Thermodynamic analysis of a nano-scale irreversible Brayton cycle operating with Bose and Fermi gasses was performed (especially using exergetic sustainability index). In addition, thermodynamic analysis involving classical evaluation parameters such as work output, exergy output, entropy generation, energy and exergy efficiencies were conducted. Results are submitted numerically and finally some useful recommendations were conducted. Some important results are: entropy generation and exergetic sustainability index are affected mostly for Bose gas and power output and exergy output are affected mostly for the Fermi gas by x. At the high temperature conditions, work output and entropy generation have high values comparing with other degeneracy conditions.

  17. Investigation of CMOS pixel sensor with 0.18 μm CMOS technology for high-precision tracking detector

    NASA Astrophysics Data System (ADS)

    Zhang, L.; Fu, M.; Zhang, Y.; Yan, W.; Wang, M.

    2017-01-01

    The Circular Electron Positron Collider (CEPC) proposed by the Chinese high energy physics community is aiming to measure Higgs particles and their interactions precisely. The tracking detector including Silicon Inner Tracker (SIT) and Forward Tracking Disks (FTD) has driven stringent requirements on sensor technologies in term of spatial resolution, power consumption and readout speed. CMOS Pixel Sensor (CPS) is a promising candidate to approach these requirements. This paper presents the preliminary studies on the sensor optimization for tracking detector to achieve high collection efficiency while keeping necessary spatial resolution. Detailed studies have been performed on the charge collection using a 0.18 μm CMOS image sensor process. This process allows high resistivity epitaxial layer, leading to a significant improvement on the charge collection and therefore improving the radiation tolerance. Together with the simulation results, the first exploratory prototype has bee designed and fabricated. The prototype includes 9 different pixel arrays, which vary in terms of pixel pitch, diode size and geometry. The total area of the prototype amounts to 2 × 7.88 mm2.

  18. Degradation of CMOS image sensors in deep-submicron technology due to γ-irradiation

    NASA Astrophysics Data System (ADS)

    Rao, Padmakumar R.; Wang, Xinyang; Theuwissen, Albert J. P.

    2008-09-01

    In this work, radiation induced damage mechanisms in deep submicron technology is resolved using finger gated-diodes (FGDs) as a radiation sensitive tool. It is found that these structures are simple yet efficient structures to resolve radiation induced damage in advanced CMOS processes. The degradation of the CMOS image sensors in deep-submicron technology due to γ-ray irradiation is studied by developing a model for the spectral response of the sensor and also by the dark-signal degradation as a function of STI (shallow-trench isolation) parameters. It is found that threshold shifts in the gate-oxide/silicon interface as well as minority carrier life-time variations in the silicon bulk are minimal. The top-layer material properties and the photodiode Si-SiO2 interface quality are degraded due to γ-ray irradiation. Results further suggest that p-well passivated structures are inevitable for radiation-hard designs. It was found that high electrical fields in submicron technologies pose a threat to high quality imaging in harsh environments.

  19. Review of CMOS Integrated Circuit Technologies for High-Speed Photo-Detection

    PubMed Central

    Jeong, Gyu-Seob

    2017-01-01

    The bandwidth requirement of wireline communications has increased exponentially because of the ever-increasing demand for data centers and high-performance computing systems. However, it becomes difficult to satisfy the requirement with legacy electrical links which suffer from frequency-dependent losses due to skin effects, dielectric losses, channel reflections, and crosstalk, resulting in a severe bandwidth limitation. In order to overcome this challenge, it is necessary to introduce optical communication technology, which has been mainly used for long-reach communications, such as long-haul networks and metropolitan area networks, to the medium- and short-reach communication systems. However, there still remain important issues to be resolved to facilitate the adoption of the optical technologies. The most critical challenges are the energy efficiency and the cost competitiveness as compared to the legacy copper-based electrical communications. One possible solution is silicon photonics which has long been investigated by a number of research groups. Despite inherent incompatibility of silicon with the photonic world, silicon photonics is promising and is the only solution that can leverage the mature complementary metal-oxide-semiconductor (CMOS) technologies. Silicon photonics can be utilized in not only wireline communications but also countless sensor applications. This paper introduces a brief review of silicon photonics first and subsequently describes the history, overview, and categorization of the CMOS IC technology for high-speed photo-detection without enumerating the complex circuital expressions and terminologies. PMID:28841154

  20. Review of CMOS Integrated Circuit Technologies for High-Speed Photo-Detection.

    PubMed

    Jeong, Gyu-Seob; Bae, Woorham; Jeong, Deog-Kyoon

    2017-08-25

    The bandwidth requirement of wireline communications has increased exponentially because of the ever-increasing demand for data centers and high-performance computing systems. However, it becomes difficult to satisfy the requirement with legacy electrical links which suffer from frequency-dependent losses due to skin effects, dielectric losses, channel reflections, and crosstalk, resulting in a severe bandwidth limitation. In order to overcome this challenge, it is necessary to introduce optical communication technology, which has been mainly used for long-reach communications, such as long-haul networks and metropolitan area networks, to the medium- and short-reach communication systems. However, there still remain important issues to be resolved to facilitate the adoption of the optical technologies. The most critical challenges are the energy efficiency and the cost competitiveness as compared to the legacy copper-based electrical communications. One possible solution is silicon photonics which has long been investigated by a number of research groups. Despite inherent incompatibility of silicon with the photonic world, silicon photonics is promising and is the only solution that can leverage the mature complementary metal-oxide-semiconductor (CMOS) technologies. Silicon photonics can be utilized in not only wireline communications but also countless sensor applications. This paper introduces a brief review of silicon photonics first and subsequently describes the history, overview, and categorization of the CMOS IC technology for high-speed photo-detection without enumerating the complex circuital expressions and terminologies.

  1. Challenges of nickel silicidation in CMOS technologies

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Breil, Nicolas; Lavoie, Christian; Ozcan, Ahmet

    2015-04-01

    In our paper, we review some of the key challenges associated with the Ni silicidation process in the most recent CMOS technologies. The introduction of new materials (e.g.SiGe), and of non-planar architectures bring some important changes that require fundamental investigation from a material engineering perspective. Following a discussion of the device architecture and silicide evolution through the last CMOS generations, we focus our study on a very peculiar defect, termed NiSi-Fangs. We describe a mechanism for the defect formation, and present a detailed material analysis that supports this mechanism. We highlight some of the possible metal enrichment processes of themore » nickel monosilicide such as oxidation or various RIE (Reactive Ion Etching) plasma process, leading to a metal source available for defect formation. Furthermore, we investigate the NiSi formation and re-formation silicidation differences between Si and SiGe materials, and between (1 0 0) and (1 1 1) orientations. Finally, we show that the thermal budgets post silicidation can lead to the formation of NiSi-Fangs if the structure and the processes are not optimized. Beyond the understanding of the defect and the discussion on the engineering solutions used to prevent its formation, the interest of this investigation also lies in the fundamental learning within the Ni–Pt–Si–Ge system and some additional perspective on Ni-based contacts to advanced microelectronic devices.« less

  2. CMOS Enabled Microfluidic Systems for Healthcare Based Applications.

    PubMed

    Khan, Sherjeel M; Gumus, Abdurrahman; Nassar, Joanna M; Hussain, Muhammad M

    2018-04-01

    With the increased global population, it is more important than ever to expand accessibility to affordable personalized healthcare. In this context, a seamless integration of microfluidic technology for bioanalysis and drug delivery and complementary metal oxide semiconductor (CMOS) technology enabled data-management circuitry is critical. Therefore, here, the fundamentals, integration aspects, and applications of CMOS-enabled microfluidic systems for affordable personalized healthcare systems are presented. Critical components, like sensors, actuators, and their fabrication and packaging, are discussed and reviewed in detail. With the emergence of the Internet-of-Things and the upcoming Internet-of-Everything for a people-process-data-device connected world, now is the time to take CMOS-enabled microfluidics technology to as many people as possible. There is enormous potential for microfluidic technologies in affordable healthcare for everyone, and CMOS technology will play a major role in making that happen. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  3. Ultralow-Loss CMOS Copper Plasmonic Waveguides.

    PubMed

    Fedyanin, Dmitry Yu; Yakubovsky, Dmitry I; Kirtaev, Roman V; Volkov, Valentyn S

    2016-01-13

    Surface plasmon polaritons can give a unique opportunity to manipulate light at a scale well below the diffraction limit reducing the size of optical components down to that of nanoelectronic circuits. At the same time, plasmonics is mostly based on noble metals, which are not compatible with microelectronics manufacturing technologies. This prevents plasmonic components from integration with both silicon photonics and silicon microelectronics. Here, we demonstrate ultralow-loss copper plasmonic waveguides fabricated in a simple complementary metal-oxide semiconductor (CMOS) compatible process, which can outperform gold plasmonic waveguides simultaneously providing long (>40 μm) propagation length and deep subwavelength (∼λ(2)/50, where λ is the free-space wavelength) mode confinement in the telecommunication spectral range. These results create the backbone for the development of a CMOS plasmonic platform and its integration in future electronic chips.

  4. Nano-Tubular Cellulose for Bioprocess Technology Development

    PubMed Central

    Koutinas, Athanasios A.; Sypsas, Vasilios; Kandylis, Panagiotis; Michelis, Andreas; Bekatorou, Argyro; Kourkoutas, Yiannis; Kordulis, Christos; Lycourghiotis, Alexis; Banat, Ibrahim M.; Nigam, Poonam; Marchant, Roger; Giannouli, Myrsini; Yianoulis, Panagiotis

    2012-01-01

    Delignified cellulosic material has shown a significant promotional effect on the alcoholic fermentation as yeast immobilization support. However, its potential for further biotechnological development is unexploited. This study reports the characterization of this tubular/porous cellulosic material, which was done by SEM, porosimetry and X-ray powder diffractometry. The results showed that the structure of nano-tubular cellulose (NC) justifies its suitability for use in “cold pasteurization” processes and its promoting activity in bioprocessing (fermentation). The last was explained by a glucose pump theory. Also, it was demonstrated that crystallization of viscous invert sugar solutions during freeze drying could not be otherwise achieved unless NC was present. This effect as well as the feasibility of extremely low temperature fermentation are due to reduction of the activation energy, and have facilitated the development of technologies such as wine fermentations at home scale (in a domestic refrigerator). Moreover, NC may lead to new perspectives in research such as the development of new composites, templates for cylindrical nano-particles, etc. PMID:22496794

  5. Charge pump-based MOSFET-only 1.5-bit pipelined ADC stage in digital CMOS technology

    NASA Astrophysics Data System (ADS)

    Singh, Anil; Agarwal, Alpana

    2016-10-01

    A simple low-power and low-area metal-oxide-semiconductor field-effect transistor-only fully differential 1.5-bit pipelined analog-to-digital converter stage is proposed and designed in Taiwan Semiconductor Manufacturing Company 0.18 μm-technology using BSIM3v3 parameters with supply voltage of 1.8 V in inexpensive digital complementary metal-oxide semiconductor (CMOS) technology. It is based on charge pump technique to achieve the desired voltage gain of 2, independent of capacitor mismatch and avoiding the need of power hungry operational amplifier-based architecture to reduce the power, Si area and cost. Various capacitances are implemented by metal-oxide semiconductor capacitors, offering compatibility with cheaper digital CMOS process in order to reduce the much required manufacturing cost.

  6. The evolution of telemedicine and nano-technology

    NASA Astrophysics Data System (ADS)

    Park, Dong Kyun; Young Jung, Eun; Chan Moon, Byung

    2012-10-01

    This paper will cover definition and history of telemedicine, changes in medical paradigm and roll of telemedicine and roll of nano-technology for evolution of telemedicine. Hypothetically, telemedicine is distance communication for medical purpose and modern definition explains telemedicine as `a system of health care delivery in which physicians examine distant patients through the use of telecommunications technology. Medical service will change to personalized medicine based on gene information to prevent and manage diseases due to decrease of acute diseases, population aging and increase of prevalence in chronic diseases, which means current medical services based on manualized treatment for diseases will change to personalized medicine based on individual gene information. Also, international healthcare will be activated to provide high quality medical services with low cost using developed transportation. Moreover, hospital centered medical services will change to patients centered medical service due to increase of patient's rights. Development in sensor technology is required for telemedicine to be applied as basic infrastructure for medical services. Various researches in nano-biosensor field are conducted due to introduction of new technologies. However, most researches are in fundamental levels that requires more researches for stability and clinical usefulness. Nano technology is expected to achieve innovative development and define new criteria for disease prevention and management.

  7. Sensing of single electrons using micro and nano technologies: a review

    NASA Astrophysics Data System (ADS)

    Jalil, Jubayer; Zhu, Yong; Ekanayake, Chandima; Ruan, Yong

    2017-04-01

    During the last three decades, the remarkable dynamic features of microelectromechanical systems (MEMS) and nanoelectromechanical systems (NEMS), and advances in solid-state electronics hold much potential for the fabrication of extremely sensitive charge sensors. These sensors have a broad range of applications, such as those involving the measurement of ionization radiation, detection of bio-analyte and aerosol particles, mass spectrometry, scanning tunneling microscopy, and quantum computation. Designing charge sensors (also known as charge electrometers) for electrometry is deemed significant because of the sensitivity and resolution issues in the range of micro- and nano-scales. This article reviews the development of state-of-the-art micro- and nano-charge sensors, and discusses their technological challenges for practical implementation.

  8. Advances in nano-scaled biosensors for biomedical applications.

    PubMed

    Wang, Jianling; Chen, Guihua; Jiang, Hui; Li, Zhiyong; Wang, Xuemei

    2013-08-21

    Recently, a growing amount of attention has been focused on the utility of biosensors for biomedical applications. Combined with nanomaterials and nanostructures, nano-scaled biosensors are installed for biomedical applications, such as pathogenic bacteria monitoring, virus recognition, disease biomarker detection, among others. These nano-biosensors offer a number of advantages and in many respects are ideally suited to biomedical applications, which could be made as extremely flexible devices, allowing biomedical analysis with speediness, excellent selectivity and high sensitivity. This minireview discusses the literature published in the latest years on the advances in biomedical applications of nano-scaled biosensors for disease bio-marking and detection, especially in bio-imaging and the diagnosis of pathological cells and viruses, monitoring pathogenic bacteria, thus providing insight into the future prospects of biosensors in relevant clinical applications.

  9. MD Simulation on Collision Behavior Between Nano-Scale TiO₂ Particles During Vacuum Cold Spraying.

    PubMed

    Yao, Hai-Long; Yang, Guan-Jun; Li, Chang-Jiu

    2018-04-01

    Particle collision behavior influences significantly inter-nano particle bonding formation during the nano-ceramic coating deposition by vacuum cold spraying (or aerosol deposition method). In order to illuminate the collision behavior between nano-scale ceramic particles, molecular dynamic simulation was applied to explore impact process between nano-scale TiO2 particles through controlling impact velocities. Results show that the recoil efficiency of the nano-scale TiO2 particle is decreased with the increase of the impact velocity. Nano-scale TiO2 particle exhibits localized plastic deformation during collision at low velocities, while it is intensively deformed by collision at high velocities. This intensive deformation promotes the nano-particle adhesion rather than rebounding off. A relationship between the adhesion energy and the rebound energy is established for the bonding formation of the nano-scale TiO2 particle. The adhesion energy required to the bonding formation between nano-scale ceramic particles can be produced by high velocity collision.

  10. The challenge of sCMOS image sensor technology to EMCCD

    NASA Astrophysics Data System (ADS)

    Chang, Weijing; Dai, Fang; Na, Qiyue

    2018-02-01

    In the field of low illumination image sensor, the noise of the latest scientific-grade CMOS image sensor is close to EMCCD, and the industry thinks it has the potential to compete and even replace EMCCD. Therefore we selected several typical sCMOS and EMCCD image sensors and cameras to compare their performance parameters. The results show that the signal-to-noise ratio of sCMOS is close to EMCCD, and the other parameters are superior. But signal-to-noise ratio is very important for low illumination imaging, and the actual imaging results of sCMOS is not ideal. EMCCD is still the first choice in the high-performance application field.

  11. Ionizing doses and displacement damage testing of COTS CMOS imagers

    NASA Astrophysics Data System (ADS)

    Bernard, Frédéric; Petit, Sophie; Courtade, Sophie

    2017-11-01

    CMOS sensors begin to be a credible alternative to CCD sensors in some space missions. However, technology evolution of CMOS sensors is much faster than CCD one's. So a continuous technology evaluation is needed for CMOS imagers. Many of commercial COTS (Components Off The Shelf) CMOS sensors use organic filters, micro-lenses and non rad-hard technologies. An evaluation of the possibilities offered by such technologies is interesting before any custom development. This can be obtained by testing commercial COTS imagers. This article will present electro-optical performances evolution of off the shelves CMOS imagers after Ionizing Doses until 50kRad(Si) and Displacement Damage environment tests (until 1011 p/cm2 at 50 MeV). Dark current level and non uniformity evolutions are compared and discussed. Relative spectral response measurement and associated evolution with irradiation will also be presented and discussed. Tests have been performed on CNES detection benches.

  12. A 1.8 GHz Voltage-Controlled Oscillator using CMOS Technology

    NASA Astrophysics Data System (ADS)

    Maisurah, M. H. Siti; Emran, F. Nazif; Norman Fadhil, Idham M.; Rahim, A. I. Abdul; Razman, Y. Mohamed

    2011-05-01

    A Voltage-Controlled Oscillator (VCO) for 1.8 GHz application has been designed using a combination of both 0.13 μm and 0.35 μm CMOS technology. The VCO has a large tuning range, which is from 1.39 GHz to 1.91 GHz, using a control voltage from 0 to 3V. The VCO exhibits a low phase-noise at 1.8 GHz which is around -119.8dBc/Hz at a frequency offset of 1 MHz.

  13. The operation of 0.35 μm partially depleted SOI CMOS technology in extreme environments

    NASA Astrophysics Data System (ADS)

    Li, Ying; Niu, Guofu; Cressler, John D.; Patel, Jagdish; Liu, S. T.; Reed, Robert A.; Mojarradi, Mohammad M.; Blalock, Benjamin J.

    2003-06-01

    We evaluate the usefulness of partially depleted SOI CMOS devices fabricated in a 0.35 μm technology on UNIBOND material for electronics applications requiring robust operation under extreme environment conditions consisting of low and/or high temperature, and under substantial radiation exposure. The threshold voltage, effective mobility, and the impact ionization parameters were determined across temperature for both the nFETs and the pFETs. The radiation response was characterized using threshold voltage shifts of both the front-gate and back-gate transistors. These results suggest that this 0.35 μm partially depleted SOI CMOS technology is suitable for operation across a wide range of extreme environment conditions consisting of: cryogenic temperatures down to 86 K, elevated temperatures up to 573 K, and under radiation exposure to 1.3 Mrad(Si) total dose.

  14. Portable design rules for bulk CMOS

    NASA Technical Reports Server (NTRS)

    Griswold, T. W.

    1982-01-01

    It is pointed out that for the past several years, one school of IC designers has used a simplified set of nMOS geometric design rules (GDR) which is 'portable', in that it can be used by many different nMOS manufacturers. The present investigation is concerned with a preliminary set of design rules for bulk CMOS which has been verified for simple test structures. The GDR are defined in terms of Caltech Intermediate Form (CIF), which is a geometry-description language that defines simple geometrical objects in layers. The layers are abstractions of physical mask layers. The design rules do not presume the existence of any particular design methodology. Attention is given to p-well and n-well CMOS processes, bulk CMOS and CMOS-SOS, CMOS geometric rules, and a description of the advantages of CMOS technology.

  15. Graphene/Si CMOS hybrid hall integrated circuits.

    PubMed

    Huang, Le; Xu, Huilong; Zhang, Zhiyong; Chen, Chengying; Jiang, Jianhua; Ma, Xiaomeng; Chen, Bingyan; Li, Zishen; Zhong, Hua; Peng, Lian-Mao

    2014-07-07

    Graphene/silicon CMOS hybrid integrated circuits (ICs) should provide powerful functions which combines the ultra-high carrier mobility of graphene and the sophisticated functions of silicon CMOS ICs. But it is difficult to integrate these two kinds of heterogeneous devices on a single chip. In this work a low temperature process is developed for integrating graphene devices onto silicon CMOS ICs for the first time, and a high performance graphene/CMOS hybrid Hall IC is demonstrated. Signal amplifying/process ICs are manufactured via commercial 0.18 um silicon CMOS technology, and graphene Hall elements (GHEs) are fabricated on top of the passivation layer of the CMOS chip via a low-temperature micro-fabrication process. The sensitivity of the GHE on CMOS chip is further improved by integrating the GHE with the CMOS amplifier on the Si chip. This work not only paves the way to fabricate graphene/Si CMOS Hall ICs with much higher performance than that of conventional Hall ICs, but also provides a general method for scalable integration of graphene devices with silicon CMOS ICs via a low-temperature process.

  16. Plasmonic Nanostructures for Nano-Scale Bio-Sensing

    PubMed Central

    Chung, Taerin; Lee, Seung-Yeol; Song, Eui Young; Chun, Honggu; Lee, Byoungho

    2011-01-01

    The optical properties of various nanostructures have been widely adopted for biological detection, from DNA sequencing to nano-scale single molecule biological function measurements. In particular, by employing localized surface plasmon resonance (LSPR), we can expect distinguished sensing performance with high sensitivity and resolution. This indicates that nano-scale detections can be realized by using the shift of resonance wavelength of LSPR in response to the refractive index change. In this paper, we overview various plasmonic nanostructures as potential sensing components. The qualitative descriptions of plasmonic nanostructures are supported by the physical phenomena such as plasmonic hybridization and Fano resonance. We present guidelines for designing specific nanostructures with regard to wavelength range and target sensing materials. PMID:22346679

  17. Method of producing carbon coated nano- and micron-scale particles

    DOEpatents

    Perry, W. Lee; Weigle, John C; Phillips, Jonathan

    2013-12-17

    A method of making carbon-coated nano- or micron-scale particles comprising entraining particles in an aerosol gas, providing a carbon-containing gas, providing a plasma gas, mixing the aerosol gas, the carbon-containing gas, and the plasma gas proximate a torch, bombarding the mixed gases with microwaves, and collecting resulting carbon-coated nano- or micron-scale particles.

  18. CMOS Cell Sensors for Point-of-Care Diagnostics

    PubMed Central

    Adiguzel, Yekbun; Kulah, Haluk

    2012-01-01

    The burden of health-care related services in a global era with continuously increasing population and inefficient dissipation of the resources requires effective solutions. From this perspective, point-of-care diagnostics is a demanded field in clinics. It is also necessary both for prompt diagnosis and for providing health services evenly throughout the population, including the rural districts. The requirements can only be fulfilled by technologies whose productivity has already been proven, such as complementary metal-oxide-semiconductors (CMOS). CMOS-based products can enable clinical tests in a fast, simple, safe, and reliable manner, with improved sensitivities. Portability due to diminished sensor dimensions and compactness of the test set-ups, along with low sample and power consumption, is another vital feature. CMOS-based sensors for cell studies have the potential to become essential counterparts of point-of-care diagnostics technologies. Hence, this review attempts to inform on the sensors fabricated with CMOS technology for point-of-care diagnostic studies, with a focus on CMOS image sensors and capacitance sensors for cell studies. PMID:23112587

  19. CMOS cell sensors for point-of-care diagnostics.

    PubMed

    Adiguzel, Yekbun; Kulah, Haluk

    2012-01-01

    The burden of health-care related services in a global era with continuously increasing population and inefficient dissipation of the resources requires effective solutions. From this perspective, point-of-care diagnostics is a demanded field in clinics. It is also necessary both for prompt diagnosis and for providing health services evenly throughout the population, including the rural districts. The requirements can only be fulfilled by technologies whose productivity has already been proven, such as complementary metal-oxide-semiconductors (CMOS). CMOS-based products can enable clinical tests in a fast, simple, safe, and reliable manner, with improved sensitivities. Portability due to diminished sensor dimensions and compactness of the test set-ups, along with low sample and power consumption, is another vital feature. CMOS-based sensors for cell studies have the potential to become essential counterparts of point-of-care diagnostics technologies. Hence, this review attempts to inform on the sensors fabricated with CMOS technology for point-of-care diagnostic studies, with a focus on CMOS image sensors and capacitance sensors for cell studies.

  20. A nano-scale mirror-like surface of Ti-6Al-4V attained by chemical mechanical polishing

    NASA Astrophysics Data System (ADS)

    Chenliang, Liang; Weili, Liu; Shasha, Li; Hui, Kong; Zefang, Zhang; Zhitang, Song

    2016-05-01

    Metal Ti and its alloys have been widely utilized in the fields of aviation, medical science, and micro-electro-mechanical systems, for its excellent specific strength, resistance to corrosion, and biological compatibility. As the application of Ti moves to the micro or nano scale, however, traditional methods of planarization have shown their short slabs. Thus, we introduce the method of chemical mechanical polishing (CMP) to provide a new way for the nano-scale planarization method of Ti alloys. We obtain a mirror-like surface, whose flatness is of nano-scale, via the CMP method. We test the basic mechanical behavior of Ti-6Al-4V (Ti64) in the CMP process, and optimize the composition of CMP slurry. Furthermore, the possible reactions that may take place in the CMP process have been studied by electrochemical methods combined with x-ray photoelectron spectroscopy (XPS). An equivalent circuit has been built to interpret the dynamic of oxidation. Finally, a model has been established to explain the synergy of chemical and mechanical effects in the CMP of Ti-6Al-4V. Project supported by the National Major Scientific and Technological Special Project during the Twelfth Five-year Plan Period of China (Grant No. 2009ZX02030-1), the National Natural Science Foundation of China (Grant No. 51205387), the Support by Science and Technology Commission of Shanghai City, China (Grant No. 11nm0500300), and the Science and Technology Commission of Shanghai City, China (Grant No. 14XD1425300).

  1. An RF Energy Harvester System Using UHF Micropower CMOS Rectifier Based on a Diode Connected CMOS Transistor

    PubMed Central

    Shokrani, Mohammad Reza; Hamidon, Mohd Nizar B.; Rokhani, Fakhrul Zaman; Shafie, Suhaidi Bin

    2014-01-01

    This paper presents a new type diode connected MOS transistor to improve CMOS conventional rectifier's performance in RF energy harvester systems for wireless sensor networks in which the circuits are designed in 0.18 μm TSMC CMOS technology. The proposed diode connected MOS transistor uses a new bulk connection which leads to reduction in the threshold voltage and leakage current; therefore, it contributes to increment of the rectifier's output voltage, output current, and efficiency when it is well important in the conventional CMOS rectifiers. The design technique for the rectifiers is explained and a matching network has been proposed to increase the sensitivity of the proposed rectifier. Five-stage rectifier with a matching network is proposed based on the optimization. The simulation results shows 18.2% improvement in the efficiency of the rectifier circuit and increase in sensitivity of RF energy harvester circuit. All circuits are designed in 0.18 μm TSMC CMOS technology. PMID:24782680

  2. An RF energy harvester system using UHF micropower CMOS rectifier based on a diode connected CMOS transistor.

    PubMed

    Shokrani, Mohammad Reza; Khoddam, Mojtaba; Hamidon, Mohd Nizar B; Kamsani, Noor Ain; Rokhani, Fakhrul Zaman; Shafie, Suhaidi Bin

    2014-01-01

    This paper presents a new type diode connected MOS transistor to improve CMOS conventional rectifier's performance in RF energy harvester systems for wireless sensor networks in which the circuits are designed in 0.18  μm TSMC CMOS technology. The proposed diode connected MOS transistor uses a new bulk connection which leads to reduction in the threshold voltage and leakage current; therefore, it contributes to increment of the rectifier's output voltage, output current, and efficiency when it is well important in the conventional CMOS rectifiers. The design technique for the rectifiers is explained and a matching network has been proposed to increase the sensitivity of the proposed rectifier. Five-stage rectifier with a matching network is proposed based on the optimization. The simulation results shows 18.2% improvement in the efficiency of the rectifier circuit and increase in sensitivity of RF energy harvester circuit. All circuits are designed in 0.18 μm TSMC CMOS technology.

  3. Micro- and nano-technologies to probe the mechano-biology of the brain.

    PubMed

    Tay, Andy; Schweizer, Felix E; Di Carlo, Dino

    2016-05-24

    Biomechanical forces have been demonstrated to influence a plethora of neuronal functions across scales including gene expression, mechano-sensitive ion channels, neurite outgrowth and folding of the cortices in the brain. However, the detailed roles biomechanical forces may play in brain development and disorders has seen limited study, partly due to a lack of effective methods to probe the mechano-biology of the brain. Current techniques to apply biomechanical forces on neurons often suffer from low throughput and poor spatiotemporal resolution. On the other hand, newly developed micro- and nano-technologies can overcome these aforementioned limitations and offer advantages such as lower cost and possibility of non-invasive control of neuronal circuits. This review compares the range of conventional, micro- and nano-technological techniques that have been developed and how they have been or can be used to understand the effect of biomechanical forces on neuronal development and homeostasis.

  4. A CMOS micromachined capacitive tactile sensor with integrated readout circuits and compensation of process variations.

    PubMed

    Tsai, Tsung-Heng; Tsai, Hao-Cheng; Wu, Tien-Keng

    2014-10-01

    This paper presents a capacitive tactile sensor fabricated in a standard CMOS process. Both of the sensor and readout circuits are integrated on a single chip by a TSMC 0.35 μm CMOS MEMS technology. In order to improve the sensitivity, a T-shaped protrusion is proposed and implemented. This sensor comprises the metal layer and the dielectric layer without extra thin film deposition, and can be completed with few post-processing steps. By a nano-indenter, the measured spring constant of the T-shaped structure is 2.19 kNewton/m. Fully differential correlated double sampling capacitor-to-voltage converter (CDS-CVC) and reference capacitor correction are utilized to compensate process variations and improve the accuracy of the readout circuits. The measured displacement-to-voltage transductance is 7.15 mV/nm, and the sensitivity is 3.26 mV/μNewton. The overall power dissipation is 132.8 μW.

  5. Graphene/Si CMOS Hybrid Hall Integrated Circuits

    PubMed Central

    Huang, Le; Xu, Huilong; Zhang, Zhiyong; Chen, Chengying; Jiang, Jianhua; Ma, Xiaomeng; Chen, Bingyan; Li, Zishen; Zhong, Hua; Peng, Lian-Mao

    2014-01-01

    Graphene/silicon CMOS hybrid integrated circuits (ICs) should provide powerful functions which combines the ultra-high carrier mobility of graphene and the sophisticated functions of silicon CMOS ICs. But it is difficult to integrate these two kinds of heterogeneous devices on a single chip. In this work a low temperature process is developed for integrating graphene devices onto silicon CMOS ICs for the first time, and a high performance graphene/CMOS hybrid Hall IC is demonstrated. Signal amplifying/process ICs are manufactured via commercial 0.18 um silicon CMOS technology, and graphene Hall elements (GHEs) are fabricated on top of the passivation layer of the CMOS chip via a low-temperature micro-fabrication process. The sensitivity of the GHE on CMOS chip is further improved by integrating the GHE with the CMOS amplifier on the Si chip. This work not only paves the way to fabricate graphene/Si CMOS Hall ICs with much higher performance than that of conventional Hall ICs, but also provides a general method for scalable integration of graphene devices with silicon CMOS ICs via a low-temperature process. PMID:24998222

  6. An 80x80 microbolometer type thermal imaging sensor using the LWIR-band CMOS infrared (CIR) technology

    NASA Astrophysics Data System (ADS)

    Tankut, Firat; Cologlu, Mustafa H.; Askar, Hidir; Ozturk, Hande; Dumanli, Hilal K.; Oruc, Feyza; Tilkioglu, Bilge; Ugur, Beril; Akar, Orhan Sevket; Tepegoz, Murat; Akin, Tayfun

    2017-02-01

    This paper introduces an 80x80 microbolometer array with a 35 μm pixel pitch operating in the 8-12 μm wavelength range, where the detector is fabricated with the LWIR-band CMOS infrared technology, shortly named as CIR, which is a novel microbolometer implementation technique developed to reduce the detector cost in order to enable the use of microbolometer type sensors in high volume markets, such as the consumer market and IoT. Unlike the widely used conventional surface micromachined microbolometer approaches, MikroSens' CIR detector technology does not require the use of special high TCR materials like VOx or a-Si, instead, it allows to implement microbolometers with standard CMOS layers, where the suspended bulk micromachined structure is obtained by only few consecutive selective MEMS etching steps while protecting the wirebond pads with a simple lithograpy step. This approach not only reduces the fabrication cost but also increases the production yield. In addition, needing simple subtractive post-CMOS fabrication steps allows the CIR technology to be carried out in any CMOS and MEMS foundry in a truly fabless fashion, where industrially mature and Au-free wafer level vacuum packaging technologies can also be carried out, leading to cost advantage, simplicity, scalability, and flexibility. The CIR approach is used to implement an 80x80 FPA with 35 μm pixel pitch, namely MS0835A, using a 0.18 μm CMOS process. The fabricated sensor is measured to provide NETD (Noise Equivalent Temperature Difference) value of 163 mK at 17 fps (frames per second) and 71 mK at 4 fps with F/1.0 optics in a dewar environment. The measurement results of the wafer level vacuum packaged sensors with one side AR coating shows an NETD values of 112 mK at 4 fps with F/1.1 optics, i.e., demonstrates a good performance for high volume low-cost applications like advanced presence detection and human counting applications. The CIR approach of MikroSens is scalable and can be used to

  7. Performance assessment and optimization of an irreversible nano-scale Stirling engine cycle operating with Maxwell-Boltzmann gas

    NASA Astrophysics Data System (ADS)

    Ahmadi, Mohammad H.; Ahmadi, Mohammad-Ali; Pourfayaz, Fathollah

    2015-09-01

    Developing new technologies like nano-technology improves the performance of the energy industries. Consequently, emerging new groups of thermal cycles in nano-scale can revolutionize the energy systems' future. This paper presents a thermo-dynamical study of a nano-scale irreversible Stirling engine cycle with the aim of optimizing the performance of the Stirling engine cycle. In the Stirling engine cycle the working fluid is an Ideal Maxwell-Boltzmann gas. Moreover, two different strategies are proposed for a multi-objective optimization issue, and the outcomes of each strategy are evaluated separately. The first strategy is proposed to maximize the ecological coefficient of performance (ECOP), the dimensionless ecological function (ecf) and the dimensionless thermo-economic objective function ( F . Furthermore, the second strategy is suggested to maximize the thermal efficiency ( η), the dimensionless ecological function (ecf) and the dimensionless thermo-economic objective function ( F). All the strategies in the present work are executed via a multi-objective evolutionary algorithms based on NSGA∥ method. Finally, to achieve the final answer in each strategy, three well-known decision makers are executed. Lastly, deviations of the outcomes gained in each strategy and each decision maker are evaluated separately.

  8. [Response surface method optimize of nano-silica solid dispersion technology assistant enzymatic hydrolysis preparation genistein].

    PubMed

    Jin, Xin; Zhang, Zhen-Hai; Zhu, Jing; Sun, E; Yu, Dan-Hong; Chen, Xiao-Yun; Liu, Qi-Yuan; Ning, Qing; Jia, Xiao-Bin

    2012-04-01

    This article reports that nano-silica solid dispersion technology was used to raise genistein efficiency through increasing the enzymatic hydrolysis rate. Firstly, genistin-nano-silica solid dispersion was prepared by solvent method. And differential scanning calorimetry (DSC) and transmission electron microscopy (TEM) were used to verify the formation of solid dispersion, then enzymatic hydrolysis of solid dispersion was done by snailase to get genistein. With the conversion of genistein as criteria, single factor experiments were used to study the different factors affecting enzymatic hydrolysis of genistin and its solid dispersion. And then, response surface method was used to optimize of nano-silica solid dispersion technology assistant enzymatic hydrolysis. The optimum condition to get genistein through enzymatic hydrolysis of genistin-nano-silica solid dispersion was pH 7.1, temperature 52.2 degrees C, enzyme concentration 5.0 mg x mL(-1) and reaction time 7 h. Under this condition, the conversion of genistein was (93.47 +/- 2.40)%. Comparing with that without forming the genistin-nano-silica solid dispersion, the conversion increased 2.62 fold. At the same time, the product of hydrolysis was purified to get pure genistein. The method of enzymatic hydrolysis of genistin-nano-silica solid dispersion by snailase to obtain genistein is simple, efficiency and suitable for the modern scale production.

  9. CMOS image sensors: State-of-the-art

    NASA Astrophysics Data System (ADS)

    Theuwissen, Albert J. P.

    2008-09-01

    This paper gives an overview of the state-of-the-art of CMOS image sensors. The main focus is put on the shrinkage of the pixels : what is the effect on the performance characteristics of the imagers and on the various physical parameters of the camera ? How is the CMOS pixel architecture optimized to cope with the negative performance effects of the ever-shrinking pixel size ? On the other hand, the smaller dimensions in CMOS technology allow further integration on column level and even on pixel level. This will make CMOS imagers even smarter that they are already.

  10. Nano-Bio Quantum Technology for Device-Specific Materials

    NASA Technical Reports Server (NTRS)

    Choi, Sang H.

    2009-01-01

    The areas discussed are still under development: I. Nano structured materials for TE applications a) SiGe and Be.Te; b) Nano particles and nanoshells. II. Quantum technology for optical devices: a) Quantum apertures; b) Smart optical materials; c) Micro spectrometer. III. Bio-template oriented materials: a) Bionanobattery; b) Bio-fuel cells; c) Energetic materials.

  11. Advancing the Technology of Monolithic CMOS detectors for their use as X-ray Imaging Spectrometers

    NASA Astrophysics Data System (ADS)

    Kenter, Almus

    The Smithsonian Astrophysical Observatory (SAO) proposes a two year program to further advance the scientific capabilities of monolithic CMOS detectors for use as x-ray imaging spectrometers. This proposal will build upon the progress achieved with funding from a previous APRA proposal that ended in 2013. As part of that previous proposal, x- ray optimized, highly versatile, monolithic CMOS imaging detectors and technology were developed and tested. The performance and capabilities of these devices were then demonstrated, with an emphasis on the performance advantages these devices have over CCDs and other technologies. The developed SAO/SRI-Sarnoff CMOS devices incorporate: Low noise, high sensitivity ("gain") pixels; Highly parallel on-chip signal chains; Standard and very high resistivity (30,000Ohm-cm) Si; Back-Side thinning and passivation. SAO demonstrated the performance benefits of each of these features in these devices. This new proposal high-lights the performance of this previous generation of devices, and segues into new technology and capability. The high sensitivity ( 135uV/e) 6 Transistor (6T) Pinned Photo Diode (PPD) pixels provided a large charge to voltage conversion gain to the detect and resolve even small numbers of photo electrons produced by x-rays. The on-chip, parallel signal chain processed an entire row of pixels in the same time that a CCD requires to processes a single pixel. The resulting high speed operation ( 1000 times faster than CCD) provide temporal resolution while mitigating dark current and allowed room temperature operation. The high resistivity Si provided full (over) depletion for thicker devices which increased QE for higher energy x-rays. In this proposal, SAO will investigate existing NMOS and existing PMOS devices as xray imaging spectrometers. Conventional CMOS imagers are NMOS. NMOS devices collect and measure photo-electrons. In contrast, PMOS devices collect and measure photo-holes. PMOS devices have various

  12. 3D positioning scheme exploiting nano-scale IR-UWB orthogonal pulses.

    PubMed

    Kim, Nammoon; Kim, Youngok

    2011-10-04

    In these days, the development of positioning technology for realizing ubiquitous environments has become one of the most important issues. The Global Positioning System (GPS) is a well-known positioning scheme, but it is not suitable for positioning in in-door/building environments because it is difficult to maintain line-of-sight condition between satellites and a GPS receiver. To such problem, various positioning methods such as RFID, WLAN, ZigBee, and Bluetooth have been developed for indoor positioning scheme. However, the majority of positioning schemes are focused on the two-dimension positioning even though three-dimension (3D) positioning information is more useful especially in indoor applications, such as smart space, U-health service, context aware service, etc. In this paper, a 3D positioning system based on mutually orthogonal nano-scale impulse radio ultra-wideband (IR-UWB) signals and cross array antenna is proposed. The proposed scheme uses nano-scale IR-UWB signals providing fine time resolution and high-resolution multiple signal specification algorithm for the time-of-arrival and the angle-of-arrival estimation. The performance is evaluated over various IEEE 802.15.4a channel models, and simulation results show the effectiveness of proposed scheme.

  13. CMOS Image Sensors: Electronic Camera On A Chip

    NASA Technical Reports Server (NTRS)

    Fossum, E. R.

    1995-01-01

    Recent advancements in CMOS image sensor technology are reviewed, including both passive pixel sensors and active pixel sensors. On- chip analog to digital converters and on-chip timing and control circuits permit realization of an electronic camera-on-a-chip. Highly miniaturized imaging systems based on CMOS image sensor technology are emerging as a competitor to charge-coupled devices for low cost uses.

  14. Hollow Nanospheres Array Fabrication via Nano-Conglutination Technology.

    PubMed

    Zhang, Man; Deng, Qiling; Xia, Liangping; Shi, Lifang; Cao, Axiu; Pang, Hui; Hu, Song

    2015-09-01

    Hollow nanospheres array is a special nanostructure with great applications in photonics, electronics and biochemistry. The nanofabrication technique with high resolution is crucial to nanosciences and nano-technology. This paper presents a novel nonconventional nano-conglutination technology combining polystyrenes spheres (PSs) self-assembly, conglutination and a lift-off process to fabricate the hollow nanospheres array with nanoholes. A self-assembly monolayer of PSs was stuck off from the quartz wafer by the thiol-ene adhesive material, and then the PSs was removed via a lift-off process and the hollow nanospheres embedded into the thiol-ene substrate was obtained. Thiolene polymer is a UV-curable material via "click chemistry" reaction at ambient conditions without the oxygen inhibition, which has excellent chemical and physical properties to be attractive as the adhesive material in nano-conglutination technology. Using the technique, a hollow nanospheres array with the nanoholes at the diameter of 200 nm embedded into the rigid thiol-ene substrate was fabricated, which has great potential to serve as a reaction container, catalyst and surface enhanced Raman scattering substrate.

  15. Nano- and micro-scale Bi-substituted iron garnet films for photonics and magneto-optic eddy current defectoscopy

    NASA Astrophysics Data System (ADS)

    Berzhansky, V. N.; Karavainikov, A. V.; Mikhailova, T. V.; Prokopov, A. R.; Shaposhnikov, A. N.; Shumilov, A. G.; Lugovskoy, N. V.; Semuk, E. Yu.; Kharchenko, M. F.; Lukienko, I. M.; Kharchenko, Yu. M.; Belotelov, V. I.

    2017-10-01

    Synthesis technology of nano-scale Bi-substituted iron garnets films with high magneto-optic activity for photonics and plasmonics applications were proposed. The micro-scale single-crystal garnet films with different types of magnetic anisotropy as a magneto-optic sensors were synthesized. It was shown that easy-axis anisotropy films demonstrated the best results for visualization of redistribution eddy current magnetic field near defects.

  16. Monolithic optical link in silicon-on-insulator CMOS technology.

    PubMed

    Dutta, Satadal; Agarwal, Vishal; Hueting, Raymond J E; Schmitz, Jurriaan; Annema, Anne-Johan

    2017-03-06

    This work presents a monolithic laterally-coupled wide-spectrum (350 nm < λ < 1270 nm) optical link in a silicon-on-insulator CMOS technology. The link consists of a silicon (Si) light-emitting diode (LED) as the optical source and a Si photodiode (PD) as the detector; both realized by vertical abrupt n+p junctions, separated by a shallow trench isolation composed of silicon dioxide. Medium trench isolation around the devices along with the buried oxide layer provides galvanic isolation. Optical coupling in both avalanche-mode and forward-mode operation of the LED are analyzed for various designs and bias conditions. From both DC and pulsed transient measurements, it is further shown that heating in the avalanche-mode LED leads to a slow thermal coupling to the PD with time constants in the ms range. An integrated heat sink in the same technology leads to a ∼ 6 times reduction in the change in PD junction temperature per unit electrical power dissipated in the avalanche-mode LED. The analysis paves way for wide-spectrum optical links integrated in smart power technologies.

  17. The prospects of transition metal dichalcogenides for ultimately scaled CMOS

    NASA Astrophysics Data System (ADS)

    Thiele, S.; Kinberger, W.; Granzner, R.; Fiori, G.; Schwierz, F.

    2018-05-01

    MOSFET gate length scaling has been a main source of progress in digital electronics for decades. Today, researchers still spend considerable efforts on reducing the gate length and on developing ultimately scaled MOSFETs, thereby exploring both new device architectures and alternative channel materials beyond Silicon such as two-dimensional TMDs (transition metal dichalcogenide). On the other hand, the envisaged scaling scenario for the next 15 years has undergone a significant change recently. While the 2013 ITRS edition required a continuation of aggressive gate length scaling for at least another 15 years, the 2015 edition of the ITRS suggests a deceleration and eventually a levelling off of gate length scaling and puts more emphasis on alternative options such as pitch scaling to keep Moore's Law alive. In the present paper, future CMOS scaling is discussed in the light of emerging two-dimensional MOSFET channel, in particular two-dimensional TMDs. To this end, the scaling scenarios of the 2013 and 2015 ITRS editions are considered and the scaling potential of TMD MOSFETs is investigated by means of quantum-mechanical device simulations. It is shown that for ultimately scaled MOSFETs as required in the 2013 ITRS, the heavy carrier effective masses of the Mo- and W-based TMDs are beneficial for the suppression of direct source-drain tunneling, while to meet the significantly relaxed scaling targets of the 2016 ITRS heavy-effective-mass channels are not needed.

  18. CMOS-Compatible Room-Temperature Rectifier Toward Terahertz Radiation Detection

    NASA Astrophysics Data System (ADS)

    Varlamava, Volha; De Amicis, Giovanni; Del Monte, Andrea; Perticaroli, Stefano; Rao, Rosario; Palma, Fabrizio

    2016-08-01

    In this paper, we present a new rectifying device, compatible with the technology of CMOS image sensors, suitable for implementing a direct-conversion detector operating at room temperature for operation at up to terahertz frequencies. The rectifying device can be obtained by introducing some simple modifications of the charge-storage well in conventional CMOS integrated circuits, making the proposed solution easy to integrate with the existing imaging systems. The rectifying device is combined with the different elements of the detector, composed of a 3D high-performance antenna and a charge-storage well. In particular, its position just below the edge of the 3D antenna takes maximum advantage of the high electric field concentrated by the antenna itself. In addition, the proposed structure ensures the integrity of the charge-storage well of the detector. In the structure, it is not necessary to use very scaled and costly technological nodes, since the CMOS transistor only provides the necessary integrated readout electronics. On-wafer measurements of RF characteristics of the designed junction are reported and discussed. The overall performances of the entire detector in terms of noise equivalent power (NEP) are evaluated by combining low-frequency measurements of the rectifier with numerical simulations of the 3D antenna and the semiconductor structure at 1 THz, allowing prediction of the achievable NEP.

  19. Low energy CMOS for space applications

    NASA Technical Reports Server (NTRS)

    Panwar, Ramesh; Alkalaj, Leon

    1992-01-01

    The current focus of NASA's space flight programs reflects a new thrust towards smaller, less costly, and more frequent space missions, when compared to missions such as Galileo, Magellan, or Cassini. Recently, the concept of a microspacecraft was proposed. In this concept, a small, compact spacecraft that weighs tens of kilograms performs focused scientific objectives such as imaging. Similarly, a Mars Lander micro-rover project is under study that will allow miniature robots weighing less than seven kilograms to explore the Martian surface. To bring the microspacecraft and microrover ideas to fruition, one will have to leverage compact 3D multi-chip module-based multiprocessors (MCM) technologies. Low energy CMOS will become increasingly important because of the thermodynamic considerations in cooling compact 3D MCM implementations and also from considerations of the power budget for space applications. In this paper, we show how the operating voltage is related to the threshold voltage of the CMOS transistors for accomplishing a task in VLSI with minimal energy. We also derive expressions for the noise margins at the optimal operating point. We then look at a low voltage CMOS (LVCMOS) technology developed at Stanford University which improves the power consumption over conventional CMOS by a couple of orders of magnitude and consider the suitability of the technology for space applications by characterizing its SEU immunity.

  20. Affordable Wide-field Optical Space Surveillance using sCMOS and GPUs

    NASA Astrophysics Data System (ADS)

    Zimmer, P.; McGraw, J.; Ackermann, M.

    2016-09-01

    Recent improvements in sCMOS technology allow for affordable, wide-field, and rapid cadence surveillance from LEO to out past GEO using largely off-the-shelf hardware. sCMOS sensors, until very recently, suffered from several shortcomings when compared to CCD sensors - lower sensitivity, smaller physical size and less predictable noise characteristics. Sensors that overcome the first two of these are now available commercially and the principals at J.T. McGraw and Associates (JTMA) have developed observing strategies that minimize the impact of the third, while leveraging the key features of sCMOS, fast readout and low average readout noise. JTMA has integrated a new generation sCMOS sensor into an existing COTS telescope system in order to develop and test new detection techniques designed for uncued optical surveillance across a wide range of apparent object angular rates - from degree per second scale of LEO objects to a few arcseconds per second for objects out past GEO. One further complication arises from this: increased useful frame rate means increased data volume. Fortunately, GPU technology continues to advance at a breakneck pace and we report on the results and performance of our new detection techniques implemented on new generation GPUs. Early results show significance within 20% of the expected theoretical limiting signal-to-noise using commodity GPUs in near real time across a wide range of object parameters, closing the gap in detectivity between moving objects and tracked objects.

  1. Quantitative optical metrology with CMOS cameras

    NASA Astrophysics Data System (ADS)

    Furlong, Cosme; Kolenovic, Ervin; Ferguson, Curtis F.

    2004-08-01

    Recent advances in laser technology, optical sensing, and computer processing of data, have lead to the development of advanced quantitative optical metrology techniques for high accuracy measurements of absolute shapes and deformations of objects. These techniques provide noninvasive, remote, and full field of view information about the objects of interest. The information obtained relates to changes in shape and/or size of the objects, characterizes anomalies, and provides tools to enhance fabrication processes. Factors that influence selection and applicability of an optical technique include the required sensitivity, accuracy, and precision that are necessary for a particular application. In this paper, sensitivity, accuracy, and precision characteristics in quantitative optical metrology techniques, and specifically in optoelectronic holography (OEH) based on CMOS cameras, are discussed. Sensitivity, accuracy, and precision are investigated with the aid of National Institute of Standards and Technology (NIST) traceable gauges, demonstrating the applicability of CMOS cameras in quantitative optical metrology techniques. It is shown that the advanced nature of CMOS technology can be applied to challenging engineering applications, including the study of rapidly evolving phenomena occurring in MEMS and micromechatronics.

  2. Conditional Dispersive Readout of a CMOS Single-Electron Memory Cell

    NASA Astrophysics Data System (ADS)

    Schaal, S.; Barraud, S.; Morton, J. J. L.; Gonzalez-Zalba, M. F.

    2018-05-01

    Quantum computers require interfaces with classical electronics for efficient qubit control, measurement, and fast data processing. Fabricating the qubit and the classical control layer using the same technology is appealing because it will facilitate the integration process, improving feedback speeds and offering potential solutions to wiring and layout challenges. Integrating classical and quantum devices monolithically, using complementary metal-oxide-semiconductor (CMOS) processes, enables the processor to profit from the most mature industrial technology for the fabrication of large-scale circuits. We demonstrate a CMOS single-electron memory cell composed of a single quantum dot and a transistor that locks charge on the quantum-dot gate. The single-electron memory cell is conditionally read out by gate-based dispersive sensing using a lumped-element L C resonator. The control field-effect transistor (FET) and quantum dot are fabricated on the same chip using fully depleted silicon-on-insulator technology. We obtain a charge sensitivity of δ q =95 ×10-6e Hz-1 /2 when the quantum-dot readout is enabled by the control FET, comparable to results without the control FET. Additionally, we observe a single-electron retention time on the order of a second when storing a single-electron charge on the quantum dot at millikelvin temperatures. These results demonstrate first steps towards time-based multiplexing of gate-based dispersive readout in CMOS quantum devices opening the path for the development of an all-silicon quantum-classical processor.

  3. Top-Down CMOS-NEMS Polysilicon Nanowire with Piezoresistive Transduction

    PubMed Central

    Marigó, Eloi; Sansa, Marc; Pérez-Murano, Francesc; Uranga, Arantxa; Barniol, Núria

    2015-01-01

    A top-down clamped-clamped beam integrated in a CMOS technology with a cross section of 500 nm × 280 nm has been electrostatic actuated and sensed using two different transduction methods: capacitive and piezoresistive. The resonator made from a single polysilicon layer has a fundamental in-plane resonance at 27 MHz. Piezoresistive transduction avoids the effect of the parasitic capacitance assessing the capability to use it and enhance the CMOS-NEMS resonators towards more efficient oscillator. The displacement derived from the capacitive transduction allows to compute the gauge factor for the polysilicon material available in the CMOS technology. PMID:26184222

  4. Top-Down CMOS-NEMS Polysilicon Nanowire with Piezoresistive Transduction.

    PubMed

    Marigó, Eloi; Sansa, Marc; Pérez-Murano, Francesc; Uranga, Arantxa; Barniol, Núria

    2015-07-14

    A top-down clamped-clamped beam integrated in a CMOS technology with a cross section of 500 nm × 280 nm has been electrostatic actuated and sensed using two different transduction methods: capacitive and piezoresistive. The resonator made from a single polysilicon layer has a fundamental in-plane resonance at 27 MHz. Piezoresistive transduction avoids the effect of the parasitic capacitance assessing the capability to use it and enhance the CMOS-NEMS resonators towards more efficient oscillator. The displacement derived from the capacitive transduction allows to compute the gauge factor for the polysilicon material available in the CMOS technology.

  5. A system approach for reducing the environmental impact of manufacturing and sustainability improvement of nano-scale manufacturing

    NASA Astrophysics Data System (ADS)

    Yuan, Yingchun

    This dissertation develops an effective and economical system approach to reduce the environmental impact of manufacturing. The system approach is developed by using a process-based holistic method for upstream analysis and source reduction of the environmental impact of manufacturing. The system approach developed consists of three components of a manufacturing system: technology, energy and material, and is useful for sustainable manufacturing as it establishes a clear link between manufacturing system components and its overall sustainability performance, and provides a framework for environmental impact reductions. In this dissertation, the system approach developed is applied for environmental impact reduction of a semiconductor nano-scale manufacturing system, with three case scenarios analyzed in depth on manufacturing process improvement, clean energy supply, and toxic chemical material selection. The analysis on manufacturing process improvement is conducted on Atomic Layer Deposition of Al2O3 dielectric gate on semiconductor microelectronics devices. Sustainability performance and scale-up impact of the ALD technology in terms of environmental emissions, energy consumption, nano-waste generation and manufacturing productivity are systematically investigated and the ways to improve the sustainability of the ALD technology are successfully developed. The clean energy supply is studied using solar photovoltaic, wind, and fuel cells systems for electricity generation. Environmental savings from each clean energy supply over grid power are quantitatively analyzed, and costs for greenhouse gas reductions on each clean energy supply are comparatively studied. For toxic chemical material selection, an innovative schematic method is developed as a visual decision tool for characterizing and benchmarking the human health impact of toxic chemicals, with a case study conducted on six chemicals commonly used as solvents in semiconductor manufacturing. Reliability of

  6. Millimeter wave complementary metal-oxide-semiconductor on-chip hexagonal nano-ferrite circulator

    NASA Astrophysics Data System (ADS)

    Chao, Liu; Oukacha, Hassan; Fu, Enjin; Koomson, Valencia Joyner; Afsar, Mohammed N.

    2015-05-01

    Hexagonal ferrites such as M-type BaFe12O19 and SrFe12O19 have strong uniaxial anisotropic magnetic field and remanent magnetism. The nano-sized ferrite powder exhibits high compatibility and processability in composite material. New magnetic devices using the M-type ferrite materials can work in the tens of GHz frequency range from microwave to millimeter wave without the application of strong external magnetic field. The micro- and nano-sized hexagonal ferrite can be conveniently utilized to fabricate magnetic components integrated in CMOS integrated circuits as thin as several micrometers. The micro-fabrication method of such nano ferrite device is presented in this paper. A circulator working at 60 GHz is designed and integrated into the commercial CMOS process. The circulator exhibits distinct circulation properties in the frequency range from 56 GHz to 58 GHz.

  7. 324GHz CMOS VCO Using Linear Superimposition Technique

    NASA Technical Reports Server (NTRS)

    Daquan, Huang; LaRocca, Tim R.; Samoska, Lorene A; Fung, Andy; Chang, Frank

    2007-01-01

    Terahertz (frequencies ranged from 300GHz to 3THz) imaging and spectroscopic systems have drawn increasing attention recently due to their unique capabilities in detecting and possibly analyzing concealed objects. The generation of terahertz signals is nonetheless nontrivial and traditionally accomplished by using either free-electron radiation, optical lasers, Gunn diodes or fundamental oscillation by using III-V based HBT/HEMT technology[1-3]... We have substantially extended the operation range of deep-scaled CMOS by using a linear superimposition method, in which we have realized a 324GHz VCO in 90nm digital CMOS with 4GHz tuning range under 1V supply voltage. This may also pave the way for ultra-high data rate wireless communications beyond that of IEEE 802.15.3c and reach data rates comparable to that of fiber optical communications, such as OC768 (40Gbps) and beyond.

  8. Nano-scale processes behind ion-beam cancer therapy

    NASA Astrophysics Data System (ADS)

    Surdutovich, Eugene; Garcia, Gustavo; Mason, Nigel; Solov'yov, Andrey V.

    2016-04-01

    This topical issue collates a series of papers based on new data reported at the third Nano-IBCT Conference of the COST Action MP1002: Nanoscale Insights into Ion Beam Cancer Therapy, held in Boppard, Germany, from October 27th to October 31st, 2014. The Nano-IBCT COST Action was launched in December 2010 and brought together more than 300 experts from different disciplines (physics, chemistry, biology) with specialists in radiation damage of biological matter from hadron-therapy centres, and medical institutions. This meeting followed the first and the second conferences of the Action held in October 2011 in Caen, France and in May 2013 in Sopot, Poland respectively. This conference series provided a focus for the European research community and has highlighted the pioneering research into the fundamental processes underpinning ion beam cancer therapy. Contribution to the Topical Issue "COST Action Nano-IBCT: Nano-scale Processes Behind Ion-Beam Cancer Therapy", edited by Andrey V. Solov'yov, Nigel Mason, Gustavo Garcia and Eugene Surdutovich.

  9. [Study on preparation of composite nano-scale Fe3O4 for phosphorus control].

    PubMed

    Li, Lei; Pan, Gang; Chen, Hao

    2010-03-01

    Composite nano-scale Fe3O4 particles were prepared in sodium carboxymethyl cellulose (CMC) solution by the oxidation deposition method. The adsorptions of phosphorus by micro-scale Fe3O4 and composite nano-scale Fe3O4 were investigated in water and soil, and the role of cellulase in the adsorption of composite nano-scale Fe3O4 was studied. Kinetic tests indicated that the equilibrium adsorption capacity of phosphorous on the composite nano-scale Fe3O4 (2.1 mg/g) was less than that of micro-scale Fe3O4 (3.2 mg/g). When cellulase was added to the solution of composite nano-scale Fe3O4 to degrade CMC, the removal rate of P by the nanoparticles (86%) was enhanced to the same level as the microparticles (90%). In the column tests, when the composite nano-scale Fe3O4 suspension was introduced in the downflow mode through the soil column, 72% of Fe3O4 penetrated through the soil bed under gravity. In contrast, the micro-scale Fe3O4 failed to pass through the soil column. The retention rate of P was 45% in the soil column when treated by the CMC-stabilized nanoparticles, in comparison with only 30% for the untreated soil column, however it could be improved to 74% in the soil column when treated by both the CMC-stabilized nanoparticles and cellulase, which degraded CMC after the nanoparticles were delivered into the soil.

  10. Self-calibrated humidity sensor in CMOS without post-processing.

    PubMed

    Nizhnik, Oleg; Higuchi, Kohei; Maenaka, Kazusuke

    2012-01-01

    A 1.1 μW power dissipation, voltage-output humidity sensor with 10% relative humidity accuracy was developed in the LFoundry 0.15 μm CMOS technology without post-processing. The sensor consists of a woven lateral array of electrodes implemented in CMOS top metal, a humidity-sensitive layer of Intervia Photodielectric 8023D-10, a CMOS capacitance to voltage converter, and the self-calibration circuitry.

  11. LENS (lithography enhancement toward nano scale): a European project to support double exposure and double patterning technology development

    NASA Astrophysics Data System (ADS)

    Cantu, Pietro; Baldi, Livio; Piacentini, Paolo; Sytsma, Joost; Le Gratiet, Bertrand; Gaugiran, Stéphanie; Wong, Patrick; Miyashita, Hiroyuki; Atzei, Luisa R.; Buch, Xavier; Verkleij, Dick; Toublan, Olivier; Perez-Murano, Francesco; Mecerreyes, David

    2010-04-01

    In 2009 a new European initiative on Double Patterning and Double Exposure lithography process development was started in the framework of the ENIAC Joint Undertaking. The project, named LENS (Lithography Enhancement Towards Nano Scale), involves twelve companies from five different European Countries (Italy, Netherlands, France, Belgium Spain; includes: IC makers (Numonyx and STMicroelectronics), a group of equipment and materials companies (ASML, Lam Research srl, JSR, FEI), a mask maker (Dai Nippon Photomask Europe), an EDA company (Mentor Graphics) and four research and development institutes (CEA-Leti, IMEC, Centro Nacional de Microelectrónica, CIDETEC). The LENS project aims to develop and integrate the overall infrastructure required to reach patterning resolutions required by 32nm and 22nm technology nodes through the double patterning and pitch doubling technologies on existing conventional immersion exposure tools, with the purpose to allow the timely development of 32nm and 22nm technology nodes for memories and logic devices, providing a safe alternative to EUV, Higher Refraction Index Fluids Immersion Lithography and maskless lithography, which appear to be still far from maturity. The project will cover the whole lithography supply chain including design, masks, materials, exposure tools, process integration, metrology and its final objective is the demonstration of 22nm node patterning on available 1.35 NA immersion tools on high complexity mask set.

  12. Intelligent Design of Nano-Scale Molecular Imaging Agents

    PubMed Central

    Kim, Sung Bae; Hattori, Mitsuru; Ozawa, Takeaki

    2012-01-01

    Visual representation and quantification of biological processes at the cellular and subcellular levels within living subjects are gaining great interest in life science to address frontier issues in pathology and physiology. As intact living subjects do not emit any optical signature, visual representation usually exploits nano-scale imaging agents as the source of image contrast. Many imaging agents have been developed for this purpose, some of which exert nonspecific, passive, and physical interaction with a target. Current research interest in molecular imaging has mainly shifted to fabrication of smartly integrated, specific, and versatile agents that emit fluorescence or luminescence as an optical readout. These agents include luminescent quantum dots (QDs), biofunctional antibodies, and multifunctional nanoparticles. Furthermore, genetically encoded nano-imaging agents embedding fluorescent proteins or luciferases are now gaining popularity. These agents are generated by integrative design of the components, such as luciferase, flexible linker, and receptor to exert a specific on–off switching in the complex context of living subjects. In the present review, we provide an overview of the basic concepts, smart design, and practical contribution of recent nano-scale imaging agents, especially with respect to genetically encoded imaging agents. PMID:23235326

  13. Intelligent design of nano-scale molecular imaging agents.

    PubMed

    Kim, Sung Bae; Hattori, Mitsuru; Ozawa, Takeaki

    2012-12-12

    Visual representation and quantification of biological processes at the cellular and subcellular levels within living subjects are gaining great interest in life science to address frontier issues in pathology and physiology. As intact living subjects do not emit any optical signature, visual representation usually exploits nano-scale imaging agents as the source of image contrast. Many imaging agents have been developed for this purpose, some of which exert nonspecific, passive, and physical interaction with a target. Current research interest in molecular imaging has mainly shifted to fabrication of smartly integrated, specific, and versatile agents that emit fluorescence or luminescence as an optical readout. These agents include luminescent quantum dots (QDs), biofunctional antibodies, and multifunctional nanoparticles. Furthermore, genetically encoded nano-imaging agents embedding fluorescent proteins or luciferases are now gaining popularity. These agents are generated by integrative design of the components, such as luciferase, flexible linker, and receptor to exert a specific on-off switching in the complex context of living subjects. In the present review, we provide an overview of the basic concepts, smart design, and practical contribution of recent nano-scale imaging agents, especially with respect to genetically encoded imaging agents.

  14. A low jitter all - digital phase - locked loop in 180 nm CMOS technology

    NASA Astrophysics Data System (ADS)

    Shumkin, O. V.; Butuzov, V. A.; Normanov, D. D.; Ivanov, P. Yu

    2016-02-01

    An all-digital phase locked loop (ADPLL) was implemented in 180 nm CMOS technology. The proposed ADPLL uses a digitally controlled oscillator to achieve 3 ps resolution. The pure digital phase locked loop is attractive because it is less sensitive to noise and operating conditions than its analog counterpart. The proposed ADPLL can be easily applied to different process as a soft IP block, making it very suitable for system-on-chip applications.

  15. In situ thermomechanical testing methods for micro/nano-scale materials.

    PubMed

    Kang, Wonmo; Merrill, Marriner; Wheeler, Jeffrey M

    2017-02-23

    The advance of micro/nanotechnology in energy-harvesting, micropower, electronic devices, and transducers for automobile and aerospace applications has led to the need for accurate thermomechanical characterization of micro/nano-scale materials to ensure their reliability and performance. This persistent need has driven various efforts to develop innovative experimental techniques that overcome the critical challenges associated with precise mechanical and thermal control of micro/nano-scale specimens during material characterization. Here we review recent progress in the development of thermomechanical testing methods from miniaturized versions of conventional macroscopic test systems to the current state of the art of in situ uniaxial testing capabilities in electron microscopes utilizing either indentation-based microcompression or integrated microsystems. We discuss the major advantages/disadvantages of these methods with respect to specimen size, range of temperature control, ease of experimentation and resolution of the measurements. We also identify key challenges in each method. Finally, we summarize some of the important discoveries that have been made using in situ thermomechanical testing and the exciting research opportunities still to come in micro/nano-scale materials.

  16. Superior model for fault tolerance computation in designing nano-sized circuit systems

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Singh, N. S. S., E-mail: narinderjit@petronas.com.my; Muthuvalu, M. S., E-mail: msmuthuvalu@gmail.com; Asirvadam, V. S., E-mail: vijanth-sagayan@petronas.com.my

    2014-10-24

    As CMOS technology scales nano-metrically, reliability turns out to be a decisive subject in the design methodology of nano-sized circuit systems. As a result, several computational approaches have been developed to compute and evaluate reliability of desired nano-electronic circuits. The process of computing reliability becomes very troublesome and time consuming as the computational complexity build ups with the desired circuit size. Therefore, being able to measure reliability instantly and superiorly is fast becoming necessary in designing modern logic integrated circuits. For this purpose, the paper firstly looks into the development of an automated reliability evaluation tool based on the generalizationmore » of Probabilistic Gate Model (PGM) and Boolean Difference-based Error Calculator (BDEC) models. The Matlab-based tool allows users to significantly speed-up the task of reliability analysis for very large number of nano-electronic circuits. Secondly, by using the developed automated tool, the paper explores into a comparative study involving reliability computation and evaluation by PGM and, BDEC models for different implementations of same functionality circuits. Based on the reliability analysis, BDEC gives exact and transparent reliability measures, but as the complexity of the same functionality circuits with respect to gate error increases, reliability measure by BDEC tends to be lower than the reliability measure by PGM. The lesser reliability measure by BDEC is well explained in this paper using distribution of different signal input patterns overtime for same functionality circuits. Simulation results conclude that the reliability measure by BDEC depends not only on faulty gates but it also depends on circuit topology, probability of input signals being one or zero and also probability of error on signal lines.« less

  17. A Multipurpose CMOS Platform for Nanosensing

    PubMed Central

    Bonanno, Alberto; Sanginario, Alessandro; Marasso, Simone L.; Miccoli, Beatrice; Bejtka, Katarzyna; Benetto, Simone; Demarchi, Danilo

    2016-01-01

    This paper presents a customizable sensing system based on functionalized nanowires (NWs) assembled onto complementary metal oxide semiconductor (CMOS) technology. The Micro-for-Nano (M4N) chip integrates on top of the electronics an array of aluminum microelectrodes covered with gold by means of a customized electroless plating process. The NW assembly process is driven by an array of on-chip dielectrophoresis (DEP) generators, enabling a custom layout of different nanosensors on the same microelectrode array. The electrical properties of each assembled NW are singularly sensed through an in situ CMOS read-out circuit (ROC) that guarantees a low noise and reliable measurement. The M4N chip is directly connected to an external microcontroller for configuration and data processing. The processed data are then redirected to a workstation for real-time data visualization and storage during sensing experiments. As proof of concept, ZnO nanowires have been integrated onto the M4N chip to validate the approach that enables different kind of sensing experiments. The device has been then irradiated by an external UV source with adjustable power to measure the ZnO sensitivity to UV-light exposure. A maximum variation of about 80% of the ZnO-NW resistance has been detected by the M4N system when the assembled 5 μm × 500 nm single ZnO-NW is exposed to an estimated incident radiant UV-light flux in the range of 1 nW–229 nW. The performed experiments prove the efficiency of the platform conceived for exploiting any kind of material that can change its capacitance and/or resistance due to an external stimulus. PMID:27916911

  18. A Multipurpose CMOS Platform for Nanosensing.

    PubMed

    Bonanno, Alberto; Sanginario, Alessandro; Marasso, Simone L; Miccoli, Beatrice; Bejtka, Katarzyna; Benetto, Simone; Demarchi, Danilo

    2016-11-30

    This paper presents a customizable sensing system based on functionalized nanowires (NWs) assembled onto complementary metal oxide semiconductor (CMOS) technology. The Micro-for-Nano (M4N) chip integrates on top of the electronics an array of aluminum microelectrodes covered with gold by means of a customized electroless plating process. The NW assembly process is driven by an array of on-chip dielectrophoresis (DEP) generators, enabling a custom layout of different nanosensors on the same microelectrode array. The electrical properties of each assembled NW are singularly sensed through an in situ CMOS read-out circuit (ROC) that guarantees a low noise and reliable measurement. The M4N chip is directly connected to an external microcontroller for configuration and data processing. The processed data are then redirected to a workstation for real-time data visualization and storage during sensing experiments. As proof of concept, ZnO nanowires have been integrated onto the M4N chip to validate the approach that enables different kind of sensing experiments. The device has been then irradiated by an external UV source with adjustable power to measure the ZnO sensitivity to UV-light exposure. A maximum variation of about 80% of the ZnO-NW resistance has been detected by the M4N system when the assembled 5 μ m × 500 nm single ZnO-NW is exposed to an estimated incident radiant UV-light flux in the range of 1 nW-229 nW. The performed experiments prove the efficiency of the platform conceived for exploiting any kind of material that can change its capacitance and/or resistance due to an external stimulus.

  19. Nanosecond-laser induced crosstalk of CMOS image sensor

    NASA Astrophysics Data System (ADS)

    Zhu, Rongzhen; Wang, Yanbin; Chen, Qianrong; Zhou, Xuanfeng; Ren, Guangsen; Cui, Longfei; Li, Hua; Hao, Daoliang

    2018-02-01

    The CMOS Image Sensor (CIS) is photoelectricity image device which focused the photosensitive array, amplifier, A/D transfer, storage, DSP, computer interface circuit on the same silicon substrate[1]. It has low power consumption, high integration,low cost etc. With large scale integrated circuit technology progress, the noise suppression level of CIS is enhanced unceasingly, and its image quality is getting better and better. It has been in the security monitoring, biometrice, detection and imaging and even military reconnaissance and other field is widely used. CIS is easily disturbed and damaged while it is irradiated by laser. It is of great significance to study the effect of laser irradiation on optoelectronic countermeasure and device for the laser strengthening resistance is of great significance. There are some researchers have studied the laser induced disturbed and damaged of CIS. They focused on the saturation, supersaturated effects, and they observed different effects as for unsaturation, saturation, supersaturated, allsaturated and pixel flip etc. This paper research 1064nm laser interference effect in a typical before type CMOS, and observring the saturated crosstalk and half the crosstalk line. This paper extracted from cmos devices working principle and signal detection methods such as the Angle of the formation mechanism of the crosstalk line phenomenon are analyzed.

  20. Micro-scale characterization of a CMOS-based neutron detector for in-phantom measurements in radiation therapy

    NASA Astrophysics Data System (ADS)

    Arbor, Nicolas; Higueret, Stephane; Husson, Daniel

    2018-04-01

    The CMOS sensor AlphaRad has been designed at the IPHC Strasbourg for real-time monitoring of fast and thermal neutrons over a full energy spectrum. Completely integrated, highly transparent to photons and optimized for low power consumption, this sensor offers very interesting characteristics for the study of internal neutrons in radiation therapy with anthropomorphic phantoms. However, specific effects related to the CMOS metal substructure and to the charge collection process of low energy particles must be carefully estimated before being used for medical applications. We present a detailed characterization of the AlphaRad chip in the MeV energy range using proton and alpha micro-beam experiments performed at the AIFIRA facility (CENBG, Bordeaux). Two-dimensional maps of the charge collection were carried out on a micro-metric scale to be integrated into a Geant4 Monte Carlo simulation of the system. The gamma rejection, as well as the fast and thermal neutrons separation, were studied using both simulation and experimental data. The results highlight the potential of a future system based on CMOS sensor for in-phantom neutron detection in radiation therapies.

  1. The fabrication of a programmable via using phase-change material in CMOS-compatible technology.

    PubMed

    Chen, Kuan-Neng; Krusin-Elbaum, Lia

    2010-04-02

    We demonstrate an energy-efficient programmable via concept using indirectly heated phase-change material. This via structure has maximum phase-change volume to achieve a minimum on resistance for high performance logic applications. Process development and material investigations for this device structure are reported. The device concept is successfully demonstrated in a standard CMOS-compatible technology capable of multiple cycles between on/off states for reconfigurable applications.

  2. Nano-cone resistive memory for ultralow power operation.

    PubMed

    Kim, Sungjun; Jung, Sunghun; Kim, Min-Hwi; Kim, Tae-Hyeon; Bang, Suhyun; Cho, Seongjae; Park, Byung-Gook

    2017-03-24

    SiN x -based nano-structure resistive memory is fabricated by fully silicon CMOS compatible process integration including particularly designed anisotropic etching for the construction of a nano-cone silicon bottom electrode (BE). Bipolar resistive switching characteristics have significantly reduced switching current and voltage and are demonstrated in a nano-cone BE structure, as compared with those in a flat BE one. We have verified by systematic device simulations that the main cause of reduction in the performance parameters is the high electric field being more effectively concentrated at the tip of the cone-shaped BE. The greatly improved nonlinearity of the nano-cone resistive memory cell will be beneficial in the ultra-high-density crossbar array.

  3. Nanoparticles by spray drying using innovative new technology: the Büchi nano spray dryer B-90.

    PubMed

    Li, Xiang; Anton, Nicolas; Arpagaus, Cordin; Belleteix, Fabrice; Vandamme, Thierry F

    2010-10-15

    Spray drying technology is widely known and used to transform liquids (solutions, emulsions, suspension, slurries, pastes or even melts) into solid powders. Its main applications are found in the food, chemical and materials industries to enhance ingredient conservation, particle properties, powder handling and storage etc. However, spray drying can also be used for specific applications in the formulation of pharmaceuticals for drug delivery (e.g. particles for pulmonary delivery). Büchi is a reference in the development of spray drying technology, notably for laboratory scale devices. This study presents the Nano Spray Dryer B-90, a revolutionary new sprayer developed by Büchi, use of which can lower the size of the produced dried particles by an order of magnitude attaining submicron sizes. In this paper, results are presented with a panel of five representative polymeric wall materials (arabic gum, whey protein, polyvinyl alcohol, modified starch, and maltodextrin) and the potentials to encapsulate nano-emulsions, or to formulate nano-crystals (e.g. from furosemide) are also shown. Copyright © 2010 Elsevier B.V. All rights reserved.

  4. Hyperspectral CMOS imager

    NASA Astrophysics Data System (ADS)

    Jerram, P. A.; Fryer, M.; Pratlong, J.; Pike, A.; Walker, A.; Dierickx, B.; Dupont, B.; Defernez, A.

    2017-11-01

    CCDs have been used for many years for Hyperspectral imaging missions and have been extremely successful. These include the Medium Resolution Imaging Spectrometer (MERIS) [1] on Envisat, the Compact High Resolution Imaging Spectrometer (CHRIS) on Proba and the Ozone Monitoring Instrument operating in the UV spectral region. ESA are also planning a number of further missions that are likely to use CCD technology (Sentinel 3, 4 and 5). However CMOS sensors have a number of advantages which means that they will probably be used for hyperspectral applications in the longer term. There are two main advantages with CMOS sensors: First a hyperspectral image consists of spectral lines with a large difference in intensity; in a frame transfer CCD the faint spectral lines have to be transferred through the part of the imager illuminated by intense lines. This can lead to cross-talk and whilst this problem can be reduced by the use of split frame transfer and faster line rates CMOS sensors do not require a frame transfer and hence inherently will not suffer from this problem. Second, with a CMOS sensor the intense spectral lines can be read multiple times within a frame to give a significant increase in dynamic range. We will describe the design, and initial test of a CMOS sensor for use in hyperspectral applications. This device has been designed to give as high a dynamic range as possible with minimum cross-talk. The sensor has been manufactured on high resistivity epitaxial silicon wafers and is be back-thinned and left relatively thick in order to obtain the maximum quantum efficiency across the entire spectral range

  5. A Low-Cost CMOS-MEMS Piezoresistive Accelerometer with Large Proof Mass

    PubMed Central

    Khir, Mohd Haris Md; Qu, Peng; Qu, Hongwei

    2011-01-01

    This paper reports a low-cost, high-sensitivity CMOS-MEMS piezoresistive accelerometer with large proof mass. In the device fabricated using ON Semiconductor 0.5 μm CMOS technology, an inherent CMOS polysilicon thin film is utilized as the piezoresistive sensing material. A full Wheatstone bridge was constructed through easy wiring allowed by the three metal layers in the 0.5 μm CMOS technology. The device fabrication process consisted of a standard CMOS process for sensor configuration, and a deep reactive ion etching (DRIE) based post-CMOS microfabrication for MEMS structure release. A bulk single-crystal silicon (SCS) substrate is included in the proof mass to increase sensor sensitivity. In device design and analysis, the self heating of the polysilicon piezoresistors and its effect to the sensor performance is also discussed. With a low operating power of 1.5 mW, the accelerometer demonstrates a sensitivity of 0.077 mV/g prior to any amplification. Dynamic tests have been conducted with a high-end commercial calibrating accelerometer as reference. PMID:22164052

  6. A low-cost CMOS-MEMS piezoresistive accelerometer with large proof mass.

    PubMed

    Khir, Mohd Haris Md; Qu, Peng; Qu, Hongwei

    2011-01-01

    This paper reports a low-cost, high-sensitivity CMOS-MEMS piezoresistive accelerometer with large proof mass. In the device fabricated using ON Semiconductor 0.5 μm CMOS technology, an inherent CMOS polysilicon thin film is utilized as the piezoresistive sensing material. A full Wheatstone bridge was constructed through easy wiring allowed by the three metal layers in the 0.5 μm CMOS technology. The device fabrication process consisted of a standard CMOS process for sensor configuration, and a deep reactive ion etching (DRIE) based post-CMOS microfabrication for MEMS structure release. A bulk single-crystal silicon (SCS) substrate is included in the proof mass to increase sensor sensitivity. In device design and analysis, the self heating of the polysilicon piezoresistors and its effect to the sensor performance is also discussed. With a low operating power of 1.5 mW, the accelerometer demonstrates a sensitivity of 0.077 mV/g prior to any amplification. Dynamic tests have been conducted with a high-end commercial calibrating accelerometer as reference.

  7. A 4-fJ/Spike Artificial Neuron in 65 nm CMOS Technology

    PubMed Central

    Sourikopoulos, Ilias; Hedayat, Sara; Loyez, Christophe; Danneville, François; Hoel, Virginie; Mercier, Eric; Cappy, Alain

    2017-01-01

    As Moore's law reaches its end, traditional computing technology based on the Von Neumann architecture is facing fundamental limits. Among them is poor energy efficiency. This situation motivates the investigation of different processing information paradigms, such as the use of spiking neural networks (SNNs), which also introduce cognitive characteristics. As applications at very high scale are addressed, the energy dissipation needs to be minimized. This effort starts from the neuron cell. In this context, this paper presents the design of an original artificial neuron, in standard 65 nm CMOS technology with optimized energy efficiency. The neuron circuit response is designed as an approximation of the Morris-Lecar theoretical model. In order to implement the non-linear gating variables, which control the ionic channel currents, transistors operating in deep subthreshold are employed. Two different circuit variants describing the neuron model equations have been developed. The first one features spike characteristics, which correlate well with a biological neuron model. The second one is a simplification of the first, designed to exhibit higher spiking frequencies, targeting large scale bio-inspired information processing applications. The most important feature of the fabricated circuits is the energy efficiency of a few femtojoules per spike, which improves prior state-of-the-art by two to three orders of magnitude. This performance is achieved by minimizing two key parameters: the supply voltage and the related membrane capacitance. Meanwhile, the obtained standby power at a resting output does not exceed tens of picowatts. The two variants were sized to 200 and 35 μm2 with the latter reaching a spiking output frequency of 26 kHz. This performance level could address various contexts, such as highly integrated neuro-processors for robotics, neuroscience or medical applications. PMID:28360831

  8. Multi scale modeling of ignition and combustion of micro and nano aluminum particles

    NASA Astrophysics Data System (ADS)

    Puri, Puneesh

    With renewed interest in nano scale energetic materials like aluminum, many fundamental issues concerning the ignition and combustion characteristics at nano scales, remain to be clarified. The overall aim of the current study is the establishment of a unified theory accommodating the various processes and mechanisms involved in the combustion and ignition of aluminum particles at micro and nano scales. A comprehensive review on the ignition and combustion of aluminum particles at multi scales was first performed identifying various processes and mechanisms involved. Research focus was also placed on the establishment of a Molecular Dynamics (MD) simulation tool to investigate the characteristics of nano-particulate aluminum through three major studies. The general computational framework involved parallelized preprocessing, post-processing and main code with capability to simulate different ensembles using appropriate algorithms. Size dependence of melting temperature of pure aluminum particles was investigated in the first study. Phenomena like dynamic coexistence of solid and liquid phase and effect of surface charges on melting were explored. The second study involved the study of effect of defects in the form of voids on melting of bulk and particulate phase aluminum. The third MD study was used to analyze the thermo-mechanical behavior of nano-sized aluminum particles with total diameter of 5-10 nm and oxide thickness of 1-2.5 nm. The ensuing solid-solid and solid-liquid phase changes in the core and shell, stresses developed within the shell, and the diffusion of aluminum cations in the oxide layer, were explored in depth for amorphous and crystalline oxide layers. In the limiting case, the condition for pyrophoricity/explosivity of nano-particulate aluminum was analyzed and modified. The size dependence of thermodynamic properties at nano scales were considered and incorporated into the existing theories developed for micro and larger scales. Finally, a

  9. Micro/nano-computed tomography technology for quantitative dynamic, multi-scale imaging of morphogenesis.

    PubMed

    Gregg, Chelsea L; Recknagel, Andrew K; Butcher, Jonathan T

    2015-01-01

    Tissue morphogenesis and embryonic development are dynamic events challenging to quantify, especially considering the intricate events that happen simultaneously in different locations and time. Micro- and more recently nano-computed tomography (micro/nanoCT) has been used for the past 15 years to characterize large 3D fields of tortuous geometries at high spatial resolution. We and others have advanced micro/nanoCT imaging strategies for quantifying tissue- and organ-level fate changes throughout morphogenesis. Exogenous soft tissue contrast media enables visualization of vascular lumens and tissues via extravasation. Furthermore, the emergence of antigen-specific tissue contrast enables direct quantitative visualization of protein and mRNA expression. Micro-CT X-ray doses appear to be non-embryotoxic, enabling longitudinal imaging studies in live embryos. In this chapter we present established soft tissue contrast protocols for obtaining high-quality micro/nanoCT images and the image processing techniques useful for quantifying anatomical and physiological information from the data sets.

  10. Proton-counting radiography for proton therapy: a proof of principle using CMOS APS technology

    NASA Astrophysics Data System (ADS)

    Poludniowski, G.; Allinson, N. M.; Anaxagoras, T.; Esposito, M.; Green, S.; Manolopoulos, S.; Nieto-Camero, J.; Parker, D. J.; Price, T.; Evans, P. M.

    2014-06-01

    Despite the early recognition of the potential of proton imaging to assist proton therapy (Cormack 1963 J. Appl. Phys. 34 2722), the modality is still removed from clinical practice, with various approaches in development. For proton-counting radiography applications such as computed tomography (CT), the water-equivalent-path-length that each proton has travelled through an imaged object must be inferred. Typically, scintillator-based technology has been used in various energy/range telescope designs. Here we propose a very different alternative of using radiation-hard CMOS active pixel sensor technology. The ability of such a sensor to resolve the passage of individual protons in a therapy beam has not been previously shown. Here, such capability is demonstrated using a 36 MeV cyclotron beam (University of Birmingham Cyclotron, Birmingham, UK) and a 200 MeV clinical radiotherapy beam (iThemba LABS, Cape Town, SA). The feasibility of tracking individual protons through multiple CMOS layers is also demonstrated using a two-layer stack of sensors. The chief advantages of this solution are the spatial discrimination of events intrinsic to pixelated sensors, combined with the potential provision of information on both the range and residual energy of a proton. The challenges in developing a practical system are discussed.

  11. Proton-counting radiography for proton therapy: a proof of principle using CMOS APS technology

    PubMed Central

    Poludniowski, G; Allinson, N M; Anaxagoras, T; Esposito, M; Green, S; Manolopoulos, S; Nieto-Camero, J; Parker, D J; Price, T; Evans, P M

    2014-01-01

    Despite the early recognition of the potential of proton imaging to assist proton therapy the modality is still removed from clinical practice, with various approaches in development. For proton-counting radiography applications such as Computed Tomography (CT), the Water-Equivalent-Path-Length (WEPL) that each proton has travelled through an imaged object must be inferred. Typically, scintillator-based technology has been used in various energy/range telescope designs. Here we propose a very different alternative of using radiation-hard CMOS Active Pixel Sensor (APS) technology. The ability of such a sensor to resolve the passage of individual protons in a therapy beam has not been previously shown. Here, such capability is demonstrated using a 36 MeV cyclotron beam (University of Birmingham Cyclotron, Birmingham, UK) and a 200 MeV clinical radiotherapy beam (iThemba LABS, Cape Town, SA). The feasibility of tracking individual protons through multiple CMOS layers is also demonstrated using a two-layer stack of sensors. The chief advantages of this solution are the spatial discrimination of events intrinsic to pixelated sensors, combined with the potential provision of information on both the range and residual energy of a proton. The challenges in developing a practical system are discussed. PMID:24785680

  12. Advancing the technology of monolithic CMOS detectors for use as x-ray imaging spectrometers

    NASA Astrophysics Data System (ADS)

    Kenter, Almus; Kraft, Ralph; Gauron, Thomas; Amato, Stephen

    2017-08-01

    The Smithsonian Astrophysical Observatory (SAO) in collaboration with SRI/Sarnoff has been engaged in a multi year effort to advance the technology of monolithic back-thinned CMOS detectors for use as X-ray imaging spectrometers. The long term goal of this campaign is to produce X-ray Active Pixel Sensor (APS) detectors with Fano limited performance over the 0.1-10keV band while incorporating the many benefits of CMOS technology. These benefits include: low power consumption, radiation "hardness", high levels of integration, and very high read rates. Such devices would be ideal for candidate post 2020 decadal missions such as LYNX and for smaller more immediate applications such as CubeX. Devices from a recent fabrication have been back-thinned, packaged and tested for soft X-ray response. These devices have 16μm pitch, 6 Transistor Pinned Photo Diode (6TPPD) pixels with ˜135μV/electron sensitivity and a highly parallel signal chain. These new detectors are fabricated on 10μm epitaxial silicon and have a 1k by 1k format. We present details of our camera design and device performance with particular emphasis on those aspects of interest to single photon counting X-ray astronomy. These features include read noise, X-ray spectral response and quantum efficiency.

  13. High-Speed Scanning Interferometer Using CMOS Image Sensor and FPGA Based on Multifrequency Phase-Tracking Detection

    NASA Technical Reports Server (NTRS)

    Ohara, Tetsuo

    2012-01-01

    A sub-aperture stitching optical interferometer can provide a cost-effective solution for an in situ metrology tool for large optics; however, the currently available technologies are not suitable for high-speed and real-time continuous scan. NanoWave s SPPE (Scanning Probe Position Encoder) has been proven to exhibit excellent stability and sub-nanometer precision with a large dynamic range. This same technology can transform many optical interferometers into real-time subnanometer precision tools with only minor modification. The proposed field-programmable gate array (FPGA) signal processing concept, coupled with a new-generation, high-speed, mega-pixel CMOS (complementary metal-oxide semiconductor) image sensor, enables high speed (>1 m/s) and real-time continuous surface profiling that is insensitive to variation of pixel sensitivity and/or optical transmission/reflection. This is especially useful for large optics surface profiling.

  14. Visible Wavelength Color Filters Using Dielectric Subwavelength Gratings for Backside-Illuminated CMOS Image Sensor Technologies.

    PubMed

    Horie, Yu; Han, Seunghoon; Lee, Jeong-Yub; Kim, Jaekwan; Kim, Yongsung; Arbabi, Amir; Shin, Changgyun; Shi, Lilong; Arbabi, Ehsan; Kamali, Seyedeh Mahsa; Lee, Hong-Seok; Hwang, Sungwoo; Faraon, Andrei

    2017-05-10

    We report transmissive color filters based on subwavelength dielectric gratings that can replace conventional dye-based color filters used in backside-illuminated CMOS image sensor (BSI CIS) technologies. The filters are patterned in an 80 nm-thick poly silicon film on a 115 nm-thick SiO 2 spacer layer. They are optimized for operating at the primary RGB colors, exhibit peak transmittance of 60-80%, and have an almost insensitive response over a ± 20° angular range. This technology enables shrinking of the pixel sizes down to near a micrometer.

  15. Controlled crystallization and granulation of nano-scale β-Ni(OH) 2 cathode materials for high power Ni-MH batteries

    NASA Astrophysics Data System (ADS)

    He, Xiangming; Li, Jianjun; Cheng, Hongwei; Jiang, Changyin; Wan, Chunrong

    A novel synthesis of controlled crystallization and granulation was attempted to prepare nano-scale β-Ni(OH) 2 cathode materials for high power Ni-MH batteries. Nano-scale β-Ni(OH) 2 and Co(OH) 2 with a diameter of 20 nm were prepared by controlled crystallization, mixed by ball milling, and granulated to form about 5 μm spherical grains by spray drying granulation. Both the addition of nano-scale Co(OH) 2 and granulation significantly enhanced electrochemical performance of nano-scale Ni(OH) 2. The XRD and TEM analysis shown that there were a large amount of defects among the crystal lattice of as-prepared nano-scale Ni(OH) 2, and the DTA-TG analysis shown that it had both lower decomposition temperature and higher decomposition reaction rate, indicating less thermal stability, as compared with conventional micro-scale Ni(OH) 2, and indicating that it had higher electrochemical performance. The granulated grains of nano-scale Ni(OH) 2 mixed with nano-scale Co(OH) 2 at Co/Ni = 1/20 presented the highest specific capacity reaching its theoretical value of 289 mAh g -1 at 1 C, and also exhibited much improved electrochemical performance at high discharge capacity rate up to 10 C. The granulated grains of nano-scale β-Ni(OH) 2 mixed with nano-scale Co(OH) 2 is a promising cathode active material for high power Ni-MH batteries.

  16. Improved Space Object Orbit Determination Using CMOS Detectors

    NASA Astrophysics Data System (ADS)

    Schildknecht, T.; Peltonen, J.; Sännti, T.; Silha, J.; Flohrer, T.

    2014-09-01

    CMOS-sensors, or in general Active Pixel Sensors (APS), are rapidly replacing CCDs in the consumer camera market. Due to significant technological advances during the past years these devices start to compete with CCDs also for demanding scientific imaging applications, in particular in the astronomy community. CMOS detectors offer a series of inherent advantages compared to CCDs, due to the structure of their basic pixel cells, which each contains their own amplifier and readout electronics. The most prominent advantages for space object observations are the extremely fast and flexible readout capabilities, feasibility for electronic shuttering and precise epoch registration, and the potential to perform image processing operations on-chip and in real-time. The major challenges and design drivers for ground-based and space-based optical observation strategies have been analyzed. CMOS detector characteristics were critically evaluated and compared with the established CCD technology, especially with respect to the above mentioned observations. Similarly, the desirable on-chip processing functionalities which would further enhance the object detection and image segmentation were identified. Finally, we simulated several observation scenarios for ground- and space-based sensor by assuming different observation and sensor properties. We will introduce the analyzed end-to-end simulations of the ground- and space-based strategies in order to investigate the orbit determination accuracy and its sensitivity which may result from different values for the frame-rate, pixel scale, astrometric and epoch registration accuracies. Two cases were simulated, a survey using a ground-based sensor to observe objects in LEO for surveillance applications, and a statistical survey with a space-based sensor orbiting in LEO observing small-size debris in LEO. The ground-based LEO survey uses a dynamical fence close to the Earth shadow a few hours after sunset. For the space-based scenario

  17. Nano-scaled top-down of bismuth chalcogenides based on electrochemical lithium intercalation

    NASA Astrophysics Data System (ADS)

    Chen, Jikun; Zhu, Yingjie; Chen, Nuofu; Liu, Xinling; Sun, Zhengliang; Huang, Zhenghong; Kang, Feiyu; Gao, Qiuming; Jiang, Jun; Chen, Lidong

    2011-12-01

    A two-step method has been used to fabricate nano-particles of layer-structured bismuth chalcogenide compounds, including Bi2Te3, Bi2Se3, and Bi2Se0.3Te2.7, through a nano-scaled top-down route. In the first step, lithium (Li) atoms are intercalated between the van der Waals bonded quintuple layers of bismuth chalcogenide compounds by controllable electrochemical process inside self-designed lithium ion batteries. And in the second step, the Li intercalated bismuth chalcogenides are subsequently exposed to ethanol, in which process the intercalated Li atoms would explode like atom-scaled bombs to exfoliate original microscaled powder into nano-scaled particles with size around 10 nm. The influence of lithium intercalation speed and amount to three types of bismuth chalcogenide compounds are compared and the optimized intercalation conditions are explored. As to maintain the phase purity of the final nano-particle product, the intercalation lithium amount should be well controlled in Se contained bismuth chalcogenide compounds. Besides, compared with binary bismuth chalcogenide compound, lower lithium intercalation speed should be applied in ternary bismuth chalcogenide compound.

  18. Improved Space Object Observation Techniques Using CMOS Detectors

    NASA Astrophysics Data System (ADS)

    Schildknecht, T.; Hinze, A.; Schlatter, P.; Silha, J.; Peltonen, J.; Santti, T.; Flohrer, T.

    2013-08-01

    CMOS-sensors, or in general Active Pixel Sensors (APS), are rapidly replacing CCDs in the consumer camera market. Due to significant technological advances during the past years these devices start to compete with CCDs also for demanding scientific imaging applications, in particular in the astronomy community. CMOS detectors offer a series of inherent advantages compared to CCDs, due to the structure of their basic pixel cells, which each contain their own amplifier and readout electronics. The most prominent advantages for space object observations are the extremely fast and flexible readout capabilities, feasibility for electronic shuttering and precise epoch registration, and the potential to perform image processing operations on-chip and in real-time. Presently applied and proposed optical observation strategies for space debris surveys and space surveillance applications had to be analyzed. The major design drivers were identified and potential benefits from using available and future CMOS sensors were assessed. The major challenges and design drivers for ground-based and space-based optical observation strategies have been analyzed. CMOS detector characteristics were critically evaluated and compared with the established CCD technology, especially with respect to the above mentioned observations. Similarly, the desirable on-chip processing functionalities which would further enhance the object detection and image segmentation were identified. Finally, the characteristics of a particular CMOS sensor available at the Zimmerwald observatory were analyzed by performing laboratory test measurements.

  19. Production of ultra-thin nano-scaled graphene platelets from meso-carbon micro-beads

    DOEpatents

    Zhamu, Aruna; Guo, Jiusheng; Jang, Bor Z

    2014-11-11

    A method of producing nano-scaled graphene platelets (NGPs) having an average thickness no greater than 50 nm, typically less than 2 nm, and, in many cases, no greater than 1 nm. The method comprises (a) intercalating a supply of meso-carbon microbeads (MCMBs) to produce intercalated MCMBs; and (b) exfoliating the intercalated MCMBs at a temperature and a pressure for a sufficient period of time to produce the desired NGPs. Optionally, the exfoliated product may be subjected to a mechanical shearing treatment, such as air milling, air jet milling, ball milling, pressurized fluid milling, rotating-blade grinding, or ultrasonicating. The NGPs are excellent reinforcement fillers for a range of matrix materials to produce nanocomposites. Nano-scaled graphene platelets are much lower-cost alternatives to carbon nano-tubes or carbon nano-fibers.

  20. Characterization of Nano-scale Aluminum Oxide Transport through Porous Media

    NASA Astrophysics Data System (ADS)

    Norwood, S.; Reynolds, M.; Miao, Z.; Brusseau, M. L.; Johnson, G. R.

    2011-12-01

    Colloidal material (including that in the nanoparticle size range) is naturally present in most subsurface environments. Mobilization of these colloidal materials via particle disaggregation may occur through abrupt changes in flow rate and/or via chemical perturbations, such as rapid changes in ionic strength or solution pH. While concentrations of natural colloidal materials in the subsurface are typically small, those concentrations may be greatly increased at contaminated sites such as following the application of metal oxides for groundwater remediation efforts. Additionally, while land application of biosolids has become common practice in the United States as an alternative to industrial fertilizers, biosolids have been shown to contain a significant fraction of organic and inorganic nano-scale colloidal materials such as oxides of iron, titanium, and aluminum. Given their reactivity and small size, there are many questions concerning the potential migration of nano-scale colloidal materials through the soil column and their potential participation in the facilitated transport of contaminants, such as heavy metals and emerging pollutants. The purpose of this study was to investigate the transport behavior of aluminum oxide (Al2O3) nanoparticles through porous media. The impacts of pH, ionic strength, pore-water velocity (i.e., residence time), and aqueous-phase concentration on transport was investigated. All experiments were conducted with large injection pulses to fully characterize the impact of long-term retention and transport behavior relevant for natural systems wherein multiple retention processes may be operative. The results indicate that the observed nonideal transport behavior of the nano-scale colloids is influenced by multiple retention mechanisms/processes. Given the ubiquitous nature of these nano-scale colloids in the environment, a clear understanding of their transport and fate is necessary in further resolving the potential for

  1. Ultimate computing. Biomolecular consciousness and nano Technology

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Hameroff, S.R.

    1987-01-01

    The book advances the premise that the cytoskeleton is the cell's nervous system, the biological controller/computer. If indeed cytoskeletal dynamics in the nanoscale (billionth meter, billionth second) are the texture of intracellular information processing, emerging ''NanoTechnologies'' (scanning tunneling microscopy, Feynman machines, von Neumann replicators, etc.) should enable direct monitoring, decoding and interfacing between biological and technological information devices. This in turn could result in important biomedical applications and perhaps a merger of mind and machine: Ultimate Computing.

  2. Embedded CMOS basecalling for nanopore DNA sequencing.

    PubMed

    Chengjie Wang; Junli Zheng; Magierowski, Sebastian; Ghafar-Zadeh, Ebrahim

    2016-08-01

    DNA sequencing based on nanopore sensors is now entering the marketplace. The ability to interface this technology to established CMOS microelectronics promises significant improvements in functionality and miniaturization. Among the key functions to benefit from this interface will be basecalling, the conversion of raw electronic molecular signatures to nucleotide sequence predictions. This paper presents the design and performance potential of custom CMOS base-callers embedded alongside nanopore sensors. A basecalliing architecture implemented in 32-nm technology is discussed with the ability to process the equivalent of 20 human genomes per day in real-time at a power density of 5 W/cm2 assuming a 3-mer nanopore sensor.

  3. A novel compact model for on-chip stacked transformers in RF-CMOS technology

    NASA Astrophysics Data System (ADS)

    Jun, Liu; Jincai, Wen; Qian, Zhao; Lingling, Sun

    2013-08-01

    A novel compact model for on-chip stacked transformers is presented. The proposed model topology gives a clear distinction to the eddy current, resistive and capacitive losses of the primary and secondary coils in the substrate. A method to analytically determine the non-ideal parasitics between the primary coil and substrate is provided. The model is further verified by the excellent match between the measured and simulated S -parameters on the extracted parameters for a 1 : 1 stacked transformer manufactured in a commercial RF-CMOS technology.

  4. Controlled data storage for non-volatile memory cells embedded in nano magnetic logic

    NASA Astrophysics Data System (ADS)

    Riente, Fabrizio; Ziemys, Grazvydas; Mattersdorfer, Clemens; Boche, Silke; Turvani, Giovanna; Raberg, Wolfgang; Luber, Sebastian; Breitkreutz-v. Gamm, Stephan

    2017-05-01

    Among the beyond-CMOS technologies, perpendicular Nano Magnetic Logic (pNML) is a promising candidate due to its low power consumption, its non-volatility and its monolithic 3D integrability, which makes it possible to integrate memory and logic into the same device by exploiting the interaction of bi-stable nanomagnets with perpendicular magnetic anisotropy. Logic computation and signal synchronization are achieved by focus ion beam irradiation and by pinning domain walls in magnetic notches. However, in realistic circuits, the information storage and their read-out are crucial issues, often ignored in the exploration of beyond-CMOS devices. In this paper we address these issues by experimentally demonstrating a pNML memory element, whose read and write operations can be controlled by two independent pulsed currents. Our results prove the correct behavior of the proposed structure that enables high density memory embedded in the logic plane of 3D-integrated pNML circuits.

  5. Broadband image sensor array based on graphene-CMOS integration

    NASA Astrophysics Data System (ADS)

    Goossens, Stijn; Navickaite, Gabriele; Monasterio, Carles; Gupta, Shuchi; Piqueras, Juan José; Pérez, Raúl; Burwell, Gregory; Nikitskiy, Ivan; Lasanta, Tania; Galán, Teresa; Puma, Eric; Centeno, Alba; Pesquera, Amaia; Zurutuza, Amaia; Konstantatos, Gerasimos; Koppens, Frank

    2017-06-01

    Integrated circuits based on complementary metal-oxide-semiconductors (CMOS) are at the heart of the technological revolution of the past 40 years, enabling compact and low-cost microelectronic circuits and imaging systems. However, the diversification of this platform into applications other than microcircuits and visible-light cameras has been impeded by the difficulty to combine semiconductors other than silicon with CMOS. Here, we report the monolithic integration of a CMOS integrated circuit with graphene, operating as a high-mobility phototransistor. We demonstrate a high-resolution, broadband image sensor and operate it as a digital camera that is sensitive to ultraviolet, visible and infrared light (300-2,000 nm). The demonstrated graphene-CMOS integration is pivotal for incorporating 2D materials into the next-generation microelectronics, sensor arrays, low-power integrated photonics and CMOS imaging systems covering visible, infrared and terahertz frequencies.

  6. Prevention of arterial graft spasm in rats using a vasodilator-eluting biodegradable nano-scaled fibre†

    PubMed Central

    Yagami, Kei; Yamawaki-Ogata, Aika; Satake, Makoto; Kaneko, Hiroaki; Oshima, Hideki; Usui, Akihiko; Ueda, Yuichi; Narita, Yuji

    2013-01-01

    OBJECTIVES Arterial graft spasm occasionally causes circulatory collapse immediately following coronary artery bypass graft. The aim of this study is to evaluate the efficacy of our developed materials, which were composed of milrinone (phosphodiesterase III inhibitor) or diltiazem (calcium-channel blocker), with nano-scaled fibre made of biodegradable polymer to prevent arterial spasm. METHODS Milrinone- or diltiazem-releasing biodegradable nano-scaled fibres were fabricated by an electrospinning procedure. In vivo milrinone- or diltiazem-releasing tests were performed to confirm the sustained release of the drugs. An in vivo arterial spasm model was established by subcutaneous injection of noradrenalin around the rat femoral artery. Rats were randomly divided into four groups as follows: those that received 5 mg of milrinone-releasing biodegradable nano-scaled fibre (group M, n = 14); 5 mg of diltiazem-releasing biodegradable nano-scaled fibre (group D, n = 12); or those that received fibre without drugs (as a control; group C, n = 14) implanted into the rat femoral artery. In the fourth group, sham operation was performed (group S, n = 10). One day after the implantation, noradrenalin was injected in all groups. The femoral arterial blood flow was measured continuously before and after noradrenalin injection. The maximum blood flow before noradrenalin injection and minimum blood flow after noradrenalin injection were measured. RESULTS In vivo drug-releasing test revealed that milrinone-releasing biodegradable nano-scaled fibre released 78% of milrinone and diltiazem-releasing biodegradable nano-scaled fibre released 50% diltiazem on the first day. The ratios of rat femoral artery blood flow after/before noradrenalin injection in groups M (0.74 ± 0.16) and D (0.72 ± 0.05) were significantly higher than those of groups C (0.54 ± 0.09) and S (0.55 ± 0.16) (P < 0.05). CONCLUSION Noradrenalin-induced rat femoral artery spasm was inhibited by the implantation of

  7. PAM-4 Signaling over VCSELs with 0.13µm CMOS Chip Technology

    NASA Astrophysics Data System (ADS)

    Cunningham, J. E.; Beckman, D.; Zheng, Xuezhe; Huang, Dawei; Sze, T.; Krishnamoorthy, A. V.

    2006-12-01

    We present results for VCSEL based links operating PAM-4 signaling using a commercial 0.13µm CMOS technology. We perform a complete link analysis of the Bit Error Rate, Q factor, random and deterministic jitter by measuring waterfall curves versus margins in time and amplitude. We demonstrate that VCSEL based PAM 4 can match or even improve performance over binary signaling under conditions of a bandwidth limited, 100meter multi-mode optical link at 5Gbps. We present the first sensitivity measurements for optical PAM-4 and compare it with binary signaling. Measured benefits are reconciled with information theory predictions.

  8. PAM-4 Signaling over VCSELs with 0.13microm CMOS Chip Technology.

    PubMed

    Cunningham, J E; Beckman, D; Zheng, Xuezhe; Huang, Dawei; Sze, T; Krishnamoorthy, A V

    2006-12-11

    We present results for VCSEL based links operating PAM-4 signaling using a commercial 0.13microm CMOS technology. We perform a complete link analysis of the Bit Error Rate, Q factor, random and deterministic jitter by measuring waterfall curves versus margins in time and amplitude. We demonstrate that VCSEL based PAM-4 can match or even improve performance over binary signaling under conditions of a bandwidth limited, 100meter multi-mode optical link at 5Gbps. We present the first sensitivity measurements for optical PAM-4 and compare it with binary signaling. Measured benefits are reconciled with information theory predictions.

  9. Cmos spdt switch for wlan applications

    NASA Astrophysics Data System (ADS)

    Bhuiyan, M. A. S.; Reaz, M. B. I.; Rahman, L. F.; Minhad, K. N.

    2015-04-01

    WLAN has become an essential part of our today's life. The advancement of CMOS technology let the researchers contribute low power, size and cost effective WLAN devices. This paper proposes a single pole double through transmit/receive (T/R) switch for WLAN applications in 0.13 μm CMOS technology. The proposed switch exhibit 1.36 dB insertion loss, 25.3 dB isolation and 24.3 dBm power handling capacity. Moreover, it only dissipates 786.7 nW power per cycle. The switch utilizes only transistor aspect ratio optimization and resistive body floating technique to achieve such desired performance. In this design the use of bulky inductor and capacitor is avoided to evade imposition of unwanted nonlinearities to the communication signal.

  10. Design and fabrication of vertically-integrated CMOS image sensors.

    PubMed

    Skorka, Orit; Joseph, Dileepan

    2011-01-01

    Technologies to fabricate integrated circuits (IC) with 3D structures are an emerging trend in IC design. They are based on vertical stacking of active components to form heterogeneous microsystems. Electronic image sensors will benefit from these technologies because they allow increased pixel-level data processing and device optimization. This paper covers general principles in the design of vertically-integrated (VI) CMOS image sensors that are fabricated by flip-chip bonding. These sensors are composed of a CMOS die and a photodetector die. As a specific example, the paper presents a VI-CMOS image sensor that was designed at the University of Alberta, and fabricated with the help of CMC Microsystems and Micralyne Inc. To realize prototypes, CMOS dies with logarithmic active pixels were prepared in a commercial process, and photodetector dies with metal-semiconductor-metal devices were prepared in a custom process using hydrogenated amorphous silicon. The paper also describes a digital camera that was developed to test the prototype. In this camera, scenes captured by the image sensor are read using an FPGA board, and sent in real time to a PC over USB for data processing and display. Experimental results show that the VI-CMOS prototype has a higher dynamic range and a lower dark limit than conventional electronic image sensors.

  11. CAOS-CMOS camera.

    PubMed

    Riza, Nabeel A; La Torre, Juan Pablo; Amin, M Junaid

    2016-06-13

    Proposed and experimentally demonstrated is the CAOS-CMOS camera design that combines the coded access optical sensor (CAOS) imager platform with the CMOS multi-pixel optical sensor. The unique CAOS-CMOS camera engages the classic CMOS sensor light staring mode with the time-frequency-space agile pixel CAOS imager mode within one programmable optical unit to realize a high dynamic range imager for extreme light contrast conditions. The experimentally demonstrated CAOS-CMOS camera is built using a digital micromirror device, a silicon point-photo-detector with a variable gain amplifier, and a silicon CMOS sensor with a maximum rated 51.3 dB dynamic range. White light imaging of three different brightness simultaneously viewed targets, that is not possible by the CMOS sensor, is achieved by the CAOS-CMOS camera demonstrating an 82.06 dB dynamic range. Applications for the camera include industrial machine vision, welding, laser analysis, automotive, night vision, surveillance and multispectral military systems.

  12. A CMOS Time-Resolved Fluorescence Lifetime Analysis Micro-System

    PubMed Central

    Rae, Bruce R.; Muir, Keith R.; Gong, Zheng; McKendry, Jonathan; Girkin, John M.; Gu, Erdan; Renshaw, David; Dawson, Martin D.; Henderson, Robert K.

    2009-01-01

    We describe a CMOS-based micro-system for time-resolved fluorescence lifetime analysis. It comprises a 16 × 4 array of single-photon avalanche diodes (SPADs) fabricated in 0.35 μm high-voltage CMOS technology with in-pixel time-gated photon counting circuitry and a second device incorporating an 8 × 8 AlInGaN blue micro-pixellated light-emitting diode (micro-LED) array bump-bonded to an equivalent array of LED drivers realized in a standard low-voltage 0.35 μm CMOS technology, capable of producing excitation pulses with a width of 777 ps (FWHM). This system replaces instrumentation based on lasers, photomultiplier tubes, bulk optics and discrete electronics with a PC-based micro-system. Demonstrator lifetime measurements of colloidal quantum dot and Rhodamine samples are presented. PMID:22291564

  13. Nano-Launcher Technologies, Approaches, and Life Cycle Assessment. Phase II

    NASA Technical Reports Server (NTRS)

    Zapata, Edgar

    2014-01-01

    Assist in understanding NASA technology and investment approaches, and other driving factors, necessary for enabling dedicated nano-launchers by industry at a cost and flight rate that (1) could support and be supported by an emerging nano-satellite market and (2) would benefit NASAs needs. Develop life-cycle cost, performance and other NASA analysis tools or models required to understand issues, drivers and challenges.

  14. Nicholas Metropolis Award for Outstanding Doctoral Thesis Work in Computational Physics Talk: Understanding Nano-scale Electronic Systems via Large-scale Computation

    NASA Astrophysics Data System (ADS)

    Cao, Chao

    2009-03-01

    Nano-scale physical phenomena and processes, especially those in electronics, have drawn great attention in the past decade. Experiments have shown that electronic and transport properties of functionalized carbon nanotubes are sensitive to adsorption of gas molecules such as H2, NO2, and NH3. Similar measurements have also been performed to study adsorption of proteins on other semiconductor nano-wires. These experiments suggest that nano-scale systems can be useful for making future chemical and biological sensors. Aiming to understand the physical mechanisms underlying and governing property changes at nano-scale, we start off by investigating, via first-principles method, the electronic structure of Pd-CNT before and after hydrogen adsorption, and continue with coherent electronic transport using non-equilibrium Green’s function techniques combined with density functional theory. Once our results are fully analyzed they can be used to interpret and understand experimental data, with a few difficult issues to be addressed. Finally, we discuss a newly developed multi-scale computing architecture, OPAL, that coordinates simultaneous execution of multiple codes. Inspired by the capabilities of this computing framework, we present a scenario of future modeling and simulation of multi-scale, multi-physical processes.

  15. A review on high-resolution CMOS delay lines: towards sub-picosecond jitter performance.

    PubMed

    Abdulrazzaq, Bilal I; Abdul Halin, Izhal; Kawahito, Shoji; Sidek, Roslina M; Shafie, Suhaidi; Yunus, Nurul Amziah Md

    2016-01-01

    A review on CMOS delay lines with a focus on the most frequently used techniques for high-resolution delay step is presented. The primary types, specifications, delay circuits, and operating principles are presented. The delay circuits reported in this paper are used for delaying digital inputs and clock signals. The most common analog and digitally-controlled delay elements topologies are presented, focusing on the main delay-tuning strategies. IC variables, namely, process, supply voltage, temperature, and noise sources that affect delay resolution through timing jitter are discussed. The design specifications of these delay elements are also discussed and compared for the common delay line circuits. As a result, the main findings of this paper are highlighting and discussing the followings: the most efficient high-resolution delay line techniques, the trade-off challenge found between CMOS delay lines designed using either analog or digitally-controlled delay elements, the trade-off challenge between delay resolution and delay range and the proposed solutions for this challenge, and how CMOS technology scaling can affect the performance of CMOS delay lines. Moreover, the current trends and efforts used in order to generate output delayed signal with low jitter in the sub-picosecond range are presented.

  16. Formation and metrology of dual scale nano-morphology on SF(6) plasma etched silicon surfaces.

    PubMed

    Boulousis, G; Constantoudis, V; Kokkoris, G; Gogolides, E

    2008-06-25

    Surface roughness and nano-morphology in SF(6) plasma etched silicon substrates are investigated in a helicon type plasma reactor as a function of etching time and process parameters. The plasma etched surfaces are analyzed by atomic force microscopy. It is found that dual scale nano-roughness is formatted on the silicon surface comprising an underlying nano-roughness and superimposed nano-mounds. Detailed metrological quantification is proposed for the characterization of dual scale surface morphology. As etching proceeds, the mounds become higher, fewer and wider, and the underlying nano-roughness also increases. Increase in wafer temperature leads to smoother surfaces with lower, fewer and wider nano-mounds. A mechanism based on the deposition of etch inhibiting particles during the etching process is proposed for the explanation of the experimental behavior. In addition, appropriately designed experiments are conducted, and they confirm the presence of this mechanism.

  17. Simple BiCMOS CCCTA design and resistorless analog function realization.

    PubMed

    Tangsrirat, Worapong

    2014-01-01

    The simple realization of the current-controlled conveyor transconductance amplifier (CCCTA) in BiCMOS technology is introduced. The proposed BiCMOS CCCTA realization is based on the use of differential pair and basic current mirror, which results in simple structure. Its characteristics, that is, parasitic resistance (R x) and current transfer (i o/i z), are also tunable electronically by external bias currents. The realized circuit is suitable for fabrication using standard 0.35 μm BiCMOS technology. Some simple and compact resistorless applications employing the proposed CCCTA as active elements are also suggested, which show that their circuit characteristics with electronic controllability are obtained. PSPICE simulation results demonstrating the circuit behaviors and confirming the theoretical analysis are performed.

  18. Computational modeling and simulation study of electronic and thermal properties in semiconductor nanostructures

    NASA Astrophysics Data System (ADS)

    Paul, Abhijeet

    2011-07-01

    The technological progress in dimensional scaling has not only kept Silicon CMOS industry on Moore's law for the past five decades but has also benefited many other areas such as thermoelectricity, photo-voltaics, and energy storage. Extending CMOS beyond Si (More Moore, MM) and adding functional diversity to CMOS (More Than Moore, MTM) requires a thorough understanding of the basic electron and heat flow in semiconductors. Along with experiments computer modeling and simulation are playing an increasingly vital role in exploring the numerous possibilities in materials, devices and systems. With these aspects in mind the present work applies computational physics modeling and simulations to explore the, (i) electronic, (ii) thermal, and (iii) thermoelectric properties in nano-scale semiconductors. The electronic structure of zinc-blende and lead-chalcogenide nano-materials is calculated using an atomistic Tight-Binding model. The phonon dispersion in zinc-blende materials is obtained using the Modified Valence Force Field model. Electronic and thermal transport at the nano-scale is explored using Green's function method and Landauer's method. Thermoelectric properties of semiconductor nanostructures are calculated using Landauer's method. Using computer modeling and simulations the variation of the three physical properties (i-iii) are explored with varying size, transport orientation, shape, porosity, strain and alloying of nanostructures. The key findings are, (a) III-Vs and Ge with optimized strain and orientation can improve transistors' and thermoelectric performance, (b) porous Si nanowires provide a lucrative idea for enhancing the thermoelectric efficiency at room temperature, and (c) Si/Ge superlattice nanowires can be used for nano-scale tuning of lattice thermal conductivity by period control. The present work led to the development of two new interface trap density extraction methods in ultra-scaled FinFETs and correlation of the phonon shifts in Si

  19. Effect of Particle Size and Impact Velocity on Collision Behaviors Between Nano-Scale TiN Particles: MD Simulation.

    PubMed

    Yao, Hai-Long; Hu, Xiao-Zhen; Yang, Guan-Jun

    2018-06-01

    Inter-particle bonding formation which determines qualities of nano-scale ceramic coatings is influenced by particle collision behaviors during high velocity collision processes. In this study, collision behaviors between nano-scale TiN particles with different diameters were illuminated by using Molecular Dynamics simulation through controlling impact velocities. Results show that nano-scale TiN particles exhibit three states depending on particle sizes and impact velocities, i.e., bonding, bonding with localized fracturing, and rebounding. These TiN particles states are summarized into a parameter selection map providing an overview of the conditions in terms of particle sizes and velocities. Microstructure results show that localized atoms displacement and partial fracture around the impact region are main reasons for bonding formation of nano-scale ceramic particles, which shows differences from conventional particles refining and amorphization. A relationship between the adhesion energy and the rebound energy is established to understand bonding formation mechanism for nano-scale TiN particle collision. Results show that the energy relationship is depended on the particle sizes and impact velocities, and nano-scale ceramic particles can be bonded together as the adhesion energy being higher than the rebound energy.

  20. Design and Fabrication of Vertically-Integrated CMOS Image Sensors

    PubMed Central

    Skorka, Orit; Joseph, Dileepan

    2011-01-01

    Technologies to fabricate integrated circuits (IC) with 3D structures are an emerging trend in IC design. They are based on vertical stacking of active components to form heterogeneous microsystems. Electronic image sensors will benefit from these technologies because they allow increased pixel-level data processing and device optimization. This paper covers general principles in the design of vertically-integrated (VI) CMOS image sensors that are fabricated by flip-chip bonding. These sensors are composed of a CMOS die and a photodetector die. As a specific example, the paper presents a VI-CMOS image sensor that was designed at the University of Alberta, and fabricated with the help of CMC Microsystems and Micralyne Inc. To realize prototypes, CMOS dies with logarithmic active pixels were prepared in a commercial process, and photodetector dies with metal-semiconductor-metal devices were prepared in a custom process using hydrogenated amorphous silicon. The paper also describes a digital camera that was developed to test the prototype. In this camera, scenes captured by the image sensor are read using an FPGA board, and sent in real time to a PC over USB for data processing and display. Experimental results show that the VI-CMOS prototype has a higher dynamic range and a lower dark limit than conventional electronic image sensors. PMID:22163860

  1. A 45 nm Stacked CMOS Image Sensor Process Technology for Submicron Pixel.

    PubMed

    Takahashi, Seiji; Huang, Yi-Min; Sze, Jhy-Jyi; Wu, Tung-Ting; Guo, Fu-Sheng; Hsu, Wei-Cheng; Tseng, Tung-Hsiung; Liao, King; Kuo, Chin-Chia; Chen, Tzu-Hsiang; Chiang, Wei-Chieh; Chuang, Chun-Hao; Chou, Keng-Yu; Chung, Chi-Hsien; Chou, Kuo-Yu; Tseng, Chien-Hsien; Wang, Chuan-Joung; Yaung, Dun-Nien

    2017-12-05

    A submicron pixel's light and dark performance were studied by experiment and simulation. An advanced node technology incorporated with a stacked CMOS image sensor (CIS) is promising in that it may enhance performance. In this work, we demonstrated a low dark current of 3.2 e - /s at 60 °C, an ultra-low read noise of 0.90 e - ·rms, a high full well capacity (FWC) of 4100 e - , and blooming of 0.5% in 0.9 μm pixels with a pixel supply voltage of 2.8 V. In addition, the simulation study result of 0.8 μm pixels is discussed.

  2. Investigation on the special Smith-Purcell radiation from a nano-scale rectangular metallic grating

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Li, Weiwei; Liu, Weihao, E-mail: liuwhao@ustc.edu.cn; Jia, Qika

    The special Smith-Purcell radiation (S-SPR), which is from the radiating eigen modes of a grating, has remarkable higher intensity than the ordinary Smith-Purcell radiation. Yet in previous studies, the gratings were treated as perfect conductor without considering the surface plasmon polaritons (SPPs) which are of significance for the nano-scale gratings especially in the optical region. In present paper, the rigorous theoretical investigations on the S-SPR from a nano-grating with SPPs taken into consideration are carried out. The dispersion relations and radiation characteristics are obtained, and the results are verified by simulations. According to the analyses, the tunable light radiation canmore » be achieved by the S-SPR from a nano-grating, which offers a new prospect for developing the nano-scale light sources.« less

  3. Multi-physics modelling contributions to investigate the atmospheric cosmic rays on the single event upset sensitivity along the scaling trend of CMOS technologies.

    PubMed

    Hubert, G; Regis, D; Cheminet, A; Gatti, M; Lacoste, V

    2014-10-01

    Particles originating from primary cosmic radiation, which hit the Earth's atmosphere give rise to a complex field of secondary particles. These particles include neutrons, protons, muons, pions, etc. Since the 1980s it has been known that terrestrial cosmic rays can penetrate the natural shielding of buildings, equipment and circuit package and induce soft errors in integrated circuits. Recently, research has shown that commercial static random access memories are now so small and sufficiently sensitive that single event upsets (SEUs) may be induced from the electronic stopping of a proton. With continued advancements in process size, this downward trend in sensitivity is expected to continue. Then, muon soft errors have been predicted for nano-electronics. This paper describes the effects in the specific cases such as neutron-, proton- and muon-induced SEU observed in complementary metal-oxide semiconductor. The results will allow investigating the technology node sensitivity along the scaling trend. © The Author 2014. Published by Oxford University Press. All rights reserved. For Permissions, please email: journals.permissions@oup.com.

  4. The Neurologic Assessment in Neuro-Oncology (NANO) Scale as an Assessment Tool for Survival in Patients With Primary Glioblastoma.

    PubMed

    Ung, Timothy H; Ney, Douglas E; Damek, Denise; Rusthoven, Chad G; Youssef, A Samy; Lillehei, Kevin O; Ormond, D Ryan

    2018-03-30

    The Neurologic Assessment in Neuro-Oncology (NANO) scale is a standardized objective metric designed to measure neurological function in neuro-oncology. Current neuroradiological evaluation guidelines fail to use specific clinical criteria for progression. To determine if the NANO scale was a reliable assessment tool in glioblastoma (GBM) patients and whether it correlated to survival. Our group performed a retrospective review of all patients with newly diagnosed GBM from January 1, 2010, through December 31, 2012, at our institution. We applied the NANO scale, Karnofsky performance score (KPS), Eastern Cooperative Oncology Group (ECOG) scale, Macdonald criteria, and the Response Assessment in Neuro-Oncology (RANO) criteria to patients at the time of diagnosis as well as at 3, 6, and 12 mo. Initial NANO score was correlated with overall survival at time of presentation. NANO progression was correlated with decreased survival in patients at 6 and 12 mo. A decrease in KPS was associated with survival at 3 and 6 mo, an increase in ECOG score was associated only at 3 mo, and radiological evaluation (RANO and Macdonald) was correlated at 3 and 6 mo. Only the NANO scale was associated with patient survival at 1 yr. NANO progression was the only metric that was linked to decreased overall survival when compared to RANO and Macdonald at 6 and 12 mo. The NANO scale is specific to neuro-oncology and can be used to assess patients with glioma. This retrospective analysis demonstrates the usefulness of the NANO scale in glioblastoma.

  5. Nano-Scale Spatial Assessment of Calcium Distribution in Coccolithophores Using Synchrotron-Based Nano-CT and STXM-NEXAFS

    PubMed Central

    Sun, Shiyong; Yao, Yanchen; Zou, Xiang; Fan, Shenglan; Zhou, Qing; Dai, Qunwei; Dong, Faqin; Liu, Mingxue; Nie, Xiaoqin; Tan, Daoyong; Li, Shuai

    2014-01-01

    Calcified coccolithophores generate calcium carbonate scales around their cell surface. In light of predicted climate change and the global carbon cycle, the biomineralization ability of coccoliths has received growing interest. However, the underlying biomineralization mechanism is not yet well understood; the lack of non-invasive characterizing tools to obtain molecular level information involving biogenic processes and biomineral components remain significant challenges. In the present study, synchrotron-based Nano-computed Tomography (Nano-CT) and Scanning Transmission X-ray Microscopy-Near-edge X-ray Absorption Fine Structure Spectromicroscopy (STXM-NEXAFS) techniques were employed to identify Ca spatial distribution and investigate the compositional chemistry and distinctive features of the association between biomacromolecules and mineral components of calcite present in coccoliths. The Nano-CT results show that the coccolith scale vesicle is similar as a continuous single channel. The mature coccoliths were intracellularly distributed and immediately ejected and located at the exterior surface to form a coccoshpere. The NEXAFS spectromicroscopy results of the Ca L edge clearly demonstrate the existence of two levels of gradients spatially, indicating two distinctive forms of Ca in coccoliths: a crystalline-poor layer surrounded by a relatively crystalline-rich layer. The results show that Sr is absorbed by the coccoliths and that Sr/Ca substitution is rather homogeneous within the coccoliths. Our findings indicate that synchrotron-based STXM-NEXAFS and Nano-CT are excellent tools for the study of biominerals and provide information to clarify biomineralization mechanism. PMID:25530614

  6. CMOS-compatible photonic devices for single-photon generation

    NASA Astrophysics Data System (ADS)

    Xiong, Chunle; Bell, Bryn; Eggleton, Benjamin J.

    2016-09-01

    Sources of single photons are one of the key building blocks for quantum photonic technologies such as quantum secure communication and powerful quantum computing. To bring the proof-of-principle demonstration of these technologies from the laboratory to the real world, complementary metal-oxide-semiconductor (CMOS)-compatible photonic chips are highly desirable for photon generation, manipulation, processing and even detection because of their compactness, scalability, robustness, and the potential for integration with electronics. In this paper, we review the development of photonic devices made from materials (e.g., silicon) and processes that are compatible with CMOS fabrication facilities for the generation of single photons.

  7. A Biosensor-CMOS Platform and Integrated Readout Circuit in 0.18-μm CMOS Technology for Cancer Biomarker Detection.

    PubMed

    Alhoshany, Abdulaziz; Sivashankar, Shilpa; Mashraei, Yousof; Omran, Hesham; Salama, Khaled N

    2017-08-23

    This paper presents a biosensor-CMOS platform for measuring the capacitive coupling of biorecognition elements. The biosensor is designed, fabricated, and tested for the detection and quantification of a protein that reveals the presence of early-stage cancer. For the first time, the spermidine/spermine N1 acetyltransferase (SSAT) enzyme has been screened and quantified on the surface of a capacitive sensor. The sensor surface is treated to immobilize antibodies, and the baseline capacitance of the biosensor is reduced by connecting an array of capacitors in series for fixed exposure area to the analyte. A large sensing area with small baseline capacitance is implemented to achieve a high sensitivity to SSAT enzyme concentrations. The sensed capacitance value is digitized by using a 12-bit highly digital successive-approximation capacitance-to-digital converter that is implemented in a 0.18 μm CMOS technology. The readout circuit operates in the near-subthreshold regime and provides power and area efficient operation. The capacitance range is 16.137 pF with a 4.5 fF absolute resolution, which adequately covers the concentrations of 10 mg/L, 5 mg/L, 2.5 mg/L, and 1.25 mg/L of the SSAT enzyme. The concentrations were selected as a pilot study, and the platform was shown to demonstrate high sensitivity for SSAT enzymes on the surface of the capacitive sensor. The tested prototype demonstrated 42.5 μS of measurement time and a total power consumption of 2.1 μW.

  8. A Biosensor-CMOS Platform and Integrated Readout Circuit in 0.18-μm CMOS Technology for Cancer Biomarker Detection

    PubMed Central

    Alhoshany, Abdulaziz; Sivashankar, Shilpa; Mashraei, Yousof; Omran, Hesham; Salama, Khaled N.

    2017-01-01

    This paper presents a biosensor-CMOS platform for measuring the capacitive coupling of biorecognition elements. The biosensor is designed, fabricated, and tested for the detection and quantification of a protein that reveals the presence of early-stage cancer. For the first time, the spermidine/spermine N1 acetyltransferase (SSAT) enzyme has been screened and quantified on the surface of a capacitive sensor. The sensor surface is treated to immobilize antibodies, and the baseline capacitance of the biosensor is reduced by connecting an array of capacitors in series for fixed exposure area to the analyte. A large sensing area with small baseline capacitance is implemented to achieve a high sensitivity to SSAT enzyme concentrations. The sensed capacitance value is digitized by using a 12-bit highly digital successive-approximation capacitance-to-digital converter that is implemented in a 0.18 μm CMOS technology. The readout circuit operates in the near-subthreshold regime and provides power and area efficient operation. The capacitance range is 16.137 pF with a 4.5 fF absolute resolution, which adequately covers the concentrations of 10 mg/L, 5 mg/L, 2.5 mg/L, and 1.25 mg/L of the SSAT enzyme. The concentrations were selected as a pilot study, and the platform was shown to demonstrate high sensitivity for SSAT enzymes on the surface of the capacitive sensor. The tested prototype demonstrated 42.5 μS of measurement time and a total power consumption of 2.1 μW. PMID:28832523

  9. Post place and route design-technology co-optimization for scaling at single-digit nodes with constant ground rules

    NASA Astrophysics Data System (ADS)

    Mattii, Luca; Milojevic, Dragomir; Debacker, Peter; Berekovic, Mladen; Sherazi, Syed Muhammad Yasser; Chava, Bharani; Bardon, Marie Garcia; Schuddinck, Pieter; Rodopoulos, Dimitrios; Baert, Rogier; Gerousis, Vassilios; Ryckaert, Julien; Raghavan, Praveen

    2018-01-01

    Standard-cell design, technology choices, and place and route (P&R) efficiency are deeply interrelated in CMOS technology nodes below 10 nm, where lower number of tracks cells and higher pin densities pose increasingly challenging problems to the router in terms of congestion and pin accessibility. To evaluate and downselect the best solutions, a holistic design-technology co-optimization approach leveraging state-of-the-art P&R tools is thus necessary. We adopt such an approach using the imec N7 technology platform, with contacted poly pitch of 42 nm and tightest metal pitch of 32 nm, by comparing post P&R area of an IP block for different standard cell configurations, technology options, and cell height. Keeping the technology node and the set of ground rules unchanged, we demonstrate that a careful combination of these solutions can enable area gains of up to 50%, comparable with the area benefits of migrating to another node. We further demonstrate that these area benefits can be achieved at isoperformance with >20% reduced power. As at the end of the CMOS roadmap, conventional scaling enacted through pitch reduction is made more and more challenging by constraints imposed by lithography limits, material resistivity, manufacturability, and ultimately wafer cost, the approach shown herein offers a valid, attractive, and low-cost alternative.

  10. Wavelength-scale photonic-crystal laser formed by electron-beam-induced nano-block deposition.

    PubMed

    Seo, Min-Kyo; Kang, Ju-Hyung; Kim, Myung-Ki; Ahn, Byeong-Hyeon; Kim, Ju-Young; Jeong, Kwang-Yong; Park, Hong-Gyu; Lee, Yong-Hee

    2009-04-13

    A wavelength-scale cavity is generated by printing a carbonaceous nano-block on a photonic-crystal waveguide. The nanometer-size carbonaceous block is grown at a pre-determined region by the electron-beam-induced deposition method. The wavelength-scale photonic-crystal cavity operates as a single mode laser, near 1550 nm with threshold of approximately 100 microW at room temperature. Finite-difference time-domain computations show that a high-quality-factor cavity mode is defined around the nano-block with resonant wavelength slightly longer than the dispersion-edge of the photonic-crystal waveguide. Measured near-field images exhibit photon distribution well-localized in the proximity of the printed nano-block. Linearly-polarized emission along the vertical direction is also observed.

  11. Benchmarks of a III-V TFET technology platform against the 10-nm CMOS FinFET technology node considering basic arithmetic circuits

    NASA Astrophysics Data System (ADS)

    Strangio, S.; Palestri, P.; Lanuzza, M.; Esseni, D.; Crupi, F.; Selmi, L.

    2017-02-01

    In this work, a benchmark for low-power digital applications of a III-V TFET technology platform against a conventional CMOS FinFET technology node is proposed. The analysis focuses on full-adder circuits, which are commonly identified as representative of the digital logic environment. 28T and 24T topologies, implemented in complementary-logic and transmission-gate logic, respectively, are investigated. Transient simulations are performed with a purpose-built test-bench on each single-bit full adder solution. The extracted delays and energy characteristics are post-processed and translated into figures-of-merit for multi-bit ripple-carry-adders. Trends related to the different full-adder implementations (for the same device technology platform) and to the different technology platforms (for the same full-adder topology) are presented and discussed.

  12. Microactuateur electrothermique bistable: Etude d'implementation avec une technologie standard CMOS

    NASA Astrophysics Data System (ADS)

    Ressejac, Isabelle

    The general objective of this Ph.D. thesis was to study the implementation of a new type of eletrothermal microactuator. This actuator presents the advantages to be bistable and fabricated in a standard CMOS process, allowing the integration of a microelectronics addressing circuit on the same substrate. Experimental research work, presented in this thesis, relate to the different steps carried out in order to implement this CMOS MEMS device: its theoretical conception, its fabrication with a standard CMOS technology, its micromachining as a post-process, its characterization and its electro-thermo-mechanical modeling. The device was designed and fabricated by using Mitel 1,5 mum CMOS technology and the Can-MEMS service which are both available via the Canadian Microelectronics Corporation. Fabricated monolithically within a standard CMOS process, our microactuator is suitable for large-scale integration due to its small dimensions (length ˜1000 mum and width ˜150 mum). It constitutes the basic component of a N by N matrix controlled by a microelectronic addressing system built on the same substrate. Initially, only one micromachining technique (involving TMAH) was used, and long etching times (>9 h) were requires} in order to release the microstructures. However, the passivation layer from the CMOS process could protect the underlying metal from the TMAH for a sufficient time (only ˜1--2 h). Consequently, we had to develop a micromachining strategy with shorter etching times to allow the complete release of the microstructures without damaging them. Post-processing begins with deposition (by sputtering) of a platinum layer intended to protect the abutment from subsequent etching. Our micromachining strategy is mainly based on the use of a hybrid etching process starting with a first anisotropic TMAH etching followed by a XeF2 isotropic etching. After micromachining, the released microactuator has a significant initial deflection with its tip reaching a height

  13. Fabrication of nano-scale Cu bond pads with seal design in 3D integration applications.

    PubMed

    Chen, K N; Tsang, C K; Wu, W W; Lee, S H; Lu, J Q

    2011-04-01

    A method to fabricate nano-scale Cu bond pads for improving bonding quality in 3D integration applications is reported. The effect of Cu bonding quality on inter-level via structural reliability for 3D integration applications is investigated. We developed a Cu nano-scale-height bond pad structure and fabrication process for improved bonding quality by recessing oxides using a combination of SiO2 CMP process and dilute HF wet etching. In addition, in order to achieve improved wafer-level bonding, we introduced a seal design concept that prevents corrosion and provides extra mechanical support. Demonstrations of these concepts and processes provide the feasibility of reliable nano-scale 3D integration applications.

  14. A 128 x 128 CMOS Active Pixel Image Sensor for Highly Integrated Imaging Systems

    NASA Technical Reports Server (NTRS)

    Mendis, Sunetra K.; Kemeny, Sabrina E.; Fossum, Eric R.

    1993-01-01

    A new CMOS-based image sensor that is intrinsically compatible with on-chip CMOS circuitry is reported. The new CMOS active pixel image sensor achieves low noise, high sensitivity, X-Y addressability, and has simple timing requirements. The image sensor was fabricated using a 2 micrometer p-well CMOS process, and consists of a 128 x 128 array of 40 micrometer x 40 micrometer pixels. The CMOS image sensor technology enables highly integrated smart image sensors, and makes the design, incorporation and fabrication of such sensors widely accessible to the integrated circuit community.

  15. Design and simulation of multi-color infrared CMOS metamaterial absorbers

    NASA Astrophysics Data System (ADS)

    Cheng, Zhengxi; Chen, Yongping; Ma, Bin

    2016-05-01

    Metamaterial electromagnetic wave absorbers, which usually can be fabricated in a low weight thin film structure, have a near unity absorptivity in a special waveband, and therefore have been widely applied from microwave to optical waveband. To increase absorptance of CMOS MEMS devices in 2-5 μmm waveband, multi-color infrared metamaterial absorbers are designed with CSMC 0.5 μmm 2P3M and 0.18 μmm 1P6M CMOS technology in this work. Metal-insulator-metal (MIM) three-layer MMAs and Insulator-metal-insulator-metal (MIMI) four-layer MMAs are formed by CMOS metal interconnect layers and inter metal dielectrics layer. To broaden absorption waveband in 2-5μmm range, MMAs with a combination of different sizes cross bars are designed. The top metal layer is a periodic aluminum square array or cross bar array with width ranging from submicron to several microns. The absorption peak position and intensity of MMAs can be tuned by adjusting the top aluminum micro structure array. Post-CMOS process is adopted to fabricate MMAs. The infrared absorption spectra of MMAs are verified with finite element method simulation, and the effects of top metal structure sizes, patterns, and films thickness are also simulated and intensively discussed. The simulation results show that CMOS MEMS MMAs enhance infrared absorption in 2-20 μmm. The MIM broad MMA has an average absorptance of 0.22 in 2-5 μmm waveband, and 0.76 in 8-14 μm waveband. The CMOS metamaterial absorbers can be inherently integrated in many kinds of MEMS devices fabricated with CMOS technology, such as uncooled bolometers, infrared thermal emitters.

  16. Scientific CMOS Pixels

    NASA Astrophysics Data System (ADS)

    Janesick, James; Gunawan, Ferry; Dosluoglu, Taner; Tower, John; McCaffrey, Niel

    2002-08-01

    High performance CMOS pixels are introduced; and their development is discussed. 3T (3-transistor) photodiode, 5T pinned diode, 6T photogate and 6T photogate back illuminated CMOS pixels are examined in detail, and the latter three are considered as scientific pixels. The advantages and disadvantagesof these options for scientific CMOS pixels are examined.Pixel characterization, which is used to gain a better understanding of CMOS pixels themselves, is also discussed.

  17. Scientific CMOS Pixels

    NASA Astrophysics Data System (ADS)

    Janesick, J.; Gunawan, F.; Dosluoglu, T.; Tower, J.; McCaffrey, N.

    High performance CMOS pixels are introduced and their development is discussed. 3T (3-transistor) photodiode, 5T pinned diode, 6T photogate and 6T photogate back illuminated CMOS pixels are examined in detail, and the latter three are considered as scientific pixels. The advantages and disadvantages of these options for scientific CMOS pixels are examined. Pixel characterization, which is used to gain a better understanding of CMOS pixels themselves, is also discussed.

  18. CMOS cassette for digital upgrade of film-based mammography systems

    NASA Astrophysics Data System (ADS)

    Baysal, Mehmet A.; Toker, Emre

    2006-03-01

    While full-field digital mammography (FFDM) technology is gaining clinical acceptance, the overwhelming majority (96%) of the installed base of mammography systems are conventional film-screen (FSM) systems. A high performance, and economical digital cassette based product to conveniently upgrade FSM systems to FFDM would accelerate the adoption of FFDM, and make the clinical and technical advantages of FFDM available to a larger population of women. The planned FFDM cassette is based on our commercial Digital Radiography (DR) cassette for 10 cm x 10 cm field-of-view spot imaging and specimen radiography, utilizing a 150 micron columnar CsI(Tl) scintillator and 48 micron active-pixel CMOS sensor modules. Unlike a Computer Radiography (CR) cassette, which requires an external digitizer, our DR cassette transfers acquired images to a display workstation within approximately 5 seconds of exposure, greatly enhancing patient flow. We will present the physical performance of our prototype system against other FFDM systems in clinical use today, using established objective criteria such as the Modulation Transfer Function (MTF), Detective Quantum Efficiency (DQE), and subjective criteria, such as a contrast-detail (CD-MAM) observer performance study. Driven by the strong demand from the computer industry, CMOS technology is one of the lowest cost, and the most readily accessible technologies available for FFDM today. Recent popular use of CMOS imagers in high-end consumer cameras have also resulted in significant advances in the imaging performance of CMOS sensors against rivaling CCD sensors. This study promises to take advantage of these unique features to develop the first CMOS based FFDM upgrade cassette.

  19. Performance evaluation of bimodal thermite composites : nano- vs miron-scale particles

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Moore, K. M.; Pantoya, M.; Son, S. F.

    2004-01-01

    In recent years many studies of metastable interstitial composites (MIC) have shown vast combustion improvements over traditional thermite materials. The main difference between these two materials is the size of the fuel particles in the mixture. Decreasing the fuel size from the micron to nanometer range significantly increases the combustion wave speed and ignition sensitivity. Little is known, however, about the critical level of nano-sized fuel particles needed to enhance the performance of the traditional thermite. Ignition sensitivity experiments were performed using Al/MoO{sub 3} pellets at a theoretical maximum density of 50% (2 g/cm{sup 3}). The Al fuel particles weremore » prepared as bi-modal size distributions with micron (i.e., 4 and 20 {micro}m diameter) and nano-scale Al particles. The micron-scale Al was replaced in 10% increments by 80 nm Al particles until the fuel was 100% 80 nm Al. These bi-modal distributions allow the unique characteristics of nano-scale materials to be better understood. The pellets were ignited using a 50-W CO{sub 2} laser. High speed imaging diagnostics were used to measure ignition delay times, and micro-thermocouples were used to measure ignition temperatures. Combustion wave speeds were also examined.« less

  20. Design and implementation of a low-power SOI CMOS receiver

    NASA Astrophysics Data System (ADS)

    Zencir, Ertan

    There is a strong demand for wireless communications in civilian and military applications, and space explorations. This work attempts to implement a low-power, high-performance fully-integrated receiver for deep space communications using Silicon on Insulator (SOI) CMOS technology. Design and implementation of a UHF low-IF receiver front-end in a 0.35-mum SOI CMOS technology are presented. Problems and challenges in implementing a highly integrated receiver at UHF are identified. Low-IF architecture, suitable for low-power design, has been adopted to mitigate the noise at the baseband. Design issues of the receiver building blocks including single-ended and differential LNA's, passive and active mixers, and variable gain/bandwidth complex filters are discussed. The receiver is designed to have a variable conversion gain of more than 100 dB with a 70 dB image rejection and a power dissipation of 45 mW from a 2.5-V supply. Design and measured performance of the LNA's, and the mixer are presented. Measurement results of RF front-end blocks including a single-ended LNA, a differential LNA, and a double-balanced mixer demonstrate the low power realizability of RF front-end circuits in SOI CMOS technology. We also report on the design and simulation of the image-rejecting complex IF filter and the full receiver circuit. Gain, noise, and linearity performance of the receiver components prove the viability of fully integrated low-power receivers in SOI CMOS technology.

  1. Moving Beyond 3D Hetero-Integration and Towards Monolithic Integration of Phase-Change RF Switches with SiGe BiCMOS

    DTIC Science & Technology

    2016-03-31

    Corporation, Linthicum, Maryland *Corresponding author: Pavel.Borodulin@ngc.com Abstract: A chip -scale, highly-reconfigurable transmitter and...the technology has been used in a chip -scale, reconfigurable receiver demonstration and ongoing efforts to increase the level of performance and...circuit (RF-FPGA). It consists of a heterogeneous assembly of a SiGe BiCMOS chip with multiple 3D-integrated, low-loss, phase-change switch chiplets

  2. NanoString, a novel digital color-coded barcode technology: current and future applications in molecular diagnostics.

    PubMed

    Tsang, Hin-Fung; Xue, Vivian Weiwen; Koh, Su-Pin; Chiu, Ya-Ming; Ng, Lawrence Po-Wah; Wong, Sze-Chuen Cesar

    2017-01-01

    Formalin-fixed, paraffin-embedded (FFPE) tissue sample is a gold mine of resources for molecular diagnosis and retrospective clinical studies. Although molecular technologies have expanded the range of mutations identified in FFPE samples, the applications of existing technologies are limited by the low nucleic acids yield and poor extraction quality. As a result, the routine clinical applications of molecular diagnosis using FFPE samples has been associated with many practical challenges. NanoString technologies utilize a novel digital color-coded barcode technology based on direct multiplexed measurement of gene expression and offer high levels of precision and sensitivity. Each color-coded barcode is attached to a single target-specific probe corresponding to a single gene which can be individually counted without amplification. Therefore, NanoString is especially useful for measuring gene expression in degraded clinical specimens. Areas covered: This article describes the applications of NanoString technologies in molecular diagnostics and challenges associated with its applications and the future development. Expert commentary: Although NanoString technology is still in the early stages of clinical use, it is expected that NanoString-based cancer expression panels would play more important roles in the future in classifying cancer patients and in predicting the response to therapy for better personal therapeutic care.

  3. Criticality of Low-Energy Protons in Single-Event Effects Testing of Highly-Scaled Technologies

    NASA Technical Reports Server (NTRS)

    Pellish, Jonathan A.; Marshall, Paul W.; Rodbell, Kenneth P.; Gordon, Michael S.; LaBel, Kenneth A.; Schwank, James R.; Dodds, Nathaniel A.; Castaneda, Carlos M.; Berg, Melanie D.; Kim, Hak S.; hide

    2014-01-01

    We report low-energy proton and low-energy alpha particle single-event effects (SEE) data on a 32 nm silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) latches and static random access memory (SRAM) that demonstrates the criticality of using low-energy protons for SEE testing of highly-scaled technologies. Low-energy protons produced a significantly higher fraction of multi-bit upsets relative to single-bit upsets when compared to similar alpha particle data. This difference highlights the importance of performing hardness assurance testing with protons that include energy distribution components below 2 megaelectron-volt. The importance of low-energy protons to system-level single-event performance is based on the technology under investigation as well as the target radiation environment.

  4. Radiation Tolerant, Low Noise Phase Locked Loops in 65 nm CMOS Technology

    NASA Astrophysics Data System (ADS)

    Prinzie, Jeffrey; Christiansen, Jorgen; Moreira, Paulo; Steyaert, Michiel; Leroux, Paul

    2018-04-01

    This work presents an introduction to radiation hardened Phase Locked Loops (PLLs) for nuclear and high-energy physics application. An experimental circuit has been fabricated and irradiated with Xrays up to 600 Mrad. Heavy ions with an LET between 3.2 and 69.2 MeV.cm2/mg were used to verify the SEU cross section of the devices. A Two-photon Absorption (TPA) laser facility has been used to provide detailed results on the SEU sensitivity. The presented circuit employs TMR in the digital logic and an asynchronous phase-frequency detector (PFD) is presented. The PLL has a ringand LC-oscillator to be compared experimentally. The circuit has been fabricated in a 65 nm CMOS technology.

  5. BIMOS transistor solutions for ESD protection in FD-SOI UTBB CMOS technology

    NASA Astrophysics Data System (ADS)

    Galy, Philippe; Athanasiou, S.; Cristoloveanu, S.

    2016-01-01

    We evaluate the Electro-Static Discharge (ESD) protection capability of BIpolar MOS (BIMOS) transistors integrated in ultrathin silicon film for 28 nm Fully Depleted SOI (FD-SOI) Ultra Thin Body and BOX (UTBB) high-k metal gate technology. Using as a reference our measurements in hybrid bulk-SOI structures, we extend the BIMOS design towards the ultrathin silicon film. Detailed study and pragmatic evaluations are done based on 3D TCAD simulation with standard physical models using Average Current Slope (ACS) method and quasi-static DC stress (Average Voltage Slope AVS method). These preliminary 3D TACD results are very encouraging in terms of ESD protection efficiency in advanced FD-SOI CMOS.

  6. Micro/nano-particles and Cells: Manipulation, Transport, and Self-assembly

    DTIC Science & Technology

    2014-10-23

    SECURITY CLASSIFICATION OF: Technologies that control nano- and micron- sized inert as well as biological materials are crucial to realizing engineered...that control nano- and micron- sized inert as well as biological materials are crucial to realizing engineered systems that can assemble, transport, and...nano-scale particles offer several advantages as building blocks of artificial materials . The relative ease of modifying their charge states

  7. Research-grade CMOS image sensors for remote sensing applications

    NASA Astrophysics Data System (ADS)

    Saint-Pe, Olivier; Tulet, Michel; Davancens, Robert; Larnaudie, Franck; Magnan, Pierre; Martin-Gonthier, Philippe; Corbiere, Franck; Belliot, Pierre; Estribeau, Magali

    2004-11-01

    Imaging detectors are key elements for optical instruments and sensors on board space missions dedicated to Earth observation (high resolution imaging, atmosphere spectroscopy...), Solar System exploration (micro cameras, guidance for autonomous vehicle...) and Universe observation (space telescope focal planes, guiding sensors...). This market has been dominated by CCD technology for long. Since the mid-90s, CMOS Image Sensors (CIS) have been competing with CCDs for consumer domains (webcams, cell phones, digital cameras...). Featuring significant advantages over CCD sensors for space applications (lower power consumption, smaller system size, better radiations behaviour...), CMOS technology is also expanding in this field, justifying specific R&D and development programs funded by national and European space agencies (mainly CNES, DGA and ESA). All along the 90s and thanks to their increasingly improving performances, CIS have started to be successfully used for more and more demanding space applications, from vision and control functions requiring low-level performances to guidance applications requiring medium-level performances. Recent technology improvements have made possible the manufacturing of research-grade CIS that are able to compete with CCDs in the high-performances arena. After an introduction outlining the growing interest of optical instruments designers for CMOS image sensors, this paper will present the existing and foreseen ways to reach high-level electro-optics performances for CIS. The developments and performances of CIS prototypes built using an imaging CMOS process will be presented in the corresponding section.

  8. Research-grade CMOS image sensors for demanding space applications

    NASA Astrophysics Data System (ADS)

    Saint-Pé, Olivier; Tulet, Michel; Davancens, Robert; Larnaudie, Franck; Magnan, Pierre; Corbière, Franck; Martin-Gonthier, Philippe; Belliot, Pierre

    2004-06-01

    Imaging detectors are key elements for optical instruments and sensors on board space missions dedicated to Earth observation (high resolution imaging, atmosphere spectroscopy...), Solar System exploration (micro cameras, guidance for autonomous vehicle...) and Universe observation (space telescope focal planes, guiding sensors...). This market has been dominated by CCD technology for long. Since the mid-90s, CMOS Image Sensors (CIS) have been competing with CCDs for more and more consumer domains (webcams, cell phones, digital cameras...). Featuring significant advantages over CCD sensors for space applications (lower power consumption, smaller system size, better radiations behaviour...), CMOS technology is also expanding in this field, justifying specific R&D and development programs funded by national and European space agencies (mainly CNES, DGA, and ESA). All along the 90s and thanks to their increasingly improving performances, CIS have started to be successfully used for more and more demanding applications, from vision and control functions requiring low-level performances to guidance applications requiring medium-level performances. Recent technology improvements have made possible the manufacturing of research-grade CIS that are able to compete with CCDs in the high-performances arena. After an introduction outlining the growing interest of optical instruments designers for CMOS image sensors, this talk will present the existing and foreseen ways to reach high-level electro-optics performances for CIS. The developments of CIS prototypes built using an imaging CMOS process and of devices based on improved designs will be presented.

  9. Research-grade CMOS image sensors for demanding space applications

    NASA Astrophysics Data System (ADS)

    Saint-Pé, Olivier; Tulet, Michel; Davancens, Robert; Larnaudie, Franck; Magnan, Pierre; Corbière, Franck; Martin-Gonthier, Philippe; Belliot, Pierre

    2017-11-01

    Imaging detectors are key elements for optical instruments and sensors on board space missions dedicated to Earth observation (high resolution imaging, atmosphere spectroscopy...), Solar System exploration (micro cameras, guidance for autonomous vehicle...) and Universe observation (space telescope focal planes, guiding sensors...). This market has been dominated by CCD technology for long. Since the mid- 90s, CMOS Image Sensors (CIS) have been competing with CCDs for more and more consumer domains (webcams, cell phones, digital cameras...). Featuring significant advantages over CCD sensors for space applications (lower power consumption, smaller system size, better radiations behaviour...), CMOS technology is also expanding in this field, justifying specific R&D and development programs funded by national and European space agencies (mainly CNES, DGA, and ESA). All along the 90s and thanks to their increasingly improving performances, CIS have started to be successfully used for more and more demanding applications, from vision and control functions requiring low-level performances to guidance applications requiring medium-level performances. Recent technology improvements have made possible the manufacturing of research-grade CIS that are able to compete with CCDs in the high-performances arena. After an introduction outlining the growing interest of optical instruments designers for CMOS image sensors, this talk will present the existing and foreseen ways to reach high-level electro-optics performances for CIS. The developments of CIS prototypes built using an imaging CMOS process and of devices based on improved designs will be presented.

  10. Investigating Degradation Mechanisms in 130 nm and 90 nm Commercial CMOS Technologies Under Extreme Radiation Conditions

    NASA Astrophysics Data System (ADS)

    Ratti, Lodovico; Gaioni, Luigi; Manghisoni, Massimo; Traversi, Gianluca; Pantano, Devis

    2008-08-01

    The purpose of this paper is to study the mechanisms underlying performance degradation in 130 nm and 90 nm commercial CMOS technologies exposed to high doses of ionizing radiation. The investigation has been mainly focused on their noise properties in view of applications to the design of low-noise, low-power analog circuits to be operated in harsh environment. Experimental data support the hypothesis that charge trapping in shallow trench isolation (STI), besides degrading the static characteristics of interdigitated NMOS transistors, also affects their noise performances in a substantial fashion. The model discussed in this paper, presented in a previous work focused on CMOS devices irradiated with a 10 Mrad(SiO2) gamma -ray dose, has been applied here also to transistors exposed to much higher (up to 100 Mrad(SiO2 )) doses of X-rays. Such a model is able to account for the extent of the observed noise degradation as a function of the device polarity, dimensions and operating point.

  11. Arrays of suspended silicon nanowires defined by ion beam implantation: mechanical coupling and combination with CMOS technology.

    PubMed

    Llobet, J; Rius, G; Chuquitarqui, A; Borrisé, X; Koops, R; van Veghel, M; Perez-Murano, F

    2018-04-02

    We present the fabrication, operation, and CMOS integration of arrays of suspended silicon nanowires (SiNWs). The functional structures are obtained by a top-down fabrication approach consisting in a resistless process based on focused ion beam irradiation, causing local gallium implantation and silicon amorphization, plus selective silicon etching by tetramethylammonium hydroxide, and a thermal annealing process in a boron rich atmosphere. The last step enables the electrical functionality of the irradiated material. Doubly clamped silicon beams are fabricated by this method. The electrical readout of their mechanical response can be addressed by a frequency down-mixing detection technique thanks to an enhanced piezoresistive transduction mechanism. Three specific aspects are discussed: (i) the engineering of mechanically coupled SiNWs, by making use of the nanometer scale overhang that it is inherently-generated with this fabrication process, (ii) the statistical distribution of patterned lateral dimensions when fabricating large arrays of identical devices, and (iii) the compatibility of the patterning methodology with CMOS circuits. Our results suggest that the application of this method to the integration of large arrays of suspended SiNWs with CMOS circuitry is interesting in view of applications such as advanced radio frequency band pass filters and ultra-high-sensitivity mass sensors.

  12. Arrays of suspended silicon nanowires defined by ion beam implantation: mechanical coupling and combination with CMOS technology

    NASA Astrophysics Data System (ADS)

    Llobet, J.; Rius, G.; Chuquitarqui, A.; Borrisé, X.; Koops, R.; van Veghel, M.; Perez-Murano, F.

    2018-04-01

    We present the fabrication, operation, and CMOS integration of arrays of suspended silicon nanowires (SiNWs). The functional structures are obtained by a top-down fabrication approach consisting in a resistless process based on focused ion beam irradiation, causing local gallium implantation and silicon amorphization, plus selective silicon etching by tetramethylammonium hydroxide, and a thermal annealing process in a boron rich atmosphere. The last step enables the electrical functionality of the irradiated material. Doubly clamped silicon beams are fabricated by this method. The electrical readout of their mechanical response can be addressed by a frequency down-mixing detection technique thanks to an enhanced piezoresistive transduction mechanism. Three specific aspects are discussed: (i) the engineering of mechanically coupled SiNWs, by making use of the nanometer scale overhang that it is inherently-generated with this fabrication process, (ii) the statistical distribution of patterned lateral dimensions when fabricating large arrays of identical devices, and (iii) the compatibility of the patterning methodology with CMOS circuits. Our results suggest that the application of this method to the integration of large arrays of suspended SiNWs with CMOS circuitry is interesting in view of applications such as advanced radio frequency band pass filters and ultra-high-sensitivity mass sensors.

  13. Density functional theory studies on the nano-scaled composites consisted of graphene and acyl hydrazone molecules

    NASA Astrophysics Data System (ADS)

    Ren, J. L.; Zhou, L.; Lv, Z. C.; Ding, C. H.; Wu, Y. H.; Bai, H. C.

    2016-07-01

    Graphene, which is the first obtained single atomic layer 2D materials, has drawn a great of concern in nano biotechnology due to the unique property. On one hand, acyl hydrazone compounds belonging to the Schif bases have aroused considerable attention in medicine, pharmacy, and analytical reagent. However, few understanding about the interaction between graphene and acyl hydrazone molecules is now available. And such investigations are much crucial for the applications of these new nano-scaled composites. The current work revealed theoretical investigations on the nano-scaled composites built by acyl hydrazone molecules loaded on the surface of graphene. The relative energy, electronic property and the interaction between the counterparts of graphene/acyl hydrazone composites are investigated based on the density functional theory calculations. According to the obtained adsorption energy, the formation of the nano-scaled composite from the isolated graphene and acyl hydrazone molecule is exothermic, and thus it is energetically favorable to form these nano composites in viewpoint of total energy change. The frontier molecular orbital for the nano composite is mainly distributed at the graphene part, leading to that the energy levels of the frontier molecular orbital of the nano composites are very close to that of isolated graphene. Moreover, the counterpart interaction for the graphene/acyl hydrazone composites is also explored based on the discussions of orbital hybridization, charge redistribution and Van der Waals interaction.

  14. NanoCrySP technology for generation of drug nanocrystals: translational aspects and business potential.

    PubMed

    Shete, Ganesh; Bansal, Arvind Kumar

    2016-08-01

    Drug nanocrystals have rapidly evolved into a mature drug delivery strategy in the last decade, with almost 16 products currently on the market. Several "top-down" technologies are available in the market for generation of nanocrystals. Despite several advantages, very few bottom-up technologies have been explored for commercial purpose. This short communication highlights a novel, bottom-up, spray drying based technology-NanoCrySP-to generate drug nanocrystals. Nanocrystals are generated in the presence of non-polymeric excipients that act as crystallization inducer for the drug. Excipients encourage crystallization of drug by plasticization, primary heterogeneous nucleation, and imparting physical barrier to crystal growth. Nanocrystals have shown significant improvement in dissolution and thereby oral bioavailability. NanoCrySP technology is protected through patents in India, the USA, and the European Union. NanoCrySP can be utilized for (i) pharmaceutical development of new chemical entities, (ii) differentiated products of existing molecules, and (iii) generic drug products. The aggregation of drug nanocrystals generated using NanoCrySP poses significant challenges in the nanocrystal-based product development. Addition of stabilizers either during spray drying or during dissolution has shown beneficial effects.

  15. Ecological assessment of nano-enabled supercapacitors for automotive applications

    NASA Astrophysics Data System (ADS)

    Weil, M.; Dura, H.; Shimon, B.; Baumann, M.; Zimmermann, B.; Ziemann, S.; Lei, C.; Markoulidis, F.; Lekakou, T.; Decker, M.

    2012-09-01

    New materials on nano scale have the potential to overcome existing technical barriers and are one of the most promising key technologies to enable the decoupling of economic growth and resource consumption. Developing these innovative materials for industrial applications means facing a complex quality profile, which includes among others technical, economic, and ecological aspects. So far the two latter aspects are not sufficiently included in technology development, especially from a life cycle point of view. Supercapacitors are considered a promising option for electric energy storage in hybrid and full electric cars. In comparison with presently used lithium based electro chemical storage systems supercapacitors possess a high specific power, but a relatively low specific energy. Therefore, the goal of ongoing research is to develop a new generation of supercapacitors with high specific power and high specific energy. To reach this goal particularly nano materials are developed and tested on cell level. In the presented study the ecological implications (regarding known environmental effects) of carbon based nano materials are analysed using Life Cycle Assessment (LCA). Major attention is paid to efficiency gains of nano particle production due to scaling up of such processes from laboratory to industrial production scales. Furthermore, a developed approach will be displayed, how to assess the environmental impact of nano materials on an automotive system level over the whole life cycle.

  16. New integration concept of PIN photodiodes in 0.35μm CMOS technologies

    NASA Astrophysics Data System (ADS)

    Jonak-Auer, I.; Teva, J.; Park, J. M.; Jessenig, S.; Rohrbacher, M.; Wachmann, E.

    2012-06-01

    We report on a new and very cost effective way to integrate PIN photo detectors into a standard CMOS process. Starting with lowly p-doped (intrinsic) EPI we need just one additional mask and ion implantation in order to provide doping concentrations very similar to standard CMOS substrates to areas outside the photoactive regions. Thus full functionality of the standard CMOS logic can be guaranteed while the photo detectors highly benefit from the low doping concentrations of the intrinsic EPI. The major advantage of this integration concept is that complete modularity of the CMOS process remains untouched by the implementation of PIN photodiodes. Functionality of the implanted region as host of logic components was confirmed by electrical measurements of relevant standard transistor as well as ESD protection devices. We also succeeded in establishing an EPI deposition process in austriamicrosystems 200mm wafer fabrication which guarantees the formation of very lowly p-doped intrinsic layers, which major semiconductor vendors could not provide. With our EPI deposition process we acquire doping levels as low as 1•1012/cm3. In order to maintain those doping levels during CMOS processing we employed special surface protection techniques. After complete CMOS processing doping concentrations were about 4•1013/cm3 at the EPI surface while the bulk EPI kept its original low doping concentrations. Photodiode parameters could further be improved by bottom antireflective coatings and a special implant to reduce dark currents. For 100×100μm2 photodiodes in 20μm thick intrinsic EPI on highly p-doped substrates we achieved responsivities of 0.57A/W at λ=675nm, capacitances of 0.066pF and dark currents of 0.8pA at 2V reverse voltage.

  17. Three-dimensional cascaded system analysis of a 50 µm pixel pitch wafer-scale CMOS active pixel sensor x-ray detector for digital breast tomosynthesis.

    PubMed

    Zhao, C; Vassiljev, N; Konstantinidis, A C; Speller, R D; Kanicki, J

    2017-03-07

    High-resolution, low-noise x-ray detectors based on the complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology have been developed and proposed for digital breast tomosynthesis (DBT). In this study, we evaluated the three-dimensional (3D) imaging performance of a 50 µm pixel pitch CMOS APS x-ray detector named DynAMITe (Dynamic Range Adjustable for Medical Imaging Technology). The two-dimensional (2D) angle-dependent modulation transfer function (MTF), normalized noise power spectrum (NNPS), and detective quantum efficiency (DQE) were experimentally characterized and modeled using the cascaded system analysis at oblique incident angles up to 30°. The cascaded system model was extended to the 3D spatial frequency space in combination with the filtered back-projection (FBP) reconstruction method to calculate the 3D and in-plane MTF, NNPS and DQE parameters. The results demonstrate that the beam obliquity blurs the 2D MTF and DQE in the high spatial frequency range. However, this effect can be eliminated after FBP image reconstruction. In addition, impacts of the image acquisition geometry and detector parameters were evaluated using the 3D cascaded system analysis for DBT. The result shows that a wider projection angle range (e.g.  ±30°) improves the low spatial frequency (below 5 mm -1 ) performance of the CMOS APS detector. In addition, to maintain a high spatial resolution for DBT, a focal spot size of smaller than 0.3 mm should be used. Theoretical analysis suggests that a pixelated scintillator in combination with the 50 µm pixel pitch CMOS APS detector could further improve the 3D image resolution. Finally, the 3D imaging performance of the CMOS APS and an indirect amorphous silicon (a-Si:H) thin-film transistor (TFT) passive pixel sensor (PPS) detector was simulated and compared.

  18. Three-dimensional cascaded system analysis of a 50 µm pixel pitch wafer-scale CMOS active pixel sensor x-ray detector for digital breast tomosynthesis

    NASA Astrophysics Data System (ADS)

    Zhao, C.; Vassiljev, N.; Konstantinidis, A. C.; Speller, R. D.; Kanicki, J.

    2017-03-01

    High-resolution, low-noise x-ray detectors based on the complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology have been developed and proposed for digital breast tomosynthesis (DBT). In this study, we evaluated the three-dimensional (3D) imaging performance of a 50 µm pixel pitch CMOS APS x-ray detector named DynAMITe (Dynamic Range Adjustable for Medical Imaging Technology). The two-dimensional (2D) angle-dependent modulation transfer function (MTF), normalized noise power spectrum (NNPS), and detective quantum efficiency (DQE) were experimentally characterized and modeled using the cascaded system analysis at oblique incident angles up to 30°. The cascaded system model was extended to the 3D spatial frequency space in combination with the filtered back-projection (FBP) reconstruction method to calculate the 3D and in-plane MTF, NNPS and DQE parameters. The results demonstrate that the beam obliquity blurs the 2D MTF and DQE in the high spatial frequency range. However, this effect can be eliminated after FBP image reconstruction. In addition, impacts of the image acquisition geometry and detector parameters were evaluated using the 3D cascaded system analysis for DBT. The result shows that a wider projection angle range (e.g.  ±30°) improves the low spatial frequency (below 5 mm-1) performance of the CMOS APS detector. In addition, to maintain a high spatial resolution for DBT, a focal spot size of smaller than 0.3 mm should be used. Theoretical analysis suggests that a pixelated scintillator in combination with the 50 µm pixel pitch CMOS APS detector could further improve the 3D image resolution. Finally, the 3D imaging performance of the CMOS APS and an indirect amorphous silicon (a-Si:H) thin-film transistor (TFT) passive pixel sensor (PPS) detector was simulated and compared.

  19. Nanotechnologies for Composite Structures- From Nanocomposites to Multifunctional Nano-Enabled Fibre Reinforced Composites for Spacecrafts

    NASA Astrophysics Data System (ADS)

    Kostopoulos, Vassilis; Vavouliotis, Antonios; Baltopoulos, Athanasios; Sotiririadis, George; Masouras, Athanasios; Pambaguian, Laurent

    2014-06-01

    The past decade, extensive efforts have been invested in understanding the nano-scale and revealing the capabilities offered by nanotechnology products to structural materials. Nevertheless, a major issue faced lately more seriously due to the interest of industry is on how to incorporate these nano-species into the final composite structure through existing manufacturing processes and infrastructure. In this work, we present the experience obtained from the latest nanotechnology research activities supported by ESA. The paper focuses on prepreg composite manufacturing technology and addresses:- Approaches for nano-enabling of composites- Up-scaling strategies towards final structures- Latest results on performance of nano-enabledfiber reinforced compositesSeveral approaches for the utilization of nanotechnology products in structural composite structures have been proposed and are reviewed, in short along with respective achieved results. A variety of nano-fillers has been proposed and employed, individually or in combination in hybrid forms, to approach the desired performance. A major part of the work deals with the up-scaling routes of these technologies to reach final products and industrial scales and processes while meeting end-user performance.

  20. Radiation-hardened-by-design clocking circuits in 0.13-μm CMOS technology

    NASA Astrophysics Data System (ADS)

    You, Y.; Huang, D.; Chen, J.; Gong, D.; Liu, T.; Ye, J.

    2014-01-01

    We present a single-event-hardened phase-locked loop for frequency generation applications and a digital delay-locked loop for DDR2 memory interface applications. The PLL covers a 12.5 MHz to 500 MHz frequency range with an RMS Jitter (RJ) of 4.70-pS. The DLL operates at 267 MHz and has a phase resolution of 60-pS. Designed in 0.13-μm CMOS technology, the PLL and the DLL are hardened against SEE for charge injection of 250 fC. The PLL and the DLL consume 17 mW and 22 mW of power under a 1.5 V power supply, respectively.

  1. A 45 nm Stacked CMOS Image Sensor Process Technology for Submicron Pixel †

    PubMed Central

    Takahashi, Seiji; Huang, Yi-Min; Sze, Jhy-Jyi; Wu, Tung-Ting; Guo, Fu-Sheng; Hsu, Wei-Cheng; Tseng, Tung-Hsiung; Liao, King; Kuo, Chin-Chia; Chen, Tzu-Hsiang; Chiang, Wei-Chieh; Chuang, Chun-Hao; Chou, Keng-Yu; Chung, Chi-Hsien; Chou, Kuo-Yu; Tseng, Chien-Hsien; Wang, Chuan-Joung; Yaung, Dun-Nien

    2017-01-01

    A submicron pixel’s light and dark performance were studied by experiment and simulation. An advanced node technology incorporated with a stacked CMOS image sensor (CIS) is promising in that it may enhance performance. In this work, we demonstrated a low dark current of 3.2 e−/s at 60 °C, an ultra-low read noise of 0.90 e−·rms, a high full well capacity (FWC) of 4100 e−, and blooming of 0.5% in 0.9 μm pixels with a pixel supply voltage of 2.8 V. In addition, the simulation study result of 0.8 μm pixels is discussed. PMID:29206162

  2. Modeling and analysis of sub-surface leakage current in nano-MOSFET under cutoff regime

    NASA Astrophysics Data System (ADS)

    Swami, Yashu; Rai, Sanjeev

    2017-02-01

    The high leakage current in nano-meter regimes is becoming a significant portion of power dissipation in nano-MOSFET circuits as threshold voltage, channel length, and gate oxide thickness are scaled down to nano-meter range. Precise leakage current valuation and meticulous modeling of the same at nano-meter technology scale is an increasingly a critical work in designing the low power nano-MOSFET circuits. We present a specific compact model for sub-threshold regime leakage current in bulk driven nano-MOSFETs. The proposed logical model is instigated and executed into the latest updated PTM bulk nano-MOSFET model and is found to be in decent accord with technology-CAD simulation data. This paper also reviews various transistor intrinsic leakage mechanisms for nano-MOSFET exclusively in weak inversion, like drain-induced barricade lowering (DIBL), gate-induced drain leakage (GIDL), gate oxide tunneling (GOT) leakage etc. The root cause of the sub-surface leakage current is mainly due to the nano-scale short channel length causing source-drain coupling even in sub-threshold domain. Consequences leading to carriers triumphing the barricade between the source and drain. The enhanced model effectively considers the following parameter dependence in the account for better-quality value-added results like drain-to-source bias (VDS), gate-to-source bias (VGS), channel length (LG), source/drain junction depth (Xj), bulk doping concentration (NBULK), and operating temperature (Top).

  3. Crystallization of high-strength nano-scale leucite glass-ceramics.

    PubMed

    Theocharopoulos, A; Chen, X; Wilson, R M; Hill, R; Cattell, M J

    2013-11-01

    Fine-grained, high strength, translucent leucite dental glass-ceramics are synthesized via controlled crystallization of finely milled glass powders. The objectives of this study were to utilize high speed planetary milling of an aluminosilicate glass for controlled surface crystallization of nano-scale leucite glass-ceramics and to test the biaxial flexural strength. An aluminosilicate glass was synthesized, attritor or planetary milled and heat-treated. Glasses and glass-ceramics were characterized using particle size analysis, X-ray diffraction and scanning electron microscopy. Experimental (fine and nanoscale) and commercial (Ceramco-3, IPS Empress Esthetic) leucite glass-ceramics were tested using the biaxial flexural strength (BFS) test. Gaussian and Weibull statistics were applied. Experimental planetary milled glass-ceramics showed an increased leucite crystal number and nano-scale median crystal sizes (0.048-0.055 μm(2)) as a result of glass particle size reduction and heat treatments. Experimental materials had significantly (p<0.05) higher mean BFS and characteristic strength values than the commercial materials. Attritor milled and planetary milled (2h) materials showed no significant (p>0.05) strength difference. All other groups' mean BFS and characteristic strengths were found to be significantly different (p<0.05) to each other. The mean (SD) MPa strengths measured were: Attritor milled: 252.4 (38.7), Planetary milled: 225.4 (41.8) [4h milling] 255.0 (35.0) [2h milling], Ceramco-3: 75.7 (6.8) and IPS Empress: 165.5 (30.6). Planetary milling enabled synthesis of nano-scale leucite glass-ceramics with high flexural strength. These materials may help to reduce problems associated with brittle fracture of all-ceramic restorations and give reduced enamel wear. Copyright © 2013 Academy of Dental Materials. Published by Elsevier Ltd. All rights reserved.

  4. Performance/price estimates for cortex-scale hardware: a design space exploration.

    PubMed

    Zaveri, Mazad S; Hammerstrom, Dan

    2011-04-01

    In this paper, we revisit the concept of virtualization. Virtualization is useful for understanding and investigating the performance/price and other trade-offs related to the hardware design space. Moreover, it is perhaps the most important aspect of a hardware design space exploration. Such a design space exploration is a necessary part of the study of hardware architectures for large-scale computational models for intelligent computing, including AI, Bayesian, bio-inspired and neural models. A methodical exploration is needed to identify potentially interesting regions in the design space, and to assess the relative performance/price points of these implementations. As an example, in this paper we investigate the performance/price of (digital and mixed-signal) CMOS and hypothetical CMOL (nanogrid) technology based hardware implementations of human cortex-scale spiking neural systems. Through this analysis, and the resulting performance/price points, we demonstrate, in general, the importance of virtualization, and of doing these kinds of design space explorations. The specific results suggest that hybrid nanotechnology such as CMOL is a promising candidate to implement very large-scale spiking neural systems, providing a more efficient utilization of the density and storage benefits of emerging nano-scale technologies. In general, we believe that the study of such hypothetical designs/architectures will guide the neuromorphic hardware community towards building large-scale systems, and help guide research trends in intelligent computing, and computer engineering. Copyright © 2010 Elsevier Ltd. All rights reserved.

  5. CMOS-APS Detectors for Solar Physics: Lessons Learned during the SWAP Preflight Calibration

    NASA Astrophysics Data System (ADS)

    de Groof, A.; Berghmans, D.; Nicula, B.; Halain, J.-P.; Defise, J.-M.; Thibert, T.; Schühle, U.

    2008-05-01

    CMOS-APS imaging detectors open new opportunities for remote sensing in solar physics beyond what classical CCDs can provide, offering far less power consumption, simpler electronics, better radiation hardness, and the possibility of avoiding a mechanical shutter. The SWAP telescope onboard the PROBA2 technology demonstration satellite of the European Space Agency will be the first actual implementation of a CMOS-APS detector for solar physics in orbit. One of the goals of the SWAP project is precisely to acquire experience with the CMOS-APS technology in a real-live space science context. Such a precursor mission is essential in the preparation of missions such as Solar Orbiter where the extra CMOS-APS functionalities will be hard requirements. The current paper concentrates on specific CMOS-APS issues that were identified during the SWAP preflight calibration measurements. We will discuss the different readout possibilities that the CMOS-APS detector of SWAP provides and their associated pros and cons. In particular we describe the “image lag” effect, which results in a contamination of each image with a remnant of the previous image. We have characterised this effect for the specific SWAP implementation and we conclude with a strategy on how to successfully circumvent the problem and actually take benefit of it for solar monitoring.

  6. Exploring Chondrule and CAI Rims Using Micro- and Nano-Scale Petrological and Compositional Analysis

    NASA Astrophysics Data System (ADS)

    Cartwright, J. A.; Perez-Huerta, A.; Leitner, J.; Vollmer, C.

    2017-12-01

    As the major components within chondrites, chondrules (mm-sized droplets of quenched silicate melt) and calcium-aluminum-rich inclusions (CAI, refractory) represent the most abundant and the earliest materials that solidified from the solar nebula. However, the exact formation mechanisms of these clasts, and whether these processes are related, remains unconstrained, despite extensive petrological and compositional study. By taking advantage of recent advances in nano-scale tomographical techniques, we have undertaken a combined micro- and nano-scale study of CAI and chondrule rim morphologies, to investigate their formation mechanisms. The target lithologies for this research are Wark-Lovering rims (WLR), and fine-grained rims (FGR) around CAIs and chondrules respectively, present within many chondrites. The FGRs, which are up to 100 µm thick, are of particular interest as recent studies have identified presolar grains within them. These grains predate the formation of our Solar System, suggesting FGR formation under nebular conditions. By contrast, WLRs are 10-20 µm thick, made of different compositional layers, and likely formed by flash-heating shortly after CAI formation, thus recording nebular conditions. A detailed multi-scale study of these respective rims will enable us to better understand their formation histories and determine the potential for commonality between these two phases, despite reports of an observed formation age difference of up to 2-3 Myr. We are using a combination of complimentary techniques on our selected target areas: 1) Micro-scale characterization using standard microscopic and compositional techniques (SEM-EBSD, EMPA); 2) Nano-scale characterization of structures using transmission electron microscopy (TEM) and elemental, isotopic and tomographic analysis with NanoSIMS and atom probe tomography (APT). Preliminary nano-scale APT analysis of FGR morphologies within the Allende carbonaceous chondrite has successfully discerned

  7. Registration of Large Motion Blurred CMOS Images

    DTIC Science & Technology

    2017-08-28

    raju@ee.iitm.ac.in - Institution : Indian Institute of Technology (IIT) Madras, India - Mailing Address : Room ESB 307c, Dept. of Electrical ...AFRL-AFOSR-JP-TR-2017-0066 Registration of Large Motion Blurred CMOS Images Ambasamudram Rajagopalan INDIAN INSTITUTE OF TECHNOLOGY MADRAS Final...NUMBER 5f.  WORK UNIT NUMBER 7. PERFORMING ORGANIZATION NAME(S) AND ADDRESS(ES) INDIAN INSTITUTE OF TECHNOLOGY MADRAS SARDAR PATEL ROAD Chennai, 600036

  8. Developing an Effective Model for Shale Gas Flow in Nano-scale Pore Clusters based on FIB-SEM Images

    NASA Astrophysics Data System (ADS)

    Jiang, W. B.; Lin, M.; Yi, Z. X.; Li, H. S.

    2016-12-01

    Nano-scale pores existed in the form of clusters are the controlling void space in shale gas reservoir. Gas transport in nanopores which has a significant influence on shale gas' recoverability displays multiple transport regimes, including viscous, slippage flow and Knudsen diffusion. In addition, it is also influenced by pore space characteristics. For convenience and efficiency consideration, it is necessary to develop an upscaling model from nano pore to pore cluster scale. Existing models are more like framework functions that provide a format, because the parameters that represent pore space characteristics are underdetermined and may have multiple possibilities. Therefore, it is urgent to make them clear and obtained a model that is closer to reality. FIB-SEM imaging technology is able to acquire three dimensional images with nanometer resolution that nano pores can be visible. Based on the images of two shale samples, we used a high-precision pore network extraction algorithm to generate equivalent pore networks and simulate multiple regime (non-Darcy) flow in it. Several structural parameters can be obtained through pore network modelling. It is found that although the throat-radius distributions are very close, throat flux-radius distributions of different samples can be divided into two categories. The variation of tortuosity with pressure and the overall trend of throat-flux distribution changes with pressure are disclosed. A deeper understanding of shale gas flow in nano-scale pore clusters is obtained. After all, an upscaling model that connects absolute permeability, apparent permeability and other characteristic parameters is proposed, and the best parameter scheme considering throat number-radius distribution and flowing porosity for this model is selected out of three schemes based on pore scale results, and it can avoid multiple-solution problem and is useful in reservoir modelling and experiment result analysis, etc. This work is supported by

  9. Ion traps fabricated in a CMOS foundry

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Mehta, K. K.; Ram, R. J.; Eltony, A. M.

    2014-07-28

    We demonstrate trapping in a surface-electrode ion trap fabricated in a 90-nm CMOS (complementary metal-oxide-semiconductor) foundry process utilizing the top metal layer of the process for the trap electrodes. The process includes doped active regions and metal interconnect layers, allowing for co-fabrication of standard CMOS circuitry as well as devices for optical control and measurement. With one of the interconnect layers defining a ground plane between the trap electrode layer and the p-type doped silicon substrate, ion loading is robust and trapping is stable. We measure a motional heating rate comparable to those seen in surface-electrode traps of similar size.more » This demonstration of scalable quantum computing hardware utilizing a commercial CMOS process opens the door to integration and co-fabrication of electronics and photonics for large-scale quantum processing in trapped-ion arrays.« less

  10. CMOS image sensor-based immunodetection by refractive-index change.

    PubMed

    Devadhasan, Jasmine P; Kim, Sanghyo

    2012-01-01

    A complementary metal oxide semiconductor (CMOS) image sensor is an intriguing technology for the development of a novel biosensor. Indeed, the CMOS image sensor mechanism concerning the detection of the antigen-antibody (Ag-Ab) interaction at the nanoscale has been ambiguous so far. To understand the mechanism, more extensive research has been necessary to achieve point-of-care diagnostic devices. This research has demonstrated a CMOS image sensor-based analysis of cardiovascular disease markers, such as C-reactive protein (CRP) and troponin I, Ag-Ab interactions on indium nanoparticle (InNP) substrates by simple photon count variation. The developed sensor is feasible to detect proteins even at a fg/mL concentration under ordinary room light. Possible mechanisms, such as dielectric constant and refractive-index changes, have been studied and proposed. A dramatic change in the refractive index after protein adsorption on an InNP substrate was observed to be a predominant factor involved in CMOS image sensor-based immunoassay.

  11. Electrical characteristics of silicon nanowire CMOS inverters under illumination.

    PubMed

    Yoo, Jeuk; Kim, Yoonjoong; Lim, Doohyeok; Kim, Sangsig

    2018-02-05

    In this study, we examine the electrical characteristics of complementary metal-oxide-semiconductor (CMOS) inverters with silicon nanowire (SiNW) channels on transparent substrates under illumination. The electrical characteristics vary with the wavelength and power of light due to the variation in the generation rates of the electric-hole pairs. Compared to conventional optoelectronic devices that sense the on/off states by the variation in the current, our device achieves the sensing of the on/off states with more precision by using the voltage variation induced by the wavelength or intensity of light. The device was fabricated on transparent substrates to maximize the light absorption using conventional CMOS technologies. The key difference between our SiNW CMOS inverters and conventional optoelectronic devices is the ability to control the flow of charge carriers more effectively. The improved sensitivity accomplished with the use of SiNW CMOS inverters allows better control of the on/off states.

  12. Modeling Near-Crack-Tip Plasticity from Nano- to Micro-Scales

    NASA Technical Reports Server (NTRS)

    Glaessgen, Edward H.; Saether, Erik; Hochhalter, Jake D.; Yamakov, Vesselin I.

    2010-01-01

    Several efforts that are aimed at understanding the plastic deformation mechanisms related to crack propagation at the nano-, meso- and micro-length scales including atomistic simulation, discrete dislocation plasticity, strain gradient plasticity and crystal plasticity are discussed. The paper focuses on discussion of newly developed methodologies and their application to understanding damage processes in aluminum and its alloys. Examination of plastic mechanisms as a function of increasing length scale illustrates increasingly complex phenomena governing plasticity

  13. Controlling high-throughput manufacturing at the nano-scale

    NASA Astrophysics Data System (ADS)

    Cooper, Khershed P.

    2013-09-01

    Interest in nano-scale manufacturing research and development is growing. The reason is to accelerate the translation of discoveries and inventions of nanoscience and nanotechnology into products that would benefit industry, economy and society. Ongoing research in nanomanufacturing is focused primarily on developing novel nanofabrication techniques for a variety of applications—materials, energy, electronics, photonics, biomedical, etc. Our goal is to foster the development of high-throughput methods of fabricating nano-enabled products. Large-area parallel processing and highspeed continuous processing are high-throughput means for mass production. An example of large-area processing is step-and-repeat nanoimprinting, by which nanostructures are reproduced again and again over a large area, such as a 12 in wafer. Roll-to-roll processing is an example of continuous processing, by which it is possible to print and imprint multi-level nanostructures and nanodevices on a moving flexible substrate. The big pay-off is high-volume production and low unit cost. However, the anticipated cost benefits can only be realized if the increased production rate is accompanied by high yields of high quality products. To ensure product quality, we need to design and construct manufacturing systems such that the processes can be closely monitored and controlled. One approach is to bring cyber-physical systems (CPS) concepts to nanomanufacturing. CPS involves the control of a physical system such as manufacturing through modeling, computation, communication and control. Such a closely coupled system will involve in-situ metrology and closed-loop control of the physical processes guided by physics-based models and driven by appropriate instrumentation, sensing and actuation. This paper will discuss these ideas in the context of controlling high-throughput manufacturing at the nano-scale.

  14. Fabrication of a 3D micro/nano dual-scale carbon array and its demonstration as the microelectrodes for supercapacitors

    NASA Astrophysics Data System (ADS)

    Jiang, Shulan; Shi, Tielin; Gao, Yang; Long, Hu; Xi, Shuang; Tang, Zirong

    2014-04-01

    An easily accessible method is proposed for the fabrication of a 3D micro/nano dual-scale carbon array with a large surface area. The process mainly consists of three critical steps. Firstly, a hemispherical photoresist micro-array was obtained by the cost-effective nanoimprint lithography process. Then the micro-array was transformed into hierarchical structures with longitudinal nanowires on the microstructure surface by oxygen plasma etching. Finally, the micro/nano dual-scale carbon array was fabricated by carbonizing these hierarchical photoresist structures. It has also been demonstrated that the micro/nano dual-scale carbon array can be used as the microelectrodes for supercapacitors by the electrodeposition of a manganese dioxide (MnO2) film onto the hierarchical carbon structures with greatly enhanced electrochemical performance. The specific gravimetric capacitance of the deposited micro/nano dual-scale microelectrodes is estimated to be 337 F g-1 at the scan rate of 5 mV s-1. This proposed approach of fabricating a micro/nano dual-scale carbon array provides a facile way in large-scale microstructures’ manufacturing for a wide variety of applications, including sensors and on-chip energy storage devices.

  15. Design rules for RCA self-aligned silicon-gate CMOS/SOS process

    NASA Technical Reports Server (NTRS)

    1977-01-01

    The CMOS/SOS design rules prepared by the RCA Solid State Technology Center (SSTC) are described. These rules specify the spacing and width requirements for each of the six design levels, the seventh level being used to define openings in the passivation level. An associated report, entitled Silicon-Gate CMOS/SOS Processing, provides further insight into the usage of these rules.

  16. Dielectrophoretic lab-on-CMOS platform for trapping and manipulation of cells.

    PubMed

    Park, Kyoungchul; Kabiri, Shideh; Sonkusale, Sameer

    2016-02-01

    Trapping and manipulation of cells are essential operations in numerous studies in biology and life sciences. We discuss the realization of a Lab-on-a-Chip platform for dielectrophoretic trapping and repositioning of cells and microorganisms on a complementary metal oxide semiconductor (CMOS) technology, which we define here as Lab-on-CMOS (LoC). The LoC platform is based on dielectrophoresis (DEP) which is the force experienced by any dielectric particle including biological entities in non-uniform AC electrical field. DEP force depends on the permittivity of the cells, its size and shape and also on the permittivity of the medium and therefore it enables selective targeting of cells based on their phenotype. In this paper, we address an important matter that of electrode design for DEP for which we propose a three-dimensional (3D) octapole geometry to create highly confined electric fields for trapping and manipulation of cells. Conventional DEP-based platforms are implemented stand-alone on glass, silicon or polymers connected to external infrastructure for electronics and optics, making it bulky and expensive. In this paper, the use of CMOS as a platform provides a pathway to truly miniaturized lab-on-CMOS or LoC platform, where DEP electrodes are designed using built-in multiple metal layers of the CMOS process for effective trapping of cells, with built-in electronics for in-situ impedance monitoring of the cell position. We present electromagnetic simulation results of DEP force for this unique 3D octapole geometry on CMOS. Experimental results with yeast cells validate the design. These preliminary results indicate the promise of using CMOS technology for truly compact miniaturized lab-on-chip platform for cell biotechnology applications.

  17. Overview of CMOS process and design options for image sensor dedicated to space applications

    NASA Astrophysics Data System (ADS)

    Martin-Gonthier, P.; Magnan, P.; Corbiere, F.

    2005-10-01

    With the growth of huge volume markets (mobile phones, digital cameras...) CMOS technologies for image sensor improve significantly. New process flows appear in order to optimize some parameters such as quantum efficiency, dark current, and conversion gain. Space applications can of course benefit from these improvements. To illustrate this evolution, this paper reports results from three technologies that have been evaluated with test vehicles composed of several sub arrays designed with some space applications as target. These three technologies are CMOS standard, improved and sensor optimized process in 0.35μm generation. Measurements are focussed on quantum efficiency, dark current, conversion gain and noise. Other measurements such as Modulation Transfer Function (MTF) and crosstalk are depicted in [1]. A comparison between results has been done and three categories of CMOS process for image sensors have been listed. Radiation tolerance has been also studied for the CMOS improved process in the way of hardening the imager by design. Results at 4, 15, 25 and 50 krad prove a good ionizing dose radiation tolerance applying specific techniques.

  18. VHF NEMS-CMOS piezoresistive resonators for advanced sensing applications

    NASA Astrophysics Data System (ADS)

    Arcamone, Julien; Dupré, Cécilia; Arndt, Grégory; Colinet, Eric; Hentz, Sébastien; Ollier, Eric; Duraffourg, Laurent

    2014-10-01

    This work reports on top-down nanoelectromechanical resonators, which are among the smallest resonators listed in the literature. To overcome the fact that their electromechanical transduction is intrinsically very challenging due to their very high frequency (100 MHz) and ultimate size (each resonator is a 1.2 μm long, 100 nm wide, 20 nm thick silicon beam with 100 nm long and 30 nm wide piezoresistive lateral nanowire gauges), they have been monolithically integrated with an advanced fully depleted SOI CMOS technology. By advantageously combining the unique benefits of nanomechanics and nanoelectronics, this hybrid NEMS-CMOS device paves the way for novel breakthrough applications, such as NEMS-based mass spectrometry or hybrid NEMS/CMOS logic, which cannot be fully implemented without this association.

  19. Radiation tolerant 1 micron CMOS technology

    NASA Astrophysics Data System (ADS)

    Crevel, P.; Rodde, K.

    1991-03-01

    Starting from a standard one micron Complementary Metal Oxide Semiconductor (CMOS) for high density, low power memory applications, the degree of radiation tolerance of the baseline process is evaluated. Implemented process modifications to improve latchup sensitivity under heavy ion irradiation as well as total dose effects without changing layout rules are described. By changing doping profiles in Metal Nitride Oxide Semiconductors (MNOS) and P-channel MOS (PMOS) device regions, it is possible to guarantee data sheet specification of a 64 K low power static RAM for total gamma dose up to 35 krad (Si) (and even higher values for the gate array family) without latch up for Linear Energy Transfer LET up to 115 MeV/(mg/cm squared).

  20. Surface roughness: A review of its measurement at micro-/nano-scale

    NASA Astrophysics Data System (ADS)

    Gong, Yuxuan; Xu, Jian; Buchanan, Relva C.

    2018-01-01

    The measurement of surface roughness at micro-/nano-scale is of great importance to metrological, manufacturing, engineering, and scientific applications given the critical roles of roughness in physical and chemical phenomena. The surface roughness of materials can significantly change the way of how they interact with light, phonons, molecules, and so forth, thus surface roughness ultimately determines the functionality and property of materials. In this short review, the techniques of measuring micro-/nano-scale surface roughness are discussed with special focus on the limitations and capabilities of each technique. In addition, the calculations of surface roughness and their theoretical background are discussed to offer readers a better understanding of the importance of post-measurement analysis. Recent progress on fractal analysis of surface roughness is discussed to shed light on the future efforts in surface roughness measurement.

  1. An integrated CMOS high voltage supply for lab-on-a-chip systems.

    PubMed

    Behnam, M; Kaigala, G V; Khorasani, M; Marshall, P; Backhouse, C J; Elliott, D G

    2008-09-01

    Electrophoresis is a mainstay of lab-on-a-chip (LOC) implementations of molecular biology procedures and is the basis of many medical diagnostics. High voltage (HV) power supplies are necessary in electrophoresis instruments and are a significant part of the overall system cost. This cost of instrumentation is a significant impediment to making LOC technologies more widely available. We believe one approach to overcoming this problem is to use microelectronic technology (complementary metal-oxide semiconductor, CMOS) to generate and control the HV. We present a CMOS-based chip (3 mm x 2.9 mm) that generates high voltages (hundreds of volts), switches HV outputs, and is powered by a 5 V input supply (total power of 28 mW) while being controlled using a standard computer serial interface. Microchip electrophoresis with laser induced fluorescence (LIF) detection is implemented using this HV CMOS chip. With the other advancements made in the LOC community (e.g. micro-fluidic and optical devices), these CMOS chips may ultimately enable 'true' LOC solutions where essentially all the microfluidics, photonics and electronics are on a single chip.

  2. Pulse electrochemical meso/micro/nano ultraprecision machining technology.

    PubMed

    Lee, Jeong Min; Kim, Young Bin; Park, Jeong Woo

    2013-11-01

    This study demonstrated meso/micro/nano-ultraprecision machining through electrochemical reactions using intermittent DC pulses. The experiment focused on two machining methods: (1) pulse electrochemical polishing (PECP) of stainless steel, and (2) pulse electrochemical nano-patterning (PECNP) on a silicon (Si) surface, using atomic force microscopy (AFM) for fabrication. The dissolution reaction at the stainless steel surface following PECP produced a very clean, smooth workpiece. The advantages of the PECP process included improvements in corrosion resistance, deburring of the sample surface, and removal of hydrogen from the stainless steel surface as verified by time-of-flight secondary-ion mass spectrometry (TOF-SIMS). In PECNP, the electrochemical reaction generated within water molecules produced nanoscale oxide textures on a Si surface. Scanning probe microscopy (SPM) was used to evaluate nanoscale-pattern processing on a Si wafer surface produced by AFM-PECNP For both processes using pulse electrochemical reactions, three-dimensional (3-D) measurements and AFM were used to investigate the changes on the machined surfaces. Preliminary results indicated the potential for advancing surface polishing techniques and localized micro/nano-texturing technology using PECP and PECNP processes.

  3. Monolithic CMUT on CMOS Integration for Intravascular Ultrasound Applications

    PubMed Central

    Zahorian, Jaime; Hochman, Michael; Xu, Toby; Satir, Sarp; Gurun, Gokce; Karaman, Mustafa; Degertekin, F. Levent

    2012-01-01

    One of the most important promises of capacitive micromachined ultrasonic transducer (CMUT) technology is integration with electronics. This approach is required to minimize the parasitic capacitances in the receive mode, especially in catheter based volumetric imaging arrays where the elements need to be small. Furthermore, optimization of the available silicon area and minimized number of connections occurs when the CMUTs are fabricated directly above the associated electronics. Here, we describe successful fabrication and performance evaluation of CMUT arrays for intravascular imaging on custom designed CMOS receiver electronics from a commercial IC foundry. The CMUT on CMOS process starts with surface isolation and mechanical planarization of the CMOS electronics to reduce topography. The rest of the CMUT fabrication is achieved by modifying a low temperature micromachining process through the addition of a single mask and developing a dry etching step to produce sloped sidewalls for simple and reliable CMUT to CMOS interconnection. This CMUT to CMOS interconnect method reduced the parasitic capacitance by a factor of 200 when compared with a standard wire bonding method. Characterization experiments indicate that the CMUT on CMOS elements are uniform in frequency response and are similar to CMUTs simultaneously fabricated on standard silicon wafers without electronics integration. Experiments on a 1.6 mm diameter dual-ring CMUT array with a 15 MHz center frequency show that both the CMUTs and the integrated CMOS electronics are fully functional. The SNR measurements indicate that the performance is adequate for imaging CTOs located 1 cm away from the CMUT array. PMID:23443701

  4. Monolithic CMUT-on-CMOS integration for intravascular ultrasound applications.

    PubMed

    Zahorian, Jaime; Hochman, Michael; Xu, Toby; Satir, Sarp; Gurun, Gokce; Karaman, Mustafa; Degertekin, F Levent

    2011-12-01

    One of the most important promises of capacitive micromachined ultrasonic transducer (CMUT) technology is integration with electronics. This approach is required to minimize the parasitic capacitances in the receive mode, especially in catheter-based volumetric imaging arrays, for which the elements must be small. Furthermore, optimization of the available silicon area and minimized number of connections occurs when the CMUTs are fabricated directly above the associated electronics. Here, we describe successful fabrication and performance evaluation of CMUT arrays for intravascular imaging on custom-designed CMOS receiver electronics from a commercial IC foundry. The CMUT-on-CMOS process starts with surface isolation and mechanical planarization of the CMOS electronics to reduce topography. The rest of the CMUT fabrication is achieved by modifying a low-temperature micromachining process through the addition of a single mask and developing a dry etching step to produce sloped sidewalls for simple and reliable CMUT-to-CMOS interconnection. This CMUT-to-CMOS interconnect method reduced the parasitic capacitance by a factor of 200 when compared with a standard wire-bonding method. Characterization experiments indicate that the CMUT-on-CMOS elements are uniform in frequency response and are similar to CMUTs simultaneously fabricated on standard silicon wafers without electronics integration. Ex- periments on a 1.6-mm-diameter dual-ring CMUT array with a center frequency of 15 MHz show that both the CMUTs and the integrated CMOS electronics are fully functional. The SNR measurements indicate that the performance is adequate for imaging chronic total occlusions located 1 cm from the CMUT array.

  5. Ames Infusion Stories for NASA Annual Technology Report: Nano Entry System for CubeSat-Class Payloads

    NASA Technical Reports Server (NTRS)

    Smith, Brandon; Jan, Darrell Leslie; Venkatapathy, Etiraj

    2015-01-01

    The Nano Entry System for CubeSat-Class Payloads led to the development of the Nano-Adaptable Deployable Entry and Placement Technology ("Nano-ADEPT"). Nano-ADEPT is a mechanically deployed entry, descent, and landing (EDL) system that stows during launch and cruise (like an umbrella) and serves as both heat shield and primary structure during EDL. It is especially designed for small spacecraft where volume is a limiting constraint.

  6. A CMOS microdisplay with integrated controller utilizing improved silicon hot carrier luminescent light sources

    NASA Astrophysics Data System (ADS)

    Venter, Petrus J.; Alberts, Antonie C.; du Plessis, Monuko; Joubert, Trudi-Heleen; Goosen, Marius E.; Janse van Rensburg, Christo; Rademeyer, Pieter; Fauré, Nicolaas M.

    2013-03-01

    Microdisplay technology, the miniaturization and integration of small displays for various applications, is predominantly based on OLED and LCoS technologies. Silicon light emission from hot carrier electroluminescence has been shown to emit light visibly perceptible without the aid of any additional intensification, although the electrical to optical conversion efficiency is not as high as the technologies mentioned above. For some applications, this drawback may be traded off against the major cost advantage and superior integration opportunities offered by CMOS microdisplays using integrated silicon light sources. This work introduces an improved version of our previously published microdisplay by making use of new efficiency enhanced CMOS light emitting structures and an increased display resolution. Silicon hot carrier luminescence is often created when reverse biased pn-junctions enter the breakdown regime where impact ionization results in carrier transport across the junction. Avalanche breakdown is typically unwanted in modern CMOS processes. Design rules and process design are generally tailored to prevent breakdown, while the voltages associated with breakdown are too high to directly interact with the rest of the CMOS standard library. This work shows that it is possible to lower the operating voltage of CMOS light sources without compromising the optical output power. This results in more efficient light sources with improved interaction with other standard library components. This work proves that it is possible to create a reasonably high resolution microdisplay while integrating the active matrix controller and drivers on the same integrated circuit die without additional modifications, in a standard CMOS process.

  7. (Invited) Comprehensive Assessment of Oxide Memristors As Post-CMOS Memory and Logic Devices

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Gao, X.; Mamaluy, D.; Cyr, E. C.

    As CMOS technology approaches the end of its scaling, oxide-based memristors have become one of the leading candidates for post-CMOS memory and logic devices. In orderTo facilitate the understanding of physical switching mechanisms and accelerate experimental development of memristors, we have developed a three-dimensional fully-coupled electrical and thermal transport model, which captures all the important processes that drive memristive switching and is applicable for simulating a wide range of memristors. Moreover, the model is applied to simulate the RESET and SET switching in a 3D filamentary TaOx memristor. Extensive simulations show that the switching dynamics of the bipolar device ismore » determined by thermally-activated field-dominant processes: with Joule heating, the raised temperature enables the movement of oxygen vacancies, and the field drift dominates the overall motion of vacancies. Simulated current-voltage hysteresis and device resistance profiles as a function of time and voltage during RESET and SET switching show good agreement with experimental measurement.« less

  8. (Invited) Comprehensive Assessment of Oxide Memristors As Post-CMOS Memory and Logic Devices

    DOE PAGES

    Gao, X.; Mamaluy, D.; Cyr, E. C.; ...

    2016-05-10

    As CMOS technology approaches the end of its scaling, oxide-based memristors have become one of the leading candidates for post-CMOS memory and logic devices. In orderTo facilitate the understanding of physical switching mechanisms and accelerate experimental development of memristors, we have developed a three-dimensional fully-coupled electrical and thermal transport model, which captures all the important processes that drive memristive switching and is applicable for simulating a wide range of memristors. Moreover, the model is applied to simulate the RESET and SET switching in a 3D filamentary TaOx memristor. Extensive simulations show that the switching dynamics of the bipolar device ismore » determined by thermally-activated field-dominant processes: with Joule heating, the raised temperature enables the movement of oxygen vacancies, and the field drift dominates the overall motion of vacancies. Simulated current-voltage hysteresis and device resistance profiles as a function of time and voltage during RESET and SET switching show good agreement with experimental measurement.« less

  9. Deployable Laboratory Applications of Nano- and Bio-Technology (Applications de nanotechnologie et biotechnologie destinees a un laboratoire deployable)

    DTIC Science & Technology

    2014-10-01

    applications of present nano-/ bio -technology include advanced health and fitness monitoring, high-resolution imaging, new environmental sensor platforms...others areas where nano-/ bio -technology development is needed: • Sensors : Diagnostic and detection kits (gene-chips, protein-chips, lab-on-chips, etc...studies on chemo- bio nano- sensors , ultra-sensitive biochips (“lab-on-a-chip” and “cells-on-chips” devices) have been prepared for routine medical

  10. CMOS-based optical energy harvesting circuit for biomedical and Internet of Things devices

    NASA Astrophysics Data System (ADS)

    Nattakarn, Wuthibenjaphonchai; Ishizu, Takaaki; Haruta, Makito; Noda, Toshihiko; Sasagawa, Kiyotaka; Tokuda, Takashi; Sawan, Mohamad; Ohta, Jun

    2018-04-01

    In this work, we present a novel CMOS-based optical energy harvesting technology for implantable and Internet of Things (IoT) devices. In the proposed system, a CMOS energy-harvesting circuit accumulates a small amount of photoelectrically converted energy in an external capacitor, and intermittently supplies this power to a target device. Two optical energy-harvesting circuit types were implemented and evaluated. Furthermore, we developed a photoelectrically powered optical identification (ID) circuit that is suitable for IoT technology applications.

  11. An acquisition system for CMOS imagers with a genuine 10 Gbit/s bandwidth

    NASA Astrophysics Data System (ADS)

    Guérin, C.; Mahroug, J.; Tromeur, W.; Houles, J.; Calabria, P.; Barbier, R.

    2012-12-01

    This paper presents a high data throughput acquisition system for pixel detector readout such as CMOS imagers. This CMOS acquisition board offers a genuine 10 Gbit/s bandwidth to the workstation and can provide an on-line and continuous high frame rate imaging capability. On-line processing can be implemented either on the Data Acquisition Board or on the multi-cores workstation depending on the complexity of the algorithms. The different parts composing the acquisition board have been designed to be used first with a single-photon detector called LUSIPHER (800×800 pixels), developed in our laboratory for scientific applications ranging from nano-photonics to adaptive optics. The architecture of the acquisition board is presented and the performances achieved by the produced boards are described. The future developments (hardware and software) concerning the on-line implementation of algorithms dedicated to single-photon imaging are tackled.

  12. Radiation hard pixel sensors using high-resistive wafers in a 150 nm CMOS processing line

    NASA Astrophysics Data System (ADS)

    Pohl, D.-L.; Hemperek, T.; Caicedo, I.; Gonella, L.; Hügging, F.; Janssen, J.; Krüger, H.; Macchiolo, A.; Owtscharenko, N.; Vigani, L.; Wermes, N.

    2017-06-01

    Pixel sensors using 8'' CMOS processing technology have been designed and characterized offering the benefits of industrial sensor fabrication, including large wafers, high throughput and yield, as well as low cost. The pixel sensors are produced using a 150 nm CMOS technology offered by LFoundry in Avezzano. The technology provides multiple metal and polysilicon layers, as well as metal-insulator-metal capacitors that can be employed for AC-coupling and redistribution layers. Several prototypes were fabricated and are characterized with minimum ionizing particles before and after irradiation to fluences up to 1.1 × 1015 neq cm-2. The CMOS-fabricated sensors perform equally well as standard pixel sensors in terms of noise and hit detection efficiency. AC-coupled sensors even reach 100% hit efficiency in a 3.2 GeV electron beam before irradiation.

  13. Nano Mechanical Machining Using AFM Probe

    NASA Astrophysics Data System (ADS)

    Mostofa, Md. Golam

    Complex miniaturized components with high form accuracy will play key roles in the future development of many products, as they provide portability, disposability, lower material consumption in production, low power consumption during operation, lower sample requirements for testing, and higher heat transfer due to their very high surface-to-volume ratio. Given the high market demand for such micro and nano featured components, different manufacturing methods have been developed for their fabrication. Some of the common technologies in micro/nano fabrication are photolithography, electron beam lithography, X-ray lithography and other semiconductor processing techniques. Although these methods are capable of fabricating micro/nano structures with a resolution of less than a few nanometers, some of the shortcomings associated with these methods, such as high production costs for customized products, limited material choices, necessitate the development of other fabricating techniques. Micro/nano mechanical machining, such an atomic force microscope (AFM) probe based nano fabrication, has, therefore, been used to overcome some the major restrictions of the traditional processes. This technique removes material from the workpiece by engaging micro/nano size cutting tool (i.e. AFM probe) and is applicable on a wider range of materials compared to the photolithographic process. In spite of the unique benefits of nano mechanical machining, there are also some challenges with this technique, since the scale is reduced, such as size effects, burr formations, chip adhesions, fragility of tools and tool wear. Moreover, AFM based machining does not have any rotational movement, which makes fabrication of 3D features more difficult. Thus, vibration-assisted machining is introduced into AFM probe based nano mechanical machining to overcome the limitations associated with the conventional AFM probe based scratching method. Vibration-assisted machining reduced the cutting forces

  14. Adhesion and proliferation of OCT-1 osteoblast-like cells on micro- and nano-scale topography structured poly(L-lactide).

    PubMed

    Wan, Yuqing; Wang, Yong; Liu, Zhimin; Qu, Xue; Han, Buxing; Bei, Jianzhong; Wang, Shenguo

    2005-07-01

    The impact of the surface topography of polylactone-type polymer on cell adhesion was to be concerned because the micro-scale texture of a surface can provide a significant effect on the adhesion behavior of cells on the surface. Especially for the application of tissue engineering scaffold, the pore size could have an influence on cell in-growth and subsequent proliferation. Micro-fabrication technology was used to generate specific topography to investigate the relationship between the cells and surface. In this study the pits-patterned surfaces of polystyrene (PS) film with diameters 2.2 and 0.45 microm were prepared by phase-separation, and the corresponding scale islands-patterned PLLA surface was prepared by a molding technique using the pits-patterned PS as a template. The adhesion and proliferation behavior of OCT-1 osteoblast-like cells morphology on the pits- and islands-patterned surface were characterized by SEM observation, cell attachment efficiency measurement and MTT assay. The results showed that the cell adhesion could be enhanced on PLLA and PS surface with nano-scale and micro-scale roughness compared to the smooth surfaces of the PLLA and PS. The OCT-1 osteoblast-like cells could grow along the surface with two different size islands of PLLA and grow inside the micro-scale pits of the PS. However, the proliferation of cells on the micro- and nano-scale patterned surface has not been enhanced compared with the controlled smooth surface.

  15. The Future of Bio-technology

    NASA Technical Reports Server (NTRS)

    Trent, Jonathan

    2005-01-01

    Hosts of technologies, most notably in electronics, have been on the path of miniaturization for decades and in 2005 they have crossed the threshold of the nano-scale. Crossing the nano-scale threshold is a milestone in miniaturization, setting impressive new standards for component-packing densities. It also brings technology to a scale at which quantum effects and fault tolerance play significant roles and approaches the feasible physical limit form many conventional "top-down" manufacturing methods. I will suggest that the most formidable manufacturing problems in nanotechnology will be overcome and major breakthroughs will occur in a host of technologies, when nanotechnology converges with bio-technology; i.e. I will argue that the future of bio-technology is in nanotechnology. In 2005, methods in molecular biology, microscopy, bioinformatics, biochemistry, and genetic engineering have focused considerable attention on the nano-scale. On this scale, biology is a kind of recursive chemistry in which molecular recognition, self-assembly, self-organization and self-referencing context-control lead to the emergence of the complexity of structures and processes that are fundamental to all life forms. While we are still far from understanding this complexity, we are on the threshold of being able to use at least some of these biological properties for .technology. I will discuss the use of biomolecules, such as DNA, RNA, and proteins as "tools" for the bio-technologist of the future. More specifically, I will present in some detail an example of how we are using a genetically engineered 60-kDa protein (HSP60) from an organism living in near boiling sulfuric acid to build nano-scale templates for arranging metallic nanoparticles. These "extremophile" HSP60s self-assemble into robust double-ring structures called "chaperonins," which further assemble into filaments and arrays with nanometer accuracy. I will discuss our efforts to use chaperonins to organize quantum

  16. Applications and research on nano power electronics: an adventure beyond quantum electronics

    NASA Astrophysics Data System (ADS)

    Chakraborty, Arindam; Emadi, Ali

    2005-06-01

    This paper is a roadmap to the exhaustive role of the newly emerging field of nanotechnology in various application and research areas. Some of the today's important topics are plasma, dielectric layer semiconductor, and carbon nanoparticle based technologies. Carbon nanotubes are very useful for the purpose of fabricating nano opto power devices. The basic concept behind tunneling of electrons has been utilized to define another scope of this technology, and thus came many quantum scale tunneling devices and elements. Fabrication of crystal semiconductors of high quality along with oxides of nano aspect would give rise to superior device performance and find applications such as LEDs, LASER, VLSI technology and also in highly efficient solar cells. Many nano-research based organizations are fully devoted to develop nano power cells, which would give birth to new battery cells, tunneling devises, with high power quality, longer lives, and higher activation rates. Different electronics industries as well as the military organizations would be largely benefited due to this major component and system design ideas of 'Smart Power' technologies. The contribution of nano scale power electronics would be realized in various fields like switching devices, electromechanical systems and quantum science. Such a sophisticated technology will have great impact on the modernization of robotics; space systems, automotive systems and many other fields. The highly emerging field of nanomedicine according to specialists would bring a dramatic revolution in the present century. However nanomedicine is nothing but an integration of biology, medicine and technology. Thermoelectric materials as been referred earlier also are used in case of implantable medical equipments for generation of electric power sufficient for those equipments.

  17. Design and Fabrication of High-Efficiency CMOS/CCD Imagers

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata

    2007-01-01

    An architecture for back-illuminated complementary metal oxide/semiconductor (CMOS) and charge-coupled-device (CCD) ultraviolet/visible/near infrared- light image sensors, and a method of fabrication to implement the architecture, are undergoing development. The architecture and method are expected to enable realization of the full potential of back-illuminated CMOS/CCD imagers to perform with high efficiency, high sensitivity, excellent angular response, and in-pixel signal processing. The architecture and method are compatible with next-generation CMOS dielectric-forming and metallization techniques, and the process flow of the method is compatible with process flows typical of the manufacture of very-large-scale integrated (VLSI) circuits. The architecture and method overcome all obstacles that have hitherto prevented high-yield, low-cost fabrication of back-illuminated CMOS/CCD imagers by use of standard VLSI fabrication tools and techniques. It is not possible to discuss the obstacles in detail within the space available for this article. Briefly, the obstacles are posed by the problems of generating light-absorbing layers having desired uniform and accurate thicknesses, passivation of surfaces, forming structures for efficient collection of charge carriers, and wafer-scale thinning (in contradistinction to diescale thinning). A basic element of the present architecture and method - the element that, more than any other, makes it possible to overcome the obstacles - is the use of an alternative starting material: Instead of starting with a conventional bulk-CMOS wafer that consists of a p-doped epitaxial silicon layer grown on a heavily-p-doped silicon substrate, one starts with a special silicon-on-insulator (SOI) wafer that consists of a thermal oxide buried between a lightly p- or n-doped, thick silicon layer and a device silicon layer of appropriate thickness and doping. The thick silicon layer is used as a handle: that is, as a mechanical support for the

  18. Phototoxicity and Dosimetry of Nano-scaleTitanium Dioxide in Aquatic Organisms

    EPA Science Inventory

    We have been testing nanoscale TiO2 (primarily Evonik P25) in acute exposures to identify and quantify its phototoxicity under solar simulated radiation (SSR), and to develop dose metrics reflective of both nano-scale properties and the photon component of its potency. Several e...

  19. Phototoxicity and Dosimetry of Nano-scale Titanium Dioxide in Aquatic Organisms

    EPA Science Inventory

    We have been testing nanoscale TiO2 (primarily Evonik P25) in acute exposures to identify and quantify its phototoxicity under solar simulated radiation (SSR), and to develop dose metrics reflective of both nano-scale properties and the photon component of its potency. Several e...

  20. Nano-scale surface morphology, wettability and osteoblast adhesion on nitrogen plasma-implanted NiTi shape memory alloy.

    PubMed

    Liu, X M; Wu, S L; Chu, Paul K; Chung, C Y; Chu, C L; Chan, Y L; Lam, K O; Yeung, K W K; Lu, W W; Cheung, K M C; Luk, K D K

    2009-06-01

    Plasma immersion ion implantation (PIII) is an effective method to increase the corrosion resistance and inhibit nickel release from orthopedic NiTi shape memory alloy. Nitrogen was plasma-implanted into NiTi using different pulsing frequencies to investigate the effects on the nano-scale surface morphology, structure, wettability, as well as biocompatibility. X-ray photoelectron spectroscopy (XPS) results show that the implantation depth of nitrogen increases with higher pulsing frequencies. Atomic force microscopy (AFM) discloses that the nano-scale surface roughness increases and surface features are changed from islands to spiky cones with higher pulsing frequencies. This variation in the nano surface structures leads to different surface free energy (SFE) monitored by contact angle measurements. The adhesion, spreading, and proliferation of osteoblasts on the implanted NiTi surface are assessed by cell culture tests. Our results indicate that the nano-scale surface morphology that is altered by the implantation frequencies impacts the surface free energy and wettability of the NiTi surfaces, and in turn affects the osteoblast adhesion behavior.

  1. Comparison of technologies for nano device prototyping with a special focus on ion beams: A review

    NASA Astrophysics Data System (ADS)

    Bruchhaus, L.; Mazarov, P.; Bischoff, L.; Gierak, J.; Wieck, A. D.; Hövel, H.

    2017-03-01

    Nano device prototyping (NDP) is essential for realizing and assessing ideas as well as theories in the form of nano devices, before they can be made available in or as commercial products. In this review, application results patterned similarly to those in the semiconductor industry (for cell phone, computer processors, or memory) will be presented. For NDP, some requirements are different: thus, other technologies are employed. Currently, in NDP, for many applications direct write Gaussian vector scan electron beam lithography (EBL) is used to define the required features in organic resists on this scale. We will take a look at many application results carried out by EBL, self-organized 3D epitaxy, atomic probe microscopy (scanning tunneling microscope/atomic force microscope), and in more detail ion beam techniques. For ion beam techniques, there is a special focus on those based upon liquid metal (alloy) ion sources, as recent developments have significantly increased their applicability for NDP.

  2. Multi-scale Observation of Biological Interactions of Nanocarriers: from Nano to Macro

    PubMed Central

    Jin, Su-Eon; Bae, Jin Woo; Hong, Seungpyo

    2010-01-01

    Microscopic observations have played a key role in recent advancements in nanotechnology-based biomedical sciences. In particular, multi-scale observation is necessary to fully understand the nano-bio interfaces where a large amount of unprecedented phenomena have been reported. This review describes how to address the physicochemical and biological interactions of nanocarriers within the biological environments using microscopic tools. The imaging techniques are categorized based on the size scale of detection. For observation of the nano-scale biological interactions of nanocarriers, we discuss atomic force microscopy (AFM), scanning electron microscopy (SEM), and transmission electron microscopy (TEM). For the micro to macro-scale (in vitro and in vivo) observation, we focus on confocal laser scanning microscopy (CLSM) as well as in vivo imaging systems such as magnetic resonance imaging (MRI), superconducting quantum interference devices (SQUIDs), and IVIS®. Additionally, recently developed combined techniques such as AFM-CLSM, correlative Light and Electron Microscopy (CLEM), and SEM-spectroscopy are also discussed. In this review, we describe how each technique helps elucidate certain physicochemical and biological activities of nanocarriers such as dendrimers, polymers, liposomes, and polymeric/inorganic nanoparticles, thus providing a toolbox for bioengineers, pharmaceutical scientists, biologists, and research clinicians. PMID:20232368

  3. Variability of multilevel switching in scaled hybrid RS/CMOS nanoelectronic circuits: theory

    NASA Astrophysics Data System (ADS)

    Heittmann, Arne; Noll, Tobias G.

    2013-07-01

    A theory is presented which describes the variability of multilevel switching in scaled hybrid resistive-switching/CMOS nanoelectronic circuits. Variability is quantified in terms of conductance variation using the first two moments derived from the probability density function (PDF) of the RS conductance. For RS, which are based on the electrochemical metallization effect (ECM), this variability is - to some extent - caused by discrete events such as electrochemical reactions, which occur on atomic scale and are at random. The theory shows that the conductance variation depends on the joint interaction between the programming circuit and the resistive switch (RS), and explicitly quantifies the impact of RS device parameters and parameters of the programming circuit on the conductance variance. Using a current mirror as an exemplary programming circuit an upper limit of 2-4 bits (dependent on the filament surface area) is estimated as the storage capacity exploiting the multilevel capabilities of an ECM cell. The theoretical results were verified by Monte Carlo circuit simulations on a standard circuit simulation environment using an ECM device model which models the filament growth by a Poisson process. Contribution to the Topical Issue “International Semiconductor Conference Dresden-Grenoble - ISCDG 2012”, Edited by Gérard Ghibaudo, Francis Balestra and Simon Deleonibus.

  4. Analysis of the resistive network in a bio-inspired CMOS vision chip

    NASA Astrophysics Data System (ADS)

    Kong, Jae-Sung; Sung, Dong-Kyu; Hyun, Hyo-Young; Shin, Jang-Kyoo

    2007-12-01

    CMOS vision chips for edge detection based on a resistive circuit have recently been developed. These chips help develop neuromorphic systems with a compact size, high speed of operation, and low power dissipation. The output of the vision chip depends dominantly upon the electrical characteristics of the resistive network which consists of a resistive circuit. In this paper, the body effect of the MOSFET for current distribution in a resistive circuit is discussed with a simple model. In order to evaluate the model, two 160×120 CMOS vision chips have been fabricated by using a standard CMOS technology. The experimental results have been nicely matched with our prediction.

  5. Nano-scaled Pt/Ag/Ni/Au contacts on p-type GaN for low contact resistance and high reflectivity.

    PubMed

    Kwon, Y W; Ju, I C; Kim, S K; Choi, Y S; Kim, M H; Yoo, S H; Kang, D H; Sung, H K; Shin, K; Ko, C G

    2011-07-01

    We synthesized the vertical-structured LED (VLED) using nano-scaled Pt between p-type GaN and Ag-based reflector. The metallization scheme on p-type GaN for high reflectance and low was the nano-scaled Pt/Ag/Ni/Au. Nano-scaled Pt (5 A) on Ag/Ni/Au exhibited reasonably high reflectance of 86.2% at the wavelength of 460 nm due to high transmittance of light through nano-scaled Pt (5 A) onto Ag layer. Ohmic behavior of contact metal, Pt/Ag/Ni/Au, to p-type GaN was achieved using surface treatments of p-type GaN prior to the deposition of contact metals and the specific contact resistance was observed with decreasing Pt thickness of 5 A, resulting in 1.5 x 10(-4) ohms cm2. Forward voltages of Pt (5 A)/Ag/Ni contact to p-type GaN showed 4.19 V with the current injection of 350 mA. Output voltages with various thickness of Pt showed the highest value at the smallest thickness of Pt due to its high transmittance of light onto Ag, leading to high reflectance. Our results propose that nano-scaled Pt/Ag/Ni could act as a promising contact metal to p-type GaN for improving the performance of VLEDs.

  6. Enrichment of Glycoproteins using Nano-scale Chelating Con A Monolithic Capillary Chromatography

    PubMed Central

    Feng, Shun; Yang, Na; Pennathur, Subramaniam; Goodison, Steve; Lubman, David M.

    2009-01-01

    Immobilized lectin chromatography can be employed for glycoprotein enrichment, but commonly used columns have limitations of yield and resolution. In order to improve efficiency and to make the technique applicable to minimal sample material, we have developed a nano-scale chelating Concanavalin A (Con A) monolithic capillary prepared using GMA-EDMA (glycidyl methacrylate–co-ethylene dimethacrylate) as polymeric support. Con A was immobilized on Cu(II)-charged iminodiacetic acid (IDA) regenerable sorbents by forming a IDA:Cu(II):Con A sandwich affinity structure that has high column capacity as well as stability. When compared with conventional Con A lectin chromatography, the monolithic capillary enabled the better reproducible detection of over double the number of unique N-glycoproteins in human urine samples. Utility for analysis of minimal biological samples was confirmed by the successful elucidation of glycoprotein profiles in mouse urine samples at the microliter scale. The improved efficiency of the nano-scale monolithic capillary will impact the analysis of glycoproteins in complex biological samples, especially where only limited material may be available. PMID:19366252

  7. Nano-technology and privacy: on continuous surveillance outside the panopticon.

    PubMed

    Hoven, Jeroen Van Den; Vermaas, Pieter E

    2007-01-01

    We argue that nano-technology in the form of invisible tags, sensors, and Radio Frequency Identity Chips (RFIDs) will give rise to privacy issues that are in two ways different from the traditional privacy issues of the last decades. One, they will not exclusively revolve around the idea of centralization of surveillance and concentration of power, as the metaphor of the Panopticon suggests, but will be about constant observation at decentralized levels. Two, privacy concerns may not exclusively be about constraining information flows but also about designing of materials and nano-artifacts such as chips and tags. We begin by presenting a framework for structuring the current debates on privacy, and then present our arguments.

  8. Characterisation of diode-connected SiGe BiCMOS HBTs for space applications

    NASA Astrophysics Data System (ADS)

    Venter, Johan; Sinha, Saurabh; Lambrechts, Wynand

    2016-02-01

    Silicon-germanium (SiGe) bipolar complementary metal-oxide semiconductor (BiCMOS) transistors have vertical doping profiles reaching deeper into the substrate when compared to lateral CMOS transistors. Apart from benefiting from high-speed, high current gain and low-output resistance due to its vertical profile, BiCMOS technology is increasingly becoming a preferred technology for researchers to realise next-generation space-based optoelectronic applications. BiCMOS transistors have inherent radiation hardening, to an extent predictable cryogenic performance and monolithic integration potential. SiGe BiCMOS transistors and p-n junction diodes have been researched and used as a primary active component for over the last two decades. However, further research can be conducted with diode-connected heterojunction bipolar transistors (HBTs) operating at cryogenic temperatures. This work investigates these characteristics and models devices by adapting standard fabrication technology components. This work focuses on measurements of the current-voltage relationship (I-V curves) and capacitance-voltage relationships (C-V curves) of diode-connected HBTs. One configuration is proposed and measured, which is emitterbase shorted. The I-V curves are measured for various temperature points ranging from room temperature (300 K) to the temperature of liquid nitrogen (77 K). The measured datasets are used to extract a model of the formed diode operating at cryogenic temperatures and used as a standard library component in computer aided software designs. The advantage of having broad-range temperature models of SiGe transistors becomes apparent when considering implementation of application-specific integrated circuits and silicon-based infrared radiation photodetectors on a single wafer, thus shortening interconnects and lowering parasitic interference, decreasing the overall die size and improving on overall cost-effectiveness. Primary applications include space-based geothermal

  9. Mass production of polymer nano-wires filled with metal nano-particles.

    PubMed

    Lomadze, Nino; Kopyshev, Alexey; Bargheer, Matias; Wollgarten, Markus; Santer, Svetlana

    2017-08-17

    Despite the ongoing progress in nanotechnology and its applications, the development of strategies for connecting nano-scale systems to micro- or macroscale elements is hampered by the lack of structural components that have both, nano- and macroscale dimensions. The production of nano-scale wires with macroscale length is one of the most interesting challenges here. There are a lot of strategies to fabricate long nanoscopic stripes made of metals, polymers or ceramics but none is suitable for mass production of ordered and dense arrangements of wires at large numbers. In this paper, we report on a technique for producing arrays of ordered, flexible and free-standing polymer nano-wires filled with different types of nano-particles. The process utilizes the strong response of photosensitive polymer brushes to irradiation with UV-interference patterns, resulting in a substantial mass redistribution of the polymer material along with local rupturing of polymer chains. The chains can wind up in wires of nano-scale thickness and a length of up to several centimeters. When dispersing nano-particles within the film, the final arrangement is similar to a core-shell geometry with mainly nano-particles found in the core region and the polymer forming a dielectric jacket.

  10. Patterning and templating for nanoelectronics.

    PubMed

    Galatsis, Kosmas; Wang, Kang L; Ozkan, Mihri; Ozkan, Cengiz S; Huang, Yu; Chang, Jane P; Monbouquette, Harold G; Chen, Yong; Nealey, Paul; Botros, Youssry

    2010-02-09

    The semiconductor industry will soon be launching 32 nm complementary metal oxide semiconductor (CMOS) technology node using 193 nm lithography patterning technology to fabricate microprocessors with more than 2 billion transistors. To ensure the survival of Moore's law, alternative patterning techniques that offer advantages beyond conventional top-down patterning are aggressively being explored. It is evident that most alternative patterning techniques may not offer compelling advantages to succeed conventional top-down lithography for silicon integrated circuits, but alternative approaches may well indeed offer functional advantages in realising next-generation information processing nanoarchitectures such as those based on cellular, bioinsipired, magnetic dot logic, and crossbar schemes. This paper highlights and evaluates some patterning methods from the Center on Functional Engineered Nano Architectonics in Los Angeles and discusses key benchmarking criteria with respect to CMOS scaling.

  11. A CMOS Humidity Sensor for Passive RFID Sensing Applications

    PubMed Central

    Deng, Fangming; He, Yigang; Zhang, Chaolong; Feng, Wei

    2014-01-01

    This paper presents a low-cost low-power CMOS humidity sensor for passive RFID sensing applications. The humidity sensing element is implemented in standard CMOS technology without any further post-processing, which results in low fabrication costs. The interface of this humidity sensor employs a PLL-based architecture transferring sensor signal processing from the voltage domain to the frequency domain. Therefore this architecture allows the use of a fully digital circuit, which can operate on ultra-low supply voltage and thus achieves low-power consumption. The proposed humidity sensor has been fabricated in the TSMC 0.18 μm CMOS process. The measurements show this humidity sensor exhibits excellent linearity and stability within the relative humidity range. The sensor interface circuit consumes only 1.05 μW at 0.5 V supply voltage and reduces it at least by an order of magnitude compared to previous designs. PMID:24841250

  12. A CMOS humidity sensor for passive RFID sensing applications.

    PubMed

    Deng, Fangming; He, Yigang; Zhang, Chaolong; Feng, Wei

    2014-05-16

    This paper presents a low-cost low-power CMOS humidity sensor for passive RFID sensing applications. The humidity sensing element is implemented in standard CMOS technology without any further post-processing, which results in low fabrication costs. The interface of this humidity sensor employs a PLL-based architecture transferring sensor signal processing from the voltage domain to the frequency domain. Therefore this architecture allows the use of a fully digital circuit, which can operate on ultra-low supply voltage and thus achieves low-power consumption. The proposed humidity sensor has been fabricated in the TSMC 0.18 μm CMOS process. The measurements show this humidity sensor exhibits excellent linearity and stability within the relative humidity range. The sensor interface circuit consumes only 1.05 µW at 0.5 V supply voltage and reduces it at least by an order of magnitude compared to previous designs.

  13. A CMOS silicon spin qubit

    PubMed Central

    Maurand, R.; Jehl, X.; Kotekar-Patil, D.; Corna, A.; Bohuslavskyi, H.; Laviéville, R.; Hutin, L.; Barraud, S.; Vinet, M.; Sanquer, M.; De Franceschi, S.

    2016-01-01

    Silicon, the main constituent of microprocessor chips, is emerging as a promising material for the realization of future quantum processors. Leveraging its well-established complementary metal–oxide–semiconductor (CMOS) technology would be a clear asset to the development of scalable quantum computing architectures and to their co-integration with classical control hardware. Here we report a silicon quantum bit (qubit) device made with an industry-standard fabrication process. The device consists of a two-gate, p-type transistor with an undoped channel. At low temperature, the first gate defines a quantum dot encoding a hole spin qubit, the second one a quantum dot used for the qubit read-out. All electrical, two-axis control of the spin qubit is achieved by applying a phase-tunable microwave modulation to the first gate. The demonstrated qubit functionality in a basic transistor-like device constitutes a promising step towards the elaboration of scalable spin qubit geometries in a readily exploitable CMOS platform. PMID:27882926

  14. A CMOS silicon spin qubit.

    PubMed

    Maurand, R; Jehl, X; Kotekar-Patil, D; Corna, A; Bohuslavskyi, H; Laviéville, R; Hutin, L; Barraud, S; Vinet, M; Sanquer, M; De Franceschi, S

    2016-11-24

    Silicon, the main constituent of microprocessor chips, is emerging as a promising material for the realization of future quantum processors. Leveraging its well-established complementary metal-oxide-semiconductor (CMOS) technology would be a clear asset to the development of scalable quantum computing architectures and to their co-integration with classical control hardware. Here we report a silicon quantum bit (qubit) device made with an industry-standard fabrication process. The device consists of a two-gate, p-type transistor with an undoped channel. At low temperature, the first gate defines a quantum dot encoding a hole spin qubit, the second one a quantum dot used for the qubit read-out. All electrical, two-axis control of the spin qubit is achieved by applying a phase-tunable microwave modulation to the first gate. The demonstrated qubit functionality in a basic transistor-like device constitutes a promising step towards the elaboration of scalable spin qubit geometries in a readily exploitable CMOS platform.

  15. A CMOS silicon spin qubit

    NASA Astrophysics Data System (ADS)

    Maurand, R.; Jehl, X.; Kotekar-Patil, D.; Corna, A.; Bohuslavskyi, H.; Laviéville, R.; Hutin, L.; Barraud, S.; Vinet, M.; Sanquer, M.; de Franceschi, S.

    2016-11-01

    Silicon, the main constituent of microprocessor chips, is emerging as a promising material for the realization of future quantum processors. Leveraging its well-established complementary metal-oxide-semiconductor (CMOS) technology would be a clear asset to the development of scalable quantum computing architectures and to their co-integration with classical control hardware. Here we report a silicon quantum bit (qubit) device made with an industry-standard fabrication process. The device consists of a two-gate, p-type transistor with an undoped channel. At low temperature, the first gate defines a quantum dot encoding a hole spin qubit, the second one a quantum dot used for the qubit read-out. All electrical, two-axis control of the spin qubit is achieved by applying a phase-tunable microwave modulation to the first gate. The demonstrated qubit functionality in a basic transistor-like device constitutes a promising step towards the elaboration of scalable spin qubit geometries in a readily exploitable CMOS platform.

  16. Nano-scaled graphene platelets with a high length-to-width aspect ratio

    DOEpatents

    Zhamu, Aruna; Guo, Jiusheng; Jang, Bor Z.

    2010-09-07

    This invention provides a nano-scaled graphene platelet (NGP) having a thickness no greater than 100 nm and a length-to-width ratio no less than 3 (preferably greater than 10). The NGP with a high length-to-width ratio can be prepared by using a method comprising (a) intercalating a carbon fiber or graphite fiber with an intercalate to form an intercalated fiber; (b) exfoliating the intercalated fiber to obtain an exfoliated fiber comprising graphene sheets or flakes; and (c) separating the graphene sheets or flakes to obtain nano-scaled graphene platelets. The invention also provides a nanocomposite material comprising an NGP with a high length-to-width ratio. Such a nanocomposite can become electrically conductive with a small weight fraction of NGPs. Conductive composites are particularly useful for shielding of sensitive electronic equipment against electromagnetic interference (EMI) or radio frequency interference (RFI), and for electrostatic charge dissipation.

  17. Tin doped indium oxide anodes with artificially controlled nano-scale roughness using segregated Ag nanoparticles for organic solar cells

    NASA Astrophysics Data System (ADS)

    Kim, Hyo-Joong; Ko, Eun-Hye; Noh, Yong-Jin; Na, Seok-In; Kim, Han-Ki

    2016-09-01

    Nano-scale surface roughness in transparent ITO films was artificially formed by sputtering a mixed Ag and ITO layer and wet etching of segregated Ag nanoparticles from the surface of the ITO film. Effective removal of self-segregated Ag particles from the grain boundaries and surface of the crystalline ITO film led to a change in only the nano-scale surface morphology of ITO film without changes in the sheet resistance and optical transmittance. A nano-scale rough surface of the ITO film led to an increase in contact area between the hole transport layer and the ITO anode, and eventually increased the hole extraction efficiency in the organic solar cells (OSCs). The heterojunction OSCs fabricated on the ITO anode with a nano-scale surface roughness exhibited a higher power conversion efficiency of 3.320%, than that (2.938%) of OSCs made with the reference ITO/glass. The results here introduce a new method to improve the performance of OSCs by simply modifying the surface morphology of the ITO anodes.

  18. Determination of the excess noise of avalanche photodiodes integrated in 0.35-μm CMOS technologies

    NASA Astrophysics Data System (ADS)

    Jukić, Tomislav; Brandl, Paul; Zimmermann, Horst

    2018-04-01

    The excess noise of avalanche photodiodes (APDs) integrated in a high-voltage (HV) CMOS process and in a pin-photodiode CMOS process, both with 0.35-μm structure sizes, is described. A precise excess noise measurement technique is applied using a laser source, a spectrum analyzer, a voltage source, a current meter, a cheap transimpedance amplifier, and a personal computer with a MATLAB program. In addition, usage for on-wafer measurements is demonstrated. The measurement technique is verified with a low excess noise APD as a reference device with known ratio k = 0.01 of the impact ionization coefficients. The k-factor of an APD developed in HV CMOS is determined more accurately than known before. In addition, it is shown that the excess noise of the pin-photodiode CMOS APD depends on the optical power for avalanche gains above 35 and that modulation doping can suppress this power dependence. Modulation doping, however, increases the excess noise.

  19. Efficient coupling between Si3N4 photonic and hybrid slot-based CMOS plasmonic waveguide

    NASA Astrophysics Data System (ADS)

    Chatzianagnostou, E.; Ketzaki, D.; Manolis, A.; Dabos, G.; Pleros, N.; Markey, L.; Weeber, J.-C.; Dereux, A.; Giesecke, A. L.; Porschatis, C.; Tsiokos, D.

    2018-02-01

    Bringing photonics and electronics into a common integration platform can unleash unprecedented performance capabilities in data communication and sensing applications. Plasmonics were proposed as the key technology that can merge ultra-fast photonics and low-dimension electronics due to their metallic nature and their unique ability to guide light at sub-wavelength scales. However, inherent high losses of plasmonics in conjunction with the use of CMOS incompatible metals like gold and silver which are broadly utilized in plasmonic applications impede their broad utilization in Photonic Integrated Circuits (PICs). To overcome those limitations and fully exploit the profound benefits of plasmonics, they have to be developed along two technology directives. 1) Selectively co-integrate nanoscale plasmonics with low-loss photonics and 2) replace noble metals with alternative CMOS-compatible counterparts accelerating volume manufacturing of plasmo-photonic ICs. In this context, a hybrid plasmo-photonic structure utilizing the CMOS-compatible metals Aluminum (Al) and Copper (Cu) is proposed to efficiently transfer light between a low-loss Si3N4 photonic waveguide and a hybrid plasmonic slot waveguide. Specifically, a Si3N4 strip waveguide (photonic part) is located below a metallic slot (plasmonic part) forming a hybrid structure. This configuration, if properly designed, can support modes that exhibit quasi even or odd symmetry allowing power exchange between the two parts. According to 3D FDTD simulations, the proposed directional coupling scheme can achieve coupling efficiencies at 1550nm up to 60% and 74% in the case of Al and Cu respectively within a coupling length of just several microns.

  20. A 2x2 W-Band Reference Time-Shifted Phase-Locked Transmitter Array in 65nm CMOS Technology

    NASA Technical Reports Server (NTRS)

    Tang, Adrian; Virbila, Gabriel; Hsiao, Frank; Wu, Hao; Murphy, David; Mehdi, Imran; Siegel, P. H.; Chang, M-C. Frank

    2013-01-01

    This paper presents a complete 2x2 phased array transmitter system operating at W-band (90-95 GHz) which employs a PLL reference time-shifting approach instead of using traditional mm-wave phase shifters. PLL reference shifting enables a phased array to be distributed over multiple chips without the need for coherent mm-wave signal distribution between chips. The proposed phased array transmitter system consumes 248 mW per array element when implemented in a 65 nm CMOS technology.

  1. SiGe BiCMOS manufacturing platform for mmWave applications

    NASA Astrophysics Data System (ADS)

    Kar-Roy, Arjun; Howard, David; Preisler, Edward; Racanelli, Marco; Chaudhry, Samir; Blaschke, Volker

    2010-10-01

    TowerJazz offers high volume manufacturable commercial SiGe BiCMOS technology platforms to address the mmWave market. In this paper, first, the SiGe BiCMOS process technology platforms such as SBC18 and SBC13 are described. These manufacturing platforms integrate 200 GHz fT/fMAX SiGe NPN with deep trench isolation into 0.18μm and 0.13μm node CMOS processes along with high density 5.6fF/μm2 stacked MIM capacitors, high value polysilicon resistors, high-Q metal resistors, lateral PNP transistors, and triple well isolation using deep n-well for mixed-signal integration, and, multiple varactors and compact high-Q inductors for RF needs. Second, design enablement tools that maximize performance and lowers costs and time to market such as scalable PSP and HICUM models, statistical and Xsigma models, reliability modeling tools, process control model tools, inductor toolbox and transmission line models are described. Finally, demonstrations in silicon for mmWave applications in the areas of optical networking, mobile broadband, phased array radar, collision avoidance radar and W-band imaging are listed.

  2. Results of the 2015 testbeam of a 180 nm AMS High-Voltage CMOS sensor prototype

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Benoit, M.; de Mendizabal, J. Bilbao; Casse, G.

    We investigated the active pixel sensors based on the High-Voltage CMOS technology as a viable option for the future pixel tracker of the ATLAS experiment at the High-Luminosity LHC. Our paper reports on the testbeam measurements performed at the H8 beamline of the CERN Super Proton Synchrotron on a High-Voltage CMOS sensor prototype produced in 180 nm AMS technology. These results in terms of tracking efficiency and timing performance, for different threshold and bias conditions, are shown.

  3. Results of the 2015 testbeam of a 180 nm AMS High-Voltage CMOS sensor prototype

    DOE PAGES

    Benoit, M.; de Mendizabal, J. Bilbao; Casse, G.; ...

    2016-07-21

    We investigated the active pixel sensors based on the High-Voltage CMOS technology as a viable option for the future pixel tracker of the ATLAS experiment at the High-Luminosity LHC. Our paper reports on the testbeam measurements performed at the H8 beamline of the CERN Super Proton Synchrotron on a High-Voltage CMOS sensor prototype produced in 180 nm AMS technology. These results in terms of tracking efficiency and timing performance, for different threshold and bias conditions, are shown.

  4. Characterization of pixel sensor designed in 180 nm SOI CMOS technology

    NASA Astrophysics Data System (ADS)

    Benka, T.; Havranek, M.; Hejtmanek, M.; Jakovenko, J.; Janoska, Z.; Marcisovska, M.; Marcisovsky, M.; Neue, G.; Tomasek, L.; Vrba, V.

    2018-01-01

    A new type of X-ray imaging Monolithic Active Pixel Sensor (MAPS), X-CHIP-02, was developed using a 180 nm deep submicron Silicon On Insulator (SOI) CMOS commercial technology. Two pixel matrices were integrated into the prototype chip, which differ by the pixel pitch of 50 μm and 100 μm. The X-CHIP-02 contains several test structures, which are useful for characterization of individual blocks. The sensitive part of the pixel integrated in the handle wafer is one of the key structures designed for testing. The purpose of this structure is to determine the capacitance of the sensitive part (diode in the MAPS pixel). The measured capacitance is 2.9 fF for 50 μm pixel pitch and 4.8 fF for 100 μm pixel pitch at -100 V (default operational voltage). This structure was used to measure the IV characteristics of the sensitive diode. In this work, we report on a circuit designed for precise determination of sensor capacitance and IV characteristics of both pixel types with respect to X-ray irradiation. The motivation for measurement of the sensor capacitance was its importance for the design of front-end amplifier circuits. The design of pixel elements, as well as circuit simulation and laboratory measurement techniques are described. The experimental results are of great importance for further development of MAPS sensors in this technology.

  5. Wafer-scale aluminum nano-plasmonics

    NASA Astrophysics Data System (ADS)

    George, Matthew C.; Nielson, Stew; Petrova, Rumyana; Frasier, James; Gardner, Eric

    2014-09-01

    The design, characterization, and optical modeling of aluminum nano-hole arrays are discussed for potential applications in surface plasmon resonance (SPR) sensing, surface-enhanced Raman scattering (SERS), and surface-enhanced fluorescence spectroscopy (SEFS). In addition, recently-commercialized work on narrow-band, cloaked wire grid polarizers composed of nano-stacked metal and dielectric layers patterned over 200 mm diameter wafers for projection display applications is reviewed. The stacked sub-wavelength nanowire grid results in a narrow-band reduction in reflectance by 1-2 orders of magnitude, which can be tuned throughout the visible spectrum for stray light control.

  6. Nuclear Reactions in Micro/Nano-Scale Metal Particles

    NASA Astrophysics Data System (ADS)

    Kim, Y. E.

    2013-03-01

    Low-energy nuclear reactions in micro/nano-scale metal particles are described based on the theory of Bose-Einstein condensation nuclear fusion (BECNF). The BECNF theory is based on a single basic assumption capable of explaining the observed LENR phenomena; deuterons in metals undergo Bose-Einstein condensation. The BECNF theory is also a quantitative predictive physical theory. Experimental tests of the basic assumption and theoretical predictions are proposed. Potential application to energy generation by ignition at low temperatures is described. Generalized theory of BECNF is used to carry out theoretical analyses of recently reported experimental results for hydrogen-nickel system.

  7. Advances in lasers and optical micro-nano-systems

    NASA Astrophysics Data System (ADS)

    Laurell, F.; Fazio, E.

    2010-09-01

    manipulation of the writing-reading optical beam can push holography toward storages at higher data densities, as presented by Norihiko Ishii et al (Wavefront compensation method using novel index in holographic data storage). Along a similar direction Furlan et al describe a very innovative technique for producing optical traps using novel Devil micro-lenses (Volumetric multiple optical traps produced by Devil's lenses). Vynnyk et al presented an interesting application of electron microscopy for monitoring sub-micrometric structures in 3D configurations (3D-measurement with the stereo scanning electron microscope on sub-micrometer structure). Finally, S. Rao et al present two interesting papers on integrated structures compatible with silicon technology: one describes the realisation of low-loss waveguides using amorphous silicon, a relatively novel material with many applications in very different domains (Low-loss amorphous silicon waveguid! es grown by PECVD on indium tin oxide), and one on the realisation of a electrically drivable device with affective compatibility with CMOS technology (Electro-optical modulating multistack device based on the CMOS-compatible technology of amorphous silicon). We hope that this special issue of the Journal of the European Optical Society will reflect the interest of the European Scientific Community toward these fundamental and applied topics and will demonstrate to readers some of the actual directions of research. We express our full appreciation to the authors that participated to this initiative which acts only as a primer for the vast amount of work now being undertaken in laser physics and applications in micro- and nano-systems. We would like to give a special thank to the paper reviewers for their important role in the paper selection process and all the journal staff for their very professional support, dedication and energy, which made this special issue feasible.

  8. Stabilizing the body centered cubic crystal in titanium alloys by a nano-scale concentration modulation

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Wang, H. L.; Shah, S. A. A.; Hao, Y. L.

    It is well-known that the body centered cubic (bcc) crystal in titanium alloys reaches its stability limit as the electron-to-atom (e/a) ratio of the alloy drops down to ~4.24. This critical value, however, is much higher than that of a multifunctional bcc type alloy (e/a = 4.15). Here we demonstrate that a nano-scale concentration modulation created by spinodal decomposition is what stabilizes the bcc crystal of the alloy. Aided by such a nano-scale concentration heterogeneity, unexpected properties from its chemically homogeneous counterpart are obtained. This provides a new strategy to design functional titanium alloys by tuning the spinodal decomposition.

  9. Micro-nano-biosystems: An overview of European research.

    PubMed

    Lymberis, Andreas

    2010-06-01

    New developments in science, technologies and applications are blurring the boundaries between information and communications technology (ICT), micro-nano systems and life sciences, e.g. through miniaturisation and the ability to manipulate matter at the atomic scale and to interface live and man-made systems. Interdisciplinary research towards integrated systems and their applications based on emerging convergence of information & communication technologies, micro-nano and bio technologies is expected to have a direct influence on healthcare, ageing population and well being. Micro-Nano-Bio Systems (MNBS) research and development activities under the European Union's R&D Programs, Information & Communication Technologies priority address miniaturised, smart and integrated systems for in-vitro testing e.g. lab-on-chips and systems interacting with the human e.g. autonomous implants, endoscopic capsules and robotics for minimally invasive surgery. The MNBS group involves hundreds of key public and private international organisations working on system development and validation in diverse applications such as cancer detection and therapy follow-up, minimally invasive surgery, capsular endocsopy, wearable biochemical monitoring and repairing of vital functions with active implant devices. The paper presents MNBS rationale and activities, discusses key research and innovation challenges and proposes R&D directions to achieve the expected impact on healthcare and quality of life.

  10. High-Performance Complementary Transistors and Medium-Scale Integrated Circuits Based on Carbon Nanotube Thin Films.

    PubMed

    Yang, Yingjun; Ding, Li; Han, Jie; Zhang, Zhiyong; Peng, Lian-Mao

    2017-04-25

    Solution-derived carbon nanotube (CNT) network films with high semiconducting purity are suitable materials for the wafer-scale fabrication of field-effect transistors (FETs) and integrated circuits (ICs). However, it is challenging to realize high-performance complementary metal-oxide semiconductor (CMOS) FETs with high yield and stability on such CNT network films, and this difficulty hinders the development of CNT-film-based ICs. In this work, we developed a doping-free process for the fabrication of CMOS FETs based on solution-processed CNT network films, in which the polarity of the FETs was controlled using Sc or Pd as the source/drain contacts to selectively inject carriers into the channels. The fabricated top-gated CMOS FETs showed high symmetry between the characteristics of n- and p-type devices and exhibited high-performance uniformity and excellent scalability down to a gate length of 1 μm. Many common types of CMOS ICs, including typical logic gates, sequential circuits, and arithmetic units, were constructed based on CNT films, and the fabricated ICs exhibited rail-to-rail outputs because of the high noise margin of CMOS circuits. In particular, 4-bit full adders consisting of 132 CMOS FETs were realized with 100% yield, thereby demonstrating that this CMOS technology shows the potential to advance the development of medium-scale CNT-network-film-based ICs.

  11. Impact of Subsurface Heterogeneities on nano-Scale Zero Valent Iron Transport

    NASA Astrophysics Data System (ADS)

    Krol, M. M.; Sleep, B. E.; O'Carroll, D. M.

    2011-12-01

    Nano-scale zero valent iron (nZVI) has been applied as a remediation technology at sites contaminated with chlorinated compounds and heavy metals. Although laboratory studies have demonstrated high reactivity for the degradation of target contaminants, the success of nZVI in the field has been limited due to poor subsurface mobility. When injected into the subsurface, nZVI tends to aggregate and be retained by subsurface soils. As such nZVI suspensions need to be stabilized for increased mobility. However, even with stabilization, soil heterogeneities can still lead to non-uniform nZVI transport, resulting in poor distribution and consequently decreased degradation of target compounds. Understanding how nZVI transport can be affected by subsurface heterogeneities can aid in improving the technology. This can be done with the use of a numerical model which can simulate nZVI transport. In this study CompSim, a finite difference groundwater model, is used to simulate the movement of nZVI in a two-dimensional domain. CompSim has been shown in previous studies to accurately predict nZVI movement in the subsurface, and is used in this study to examine the impact of soil heterogeneity on nZVI transport. This work also explores the impact of different viscosities of the injected nZVI suspensions (corresponding to different stabilizing polymers) and injection rates on nZVI mobility. Analysis metrics include travel time, travel distance, and average nZVI concentrations. Improving our understanding of the influence of soil heterogeneity on nZVI transport will lead to improved field scale implementation and, potentially, to more effective remediation of contaminated sites.

  12. Design of fast signal processing readout front-end electronics implemented in CMOS 40 nm technology

    NASA Astrophysics Data System (ADS)

    Kleczek, Rafal

    2016-12-01

    The author presents considerations on the design of fast readout front-end electronics implemented in a CMOS 40 nm technology with an emphasis on the system dead time, noise performance and power dissipation. The designed processing channel consists of a charge sensitive amplifier with different feedback types (Krummenacher, resistive and constant current blocks), a threshold setting block, a discriminator and a counter with logic circuitry. The results of schematic and post-layout simulations with randomly generated input pulses in a time domain according to the Poisson distribution are presented and analyzed. Dead time below 20 ns is possible while keeping noise ENC ≈ 90 e- for a detector capacitance CDET = 160 fF.

  13. Micromachined Thin-Film Sensors for SOI-CMOS Co-Integration

    NASA Astrophysics Data System (ADS)

    Laconte, Jean; Flandre, D.; Raskin, Jean-Pierre

    Co-integration of sensors with their associated electronics on a single silicon chip may provide many significant benefits regarding performance, reliability, miniaturization and process simplicity without significantly increasing the total cost. Micromachined Thin-Film Sensors for SOI-CMOS Co-integration covers the challenges and interests and demonstrates the successful co-integration of gas flow sensors on dielectric membrane, with their associated electronics, in CMOS-SOI technology. We firstly investigate the extraction of residual stress in thin layers and in their stacking and the release, in post-processing, of a 1 μm-thick robust and flat dielectric multilayered membrane using Tetramethyl Ammonium Hydroxide (TMAH) silicon micromachining solution.

  14. Defect-free fabrication of nano-disk and nano-wire by fusion of bio-template and neutral beam etching

    NASA Astrophysics Data System (ADS)

    Samukawa, S.; Noda, Shuichi; Higo, Akio; Yasuda, Manabu; Wada, Kazumi

    2016-11-01

    We have developed an innovated fabrication technology of Si, GaAs, and Ge nano-structures, i.e., we called defect-free neutral beam etching. The technology has been successfully applied to prototype the quantum nano-disks and nano-wires with ferritin based bio-templates. SEM observation verifies that the designed structures are prototyped. Photoluminescence measurements demonstrates high optical quality of nano-structures based on the technology.

  15. A novel multi-actuation CMOS RF MEMS switch

    NASA Astrophysics Data System (ADS)

    Lee, Chiung-I.; Ko, Chih-Hsiang; Huang, Tsun-Che

    2008-12-01

    This paper demonstrates a capacitive shunt type RF MEMS switch, which is actuated by electro-thermal actuator and electrostatic actuator at the same time, and than latching the switching status by electrostatic force only. Since thermal actuators need relative low voltage compare to electrostatic actuators, and electrostatic force needs almost no power to maintain the switching status, the benefits of the mechanism are very low actuation voltage and low power consumption. Moreover, the RF MEMS switch has considered issues for integrated circuit compatible in design phase. So the switch is fabricated by a standard 0.35um 2P4M CMOS process and uses wet etching and dry etching technologies for postprocess. This compatible ability is important because the RF characteristics are not only related to the device itself. If a packaged RF switch and a packaged IC wired together, the parasitic capacitance will cause the problem for optimization. The structure of the switch consists of a set of CPW transmission lines and a suspended membrane. The CPW lines and the membrane are in metal layers of CMOS process. Besides, the electro-thermal actuators are designed by polysilicon layer of the CMOS process. So the RF switch is only CMOS process layers needed for both electro-thermal and electrostatic actuations in switch. The thermal actuator is composed of a three-dimensional membrane and two heaters. The membrane is a stacked step structure including two metal layers in CMOS process, and heat is generated by poly silicon resistors near the anchors of membrane. Measured results show that the actuation voltage of the switch is under 7V for electro-thermal added electrostatic actuation.

  16. Tribological Properties of CrAlN and TiN Coatings Tested in Nano- and Micro-scale Laboratory Wear Tests

    NASA Astrophysics Data System (ADS)

    Hong, Ling; Bian, Guangdong; Hu, Shugen; Wang, Linlin; Dacosta, Herbert

    2015-07-01

    We investigated the tribological properties of CrAlN and TiN coatings produced by electron beam plasma-assisted physical vapor deposition by nano- and micro-scale wear tests. For comparison, we also conducted nano-indentation, nano-scanning wear tests, and pin-on-disk tribotests on uncoated M2 steel. The results indicate that, after nano-scale sliding tests against diamond indenter and pin-on-disk tests against ceramic alumina counterface pins, the CrAlN coating presents superior abrasive wear resistance compared to the TiN-coated and uncoated M2 steel samples. Against aluminum counterface, aluminum is more prone to attach on the CrAlN coating surface compared to TiN coating, but no apparent adhesive wear was observed, which has occurred on the TiN coating.

  17. Recent Advances in Fluorescence Lifetime Analytical Microsystems: Contact Optics and CMOS Time-Resolved Electronics.

    PubMed

    Wei, Liping; Yan, Wenrong; Ho, Derek

    2017-12-04

    Fluorescence spectroscopy has become a prominent research tool with wide applications in medical diagnostics and bio-imaging. However, the realization of combined high-performance, portable, and low-cost spectroscopic sensors still remains a challenge, which has limited the technique to the laboratories. A fluorescence lifetime measurement seeks to obtain the characteristic lifetime from the fluorescence decay profile. Time-correlated single photon counting (TCSPC) and time-gated techniques are two key variations of time-resolved measurements. However, commercial time-resolved analysis systems typically contain complex optics and discrete electronic components, which lead to bulkiness and a high cost. These two limitations can be significantly mitigated using contact sensing and complementary metal-oxide-semiconductor (CMOS) implementation. Contact sensing simplifies the optics, whereas CMOS technology enables on-chip, arrayed detection and signal processing, significantly reducing size and power consumption. This paper examines recent advances in contact sensing and CMOS time-resolved circuits for the realization of fully integrated fluorescence lifetime measurement microsystems. The high level of performance from recently reported prototypes suggests that the CMOS-based contact sensing microsystems are emerging as sound technologies for application-specific, low-cost, and portable time-resolved diagnostic devices.

  18. Recent Advances in Fluorescence Lifetime Analytical Microsystems: Contact Optics and CMOS Time-Resolved Electronics

    PubMed Central

    Yan, Wenrong; Ho, Derek

    2017-01-01

    Fluorescence spectroscopy has become a prominent research tool with wide applications in medical diagnostics and bio-imaging. However, the realization of combined high-performance, portable, and low-cost spectroscopic sensors still remains a challenge, which has limited the technique to the laboratories. A fluorescence lifetime measurement seeks to obtain the characteristic lifetime from the fluorescence decay profile. Time-correlated single photon counting (TCSPC) and time-gated techniques are two key variations of time-resolved measurements. However, commercial time-resolved analysis systems typically contain complex optics and discrete electronic components, which lead to bulkiness and a high cost. These two limitations can be significantly mitigated using contact sensing and complementary metal-oxide-semiconductor (CMOS) implementation. Contact sensing simplifies the optics, whereas CMOS technology enables on-chip, arrayed detection and signal processing, significantly reducing size and power consumption. This paper examines recent advances in contact sensing and CMOS time-resolved circuits for the realization of fully integrated fluorescence lifetime measurement microsystems. The high level of performance from recently reported prototypes suggests that the CMOS-based contact sensing microsystems are emerging as sound technologies for application-specific, low-cost, and portable time-resolved diagnostic devices. PMID:29207568

  19. Design and fabrication of a CMOS-compatible MHP gas sensor

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Li, Ying; Yu, Jun, E-mail: junyu@dlut.edu.cn; Wu, Hao

    2014-03-15

    A novel micro-hotplate (MHP) gas sensor is designed and fabricated with a standard CMOS technology followed by post-CMOS processes. The tungsten plugging between the first and the second metal layer in the CMOS processes is designed as zigzag resistor heaters embedded in the membrane. In the post-CMOS processes, the membrane is released by front-side bulk silicon etching, and excellent adiabatic performance of the sensor is obtained. Pt/Ti electrode films are prepared on the MHP before the coating of the SnO{sub 2} film, which are promising to present better contact stability compared with Al electrodes. Measurements show that at room temperaturemore » in atmosphere, the device has a low power consumption of ∼19 mW and a rapid thermal response of 8 ms for heating up to 300 °C. The tungsten heater exhibits good high temperature stability with a slight fluctuation (<0.3%) in the resistance at an operation temperature of 300 °C under constant heating mode for 336 h, and a satisfactory temperature coefficient of resistance of about 1.9‰/°C.« less

  20. Planetary Observations in the Soft X-ray band; Present status and Future CMOS based technology

    NASA Astrophysics Data System (ADS)

    Kenter, A.; Kraft, R.; Murray, S.; Smith, R.; George, F.; Branduardi-Raymont, G.; Roediger, E.; Forman, W.; Elvis, M.

    2013-12-01

    Virtually every object in the Solar system emits X-rays, and X-ray studies of these objects often provides information that cannot be obtained by observations in other bands. The Solar Wind Charge Exchange (SWX) has revealed the nature and constituents of everything from comets, to the magnetosphere of the Earth and the gas giants. X-ray fluorescence observations of atmosphere-less rocky bodies have revealed their surface composition and gross morphology. Existing data, however, have been limited by observations with state of the art Earth-orbiting telescopes (e.g. Chandra, XMM-Newton, and Suzaku) or in-situ instruments with limited capabilities. We are developing CMOS imaging detectors optimized for use as soft x-ray imaging spectrometers. These devices, when coupled to a light-weight focusing optic or mechanical collimator, would be ideal for examining X-ray emission within the Solar System with unprecedented spatial, spectral and temporal resolution. CMOS devices, apart from their observational capabilities, would be ideal for a planetary mission as they consume very little power (~mW) and require only modest cooling. Furthermore, CMOS devices, unlike conventional CCDs, are extremely radiation hard (>5MRad) and could withstand even the hostile radiation environment of a Jovian orbit with little or no performance degradation. The devices can also be read at high (hundreds to thousands of frames per second) frame rates at low noise, a critical requirement given the high count rates (thousands of cts per second). Our CMOS imaging detectors are back thinned and optimized to detect very soft X-ray emission from light elements such as C,N,O,P,S as well as emission from higher Z elements such as Fe and Ti. This sensor can also resolve the strong CX emission lines of O present is the magnetospheric X-ray emission of the gas giants, as well as thermal and non-thermal bremsstrahlung. We could also detect and study the temporal evolution X-ray synchrotron emission from

  1. Germanium CMOS potential from material and process perspectives: Be more positive about germanium

    NASA Astrophysics Data System (ADS)

    Toriumi, Akira; Nishimura, Tomonori

    2018-01-01

    CMOS miniaturization is now approaching the sub-10 nm level, and further downscaling is expected. This size scaling will end sooner or later, however, because the typical size is approaching the atomic distance level in crystalline Si. In addition, it is said that electron transport in FETs is ballistic or nearly ballistic, which means that the injection velocity at the virtual source is a physical parameter relevant for estimating the driving current. Channel-materials with higher carrier mobility than Si are nonetheless needed, and the carrier mobility in the channels is a parameter important with regard to increasing the injection velocity. Although the density of states in the channel has not been discussed often, it too is relevant for estimating the channel current. Both the mobility and the density of states are in principle related to the effective mass of the carrier. From this device physics viewpoint, we expect germanium (Ge) CMOS to be promising for scaling beyond the Si CMOS limit because the bulk mobility values of electrons and holes in Ge are much higher than those of electrons and holes in Si, and the electron effective mass in Ge is not much less than that in III-V compounds. There is a debate that Ge should be used for p-MOSFETs and III-V compounds for n-MOSFETs, but considering that the variability or nonuniformity of the FET performance in today’s CMOS LSIs is a big challenge, it seems that much more attention should be paid to the simplicity of the material design and of the processing steps. Nevertheless, Ge faces a number of challenges even in case that only the FET level is concerned. One of the big problems with Ge CMOS technology has been its poor performance in n-MOSFETs. While the hole mobility in p-FETs has been improved, the electron mobility in the inversion layer of Ge FETs remains a serious concern. If this is due to the inherent properties of Ge, only p-MOSFETs might be used for device applications. To make Ge CMOS devices

  2. Microlens performance limits in sub-2mum pixel CMOS image sensors.

    PubMed

    Huo, Yijie; Fesenmaier, Christian C; Catrysse, Peter B

    2010-03-15

    CMOS image sensors with smaller pixels are expected to enable digital imaging systems with better resolution. When pixel size scales below 2 mum, however, diffraction affects the optical performance of the pixel and its microlens, in particular. We present a first-principles electromagnetic analysis of microlens behavior during the lateral scaling of CMOS image sensor pixels. We establish for a three-metal-layer pixel that diffraction prevents the microlens from acting as a focusing element when pixels become smaller than 1.4 microm. This severely degrades performance for on and off-axis pixels in red, green and blue color channels. We predict that one-metal-layer or backside-illuminated pixels are required to extend the functionality of microlenses beyond the 1.4 microm pixel node.

  3. A fully-integrated 12.5-Gb/s 850-nm CMOS optical receiver based on a spatially-modulated avalanche photodetector.

    PubMed

    Lee, Myung-Jae; Youn, Jin-Sung; Park, Kang-Yeob; Choi, Woo-Young

    2014-02-10

    We present a fully integrated 12.5-Gb/s optical receiver fabricated with standard 0.13-µm complementary metal-oxide-semiconductor (CMOS) technology for 850-nm optical interconnect applications. Our integrated optical receiver includes a newly proposed CMOS-compatible spatially-modulated avalanche photodetector, which provides larger photodetection bandwidth than previously reported CMOS-compatible photodetectors. The receiver also has high-speed CMOS circuits including transimpedance amplifier, DC-balanced buffer, equalizer, and limiting amplifier. With the fabricated optical receiver, detection of 12.5-Gb/s optical data is successfully achieved at 5.8 pJ/bit. Our receiver achieves the highest data rate ever reported for 850-nm integrated CMOS optical receivers.

  4. Scaling properties of ballistic nano-transistors

    PubMed Central

    2011-01-01

    Recently, we have suggested a scale-invariant model for a nano-transistor. In agreement with experiments a close-to-linear thresh-old trace was found in the calculated ID - VD-traces separating the regimes of classically allowed transport and tunneling transport. In this conference contribution, the relevant physical quantities in our model and its range of applicability are discussed in more detail. Extending the temperature range of our studies it is shown that a close-to-linear thresh-old trace results at room temperatures as well. In qualitative agreement with the experiments the ID - VG-traces for small drain voltages show thermally activated transport below the threshold gate voltage. In contrast, at large drain voltages the gate-voltage dependence is weaker. As can be expected in our relatively simple model, the theoretical drain current is larger than the experimental one by a little less than a decade. PMID:21711899

  5. Developing Sensitive and Selective Nanosensors: A Single Molecule - Multiple Excitation Source Approach. Altairnano Lithium Ion Nano-scaled Titanate Oxide Cell and Module Abuse Testing

    DTIC Science & Technology

    2012-03-13

    Source Approach Part II. Altairnano Lithium Ion Nano-scaled Titanate Oxide Cell and Module Abuse Testing 14. ABSTRACT 16. SECURITY CLASSIFICATION OF...Lithium Ion Nano-scaled Titanate Oxide Cell and Module Abuse Testing Report Title ABSTRACT This final report for Contract W911NF-09-C-0135 transmits the...prototype development. The second (Part II.) is "Altairnano Lithium Ion Nano-scaled Titanate Oxide Cell and Module Abuse Test Report". The

  6. Multiple-target tracking implementation in the ebCMOS camera system: the LUSIPHER prototype

    NASA Astrophysics Data System (ADS)

    Doan, Quang Tuyen; Barbier, Remi; Dominjon, Agnes; Cajgfinger, Thomas; Guerin, Cyrille

    2012-06-01

    The domain of the low light imaging systems progresses very fast, thanks to detection and electronic multiplication technology evolution, such as the emCCD (electron multiplying CCD) or the ebCMOS (electron bombarded CMOS). We present an ebCMOS camera system that is able to track every 2 ms more than 2000 targets with a mean number of photons per target lower than two. The point light sources (targets) are spots generated by a microlens array (Shack-Hartmann) used in adaptive optics. The Multiple-Target-Tracking designed and implemented on a rugged workstation is described. The results and the performances of the system on the identification and tracking are presented and discussed.

  7. EDITORIAL: The 1st International Conference on Nanomanufacturing (NanoMan2008) The 1st International Conference on Nanomanufacturing (NanoMan2008)

    NASA Astrophysics Data System (ADS)

    Luo, Jack Jiqui; Fang, Fengzhou

    2009-05-01

    Nanomanufacturing is an emerging technology in the field of synthesis of nanomaterials, manufacture of nanodevices, nanosystems and the relevant characterization technologies, and will greatly impact our society and environment: speeding up scientific discovery, technological development, improving healthcare and living standards and slowing down the exhaustion of energy resources, to name but few. The 1st International Conference on Nanomanufacturing (NanoMan2008) was held on the 13-16 July 2008 in Singapore in conjunction with ThinFilm2008 (The 4th International Conference on Technological Advances of Thin Films & Surface Coatings). Approximately 140 delegates from all over the world have participated in the conference and presented their latest discoveries and technological developments. The main focuses of the conference were modern nanomanufacturing by laser machining, focused ion beam fabrication, nano/micro-molding/imprinting, nanomaterial synthesis and characterization, nanometrology and nano/microsystems fabrication and characterization. There was also great interest in applications of nanomanufacturing technologies in traditional areas such as free form machining, polishing and grinding with nano-scale precision and the smoothness of surfaces of objects, and applications in space exploration, military and medicine. This special issue is devoted to NanoMan2008 with a collection of 9 invited talks presented at the conference, covering all the topics of nanomanufacturing technology and development. These papers have been upgraded by the authors with new results and discoveries since the preparation of the conference manuscripts, hence presenting the latest developments. We would like to take this opportunity to thank all the delegates who attended the conference and made the conference successful, and to the authors who contributed papers to this special issue. Thanks also go to the conference committee for their efforts and devotion to the conference. We

  8. Log polar image sensor in CMOS technology

    NASA Astrophysics Data System (ADS)

    Scheffer, Danny; Dierickx, Bart; Pardo, Fernando; Vlummens, Jan; Meynants, Guy; Hermans, Lou

    1996-08-01

    We report on the design, design issues, fabrication and performance of a log-polar CMOS image sensor. The sensor is developed for the use in a videophone system for deaf and hearing impaired people, who are not capable of communicating through a 'normal' telephone. The system allows 15 detailed images per second to be transmitted over existing telephone lines. This framerate is sufficient for conversations by means of sign language or lip reading. The pixel array of the sensor consists of 76 concentric circles with (up to) 128 pixels per circle, in total 8013 pixels. The interior pixels have a pitch of 14 micrometers, up to 250 micrometers at the border. The 8013-pixels image is mapped (log-polar transformation) in a X-Y addressable 76 by 128 array.

  9. Modeling the Charge Transport in Graphene Nano Ribbon Interfaces for Nano Scale Electronic Devices

    NASA Astrophysics Data System (ADS)

    Kumar, Ravinder; Engles, Derick

    2015-05-01

    In this research work we have modeled, simulated and compared the electronic charge transport for Metal-Semiconductor-Metal interfaces of Graphene Nano Ribbons (GNR) with different geometries using First-Principle calculations and Non-Equilibrium Green's Function (NEGF) method. We modeled junctions of Armchair GNR strip sandwiched between two Zigzag strips with (Z-A-Z) and Zigzag GNR strip sandwiched between two Armchair strips with (A-Z-A) using semi-empirical Extended Huckle Theory (EHT) within the framework of Non-Equilibrium Green Function (NEGF). I-V characteristics of the interfaces were visualized for various transport parameters. The distinct changes in conductance and I-V curves reported as the Width across layers, Channel length (Central part) was varied at different bias voltages from -1V to 1 V with steps of 0.25 V. From the simulated results we observed that the conductance through A-Z-A graphene junction is in the range of 10-13 Siemens whereas the conductance through Z-A-Z graphene junction is in the range of 10-5 Siemens. These suggested conductance controlled mechanisms for the charge transport in the graphene interfaces with different geometries is important for the design of graphene based nano scale electronic devices like Graphene FETs, Sensors.

  10. CMOS compatible electrode materials selection in oxide-based memory devices

    NASA Astrophysics Data System (ADS)

    Zhuo, V. Y.-Q.; Li, M.; Guo, Y.; Wang, W.; Yang, Y.; Jiang, Y.; Robertson, J.

    2016-07-01

    Electrode materials selection guidelines for oxide-based memory devices are constructed from the combined knowledge of observed device operation characteristics, ab-initio calculations, and nano-material characterization. It is demonstrated that changing the top electrode material from Ge to Cr to Ta in the Ta2O5-based memory devices resulted in a reduction of the operation voltages and current. Energy Dispersed X-ray (EDX) Spectrometer analysis clearly shows that the different top electrode materials scavenge oxygen ions from the Ta2O5 memory layer at various degrees, leading to different oxygen vacancy concentrations within the Ta2O5, thus the observed trends in the device performance. Replacing the Pt bottom electrode material with CMOS compatible materials (Ru and Ir) further reduces the power consumption and can be attributed to the modification of the Schottky barrier height and oxygen vacancy concentration at the electrode/oxide interface. Both trends in the device performance and EDX results are corroborated by the ab-initio calculations which reveal that the electrode material tunes the oxygen vacancy concentration via the oxygen chemical potential and defect formation energy. This experimental-theoretical approach strongly suggests that the proper selection of CMOS compatible electrode materials will create the critical oxygen vacancy concentration to attain low power memory performance.

  11. The integration of InGaP LEDs with CMOS on 200 mm silicon wafers

    NASA Astrophysics Data System (ADS)

    Wang, Bing; Lee, Kwang Hong; Wang, Cong; Wang, Yue; Made, Riko I.; Sasangka, Wardhana Aji; Nguyen, Viet Cuong; Lee, Kenneth Eng Kian; Tan, Chuan Seng; Yoon, Soon Fatt; Fitzgerald, Eugene A.; Michel, Jurgen

    2017-02-01

    The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems.

  12. Synthesis of Nano-Scale Fast Ion Conducting Cubic Li7La3Zr2O12

    DTIC Science & Technology

    2013-09-25

    offer the flexibility to make nano-dimensional particles with high sinterability nor the ability to coat/protect electrode powders. By developing a...sintering temperature are needed. One possible approach is to use small particles , such as nano-scale particles , that can be sintered at lower temperatures...matrix to suppress Li dendrite penetration. By developing a sol–gel process, the LLZO particle size can be precisely tuned, from the nanometer to the

  13. Single photon detection using Geiger mode CMOS avalanche photodiodes

    NASA Astrophysics Data System (ADS)

    Lawrence, William G.; Stapels, Christopher; Augustine, Frank L.; Christian, James F.

    2005-10-01

    Geiger mode Avalanche Photodiodes fabricated using complementary metal-oxide-semiconductor (CMOS) fabrication technology combine high sensitivity detectors with pixel-level auxiliary circuitry. Radiation Monitoring Devices has successfully implemented CMOS manufacturing techniques to develop prototype detectors with active diameters ranging from 5 to 60 microns and measured detection efficiencies of up to 60%. CMOS active quenching circuits are included in the pixel layout. The actively quenched pixels have a quenching time less than 30 ns and a maximum count rate greater than 10 MHz. The actively quenched Geiger mode avalanche photodiode (GPD) has linear response at room temperature over six orders of magnitude. When operating in Geiger mode, these GPDs act as single photon-counting detectors that produce a digital output pulse for each photon with no associated read noise. Thermoelectrically cooled detectors have less than 1 Hz dark counts. The detection efficiency, dark count rate, and after-pulsing of two different pixel designs are measured and demonstrate the differences in the device operation. Additional applications for these devices include nuclear imaging and replacement of photomultiplier tubes in dosimeters.

  14. Signal Processing for Wireless Communication MIMO System with Nano- Scaled CSDG MOSFET based DP4T RF Switch.

    PubMed

    Srivastava, Viranjay M

    2015-01-01

    In the present technological expansion, the radio frequency integrated circuits in the wireless communication technologies became useful because of the replacement of increasing number of functions, traditional hardware components by modern digital signal processing. The carrier frequencies used for communication systems, now a day, shifted toward the microwave regime. The signal processing for the multiple inputs multiple output wireless communication system using the Metal- Oxide-Semiconductor Field-Effect-Transistor (MOSFET) has been done a lot. In this research the signal processing with help of nano-scaled Cylindrical Surrounding Double Gate (CSDG) MOSFET by means of Double- Pole Four-Throw Radio-Frequency (DP4T RF) switch, in terms of Insertion loss, Isolation, Reverse isolation and Inter modulation have been analyzed. In addition to this a channel model has been presented. Here, we also discussed some patents relevant to the topic.

  15. Dislocation-free Ge Nano-crystals via Pattern Independent Selective Ge Heteroepitaxy on Si Nano-Tip Wafers.

    PubMed

    Niu, Gang; Capellini, Giovanni; Schubert, Markus Andreas; Niermann, Tore; Zaumseil, Peter; Katzer, Jens; Krause, Hans-Michael; Skibitzki, Oliver; Lehmann, Michael; Xie, Ya-Hong; von Känel, Hans; Schroeder, Thomas

    2016-03-04

    The integration of dislocation-free Ge nano-islands was realized via selective molecular beam epitaxy on Si nano-tip patterned substrates. The Si-tip wafers feature a rectangular array of nanometer sized Si tips with (001) facet exposed among a SiO2 matrix. These wafers were fabricated by complementary metal-oxide-semiconductor (CMOS) compatible nanotechnology. Calculations based on nucleation theory predict that the selective growth occurs close to thermodynamic equilibrium, where condensation of Ge adatoms on SiO2 is disfavored due to the extremely short re-evaporation time and diffusion length. The growth selectivity is ensured by the desorption-limited growth regime leading to the observed pattern independence, i.e. the absence of loading effect commonly encountered in chemical vapor deposition. The growth condition of high temperature and low deposition rate is responsible for the observed high crystalline quality of the Ge islands which is also associated with negligible Si-Ge intermixing owing to geometric hindrance by the Si nano-tip approach. Single island as well as area-averaged characterization methods demonstrate that Ge islands are dislocation-free and heteroepitaxial strain is fully relaxed. Such well-ordered high quality Ge islands present a step towards the achievement of materials suitable for optical applications.

  16. Dislocation-free Ge Nano-crystals via Pattern Independent Selective Ge Heteroepitaxy on Si Nano-Tip Wafers

    PubMed Central

    Niu, Gang; Capellini, Giovanni; Schubert, Markus Andreas; Niermann, Tore; Zaumseil, Peter; Katzer, Jens; Krause, Hans-Michael; Skibitzki, Oliver; Lehmann, Michael; Xie, Ya-Hong; von Känel, Hans; Schroeder, Thomas

    2016-01-01

    The integration of dislocation-free Ge nano-islands was realized via selective molecular beam epitaxy on Si nano-tip patterned substrates. The Si-tip wafers feature a rectangular array of nanometer sized Si tips with (001) facet exposed among a SiO2 matrix. These wafers were fabricated by complementary metal-oxide-semiconductor (CMOS) compatible nanotechnology. Calculations based on nucleation theory predict that the selective growth occurs close to thermodynamic equilibrium, where condensation of Ge adatoms on SiO2 is disfavored due to the extremely short re-evaporation time and diffusion length. The growth selectivity is ensured by the desorption-limited growth regime leading to the observed pattern independence, i.e. the absence of loading effect commonly encountered in chemical vapor deposition. The growth condition of high temperature and low deposition rate is responsible for the observed high crystalline quality of the Ge islands which is also associated with negligible Si-Ge intermixing owing to geometric hindrance by the Si nano-tip approach. Single island as well as area-averaged characterization methods demonstrate that Ge islands are dislocation-free and heteroepitaxial strain is fully relaxed. Such well-ordered high quality Ge islands present a step towards the achievement of materials suitable for optical applications. PMID:26940260

  17. A 10 Gb/s laser driver in 130 nm CMOS technology for high energy physics applications

    DOE PAGES

    Zhang, T.; Tavernier, F.; Moreira, P.; ...

    2015-02-19

    The GigaBit Laser Driver (GBLD) is a key on-detector component of the GigaBit Transceiver (GBT) system at the transmitter side. We have developed a 10 Gb/s GBLD (GBLD10) in a 130 nm CMOS technology, as part of the design efforts towards the upgrade of the electrical components of the LHC experiments. The GBLD10 is based on the distributed-amplifier (DA) architecture and achieves data rates up to 10 Gb/s. It is capable of driving VCSELs with modulation currents up to 12 mA. Furthermore, a pre-emphasis function has been included in the proposed laser driver in order to compensate for the capacitivemore » load and channel losses.« less

  18. A 205GHz Amplifier in 90nm CMOS Technology

    DTIC Science & Technology

    2017-03-01

    San Jose State University San Jose, CA, USA       Abstract: This paper presents a 205GHz amplifier drawing 43.4mA from a 0.9V power supply with...10.5dB power gain, Psat of -1.6dBm, and P1dB ≈ -5.8dBm in a standard 90nm CMOS process. Moreover, the design employs internal (layout-based) /external...reported in [2]. In this paper, two neutralization techniques, internal and external approaches, have been implemented to achieve higher power

  19. Expansion of CMOS array design techniques

    NASA Technical Reports Server (NTRS)

    Feller, A.; Ramondetta, P.

    1977-01-01

    The important features of the multiport (double entry) automatic placement and routing programs for standard cells are described. Measured performance and predicted performance were compared for seven CMOS/SOS array types and hybrids designed with the high speed CMOS/SOS cell family. The CMOS/SOS standard cell data sheets are listed and described.

  20. The viability and performance characterization of nano scale energetic materials on a semiconductor bridge (SCB)

    NASA Astrophysics Data System (ADS)

    Strohm, Gianna Sophia

    The move from conventional energetic composites to nano scale energetic mixtures (nano energetics) has shown dramatic improvement in energy release rate and sensitivity to ignition. A possible application of nano energetics is on a semiconductor bridge (SCB). An SCB typically requires a tenth of the energy input as compared to a bridge wire design with the same no-fire and is capable of igniting in tens of microseconds. For very low energy applications, SCBs can be manufactured to extremely small sizes and it is necessary to find materials with particle sizes that are even smaller to function. Reactive particles of comparable size to the bridge can lead to problems with ignition reliability for small bridges. Nano-energetic composites and the use of SCBs have been significantly studied individually, however, the process of combining nano energetics with an SCB has not been investigated extensively and is the focus of this work. Goals of this study are to determine if nano energetics can be used with SCBs to further reduce the minimum energy required and improve reliability. The performance of nano-scale aluminum (nAl) and bismuth oxide (Bi2O3) with nitrocellulose (NC), Fluorel(TM) FC 2175 (chemically equivalent to VitonRTM) and Glycidyl Azide Polymer (GAP) as binders where quantified initially using the SenTest(TM) algorithm at three weight fractions (5, 7, and 9%) of binder. The threshold energy was calculated and compared to previous data using conventional materials such as zirconium potassium chlorate (ZPC), mercuric 5-Nitrotetrazol (DXN-1) and titanium sub-hydride potassium per-chlorate (TSPP). It was found that even though there where only slight differences in performance between the binders with nAl/Bi2O 3 at any of the three binder weight fractions, the results show that these nano energetic materials require about half of the threshold energy compared to conventional materials using an SCB with an 84x42 mum bridge. Binder limit testing was conducted to

  1. Integrated Inductors for RF Transmitters in CMOS/MEMS Smart Microsensor Systems

    PubMed Central

    Kim, Jong-Wan; Takao, Hidekuni; Sawada, Kazuaki; Ishida, Makoto

    2007-01-01

    This paper presents the integration of an inductor by complementary metal-oxide-semiconductor (CMOS) compatible processes for integrated smart microsensor systems that have been developed to monitor the motion and vital signs of humans in various environments. Integration of radio frequency transmitter (RF) technology with complementary metal-oxide-semiconductor/micro electro mechanical systems (CMOS/MEMS) microsensors is required to realize the wireless smart microsensors system. The essential RF components such as a voltage controlled RF-CMOS oscillator (VCO), spiral inductors for an LC resonator and an integrated antenna have been fabricated and evaluated experimentally. The fabricated RF transmitter and integrated antenna were packaged with subminiature series A (SMA) connectors, respectively. For the impedance (50 Ω) matching, a bonding wire type inductor was developed. In this paper, the design and fabrication of the bonding wire inductor for impedance matching is described. Integrated techniques for the RF transmitter by CMOS compatible processes have been successfully developed. After matching by inserting the bonding wire inductor between the on-chip integrated antenna and the VCO output, the measured emission power at distance of 5 m from RF transmitter was -37 dBm (0.2 μW).

  2. Simulation Studies of Mechanical Properties of Novel Silica Nano-structures

    NASA Astrophysics Data System (ADS)

    Muralidharan, Krishna; Torras Costa, Joan; Trickey, Samuel B.

    2006-03-01

    Advances in nanotechnology and the importance of silica as a technological material continue to stimulate computational study of the properties of possible novel silica nanostructures. Thus we have done classical molecular dynamics (MD) and multi-scale quantum mechanical (QM/MD) simulation studies of the mechanical properties of single-wall and multi-wall silica nano-rods of varying dimensions. Such nano-rods have been predicted by Mallik et al. to be unusually strong in tensile failure. Here we compare failure mechanisms of such nano-rods under tension, compression, and bending. The concurrent multi-scale QM/MD studies use the general PUPIL system (Torras et al.). In this case, PUPIL provides automated interoperation of the MNDO Transfer Hamiltonian QM code (Taylor et al.) and a locally written MD code. Embedding of the QM-forces domain is via the scheme of Mallik et al. Work supported by NSF ITR award DMR-0325553.

  3. The Intersection of CMOS Microsystems and Upconversion Nanoparticles for Luminescence Bioimaging and Bioassays

    PubMed Central

    Wei, Liping.; Doughan, Samer.; Han, Yi.; DaCosta, Matthew V.; Krull, Ulrich J.; Ho, Derek.

    2014-01-01

    Organic fluorophores and quantum dots are ubiquitous as contrast agents for bio-imaging and as labels in bioassays to enable the detection of biological targets and processes. Upconversion nanoparticles (UCNPs) offer a different set of opportunities as labels in bioassays and for bioimaging. UCNPs are excited at near-infrared (NIR) wavelengths where biological molecules are optically transparent, and their luminesce in the visible and ultraviolet (UV) wavelength range is suitable for detection using complementary metal-oxide-semiconductor (CMOS) technology. These nanoparticles provide multiple sharp emission bands, long lifetimes, tunable emission, high photostability, and low cytotoxicity, which render them particularly useful for bio-imaging applications and multiplexed bioassays. This paper surveys several key concepts surrounding upconversion nanoparticles and the systems that detect and process the corresponding luminescence signals. The principle of photon upconversion, tuning of emission wavelengths, UCNP bioassays, and UCNP time-resolved techniques are described. Electronic readout systems for signal detection and processing suitable for UCNP luminescence using CMOS technology are discussed. This includes recent progress in miniaturized detectors, integrated spectral sensing, and high-precision time-domain circuits. Emphasis is placed on the physical attributes of UCNPs that map strongly to the technical features that CMOS devices excel in delivering, exploring the interoperability between the two technologies. PMID:25211198

  4. Performance assessment of an irreversible nano Brayton cycle operating with Maxwell-Boltzmann gas

    NASA Astrophysics Data System (ADS)

    Açıkkalp, Emin; Caner, Necmettin

    2015-05-01

    In the last decades, nano-technology has been developed very fast. According to this, nano-cycle thermodynamics should improve with a similar rate. In this paper, a nano-scale irreversible Brayton cycle working with helium is evaluated for different thermodynamic criteria. These are maximum work output, ecological function, ecological coefficient of performance, exergetic performance criteria and energy efficiency. Thermodynamic analysis was performed for these criteria and results were submitted numerically. In addition, these criteria are compared with each other and the most convenient methods for the optimum conditions are suggested.

  5. A CMOS current-mode log(x) and log(1/x) functions generator

    NASA Astrophysics Data System (ADS)

    Al-Absi, Munir A.; Al-Tamimi, Karama M.

    2014-08-01

    A novel Complementary Metal Oxide Semiconductor (CMOS) current-mode low-voltage and low-power controllable logarithmic function circuit is presented. The proposed design utilises one Operational Transconductance Amplifier (OTA) and two PMOS transistors biased in weak inversion region. The proposed design provides high dynamic range, controllable amplitude, high accuracy and is insensitive to temperature variations. The circuit operates on a ±0.6 V power supply and consumes 0.3 μW. The functionality of the proposed circuit was verified using HSPICE with 0.35 μm 2P4M CMOS process technology.

  6. Preliminary performances measured on a CMOS long linear array for space application

    NASA Astrophysics Data System (ADS)

    Renard, Christophe; Artinian, Armand; Dantes, Didier; Lepage, Gérald; Diels, Wim

    2017-11-01

    This paper presents the design and the preliminary performances of a CMOS linear array, resulting from collaboration between Alcatel Alenia Space and Cypress Semiconductor BVBA, which takes advantage of emerging potentialities of CMOS technologies. The design of the sensor is presented: it includes 8000 panchromatic pixels with up to 25 rows used in TDI mode, and 4 lines of 2000 pixels for multispectral imaging. Main system requirements and detector tradeoffs are recalled, and the preliminary test results obtained with a first generation prototype are summarized and compared with predicted performances.

  7. Molecular Imaging of Kerogen and Minerals in Shale Rocks across Micro- and Nano- Scales

    NASA Astrophysics Data System (ADS)

    Hao, Z.; Bechtel, H.; Sannibale, F.; Kneafsey, T. J.; Gilbert, B.; Nico, P. S.

    2016-12-01

    Fourier transform infrared (FTIR) spectroscopy is a reliable and non-destructive quantitative method to evaluate mineralogy and kerogen content / maturity of shale rocks, although it is traditionally difficult to assess the organic and mineralogical heterogeneity at micrometer and nanometer scales due to the diffraction limit of the infrared light. However, it is truly at these scales that the kerogen and mineral content and their formation in share rocks determines the quality of shale gas reserve, the gas flow mechanisms and the gas production. Therefore, it's necessary to develop new approaches which can image across both micro- and nano- scales. In this presentation, we will describe two new molecular imaging approaches to obtain kerogen and mineral information in shale rocks at the unprecedented high spatial resolution, and a cross-scale quantitative multivariate analysis method to provide rapid geochemical characterization of large size samples. The two imaging approaches are enhanced at nearfield respectively by a Ge-hemisphere (GE) and by a metallic scanning probe (SINS). The GE method is a modified microscopic attenuated total reflectance (ATR) method which rapidly captures a chemical image of the shale rock surface at 1 to 5 micrometer resolution with a large field of view of 600 X 600 micrometer, while the SINS probes the surface at 20 nm resolution which provides a chemically "deconvoluted" map at the nano-pore level. The detailed geochemical distribution at nanoscale is then used to build a machine learning model to generate self-calibrated chemical distribution map at micrometer scale with the input of the GE images. A number of geochemical contents across these two important scales are observed and analyzed, including the minerals (oxides, carbonates, sulphides), the organics (carbohydrates, aromatics), and the absorbed gases. These approaches are self-calibrated, optics friendly and non-destructive, so they hold the potential to monitor shale gas

  8. Endosomolytic Nano-Polyplex Platform Technology for Cytosolic Peptide Delivery To Inhibit Pathological Vasoconstriction.

    PubMed

    Evans, Brian C; Hocking, Kyle M; Kilchrist, Kameron V; Wise, Eric S; Brophy, Colleen M; Duvall, Craig L

    2015-06-23

    A platform technology has been developed and tested for delivery of intracellular-acting peptides through electrostatically complexed nanoparticles, or nano-polyplexes, formulated from an anionic endosomolytic polymer and cationic therapeutic peptides. This delivery platform has been initially tested and optimized for delivery of two unique vasoactive peptides, a phosphomimetic of heat shock protein 20 and an inhibitor of MAPKAP kinase II, to prevent pathological vasoconstriction (i.e., vasospasm) in human vascular tissue. These peptides inhibit vasoconstriction and promote vasorelaxation by modulating actin dynamics in vascular smooth muscle cells. Formulating these peptides into nano-polyplexes significantly enhances peptide uptake and retention, facilitates cytosolic delivery through a pH-dependent endosomal escape mechanism, and enhances peptide bioactivity in vitro as measured by inhibition of F-actin stress fiber formation. In comparison to treatment with the free peptides, which were endowed with cell-penetrating sequences, the nano-polyplexes significantly increased vasorelaxation, inhibited vasoconstriction, and decreased F-actin formation in the human saphenous vein ex vivo. These results suggest that these formulations have significant potential for treatment of conditions such as cerebral vasospasm following subarachnoid hemorrhage. Furthermore, because many therapeutic peptides include cationic cell-penetrating segments, this simple and modular platform technology may have broad applicability as a cost-effective approach for enhancing the efficacy of cytosolically active peptides.

  9. 32 x 16 CMOS smart pixel array for optical interconnects

    NASA Astrophysics Data System (ADS)

    Kim, Jongwoo; Guilfoyle, Peter S.; Stone, Richard V.; Hessenbruch, John M.; Choquette, Kent D.; Kiamilev, Fouad E.

    2000-05-01

    Free space optical interconnects can increase throughput capacities and eliminate much of the energy consumption required for `all electronic' systems. High speed optical interconnects can be achieved by integrating optoelectronic devices with conventional electronics. Smart pixel arrays have been developed which use optical interconnects. An individual smart pixel cell is composed of a vertical cavity surface emitting laser (VCSEL), a photodetector, an optical receiver, a laser driver, and digital logic circuitry. Oxide-confined VCSELs are being developed to operate at 850 nm with a threshold current of approximately 1 mA. Multiple quantum well photodetectors are being fabricated from AlGaAs for use with the 850 nm VCSELs. The VCSELs and photodetectors are being integrated with complementary metal oxide semiconductor (CMOS) circuitry using flip-chip bonding. CMOS circuitry is being integrated with a 32 X 16 smart pixel array. The 512 smart pixels are serially linked. Thus, an entire data stream may be clocked through the chip and output electrically by the last pixel. Electrical testing is being performed on the CMOS smart pixel array. Using an on-chip pseudo random number generator, a digital data sequence was cycled through the chip verifying operation of the digital circuitry. Although, the prototype chip was fabricated in 1.2 micrometers technology, simulations have demonstrated that the array can operate at 1 Gb/s per pixel using 0.5 micrometers technology.

  10. [Application of electrostatic spinning technology in nano-structured polymer scaffold].

    PubMed

    Chen, Denglong; Li, Min; Fang, Qian

    2007-04-01

    To review the latest development in the research on the application of the electrostatic spinning technology in preparation of the nanometer high polymer scaffold. The related articles published at home and abroad during the recent years were extensively reviewed and comprehensively analyzed. Micro/nano-structure and space topology on the surfaces of the scaffold materials, especially the weaving structure, were considered to have an important effect on the cell adhesion, proliferation, directional growth, and biological activation. The electrospun scaffold was reported to have a resemblance to the structure of the extracellular matrix and could be used as a promising scaffold for the tissue engineering application. The electrospun scaffolds were applied to the cartilage, bone, blood vessel, heart, and nerve tissue engineering fields. The nano-structured polymer scaffold can support the cell adhesion, proliferation, location, and differentiation, and this kind of scaffold has a considerable value in the tissue engineering field.

  11. The challenge of screen printed Ag metallization on nano-scale poly-silicon passivated contacts for silicon solar cells

    NASA Astrophysics Data System (ADS)

    Jiang, Lin; Song, Lixin; Yan, Li; Becht, Gregory; Zhang, Yi; Hoerteis, Matthias

    2017-08-01

    Passivated contacts can be used to reduce metal-induced recombination for higher energy conversion efficiency for silicon solar cells, and are obtained increasing attentions by PV industries in recent years. The reported thicknesses of passivated contact layers are mostly within tens of nanometer range, and the corresponding metallization methods are realized mainly by plating/evaporation technology. This high cost metallization cannot compete with the screen printing technology, and may affect its market potential comparing with the presently dominant solar cell technology. Very few works have been reported on screen printing metallization on passivated contact solar cells. Hence, there is a rising demand to realize screen printing metallization technology on this topic. In this work, we investigate applying screen printing metallization pastes on poly-silicon passivated contacts. The critical challenge for us is to build low contact resistance that can be competitive to standard technology while restricting the paste penetrations within the thin nano-scale passivated contact layers. The contact resistivity of 1.1mohm-cm2 and the open circuit voltages > 660mV are achieved, and the most appropriate thickness range is estimated to be around 80 150nm.

  12. Advanced CMOS Radiation Effects Testing and Analysis

    NASA Technical Reports Server (NTRS)

    Pellish, J. A.; Marshall, P. W.; Rodbell, K. P.; Gordon, M. S.; LaBel, K. A.; Schwank, J. R.; Dodds, N. A.; Castaneda, C. M.; Berg, M. D.; Kim, H. S.; hide

    2014-01-01

    Presentation at the annual NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop (ETW). The material includes an update of progress in this NEPP task area over the past year, which includes testing, evaluation, and analysis of radiation effects data on the IBM 32 nm silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) process. The testing was conducted using test vehicles supplied by directly by IBM.

  13. Wideband low-noise variable-gain BiCMOS transimpedance amplifier

    NASA Astrophysics Data System (ADS)

    Meyer, Robert G.; Mack, William D.

    1994-06-01

    A new monolithic variable gain transimpedance amplifier is described. The circuit is realized in BiCMOS technology and has measured gain of 98 kilo ohms, bandwidth of 128 MHz, input noise current spectral density of 1.17 pA/square root of Hz and input signal-current handling capability of 3 mA.

  14. CMOS VLSI Active-Pixel Sensor for Tracking

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata; Sun, Chao; Yang, Guang; Heynssens, Julie

    2004-01-01

    An architecture for a proposed active-pixel sensor (APS) and a design to implement the architecture in a complementary metal oxide semiconductor (CMOS) very-large-scale integrated (VLSI) circuit provide for some advanced features that are expected to be especially desirable for tracking pointlike features of stars. The architecture would also make this APS suitable for robotic- vision and general pointing and tracking applications. CMOS imagers in general are well suited for pointing and tracking because they can be configured for random access to selected pixels and to provide readout from windows of interest within their fields of view. However, until now, the architectures of CMOS imagers have not supported multiwindow operation or low-noise data collection. Moreover, smearing and motion artifacts in collected images have made prior CMOS imagers unsuitable for tracking applications. The proposed CMOS imager (see figure) would include an array of 1,024 by 1,024 pixels containing high-performance photodiode-based APS circuitry. The pixel pitch would be 9 m. The operations of the pixel circuits would be sequenced and otherwise controlled by an on-chip timing and control block, which would enable the collection of image data, during a single frame period, from either the full frame (that is, all 1,024 1,024 pixels) or from within as many as 8 different arbitrarily placed windows as large as 8 by 8 pixels each. A typical prior CMOS APS operates in a row-at-a-time ( grolling-shutter h) readout mode, which gives rise to exposure skew. In contrast, the proposed APS would operate in a sample-first/readlater mode, suppressing rolling-shutter effects. In this mode, the analog readout signals from the pixels corresponding to the windows of the interest (which windows, in the star-tracking application, would presumably contain guide stars) would be sampled rapidly by routing them through a programmable diagonal switch array to an on-chip parallel analog memory array. The

  15. Modular Adder Designs Using Optimal Reversible and Fault Tolerant Gates in Field-Coupled QCA Nanocomputing

    NASA Astrophysics Data System (ADS)

    Bilal, Bisma; Ahmed, Suhaib; Kakkar, Vipan

    2018-02-01

    The challenges which the CMOS technology is facing toward the end of the technology roadmap calls for an investigation of various logical and technological solutions to CMOS at the nano scale. Two such paradigms which are considered in this paper are the reversible logic and the quantum-dot cellular automata (QCA) nanotechnology. Firstly, a new 3 × 3 reversible and universal gate, RG-QCA, is proposed and implemented in QCA technology using conventional 3-input majority voter based logic. Further the gate is optimized by using explicit interaction of cells and this optimized gate is then used to design an optimized modular full adder in QCA. Another configuration of RG-QCA gate, CRG-QCA, is then proposed which is a 4 × 4 gate and includes the fault tolerant characteristics and parity preserving nature. The proposed CRG-QCA gate is then tested to design a fault tolerant full adder circuit. Extensive comparisons of gate and adder circuits are drawn with the existing literature and it is envisaged that our proposed designs perform better and are cost efficient in QCA technology.

  16. Remote optical sensing on the nanometer scale with a bowtie aperture nano-antenna on a fiber tip of scanning near-field optical microscopy

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Atie, Elie M.; Xie, Zhihua; El Eter, Ali

    2015-04-13

    Plasmonic nano-antennas have proven the outstanding ability of sensing chemical and physical processes down to the nanometer scale. Sensing is usually achieved within the highly confined optical fields generated resonantly by the nano-antennas, i.e., in contact to the nanostructures. In this paper, we demonstrate the sensing capability of nano-antennas to their larger scale environment, well beyond their plasmonic confinement volume, leading to the concept of “remote” (non contact) sensing on the nanometer scale. On the basis of a bowtie-aperture nano-antenna (BNA) integrated at the apex of a SNOM (Scanning Near-field Optical Microscopy) fiber tip, we introduce an ultra-compact, moveable, andmore » background-free optical nanosensor for the remote sensing of a silicon surface (up to distance of 300 nm). Sensitivity of the BNA to its large scale environment is high enough to expect the monitoring and control of the spacing between the nano-antenna and a silicon surface with sub-nanometer accuracy. This work paves the way towards an alternative class of nanopositioning techniques, based on the monitoring of diffraction-free plasmon resonance, that are alternative to nanomechanical and diffraction-limited optical interference-based devices.« less

  17. Ignition dynamics and activation energies of metallic thermites: From nano- to micron-scale particulate composites

    NASA Astrophysics Data System (ADS)

    Hunt, Emily M.; Pantoya, Michelle L.

    2005-08-01

    Ignition behaviors associated with nano- and micron-scale particulate composite thermites were studied experimentally and modeled theoretically. The experimental analysis utilized a CO2 laser ignition apparatus to ignite the front surface of compacted nickel (Ni) and aluminum (Al) pellets at varying heating rates. Ignition delay time and ignition temperature as a function of both Ni and Al particle size were measured using high-speed imaging and microthermocouples. The apparent activation energy was determined from this data using a Kissinger isoconversion method. This study shows that the activation energy is significantly lower for nano- compared with micron-scale particulate media (i.e., as low as 17.4 compared with 162.5kJ /mol, respectively). Two separate Arrhenius-type mathematical models were developed that describe ignition in the nano- and the micron-composite thermites. The micron-composite model is based on a heat balance while the nanocomposite model incorporates the energy of phase transformation in the alumina shell theorized to be an initiating step in the solid-solid diffusion reaction and uniquely appreciable in nanoparticle media. These models were found to describe the ignition of the Ni /Al alloy for a wide range of heating rates.

  18. Reversible Flip-Flops in Quantum-Dot Cellular Automata

    NASA Astrophysics Data System (ADS)

    Rad, Samaneh Kazemi; Heikalabad, Saeed Rasouli

    2017-09-01

    Quantum-dot cellular automata is a new technology to design the efficient combinational and sequential circuits at the nano-scale. This technology has many desirable advantages compared to the CMOS technology such as low power consumption, less occupation area and low latency. These features make it suitable for use in flip-flop design. In this paper, with knowing the characteristics of reversible logic, we design new structures for flip-flops. The operations of these structures are evaluated with QCADesigner Version 2.0.3 simulator. In addition, we calculate the power dissipation of these structures by QCAPro tool. The results illustrated that proposed structures are efficient compared to the previous ones.

  19. Feasibility of Pb phytoextraction using nano-materials assisted ryegrass: Results of a one-year field-scale experiment.

    PubMed

    Liang, Shu-Xuan; Jin, Yu; Liu, Wei; Li, Xiliang; Shen, Shi-Gang; Ding, Ling

    2017-04-01

    The effect of the combined application of nano-hydroxyapatite (NHAP) or nano-carbon black (NCB) on the phytoextraction of Pb by ryegrass was investigated as an enhanced remediation technique for soils by field-scale experiment. After the addition of 0.2% NHAP or NCB to the soil, temporal variation of the uptake of Pb in aboveground parts and roots were observed. Ryegrass shoot concentrations of Pb were lower with nano-materials application than without nano-materials for the first month. However, the shoot concentrations of Pb were significantly increased with nano-materials application, in particular NHAP groups. The ryegrass root concentrations of Pb were lower with nano-materials application for the first month. These results indicated that nano-materials had significant effects on stabilization of lead, especially at the beginning of the experiment. Along with the experimental proceeding, phytotoxicity was alleviated after the incorporation of nano-materials. The ryegrass biomass was significantly higher with nano-materials application. Consequently, the Pb phytoextraction potential of ryegrass significantly increased with nano-materials application compared to the gounps without nano-materials application. The total removal rates of soil Pb were higher after combined application of NHAP than NCB. NHAP is more suitable than NCB for in-situ remediation of Pb-contaminated soils. The ryegrass translocation factor exhibited a marked increase with time. It was thought that the major role of NHP and NBA might be to alleviate the Pb phytotoxicity and increase biomass of plants. Copyright © 2016 Elsevier Ltd. All rights reserved.

  20. Turbulent Channel Flow Measurements with a Nano-scale Thermal Anemometry Probe

    NASA Astrophysics Data System (ADS)

    Bailey, Sean; Witte, Brandon

    2014-11-01

    Using a Nano-scale Thermal Anemometry Probe (NSTAP), streamwise velocity was measured in a turbulent channel flow wind tunnel at Reynolds numbers ranging from Reτ = 500 to Reτ = 4000 . Use of these probes results in the a sensing-length-to-viscous-length-scale ratio of just 5 at the highest Reynolds number measured. Thus measured results can be considered free of spatial filtering effects. Point statistics are compared to recently published DNS and LDV data at similar Reynolds numbers and the results are found to be in good agreement. However, comparison of the measured spectra provide further evidence of aliasing at long wavelengths due to application of Taylor's frozen flow hypothesis, with increased aliasing evident with increasing Reynolds numbers. In addition to conventional point statistics, the dissipative scales of turbulence are investigated with focus on the wall-dependent scaling. Results support the existence of a universal pdf distribution of these scales once scaled to account for large-scale anisotropy. This research is supported by KSEF Award KSEF-2685-RDE-015.

  1. Study of prototypes of LFoundry active CMOS pixels sensors for the ATLAS detector

    NASA Astrophysics Data System (ADS)

    Vigani, L.; Bortoletto, D.; Ambroz, L.; Plackett, R.; Hemperek, T.; Rymaszewski, P.; Wang, T.; Krueger, H.; Hirono, T.; Caicedo Sierra, I.; Wermes, N.; Barbero, M.; Bhat, S.; Breugnon, P.; Chen, Z.; Godiot, S.; Pangaud, P.; Rozanov, A.

    2018-02-01

    Current high energy particle physics experiments at the LHC use hybrid silicon detectors, in both pixel and strip configurations, for their inner trackers. These detectors have proven to be very reliable and performant. Nevertheless, there is great interest in depleted CMOS silicon detectors, which could achieve a similar performance at lower cost of production. We present recent developments of this technology in the framework of the ATLAS CMOS demonstrator project. In particular, studies of two active sensors from LFoundry, CCPD_LF and LFCPIX, are shown.

  2. A Novel Technology for Localization of Parathyroid Adenoma: Ultrasound-Guided Fine Needle Aspiration Combined With Rapid Parathyroid Hormone Detection and Nano-Carbon Technology.

    PubMed

    Yan, Shouyi; Zhao, Wenxin; Wang, Bo; Zhang, Liyong

    2018-06-01

    The study aims to evaluate the clinic feasibility of rapid parathyroid hormone (PTH) detection and nano-carbon technology in preoperative diagnosis and localization of parathyroid adenoma. With the guidance of ultrasound, the operator performed the parathyroid puncture and tested the PTH value by using a PTH test kit, and then injected nano-carbon into parathyroid adenoma as a marker to observe whether the parathyroid adenoma was stained black during the final operation. Meanwhile, a part of excised specimen was made into homogenate and detected rapidly again by using the PTH test kit. The remaining was confirmed by intraoperative frozen pathological examination. The sensitivity (12/12) of preoperative diagnosis was significantly higher than that of ultrasound (6/12), magnetic resonance imaging (7/12), and MIBI (9/12). During the operation, we found that the inner part of the parathyroid adenoma was stained black, and the PTH value of the specimen homogenate confirmed as parathyroid adenoma was more than 3000 pg/mL. This novel technology, as a very positive method for localization of parathyroid adenoma, plays an important role in guaranteeing the surgical reliability of parathyroid adenoma with help of nano-carbon technology.

  3. Development of a Cryostat to Characterize Nano-scale Superconducting Quantum Interference Devices

    NASA Astrophysics Data System (ADS)

    Longo, Mathew; Matheny, Matthew; Knudsen, Jasmine

    2016-03-01

    We have designed and constructed a low-noise vacuum cryostat to be used for the characterization of nano-scale superconducting quantum interference devices (SQUIDs). Such devices are very sensitive to magnetic fields and can measure changes in flux on the order of a single electron magnetic moment. As a part of the design process, we calculated the separation required between the cryogenic preamplifier and superconducting magnet, including a high-permeability magnetic shield, using a finite-element model of the apparatus. The cryostat comprises a vacuum cross at room temperature for filtered DC and shielded RF electrical connections, a thin-wall stainless steel support tube, a taper-sealed cryogenic vacuum can, and internal mechanical support and wiring for the nanoSQUID. The Dewar is modified with a room-temperature flange with a sliding seal for the cryostat. The flange supports the superconducting 3 Tesla magnet and thermometry wiring. Upon completion of the cryostat fabrication and Dewar modifications, operation of the nanoSQUIDs as transported from our collaborator's laboratory in Israel will be confirmed, as the lead forming the SQUID is sensitive to oxidation and the SQUIDs must be shipped in a vacuum container. After operation of the nanoSQUIDs is confirmed, the primary work of characterizing their high-speed properties will begin. This will include looking at the measurement of relaxation oscillations at high bandwidth in comparison to the theoretical predictions of the current model.

  4. Silicon CMOS optical receiver circuits with integrated thin-film compound semiconductor detectors

    NASA Astrophysics Data System (ADS)

    Brooke, Martin A.; Lee, Myunghee; Jokerst, Nan Marie; Camperi-Ginestet, C.

    1995-04-01

    While many circuit designers have tackled the problem of CMOS digital communications receiver design, few have considered the problem of circuitry suitable for an all CMOS digital IC fabrication process. Faced with a high speed receiver design the circuit designer will soon conclude that a high speed analog-oriented fabrication process provides superior performance advantages to a digital CMOS process. However, for applications where there are overwhelming reasons to integrate the receivers on the same IC as large amounts of conventional digital circuitry, the low yield and high cost of the exotic analog-oriented fabrication is no longer an option. The issues that result from a requirement to use a digital CMOS IC process cut across all aspects of receiver design, and result in significant differences in circuit design philosophy and topology. Digital ICs are primarily designed to yield small, fast CMOS devices for digital logic gates, thus no effort is put into providing accurate or high speed resistances, or capacitors. This lack of any reliable resistance or capacitance has a significant impact on receiver design. Since resistance optimization is not a prerogative of the digital IC process engineer, the wisest option is thus to not use these elements, opting instead for active circuitry to replace the functions normally ascribed to resistance and capacitance. Depending on the application receiver noise may be a dominant design constraint. The noise performance of CMOS amplifiers is different than bipolar or GaAs MESFET circuits, shot noise is generally insignificant when compared to channel thermal noise. As a result the optimal input stage topology is significantly different for the different technologies. It is found that, at speeds of operation approaching the limits of the digital CMOS process, open loop designs have noise-power-gain-bandwidth tradeoff performance superior to feedback designs. Furthermore, the lack of good resisters and capacitors

  5. CMOS sensors for atmospheric imaging

    NASA Astrophysics Data System (ADS)

    Pratlong, Jérôme; Burt, David; Jerram, Paul; Mayer, Frédéric; Walker, Andrew; Simpson, Robert; Johnson, Steven; Hubbard, Wendy

    2017-09-01

    Recent European atmospheric imaging missions have seen a move towards the use of CMOS sensors for the visible and NIR parts of the spectrum. These applications have particular challenges that are completely different to those that have driven the development of commercial sensors for applications such as cell-phone or SLR cameras. This paper will cover the design and performance of general-purpose image sensors that are to be used in the MTG (Meteosat Third Generation) and MetImage satellites and the technology challenges that they have presented. We will discuss how CMOS imagers have been designed with 4T pixel sizes of up to 250 μm square achieving good charge transfer efficiency, or low lag, with signal levels up to 2M electrons and with high line rates. In both devices a low noise analogue read-out chain is used with correlated double sampling to suppress the readout noise and give a maximum dynamic range that is significantly larger than in standard commercial devices. Radiation hardness is a particular challenge for CMOS detectors and both of these sensors have been designed to be fully radiation hard with high latch-up and single-event-upset tolerances, which is now silicon proven on MTG. We will also cover the impact of ionising radiation on these devices. Because with such large pixels the photodiodes have a large open area, front illumination technology is sufficient to meet the detection efficiency requirements but with thicker than standard epitaxial silicon to give improved IR response (note that this makes latch up protection even more important). However with narrow band illumination reflections from the front and back of the dielectric stack on the top of the sensor produce Fabry-Perot étalon effects, which have been minimised with process modifications. We will also cover the addition of precision narrow band filters inside the MTG package to provide a complete imaging subsystem. Control of reflected light is also critical in obtaining the

  6. ESD protection design for advanced CMOS

    NASA Astrophysics Data System (ADS)

    Huang, Jin B.; Wang, Gewen

    2001-10-01

    ESD effects in integrated circuits have become a major concern as today's technologies shrink to sub-micron/deep- sub-micron dimensions. The thinner gate oxide and shallower junction depth used in the advanced technologies make them very vulnerable to ESD damages. The advanced techniques like silicidation and STI (shallow trench insulation) used for improving other device performances make ESD design even more challenging. For non-silicided technologies, a certain DCGS (drain contact to gate edge spacing) is needed to achieve ESD hardness for nMOS output drivers and nMOS protection transistors. The typical DCGS values are 4-5um and 2-3um for 0.5um and 0.25um CMOS, respectively. The silicidation reduces the ballast resistance provided by DCGS with at least a factor of 10. As a result, scaling of the ESD performance with device width is lost and even zero ESD performance is reported for standard silicided devices. The device level ESD design is focused in this paper, which includes GGNMOS (gate grounded NMOS) and GCNMOS (gate coupled NMOS). The device level ESD testing including TLP (transmission line pulse) is given. Several ESD issues caused by advanced technologies have been pointed out. The possible solutions have been developed and summarized including silicide blocking, process optimization, back-end ballasting, and new protection scheme, dummy gate/n-well resistor ballsting, etc. Some of them require process cost increase, and others provide novel, compact, and simple design but involving royalty/IP (intellectual property) issue. Circuit level ESD design and layout design considerations are covered. The top-level ESD protection strategies are also given.

  7. Total Ionizing Dose Effects in Bipolar and BiCMOS Devices

    NASA Technical Reports Server (NTRS)

    Chavez, Rosa M.; Rax, Bernard G.; Scheick, Leif Z.; Johnston, Allan H.

    2005-01-01

    This paper describes total ionizing dose (TID) test results performed at JPL. Bipolar and BiCMOS device samples were tested exhibiting significant degradation and failures at different irradiation levels. Linear technology which is susceptible to low-dose dependency (ELDRS) exhibited greater damage for devices tested under zero bias condition.

  8. Evaluation of nano-technology-modified zirconia oral implants: a study in rabbits.

    PubMed

    Lee, Jaebum; Sieweke, Janet H; Rodriguez, Nancy A; Schüpbach, Peter; Lindström, Håkan; Susin, Cristiano; Wikesjö, Ulf M E

    2009-07-01

    The objective of this study was to screen candidate nano-technology-modified, micro-structured zirconia implant surfaces relative to local bone formation and osseointegration. Proprietary nano-technology surface-modified (calcium phosphate: CaP) micro-structured zirconia implants (A and C), control micro-structured zirconia implants (ZiUnite), and titanium porous oxide implants (TiUnite) were implanted into the femoral condyle in 40 adult male New Zealand White rabbits. Each animal received one implant in each hind leg; thus, 20 animals received A and C implants and 20 animals received ZiUnite and TiUnite implants in contralateral hind legs. Ten animals/group were euthanized at weeks 3 and 6 when biopsies of the implant sites were processed for histometric analysis using digital photomicrographs produced using backscatter scanning electron microscopy. The TiUnite surface demonstrated significantly greater bone-implant contact (BIC) (77.6+/-2.6%) compared with the A (64.6+/-3.6%) and C (62.2+/-3.1%) surfaces at 3 weeks (p<0.05). Numerical differences between ZiUnite (70.5+/-3.1%) and A and C surfaces did not reach statistical significance (p>0.05). Similarly, there were non-significant differences between the TiUnite and the ZiUnite surfaces (p>0.05). At 6 weeks, there were no significant differences in BIC between the TiUnite (67.1+/-4.2%), ZiUnite (69.7+/-5.7%), A (68.6+/-1.9%), and C (64.5+/-4.1%) surfaces (p>0.05). TiUnite and ZiUnite implant surfaces exhibit high levels of osseointegration that, in this model, confirm their advanced osteoconductive properties. Addition of CaP nano-technology to the ZiUnite surface does not enhance the already advanced osteoconductivity displayed by the TiUnite and ZiUnite implant surfaces.

  9. Challenges for the Modern Science in its Descend Towards Nano Scale

    PubMed Central

    Uskoković, Vuk

    2013-01-01

    The current rise in the interest in physical phenomena at nano spatial scale is described hereby as a natural consequence of the scientific progress in manipulation with matter with an ever higher sensitivity. The reason behind arising of the entirely new field of nanoscience is that the properties of nanostructured materials may significantly differ from their bulk counterparts and cannot be predicted by extrapolations of the size-dependent properties displayed by materials composed of microsized particles. It is also argued that although a material can comprise critical boundaries at the nano scale, this does not mean that it will inevitably exhibit properties that endow a nanomaterial. This implies that the attribute of “nanomaterial” can be used only in relation with a given property of interest. The major challenges faced with the expansion of resolution of the materials design, in terms of hardly reproducible experiments, are further discussed. It is claimed that owing to an unavoidable interference between the experimental system and its environment to which the controlling system belongs, an increased fineness of the experimental settings will lead to ever more difficulties in rendering them reproducible and controllable. Self-assembly methods in which a part of the preprogrammed scientific design is substituted with letting physical systems spontaneously evolve into attractive and functional structures is mentioned as one of the ways to overcome the problems inherent in synthetic approaches at the ultrafine scale. The fact that physical systems partly owe their properties to the interaction with their environment implies that each self-assembly process can be considered a co-assembly event. PMID:26491428

  10. Evaporation of Liquid Droplet in Nano and Micro Scales from Statistical Rate Theory.

    PubMed

    Duan, Fei; He, Bin; Wei, Tao

    2015-04-01

    The statistical rate theory (SRT) is applied to predict the average evaporation flux of liquid droplet after the approach is validated in the sessile droplet experiments of the water and heavy water. The steady-state experiments show a temperature discontinuity at the evaporating interface. The average evaporation flux is evaluated by individually changing the measurement at a liquid-vapor interface, including the interfacial liquid temperature, the interfacial vapor temperature, the vapor-phase pressure, and the droplet size. The parameter study shows that a higher temperature jump would reduce the average evaporation flux. The average evaporation flux can significantly be influenced by the interfacial liquid temperature and the vapor-phase pressure. The variation can switch the evaporation into condensation. The evaporation flux is found to remain relative constant if the droplet is larger than a micro scale, while the smaller diameters in nano scale can produce a much higher evaporation flux. In addition, a smaller diameter of droplets with the same liquid volume has a larger surface area. It is suggested that the evaporation rate increases dramatically as the droplet shrinks into nano size.

  11. Nano-extrusion: a promising tool for continuous manufacturing of solid nano-formulations.

    PubMed

    Baumgartner, Ramona; Eitzlmayr, Andreas; Matsko, Nadejda; Tetyczka, Carolin; Khinast, Johannes; Roblegg, Eva

    2014-12-30

    Since more than 40% of today's drugs have low stability, poor solubility and/or limited ability to cross certain biological barriers, new platform technologies are required to address these challenges. This paper describes a novel continuous process that converts a stabilized aqueous nano-suspension into a solid oral formulation in a single step (i.e., the NANEX process) in order to improve the solubility of a model drug (phenytoin). Phenytoin nano-suspensions were prepared via media milling using different stabilizers. A stable nano-suspension was obtained using Tween(®) 80 as a stabilizer. The matrix material (Soluplus(®)) was gravimetrically fed into the hot melt extruder. The suspension was introduced through a side feeding device and mixed with the molten polymer to immediately devolatilize the water in the nano-suspension. Phenytoin nano-crystals were dispersed and embedded in the molten polymer. Investigation of the nano-extrudates via transmission electron microscopy and atomic force microscopy showed that the nano-crystals were embedded de-aggregated in the extrudates. Furthermore, no changes in the crystallinity (due to the mechanical and thermal stress) occurred. The dissolution studies confirmed that the prepared nano-extrudates increased the solubility of nano-crystalline phenytoin, regardless of the polymer. Our work demonstrates that NANEX represents a promising new platform technology in the design of novel drug delivery systems to improve drug performance. Copyright © 2014 Elsevier B.V. All rights reserved.

  12. 270GHz SiGe BiCMOS manufacturing process platform for mmWave applications

    NASA Astrophysics Data System (ADS)

    Kar-Roy, Arjun; Preisler, Edward J.; Talor, George; Yan, Zhixin; Booth, Roger; Zheng, Jie; Chaudhry, Samir; Howard, David; Racanelli, Marco

    2011-11-01

    TowerJazz has been offering the high volume commercial SiGe BiCMOS process technology platform, SBC18, for more than a decade. In this paper, we describe the TowerJazz SBC18H3 SiGe BiCMOS process which integrates a production ready 240GHz FT / 270 GHz FMAX SiGe HBT on a 1.8V/3.3V dual gate oxide CMOS process in the SBC18 technology platform. The high-speed NPNs in SBC18H3 process have demonstrated NFMIN of ~2dB at 40GHz, a BVceo of 1.6V and a dc current gain of 1200. This state-of-the-art process also comes with P-I-N diodes with high isolation and low insertion losses, Schottky diodes capable of exceeding cut-off frequencies of 1THz, high density stacked MIM capacitors, MOS and high performance junction varactors characterized up to 50GHz, thick upper metal layers for inductors, and various resistors such as low value and high value unsilicided poly resistors, metal and nwell resistors. Applications of the SBC18H3 platform for millimeter-wave products for automotive radars, phased array radars and Wband imaging are presented.

  13. Analytical study of nano-scale logical operations

    NASA Astrophysics Data System (ADS)

    Patra, Moumita; Maiti, Santanu K.

    2018-07-01

    A complete analytical prescription is given to perform three basic (OR, AND, NOT) and two universal (NAND, NOR) logic gates at nano-scale level using simple tailor made geometries. Two different geometries, ring-like and chain-like, are taken into account where in each case the bridging conductor is coupled to a local atomic site through a dangling bond whose site energy can be controlled by means of external gate electrode. The main idea is that when injecting electron energy matches with site energy of local atomic site transmission probability drops exactly to zero, whereas the junction exhibits finite transmission for other energies. Utilizing this prescription we perform logical operations, and, we strongly believe that the proposed results can be verified in laboratory. Finally, we numerically compute two-terminal transmission probability considering general models and the numerical results match exactly well with our analytical findings.

  14. Nano-scale Characterization of Basalt - Quenched Lava and Reheated Products

    NASA Astrophysics Data System (ADS)

    Burkhard, D. J.; Wirth, R.

    2001-12-01

    In order to trace the mechanism of crystallization in basalt we investigated basalt lava from active Pu'u O'o, Kilauea, Hawaii with TEM. We considered (1) quenched melt (glass, obtained by dipping a hammer into the lava (April 1996) and subsequent quenching in air), and (2) that glass after reheating for 48 hr at 850° C, and (3) after reheating for 48 hr at 930° C. Previous investigations had illustrated interface-controlled growth of pyroxene and Fe-Ti oxides at 850° C and volumetric growth of these phases in addition to plagioclase above 920° C [1]. In general, (1) is a perfect glass to the nano-scale. Occasional inhomogeneities are identified as plagioclase. With a size of no more than approximately 100 unit cells, these "crystals" might be considered as nuclei. Dendrites of pyroxene, identified on the micron scale with back scattered electrons [1], occur as a sequence of slightly displaced plates with equal orientation on the nano-scale. HREM, diffraction pattern and EDS confirm that this is augite, in agreement with investigations on the micron-scale [1]. Fe-Ti oxides occur isolated in the matrix with a diameter less than 100 nm, in contrast to the micron-scale, where Fe-Ti oxides appear at the apices of augite. In (3) we find in addition plagioclase with thin lamellae, indicating twinning. In (3),augite contains lamellae parallel to (001), and they are identified as pigeonite by HREM and electron diffraction. Pigeonite lamellae occur also in (2), however, less developed. Electron diffraction suggests that reflections of augite correspond to the space group C 2/c, and of exsolved pigeonite to P 21/c, which is a low pigeonite. These exsolution phenomena are undistiguishable from what is usually observed in relation to high cooling rates [e.g. 2]. The stability of pigeonite at these temperatures suggests a Fe/Fe+Mg ratio above 0.6 for pyroxene in the quadilateral [3]. Microprobe analyses [1] suggest ratios of 0.4 to 0.5. [1] Burkhard D.J.M. (2001) J. Petrol

  15. Path to bio-nano-information fusion.

    PubMed

    Chen, Jia Ming; Ho, Chih-Ming

    2006-12-01

    This article will discuss the challenges in a new convergent discipline created by the fusion of biotechnology, nanotechnology, and information technology. To illustrate the research challenges, we will begin with an introduction to the nanometer-scale environment in which biology resides, and point out the many important behaviors of matters at that scale. Then we will describe an ideal model system, the cell, for bio-nano-information fusion. Our efforts in advancing this field at the Institute of Cell Mimetic Space Exploration (CMISE) will be introduced here as an example to move toward achieving this goal.

  16. Generation of red color and near infrared bandpass filters using nano-scale plasmonic structures

    NASA Astrophysics Data System (ADS)

    Sokar, Ahmed A. Z.; Hutter, Franz X.; Burghartz, Joachim N.

    2015-05-01

    Extraordinary/Enhanced optical transmission (EOT) is studied in the realization of plasmonic based filters in the visible range and near infrared spectrum for the purpose of substituting the Bayer-pattern filter with a new CMOS-compatible filter which can be easily tuned to provide different filter spectra. The filters studied in this paper are based on nano-structured 150nm thick Aluminum (Al) layer sandwiched between silicon dioxide (SiO2) layers. The resonance wavelengths achieved by the filters are at 700nm and 950 nm. Three parameters are used for tuning the two filters, i.e., aperture area, the period, and the holes arrangement (square or rhombic lattice). The filter is based on the principle of surface plasmon polaritons (SPPs), where the electromagnetic waves of the incident light couples with the free charges of the metal at the metal-dielectric interface. EOT is observed when the metal is structured with apertures such as rectangular, circular, cross, bowtie, etc. The resonance frequency in that case depends on the shape of the aperture, material used, the size of the apertures, the period of the array, and the surrounding material. The fabricated two filters show EOT at wavelengths as designed and simulated with blueshift in the peak location.

  17. Connection technology of HPTO type WECs and DC nano grid in island

    NASA Astrophysics Data System (ADS)

    Wang, Kun-lin; Tian, Lian-fang; You, Ya-ge; Wang, Xiao-hong; Sheng, Song-wei; Zhang, Ya-qun; Ye, Yin

    2016-07-01

    Wave energy fluctuating a great deal endangers the security of power grid especially micro grid in island. A DC nano grid supported by batteries is proposed to smooth the output power of wave energy converters (WECs). Thus, renewable energy converters connected to DC grid is a new subject. The characteristics of WECs are very important to the connection technology of HPTO type WECs and DC nano grid. Hydraulic power take-off system (HPTO) is the core unit of the largest category of WECs, with the functions of supplying suitable damping for a WEC to absorb wave energy, and converting captured wave energy to electricity. The HPTO is divided into a hydraulic energy storage system (HESS) and a hydraulic power generation system (HPGS). A primary numerical model for the HPGS is established in this paper. Three important basic characteristics of the HPGS are deduced, which reveal how the generator load determines the HPGS rotation rate. Therefore, the connector of HPTO type WEC and DC nano grid would be an uncontrollable rectifier with high reliability, also would be a controllable power converter with high efficiency, such as interleaved boost converter-IBC. The research shows that it is very flexible to connect to DC nano grid for WECs, but bypass resistance loads are indispensable for the security of WECs.

  18. Accelerated life testing effects on CMOS microcircuit characteristics

    NASA Technical Reports Server (NTRS)

    1977-01-01

    Accelerated life tests were performed on CMOS microcircuits to predict their long term reliability. The consistency of the CMOS microcircuit activation energy between the range of 125 C to 200 C and the range 200 C to 250 C was determined. Results indicate CMOS complexity and the amount of moisture detected inside the devices after testing influences time to failure of tested CMOS devices.

  19. Nano-Satellite Avionics

    NASA Technical Reports Server (NTRS)

    Culver, Harry

    1999-01-01

    Abstract NASA's Goddard Space Flight Center (GSFC) is currently developing a new class of satellites called the nano-satellite (nano-sat). A major objective of this development effort is to provide the technology required to enable a constellation of tens to hundreds of nano-satellites to make both remote and in-situ measurements from space. The Nano-sat will be a spacecraft weighing a maximum of 10 kg, including the propellant mass, and producing at least 5 Watts of power to operate the spacecraft. The electronics are required to survive a total radiation dose rate of 100 krads for a mission lifetime of two years. There are many unique challenges that must be met in order to develop the avionics for such a spacecraft. The first challenge is to develop an architecture that will operate on the allotted 5 Watts and meet the diverging requirements of multiple missions. This architecture will need to incorporate a multitude of new advanced microelectronic technologies. The microelectronics developed must be a modular and scalable packaging of technology to solve the problem of developing a solution to both reduce cost and meet the requirements of various missions. This development will utilize the most cost effective approach, whether infusing commercially driven semiconductor devices into spacecraft applications or partnering with industry to design and develop low cost, low power, low mass, and high capacity data processing devices. This paper will discuss the nano-sat architecture and the major technologies that will be developed. The major technologies that will be covered include: (1) Light weight Low Power Electronics Packaging, (2) Radiation Hard/Tolerant, Low Power Processing Platforms, (3) High capacity Low Power Memory Systems (4) Radiation Hard reconfiguragble field programmable gate array (rFPGA)

  20. Displacement damage effects on CMOS APS image sensors induced by neutron irradiation from a nuclear reactor

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Wang, Zujun, E-mail: wangzujun@nint.ac.cn; Huang, Shaoyan; Liu, Minbo

    The experiments of displacement damage effects on CMOS APS image sensors induced by neutron irradiation from a nuclear reactor are presented. The CMOS APS image sensors are manufactured in the standard 0.35 μm CMOS technology. The flux of neutron beams was about 1.33 × 10{sup 8} n/cm{sup 2}s. The three samples were exposed by 1 MeV neutron equivalent-fluence of 1 × 10{sup 11}, 5 × 10{sup 11}, and 1 × 10{sup 12} n/cm{sup 2}, respectively. The mean dark signal (K{sub D}), dark signal spike, dark signal non-uniformity (DSNU), noise (V{sub N}), saturation output signal voltage (V{sub S}), and dynamic rangemore » (DR) versus neutron fluence are investigated. The degradation mechanisms of CMOS APS image sensors are analyzed. The mean dark signal increase due to neutron displacement damage appears to be proportional to displacement damage dose. The dark images from CMOS APS image sensors irradiated by neutrons are presented to investigate the generation of dark signal spike.« less

  1. Spin pumping driven auto-oscillator for phase-encoded logic—device design and material requirements

    NASA Astrophysics Data System (ADS)

    Rakheja, S.; Kani, N.

    2017-05-01

    In this work, we propose a spin nano-oscillator (SNO) device where information is encoded in the phase (time-shift) of the output oscillations. The spin current required to set up the oscillations in the device is generated through spin pumping from an input nanomagnet that is precessing at RF frequencies. We discuss the operation of the SNO device, in which either the in-plane (IP) or out-of-plane (OOP) magnetization oscillations are utilized toward implementing ultra-low-power circuits. Using physical models of the nanomagnet dynamics and the spin transport through non-magnetic channels, we quantify the reliability of the SNO device using a "scaling ratio". Material requirements for the nanomagnet and the channel to ensure correct logic functionality are identified using the scaling ratio metric. SNO devices consume (2-5)× lower energy compared to CMOS devices and other spin-based devices with similar device sizes and material parameters. The analytical models presented in this work can be used to optimize the performance and scaling of SNO devices in comparison to CMOS devices at ultra-scaled technology nodes.

  2. Modeling and Characterization of Near-Crack-Tip Plasticity from Micro- to Nano-Scales

    NASA Technical Reports Server (NTRS)

    Glaessgen, Edward H.; Saether, Erik; Hochhalter, Jacob; Smith, Stephen W.; Ransom, Jonathan B.; Yamakov, Vesselin; Gupta, Vipul

    2010-01-01

    Methodologies for understanding the plastic deformation mechanisms related to crack propagation at the nano-, meso- and micro-length scales are being developed. These efforts include the development and application of several computational methods including atomistic simulation, discrete dislocation plasticity, strain gradient plasticity and crystal plasticity; and experimental methods including electron backscattered diffraction and video image correlation. Additionally, methodologies for multi-scale modeling and characterization that can be used to bridge the relevant length scales from nanometers to millimeters are being developed. The paper focuses on the discussion of newly developed methodologies in these areas and their application to understanding damage processes in aluminum and its alloys.

  3. Modeling and Characterization of Near-Crack-Tip Plasticity from Micro- to Nano-Scales

    NASA Technical Reports Server (NTRS)

    Glaessgen, Edward H.; Saether, Erik; Hochhalter, Jacob; Smith, Stephen W.; Ransom, Jonathan B.; Yamakov, Vesselin; Gupta, Vipul

    2011-01-01

    Methodologies for understanding the plastic deformation mechanisms related 10 crack propagation at the nano, meso- and micro-length scales are being developed. These efforts include the development and application of several computational methods including atomistic simulation, discrete dislocation plasticity, strain gradient plasticity and crystal plasticity; and experimental methods including electron backscattered diffraction and video image correlation. Additionally, methodologies for multi-scale modeling and characterization that can be used to bridge the relevant length scales from nanometers to millimeters are being developed. The paper focuses on the discussion of newly developed methodologies in these areas and their application to understanding damage processes in aluminum and its alloys.

  4. Integration of solid-state nanopores in a 0.5 μm cmos foundry process

    PubMed Central

    Uddin, A; Yemenicioglu, S; Chen, C-H; Corigliano, E; Milaninia, K; Theogarajan, L

    2013-01-01

    High-bandwidth and low-noise nanopore sensor and detection electronics are crucial in achieving single-DNA base resolution. A potential way to accomplish this goal is to integrate solid-state nanopores within a CMOS platform, in close proximity to the biasing electrodes and custom-designed amplifier electronics. Here we report the integration of solid-state nanopore devices in a commercial complementary metal-oxide semiconductor (CMOS) potentiostat chip implemented in On-Semiconductor’s 0.5 μm technology. Nanopore membranes incorporating electrodes are fabricated by post-CMOS micromachining utilizing the N+ polysilicon/SiO2/N+ polysilicon capacitor structure available in the aforementioned process. Nanopores are created in the CMOS process by drilling in a transmission electron microscope and shrinking by atomic layer deposition. We also describe a batch fabrication method to process a large of number of electrode-embedded nanopores with sub-10 nm diameter across CMOS-compatible wafers by electron beam lithography and atomic layer deposition. The CMOS-compatibility of our fabrication process is verified by testing the electrical functionality of on-chip circuitry. We observe high current leakage with the CMOS nanopore devices due to the ionic diffusion through the SiO2 membrane. To prevent this leakage, we coat the membrane with Al2O3 which acts as an efficient diffusion barrier against alkali ions. The resulting nanopore devices also exhibit higher robustness and lower 1/f noise as compared to SiO2 and SiNx. Furthermore, we propose a theoretical model for our low-capacitance CMOS nanopore devices, showing good agreement with the experimental value. In addition, experiments and theoretical models of translocation studies are presented using 48.5 kbp λ-DNA in order to prove the functionality of on-chip pores coated with Al2O3. PMID:23519330

  5. SEM contour based metrology for microlens process studies in CMOS image sensor technologies

    NASA Astrophysics Data System (ADS)

    Lakcher, Amine; Ostrovsky, Alain; Le-Gratiet, Bertrand; Berthier, Ludovic; Bidault, Laurent; Ducoté, Julien; Jamin-Mornet, Clémence; Mortini, Etienne; Besacier, Maxime

    2018-03-01

    From the first digital cameras which appeared during the 70s to cameras of current smartphones, image sensors have undergone significant technological development in the last decades. The development of CMOS image sensor technologies in the 90s has been the main driver of the recent progresses. The main component of an image sensor is the pixel. A pixel contains a photodiode connected to transistors but only the photodiode area is light sensitive. This results in a significant loss of efficiency. To solve this issue, microlenses are used to focus the incident light on the photodiode. A microlens array is made out of a transparent material and has a spherical cap shape. To obtain this spherical shape, a lithography process is performed to generate resist blocks which are then annealed above their glass transition temperature (reflow). Even if the dimensions to consider are higher than in advanced IC nodes, microlenses are sensitive to process variability during lithography and reflow. A good control of the microlens dimensions is key to optimize the process and thus the performance of the final product. The purpose of this paper is to apply SEM contour metrology [1, 2, 3, 4] to microlenses in order to develop a relevant monitoring methodology and to propose new metrics to engineers to evaluate their process or optimize the design of the microlens arrays.

  6. Low-Power SOI CMOS Transceiver

    NASA Technical Reports Server (NTRS)

    Fujikawa, Gene (Technical Monitor); Cheruiyot, K.; Cothern, J.; Huang, D.; Singh, S.; Zencir, E.; Dogan, N.

    2003-01-01

    The work aims at developing a low-power Silicon on Insulator Complementary Metal Oxide Semiconductor (SOI CMOS) Transceiver for deep-space communications. RF Receiver must accomplish the following tasks: (a) Select the desired radio channel and reject other radio signals, (b) Amplify the desired radio signal and translate them back to baseband, and (c) Detect and decode the information with Low BER. In order to minimize cost and achieve high level of integration, receiver architecture should use least number of external filters and passive components. It should also consume least amount of power to minimize battery cost, size, and weight. One of the most stringent requirements for deep-space communication is the low-power operation. Our study identified that two candidate architectures listed in the following meet these requirements: (1) Low-IF receiver, (2) Sub-sampling receiver. The low-IF receiver uses minimum number of external components. Compared to Zero-IF (Direct conversion) architecture, it has less severe offset and flicker noise problems. The Sub-sampling receiver amplifies the RF signal and samples it using track-and-hold Subsampling mixer. These architectures provide low-power solution for the short- range communications missions on Mars. Accomplishments to date include: (1) System-level design and simulation of a Double-Differential PSK receiver, (2) Implementation of Honeywell SOI CMOS process design kit (PDK) in Cadence design tools, (3) Design of test circuits to investigate relationships between layout techniques, geometry, and low-frequency noise in SOI CMOS, (4) Model development and verification of on-chip spiral inductors in SOI CMOS process, (5) Design/implementation of low-power low-noise amplifier (LNA) and mixer for low-IF receiver, and (6) Design/implementation of high-gain LNA for sub-sampling receiver. Our initial results show that substantial improvement in power consumption is achieved using SOI CMOS as compared to standard CMOS

  7. A new single-photon avalanche diode in 90nm standard CMOS technology.

    PubMed

    Karami, Mohammad Azim; Gersbach, Marek; Yoon, Hyung-June; Charbon, Edoardo

    2010-10-11

    We report on the first implementation of a single-photon avalanche diode (SPAD) in 90nm complementary metal oxide semiconductor (CMOS) technology. The detector features an octagonal multiplication region and a guard ring to prevent premature edge breakdown using a standard mask set exclusively. The proposed structure emerged from a systematic study aimed at miniaturization, while optimizing overall performance. The guard ring design is the result of an extensive modeling effort aimed at constraining the multiplication region within a well-defined area where the electric field exceeds the critical value for impact ionization. The device exhibits a dark count rate of 8.1 kHz, a maximum photon detection probability of 9% and the jitter of 398ps at a wavelength of 637nm, all of them measured at room temperature and 0.13V of excess bias voltage. An afterpulsing probability of 32% is achieved at the nominal dead time. Applications include time-of-flight 3D vision, fluorescence lifetime imaging microscopy, fluorescence correlation spectroscopy, and time-resolved gamma/X-ray imaging. Standard characterization of the SPAD was performed in different bias voltages and temperatures.

  8. Fundamental performance differences between CMOS and CCD imagers: Part II

    NASA Astrophysics Data System (ADS)

    Janesick, James; Andrews, James; Tower, John; Grygon, Mark; Elliott, Tom; Cheng, John; Lesser, Michael; Pinter, Jeff

    2007-09-01

    A new class of CMOS imagers that compete with scientific CCDs is presented. The sensors are based on deep depletion backside illuminated technology to achieve high near infrared quantum efficiency and low pixel cross-talk. The imagers deliver very low read noise suitable for single photon counting - Fano-noise limited soft x-ray applications. Digital correlated double sampling signal processing necessary to achieve low read noise performance is analyzed and demonstrated for CMOS use. Detailed experimental data products generated by different pixel architectures (notably 3TPPD, 5TPPD and 6TPG designs) are presented including read noise, charge capacity, dynamic range, quantum efficiency, charge collection and transfer efficiency and dark current generation. Radiation damage data taken for the imagers is also reported.

  9. Neural CMOS-integrated circuit and its application to data classification.

    PubMed

    Göknar, Izzet Cem; Yildiz, Merih; Minaei, Shahram; Deniz, Engin

    2012-05-01

    Implementation and new applications of a tunable complementary metal-oxide-semiconductor-integrated circuit (CMOS-IC) of a recently proposed classifier core-cell (CC) are presented and tested with two different datasets. With two algorithms-one based on Fisher's linear discriminant analysis and the other based on perceptron learning, used to obtain CCs' tunable parameters-the Haberman and Iris datasets are classified. The parameters so obtained are used for hard-classification of datasets with a neural network structured circuit. Classification performance and coefficient calculation times for both algorithms are given. The CC has 6-ns response time and 1.8-mW power consumption. The fabrication parameters used for the IC are taken from CMOS AMS 0.35-μm technology.

  10. Large-scale phase separation with nano-twin domains in manganite spinel (Co,Fe,Mn){sub 3}O{sub 4}

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Horibe, Y., E-mail: horibe@post.matsc.kyutech.ac.jp; Takeyama, S.; Mori, S.

    The effect of Mn concentration on the formation of nano-domain structures in the spinel oxide (Co,Fe,Mn){sub 3}O{sub 4} was investigated by electron diffraction, bright-, and dark-field imaging technique with transmission electron microscopy. Large scale phase separation with nano-twin domains was observed in Co{sub 0.6}Fe{sub 1.0}Mn{sub 1.4}O{sub 4}, in contrast to the highly aligned checkerboard nano-domains in Co{sub 0.6}Fe{sub 0.9}Mn{sub 1.5}O{sub 4}. Diffusion of the Mn{sup 3+} ions with the Jahn-Teller distortions is suggested to play an important role in the formation of checkerboard nano-domain structure.

  11. Direct Simulations of Coupled Transport and Reaction on Nano-Scale X-Ray Computed Tomography Images of Platinum Group Metal-Free Catalyst Cathodes

    DOE PAGES

    Ogawa, S.; Komini Babu, S.; Chung, H. T.; ...

    2016-08-22

    The nano/micro-scale geometry of polymer electrolyte fuel cell (PEFC) catalyst layers critically affects cell performance. The small length scales and complex structure of these composite layers make it challenging to analyze cell performance and physics at the particle scale by experiment. We present a computational method to simulate transport and chemical reaction phenomena at the pore/particle-scale and apply it to a PEFC cathode with platinum group metal free (PGM-free) catalyst. Here, we numerically solve the governing equations for the physics with heterogeneous oxygen diffusion coefficient and proton conductivity evaluated using the actual electrode structure and ionomer distribution obtained using nano-scalemore » resolution X-ray computed tomography (nano-CT). Using this approach, the oxygen concentration and electrolyte potential distributions imposed by the oxygen reduction reaction are solved and the impact of the catalyst layer structure on performance is evaluated.« less

  12. Direct Simulations of Coupled Transport and Reaction on Nano-Scale X-Ray Computed Tomography Images of Platinum Group Metal-Free Catalyst Cathodes

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Ogawa, S.; Komini Babu, S.; Chung, H. T.

    The nano/micro-scale geometry of polymer electrolyte fuel cell (PEFC) catalyst layers critically affects cell performance. The small length scales and complex structure of these composite layers make it challenging to analyze cell performance and physics at the particle scale by experiment. We present a computational method to simulate transport and chemical reaction phenomena at the pore/particle-scale and apply it to a PEFC cathode with platinum group metal free (PGM-free) catalyst. Here, we numerically solve the governing equations for the physics with heterogeneous oxygen diffusion coefficient and proton conductivity evaluated using the actual electrode structure and ionomer distribution obtained using nano-scalemore » resolution X-ray computed tomography (nano-CT). Using this approach, the oxygen concentration and electrolyte potential distributions imposed by the oxygen reduction reaction are solved and the impact of the catalyst layer structure on performance is evaluated.« less

  13. Design of 2.4Ghz CMOS Floating Active Inductor LNA using 130nm Technology

    NASA Astrophysics Data System (ADS)

    Muhamad, M.; Soin, N.; Ramiah, H.

    2018-03-01

    This paper presents about design and optimization of CMOS active inductor integrated circuit. This active inductor implements using Silterra 0.13μm technology and simulated using Cadence Virtuoso and Spectre RF. The center frequency for this active inductor is at 2.4 GHz which follow IEEE 802.11 b/g/n standard. To reduce the chip size of silicon, active inductor is used instead of passive inductor at low noise amplifier LNA circuit. This inductor test and analyse by low noise amplifier circuit. Comparison between active with passive inductor based on LNA circuit has been performed. Result shown that the active inductor has significantly reduce the chip size with 73 % area without sacrificing the noise figure and gain of LNA which is the most important criteria in LNA. The best low noise amplifier provides a power gain (S21) of 20.7 dB with noise figure (NF) of 2.1dB.

  14. Lab-on-CMOS Integration of Microfluidics and Electrochemical Sensors

    PubMed Central

    Huang, Yue; Mason, Andrew J.

    2013-01-01

    This paper introduces a CMOS-microfluidics integration scheme for electrochemical microsystems. A CMOS chip was embedded into a micro-machined silicon carrier. By leveling the CMOS chip and carrier surface to within 100 nm, an expanded obstacle-free surface suitable for photolithography was achieved. Thin film metal planar interconnects were microfabricated to bridge CMOS pads to the perimeter of the carrier, leaving a flat and smooth surface for integrating microfluidic structures. A model device containing SU-8 microfluidic mixers and detection channels crossing over microelectrodes on a CMOS integrated circuit was constructed using the chip-carrier assembly scheme. Functional integrity of microfluidic structures and on-CMOS electrodes was verified by a simultaneous sample dilution and electrochemical detection experiment within multi-channel microfluidics. This lab-on-CMOS integration process is capable of high packing density, is suitable for wafer-level batch production, and opens new opportunities to combine the performance benefits of on-CMOS sensors with lab-on-chip platforms. PMID:23939616

  15. Lab-on-CMOS integration of microfluidics and electrochemical sensors.

    PubMed

    Huang, Yue; Mason, Andrew J

    2013-10-07

    This paper introduces a CMOS-microfluidics integration scheme for electrochemical microsystems. A CMOS chip was embedded into a micro-machined silicon carrier. By leveling the CMOS chip and carrier surface to within 100 nm, an expanded obstacle-free surface suitable for photolithography was achieved. Thin film metal planar interconnects were microfabricated to bridge CMOS pads to the perimeter of the carrier, leaving a flat and smooth surface for integrating microfluidic structures. A model device containing SU-8 microfluidic mixers and detection channels crossing over microelectrodes on a CMOS integrated circuit was constructed using the chip-carrier assembly scheme. Functional integrity of microfluidic structures and on-CMOS electrodes was verified by a simultaneous sample dilution and electrochemical detection experiment within multi-channel microfluidics. This lab-on-CMOS integration process is capable of high packing density, is suitable for wafer-level batch production, and opens new opportunities to combine the performance benefits of on-CMOS sensors with lab-on-chip platforms.

  16. Nano-Scale Characterization of Al-Mg Nanocrystalline Alloys

    NASA Astrophysics Data System (ADS)

    Harvey, Evan; Ladani, Leila

    Materials with nano-scale microstructure have become increasingly popular due to their benefit of substantially increased strengths. The increase in strength as a result of decreasing grain size is defined by the Hall-Petch equation. With increased interest in miniaturization of components, methods of mechanical characterization of small volumes of material are necessary because traditional means such as tensile testing becomes increasingly difficult with such small test specimens. This study seeks to characterize elastic-plastic properties of nanocrystalline Al-5083 through nanoindentation and related data analysis techniques. By using nanoindentation, accurate predictions of the elastic modulus and hardness of the alloy were attained. Also, the employed data analysis model provided reasonable estimates of the plastic properties (strain-hardening exponent and yield stress) lending credibility to this procedure as an accurate, full mechanical characterization method.

  17. Reduced wear of enamel with novel fine and nano-scale leucite glass-ceramics.

    PubMed

    Theocharopoulos, Antonios; Chen, Xiaohui; Hill, Robert; Cattell, Michael J

    2013-06-01

    Leucite glass-ceramics used to produce all-ceramic restorations can suffer from brittle fracture and wear the opposing teeth. High strength and fine crystal sized leucite glass-ceramics have recently been reported. The objective of this study is to investigate whether fine and nano-scale leucite glass-ceramics with minimal matrix microcracking are associated with a reduction in in vitro tooth wear. Human molar cusps (n=12) were wear tested using a Bionix-858 testing machine (300,000 simulated masticatory cycles) against experimental fine crystal sized (FS), nano-scale crystal sized (NS) leucite glass-ceramics and a commercial leucite glass-ceramic (Ceramco-3, Dentsply, USA). Wear was imaged using Secondary Electron Imaging (SEI) and quantified using white-light profilometry. Both experimental groups were found to produce significantly (p<0.05) less volume and mean-height tooth loss compared to Ceramco-3. The NS group had significantly (p<0.05) less tooth mean-height loss and less combined (tooth and ceramic) loss than the FS group. Increased waviness and damage was observed on the wear surfaces of the Ceramco-3 glass-ceramic disc/tooth group in comparison to the experimental groups. This was also indicated by higher surface roughness values for the Ceramco-3 glass-ceramic disc/tooth group. Fine and nano-sized leucite glass-ceramics produced a reduction in in vitro tooth wear. The high strength low wear materials of this study may help address the many problems associated with tooth enamel wear and restoration failure. Copyright © 2013 Elsevier Ltd. All rights reserved.

  18. CMOS Active Pixel Sensors for Low Power, Highly Miniaturized Imaging Systems

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R.

    1996-01-01

    The complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology has been developed over the past three years by NASA at the Jet Propulsion Laboratory, and has reached a level of performance comparable to CCDs with greatly increased functionality but at a very reduced power level.

  19. CMOS integration of high-k/metal gate transistors in diffusion and gate replacement (D&GR) scheme for dynamic random access memory peripheral circuits

    NASA Astrophysics Data System (ADS)

    Dentoni Litta, Eugenio; Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; O’Sullivan, Barry; Machkaoutsan, Vladimir; Fazan, Pierre; Ji, Yunhyuck; Mannaert, Geert; Lorant, Christophe; Sebaai, Farid; Thiam, Arame; Ercken, Monique; Demuynck, Steven; Horiguchi, Naoto

    2018-04-01

    Integration of high-k/metal gate stacks in peripheral transistors is a major candidate to ensure continued scaling of dynamic random access memory (DRAM) technology. In this paper, the CMOS integration of diffusion and gate replacement (D&GR) high-k/metal gate stacks is investigated, evaluating four different approaches for the critical patterning step of removing the N-type field effect transistor (NFET) effective work function (eWF) shifter stack from the P-type field effect transistor (PFET) area. The effect of plasma exposure during the patterning step is investigated in detail and found to have a strong impact on threshold voltage tunability. A CMOS integration scheme based on an experimental wet-compatible photoresist is developed and the fulfillment of the main device metrics [equivalent oxide thickness (EOT), eWF, gate leakage current density, on/off currents, short channel control] is demonstrated.

  20. Nano-Scale Sample Acquisition Systems for Small Class Exploration Spacecraft

    NASA Astrophysics Data System (ADS)

    Paulsen, G.

    2015-12-01

    The paradigm for space exploration is changing. Large and expensive missions are very rare and the space community is turning to smaller, lighter, and less expensive missions that could still perform great exploration. These missions are also within reach of commercial companies such as the Google Lunar X Prize teams that develop small scale lunar missions. Recent commercial endeavors such as "Planet Labs inc." and Sky Box Imaging, inc. show that there are new benefits and business models associated with miniaturization of space hardware. The Nano-Scale Sample Acquisition System includes NanoDrill for capture of small rock cores and PlanetVac for capture of surface regolith. These two systems are part of the ongoing effort to develop "Micro Sampling" systems for deployment by the small spacecraft with limited payload capacities. The ideal applications include prospecting missions to the Moon and Asteroids. The MicroDrill is a rotary-percussive coring drill that captures cores 7 mm in diameter and up to 2 cm long. The drill weighs less than 1 kg and can capture a core from a 40 MPa strength rock within a few minutes, with less than 10 Watt power and less than 10 Newton of preload. The PlanetVac is a pneumatic based regolith acquisition system that can capture surface sample in touch-and-go maneuver. These sampling systems were integrated within the footpads of commercial quadcopter for testing. As such, they could also be used by geologists on Earth to explore difficult to get to locations.

  1. A Compact Low-Power Driver Array for VCSELs in 65-nm CMOS Technology

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Zeng, Zhiyao; Sun, Kexu; Wang, Guanhua

    This article presents a compact low-power 4 x 10 Gb/s quad-driver module for Vertical-Cavity Surface-Emitting Laser (VCSEL) arrays in a 65 nm CMOS technology. The side-by-side drivers can be directly wire bonded to the VCSEL diode array, supporting up to 4 channels. To increase the bandwidth of the driver, an internal feed-forward path is added for pole-zero cancellation, without increasing the power consumption. An edge-configurable pre-emphasis technique is proposed to achieve high bandwidth and minimize the asymmetry of the fall and rise times of the driver output current. Measurement results demonstrate a RMS jitter of 0.68 ps for 10 Gb/smore » operation. Tests demonstrate negligible crosstalk between channels. Under irradiation, the modulation amplitude degrades less than 5% up to 300 Mrad ionizing dose. Finally, the area of the quaddriver array is 500 μm by 1000 μm and the total power consumption for the entire driver array chip is 130 mW for the typical current setting.« less

  2. A Compact Low-Power Driver Array for VCSELs in 65-nm CMOS Technology

    DOE PAGES

    Zeng, Zhiyao; Sun, Kexu; Wang, Guanhua; ...

    2017-05-08

    This article presents a compact low-power 4 x 10 Gb/s quad-driver module for Vertical-Cavity Surface-Emitting Laser (VCSEL) arrays in a 65 nm CMOS technology. The side-by-side drivers can be directly wire bonded to the VCSEL diode array, supporting up to 4 channels. To increase the bandwidth of the driver, an internal feed-forward path is added for pole-zero cancellation, without increasing the power consumption. An edge-configurable pre-emphasis technique is proposed to achieve high bandwidth and minimize the asymmetry of the fall and rise times of the driver output current. Measurement results demonstrate a RMS jitter of 0.68 ps for 10 Gb/smore » operation. Tests demonstrate negligible crosstalk between channels. Under irradiation, the modulation amplitude degrades less than 5% up to 300 Mrad ionizing dose. Finally, the area of the quaddriver array is 500 μm by 1000 μm and the total power consumption for the entire driver array chip is 130 mW for the typical current setting.« less

  3. Nano-materials enabled thermoelectricity from window glasses.

    PubMed

    Inayat, Salman B; Rader, Kelly R; Hussain, Muhammad M

    2012-01-01

    With a projection of nearly doubling up the world population by 2050, we need wide variety of renewable and clean energy sources to meet the increased energy demand. Solar energy is considered as the leading promising alternate energy source with the pertinent challenge of off sunshine period and uneven worldwide distribution of usable sun light. Although thermoelectricity is considered as a reasonable renewable energy from wasted heat, its mass scale usage is yet to be developed. Here we show, large scale integration of nano-manufactured pellets of thermoelectric nano-materials, embedded into window glasses to generate thermoelectricity using the temperature difference between hot outside and cool inside. For the first time, this work offers an opportunity to potentially generate 304 watts of usable power from 9 m(2) window at a 20°C temperature gradient. If a natural temperature gradient exists, this can serve as a sustainable energy source for green building technology.

  4. Advanced Ceramics from Preceramic Polymers Modified at the Nano-Scale: A Review.

    PubMed

    Bernardo, Enrico; Fiocco, Laura; Parcianello, Giulio; Storti, Enrico; Colombo, Paolo

    2014-03-06

    Preceramic polymers, i.e. , polymers that are converted into ceramics upon heat treatment, have been successfully used for almost 40 years to give advanced ceramics, especially belonging to the ternary SiCO and SiCN systems or to the quaternary SiBCN system. One of their main advantages is the possibility of combining the shaping and synthesis of ceramics: components can be shaped at the precursor stage by conventional plastic-forming techniques, such as spinning, blowing, injection molding, warm pressing and resin transfer molding, and then converted into ceramics by treatments typically above 800 °C. The extension of the approach to a wider range of ceramic compositions and applications, both structural and thermo-structural (refractory components, thermal barrier coatings) or functional (bioactive ceramics, luminescent materials), mainly relies on modifications of the polymers at the nano-scale, i.e. , on the introduction of nano-sized fillers and/or chemical additives, leading to nano-structured ceramic components upon thermal conversion. Fillers and additives may react with the main ceramic residue of the polymer, leading to ceramics of significant engineering interest (such as silicates and SiAlONs), or cause the formation of secondary phases, significantly affecting the functionalities of the polymer-derived matrix.

  5. Advanced Ceramics from Preceramic Polymers Modified at the Nano-Scale: A Review

    PubMed Central

    Bernardo, Enrico; Fiocco, Laura; Parcianello, Giulio; Storti, Enrico; Colombo, Paolo

    2014-01-01

    Preceramic polymers, i.e., polymers that are converted into ceramics upon heat treatment, have been successfully used for almost 40 years to give advanced ceramics, especially belonging to the ternary SiCO and SiCN systems or to the quaternary SiBCN system. One of their main advantages is the possibility of combining the shaping and synthesis of ceramics: components can be shaped at the precursor stage by conventional plastic-forming techniques, such as spinning, blowing, injection molding, warm pressing and resin transfer molding, and then converted into ceramics by treatments typically above 800 °C. The extension of the approach to a wider range of ceramic compositions and applications, both structural and thermo-structural (refractory components, thermal barrier coatings) or functional (bioactive ceramics, luminescent materials), mainly relies on modifications of the polymers at the nano-scale, i.e., on the introduction of nano-sized fillers and/or chemical additives, leading to nano-structured ceramic components upon thermal conversion. Fillers and additives may react with the main ceramic residue of the polymer, leading to ceramics of significant engineering interest (such as silicates and SiAlONs), or cause the formation of secondary phases, significantly affecting the functionalities of the polymer-derived matrix. PMID:28788548

  6. A CMOS application-specified-integrated-circuit for 40 GHz high-electron-mobility-transistors automatic biasing

    NASA Astrophysics Data System (ADS)

    De Matteis, M.; De Blasi, M.; Vallicelli, E. A.; Zannoni, M.; Gervasi, M.; Bau, A.; Passerini, A.; Baschirotto, A.

    2017-02-01

    This paper presents the design and the experimental results of a CMOS Automatic Control System (ACS) for the biasing of High-Electron-Mobility-Transistors (HEMT). The ACS is the first low-power mixed-signal Application-Specified-Integrated-Circuit (ASIC) able to automatically set and regulate the operating point of an off-chip 6 HEMT Low-Noise-Amplifiers (LNAs), hence it composes a two-chip system (the ACS+LNAs) to be used in the Large Scale Polarization Explorer (LSPE) stratospheric balloon for Cosmic Microwave Background (CMB) signal observation. The hereby presented ACS ASIC provides a reliable instrumentation for gradual and very stable LNAs characterization, switching-on, and operating point (<4 mV accuracy). Moreover, it simplifies the electronic instrumentation needed for biasing the LNAs, since it replaces several off-the-shelf and digital programmable device components. The ASIC prototype has been implemented in a CMOS 0.35 μ m technology (12 mm2 area occupancy). It operates at 4 kHz clock frequency. The power consumption of one-channel ASIC (biasing one LNA) is 3.6 mW, whereas 30 mW are consumed by a single LNA device.

  7. A CMOS application-specified-integrated-circuit for 40 GHz high-electron-mobility-transistors automatic biasing.

    PubMed

    De Matteis, M; De Blasi, M; Vallicelli, E A; Zannoni, M; Gervasi, M; Bau, A; Passerini, A; Baschirotto, A

    2017-02-01

    This paper presents the design and the experimental results of a CMOS Automatic Control System (ACS) for the biasing of High-Electron-Mobility-Transistors (HEMT). The ACS is the first low-power mixed-signal Application-Specified-Integrated-Circuit (ASIC) able to automatically set and regulate the operating point of an off-chip 6 HEMT Low-Noise-Amplifiers (LNAs), hence it composes a two-chip system (the ACS+LNAs) to be used in the Large Scale Polarization Explorer (LSPE) stratospheric balloon for Cosmic Microwave Background (CMB) signal observation. The hereby presented ACS ASIC provides a reliable instrumentation for gradual and very stable LNAs characterization, switching-on, and operating point (<4 mV accuracy). Moreover, it simplifies the electronic instrumentation needed for biasing the LNAs, since it replaces several off-the-shelf and digital programmable device components. The ASIC prototype has been implemented in a CMOS 0.35 μm technology (12 mm 2 area occupancy). It operates at 4 kHz clock frequency. The power consumption of one-channel ASIC (biasing one LNA) is 3.6 mW, whereas 30 mW are consumed by a single LNA device.

  8. Three-dimensional micro/nano-scale structure fabricated by combination of non-volatile polymerizable RTIL and FIB irradiation

    PubMed Central

    Kuwabata, Susumu; Minamimoto, Hiro; Inoue, Kosuke; Imanishi, Akihito; Hosoya, Ken; Uyama, Hiroshi; Torimoto, Tsukasa; Tsuda, Tetsuya; Seki, Shu

    2014-01-01

    Room-temperature ionic liquid (RTIL) has been widely investigated as a nonvolatile solvent as well as a unique liquid material because of its interesting features, e.g., negligible vapor pressure and high thermal stability. Here we report that a non-volatile polymerizable RTIL is a useful starting material for the fabrication of micro/nano-scale polymer structures with a focused-ion-beam (FIB) system operated under high-vacuum condition. Gallium-ion beam irradiation to the polymerizable 1-allyl-3-ethylimidazolium bis((trifluoromethane)sulfonyl)amide RTIL layer spread on a Si wafer induced a polymerization reaction without difficulty. What is interesting to note is that we have succeeded in provoking the polymerization reaction anywhere on the Si wafer substrate by using FIB irradiation with a raster scanning mode. By this finding, two- and three-dimensional micro/nano-scale polymer structure fabrications were possible at the resolution of 500,000 dpi. Even intricate three-dimensional micro/nano-figures with overhang and hollow moieties could be constructed at the resolution of approximately 100 nm. PMID:24430465

  9. Depleted fully monolithic CMOS pixel detectors using a column based readout architecture for the ATLAS Inner Tracker upgrade

    NASA Astrophysics Data System (ADS)

    Wang, T.; Barbero, M.; Berdalovic, I.; Bespin, C.; Bhat, S.; Breugnon, P.; Caicedo, I.; Cardella, R.; Chen, Z.; Degerli, Y.; Egidos, N.; Godiot, S.; Guilloux, F.; Hemperek, T.; Hirono, T.; Krüger, H.; Kugathasan, T.; Hügging, F.; Marin Tobon, C. A.; Moustakas, K.; Pangaud, P.; Schwemling, P.; Pernegger, H.; Pohl, D.-L.; Rozanov, A.; Rymaszewski, P.; Snoeys, W.; Wermes, N.

    2018-03-01

    Depleted monolithic active pixel sensors (DMAPS), which exploit high voltage and/or high resistivity add-ons of modern CMOS technologies to achieve substantial depletion in the sensing volume, have proven to have high radiation tolerance towards the requirements of ATLAS in the high-luminosity LHC era. DMAPS integrating fast readout architectures are currently being developed as promising candidates for the outer pixel layers of the future ATLAS Inner Tracker, which will be installed during the phase II upgrade of ATLAS around year 2025. In this work, two DMAPS prototype designs, named LF-Monopix and TJ-Monopix, are presented. LF-Monopix was fabricated in the LFoundry 150 nm CMOS technology, and TJ-Monopix has been designed in the TowerJazz 180 nm CMOS technology. Both chips employ the same readout architecture, i.e. the column drain architecture, whereas different sensor implementation concepts are pursued. The paper makes a joint description of the two prototypes, so that their technical differences and challenges can be addressed in direct comparison. First measurement results for LF-Monopix will also be shown, demonstrating for the first time a fully functional fast readout DMAPS prototype implemented in the LFoundry technology.

  10. Possible layout solutions for the improvement of the dark rate of geiger mode avalanche structures in the GLOBALFOUNDRIES BCDLITE 0.18 μm CMOS technology

    NASA Astrophysics Data System (ADS)

    D'Ascenzo, N.; Xie, Q.

    2018-04-01

    Modern concepts of single photon or charged particle detection systems are based on geiger mode avalanche devices developed in CMOS technology. The key-problem encountered in the fabrication of these devices in CMOS is the dark rate level. The dark rate and single photon signal are not distinguishable. This sets also the limits of the application of geiger mode avalanche devices to single photon or charged particle detection systems. We report the design and fabrication of four possible layouts of these devices using the 0.18 μm BCDLite GLOBALFOUNDRIES process. The devices have an area of 50×50 μm2. They are characterized by a fast response time and an approximately 60 ns recovery time. The best topology exhibits an average dark rate as low as 3×103 kHz/mm2.

  11. Recent Design Development in Molecular Imaging for Breast Cancer Detection Using Nanometer CMOS Based Sensors.

    PubMed

    Nguyen, Dung C; Ma, Dongsheng Brian; Roveda, Janet M W

    2012-01-01

    As one of the key clinical imaging methods, the computed X-ray tomography can be further improved using new nanometer CMOS sensors. This will enhance the current technique's ability in terms of cancer detection size, position, and detection accuracy on the anatomical structures. The current paper reviewed designs of SOI-based CMOS sensors and their architectural design in mammography systems. Based on the existing experimental results, using the SOI technology can provide a low-noise (SNR around 87.8 db) and high-gain (30 v/v) CMOS imager. It is also expected that, together with the fast data acquisition designs, the new type of imagers may play important roles in the near-future high-dimensional images in additional to today's 2D imagers.

  12. RF Design of a Wideband CMOS Integrated Receiver for Phased Array Applications

    NASA Astrophysics Data System (ADS)

    Jackson, Suzy A.

    2004-06-01

    New silicon CMOS processes developed primarily for the burgeoning wireless networking market offer significant promise as a vehicle for the implementation of highly integrated receivers, especially at the lower end of the frequency range proposed for the Square Kilometre Array (SKA). An RF-CMOS ‘Receiver-on-a-Chip’ is being developed as part of an Australia Telescope program looking at technologies associated with the SKA. The receiver covers the frequency range 500 1700 MHz, with instantaneous IF bandwidth of 500 MHz and, on simulation, yields an input noise temperature of < 50 K at mid-band. The receiver will contain all active circuitry (LNA, bandpass filter, quadrature mixer, anti-aliasing filter, digitiser and serialiser) on one 0.18 μm RF-CMOS integrated circuit. This paper outlines receiver front-end development work undertaken to date, including design and simulation of an LNA using noise cancelling techniques to achieve a wideband input-power-match with little noise penalty.

  13. Monolithic integration of GMR sensors for standard CMOS-IC current sensing

    NASA Astrophysics Data System (ADS)

    De Marcellis, A.; Reig, C.; Cubells-Beltrán, M.-D.; Madrenas, J.; Santos, J. D.; Cardoso, S.; Freitas, P. P.

    2017-09-01

    In this work we report on the development of Giant Magnetoresistive (GMR) sensors for off-line current measurements in standard integrated circuits. An ASIC has been specifically designed and fabricated in the well-known AMS-0.35 μm CMOS technology, including the electronic circuitry for sensor interfacing. It implements an oscillating circuit performing a voltage-to-frequency conversion. Subsequently, a fully CMOS-compatible low temperature post-process has been applied for depositing the GMR sensing devices in a full-bridge configuration onto the buried current straps. Sensitivity and resolution of these sensors have been investigated achieving experimental results that show a detection sensitivity of about 100 Hz/mA, with a resolution of about 5 μA.

  14. Titanium bone implants with superimposed micro/nano-scale porosity and antibacterial capability

    NASA Astrophysics Data System (ADS)

    Necula, B. S.; Apachitei, I.; Fratila-Apachitei, L. E.; van Langelaan, E. J.; Duszczyk, J.

    2013-05-01

    This study aimed at producing a multifunctional layer with micro/nano-interconnected porosity and antibacterial capability on a rough macro-porous plasma sprayed titanium surface using the plasma electrolytic oxidation process. The layers were electrochemically formed in electrolytes based on calcium acetate and calcium glycerophosphate salts bearing dispersed Ag nanoparticles. They were characterized with respect to surface morphology and chemical composition using a scanning electron microscope equipped with the energy dispersive spectroscopy and back scattering detectors. Scanning electron microscopy images showed the formation of a micro/nano-scale porous layer, comprised of TiO2 bearing Ca and P species and Ag nanoparticles, following accurately the surface topography of the plasma sprayed titanium coating. The Ca/P atomic ratio was found to be close to that of bone apatite. Ag nanoparticles were incorporated on both on top and inside the porous structure of the TiO2 layer.

  15. Silicon CMOS architecture for a spin-based quantum computer.

    PubMed

    Veldhorst, M; Eenink, H G J; Yang, C H; Dzurak, A S

    2017-12-15

    Recent advances in quantum error correction codes for fault-tolerant quantum computing and physical realizations of high-fidelity qubits in multiple platforms give promise for the construction of a quantum computer based on millions of interacting qubits. However, the classical-quantum interface remains a nascent field of exploration. Here, we propose an architecture for a silicon-based quantum computer processor based on complementary metal-oxide-semiconductor (CMOS) technology. We show how a transistor-based control circuit together with charge-storage electrodes can be used to operate a dense and scalable two-dimensional qubit system. The qubits are defined by the spin state of a single electron confined in quantum dots, coupled via exchange interactions, controlled using a microwave cavity, and measured via gate-based dispersive readout. We implement a spin qubit surface code, showing the prospects for universal quantum computation. We discuss the challenges and focus areas that need to be addressed, providing a path for large-scale quantum computing.

  16. Effect of Thermal Budget on the Electrical Characterization of Atomic Layer Deposited HfSiO/TiN Gate Stack MOSCAP Structure

    PubMed Central

    Khan, Z. N.; Ahmed, S.; Ali, M.

    2016-01-01

    Metal Oxide Semiconductor (MOS) capacitors (MOSCAP) have been instrumental in making CMOS nano-electronics realized for back-to-back technology nodes. High-k gate stacks including the desirable metal gate processing and its integration into CMOS technology remain an active research area projecting the solution to address the requirements of technology roadmaps. Screening, selection and deposition of high-k gate dielectrics, post-deposition thermal processing, choice of metal gate structure and its post-metal deposition annealing are important parameters to optimize the process and possibly address the energy efficiency of CMOS electronics at nano scales. Atomic layer deposition technique is used throughout this work because of its known deposition kinetics resulting in excellent electrical properties and conformal structure of the device. The dynamics of annealing greatly influence the electrical properties of the gate stack and consequently the reliability of the process as well as manufacturable device. Again, the choice of the annealing technique (migration of thermal flux into the layer), time-temperature cycle and sequence are key parameters influencing the device’s output characteristics. This work presents a careful selection of annealing process parameters to provide sufficient thermal budget to Si MOSCAP with atomic layer deposited HfSiO high-k gate dielectric and TiN gate metal. The post-process annealing temperatures in the range of 600°C -1000°C with rapid dwell time provide a better trade-off between the desirable performance of Capacitance-Voltage hysteresis and the leakage current. The defect dynamics is thought to be responsible for the evolution of electrical characteristics in this Si MOSCAP structure specifically designed to tune the trade-off at low frequency for device application. PMID:27571412

  17. Optimizing Cr(VI) and Tc(VII) remediation through nano-scale biomineral engineering

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Cutting, R. S.; Coker, V. S.; Telling, N. D.

    2009-09-09

    To optimize the production of biomagnetite for the bioremediation of metal oxyanion contaminated waters, the reduction of aqueous Cr(VI) to Cr(III) by two biogenic magnetites and a synthetic magnetite was evaluated under batch and continuous flow conditions. Results indicate that nano-scale biogenic magnetite produced by incubating synthetic schwertmannite powder in cell suspensions of Geobacter sulfurreducens is more efficient at reducing Cr(VI) than either biogenic nano-magnetite produced from a suspension of ferrihydrite 'gel' or synthetic nano-scale Fe{sub 3}O{sub 4} powder. Although X-ray Photoelectron Spectroscopy (XPS) measurements obtained from post-exposure magnetite samples reveal that both Cr(III) and Cr(VI) are associated with nanoparticlemore » surfaces, X-ray Magnetic Circular Dichroism (XMCD) studies indicate that some Cr(III) has replaced octahedrally coordinated Fe in the lattice of the magnetite. Inductively Coupled Plasma-Atomic Emission Spectrometry (ICP-AES) measurements of total aqueous Cr in the associated solution phase indicated that, although the majority of Cr(III) was incorporated within or adsorbed to the magnetite samples, a proportion ({approx}10-15 %) was released back into solution. Studies of Tc(VII) uptake by magnetites produced via the different synthesis routes also revealed significant differences between them as regards effectiveness for remediation. In addition, column studies using a {gamma}-camera to obtain real time images of a {sup 99m}Tc(VII) radiotracer were performed to visualize directly the relative performances of the magnetite sorbents against ultra-trace concentrations of metal oxyanion contaminants. Again, the magnetite produced from schwertmannite proved capable of retaining more ({approx}20%) {sup 99m}Tc(VII) than the magnetite produced from ferrihydrite, confirming that biomagnetite production for efficient environmental remediation can be fine-tuned through careful selection of the initial Fe(III) mineral

  18. Multi-scale analysis of the effect of nano-filler particle diameter on the physical properties of CAD/CAM composite resin blocks.

    PubMed

    Yamaguchi, Satoshi; Inoue, Sayuri; Sakai, Takahiko; Abe, Tomohiro; Kitagawa, Haruaki; Imazato, Satoshi

    2017-05-01

    The objective of this study was to assess the effect of silica nano-filler particle diameters in a computer-aided design/manufacturing (CAD/CAM) composite resin (CR) block on physical properties at the multi-scale in silico. CAD/CAM CR blocks were modeled, consisting of silica nano-filler particles (20, 40, 60, 80, and 100 nm) and matrix (Bis-GMA/TEGDMA), with filler volume contents of 55.161%. Calculation of Young's moduli and Poisson's ratios for the block at macro-scale were analyzed by homogenization. Macro-scale CAD/CAM CR blocks (3 × 3 × 3 mm) were modeled and compressive strengths were defined when the fracture loads exceeded 6075 N. MPS values of the nano-scale models were compared by localization analysis. As the filler size decreased, Young's moduli and compressive strength increased, while Poisson's ratios and MPS decreased. All parameters were significantly correlated with the diameters of the filler particles (Pearson's correlation test, r = -0.949, 0.943, -0.951, 0.976, p < 0.05). The in silico multi-scale model established in this study demonstrates that the Young's moduli, Poisson's ratios, and compressive strengths of CAD/CAM CR blocks can be enhanced by loading silica nanofiller particles of smaller diameter. CAD/CAM CR blocks by using smaller silica nano-filler particles have a potential to increase fracture resistance.

  19. CMOS minimal array

    NASA Astrophysics Data System (ADS)

    Janesick, James; Cheng, John; Bishop, Jeanne; Andrews, James T.; Tower, John; Walker, Jeff; Grygon, Mark; Elliot, Tom

    2006-08-01

    A high performance prototype CMOS imager is introduced. Test data is reviewed for different array formats that utilize 3T photo diode, 5T pinned photo diode and 6T photo gate CMOS pixel architectures. The imager allows several readout modes including progressive scan, snap and windowed operation. The new imager is built on different silicon substrates including very high resistivity epitaxial wafers for deep depletion operation. Data products contained in this paper focus on sensor's read noise, charge capacity, charge transfer efficiency, thermal dark current, RTS dark spikes, QE, pixel cross- talk and on-chip analog circuitry performance.

  20. Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications.

    PubMed

    Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

    2016-05-09

    Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm(2) V(-1) sec(-1), and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity.

  1. Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications

    PubMed Central

    Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

    2016-01-01

    Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm2 V−1 sec−1, and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity. PMID:27157914

  2. Fundamental performance differences of CMOS and CCD imagers: part V

    NASA Astrophysics Data System (ADS)

    Janesick, James R.; Elliott, Tom; Andrews, James; Tower, John; Pinter, Jeff

    2013-02-01

    Previous papers delivered over the last decade have documented developmental progress made on large pixel scientific CMOS imagers that match or surpass CCD performance. New data and discussions presented in this paper include: 1) a new buried channel CCD fabricated on a CMOS process line, 2) new data products generated by high performance custom scientific CMOS 4T/5T/6T PPD pixel imagers, 3) ultimate CTE and speed limits for large pixel CMOS imagers, 4) fabrication and test results of a flight 4k x 4k CMOS imager for NRL's SoloHi Solar Orbiter Mission, 5) a progress report on ultra large stitched Mk x Nk CMOS imager, 6) data generated by on-chip sub-electron CDS signal chain circuitry used in our imagers, 7) CMOS and CMOSCCD proton and electron radiation damage data for dose levels up to 10 Mrd, 8) discussions and data for a new class of PMOS pixel CMOS imagers and 9) future CMOS development work planned.

  3. Optical design of microlens array for CMOS image sensors

    NASA Astrophysics Data System (ADS)

    Zhang, Rongzhu; Lai, Liping

    2016-10-01

    The optical crosstalk between the pixel units can influence the image quality of CMOS image sensor. In the meantime, the duty ratio of CMOS is low because of its pixel structure. These two factors cause the low detection sensitivity of CMOS. In order to reduce the optical crosstalk and improve the fill factor of CMOS image sensor, a microlens array has been designed and integrated with CMOS. The initial parameters of the microlens array have been calculated according to the structure of a CMOS. Then the parameters have been optimized by using ZEMAX and the microlens arrays with different substrate thicknesses have been compared. The results show that in order to obtain the best imaging quality, when the effect of optical crosstalk for CMOS is the minimum, the best distance between microlens array and CMOS is about 19.3 μm. When incident light successively passes through microlens array and the distance, obtaining the minimum facula is around 0.347 um in the active area. In addition, when the incident angle of the light is 0o 22o, the microlens array has obvious inhibitory effect on the optical crosstalk. And the anti-crosstalk distance between microlens array and CMOS is 0 μm 162 μm.

  4. Real-time biochemical sensor based on Raman scattering with CMOS contact imaging.

    PubMed

    Muyun Cao; Yuhua Li; Yadid-Pecht, Orly

    2015-08-01

    This work presents a biochemical sensor based on Raman scattering with Complementary metal-oxide-semiconductor (CMOS) contact imaging. This biochemical optical sensor is designed for detecting the concentration of solutions. The system is built with a laser diode, an optical filter, a sample holder and a commercial CMOS sensor. The output of the system is analyzed by an image processing program. The system provides instant measurements with a resolution of 0.2 to 0.4 Mol. This low cost and easy-operated small scale system is useful in chemical, biomedical and environmental labs for quantitative bio-chemical concentration detection with results reported comparable to a highly cost commercial spectrometer.

  5. Monolithic silicon-photonic platforms in state-of-the-art CMOS SOI processes [Invited].

    PubMed

    Stojanović, Vladimir; Ram, Rajeev J; Popović, Milos; Lin, Sen; Moazeni, Sajjad; Wade, Mark; Sun, Chen; Alloatti, Luca; Atabaki, Amir; Pavanello, Fabio; Mehta, Nandish; Bhargava, Pavan

    2018-05-14

    Integrating photonics with advanced electronics leverages transistor performance, process fidelity and package integration, to enable a new class of systems-on-a-chip for a variety of applications ranging from computing and communications to sensing and imaging. Monolithic silicon photonics is a promising solution to meet the energy efficiency, sensitivity, and cost requirements of these applications. In this review paper, we take a comprehensive view of the performance of the silicon-photonic technologies developed to date for photonic interconnect applications. We also present the latest performance and results of our "zero-change" silicon photonics platforms in 45 nm and 32 nm SOI CMOS. The results indicate that the 45 nm and 32 nm processes provide a "sweet-spot" for adding photonic capability and enhancing integrated system applications beyond the Moore-scaling, while being able to offload major communication tasks from more deeply-scaled compute and memory chips without complicated 3D integration approaches.

  6. Large-area low-temperature ultrananocrystaline diamond (UNCD) films and integration with CMOS devices for monolithically integrated diamond MEMD/NEMS-CMOS systems.

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Sumant, A.V.; Auciello, O.; Yuan, H.-C

    2009-05-01

    Because of exceptional mechanical, chemical, and tribological properties, diamond has a great potential to be used as a material for the development of high-performance MEMS and NEMS such as resonators and switches compatible with harsh environments, which involve mechanical motion and intermittent contact. Integration of such MEMS/NEMS devices with complementary metal oxide semiconductor (CMOS) microelectronics will provide a unique platform for CMOS-driven commercial MEMS/NEMS. The main hurdle to achieve diamond-CMOS integration is the relatively high substrate temperatures (600-800 C) required for depositing conventional diamond thin films, which are well above the CMOS operating thermal budget (400 C). Additionally, a materialsmore » integration strategy has to be developed to enable diamond-CMOS integration. Ultrananocrystalline diamond (UNCD), a novel material developed in thin film form at Argonne, is currently the only microwave plasma chemical vapor deposition (MPCVD) grown diamond film that can be grown at 400 C, and still retain exceptional mechanical, chemical, and tribological properties comparable to that of single crystal diamond. We have developed a process based on MPCVD to synthesize UNCD films on up to 200 mm in diameter CMOS wafers, which will open new avenues for the fabrication of monolithically integrated CMOS-driven MEMS/NEMS based on UNCD. UNCD films were grown successfully on individual Si-based CMOS chips and on 200 mm CMOS wafers at 400 C in a MPCVD system, using Ar-rich/CH4 gas mixture. The CMOS devices on the wafers were characterized before and after UNCD deposition. All devices were performing to specifications with very small degradation after UNCD deposition and processing. A threshold voltage degradation in the range of 0.08-0.44V and transconductance degradation in the range of 1.5-9% were observed.« less

  7. Micro- and nano-scale characterization to study the thermal degradation of cement-based materials

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Lim, Seungmin, E-mail: lim76@illinois.edu; Mondal, Paramita

    2014-06-01

    The degradation of hydration products of cement is known to cause changes in the micro- and nano-structure, which ultimately drive thermo-mechanical degradation of cement-based composite materials at elevated temperatures. However, a detailed characterization of these changes is still incomplete. This paper presents results of an extensive experimental study carried out to investigate micro- and nano-structural changes that occur due to exposure of cement paste to high temperatures. Following heat treatment of cement paste up to 1000 °C, damage states were studied by compressive strength test, thermogravimetric analysis (TGA), scanning electron microscopy (SEM) atomic force microscopy (AFM) and AFM image analysis.more » Using experimental results and research from existing literature, new degradation processes that drive the loss of mechanical properties of cement paste are proposed. The development of micro-cracks at the interface between unhydrated cement particles and paste matrix, a change in C–S–H nano-structure and shrinkage of C–S–H, are considered as important factors that cause the thermal degradation of cement paste. - Highlights: • The thermal degradation of hydration products of cement is characterized at micro- and nano-scale using scanning electron microscopy (SEM) and atomic force microscopy (AFM). • The interface between unhydrated cement particles and the paste matrix is considered the origin of micro-cracks. • When cement paste is exposed to temperatures above 300 ºC, the nano-structure of C-S-H becomes a more loosely packed globular structure, which could be indicative of C-S-H shrinkage.« less

  8. Nanomanufacturing : nano-structured materials made layer-by-layer.

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Cox, James V.; Cheng, Shengfeng; Grest, Gary Stephen

    Large-scale, high-throughput production of nano-structured materials (i.e. nanomanufacturing) is a strategic area in manufacturing, with markets projected to exceed $1T by 2015. Nanomanufacturing is still in its infancy; process/product developments are costly and only touch on potential opportunities enabled by growing nanoscience discoveries. The greatest promise for high-volume manufacturing lies in age-old coating and imprinting operations. For materials with tailored nm-scale structure, imprinting/embossing must be achieved at high speeds (roll-to-roll) and/or over large areas (batch operation) with feature sizes less than 100 nm. Dispersion coatings with nanoparticles can also tailor structure through self- or directed-assembly. Layering films structured with thesemore » processes have tremendous potential for efficient manufacturing of microelectronics, photovoltaics and other topical nano-structured devices. This project is designed to perform the requisite R and D to bring Sandia's technology base in computational mechanics to bear on this scale-up problem. Project focus is enforced by addressing a promising imprinting process currently being commercialized.« less

  9. Single-silicon CCD-CMOS platform for multi-spectral detection from terahertz to x-rays.

    PubMed

    Shalaby, Mostafa; Vicario, Carlo; Hauri, Christoph P

    2017-11-15

    Charge-coupled devices (CCDs) are a well-established imaging technology in the visible and x-ray frequency ranges. However, the small quantum photon energies of terahertz radiation have hindered the use of this mature semiconductor technological platform in this frequency range, leaving terahertz imaging totally dependent on low-resolution bolometer technologies. Recently, it has been shown that silicon CCDs can detect terahertz photons at a high field, but the detection sensitivity is limited. Here we show that silicon, complementary metal-oxide-semiconductor (CMOS) technology offers enhanced detection sensitivity of almost two orders of magnitude, compared to CCDs. Our findings allow us to extend the low-frequency terahertz cutoff to less than 2 THz, nearly closing the technological gap with electronic imagers operating up to 1 THz. Furthermore, with the silicon CCD/CMOS technology being sensitive to mid-infrared (mid-IR) and the x-ray ranges, we introduce silicon as a single detector platform from 1 EHz to 2 THz. This overcomes the present challenge in spatially overlapping a terahertz/mid-IR pump and x-ray probe radiation at facilities such as free electron lasers, synchrotron, and laser-based x-ray sources.

  10. Integration of solid-state nanopores in a 0.5 μm CMOS foundry process.

    PubMed

    Uddin, A; Yemenicioglu, S; Chen, C-H; Corigliano, E; Milaninia, K; Theogarajan, L

    2013-04-19

    High-bandwidth and low-noise nanopore sensor and detection electronics are crucial in achieving single-DNA-base resolution. A potential way to accomplish this goal is to integrate solid-state nanopores within a CMOS platform, in close proximity to the biasing electrodes and custom-designed amplifier electronics. Here we report the integration of solid-state nanopore devices in a commercial complementary metal-oxide-semiconductor (CMOS) potentiostat chip implemented in On-Semiconductor's 0.5 μm technology. Nanopore membranes incorporating electrodes are fabricated by post-CMOS micromachining utilizing the n+ polysilicon/SiO2/n+ polysilicon capacitor structure available in the aforementioned process. Nanopores are created in the CMOS process by drilling in a transmission electron microscope and shrinking by atomic layer deposition. We also describe a batch fabrication method to process a large of number of electrode-embedded nanopores with sub-10 nm diameter across CMOS-compatible wafers by electron beam lithography and atomic layer deposition. The CMOS-compatibility of our fabrication process is verified by testing the electrical functionality of on-chip circuitry. We observe high current leakage with the CMOS nanopore devices due to the ionic diffusion through the SiO2 membrane. To prevent this leakage, we coat the membrane with Al2O3, which acts as an efficient diffusion barrier against alkali ions. The resulting nanopore devices also exhibit higher robustness and lower 1/f noise as compared to SiO2 and SiNx. Furthermore, we propose a theoretical model for our low-capacitance CMOS nanopore devices, showing good agreement with the experimental value. In addition, experiments and theoretical models of translocation studies are presented using 48.5 kbp λ-DNA in order to prove the functionality of on-chip pores coated with Al2O3.

  11. [Preparation of nano-nacre artificial bone].

    PubMed

    Chen, Jian-ting; Tang, Yong-zhi; Zhang, Jian-gang; Wang, Jian-jun; Xiao, Ying

    2008-12-01

    To assess the improvements in the properties of nano-nacre artificial bone prepared on the basis of nacre/polylactide acid composite artificial bone and its potential for clinical use. The compound of nano-scale nacre powder and poly-D, L-lactide acid (PDLLA) was used to prepare the cylindrical hollow artificial bone, whose properties including raw material powder scale, pore size, porosity and biomechanical characteristics were compared with another artificial bone made of micron-scale nacre powder and PDLLA. Scanning electron microscope showed that the average particle size of the nano-nacre powder was 50.4-/+12.4 nm, and the average pore size of the artificial bone prepared using nano-nacre powder was 215.7-/+77.5 microm, as compared with the particle size of the micron-scale nacre powder of 5.0-/+3.0 microm and the pore size of the resultant artificial bone of 205.1-/+72.0 microm. The porosities of nano-nacre artificial bone and the micron-nacre artificial bone were (65.4-/+2.9)% and (53.4-/+2.2)%, respectively, and the two artificial bones had comparable compressive strength and Young's modulus, but the flexural strength of the nano-nacre artificial bone was lower than that of the micro-nacre artificial bone. The nano-nacre artificial bone allows better biodegradability and possesses appropriate pore size, porosity and biomechanical properties for use as a promising material in bone tissue engineering.

  12. Crosstalk quantification, analysis, and trends in CMOS image sensors.

    PubMed

    Blockstein, Lior; Yadid-Pecht, Orly

    2010-08-20

    Pixel crosstalk (CTK) consists of three components, optical CTK (OCTK), electrical CTK (ECTK), and spectral CTK (SCTK). The CTK has been classified into two groups: pixel-architecture dependent and pixel-architecture independent. The pixel-architecture-dependent CTK (PADC) consists of the sum of two CTK components, i.e., the OCTK and the ECTK. This work presents a short summary of a large variety of methods for PADC reduction. Following that, this work suggests a clear quantifiable definition of PADC. Three complementary metal-oxide-semiconductor (CMOS) image sensors based on different technologies were empirically measured, using a unique scanning technology, the S-cube. The PADC is analyzed, and technology trends are shown.

  13. Pick-and-place process for sensitivity improvement of the capacitive type CMOS MEMS 2-axis tilt sensor

    NASA Astrophysics Data System (ADS)

    Chang, Chun-I.; Tsai, Ming-Han; Liu, Yu-Chia; Sun, Chih-Ming; Fang, Weileun

    2013-09-01

    This study exploits the foundry available complimentary metal-oxide-semiconductor (CMOS) process and the packaging house available pick-and-place technology to implement a capacitive type micromachined 2-axis tilt sensor. The suspended micro mechanical structures such as the spring, stage and sensing electrodes are fabricated using the CMOS microelectromechanical systems (MEMS) processes. A bulk block is assembled onto the suspended stage by pick-and-place technology to increase the proof-mass of the tilt sensor. The low temperature UV-glue dispensing and curing processes are employed to bond the block onto the stage. Thus, the sensitivity of the CMOS MEMS capacitive type 2-axis tilt sensor is significantly improved. In application, this study successfully demonstrates the bonding of a bulk solder ball of 100 µm in diameter with a 2-axis tilt sensor fabricated using the standard TSMC 0.35 µm 2P4M CMOS process. Measurements show the sensitivities of the 2-axis tilt sensor are increased for 2.06-fold (x-axis) and 1.78-fold (y-axis) after adding the solder ball. Note that the sensitivity can be further improved by reducing the parasitic capacitance and the mismatch of sensing electrodes caused by the solder ball.

  14. Polymer X-ray refractive nano-lenses fabricated by additive technology.

    PubMed

    Petrov, A K; Bessonov, V O; Abrashitova, K A; Kokareva, N G; Safronov, K R; Barannikov, A A; Ershov, P A; Klimova, N B; Lyatun, I I; Yunkin, V A; Polikarpov, M; Snigireva, I; Fedyanin, A A; Snigirev, A

    2017-06-26

    The present work demonstrates the potential applicability of additive manufacturing to X-Ray refractive nano-lenses. A compound refractive lens with a radius of 5 µm was produced by the two-photon polymerization induced lithography. It was successfully tested at the X-ray microfocus laboratory source and a focal spot of 5 μm was measured. An amorphous nature of polymer material combined with the potential of additive technologies may result in a significantly enhanced focusing performance compared to the best examples of modern X-ray compound refractive lenses.

  15. A new multiscale model to describe a modified Hall-Petch relation at different scales for nano and micro materials

    NASA Astrophysics Data System (ADS)

    Fadhil, Sadeem Abbas; Alrawi, Aoday Hashim; Azeez, Jazeel H.; Hassan, Mohsen A.

    2018-04-01

    In the present work, a multiscale model is presented and used to modify the Hall-Petch relation for different scales from nano to micro. The modified Hall-Petch relation is derived from a multiscale equation that determines the cohesive energy between the atoms and their neighboring grains. This brings with it a new term that was originally ignored even in the atomistic models. The new term makes it easy to combine all other effects to derive one modified equation for the Hall-Petch relation that works for all scales together, without the need to divide the scales into two scales, each scale with a different equation, as it is usually done in other works. Due to that, applying the new relation does not require a previous knowledge of the grain size distribution. This makes the new derived relation more consistent and easier to be applied for all scales. The new relation is used to fit the data for Copper and Nickel and it is applied well for the whole range of grain sizes from nano to micro scales.

  16. A CMOS image sensor with stacked photodiodes for lensless observation system of digital enzyme-linked immunosorbent assay

    NASA Astrophysics Data System (ADS)

    Takehara, Hironari; Miyazawa, Kazuya; Noda, Toshihiko; Sasagawa, Kiyotaka; Tokuda, Takashi; Kim, Soo Hyeon; Iino, Ryota; Noji, Hiroyuki; Ohta, Jun

    2014-01-01

    A CMOS image sensor with stacked photodiodes was fabricated using 0.18 µm mixed signal CMOS process technology. Two photodiodes were stacked at the same position of each pixel of the CMOS image sensor. The stacked photodiodes consist of shallow high-concentration N-type layer (N+), P-type well (PW), deep N-type well (DNW), and P-type substrate (P-sub). PW and P-sub were shorted to ground. By monitoring the voltage of N+ and DNW individually, we can observe two monochromatic colors simultaneously without using any color filters. The CMOS image sensor is suitable for fluorescence imaging, especially contact imaging such as a lensless observation system of digital enzyme-linked immunosorbent assay (ELISA). Since the fluorescence increases with time in digital ELISA, it is possible to observe fluorescence accurately by calculating the difference from the initial relation between the pixel values for both photodiodes.

  17. Characteristic Behavior and Scaling Studies of Self Organized InP Nano-dots formed via keV and MeV irradiations

    NASA Astrophysics Data System (ADS)

    Paramanik, Dipak; Varma, Shikha

    2008-04-01

    The controlled formation of nano-dots, using ion beams as tool, has become important as it offers a unique method to generate non-equilibrium phases with novel physical properties and structures with nano-dimensions. We have investigated the creation of self assembled nano- dots on InP(111) surfaces after 3 keV as well as 1.5 MeV ion beams at a large range of fluences. We have studied the Scaling exponents of the evolved surfaces by utilizing the technique of Scanning Probe Microscopy (SPM). At keV energies ripening of the nano-dots is seen below a critical time whereas an inverse ripening is observed for longer durations. At the critical time square shaped array of nano --dots are observed. The dots are characterized by narrow height and size distributions. Nano dots have also been observed at MeV ion irradiations. Their size distribution though broad at lowest fluence decreases for larger fluences.

  18. Fully depleted CMOS pixel sensor development and potential applications

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Baudot, J.; Kachel, M.; CNRS, UMR7178, 67037 Strasbourg

    CMOS pixel sensors are often opposed to hybrid pixel sensors due to their very different sensitive layer. In standard CMOS imaging processes, a thin (about 20 μm) low resistivity epitaxial layer acts as the sensitive volume and charge collection is mostly driven by thermal agitation. In contrast, the so-called hybrid pixel technology exploits a thick (typically 300 μm) silicon sensor with high resistivity allowing for the depletion of this volume, hence charges drift toward collecting electrodes. But this difference is fading away with the recent availability of some CMOS imaging processes based on a relatively thick (about 50 μm) highmore » resistivity epitaxial layer which allows for full depletion. This evolution extents the range of applications for CMOS pixel sensors where their known assets, high sensitivity and granularity combined with embedded signal treatment, could potentially foster breakthrough in detection performances for specific scientific instruments. One such domain is the Xray detection for soft energies, typically below 10 keV, where the thin sensitive layer was previously severely impeding CMOS sensor usage. Another application becoming realistic for CMOS sensors, is the detection in environment with a high fluence of non-ionizing radiation, such as hadron colliders. However, when considering highly demanding applications, it is still to be proven that micro-circuits required to uniformly deplete the sensor at the pixel level, do not mitigate the sensitivity and efficiency required. Prototype sensors in two different technologies with resistivity higher than 1 kΩ, sensitive layer between 40 and 50 μm and featuring pixel pitch in the range 25 to 50 μm, have been designed and fabricated. Various biasing architectures were adopted to reach full depletion with only a few volts. Laboratory investigations with three types of sources (X-rays, β-rays and infrared light) demonstrated the validity of the approach with respect to depletion

  19. Low power analog front-end electronics in deep submicrometer CMOS technology based on gain enhancement techniques

    NASA Astrophysics Data System (ADS)

    Gómez-Galán, J. A.; Sánchez-Rodríguez, T.; Sánchez-Raya, M.; Martel, I.; López-Martín, A.; Carvajal, R. G.; Ramírez-Angulo, J.

    2014-06-01

    This paper evaluates the design of front-end electronics in modern technologies to be used in a new generation of heavy ion detectors—HYDE (FAIR, Germany)—proposing novel architectures to achieve high gain in a low voltage environment. As conventional topologies of operational amplifiers in modern CMOS processes show limitations in terms of gain, novel approaches must be raised. The work addresses the design using transistors with channel length of no more than double the feature size and a supply voltage as low as 1.2 V. A front-end system has been fabricated in a 90 nm process including gain boosting techniques based on regulated cascode circuits. The analog channel has been optimized to match a detector capacitance of 5 pF and exhibits a good performance in terms of gain, speed, linearity and power consumption.

  20. Nano-composites for water remediation: a review.

    PubMed

    Tesh, Sarah J; Scott, Thomas B

    2014-09-17

    As global populations continue to increase, the pressure on water supplies will inevitably intensify. Consequently the international need for more efficient and cost effective water remediation technologies will also rise. The introduction of nano-technology into the industry may represent a significant advancement and zero-valent iron nano-particles (INPs) have been thoroughly studied for potential remediation applications. However, the application of water dispersed INP suspensions is limited and somewhat contentious on the grounds of safety, whilst INP reaction mechanisms, transport properties and ecotoxicity are areas still under investigation. Theoretically, the development of nano-composites containing INPs to overcome these issues provides the logical next step for developing nano-materials that are better suited to wide application across the water industry. This review provides an overview of the range of static, bulk nano-composites containing INPs being developed, whilst highlighting the limitations of individual solutions, overall classes of technology, and lack of comparative testing for nano-composites. The review discusses what further developments are needed to optimize nano-composite water remediation systems to subsequently achieve commercial maturity. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  1. Pixel-based characterisation of CMOS high-speed camera systems

    NASA Astrophysics Data System (ADS)

    Weber, V.; Brübach, J.; Gordon, R. L.; Dreizler, A.

    2011-05-01

    Quantifying high-repetition rate laser diagnostic techniques for measuring scalars in turbulent combustion relies on a complete description of the relationship between detected photons and the signal produced by the detector. CMOS-chip based cameras are becoming an accepted tool for capturing high frame rate cinematographic sequences for laser-based techniques such as Particle Image Velocimetry (PIV) and Planar Laser Induced Fluorescence (PLIF) and can be used with thermographic phosphors to determine surface temperatures. At low repetition rates, imaging techniques have benefitted from significant developments in the quality of CCD-based camera systems, particularly with the uniformity of pixel response and minimal non-linearities in the photon-to-signal conversion. The state of the art in CMOS technology displays a significant number of technical aspects that must be accounted for before these detectors can be used for quantitative diagnostics. This paper addresses these issues.

  2. Radiation Hard 0.13 Micron CMOS Library at IHP

    NASA Astrophysics Data System (ADS)

    Jagdhold, U.

    2013-08-01

    To support space applications we have developed an 0.13 micron CMOS library which should be radiation hard up to 200 krad. The article describes the concept to come to a radiation hard digital circuit and was introduces in 2010 [1]. By introducing new radiation hard design rules we will minimize IC-level leakage and single event latch-up (SEL). To reduce single event upset (SEU) we add two p-MOS transistors to all flip flops. For reliability reasons we use double contacts in all library elements. The additional rules and the library elements are integrated in our Cadence mixed signal design kit, “Virtuoso” IC6.1 [2]. A test chip is produced with our in house 0.13 micron BiCMOS technology, see Ref. [3]. As next step we will doing radiation tests according the european space agency (ESA) specifications, see Ref. [4], [5].

  3. 120-MHz BiCMOS superscalar RISC processor

    NASA Astrophysics Data System (ADS)

    Tanaka, Shigeya; Hotta, Takashi; Murabayashi, Fumio; Yamada, Hiromichi; Yoshida, Shoji; Shimamura, Kotaro; Katsura, Koyo; Bandoh, Tadaaki; Ikeda, Koichi; Matsubara, Kenji

    1994-04-01

    A superscalar RISC processor contains 2.8 million transistors in a die size of 16.2 mm x 16.5 mm, and utilizes 3.3 V/0.5 micron BiCMOS technology. In order to take advantage of superscalar performance without incurring penalties from a slower clock or a longer pipeline, a tag bit is implemented in the instruction cache to indicate dependency between two instructions. A performance gain of up to 37% is obtained with only a 3.5% area overhead from our superscalar design.

  4. Novel Si-Ge-C Superlattices for More than Moore CMOS

    DTIC Science & Technology

    2016-03-31

    diodes can be entirely formed by epitaxial growth, CMOS Active Pixel Sensors can be made with Fully-Depleted SOI CMOS . One important advantage of...a NMOS Transfer Gate (TG), which could be part of a 4T pixel APS. PPDs are preferred in CMOS image sensors for the ability of the pinning layer to...than Moore” with the creation of active photonic devices monolithically integrated with CMOS . Applications include Multispectral CMOS Image Sensors

  5. Emulsified Zero-Valent Nano-Scale Iron Treatment of Chlorinated Solvent DNAPL Source Areas

    DTIC Science & Technology

    2010-04-01

    The EZVI is composed of food-grade surfactant, biodegradable oil , water, and ZVI particles (either nano- or micro-scale iron), which form...emulsion particles (Figure 2-1). Each emulsion particle or droplet contains ZVI particles in water surrounded by an oil -liquid membrane. Since the...exterior oil membrane of the emulsion droplet has hydrophobic properties similar to that of DNAPL, the droplets are miscible with DNAPL. It is believed

  6. Prediction Surface Morphology of Nanostructure Fabricated by Nano-Oxidation Technology.

    PubMed

    Huang, Jen-Ching; Chang, Ho; Kuo, Chin-Guo; Li, Jeen-Fong; You, Yong-Chin

    2015-12-04

    Atomic force microscopy (AFM) was used for visualization of a nano-oxidation technique performed on diamond-like carbon (DLC) thin film. Experiments of the nano-oxidation technique of the DLC thin film include those on nano-oxidation points and nano-oxidation lines. The feature sizes of the DLC thin film, including surface morphology, depth, and width, were explored after application of a nano-oxidation technique to the DLC thin film under different process parameters. A databank for process parameters and feature sizes of thin films was then established, and multiple regression analysis (MRA) and a back-propagation neural network (BPN) were used to carry out the algorithm. The algorithmic results are compared with the feature sizes acquired from experiments, thus obtaining a prediction model of the nano-oxidation technique of the DLC thin film. The comparative results show that the prediction accuracy of BPN is superior to that of MRA. When the BPN algorithm is used to predict nano-point machining, the mean absolute percentage errors (MAPE) of depth, left side, and right side are 8.02%, 9.68%, and 7.34%, respectively. When nano-line machining is being predicted, the MAPEs of depth, left side, and right side are 4.96%, 8.09%, and 6.77%, respectively. The obtained data can also be used to predict cross-sectional morphology in the DLC thin film treated with a nano-oxidation process.

  7. On the integration of ultrananocrystalline diamond (UNCD) with CMOS chip

    DOE PAGES

    Mi, Hongyi; Yuan, Hao -Chih; Seo, Jung -Hun; ...

    2017-03-27

    A low temperature deposition of high quality ultrananocrystalline diamond (UNCD) film onto a finished Si-based CMOS chip was performed to investigate the compatibility of the UNCD deposition process with CMOS devices for monolithic integration of MEMS on Si CMOS platform. DC and radio-frequency performances of the individual PMOS and NMOS devices on the CMOS chip before and after the UNCD deposition were characterized. Electrical characteristics of CMOS after deposition of the UNCD film remained within the acceptable ranges, namely showing small variations in threshold voltage V th, transconductance g m, cut-off frequency f T and maximum oscillation frequency f max.more » Finally, the results suggest that low temperature UNCD deposition is compatible with CMOS to realize monolithically integrated CMOS-driven MEMS/NEMS based on UNCD.« less

  8. On the integration of ultrananocrystalline diamond (UNCD) with CMOS chip

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Mi, Hongyi; Yuan, Hao -Chih; Seo, Jung -Hun

    A low temperature deposition of high quality ultrananocrystalline diamond (UNCD) film onto a finished Si-based CMOS chip was performed to investigate the compatibility of the UNCD deposition process with CMOS devices for monolithic integration of MEMS on Si CMOS platform. DC and radio-frequency performances of the individual PMOS and NMOS devices on the CMOS chip before and after the UNCD deposition were characterized. Electrical characteristics of CMOS after deposition of the UNCD film remained within the acceptable ranges, namely showing small variations in threshold voltage V th, transconductance g m, cut-off frequency f T and maximum oscillation frequency f max.more » Finally, the results suggest that low temperature UNCD deposition is compatible with CMOS to realize monolithically integrated CMOS-driven MEMS/NEMS based on UNCD.« less

  9. Theoretical performance analysis for CMOS based high resolution detectors.

    PubMed

    Jain, Amit; Bednarek, Daniel R; Rudin, Stephen

    2013-03-06

    High resolution imaging capabilities are essential for accurately guiding successful endovascular interventional procedures. Present x-ray imaging detectors are not always adequate due to their inherent limitations. The newly-developed high-resolution micro-angiographic fluoroscope (MAF-CCD) detector has demonstrated excellent clinical image quality; however, further improvement in performance and physical design may be possible using CMOS sensors. We have thus calculated the theoretical performance of two proposed CMOS detectors which may be used as a successor to the MAF. The proposed detectors have a 300 μm thick HL-type CsI phosphor, a 50 μm-pixel CMOS sensor with and without a variable gain light image intensifier (LII), and are designated MAF-CMOS-LII and MAF-CMOS, respectively. For the performance evaluation, linear cascade modeling was used. The detector imaging chains were divided into individual stages characterized by one of the basic processes (quantum gain, binomial selection, stochastic and deterministic blurring, additive noise). Ranges of readout noise and exposure were used to calculate the detectors' MTF and DQE. The MAF-CMOS showed slightly better MTF than the MAF-CMOS-LII, but the MAF-CMOS-LII showed far better DQE, especially for lower exposures. The proposed detectors can have improved MTF and DQE compared with the present high resolution MAF detector. The performance of the MAF-CMOS is excellent for the angiography exposure range; however it is limited at fluoroscopic levels due to additive instrumentation noise. The MAF-CMOS-LII, having the advantage of the variable LII gain, can overcome the noise limitation and hence may perform exceptionally for the full range of required exposures; however, it is more complex and hence more expensive.

  10. Fully CMOS-compatible titanium nitride nanoantennas

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Briggs, Justin A., E-mail: jabriggs@stanford.edu; Department of Materials Science and Engineering, Stanford University, 496 Lomita Mall, Stanford, California 94305; Naik, Gururaj V.

    CMOS-compatible fabrication of plasmonic materials and devices will accelerate the development of integrated nanophotonics for information processing applications. Using low-temperature plasma-enhanced atomic layer deposition (PEALD), we develop a recipe for fully CMOS-compatible titanium nitride (TiN) that is plasmonic in the visible and near infrared. Films are grown on silicon, silicon dioxide, and epitaxially on magnesium oxide substrates. By optimizing the plasma exposure per growth cycle during PEALD, carbon and oxygen contamination are reduced, lowering undesirable loss. We use electron beam lithography to pattern TiN nanopillars with varying diameters on silicon in large-area arrays. In the first reported single-particle measurements onmore » plasmonic TiN, we demonstrate size-tunable darkfield scattering spectroscopy in the visible and near infrared regimes. The optical properties of this CMOS-compatible material, combined with its high melting temperature and mechanical durability, comprise a step towards fully CMOS-integrated nanophotonic information processing.« less

  11. Nano Scale Mechanical Analysis of Biomaterials Using Atomic Force Microscopy

    NASA Astrophysics Data System (ADS)

    Dutta, Diganta

    The atomic force microscope (AFM) is a probe-based microscope that uses nanoscale and structural imaging where high resolution is desired. AFM has also been used in mechanical, electrical, and thermal engineering applications. This unique technique provides vital local material properties like the modulus of elasticity, hardness, surface potential, Hamaker constant, and the surface charge density from force versus displacement curve. Therefore, AFM was used to measure both the diameter and mechanical properties of the collagen nanostraws in human costal cartilage. Human costal cartilage forms a bridge between the sternum and bony ribs. The chest wall of some humans is deformed due to defective costal cartilage. However, costal cartilage is less studied compared to load bearing cartilage. Results show that there is a difference between chemical fixation and non-chemical fixation treatments. Our findings imply that the patients' chest wall is mechanically weak and protein deposition is abnormal. This may impact the nanostraws' ability to facilitate fluid flow between the ribs and the sternum. At present, AFM is the only tool for imaging cells' ultra-structure at the nanometer scale because cells are not homogeneous. The first layer of the cell is called the cell membrane, and the layer under it is made of the cytoskeleton. Cancerous cells are different from normal cells in term of cell growth, mechanical properties, and ultra-structure. Here, force is measured with very high sensitivity and this is accomplished with highly sensitive probes such as a nano-probe. We performed experiments to determine ultra-structural differences that emerge when such cancerous cells are subject to treatments such as with drugs and electric pulses. Jurkat cells are cancerous cells. These cells were pulsed at different conditions. Pulsed and non-pulsed Jurkat cell ultra-structures were investigated at the nano meter scale using AFM. Jurkat cell mechanical properties were measured under

  12. An integrated 12.5-Gb/s optoelectronic receiver with a silicon avalanche photodetector in standard SiGe BiCMOS technology.

    PubMed

    Youn, Jin-Sung; Lee, Myung-Jae; Park, Kang-Yeob; Rücker, Holger; Choi, Woo-Young

    2012-12-17

    An optoelectronic integrated circuit (OEIC) receiver is realized with standard 0.25-μm SiGe BiCMOS technology for 850-nm optical interconnect applications. The OEIC receiver consists of a Si avalanche photodetector, a transimpedance amplifier with a DC-balanced buffer, a tunable equalizer, and a limiting amplifier. The fabricated OEIC receiver successfully detects 12.5-Gb/s 2(31)-1 pseudorandom bit sequence optical data with the bit-error rate less than 10(-12) at incident optical power of -7 dBm. The OEIC core has 1000 μm x 280 μm chip area, and consumes 59 mW from 2.5-V supply. To the best of our knowledge, this OEIC receiver achieves the highest data rate with the smallest sensitivity as well as the best power efficiency among integrated OEIC receivers fabricated with standard Si technology.

  13. A CMOS Front-End With Integrated Magnetoresistive Sensors for Biomolecular Recognition Detection Applications.

    PubMed

    Costa, Tiago; Cardoso, Filipe A; Germano, Jose; Freitas, Paulo P; Piedade, Moises S

    2017-10-01

    The development of giant magnetoresistive (GMR) sensors has demonstrated significant advantages in nanomedicine, particularly for ultrasensitive point-of-care diagnostics. To this end, the detection system is required to be compact, portable, and low power consuming at the same time that a maximum signal to noise ratio is maintained. This paper reports a CMOS front-end with integrated magnetoresistive sensors for biomolecular recognition detection applications. Based on the characterization of the GMR sensor's signal and noise, CMOS building blocks (i.e., current source, multiplexers, and preamplifier) were designed targeting a negligible noise when compared with the GMR sensor's noise and a low power consumption. The CMOS front-end was fabricated using AMS [Formula: see text] technology and the magnetoresistive sensors were post-fabricated on top of the CMOS chip with high yield ( [Formula: see text]). Due to its low circuit noise (16 [Formula: see text]) and overall equivalent magnetic noise ([Formula: see text]), the full system was able to detect 250 nm magnetic nanoparticles with a circuit imposed signal-to-noise ratio degradation of only -1.4 dB. Furthermore, the low power consumption (6.5 mW) and small dimensions ([Formula: see text] ) of the presented solution guarantees the portability of the detection system allowing its usage at the point-of-care.

  14. Meissner effect measurement of single indium particle using a customized on-chip nano-scale superconducting quantum interference device system

    NASA Astrophysics Data System (ADS)

    Wu, Long; Chen, Lei; Wang, Hao; Liu, Xiaoyu; Wang, Zhen

    2017-04-01

    As many emergent phenomena of superconductivity appear on a smaller scale and at lower dimension, commercial magnetic property measurement systems (MPMSs) no longer provide the sensitivity necessary to study the Meissner effect of small superconductors. The nano-scale superconducting quantum interference device (nano-SQUID) is considered one of the most sensitive magnetic sensors for the magnetic characterization of mesoscopic or microscopic samples. Here, we develop a customized on-chip nano-SQUID measurement system based on a pulsed current biasing method. The noise performance of our system is approximately 4.6 × 10-17 emu/Hz1/2, representing an improvement of 9 orders of magnitude compared with that of a commercial MPMS (~10-8 emu/Hz1/2). Furthermore, we demonstrate the measurement of the Meissner effect of a single indium (In) particle (of 47 μm in diameter) using our on-chip nano-SQUID system. The system enables the observation of the prompt superconducting transition of the Meissner effect of a single In particle, thereby providing more accurate characterization of the critical field Hc and temperature Tc. In addition, the retrapping field Hre as a function of temperature T of single In particle shows disparate behavior from that of a large ensemble.

  15. Bacterial toxicity comparison between nano- and micro-scaled oxide particles.

    PubMed

    Jiang, Wei; Mashayekhi, Hamid; Xing, Baoshan

    2009-05-01

    Toxicity of nano-scaled aluminum, silicon, titanium and zinc oxides to bacteria (Bacillus subtilis, Escherichia coli and Pseudomonas fluorescens) was examined and compared to that of their respective bulk (micro-scaled) counterparts. All nanoparticles but titanium oxide showed higher toxicity (at 20 mg/L) than their bulk counterparts. Toxicity of released metal ions was differentiated from that of the oxide particles. ZnO was the most toxic among the three nanoparticles, causing 100% mortality to the three tested bacteria. Al(2)O(3) nanoparticles had a mortality rate of 57% to B. subtilis, 36% to E. coli, and 70% to P. fluorescens. SiO(2) nanoparticles killed 40% of B. subtilis, 58% of E. coli, and 70% of P. fluorescens. TEM images showed attachment of nanoparticles to the bacteria, suggesting that the toxicity was affected by bacterial attachment. Bacterial responses to nanoparticles were different from their bulk counterparts; hence nanoparticle toxicity mechanisms need to be studied thoroughly.

  16. Fundamental Problems of Hybrid CMOS/Nanodevice Circuits

    DTIC Science & Technology

    2010-12-14

    Development of an area-distributed CMOS/nanodevice interface We have carried out the first design of CMOS chips for the CMOS/nanodevice integration, and...got them fabricated in IBM’ 180-nm 7RF process (via MOSIS, Inc. silicon foundry). Each 44 mm2 chip assembly of the design consists of 4 component... chips , merged together for processing convenience. Each 22 mm2 component chip features two interface arrays, with 1010 vias each, with chip’s MOSFETs

  17. Template-guided highly aligned, nano-scale wrinkle structure on a large-area

    NASA Astrophysics Data System (ADS)

    Lim, Jongcheon; Kim, Pilnam

    This study presents a novel technique to induce aligned, nano-scale wrinkle on a polysiloxane-based UV curable resin. There have been studies on generating randomized sub-micron wrinkle using oxygen plasma treatment which causes equibiaxial compressive stress on the film surface. Few works have been reported on how to control the surface wrinkle orientation. Currently available approaches for regulating the wrinkle pattern typically require polydimethylsiloxane (PDMS)-based bilayer system under uniaxial stress condition which hampers various technological applications. Here, we demonstrate a method to generate aligned wrinkle with UV curable polymers. Highly regular array of nanoscale wrinkles were formed by elastic buckling of bilayered UV curable resin, resulting from a combination of confinement effect and anchor-guided propagation of structure. The wrinkle tends to align uniformly lateral to the template pattern as the resin filled in the pattern forms more convex meniscus. The wavelength of the wrinkle was controlled by UV exposure time yielding as small as 170nm. From our results, we suggest the confinement provided by the template pattern may have affected the direction of thin film's expansion yielding unidirectional compressive stress. This work was supported by Samsung Research Funding Center of Samsung Electronics under Project Number SRFC-IT1402-02.

  18. Cargo Movement Operations System (CMOS). Software Test Description

    DTIC Science & Technology

    1990-10-28

    resulting in errors in paragraph numbers and titles. CMOS PMO ACCEPTS COMMENT: YES [ ] NO [ ] ERCI ACCEPTS COMMENT: YES [ ] NO [ ] COMMENT DISPOSITION...location to test the update of the truck manifest. CMOS PMO ACCEPTS COMMENT: YES [ ] NO [ ] ERCI ACCEPTS COMMENT: YES [ ] NO [ ] COMMENT DISPOSITION...CMOS PMO ACCEPTS COMMENT: YES [ ] NO [ ] ERCI ACCEPTS COMMENT: YES [ ] NO ] COMMENT DISPOSITION: COMMENT STATUS: OPEN [ ] CLOSED [

  19. Laser Scanning Holographic Lithography for Flexible 3D Fabrication of Multi-Scale Integrated Nano-structures and Optical Biosensors

    PubMed Central

    Yuan, Liang (Leon); Herman, Peter R.

    2016-01-01

    Three-dimensional (3D) periodic nanostructures underpin a promising research direction on the frontiers of nanoscience and technology to generate advanced materials for exploiting novel photonic crystal (PC) and nanofluidic functionalities. However, formation of uniform and defect-free 3D periodic structures over large areas that can further integrate into multifunctional devices has remained a major challenge. Here, we introduce a laser scanning holographic method for 3D exposure in thick photoresist that combines the unique advantages of large area 3D holographic interference lithography (HIL) with the flexible patterning of laser direct writing to form both micro- and nano-structures in a single exposure step. Phase mask interference patterns accumulated over multiple overlapping scans are shown to stitch seamlessly and form uniform 3D nanostructure with beam size scaled to small 200 μm diameter. In this way, laser scanning is presented as a facile means to embed 3D PC structure within microfluidic channels for integration into an optofluidic lab-on-chip, demonstrating a new laser HIL writing approach for creating multi-scale integrated microsystems. PMID:26922872

  20. Indium-tin-oxide nanowhiskers crystalline silicon photovoltaics combining micro- and nano-scale surface textures

    NASA Astrophysics Data System (ADS)

    Chang, C. H.; Hsu, M. H.; Chang, W. L.; Sun, W. C.; Yu, Peichen

    2011-02-01

    In this work, we present a solution that employs combined micro- and nano-scale surface textures to increase light harvesting in the near infrared for crystalline silicon photovoltaics, and discuss the associated antireflection and scattering mechanisms. The combined surface textures are achieved by uniformly depositing a layer of indium-tin-oxide nanowhiskers on passivated, micro-grooved silicon solar cells using electron-beam evaporation. The nanowhiskers facilitate optical transmission in the near-infrared, which is optically equivalent to a stack of two dielectric thin-films with step- and graded- refractive index profiles. The ITO nanowhiskers provide broadband anti-reflective properties (R<5%) in the wavelength range of 350-1100nm. In comparison with conventional Si solar cell, the combined surface texture solar cell shows higher external quantum efficiency (EQE) in the range of 700-1100nm. Moreover, the ITO nano-whisker coating Si solar cell shows a high total efficiency increase of 1.1% (from 16.08% to17.18%). Furthermore, the nano-whiskers also provide strong forward scattering for ultraviolet and visible light, favorable in thin-wafer silicon photovoltaics to increase the optical absorption path.

  1. Droplets and the three-phase contact line at the nano-scale. Statics and dynamics

    NASA Astrophysics Data System (ADS)

    Yatsyshin, Petr; Sibley, David; Savva, Nikos; Kalliadasis, Serafim

    2014-11-01

    Understanding the behaviour of the solid-liquid-vapour contact line at the scale of several tens of molecular diameters is important in wetting hydrodynamics with applications in micro- and nano-fluidics, including the design of lab-on-a-chip devices and surfaces with specific wetting properties. Due to the fluid inhomogeneity at the nano-scale, the application of continuum-mechanical approaches is limited, and a natural way to remedy this is to seek descriptions accounting for the non-local molecular-level interactions. Density Functional Theory (DFT) for fluids offers a statistical-mechanical framework based on expressing the free energy of the fluid-solid pair as a functional of the spatially varying fluid density. DFT allows us to investigate small drops deposited on planar substrates whilst keeping track of the microscopic structural details of the fluid. Starting from a model of intermolecular forces, we systematically obtain interfaces, surface tensions, and the microscopic contact angle. Using a dynamic extension of equilibrium DFT, we investigate the diffusion-driven evolution of the three-phase contact line to gain insight into the dynamic behaviour of the microscopic contact angle, which is still under debate.

  2. Effect of size on bulk and surface cohesion energy of metallic nano-particles

    NASA Astrophysics Data System (ADS)

    Yaghmaee, M. S.; Shokri, B.

    2007-04-01

    The knowledge of nano-material properties not only helps us to understand the extreme behaviour of small-scale materials better (expected to be different from what we observe from their bulk value) but also helps us to analyse and design new advanced functionalized materials through different nano technologies. Among these fundamental properties, the cohesion (binding) energy mainly describes most behaviours of materials in different environments. In this work, we discuss this fundamental property through a nano-thermodynamical approach using two algorithms, where in the first approach the size dependence of the inner (bulk) cohesion energy is studied, and in the second approach the surface cohesion energy is considered too. The results, which are presented through a computational demonstration (for four different metals: Al, Ga, W and Ag), can be compared with some experimental values for W metallic nano-particles.

  3. Sub-diffraction nano manipulation using STED AFM.

    PubMed

    Chacko, Jenu Varghese; Canale, Claudio; Harke, Benjamin; Diaspro, Alberto

    2013-01-01

    In the last two decades, nano manipulation has been recognized as a potential tool of scientific interest especially in nanotechnology and nano-robotics. Contemporary optical microscopy (super resolution) techniques have also reached the nanometer scale resolution to visualize this and hence a combination of super resolution aided nano manipulation ineluctably gives a new perspective to the scenario. Here we demonstrate how specificity and rapid determination of structures provided by stimulated emission depletion (STED) microscope can aid another microscopic tool with capability of mechanical manoeuvring, like an atomic force microscope (AFM) to get topological information or to target nano scaled materials. We also give proof of principle on how high-resolution real time visualization can improve nano manipulation capability within a dense sample, and how STED-AFM is an optimal combination for this job. With these evidences, this article points to future precise nano dissections and maybe even to a nano-snooker game with an AFM tip and fluorospheres.

  4. Smart CMOS image sensor for lightning detection and imaging.

    PubMed

    Rolando, Sébastien; Goiffon, Vincent; Magnan, Pierre; Corbière, Franck; Molina, Romain; Tulet, Michel; Bréart-de-Boisanger, Michel; Saint-Pé, Olivier; Guiry, Saïprasad; Larnaudie, Franck; Leone, Bruno; Perez-Cuevas, Leticia; Zayer, Igor

    2013-03-01

    We present a CMOS image sensor dedicated to lightning detection and imaging. The detector has been designed to evaluate the potentiality of an on-chip lightning detection solution based on a smart sensor. This evaluation is performed in the frame of the predevelopment phase of the lightning detector that will be implemented in the Meteosat Third Generation Imager satellite for the European Space Agency. The lightning detection process is performed by a smart detector combining an in-pixel frame-to-frame difference comparison with an adjustable threshold and on-chip digital processing allowing an efficient localization of a faint lightning pulse on the entire large format array at a frequency of 1 kHz. A CMOS prototype sensor with a 256×256 pixel array and a 60 μm pixel pitch has been fabricated using a 0.35 μm 2P 5M technology and tested to validate the selected detection approach.

  5. In Vitro Phototoxicity and Hazard Identification of Nano-scale Titanium Dioxide

    EPA Science Inventory

    Nano-titanium dioxide (nano-Ti02) catalyzes many reactions under UV radiation and is hypothesized to cause phototoxicity. A human-derived line of retinal pigment epithelial cells (ARPE-19) was treated with six different samples of nano-Ti02 and exposed to UVA radiation. The Ti02 ...

  6. RF upset susceptibilities of CMOS and low power Schottky D-type flip-flops

    NASA Astrophysics Data System (ADS)

    Kenneally, Daniel J.; Koellen, Daniel S.; Epshtein, Stan

    A description is given of measurements of RF upset levels on two D-type flip-flops, the CD4013B and 54ALS74A, which are functionally identical but fabricated from different technologies: CMOS and low-power Schottky. Continuous-wave electromagnetic interference (CW EMI) from 1 MHz to 200 MHz was coupled into the clock, data, and collector bias, Vcc, ports of each device type while test vectors were used to verify normal operation and subsequent upsets. Both the CMOS and the Schottky devices show decreasing RF susceptibility with increasing frequencies from 1 to 200 MHz. The CMOS device roll-off is almost 18 dB/decade as compared to about 12 dB/decade for the Schottky device. The differences in the Vcc ports' susceptibilities are also apparent. The CMOS device's upset levels decrease steeply with increasing frequency at approximate roll-offs of 60 dB/decade up to 5 MHz and 15 dB/decade from 5 to 100 MHz. Over the same bands, the Schottky device susceptibility at the Vcc port remains strikingly constant at a 6-dBm upset level. Measurements on the clock and data ports seem to suggest that: (1) the CMOS device is `RF harder' than the Schottky device by 3 to 18 dB at least above the 5 to 10 MHz range and out to 100 MHz; and (2) below that range, the Schottky device may be `RF harder' by 3 to 6 dB, but there are not enough measurement data to confirm this performance below 5 MHz.

  7. The Influence of Fluorination on Nano-Scale Phase Separation and Photovoltaic Performance of Small Molecular/PC71BM Blends

    PubMed Central

    Lu, Zhen; Liu, Wen; Li, Jingjing; Fang, Tao; Li, Wanning; Zhang, Jicheng; Feng, Feng; Li, Wenhua

    2016-01-01

    To investigate the fluorination influence on the photovoltaic performance of small molecular based organic solar cells (OSCs), six small molecules based on 2,1,3-benzothiadiazole (BT), and diketopyrrolopyrrole (DPP) as core and fluorinated phenyl (DFP) and triphenyl amine (TPA) as different terminal units (DFP-BT-DFP, DFP-BT-TPA, TPA-BT-TPA, DFP-DPP-DFP, DFP-DPP-TPA, and TPA-DPP-TPA) were synthesized. With one or two fluorinated phenyl as the end group(s), HOMO level of BT and DPP based small molecular donors were gradually decreased, inducing high open circuit voltage for fluorinated phenyl based OSCs. DFP-BT-TPA and DFP-DPP-TPA based blend films both displayed stronger nano-scale aggregation in comparison to TPA-BT-TPA and TPA-DPP-TPA, respectively, which would also lead to higher hole motilities in devices. Ultimately, improved power conversion efficiency (PCE) of 2.17% and 1.22% was acquired for DFP-BT-TPA and DFP-DPP-TPA based devices, respectively. These results demonstrated that the nano-scale aggregation size of small molecules in photovoltaic devices could be significantly enhanced by introducing a fluorine atom at the donor unit of small molecules, which will provide understanding about the relationship of chemical structure and nano-scale phase separation in OSCs. PMID:28335208

  8. Observing non-equilibrium state of transport through graphene channel at the nano-second time-scale

    NASA Astrophysics Data System (ADS)

    Mishra, Abhishek; Meersha, Adil; Raghavan, Srinivasan; Shrivastava, Mayank

    2017-12-01

    Electrical performance of a graphene FET is drastically affected by electron-phonon inelastic scattering. At high electric fields, the out-of-equilibrium population of optical phonons equilibrates by emitting acoustic phonons, which dissipate the energy to heat sinks. The equilibration time of the process is governed by thermal diffusion time, which is few nano-seconds for a typical graphene FET. The nano-second time-scale of the process keeps it elusive to conventional steady-state or DC measurement systems. Here, we employ a time-domain reflectometry-based technique to electrically probe the device for few nano-seconds and investigate the non-equilibrium state. For the first time, the transient nature of electrical transport through graphene FET is revealed. A maximum change of 35% in current and 50% in contact resistance is recorded over a time span of 8 ns, while operating graphene FET at a current density of 1 mA/μm. The study highlights the role of intrinsic heating (scattering) in deciding metal-graphene contact resistance and transport through the graphene channel.

  9. Study of nano-architecture of the wings of Paris Peacock butterfly

    NASA Astrophysics Data System (ADS)

    Ghate, Ekata; Bhoraskar, S. V.; Kulkarni, G. R.

    Butterflies are one of the most colorful creatures in animal Kingdom. Wings of the male butterfly are brilliantly colored to attract females. Color of the wings plays an important role in camouflage. Study of structural colors in case of insects and butterflies are important for their biomimic and biophotonic applications. Structural color is the color which is produced by physical structures and their interaction with light. Paris Peacock or Papilio paris butterfly belongs to the family Papilionidae. The basis of structural color of this butterfly is investigated in the present study. The upper surface of the wings in this butterfly is covered with blue, green and brown colored scales. Nano-architecture of these scales was investigated with scanning electron microscope (SEM) and environmental scanning electron microscope (ESEM). Photomicrographs were analyzed using image analysis software. Goniometric color or iridescence in blue and green colored scales of this butterfly was observed and studied with the help of gonio spectrophotometer in the visible range. No iridescence was observed in brown colored scales of the butterfly. Hues of the blue and green color were measured with spectrophotometer and were correlated with nano-architecture of the wing. Results of electron microscopy and reflection spectroscopy are used to explain the iridescent nature of blue and green scales. Sinusoidal grating like structures of these scales were prominently seen in the blue scales. It is possible that the structure of these wings can act as a template for the fabrication of sinusoidal gratings using nano-imprint technology.

  10. Convergence Science in a Nano World

    PubMed Central

    Cady, Nathaniel

    2013-01-01

    Convergence is a new paradigm that brings together critical advances in the life sciences, physical sciences and engineering. Going beyond traditional “interdisciplinary” studies, “convergence” describes the culmination of truly integrated research and development, yielding revolutionary advances in both scientific research and new technologies. At its core, nanotechnology embodies these elements of convergence science by bringing together multiple disciplines with the goal of creating innovative and groundbreaking technologies. In the biological and biomedical sciences, nanotechnology research has resulted in dramatic improvements in sensors, diagnostics, imaging, and even therapeutics. In particular, there is a current push to examine the interface between the biological world and micro/nano-scale systems. For example, my laboratory is developing novel strategies for spatial patterning of biomolecules, electrical and optical biosensing, nanomaterial delivery systems, cellular patterning techniques, and the study of cellular interactions with nano-structured surfaces. In this seminar, I will give examples of how convergent research is being applied to three major areas of biological research &endash; cancer diagnostics, microbiology, and DNA-based biosensing. These topics will be presented as case studies, showing the benefits (and challenges) of multi-disciplinary, convergent research and development.

  11. Integrated Metamaterials and Nanophotonics in CMOS-Compatible Materials

    NASA Astrophysics Data System (ADS)

    Reshef, Orad

    This thesis explores scalable nanophotonic devices in integrated, CMOS-compatible platforms. Our investigation focuses on two main projects: studying the material properties of integrated titanium dioxide (TiO2), and studying integrated metamaterials in silicon-on-insulator (SOI) technologies. We first describe the nanofabrication process for TiO2 photonic integrated circuits. We use this procedure to demonstrate polycrystalline anatase TiO2 ring resonators with high quality factors. We measure the thermo-optic coefficient of TiO2 and determine that it is negative, a unique property among CMOS-compatible dielectric photonic platforms. We also derive a transfer function for ring resonators in the presence of reflections and demonstrate using full-wave simulations that these reflections produce asymmetries in the resonances. For the second half of the dissertation, we design and demonstrate an SOI-based photonic-Dirac-cone metamaterial. Using a prism composed of this metamaterial, we measure its index of refraction and unambiguously determine that it is zero. Next, we take a single channel of this metamaterial to form a waveguide. Using interferometry, we independently confirm that the waveguide in this configuration preserves the dispersion profile of the aggregate medium, with a zero phase advance. We also characterize the waveguide, determining its propagation loss. Finally, we perform simulations to study nonlinear optical phenomena in zero-index media. We find that an isotropic refractive index near zero relaxes certain phase-matching constraints, allowing for more flexible configurations of nonlinear devices with dramatically reduced footprints. The outcomes of this work enable higher quality fabrication of scalable nanophotonic devices for use in nonlinear applications with passive temperature compensation. These devices are CMOS-compatible and can be integrated vertically for compact, device-dense industrial applications. It also provides access to a

  12. Large CMOS imager using hadamard transform based multiplexing

    NASA Technical Reports Server (NTRS)

    Karasik, Boris S.; Wadsworth, Mark V.

    2005-01-01

    We have developed a concept design for a large (10k x 10k) CMOS imaging array whose elements are grouped in small subarrays with N pixels in each. The subarrays are code-division multiplexed using the Hadamard Transform (HT) based encoding. The Hadamard code improves the signal-to-noise (SNR) ratio to the reference of the read-out amplifier by a factor of N^1/2. This way of grouping pixels reduces the number of hybridization bumps by N. A single chip layout has been designed and the architecture of the imager has been developed to accommodate the HT base multiplexing into the existing CMOS technology. The imager architecture allows for a trade-off between the speed and the sensitivity. The envisioned imager would operate at a speed >100 fps with the pixel noise < 20 e-. The power dissipation would be 100 pW/pixe1. The combination of the large format, high speed, high sensitivity and low power dissipation can be very attractive for space reconnaissance applications.

  13. Creation of a Radiation Hard 0.13 Micron CMOS Library at IHP

    NASA Astrophysics Data System (ADS)

    Jagdhold, U.

    2010-08-01

    To support space applications we will develop an 0.13 micron CMOS library which should be radiation hard up to 200 krad. By introducing new radiation hard design rules we will minimize IC-level leakage and single event latchup (SEL). To reduce single event upset (SEU) we will add two p-MOS transistors to all flip flops. For reliability reasons we will use double contacts in all library elements. The additional rules and the library elements will then be integrated in our Cadence mixed signal designkit, Virtuoso IC6.1 [1]. A test chip will be produced with our in house 0.13 micron BiCMOS technology, see Ref. [2].Thereafter we will doing radiation tests according the ESA specifications, see Ref. [3], [4].

  14. Label it or ban it? Public perceptions of nano-food labels and propositions for banning nano-food applications

    NASA Astrophysics Data System (ADS)

    Chuah, Agnes S. F.; Leong, Alisius D.; Cummings, Christopher L.; Ho, Shirley S.

    2018-02-01

    The future of nano-food largely hinges on public perceptions and willingness to accept this novel technology. The present study utilizes the scientific literacy model and psychometric paradigm as the key theoretical frameworks to examine the factors influencing public support for labeling and banning of nano-food in Singapore. Using data collected from a nationally representative survey of 1001 respondents, the findings demonstrated that attitudes toward technology, preference for natural product, science knowledge, and risk perception were found to substantially affect public support for both labeling and banning of nano-food. Conversely, attention to food safety news on traditional media and attention to nano-news on new media were only associated with public support for labeling of nano-food. Similarly, benefit perception was only significantly associated with public support for banning of nano-food. Theoretically, these findings support the growing body of literature that argues for the significant role played by predispositions, media use, science knowledge, and risk and benefit perceptions on attitude formation toward nano-food. It serves as the pioneering piece to address the aspect of banning in the field of nano-food. Practically, insights drawn from this study could aid relevant stakeholders in enlisting effecting strategies to convey the benefits of nano-food while mitigating the risk perceptions among the public.

  15. Design of Low Power CMOS Read-Out with TDI Function for Infrared Linear Photodiode Array Detectors

    NASA Technical Reports Server (NTRS)

    Vizcaino, Paul; Ramirez-Angulo, Jaime; Patel, Umesh D.

    2007-01-01

    A new low voltage CMOS infrared readout circuit using the buffer-direct injection method is presented. It uses a single supply voltage of 1.8 volts and a bias current of 1uA. The time-delay integration technique is used to increase the signal to noise ratio. A current memory circuit with faulty diode detection is used to remove dark current for background compensation and to disable a photodiode in a cell if detected as faulty. Simulations are shown that verify the circuit that is currently in fabrication in 0.5ym CMOS technology.

  16. A CMOS Compatible, Forming Free TaO x ReRAM

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Lohn, A. J.; Stevens, J. E.; Mickel, P. R.

    2013-08-31

    Resistive random access memory (ReRAM) has become a promising candidate for next-generation high-performance non-volatile memory that operates by electrically tuning resistance states via modulating vacancy concentrations. Here, we demonstrate a wafer-scale process for resistive switching in tantalum oxide that is completely CMOS compatible. The resulting devices are forming-free and with greater than 1x10 5 cycle endurance.

  17. MEMS capacitive pressure sensor monolithically integrated with CMOS readout circuit by using post CMOS processes

    NASA Astrophysics Data System (ADS)

    Jang, Munseon; Yun, Kwang-Seok

    2017-12-01

    In this paper, we presents a MEMS pressure sensor integrated with a readout circuit on a chip for an on-chip signal processing. The capacitive pressure sensor is formed on a CMOS chip by using a post-CMOS MEMS processes. The proposed device consists of a sensing capacitor that is square in shape, a reference capacitor and a readout circuitry based on a switched-capacitor scheme to detect capacitance change at various environmental pressures. The readout circuit was implemented by using a commercial 0.35 μm CMOS process with 2 polysilicon and 4 metal layers. Then, the pressure sensor was formed by wet etching of metal 2 layer through via hole structures. Experimental results show that the MEMS pressure sensor has a sensitivity of 11 mV/100 kPa at the pressure range of 100-400 kPa.

  18. Charge collection and non-ionizing radiation tolerance of CMOS pixel sensors using a 0.18 μm CMOS process

    NASA Astrophysics Data System (ADS)

    Zhang, Ying; Zhu, Hongbo; Zhang, Liang; Fu, Min

    2016-09-01

    The proposed Circular Electron Positron Collider (CEPC) will be primarily aimed for precision measurements of the discovered Higgs boson. Its innermost vertex detector, which will play a critical role in heavy-flavor tagging, must be constructed with fine-pitched silicon pixel sensors with low power consumption and fast readout. CMOS pixel sensor (CPS), as one of the most promising candidate technologies, has already demonstrated its excellent performance in several high energy physics experiments. Therefore it has been considered for R&D for the CEPC vertex detector. In this paper, we present the preliminary studies to improve the collected signal charge over the equivalent input capacitance ratio (Q / C), which will be crucial to reduce the analog power consumption. We have performed detailed 3D device simulation and evaluated potential impacts from diode geometry, epitaxial layer properties and non-ionizing radiation damage. We have proposed a new approach to improve the treatment of the boundary conditions in simulation. Along with the TCAD simulation, we have designed the exploratory prototype utilizing the TowerJazz 0.18 μm CMOS imaging sensor process and we will verify the simulation results with future measurements.

  19. Monolithic CMOS imaging x-ray spectrometers

    NASA Astrophysics Data System (ADS)

    Kenter, Almus; Kraft, Ralph; Gauron, Thomas; Murray, Stephen S.

    2014-07-01

    The Smithsonian Astrophysical Observatory (SAO) in collaboration with SRI/Sarnoff is developing monolithic CMOS detectors optimized for x-ray astronomy. The goal of this multi-year program is to produce CMOS x-ray imaging spectrometers that are Fano noise limited over the 0.1-10keV energy band while incorporating the many benefits of CMOS technology. These benefits include: low power consumption, radiation "hardness", high levels of integration, and very high read rates. Small format test devices from a previous wafer fabrication run (2011-2012) have recently been back-thinned and tested for response below 1keV. These devices perform as expected in regards to dark current, read noise, spectral response and Quantum Efficiency (QE). We demonstrate that running these devices at rates ~> 1Mpix/second eliminates the need for cooling as shot noise from any dark current is greatly mitigated. The test devices were fabricated on 15μm, high resistivity custom (~30kΩ-cm) epitaxial silicon and have a 16 by 192 pixel format. They incorporate 16μm pitch, 6 Transistor Pinned Photo Diode (6TPPD) pixels which have ~40μV/electron sensitivity and a highly parallel analog CDS signal chain. Newer, improved, lower noise detectors have just been fabricated (October 2013). These new detectors are fabricated on 9μm epitaxial silicon and have a 1k by 1k format. They incorporate similar 16μm pitch, 6TPPD pixels but have ~ 50% higher sensitivity and much (3×) lower read noise. These new detectors have undergone preliminary testing for functionality in Front Illuminated (FI) form and are presently being prepared for back thinning and packaging. Monolithic CMOS devices such as these, would be ideal candidate detectors for the focal planes of Solar, planetary and other space-borne x-ray astronomy missions. The high through-put, low noise and excellent low energy response, provide high dynamic range and good time resolution; bright, time varying x-ray features could be temporally and

  20. Non-linear, non-monotonic effect of nano-scale roughness on particle deposition in absence of an energy barrier: Experiments and modeling

    PubMed Central

    Jin, Chao; Glawdel, Tomasz; Ren, Carolyn L.; Emelko, Monica B.

    2015-01-01

    Deposition of colloidal- and nano-scale particles on surfaces is critical to numerous natural and engineered environmental, health, and industrial applications ranging from drinking water treatment to semi-conductor manufacturing. Nano-scale surface roughness-induced hydrodynamic impacts on particle deposition were evaluated in the absence of an energy barrier to deposition in a parallel plate system. A non-linear, non-monotonic relationship between deposition surface roughness and particle deposition flux was observed and a critical roughness size associated with minimum deposition flux or “sag effect” was identified. This effect was more significant for nanoparticles (<1 μm) than for colloids and was numerically simulated using a Convective-Diffusion model and experimentally validated. Inclusion of flow field and hydrodynamic retardation effects explained particle deposition profiles better than when only the Derjaguin-Landau-Verwey-Overbeek (DLVO) force was considered. This work provides 1) a first comprehensive framework for describing the hydrodynamic impacts of nano-scale surface roughness on particle deposition by unifying hydrodynamic forces (using the most current approaches for describing flow field profiles and hydrodynamic retardation effects) with appropriately modified expressions for DLVO interaction energies, and gravity forces in one model and 2) a foundation for further describing the impacts of more complicated scales of deposition surface roughness on particle deposition. PMID:26658159