The BlueGene/L supercomputer

NASA Astrophysics Data System (ADS)

Bhanota, Gyan; Chen, Dong; Gara, Alan; Vranas, Pavlos

2003-05-01

The architecture of the BlueGene/L massively parallel supercomputer is described. Each computing node consists of a single compute ASIC plus 256 MB of external memory. The compute ASIC integrates two 700 MHz PowerPC 440 integer CPU cores, two 2.8 Gflops floating point units, 4 MB of embedded DRAM as cache, a memory controller for external memory, six 1.4 Gbit/s bi-directional ports for a 3-dimensional torus network connection, three 2.8 Gbit/s bi-directional ports for connecting to a global tree network and a Gigabit Ethernet for I/O. 65,536 of such nodes are connected into a 3-d torus with a geometry of 32×32×64. The total peak performance of the system is 360 Teraflops and the total amount of memory is 16 TeraBytes.

75 FR 9438 - Samsung Austin Semiconductor, LLC, DRAM Fab 1, a Subsidiary of Samsung Electronics Corporation...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-03-02

... Semiconductor, LLC, DRAM Fab 1, a Subsidiary of Samsung Electronics Corporation, Including On-Site Leased... Semiconductor, LLC, a subsidiary of Samsung Electronics Corporation, DRAM Fab 1, including on-site leased.... The workers are engaged in activities related to the production of DRAM chips for use in electronics...

Challenges of image placement and overlay at the 90-nm and 65-nm nodes

NASA Astrophysics Data System (ADS)

Trybula, Walter J.

2003-05-01

The technology acceleration of the ITRS Roadmap has many implications on both the semiconductor supplier community and the manufacturers. INTERNATIONAL SE-MATECH has been leading and supporting efforts to investigate the impact of the tech-nology introduction. This paper examines the issue of manufacturing tolerances available for image placement on adjacent critical levels (overlay) at the 90nm and 65nm technol-ogy nodes. The allowable values from the 2001 release of the ITRS Roadmap are 32nm for the 90nm node, and 23nm for the 65nm node. Even the 130nm node has overlay requirements of only 46nm. Employing tolerances that can be predicted, the impact of existing production/processing tolerance accumulation can provide an indication of the challenges facing the manufacturer in the production of 90nm and 65nm Node devices.

Programmable digital memory devices based on nanoscale thin films of a thermally dimensionally stable polyimide

NASA Astrophysics Data System (ADS)

Lee, Taek Joon; Chang, Cha-Wen; Hahm, Suk Gyu; Kim, Kyungtae; Park, Samdae; Kim, Dong Min; Kim, Jinchul; Kwon, Won-Sang; Liou, Guey-Sheng; Ree, Moonhor

2009-04-01

We have fabricated electrically programmable memory devices with thermally and dimensionally stable poly(N-(N',N'-diphenyl-N'-1,4-phenyl)-N,N-4,4'-diphenylene hexafluoroisopropylidene-diphthalimide) (6F-2TPA PI) films and investigated their switching characteristics and reliability. 6F-2TPA PI films were found to reveal a conductivity of 1.0 × 10-13-1.0 × 10-14 S cm-1. The 6F-2TPA PI films exhibit versatile memory characteristics that depend on the film thickness. All the PI films are initially present in the OFF state. The PI films with a thickness of >15 to <100 nm exhibit excellent write-once-read-many-times (WORM) (i.e. fuse-type) memory characteristics with and without polarity depending on the thickness. The WORM memory devices are electrically stable, even in air ambient, for a very long time. The devices' ON/OFF current ratio is high, up to 1010. Therefore, these WORM memory devices can provide an efficient, low-cost means of permanent data storage. On the other hand, the 100 nm thick PI films exhibit excellent dynamic random access memory (DRAM) characteristics with polarity. The ON/OFF current ratio of the DRAM devices is as high as 1011. The observed electrical switching behaviors were found to be governed by trap-limited space-charge-limited conduction and local filament formation and further dependent on the differences between the highest occupied molecular orbital and the lowest unoccupied molecular orbital energy levels of the PI film and the work functions of the top and bottom electrodes as well as the PI film thickness. In summary, the excellent memory properties of 6F-2TPA PI make it a promising candidate material for the low-cost mass production of high density and very stable digital nonvolatile WORM and volatile DRAM memory devices.

Programmable digital memory devices based on nanoscale thin films of a thermally dimensionally stable polyimide.

PubMed

Lee, Taek Joon; Chang, Cha-Wen; Hahm, Suk Gyu; Kim, Kyungtae; Park, Samdae; Kim, Dong Min; Kim, Jinchul; Kwon, Won-Sang; Liou, Guey-Sheng; Ree, Moonhor

2009-04-01

We have fabricated electrically programmable memory devices with thermally and dimensionally stable poly(N-(N',N'-diphenyl-N'-1,4-phenyl)-N,N-4,4'-diphenylene hexafluoroisopropylidene-diphthalimide) (6F-2TPA PI) films and investigated their switching characteristics and reliability. 6F-2TPA PI films were found to reveal a conductivity of 1.0 x 10(-13)-1.0 x 10(-14) S cm(-1). The 6F-2TPA PI films exhibit versatile memory characteristics that depend on the film thickness. All the PI films are initially present in the OFF state. The PI films with a thickness of >15 to <100 nm exhibit excellent write-once-read-many-times (WORM) (i.e. fuse-type) memory characteristics with and without polarity depending on the thickness. The WORM memory devices are electrically stable, even in air ambient, for a very long time. The devices' ON/OFF current ratio is high, up to 10(10). Therefore, these WORM memory devices can provide an efficient, low-cost means of permanent data storage. On the other hand, the 100 nm thick PI films exhibit excellent dynamic random access memory (DRAM) characteristics with polarity. The ON/OFF current ratio of the DRAM devices is as high as 10(11). The observed electrical switching behaviors were found to be governed by trap-limited space-charge-limited conduction and local filament formation and further dependent on the differences between the highest occupied molecular orbital and the lowest unoccupied molecular orbital energy levels of the PI film and the work functions of the top and bottom electrodes as well as the PI film thickness. In summary, the excellent memory properties of 6F-2TPA PI make it a promising candidate material for the low-cost mass production of high density and very stable digital nonvolatile WORM and volatile DRAM memory devices.

Messier: A Detailed NVM-Based DIMM Model for the SST Simulation Framework.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Awad, Amro; Voskuilen, Gwendolyn Renae; Rodrigues, Arun F.

2017-02-01

DRAM technology is the main building block of main memory, however, DRAM scaling is becoming very challenging. The main issues for DRAM scaling are the increasing error rates with each new generation, the geometric and physical constraints of scaling the capacitor part of the DRAM cells, and the high power consumption caused by the continuous need for refreshing cell values. At the same time, emerging Non- Volatile Memory (NVM) technologies, such as Phase-Change Memory (PCM), are emerging as promising replacements for DRAM. NVMs, when compared to current technologies e.g., NAND-based ash, have latencies comparable to DRAM. Additionally, NVMs are non-volatile,more » which eliminates the need for refresh power and enables persistent memory applications. Finally, NVMs have promising densities and the potential for multi-level cell (MLC) storage.« less

The Programming Optimization of Capacitorless 1T DRAM Based on the Dual-Gate TFET

NASA Astrophysics Data System (ADS)

Li, Wei; Liu, Hongxia; Wang, Shulong; Chen, Shupeng; Wang, Qianqiong

2017-09-01

The larger volume of capacitor and higher leakage current of transistor have become the inherent disadvantages for the traditional one transistor (1T)-one capacitor (1C) dynamic random access memory (DRAM). Recently, the tunneling FET (TFET) is applied in DRAM cell due to the low off-state current and high switching ratio. The dual-gate TFET (DG-TFET) DRAM cell with the capacitorless structure has the superior performance-higher retention time (RT) and weak temperature dependence. But the performance of TFET DRAM cell is sensitive to programming condition. In this paper, the guideline of programming optimization is discussed in detail by using simulation tool—Silvaco Atlas. Both the writing and reading operations of DG-TFET DRAM depend on the band-to-band tunneling (BTBT). During the writing operation, the holes coming from BTBT governed by Gate2 are stored in potential well under Gate2. A small negative voltage is applied at Gate2 to retain holes for a long time during holding "1". The BTBT governed by Gate1 mainly influences the reading current. Using the optimized programming condition, the DG-TFET DRAM obtains the higher current ratio of reading "1" to reading "0" (107) and RT of more than 2 s. The higher RT reduces the refresh rate and dynamic power consumption of DRAM.

DRAM Triggers Lysosomal Membrane Permeabilization and Cell Death in CD4+ T Cells Infected with HIV

PubMed Central

Laforge, Mireille; Limou, Sophie; Harper, Francis; Casartelli, Nicoletta; Rodrigues, Vasco; Silvestre, Ricardo; Haloui, Houda; Zagury, Jean-Francois; Senik, Anna; Estaquier, Jerome

2013-01-01

Productive HIV infection of CD4+ T cells leads to a caspase-independent cell death pathway associated with lysosomal membrane permeabilization (LMP) and cathepsin release, resulting in mitochondrial outer membrane permeabilization (MOMP). Herein, we demonstrate that HIV infection induces damage-regulated autophagy modulator (DRAM) expression in a p53-dependent manner. Knocking down the expression of DRAM and p53 genes with specific siRNAs inhibited autophagy and LMP. However, inhibition of Atg5 and Beclin genes that prevents autophagy had a minor effect on LMP and cell death. The knock down of DRAM gene inhibited cytochrome C release, MOMP and cell death. However, knocking down DRAM, we increased viral infection and production. Our study shows for the first time the involvement of DRAM in host-pathogen interactions, which may represent a mechanism of defense via the elimination of infected cells. PMID:23658518

The Programming Optimization of Capacitorless 1T DRAM Based on the Dual-Gate TFET.

PubMed

Li, Wei; Liu, Hongxia; Wang, Shulong; Chen, Shupeng; Wang, Qianqiong

2017-09-06

The larger volume of capacitor and higher leakage current of transistor have become the inherent disadvantages for the traditional one transistor (1T)-one capacitor (1C) dynamic random access memory (DRAM). Recently, the tunneling FET (TFET) is applied in DRAM cell due to the low off-state current and high switching ratio. The dual-gate TFET (DG-TFET) DRAM cell with the capacitorless structure has the superior performance-higher retention time (RT) and weak temperature dependence. But the performance of TFET DRAM cell is sensitive to programming condition. In this paper, the guideline of programming optimization is discussed in detail by using simulation tool-Silvaco Atlas. Both the writing and reading operations of DG-TFET DRAM depend on the band-to-band tunneling (BTBT). During the writing operation, the holes coming from BTBT governed by Gate2 are stored in potential well under Gate2. A small negative voltage is applied at Gate2 to retain holes for a long time during holding "1". The BTBT governed by Gate1 mainly influences the reading current. Using the optimized programming condition, the DG-TFET DRAM obtains the higher current ratio of reading "1" to reading "0" (10 7 ) and RT of more than 2 s. The higher RT reduces the refresh rate and dynamic power consumption of DRAM.

MIR144* inhibits antimicrobial responses against Mycobacterium tuberculosis in human monocytes and macrophages by targeting the autophagy protein DRAM2.

PubMed

Kim, Jin Kyung; Lee, Hye-Mi; Park, Ki-Sun; Shin, Dong-Min; Kim, Tae Sung; Kim, Yi Sak; Suh, Hyun-Woo; Kim, Soo Yeon; Kim, In Soo; Kim, Jin-Man; Son, Ji-Woong; Sohn, Kyung Mok; Jung, Sung Soo; Chung, Chaeuk; Han, Sang-Bae; Yang, Chul-Su; Jo, Eun-Kyeong

2017-02-01

Autophagy is an important antimicrobial effector process that defends against Mycobacterium tuberculosis (Mtb), the human pathogen causing tuberculosis (TB). MicroRNAs (miRNAs), endogenous noncoding RNAs, are involved in various biological functions and act as post-transcriptional regulators to target mRNAs. The process by which miRNAs affect antibacterial autophagy and host defense mechanisms against Mtb infections in human monocytes and macrophages is largely uncharacterized. In this study, we show that Mtb significantly induces the expression of MIR144*/hsa-miR-144-5p, which targets the 3'-untranslated region of DRAM2 (DNA damage regulated autophagy modulator 2) in human monocytes and macrophages. Mtb infection downregulated, whereas the autophagy activators upregulated, DRAM2 expression in human monocytes and macrophages by activating AMP-activated protein kinase. In addition, overexpression of MIR144* decreased DRAM2 expression and formation of autophagosomes in human monocytes, whereas inhibition of MIR144* had the opposite effect. Moreover, the levels of MIR144* were elevated, whereas DRAM2 levels were reduced, in human peripheral blood cells and tissues in TB patients, indicating the clinical significance of MIR144* and DRAM2 in human TB. Notably, DRAM2 interacted with BECN1 and UVRAG, essential components of the autophagic machinery, leading to displacement of RUBCN from the BECN1 complex and enhancement of Ptdlns3K activity. Furthermore, MIR144* and DRAM2 were critically involved in phagosomal maturation and enhanced antimicrobial effects against Mtb. Our findings identify a previously unrecognized role of human MIR144* in the inhibition of antibacterial autophagy and the innate host immune response to Mtb. Additionally, these data reveal that DRAM2 is a key coordinator of autophagy activation that enhances antimicrobial activity against Mtb.

78 FR 24234 - Certain Semiconductor Chips With DRAM Circuitry, and Modules and Products Containing Same; Notice...

Federal Register 2010, 2011, 2012, 2013, 2014

2013-04-24

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-819] Certain Semiconductor Chips With DRAM Circuitry, and Modules and Products Containing Same; Notice of Request for Statements on the... order barring the entry of unlicensed DRAM semiconductor chips manufactured by Nanya Technology...

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bender, Michael A.; Berry, Jonathan W.; Hammond, Simon D.

A challenge in computer architecture is that processors often cannot be fed data from DRAM as fast as CPUs can consume it. Therefore, many applications are memory-bandwidth bound. With this motivation and the realization that traditional architectures (with all DRAM reachable only via bus) are insufficient to feed groups of modern processing units, vendors have introduced a variety of non-DDR 3D memory technologies (Hybrid Memory Cube (HMC),Wide I/O 2, High Bandwidth Memory (HBM)). These offer higher bandwidth and lower power by stacking DRAM chips on the processor or nearby on a silicon interposer. We will call these solutions “near-memory,” andmore » if user-addressable, “scratchpad.” High-performance systems on the market now offer two levels of main memory: near-memory on package and traditional DRAM further away. In the near term we expect the latencies near-memory and DRAM to be similar. Here, it is natural to think of near-memory as another module on the DRAM level of the memory hierarchy. Vendors are expected to offer modes in which the near memory is used as cache, but we believe that this will be inefficient.« less

Measurement methods to assess diastasis of the rectus abdominis muscle (DRAM): A systematic review of their measurement properties and meta-analytic reliability generalisation.

PubMed

van de Water, A T M; Benjamin, D R

2016-02-01

Systematic literature review. Diastasis of the rectus abdominis muscle (DRAM) has been linked with low back pain, abdominal and pelvic dysfunction. Measurement is used to either screen or to monitor DRAM width. Determining which methods are suitable for screening and monitoring DRAM is of clinical value. To identify the best methods to screen for DRAM presence and monitor DRAM width. AMED, Embase, Medline, PubMed and CINAHL databases were searched for measurement property studies of DRAM measurement methods. Population characteristics, measurement methods/procedures and measurement information were extracted from included studies. Quality of all studies was evaluated using 'quality rating criteria'. When possible, reliability generalisation was conducted to provide combined reliability estimations. Thirteen studies evaluated measurement properties of the 'finger width'-method, tape measure, calipers, ultrasound, CT and MRI. Ultrasound was most evaluated. Methodological quality of these studies varied widely. Pearson's correlations of r = 0.66-0.79 were found between calipers and ultrasound measurements. Calipers and ultrasound had Intraclass Correlation Coefficients (ICC) of 0.78-0.97 for test-retest, inter- and intra-rater reliability. The 'finger width'-method had weighted Kappa's of 0.73-0.77 for test-retest reliability, but moderate agreement (63%; weighted Kappa = 0.53) between raters. Comparing calipers and ultrasound, low measurement error was found (above the umbilicus), and the methods had good agreement (83%; weighted Kappa = 0.66) for discriminative purposes. The available information support ultrasound and calipers as adequate methods to assess DRAM. For other methods limited measurement information of low to moderate quality is available and further evaluation of their measurement properties is required. Copyright © 2015 Elsevier Ltd. All rights reserved.

Two-level main memory co-design: Multi-threaded algorithmic primitives, analysis, and simulation

DOE PAGES

Bender, Michael A.; Berry, Jonathan W.; Hammond, Simon D.; ...

2017-01-03

A challenge in computer architecture is that processors often cannot be fed data from DRAM as fast as CPUs can consume it. Therefore, many applications are memory-bandwidth bound. With this motivation and the realization that traditional architectures (with all DRAM reachable only via bus) are insufficient to feed groups of modern processing units, vendors have introduced a variety of non-DDR 3D memory technologies (Hybrid Memory Cube (HMC),Wide I/O 2, High Bandwidth Memory (HBM)). These offer higher bandwidth and lower power by stacking DRAM chips on the processor or nearby on a silicon interposer. We will call these solutions “near-memory,” andmore » if user-addressable, “scratchpad.” High-performance systems on the market now offer two levels of main memory: near-memory on package and traditional DRAM further away. In the near term we expect the latencies near-memory and DRAM to be similar. Here, it is natural to think of near-memory as another module on the DRAM level of the memory hierarchy. Vendors are expected to offer modes in which the near memory is used as cache, but we believe that this will be inefficient.« less

Evaluation of a controlled drinking minimal intervention for problem drinkers in general practice (the DRAMS scheme)

PubMed Central

Heather, Nick; Campion, Peter D.; Neville, Ronald G.; Maccabe, David

1987-01-01

Sixteen general practitioners participated in a controlled trial of the Scottish Health Education Group's DRAMS (drinking reasonably and moderately with self-control) scheme. The scheme was evaluated by randomly assigning 104 heavy or problem drinkers to three groups – a group participating in the DRAMS scheme (n = 34), a group given simple advice only (n = 32) and a non-intervention control group (n = 38). Six month follow-up information was obtained for 91 subjects (87.5% of initial sample). There were no significant differences between the groups in reduction in alcohol consumption, but patients in the DRAMS group showed a significantly greater reduction in a logarithmic measure of serum gamma-glutamyl-transpeptidase than patients in the group receiving advice only. Only 14 patients in the DRAMS group completed the full DRAMS procedure. For the sample as a whole, there was a significant reduction in alcohol consumption, a significant improvement on a measure of physical health and well-being, and significant reductions in the logarithmic measure of serum gamma-glutamyl transpeptidase and in mean corpuscular volume. The implications of these findings for future research into controlled drinking minimal interventions in general practice are discussed. PMID:3448228

ArF step-and-scan system with 0.75 NA for the 0.10μm node

NASA Astrophysics Data System (ADS)

Vleeming, Bert; Heskamp, Barbra; Bakker, Hans; Verstappen, Leon; Finders, Jo; Stoeten, Jan; Boerret, Rainer; Roempp, Oliver

2001-09-01

It is widely expected that 193 nm lithography will be the technology of choice for volume production of the 0.10 micrometer device generation. For this purpose the PAS5500/1100TM Step & Scan system, the second generation ArF tool, was developed. It is based on the PAS5500/900TM, the body of which has been adapted to fit the new 0.75 NA StarlithTM projection optics. This high NA enables mass manufacturing of devices following the 0.10 micrometer design rule. The system features a 10 W 2 kHz ArF laser and the AERIALTM II illuminator that can be equipped with a QUASARTM (multipole) option. In order to minimize wafer processing influences on overlay performance ATHENATM off- axis alignment with phase modulator is implemented. The usage of Reticle Blue Alignment will further improve overlay as well as increase the system stability. In this paper the PAS5500/1100TM system layout is discussed and the first imaging and overlay results are presented. Imaging performance is illustrated by SEM pictures of 0.10 micrometer dense lines, 0.15, 0.13 and 0.12 micrometer dense contact holes, 0.10 micrometer DRAM isolation patterns, image plane deviation and system distortion fingerprints. Alignment reproducibility and single machine overlay results demonstrate the overlay capability.

The Optimization of Spacer Engineering for Capacitor-Less DRAM Based on the Dual-Gate Tunneling Transistor.

PubMed

Li, Wei; Liu, Hongxia; Wang, Shulong; Chen, Shupeng; Wang, Qianqiong

2018-03-05

The DRAM based on the dual-gate tunneling FET (DGTFET) has the advantages of capacitor-less structure and high retention time. In this paper, the optimization of spacer engineering for DGTFET DRAM is systematically investigated by Silvaco-Atlas tool to further improve its performance, including the reduction of reading "0" current and extension of retention time. The simulation results show that spacers at the source and drain sides should apply the low-k and high-k dielectrics, respectively, which can enhance the reading "1" current and reduce reading "0" current. Applying this optimized spacer engineering, the DGTFET DRAM obtains the optimum performance-extremely low reading "0" current (10 -14 A/μm) and large retention time (10s), which decreases its static power consumption and dynamic refresh rate. And the low reading "0" current also enhances its current ratio (10 7 ) of reading "1" to reading "0". Furthermore, the analysis about scalability reveals its inherent shortcoming, which offers the further investigation direction for DGTFET DRAM.

The Optimization of Spacer Engineering for Capacitor-Less DRAM Based on the Dual-Gate Tunneling Transistor

NASA Astrophysics Data System (ADS)

Li, Wei; Liu, Hongxia; Wang, Shulong; Chen, Shupeng; Wang, Qianqiong

2018-03-01

The DRAM based on the dual-gate tunneling FET (DGTFET) has the advantages of capacitor-less structure and high retention time. In this paper, the optimization of spacer engineering for DGTFET DRAM is systematically investigated by Silvaco-Atlas tool to further improve its performance, including the reduction of reading "0" current and extension of retention time. The simulation results show that spacers at the source and drain sides should apply the low-k and high-k dielectrics, respectively, which can enhance the reading "1" current and reduce reading "0" current. Applying this optimized spacer engineering, the DGTFET DRAM obtains the optimum performance-extremely low reading "0" current (10-14A/μm) and large retention time (10s), which decreases its static power consumption and dynamic refresh rate. And the low reading "0" current also enhances its current ratio (107) of reading "1" to reading "0". Furthermore, the analysis about scalability reveals its inherent shortcoming, which offers the further investigation direction for DGTFET DRAM.

Improving energy efficiency of Embedded DRAM Caches for High-end Computing Systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mittal, Sparsh; Vetter, Jeffrey S; Li, Dong

2014-01-01

With increasing system core-count, the size of last level cache (LLC) has increased and since SRAM consumes high leakage power, power consumption of LLCs is becoming a significant fraction of processor power consumption. To address this, researchers have used embedded DRAM (eDRAM) LLCs which consume low-leakage power. However, eDRAM caches consume a significant amount of energy in the form of refresh energy. In this paper, we propose ESTEEM, an energy saving technique for embedded DRAM caches. ESTEEM uses dynamic cache reconfiguration to turn-off a portion of the cache to save both leakage and refresh energy. It logically divides the cachemore » sets into multiple modules and turns-off possibly different number of ways in each module. Microarchitectural simulations confirm that ESTEEM is effective in improving performance and energy efficiency and provides better results compared to a recently-proposed eDRAM cache energy saving technique, namely Refrint. For single and dual-core simulations, the average saving in memory subsystem (LLC+main memory) on using ESTEEM is 25.8% and 32.6%, respectively and average weighted speedup are 1.09X and 1.22X, respectively. Additional experiments confirm that ESTEEM works well for a wide-range of system parameters.« less

Space Radiation Effects in Advanced Flash Memories

NASA Technical Reports Server (NTRS)

Johnston, A. H.

2001-01-01

Memory storage requirements in space systems have steadily increased, much like storage requirements in terrestrial systems. Large arrays of dynamic memories (DRAMs) have been used in solid-state recorders, relying on a combination of shielding and error-detection-and correction (EDAC) to overcome the extreme sensitivity of DRAMs to space radiation. For example, a 2-Gbit memory (with 4-Mb DRAMs) used on the Clementine mission functioned perfectly during its moon mapping mission, in spite of an average of 71 memory bit flips per day from heavy ions. Although EDAC worked well with older types of memory circuits, newer DRAMs use extremely complex internal architectures which has made it increasingly difficult to implement EDAC. Some newer DRAMs have also exhibited catastrophic latchup. Flash memories are an intriguing alternative to DRAMs because of their nonvolatile storage and extremely high storage density, particularly for applications where writing is done relatively infrequently. This paper discusses radiation effects in advanced flash memories, including general observations on scaling and architecture as well as the specific experience obtained at the Jet Propulsion Laboratory in evaluating high-density flash memories for use on the NASA mission to Europa, one of Jupiter's moons. This particular mission must pass through the Jovian radiation belts, which imposes a very demanding radiation requirement.

Immunoreactivities of human nonmetastatic clone 23 and p53 products are disassociated and not good predictors of lymph node metastases in early-stage cervical cancer patients.

PubMed

Tee, Y T; Wang, P H; Ko, J L; Chen, G D; Chang, H; Lin, L Y

2007-01-01

To assess the relation between expressions of human nonmetastatic clone 23 (nm23-H1) and p53 in cervical cancer, their relationships with lymph node metastasis, and further to examine their predictive of lymph node metastases. nm23-H1 and p53 expression profiles were visualized by immunohistochemistry in early-stage cervical cancer specimens. Immunoreactivities of nm23-H1 and p53 were disassociated. The independent variables related with lymph node metastases were grade of cancer cell differentiation (p < 0.029) and stromal invasion (p < 0.039). Sensitivity, specificity, positive and negative predictive values, and accuracy for lymph node metastasis were calculated to be 91.7%, 13.5%, 25.6%, 83.3%, and 32.7% for nm23-H1 and 66.7%, 51.4%, 30.8%, 82.6%, and 55.1% for p53. Nm23-H1 and p53 are disassociated and not good predictors of lymph node metastases in early-stage cervical cancer patients. However, stromal invasion and cell differentiation can predict lymph node metastasis.

Effects of exercise on diastasis of the rectus abdominis muscle in the antenatal and postnatal periods: a systematic review.

PubMed

Benjamin, D R; van de Water, A T M; Peiris, C L

2014-03-01

Diastasis of the rectus abdominis muscle (DRAM) is common during and after pregnancy, and has been related to lumbopelvic instability and pelvic floor weakness. Women with DRAM are commonly referred to physiotherapists for conservative management, but little is known about the effectiveness of such strategies. To determine if non-surgical interventions (such as exercise) prevent or reduce DRAM. EMBASE, Medline, CINAHL, PUBMED, AMED and PEDro were searched. Studies of all designs that included any non-surgical interventions to manage DRAM during the ante- and postnatal periods were included. Methodological quality was assessed using a modified Downs and Black checklist. Meta-analysis was performed using a fixed effects model to calculate risk ratios (RR) and 95% confidence intervals (CI) where appropriate. Eight studies totalling 336 women during the ante- and/or postnatal period were included. The study design ranged from case study to randomised controlled trial. All interventions included some form of exercise, mainly targeted abdominal/core strengthening. The available evidence showed that exercise during the antenatal period reduced the presence of DRAM by 35% (RR 0.65, 95% CI 0.46 to 0.92), and suggested that DRAM width may be reduced by exercising during the ante- and postnatal periods. The papers reviewed were of poor quality as there is very little high-quality literature on the subject. Based on the available evidence and quality of this evidence, non-specific exercise may or may not help to prevent or reduce DRAM during the ante- and postnatal periods. Copyright © 2013 Chartered Society of Physiotherapy. Published by Elsevier Ltd. All rights reserved.

32-Bit-Wide Memory Tolerates Failures

NASA Technical Reports Server (NTRS)

Buskirk, Glenn A.

1990-01-01

Electronic memory system of 32-bit words corrects bit errors caused by some common type of failures - even failure of entire 4-bit-wide random-access-memory (RAM) chip. Detects failure of two such chips, so user warned that ouput of memory may contain errors. Includes eight 4-bit-wide DRAM's configured so each bit of each DRAM assigned to different one of four parallel 8-bit words. Each DRAM contributes only 1 bit to each 8-bit word.

A methodology for double patterning compliant split and design

NASA Astrophysics Data System (ADS)

Wiaux, Vincent; Verhaegen, Staf; Iwamoto, Fumio; Maenhoudt, Mireille; Matsuda, Takashi; Postnikov, Sergei; Vandenberghe, Geert

2008-11-01

Double Patterning allows to further extend the use of water immersion lithography at its maximum numerical aperture NA=1.35. Splitting of design layers to recombine through Double Patterning (DP) enables an effective resolution enhancement. Single polygons may need to be split up (cut) depending on the pattern density and its 2D content. The split polygons recombine at the so-called 'stitching points'. These stitching points may affect the yield due to the sensitivity to process variations. We describe a methodology to ensure a robust double patterning by identifying proper split- and design- guidelines. Using simulations and experimental data, we discuss in particular metal1 first interconnect layers of random LOGIC and DRAM applications at 45nm half-pitch (hp) and 32nm hp where DP may become the only timely patterning solution.

Results from a new die-to-database reticle inspection platform

NASA Astrophysics Data System (ADS)

Broadbent, William; Xiong, Yalin; Giusti, Michael; Walsh, Robert; Dayal, Aditya

2007-03-01

A new die-to-database high-resolution reticle defect inspection system has been developed for the 45nm logic node and extendable to the 32nm node (also the comparable memory nodes). These nodes will use predominantly 193nm immersion lithography although EUV may also be used. According to recent surveys, the predominant reticle types for the 45nm node are 6% simple tri-tone and COG. Other advanced reticle types may also be used for these nodes including: dark field alternating, Mask Enhancer, complex tri-tone, high transmission, CPL, EUV, etc. Finally, aggressive model based OPC will typically be used which will include many small structures such as jogs, serifs, and SRAF (sub-resolution assist features) with accompanying very small gaps between adjacent structures. The current generation of inspection systems is inadequate to meet these requirements. The architecture and performance of a new die-to-database inspection system is described. This new system is designed to inspect the aforementioned reticle types in die-to-database and die-to-die modes. Recent results from internal testing of the prototype systems are shown. The results include standard programmed defect test reticles and advanced 45nm and 32nm node reticles from industry sources. The results show high sensitivity and low false detections being achieved.

Analysis method to determine and characterize the mask mean-to-target and uniformity specification

NASA Astrophysics Data System (ADS)

Lee, Sung-Woo; Leunissen, Leonardus H. A.; Van de Kerkhove, Jeroen; Philipsen, Vicky; Jonckheere, Rik; Lee, Suk-Joo; Woo, Sang-Gyun; Cho, Han-Ku; Moon, Joo-Tae

2006-06-01

The specification of the mask mean-to-target (MTT) and uniformity is related to functions as: mask error enhancement factor, dose sensitivity and critical dimension (CD) tolerances. The mask MTT shows a trade-off relationship with the uniformity. Simulations for the mask MTT and uniformity (M-U) are performed for LOGIC devices of 45 and 37 nm nodes according to mask type, illumination condition and illuminator polarization state. CD tolerances and after develop inspection (ADI) target CD's in the simulation are taken from the 2004 ITRS roadmap. The simulation results allow for much smaller tolerances in the uniformity and larger offsets in the MTT than the values as given in the ITRS table. Using the parameters in the ITRS table, the mask uniformity contributes to nearly 95% of total CDU budget for the 45 nm node, and is even larger than the CDU specification of the ITRS for the 37 nm node. We also compared the simulation requirements with the current mask making capabilities. The current mask manufacturing status of the mask uniformity is barely acceptable for the 45 nm node, but requires process improvements towards future nodes. In particular, for the 37 nm node, polarized illumination is necessary to meet the ITRS requirements. The current mask linearity deviates for pitches smaller than 300 nm, which is not acceptable even for the 45 nm node. More efforts on the proximity correction method are required to improve the linearity behavior.

Angular dependence of DRAM upset susceptibility

NASA Technical Reports Server (NTRS)

Guertin, S. M.; Swift, G. M.; Edmonds, L. D.

2000-01-01

Heavy ion irradiations of two types of commercial DRAMs reveal unexpected angular responses. One device's cross section varied by two orders of magnitude with azimuthal angle. Accurate prediction of space rates requires accommodating this effect.

Automatic alternative phase-shift mask CAD layout tool for gate shrinkage of embedded DRAM in logic below 0.18 μm

NASA Astrophysics Data System (ADS)

Ohnuma, Hidetoshi; Kawahira, Hiroichi

1998-09-01

An automatic alternative phase shift mask (PSM) pattern layout tool has been newly developed. This tool is dedicated for embedded DRAM in logic device to shrink gate line width with improving line width controllability in lithography process with a design rule below 0.18 micrometers by the KrF excimer laser exposure. The tool can crete Levenson type PSM used being coupled with a binary mask adopting a double exposure method for positive photo resist. By using graphs, this tool automatically creates alternative PSM patterns. Moreover, it does not give any phase conflicts. By adopting it to actual embedded DRAM in logic cells, we have provided 0.16 micrometers gate resist patterns at both random logic and DRAM areas. The patterns were fabricated using two masks with the double exposure method. Gate line width has been well controlled under a practical exposure-focus window.

Field results from a new die-to-database reticle inspection platform

NASA Astrophysics Data System (ADS)

Broadbent, William; Yokoyama, Ichiro; Yu, Paul; Seki, Kazunori; Nomura, Ryohei; Schmalfuss, Heiko; Heumann, Jan; Sier, Jean-Paul

2007-05-01

A new die-to-database high-resolution reticle defect inspection platform, TeraScanHR, has been developed for advanced production use with the 45nm logic node, and extendable for development use with the 32nm node (also the comparable memory nodes). These nodes will use predominantly ArF immersion lithography although EUV may also be used. According to recent surveys, the predominant reticle types for the 45nm node are 6% simple tri-tone and COG. Other advanced reticle types may also be used for these nodes including: dark field alternating, Mask Enhancer, complex tri-tone, high transmission, CPL, etc. Finally, aggressive model based OPC will typically be used which will include many small structures such as jogs, serifs, and SRAF (sub-resolution assist features) with accompanying very small gaps between adjacent structures. The current generation of inspection systems is inadequate to meet these requirements. The architecture and performance of the new TeraScanHR reticle inspection platform is described. This new platform is designed to inspect the aforementioned reticle types in die-to-database and die-to-die modes using both transmitted and reflected illumination. Recent results from field testing at two of the three beta sites are shown (Toppan Printing in Japan and the Advanced Mask Technology Center in Germany). The results include applicable programmed defect test reticles and advanced 45nm product reticles (also comparable memory reticles). The results show high sensitivity and low false detections being achieved. The platform can also be configured for the current 65nm, 90nm, and 130nm nodes.

Effects of dram shop liability and enhanced overservice law enforcement initiatives on excessive alcohol consumption and related harms: Two community guide systematic reviews.

PubMed

Rammohan, Veda; Hahn, Robert A; Elder, Randy; Brewer, Robert; Fielding, Jonathan; Naimi, Timothy S; Toomey, Traci L; Chattopadhyay, Sajal K; Zometa, Carlos

2011-09-01

Dram shop liability holds the owner or server(s) at a bar, restaurant, or other location where a patron, adult or underage, consumed his or her last alcoholic beverage responsible for harms subsequently inflicted by the patron on others. Liability in a state can be established by case law or statute. Overservice laws prohibit the sale of alcoholic beverages to intoxicated patrons drinking in on-premises retail alcohol outlets (i.e., premises where the alcohol is consumed where purchased); enhanced enforcement of these laws is intended to ensure compliance by premises personnel. Both of these interventions are ultimately designed to promote responsible beverage service by reducing sales to intoxicated patrons, underage youth, or both. This review assesses the effectiveness of dram shop liability and the enhanced enforcement of overservice laws for preventing excessive alcohol consumption and related harms. Studies assessing alcohol-related harms in states adopting dram shop laws were evaluated, as were studies assessing alcohol-related harms in regions with enhanced overservice enforcement. Methods previously developed for systematic reviews for the Guide to Community Preventive Services were used. Eleven studies assessed the association of state dram shop liability with various outcomes, including all-cause motor vehicle crash deaths, alcohol-related motor vehicle crash deaths (the most common outcome assessed in the studies reviewed), alcohol consumption, and other alcohol-related harms. There was a median reduction of 6.4% (range of values 3.7% to 11.3% reduction) in alcohol-related motor vehicle fatalities associated with the presence of dram shop liability in jurisdictions where premises are licensed. Other alcohol-related outcomes also showed a reduction. Only two studies assessed the effects of enhanced enforcement initiatives on alcohol-related outcomes; findings were inconsistent, some indicating benefit and others none. According to Community Guide rules of evidence, the number and consistency of findings indicate strong evidence of the effectiveness of dram shop laws in reducing alcohol-related harms. It will be important to assess the possible effects of legal modifications to dram shop proceedings, such as the imposition of statutes of limitation, increased evidentiary requirements, and caps on recoverable amounts. According to Community Guide rules of evidence, evidence is insufficient to determine the effectiveness of enhanced enforcement of overservice laws for preventing excessive alcohol consumption and related harms. Published by Elsevier Inc.

Dynamics of drug resistance-associated mutations in HIV-1 DNA reverse transcriptase sequence during effective ART.

PubMed

Nouchi, A; Nguyen, T; Valantin, M A; Simon, A; Sayon, S; Agher, R; Calvez, V; Katlama, C; Marcelin, A G; Soulie, C

2018-05-29

To investigate the dynamics of HIV-1 variants archived in cells harbouring drug resistance-associated mutations (DRAMs) to lamivudine/emtricitabine, etravirine and rilpivirine in patients under effective ART free from selective pressure on these DRAMs, in order to assess the possibility of recycling molecules with resistance history. We studied 25 patients with at least one DRAM to lamivudine/emtricitabine, etravirine and/or rilpivirine identified on an RNA sequence in their history and with virological control for at least 5 years under a regimen excluding all drugs from the resistant class. Longitudinal ultra-deep sequencing (UDS) and Sanger sequencing of the reverse transcriptase region were performed on cell-associated HIV-1 DNA samples taken over the 5 years of follow-up. Viral variants harbouring the analysed DRAMs were no longer detected by UDS over the 5 years in 72% of patients, with viruses susceptible to the molecules of interest found after 5 years in 80% of patients with UDS and in 88% of patients with Sanger. Residual viraemia with <50 copies/mL was detected in 52% of patients. The median HIV DNA level remained stable (2.4 at baseline versus 2.1 log10 copies/106 cells 5 years later). These results show a clear trend towards clearance of archived DRAMs to reverse transcriptase inhibitors in cell-associated HIV-1 DNA after a long period of virological control, free from therapeutic selective pressure on these DRAMs, reflecting probable residual replication in some reservoirs of the fittest viruses and leading to persistent evolution of the archived HIV-1 DNA resistance profile.

Downregulation of VRK1 by p53 in Response to DNA Damage Is Mediated by the Autophagic Pathway

PubMed Central

Valbuena, Alberto; Castro-Obregón, Susana; Lazo, Pedro A.

2011-01-01

Human VRK1 induces a stabilization and accumulation of p53 by specific phosphorylation in Thr18. This p53 accumulation is reversed by its downregulation mediated by Hdm2, requiring a dephosphorylated p53 and therefore also needs the removal of VRK1 as stabilizer. This process requires export of VRK1 to the cytosol and is inhibited by leptomycin B. We have identified that downregulation of VRK1 protein levels requires DRAM expression, a p53-induced gene. DRAM is located in the endosomal-lysosomal compartment. Induction of DNA damage by UV, IR, etoposide and doxorubicin stabilizes p53 and induces DRAM expression, followed by VRK1 downregulation and a reduction in p53 Thr18 phosphorylation. DRAM expression is induced by wild-type p53, but not by common human p53 mutants, R175H, R248W and R273H. Overexpression of DRAM induces VRK1 downregulation and the opposite effect was observed by its knockdown. LC3 and p62 were also downregulated, like VRK1, in response to UV-induced DNA damage. The implication of the autophagic pathway was confirmed by its requirement for Beclin1. We propose a model with a double regulatory loop in response to DNA damage, the accumulated p53 is removed by induction of Hdm2 and degradation in the proteasome, and the p53-stabilizer VRK1 is eliminated by the induction of DRAM that leads to its lysosomal degradation in the autophagic pathway, and thus permitting p53 degradation by Hdm2. This VRK1 downregulation is necessary to modulate the block in cell cycle progression induced by p53 as part of its DNA damage response. PMID:21386980

Size effects and realiability of barium strontium titanate thin films

NASA Astrophysics Data System (ADS)

Parker, Charles Bernard

Thin films of (Ba,Sr)TiO3 (BST) deposited by Liquid Source MOCVD were investigated. BST is a candidate dielectric for future-generation DRAM and as a tunable dielectric. Two areas of both scientific and commercial interest were investigated. The first area is the effect of decreasing dimension on ferroelectric properties. Several theories of size effects in ferroelectrics were evaluated. The dielectric response of a set of BST films of thicknesses from 15 to 580 nm was measured from 85 to 580 K. These films were extensively characterized and the boundary conditions that often influence size effects measurements were considered, including strain, finite screening length in the electrode, depolarization fields in the ferroelectric, atmospheric effects, control of stochiometry, and others. The data set was compared to the theoretical predictions and it was determined that Finite Size Scaling provided the best fit to the data. Using this theory, the predicted dielectric response was compared to the requirements of future generations of DRAM and was found to be sufficient, if film strain can be controlled. The second area is reliability. The types of lifetime-limiting electrical failure observed in BST are resistance degradation, time dependant dielectric breakdown (tddb), and noisy breakdown. Previous work on BST reliability has largely focused on resistance degradation at high temperature. This condition is only a small subset of experimental space. This work extends the understanding of BST failure into the low temperature regime and evaluates the effects of both DC and AC stress. It was found that tddb is the dominant failure mode at low temperature and resistance degradation is the dominant failure modes at high temperature. Synthesizing this work with previous work on resistance degradation allowed a failure framework to be developed. Rigorous extrapolation of resistance degradation and tddb lifetimes was compared to the requirements of future generations of DRAM and was found that while resistance degradation will not limit device lifetimes, tddb will. Refinement of BST processing will be necessary to reduce the defect causing tddb failure.

Deviation from the law of energy equipartition in a small dynamic-random-access memory

NASA Astrophysics Data System (ADS)

Carles, Pierre-Alix; Nishiguchi, Katsuhiko; Fujiwara, Akira

2015-06-01

A small dynamic-random-access memory (DRAM) coupled with a high charge sensitivity electrometer based on a silicon field-effect transistor is used to study the law of equipartition of energy. By statistically analyzing the movement of single electrons in the DRAM at various temperature and voltage conditions in thermal equilibrium, we are able to observe a behavior that differs from what is predicted by the law of equipartition energy: when the charging energy of the capacitor of the DRAM is comparable to or smaller than the thermal energy kBT/2, random electron motion is ruled perfectly by thermal energy; on the other hand, when the charging energy becomes higher in relation to the thermal energy kBT/2, random electron motion is suppressed which indicates a deviation from the law of equipartition of energy. Since the law of equipartition is analyzed using the DRAM, one of the most familiar devices, we believe that our results are perfectly universal among all electronic devices.

Effects of Dram Shop, Responsible Beverage Service Training, and State Alcohol Control Laws on Underage Drinking Driver Fatal Crash Ratios.

PubMed

Scherer, Michael; Fell, James C; Thomas, Sue; Voas, Robert B

2015-01-01

In this study, we aimed to determine whether three minimum legal drinking age 21 (MLDA-21) laws-dram shop liability, responsible beverage service (RBS) training, and state control of alcohol sales-have had an impact on underage drinking and driving fatal crashes using annual state-level data, and compared states with strong laws to those with weak laws to examine their effect on beer consumption and fatal crash ratios. Using the Fatality Analysis Reporting System, we calculated the ratio of drinking to nondrinking drivers under age 21 involved in fatal crashes as our key outcome measure. We used structural equation modeling to evaluate the three MLDA-21 laws. We controlled for covariates known to impact fatal crashes including: 17 additional MLDA-21 laws; administrative license revocation; blood alcohol concentration limits of.08 and.10 for driving; seat belt laws; sobriety checkpoint frequency; unemployment rates; and vehicle miles traveled. Outcome variables, in addition to the fatal crash ratios of drinking to nondrinking drivers under age 21 included state per capita beer consumption. Dram shop liability laws were associated with a 2.4% total effect decrease (direct effects: β =.019, p =.018). Similarly, RBS training laws were associated with a 3.6% total effect decrease (direct effect: β =.048, p =.001) in the ratio of drinking to nondrinking drivers under age 21 involved in fatal crashes. There was a significant relationship between dram shop liability law strength and per capita beer consumption, F (4, 1528) = 24.32, p <.001, partial η(2) =.016, showing states with strong dram shop liability laws (Mean (M) = 1.276) averaging significantly lower per capita beer consumption than states with weak laws (M = 1.340). Dram shop liability laws and RBS laws were both associated with significantly reduced per capita beer consumption and fatal crash ratios. In practical terms, this means that dram shop liability laws are currently associated with saving an estimated 64 lives in the 45 jurisdictions that currently have the law. If the remaining 6 states adopted the dram shop law, an additional 9 lives could potentially be saved annually. Similarly, RBS training laws are associated with saving an estimated 83 lives in the 37 jurisdictions that currently have the laws. If the remaining 14 states adopted these RBS training laws, we estimate that an additional 28 lives could potentially be saved.

Effects of Dram Shop, Responsible Beverage Service Training, and State Alcohol Control Laws on Underage Drinking Driver Fatal Crash Ratios

PubMed Central

Scherer, Michael; Fell, James C.; Thomas, Sue; Voas, Robert B.

2015-01-01

Objectives In this study, we aimed to determine whether three minimum legal drinking age 21 (MLDA-21) laws—dram shop liability, responsible beverage service (RBS) training, and state control of alcohol sales—have had an impact on underage drinking-and-driving fatal crashes using annual state-level data, and compared states with strong laws to those with weak laws to examine their effect on beer consumption and fatal crash ratios. Methods Using the Fatality Analysis Reporting System, we calculated the ratio of drinking to nondrinking drivers under age 21 involved in fatal crashes as our key outcome measure. We used structural equation modeling to evaluate the three MLDA-21 laws. We controlled for covariates known to impact fatal crashes including: 17 additional MLDA-21 laws; administrative license revocation; blood alcohol concentration limits of .08 and .10 for driving; seat belt laws; sobriety checkpoint frequency; unemployment rates; and vehicle miles traveled. Outcome variables, in addition to the fatal crash ratios of drinking to nondrinking drivers under age 21 included state per capita beer consumption. Results Dram shop liability laws were associated with a 2.4% total effect decrease (direct effects: β = .019, p = .018). Similarly, RBS training laws were associated with a 3.6% total effect decrease (direct effects: β = .048, p = .001) in the ratio of drinking to nondrinking drivers under age 21 involved in fatal crashes. There was a significant relationship between dram shop liability law strength and per capita beer consumption, F (4, 1528) = 24.32, p < .001, partial η2 = .016, showing states with strong dram shop liability laws (Mean (M) = 1.276) averaging significantly lower per capita beer consumption than states with weak laws (M = 1.340). Conclusions Dram shop liability laws and RBS laws were both associated with significantly reduced per capita beer consumption and fatal crash ratios. In practical terms, this means that dram shop liability laws are currently associated with saving an estimated 64 lives in the 45 jurisdictions that currently have the law. If the remaining 6 states adopted the dram shop law, an additional 9 lives could potentially be saved annually. Similarly, RBS training laws are associated with saving an estimated 83 lives in the 37 jurisdictions that currently have the law. If the remaining 14 states adopted these RBS training laws, we estimate that an additional 28 lives could potentially be saved. PMID:26436244

Imaging performance and challenges of 10nm and 7nm logic nodes with 0.33 NA EUV

NASA Astrophysics Data System (ADS)

van Setten, Eelco; Schiffelers, Guido; Psara, Eleni; Oorschot, Dorothe; Davydova, Natalia; Finders, Jo; Depre, Laurent; Farys, Vincent

2014-10-01

The NXE:3300B is ASML's third generation EUV system and has an NA of 0.33 and is positioned at a resolution of 22nm, which can be extended down to 18nm and below with off-axis illumination at full transmission. Multiple systems have been qualified and installed at customers. The NXE:3300B succeeds the NXE:3100 system (NA of 0.25), which has allowed customers to gain valuable EUV experience. It is expected that EUV will be adopted first for critical Logic layers at 10nm and 7nm nodes, such as Metal-1, to avoid the complexity of triple patterning schemes using ArF immersion. In this paper we will evaluate the imaging performance of (sub-)10nm node Logic M1 on the NXE:3300B EUV scanner. We will show the line-end performance of tip-to-tip and tip-to-space test features for various pitches and illumination settings and the performance enhancement obtained by means of a 1st round of OPC. We will also show the magnitude of local variations. The Logic M1 cell is evaluated at various critical features to identify hot spots. A 2nd round OPC model was calibrated of which we will show the model accuracy and ability to predict hot spots in the Logic M1 cell. The calibrated OPC model is used to predict the expected performance at 7nm node Logic using off-axis illumination at 16nm minimum half pitch. Initial results of L/S exposed on the NXE:3300B at 7nm node resolutions will be shown. An outlook is given to future 0.33 NA systems on the ASML roadmap with enhanced illuminator capabilities to further improve performance and process window.

Evaluation of a fast and flexible OPC package: OPTISSIMO

NASA Astrophysics Data System (ADS)

Maurer, Wilhelm; Waas, Thomas; Eisenmann, Hans

1996-12-01

It is out of question, that current state-of-the-art lithography--printing 350 nm structures with i-line tools or 250 nm structures with DUV tools--needs to correct for proximity effects (OPC). Otherwise, all the well-known effects like line-end shortening, linewidth variation as a function of adjacent patterns, linewidth non-linearity, etc. will produce a pattern, that is significantly different from the intended design. In this paper, we report first evaluation results of OPTISSIMO, a software package for automatic proximity correction. Besides the ability to handle full-chip designs by preserving as much as possible of the original data-hierarchy, there are significant options for the user. A large number of choices can be made to balance between the precision of the correction and the complexity of the corrected design. The main target of our evaluations was to check for full-chip OPC for the gate level of a state-of-the-art design. This corresponds to print either linewidths in the 350 nm to 400 nm range with i-line lithography or 250 nm/300 nm linewidth with DUV lithography. Taking 400 nm i-line lithography as an example, 3% precision OPC which has been demonstrated. By using hierarchical data handling, it was shown, that even the data complexity of a 256 M DRAM can be managed within reasonable time.

Lithographic performance comparison with various RET for 45-nm node with hyper NA

NASA Astrophysics Data System (ADS)

Adachi, Takashi; Inazuki, Yuichi; Sutou, Takanori; Kitahata, Yasuhisa; Morikawa, Yasutaka; Toyama, Nobuhito; Mohri, Hiroshi; Hayashi, Naoya

2006-05-01

In order to realize 45 nm node lithography, strong resolution enhancement technology (RET) and water immersion will be needed. In this research, we discussed about various RET performance comparison for 45 nm node using 3D rigorous simulation. As a candidate, we chose binary mask (BIN), several kinds of attenuated phase-shifting mask (att-PSM) and chrome-less phase-shifting lithography mask (CPL). The printing performance was evaluated and compared for each RET options, after the optimizing illumination conditions, mask structure and optical proximity correction (OPC). The evaluation items of printing performance were CD-DOF, contrast-DOF, conventional ED-window and MEEF, etc. It's expected that effect of mask 3D topography becomes important at 45 nm node, so we argued about not only the case of ideal structures, but also the mask topography error effects. Several kinds of mask topography error were evaluated and we confirmed how these errors affect to printing performance.

Interactions of double patterning technology with wafer processing, OPC and design flows

NASA Astrophysics Data System (ADS)

Lucas, Kevin; Cork, Chris; Miloslavsky, Alex; Luk-Pat, Gerry; Barnes, Levi; Hapli, John; Lewellen, John; Rollins, Greg; Wiaux, Vincent; Verhaegen, Staf

2008-03-01

Double patterning technology (DPT) is one of the main options for printing logic devices with half-pitch less than 45nm; and flash and DRAM memory devices with half-pitch less than 40nm. DPT methods decompose the original design intent into two individual masking layers which are each patterned using single exposures and existing 193nm lithography tools. The results of the individual patterning layers combine to re-create the design intent pattern on the wafer. In this paper we study interactions of DPT with lithography, masks synthesis and physical design flows. Double exposure and etch patterning steps create complexity for both process and design flows. DPT decomposition is a critical software step which will be performed in physical design and also in mask synthesis. Decomposition includes cutting (splitting) of original design intent polygons into multiple polygons where required; and coloring of the resulting polygons. We evaluate the ability to meet key physical design goals such as: reduce circuit area; minimize rework; ensure DPT compliance; guarantee patterning robustness on individual layer targets; ensure symmetric wafer results; and create uniform wafer density for the individual patterning layers.

Low-power DRAM-compatible Replacement Gate High-k/Metal Gate Stacks

NASA Astrophysics Data System (ADS)

Ritzenthaler, R.; Schram, T.; Bury, E.; Spessot, A.; Caillat, C.; Srividya, V.; Sebaai, F.; Mitard, J.; Ragnarsson, L.-Å.; Groeseneken, G.; Horiguchi, N.; Fazan, P.; Thean, A.

2013-06-01

In this work, the possibility of integration of High-k/Metal Gate (HKMG), Replacement Metal Gate (RMG) gate stacks for low power DRAM compatible transistors is studied. First, it is shown that RMG gate stacks used for Logic applications need to be seriously reconsidered, because of the additional anneal(s) needed in a DRAM process. New solutions are therefore developed. A PMOS stack HfO2/TiN with TiN deposited in three times combined with Work Function metal oxidations is demonstrated, featuring a very good Work Function of 4.95 eV. On the other hand, the NMOS side is shown to be a thornier problem to solve: a new solution based on the use of oxidized Ta as a diffusion barrier is proposed, and a HfO2/TiN/TaOX/TiAl/TiN/TiN gate stack featuring an aggressive Work Function of 4.35 eV (allowing a Work Function separation of 600 mV between NMOS and PMOS) is demonstrated. This work paves the way toward the integration of gate-last options for DRAM periphery transistors.

Connected component analysis of review-SEM images for sub-10nm node process verification

NASA Astrophysics Data System (ADS)

Halder, Sandip; Leray, Philippe; Sah, Kaushik; Cross, Andrew; Parisi, Paolo

2017-03-01

Analysis of hotspots is becoming more and more critical as we scale from node to node. To define true process windows at sub-14 nm technology nodes, often defect inspections are being included to weed out design weak spots (often referred to as hotspots). Defect inspection sub 28 nm nodes is a two pass process. Defect locations identified by optical inspection tools need to be reviewed by review-SEM's to understand exactly which feature is failing in the region flagged by the optical tool. The images grabbed by the review-SEM tool are used for classification but rarely for quantification. The goal of this paper is to see if the thousands of review-SEM images which are existing can be used for quantification and further analysis. More specifically we address the SEM quantification problem with connected component analysis.

Built-in self-repair of VLSI memories employing neural nets

NASA Astrophysics Data System (ADS)

Mazumder, Pinaki

1998-10-01

The decades of the Eighties and the Nineties have witnessed the spectacular growth of VLSI technology, when the chip size has increased from a few hundred devices to a staggering multi-millon transistors. This trend is expected to continue as the CMOS feature size progresses towards the nanometric dimension of 100 nm and less. SIA roadmap projects that, where as the DRAM chips will integrate over 20 billion devices in the next millennium, the future microprocessors may incorporate over 100 million transistors on a single chip. As the VLSI chip size increase, the limited accessibility of circuit components poses great difficulty for external diagnosis and replacement in the presence of faulty components. For this reason, extensive work has been done in built-in self-test techniques, but little research is known concerning built-in self-repair. Moreover, the extra hardware introduced by conventional fault-tolerance techniques is also likely to become faulty, therefore causing the circuit to be useless. This research demonstrates the feasibility of implementing electronic neural networks as intelligent hardware for memory array repair. Most importantly, we show that the neural network control possesses a robust and degradable computing capability under various fault conditions. Overall, a yield analysis performed on 64K DRAM's shows that the yield can be improved from as low as 20 percent to near 99 percent due to the self-repair design, with overhead no more than 7 percent.

Defect inspection and printability study for 14 nm node and beyond photomask

NASA Astrophysics Data System (ADS)

Seki, Kazunori; Yonetani, Masashi; Badger, Karen; Dechene, Dan J.; Akima, Shinji

2016-10-01

Two different mask inspection techniques are developed and compared for 14 nm node and beyond photomasks, High resolution and Litho-based inspection. High resolution inspection is the general inspection method in which a 19x nm wavelength laser is used with the High NA inspection optics. Litho-based inspection is a new inspection technology. This inspection uses the wafer lithography information, and as such, this method has automatic defect classification capability which is based on wafer printability. Both High resolution and Litho-based inspection methods are compared using 14 nm and 7 nm node programmed defect and production design masks. The defect sensitivity and mask inspectability is compared, in addition to comparing the defect classification and throughput. Additionally, the Cost / Infrastructure comparison is analyzed and the impact of each inspection method is discussed.

Radiation Performance of 1 Gbit DDR SDRAMs Fabricated in the 90 nm CMOS Technology Node

NASA Technical Reports Server (NTRS)

Ladbury, Raymond L.; Gorelick, Jerry L.; Berg, M. D.; Kim, H.; LaBel, K.; Friendlich, M.; Koga, R.; George, J.; Crain, S.; Yu, P.;

Diagnosis of NMOS DRAM functional performance as affected by a picosecond dye laser

NASA Technical Reports Server (NTRS)

Kim, Q.; Schwartz, H. R.; Edmonds, L. D.; Zoutendyk, J. A.

1992-01-01

A picosec pulsed dye laser beam was at selected wavelengths successfully used to simulate heavy-ion single-event effects (SEEs) in negative channel NMOS DRAMs. A DRAM was used to develop the test technique because bit-mapping capability and previous heavy-ion upset data were available. The present analysis is the first to establish such a correlation between laser and heavy-ion data for devices, such as the NMOS DRAM, where charge collection is dominated by long-range diffusion, which is controlled by carrier density at remote distances from a depletion region. In the latter case, penetration depth is an important parameter and is included in the present analysis. A single-pulse picosecond dye laser beam (1.5 microns diameter) focused onto a single cell component can upset a single memory cell; clusters of memory cell upsets (multiple errors) were observed when the laser energy was increased above the threshold energy. The multiple errors were analyzed as a function of the bias voltage and total energy of a single pulse. A diffusion model to distinguish the multiple upsets from the laser-induced charge agreed well with previously reported heavy ion data.

The application of phase grating to CLM technology for the sub-65nm node optical lithography

NASA Astrophysics Data System (ADS)

Yoon, Gi-Sung; Kim, Sung-Hyuck; Park, Ji-Soong; Choi, Sun-Young; Jeon, Chan-Uk; Shin, In-Kyun; Choi, Sung-Woon; Han, Woo-Sung

2005-06-01

As a promising technology for sub-65nm node optical lithography, CLM(Chrome-Less Mask) technology among RETs(Resolution Enhancement Techniques) for low k1 has been researched worldwide in recent years. CLM has several advantages, such as relatively simple manufacturing process and competitive performance compared to phase-edge PSM's. For the low-k1 lithography, we have researched CLM technique as a good solution especially for sub-65nm node. As a step for developing the sub-65nm node optical lithography, we have applied CLM technology in 80nm-node lithography with mesa and trench method. From the analysis of the CLM technology in the 80nm lithography, we found that there is the optimal shutter size for best performance in the technique, the increment of wafer ADI CD varied with pattern's pitch, and a limitation in patterning various shapes and size by OPC dead-zone - OPC dead-zone in CLM technique is the specific region of shutter size that dose not make the wafer CD increased more than a specific size. And also small patterns are easily broken, while fabricating the CLM mask in mesa method. Generally, trench method has better optical performance than mesa. These issues have so far restricted the application of CLM technology to a small field. We approached these issues with 3-D topographic simulation tool and found that the issues could be overcome by applying phase grating in trench-type CLM. With the simulation data, we made some test masks which had many kinds of patterns with many different conditions and analyzed their performance through AIMS fab 193 and exposure on wafer. Finally, we have developed the CLM technology which is free of OPC dead-zone and pattern broken in fabrication process. Therefore, we can apply the CLM technique into sub-65nm node optical lithography including logic devices.

Unique method for controlling device level overlay with high-NA optical overlay technique using YieldStar in a DRAM HVM environment

NASA Astrophysics Data System (ADS)

Park, Dong-Kiu; Kim, Hyun-Sok; Seo, Moo-Young; Ju, Jae-Wuk; Kim, Young-Sik; Shahrjerdy, Mir; van Leest, Arno; Soco, Aileen; Miceli, Giacomo; Massier, Jennifer; McNamara, Elliott; Hinnen, Paul; Böcker, Paul; Oh, Nang-Lyeom; Jung, Sang-Hoon; Chai, Yvon; Lee, Jun-Hyung

2018-03-01

This paper demonstrates the improvement using the YieldStar S-1250D small spot, high-NA, after-etch overlay in-device measurements in a DRAM HVM environment. It will be demonstrated that In-device metrology (IDM) captures after-etch device fingerprints more accurately compared to the industry-standard CDSEM. Also, IDM measurements (acquiring both CD and overlay) can be executed significantly faster increasing the wafer sampling density that is possible within a realistic metrology budget. The improvements to both speed and accuracy open the possibility of extended modeling and correction capabilities for control. The proof-book data of this paper shows a 36% improvement of device overlay after switching to control in a DRAM HVM environment using indevice metrology.

Implementation and Optimization of miniGMG - a Compact Geometric Multigrid Benchmark

DOE Office of Scientific and Technical Information (OSTI.GOV)

Williams, Samuel; Kalamkar, Dhiraj; Singh, Amik

2012-12-01

Multigrid methods are widely used to accelerate the convergence of iterative solvers for linear systems used in a number of different application areas. In this report, we describe miniGMG, our compact geometric multigrid benchmark designed to proxy the multigrid solves found in AMR applications. We explore optimization techniques for geometric multigrid on existing and emerging multicore systems including the Opteron-based Cray XE6, Intel Sandy Bridge and Nehalem-based Infiniband clusters, as well as manycore-based architectures including NVIDIA's Fermi and Kepler GPUs and Intel's Knights Corner (KNC) co-processor. This report examines a variety of novel techniques including communication-aggregation, threaded wavefront-based DRAM communication-avoiding,more » dynamic threading decisions, SIMDization, and fusion of operators. We quantify performance through each phase of the V-cycle for both single-node and distributed-memory experiments and provide detailed analysis for each class of optimization. Results show our optimizations yield significant speedups across a variety of subdomain sizes while simultaneously demonstrating the potential of multi- and manycore processors to dramatically accelerate single-node performance. However, our analysis also indicates that improvements in networks and communication will be essential to reap the potential of manycore processors in large-scale multigrid calculations.« less

Clean focus, dose and CD metrology for CD uniformity improvement

NASA Astrophysics Data System (ADS)

Lee, Honggoo; Han, Sangjun; Hong, Minhyung; Kim, Seungyoung; Lee, Jieun; Lee, DongYoung; Oh, Eungryong; Choi, Ahlin; Kim, Nakyoon; Robinson, John C.; Mengel, Markus; Pablo, Rovira; Yoo, Sungchul; Getin, Raphael; Choi, Dongsub; Jeon, Sanghuck

2018-03-01

Lithography process control solutions require more exacting capabilities as the semiconductor industry goes forward to the 1x nm node DRAM device manufacturing. In order to continue scaling down the device feature sizes, critical dimension (CD) uniformity requires continuous improvement to meet the required CD error budget. In this study we investigate using optical measurement technology to improve over CD-SEM methods in focus, dose, and CD. One of the key challenges is measuring scanner focus of device patterns. There are focus measurement methods based on specially designed marks on scribe-line, however, one issue of this approach is that it will report focus of scribe line which is potentially different from that of the real device pattern. In addition, scribe-line marks require additional design and troubleshooting steps that add complexity. In this study, we investigated focus measurement directly on the device pattern. Dose control is typically based on using the linear correlation behavior between dose and CD. The noise of CD measurement, based on CD-SEM for example, will not only impact the accuracy, but also will make it difficult to monitor dose signature on product wafers. In this study we will report the direct dose metrology result using an optical metrology system which especially enhances the DUV spectral coverage to improve the signal to noise ratio. CD-SEM is often used to measure CD after the lithography step. This measurement approach has the advantage of easy recipe setup as well as the flexibility to measure critical feature dimensions, however, we observe that CD-SEM metrology has limitations. In this study, we demonstrate within-field CD uniformity improvement through the extraction of clean scanner slit and scan CD behavior by using optical metrology.

Preparation and evaluation of poly(2-hydroxyethyl aspartamide)-hexadecylamine-iron oxide for MR imaging of lymph nodes

PubMed Central

2014-01-01

The purpose of this study was to synthesize biocompatible poly(2-hydroxyethyl aspartamide)–C16-iron oxide (PHEA-C16-iron oxide) nanoparticles and to evaluate their efficacy as a contrast agent for magnetic resonance imaging of lymph nodes. The PHEA-C16-iron oxide nanoparticles were synthesized by coprecipitation method. The core size of the PHEA-C16-iron oxide nanoparticles was about 5 to 7 nm, and the overall size of the nanoparticles was around 20, 60, and 150 nm in aqueous solution. The size of the nanoparticles was controlled by the amount of C16. The 3.0-T MRI signal intensity of a rabbit lymph node was effectively reduced after intravenous administration of PHEA-C16-iron oxide with the size of 20 nm. The in vitro and in vivo toxicity tests revealed the high biocompatibility of PHEA-C16-iron oxide nanoparticles. Therefore, PHEA-C16-iron oxide nanoparticles with 20-nm size can be potentially useful as T2-weighted MR imaging contrast agents for the detection of lymph nodes. PMID:24438671

N7 logic via patterning using templated DSA: implementation aspects

NASA Astrophysics Data System (ADS)

Bekaert, J.; Doise, J.; Gronheid, R.; Ryckaert, J.; Vandenberghe, G.; Fenger, G.; Her, Y. J.; Cao, Y.

2015-07-01

In recent years, major advancements have been made in the directed self-assembly (DSA) of block copolymers (BCP). Insertion of DSA for IC fabrication is seriously considered for the 7 nm node. At this node the DSA technology could alleviate costs for multiple patterning and limit the number of masks that would be required per layer. At imec, multiple approaches for inserting DSA into the 7 nm node are considered. One of the most straightforward approaches for implementation would be for via patterning through templated DSA; a grapho-epitaxy flow using cylindrical phase BCP material resulting in contact hole multiplication within a litho-defined pre-pattern. To be implemented for 7 nm node via patterning, not only the appropriate process flow needs to be available, but also DSA-aware mask decomposition is required. In this paper, several aspects of the imec approach for implementing templated DSA will be discussed, including experimental demonstration of density effect mitigation, DSA hole pattern transfer and double DSA patterning, creation of a compact DSA model. Using an actual 7 nm node logic layout, we derive DSA-friendly design rules in a logical way from a lithographer's view point. A concrete assessment is provided on how DSA-friendly design could potentially reduce the number of Via masks for a place-and-routed N7 logic pattern.

Electrical memory characteristics of a nondoped pi-conjugated polymer bearing carbazole moieties.

PubMed

Park, Samdae; Lee, Taek Joon; Kim, Dong Min; Kim, Jin Chul; Kim, Kyungtae; Kwon, Wonsang; Ko, Yong-Gi; Choi, Heungyeal; Chang, Taihyun; Ree, Moonhor

2010-08-19

Poly[bis(9H-carbazole-9-ethyl)dipropargylmalonate] (PCzDPM) is a novel pi-conjugated polymer bearing carbazole moieties that has been synthesized by polymerization of bis(9H-carbazole-9-ethyl)dipropargylmalonate with the aid of molybdenum chloride solution as the catalyst. This polymer is thermally stable up to 255 degrees C under a nitrogen atmosphere and 230 degrees C in air ambient; its glass-transition temperature is 147 or 128 degrees C, depending on the polymer chain conformation (helical or planar structure). The charge-transport characteristics of PCzDPM in nanometer-scaled thin films were studied as a function of temperature and film thickness. PCzDPM films with a thickness of 15-30 nm were found to exhibit very stable dynamic random access memory (DRAM) characteristics without polarity. Furthermore, the polymer films retain DRAM characteristics up to 180 degrees C. The ON-state current is dominated by Ohmic conduction, and the OFF-state current appears to undergo a transition from Ohmic to space-charge-limited conduction with a shallow-trap distribution. The ON/OFF switching of the devices is mainly governed by filament formation. The filament formation mechanism for the switching process is supported by the metallic properties of the PCzDPM film, which result in the temperature dependence of the ON-state current. In addition, the structure of this pi-conjugated polymer was found to vary with its thermal history; this change in structure can affect filament formation in the polymer film.

Photomask quality assessment solution for 90-nm technology node

NASA Astrophysics Data System (ADS)

Ohira, Katsumi; Chung, Dong Hoon P.; Nobuyuki, Yoshioka; Tateno, Motonari; Matsumura, Kenichi; Chen, Jiunn-Hung; Luk-Pat, Gerard T.; Fukui, Norio; Tanaka, Yoshio

2004-08-01

As 90 nm LSI devices are about to enter pre-production, the cost and turn-around time of photomasks for such devices will be key factors for success in device production. Such devices will be manufactured with state-of-the-art 193nm photolithography systems. Photomasks for these devices are being produced with the most advanced equipment, material and processing technologies and yet, quality assurance still remains an issue for volume production. These issues include defect classification and disposition due to the insufficient resolution of the defect inspection system at conventional review and classification processes and to aggressive RETs, uncertainty of the impact the defects have on the printed feature as well as inconsistencies of classical defect specifications as applied in the sub-wavelength era are becoming a serious problem. Simulation-based photomask qualification using the Virtual Stepper System is widely accepted today as a reliable mask quality assessment tool of mask defects for both the 180 nm and 130 nm technology nodes. This study examines the extendibility of the Virtual Stepper System to 90nm technology node. The proposed method of simulation-based mask qualification uses aerial image defect simulation in combination with a next generation DUV inspection system with shorter wavelength (266nm) and small pixel size combined with DUV high-resolution microscope for some defect cases. This paper will present experimental results that prove the applicability for enabling 90nm technology nodes. Both contact and line/space patterns with varies programmed defects on ArF Attenuated PSM will be used. This paper will also address how to make the strategy production-worthy.

Simultaneous mapping of pan and sentinel lymph nodes for real-time image-guided surgery.

PubMed

Ashitate, Yoshitomo; Hyun, Hoon; Kim, Soon Hee; Lee, Jeong Heon; Henary, Maged; Frangioni, John V; Choi, Hak Soo

2014-01-01

The resection of regional lymph nodes in the basin of a primary tumor is of paramount importance in surgical oncology. Although sentinel lymph node mapping is now the standard of care in breast cancer and melanoma, over 20% of patients require a completion lymphadenectomy. Yet, there is currently no technology available that can image all lymph nodes in the body in real time, or assess both the sentinel node and all nodes simultaneously. In this study, we report an optical fluorescence technology that is capable of simultaneous mapping of pan lymph nodes (PLNs) and sentinel lymph nodes (SLNs) in the same subject. We developed near-infrared fluorophores, which have fluorescence emission maxima either at 700 nm or at 800 nm. One was injected intravenously for identification of all regional lymph nodes in a basin, and the other was injected locally for identification of the SLN. Using the dual-channel FLARE intraoperative imaging system, we could identify and resect all PLNs and SLNs simultaneously. The technology we describe enables simultaneous, real-time visualization of both PLNs and SLNs in the same subject.

Double exposure technique for 45nm node and beyond

NASA Astrophysics Data System (ADS)

Hsu, Stephen; Park, Jungchul; Van Den Broeke, Douglas; Chen, J. Fung

2005-11-01

The technical challenges in using F2 lithography for the 45nm node, along with the insurmountable difficulties in EUV lithography, has driven the semiconductor chipmaker into the low k1 lithography era under the pressure of ever decreasing feature sizes. Extending lithography towards lower k1 puts heavy demand on the resolution enhancement technique (RET), exposure tool, and the need for litho friendly design. Hyper numerical aperture (NA) exposure tools, immersion, and double exposure techniques (DET's) are the promising methods to extend lithography manufacturing to the 45nm node at k1 factors below 0.3. Scattering bars (SB's) have become an integral part of the lithography process as chipmakers move to production at ever lower k1 factors. To achieve better critical dimension (CD) control, polarization is applied to enhance the image contrast in the preferential imaging orientation, which increases the risk of SB printability. The optimum SB width is approximately (0.20 ~ 0.25)*(λ/NA). When the SB width becomes less than the exposure wavelength on the 4X mask, Kirchhoff's scalar theory under predicts the SB intensity. The optical weighting factor of the SB increases (Figure 1b) and the SB's become more susceptible to printing. Meanwhile, under hyper NA conditions, the effectiveness of "subresolution" SB's is significantly diminished. A full-sized scattering bars (FSB) scheme becomes necessary. Double exposure methods, such as using ternary 6% attenuated PSM (attPSM) for DDL, are good imaging solutions that can reach and likely go beyond the 45nm node. Today DDL, using binary chrome masks, is capable of printing 65 nm device patterns. In this work, we investigate the use of DET with 6% attPSM masks to target 45nm node device. The SB scalability and printability issues can be taken cared of by using "mutual trimming", i.e., with the combined energy from the two exposures. In this study, we share our findings of using DET to pattern a 45nm node device design with polarization and immersion. We also explore other double patterning methods which in addition to having two exposures, incorporates double coat/developing/etch processing to break the 0.25 k1 barrier.

Carbon nanotube circuit integration up to sub-20 nm channel lengths.

PubMed

Shulaker, Max Marcel; Van Rethy, Jelle; Wu, Tony F; Liyanage, Luckshitha Suriyasena; Wei, Hai; Li, Zuanyi; Pop, Eric; Gielen, Georges; Wong, H-S Philip; Mitra, Subhasish

2014-04-22

Carbon nanotube (CNT) field-effect transistors (CNFETs) are a promising emerging technology projected to achieve over an order of magnitude improvement in energy-delay product, a metric of performance and energy efficiency, compared to silicon-based circuits. However, due to substantial imperfections inherent with CNTs, the promise of CNFETs has yet to be fully realized. Techniques to overcome these imperfections have yielded promising results, but thus far only at large technology nodes (1 μm device size). Here we demonstrate the first very large scale integration (VLSI)-compatible approach to realizing CNFET digital circuits at highly scaled technology nodes, with devices ranging from 90 nm to sub-20 nm channel lengths. We demonstrate inverters functioning at 1 MHz and a fully integrated CNFET infrared light sensor and interface circuit at 32 nm channel length. This demonstrates the feasibility of realizing more complex CNFET circuits at highly scaled technology nodes.

Electronics Industry Study Report: Semiconductors and Defense Electronics

DTIC Science & Technology

2003-01-01

Access Memory (DRAM) chips and microprocessors. Samsung , Micron, Hynix, and Infineon control almost three-fourths of the DRAM market,8 while Intel alone...Country 2001 Sales ($B) 2002 Sales ($B) % Change % 2002 Mkt 1 1 Intel U.S. 23.7 24.0 1% 16.9% 2 3 Samsung Semiconductor S. Korea 6.3...located in four major regions: the United States, Europe, Japan, and the Asia-Pacific region (includes South Korea, China, Singapore, Malaysia , Taiwan

The introduction of dram shop legislation in the United States and the advent of server training.

PubMed

Saltz, R F

1993-01-01

This paper discusses the relationship of research to policy in the matter of dram shop liability and server training in the USA. The discussion is made difficult by the apparent lack of any such relationship. While research in the area has only just been published, dram shop liability in the USA actually dates to the nineteenth century, with its current form shaped by the repeal of prohibition in 1933. Because liability law and liability insurance vary from state to state, current movements for reform and server training arise somewhat spontaneously in different localities and with different emphases. Research constitutes only a minor influence among several others more salient to the political process of policy formation. The advent of mandatory server training in the state of Oregon is used to illustrate the somewhat capricious nature of progress in responsible beverage service.

Considerations for fine hole patterning for the 7nm node

NASA Astrophysics Data System (ADS)

Yaegashi, Hidetami; Oyama, Kenichi; Hara, Arisa; Natori, Sakurako; Yamauchi, Shohei; Yamato, Masatoshi; Koike, Kyohei

2016-03-01

One of the practical candidates to produce 7nm node logic devices is to use the multiple patterning with 193-immersion exposure. For the multiple patterning, it is important to evaluate the relation between the number of mask layer and the minimum pitch systematically to judge the device manufacturability. Although the number of the time of patterning, namely LE(Litho-Etch) ^ x-time, and overlay steps have to be reduced, there are some challenges in miniaturization of hole size below 20nm. Various process fluctuations on contact hole have a direct impact on device performance. According to the technical trend, 12nm diameter hole on 30nm-pitch hole will be needed on 7nm node. Extreme ultraviolet lithography (EUV) and Directed self-assembly (DSA) are attracting considerable attention to obtain small feature size pattern, however, 193-immersion still has the potential to extend optical lithography cost-effectively for sub-7nm node. The objective of this work is to study the process variation challenges and resolution in post-processing for the CD-bias control to meet sub-20nm diameter contact hole. Another pattern modulation is also demonstrated during post-processing step for hole shrink. With the realization that pattern fidelity and pattern placement management will limit scaling long before devices and interconnects fail to perform intrinsically, the talk will also outline how circle edge roughness (CER) and Local-CD uniformity can correct efficiency. On the other hand, 1D Gridded-Design-Rules layout (1D layout) has simple rectangular shapes. Also, we have demonstrated CD-bias modification on short trench pattern to cut grating line for its fabrication.

Rutger's CAM2000 chip architecture

NASA Technical Reports Server (NTRS)

Smith, Donald E.; Hall, J. Storrs; Miyake, Keith

1993-01-01

This report describes the architecture and instruction set of the Rutgers CAM2000 memory chip. The CAM2000 combines features of Associative Processing (AP), Content Addressable Memory (CAM), and Dynamic Random Access Memory (DRAM) in a single chip package that is not only DRAM compatible but capable of applying simple massively parallel operations to memory. This document reflects the current status of the CAM2000 architecture and is continually updated to reflect the current state of the architecture and instruction set.

Immersion and dry scanner extensions for sub-10nm production nodes

NASA Astrophysics Data System (ADS)

Weichselbaum, Stefan; Bornebroek, Frank; de Kort, Toine; Droste, Richard; de Graaf, Roelof F.; van Ballegoij, Rob; Botter, Herman; McLaren, Matthew G.; de Boeij, Wim P.

2015-03-01

Progressing towards the 10nm and 7nm imaging node, pattern-placement and layer-to-layer overlay requirements keep on scaling down and drives system improvements in immersion (ArFi) and dry (ArF/KrF) scanners. A series of module enhancements in the NXT platform have been introduced; among others, the scanner is equipped with exposure stages with better dynamics and thermal control. Grid accuracy improvements with respect to calibration, setup, stability, and layout dependency tighten MMO performance and enable mix and match scanner operation. The same platform improvements also benefit focus control. Improvements in detectability and reproducibility of low contrast alignment marks enhance the alignment solution window for 10nm logic processes and beyond. The system's architecture allows dynamic use of high-order scanner optimization based on advanced actuators of projection lens and scanning stages. This enables a holistic optimization approach for the scanner, the mask, and the patterning process. Productivity scanner design modifications esp. stage speeds and optimization in metrology schemes provide lower layer costs for customers using immersion lithography as well as conventional dry technology. Imaging, overlay, focus, and productivity data is presented, that demonstrates 10nm and 7nm node litho-capability for both (immersion & dry) platforms.

Clinical significance of nm23 gene expression in gastric cancer.

PubMed

Mönig, Stefan P; Nolden, Brit; Lübke, Thomas; Pohl, Alexandra; Grass, Guido; Schneider, Paul M; Dienes, Hans P; Hölscher, Arnulf H; Baldus, Stephan E

2007-01-01

The expression of the nm23 gene has been associated with the development of metastasis. Numerous studies have shown down-regulation of nm23 expression in metastatic breast and colon cancer. The expression of the putative metastasis-suppressor gene nm23 in gastric carcinoma is controversial. The aim of this study was the analysis of nm23 expression in a large series of gastric cancer patients. In a retrospective immunohistochemical study specimens obtained from 116 gastric cancer patients (mean age 64 years; range: 33-85) who had undergone gastrectomy with extended lymphadenectomy were analyzed. Nm23 expression in the tumor epithelium was studied by immunohistochemistry followed by a semi-quantitative (score 0-3) evaluation. Statistical analysis including Chi-square test, uni- and multivariate survival analyses were performed. The nm23 staining pattern was positive (score 2-3) in 100 (86.2%) specimens and negative (score 0-1) in 16 (13.8%) samples. Lymph node metastasis was found in 65% of the patients. No significant correlations could be determined between nm23 expression and other variables such as gender, age, tumor differentiation, WHO-, Laurén-, Goseki-, or Ming-classification. The intensity of nm23 staining in the tumor cells was not significantly correlated with depth of tumor infiltration (T-stage), lymph node metastasis (N-stage), distant metastasis (M-stage), UICC-stage, or prognosis. Our series did not show a correlation of nm23 expression in terms of lymph node and distant metastasis or prognosis in gastric cancer patients.

Electron-induced single event upsets in 28 nm and 45 nm bulk SRAMs

DOE PAGES

Trippe, J. M.; Reed, R. A.; Austin, R. A.; ...

2015-12-01

In this study, we present experimental evidence of single electron-induced upsets in commercial 28 nm and 45 nm CMOS SRAMs from a monoenergetic electron beam. Upsets were observed in both technology nodes when the SRAM was operated in a low power state. The experimental cross section depends strongly on both bias and technology node feature size, consistent with previous work in which SRAMs were irradiated with low energy muons and protons. Accompanying simulations demonstrate that δ-rays produced by the primary electrons are responsible for the observed upsets. Additional simulations predict the on-orbit event rates for various Earth and Jovian environmentsmore » for a set of sensitive volumes representative of current technology nodes. The electron contribution to the total upset rate for Earth environments is significant for critical charges as high as 0.2 fC. This value is comparable to that of sub-22 nm bulk SRAMs. Similarly, for the Jovian environment, the electron-induced upset rate is larger than the proton-induced upset rate for critical charges as high as 0.3 fC.« less

Advanced materials for 193-nm resists

NASA Astrophysics Data System (ADS)

Ushirogouchi, Tohru; Asakawa, Koji; Shida, Naomi; Okino, Takeshi; Saito, Satoshi; Funaki, Yoshinori; Takaragi, Akira; Tsutsumi, Kentaro; Nakano, Tatsuya

2000-06-01

Acrylate monomers containing alicyclic side chains featuring a series of polar substituent groups were assumed to be model compounds. Solubility parameters were calculated for the corresponding acrylate polymers. These acrylate monomers were synthesized using a novel aerobic oxidation reaction employing N-hydroxyphtalimide (NHPI) as a catalyst, and then polymerized. These reactions were confirmed to be applicable for the mass-production of those compounds. The calculation results agreed with the hydrophilic parameters measured experimentally. Moreover, the relationship between the resist performance and the above-mentioned solubility parameter has been studied. As a result, a correlation between the resist performance and the calculated solubility parameter was observed. Finally, resolution of 0.13-micron patterns, based on the 1G DRAM design rule, could be successfully fabricated by optimizing the solubility parameter and the resist composition.

1D design style implications for mask making and CEBL

NASA Astrophysics Data System (ADS)

Smayling, Michael C.

2013-09-01

At advanced nodes, CMOS logic is being designed in a highly regular design style because of the resolution limitations of optical lithography equipment. Logic and memory layouts using 1D Gridded Design Rules (GDR) have been demonstrated to nodes beyond 12nm.[1-4] Smaller nodes will require the same regular layout style but with multiple patterning for critical layers. One of the significant advantages of 1D GDR is the ease of splitting layouts into lines and cuts. A lines and cuts approach has been used to achieve good pattern fidelity and process margin to below 12nm.[4] Line scaling with excellent line-edge roughness (LER) has been demonstrated with self-aligned spacer processing.[5] This change in design style has important implications for mask making: • The complexity of the masks will be greatly reduced from what would be required for 2D designs with very complex OPC or inverse lithography corrections. • The number of masks will initially increase, as for conventional multiple patterning. But in the case of 1D design, there are future options for mask count reduction. • The line masks will remain simple, with little or no OPC, at pitches (1x) above 80nm. This provides an excellent opportunity for continual improvement of line CD and LER. The line pattern will be processed through a self-aligned pitch division sequence to divide pitch by 2 or by 4. • The cut masks can be done with "simple OPC" as demonstrated to beyond 12nm.[6] Multiple simple cut masks may be required at advanced nodes. "Coloring" has been demonstrated to below 12nm for two colors and to 8nm for three colors. • Cut/hole masks will eventually be replaced by e-beam direct write using complementary e-beam lithography (CEBL).[7-11] This transition is gated by the availability of multiple column e-beam systems with throughput adequate for high- volume manufacturing. A brief description of 1D and 2D design styles will be presented, followed by examples of 1D layouts. Mask complexity for 1D layouts patterned directly will be compared to mask complexity for lines and cuts at nodes larger than 20nm. No such comparison is possible below 20nm since single-patterning does not work below ~80nm pitch using optical exposure tools. Also discussed will be recently published wafer results for line patterns with pitch division by-2 and by-4 at sub-12nm nodes, plus examples of post-etch results for 1D patterns done with cut masks and compared to cuts exposed by a single-column e-beam direct write system.

Recommendations on dram shop liability and overservice law enforcement initiatives to prevent excessive alcohol consumption and related harms.

PubMed

2011-09-01

The Task Force on Community Preventive Services recommends the use of dram shop liability laws, on the basis of strong evidence of effectiveness in preventing and reducing alcohol-related harms. The Task Force found insufficient evidence to determine the effectiveness of overservice law enforcement initiatives as a means to reduce excessive alcohol consumption and related harms, because too few studies were identified and findings were inconsistent. Published by Elsevier Inc.

Design and pitch scaling for affordable node transition and EUV insertion scenario

NASA Astrophysics Data System (ADS)

Kim, Ryoung-han; Ryckaert, Julien; Raghavan, Praveen; Sherazi, Yasser; Debacker, Peter; Trivkovic, Darko; Gillijns, Werner; Tan, Ling Ee; Drissi, Youssef; Blanco, Victor; Bekaert, Joost; Mao, Ming; Larivière, Stephane; McIntyre, Greg

2017-04-01

imec's DTCO and EUV achievement toward imec 7nm (iN7) technology node which is industry 5nm node equivalent is reported with a focus on cost and scaling. Patterning-aware design methodology supports both iArF multiple patterning and EUV under one compliant design rule. FinFET device with contacted poly pitch of 42nm and metal pitch of 32nm with 7.5-track, 6.5-track, and 6-track standard cell library are explored. Scaling boosters are used to provide additional scaling and die cost benefit while lessening pitch shrink burden, and it makes EUV insertion more affordable. EUV pattern fidelity is optimized through OPC, SMO, M3D, mask sizing and SRAF. Processed wafers were characterized and edge-placement-error (EPE) variability is validated for EUV insertion. Scale-ability and cost of ownership of EUV patterning in aligned with iN7 standard cell design, integration and patterning specification are discussed.

Elastic scattering spectroscopy findings in formalin-fixed oral squamous cell carcinoma specimens

NASA Astrophysics Data System (ADS)

Swinson, B.; Elmaaytah, M.; Jerjes, W.; Hopper, C.

2005-11-01

Oral squamous cell carcinoma (OSCC) has been shown to spread locally and infiltrate adjacent bone or via the lymphatic system to the cervical lymph nodes. This usually necessitates a surgical neck dissection and either a local or segmental resection for bone clearance. While histopathology remains the gold standard for tissue diagnosis, several new diagnostic techniques are being developed that rely on physical and biochemical changes that mirror or precede malignant changes within tissue. The aim of this study was to compare findings of Elastic Scattering Spectroscopy (ESS) with histopathology on formalin-fixed specimens of both neck lymph node dissections and de-calcified archival bone from patients with OSCC. We wished to see if this technique could be used as an adjunct or alternative to histopathology in defining cervical nodal involvement and if it could be used to identify bone resection margins positive for tumour. 130 lymph nodes were examined from 13 patients. The nodes were formalin-fixed, bivalved and examined by ESS. The intensity of the spectrum at 4 points was considered for comparison; at 360nm, 450nm, 630nm and 690nm. 341 spectra were taken from the mandibular specimens of 21 patients, of which 231 spectra were taken from histologically positive sites and the rest were normal. The nodes and bone specimens were then routinely processed with haematoxylin and eosin-stained sections, examined histopathologically, and the results compared. Using Linear Discriminant Analysis (LDA) as a statistical method, a sensitivity of 98% and a specificity of 68% was obtained for the neck nodes and a sensitivity of 87% and a specificity of 80% for the bone margins.

28nm node process optimization: a lithography centric view

NASA Astrophysics Data System (ADS)

Seltmann, Rolf

2014-10-01

Many experts claim that the 28nm technology node will be the most cost effective technology node forever. This results from primarily from the cost of manufacturing due to the fact that 28nm is the last true Single Patterning (SP) node. It is also affected by the dramatic increase of design costs and the limited shrink factor of the next following nodes. Thus, it is assumed that this technology still will be alive still for many years. To be cost competitive, high yields are mandatory. Meanwhile, leading edge foundries have optimized the yield of the 28nm node to such a level that that it is nearly exclusively defined by random defectivity. However, it was a long way to go to come to that level. In my talk I will concentrate on the contribution of lithography to this yield learning curve. I will choose a critical metal patterning application. I will show what was needed to optimize the process window to a level beyond the usual OPC model work that was common on previous nodes. Reducing the process (in particular focus) variability is a complementary need. It will be shown which improvements were needed in tooling, process control and design-mask-wafer interaction to remove all systematic yield detractors. Over the last couple of years new scanner platforms were introduced that were targeted for both better productivity and better parametric performance. But this was not a clear run-path. It needed some extra affords of the tool suppliers together with the Fab to bring the tool variability down to the necessary level. Another important topic to reduce variability is the interaction of wafer none-planarity and lithography optimization. Having an accurate knowledge of within die topography is essential for optimum patterning. By completing both the variability reduction work and the process window enhancement work we were able to transfer the original marginal process budget to a robust positive budget and thus ensuring high yield and low costs.

Design strategy for integrating DSA via patterning in sub-7 nm interconnects

NASA Astrophysics Data System (ADS)

Karageorgos, Ioannis; Ryckaert, Julien; Tung, Maryann C.; Wong, H.-S. P.; Gronheid, Roel; Bekaert, Joost; Karageorgos, Evangelos; Croes, Kris; Vandenberghe, Geert; Stucchi, Michele; Dehaene, Wim

2016-03-01

In recent years, major advancements have been made in the directed self-assembly (DSA) of block copolymers (BCPs). As a result, the insertion of DSA for IC fabrication is being actively considered for the sub-7nm nodes. At these nodes the DSA technology could alleviate costs for multiple patterning and limit the number of litho masks that would be required per metal layer. One of the most straightforward approaches for DSA implementation would be for via patterning through templated DSA, where hole patterns are readily accessible through templated confinement of cylindrical phase BCP materials. Our in-house studies show that decomposition of via layers in realistic circuits below the 7nm node would require at least many multi-patterning steps (or colors), using 193nm immersion lithography. Even the use of EUV might require double patterning in these dimensions, since the minimum via distance would be smaller than EUV resolution. The grouping of vias through templated DSA can resolve local conflicts in high density areas. This way, the number of required colors can be significantly reduced. For the implementation of this approach, a DSA-aware mask decomposition is required. In this paper, our design approach for DSA via patterning in sub-7nm nodes is discussed. We propose options to expand the list of DSA-compatible via patterns (DSA letters) and we define matching cost formulas for the optimal DSA-aware layout decomposition. The flowchart of our proposed approach tool is presented.

Model-Based Infrared Metrology for Advanced Technology Nodes and 300 mm Wafer Processing

NASA Astrophysics Data System (ADS)

Rosenthal, Peter A.; Duran, Carlos; Tower, Josh; Mazurenko, Alex; Mantz, Ulrich; Weidner, Peter; Kasic, Alexander

2005-09-01

The use of infrared spectroscopy for production semiconductor process monitoring has evolved recently from primarily unpatterned, i.e. blanket test wafer measurements in a limited historical application space of blanket epitaxial, BPSG, and FSG layers to new applications involving patterned product wafer measurements, and new measurement capabilities. Over the last several years, the semiconductor industry has adopted a new set of materials associated with copper/low-k interconnects, and new structures incorporating exotic materials including silicon germanium, SOI substrates and high aspect ratio trenches. The new device architectures and more chemically sophisticated materials have raised new process control and metrology challenges that are not addressed by current measurement technology. To address the challenges we have developed a new infrared metrology tool designed for emerging semiconductor production processes, in a package compatible with modern production and R&D environments. The tool incorporates recent advances in reflectance instrumentation including highly accurate signal processing, optimized reflectometry optics, and model-based calibration and analysis algorithms. To meet the production requirements of the modern automated fab, the measurement hardware has been integrated with a fully automated 300 mm platform incorporating front opening unified pod (FOUP) interfaces, automated pattern recognition and high throughput ultra clean robotics. The tool employs a suite of automated dispersion-model analysis algorithms capable of extracting a variety of layer properties from measured spectra. The new tool provides excellent measurement precision, tool matching, and a platform for deploying many new production and development applications. In this paper we will explore the use of model based infrared analysis as a tool for characterizing novel bottle capacitor structures employed in high density dynamic random access memory (DRAM) chips. We will explore the capability of the tool for characterizing multiple geometric parameters associated with the manufacturing process that are important to the yield and performance of advanced bottle DRAM devices.

PMJ 2007 panel discussion overview: double exposure and double patterning for 32-nm half-pitch design node

NASA Astrophysics Data System (ADS)

Nagaoka, Yoshinori; Watanabe, Hidehiro

2007-10-01

As part of the technical program in Photomask Japan 2007, we held a panel discussion to discuss challenges and solutions for the double exposure and double patterning lithography technique for 32nm half-pitch design node. 4 panelists, Rik Jonckheere of IMEC, Belgium), Tsann-Binn Chiou of ASML Taiwan Ltd., Taiwan), Judy Huckabay of Cadence Design Systems Inc. (USA) and Yoshimitsu Okuda of Toppan Printing Co., Ltd., Japan) were invited to represent each key technical area. We also took a survey from the PMJ attendees prior to the panel discussion, to vote which key technical area they think the challenge exists for the 32nm half-pitch DE/DP lithography. The result of the survey was also presented during the panel discussion. One would intuitively think that by using a DE/DP technique you're relaxing the design rule by 2x, thus for 32nm node it's essentially the 65nm process- you're just repeating it 2 times. Well, not exactly, as identified by the panelists and the participants in the discussion. We recognized the difficulties in the LSI fabrication process steps, the lithography tool overlay, photomask CD and registration, and the issue of data splitting conflict. These difficulties are big challenge for both LSI and photomask manufactures; however, we have confirmed some solutions are already examined by the theoretical and experimental works of the people in research. Despite these difficulties, we are convinced that the immersion lithography with double exposure and double patterning techniques is one of the most promising candidates of the lithography for 32nm half pitch design node.

Lithography hotspot discovery at 70nm DRAM 300mm fab: process window qualification using design base binning

NASA Astrophysics Data System (ADS)

Chen, Daniel; Chen, Damian; Yen, Ray; Cheng, Mingjen; Lan, Andy; Ghaskadvi, Rajesh

2008-11-01

Identifying hotspots--structures that limit the lithography process window--become increasingly important as the industry relies heavily on RET to print sub-wavelength designs. KLA-Tencor's patented Process Window Qualification (PWQ) methodology has been used for this purpose in various fabs. PWQ methodology has three key advantages (a) PWQ Layout--to obtain the best sensitivity (b) Design Based Binning--for pattern repeater analysis (c) Intelligent sampling--for the best DOI sampling rate. This paper evaluates two different analysis strategies for SEM review sampling successfully deployed at Inotera Memories, Inc. We propose a new approach combining the location repeater and pattern repeaters. Based on a recent case study the new sampling flow reduces the data analysis and sampling time from 6 hours to 1.5 hour maintaining maximum DOI sample rate.

Design technology co-optimization for 14/10nm metal1 double patterning layer

NASA Astrophysics Data System (ADS)

Duan, Yingli; Su, Xiaojing; Chen, Ying; Su, Yajuan; Shao, Feng; Zhang, Recco; Lei, Junjiang; Wei, Yayi

2016-03-01

Design and technology co-optimization (DTCO) can satisfy the needs of the design, generate robust design rule, and avoid unfriendly patterns at the early stage of design to ensure a high level of manufacturability of the product by the technical capability of the present process. The DTCO methodology in this paper includes design rule translation, layout analysis, model validation, hotspots classification and design rule optimization mainly. The correlation of the DTCO and double patterning (DPT) can optimize the related design rule and generate friendlier layout which meets the requirement of the 14/10nm technology node. The experiment demonstrates the methodology of DPT-compliant DTCO which is applied to a metal1 layer from the 14/10nm node. The DTCO workflow proposed in our job is an efficient solution for optimizing the design rules for 14/10 nm tech node Metal1 layer. And the paper also discussed and did the verification about how to tune the design rule of the U-shape and L-shape structures in a DPT-aware metal layer.

The verification of printability about marginal defects and the detectability at the inspection tool in sub 50nm node

NASA Astrophysics Data System (ADS)

Lee, Hyemi; Jeong, Goomin; Seo, Kangjun; Kim, Sangchul; kim, changreol

2008-05-01

Since mask design rule is smaller and smaller, Defects become one of the issues dropping the mask yield. Furthermore controlled defect size become smaller while masks are manufactured. According to ITRS roadmap on 2007, controlled defect size is 46nm in 57nm node and 36nm in 45nm node on a mask. However the machine development is delayed in contrast with the speed of the photolithography development. Generally mask manufacturing process is divided into 3 parts. First part is patterning on a mask and second part is inspecting the pattern and repairing the defect on the mask. At that time, inspection tools of transmitted light type are normally used and are the most trustful as progressive type in the developed inspection tools until now. Final part is shipping the mask after the qualifying the issue points and weak points. Issue points on a mask are qualified by using the AIMS (Aerial image measurement system). But this system is including the inherent error possibility, which is AIMS measures the issue points based on the inspection results. It means defects printed on a wafer are over the specific size detected by inspection tools and the inspection tool detects the almost defects. Even though there are no tools to detect the 46nm and 36nm defects suggested by ITRS roadmap, this assumption is applied to manufacturing the 57nm and 45nm device. So we make the programmed defect mask consisted with various defect type such as spot, clear extension, dark extension and CD variation on L/S(line and space), C/H(contact hole) and Active pattern in 55nm and 45nm node. And the programmed defect mask was inspected by using the inspection tool of transmitted light type and was measured by using AIMS 45-193i. Then the marginal defects were compared between the inspection tool and AIMS. Accordingly we could verify whether defect size is proper or not, which was suggested to be controlled on a mask by ITRS roadmap. Also this result could suggest appropriate inspection tools for next generation device among the inspection tools of transmitted light type, reflected light type and aerial image type.

Via patterning in the 7-nm node using immersion lithography and graphoepitaxy directed self-assembly

NASA Astrophysics Data System (ADS)

Doise, Jan; Bekaert, Joost; Chan, Boon Teik; Hori, Masafumi; Gronheid, Roel

2017-04-01

Insertion of a graphoepitaxy directed self-assembly process as a via patterning technology into integrated circuit fabrication is seriously considered for the 7-nm node and beyond. At these dimensions, a graphoepitaxy process using a cylindrical block copolymer that enables hole multiplication can alleviate costs by extending 193-nm immersion-based lithography and significantly reducing the number of masks that would be required per layer. To be considered for implementation, it needs to be proved that this approach can achieve the required pattern quality in terms of defects and variability using a representative, aperiodic design. The patterning of a via layer from an actual 7-nm node logic layout is demonstrated using immersion lithography and graphoepitaxy directed self-assembly in a fab-like environment. The performance of the process is characterized in detail on a full 300-mm wafer scale. The local variability in an edge placement error of the obtained patterns (4.0 nm 3σ for singlets) is in line with the recent results in the field and significantly less than of the prepattern (4.9 nm 3σ for singlets). In addition, it is expected that pattern quality can be further improved through an improved mask design and optical proximity correction. No major complications for insertion of the graphoepitaxy directed self-assembly into device manufacturing were observed.

State-of-the-art EUV materials and processes for the 7nm node and beyond

NASA Astrophysics Data System (ADS)

Buitrago, Elizabeth; Meeuwissen, Marieke; Yildirim, Oktay; Custers, Rolf; Hoefnagels, Rik; Rispens, Gijsbert; Vockenhuber, Michaela; Mochi, Iacopo; Fallica, Roberto; Tasdemir, Zuhal; Ekinci, Yasin

2017-03-01

Extreme ultraviolet lithography (EUVL, λ = 13.5 nm) being the most likely candidate to manufacture electronic devices for future technology nodes is to be introduced in high volume manufacturing (HVM) at the 7 nm logic node, at least at critical lithography levels. With this impending introduction, it is clear that excellent resist performance at ultra-high printing resolutions (below 20 nm line/space L/S) is ever more pressing. Nonetheless, EUVL has faced many technical challenges towards this paradigm shift to a new lithography wavelength platform. Since the inception of chemically amplified resists (CARs) they have been the base upon which state-of-the art photoresist technology has been developed from. Resist performance as measured in terms of printing resolution (R), line edge roughness (LER), sensitivity (D or exposure dose) and exposure latitude (EL) needs to be improved but there are well known trade-off relationships (LRS trade-off) among these parameters for CARs that hamper their simultaneous enhancement. Here, we present some of the most promising EUVL materials tested by EUV interference lithography (EUV-IL) with the aim of resolving features down to 11 nm half-pitch (HP), while focusing on resist performance at 16 and 13 nm HP as needed for the 7 and 5 nm node, respectively. EUV-IL has enabled the characterization and development of new resist materials before commercial EUV exposure tools become available and is therefore a powerful research and development tool. With EUV-IL, highresolution periodic images can be printed by the interference of two or more spatially coherent beams through a transmission-diffraction grating mask. For this reason, our experiments have been performed by EUV-IL at Swiss Light Source (SLS) synchrotron facility located at the Paul Scherrer Institute (PSI). Having the opportunity to test hundreds of EUVL materials from vendors and research partners from all over the world, PSI is able to give a global update on some of the most promising materials tested.

A dual-modal magnetic nanoparticle probe for preoperative and intraoperative mapping of sentinel lymph nodes by magnetic resonance and near infrared fluorescence imaging

PubMed Central

Zhou, Zhengyang; Chen, Hongwei; Lipowska, Malgorzata; Wang, Liya; Yu, Qiqi; Yang, Xiaofeng; Tiwari, Diana; Yang, Lily; Mao, Hui

2016-01-01

The ability to reliably detect sentinel lymph nodes for sentinel lymph node biopsy and lymphadenectomy is important in clinical management of patients with metastatic cancers. However, the traditional sentinel lymph node mapping with visible dyes is limited by the penetration depth of light and fast clearance of the dyes. On the other hand, sentinel lymph node mapping with radionucleotide technique has intrinsically low spatial resolution and does not provide anatomic details in the sentinel lymph node mapping procedure. This work reports the development of a dual modality imaging probe with magnetic resonance and near infrared imaging capabilities for sentinel lymph node mapping using magnetic iron oxide nanoparticles (10 nm core size) conjugated with a near infrared molecule with emission at 830 nm. Accumulation of magnetic iron oxide nanoparticles in sentinel lymph nodes leads to strong T2 weighted magnetic resonance imaging contrast that can be potentially used for preoperative localization of sentinel lymph nodes, while conjugated near infrared molecules provide optical imaging tracking of lymph nodes with a high signal to background ratio. The new magnetic nanoparticle based dual imaging probe exhibits a significant longer lymph node retention time. Near infrared signals from nanoparticle conjugated near infrared dyes last up to 60 min in sentinel lymph node compared to that of 25 min for the free near infrared dyes in a mouse model. Furthermore, axillary lymph nodes, in addition to sentinel lymph nodes, can be also visualized with this probe, given its slow clearance and sufficient sensitivity. Therefore, this new dual modality imaging probe with the tissue penetration and sensitive detection of sentinel lymph nodes can be applied for preoperative survey of lymph nodes with magnetic resonance imaging and allows intraoperative sentinel lymph node mapping using near infrared optical devices. PMID:23812946

Perpendicular STT_RAM cell in 8 nm technology node using Co1/Ni3(1 1 1)||Gr2||Co1/Ni3(1 1 1) structure as magnetic tunnel junction

NASA Astrophysics Data System (ADS)

Varghani, Ali; Peiravi, Ali; Moradi, Farshad

2018-04-01

The perpendicular anisotropy Spin-Transfer Torque Random Access Memory (P-STT-RAM) is considered to be a promising candidate for high-density memories. Many distinct advantages of Perpendicular Magnetic Tunnel Junction (P-MTJ) compared to the conventional in-plane MTJ (I-MTJ) such as lower switching current, circular cell shape that facilitates manufacturability in smaller technology nodes, large thermal stability, smaller cell size, and lower dipole field interaction between adjacent cells make it a promising candidate as a universal memory. However, for small MTJ cell sizes, the perpendicular technology requires new materials with high polarization and low damping factor as well as low resistance area product of a P-MTJ in order to avoid a high write voltage as technology is scaled down. A new graphene-based STT-RAM cell for 8 nm technology node that uses high perpendicular magnetic anisotropy cobalt/nickel (Co/Ni) multilayer as magnetic layers is proposed in this paper. The proposed junction benefits from enough Tunneling Magnetoresistance Ratio (TMR), low resistance area product, low write voltage, and low power consumption that make it suitable for 8 nm technology node.

Extreme ultraviolet patterned mask inspection performance of advanced projection electron microscope system for 11nm half-pitch generation

NASA Astrophysics Data System (ADS)

Hirano, Ryoichi; Iida, Susumu; Amano, Tsuyoshi; Watanabe, Hidehiro; Hatakeyama, Masahiro; Murakami, Takeshi; Suematsu, Kenichi; Terao, Kenji

2016-03-01

Novel projection electron microscope optics have been developed and integrated into a new inspection system named EBEYE-V30 ("Model EBEYE" is an EBARA's model code) , and the resulting system shows promise for application to half-pitch (hp) 16-nm node extreme ultraviolet lithography (EUVL) patterned mask inspection. To improve the system's inspection throughput for 11-nm hp generation defect detection, a new electron-sensitive area image sensor with a high-speed data processing unit, a bright and stable electron source, and an image capture area deflector that operates simultaneously with the mask scanning motion have been developed. A learning system has been used for the mask inspection tool to meet the requirements of hp 11-nm node EUV patterned mask inspection. Defects are identified by the projection electron microscope system using the "defectivity" from the characteristics of the acquired image. The learning system has been developed to reduce the labor and costs associated with adjustment of the detection capability to cope with newly-defined mask defects. We describe the integration of the developed elements into the inspection tool and the verification of the designed specification. We have also verified the effectiveness of the learning system, which shows enhanced detection capability for the hp 11-nm node.

Advanced Technology for Ultra-Low Power System-on-Chip (SoC)

DTIC Science & Technology

2017-06-01

design at IDS=1mA/μm compared with that in experimental 14nm-node FinFET. The redistributed electric field along the channel length direction can... design can result in more uniform electron density and electron velocity distributions compared to a homojunction device. This uniform electron... design at IDS=1mA/μm compared with that in experimental 14nm-node FinFET. 14 Approved for public release, distribution is unlimited. 0 5 10 15 20

Integrated scatterometry for tight overlay and CD control to enable 20-nm node wafer manufacturing.

NASA Astrophysics Data System (ADS)

Benschop, Jos; Engelen, Andre; Cramer, Hugo; Kubis, Michael; Hinnen, Paul; van der Laan, Hans; Bhattacharyya, Kaustuve; Mulkens, Jan

2013-04-01

The overlay, CDU and focus requirements for the 20nm node can only be met using a holistic lithography approach whereby full use is made of high-order, field-by-field, scanner correction capabilities. An essential element in this approach is a fast, precise and accurate in-line metrology sensor, capable to measure on product. The capabilities of the metrology sensor as well as the impact on overlay, CD and focus will be shared in this paper.

Building more powerful less expensive supercomputers using Processing-In-Memory (PIM) LDRD final report.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Murphy, Richard C.

2009-09-01

This report details the accomplishments of the 'Building More Powerful Less Expensive Supercomputers Using Processing-In-Memory (PIM)' LDRD ('PIM LDRD', number 105809) for FY07-FY09. Latency dominates all levels of supercomputer design. Within a node, increasing memory latency, relative to processor cycle time, limits CPU performance. Between nodes, the same increase in relative latency impacts scalability. Processing-In-Memory (PIM) is an architecture that directly addresses this problem using enhanced chip fabrication technology and machine organization. PIMs combine high-speed logic and dense, low-latency, high-bandwidth DRAM, and lightweight threads that tolerate latency by performing useful work during memory transactions. This work examines the potential ofmore » PIM-based architectures to support mission critical Sandia applications and an emerging class of more data intensive informatics applications. This work has resulted in a stronger architecture/implementation collaboration between 1400 and 1700. Additionally, key technology components have impacted vendor roadmaps, and we are in the process of pursuing these new collaborations. This work has the potential to impact future supercomputer design and construction, reducing power and increasing performance. This final report is organized as follow: this summary chapter discusses the impact of the project (Section 1), provides an enumeration of publications and other public discussion of the work (Section 1), and concludes with a discussion of future work and impact from the project (Section 1). The appendix contains reprints of the refereed publications resulting from this work.« less

DOE Office of Scientific and Technical Information (OSTI.GOV)

Trippe, J. M.; Reed, R. A.; Austin, R. A.

In this study, we present experimental evidence of single electron-induced upsets in commercial 28 nm and 45 nm CMOS SRAMs from a monoenergetic electron beam. Upsets were observed in both technology nodes when the SRAM was operated in a low power state. The experimental cross section depends strongly on both bias and technology node feature size, consistent with previous work in which SRAMs were irradiated with low energy muons and protons. Accompanying simulations demonstrate that δ-rays produced by the primary electrons are responsible for the observed upsets. Additional simulations predict the on-orbit event rates for various Earth and Jovian environmentsmore » for a set of sensitive volumes representative of current technology nodes. The electron contribution to the total upset rate for Earth environments is significant for critical charges as high as 0.2 fC. This value is comparable to that of sub-22 nm bulk SRAMs. Similarly, for the Jovian environment, the electron-induced upset rate is larger than the proton-induced upset rate for critical charges as high as 0.3 fC.« less

Ultimate patterning limits for EUV at 5nm node and beyond

NASA Astrophysics Data System (ADS)

Ali, Rehab Kotb; Hamed Fatehy, Ahmed; Lafferty, Neal; Word, James

2018-03-01

The 5nm technology node introduces more aggressive geometries than previous nodes. In this paper, we are introducing a comprehensive study to examine the pattering limits of EUV at 0.33NA. The study is divided into two main approaches: (A) Exploring pattering limits of Single Exposure EUV Cut/Block mask in Self-Aligned-Multi-Patterning (SAMP) process, and (B) Exploring the pattering limits of a Single Exposure EUV printing of metal Layers. The printability of the resulted OPC masks is checked through a model based manufacturing flow for the two pattering approaches. The final manufactured patterns are quantified by Edge Placement Error (EPE), Process Variation Band (PVBand), soft/hard bridging and pinching, Image Log Slope (ILS) and Common Depth of Focus (CDOF)

Size-dependent lymphatic uptake of nanoscale-tailored particles as tumor mass increases.

PubMed

Kjellman, Pontus; Fredriksson, Sarah; Kjellman, Christian; Strand, Sven-Erik; Zandt, René In 't

2015-11-01

To investigate the size-dependent lymphatic uptake of nanoparticles in mice with rapidly growing syngeneic tumors. Mice were inoculated subcutaneously with EL4 lymphoma cells and on day 5 or day 6 of tumor growth, injected peritumorally with either 29 nm or 58 nm of ultra-small superparamagnetic iron oxide nanoparticles. Twenty-four hours later the animals were imaged using MRI. The larger of the two particles can only be detected in the lymph node when injected in animals with 6-day-old tumors while the 29 nm ultra-small superparamagnetic iron oxide nanoparticle is observed on both time points. Tumor mass greatly impacts the size of particles that are transported to the lymph nodes.

Low-energy electron beam proximity projection lithography (LEEPL): the world's first e-beam production tool, LEEPL 3000

NASA Astrophysics Data System (ADS)

Behringer, Uwe F. W.

2004-06-01

In June 2000 ago the company Accretech and LEEPL corporation decided to develop an E-beam lithography tool for high throughput wafer exposure, called LEEPL. In an amazing short time the alpha tool was built. In 2002 the beta tool was installed at Accretech. Today the first production tool the LEEPL 3000 is ready to be shipped. The 2keV E-beam tool will be used in the first lithography strategy to expose (in mix and match mode with optical exposure tools) critical levels like gate structures, contact holes (CH), and via pattern of the 90 nm and 65 nm node. At the SEMATECH EPL workshop on September 22nd in Cambridge, England it was mentioned that the amount of these levels will increase very rapidly (8 in 2007; 13 in 2010 and 17 in 2013). The schedule of the production tool for 45 nm node is mid 2005 and for the 32 nm node 2008. The Figure 1 shows from left to right α-tool, the β-tool and the production tool LEEPL 3000. Figure 1 also shows the timetable of the 4 LEEPL forum all held in Japan.

Progress and process improvements for multiple electron-beam direct write

NASA Astrophysics Data System (ADS)

Servin, Isabelle; Pourteau, Marie-Line; Pradelles, Jonathan; Essomba, Philippe; Lattard, Ludovic; Brandt, Pieter; Wieland, Marco

2017-06-01

Massively parallel electron beam direct write (MP-EBDW) lithography is a cost-effective patterning solution, complementary to optical lithography, for a variety of applications ranging from 200 to 14 nm. This paper will present last process/integration results to achieve targets for both 28 and 45 nm nodes. For 28 nm node, we mainly focus on line-width roughness (LWR) mitigation by playing with stack, new resist platform and bias design strategy. The lines roughness was reduced by using thicker spin-on-carbon (SOC) hardmask (-14%) or non-chemically amplified (non-CAR) resist with bias writing strategy implementation (-20%). Etch transfer into trilayer has been demonstrated by preserving pattern fidelity and profiles for both CAR and non-CAR resists. For 45 nm node, we demonstrate the electron-beam process integration within optical CMOS flows. Resists based on KrF platform show a full compatibility with multiple stacks to fit with conventional optical flow used for critical layers. Electron-beam resist performances have been optimized to fit the specifications in terms of resolution, energy latitude, LWR and stack compatibility. The patterning process overview showing the latest achievements is mature enough to enable starting the multi-beam technology pre-production mode.

Integration of e-beam direct write in BEOL processes of 28nm SRAM technology node using mix and match

NASA Astrophysics Data System (ADS)

Gutsch, Manuela; Choi, Kang-Hoon; Hanisch, Norbert; Hohle, Christoph; Seidel, Robert; Steidel, Katja; Thrun, Xaver; Werner, Thomas

2014-10-01

Many efforts were spent in the development of EUV technologies, but from a customer point of view EUV is still behind expectations. In parallel since years maskless lithography is included in the ITRS roadmap wherein multi electron beam direct patterning is considered as an alternative or complementary approach for patterning of advanced technology nodes. The process of multi beam exposures can be emulated by single beam technologies available in the field. While variable shape-beam direct writers are already used for niche applications, the integration capability of e-beam direct write at advanced nodes has not been proven, yet. In this study the e-beam lithography was implemented in the BEoL processes of the 28nm SRAM technology. Integrated 300mm wafers with a 28nm back-end of line (BEoL) stack from GLOBALFOUNDRIES, Dresden, were used for the experiments. For the patterning of the Metal layer a Mix and Match concept based on the sequence litho - etch - litho - etch (LELE) was developed and evaluated wherein several exposure fields were blanked out during the optical exposure. E-beam patterning results of BEoL Metal and Via layers are presented using a 50kV VISTEC SB3050DW variable shaped electron beam direct writer at Fraunhofer IPMS-CNT. Etch results are shown and compared to the POR. In summary we demonstrate the integration capability of EBDW into a productive CMOS process flow at the example of the 28nm SRAM technology node.

Layout optimization of DRAM cells using rigorous simulation model for NTD

NASA Astrophysics Data System (ADS)

Jeon, Jinhyuck; Kim, Shinyoung; Park, Chanha; Yang, Hyunjo; Yim, Donggyu; Kuechler, Bernd; Zimmermann, Rainer; Muelders, Thomas; Klostermann, Ulrich; Schmoeller, Thomas; Do, Mun-hoe; Choi, Jung-Hoe

2014-03-01

DRAM chip space is mainly determined by the size of the memory cell array patterns which consist of periodic memory cell features and edges of the periodic array. Resolution Enhancement Techniques (RET) are used to optimize the periodic pattern process performance. Computational Lithography such as source mask optimization (SMO) to find the optimal off axis illumination and optical proximity correction (OPC) combined with model based SRAF placement are applied to print patterns on target. For 20nm Memory Cell optimization we see challenges that demand additional tool competence for layout optimization. The first challenge is a memory core pattern of brick-wall type with a k1 of 0.28, so it allows only two spectral beams to interfere. We will show how to analytically derive the only valid geometrically limited source. Another consequence of two-beam interference limitation is a "super stable" core pattern, with the advantage of high depth of focus (DoF) but also low sensitivity to proximity corrections or changes of contact aspect ratio. This makes an array edge correction very difficult. The edge can be the most critical pattern since it forms the transition from the very stable regime of periodic patterns to non-periodic periphery, so it combines the most critical pitch and highest susceptibility to defocus. Above challenge makes the layout correction to a complex optimization task demanding a layout optimization that finds a solution with optimal process stability taking into account DoF, exposure dose latitude (EL), mask error enhancement factor (MEEF) and mask manufacturability constraints. This can only be achieved by simultaneously considering all criteria while placing and sizing SRAFs and main mask features. The second challenge is the use of a negative tone development (NTD) type resist, which has a strong resist effect and is difficult to characterize experimentally due to negative resist profile taper angles that perturb CD at bottom characterization by scanning electron microscope (SEM) measurements. High resist impact and difficult model data acquisition demand for a simulation model that hat is capable of extrapolating reliably beyond its calibration dataset. We use rigorous simulation models to provide that predictive performance. We have discussed the need of a rigorous mask optimization process for DRAM contact cell layout yielding mask layouts that are optimal in process performance, mask manufacturability and accuracy. In this paper, we have shown the step by step process from analytical illumination source derivation, a NTD and application tailored model calibration to layout optimization such as OPC and SRAF placement. Finally the work has been verified with simulation and experimental results on wafer.

A hybrid optic-fiber sensor network with the function of self-diagnosis and self-healing

NASA Astrophysics Data System (ADS)

Xu, Shibo; Liu, Tiegen; Ge, Chunfeng; Chen, Cheng; Zhang, Hongxia

2014-11-01

We develop a hybrid wavelength division multiplexing optical fiber network with distributed fiber-optic sensors and quasi-distributed FBG sensor arrays which detect vibrations, temperatures and strains at the same time. The network has the ability to locate the failure sites automatically designated as self-diagnosis and make protective switching to reestablish sensing service designated as self-healing by cooperative work of software and hardware. The processes above are accomplished by master-slave processors with the help of optical and wireless telemetry signals. All the sensing and optical telemetry signals transmit in the same fiber either working fiber or backup fiber. We take wavelength 1450nm as downstream signal and wavelength 1350nm as upstream signal to control the network in normal circumstances, both signals are sent by a light emitting node of the corresponding processor. There is also a continuous laser wavelength 1310nm sent by each node and received by next node on both working and backup fibers to monitor their healthy states, but it does not carry any message like telemetry signals do. When fibers of two sensor units are completely damaged, the master processor will lose the communication with the node between the damaged ones.However we install RF module in each node to solve the possible problem. Finally, the whole network state is transmitted to host computer by master processor. Operator could know and control the network by human-machine interface if needed.

LENS (lithography enhancement toward nano scale): a European project to support double exposure and double patterning technology development

NASA Astrophysics Data System (ADS)

Cantu, Pietro; Baldi, Livio; Piacentini, Paolo; Sytsma, Joost; Le Gratiet, Bertrand; Gaugiran, Stéphanie; Wong, Patrick; Miyashita, Hiroyuki; Atzei, Luisa R.; Buch, Xavier; Verkleij, Dick; Toublan, Olivier; Perez-Murano, Francesco; Mecerreyes, David

2010-04-01

In 2009 a new European initiative on Double Patterning and Double Exposure lithography process development was started in the framework of the ENIAC Joint Undertaking. The project, named LENS (Lithography Enhancement Towards Nano Scale), involves twelve companies from five different European Countries (Italy, Netherlands, France, Belgium Spain; includes: IC makers (Numonyx and STMicroelectronics), a group of equipment and materials companies (ASML, Lam Research srl, JSR, FEI), a mask maker (Dai Nippon Photomask Europe), an EDA company (Mentor Graphics) and four research and development institutes (CEA-Leti, IMEC, Centro Nacional de Microelectrónica, CIDETEC). The LENS project aims to develop and integrate the overall infrastructure required to reach patterning resolutions required by 32nm and 22nm technology nodes through the double patterning and pitch doubling technologies on existing conventional immersion exposure tools, with the purpose to allow the timely development of 32nm and 22nm technology nodes for memories and logic devices, providing a safe alternative to EUV, Higher Refraction Index Fluids Immersion Lithography and maskless lithography, which appear to be still far from maturity. The project will cover the whole lithography supply chain including design, masks, materials, exposure tools, process integration, metrology and its final objective is the demonstration of 22nm node patterning on available 1.35 NA immersion tools on high complexity mask set.

Performance and stability of mask process correction for EBM-7000

NASA Astrophysics Data System (ADS)

Saito, Yasuko; Chen, George; Wang, Jen-Shiang; Bai, Shufeng; Howell, Rafael; Li, Jiangwei; Tao, Jun; VanDenBroeke, Doug; Wiley, Jim; Takigawa, Tadahiro; Ohnishi, Takayuki; Kamikubo, Takashi; Hara, Shigehiro; Anze, Hirohito; Hattori, Yoshiaki; Tamamushi, Shuichi

2010-05-01

In order to support complex optical masks today and EUV masks in the near future, it is critical to correct mask patterning errors with a magnitude of up to 20nm over a range of 2000nm at mask scale caused by short range mask process proximity effects. A new mask process correction technology, MPC+, has been developed to achieve the target requirements for the next generation node. In this paper, the accuracy and throughput performance of MPC+ technology is evaluated using the most advanced mask writing tool, the EBM-70001), and high quality mask metrology . The accuracy of MPC+ is achieved by using a new comprehensive mask model. The results of through-pitch and through-linewidth linearity curves and error statistics for multiple pattern layouts (including both 1D and 2D patterns) are demonstrated and show post-correction accuracy of 2.34nm 3σ for through-pitch/through-linewidth linearity. Implementing faster mask model simulation and more efficient correction recipes; full mask area (100cm2) processing run time is less than 7 hours for 32nm half-pitch technology node. From these results, it can be concluded that MPC+ with its higher precision and speed is a practical technology for the 32nm node and future technology generations, including EUV, when used with advance mask writing processes like the EBM-7000.

Light sensitivity of a one transistor-one capacitor memory cell when used as a micromirror actuator in projector applications

NASA Astrophysics Data System (ADS)

Huffman, James Douglas

2001-11-01

The most important issue facing the future business success of the Digital Micromirror Device or DMD™ produced by Texas Instruments is the cost of the actual device. As the business and consumer markets call for higher resolution displays, the array size will have to be increased to incorporate more pixels. The manufacturing costs associated with building these higher resolution displays follow an exponential relation with the number of pixels due to yield loss and reduced number of chips per silicon wafer. Each pixel is actuated by electrostatics that are provided by a memory cell that is built in the underlying silicon substrate. One way to decrease cost of the wafer is to change the memory cell architecture from a static random access configuration or SRAM to a dynamic random access configuration or DRAM. This change has the benefits of having fewer components per area and a lower metal density. This reduction in the component count and metal density has a dramatic effect on the yield of the memory array by reducing the particle sensitivity of the underlying cell. The main drawback to using a DRAM configuration in a display application is the light sensitivity of a charge storage device built in the silicon substrate. As the photons pass through the mechanical micromirrors and illuminate the DRAM cell, the effective electrostatic potential of the memory element used for the mirror actuation is reduced. This dissertation outlines the issues associated with the light sensitivity of a DRAM memory cell as the actuation element for a micromirror. The concept of charge depletion on a silicon capacitor due to recombination of photogenerated carriers is explored and experimentally verified. The effects of the reduced potential on the capacitor on the micromirror are also explored. Optical modeling is used to determine the incoming photon flux to determine the benefits of adding a charge recombination region as part of the DRAM memory cell. Several options are explored to reduce the effect of the incoming photons on the potential of the memory cell. The results will show that a 1T1C memory cell with N-type recombination regions and maximum light shielding is sufficient for a projector application.

X-ray mask fabrication advancements at the Microlithographic Mask Development Center

NASA Astrophysics Data System (ADS)

Kimmel, Kurt R.; Hughes, Patrick J.

1996-05-01

The Microlithographic Mask Development Center (MMD) was established as the X-ray mask manufacturing facility at the IBM Microelectronics Division semiconductor fabricator in Essex Junction, Vermont. This center, in operation for over two years, produces high yielding, defect-free X-ray masks for competitive logic and memory products at 250nm groundrules and below. The MMD is a complete mask facility that manufactures silicon membrane mask blanks in the NIST format and finished masks with electroplated gold X-ray absorber. Mask patterning, with dimensions as small as 180 nm, is accomplished using IBM-built variable shaped spot e-beam systems. Masks are routinely inspected and repaired using state-of-the-art equipment: two KLA SEM Specs for defect inspection, a Leica LMS 2000 for image placement characterization, an Amray 2040c for image dimension characterization and a Micrion 8000 XMR for defect repair. This facility maintains a baseline mask process with daily production of 250nm, 32Mb SRAM line monitor masks for the continuous improvement of mask quality and processes. Development masks are produced for several semiconductor manufacturers including IBM, Motorola, Loral, and Sanders. Masks for 64Mb and 256Mb DRAM (IBM) and advanced logic/SRAM (IBM and Motorola) designs have also been delivered. This paper describes the MMD facility and its technical capabilities. Key manufacturing metrics such as mask turnaround time, parametric yield learning and defect reduction activities are highlighted. The challenges associated with improved mask quality, sub-180nm mask fabrication, and the transition to refractory metal absorber are discussed.

Characterization and metrology implications of the 1997 NTRS

NASA Astrophysics Data System (ADS)

Class, W.; Wortman, J. J.

1998-11-01

In the Front-end (transistor forming) area of silicon CMOS device processing, several NTRS difficult challenges have been identified including; scaled and alternate gate dielectric materials, new DRAM dielectric materials, alternate gate materials, elevated contact structures, engineered channels, and large-area cost-effective silicon substrates. This paper deals with some of the characterization and metrology challenges facing the industry if it is to meet the projected needs identified in the NTRS. In the areas of gate and DRAM dielectric, scaling requires that existing material layers be thinned to maximize capacitance. For the current gate dielectric, SiO2 and its nitrided derivatives, direct tunneling will limit scaling to approximately 1.5nm for logic applications before power losses become unacceptable. Low power logic and memory applications may limit scaling to the 2.0-2.2nm range. Beyond these limits, dielectric materials having higher dielectric constant, will permit continued capacitance increases while allowing for the use of thicker dielectric layers, where tunneling may be minimized. In the near term silicon nitride is a promising SiO2 substitute material while in the longer term "high-k" materials such as tantalum pentoxide and barium strontium titanate (BST) will be required. For these latter materials, it is likely that a multilayer dielectric stack will be needed, consisting of an ultra-thin (1-2 atom layer) interfacial SiO2 layer and a high-k overlayer. Silicon wafer surface preparation control, as well as the control of composition, crystal structure, and thickness for such stacks pose significant characterization and metrology challenges. In addition to the need for new gate dielectric materials, new gate materials will be required to overcome the limitations of the current doped polysilicon gate materials. Such a change has broad ramifications on device electrical performance and manufacturing process robustness which again implies a broad range of new characterization and metrology requirements. Finally, the doped structure of the MOS transistor must scale to very small lateral and depth dimensions, and thermal budgets must be reduced to permit the retention of very abrupt highly doped drain and channel engineered structures. Eventually, the NTRS forecasts the need for an elevated contact structure. Here, there are significant challenges associated with three-dimensional dopant profiling, measurement of dopant activity in ultra-shallow device regions, as well as point defect metrology and characterization.

Sentinel lymph nodes detection with an imaging system using Patent Blue V dye as fluorescent tracer

NASA Astrophysics Data System (ADS)

Tellier, F.; Steibel, J.; Chabrier, R.; Rodier, J. F.; Pourroy, G.; Poulet, P.

2013-03-01

Sentinel lymph node biopsy is the gold standard to detect metastatic invasion from primary breast cancer. This method can help patients avoid full axillary chain dissection, thereby decreasing the risk of morbidity. We propose an alternative to the traditional isotopic method, to detect and map the sentinel lymph nodes. Indeed, Patent Blue V is the most widely used dye in clinical routine for the visual detection of sentinel lymph nodes. A Recent study has shown the possibility of increasing the fluorescence quantum yield of Patent Blue V, when it is bound to human serum albumin. In this study we present a preclinical fluorescence imaging system to detect sentinel lymph nodes labeled with this fluorescent tracer. The setup is composed of a black and white CCD camera and two laser sources. One excitation source with a laser emitting at 635 nm and a second laser at 785 nm to illuminate the region of interest. The prototype is operated via a laptop. Preliminary experiments permitted to determine the device sensitivity in the μmol.L-1 range as regards the detection of PBV fluorescence signals. We also present a preclinical evaluation performed on Lewis rats, during which the fluorescence imaging setup detected the accumulation and fixation of the fluorescent dye on different nodes through the skin.

DUV phase mask for 100 nm period grating printing

NASA Astrophysics Data System (ADS)

Jourlin, Y.; Bourgin, Y.; Reynaud, S.; Parriaux, O.; Talneau, A.; Karvinen, P.; Passilly, N.; Zain, A. Md.; De La Rue, R. M.

2008-04-01

Whereas microelectronic lithography is heading to the 32 nm node and discussing immersion and double-patterning strategies, there is much which can be done with the 45 nm node in microoptics for white light processing. For instance, one of the most demanding applications in terms of achievable period is the LCD lossless polarizer, which can transmit the TM polarization and reflect the TE polarization evenly all through the visible spectrum - provided that a 1D metal grid of 100 nm period can be fabricated. The manufacture of such polarizing panels cannot resort to the step & repeat cameras of microelectronics since the substrates are too large, too thin, too wavy and full of contaminants. There is therefore a need for specific fabrication techniques. It is one of these techniques that a subgroup of partners belonging to two of the Networks of Excellence of the European Community, NEMO and ePIXnet, have decided to explore together.

A random approach of test macro generation for early detection of hotspots

NASA Astrophysics Data System (ADS)

Lee, Jong-hyun; Kim, Chin; Kang, Minsoo; Hwang, Sungwook; Yang, Jae-seok; Harb, Mohammed; Al-Imam, Mohamed; Madkour, Kareem; ElManhawy, Wael; Kwan, Joe

2016-03-01

Multiple-Patterning Technology (MPT) is still the preferred choice over EUV for the advanced technology nodes, starting the 20nm node. Down the way to 7nm and 5nm nodes, Self-Aligned Multiple Patterning (SAMP) appears to be one of the effective multiple patterning techniques in terms of achieving small pitch of printed lines on wafer, yet its yield is in question. Predicting and enhancing the yield in the early stages of technology development are some of the main objectives for creating test macros on test masks. While conventional yield ramp techniques for a new technology node have relied on using designs from previous technology nodes as a starting point to identify patterns for Design of Experiment (DoE) creation, these techniques are challenging to apply in the case of introducing an MPT technique like SAMP that did not exist in previous nodes. This paper presents a new strategy for generating test structures based on random placement of unit patterns that can construct more meaningful bigger patterns. Specifications governing the relationships between those unit patterns can be adjusted to generate layout clips that look like realistic SAMP designs. A via chain can be constructed to connect the random DoE of SAMP structures through a routing layer to external pads for electrical measurement. These clips are decomposed according to the decomposition rules of the technology into the appropriate mandrel and cut masks. The decomposed clips can be tested through simulations, or electrically on silicon to discover hotspots. The hotspots can be used in optimizing the fabrication process and models to fix them. They can also be used as learning patterns for DFM deck development. By expanding the size of the randomly generated test structures, more hotspots can be detected. This should provide a faster way to enhance the yield of a new technology node.

An investigation into scalability and compliance for triple patterning with stitches for metal 1 at the 14nm node

NASA Astrophysics Data System (ADS)

Cork, Christopher; Miloslavsky, Alexander; Friedberg, Paul; Luk-Pat, Gerry

2013-04-01

Lithographers had hoped that single patterning would be enabled at the 20nm node by way of EUV lithography. However, due to delays in EUV readiness, double patterning with 193i lithography is currently relied upon for volume production for the 20nm node's metal 1 layer. At the 14nm and likely at the 10nm node, LE-LE-LE triple patterning technology (TPT) is one of the favored options [1,2] for patterning local interconnect and Metal 1 layers. While previous research has focused on TPT for contact mask, metal layers offer new challenges and opportunities, in particular the ability to decompose design polygons across more than one mask. The extra flexibility offered by the third mask and ability to leverage polygon stitching both serve to improve compliance. However, ensuring TPT compliance - the task of finding a 3-color mask decomposition for a design - is still a difficult task. Moreover, scalability concerns multiply the difficulty of triple patterning decomposition which is an NP-complete problem. Indeed previous work shows that network sizes above a few thousand nodes or polygons start to take significantly longer times to compute [3], making full chip decomposition for arbitrary layouts impractical. In practice Metal 1 layouts can be considered as two separate problem domains, namely: decomposition of standard cells and decomposition of IP blocks. Standard cells typically include only a few 10's of polygons and should be amenable to fast decomposition. Successive design iterations should resolve compliance issues and improve packing density. Density improvements are multiplied repeatedly as standard cells are placed multiple times. IP blocks, on the other hand, may involve very large networks. This paper evaluates multiple approaches to triple patterning decomposition for the Metal 1 layer. The benefits of polygon stitching, in particular, the ability to resolve commonly encountered non-compliant layout configurations and improve packing density, are weighed against the increased difficulty in finding an optimized, legal decomposition and coping with the increased scalability challenges.

Aerial image measurement technique for automated reticle defect disposition (ARDD) in wafer fabs

NASA Astrophysics Data System (ADS)

Zibold, Axel M.; Schmid, Rainer M.; Stegemann, B.; Scheruebl, Thomas; Harnisch, Wolfgang; Kobiyama, Yuji

2004-08-01

The Aerial Image Measurement System (AIMS)* for 193 nm lithography emulation has been brought into operation successfully worldwide. A second generation system comprising 193 nm AIMS capability, mini-environment and SMIF, the AIMS fab 193 plus is currently introduced into the market. By adjustment of numerical aperture (NA), illumination type and partial illumination coherence to match the conditions in 193 nm steppers or scanners, it can emulate the exposure tool for any type of reticles like binary, OPC and PSM down to the 65 nm node. The system allows a rapid prediction of wafer printability of defects or defect repairs, and critical features, like dense patterns or contacts on the masks without the need to perform expensive image qualification consisting of test wafer exposures followed by SEM measurements. Therefore, AIMS is a mask quality verification standard for high-end photo masks and established in mask shops worldwide. The progress on the AIMS technology described in this paper will highlight that besides mask shops there will be a very beneficial use of the AIMS in the wafer fab and we propose an Automated Reticle Defect Disposition (ARDD) process. With smaller nodes, where design rules are 65 nm or less, it is expected that smaller defects on reticles will occur in increasing numbers in the wafer fab. These smaller mask defects will matter more and more and become a serious yield limiting factor. With increasing mask prices and increasing number of defects and severability on reticles it will become cost beneficial to perform defect disposition on the reticles in wafer production. Currently ongoing studies demonstrate AIMS benefits for wafer fab applications. An outlook will be given for extension of 193 nm aerial imaging down to the 45 nm node based on emulation of immersion scanners.

Dielectric relaxation of barium strontium titanate and application to thin films for DRAM capacitors

NASA Astrophysics Data System (ADS)

Baniecki, John David

This thesis examines the issues associated with incorporating the high dielectric constant material Barium Strontium Titanate (BSTO) in to the storage capacitor of a dynamic random access memory (DRAM). The research is focused on two areas: characterizing and understanding the factors that control charge retention in BSTO thin films and modifying the electrical properties using ion implantation. The dielectric relaxation of BSTO thin films deposited by metal-organic chemical vapor deposition (MOCVD) is investigated in the time and frequency domains. It is shown that the frequency dispersion of the complex capacitance of BSTO thin films can be understood in terms of a power-law frequency dependence from 1mHz to 20GHz. From the correspondence between the time and frequency domain measurements, it is concluded that the power-law relaxation currents extend back to the nano second regime of DRAM operation. The temperature, field, and annealing dependence of the dielectric relaxation currents are also investigated and mechanisms for the observed power law relaxation are explored. An equivalent circuit model of a high dielectric constant thin film capacitor is developed based on the electrical measurements and implemented in PSPICE. Excellent agreement is found between the experimental and simulated electrical characteristics showing the utility of the equivalent circuit model in simulating the electrical properties of high dielectric constant thin films. Using the equivalent circuit model, it is shown that the greatest charge loss due to dielectric relaxation occurs during the first read after a refresh time following a write to the opposite logic state for a capacitor that has been written to the same logic state for a long time (opposite state write charge loss). A theoretical closed form expression that is a function of three material parameters is developed which estimates the opposite state write charge loss due to dielectric relaxation. Using the closed form expression, and BSTO thin film electrical characteristics, the charge loss due to dielectric relaxation is estimated to be 6--12% of the initial charge stored on the capacitor plates for MOCVD BSTO thin films with Pt electrodes after a post top electrode anneal in oxygen. In contrast, it is shown that the charge loss due to steady state leakage is only 0.0125--0.125% of the initial charge stored on the capacitor plates. Charge retention is shown to depend strongly on the annealing conditions. Annealing MOCVD BSTO thin films with Pt electrodes in forming gas (95% Ar 5% H2) increases charge loss due to dielectric relaxation to as much as 60%. Ion implantation is used to dope BSTO thin films with Mn. X-ray diffraction and transmission electron microscopy (TEM) shows ion implantation significantly damages the film leaving only short-range order, but post-implant annealing heals the damage. Capacitance recovery after post-implant annealing is as high as 94% for 15 nm BSTO films. At low implant doses, the Mn doped films have substantially lower leakage (up to a factor of ten lower) and only slightly higher relaxation currents and dielectric loss indicating that ion implantation may be a potentially viable way of introducing dopants into high dielectric constant thin films for future DRAM applications.

Photomask etch system and process for 10nm technology node and beyond

NASA Astrophysics Data System (ADS)

Chandrachood, Madhavi; Grimbergen, Michael; Yu, Keven; Leung, Toi; Tran, Jeffrey; Chen, Jeff; Bivens, Darin; Yalamanchili, Rao; Wistrom, Richard; Faure, Tom; Bartlau, Peter; Crawford, Shaun; Sakamoto, Yoshifumi

2015-10-01

While the industry is making progress to offer EUV lithography schemes to attain ultimate critical dimensions down to 20 nm half pitch, an interim optical lithography solution to address an immediate need for resolution is offered by various integration schemes using advanced PSM (Phase Shift Mask) materials including thin e-beam resist and hard mask. Using the 193nm wavelength to produce 10nm or 7nm patterns requires a range of optimization techniques, including immersion and multiple patterning, which place a heavy demand on photomask technologies. Mask schemes with hard mask certainly help attain better selectivity and hence better resolution but pose integration challenges and defectivity issues. This paper presents a new photomask etch solution for attenuated phase shift masks that offers high selectivity (Cr:Resist > 1.5:1), tighter control on the CD uniformity with a 3sigma value approaching 1 nm and controllable CD bias (5-20 nm) with excellent CD linearity performance (<5 nm) down to the finer resolution. The new system has successfully demonstrated capability to meet the 10 nm node photomask CD requirements without the use of more complicated hard mask phase shift blanks. Significant improvement in post wet clean recovery performance was demonstrated by the use of advanced chamber materials. Examples of CD uniformity, linearity, and minimum feature size, and etch bias performance on 10 nm test site and production mask designs will be shown.

Single-electron thermal noise

NASA Astrophysics Data System (ADS)

Nishiguchi, Katsuhiko; Ono, Yukinori; Fujiwara, Akira

2014-07-01

We report the observation of thermal noise in the motion of single electrons in an ultimately small dynamic random access memory (DRAM). The nanometer-scale transistors that compose the DRAM resolve the thermal noise in single-electron motion. A complete set of fundamental tests conducted on this single-electron thermal noise shows that the noise perfectly follows all the aspects predicted by statistical mechanics, which include the occupation probability, the law of equipartition, a detailed balance, and the law of kT/C. In addition, the counting statistics on the directional motion (i.e., the current) of the single-electron thermal noise indicate that the individual electron motion follows the Poisson process, as it does in shot noise.

Single-electron thermal noise.

PubMed

Nishiguchi, Katsuhiko; Ono, Yukinori; Fujiwara, Akira

2014-07-11

We report the observation of thermal noise in the motion of single electrons in an ultimately small dynamic random access memory (DRAM). The nanometer-scale transistors that compose the DRAM resolve the thermal noise in single-electron motion. A complete set of fundamental tests conducted on this single-electron thermal noise shows that the noise perfectly follows all the aspects predicted by statistical mechanics, which include the occupation probability, the law of equipartition, a detailed balance, and the law of kT/C. In addition, the counting statistics on the directional motion (i.e., the current) of the single-electron thermal noise indicate that the individual electron motion follows the Poisson process, as it does in shot noise.

Writing time estimation of EB mask writer EBM-9000 for hp16nm/logic11nm node generation

NASA Astrophysics Data System (ADS)

Kamikubo, Takashi; Takekoshi, Hidekazu; Ogasawara, Munehiro; Yamada, Hirokazu; Hattori, Kiyoshi

2014-10-01

The scaling of semiconductor devices is slowing down because of the difficulty in establishing their functionality at the nano-size level and also because of the limitations in fabrications, mainly the delay of EUV lithography. While multigate devices (FinFET) are currently the main driver for scalability, other types of devices, such as 3D devices, are being realized to relax the scaling of the node. In lithography, double or multiple patterning using ArF immersion scanners is still a realistic solution offered for the hp16nm node fabrication. Other lithography candidates are those called NGL (Next Generation Lithography), such as DSA (Directed-Self-Assembling) or nanoimprint. In such situations, shot count for mask making by electron beam writers will not increase. Except for some layers, it is not increasing as previously predicted. On the other hand, there is another aspect that increases writing time. The exposure dose for mask writing is getting higher to meet tighter specifications of CD uniformity, in other words, reduce LER. To satisfy these requirements, a new electron beam mask writer, EBM-9000, has been developed for hp16nm/logic11nm generation. Electron optical system, which has the immersion lens system, was evolved from EBM-8000 to achieve higher current density of 800A/cm2. In this paper, recent shot count and dose trend are discussed. Also, writing time is estimated for the requirements in EBM-9000.

Post place and route design-technology co-optimization for scaling at single-digit nodes with constant ground rules

NASA Astrophysics Data System (ADS)

Mattii, Luca; Milojevic, Dragomir; Debacker, Peter; Berekovic, Mladen; Sherazi, Syed Muhammad Yasser; Chava, Bharani; Bardon, Marie Garcia; Schuddinck, Pieter; Rodopoulos, Dimitrios; Baert, Rogier; Gerousis, Vassilios; Ryckaert, Julien; Raghavan, Praveen

2018-01-01

Standard-cell design, technology choices, and place and route (P&R) efficiency are deeply interrelated in CMOS technology nodes below 10 nm, where lower number of tracks cells and higher pin densities pose increasingly challenging problems to the router in terms of congestion and pin accessibility. To evaluate and downselect the best solutions, a holistic design-technology co-optimization approach leveraging state-of-the-art P&R tools is thus necessary. We adopt such an approach using the imec N7 technology platform, with contacted poly pitch of 42 nm and tightest metal pitch of 32 nm, by comparing post P&R area of an IP block for different standard cell configurations, technology options, and cell height. Keeping the technology node and the set of ground rules unchanged, we demonstrate that a careful combination of these solutions can enable area gains of up to 50%, comparable with the area benefits of migrating to another node. We further demonstrate that these area benefits can be achieved at isoperformance with >20% reduced power. As at the end of the CMOS roadmap, conventional scaling enacted through pitch reduction is made more and more challenging by constraints imposed by lithography limits, material resistivity, manufacturability, and ultimately wafer cost, the approach shown herein offers a valid, attractive, and low-cost alternative.

Molecular organization of cytokinesis nodes and contractile rings by super-resolution fluorescence microscopy of live fission yeast

PubMed Central

Laplante, Caroline; Huang, Fang; Tebbs, Irene R.; Bewersdorf, Joerg; Pollard, Thomas D.

2016-01-01

Cytokinesis in animals, fungi, and amoebas depends on the constriction of a contractile ring built from a common set of conserved proteins. Many fundamental questions remain about how these proteins organize to generate the necessary tension for cytokinesis. Using quantitative high-speed fluorescence photoactivation localization microscopy (FPALM), we probed this question in live fission yeast cells at unprecedented resolution. We show that nodes, protein assembly precursors to the contractile ring, are discrete structural units with stoichiometric ratios and distinct distributions of constituent proteins. Anillin Mid1p, Fes/CIP4 homology-Bin/amphiphysin/Rvs (F-BAR) Cdc15p, IQ motif containing GTPase-activating protein (IQGAP) Rng2p, and formin Cdc12p form the base of the node that anchors the ends of myosin II tails to the plasma membrane, with myosin II heads extending into the cytoplasm. This general node organization persists in the contractile ring where nodes move bidirectionally during constriction. We observed the dynamics of the actin network during cytokinesis, starting with the extension of short actin strands from nodes, which sometimes connected neighboring nodes. Later in cytokinesis, a broad network of thick bundles coalesced into a tight ring around the equator of the cell. The actin ring was ∼125 nm wide and ∼125 nm thick. These observations establish the organization of the proteins in the functional units of a cytokinetic contractile ring. PMID:27647921

Stimulation of autophagy by the p53 target gene Sestrin2.

PubMed

Maiuri, Maria Chiara; Malik, Shoaib Ahmad; Morselli, Eugenia; Kepp, Oliver; Criollo, Alfredo; Mouchel, Pierre-Luc; Carnuccio, Rosa; Kroemer, Guido

2009-05-15

The oncosuppressor protein p53 regulates autophagy in a dual fashion. The pool of cytoplasmic p53 protein represses autophagy in a transcription-independent fashion, while the pool of nuclear p53 stimulates autophagy through the transactivation of specific genes. Here we report the discovery that Sestrin2, a novel p53 target gene, is involved in the induction of autophagy. Depletion of Sestrin2 by RNA interference reduced the level of autophagy in a panel of p53-sufficient human cancer cell lines responding to distinct autophagy inducers. In quantitative terms, Sestrin2 depletion was as efficient in preventing autophagy induction as was the depletion of Dram, another p53 target gene. Knockout of either Sestrin2 or Dram reduced autophagy elicited by nutrient depletion, rapamycin, lithium or thapsigargin. Moreover, autophagy induction by nutrient depletion or pharmacological stimuli led to an increase in Sestrin2 expression levels in p53-proficient cells. In strict contrast, the depletion of Sestrin2 or Dram failed to affect autophagy in p53-deficient cells and did not modulate the inhibition of baseline autophagy by a cytoplasmic p53 mutant that was reintroduced into p53-deficient cells. We conclude that Sestrin2 acts as a positive regulator of autophagy in p53-proficient cells.

Empirical OPC rule inference for rapid RET application

NASA Astrophysics Data System (ADS)

Kulkarni, Anand P.

2006-10-01

A given technological node (45 nm, 65 nm) can be expected to process thousands of individual designs. Iterative methods applied at the node consume valuable days in determining proper placement of OPC features, and manufacturing and testing mask correspondence to wafer patterns in a trial-and-error fashion for each design. Repeating this fabrication process for each individual design is a time-consuming and expensive process. We present a novel technique which sidesteps the requirement to iterate through the model-based OPC analysis and pattern verification cycle on subsequent designs at the same node. Our approach relies on the inference of rules from a correct pattern at the wafer surface it relates to the OPC and pre-OPC pattern layout files. We begin with an offline phase where we obtain a "gold standard" design file that has been fab-tested at the node with a prepared, post-OPC layout file that corresponds to the intended on-wafer pattern. We then run an offline analysis to infer rules to be used in this method. During the analysis, our method implicitly identifies contextual OPC strategies for optimal placement of RET features on any design at that node. Using these strategies, we can apply OPC to subsequent designs at the same node with accuracy comparable to the original design file but significantly smaller expected runtimes. The technique promises to offer a rapid and accurate complement to existing RET application strategies.

Alternating phase-shift mask and binary mask for 45-nm node and beyond: the impact on the mask error control

NASA Astrophysics Data System (ADS)

Kojima, Yosuke; Shirasaki, Masanori; Chiba, Kazuaki; Tanaka, Tsuyoshi; Inazuki, Yukio; Yoshikawa, Hiroki; Okazaki, Satoshi; Iwase, Kazuya; Ishikawa, Kiichi; Ozawa, Ken

2007-05-01

For 45 nm node and beyond, the alternating phase-shift mask (alt. PSM), one of the most expected resolution enhancement technologies (RET) because of its high image contrast and small mask error enhancement factor (MEEF), and the binary mask (BIM) attract attention. Reducing CD and registration errors and defect are their critical issues. As the solution, the new blank for alt. PSM and BIM is developed. The top film of new blank is thin Cr, and the antireflection film and shielding film composed of MoSi are deposited under the Cr film. The mask CD performance is evaluated for through pitch, CD linearity, CD uniformity, global loading, resolution and pattern fidelity, and the blank performance is evaluated for optical density, reflectivity, sheet resistance, flatness and defect level. It is found that the performance of new blank is equal to or better than that of conventional blank in all items. The mask CD performance shows significant improvement. The lithography performance of new blank is confirmed by wafer printing and AIMS measurement. The full dry type alt. PSM has been used as test plate, and the test results show that new blank can almost meet the specifications of pi-0 CD difference, CD uniformity and process margin for 45 nm node. Additionally, the new blank shows the better pattern fidelity than that of conventional blank on wafer. AIMS results are almost same as wafer results except for the narrowest pattern. Considering the result above, this new blank can reduce the mask error factors of alt. PSM and BIM for 45 nm node and beyond.

Assessment of a Low-Power 65 nm CMOS Technology for Analog Front-End Design

NASA Astrophysics Data System (ADS)

Manghisoni, Massimo; Gaioni, Luigi; Ratti, Lodovico; Re, Valerio; Traversi, Gianluca

2014-02-01

This work is concerned with the study of the analog properties of MOSFET devices belonging to a 65 nm CMOS technology with emphasis on intrinsic voltage gain and noise performance. This node appears to be a robust and promising solution to cope with the unprecedented requirements set by silicon vertex trackers in experiments upgrades and future colliders as well as by imaging detectors at light sources and free electron lasers. In this scaled-down technology, the impact of new dielectric materials and processing techniques on the analog behavior of MOSFETs has to be carefully evaluated. An inversion level design methodology has been adopted to analyze data obtained from device measurements and provide a powerful tool to establish design criteria for detector front-ends in this nanoscale CMOS process. A comparison with data coming from less scaled technologies, such as 90 nm and 130 nm nodes, is also provided and can be used to evaluate the resolution limits achievable for low-noise charge sensitive amplifiers in the 100 nm minimum feature size range.

Patterning with metal-oxide EUV photoresist: patterning capability, resist smoothing, trimming, and selective stripping

NASA Astrophysics Data System (ADS)

Mao, Ming; Lazzarino, Frederic; De Schepper, Peter; De Simone, Danilo; Piumi, Daniele; Luong, Vinh; Yamashita, Fumiko; Kocsis, Michael; Kumar, Kaushik

2017-03-01

Inpria metal-oxide photoresist (PR) serves as a thin spin-on patternable hard mask for EUV lithography. Compared to traditional organic photoresists, the ultrathin metal-oxide photoresist ( 12nm after development) effectively mitigates pattern collapse. Because of the high etch resistance of the metal-oxide resist, this may open up significant scope for more aggressive etches, new chemistries, and novel integration schemes. We have previously shown that metal-oxide PR can be successfully used to pattern the block layer for the imec 7-nm technology node[1] and advantageously replace a multiple patterning approach, which significantly reduces the process complexity and effectively decreases the cost. We also demonstrated the formation of 16nm half pitch 1:1 line/space with EUV single print[2], which corresponds to a metal 2 layer for the imec 7-nm technology node. In this paper, we investigate the feasibility of using Inpria's metal-oxide PR for 16nm line/space patterning. In meanwhile, we also explore the different etch process for LWR smoothing, resist trimming and resist stripping.

Simulation study of reticle enhancement technology applications for 157-nm lithography

NASA Astrophysics Data System (ADS)

Schurz, Dan L.; Flack, Warren W.; Karklin, Linard

2002-03-01

The acceleration of the International Technology Roadmap for Semiconductors (ITRS) is placing significant pressure on the industry's infrastructure, particularly the lithography equipment. As recently as 1997, there was no optical solution offered past the 130 nm design node. The current roadmap has the 65 nm node (reduced from 70 nm) pulled in one year to 2007. Both 248 nm and 193 nm wavelength lithography tools will be pushed to their practical resolution limits in the near term. Very high numerical aperture (NA) 193 nm exposure tools in conjunction with resolution enhancement techniques (RET) will postpone the requirement for 157 nm lithography in manufacturing. However, ICs produced at 70 nm design rules with manufacturable k 1 values will require that 157 nm wavelength lithography tools incorporate the same RETs utilized in 248nm, and 193 nm tools. These enhancements will include Alternating Phase Shifting Masks (AltPSM) and Optical Proximity Correction (OPC) on F 2 doped quartz reticle substrates. This study investigates simulation results when AltPSM is applied to sub-100 nm test patterns in 157 nm lithography in order to maintain Critical Dimension (CD) control for both nested and isolated geometries. Aerial image simulations are performed for a range of numerical apertures, chrome regulators, gate pitches and gate widths. The relative performance for phase shifted versus binary structures is also compared. Results are demonstrated in terms of aerial image contrast and process window changes. The results clearly show that a combination of high NA and RET is necessary to achieve usable process windows for 70 nm line/space structures. In addition, it is important to consider two-dimensional proximity effects for sub-100 nm gate structures.

Current status of x-ray mask manufacturing at the Microlithographic Mask Development Center

NASA Astrophysics Data System (ADS)

Kimmel, Kurt R.; Hughes, Patrick J.

1996-07-01

The Microlithographic Mask Development Center (MMD) has been the focal point of X-ray mask development efforts in the United States since its inception in 1993. Funded by the Advanced Research Projects Agency (ARPA), and with technical support from the Proximity X-ray Lithography Association (AT&T, IBM, Loral Federal Systems, and Motorola) the MMD has recently made dramatic advances in mask fabrication. Numerous defect-free 64Mb and 256Mb DRAM masks have been made on both boron-doped silicon and silicon carbide substrates. Image-placement error of less than 35nm 3 sigma is achieved with high yield. Image-size (critical dimension) control of 25nm 3 sigma on 250nm nominal images is representative performance. This progress is being made in a manufacturing environment with significant volumes, multiple customers, multiple substrate configurations, and fast turnaround-time (TAT) requirements. The MMD state-of-the-art equipment infrastructure has made much of this progress possible. This year the MMD qualified the EL-4, an IBM-designed-and-built variable-shaped-spot e-beam system. The fundamental performance parameters of this system will be described. Operational techniques of multiple partial exposure writing and product specific emulation (PSE) have been implemented to improve image-placement accuracy with remarkable success. Image-size control was studied in detail with contributory components separated. Defect density was systematically reduced to yield defect-free masks while simultaneously tightening inspection criteria. Information about these and other recent engineering highlights will be reported. An outline of the primary engineering challenges and goals for 1996 and status of progress toward 100 nm design rule capability will also be given.

Exploring EUV and SAQP pattering schemes at 5nm technology node

NASA Astrophysics Data System (ADS)

Hamed Fatehy, Ahmed; Kotb, Rehab; Lafferty, Neal; Jiang, Fan; Word, James

2018-03-01

For years, Moore's law keeps driving the semiconductors industry towards smaller dimensions and higher density chips with more devices. Earlier, the correlation between exposure source's wave length and the smallest resolvable dimension, mandated the usage of Deep Ultra-Violent (DUV) optical lithography system which has been used for decades to sustain Moore's law, especially when immersion lithography was introduced with 193nm ArF laser sources. As dimensions of devices get smaller beyond Deep Ultra-Violent (DUV) optical resolution limits, the need for Extremely Ultra-Violent (EUV) optical lithography systems was a must. However, EUV systems were still under development at that time for the mass-production in semiconductors industry. Theretofore, Multi-Patterning (MP) technologies was introduced to swirl about DUV optical lithography limitations in advanced nodes beyond minimum dimension (CD) of 20nm. MP can be classified into two main categories; the first one is to split the target itself across multiple masks that give the original target patterns when they are printed. This category includes Double, Triple and Quadruple patterning (DP, TP, and QP). The second category is the Self-Aligned Patterning (SAP) where the target is divided into Mandrel patterns and non-Mandrel patterns. The Mandrel patterns get printed first, then a self-aligned sidewalls are grown around these printed patterns drawing the other non-Mandrel targets, afterword, a cut mask(s) is used to define target's line-ends. This approach contains Self-Aligned-Double Pattering (SADP) and Self-Aligned- Quadruple-Pattering (SAQP). DUV and MP along together paved the way for the industry down to 7nm. However, with the start of development at the 5nm node and the readiness of EUV, the differentiation question is aroused again, which pattering approach should be selected, direct printing using EUV or DUV with MP, or a hybrid flow that contains both DUV-MP and EUV. In this work we are comparing two potential pattering techniques for Back End Of Line (BEOL) metal layers in the 5nm technology node, the first technique is Single Exposure EUV (SE-EUV) with a Direct Patterning EUV lithography process, and the second one is Self-Aligned Quadruple Patterning (SAQP) with a hybrid lithography processes, where the drawn metal target layer is decomposed into a Mandrel mask and Blocks/Cut mask, Mandrel mask is printed using DUV 193i lithography process, while Block/Cut Mask is printed using SE-EUV lithography process. The pros and cons of each technique are quantified based on Edge-Placement-Error (EPE) and Process Variation Band (PVBand) measured at 1D and 2D edges. The layout used in this comparison is a candidate layout for Foundries 5nm process node.

DUV mask writer for BEOL 90-nm technology layers

NASA Astrophysics Data System (ADS)

Hong, Dongsung; Krishnan, Prakash; Coburn, Dianna; Jeewakhan, Nazneen; Xie, Shengqi; Broussard, Joshua; Ferguson, Bradley; Green, Kent G.; Buck, Peter; Jackson, Curt A.; Martinez, Larry

2003-12-01

Mask CD resolution and uniformity requirements for back end of line (BEOL) layers for the 90nm Technology Node push the capability of I-line mask writers; yet, do not require the capability offered by more expensive 50KeV ebeam mask writers. This suite of mask layers seems to be a perfect match for the capabilities of the DUV mask writing tools, which offer a lower cost option to the 50KeV platforms. This paper will evaluate both the mask and wafer results from all three platforms of mask writers (50KeV VSB,ETEC Alta 4300TM DUV laser and ETEC Alta 3500TM I-line laser) for a Cypress 90nm node Metal 1 layer, and demonstrate the benefits of the DUV platform with no change to OPC for this layer.

Scanner focus metrology and control system for advanced 10nm logic node

NASA Astrophysics Data System (ADS)

Oh, Junghun; Maeng, Kwang-Seok; Shin, Jae-Hyung; Choi, Won-Woong; Won, Sung-Keun; Grouwstra, Cedric; El Kodadi, Mohamed; Heil, Stephan; van der Meijden, Vidar; Hong, Jong Kyun; Kim, Sang-Jin; Kwon, Oh-Sung

2018-03-01

Immersion lithography is being extended beyond the 10-nm node and the lithography performance requirement needs to be tightened further to ensure good yield. Amongst others, good on-product focus control with accurate and dense metrology measurements is essential to enable this. In this paper, we will present new solutions that enable onproduct focus monitoring and control (mean and uniformity) suitable for high volume manufacturing environment. We will introduce the concept of pure focus and its role in focus control through the imaging optimizer scanner correction interface. The results will show that the focus uniformity can be improved by up to 25%.

Overcoming low-alignment signal contrast induced alignment failure by alignment signal enhancement

NASA Astrophysics Data System (ADS)

Lee, Byeong Soo; Kim, Young Ha; Hwang, Hyunwoo; Lee, Jeongjin; Kong, Jeong Heung; Kang, Young Seog; Paarhuis, Bart; Kok, Haico; de Graaf, Roelof; Weichselbaum, Stefan; Droste, Richard; Mason, Christopher; Aarts, Igor; de Boeij, Wim P.

2016-03-01

Overlay is one of the key factors which enables optical lithography extension to 1X node DRAM manufacturing. It is natural that accurate wafer alignment is a prerequisite for good device overlay. However, alignment failures or misalignments are commonly observed in a fab. There are many factors which could induce alignment problems. Low alignment signal contrast is one of the main issues. Alignment signal contrast can be degraded by opaque stack materials or by alignment mark degradation due to processes like CMP. This issue can be compounded by mark sub-segmentation from design rules in combination with double or quadruple spacer process. Alignment signal contrast can be improved by applying new material or process optimization, which sometimes lead to the addition of another process-step with higher costs. If we can amplify the signal components containing the position information and reduce other unwanted signal and background contributions then we can improve alignment performance without process change. In this paper we use ASML's new alignment sensor (as was introduced and released on the NXT:1980Di) and sample wafers with special stacks which can induce poor alignment signal to demonstrate alignment and overlay improvement.

Dual Interlocked Logic for Single-Event Transient Mitigation

DTIC Science & Technology

2017-03-01

SPICE simulation and fault-injection analysis. Exemplar SPICE simulations have been performed in a 32nm partially- depleted silicon-on-insulator...in this work. The model has been validated at the 32nm SOI technology node with extensive heavy-ion data [7]. For the SPICE simulations, three

Expression and significance of CD44s, CD44v6, and nm23 mRNA in human cancer.

PubMed

Liu, Yong-Jun; Yan, Pei-Song; Li, Jun; Jia, Jing-Fen

2005-11-14

To investigate the relationship between the expression levels of nm23 mRNA, CD44s, and CD44v6, and oncogenesis, development and metastasis of human gastric adenocarcinoma, colorectal adenocarcinoma, intraductal carcinoma of breast, and lung cancer. Using tissue microarray by immuhistochemical (IHC) staining and in situ hybridization (ISH), we examined the expression levels of nm23 mRNA, CD44s, and CD44v6 in 62 specimens of human gastric adenocarcinoma and 62 specimens of colorectal adenocarcinoma; the expression of CD44s and CD44v6 in 120 specimens of intraductal carcinoma of breast and 20 specimens of normal breast tissue; the expression of nm23 mRNA in 72 specimens of human lung cancer and 23 specimens of normal tissue adjacent to cancer. The expression of nm23 mRNA in the tissues of gastric and colorectal adenocarcinoma was not significantly different from that in the normal tissues adjacent to cancer (P>0.05), and was not associated with the invasion of tumor and the pathology grade of adenocarcinoma (P>0.05). However, the expression of nm23 mRNA was correlated negatively to the lymph node metastasis of gastric and colorectal adenocarcinoma (r = -0.49, P<0.01; r = -4.93, P<0.01). The expression of CD44s in the tissues of gastric and colorectal adenocarcinoma was significantly different from that in the normal tissues adjacent to cancer (P<0.05; P<0.01). CD44v6 was expressed in the tissues of gastric and colorectal adenocarcinoma only, the expression of CD44v6 was significantly associated with the lymph node metastasis, invasion and pathological grade of the tumor (r = 0.47, P<0.01; r = 5.04, P<0.01). CD44s and CD44v6 were expressed in intraductal carcinoma of breast, the expression of CD44s and CD44v6 was significantly associated with lymph node metastases and invasion (P<0.01). However, neither of them was expressed in the normal breast tissue. In addition, the expression of CD44v6 was closely related to the degree of cell differentiation of intraductal carcinoma of breast (c2 = 5.68, P<0.05). The expressional level of nm23 mRNA was closely related to the degree of cell differentiation (P<0.05) and lymph node metastasis (P<0.01), but the expression of nm23 gene was not related to sex, age, and type of histological classification (P>0.05). Patients with overexpression of CD44s and CD44v6 and low expression of nm23 mRNA have a higher lymph node metastatic rate and invasion. In addition, overexpression of CD44v6 is closely related to the degree of cell differentiation. Detection of the three genes is able to provide a reliable index to evaluate the invasion and metastasis of tumor cells.

Toward the 5nm technology: layout optimization and performance benchmark for logic/SRAMs using lateral and vertical GAA FETs

NASA Astrophysics Data System (ADS)

Huynh-Bao, Trong; Ryckaert, Julien; Sakhare, Sushil; Mercha, Abdelkarim; Verkest, Diederik; Thean, Aaron; Wambacq, Piet

2016-03-01

In this paper, we present a layout and performance analysis of logic and SRAM circuits for vertical and lateral GAA FETs using 5nm (iN5) design rules. Extreme ultra-violet lithography (EUVL) processes are exploited to print the critical features: 32 nm gate pitch and 24 nm metal pitch. Layout architectures and patterning compromises for enabling the 5nm node will be discussed in details. A distinct standard-cell template for vertical FETs is proposed and elaborated for the first time. To assess electrical performances, a BSIM-CMG model has been developed and calibrated with TCAD simulations, which accounts for the quasi-ballistic transport in the nanowire channel. The results show that the inbound power rail layout construct for vertical devices could achieve the highest density while the interleaving diffusion template can maximize the port accessibility. By using a representative critical path circuit of a generic low power SoCs, it is shown that the VFET-based circuit is 40% more energy efficient than LFET designs at iso-performance. Regarding SRAMs, benefits given by vertical channel orientation in VFETs has reduced the SRAM area by 20%~30% compared to lateral SRAMs. A double exposures with EUV canner is needed to reach a minimum tip-to-tip (T2T) of 16 nm for middle-of-line (MOL) layers. To enable HD SRAMs with two metal layers, a fully self-aligned gate contact for LFETs and 2D routing of the top electrode for VFETs are required. The standby leakage of vertical SRAMs is 4~6X lower than LFET-based SRAMs at iso-performance and iso-area. The minimum operating voltage (Vmin) of vertical SRAMs is 170 mV lower than lateral SRAMs. A high-density SRAM bitcell of 0.014 um2 can be obtained for the iN5 technology node, which fully follows the SRAM scaling trend for the 45nm nodes and beyond.

Self-aligned blocking integration demonstration for critical sub-30nm pitch Mx level patterning with EUV self-aligned double patterning

NASA Astrophysics Data System (ADS)

Raley, Angélique; Lee, Joe; Smith, Jeffrey T.; Sun, Xinghua; Farrell, Richard A.; Shearer, Jeffrey; Xu, Yongan; Ko, Akiteru; Metz, Andrew W.; Biolsi, Peter; Devilliers, Anton; Arnold, John; Felix, Nelson

2018-04-01

We report a sub-30nm pitch self-aligned double patterning (SADP) integration scheme with EUV lithography coupled with self-aligned block technology (SAB) targeting the back end of line (BEOL) metal line patterning applications for logic nodes beyond 5nm. The integration demonstration is a validation of the scalability of a previously reported flow, which used 193nm immersion SADP targeting a 40nm pitch with the same material sets (Si3N4 mandrel, SiO2 spacer, Spin on carbon, spin on glass). The multi-color integration approach is successfully demonstrated and provides a valuable method to address overlay concerns and more generally edge placement error (EPE) as a whole for advanced process nodes. Unbiased LER/LWR analysis comparison between EUV SADP and 193nm immersion SADP shows that both integrations follow the same trend throughout the process steps. While EUV SADP shows increased LER after mandrel pull, metal hardmask open and dielectric etch compared to 193nm immersion SADP, the final process performance is matched in terms of LWR (1.08nm 3 sigma unbiased) and is only 6% higher than 193nm immersion SADP for average unbiased LER. Using EUV SADP enables almost doubling the line density while keeping most of the remaining processes and films unchanged, and provides a compelling alternative to other multipatterning integrations, which present their own sets of challenges.

Sentinel lymph node detection in gynecologic malignancies by a handheld fluorescence camera

NASA Astrophysics Data System (ADS)

Hirsch, Ole; Szyc, Lukasz; Muallem, Mustafa Zelal; Ignat, Iulia; Chekerov, Radoslav; Macdonald, Rainer; Sehouli, Jalid; Braicu, Ioana; Grosenick, Dirk

2017-02-01

Near-infrared fluorescence imaging using indocyanine green (ICG) as a tracer is a promising technique for mapping the lymphatic system and for detecting sentinel lymph nodes (SLN) during cancer surgery. In our feasibility study we have investigated the application of a custom-made handheld fluorescence camera system for the detection of lymph nodes in gynecological malignancies. It comprises a low cost CCD camera with enhanced NIR sensitivity and two groups of LEDs emitting at wavelengths of 735 nm and 830 nm for interlaced recording of fluorescence and reflectance images of the tissue, respectively. With the help of our system, surgeons can observe fluorescent tissue structures overlaid onto the anatomical image on a monitor in real-time. We applied the camera system for intraoperative lymphatic mapping in 5 patients with vulvar cancer, 5 patients with ovarian cancer, 3 patients with cervical cancer, and 3 patients with endometrial cancer. ICG was injected at four loci around the primary malignant tumor during surgery. After a residence time of typically 15 min fluorescence images were taken in order to visualize the lymph nodes closest to the carcinomas. In cases with vulvar cancer about half of the lymph nodes detected by routinely performed radioactive SLN mapping have shown fluorescence in vivo as well. In the other types of carcinomas several lymph nodes could be detected by fluorescence during laparotomy. We conclude that our low cost camera system has sufficient sensitivity for lymphatic mapping during surgery.

Cost aware cache replacement policy in shared last-level cache for hybrid memory based fog computing

NASA Astrophysics Data System (ADS)

Jia, Gangyong; Han, Guangjie; Wang, Hao; Wang, Feng

2018-04-01

Fog computing requires a large main memory capacity to decrease latency and increase the Quality of Service (QoS). However, dynamic random access memory (DRAM), the commonly used random access memory, cannot be included into a fog computing system due to its high consumption of power. In recent years, non-volatile memories (NVM) such as Phase-Change Memory (PCM) and Spin-transfer torque RAM (STT-RAM) with their low power consumption have emerged to replace DRAM. Moreover, the currently proposed hybrid main memory, consisting of both DRAM and NVM, have shown promising advantages in terms of scalability and power consumption. However, the drawbacks of NVM, such as long read/write latency give rise to potential problems leading to asymmetric cache misses in the hybrid main memory. Current last level cache (LLC) policies are based on the unified miss cost, and result in poor performance in LLC and add to the cost of using NVM. In order to minimize the cache miss cost in the hybrid main memory, we propose a cost aware cache replacement policy (CACRP) that reduces the number of cache misses from NVM and improves the cache performance for a hybrid memory system. Experimental results show that our CACRP behaves better in LLC performance, improving performance up to 43.6% (15.5% on average) compared to LRU.

Attachment method for stacked integrated circuit (IC) chips

DOEpatents

Bernhardt, Anthony F.; Malba, Vincent

1999-01-01

An attachment method for stacked integrated circuit (IC) chips. The method involves connecting stacked chips, such as DRAM memory chips, to each other and/or to a circuit board. Pads on the individual chips are rerouted to form pads on the side of the chip, after which the chips are stacked on top of each other whereby desired interconnections to other chips or a circuit board can be accomplished via the side-located pads. The pads on the side of a chip are connected to metal lines on a flexible plastic tape (flex) by anisotropically conductive adhesive (ACA). Metal lines on the flex are likewise connected to other pads on chips and/or to pads on a circuit board. In the case of a stack of DRAM chips, pads to corresponding address lines on the various chips may be connected to the same metal line on the flex to form an address bus. This method has the advantage of reducing the number of connections required to be made to the circuit board due to bussing; the flex can accommodate dimensional variation in the alignment of chips in the stack; bonding of the ACA is accomplished at low temperature and is otherwise simpler and less expensive than solder bonding; chips can be bonded to the ACA all at once if the sides of the chips are substantially coplanar, as in the case for stacks of identical chips, such as DRAM.

Manufacturability of the X Architecture at the 90-nm technology node

NASA Astrophysics Data System (ADS)

Smayling, Michael C.; Sarma, Robin C.; Nagata, Toshiyuki; Arora, Narain; Duane, Michael P.; Oemardani, Shiany; Shah, Santosh

2004-05-01

In this paper, we discuss the results from a test chip that demonstrate the manufacturability and integration-worthiness of the X Architecture at the 90-nm technology node. We discuss how a collaborative effort between the design and chip making communities used the current generation of mask, lithography, wafer processing, inspection and metrology equipment to create 45 degree wires in typical metal pitches for the upper layers on a 90-nm device in a production environment. Cadence Design Systems created the test structure design and chip validation tools for the project. Canon"s KrF ES3 and ArF AS2 scanners were used for the lithography. Applied Materials used its interconnect fabrication technologies to produce the multilayer copper, low-k interconnect on 300-mm wafers. The results were confirmed for critical dimension and defect levels using Applied Materials" wafer inspection and metrology systems.

Simple method to verify OPC data based on exposure condition

NASA Astrophysics Data System (ADS)

Moon, James; Ahn, Young-Bae; Oh, Sey-Young; Nam, Byung-Ho; Yim, Dong Gyu

2006-03-01

In a world where Sub100nm lithography tool is an everyday household item for device makers, shrinkage of the device is at a rate that no one ever have imagined. With the shrinkage of device at such a high rate, demand placed on Optical Proximity Correction (OPC) is like never before. To meet this demand with respect to shrinkage rate of the device, more aggressive OPC tactic is involved. Aggressive OPC tactics is a must for sub 100nm lithography tech but this tactic eventually results in greater room for OPC error and complexity of the OPC data. Until now, Optical Rule Check (ORC) or Design Rule Check (DRC) was used to verify this complex OPC error. But each of these methods has its pros and cons. ORC verification of OPC data is rather accurate "process" wise but inspection of full chip device requires a lot of money (Computer , software,..) and patience (run time). DRC however has no such disadvantage, but accuracy of the verification is a total downfall "process" wise. In this study, we were able to create a new method for OPC data verification that combines the best of both ORC and DRC verification method. We created a method that inspects the biasing of the OPC data with respect to the illumination condition of the process that's involved. This new method for verification was applied to 80nm tech ISOLATION and GATE layer of the 512M DRAM device and showed accuracy equivalent to ORC inspection with run time that of DRC verification.

DESTINY

DOE Office of Scientific and Technical Information (OSTI.GOV)

2015-03-10

DESTINY is a comprehensive tool for modeling 3D and 2D cache designs using SRAM,embedded DRAM (eDRAM), spin transfer torque RAM (STT-RAM), resistive RAM (ReRAM), and phase change RAM (PCN). In its purpose, it is similar to CACTI, CACTI-3DD or NVSim. DESTINY is very useful for performing design-space exploration across several dimensions, such as optimizing for a target (e.g. latency, area or energy-delay product) for agiven memory technology, choosing the suitable memory technology or fabrication method (i.e. 2D v/s 3D) for a given optimization target, etc. DESTINY has been validated against several cache prototypes. DESTINY is expected to boost studies ofmore » next-generation memory architectures used in systems ranging from mobile devices to extreme-scale supercomputers.« less

Advanced process and defect characterization methodology to support process development of advanced patterning structures

NASA Astrophysics Data System (ADS)

Ketkar, Supriya; Lee, Junhan; Asokamani, Sen; Cho, Winston; Mishra, Shailendra

2018-03-01

This paper discusses the approach and solution adopted by GLOBALFOUNDRIES, a high volume manufacturing (HVM) foundry, for dry-etch related edge-signature surface particle defects issue facing the sub-nm node in the gate-etch sector. It is one of the highest die killers for the company in the 14-nm node. We have used different approaches to attack and rectify the edge signature surface particle defect. Several process-related & hardware changes have been successively implemented to achieve defect reduction improvement by 63%. Each systematic process and/or hardware approach has its own unique downstream issues and they have been dealt in a route-cause-effect technique to address the issue.

Evaluating diffraction based overlay metrology for double patterning technologies

NASA Astrophysics Data System (ADS)

Saravanan, Chandra Saru; Liu, Yongdong; Dasari, Prasad; Kritsun, Oleg; Volkman, Catherine; Acheta, Alden; La Fontaine, Bruno

2008-03-01

Demanding sub-45 nm node lithographic methodologies such as double patterning (DPT) pose significant challenges for overlay metrology. In this paper, we investigate scatterometry methods as an alternative approach to meet these stringent new metrology requirements. We used a spectroscopic diffraction-based overlay (DBO) measurement technique in which registration errors are extracted from specially designed diffraction targets for double patterning. The results of overlay measurements are compared to traditional bar-in-bar targets. A comparison between DBO measurements and CD-SEM measurements is done to show the correlation between the two approaches. We discuss the total measurement uncertainty (TMU) requirements for sub-45 nm nodes and compare TMU from the different overlay approaches.

Nanosatellite optical downlink experiment: design, simulation, and prototyping

NASA Astrophysics Data System (ADS)

Clements, Emily; Aniceto, Raichelle; Barnes, Derek; Caplan, David; Clark, James; Portillo, Iñigo del; Haughwout, Christian; Khatsenko, Maxim; Kingsbury, Ryan; Lee, Myron; Morgan, Rachel; Twichell, Jonathan; Riesing, Kathleen; Yoon, Hyosang; Ziegler, Caleb; Cahoy, Kerri

2016-11-01

The nanosatellite optical downlink experiment (NODE) implements a free-space optical communications (lasercom) capability on a CubeSat platform that can support low earth orbit (LEO) to ground downlink rates>10 Mbps. A primary goal of NODE is to leverage commercially available technologies to provide a scalable and cost-effective alternative to radio-frequency-based communications. The NODE transmitter uses a 200-mW 1550-nm master-oscillator power-amplifier design using power-efficient M-ary pulse position modulation. To facilitate pointing the 0.12-deg downlink beam, NODE augments spacecraft body pointing with a microelectromechanical fast steering mirror (FSM) and uses an 850-nm uplink beacon to an onboard CCD camera. The 30-cm aperture ground telescope uses an infrared camera and FSM for tracking to an avalanche photodiode detector-based receiver. Here, we describe our approach to transition prototype transmitter and receiver designs to a full end-to-end CubeSat-scale system. This includes link budget refinement, drive electronics miniaturization, packaging reduction, improvements to pointing and attitude estimation, implementation of modulation, coding, and interleaving, and ground station receiver design. We capture trades and technology development needs and outline plans for integrated system ground testing.

An improved method for characterizing photoresist lithographic and defectivity performance for sub-20nm node lithography

NASA Astrophysics Data System (ADS)

Amblard, Gilles; Purdy, Sara; Cooper, Ryan; Hockaday, Marjory

2016-03-01

The overall quality and processing capability of lithographic materials are critical for ensuring high device yield and performance at sub-20nm technology nodes in a high volume manufacturing environment. Insufficient process margin and high line width roughness (LWR) cause poor manufacturing control, while high defectivity causes product failures. In this paper, we focus on the most critical layer of a sub-20nm technology node LSI device, and present an improved method for characterizing both lithographic and post-patterning defectivity performance of state-of-the-art immersion photoresists. Multiple formulations from different suppliers were used and compared. Photoresists were tested under various process conditions, and multiple lithographic metrics were investigated (depth of focus, exposure dose latitude, line width roughness, etc.). Results were analyzed and combined using an innovative approach based on advanced software, providing clearer results than previously available. This increased detail enables more accurate performance comparisons among the different photoresists. Post-patterning defectivity was also quantified, with defects reviewed and classified using state-of-the-art inspection tools. Correlations were established between the lithographic and post-patterning defectivity performances for each material, and overall ranking was established among the photoresists, enabling the selection of the best performer for implementation in a high volume manufacturing environment.

Suppression of Leakage Current of Metal-Insulator-Semiconductor Ta2O5 Capacitors with Al2O3/SiON Buffer Layer

NASA Astrophysics Data System (ADS)

Tonomura, Osamu; Miki, Hiroshi; Takeda, Ken-ichi

2011-10-01

An Al2O3/SiO buffer layer was incorporated in a metal-insulator-semiconductor (MIS) Ta2O5 capacitor for dynamic random access memory (DRAM) application. Al2O3 was chosen for the buffer layer owing to its high band offset against silicon and oxidation resistance against increase in effective oxide thickness (EOT). It was clarified that post-deposition annealing in nitrogen at 800 °C for 600 s increased the band offset between Al2O3 and the lower electrode and decreased leakage current by two orders of magnitude at 1 V. Furthermore, we predicted and experimentally confirmed that there was an optimized value of y in (Si3N4)y(SiO2)(1-y), which is 0.58, for minimizing the leakage current and EOT of SiON. To clarify the oxidation resistance and appropriate thickness of Al2O3, a TiN/Ta2O5/Al2O3/SiON/polycrystalline-silicon capacitor was fabricated. It was confirmed that the lower electrode was not oxidized during the crystallization annealing of Ta2O5. By setting the Al2O3 thickness to 3.4 nm, the leakage current is lowered below the required value with an EOT of 3.6 nm.

Single-event effects in avionics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Normand, E.

1996-04-01

The occurrence of single-event upset (SEU) in aircraft electronics has evolved from a series of interesting anecdotal incidents to accepted fact. A study completed in 1992 demonstrated that SEU`s are real, that the measured in-flight rates correlate with the atmospheric neutron flux, and that the rates can be calculated using laboratory SEU data. Once avionics DEU was shown to be an actual effect, it had to be dealt with in avionics designs. The major concern is in random access memories (RAM`s), both static (SRAM`s) and dynamic (DRAM`s), because these microelectronic devices contain the largest number of bits, but other parts,more » such as microprocessors, are also potentially susceptible to upset. In addition, other single-event effects (SEE`s), specifically latch-up and burnout, can also be induced by atmospheric neutrons.« less

Random Telegraph Signal-Like Fluctuation Created by Fowler-Nordheim Stress in Gate Induced Drain Leakage Current of the Saddle Type Dynamic Random Access Memory Cell Transistor

NASA Astrophysics Data System (ADS)

Kim, Heesang; Oh, Byoungchan; Kim, Kyungdo; Cha, Seon-Yong; Jeong, Jae-Goan; Hong, Sung-Joo; Lee, Jong-Ho; Park, Byung-Gook; Shin, Hyungcheol

2010-09-01

We generated traps inside gate oxide in gate-drain overlap region of recess channel type dynamic random access memory (DRAM) cell transistor through Fowler-Nordheim (FN) stress, and observed gate induced drain leakage (GIDL) current both in time domain and in frequency domain. It was found that the trap inside gate oxide could generate random telegraph signal (RTS)-like fluctuation in GIDL current. The characteristics of that fluctuation were similar to those of RTS-like fluctuation in GIDL current observed in the non-stressed device. This result shows the possibility that the trap causing variable retention time (VRT) in DRAM data retention time can be located inside gate oxide like channel RTS of metal-oxide-semiconductor field-effect transistors (MOSFETs).

Exploration of BEOL line-space patterning options at 12 nm half-pitch and below

NASA Astrophysics Data System (ADS)

Decoster, S.; Lazzarino, F.; Petersen Barbosa Lima, L.; Li, W.; Versluijs, J.; Halder, S.; Mallik, A.; Murdoch, G.

2018-03-01

While the semiconductor industry is almost ready for high-volume manufacturing of the 7 nm technology node, research centers are defining and troubleshooting the patterning options for the 5 nm technology node (N5) and below. The target dimension for imec's N5 BEOL applications is 20-24 nm Metal Pitch (MP), which requires Self-Aligned multiple (Double/Quadruple/Octuple) Patterning approaches (SAxP) in combination with EUV or immersion lithography at 193 nm. There are numerous technical challenges to enable gratings at the hard mask level such as good uniformity across wafer, low line edge/width roughness (LER/LWR), large process window, and all of this at low cost. An even greater challenge is to transfer these gratings into the dielectric material at such critical dimensions, where increased line edge roughness, line wiggling and even pattern collapse can be expected for materials with small mechanical stability such as highly porous low-k dielectrics. In this work we first compare three different patterning options for 12 nm half-pitch gratings at the hard mask level: EUV-based SADP and 193i-based SAQP and SAOP. This comparison will be based on process window, line edge/width roughness and cost. Next, the transfer of 12 nm line/space gratings in the dielectric material is discussed and presented. The LER of the dielectric lines is investigated as a function of the dielectric material, the trench depth, and the stress in the sacrificial hard mask. Finally, we elaborate on the different options to enable scaling down from 24 nm MP to 16 nm MP, and demonstrate 8 nm line/space gratings with 193i-based SAOP.

Attachment method for stacked integrated circuit (IC) chips

DOEpatents

Bernhardt, A.F.; Malba, V.

1999-08-03

An attachment method for stacked integrated circuit (IC) chips is disclosed. The method involves connecting stacked chips, such as DRAM memory chips, to each other and/or to a circuit board. Pads on the individual chips are rerouted to form pads on the side of the chip, after which the chips are stacked on top of each other whereby desired interconnections to other chips or a circuit board can be accomplished via the side-located pads. The pads on the side of a chip are connected to metal lines on a flexible plastic tape (flex) by anisotropically conductive adhesive (ACA). Metal lines on the flex are likewise connected to other pads on chips and/or to pads on a circuit board. In the case of a stack of DRAM chips, pads to corresponding address lines on the various chips may be connected to the same metal line on the flex to form an address bus. This method has the advantage of reducing the number of connections required to be made to the circuit board due to bussing; the flex can accommodate dimensional variation in the alignment of chips in the stack; bonding of the ACA is accomplished at low temperature and is otherwise simpler and less expensive than solder bonding; chips can be bonded to the ACA all at once if the sides of the chips are substantially coplanar, as in the case for stacks of identical chips, such as DRAM. 12 figs.

High-speed logic integrated circuits with solution-processed self-assembled carbon nanotubes

NASA Astrophysics Data System (ADS)

Han, Shu-Jen; Tang, Jianshi; Kumar, Bharat; Falk, Abram; Farmer, Damon; Tulevski, George; Jenkins, Keith; Afzali, Ali; Oida, Satoshi; Ott, John; Hannon, James; Haensch, Wilfried

2017-09-01

As conventional monolithic silicon technology struggles to meet the requirements for the 7-nm technology node, there has been tremendous progress in demonstrating the scalability of carbon nanotube field-effect transistors down to the size that satisfies the 3-nm node and beyond. However, to date, circuits built with carbon nanotubes have overlooked key aspects of a practical logic technology and have stalled at simple functionality demonstrations. Here, we report high-performance complementary carbon nanotube ring oscillators using fully manufacturable processes, with a stage switching frequency of 2.82 GHz. The circuit was built on solution-processed, self-assembled carbon nanotube arrays with over 99.9% semiconducting purity, and the complementary feature was achieved by employing two different work function electrodes.

Application of resist-profile-aware source optimization in 28 nm full chip optical proximity correction

NASA Astrophysics Data System (ADS)

Zhu, Jun; Zhang, David Wei; Kuo, Chinte; Wang, Qing; Wei, Fang; Zhang, Chenming; Chen, Han; He, Daquan; Hsu, Stephen D.

2017-07-01

As technology node shrinks, aggressive design rules for contact and other back end of line (BEOL) layers continue to drive the need for more effective full chip patterning optimization. Resist top loss is one of the major challenges for 28 nm and below technology nodes, which can lead to post-etch hotspots that are difficult to predict and eventually degrade the process window significantly. To tackle this problem, we used an advanced programmable illuminator (FlexRay) and Tachyon SMO (Source Mask Optimization) platform to make resistaware source optimization possible, and it is proved to greatly improve the imaging contrast, enhance focus and exposure latitude, and minimize resist top loss thus improving the yield.

High-speed logic integrated circuits with solution-processed self-assembled carbon nanotubes.

PubMed

Han, Shu-Jen; Tang, Jianshi; Kumar, Bharat; Falk, Abram; Farmer, Damon; Tulevski, George; Jenkins, Keith; Afzali, Ali; Oida, Satoshi; Ott, John; Hannon, James; Haensch, Wilfried

2017-09-01

As conventional monolithic silicon technology struggles to meet the requirements for the 7-nm technology node, there has been tremendous progress in demonstrating the scalability of carbon nanotube field-effect transistors down to the size that satisfies the 3-nm node and beyond. However, to date, circuits built with carbon nanotubes have overlooked key aspects of a practical logic technology and have stalled at simple functionality demonstrations. Here, we report high-performance complementary carbon nanotube ring oscillators using fully manufacturable processes, with a stage switching frequency of 2.82 GHz. The circuit was built on solution-processed, self-assembled carbon nanotube arrays with over 99.9% semiconducting purity, and the complementary feature was achieved by employing two different work function electrodes.

In-die mask registration measurement on 28nm-node and beyond

NASA Astrophysics Data System (ADS)

Chen, Shen Hung; Cheng, Yung Feng; Chen, Ming Jui

2013-09-01

As semiconductor go to smaller node, the critical dimension (CD) of process become more and more small. For lithography, RET (Resolution Enhancement Technology) applications can be used for wafer printing of smaller CD/pitch on 28nm node and beyond. SMO (Source Mask Optimization), DPT (Double Patterning Technology) and SADP (Self-Align Double Patterning) can provide lower k1 value for lithography. In another way, image placement error and overlay control also become more and more important for smaller chip size (advanced node). Mask registration (image placement error) and mask overlay are important factors to affect wafer overlay control/performance especially for DPT or SADP. In traditional method, the designed registration marks (cross type, square type) with larger CD were put into scribe-line of mask frame for registration and overlay measurement. However, these patterns are far way from real patterns. It does not show the registration of real pattern directly and is not a convincing method. In this study, the in-die (in-chip) registration measurement is introduced. We extract the dummy patterns that are close to main pattern from post-OPC (Optical Proximity Correction) gds by our desired rule and choose the patterns that distribute over whole mask uniformly. The convergence test shows 100 points measurement has a reliable result.

Electrical comparison of iN7 EUV hybrid and EUV single patterning BEOL metal layers

NASA Astrophysics Data System (ADS)

Larivière, Stéphane; Wilson, Christopher J.; Kutrzeba Kotowska, Bogumila; Versluijs, Janko; Decoster, Stefan; Mao, Ming; van der Veen, Marleen H.; Jourdan, Nicolas; El-Mekki, Zaid; Heylen, Nancy; Kesters, Els; Verdonck, Patrick; Béral, Christophe; Van den Heuvel, Dieter; De Bisschop, Peter; Bekaert, Joost; Blanco, Victor; Ciofi, Ivan; Wan, Danny; Briggs, Basoene; Mallik, Arindam; Hendrickx, Eric; Kim, Ryoung-han; McIntyre, Greg; Ronse, Kurt; Bömmels, Jürgen; Tőkei, Zsolt; Mocuta, Dan

2018-03-01

The semiconductor scaling roadmap shows the continuous node to node scaling to push Moore's law down to the next generations. In that context, the foundry N5 node requires 32nm metal pitch interconnects for the advanced logic Back- End of Line (BEoL). 193immersion usage now requires self-aligned and/or multiple patterning technique combinations to enable such critical dimension. On the other hand, EUV insertion investigation shows that 32nm metal pitch is still a challenge but, related to process flow complexity, presents some clear motivations. Imec has already evaluated on test chip vehicles with different patterning approaches: 193i SAQP (Self-Aligned Quadruple Patterning), LE3 (triple patterning Litho Etch), tone inversion, EUV SE (Single Exposure) with SMO (Source-mask optimization). Following the run path in the technology development for EUV insertion, imec N7 platform (iN7, corresponding node to the foundry N5) is developed for those BEoL layers. In this paper, following technical motivation and development learning, a comparison between the iArF SAQP/EUV block hybrid integration scheme and a single patterning EUV flow is proposed. These two integration patterning options will be finally compared from current morphological and electrical criteria.

Looking into the crystal ball: future device learning using hybrid e-beam and optical lithography (Keynote Paper)

NASA Astrophysics Data System (ADS)

Steen, S. E.; McNab, S. J.; Sekaric, L.; Babich, I.; Patel, J.; Bucchignano, J.; Rooks, M.; Fried, D. M.; Topol, A. W.; Brancaccio, J. R.; Yu, R.; Hergenrother, J. M.; Doyle, J. P.; Nunes, R.; Viswanathan, R. G.; Purushothaman, S.; Rothwell, M. B.

2005-05-01

Semiconductor process development teams are faced with increasing process and integration complexity while the time between lithographic capability and volume production has remained more or less constant over the last decade. Lithography tools have often gated the volume checkpoint of a new device node on the ITRS roadmap. The processes have to be redeveloped after the tooling capability for the new groundrule is obtained since straight scaling is no longer sufficient. In certain cases the time window that the process development teams have is actually decreasing. In the extreme, some forecasts are showing that by the time the 45nm technology node is scheduled for volume production, the tooling vendors will just begin shipping the tools required for this technology node. To address this time pressure, IBM has implemented a hybrid-lithography strategy that marries the advantages of optical lithography (high throughput) with electron beam direct write lithography (high resolution and alignment capability). This hybrid-lithography scheme allows for the timely development of semiconductor processes for the 32nm node, and beyond. In this paper we will describe how hybrid lithography has enabled early process integration and device learning and how IBM applied e-beam & optical hybrid lithography to create the world's smallest working SRAM cell.

Portable widefield imaging device for ICG-detection of the sentinel lymph node

NASA Astrophysics Data System (ADS)

Govone, Angelo Biasi; Gómez-García, Pablo Aurelio; Carvalho, André Lopes; Capuzzo, Renato de Castro; Magalhães, Daniel Varela; Kurachi, Cristina

2015-06-01

Metastasis is one of the major cancer complications, since the malignant cells detach from the primary tumor and reaches other organs or tissues. The sentinel lymph node (SLN) is the first lymphatic structure to be affected by the malignant cells, but its location is still a great challenge for the medical team. This occurs due to the fact that the lymph nodes are located between the muscle fibers, making it visualization difficult. Seeking to aid the surgeon in the detection of the SLN, the present study aims to develop a widefield fluorescence imaging device using the indocyanine green as fluorescence marker. The system is basically composed of a 780nm illumination unit, optical components for 810nm fluorescence detection, two CCD cameras, a laptop, and dedicated software. The illumination unit has 16 diode lasers. A dichroic mirror and bandpass filters select and deliver the excitation light to the interrogated tissue, and select and deliver the fluorescence light to the camera. One camera is responsible for the acquisition of visible light and the other one for the acquisition of the ICG fluorescence. The software developed at the LabVIEW® platform generates a real time merged image where it is possible to observe the fluorescence spots, related to the lymph nodes, superimposed at the image under white light. The system was tested in a mice model, and a first patient with tongue cancer was imaged. Both results showed the potential use of the presented fluorescence imaging system assembled for sentinel lymph node detection.

Driving down defect density in composite EUV patterning film stacks

NASA Astrophysics Data System (ADS)

Meli, Luciana; Petrillo, Karen; De Silva, Anuja; Arnold, John; Felix, Nelson; Johnson, Richard; Murray, Cody; Hubbard, Alex; Durrant, Danielle; Hontake, Koichi; Huli, Lior; Lemley, Corey; Hetzer, Dave; Kawakami, Shinichiro; Matsunaga, Koichi

2017-03-01

Extreme ultraviolet lithography (EUVL) technology is one of the leading candidates for enabling the next generation devices, for 7nm node and beyond. As the technology matures, further improvement is required in the area of blanket film defectivity, pattern defectivity, CD uniformity, and LWR/LER. As EUV pitch scaling approaches sub 20 nm, new techniques and methods must be developed to reduce the overall defectivity, mitigate pattern collapse and eliminate film related defect. IBM Corporation and Tokyo Electron Limited (TELTM) are continuously collaborating to develop manufacturing quality processes for EUVL. In this paper, we review key defectivity learning required to enable 7nm node and beyond technology. We will describe ongoing progress in addressing these challenges through track-based processes (coating, developer, baking), highlighting the limitations of common defect detection strategies and outlining methodologies necessary for accurate characterization and mitigation of blanket defectivity in EUV patterning stacks. We will further discuss defects related to pattern collapse and thinning of underlayer films.

Layout decomposition of self-aligned double patterning for 2D random logic patterning

NASA Astrophysics Data System (ADS)

Ban, Yongchan; Miloslavsky, Alex; Lucas, Kevin; Choi, Soo-Han; Park, Chul-Hong; Pan, David Z.

2011-04-01

Self-aligned double pattering (SADP) has been adapted as a promising solution for sub-30nm technology nodes due to its lower overlay problem and better process tolerance. SADP is in production use for 1D dense patterns with good pitch control such as NAND Flash memory applications, but it is still challenging to apply SADP to 2D random logic patterns. The favored type of SADP for complex logic interconnects is a two mask approach using a core mask and a trim mask. In this paper, we first describe layout decomposition methods of spacer-type double patterning lithography, then report a type of SADP compliant layouts, and finally report SADP applications on Samsung 22nm SRAM layout. For SADP decomposition, we propose several SADP-aware layout coloring algorithms and a method of generating lithography-friendly core mask patterns. Experimental results on 22nm node designs show that our proposed layout decomposition for SADP effectively decomposes any given layouts.

Cognitive Models for Learning to Control Dynamic Systems

DTIC Science & Technology

2008-05-30

2 3N NM NM NMK NK M− + + + + constraints, including KN M+ equality constraints, 7 2NM M+ inequality non- timing constraints and the rest are... inequality timing constraints. The size of the MILP model grows rapidly with the increase of problem size. So it is a big challenge to deal with more...task requirement, are studied in the section. An assumption is made in advance that the time of attack delay and flight time to the sink node are

Electron beam mask writer EBM-9500 for logic 7nm node generation

NASA Astrophysics Data System (ADS)

Matsui, Hideki; Kamikubo, Takashi; Nakahashi, Satoshi; Nomura, Haruyuki; Nakayamada, Noriaki; Suganuma, Mizuna; Kato, Yasuo; Yashima, Jun; Katsap, Victor; Saito, Kenichi; Kobayashi, Ryoei; Miyamoto, Nobuo; Ogasawara, Munehiro

2016-10-01

Semiconductor scaling is slowing down because of difficulties of device manufacturing below logic 7nm node generation. Various lithography candidates which include ArF immersion with resolution enhancement technology (like Inversed Lithography technology), Extreme Ultra Violet lithography and Nano Imprint lithography are being developed to address the situation. In such advanced lithography, shot counts of mask patterns are estimated to increase explosively in critical layers, and then it is hoped that multi beam mask writer (MBMW) is released to handle them within realistic write time. However, ArF immersion technology with multiple patterning will continue to be a mainstream lithography solution for most of the layers. Then, the shot counts in less critical layers are estimated to be stable because of the limitation of resolution in ArF immersion technology. Therefore, single beam mask writer (SBMW) can play an important role for mask production still, relative to MBMW. Also the demand of SBMW seems actually strong for the logic 7nm node. To realize this, we have developed a new SBMW, EBM-9500 for mask fabrication in this generation. A newly introduced electron beam source enables higher current density of 1200A/cm2. Heating effect correction function has also been newly introduced to satisfy the requirements for both pattern accuracy and throughput. In this paper, we will report the configuration and performance of EBM-9500.

Integration of an Axcelis Optima HD Single Wafer High Current Implanter for p- and n-S/D Implants in an Existing Batch Implanter Production Line

DOE Office of Scientific and Technical Information (OSTI.GOV)

Schmeide, Matthias; Kontratenko, Serguei; Krimbacher, Bernhard

2008-11-03

This paper is focused on the integration and qualification of an Axcelis Optima HD single wafer high current spot beam implanter in an existing 200 mm production line with different types of Axcelis batch implanters for high current applications. Both the design of the beamline and the beam shape are comparable between single wafer and batch high current spot beam implanters. In contrast to the single wafer high current ribbon beam implanter, energy contamination is not a concern for the considered spot beam tool because the drift mode can be used down to energies in the 2 keV region. Themore » most important difference between single wafer and batch high current implanters is the significantly higher dose rate and, therefore, the higher damage rate for the single wafer tool due to the different scanning architecture. The results of the integration of high dose implantations, mainly for p- and n-S/D formation, for DRAM 110 nm without pre-amorphization implantation (PAI), CMOS Logic from around 250 nm down to 90 nm without and with PAI, are presented and discussed. Dopant concentration profile analysis using SIMS was performed for different technologies and implantation conditions. The impurity activation was measured using sheet resistance and in some cases spreading resistance technique was applied. The amorphous layer thickness was measured using TEM. Finally, device data are presented in combination with dose, energy and beam current variations. The results have shown that the integration of implantation processes into crystalline structure without PAI is more complex and time consuming than implantations into amorphous layer where the damage difference due to the different dose rates is negligible.« less

CA resist with high sensitivity and sub-100-nm resolution for advanced mask and device making

NASA Astrophysics Data System (ADS)

Kwong, Ranee W.; Huang, Wu-Song; Hartley, John G.; Moreau, Wayne M.; Robinson, Christopher F.; Angelopoulos, Marie; Magg, Christopher; Lawliss, Mark

2000-07-01

Recently, there is significant interest in using CA resists for electron beam (E-Beam) applications including mask making, direct write, and projection printing. CA resists provide superior lithographic performance in comparison to traditional non CA E-beam resists in particular high contrast, resolution, and sensitivity. However, most of the commercially available CA resists have the concern of airborne base contaminants and sensitivity to PAB and/or PEB temperatures. In this presentation, we will discuss a new improved ketal resist system referred to as KRS-XE which exhibits excellent lithography, is robust toward airborne base, compatible with 0.263 N TMAH aqueous developer and exhibits a large PAB/PEB latitude. With the combination of a high performance mask making E-beam exposure tool, high kV (75 kV) shaped beam system EL4+ and the KRS-XE resist, we have printed 75 nm lines/space features with excellent profile control at a dose of 13 (mu) C/cm2 at 75 kV. The shaped beam vector scan system used here provides an unique property in resolving small features in lithography and throughput. Overhead in EL4+ limits the systems ability to fully exploit the sensitivity of the new resist for throughput. The EL5 system, currently in the build phase, has sufficiently low overhead that it is projected to print a 4X, 16G, DRAM mask with OPC in under 3 hours with the CA resist. We will discuss the throughput advantages of the next generation EL5 system over the existing EL4+. In addition we will show the resolution of KRS-XE down to 70 nm using the PREVAIL projection printing system.

Range pattern matching with layer operations and continuous refinements

NASA Astrophysics Data System (ADS)

Tseng, I.-Lun; Lee, Zhao Chuan; Li, Yongfu; Perez, Valerio; Tripathi, Vikas; Ong, Jonathan Yoong Seang

2018-03-01

At advanced and mainstream process nodes (e.g., 7nm, 14nm, 22nm, and 55nm process nodes), lithography hotspots can exist in layouts of integrated circuits even if the layouts pass design rule checking (DRC). Existence of lithography hotspots in a layout can cause manufacturability issues, which can result in yield losses of manufactured integrated circuits. In order to detect lithography hotspots existing in physical layouts, pattern matching (PM) algorithms and commercial PM tools have been developed. However, there are still needs to use DRC tools to perform PM operations. In this paper, we propose a PM synthesis methodology, which uses a continuous refinement technique, for the automatic synthesis of a given lithography hotspot pattern into a DRC deck, which consists of layer operation commands, so that an equivalent PM operation can be performed by executing the synthesized deck with the use of a DRC tool. Note that the proposed methodology can deal with not only exact patterns, but also range patterns. Also, lithography hotspot patterns containing multiple layers can be processed. Experimental results show that the proposed methodology can accurately and efficiently detect lithography hotspots in physical layouts.

[Study on genetic instability of nm23H1 gene in Chinese with original gallbladder tumor].

PubMed

Lu, Hai Ying; Zhang, Guo Qiang; Li, Ji Cheng

2006-06-01

The aim of this study was to examine the microsatellite instability (MSI) and loss of heterozygosity (LOH) of locus D17S396 on chromosome 17 and their influence on the expression of nm23H1 in gallbladder tumors, which may provide experimental basis for the tumor occurrence and metastasis. Techniques such as DNA extraction from formalin-fixed paraffin-embedded tissues, polymerase chain reaction-single strand conformation polymorphism (PCR-SSCP), ordinary silver stain were used to study MSI and LOH of locus D17S396. Envision immunohistochemistry and Leica-Qwin computer imaging techniques were used to assess the expression of gene nm23H1. In our experiment, the frequency of genetic instability of malignant gallbladder tumors was 42.55%, which was higher than that of gallbladder adenomas, while there were no genetic instability occurred in chronic cholecystitis tissue. The frequency of LOH seemed higher with the deteriorism of gallbladder tumor. Among 47 gallbladder carcinomas, the frequency of LOH and MSI were different between different differentiation cases (P < 0.05), and the frequency of LOH in liver and lymph node metastasis cases was significantly higher than those without metastasis (P < 0.01). Moreover, the frequency of LOH was higher in stage Nevin IV and V when compared with stage I, II and III. However, the frequency of MSI showed contrary correlation with some clinicopathologic characteristics. The expression of nm23H1 in gallbladder carcinoma, gallbladder adenoma and chronic cholecystitis tissue were different (P < 0.05). The case with lymph node metastasis showed significantly lower nm23H1 expression than those without lymph node metastasis (P < 0.01). Nevin stage IV and V also exhibited lower nm23H1 expression levels compared with stage I, II and Ill. Furthermore, there was no difference in nm23H1 protein expression intensity analyzed by computer imaging techniques. In gallbladder carcinomas, the positive frequency of nm23H1 protein in LOH positive group was lower than that of LOH negative group (P < 0.05). The results indicated that the genetic instability of nm23H1 gene might be implicated in pathogenesis and progression of gallbladder tumor. Both MSI and LOH of nm23H1 gene controlled the development of gallbladder tumor independently in different paths. MSI may be an early stage molecule marker of gallbladder carcinoma. LOH may be molecule marker for the deteriorism of gallbladder tissue, which could inhibit the expression of nm23H1 in local tissue of gallbladder carcinoma and endow it with high aggressive and poor prognosis. Increasing the amount of nm23H1 protein expression could effectively restrain gallbladder carcinoma metastasis and improve prognosis of patients.

Maximization of DRAM yield by control of surface charge and particle addition during high dose implantation

NASA Astrophysics Data System (ADS)

Horvath, J.; Moffatt, S.

1991-04-01

Ion implantation processing exposes semiconductor devices to an energetic ion beam in order to deposit dopant ions in shallow layers. In addition to this primary process, foreign materials are deposited as particles and surface films. The deposition of particles is a major cause of IC yield loss and becomes even more significant as device dimensions are decreased. Control of particle addition in a high-volume production environment requires procedures to limit beamline and endstation sources, control of particle transport, cleaning procedures and a well grounded preventative maintenance philosophy. Control of surface charge by optimization of the ion beam and electron shower conditions and measurement with a real-time charge sensor has been effective in improving the yield of NMOS and CMOS DRAMs. Control of surface voltages to a range between 0 and -20 V was correlated with good implant yield with PI9200 implanters for p + and n + source-drain implants.

Combinatorial Investigation of ZrO2-Based Dielectric Materials for Dynamic Random-Access Memory Capacitors

NASA Astrophysics Data System (ADS)

Kiyota, Yuji; Itaka, Kenji; Iwashita, Yuta; Adachi, Tetsuya; Chikyow, Toyohiro; Ogura, Atsushi

2011-06-01

We investigated zirconia (ZrO2)-based material libraries in search of new dielectric materials for dynamic random-access memory (DRAM) by combinatorial-pulsed laser deposition (combi-PLD). We found that the substitution of yttrium (Y) to Zr sites in the ZrO2 system suppressed the leakage current effectively. The metal-insulator-metal (MIM) capacitor property of this system showed a leakage current density of less than 5×10-7 A/cm2 and the dielectric constant was 20. Moreover, the addition of titanium (Ti) or tantalum (Ta) to this system caused the dielectric constant to increase to ˜25 within the allowed leakage level of 5×10-7 A/cm2. Therefore, Zr-Y-Ti-O and Zr-Y-Ta-O systems have good potentials for use as new materials with high dielectric constants of DRAM capacitors instead of silicon dioxides (SiO2).

A method to monitor the quality of ultra-thin nitride for trench DRAM with a buried strap structure

NASA Astrophysics Data System (ADS)

Wu, Yung-Hsien; Wang, Chun-Yao; Chang, Ian; Kao, Chien-Kang; Kuo, Chia-Ming; Ku, Alex

2007-02-01

A new approach to monitor the quality of an ultra-thin nitride film has been proposed. The nitride quality is monitored by observing the oxide thickness for the nitride film after wet oxidation since the resistance to oxidation strongly depends on its quality. To obtain a stable oxide thickness without interference from extrinsic factors for process monitoring, monitor wafers without dilute HF solution clean are suggested because the native-oxide containing surface is less sensitive to oxygen and therefore forms the nitride film with stable quality. In addition, the correlation between variable retention time (VRT) performance of a real dynamic random access memory (DRAM) product and oxide thickness from different nitride process temperatures can be successfully explained and this correlation can also be used to establish the appropriate oxide thickness range for process monitoring.

Exact sampling of graphs with prescribed degree correlations

NASA Astrophysics Data System (ADS)

Bassler, Kevin E.; Del Genio, Charo I.; Erdős, Péter L.; Miklós, István; Toroczkai, Zoltán

2015-08-01

Many real-world networks exhibit correlations between the node degrees. For instance, in social networks nodes tend to connect to nodes of similar degree and conversely, in biological and technological networks, high-degree nodes tend to be linked with low-degree nodes. Degree correlations also affect the dynamics of processes supported by a network structure, such as the spread of opinions or epidemics. The proper modelling of these systems, i.e., without uncontrolled biases, requires the sampling of networks with a specified set of constraints. We present a solution to the sampling problem when the constraints imposed are the degree correlations. In particular, we develop an exact method to construct and sample graphs with a specified joint-degree matrix, which is a matrix providing the number of edges between all the sets of nodes of a given degree, for all degrees, thus completely specifying all pairwise degree correlations, and additionally, the degree sequence itself. Our algorithm always produces independent samples without backtracking. The complexity of the graph construction algorithm is {O}({NM}) where N is the number of nodes and M is the number of edges.

In-cell overlay metrology by using optical metrology tool

NASA Astrophysics Data System (ADS)

Lee, Honggoo; Han, Sangjun; Hong, Minhyung; Kim, Seungyoung; Lee, Jieun; Lee, DongYoung; Oh, Eungryong; Choi, Ahlin; Park, Hyowon; Liang, Waley; Choi, DongSub; Kim, Nakyoon; Lee, Jeongpyo; Pandev, Stilian; Jeon, Sanghuck; Robinson, John C.

2018-03-01

Overlay is one of the most critical process control steps of semiconductor manufacturing technology. A typical advanced scheme includes an overlay feedback loop based on after litho optical imaging overlay metrology on scribeline targets. The after litho control loop typically involves high frequency sampling: every lot or nearly every lot. An after etch overlay metrology step is often included, at a lower sampling frequency, in order to characterize and compensate for bias. The after etch metrology step often involves CD-SEM metrology, in this case in-cell and ondevice. This work explores an alternative approach using spectroscopic ellipsometry (SE) metrology and a machine learning analysis technique. Advanced 1x nm DRAM wafers were prepared, including both nominal (POR) wafers with mean overlay offsets, as well as DOE wafers with intentional across wafer overlay modulation. After litho metrology was measured using optical imaging metrology, as well as after etch metrology using both SE and CD-SEM for comparison. We investigate 2 types of machine learning techniques with SE data: model-less and model-based, showing excellent performance for after etch in-cell on-device overlay metrology.

Acute glandular fever-like illness in a patient with HTLV-III antibody.

PubMed

McCaul, T F; Tovey, G; Farthing, C F; Gazzard, B; Zuckerman, A J

1985-10-01

A lymph node biopsy obtained from a patient with human T-cell lymphocytotropic virus III/lymphadenopathy-associated virus (HTLV-III/LAV) antibody, presenting with an acute glandular fever-like illness, was examined by electron microscopy. Numerous pathological changes were present in the biopsy, including hypertrophy of smooth endoplasmic reticulum, intracytoplasmic rod-like inclusions within the cisternae of endoplasmic reticulum, multivesicular bodies, test-tube and ring-shaped forms, and tubulo-reticular structures. Intranuclear and intracytoplasmic viral-like particles measuring 105-120 nm in diameter and small cytoplasmic particles measuring 50-70 nm in diameter were found in some degenerating lymph node cells. These pathological findings may reflect a host cell response to various pathological and viral stimuli resulting from immune deficiency owing to infection with HTLV-III/LAV.

Materials and fabrication sequences for water soluble silicon integrated circuits at the 90 nm node

NASA Astrophysics Data System (ADS)

Yin, Lan; Bozler, Carl; Harburg, Daniel V.; Omenetto, Fiorenzo; Rogers, John A.

2015-01-01

Tungsten interconnects in silicon integrated circuits built at the 90 nm node with releasable configurations on silicon on insulator wafers serve as the basis for advanced forms of water-soluble electronics. These physically transient systems have potential uses in applications that range from temporary biomedical implants to zero-waste environmental sensors. Systematic experimental studies and modeling efforts reveal essential aspects of electrical performance in field effect transistors and complementary ring oscillators with as many as 499 stages. Accelerated tests reveal timescales for dissolution of the various constituent materials, including tungsten, silicon, and silicon dioxide. The results demonstrate that silicon complementary metal-oxide-semiconductor circuits formed with tungsten interconnects in foundry-compatible fabrication processes can serve as a path to high performance, mass-produced transient electronic systems.

Process variation challenges and resolution in the negative-tone develop double patterning for 20nm and below technology node

NASA Astrophysics Data System (ADS)

Mehta, Sohan S.; Ganta, Lakshmi K.; Chauhan, Vikrant; Wu, Yixu; Singh, Sunil; Ann, Chia; Subramany, Lokesh; Higgins, Craig; Erenturk, Burcin; Srivastava, Ravi; Singh, Paramjit; Koh, Hui Peng; Cho, David

2015-03-01

Immersion based 20nm technology node and below becoming very challenging to chip designers, process and integration due to multiple patterning to integrate one design layer . Negative tone development (NTD) processes have been well accepted by industry experts for enabling technologies 20 nm and below. 193i double patterning is the technology solution for pitch down to 80 nm. This imposes tight control in critical dimension(CD) variation in double patterning where design patterns are decomposed in two different masks such as in litho-etch-litho etch (LELE). CD bimodality has been widely studied in LELE double patterning. A portion of CD tolerance budget is significantly consumed by variations in CD in double patterning. The objective of this work is to study the process variation challenges and resolution in the Negative Tone Develop Process for 20 nm and Below Technology Node. This paper describes the effect of dose slope on CD variation in negative tone develop LELE process. This effect becomes even more challenging with standalone NTD developer process due to q-time driven CD variation. We studied impact of different stacks with combination of binary and attenuated phase shift mask and estimated dose slope contribution individually from stack and mask type. Mask 3D simulation was carried out to understand theoretical aspect. In order to meet the minimum insulator requirement for the worst case on wafer the overlay and critical dimension uniformity (CDU) budget margins have slimmed. Besides the litho process and tool control using enhanced metrology feedback, the variation control has other dependencies too. Color balancing between the two masks in LELE is helpful in countering effects such as iso-dense bias, and pattern shifting. Dummy insertion and the improved decomposition techniques [2] using multiple lower priority constraints can help to a great extent. Innovative color aware routing techniques [3] can also help with achieving more uniform density and color balanced layouts.

Improvements in resist performance towards EUV HVM

NASA Astrophysics Data System (ADS)

Yildirim, Oktay; Buitrago, Elizabeth; Hoefnagels, Rik; Meeuwissen, Marieke; Wuister, Sander; Rispens, Gijsbert; van Oosten, Anton; Derks, Paul; Finders, Jo; Vockenhuber, Michaela; Ekinci, Yasin

2017-03-01

Extreme ultraviolet (EUV) lithography with 13.5 nm wavelength is the main option for sub-10nm patterning in the semiconductor industry. We report improvements in resist performance towards EUV high volume manufacturing. A local CD uniformity (LCDU) model is introduced and validated with experimental contact hole (CH) data. Resist performance is analyzed in terms of ultimate printing resolution (R), line width roughness (LWR), sensitivity (S), exposure latitude (EL) and depth of focus (DOF). Resist performance of dense lines at 13 nm half-pitch and beyond is shown by chemical amplified resist (CAR) and non-CAR (Inpria YA Series) on NXE scanner. Resolution down to 10nm half pitch (hp) is shown by Inpria YA Series resist exposed on interference lithography at the Paul Sherrer Institute. Contact holes contrast and consequent LCDU improvement is achieved on a NXE:3400 scanner by decreasing the pupil fill ratio. State-of-the-art imaging meets 5nm node requirements for CHs. A dynamic gas lock (DGL) membrane is introduced between projection optics box (POB) and wafer stage. The DGL membrane will suppress the negative impact of resist outgassing on the projection optics by 100%, enabling a wider range of resist materials to be used. The validated LCDU model indicates that the imaging requirements of the 3nm node can be met with single exposure using a high-NA EUV scanner. The current status, trends, and potential roadblocks for EUV resists are discussed. Our results mark the progress and the improvement points in EUV resist materials to support EUV ecosystem.

Lithographic qualification of high-transmission mask blank for 10nm node and beyond

NASA Astrophysics Data System (ADS)

Xu, Yongan; Faure, Tom; Viswanathan, Ramya; Lobb, Granger; Wistrom, Richard; Burns, Sean; Hu, Lin; Graur, Ioana; Bleiman, Ben; Fischer, Dan; Mignot, Yann; Sakamoto, Yoshifumi; Toda, Yusuke; Bolton, John; Bailey, Todd; Felix, Nelson; Arnold, John; Colburn, Matthew

2016-04-01

In this paper, we discuss the lithographic qualification of high transmission (High T) mask for Via and contact hole applications in 10nm node and beyond. First, the simulated MEEF and depth of focus (DoF) data are compared between the 6% and High T attnPSM masks with the transmission of High T mask blank varying from 12% to 20%. The 12% High T blank shows significantly better MEEF and larger DoF than those of 6% attnPSM mask blank, which are consistent with our wafer data. However, the simulations show no obvious advantage in MEEF and DoF when the blank transmittance is larger than 12%. From our wafer data, it has been seen that the common process window from High T mask is 40nm bigger than that from the 6% attnPSM mask. In the elongated bar structure with smaller aspect ratio, 1.26, the 12% High T mask shows significantly less develop CD pull back in the major direction. Compared to the High T mask, the optimized new illumination condition for 6% attnPSM shows limited improvement in MEEF and the DoF through pitch. In addition, by using the High T mask blank, we have also investigated the SRAF printing, side lobe printing and the resist profile through cross sections, and no patterning risk has been found for manufacturing. As part of this work new 12% High T mask blank materials and processes were developed, and a brief overview of key mask technology development results have been shared. Overall, it is concluded that the High T mask, 12% transmission, provides the most robust and extendable lithographic solution for 10nm node and beyond.

78 FR 53159 - Certain Semiconductor Chips With Dram Circuitry, and Modules and Products Containing Same: Notice...

Federal Register 2010, 2011, 2012, 2013, 2014

2013-08-28

... instituted this investigation on December 21, 2011, based on a complaint filed by Elpida Memory, Inc., of Tokyo, Japan, and Elpida Memory (USA) Inc. of Sunnyvale, California (collectively, ``Elpida''). 76 FR...

Anticipating and controlling mask costs within EDA physical design

NASA Astrophysics Data System (ADS)

Rieger, Michael L.; Mayhew, Jeffrey P.; Melvin, Lawrence S.; Lugg, Robert M.; Beale, Daniel F.

2003-08-01

For low k1 lithography, more aggressive OPC is being applied to critical layers, and the number of mask layers with OPC treatments is growing rapidly. The 130 nm, process node required, on average, 8 layers containing rules- or model-based OPC. The 90 nm node will have 16 OPC layers, of which 14 layers contain aggressive model-based OPC. This escalation of mask pattern complexity, coupled with the predominant use of vector-scan e-beam (VSB) mask writers contributes to the rising costs of advanced mask sets. Writing times for OPC layouts are several times longer than for traditional layouts, making mask exposure the single largest cost component for OPC masks. Lower mask yields, another key factor in higher mask costs, is also aggravated by OPC. Historical mask set costs are plotted below. The initial cost of a 90 nm-node mask set will exceed one million dollars. The relative impact of mask cost on chip depends on how many total wafers are printed with each mask set. For many foundry chips, where unit production is often well below 1000 wafers, mask costs are larger than wafer processing costs. Further increases in NRE may begin to discourage these suppliers' adoption to 90 nm and smaller nodes. In this paper we will outline several alternatives for reducing mask costs by strategically leveraging dimensional margins. Dimensional specifications for a particular masking layer usually are applied uniformly to all features on that layer. As a practical matter, accuracy requirements on different features in the design may vary widely. Take a polysilicon layer, for example: global tolerance specifications for that layer are driven by the transistor-gate requirements; but these parameters over-specify interconnect feature requirements. By identifying features where dimensional accuracy requirements can be reduced, additional margin can be leveraged to reduce OPC complexity. Mask writing time on VSB tools will drop in nearly direct proportion to reduce shot count. By inspecting masks with reference to feature-dependent margins, instead of uniform specifications, mask yield can be effectively increased further reducing delivered mask expense.

Verification of E-Beam direct write integration into 28nm BEOL SRAM technology

NASA Astrophysics Data System (ADS)

Hohle, Christoph; Choi, Kang-Hoon; Gutsch, Manuela; Hanisch, Norbert; Seidel, Robert; Steidel, Katja; Thrun, Xaver; Werner, Thomas

2015-03-01

Electron beam direct write lithography (EBDW) potentially offers advantages for low-volume semiconductor manufacturing, rapid prototyping or design verification due to its high flexibility without the need of costly masks. However, the integration of this advanced patterning technology into complex CMOS manufacturing processes remains challenging. The low throughput of today's single e-Beam tools limits high volume manufacturing applications and maturity of parallel (multi) beam systems is still insufficient [1,2]. Additional concerns like transistor or material damage of underlying layers during exposure at high electron density or acceleration voltage have to be addressed for advanced technology nodes. In the past we successfully proved that potential degradation effects of high-k materials or ULK shrink can be neglected and were excluded by demonstrating integrated electrical results of 28nm node transistor and BEOL performance following 50kV electron beam dry exposure [3]. Here we will give an update on the integration of EBDW in the 300mm CMOS manufacturing processes of advanced integrated circuits at the 28nm SRAM node of GLOBALFOUNDRIES Dresden. The work is an update to what has been previously published [4]. E-beam patterning results of BEOL full chip metal and via layers with a dual damascene integration scheme using a 50kV VISTEC SB3050DW variable shaped electron beam direct writer at Fraunhofer IPMSCNT are demonstrated. For the patterning of the Metal layer a Mix & Match concept based on the sequence litho - etch -litho -etch (LELE) was developed and evaluated wherein several exposure fields were blanked out during the optical exposure. Etch results are shown and compared to the POR. Results are also shown on overlay performance and optimized e-Beam exposure time using most advanced data prep solutions and resist processes. The patterning results have been verified using fully integrated electrical measurement of metal lines and vias on wafer level. In summary we demonstrate the integration capability of EBDW into a productive CMOS process flow at the example of the 28nm SRAM technology node.

Advanced optical imaging platform for CD metrology and defect review on 130-nm to 100-nm node reticles: an overview of preliminary results

NASA Astrophysics Data System (ADS)

Hourd, Andrew C.; Grimshaw, Anthony; Scheuring, Gerd; Gittinger, Christian; Brueck, Hans-Juergen; Chen, Shiuh-Bin; Chen, Parkson W.; Hartmann, Hans; Ordynskyy, Volodymyr; Jonckheere, Rik M.; Philipsen, Vicky; Schaetz, Thomas; Sommer, Karl

2002-08-01

Critical Dimension fidelity continues to be one of the key driving parameters defining photomask quality and printing performance. The present advanced optical CD metrology systems, operating at i-line, will very soon be challenged as viable tools owing to their restricted resolution and measurement linearity impact on the ability to produce repeatable measurements. Alternative measurement technologies such as CD-SEM and -AFM have started to appear, but are also not without tier concerns in the field of reticle CD metrology. This paper introduces a new optical metrology system (MueTec /) operating at DUV wavelength (248nm), which has been specifically designed to meet the resolution and measurement repeatability requirements of reticle manufacture at the 130nm and 100nm nodes. The system is based upon a specially designed mechanical-optical platform for maximum stability and very advanced optical, illumination, alignment and software systems. The at wavelength operation of this system also makes it an ideal platform for defect printability analysis and review. The system is currently part of a European Commission funded assessment project (IST-2000-28086: McD'OR) to develop a testing strategy to verify the system performance, agree on equipment specifications and demonstrate its capability on advanced production reticles - including long-term reliability. It is the preliminary results from this evaluation that are presented here.

REAP (raster e-beam advanced process) using 50-kV raster e-beam system for sub-100-nm node mask technology

NASA Astrophysics Data System (ADS)

Baik, Ki-Ho; Dean, Robert L.; Mueller, Mark; Lu, Maiying; Lem, Homer Y.; Osborne, Stephen; Abboud, Frank E.

2002-07-01

A chemically amplified resist (CAR) process has been recognized as an approach to meet the demanding critical dimension (CD) specifications of 100nm node technology and beyond. Recently, significant effort has been devoted to optimizing CAR materials, which offer the characteristics required for next generation photomask fabrication. In this paper, a process established with a positive-tone CAR from TOK and 50kV MEBES eXara system is discussed. This resist is developed for raster scan 50 kV e-beam systems. It has high contrast, good coating characteristics, good dry etch selectivity, and high environmental stability. The coating process is conducted in an environment with amine concentration less than 2 ppb. A nitrogen environment is provided during plate transfer steps. Resolution using a 60nm writing grid is 90nm line and space patterns. CD linearity is maintained down to 240nm for isolated lines or spaces by applying embedded proximity effect correction (emPEC). Optimizations of post-apply bake (PAB) and post-expose bake (PEB) time, temperature, and uniformity are completed to improve adhesion, coating uniformity, and resolution. A puddle develop process is optimized to improve line edge roughness, edge slope, and resolution. Dry etch process is optimized on a TetraT system to transfer the resist image into the chrome layer with minimum etch bias.

Studies on low-loss coupling of non-node anti-resonant hollow-core fiber and tapered fiber

NASA Astrophysics Data System (ADS)

Zhang, Naiqian; Wang, Zefeng; Liu, Wenbo; Xi, Xiaoming

2017-10-01

Up to now, near almost optical fiber gas lasers employ/adopt the scheme of free-space coupling, which increases the difficulty to adjust the optical path, and has poor stability. All-fiber structure fiber-gas lasers are important development directions in the future. We established the numerical model of SMF-28 type tapered single-mode fiber and non-node hollow-core fiber. When the SMF-28 type single-mode fiber has a waist diameter of 40μm when the light source is LP01 fundamental mode with 1550nm wavelength, the mode field diameter is the largest. Meanwhile, we simulated that the equivalent mode field diameter of non-node anti-resonant hollow-core fiber is about 75μm at the same 1550nm wavelength light source. Then, we use different waist diameters of SMF-28 type tapered fibers injected to the non-node anti-resonant hollow-core fiber in simulation and experiments. In the scheme of the single-ended low-loss coupling, the simulation results indicate that the best waist diameter of tapered fiber is 40μm, and the calculated maximum coupling efficiency is 83.55%. Meanwhile, the experimental result of maximum coupling efficiency is 80.74% when the best waist diameter of tapered fiber is also 40μm. As for the double-ended low-loss coupling, the calculated maximum coupling efficiency is near 83.38%.

77 FR 33240 - Certain Semiconductor Chips With DRAM Circuitry, and Modules and Products Containing Same...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-06-05

... viewed on the Commission's electronic docket (EDIS) at http://edis.usitc.gov . Hearing-impaired persons... December 21, 2011, based on a complaint filed by Elpida Memory, Inc. of Tokyo, Japan and Elpida Memory (USA...

Sentinel node detection in pre-operative axillary staging.

PubMed

Trifirò, Giuseppe; Viale, Giuseppe; Gentilini, Oreste; Travaini, Laura Lavinia; Paganelli, Giovanni

2004-06-01

The concept of sentinel lymph node biopsy in breast cancer surgery is based on the fact that the tumour drains in a logical way via the lymphatic system, from the first to upper levels. Since axillary node dissection does not improve the prognosis of patients with breast cancer, sentinel lymph node biopsy might replace complete axillary dissection for staging of the axilla in clinically N0 patients. Sentinel lymph node biopsy would represent a significant advantage as a minimally invasive procedure, considering that about 70% of patients are found to be free from metastatic disease, yet axillary node dissection can lead to significant morbidity. Subdermal or peritumoural injection of small aliquots (and very low activity) of radiotracer is preferred to intratumoural administration, and (99m)Tc-labelled colloids with most of the particles in the 100-200 nm size range would be ideal for radioguided sentinel node biopsy in breast cancer. The success rate of radioguidance in localising the sentinel lymph node in breast cancer surgery is about 97% in institutions where a high number of procedures are performed, and the success rate of lymphoscintigraphy in sentinel node detection is about 100%. The sentinel lymph node should be processed for intraoperative frozen section examination in its entirety, based on conventional histopathology and, when necessary, immune staining with anti-cytokeratin antibody. Nowadays, lymphoscintigraphy is a useful procedure in patients with different clinical evidence of breast cancer.

Optimization of aeromedical base locations in New Mexico using a model that considers crash nodes and paths.

PubMed

Erdemir, Elif Tokar; Batta, Rajan; Spielman, Seth; Rogerson, Peter A; Blatt, Alan; Flanigan, Marie

2008-05-01

In a recent paper, Tokar Erdemir et al. (2008) introduce models for service systems with service requests originating from both nodes and paths. We demonstrate how to apply and extend their approach to an aeromedical base location application, with specific focus on the state of New Mexico (NM). The current aeromedical base locations of NM are selected without considering motor vehicle crash paths. Crash paths are the roads on which crashes occur, where each road segment has a weight signifying relative crash occurrence. We analyze the loss in accident coverage and location error for current aeromedical base locations. We also provide insights on the relevance of considering crash paths when selecting aeromedical base locations. Additionally, we look briefly at some of the tradeoff issues in locating additional trauma centers vs. additional aeromedical bases in the current aeromedical system of NM. Not surprisingly, tradeoff analysis shows that by locating additional aeromedical bases, we always attain the required coverage level with a lower cost than with locating additional trauma centers.

A high performance pMOSFET with two-step recessed SiGe-S/D structure for 32 nm node and beyond

NASA Astrophysics Data System (ADS)

Yasutake, Nobuaki; Azuma, Atsushi; Ishida, Tatsuya; Ohuchi, Kazuya; Aoki, Nobutoshi; Kusunoki, Naoki; Mori, Shinji; Mizushima, Ichiro; Morooka, Tetsu; Kawanaka, Shigeru; Toyoshima, Yoshiaki

2007-11-01

A novel SiGe-S/D structure for high performance pMOSFET called two-step recessed SiGe-source/drain (S/D) is developed with careful optimization of recessed SiGe-S/D structure. With this method, hole mobility, short channel effect and S/D resistance in pMOSFET are improved compared with conventional recessed SiGe-S/D structure. To enhance device performance such as drain current drivability, SiGe region has to be closer to channel region. Then, conventional deep SiGe-S/D region with carefully optimized shallow SiGe SDE region showed additional device performance improvement without SCE degradation. As a result, high performance 24 nm gate length pMOSFET was demonstrated with drive current of 451 μA/μm at ∣ Vdd∣ of 0.9 V and Ioff of 100 nA/μm (552 μA/μm at ∣ Vdd∣ of 1.0 V). Furthermore, by combining with Vdd scaling, we indicate the extendability of two-step recessed SiGe-S/D structure down to 15 nm node generation.

A novel approach of ensuring layout regularity correct by construction in advanced technologies

NASA Astrophysics Data System (ADS)

Ahmed, Shafquat Jahan; Vaderiya, Yagnesh; Gupta, Radhika; Parthasarathy, Chittoor; Marin, Jean-Claude; Robert, Frederic

2017-03-01

In advanced technology nodes, layout regularity has become a mandatory prerequisite to create robust designs less sensitive to variations in manufacturing process in order to improve yield and minimizing electrical variability. In this paper we describe a method for designing regular full custom layouts based on design and process co-optimization. The method includes various design rule checks that can be used on-the-fly during leaf-cell layout development. We extract a Layout Regularity Index (LRI) from the layouts based on the jogs, alignments and pitches used in the design for any given metal layer. Regularity Index of a layout is the direct indicator of manufacturing yield and is used to compare the relative health of different layout blocks in terms of process friendliness. The method has been deployed for 28nm and 40nm technology nodes for Memory IP and is being extended to other IPs (IO, standard-cell). We have quantified the gain of layout regularity with the deployed method on printability and electrical characteristics by process-variation (PV) band simulation analysis and have achieved up-to 5nm reduction in PV band.

Radiation Status of Sub-65 nm Electronics

NASA Technical Reports Server (NTRS)

Pellish, Jonathan A.

2011-01-01

Ultra-scaled complementary metal oxide semiconductor (CMOS) includes commercial foundry capabilities at and below the 65 nm technology node Radiation evaluations take place using standard products and test characterization vehicles (memories, logic/latch chains, etc.) NEPP focus is two-fold: (1) Conduct early radiation evaluations to ascertain viability for future NASA missions (i.e. leverage commercial technology development). (2) Uncover gaps in current testing methodologies and mechanism comprehension -- early risk mitigation.

Integrated approach to improving local CD uniformity in EUV patterning

NASA Astrophysics Data System (ADS)

Liang, Andrew; Hermans, Jan; Tran, Timothy; Viatkina, Katja; Liang, Chen-Wei; Ward, Brandon; Chuang, Steven; Yu, Jengyi; Harm, Greg; Vandereyken, Jelle; Rio, David; Kubis, Michael; Tan, Samantha; Dusa, Mircea; Singhal, Akhil; van Schravendijk, Bart; Dixit, Girish; Shamma, Nader

2017-03-01

Extreme ultraviolet (EUV) lithography is crucial to enabling technology scaling in pitch and critical dimension (CD). Currently, one of the key challenges of introducing EUV lithography to high volume manufacturing (HVM) is throughput, which requires high source power and high sensitivity chemically amplified photoresists. Important limiters of high sensitivity chemically amplified resists (CAR) are the effects of photon shot noise and resist blur on the number of photons received and of photoacids generated per feature, especially at the pitches required for 7 nm and 5 nm advanced technology nodes. These stochastic effects are reflected in via structures as hole-to-hole CD variation or local CD uniformity (LCDU). Here, we demonstrate a synergy of film stack deposition, EUV lithography, and plasma etch techniques to improve LCDU, which allows the use of high sensitivity resists required for the introduction of EUV HVM. Thus, to improve LCDU to a level required by 5 nm node and beyond, film stack deposition, EUV lithography, and plasma etch processes were combined and co-optimized to enhance LCDU reduction from synergies. Test wafers were created by depositing a pattern transfer stack on a substrate representative of a 5 nm node target layer. The pattern transfer stack consisted of an atomically smooth adhesion layer and two hardmasks and was deposited using the Lam VECTOR PECVD product family. These layers were designed to mitigate hole roughness, absorb out-of-band radiation, and provide additional outlets for etch to improve LCDU and control hole CD. These wafers were then exposed through an ASML NXE3350B EUV scanner using a variety of advanced positive tone EUV CAR. They were finally etched to the target substrate using Lam Flex dielectric etch and Kiyo conductor etch systems. Metrology methodologies to assess dimensional metrics as well as chip performance and defectivity were investigated to enable repeatable patterning process development. Illumination conditions in EUV lithography were optimized to improve normalized image log slope (NILS), which is expected to reduce shot noise related effects. It can be seen that the EUV imaging contrast improvement can further reduce post-develop LCDU from 4.1 nm to 3.9 nm and from 2.8 nm to 2.6 nm. In parallel, etch processes were developed to further reduce LCDU, to control CD, and to transfer these improvements into the final target substrate. We also demonstrate that increasing post-develop CD through dose adjustment can enhance the LCDU reduction from etch. Similar trends were also observed in different pitches down to 40 nm. The solutions demonstrated here are critical to the introduction of EUV lithography in high volume manufacturing. It can be seen that through a synergistic deposition, lithography, and etch optimization, LCDU at a 40 nm pitch can be improved to 1.6 nm (3-sigma) in a target oxide layer and to 1.4 nm (3-sigma) at the photoresist layer.

Sentinel Node Mapping Using a Fluorescent Dye and Visible Light During Laparoscopic Gastrectomy for Early Gastric Cancer: Result of a Prospective Study From a Single Institute.

PubMed

Lee, Chang Min; Park, Sungsoo; Park, Seong-Heum; Jung, Sung Woo; Choe, Jung Wan; Sul, Ji-Young; Jang, You Jin; Mok, Young-Jae; Kim, Jong-Han

2017-04-01

The aim of this study was to investigate the feasibility of sentinel node mapping using a fluorescent dye and visible light in patients with gastric cancer. Recently, fluorescent imaging technology offers improved visibility with the possibility of better sensitivity or accuracy in sentinel node mapping. Twenty patients with early gastric cancer, for whom laparoscopic distal gastrectomy with standard lymphadenectomy had been planned, were enrolled in this study. Before lymphadenectomy, the patients received a gastrofiberoscopic peritumoral injection of fluorescein solution. The sentinel basin was investigated via laparoscopic fluorescent imaging under blue light (wavelength of 440-490 nm) emitted from an LED curing light. The detection rate and lymph node status were analyzed in the enrolled patients. In addition, short-term clinical outcomes were also investigated. No hypersensitivity to the dye was identified in any enrolled patients. Sentinel nodes were detected in 19 of 20 enrolled patients (95.0%), and metastatic lymph nodes were found in 2 patients. The latter lymph nodes belonged to the sentinel basin of each patient. Meanwhile, 1 patient (5.0%) experienced a postoperative complication that was unrelated to sentinel node mapping. No mortality was recorded among enrolled cases. Sentinel node mapping with visible light fluorescence was a feasible method for visualizing sentinel nodes in patients with early gastric cancer. In addition, this method is advantageous in terms of visualizing the concrete relationship between the sentinel nodes and surrounding structures.

76 FR 72214 - Certain Semiconductor Chips with DRAM Circuitry, and Modules and Products Containing Same Receipt...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-11-22

...://edis.usitc.gov . Hearing-impaired persons are advised that information on this matter can be obtained... Commission has received a complaint filed on behalf of Elpida Memory, Inc. and Elpida Memory (USA) Inc. on...

Performance evaluation of modulation and multiple access schemes in ultraviolet optical wireless connections for two atmosphere thickness cases.

PubMed

Raptis, Nikos; Pikasis, Evangelos; Syvridis, Dimitris

2016-08-01

The exploitation of optical wireless communication channels in a non-line-of-sight regime is studied for point-to-point and networking configurations considering the use of light-emitting diodes. Two environments with different scattering center densities are considered, assuming operation at 265 nm. The bit error rate performance of both pulsed and multicarrier modulation schemes is examined, using numerical approaches. In the networking scenario, a central node only receives data, one node transmits useful data, and the rest of them act as interferers. The performance of the desirable node's transmissions is evaluated. The access to the medium is controlled by a code division multiple access scheme.

Development of Low Parasitic Light Sensitivity and Low Dark Current 2.8 μm Global Shutter Pixel †

PubMed Central

Yokoyama, Toshifumi; Tsutsui, Masafumi; Suzuki, Masakatsu; Nishi, Yoshiaki; Mizuno, Ikuo; Lahav, Assaf

2018-01-01

We developed a low parasitic light sensitivity (PLS) and low dark current 2.8 μm global shutter pixel. We propose a new inner lens design concept to realize both low PLS and high quantum efficiency (QE). 1/PLS is 7700 and QE is 62% at a wavelength of 530 nm. We also propose a new storage-gate based memory node for low dark current. P-type implants and negative gate biasing are introduced to suppress dark current at the surface of the memory node. This memory node structure shows the world smallest dark current of 9.5 e−/s at 60 °C. PMID:29370146

Development of Low Parasitic Light Sensitivity and Low Dark Current 2.8 μm Global Shutter Pixel.

PubMed

Yokoyama, Toshifumi; Tsutsui, Masafumi; Suzuki, Masakatsu; Nishi, Yoshiaki; Mizuno, Ikuo; Lahav, Assaf

2018-01-25

Abstract : We developed a low parasitic light sensitivity (PLS) and low dark current 2.8 μm global shutter pixel. We propose a new inner lens design concept to realize both low PLS and high quantum efficiency (QE). 1/PLS is 7700 and QE is 62% at a wavelength of 530 nm. We also propose a new storage-gate based memory node for low dark current. P-type implants and negative gate biasing are introduced to suppress dark current at the surface of the memory node. This memory node structure shows the world smallest dark current of 9.5 e - /s at 60 °C.

Comparison of Upright Gait with Supine Bungee-Cord Gait

NASA Technical Reports Server (NTRS)

Boda, Wanda L.; Hargens, Alan R.; Campbell, J. A.; Yang, C.; Holton, Emily M. (Technical Monitor)

1998-01-01

Running on a treadmill with bungee-cord resistance is currently used on the Russian space station MIR as a countermeasure for the loss of bone and muscular strength which occurs during spaceflight. However, it is unknown whether ground reaction force (GRF) at the feet using bungee-cord resistance is similar to that which occurs during upright walking and running on Earth. We hypothesized-that the DRAMs generated during upright walking and running are greater than the DRAMs generated during supine bungee-cord gait. Eleven healthy subjects walked (4.8 +/- 0.13 km/h, mean +/- SE) and ran (9.1 +/- 0.51 km/h) during upright and supine bungee-cord exercise on an active treadmill. Subjects exercised for 3 min in each condition using a resistance of 1 body weight calibrated during an initial, stationary standing position. Data were sampled at a frequency of 500Hz and the mean of 3 trials was analyzed for each condition. A repeated measures analysis of variance tested significance between the conditions. Peak DRAMs during upright walking were significantly greater (1084.9 +/- 111.4 N) than during supine bungee-cord walking (770.3 +/- 59.8 N; p less than 0.05). Peak GRFs were also significantly greater for upright running (1548.3 +/- 135.4 N) than for supine bungee-cord running (1099.5 +/- 158.46 N). Analysis of GRF curves indicated that forces decreased throughout the stance phase for bungee-cord gait but not during upright gait. These results indicate that bungee-cord exercise may not create sufficient loads at the feet to counteract the loss of bone and muscular strength that occurs during long-duration exposure to microgravity.

Autophagy is induced through the ROS-TP53-DRAM1 pathway in response to mitochondrial protein synthesis inhibition.

PubMed

Xie, Xiaolei; Le, Li; Fan, Yanxin; Lv, Lin; Zhang, Junjie

2012-07-01

Mitoribosome in mammalian cells is responsible for synthesis of 13 mtDNA-encoded proteins, which are integral parts of four mitochondrial respiratory chain complexes (I, III, IV and V). ERAL1 is a nuclear-encoded GTPase important for the formation of the 28S small mitoribosomal subunit. Here, we demonstrate that knockdown of ERAL1 by RNA interference inhibits mitochondrial protein synthesis and promotes reactive oxygen species (ROS) generation, leading to autophagic vacuolization in HeLa cells. Cells that lack ERAL1 expression showed a significant conversion of LC3-I to LC3-II and an enhanced accumulation of autophagic vacuoles carrying the LC3 marker, all of which were blocked by the autophagy inhibitor 3-MA as well as by the ROS scavenger NAC. Inhibition of mitochondrial protein synthesis either by ERAL1 siRNA or chloramphenicol (CAP), a specific inhibitor of mitoribosomes, induced autophagy in HTC-116 TP53 (+/+) cells, but not in HTC-116 TP53 (-/-) cells, indicating that tumor protein 53 (TP53) is essential for the autophagy induction. The ROS elevation resulting from mitochondrial protein synthesis inhibition induced TP53 expression at transcriptional levels by enhancing TP53 promoter activity, and increased TP53 protein stability by suppressing TP53 ubiquitination through MAPK14/p38 MAPK-mediated TP53 phosphorylation. Upregulation of TP53 and its downstream target gene DRAM1, but not CDKN1A/p21, was required for the autophagy induction in ERAL1 siRNA or CAP-treated cells. Altogether, these data indicate that autophagy is induced through the ROS-TP53-DRAM1 pathway in response to mitochondrial protein synthesis inhibition.

PIMS: Memristor-Based Processing-in-Memory-and-Storage.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cook, Jeanine

Continued progress in computing has augmented the quest for higher performance with a new quest for higher energy efficiency. This has led to the re-emergence of Processing-In-Memory (PIM) ar- chitectures that offer higher density and performance with some boost in energy efficiency. Past PIM work either integrated a standard CPU with a conventional DRAM to improve the CPU- memory link, or used a bit-level processor with Single Instruction Multiple Data (SIMD) control, but neither matched the energy consumption of the memory to the computation. We originally proposed to develop a new architecture derived from PIM that more effectively addressed energymore » efficiency for high performance scientific, data analytics, and neuromorphic applications. We also originally planned to implement a von Neumann architecture with arithmetic/logic units (ALUs) that matched the power consumption of an advanced storage array to maximize energy efficiency. Implementing this architecture in storage was our original idea, since by augmenting storage (in- stead of memory), the system could address both in-memory computation and applications that accessed larger data sets directly from storage, hence Processing-in-Memory-and-Storage (PIMS). However, as our research matured, we discovered several things that changed our original direc- tion, the most important being that a PIM that implements a standard von Neumann-type archi- tecture results in significant energy efficiency improvement, but only about a O(10) performance improvement. In addition to this, the emergence of new memory technologies moved us to propos- ing a non-von Neumann architecture, called Superstrider, implemented not in storage, but in a new DRAM technology called High Bandwidth Memory (HBM). HBM is a stacked DRAM tech- nology that includes a logic layer where an architecture such as Superstrider could potentially be implemented.« less

Deployment Ready Airway Management System (DRAMS)

DTIC Science & Technology

2013-10-24

have been developed along with rapid prototypes. The results have been excellent and DMLS Alpha one and two prototypes have been developed resulting...Contact Model Quarterly  Report               10/25/2013 DMLS FlexBlade Reusable Module B-1 Prototype

Apparatus and Method for Compensating for Process, Voltage, and Temperature Variation of the Time Delay of a Digital Delay Line

NASA Technical Reports Server (NTRS)

Seefeldt, James (Inventor); Feng, Xiaoxin (Inventor); Roper, Weston (Inventor)

2013-01-01

A process, voltage, and temperature (PVT) compensation circuit and a method of continuously generating a delay measure are provided. The compensation circuit includes two delay lines, each delay line providing a delay output. The two delay lines may each include a number of delay elements, which in turn may include one or more current-starved inverters. The number of delay lines may differ between the two delay lines. The delay outputs are provided to a combining circuit that determines an offset pulse based on the two delay outputs and then averages the voltage of the offset pulse to determine a delay measure. The delay measure may be one or more currents or voltages indicating an amount of PVT compensation to apply to input or output signals of an application circuit, such as a memory-bus driver, dynamic random access memory (DRAM), a synchronous DRAM, a processor or other clocked circuit.

A Survey Of Architectural Approaches for Managing Embedded DRAM and Non-volatile On-chip Caches

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mittal, Sparsh; Vetter, Jeffrey S; Li, Dong

Recent trends of CMOS scaling and increasing number of on-chip cores have led to a large increase in the size of on-chip caches. Since SRAM has low density and consumes large amount of leakage power, its use in designing on-chip caches has become more challenging. To address this issue, researchers are exploring the use of several emerging memory technologies, such as embedded DRAM, spin transfer torque RAM, resistive RAM, phase change RAM and domain wall memory. In this paper, we survey the architectural approaches proposed for designing memory systems and, specifically, caches with these emerging memory technologies. To highlight theirmore » similarities and differences, we present a classification of these technologies and architectural approaches based on their key characteristics. We also briefly summarize the challenges in using these technologies for architecting caches. We believe that this survey will help the readers gain insights into the emerging memory device technologies, and their potential use in designing future computing systems.« less

A comparison of advanced overlay technologies

NASA Astrophysics Data System (ADS)

Dasari, Prasad; Smith, Nigel; Goelzer, Gary; Liu, Zhuan; Li, Jie; Tan, Asher; Koh, Chin Hwee

2010-03-01

The extension of optical lithography to 22nm and beyond by Double Patterning Technology is often challenged by CDU and overlay control. With reduced overlay measurement error budgets in the sub-nm range, relying on traditional Total Measurement Uncertainty (TMU) estimates alone is no longer sufficient. In this paper we will report scatterometry overlay measurements data from a set of twelve test wafers, using four different target designs. The TMU of these measurements is under 0.4nm, within the process control requirements for the 22nm node. Comparing the measurement differences between DBO targets (using empirical and model based analysis) and with image-based overlay data indicates the presence of systematic and random measurement errors that exceeds the TMU estimate.

Mask manufacturing of advanced technology designs using multi-beam lithography (part 2)

NASA Astrophysics Data System (ADS)

Green, Michael; Ham, Young; Dillon, Brian; Kasprowicz, Bryan; Hur, Ik Boum; Park, Joong Hee; Choi, Yohan; McMurran, Jeff; Kamberian, Henry; Chalom, Daniel; Klikovits, Jan; Jurkovic, Michal; Hudek, Peter

2016-09-01

As optical lithography is extended into 10nm and below nodes, advanced designs are becoming a key challenge for mask manufacturers. Techniques including advanced optical proximity correction (OPC) and Inverse Lithography Technology (ILT) result in structures that pose a range of issues across the mask manufacturing process. Among the new challenges are continued shrinking sub-resolution assist features (SRAFs), curvilinear SRAFs, and other complex mask geometries that are counter-intuitive relative to the desired wafer pattern. Considerable capability improvements over current mask making methods are necessary to meet the new requirements particularly regarding minimum feature resolution and pattern fidelity. Advanced processes using the IMS Multi-beam Mask Writer (MBMW) are feasible solutions to these coming challenges. In this paper, Part 2 of our study, we further characterize an MBMW process for 10nm and below logic node mask manufacturing including advanced pattern analysis and write time demonstration.

Quantum storage of entangled telecom-wavelength photons in an erbium-doped optical fibre

NASA Astrophysics Data System (ADS)

Saglamyurek, Erhan; Jin, Jeongwan; Verma, Varun B.; Shaw, Matthew D.; Marsili, Francesco; Nam, Sae Woo; Oblak, Daniel; Tittel, Wolfgang

2015-02-01

The realization of a future quantum Internet requires the processing and storage of quantum information at local nodes and interconnecting distant nodes using free-space and fibre-optic links. Quantum memories for light are key elements of such quantum networks. However, to date, neither an atomic quantum memory for non-classical states of light operating at a wavelength compatible with standard telecom fibre infrastructure, nor a fibre-based implementation of a quantum memory, has been reported. Here, we demonstrate the storage and faithful recall of the state of a 1,532 nm wavelength photon entangled with a 795 nm photon, in an ensemble of cryogenically cooled erbium ions doped into a 20-m-long silica fibre, using a photon-echo quantum memory protocol. Despite its currently limited efficiency and storage time, our broadband light-matter interface brings fibre-based quantum networks one step closer to reality.

Near-infrared autofluorescence imaging to detect parathyroid glands in thyroid surgery.

PubMed

Ladurner, R; Al Arabi, N; Guendogar, U; Hallfeldt, Kkj; Stepp, H; Gallwas, Jks

2018-01-01

Objective To identify and save parathyroid glands during thyroidectomy by displaying their autofluorescence. Methods Autofluorescence imaging was carried out during thyroidectomy with and without central lymph node dissection. After visual recognition by the surgeon, the parathyroid glands and the surrounding tissue were exposed to near-infrared light with a wavelength of 690-770 nm using a modified Karl Storz near infrared/indocyanine green endoscopic system. Parathyroid tissue was expected to show near infrared autofluorescence at 820 nm, captured in the blue channel of the camera. Results We investigated 41 parathyroid glands from 20 patients; 37 glands were identified correctly based on near-infrared autofluorescence. Neither lymph nodes nor thyroid revealed substantial autofluorescence and nor did adipose tissue. Conclusions Parathyroid tissue is characterised by showing autofluorescence in the near-infrared spectrum. This effect can be used to identify and preserve parathyroid glands during thyroidectomy.

EUV local CDU healing performance and modeling capability towards 5nm node

NASA Astrophysics Data System (ADS)

Jee, Tae Kwon; Timoshkov, Vadim; Choi, Peter; Rio, David; Tsai, Yu-Cheng; Yaegashi, Hidetami; Koike, Kyohei; Fonseca, Carlos; Schoofs, Stijn

2017-10-01

Both local variability and optical proximity correction (OPC) errors are big contributors to the edge placement error (EPE) budget which is closely related to the device yield. The post-litho contact hole healing will be demonstrated to meet after-etch local variability specifications using a low dose, 30mJ/cm2 dose-to-size, positive tone developed (PTD) resist with relevant throughput in high volume manufacturing (HVM). The total local variability of the node 5nm (N5) contact holes will be characterized in terms of local CD uniformity (LCDU), local placement error (LPE), and contact edge roughness (CER) using a statistical methodology. The CD healing process has complex etch proximity effects, so the OPC prediction accuracy is challenging to meet EPE requirements for the N5. Thus, the prediction accuracy of an after-etch model will be investigated and discussed using ASML Tachyon OPC model.

Low leakage Ru-strontium titanate-Ru metal-insulator-metal capacitors for sub-20 nm technology node in dynamic random access memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Popovici, M., E-mail: Mihaela.Ioana.Popovici@imec.be; Swerts, J.; Redolfi, A.

2014-02-24

Improved metal-insulator-metal capacitor (MIMCAP) stacks with strontium titanate (STO) as dielectric sandwiched between Ru as top and bottom electrode are shown. The Ru/STO/Ru stack demonstrates clearly its potential to reach sub-20 nm technology nodes for dynamic random access memory. Downscaling of the equivalent oxide thickness, leakage current density (J{sub g}) of the MIMCAPs, and physical thickness of the STO have been realized by control of the Sr/Ti ratio and grain size using a heterogeneous TiO{sub 2}/STO based nanolaminate stack deposition and a two-step crystallization anneal. Replacement of TiN with Ru as both top and bottom electrodes reduces the amount of electricallymore » active defects and is essential to achieve a low leakage current in the MIM capacitor.« less

Optical characterization of ex-vivo axillary lymph nodes of breast-cancer patients using a custom-built spectrophotometer

NASA Astrophysics Data System (ADS)

Sampathkumar, Ashwin; Saegusa-Beecroft, Emi; Mamou, Jonathan; Chitnis, Parag V.; Machi, Junji; Feleppa, Ernest J.

2014-03-01

Quantitative photoacoustics is emerging as a new hybrid modality to investigate diseases and cells in human pathology and cytology studies. Optical absorption of light is the predominant mechanism behind the photoacoustic effect. Therefore, a need exits to characterize the optical properties of specimens and to identify the relevant operating wavelengths for photoacoustic imaging. We have developed a custom low-cost spectrophotometer to measure the optical properties of human axillary lymph nodes dissected for breast-cancer staging. Optical extinction curves of positive and negative nodes were determined in the spectral range of 400 to 1000 nm. We have developed a model to estimate tissue optical properties, taking into account the role of fat and saline. Our results enabled us to select the optimal optical wavelengths for maximizing the imaging contrast between metastatic and noncancerous tissue in axillary lymph nodes.

Influence of twin boundaries on superconducting gap nodes in FeSe single crystal studied by STM/STS

NASA Astrophysics Data System (ADS)

Watashige, T.; Hanaguri, T.; Kohsaka, Y.; Iwaya, K.; Fu, Y.; Kasahara, S.; Watanabe, D.; Mizukami, Y.; Mikami, T.; Kawamoto, Y.; Kurata, S.; Shibauchi, T.; Matsuda, Y.; Böhmer, A. E.; Wolf, T.; Meingast, C.; Löhneysen, H. V.

2014-03-01

We performed scanning tunneling microscopy (STM) and spectroscopy (STS) measurements on high-quality FeSe single crystals grown by vapor transport technique to examine the superconducting-gap structure. In MBE-grown FeSe thin films, based on the V-shaped tunneling spectra, nodal superconductivity is suggested. It is interesting to investigate how the nodes are affected by various kinds of defects. We found that twin boundaries bring about drastic effects on the gap nodes. With approaching to the twin boundary, V-shaped spectra gradually change to U-shaped ones. Interestingly, in the area between the twin boundaries separated by about 30 nm, the gap node is completely lifted and there appears a finite gap over +/-0.4 meV. This unusual twin-boundary effect will give us a hint to elucidate the superconducting-gap structure.

MIGRATION OF INTRADERMALLY INJECTED QUANTUM DOTS TO SENTINEL ORGANS IN MICE

PubMed Central

Gopee, Neera V.; Roberts, Dean W.; Webb, Peggy; Cozart, Christy R.; Siitonen, Paul H.; Warbritton, Alan R.; Yu, William W.; Colvin, Vicki L.; Walker, Nigel J.; Howard, Paul C.

2012-01-01

Topical exposure to nanoscale materials is likely from a variety of sources including sunscreens and cosmetics. Because the in vivo disposition of nanoscale materials is not well understood, we have evaluated the distribution of quantum dots (QD) following intradermal injection into female SKH-1 hairless mice as a model system for determining tissue localization following intradermal infiltration. The QD [CdSe core, CdS capped, poly(ethylene glycol) (PEG) coated, 37 nm diameter, 621 nm fluorescence emission] were injected intradermally on the right dorsal flank. Within minutes following intradermal injection, the highly UV fluorescent QD could be observed moving from the injection sites apparently through the lymphatic duct system to regional lymph nodes. Residual fluorescent QD remained at the site of injection until necropsy at 24 hours. Quantification of cadmium and selenium levels after 0, 4, 8, 12 or 24 hours in multiple tissues, using inductively coupled plasma mass spectrometry (ICP-MS) showed a time-dependent loss of cadmium from the injection site, and accumulation in the liver, regional draining lymph nodes, kidney, spleen, and hepatic lymph node. Fluorescence microscopy corroborated the ICP-MS results regarding the tissue distribution of QD. The results indicated that (a) intradermally injected nanoscale QD remained as a deposit in skin and penetrated the surrounding viable subcutis, (b) QD were distributed to draining lymph nodes through the subcutaneous lymphatics and to the liver and other organs, and (c) sentinel organs are effective locations for monitoring transdermal penetration of nanoscale materials into animals. PMID:17404394

Reduction of wafer-edge overlay errors using advanced correction models, optimized for minimal metrology requirements

NASA Astrophysics Data System (ADS)

Kim, Min-Suk; Won, Hwa-Yeon; Jeong, Jong-Mun; Böcker, Paul; Vergaij-Huizer, Lydia; Kupers, Michiel; Jovanović, Milenko; Sochal, Inez; Ryan, Kevin; Sun, Kyu-Tae; Lim, Young-Wan; Byun, Jin-Moo; Kim, Gwang-Gon; Suh, Jung-Joon

2016-03-01

In order to optimize yield in DRAM semiconductor manufacturing for 2x nodes and beyond, the (processing induced) overlay fingerprint towards the edge of the wafer needs to be reduced. Traditionally, this is achieved by acquiring denser overlay metrology at the edge of the wafer, to feed field-by-field corrections. Although field-by-field corrections can be effective in reducing localized overlay errors, the requirement for dense metrology to determine the corrections can become a limiting factor due to a significant increase of metrology time and cost. In this study, a more cost-effective solution has been found in extending the regular correction model with an edge-specific component. This new overlay correction model can be driven by an optimized, sparser sampling especially at the wafer edge area, and also allows for a reduction of noise propagation. Lithography correction potential has been maximized, with significantly less metrology needs. Evaluations have been performed, demonstrating the benefit of edge models in terms of on-product overlay performance, as well as cell based overlay performance based on metrology-to-cell matching improvements. Performance can be increased compared to POR modeling and sampling, which can contribute to (overlay based) yield improvement. Based on advanced modeling including edge components, metrology requirements have been optimized, enabling integrated metrology which drives down overall metrology fab footprint and lithography cycle time.

Alcoholic beverage server liability and the reduction of alcohol-related problems : evaluation of dram shop laws : final report

DOT National Transportation Integrated Search

1990-06-01

The project was an evaluation of the potential for the legal liability of alcoholic beverage servers to stimulate preventative serving practices and thus reduce alcohol-involved traffic problems. Legal analyses of judicial and legislative actions wit...

Alcoholic beverage server liability and the reduction of alcohol-related problems : evaluation of dram shop laws : summary report

DOT National Transportation Integrated Search

1990-06-01

The project was an evaluation of the potential for the legal liability of alcoholic beverage servers to stimulate preventative serving practices and thus reduce alcohol-involved traffic problems. Legal analyses of judicial and legislative actions wit...

Real cell overlay measurement through design based metrology

NASA Astrophysics Data System (ADS)

Yoo, Gyun; Kim, Jungchan; Park, Chanha; Lee, Taehyeong; Ji, Sunkeun; Jo, Gyoyeon; Yang, Hyunjo; Yim, Donggyu; Yamamoto, Masahiro; Maruyama, Kotaro; Park, Byungjun

2014-04-01

Until recent device nodes, lithography has been struggling to improve its resolution limit. Even though next generation lithography technology is now facing various difficulties, several innovative resolution enhancement technologies, based on 193nm wavelength, were introduced and implemented to keep the trend of device scaling. Scanner makers keep developing state-of-the-art exposure system which guarantees higher productivity and meets a more aggressive overlay specification. "The scaling reduction of the overlay error has been a simple matter of the capability of exposure tools. However, it is clear that the scanner contributions may no longer be the majority component in total overlay performance. The ability to control correctable overlay components is paramount to achieve the desired performance.(2)" In a manufacturing fab, the overlay error, determined by a conventional overlay measurement: by using an overlay mark based on IBO and DBO, often does not represent the physical placement error in the cell area of a memory device. The mismatch may arise from the size or pitch difference between the overlay mark and the cell pattern. Pattern distortion, caused by etching or CMP, also can be a source of the mismatch. Therefore, the requirement of a direct overlay measurement in the cell pattern gradually increases in the manufacturing field, and also in the development level. In order to overcome the mismatch between conventional overlay measurement and the real placement error of layer to layer in the cell area of a memory device, we suggest an alternative overlay measurement method utilizing by design, based metrology tool. A basic concept of this method is shown in figure1. A CD-SEM measurement of the overlay error between layer 1 and 2 could be the ideal method but it takes too long time to extract a lot of data from wafer level. An E-beam based DBM tool provides high speed to cover the whole wafer with high repeatability. It is enabled by using the design as a reference for overlay measurement and a high speed scan system. In this paper, we have demonstrated that direct overlay measurement in the cell area can distinguish the mismatch exactly, instead of using overlay mark. This experiment was carried out for several critical layer in DRAM and Flash memory, using DBM(Design Based Metrology) tool, NGR2170™.

PEGylated polylysine dendrimers increase lymphatic exposure to doxorubicin when compared to PEGylated liposomal and solution formulations of doxorubicin.

PubMed

Ryan, Gemma M; Kaminskas, Lisa M; Bulitta, Jürgen B; McIntosh, Michelle P; Owen, David J; Porter, Christopher J H

2013-11-28

Improved delivery of chemotherapeutic drugs to the lymphatic system has the potential to augment outcomes for cancer therapy by enhancing activity against lymph node metastases. Uptake of small molecule chemotherapeutics into the lymphatic system, however, is limited. Nano-sized drug carriers have the potential to promote access to the lymphatics, but to this point, this has not been examined in detail. The current study therefore evaluated the lymphatic exposure of doxorubicin after subcutaneous and intravenous administration as a simple solution formulation or when formulated as a doxorubicin loaded PEGylated poly-lysine dendrimer (hydrodynamic diameter 12 nm), a PEGylated liposome (100 nm) and various pluronic micellar formulations (~5 nm) to thoracic lymph duct cannulated rats. Plasma and lymph pharmacokinetics were analysed by compartmental pharmacokinetic modelling in S-ADAPT, and Berkeley Madonna software was used to predict the lymphatic exposure of doxorubicin over an extended period of time. The micelle formulations displayed poor in vivo stability, resulting in doxorubicin profiles that were similar to that observed after administration of the doxorubicin solution formulation. In contrast, the dendrimer formulation significantly increased the recovery of doxorubicin in the thoracic lymph after both intravenous and subcutaneous dosing when compared to the solution or micellar formulation. Dendrimer-doxorubicin also resulted in increases in lymphatic doxorubicin concentrations when compared to the liposome formulation, although liposomal doxorubicin did increase lymphatic transport when compared to the solution formulation. Specifically, the dendrimer formulation increased the recovery of doxorubicin in the lymph up to 30 h post dose by up to 685 fold and 3.7 fold when compared to the solution and liposomal formulations respectively. Using the compartmental model to predict lymphatic exposure to longer time periods suggested that doxorubicin exposure to the lymphatic system would ultimately be 9796 times and 6.1 times greater after administration of dendrimer doxorubicin when compared to the solution and liposome formulations respectively. The recovery of doxorubicin in the sentinel lymph nodes draining the subcutaneous injection site was also quantified directly, and consistent with the lymph pharmacokinetic data, lymph node recovery was greatest for the dendrimer formulation (12% of dosed doxorubicin/g node) when compared to the liposome (1.4%/g node) and solution (<1%/g node) formulations. The data suggest that dendrimer-based drug delivery systems have the potential to enhance drug exposure to lymph-based drug targets such as lymphatic metastases. © 2013.

Panel discussion summary: do we need a revolution in design and process integration to enable sub-100-nm technology nodes?

NASA Astrophysics Data System (ADS)

Grobman, Warren D.

2002-07-01

Dramatically increasing mask set costs, long-loop design-fabrication iterations, and lithography of unprecedented complexity and cost threaten to disrupt time-accepted IC industry progression as described by Moore"s Law. Practical and cost-effective IC manufacturing below the 100nm technology node presents significant and unique new challenges spanning multiple disciplines and overlapping traditionally separable components of the design-through-chip manufacturing flow. Lithographic and other process complexity is compounded by design, mask, and infrastructure technologies, which do not sufficiently account for increasingly stringent and complex manufacturing issues. Deep subwavelength and atomic-scale process and device physics effects increasingly invade and impact the design flow strongly at a time when the pressures for increased design productivity are escalating at a superlinear rate. Productivity gaps, both upstream in design and downstream in fabrication, are anticipated by many to increase due to dramatic increases in inherent complexity of the design-to-chip equation. Furthermore, the cost of lithographic equipment is increasing at an aggressive compound growth rate so large that we can no longer economically derive the benefit of the increased number of circuits per unit area unless we extend the life of lithographic equipment for more generations, and deeper into the subwavelength regime. Do these trends unambiguously lead to the conclusion that we need a revolution in design and design-process integration to enable the sub-100nm nodes? Or is such a premise similar to other well-known predictions of technology brick walls that never came true?

Design considerations and emerging challenges for nanotube-, nanowire-, and negative capacitor-field effect transistors

NASA Astrophysics Data System (ADS)

Wahab, Md. Abdul

As the era of classical planar metal-oxide-semiconductor field-effect transistors (MOSFETs) comes to an end, the semiconductor industry is beginning to adopt 3D device architectures, such as FinFETs, starting at the 22 nm technology node. Since physical limits such as short channel effect (SCE) and self-heating may dominate, it may be difficult to scale Si FinFET below 10 nm. In this regard, transistors with different materials, geometries, or operating principles may help. For example, gate has excellent electrostatic control over 2D thin film channel with planar geometry, and 1D nanowire (NW) channel with gate-all-around (GAA) geometry to reduce SCE. High carrier mobility of single wall carbon nanotube (SWNT) or III-V channels may reduce VDD to reduce power consumption. Therefore, as channel of transistor, 2D thin film of array SWNTs and 1D III-V multi NWs are promising for sub 10 nm technology nodes. In this thesis, we analyze the potential of these transistors from process, performance, and reliability perspectives. For SWNT FETs, we discuss a set of challenges (such as how to (i) characterize diameter distribution, (ii) remove metallic (m)-SWNTs, and (iii) avoid electrostatic cross-talk among the neighboring SWNTs), and demonstrate solution strategies both theoretically and experimentally. Regarding self-heating in these new class of devices (SWNT FET and GAA NW FET including state-of-the-art FinFET), higher thermal resistance from poor thermal conducting oxides results significant temperature rise, and reduces the IC life-time. For GAA NW FETs, we discuss accurate self-heating evaluation with good spatial, temporal, and thermal resolutions. The introduction of negative capacitor (NC), as gate dielectric stack of transistor, allows sub 60 mV/dec operation to reduce power consumption significantly. Taken together, our work provides a comprehensive perspective regarding the challenges and opportunities of sub 10 nm technology nodes.

ILT optimization of EUV masks for sub-7nm lithography

NASA Astrophysics Data System (ADS)

Hooker, Kevin; Kuechler, Bernd; Kazarian, Aram; Xiao, Guangming; Lucas, Kevin

2017-06-01

The 5nm and 7nm technology nodes will continue recent scaling trends and will deliver significantly smaller minimum features, standard cell areas and SRAM cell areas vs. the 10nm node. There are tremendous economic pressures to shrink each subsequent technology, though in a cost-effective and performance enhancing manner. IC manufacturers are eagerly awaiting EUV so that they can more aggressively shrink their technology than they could by using complicated MPT. The current 0.33NA EUV tools and processes also have their patterning limitations. EUV scanner lenses, scanner sources, masks and resists are all relatively immature compared to the current lithography manufacturing baseline of 193i. For example, lens aberrations are currently several times larger (as a function of wavelength) in EUV scanners than for 193i scanners. Robustly patterning 16nm L/S fully random logic metal patterns and 40nm pitch random logic rectangular contacts with 0.33NA EUV are tough challenges that will benefit from advanced OPC/RET. For example, if an IC manufacturer can push single exposure device layer resolution 10% tighter using improved ILT to avoid using DPT, there will be a significant cost and process complexity benefit to doing so. ILT is well known to have considerable benefits in finding flexible 193i mask pattern solutions to improve process window, improve 2D CD control, improve resolution in low K1 lithography regime and help to delay the introduction of DPT. However, ILT has not previously been applied to EUV lithography. In this paper, we report on new developments which extend ILT method to EUV lithography and we characterize the benefits seen vs. traditional EUV OPC/RET methods.

Sensitivity study and parameter optimization of OCD tool for 14nm finFET process

NASA Astrophysics Data System (ADS)

Zhang, Zhensheng; Chen, Huiping; Cheng, Shiqiu; Zhan, Yunkun; Huang, Kun; Shi, Yaoming; Xu, Yiping

2016-03-01

Optical critical dimension (OCD) measurement has been widely demonstrated as an essential metrology method for monitoring advanced IC process in the technology node of 90 nm and beyond. However, the rapidly shrunk critical dimensions of the semiconductor devices and the increasing complexity of the manufacturing process bring more challenges to OCD. The measurement precision of OCD technology highly relies on the optical hardware configuration, spectral types, and inherently interactions between the incidence of light and various materials with various topological structures, therefore sensitivity analysis and parameter optimization are very critical in the OCD applications. This paper presents a method for seeking the optimum sensitive measurement configuration to enhance the metrology precision and reduce the noise impact to the greatest extent. In this work, the sensitivity of different types of spectra with a series of hardware configurations of incidence angles and azimuth angles were investigated. The optimum hardware measurement configuration and spectrum parameter can be identified. The FinFET structures in the technology node of 14 nm were constructed to validate the algorithm. This method provides guidance to estimate the measurement precision before measuring actual device features and will be beneficial for OCD hardware configuration.

Precuring implant photoresists for shrink and patterning control

NASA Astrophysics Data System (ADS)

Winroth, Gustaf; Rosseel, Erik; Delvaux, Christie; Sanchez, Efrain Altamirano; Ercken, Monique

2013-10-01

193-nm compatible photoresists are turning out to be the new platform for implant lithography, due to the increasing requirements in both resolution and overlay. Shrinkage of such resists is becoming progressively the most topical issue for aggressive nodes, where conventional pretreatments from older resist platforms, such as ultraviolet flood exposures, are not directly transferable to (meth-)acrylate-type resists. The precuring options available for state-of-the-art implant photoresists for 193-nm lithography is explored, in which we target to reduce the shrinkage during implantation for trenching critical dimensions (CDs) that are relevant for nodes <20 nm. An extensive study comprising different approaches, including laser-, ion-, and electron-based treatments, is presented. Each treatment is individually investigated with the aim to find not only a valid pretreatment for shrinkage control during implantation, but also to understand what effect alternative pretreatments have on the morphology and the CDs of thick photoresists used as implant stopping layers. Viable options for further process optimization in order to integrate them into device process flows are found. To this extent, the shrink behavior after pretreatment is shown, and the additional shrink dynamics after implantation are compared.

A general design strategy for block copolymer directed self-assembly patterning of integrated circuits contact holes using an alphabet approach.

PubMed

Yi, He; Bao, Xin-Yu; Tiberio, Richard; Wong, H-S Philip

2015-02-11

Directed self-assembly (DSA) is a promising lithography candidate for technology nodes beyond 14 nm. Researchers have shown contact hole patterning for random logic circuits using DSA with small physical templates. This paper introduces an alphabet approach that uses a minimal set of small physical templates to pattern all contacts configurations on integrated circuits. We illustrate, through experiments, a general and scalable template design strategy that links the DSA material properties to the technology node requirements.

A land-potential knowledge system (LandPKS) based on local and scientific knowledge of land productivity and resilience

USDA-ARS?s Scientific Manuscript database

Economic assessment of land use change in drylands depends on understanding potential productivity, degradation resistance and resilience, all of which vary widely and are often ignored. Rapidly increasing demand, together with new technologies, migration and global capital mobility are driving dram...

Use of intermediaries in DWI deterrence. Volume 3, Dram shop acts, common law liability and state alcoholic beverage control (ABC) enforcement as potential DWI countermeasures

DOT National Transportation Integrated Search

1983-04-01

Many trips undertaken by alcohol-impaired drivers originate at public drinking establishments: bars, taverns, nightclubs, restaurants, etc. The managers and service personnel (bartenders, waiters, waitresses) in these establishments could play a role...

CA resist with high sensitivity and sub-100-nm resolution for advanced mask making

NASA Astrophysics Data System (ADS)

Huang, Wu-Song; Kwong, Ranee W.; Hartley, John G.; Moreau, Wayne M.; Angelopoulos, Marie; Magg, Christopher; Lawliss, Mark

2000-07-01

Recently, there is significant interest in using CA resist for electron beam (E-beam) applications including mask making, direct write, and projection printing. CA resists provide superior lithographic performance in comparison to traditional non-CA E-beam resist in particular high contrast, resolution, and sensitivity. However, most of the commercially available CA resist have the concern of airborne base contaminants and sensitivity to PAB and/or PEB temperatures. In this presentation, we will discuss a new improved ketal resists system referred to as KRS-XE which exhibits excellent lithography, is robust toward airborne base, compatible with 0.263N TMAH aqueous developer and exhibits excellent lithography, is robust toward airborne base, compatible with 0.263N TMAH aqueous developer and exhibits a large PAB/PEB latitude. With the combination of a high performance mask making E-beam exposure tool, high kV shaped beam system EL4+ and the KRS-XE resist, we have printed 75nm lines/space feature with excellent profile control at a dose of 13(mu) C/cm2 at 75kV. The shaped beam vector scan system used here provides a unique property in resolving small features in lithography and throughput. Overhead in EL4+$ limits the systems ability to fully exploit the sensitivity of the new resist for throughput. The EL5 system has sufficiently low overhead that it is projected to print a 4X, 16G DRAM mask with OPC in under 3 hours with the CA resist. We will discuss the throughput advantages of the next generation EL5 system over the existing EL4+.

Evaluation of the tracing effect of carbon nanoparticle and carbon nanoparticle-epirubicin suspension in axillary lymph node dissection for breast cancer treatment.

PubMed

Du, Junze; Zhang, Yongsong; Ming, Jia; Liu, Jing; Zhong, Ling; Liang, Quankun; Fan, Linjun; Jiang, Jun

2016-06-22

Carbon nanoparticle suspension, using smooth carbon particles at a diameter of 21 nm added with suspending agents, is a stable suspension of carbon pellets of 150 nm in diameter. It is obviously inclined to the lymphatic system. There were some studies reporting that carbon nanoparticles are considered as superior tracers for sentinel lymph nodes because of their stability and operational feasibility. However, there were few study concerns about the potential treatment effect including tracing and local chemotherapeutic effect of carbon nanoparticle-epirubicin suspension on breast cancer with axillary metastasis. In the current study, a randomized controlled analysis was performed to investigate the potential treatment effect of carbon nanoparticle-epirubicin suspension on breast cancer with axillary metastasis. A total of 90 breast cancer patients were randomly divided into three equal groups: control, tracer, and drug-load groups. The control group patients did not receive any lymphatic tracers, the tracer group patients were subcutaneously injected with 1 ml carbon nanoparticle suspension, and the drug-load group patients were injected with 3 ml carbon nanoparticle-epirubicin suspension at four separate sites around the areola 24 h before surgery. Modified radical mastectomy, endoscopic subcutaneous mammary resection plus axillary lymph node dissection, and immediate reconstruction with implants or breast-conserving surgery were performed. The mean number of the dissected lymph nodes per patient was significantly higher in the tracer (21.3 ± 6.1) and drug-load (19.5 ± 3.7) groups than in the control group (16.7 ± 3.4) (P < 0.05). Most lymph nodes in the former two groups were stained black (75.7 and 73.3 %, respectively), but with no significant difference between the groups. Most metastatic lymph nodes were also stained black in the tracer group (68.6 %) and drug-load group (78.1 %) and with no significant difference between the groups (P = 0.198). Microscopic examination revealed that the carbon nanoparticles were localized around or among the cancer cell masses and residues of necrotized cancer cells surrounded by fibroblastic proliferation could be found within the stained lymph nodes in the drug-load group. The majority of axillary lymph nodes were stained black by the suspension of carbon nanoparticles, which helped identify the lymph nodes from the surrounding tissues and avoided aggressive axillary treatment. Thus, a combination therapy of carbon nanoparticles with epirubicin could play an important role in lymphatic chemotherapy without affecting tracing. ChiCTRTRC13003419.

Contact patterning strategies for 32nm and 28nm technology

NASA Astrophysics Data System (ADS)

Morgenfeld, Bradley; Stobert, Ian; An, Ju j.; Kanai, Hideki; Chen, Norman; Aminpur, Massud; Brodsky, Colin; Thomas, Alan

2011-04-01

As 193 nm immersion lithography is extended indefinitely to sustain technology roadmaps, there is increasing pressure to contain escalating lithography costs by identifying patterning solutions that can minimize the use of multiple-pass processes. Contact patterning for the 32/28 nm technology nodes has been greatly facilitated by just-in-time introduction of new process enablers that allow the simultaneous support of flexible foundry-oriented ground rules alongside highperformance technology, while also migrating to a single-pass patterning process. The incorporation of device based performance metrics along with rigorous patterning and structural variability studies were critical in the evaluation of material innovation for improved resolution and CD shrink along with novel data preparation flows utilizing aggressive strategies for SRAF insertion and retargeting.

FDSOI 28nm performances study for RF energy scavenging

NASA Astrophysics Data System (ADS)

Rochefeuille, E.; Alicalapa, F.; Douyère, A.; Vuong, T. P.

2018-03-01

This paper presents a study on an integrated technology: Fully-Depleted-Silicon-On-Insulator (FDSOI) at a 28nm node. FDSOI results are compared to another technology: Complementary-Metal-Oxide-Semiconductor (CMOS) 350nm. The aim of this work was to demonstrate the advantages of using FDSOI technology in RF energy scavenging applications. Characteristics of transistors are pointed out and results showed an improved 22%-output voltage gain for a series rectifier and a 13%-output voltage gain for a Dickson charge pump in FDSOI technology compared to CMOS, for an input voltage and power of 0.5 V and 0 dBm respectively. Those results allowed to prove that FDSOI 28nm is a better technology choice for energy scavenging and low-power applications.

Novel contact hole reticle design for enhanced lithography process window in IC manufacturing

NASA Astrophysics Data System (ADS)

Chang, Chung-Hsing

2005-01-01

For 90nm node generation, 65nm, and beyond, dark field mask types such as contact-hole, via, and trench patterns that all are very challenging to print with satisfactory process windows for day-to-day lithography manufacturing. Resolution enhancement technology (RET) masks together with ArF high numerical aperture (NA) scanners have been recognized as the inevitable choice of method for 65nm node manufacturing. Among RET mask types, the alternating phase shifting mask (AltPSM) is one of the well-known strong enhancement techniques. However AltPSM can have a very strong optical proximity effect that comes with the use of small on-axis illumination sigma setting. For very dense contact features, it may be possible for AltPSM to overcome the phase conflict by limiting the mask design rules. But it is not feasible to resolve the inherent phase conflict for the semi-dense, semi-isolated and isolated contact areas. Hence the adoption of this strong enhancement technique for dark filed mask types in today"s IC manufacturing has been very limited. In this paper, we present a novel yet a very powerful design method to achieve contact and via masks printing for 90nm, 65nm, and beyond. We name our new mask design as: Novel Improved Contact-hole pattern Exposure PSM (NICE PSM) with off-axis illumination, such as QUASAR. This RET masks design can enhance the process window of isolated, semi-isolated contact hole and via hole patterns. The main concepts of NICE PSM with QUASAR off-axis illumination are analogous to the Super-FLEX pupil filter technology.

Novel contact hole reticle design for enhanced lithography process window in IC manufacturing

NASA Astrophysics Data System (ADS)

Chang, Chung-Hsing

2004-10-01

For 90nm node generation, 65nm, and beyond, dark field mask types such as contact-hole, via, and trench patterns that all are very challenging to print with satisfactory process windows for day-to-day lithography manufacturing. Resolution enhancement technology (RET) masks together with ArF high numerical aperture (NA) scanners have been recognized as the inevitable choice of method for 65nm node manufacturing. Among RET mask types, the alternating phase shifting mask (AltPSM) is one of the well-known strong enhancement techniques. However, AltPSM can have a very strong optical proximity effect that comes with the use of small on-axis illumination sigma setting. For very dense contact features, it may be possible for AltPSM to overcome the phase conflict by limiting the mask design rules. But it is not feasible to resolve the inherent phase conflict for the semi-dense, semi-isolated and isolated contact areas. Hence the adoption of this strong enhancement technique for dark filed mask types in today"s IC manufacturing has been very limited. In this paper, we report a novel yet a very powerful design method to achieve contact and via masks printing for 90nm, 65nm, and beyond. We name our new mask design as: Novel Improved Contact-hole pattern Exposure PSM (NICE PSM) with off-axis illumination, such as QUASAR. This RET masks design can enhance the process window of isolated, semi-isolated contact hole and via hole patterns. The main concepts of NICE PSM with QUASAR off-axis illumination are analogous to the Super-FLEX pupil filter technology.

Line roughness improvements on self-aligned quadruple patterning by wafer stress engineering

NASA Astrophysics Data System (ADS)

Liu, Eric; Ko, Akiteru; Biolsi, Peter; Chae, Soo Doo; Hsieh, Chia-Yun; Kagaya, Munehito; Lee, Choongman; Moriya, Tsuyoshi; Tsujikawa, Shimpei; Suzuki, Yusuke; Okubo, Kazuya; Imai, Kiyotaka

2018-04-01

In integrated circuit and memory devices, size shrinkage has been the most effective method to reduce production cost and enable the steady increment of the number of transistors per unit area over the past few decades. In order to reduce the die size and feature size, it is necessary to minimize pattern formation in the advance node development. In the node of sub-10nm, extreme ultra violet lithography (EUV) and multi-patterning solutions based on 193nm immersionlithography are the two most common options to achieve the size requirement. In such small features of line and space pattern, line width roughness (LWR) and line edge roughness (LER) contribute significant amount of process variation that impacts both physical and electrical performances. In this paper, we focus on optimizing the line roughness performance by using wafer stress engineering on 30nm pitch line and space pattern. This pattern is generated by a self-aligned quadruple patterning (SAQP) technique for the potential application of fin formation. Our investigation starts by comparing film materials and stress levels in various processing steps and material selection on SAQP integration scheme. From the cross-matrix comparison, we are able to determine the best stack of film selection and stress combination in order to achieve the lowest line roughness performance while obtaining pattern validity after fin etch. This stack is also used to study the step-by-step line roughness performance from SAQP to fin etch. Finally, we will show a successful patterning of 30nm pitch line and space pattern SAQP scheme with 1nm line roughness performance.

Latest evolution in a 300mm graphoepitaxy pilot line flow for L/S applications

NASA Astrophysics Data System (ADS)

Claveau, G.; Argoud, M.; Pimenta-Barros, P.; Chamiot-Maitral, G.; Tiron, R.; Chevalier, X.; Navarro, C.

2017-03-01

Directed Self Assembly (DSA) of block-copolymers (BCPs) used as a complementary technique to the 193nm immersion lithography has demonstrated sub-10nm node applications in both via and line/space patterning. We propose however to study the performance of graphoepitaxy which allows DSA with thicker initial BCP layer, higher multiplication factors and stronger orientation control of lamellae. The aim of this work is to use the 300mm pilot line available at LETI and Arkema's advanced materials to evaluate the performances of a novel graphoepitaxy process based on the work on a 38nm period lamellar PS-b-PMMA (L38) reported before.

Roughness and uniformity improvements on self-aligned quadruple patterning technique for 10nm node and beyond by wafer stress engineering

NASA Astrophysics Data System (ADS)

Liu, Eric; Ko, Akiteru; O'Meara, David; Mohanty, Nihar; Franke, Elliott; Pillai, Karthik; Biolsi, Peter

2017-05-01

Dimension shrinkage has been a major driving force in the development of integrated circuit processing over a number of decades. The Self-Aligned Quadruple Patterning (SAQP) technique is widely adapted for sub-10nm node in order to achieve the desired feature dimensions. This technique provides theoretical feasibility of multiple pitch-halving from 193nm immersion lithography by using various pattern transferring steps. The major concept of this approach is to a create spacer defined self-aligned pattern by using single lithography print. By repeating the process steps, double, quadruple, or octuple are possible to be achieved theoretically. In these small architectures, line roughness control becomes extremely important since it may contribute to a significant portion of process and device performance variations. In addition, the complexity of SAQP in terms of processing flow makes the roughness improvement indirective and ineffective. It is necessary to discover a new approach in order to improve the roughness in the current SAQP technique. In this presentation, we demonstrate a novel method to improve line roughness performances on 30nm pitch SAQP flow. We discover that the line roughness performance is strongly related to stress management. By selecting different stress level of film to be deposited onto the substrate, we can manipulate the roughness performance in line and space patterns. In addition, the impact of curvature change by applied film stress to SAQP line roughness performance is also studied. No significant correlation is found between wafer curvature and line roughness performance. We will discuss in details the step-by-step physical performances for each processing step in terms of critical dimension (CD)/ critical dimension uniformity (CDU)/line width roughness (LWR)/line edge roughness (LER). Finally, we summarize the process needed to reach the full wafer performance targets of LWR/LER in 1.07nm/1.13nm on 30nm pitch line and space pattern.

64nm pitch metal1 double patterning metrology: CD and OVL control by SEMCD, image based overlay and diffraction based overlay

NASA Astrophysics Data System (ADS)

Ducoté, Julien; Dettoni, Florent; Bouyssou, Régis; Le-Gratiet, Bertrand; Carau, Damien; Dezauzier, Christophe

2015-03-01

Patterning process control of advanced nodes has required major changes over the last few years. Process control needs of critical patterning levels since 28nm technology node is extremely aggressive showing that metrology accuracy/sensitivity must be finely tuned. The introduction of pitch splitting (Litho-Etch-Litho-Etch) at 14FDSOInm node requires the development of specific metrologies to adopt advanced process control (for CD, overlay and focus corrections). The pitch splitting process leads to final line CD uniformities that are a combination of the CD uniformities of the two exposures, while the space CD uniformities are depending on both CD and OVL variability. In this paper, investigations of CD and OVL process control of 64nm minimum pitch at Metal1 level of 14FDSOI technology, within the double patterning process flow (Litho, hard mask etch, line etch) are presented. Various measurements with SEMCD tools (Hitachi), and overlay tools (KT for Image Based Overlay - IBO, and ASML for Diffraction Based Overlay - DBO) are compared. Metrology targets are embedded within a block instanced several times within the field to perform intra-field process variations characterizations. Specific SEMCD targets were designed for independent measurement of both line CD (A and B) and space CD (A to B and B to A) for each exposure within a single measurement during the DP flow. Based on those measurements correlation between overlay determined with SEMCD and with standard overlay tools can be evaluated. Such correlation at different steps through the DP flow is investigated regarding the metrology type. Process correction models are evaluated with respect to the measurement type and the intra-field sampling.

78 FR 41079 - Certain Semiconductor Chips With Dram Circuitry, and Modules and Products Containing Same

Federal Register 2010, 2011, 2012, 2013, 2014

2013-07-09

... determined to review-in-part the final initial determination issued by the presiding administrative law judge... investigation. On March 26, 2013, the presiding administrative law judge (``ALJ'') issued a final ID finding a... importation, sale for importation, and sale after importation of Nanya semiconductors. What is Elpida's theory...

Analysis and Design of Manycore Processor-to-DRAM Opto-Electrical Networks with Integrated Silicon Photonics

DTIC Science & Technology

2009-12-24

Networks Silicon-Photonic Clos Networks for Global On-Chip Communication Ajay Joshi* Christopher Batten? Yong-Jin Kwon! Scott Beamer! Imran Shamim ...4th edition, 2007. •A\\ [13] A Joshi, C Batten, Y Kwon, S Beamer, Imran Shamim , Krste Asanovic, and Vladimir Sto- janovic. Silicon-photonic clos

Performance of ASML YieldStar μDBO overlay targets for advanced lithography nodes C028 and C014 overlay process control

NASA Astrophysics Data System (ADS)

Blancquaert, Yoann; Dezauzier, Christophe; Depre, Jerome; Miqyass, Mohamed; Beltman, Jan

2013-04-01

Continued tightening of overlay control budget in semiconductor lithography drives the need for improved metrology capabilities. Aggressive improvements are needed for overlay metrology speed, accuracy and precision. This paper is dealing with the on product metrology results of a scatterometry based platform showing excellent production results on resolution, precision, and tool matching for overlay. We will demonstrate point to point matching between tool generations as well as between target sizes and types. Nowadays, for the advanced process nodes a lot of information is needed (Higher order process correction, Reticle fingerprint, wafer edge effects) to quantify process overlay. For that purpose various overlay sampling schemes are evaluated: ultra- dense, dense and production type. We will show DBO results from multiple target type and shape for on product overlay control for current and future node down to at least 14 nm node. As overlay requirements drive metrology needs, we will evaluate if the new metrology platform meets the overlay requirements.

Microeconomics of process control in semiconductor manufacturing

NASA Astrophysics Data System (ADS)

Monahan, Kevin M.

2003-06-01

Process window control enables accelerated design-rule shrinks for both logic and memory manufacturers, but simple microeconomic models that directly link the effects of process window control to maximum profitability are rare. In this work, we derive these links using a simplified model for the maximum rate of profit generated by the semiconductor manufacturing process. We show that the ability of process window control to achieve these economic objectives may be limited by variability in the larger manufacturing context, including measurement delays and process variation at the lot, wafer, x-wafer, x-field, and x-chip levels. We conclude that x-wafer and x-field CD control strategies will be critical enablers of density, performance and optimum profitability at the 90 and 65nm technology nodes. These analyses correlate well with actual factory data and often identify millions of dollars in potential incremental revenue and cost savings. As an example, we show that a scatterometry-based CD Process Window Monitor is an economically justified, enabling technology for the 65nm node.

EUV lithography for 30nm half pitch and beyond: exploring resolution, sensitivity, and LWR tradeoffs

NASA Astrophysics Data System (ADS)

Putna, E. Steve; Younkin, Todd R.; Chandhok, Manish; Frasure, Kent

2009-03-01

The International Technology Roadmap for Semiconductors (ITRS) denotes Extreme Ultraviolet (EUV) lithography as a leading technology option for realizing the 32nm half-pitch node and beyond. Readiness of EUV materials is currently one high risk area according to assessments made at the 2008 EUVL Symposium. The main development issue regarding EUV resist has been how to simultaneously achieve high sensitivity, high resolution, and low line width roughness (LWR). This paper describes the strategy and current status of EUV resist development at Intel Corporation. Data is presented utilizing Intel's Micro-Exposure Tool (MET) examining the feasibility of establishing a resist process that simultaneously exhibits <=30nm half-pitch (HP) L/S resolution at <=10mJ/cm2 with <=4nm LWR.

EUV lithography for 22nm half pitch and beyond: exploring resolution, LWR, and sensitivity tradeoffs

NASA Astrophysics Data System (ADS)

Putna, E. Steve; Younkin, Todd R.; Caudillo, Roman; Chandhok, Manish

2010-04-01

The International Technology Roadmap for Semiconductors (ITRS) denotes Extreme Ultraviolet (EUV) lithography as a leading technology option for realizing the 22nm half pitch node and beyond. Readiness of EUV materials is currently one high risk area according to recent assessments made at the 2009 EUVL Symposium. The main development issue regarding EUV resist has been how to simultaneously achieve high sensitivity, high resolution, and low line width roughness (LWR). This paper describes the strategy and current status of EUV resist development at Intel Corporation. Data collected utilizing Intel's Micro-Exposure Tool (MET) is presented in order to examine the feasibility of establishing a resist process that simultaneously exhibits <=22nm half-pitch (HP) L/S resolution at <= 12.5mJ/cm2 with <= 4nm LWR.

Meeting critical gate linewidth control needs at the 65 nm node

NASA Astrophysics Data System (ADS)

Mahorowala, Arpan; Halle, Scott; Gabor, Allen; Chu, William; Barberet, Alexandra; Samuels, Donald; Abdo, Amr; Tsou, Len; Yan, Wendy; Iseda, Seiji; Patel, Kaushal; Dirahoui, Bachir; Nomura, Asuka; Ahsan, Ishtiaq; Azam, Faisal; Berg, Gary; Brendler, Andrew; Zimmerman, Jeffrey; Faure, Tom

2006-03-01

With the nominal gate length at the 65 nm node being only 35 nm, controlling the critical dimension (CD) in polysilicon to within a few nanometers is essential to achieve a competitive power-to-performance ratio. Gate linewidths must be controlled, not only at the chip level so that the chip performs as the circuit designers and device engineers had intended, but also at the wafer level so that more chips with the optimum power-to-performance ratio are manufactured. Achieving tight across-chip linewidth variation (ACLV) and chip mean variation (CMV) is possible only if the mask-making, lithography, and etching processes are all controlled to very tight specifications. This paper identifies the various ACLV and CMV components, describes their root causes, and discusses a methodology to quantify them. For example, the site-to-site ACLV component is divided into systematic and random sub-components. The systematic component of the variation is attributed in part to pattern density variation across the field, and variation in exposure dose across the slit. The paper demonstrates our team's success in achieving the tight gate CD tolerances required for 65 nm technology. Certain key challenges faced, and methods employed to overcome them are described. For instance, the use of dose-compensation strategies to correct the small but systematic CD variations measured across the wafer, is described. Finally, the impact of immersion lithography on both ACLV and CMV is briefly discussed.

Tannic acid-modified silver nanoparticles for wound healing: the importance of size

PubMed Central

Orlowski, Piotr; Zmigrodzka, Magdalena; Tomaszewska, Emilia; Ranoszek-Soliwoda, Katarzyna; Czupryn, Monika; Antos-Bielska, Malgorzata; Szemraj, Janusz; Celichowski, Grzegorz; Grobelny, Jaroslaw

2018-01-01

Introduction Silver nanoparticles (AgNPs) have been shown to promote wound healing and to exhibit antimicrobial properties against a broad range of bacteria. In our previous study, we prepared tannic acid (TA)-modified AgNPs showing a good toxicological profile and immunomodulatory properties useful for potential dermal applications. Methods In this study, in vitro scratch assay, antimicrobial tests, modified lymph node assay as well as a mouse splint wound model were used to access the wound healing potential of TA-modified and unmodified AgNPs. Results TA-modified but not unmodified AgNPs exhibited effective antibacterial activity against Pseudomonas aeruginosa, Staphylococcus aureus and Escherichia coli and stimulated migration of keratinocytes in vitro. The tests using the mouse splint wound model showed that TA-modified 33 and 46 nm AgNPs promoted better wound closure, epithelialization, angiogenesis and formation of the granulation tissue. Additionally, AgNPs elicited expression of VEGF-α, PDGF-β and TGF-β1 cytokines involved in wound healing more efficiently in comparison to control and TA-treated wounds. However, both the lymph node assay and the wound model showed that TA-modified AgNPs sized 13 nm can elicit strong inflammatory response not only during wound healing but also when applied to the damaged skin. Conclusion TA-modified AgNPs sized >26 nm promote wound healing better than TA-modified or unmodified AgNPs. These findings suggest that TA-modified AgNPs sized >26 nm may have a promising application in wound management. PMID:29497293

Ultimate intra-wafer critical dimension uniformity control by using lithography and etch tool corrections

NASA Astrophysics Data System (ADS)

Kubis, Michael; Wise, Rich; Reijnen, Liesbeth; Viatkina, Katja; Jaenen, Patrick; Luca, Melisa; Mernier, Guillaume; Chahine, Charlotte; Hellin, David; Kam, Benjamin; Sobieski, Daniel; Vertommen, Johan; Mulkens, Jan; Dusa, Mircea; Dixit, Girish; Shamma, Nader; Leray, Philippe

2016-03-01

With shrinking design rules, the overall patterning requirements are getting aggressively tighter. For the 7-nm node and below, allowable CD uniformity variations are entering the Angstrom region (ref [1]). Optimizing inter- and intra-field CD uniformity of the final pattern requires a holistic tuning of all process steps. In previous work, CD control with either litho cluster or etch tool corrections has been discussed. Today, we present a holistic CD control approach, combining the correction capability of the etch tool with the correction capability of the exposure tool. The study is done on 10-nm logic node wafers, processed with a test vehicle stack patterning sequence. We include wafer-to-wafer and lot-to-lot variation and apply optical scatterometry to characterize the fingerprints. Making use of all available correction capabilities (lithography and etch), we investigated single application of exposure tool corrections and of etch tool corrections as well as combinations of both to reach the lowest CD uniformity. Results of the final pattern uniformity based on single and combined corrections are shown. We conclude on the application of this holistic lithography and etch optimization to 7nm High-Volume manufacturing, paving the way to ultimate within-wafer CD uniformity control.

IR-drop analysis for validating power grids and standard cell architectures in sub-10nm node designs

NASA Astrophysics Data System (ADS)

Ban, Yongchan; Wang, Chenchen; Zeng, Jia; Kye, Jongwook

2017-03-01

Since chip performance and power are highly dependent on the operating voltage, the robust power distribution network (PDN) is of utmost importance in designs to provide with the reliable voltage without voltage (IR)-drop. However, rapid increase of parasitic resistance and capacitance (RC) in interconnects makes IR-drop much worse with technology scaling. This paper shows various IR-drop analyses in sub 10nm designs. The major objectives are to validate standard cell architectures, where different sizes of power/ground and metal tracks are validated, and to validate PDN architecture, where types of power hook-up approaches are evaluated with IR-drop calculation. To estimate IR-drops in 10nm and below technologies, we first prepare physically routed designs given standard cell libraries, where we use open RISC RTL, synthesize the CPU, and apply placement & routing with process-design kits (PDK). Then, static and dynamic IR-drop flows are set up with commercial tools. Using the IR-drop flow, we compare standard cell architectures, and analysis impacts on performance, power, and area (PPA) with the previous technology-node designs. With this IR-drop flow, we can optimize the best PDN structure against IR-drops as well as types of standard cell library.

Boundary-based cellwise OPC for standard-cell layouts

NASA Astrophysics Data System (ADS)

Pawlowski, David M.; Deng, Liang; Wong, Martin D. F.

2007-03-01

Model based optical proximity correction (OPC) has become necessary at 90nm technology node. Cellwise OPC is an attractive technique to reduce the mask data size as well as the prohibitive runtime of full-chip OPC. As feature dimensions have gotten smaller, the radius of influence for edge features has extended further into neighboring cells such that it is no longer sufficient to perform cellwise OPC independent of neighboring cells, especially for the critical layers. The methodology described in this work accounts for features in neighboring cells and allows a cellwise approach to be applied to cells with a printed gate length of 45nm with the projection that it can also be applied to future technology nodes. OPC-ready cells are generated at library creation (independent of placement) using a boundary-based technique. Each cell has a tractable number of OPC-ready versions due to an intelligent characterization of standard cell layout features. Results are very promising: the average edge placement error (EPE) for all metal1 features in 100 layouts is 0.731nm which is less than 1% of metal1 width; the maximum EPE for poly features reduced to 1/3, compared to cellwise OPC without considering boundaries, creating similar levels of lithographic accuracy while obviating any of the drawbacks inherent in layout specific full-chip model-based OPC.

A Low-Complexity Euclidean Orthogonal LDPC Architecture for Low Power Applications.

PubMed

Revathy, M; Saravanan, R

2015-01-01

Low-density parity-check (LDPC) codes have been implemented in latest digital video broadcasting, broadband wireless access (WiMax), and fourth generation of wireless standards. In this paper, we have proposed a high efficient low-density parity-check code (LDPC) decoder architecture for low power applications. This study also considers the design and analysis of check node and variable node units and Euclidean orthogonal generator in LDPC decoder architecture. The Euclidean orthogonal generator is used to reduce the error rate of the proposed LDPC architecture, which can be incorporated between check and variable node architecture. This proposed decoder design is synthesized on Xilinx 9.2i platform and simulated using Modelsim, which is targeted to 45 nm devices. Synthesis report proves that the proposed architecture greatly reduces the power consumption and hardware utilizations on comparing with different conventional architectures.

Manufacturability study of masks created by inverse lithography technology (ILT)

NASA Astrophysics Data System (ADS)

Martin, Patrick M.; Progler, C. J.; Xiao, G.; Gray, R.; Pang, L.; Liu, Y.

2005-11-01

As photolithography is pushed to fabricate deep-sub wavelength devices for 90nm, 65nm and smaller technology nodes using available exposure tools (i.e., 248nm, 193nm steppers), photomask capability is becoming extremely critical. For example, PSM masks require more complicated processing; aggressive OPC makes the writing time longer and sometimes unpredictable; and, high MEEF imposes much more stringent demands on mask quality. Therefore, in order for any new lithography technology to be adopted into production, mask manufacturability must be studied thoroughly and carefully. In this paper we will present the mask manufacturability study on mask patterns created using Inverse Lithography Technology (ILT). Unlike conventional OPC methodologies, ILT uses a unique outcome-based technology to mathematically determine the mask features that produce the desired on-wafer results. ILT solves the most critical litho challenges of the deep sub-wavelength era. Potential benefits include: higher yield; expanded litho process windows; superb pattern fidelity at 90, 65 & 45-nm nodes; and reduced time-to-silicon - all without changing the existing lithography infrastructure and design-to-silicon flow. In this study a number of cell structures were selected and used as test patterns. "Luminized patterns" were generated for binary mask and attenuated phase-shift mask. Both conventional OPC patterns and "luminized patterns" were put on a test reticle side by side, and they all have a number of variations in term of correction aggressivity level and mask complexity. Mask manufacturability, including data fracturing, writing time, mask inspection, and metrology were studied. The results demonstrate that, by optimizing the inspection recipe, masks created using ILT technology can be made and qualified using current processes with a reasonable turn-around time.

FPGA chip performance improvement with gate shrink through alternating PSM 90nm process

NASA Astrophysics Data System (ADS)

Yu, Chun-Chi; Shieh, Ming-Feng; Liu, Erick; Lin, Benjamin; Ho, Jonathan; Wu, Xin; Panaite, Petrisor; Chacko, Manoj; Zhang, Yunqiang; Lei, Wen-Kang

2005-11-01

In the post-physical verification space called 'Mask Synthesis' a key component of design-for-manufacturing (DFM), double-exposure based, dark-field, alternating PSM (Alt-PSM) is being increasingly applied at the 90nm node in addition with other mature resolution enhancement techniques (RETs) such as optical proximity correction (OPC) and sub-resolution assist features (SRAF). Several high-performance IC manufacturers already use alt-PSM technology in 65nm production. At 90nm having strong control over the lithography process is a critical component in meeting targeted yield goals. However, implementing alt-PSM in production has been challenging due to several factors such as phase conflict errors, mask manufacturing, and the increased production cost due to the need for two masks in the process. Implementation of Alt-PSM generally requires phase compliance rules and proper phase topology in the layout and this has been successful for the technology node with these rules implemented. However, this may not be true for a mature, production process technology, in this case 90 nm. Especially, in the foundry-fabless business model where the foundry provides a standard set of design rules to its customers for a given process technology, and where not all the foundry customers require Alt-PSM in their tapeout flow. With minimum design changes, design houses usually are motivated by higher product performance for the existing designs. What follows is an in-depth review of the motivation to apply alt-PSM on a production FPGA, the DFM challenges to each partner faced, its effect on the tapeout flow, and how design, manufacturing, and EDA teams worked together to resolve phase conflicts, tapeout the chip, and finally verify the silicon results in production.

Self-aligned blocking integration demonstration for critical sub-40nm pitch Mx level patterning

NASA Astrophysics Data System (ADS)

Raley, Angélique; Mohanty, Nihar; Sun, Xinghua; Farrell, Richard A.; Smith, Jeffrey T.; Ko, Akiteru; Metz, Andrew W.; Biolsi, Peter; Devilliers, Anton

2017-04-01

Multipatterning has enabled continued scaling of chip technology at the 28nm node and beyond. Selfaligned double patterning (SADP) and self-aligned quadruple patterning (SAQP) as well as Litho- Etch/Litho-Etch (LELE) iterations are widely used in the semiconductor industry to enable patterning at sub 193 immersion lithography resolutions for layers such as FIN, Gate and critical Metal lines. Multipatterning requires the use of multiple masks which is costly and increases process complexity as well as edge placement error variation driven mostly by overlay. To mitigate the strict overlay requirements for advanced technology nodes (7nm and below), a self-aligned blocking integration is desirable. This integration trades off the overlay requirement for an etch selectivity requirement and enables the cut mask overlay tolerance to be relaxed from half pitch to three times half pitch. Selfalignement has become the latest trend to enable scaling and self-aligned integrations are being pursued and investigated for various critical layers such as contact, via, metal patterning. In this paper we propose and demonstrate a low cost flexible self-aligned blocking strategy for critical metal layer patterning for 7nm and beyond from mask assembly to low -K dielectric etch. The integration is based on a 40nm pitch SADP flow with 2 cut masks compatible with either cut or block integration and employs dielectric films widely used in the back end of the line. As a consequence this approach is compatible with traditional etch, deposition and cleans tools that are optimized for dielectric etches. We will review the critical steps and selectivities required to enable this integration along with bench-marking of each integration option (cut vs. block).

OPC model data collection for 45-nm technology node using automatic CD-SEM offline recipe creation

NASA Astrophysics Data System (ADS)

Fischer, Daniel; Talbi, Mohamed; Wei, Alex; Menadeva, Ovadya; Cornell, Roger

2007-03-01

Optical and Process Correction in the 45nm node is requiring an ever higher level of characterization. The greater complexity drives a need for automation of the metrology process allowing more efficient, accurate and effective use of the engineering resources and metrology tool time in the fab, helping to satisfy what seems an insatiable appetite for data by lithographers and modelers charged with development of 45nm and 32nm processes. The scope of the work referenced here is a 45nm design cycle "full-loop automation", starting with gds formatted target design layout and ending with the necessary feedback of one and two dimensional printed wafer metrology. In this paper the authors consider the key elements of software, algorithmic framework and Critical Dimension Scanning Electron Microscope (CDSEM) functionality necessary to automate its recipe creation. We evaluate specific problems with the methodology of the former art, "on-tool on-wafer" recipe construction, and discuss how the implementation of the design based recipe generation improves upon the overall metrology process. Individual target-by-target construction, use of a one pattern recognition template fits all approach, a blind navigation to the desired measurement feature, lengthy sessions on tool to construct recipes and limited ability to determine measurement quality in the resultant data set are each discussed as to how the state of the art Design Based Metrology (DBM) approach is implemented. The offline created recipes have shown pattern recognition success rates of up to 100% and measurement success rates of up to 93% for line/space as well as for 2D Minimum/Maximum measurements without manual assists during measurement.

Using temperature to reduce noise in quantum frequency conversion.

PubMed

Kuo, Paulina S; Pelc, Jason S; Langrock, Carsten; Fejer, M M

2018-05-01

Quantum frequency conversion is important in quantum networks to interface nodes operating at different wavelengths and to enable long-distance quantum communication using telecommunications wavelengths. Unfortunately, frequency conversion in actual devices is not a noise-free process. One main source of noise is spontaneous Raman scattering, which can be reduced by lowering the device operating temperature. We explore frequency conversion of 1554 nm photons to 837 nm using a 1813 nm pump in a periodically poled lithium niobate waveguide device. By reducing the temperature from 85°C to 40°C, we show a three-fold reduction in dark count rates, which is in good agreement with theory.

The Dram As An X-Ray Sensor

NASA Astrophysics Data System (ADS)

Jacobs, Alan M.; Cox, John D.; Juang, Yi-Shung

1987-01-01

A solid-state digital x-ray detector is described which can replace high resolution film in industrial radiography and has potential for application in some medical imaging. Because of the 10 micron pixel pitch on the sensor, contact magnification radiology is possible and is demonstrated. Methods for frame speed increase and integration of sensor to a large format are discussed.

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, y numerosas enanas tenues - son los bloques básicos visibles de la construcción del universo. Las aislados (y sí, llamados Grupos Compactos de Galaxias o CGs ). Las galaxias en estos grupos compactos muestran diferencias dramáticas en la forma en que evolucionan y cambian con el paso del tiempo en

DARPA/ISTO Rapid VLSI Implementation

DTIC Science & Technology

1991-12-01

temperature tigation. Motorola MCI00E111, very fast 1:9 clock buffers. were procured to drive high - speed waveforrms onto the substrate clock distribution...The hot image is normalized to a rootn- temperature image, which removes all optical anomalies and leaves a high -resolution thermal image. 69 j APT...9 High -density DRAM ..................... 9 Aquarius MI Packaging Study ........................ ....... 10 NUT Alewife

The Reduction of TED in Ion Implanted Silicon

NASA Astrophysics Data System (ADS)

Jain, Amitabh

2008-11-01

The leading challenge in the continued scaling of junctions made by ion implantation and annealing is the control of the undesired transient enhanced diffusion (TED) effect. Spike annealing has been used as a means to reduce this effect and has proven successful in previous nodes. The peak temperature in this process is typically 1050 °C and the time spent within 50 °C of the peak is of the order of 1.5 seconds. As technology advances along the future scaling roadmap, further reduction or elimination of the enhanced diffusion effect is necessary. We have shown that raising the peak temperature to 1175 °C or more and reduction of the anneal time at peak temperature to less than a millisecond is effective in eliminating enhanced diffusion. We show that it is possible to employ a sequence of millisecond anneal followed by spike anneal to obtain profiles that do not exhibit gradient degradation at the junction and have junction depth and sheet resistance appropriate to the needs of future technology nodes. We have implemented millisecond annealing using a carbon dioxide laser to support high-volume manufacturing of 65 nm microprocessors and system-on-chip products. We further show how the use of molecular ion implantation to produce amorphousness followed by laser annealing to produce solid phase epitaxial regrowth results in junctions that meet the shallow depth and abruptness requirements of the 32 nm node.

GSFC Cutting Edge Avionics Technologies for Spacecraft

NASA Technical Reports Server (NTRS)

Luers, Philip J.; Culver, Harry L.; Plante, Jeannette

1998-01-01

With the launch of NASA's first fiber optic bus on SAMPEX in 1992, GSFC has ushered in an era of new technology development and insertion into flight programs. Predating such programs the Lewis and Clark missions and the New Millenium Program, GSFC has spearheaded the drive to use cutting edge technologies on spacecraft for three reasons: to enable next generation Space and Earth Science, to shorten spacecraft development schedules, and to reduce the cost of NASA missions. The technologies developed have addressed three focus areas: standard interface components, high performance processing, and high-density packaging techniques enabling lower cost systems. To realize the benefits of standard interface components GSFC has developed and utilized radiation hardened/tolerant devices such as PCI target ASICs, Parallel Fiber Optic Data Bus terminals, MIL-STD-1773 and AS1773 transceivers, and Essential Services Node. High performance processing has been the focus of the Mongoose I and Mongoose V rad-hard 32-bit processor programs as well as the SMEX-Lite Computation Hub. High-density packaging techniques have resulted in 3-D stack DRAM packages and Chip-On-Board processes. Lower cost systems have been demonstrated by judiciously using all of our technology developments to enable "plug and play" scalable architectures. The paper will present a survey of development and insertion experiences for the above technologies, as well as future plans to enable more "better, faster, cheaper" spacecraft. Details of ongoing GSFC programs such as Ultra-Low Power electronics, Rad-Hard FPGAs, PCI master ASICs, and Next Generation Mongoose processors.

Reliable high-power injection locked 6kHz 60W laser for ArF immersion lithography

NASA Astrophysics Data System (ADS)

Watanabe, Hidenori; Komae, Shigeo; Tanaka, Satoshi; Nohdomi, Ryoichi; Yamazaki, Taku; Nakarai, Hiroaki; Fujimoto, Junichi; Matsunaga, Takashi; Saito, Takashi; Kakizaki, Kouji; Mizoguchi, Hakaru

2007-03-01

Reliable high power 193nm ArF light source is desired for the successive growth of ArF-immersion technology for 45nm node generation. In 2006, Gigaphoton released GT60A, high power injection locked 6kHz/60W/0.5pm (E95) laser system, to meet the demands of semiconductor markets. In this paper, we report key technologies for reliable mass production GT laser systems and GT60A high durability performance test results up to 20 billion pulses.

Modeling and characterization of shielded low loss CPWs on 65 nm node silicon

NASA Astrophysics Data System (ADS)

Hongrui, Wang; Dongxu, Yang; Li, Zhang; Lei, Zhang; Zhiping, Yu

2011-06-01

Coplanar waveguides (CPWs) are promising candidates for high quality passive devices in millimeter-wave frequency bands. In this paper, CPW transmission lines with and without ground shields have been designed and fabricated on 65 nm CMOS technology. A physical-based model is proposed to describe the frequency-dependent per-unit-length L, C, R and G parameters. Starting with a basic CPW structure, the slow-wave effect and ground-shield influence have been analyzed and incorporated into the general model. The accuracy of the model is confirmed by experimental results.

Three-dimensional Optical Coherence Tomography for Optical Biopsy of Lymph Nodes and Assessment of Metastatic Disease

PubMed Central

John, Renu; Adie, Steven G.; Chaney, Eric J.; Marjanovic, Marina; Tangella, Krishnarao V.; Boppart, Stephen A.

2013-01-01

Background Numerous techniques have been developed for localizing lymph nodes before surgical resection and for their histological assessment. Nondestructive high-resolution transcapsule optical imaging of lymph nodes offers the potential for in situ assessment of metastatic involvement, potentially during surgical procedures. Methods Three-dimensional optical coherence tomography (3-D OCT) was used for imaging and assessing resected popliteal lymph nodes from a preclinical rat metastatic tumor model over a 9-day time-course study after tumor induction. The spectral-domain OCT system utilized a center wavelength of 800 nm, provided axial and transverse resolutions of 3 and 12 µm, respectively, and performed imaging at 10,000 axial scans per second. Results OCT is capable of providing high-resolution labelfree images of intact lymph node microstructure based on intrinsic optical scattering properties with penetration depths of ~1–2 mm. The results demonstrate that OCT is capable of differentiating normal, reactive, and metastatic lymph nodes based on microstructural changes. The optical scattering and structural changes revealed by OCT from day 3 to day 9 after the injection of tumor cells into the lymphatic system correlate with inflammatory and immunological changes observed in the capsule, precortical regions, follicles, and germination centers found during histopathology. Conclusions We report for the first time a longitudinal study of 3-D transcapsule OCT imaging of intact lymph nodes demonstrating microstructural changes during metastatic infiltration. These results demonstrate the potential of OCT as a technique for intraoperative, real-time in situ 3-D optical biopsy of lymph nodes for the intraoperative staging of cancer. PMID:22688663

Complete data preparation flow for Massively Parallel E-Beam lithography on 28nm node full-field design

NASA Astrophysics Data System (ADS)

Fay, Aurélien; Browning, Clyde; Brandt, Pieter; Chartoire, Jacky; Bérard-Bergery, Sébastien; Hazart, Jérôme; Chagoya, Alexandre; Postnikov, Sergei; Saib, Mohamed; Lattard, Ludovic; Schavione, Patrick

2016-03-01

Massively parallel mask-less electron beam lithography (MP-EBL) offers a large intrinsic flexibility at a low cost of ownership in comparison to conventional optical lithography tools. This attractive direct-write technique needs a dedicated data preparation flow to correct both electronic and resist processes. Moreover, Data Prep has to be completed in a short enough time to preserve the flexibility advantage of MP-EBL. While the MP-EBL tools have currently entered an advanced stage of development, this paper will focus on the data preparation side of the work for specifically the MAPPER Lithography FLX-1200 tool [1]-[4], using the ASELTA Nanographics Inscale software. The complete flow as well as the methodology used to achieve a full-field layout data preparation, within an acceptable cycle time, will be presented. Layout used for Data Prep evaluation was one of a 28 nm technology node Metal1 chip with a field size of 26x33mm2, compatible with typical stepper/scanner field sizes and wafer stepping plans. Proximity Effect Correction (PEC) was applied to the entire field, which was then exported as a single file to MAPPER Lithography's machine format, containing fractured shapes and dose assignments. The Soft Edge beam to beam stitching method was employed in the specific overlap regions defined by the machine format as well. In addition to PEC, verification of the correction was included as part of the overall data preparation cycle time. This verification step was executed on the machine file format to ensure pattern fidelity and accuracy as late in the flow as possible. Verification over the full chip, involving billions of evaluation points, is performed both at nominal conditions and at Process Window corners in order to ensure proper exposure and process latitude. The complete MP-EBL data preparation flow was demonstrated for a 28 nm node Metal1 layout in 37 hours. The final verification step shows that the Edge Placement Error (EPE) is kept below 2.25 nm over an exposure dose variation of 8%.

Soft error rate simulation and initial design considerations of neutron intercepting silicon chip (NISC)

NASA Astrophysics Data System (ADS)

Celik, Cihangir

Advances in microelectronics result in sub-micrometer electronic technologies as predicted by Moore's Law, 1965, which states the number of transistors in a given space would double every two years. The most available memory architectures today have submicrometer transistor dimensions. The International Technology Roadmap for Semiconductors (ITRS), a continuation of Moore's Law, predicts that Dynamic Random Access Memory (DRAM) will have an average half pitch size of 50 nm and Microprocessor Units (MPU) will have an average gate length of 30 nm over the period of 2008-2012. Decreases in the dimensions satisfy the producer and consumer requirements of low power consumption, more data storage for a given space, faster clock speed, and portability of integrated circuits (IC), particularly memories. On the other hand, these properties also lead to a higher susceptibility of IC designs to temperature, magnetic interference, power supply, and environmental noise, and radiation. Radiation can directly or indirectly affect device operation. When a single energetic particle strikes a sensitive node in the micro-electronic device, it can cause a permanent or transient malfunction in the device. This behavior is called a Single Event Effect (SEE). SEEs are mostly transient errors that generate an electric pulse which alters the state of a logic node in the memory device without having a permanent effect on the functionality of the device. This is called a Single Event Upset (SEU) or Soft Error . Contrary to SEU, Single Event Latchup (SEL), Single Event Gate Rapture (SEGR), or Single Event Burnout (SEB) they have permanent effects on the device operation and a system reset or recovery is needed to return to proper operations. The rate at which a device or system encounters soft errors is defined as Soft Error Rate (SER). The semiconductor industry has been struggling with SEEs and is taking necessary measures in order to continue to improve system designs in nano-scale technologies. Prevention of SEEs has been studied and applied in the semiconductor industry by including radiation protection precautions in the system architecture or by using corrective algorithms in the system operation. Decreasing 10B content (20%of natural boron) in the natural boron of Borophosphosilicate glass (BPSG) layers that are conventionally used in the fabrication of semiconductor devices was one of the major radiation protection approaches for the system architecture. Neutron interaction in the BPSG layer was the origin of the SEEs because of the 10B (n,alpha) 7Li reaction products. Both of the particles produced have the capability of ionization in the silicon substrate region, whose thickness is comparable to the ranges of these particles. Using the soft error phenomenon in exactly the opposite manner of the semiconductor industry can provide a new neutron detection system based on the SERs in the semiconductor memories. By investigating the soft error mechanisms in the available semiconductor memories and enhancing the soft error occurrences in these devices, one can convert all memory using intelligent systems into portable, power efficient, directiondependent neutron detectors. The Neutron Intercepting Silicon Chip (NISC) project aims to achieve this goal by introducing 10B-enriched BPSG layers to the semiconductor memory architectures. This research addresses the development of a simulation tool, the NISC Soft Error Analysis Tool (NISCSAT), for soft error modeling and analysis in the semiconductor memories to provide basic design considerations for the NISC. NISCSAT performs particle transport and calculates the soft error probabilities, or SER, depending on energy depositions of the particles in a given memory node model of the NISC. Soft error measurements were performed with commercially available, off-the-shelf semiconductor memories and microprocessors to observe soft error variations with the neutron flux and memory supply voltage. Measurement results show that soft errors in the memories increase proportionally with the neutron flux, whereas they decrease with increasing the supply voltages. NISC design considerations include the effects of device scaling, 10B content in the BPSG layer, incoming neutron energy, and critical charge of the node for this dissertation. NISCSAT simulations were performed with various memory node models to account these effects. Device scaling simulations showed that any further increase in the thickness of the BPSG layer beyond 2 mum causes self-shielding of the incoming neutrons due to the BPSG layer and results in lower detection efficiencies. Moreover, if the BPSG layer is located more than 4 mum apart from the depletion region in the node, there are no soft errors in the node due to the fact that both of the reaction products have lower ranges in the silicon or any possible node layers. Calculation results regarding the critical charge indicated that the mean charge deposition of the reaction products in the sensitive volume of the node is about 15 fC. It is evident that the NISC design should have a memory architecture with a critical charge of 15 fC or less to obtain higher detection efficiencies. Moreover, the sensitive volume should be placed in close proximity to the BPSG layers so that its location would be within the range of alpha and 7Li particles. Results showed that the distance between the BPSG layer and the sensitive volume should be less than 2 mum to increase the detection efficiency of the NISC. Incoming neutron energy was also investigated by simulations and the results obtained from these simulations showed that NISC neutron detection efficiency is related with the neutron cross-sections of 10B (n,alpha) 7Li reaction, e.g., ratio of the thermal (0.0253 eV) to fast (2 MeV) neutron detection efficiencies is approximately equal to 8000:1. Environmental conditions and their effects on the NISC performance were also studied in this research. Cosmic rays were modeled and simulated via NISCSAT to investigate detection reliability of the NISC. Simulation results show that cosmic rays account for less than 2 % of the soft errors for the thermal neutron detection. On the other hand, fast neutron detection by the NISC, which already has a poor efficiency due to the low neutron cross-sections, becomes almost impossible at higher altitudes where the cosmic ray fluxes and their energies are higher. NISCSAT simulations regarding soft error dependency of the NISC for temperature and electromagnetic fields show that there are no significant effects in the NISC detection efficiency. Furthermore, the detection efficiency of the NISC decreases with both air humidity and use of moderators since the incoming neutrons scatter away before reaching the memory surface.

A Low-Complexity Euclidean Orthogonal LDPC Architecture for Low Power Applications

PubMed Central

Revathy, M.; Saravanan, R.

2015-01-01

Low-density parity-check (LDPC) codes have been implemented in latest digital video broadcasting, broadband wireless access (WiMax), and fourth generation of wireless standards. In this paper, we have proposed a high efficient low-density parity-check code (LDPC) decoder architecture for low power applications. This study also considers the design and analysis of check node and variable node units and Euclidean orthogonal generator in LDPC decoder architecture. The Euclidean orthogonal generator is used to reduce the error rate of the proposed LDPC architecture, which can be incorporated between check and variable node architecture. This proposed decoder design is synthesized on Xilinx 9.2i platform and simulated using Modelsim, which is targeted to 45 nm devices. Synthesis report proves that the proposed architecture greatly reduces the power consumption and hardware utilizations on comparing with different conventional architectures. PMID:26065017

Lipid nanoparticle vectorization of indocyanine green improves fluorescence imaging for tumor diagnosis and lymph node resection.

PubMed

Navarro, Fabrice P; Berger, Michel; Guillermet, Stéphanie; Josserand, Véronique; Guyon, Laurent; Neumann, Emmanuelle; Vinet, Françoise; Texier, Isabelle

2012-10-01

Fluorescence imaging is opening a new era in image-guided surgery and other medical applications. The only FDA approved contrast agent in the near infrared is IndoCyanine Green (ICG), which despites its low toxicity, displays poor chemical and optical properties for long-term and sensitive imaging applications in human. Lipid nanoparticles are investigated for improving ICG optical properties and in vivo fluorescence imaging sensitivity. 30 nm diameter lipid nanoparticles (LNP) are loaded with ICG. Their characterization and use for tumor and lymph node imaging are described. Nano-formulation benefits dye optical properties (6 times improved brightness) and chemical stability (>6 months at 4 degrees C in aqueous buffer). More importantly, LNP vectorization allows never reported sensitive and prolonged (>1 day) labeling of tumors and lymph nodes. Composed of human-use approved ingredients, this novel ICG nanometric formulation is foreseen to expand rapidly the field of clinical fluorescence imaging applications.

Sensitivity enhancement of chemically amplified resists and performance study using EUV interference lithography

NASA Astrophysics Data System (ADS)

Buitrago, Elizabeth; Nagahara, Seiji; Yildirim, Oktay; Nakagawa, Hisashi; Tagawa, Seiichi; Meeuwissen, Marieke; Nagai, Tomoki; Naruoka, Takehiko; Verspaget, Coen; Hoefnagels, Rik; Rispens, Gijsbert; Shiraishi, Gosuke; Terashita, Yuichi; Minekawa, Yukie; Yoshihara, Kosuke; Oshima, Akihiro; Vockenhuber, Michaela; Ekinci, Yasin

2016-03-01

Extreme ultraviolet lithography (EUVL, λ = 13.5 nm) is the most promising candidate to manufacture electronic devices for future technology nodes in the semiconductor industry. Nonetheless, EUVL still faces many technological challenges as it moves toward high-volume manufacturing (HVM). A key bottleneck from the tool design and performance point of view has been the development of an efficient, high power EUV light source for high throughput production. Consequently, there has been extensive research on different methodologies to enhance EUV resist sensitivity. Resist performance is measured in terms of its ultimate printing resolution, line width roughness (LWR), sensitivity (S or best energy BE) and exposure latitude (EL). However, there are well-known fundamental trade-off relationships (LRS trade-off) among these parameters for chemically amplified resists (CARs). Here we present early proof-of-principle results for a multi-exposure lithography process that has the potential for high sensitivity enhancement without compromising other important performance characteristics by the use of a Photosensitized Chemically Amplified Resist (PSCAR). With this method, we seek to increase the sensitivity by combining a first EUV pattern exposure with a second UV flood exposure (λ = 365 nm) and the use of a PSCAR. In addition, we have evaluated over 50 different state-of-the-art EUV CARs. Among these, we have identified several promising candidates that simultaneously meet sensitivity, LWR and EL high performance requirements with the aim of resolving line space (L/S) features for the 7 and 5 nm logic node (16 nm and 13 nm half-pitch HP, respectively) for HVM. Several CARs were additionally found to be well resolved down to 12 nm and 11 nm HP with minimal pattern collapse and bridging, a remarkable feat for CARs. Finally, the performance of two negative tone state-of-the-art alternative resist platforms previously investigated was compared to the CAR performance at and below 16 nm HP resolution, demonstrating the need for alternative resist solutions at 13 nm resolution and below. EUV interference lithography (IL) has provided and continues to provide a simple yet powerful platform for academic and industrial research enabling the characterization and development of new resist materials before commercial EUV exposure tools become available. Our experiments have been performed at the EUV-IL set-up in the Swiss Light Source (SLS) synchrotron facility located at the Paul Scherrer Institute (PSI).

Demonstration of a roving-host wireless sensor network for rapid assessment monitoring of structural health

NASA Astrophysics Data System (ADS)

Mascarenas, David D. L.; Flynn, Eric; Lin, Kaisen; Farinholt, Kevin; Park, Gyuhae; Gupta, Rajesh; Todd, Michael; Farrar, Charles

2008-03-01

A major challenge impeding the deployment of wireless sensor networks for structural health monitoring (SHM) is developing means to supply power to the sensor nodes in a cost-effective manner. In this work an initial test of a roving-host wireless sensor network was performed on a bridge near Truth or Consequences, NM in August of 2007. The roving-host wireless sensor network features a radio controlled helicopter responsible for wirelessly delivering energy to sensor nodes on an "as-needed" basis. In addition, the helicopter also serves as a central data repository and processing center for the information collected by the sensor network. The sensor nodes used on the bridge were developed for measuring the peak displacement of the bridge, as well as measuring the preload of some of the bolted joints in the bridge. These sensors and sensor nodes were specifically designed to be able to operate from energy supplied wirelessly from the helicopter. The ultimate goal of this research is to ease the requirement for battery power supplies in wireless sensor networks.

Impact of line edge roughness on the performance of 14-nm FinFET: Device-circuit Co-design

NASA Astrophysics Data System (ADS)

Rathore, Rituraj Singh; Rana, Ashwani K.

2018-01-01

With the evolution of sub-20 nm FinFET technology, line edge roughness (LER) has been identified as a critical problem and may result in critical device parameter variation and performance limitation in the future VLSI circuit application. In the present work, an analytical model of fin-LER has been presented, which shows the impact of correlated and uncorrelated LER on FinFET structure. Further, the influence of correlated and uncorrelated fin- LER on all electrical performance parameters is thoroughly investigated using the three-dimensional (3-D) Technology Computer Aided Design (TCAD) simulations for 14-nm technology node. Moreover, the impact of all possible fin shapes on threshold voltage (VTH), drain induced barrier lowering (DIBL), on-current (ION), and off-current (IOFF) has been compared with the well calibrated rectangular FinFET structure. In addition, the influence of all possible fin geometries on the read stability of six-transistor (6-T) Static-Random-Access-Memory (SRAM) has been investigated. The study reveals that fin-LER plays a vital role as it directly governs the electrostatics of the FinFET structure. This has been found that there is a high degree of fluctuations in all performance parameters for uncorrelated fin-LER type FinFETs as compared to correlated fin-LER with respect to rectangular FinFET structure. This paper gives physical insight of FinFET design, especially in sub-20 nm technology nodes by concluding that the impact of LER on electrical parameters are minimum for correlated LER.

Attacking the One-Out-Of-m Multicore Problem by Combining Hardware Management with Mixed-Criticality Provisioning

DTIC Science & Technology

2015-05-01

LLC and DRAM banks. For each µB task and isolation configuration, we ran experiments with all 256 possible LLC area sizes (given by 1 to 16 ways and 1...isolation on multicoore platforms. In RTAS ’14. [29] H. Yun, G. Yao, R. Pellizzoni, M. Caccamo, and L. Sha . Memory access control in multiprocessor

76 FR 79215 - Certain Semiconductor Chips With Dram Circuitry, and Modules and Products Containing Same...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-12-21

... 1930, as amended, 19 U.S.C. 1337, on behalf of Elpida Memory, Inc. of Tokyo, Japan and Elpida Memory... of investigation shall be served: (a) The complainants are: Elpida Memory, Inc., Sumitomo Seimei Yaesu Bldg. 3F, 2-1 Yaesu 2-chome, Chuo-ku, Tokyo 104-0028, Japan. Elpida Memory (USA) Inc., 1175 Sonora...

Alcohol levels do not accurately predict physical or mental impairment in ethanol-tolerant subjects: relevance to emergency medicine and dram shop laws.

PubMed

Roberts, James R; Dollard, Denis

2010-12-01

The human body and the central nervous system can develop tremendous tolerance to ethanol. Mental and physical dysfunctions from ethanol, in an alcohol-tolerant individual, do not consistently correlate with ethanol levels traditionally used to define intoxication, or even lethality, in a nontolerant subject. Attempting to relate observed signs of alcohol intoxication or impairment, or to evaluate sobriety, by quantifying blood alcohol levels can be misleading, if not impossible. We report a case demonstrating the disconnect between alcohol levels and generally assigned parameters of intoxication and impairment. In this case, an alcohol-tolerant man, with a serum ethanol level of 515 mg/dl, appeared neurologically intact and cognitively normal. This individual was without objective signs of impairment or intoxication by repeated evaluations by experienced emergency physicians. In alcohol-tolerant individuals, blood alcohol levels cannot always be predicted by and do not necessarily correlate with outward appearance, overt signs of intoxication, or physical examination. This phenomenon must be acknowledged when analyzing medical decision making in the emergency department or when evaluating the ability of bartenders and party hosts to identify intoxication in dram shop cases.

Performance testing and results of the first Etec CORE-2564

NASA Astrophysics Data System (ADS)

Franks, C. Edward; Shikata, Asao; Baker, Catherine A.

1993-03-01

In order to be able to write 64 megabit DRAM reticles, to prepare to write 256 megabit DRAM reticles and in general to meet the current and next generation mask and reticle quality requirements, Hoya Micro Mask (HMM) installed in 1991 the first CORE-2564 Laser Reticle Writer from Etec Systems, Inc. The system was delivered as a CORE-2500XP and was subsequently upgraded to a 2564. The CORE (Custom Optical Reticle Engraver) system produces photomasks with an exposure strategy similar to that employed by an electron beam system, but it uses a laser beam to deliver the photoresist exposure energy. Since then the 2564 has been tested by Etec's standard Acceptance Test Procedure and by several supplementary HMM techniques to insure performance to all the Etec advertised specifications and certain additional HMM requirements that were more demanding and/or more thorough than the advertised specifications. The primary purpose of the HMM tests was to more closely duplicate mask usage. The performance aspects covered by the tests include registration accuracy and repeatability; linewidth accuracy, uniformity and linearity; stripe butting; stripe and scan linearity; edge quality; system cleanliness; minimum geometry resolution; minimum address size and plate loading accuracy and repeatability.

Infrared spectroscopic ellipsometry in semiconductor manufacturing

NASA Astrophysics Data System (ADS)

Guittet, Pierre-Yves; Mantz, Ulrich; Weidner, Peter; Stehle, Jean-Louis; Bucchia, Marc; Bourtault, Sophie; Zahorski, Dorian

2004-05-01

Infrared spectroscopic ellipsometry (IRSE) metrology is an emerging technology in semiconductor production environment. Infineon Technologies SC300 implemented the first worldwide automated IRSE in a class 1 clean room in 2002. Combining properties of IR light -- large wavelength, low absorption in silicon -- with a short focus optics -- no backside reflection -- which allow model-based analysis, a large number of production applications were developed. Part of Infineon IRSE development roadmap is now focused on depth monitoring for arrays of 3D dry-etched structures. In trench DRAM manufacturing, the areal density is high, and critical dimensions are much lower than mid-IR wavelength. Therefore, extensive use of effective medium theory is made to model 3D structures. IR-SE metrology is not limited by shrinking critical dimensions, as long as the areal density is above a specific cut-off value determined by trenches dimensions, trench-filling and surrounding materials. Two applications for depth monitoring are presented. 1D models were developed and successfully applied to the DRAM trench capacitor structures. Modeling and correlation to reference methods are shown as well as dynamic repeatability and gauge capability results. Limitations of the current tool configuration are reviewed for shallow structures.

Actinic inspection of EUV reticles with arbitrary pattern design

NASA Astrophysics Data System (ADS)

Mochi, Iacopo; Helfenstein, Patrick; Rajeev, Rajendran; Fernandez, Sara; Kazazis, Dimitrios; Yoshitake, Shusuke; Ekinci, Yasin

2017-10-01

The re ective-mode EUV mask scanning lensless imaging microscope (RESCAN) is being developed to provide actinic mask inspection capabilities for defects and patterns with high resolution and high throughput, for 7 nm node and beyond. Here we, will report on our progress and present the results on programmed defect detection on random, logic-like patterns. The defects we investigated range from 200 nm to 50 nm size on the mask. We demonstrated the ability of RESCAN to detect these defects in die-to-die and die-to-database mode with a high signal to noise ratio. We also describe future plans for the upgrades to increase the resolution, the sensitivity, and the inspection speed of the demo tool.

Integration of Photo-Patternable Low-κ Material into Advanced Cu Back-End-Of-The-Line

NASA Astrophysics Data System (ADS)

Lin, Qinghuang; Nelson, Alshakim; Chen, Shyng-Tsong; Brock, Philip; Cohen, Stephan A.; Davis, Blake; Kaplan, Richard; Kwong, Ranee; Liniger, Eric; Neumayer, Debra; Patel, Jyotica; Shobha, Hosadurga; Sooriyakumaran, Ratnam; Purushothaman, Sampath; Miller, Robert; Spooner, Terry; Wisnieff, Robert

2010-05-01

We report herein the demonstration of a simple, low-cost Cu back-end-of-the-line (BEOL) dual-damascene integration using a novel photo-patternable low-κ dielectric material concept that dramatically reduces Cu BEOL integration complexity. This κ=2.7 photo-patternable low-κ material is based on the SiCOH-based material platform and has sub-200 nm resolution capability with 248 nm optical lithography. Cu/photo-patternable low-κ dual-damascene integration at 45 nm node BEOL fatwire levels has been demonstrated with very high electrical yields using the current manufacturing infrastructure. The photo-patternable low-κ concept is, therefore, a promising technology for highly efficient semiconductor Cu BEOL manufacturing.

Downscaling ferroelectric field effect transistors by using ferroelectric Si-doped HfO2

NASA Astrophysics Data System (ADS)

Martin, Dominik; Yurchuk, Ekaterina; Müller, Stefan; Müller, Johannes; Paul, Jan; Sundquist, Jonas; Slesazeck, Stefan; Schlösser, Till; van Bentum, Ralf; Trentzsch, Martin; Schröder, Uwe; Mikolajick, Thomas

2013-10-01

Throughout the 22 nm technology node HfO2 is established as a reliable gate dielectric in contemporary complementary metal oxide semiconductor (CMOS) technology. The working principle of ferroelectric field effect transistors FeFET has also been demonstrated for some time for dielectric materials like Pb[ZrxTi1-x]O3 and SrBi2Ta2O9. However, integrating these into contemporary downscaled CMOS technology nodes is not trivial due to the necessity of an extremely thick gate stack. Recent developments have shown HfO2 to have ferroelectric properties, given the proper doping. Moreover, these doped HfO2 thin films only require layer thicknesses similar to the ones already in use in CMOS technology. This work will show how the incorporation of Si induces ferroelectricity in HfO2 based capacitor structures and finally demonstrate non-volatile storage in nFeFETs down to a gate length of 100 nm. A memory window of 0.41 V can be retained after 20,000 switching cycles. Retention can be extrapolated to 10 years.

Diffraction based overlay and image based overlay on production flow for advanced technology node

NASA Astrophysics Data System (ADS)

Blancquaert, Yoann; Dezauzier, Christophe

2013-04-01

One of the main challenges for lithography step is the overlay control. For the advanced technology node like 28nm and 14nm, the overlay budget becomes very tight. Two overlay techniques compete in our advanced semiconductor manufacturing: the Diffraction based Overlay (DBO) with the YieldStar S200 (ASML) and the Image Based Overlay (IBO) with ARCHER (KLA). In this paper we will compare these two methods through 3 critical production layers: Poly Gate, Contact and first metal layer. We will show the overlay results of the 2 techniques, explore the accuracy and compare the total measurement uncertainty (TMU) for the standard overlay targets of both techniques. We will see also the response and impact for the Image Based Overlay and Diffraction Based Overlay techniques through a process change like an additional Hardmask TEOS layer on the front-end stack. The importance of the target design is approached; we will propose more adapted design for image based targets. Finally we will present embedded targets in the 14 FDSOI with first results.

Dual-modality imaging with 99mTc and fluorescent indocyanine green using surface-modified silica nanoparticles for biopsy of the sentinel lymph node: an animal study

PubMed Central

2013-01-01

Background We propose a new approach to facilitate sentinel node biopsy examination by multimodality imaging in which radioactive and near-infrared (NIR) fluorescent nanoparticles depict deeply situated sentinel nodes and fluorescent nodes with anatomical resolution in the surgical field. For this purpose, we developed polyamidoamine (PAMAM)-coated silica nanoparticles loaded with technetium-99m (99mTc) and indocyanine green (ICG). Methods We conducted animal studies to test the feasibility and utility of this dual-modality imaging probe. The mean diameter of the PAMAM-coated silica nanoparticles was 30 to 50 nm, as evaluated from the images of transmission electron microscopy and scanning electron microscopy. The combined labeling with 99mTc and ICG was verified by thin-layer chromatography before each experiment. A volume of 0.1 ml of the nanoparticle solution (7.4 MBq, except for one rat that was injected with 3.7 MBq, and 1 μg of an ICG derivative [ICG-sulfo-OSu]) was injected submucosally into the tongue of six male Wistar rats. Results Scintigraphic images showed increased accumulation of 99mTc in the neck of four of the six rats. Nineteen lymph nodes were identified in the dissected neck of the six rats, and a contact radiographic study showed three nodes with a marked increase in uptake and three nodes with a weak uptake. NIR fluorescence imaging provided real-time clear fluorescent images of the lymph nodes in the neck with anatomical resolution. Six lymph nodes showed weak (+) to strong (+++) fluorescence, whereas other lymph nodes showed no fluorescence. Nodes showing increased radioactivity coincided with the fluorescent nodes. The radioactivity of 15 excised lymph nodes from the four rats was assayed using a gamma well counter. Comparisons of the levels of radioactivity revealed a large difference between the high-fluorescence-intensity group (four lymph nodes; mean, 0.109% ± 0.067%) and the low- or no-fluorescence-intensity group (11 lymph nodes; mean, 0.001% ± 0.000%, p < 0.05). Transmission electron microscopy revealed that small black granules were localized to and dispersed within the cytoplasm of macrophages in the lymph nodes. Conclusion Although further studies are needed to determine the appropriate dose of the dual-imaging nanoparticle probe for effective sensitivity and safety, the results of this animal study revealed a novel method for improved node detection by a dual-modality approach for sentinel lymph node biopsy. PMID:23618132

Addressing FinFET metrology challenges in 1X node using tilt-beam CD-SEM

NASA Astrophysics Data System (ADS)

Zhang, Xiaoxiao; Zhou, Hua; Ge, Zhenhua; Vaid, Alok; Konduparthi, Deepasree; Osorio, Carmen; Ventola, Stefano; Meir, Roi; Shoval, Ori; Kris, Roman; Adan, Ofer; Bar-Zvi, Maayan

2014-04-01

At 1X node, 3D FinFETS raise a number of new metrology challenges. Gate height and fin height are two of the most important parameters for process control. At present there is a metrology gap in inline in-die measurement of these parameters. In order to fill this metrology gap, in-column beam tilt has been developed and implemented on Applied Materials V4i+ top-down CD-SEM for height measurement. A low tilt (5°) beam and a high tilt (14°) beam have been calibrated to obtain two sets of images providing measurement of sidewall edge width to calculate height in the host. Evaluations are done with applications in both gate height and fin height. TEM correlation with R2 being 0.89 and precision of 0.81nm have been achieved on various in-die features in gate height application. Fin height measurement shows less accuracy (R2 being 0.77) and precision (1.49 nm) due to challenges brought by fin geometry, yet still promising as first attempt. Sensitivity to DOE offset, die-to-die and in-die variation is demonstrated in both gate height and fin height. Process defect is successfully captured from inline wafers with gate height measurement implemented in production. This is the first successful demonstration of inline in-die gate height measurement for 14nm FinFET process control.

Effects of ultra-thin Si-fin body widths upon SOI PMOS FinFETs

NASA Astrophysics Data System (ADS)

Liaw, Yue-Gie; Chen, Chii-Wen; Liao, Wen-Shiang; Wang, Mu-Chun; Zou, Xuecheng

2018-05-01

Nano-node tri-gate FinFET devices have been developed after integrating a 14 Å nitrided gate oxide upon the silicon-on-insulator (SOI) wafers established on an advanced CMOS logic platform. These vertical double gate (FinFET) devices with ultra-thin silicon fin (Si-fin) widths ranging from 27 nm to 17 nm and gate length down to 30 nm have been successfully developed with a 193 nm scanner lithography tool. Combining the cobalt fully silicidation and the CESL strain technology beneficial for PMOS FinFETs was incorporated into this work. Detailed analyses of Id-Vg characteristics, threshold voltage (Vt), and drain-induced barrier lowering (DIBL) illustrate that the thinnest 17 nm Si-fin width FinFET exhibits the best gate controllability due to its better suppression of short channel effect (SCE). However, higher source/drain resistance (RSD), channel mobility degradation due to dry etch steps, or “current crowding effect” will slightly limit its transconductance (Gm) and drive current.

EUV lithography for 22nm half pitch and beyond: exploring resolution, LWR, and sensitivity tradeoffs

NASA Astrophysics Data System (ADS)

Putna, E. Steve; Younkin, Todd R.; Leeson, Michael; Caudillo, Roman; Bacuita, Terence; Shah, Uday; Chandhok, Manish

2011-04-01

The International Technology Roadmap for Semiconductors (ITRS) denotes Extreme Ultraviolet (EUV) lithography as a leading technology option for realizing the 22nm half pitch node and beyond. According to recent assessments made at the 2010 EUVL Symposium, the readiness of EUV materials remains one of the top risk items for EUV adoption. The main development issue regarding EUV resists has been how to simultaneously achieve high resolution, high sensitivity, and low line width roughness (LWR). This paper describes our strategy, the current status of EUV materials, and the integrated post-development LWR reduction efforts made at Intel Corporation. Data collected utilizing Intel's Micro- Exposure Tool (MET) is presented in order to examine the feasibility of establishing a resist process that simultaneously exhibits <=22nm half-pitch (HP) L/S resolution at <=11.3mJ/cm2 with <=3nm LWR.

Advanced coatings for next generation lithography

NASA Astrophysics Data System (ADS)

Naujok, P.; Yulin, S.; Kaiser, N.; Tünnermann, A.

2015-03-01

Beyond EUV lithography at 6.X nm wavelength has a potential to extend EUVL beyond the 11 nm node. To implement B-based mirrors and to enable their industrial application in lithography tools, a reflectivity level of > 70% has to be reached in near future. The authors will prove that transition from conventional La/B4C to promising LaN/B4C multilayer coatings leads to enhanced optical properties. Currently a near normal-incidence reflectivity of 58.1% @ 6.65 nm is achieved by LaN/B4C multilayer mirrors. The introduction of ultrathin diffusion barriers into the multilayer design to reach the targeted reflectivity of 70% was also tested. The optimization of multilayer design and deposition process for interface-engineered La/C/B4C multilayer mirrors resulted in peak reflectivity of 56.8% at the wavelength of 6.66 nm. In addition, the thermal stability of several selected multilayers was investigated and will be discussed.

Size-dependent tissue kinetics of PEG-coated gold nanoparticles

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cho, Wan-Seob; Department of Toxicological Research, National Institute of Food and Drug Safety Evaluation, Korea Food and Drug Administration, Seoul 122-704; Cho, Minjung

2010-05-15

Gold nanoparticles (AuNPs) can be used in various biomedical applications, however, very little is known about their size-dependent in vivo kinetics. Here, we performed a kinetic study in mice with different sizes of PEG-coated AuNPs. Small AuNPs (4 or 13 nm) showed high levels in blood for 24 h and were cleared by 7 days, whereas large (100 nm) AuNPs were completely cleared by 24 h. All AuNPs in blood re-increased at 3 months, which correlated with organ levels. Levels of small AuNPs were peaked at 7 days in the liver and spleen and at 1 month in the mesentericmore » lymph node, and remained high until 6 months, with slow elimination. In contrast, large AuNPs were taken up rapidly (approx 30 min) into the liver, spleen, and mesenteric lymph nodes with less elimination phase. TEM showed that AuNPs were entrapped in cytoplasmic vesicles and lysosomes of Kupffer cells and macrophages of spleen and mesenteric lymph node. Small AuNPs transiently activated CYP1A1 and 2B, phase I metabolic enzymes, in liver tissues from 24 h to 7 days, which mirrored with elevated gold levels in the liver. Large AuNPs did not affect the metabolic enzymes. Thus, propensity to accumulate in the reticuloendothelial organs and activation of phase I metabolic enzymes, suggest that extensive further studies are needed for practical in vivo applications.« less

Megasonic cleaning strategy for sub-10nm photomasks

NASA Astrophysics Data System (ADS)

Hsu, Jyh-Wei; Samayoa, Martin; Dress, Peter; Dietze, Uwe; Ma, Ai-Jay; Lin, Chia-Shih; Lai, Rick; Chang, Peter; Tuo, Laurent

2016-10-01

One of the main challenges in photomask cleaning is balancing particle removal efficiency (PRE) with pattern damage control. To overcome this challenge, a high frequency megasonic cleaning strategy is implemented. Apart from megasonic frequency and power, photomask surface conditioning also influences cleaning performance. With improved wettability, cleanliness is enhanced while pattern damage risk is simultaneously reduced. Therefore, a particle removal process based on higher megasonic frequencies, combined with proper surface pre-treatment, provides improved cleanliness without the unintended side effects of pattern damage, thus supporting the extension of megasonic cleaning technology into 10nm half pitch (hp) device node and beyond.

Experimental study of {sup 99m}Tc-aluminum oxide use for sentinel lymph nodes detection

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chernov, V. I., E-mail: Chernov@oncology.tomsk.ru; Sinilkin, I. G.; Zelchan, R. V.

The purpose of the study was a comparative research in the possibility of using the radiopharmaceuticals {sup 99m}Tc-Al{sub 2}O{sub 3} and {sup 99m}Tc-Nanocis for visualizing sentinel lymph nodes. The measurement of the sizes of {sup 99m}Tc-Al{sub 2}O{sub 3} and {sup 99m}Tc-Nanocis colloidal particles was performed in seven series of radiopharmaceuticals. The pharmacokinetics of {sup 99m}Tc-Al{sub 2}O{sub 3} and {sup 99m}Tc-Nanocis was researched on 50 white male rats. The possibility of the use of {sup 99m}Tc-Al{sub 2}O{sub 3} and {sup 99m}Tc-Nanocis for lymphoscintigraphy was studied in the experiments on 12 white male rats. The average dynamic diameter of the sol particlemore » was 52–77 nm for {sup 99m}Tc-Al{sub 2}O{sub 3} and 16.7–24.5 nm for {sup 99m}Tc-Nanocis. Radiopharmaceuticals accumulated in the inguinal lymph node in 1 hour after administration; the average uptake of {sup 99}mTc-Al{sub 2}O{sub 3} was 8.6% in it, and the accumulation of {sup 99m}Tc-Nanocis was significantly lower—1.8% (p < 0.05). In all study points the average uptake of {sup 99m}Tc-Al{sub 2}O{sub 3} in the lymph node was significantly higher than {sup 99m}Tc-Nanocis accumulation. The results of dynamic scintigraphic studies in rats showed that {sup 99m}Tc-Al{sub 2}O{sub 3} and {sup 99m}Tc-Nanocis actively accumulated into the lymphatic system. By using {sup 99m}Tc-Al{sub 2}O{sub 3} inguinal lymph node was determined in 5 minutes after injection and clearly visualized in all the animals in the 15th minute, when the accumulation became more than 1% of the administered dose. Further observation indicated that the {sup 99m}Tc-Al{sub 2}O{sub 3} accumulation reached a plateau in a lymph node (average 10.5%) during 2-hour study and then its accumulation remained practically at the same level, slightly increasing to 12% in 24 hours. In case of {sup 99m}Tc-Nanocis inguinal lymph node was visualized in all animals for 15 min when it was accumulated on the average 1.03% of the administered dose. Plateau of {sup 99m}Tc-Nanocis accumulation in the lymph node (average 2.05%) occurred after 2 hours of the study and remained almost on the same level (in average 2.3%) for 24 hours. Thus, the experimental study of a new domestic radiopharmaceutical showed that the {sup 99m}Tc-Al{sub 2}O{sub 3} accumulates actively in the lymph nodes several times as compared to the imported analogue and its practical application will facilitate intraoperative identification of sentinel lymph nodes.« less

MRAM Technology Status

NASA Technical Reports Server (NTRS)

Heidecker, Jason

2013-01-01

Magnetoresistive Random Access Memory (MRAM) is much different from conventional types of memory like SRAM, DRAM, and Flash, where electric charge is used to store information. Instead of exploiting the charge of an electron, MRAM uses its spin to store data. This new type of electronics is known as "spintronics." The primary focus of this report is the current generation of MRAM technology, and its reliability, vendors, and space-readiness.

Compact 2D OPC modeling of a metal oxide EUV resist for a 7nm node BEOL layer

NASA Astrophysics Data System (ADS)

Lyons, Adam; Rio, David; Lee, Sook; Wallow, Thomas; Delorme, Maxence; Fumar-Pici, Anita; Kocsis, Michael; de Schepper, Peter; Greer, Michael; Stowers, Jason K.; Gillijns, Werner; De Simone, Danilo; Bekaert, Joost

2017-03-01

Inpria has developed a directly patternable metal oxide hard-mask as a high-resolution photoresist for EUV lithography1. In this contribution, we describe a Tachyon 2D OPC full-chip model for an Inpria resist as applied to an N7 BEOL block mask application.

Nanoelectronics and More-than-Moore at IMEC

NASA Astrophysics Data System (ADS)

Cartuyvels, Rudi; Biesemans, Serge; Vandervorst, Wilfried; De Boeck, Jo

2011-11-01

This paper presents an overview of imec's R&D addressing the challenges of CMOS scaling towards the 10 nm node and its outlook beyond. In addition to the relentless geometrical shrinks, opportunities to further increase nanoelectronic system functionality and performance by co-integration and chip stacking technologies combined with emerging MEMS and optoelectronic technologies will be presented.

Precision process calibration and CD predictions for low-k1 lithography

NASA Astrophysics Data System (ADS)

Chen, Ting; Park, Sangbong; Berger, Gabriel; Coskun, Tamer H.; de Vocht, Joep; Chen, Fung; Yu, Linda; Hsu, Stephen; van den Broeke, Doug; Socha, Robert; Park, Jungchul; Gronlund, Keith; Davis, Todd; Plachecki, Vince; Harris, Tom; Hansen, Steve; Lambson, Chuck

2005-06-01

Leading resist calibration for sub-0.3 k1 lithography demands accuracy <2nm for CD through pitch. An accurately calibrated resist process is the prerequisite for establishing production-worthy manufacturing under extreme low k1. From an integrated imaging point of view, the following key components must be simultaneously considered during the calibration - high numerical aperture (NA>0.8) imaging characteristics, customized illuminations (measured vs. modeled pupil profiles), resolution enhancement technology (RET) mask with OPC, reticle metrology, and resist thin film substrate. For imaging at NA approaching unity, polarized illumination can impact significantly the contrast formation in the resist film stack, and therefore it is an important factor to consider in the CD-based resist calibration. For aggressive DRAM memory core designs at k1<0.3, pattern-specific illumination optimization has proven to be critical for achieving the required imaging performance. Various optimization techniques from source profile optimization with fixed mask design to the combined source and mask optimization have been considered for customer designs and available imaging capabilities. For successful low-k1 process development, verification of the optimization results can only be made with a sufficiently tunable resist model that can predicate the wafer printing accurately under various optimized process settings. We have developed, for resist patterning under aggressive low-k1 conditions, a novel 3D diffusion model equipped with double-Gaussian convolution in each dimension. Resist calibration with the new diffusion model has demonstrated a fitness and CD predication accuracy that rival or outperform the traditional 3D physical resist models. In this work, we describe our empirical approach to achieving the nm-scale precision for advanced lithography process calibrations, using either measured 1D CD through-pitch or 2D memory core patterns. We show that for ArF imaging, the current resist development and diffusion modeling can readily achieve ~1-2nm max CD errors for common 1D through-pitch and aggressive 2D memory core resist patterns. Sensitivities of the calibrated models to various process parameters are analyzed, including the comparison between the measured and modeled (Gaussian or GRAIL) pupil profiles. We also report our preliminary calibration results under selected polarized illumination conditions.

ILP-based co-optimization of cut mask layout, dummy fill, and timing for sub-14nm BEOL technology

NASA Astrophysics Data System (ADS)

Han, Kwangsoo; Kahng, Andrew B.; Lee, Hyein; Wang, Lutong

2015-10-01

Self-aligned multiple patterning (SAMP), due to its low overlay error, has emerged as the leading option for 1D gridded back-end-of-line (BEOL) in sub-14nm nodes. To form actual routing patterns from a uniform "sea of wires", a cut mask is needed for line-end cutting or realization of space between routing segments. Constraints on cut shapes and minimum cut spacing result in end-of-line (EOL) extensions and non-functional (i.e. dummy fill) patterns; the resulting capacitance and timing changes must be consistent with signoff performance analyses and their impacts should be minimized. In this work, we address the co-optimization of cut mask layout, dummy fill, and design timing for sub-14nm BEOL design. Our central contribution is an optimizer based on integer linear programming (ILP) to minimize the timing impact due to EOL extensions, considering (i) minimum cut spacing arising in sub-14nm nodes; (ii) cut assignment to different cut masks (color assignment); and (iii) the eligibility to merge two unit-size cuts into a bigger cut. We also propose a heuristic approach to remove dummy fills after the ILP-based optimization by extending the usage of cut masks. Our heuristic can improve critical path performance under minimum metal density and mask density constraints. In our experiments, we study the impact of number of cut masks, minimum cut spacing and metal density under various constraints. Our studies of optimized cut mask solutions in these varying contexts give new insight into the tradeoff of performance and cost that is afforded by cut mask patterning technology options.

Rigorous assessment of patterning solution of metal layer in 7 nm technology node

NASA Astrophysics Data System (ADS)

Gao, Weimin; Ciofi, Ivan; Saad, Yves; Matagne, Philippe; Bachmann, Michael; Gillijns, Werner; Lucas, Kevin; Demmerle, Wolfgang; Schmoeller, Thomas

2016-01-01

In a 7 nm node (N7), the logic design requires a critical poly pitch of 42 to 45 nm and a metal 1 (M1) pitch of 28 to 32 nm. Such high-pattern density pushes the 193 immersion lithography solution toward its limit and also brings extremely complex patterning scenarios. The N7 M1 layer may require a self-aligned quadruple patterning (SAQP) with a triple litho-etch (LE3) block process. Therefore, the whole patterning process flow requires multiple exposure+etch+deposition processes and each step introduces a particular impact on the pattern profiles and the topography. In this study, we have successfully integrated a simulation tool that enables emulation of the whole patterning flow with realistic process-dependent three-dimensional (3-D) profile and topology. We use this tool to study the patterning process variations of the N7 M1 layer including the overlay control, the critical dimension uniformity budget, and the lithographic process window (PW). The resulting 3-D pattern structure can be used to optimize the process flow, verify design rules, extract parasitics, and most importantly, simulate the electric field, and identify hot spots for dielectric reliability. As an example application, the maximum electric field at M1 tip-to-tip, which is one of the most critical patterning locations, has been simulated and extracted. The approach helps to investigate the impact of process variations on dielectric reliability. We have also assessed the alternative M1 patterning flow with a single exposure block using extreme ultraviolet lithography (EUVL) and analyzed its advantages compared to the LE3 block approach.

A High Performance Block Eigensolver for Nuclear Configuration Interaction Calculations

DOE PAGES

Aktulga, Hasan Metin; Afibuzzaman, Md.; Williams, Samuel; ...

2017-06-01

As on-node parallelism increases and the performance gap between the processor and the memory system widens, achieving high performance in large-scale scientific applications requires an architecture-aware design of algorithms and solvers. We focus on the eigenvalue problem arising in nuclear Configuration Interaction (CI) calculations, where a few extreme eigenpairs of a sparse symmetric matrix are needed. Here, we consider a block iterative eigensolver whose main computational kernels are the multiplication of a sparse matrix with multiple vectors (SpMM), and tall-skinny matrix operations. We then present techniques to significantly improve the SpMM and the transpose operation SpMM T by using themore » compressed sparse blocks (CSB) format. We achieve 3-4× speedup on the requisite operations over good implementations with the commonly used compressed sparse row (CSR) format. We develop a performance model that allows us to correctly estimate the performance of our SpMM kernel implementations, and we identify cache bandwidth as a potential performance bottleneck beyond DRAM. We also analyze and optimize the performance of LOBPCG kernels (inner product and linear combinations on multiple vectors) and show up to 15× speedup over using high performance BLAS libraries for these operations. The resulting high performance LOBPCG solver achieves 1.4× to 1.8× speedup over the existing Lanczos solver on a series of CI computations on high-end multicore architectures (Intel Xeons). We also analyze the performance of our techniques on an Intel Xeon Phi Knights Corner (KNC) processor.« less

A High Performance Block Eigensolver for Nuclear Configuration Interaction Calculations

DOE Office of Scientific and Technical Information (OSTI.GOV)

Aktulga, Hasan Metin; Afibuzzaman, Md.; Williams, Samuel

As on-node parallelism increases and the performance gap between the processor and the memory system widens, achieving high performance in large-scale scientific applications requires an architecture-aware design of algorithms and solvers. We focus on the eigenvalue problem arising in nuclear Configuration Interaction (CI) calculations, where a few extreme eigenpairs of a sparse symmetric matrix are needed. Here, we consider a block iterative eigensolver whose main computational kernels are the multiplication of a sparse matrix with multiple vectors (SpMM), and tall-skinny matrix operations. We then present techniques to significantly improve the SpMM and the transpose operation SpMM T by using themore » compressed sparse blocks (CSB) format. We achieve 3-4× speedup on the requisite operations over good implementations with the commonly used compressed sparse row (CSR) format. We develop a performance model that allows us to correctly estimate the performance of our SpMM kernel implementations, and we identify cache bandwidth as a potential performance bottleneck beyond DRAM. We also analyze and optimize the performance of LOBPCG kernels (inner product and linear combinations on multiple vectors) and show up to 15× speedup over using high performance BLAS libraries for these operations. The resulting high performance LOBPCG solver achieves 1.4× to 1.8× speedup over the existing Lanczos solver on a series of CI computations on high-end multicore architectures (Intel Xeons). We also analyze the performance of our techniques on an Intel Xeon Phi Knights Corner (KNC) processor.« less

Immersion lithography: its history, current status and future prospects

NASA Astrophysics Data System (ADS)

Owa, Soichi; Nagasaka, Hiroyuki

2008-11-01

Since the 1980's, immersion exposure has been proposed several times. At the end of 1990's, however, these concepts were almost forgotten because other technologies, such as electron beam projection, EUVL, and 157 nm were believed to be more promising than immersion exposures. The current work in immersion lithography started in 2001 with the report of Switkes and Rothschild. Although their first proposal was at 157 nm wavelength, their report in the following year on 193 nm immersion with purified water turned out to be the turning point for the introduction of water-based 193 nm immersion lithography. In February, 2003, positive feasibility study results of 193 nm immersion were presented at the SPIE microlithography conference. Since then, the development of 193 nm immersion exposure tools accelerated. Currently (year 2008), multiple hyper NA (NA>1.0) scanners are generating mass production 45 nm half pitch devices in semiconductor manufacturing factories. As a future extension, high index immersion was studied over the past few years, but material development lagged more than expected, which resulted in the cancellation of high index immersion plans at scanner makers. Instead, double patterning, double dipole exposure, and customized illuminations techniques are expected as techniques to extend immersion for the 32 nm node and beyond.

Overlay performance assessment of MAPPER's FLX-1200 (Conference Presentation)

NASA Astrophysics Data System (ADS)

Lattard, Ludovic; Servin, Isabelle; Pradelles, Jonathan; Blancquaert, Yoann; Rademaker, Guido; Pain, Laurent; de Boer, Guido; Brandt, Pieter; Dansberg, Michel; Jager, Remco J. A.; Peijster, Jerry J. M.; Slot, Erwin; Steenbrink, Stijn W. H. K.; Vergeer, Niels; Wieland, Marco

2017-04-01

Mapper Lithography has introduced its first product, the FLX-1200, which is installed at CEA-Leti in Grenoble (France). This is a mask less lithography system, based on massively parallel electron-beam writing with high-speed optical data transport for switching the electron beams. This FLX platform is initially targeted for 1 wph performance for 28 nm technology nodes, but can also be used for less demanding imaging. The electron source currently integrated is capable of scaling to 10 wph at the same resolution performance, which will be implemented by gradually upgrading the illumination optics. The system has an optical alignment system enabling mix-and-match with optical 193 nm immersion systems using standard NVSM marks. The tool at CEA-Leti is in-line with a Sokudo Duo clean track. Mapper Lithography and CEA-Leti are working in collaboration to develop turnkey solution for specific applications. At previous conferences we have presented imaging results including 28nm node resolution, cross wafer CDu of 2.5nm 3 and a throughput of half a wafer per hour, overhead times included. At this conference we will present results regarding the overlay performance of the FLX-1200. In figure 2 an initial result towards measuring the overlay performance of the FLX-1200 is shown. We have exposed a wafer twice without unloading the wafer in between exposures. In the first exposure half of a dense dot array is exposed. In the second exposure the remainder of the dense dot array is exposed. After development the wafer has been inspected using a CD-SEM at 480 locations distributed over an area of 100mm x 100mm. For each SEM image the shift of the pattern written in the first exposure relative to the pattern written in the second exposure is measured. Cross wafer this shift is 7 nm u+3s in X and 5 nm u+3s in Y. The next step is to evaluate the impact of unloading and loading of the wafer in between exposures. At the conference the latest results will be presented.

A Design Methodology for Optoelectronic VLSI

DTIC Science & Technology

2007-01-01

current gets converted to a CMOS voltage level through a transimpedance amplifier circuit called a receiver. The output of the receiver is then...change the current flowing from the diode to a voltage that the logic inputs can use. That circuit is called a receiver. It is a transimpedance amplifier ...incorpo- rate random access memory circuits, SRAM or dynamic RAM (DRAM). These circuits use weak internal analog signals that are amplified by sense

The future of memory

NASA Astrophysics Data System (ADS)

Marinella, M.

In the not too distant future, the traditional memory and storage hierarchy of may be replaced by a single Storage Class Memory (SCM) device integrated on or near the logic processor. Traditional magnetic hard drives, NAND flash, DRAM, and higher level caches (L2 and up) will be replaced with a single high performance memory device. The Storage Class Memory paradigm will require high speed (< 100 ns read/write), excellent endurance (> 1012), nonvolatility (retention > 10 years), and low switching energies (< 10 pJ per switch). The International Technology Roadmap for Semiconductors (ITRS) has recently evaluated several potential candidates SCM technologies, including Resistive (or Redox) RAM, Spin Torque Transfer RAM (STT-MRAM), and phase change memory (PCM). All of these devices show potential well beyond that of current flash technologies and research efforts are underway to improve the endurance, write speeds, and scalabilities to be on-par with DRAM. This progress has interesting implications for space electronics: each of these emerging device technologies show excellent resistance to the types of radiation typically found in space applications. Commercially developed, high density storage class memory-based systems may include a memory that is physically radiation hard, and suitable for space applications without major shielding efforts. This paper reviews the Storage Class Memory concept, emerging memory devices, and possible applicability to radiation hardened electronics for space.

Commercial host (dram shop) liability: current status and trends.

PubMed

Mosher, James F; Cohen, Elena N; Jernigan, David H

2013-09-01

Commercial host liability (CHL, also called dram shop liability) holds alcohol retailers liable for alcohol-attributable harm caused by serving alcohol, illegally, to a patron who is already intoxicated (adult liability) or underage (underage liability). The Community Preventive Services Task Force, based on a systematic research literature review, concluded that CHL is an effective strategy for reducing excessive alcohol consumption. The current article describes the key components of CHL, its grounding in American jurisprudence, its adoption in the 50 states, and changes since 1989, when a similar assessment of these policies was conducted. The current paper focuses on three legislatively enacted restrictions: (1) increased evidentiary requirements; (2) limitations on damage awards; and (3) limitations on who may be sued. Data were collected in 2011 and analyzed in 2012 and 2013. There has been substantial erosion of CHL during the past 2 decades. Fewer states recognized CHL in 2011 than in 1989, and more statutory restrictions were imposed during the study period among states that did recognize CHL; states are more likely to recognize underage than adult liability; and six states recognized a Responsible Beverage Services Practices affirmative defense in both 1989 and 2011. Implications of these findings for public health practitioners are discussed. Copyright © 2013 American Journal of Preventive Medicine. All rights reserved.

Faster Bit-Parallel Algorithms for Unordered Pseudo-tree Matching and Tree Homeomorphism

NASA Astrophysics Data System (ADS)

Kaneta, Yusaku; Arimura, Hiroki

In this paper, we consider the unordered pseudo-tree matching problem, which is a problem of, given two unordered labeled trees P and T, finding all occurrences of P in T via such many-one embeddings that preserve node labels and parent-child relationship. This problem is closely related to tree pattern matching problem for XPath queries with child axis only. If m > w , we present an efficient algorithm that solves the problem in O(nm log(w)/w) time using O(hm/w + mlog(w)/w) space and O(m log(w)) preprocessing on a unit-cost arithmetic RAM model with addition, where m is the number of nodes in P, n is the number of nodes in T, h is the height of T, and w is the word length. We also discuss a modification of our algorithm for the unordered tree homeomorphism problem, which corresponds to a tree pattern matching problem for XPath queries with descendant axis only.

Quantum information density scaling and qubit operation time constraints of CMOS silicon-based quantum computer architectures

NASA Astrophysics Data System (ADS)

Rotta, Davide; Sebastiano, Fabio; Charbon, Edoardo; Prati, Enrico

2017-06-01

Even the quantum simulation of an apparently simple molecule such as Fe2S2 requires a considerable number of qubits of the order of 106, while more complex molecules such as alanine (C3H7NO2) require about a hundred times more. In order to assess such a multimillion scale of identical qubits and control lines, the silicon platform seems to be one of the most indicated routes as it naturally provides, together with qubit functionalities, the capability of nanometric, serial, and industrial-quality fabrication. The scaling trend of microelectronic devices predicting that computing power would double every 2 years, known as Moore's law, according to the new slope set after the 32-nm node of 2009, suggests that the technology roadmap will achieve the 3-nm manufacturability limit proposed by Kelly around 2020. Today, circuital quantum information processing architectures are predicted to take advantage from the scalability ensured by silicon technology. However, the maximum amount of quantum information per unit surface that can be stored in silicon-based qubits and the consequent space constraints on qubit operations have never been addressed so far. This represents one of the key parameters toward the implementation of quantum error correction for fault-tolerant quantum information processing and its dependence on the features of the technology node. The maximum quantum information per unit surface virtually storable and controllable in the compact exchange-only silicon double quantum dot qubit architecture is expressed as a function of the complementary metal-oxide-semiconductor technology node, so the size scale optimizing both physical qubit operation time and quantum error correction requirements is assessed by reviewing the physical and technological constraints. According to the requirements imposed by the quantum error correction method and the constraints given by the typical strength of the exchange coupling, we determine the workable operation frequency range of a silicon complementary metal-oxide-semiconductor quantum processor to be within 1 and 100 GHz. Such constraint limits the feasibility of fault-tolerant quantum information processing with complementary metal-oxide-semiconductor technology only to the most advanced nodes. The compatibility with classical complementary metal-oxide-semiconductor control circuitry is discussed, focusing on the cryogenic complementary metal-oxide-semiconductor operation required to bring the classical controller as close as possible to the quantum processor and to enable interfacing thousands of qubits on the same chip via time-division, frequency-division, and space-division multiplexing. The operation time range prospected for cryogenic control electronics is found to be compatible with the operation time expected for qubits. By combining the forecast of the development of scaled technology nodes with operation time and classical circuitry constraints, we derive a maximum quantum information density for logical qubits of 2.8 and 4 Mqb/cm2 for the 10 and 7-nm technology nodes, respectively, for the Steane code. The density is one and two orders of magnitude less for surface codes and for concatenated codes, respectively. Such values provide a benchmark for the development of fault-tolerant quantum algorithms by circuital quantum information based on silicon platforms and a guideline for other technologies in general.

Mask etcher data strategy for 45nm and beyond

NASA Astrophysics Data System (ADS)

Lewington, Richard; Ibrahim, Ibrahim M.; Panayil, Sheeba; Kumar, Ajay; Yamartino, John

2006-05-01

Mask Etching for the 45nm technology node and beyond requires a system-level data and diagnostics strategy. This necessity stems from the need to control the performance of the mask etcher to increasingly stringent and diverse requirements of the mask production environment. Increasing mask costs and the capability to acquire and consolidate a wealth of data within the mask etch platform are primary motivators towards harnessing data mines for feedback into the mask etching optimization. There are offline and real-time possibilities and scenarios. Here, we discuss the data architecture, acquisition, and strategies of the Applied Materials Tetra II TM Mask Etch System.

Differences in fluorescence profiles from breast cancer tissues due to changes in relative tryptophan content via energy transfer: tryptophan content correlates with histologic grade and tumor size but not with lymph node metastases

NASA Astrophysics Data System (ADS)

Sordillo, Laura A.; Sordillo, Peter P.; Budansky, Yury; Pu, Yang; Alfano, Robert R.

2014-12-01

The correlation between histologic grade, an increasingly important measure of prognosis for patients with breast cancer, and tryptophan levels from tissues of 15 breast carcinoma patients was investigated. Changes in the relative content of key native organic biomolecule tryptophan were seen from the fluorescence spectra of cancerous and paired normal tissues with excitation wavelengths of 280 and 300 nm. Due to a large spectral overlap and matching excitation-emission spectra, fluorescence resonance energy transfer from tryptophan-donor to reduced nicotinamide adenine dinucleotides-acceptor was noted. We used the ratios of fluorescence intensities at their spectral emission peaks, or spectral fingerprint peaks, at 340, 440, and 460 nm. Higher ratios correlated strongly with high histologic grade, while lower-grade tumors had low ratios. Large tumor size also correlated with high ratios, while the number of lymph node metastases, a major factor in staging, was not correlated with tryptophan levels. High histologic grade correlates strongly with increased content of tryptophan in breast cancer tissues and suggests that measurement of tryptophan content may be useful as a part of the evaluation of these patients.

A solution for exposure tool optimization at the 65-nm node and beyond

NASA Astrophysics Data System (ADS)

Itai, Daisuke

2007-03-01

As device geometries shrink, tolerances for critical dimension, focus, and overlay control decrease. For the stable manufacture of semiconductor devices at (and beyond) the 65nm node, both performance variability and drift in exposure tools are no longer negligible factors. With EES (Equipment Engineering System) as a guidepost, hopes of improving productivity of semiconductor manufacturing are growing. We are developing a system, EESP (Equipment Engineering Support Program), based on the concept of EES. The EESP system collects and stores large volumes of detailed data generated from Canon lithographic equipment while product is being manufactured. It uses that data to monitor both equipment characteristics and process characteristics, which cannot be examined without this system. The goal of EESP is to maximize equipment capabilities, by feeding the result back to APC/FDC and the equipment maintenance list. This was a collaborative study of the system's effectiveness at the device maker's factories. We analyzed the performance variability of exposure tools by using focus residual data. We also attempted to optimize tool performance using the analyzed results. The EESP system can make the optimum performance of exposure tools available to the device maker.

Sensitivity enhancement of chemically amplified resists and performance study using extreme ultraviolet interference lithography

NASA Astrophysics Data System (ADS)

Buitrago, Elizabeth; Nagahara, Seiji; Yildirim, Oktay; Nakagawa, Hisashi; Tagawa, Seiichi; Meeuwissen, Marieke; Nagai, Tomoki; Naruoka, Takehiko; Verspaget, Coen; Hoefnagels, Rik; Rispens, Gijsbert; Shiraishi, Gosuke; Terashita, Yuichi; Minekawa, Yukie; Yoshihara, Kosuke; Oshima, Akihiro; Vockenhuber, Michaela; Ekinci, Yasin

2016-07-01

Extreme ultraviolet lithography (EUVL, λ=13.5 nm) is the most promising candidate to manufacture electronic devices for future technology nodes in the semiconductor industry. Nonetheless, EUVL still faces many technological challenges as it moves toward high-volume manufacturing (HVM). A key bottleneck from the tool design and performance point of view has been the development of an efficient, high-power EUV light source for high throughput production. Consequently, there has been extensive research on different methodologies to enhance EUV resist sensitivity. Resist performance is measured in terms of its ultimate printing resolution, line width roughness (LWR), sensitivity [S or best energy (BE)], and exposure latitude (EL). However, there are well-known fundamental trade-off relationships (line width roughness, resolution and sensitivity trade-off) among these parameters for chemically amplified resists (CARs). We present early proof-of-principle results for a multiexposure lithography process that has the potential for high sensitivity enhancement without compromising other important performance characteristics by the use of a "Photosensitized Chemically Amplified Resist™" (PSCAR™). With this method, we seek to increase the sensitivity by combining a first EUV pattern exposure with a second UV-flood exposure (λ=365 nm) and the use of a PSCAR. In addition, we have evaluated over 50 different state-of-the-art EUV CARs. Among these, we have identified several promising candidates that simultaneously meet sensitivity, LWR, and EL high-performance requirements with the aim of resolving line space (L/S) features for the 7- and 5-nm logic node [16- and 13-nm half-pitch (HP), respectively] for HVM. Several CARs were additionally found to be well resolved down to 12- and 11-nm HP with minimal pattern collapse and bridging, a remarkable feat for CARs. Finally, the performance of two negative tone state-of-the-art alternative resist platforms previously investigated was compared to the CAR performance at and below 16-nm HP resolution, demonstrating the need for alternative resist solutions at 13-nm resolution and below. EUV interference lithography (IL) has provided and continues to provide a simple yet powerful platform for academic and industrial research, enabling the characterization and development of resist materials before commercial EUV exposure tools become available. Our experiments have been performed at the EUV-IL set-up in the Swiss Light Source (SLS) synchrotron facility located at the Paul Scherrer Institute (PSI).

Tissue distribution and elimination after oral and intravenous administration of different titanium dioxide nanoparticles in rats

PubMed Central

2014-01-01

Objective The aim of this study was to obtain kinetic data that can be used in human risk assessment of titanium dioxide nanomaterials. Methods Tissue distribution and blood kinetics of various titanium dioxide nanoparticles (NM-100, NM-101, NM-102, NM-103, and NM-104), which differ with respect to primary particle size, crystalline form and hydrophobicity, were investigated in rats up to 90 days post-exposure after oral and intravenous administration of a single or five repeated doses. Results For the oral study, liver, spleen and mesenteric lymph nodes were selected as target tissues for titanium (Ti) analysis. Ti-levels in liver and spleen were above the detection limit only in some rats. Titanium could be detected at low levels in mesenteric lymph nodes. These results indicate that some minor absorption occurs in the gastrointestinal tract, but to a very limited extent. Both after single and repeated intravenous (IV) exposure, titanium rapidly distributed from the systemic circulation to all tissues evaluated (i.e. liver, spleen, kidney, lung, heart, brain, thymus, reproductive organs). Liver was identified as the main target tissue, followed by spleen and lung. Total recovery (expressed as % of nominal dose) for all four tested nanomaterials measured 24 h after single or repeated exposure ranged from 64-95% or 59-108% for male or female animals, respectively. During the 90 days post-exposure period, some decrease in Ti-levels was observed (mainly for NM-100 and NM-102) with a maximum relative decrease of 26%. This was also confirmed by the results of the kinetic analysis which revealed that for each of the investigated tissues the half-lifes were considerable (range 28–650 days, depending on the TiO2-particle and tissue investigated). Minor differences in kinetic profile were observed between the various particles, though these could not be clearly related to differences in primary particle size or hydrophobicity. Some indications were observed for an effect of crystalline form (anatase vs. rutile) on total Ti recovery. Conclusion Overall, the results of the present oral and IV study indicates very low oral bioavailability and slow tissue elimination. Limited uptake in combination with slow elimination might result in the long run in potential tissue accumulation. PMID:24993397

High-speed and low-power repeater for VLSI interconnects

NASA Astrophysics Data System (ADS)

Karthikeyan, A.; Mallick, P. S.

2017-10-01

This paper proposes a repeater for boosting the speed of interconnects with low power dissipation. We have designed and implemented at 45 and 32 nm technology nodes. Delay and power dissipation performances are analyzed for various voltage levels at these technology nodes using Spice simulations. A significant reduction in delay and power dissipation are observed compared to a conventional repeater. The results show that the proposed high-speed low-power repeater has a reduced delay for higher load capacitance. The proposed repeater is also compared with LPTG CMOS repeater, and the results shows that the proposed repeater has reduced delay. The proposed repeater can be suitable for high-speed global interconnects and has the capacity to drive large loads.

Self-Assembling Block Copolymer Resist Mixtures towards Lithographic Resists for Sub-10 nm Features

NASA Astrophysics Data System (ADS)

Chandler, Curran; Daga, Vikram; Watkins, James

2009-03-01

Significant improvements in 193 nm photolithography have enabled the extension of device feature sizes beyond the 45 nm and 32 nm nodes, yet uncertainty lies beyond 22 nm features as no single replacement has emerged. Here we show that low molecular weight, nonionic block copolymer surfactant blends are capable of self-assembling into highly ordered domains with feature sizes on the order of 5 nm. These surfactants, most of which lack the required χN for microphase separation on their own, exhibit strong segregation and long-range order upon addition of a component capable of multi-point hydrogen bonding that is specific for one of the blocks in the copolymer. This has been demonstrated by our SAXS data for several Pluronic (PEO-b-PPO-b-PEO) and Brij (PEO-b-[CH2]nCH3) surfactants of various molecular weights and PEO volume fractions. Furthermore, we employ these highly-ordered systems as thin film, nanolithographic etch masks for the transfer of sub-10 nm patterns into silicon-based substrates. Small molecule, hydrogen bonding additives containing aromatic or silsesquioxane structure are also used to tune etch contrast between the blocks which is important for reducing line edge roughness (LER) of such small features.

Radiation Effects On Emerging Electronic Materials And Devices

DTIC Science & Technology

2010-01-17

RADIATION EFFECTS ON EMERGING ELECTRONIC MATERIALS AND DEVICES FINAL PERFORMANCE REPORT PREPARED FOR: Kitt Reinhardt AFOSR/NE 875 N...and the other with metal gates and a high-K gate dielectric. These devices were programmed using both back-gate pulse and gate induced drain leakage... metal gate process GIDL method Fig. 1. Sensing margin as a function of total ionizing dose for nMOS 1T-DRAM cells programmed by back-gate pulse and

Reliability Analysis/Assessment of Advanced Technologies

DTIC Science & Technology

1990-05-01

34, Reliability Physics 1980 , IEEE, p. 165. 25. RADC-TR-83-244. 26. Towner, Janet M., et. al., "Aluminum Electromigration Under Pulsed D.C. Conditions...Duvvury, Redwine, Kitagawa, Haas, Chuang, Beydler, Hyslop , "Impact of Hot Carriers On DRAM circuits", 1987 IEEE/IRPS. 58. Cahoon, Thornewell, Tsai...et. a]., "Substrate for Large Silicon Chip and Full Wafer Packaging", Semiconductor International, pp. 149-156, April 1980 . 5. T.E. Lewis and D.L

Statistical Memristor Modeling and Case Study in Neuromorphic Computing

DTIC Science & Technology

2012-06-01

use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and...Sundareswaran, R. Panda , and D. Pan, “Electrical impact of line-edge roughness on sub-45nm node standard cell,” in Proc. SPIE, vol. 7275, 2009, pp. 727 518–727 518–10. 590 26.3

Research on high-efficiency polishing technology of photomask substrate

NASA Astrophysics Data System (ADS)

Zhao, Shijie; Xie, Ruiqing; Zhou, Lian; Liao, Defeng; Chen, Xianhua; Wang, Jian

2018-03-01

A method of photomask substrate fabrication is demonstrated ,that the surface figure and roughness of fused silica will converge to target precision rapidly with the full aperture polishing. Surface figure of optical flats in full aperture polishing processes is primarily dependent on the surface profile of polishing pad, therefor, a improved function of polishing mechanism was put forward based on two axis lapping machine and technology experience, and the pad testing based on displacement sensor and the active conditioning method of the pad is applied in this research. Moreover , the clamping deformation of the thin glass is solved by the new pitch dispensing method. The experimental results show that the surface figure of the 152mm×152mm×6.35mm optical glass is 0.25λ(λ=633nm) and the roughness is 0.32nm ,which has meet the requirements of mask substrate for 90 45nm nodes.

Doxorubicin loaded superparamagnetic PLGA-iron oxide multifunctional microbubbles for dual-mode US/MR imaging and therapy of metastasis in lymph nodes.

PubMed

Niu, Chengcheng; Wang, Zhigang; Lu, Guangming; Krupka, Tianyi M; Sun, Yang; You, Yufang; Song, Weixiang; Ran, Haitao; Li, Pan; Zheng, Yuanyi

2013-03-01

Current strategies for tumor-induced sentinel lymph node detection and metastasis therapy have limitations. In this work, we co-encapsulated iron oxide nanoparticles and chemotherapeutic drug into poly(lactic-co-glycolic acid) (PLGA) microbubbles to form multifunctional polymer microbubbles (MPMBs) for both tumor lymph node imaging and therapy. Fe(3)O(4) nanoparticles and doxorubicin (DOX) co-encapsulated PLGA microbubbles were prepared and filled with perfluorocarbon gas. Enhancement of ultrasound (US)/magnetic resonance (MR) imaging and US triggered drug delivery were evaluated both in vitro and in vivo. The MPMBs exhibited characters like narrow size distribution and smooth surface with a mean diameter of 868.0 ± 68.73 nm. In addition, varying the concentration of Fe(3)O(4) nanoparticles in the bubbles did not significantly influence the DOX encapsulation efficiency or drug loading efficiency. Our in vitro results demonstrated that these MPMBs could enhance both US and MR imaging which was further validated in vivo showing that these MPMBs enhanced tumor lymph nodes signals. The anti-tumor effect of MPMBs mediated chemotherapy was assessed in vivo using end markers like tumor proliferation index, micro blood vessel density and micro lymphatic vessel density, which were shown consistently the lowest after the MPMBs plus sonication treatment compared to controls. In line with these findings, the tumor cell apoptotic index was found the largest after the MPMBs plus sonication treatment. In conclusion, we have successfully developed a doxorubicin loaded superparamagnetic PLGA-Iron Oxide multifunctional theranostic agent for dual-mode US/MR Imaging of lymph node, and for low frequency US triggered therapy of metastasis in lymph nodes, which might provide a strategy for the imaging and chemotherapy of primary tumor and their metastases. Copyright © 2012 Elsevier Ltd. All rights reserved.

Demonstration of electronic design automation flow for massively parallel e-beam lithography

NASA Astrophysics Data System (ADS)

Brandt, Pieter; Belledent, Jérôme; Tranquillin, Céline; Figueiro, Thiago; Meunier, Stéfanie; Bayle, Sébastien; Fay, Aurélien; Milléquant, Matthieu; Icard, Beatrice; Wieland, Marco

2014-07-01

For proximity effect correction in 5 keV e-beam lithography, three elementary building blocks exist: dose modulation, geometry (size) modulation, and background dose addition. Combinations of these three methods are quantitatively compared in terms of throughput impact and process window (PW). In addition, overexposure in combination with negative bias results in PW enhancement at the cost of throughput. In proximity effect correction by over exposure (PEC-OE), the entire layout is set to fixed dose and geometry sizes are adjusted. In PEC-dose to size (DTS) both dose and geometry sizes are locally optimized. In PEC-background (BG), a background is added to correct the long-range part of the point spread function. In single e-beam tools (Gaussian or Shaped-beam), throughput heavily depends on the number of shots. In raster scan tools such as MAPPER Lithography's FLX 1200 (MATRIX platform) this is not the case and instead of pattern density, the maximum local dose on the wafer is limiting throughput. The smallest considered half-pitch is 28 nm, which may be considered the 14-nm node for Metal-1 and the 10-nm node for the Via-1 layer, achieved in a single exposure with e-beam lithography. For typical 28-nm-hp Metal-1 layouts, it was shown that dose latitudes (size of process window) of around 10% are realizable with available PEC methods. For 28-nm-hp Via-1 layouts this is even higher at 14% and up. When the layouts do not reach the highest densities (up to 10∶1 in this study), PEC-BG and PEC-OE provide the capability to trade throughput for dose latitude. At the highest densities, PEC-DTS is required for proximity correction, as this method adjusts both geometry edges and doses and will reduce the dose at the densest areas. For 28-nm-hp lines critical dimension (CD), hole&dot (CD) and line ends (edge placement error), the data path errors are typically 0.9, 1.0 and 0.7 nm (3σ) and below, respectively. There is not a clear data path performance difference between the investigated PEC methods. After the simulations, the methods were successfully validated in exposures on a MAPPER pre-alpha tool. A 28-nm half pitch Metal-1 and Via-1 layouts show good performance in resist that coincide with the simulation result. Exposures of soft-edge stitched layouts show that beam-to-beam position errors up to ±7 nm specified for FLX 1200 show no noticeable impact on CD. The research leading to these results has been performed in the frame of the industrial collaborative consortium IMAGINE.

Portable real-time optical coherence tomography system for intraoperative imaging and staging of breast cancer

NASA Astrophysics Data System (ADS)

Nguyen, Freddy T.; Zysk, Adam M.; Kotynek, Jan G.; Bellafiore, Frank J.; Rowland, Kendrith M.; Johnson, Patricia A.; Chaney, J. Eric; Boppart, Stephen A.

2007-02-01

Breast cancer continues to be one of the most widely diagnosed forms of cancer amongst women and the second leading type of cancer deaths amongst women. The recurrence rate of breast cancer is highly dependent on several factors including the complete removal of the primary tumor and the presence of cancer cells in involved lymph nodes. The metastatic spread and staging of breast cancer is also evaluated through the nodal assessment of the regional lymphatic system. A portable real-time spectral domain optical coherence tomography system is being presented as a clinical diagnostic tool in the intraoperative delineation of tumor margins as well as for real time lymph node assessment. The system employs a super luminescent diode centered at 1310 nm with a bandwidth of 92 nm. Using a spectral domain detection system, the data is acquired at a rate of 5 KHz / axial scan. The sample arm is a galvanometer scanning telecentric probe with an objective lens (f = 60 mm, confocal parameter = 1.5 mm) yielding an axial resolution of 8.3 μm and a transverse resolution of 35.0 μm. Images of tumor margins are acquired in the operating room ex vivo on freshly excised human tissue specimen. This data shows the potential of the use of OCT in defining the structural tumor margins in breast cancer. Images taken from ex-vivo samples on the bench system clearly delineate the differences between clusters of tumor cells and nearby adipose cells. In addition, the data shows the potential for OCT as a diagnostic tool in the staging of cancer metastasis through locoregional lymph node assessment.

Challenges in process marginality for advanced technology nodes and tackling its contributors

NASA Astrophysics Data System (ADS)

Narayana Samy, Aravind; Schiwon, Roberto; Seltmann, Rolf; Kahlenberg, Frank; Katakamsetty, Ushasree

2013-10-01

Process margin is getting critical in the present node shrinkage scenario due to the physical limits reached (Rayleigh's criterion) using ArF lithography tools. K1 is used to its best for better resolution and to enhance the process margin (28nm metal patterning k1=0.31). In this paper, we would like to give an overview of various contributors in the advanced technology nodes which limit the process margins and how the challenges have been tackled in a modern foundry model. Advanced OPC algorithms are used to make the design content at the mask optimum for patterning. However, as we work at the physical limit, critical features (Hot-spots) are very susceptible to litho process variations. Furthermore, etch can have a significant impact as well. Pattern that still looks healthy at litho can fail due to etch interactions. This makes the traditional 2D contour output from ORC tools not able to predict accurately all defects and hence not able to fully correct it in the early mask tapeout phase. The above makes a huge difference in the fast ramp-up and high yield in a competitive foundry market. We will explain in this paper how the early introduction of 3D resist model based simulation of resist profiles (resist top-loss, bottom bridging, top-rounding, etc.,) helped in our prediction and correction of hot-spots in the early 28nm process development phase. The paper also discusses about the other overall process window reduction contributors due to mask 3D effects, wafer topography (focus shifts/variations) and how this has been addressed with different simulation efforts in a fast and timely manner.

Highly sensitive fluorescence detection of metastatic lymph nodes of gastric cancer with photo-oxidation of protoporphyrin IX.

PubMed

Koizumi, N; Harada, Y; Beika, M; Minamikawa, T; Yamaoka, Y; Dai, P; Murayama, Y; Yanagisawa, A; Otsuji, E; Tanaka, H; Takamatsu, T

2016-08-01

The establishment of a precise and rapid method to detect metastatic lymph nodes (LNs) is essential to perform less invasive surgery with reduced gastrectomy along with reduced lymph node dissection. We herein describe a novel imaging strategy to detect 5-aminolevulinic acid (5-ALA)-induced protoporphyrin IX (PpIX) fluorescence in excised LNs specifically with reduced effects of tissue autofluorescence based on photo-oxidation of PpIX. We applied the method in a clinical setting, and evaluated its feasibility. To reduce the unfavorable effect of autofluorescence, we focused on photo-oxidation of PpIX: Following light irradiation, PpIX changes into another substance, photo-protoporphyrin, via an oxidative process, which has a different spectral peak, at 675 nm, whereas PpIX has its spectral peak at 635 nm. Based on the unique spectral alteration, fluorescence spectral imaging before and after light irradiation and subsequent originally-developed image processing was performed. Following in vitro study, we applied this method to a total of 662 excised LNs obtained from 30 gastric cancer patients administered 5-ALA preoperatively. Specific visualization of PpIX was achieved in in vitro study. The method allowed highly sensitive detection of metastatic LNs, with sensitivity of 91.9% and specificity of 90.8% in the in vivo clinical trial. Receiver operating characteristic analysis indicated high diagnostic accuracy, with the area under the curve of 0.926. We established a highly sensitive and specific 5-ALA-induced fluorescence imaging method applicable in clinical settings. The novel method has a potential to become a useful tool for intraoperative rapid diagnosis of LN metastasis. Copyright © 2016 Elsevier Ltd. All rights reserved.

Guiding gate-etch process development using 3D surface reaction modeling for 7nm and beyond

NASA Astrophysics Data System (ADS)

Dunn, Derren; Sporre, John R.; Deshpande, Vaibhav; Oulmane, Mohamed; Gull, Ronald; Ventzek, Peter; Ranjan, Alok

2017-03-01

Increasingly, advanced process nodes such as 7nm (N7) are fundamentally 3D and require stringent control of critical dimensions over high aspect ratio features. Process integration in these nodes requires a deep understanding of complex physical mechanisms to control critical dimensions from lithography through final etch. Polysilicon gate etch processes are critical steps in several device architectures for advanced nodes that rely on self-aligned patterning approaches to gate definition. These processes are required to meet several key metrics: (a) vertical etch profiles over high aspect ratios; (b) clean gate sidewalls free of etch process residue; (c) minimal erosion of liner oxide films protecting key architectural elements such as fins; and (e) residue free corners at gate interfaces with critical device elements. In this study, we explore how hybrid modeling approaches can be used to model a multi-step finFET polysilicon gate etch process. Initial parts of the patterning process through hardmask assembly are modeled using process emulation. Important aspects of gate definition are then modeled using a particle Monte Carlo (PMC) feature scale model that incorporates surface chemical reactions.1 When necessary, species and energy flux inputs to the PMC model are derived from simulations of the etch chamber. The modeled polysilicon gate etch process consists of several steps including a hard mask breakthrough step (BT), main feature etch steps (ME), and over-etch steps (OE) that control gate profiles at the gate fin interface. An additional constraint on this etch flow is that fin spacer oxides are left intact after final profile tuning steps. A natural optimization required from these processes is to maximize vertical gate profiles while minimizing erosion of fin spacer films.2

Comparative study of angiostatic and anti-invasive gene expressions as prognostic factors in gastric cancer.

PubMed

Lee, J H; Koh, J T; Shin, B A; Ahn, K Y; Roh, J H; Kim, Y J; Kim, K K

2001-02-01

Genes involving angiogenesis and metastasis play an important role in the progression and infiltration of cancer. We examined the expressions of various angiostatic and potential invasion/metastasis suppressor genes through RT-PCR analyses in 32 gastric cancer specimens with or without distant metastasis. The expressions of the invasion/metastasis suppressor, nm23 and E-cadherin increased much more in the cancer tissue (CT) and metastatic lymph node (MLN) than in the extraneoplastic mucosa (EM) and non-metastatic lymph node (NLN), respectively. The expressions of the angiostatic factor, angiopoietin 2 and thrombospondin 2 increased in the CT and MLN as compared with the EM and NLN, respectively. The newly cloned angiostatic factor, brain-specific angiogenesis inhibitor 1 (BAI1) decreased much more in the CT and MLN than the EM and NLN, respectively. However, BAI1 increased in the CT compared with the EM among the patients with poor prognosis and distant metastasis, such as liver or peritoneum. The expressions of the invasive factor, matrix metalloproteinase-2 and its suppressor, tissue inhibitor metalloproteinase-2 (TIMP-2) increased in the CM as compared with the EM, but the increased expression pattern of these genes in the CT became blunted among the patients with good prognosis. Our results indicate that BAI1 and TIMP-2 expressions in the extraneoplastic mucosa and non-metastatic lymph nodes were not suppressed in the patients with good prognosis, but increased expressions of angiopoietin 2, thrombospondin 2, TIMP-2, nm23 and E-cadherin in the tumor tissue did not lead to a long survival after operation. It is suggested that the extent of BAI1 and TIMP-2 expression in the gastric mucosa may be an important prognostic factor for predicting survival in gastric cancer.

Insight into carrier lifetime impact on band-modulation devices

NASA Astrophysics Data System (ADS)

Parihar, Mukta Singh; Lee, Kyung Hwa; Park, Hyung Jin; Lacord, Joris; Martinie, Sébastien; Barbé, Jean-Charles; Xu, Yue; El Dirani, Hassan; Taur, Yuan; Cristoloveanu, Sorin; Bawedin, Maryline

2018-05-01

A systematic study to model and characterize the band-modulation Z2-FET device is developed bringing light to the relevance of the carrier lifetime influence. This work provides guidelines to optimize the Z2-FETs for sharp switching, ESD protection, and 1T-DRAM applications. Lower carrier lifetime in the Z2-FET helps in attaining the sharp switch. We provide new insights into the correlation between generation/recombination, diffusion, electrostatic barriers and carrier lifetime.

Chaining for Flexible and High-Performance Key-Value Systems

DTIC Science & Technology

2012-09-01

store that is fault tolerant achieves high performance and availability, and offers strong data consistency? We present a new replication protocol...effective high performance data access and analytics, many sites use simpler data model “ NoSQL ” systems. ese systems store and retrieve data only by...DRAM, Flash, and disk-based storage; can act as an unreliable cache or a durable store ; and can offer strong or weak data consistency. e value of

Single-crystal silicon trench etching for fabrication of highly integrated circuits

NASA Astrophysics Data System (ADS)

Engelhardt, Manfred

1991-03-01

The development of single crystal silicon trench etching for fabrication of memory cells in 4 16 and 64Mbit DRAMs is reviewed in this paper. A variety of both etch tools and process gases used for the process development is discussed since both equipment and etch chemistry had to be improved and changed respectively to meet the increasing requirements for high fidelity pattern transfer with increasing degree of integration. In additon to DRAM cell structures etch results for deep trench isolation in advanced bipolar ICs and ASICs are presented for these applications grooves were etched into silicon through a highly doped buried layer and at the borderline of adjacent p- and n-well areas respectively. Shallow trench etching of large and small exposed areas with identical etch rates is presented as an approach to replace standard LOCOS isolation by an advanced isolation technique. The etch profiles were investigated with SEM TEM and AES to get information on contathination and damage levels and on the mechanism leading to anisotropy in the dry etch process. Thermal wave measurements were performed on processed single crystal silicon substrates for a fast evaluation of the process with respect to plasma-induced substrate degradation. This useful technique allows an optimization ofthe etch process regarding high electrical performance of the fully processed memory chip. The benefits of the use of magnetic fields for the development of innovative single crystal silicon dry

Materials and other needs for advanced phase change memory (Presentation Recording)

NASA Astrophysics Data System (ADS)

Sosa, Norma E.

2015-09-01

Phase change memory (PCM), with its long history, may now hold its brightest promise to date. This bright future is being fueled by the "push" from big data. PCM is a non-volatile memory technology used to create solid-state random access memory devices that operate based the resistance properties of materials. Employing the electrical resistance differences-as opposed to differences in charge stored-between the amorphous and crystalline phases of the material, PCM can store bits, namely one's and zero's. Indeed, owing to the method of storage, PCM can in fact be designed to hold multiple bits thus leading to a high-density technology twice the storage density and less than half the cost of DRAM, the main kind found in typical personal computers. It has been long known that PCM can fill a need gap that spans 3 decades in performance from DRAM to solid state drive (NAND Flash). Furthermore, PCM devices can lead to performance and reliability improvements essential to enabling significant steps forward to supporting big data centric computing. This talk will focus on the science and challenges of aggressive scaling to realize the density needed, how this scaling challenge is intertwined with materials needs for endurance into the giga-cycles, and the associated forefront research aiming to realizing multi-level functionality into these nanoscale programmable resistor devices.

Demonstration of lithography patterns using reflective e-beam direct write

NASA Astrophysics Data System (ADS)

Freed, Regina; Sun, Jeff; Brodie, Alan; Petric, Paul; McCord, Mark; Ronse, Kurt; Haspeslagh, Luc; Vereecke, Bart

2011-04-01

Traditionally, e-beam direct write lithography has been too slow for most lithography applications. E-beam direct write lithography has been used for mask writing rather than wafer processing since the maximum blur requirements limit column beam current - which drives e-beam throughput. To print small features and a fine pitch with an e-beam tool requires a sacrifice in processing time unless one significantly increases the total number of beams on a single writing tool. Because of the uncertainty with regards to the optical lithography roadmap beyond the 22 nm technology node, the semiconductor equipment industry is in the process of designing and testing e-beam lithography tools with the potential for high volume wafer processing. For this work, we report on the development and current status of a new maskless, direct write e-beam lithography tool which has the potential for high volume lithography at and below the 22 nm technology node. A Reflective Electron Beam Lithography (REBL) tool is being developed for high throughput electron beam direct write maskless lithography. The system is targeting critical patterning steps at the 22 nm node and beyond at a capital cost equivalent to conventional lithography. Reflective Electron Beam Lithography incorporates a number of novel technologies to generate and expose lithographic patterns with a throughput and footprint comparable to current 193 nm immersion lithography systems. A patented, reflective electron optic or Digital Pattern Generator (DPG) enables the unique approach. The Digital Pattern Generator is a CMOS ASIC chip with an array of small, independently controllable lens elements (lenslets), which act as an array of electron mirrors. In this way, the REBL system is capable of generating the pattern to be written using massively parallel exposure by ~1 million beams at extremely high data rates (~ 1Tbps). A rotary stage concept using a rotating platen carrying multiple wafers optimizes the writing strategy of the DPG to achieve the capability of high throughput for sparse pattern wafer levels. The lens elements on the DPG are fabricated at IMEC (Leuven, Belgium) under IMEC's CMORE program. The CMOS fabricated DPG contains ~ 1,000,000 lens elements, allowing for 1,000,000 individually controllable beamlets. A single lens element consists of 5 electrodes, each of which can be set at controlled voltage levels to either absorb or reflect the electron beam. A system using a linear movable stage and the DPG integrated into the electron optics module was used to expose patterns on device representative wafers. Results of these exposure tests are discussed.

SU-D-210-04: Using Radiotherapy Biomaterials to Brand and Track Deadly Cancer Cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Altundal, Y; Sajo, E; Ngwa, W

Purpose: Metastasis accounts for over 90% of all cancer associated suffering and death and arguably presents the most formidable challenges in cancer management. The detection of metastatic or rare circulating tumor cells (CTCs) in blood or lymph nodes remains a formidable technological challenge. In this study, we investigated the time needed to label each cancer cell in-situ (right at the source tumor) with sufficient number of GNPs that will allow enhanced non-invasive detection via photoacoustic imaging in the lymph nodes. Such in-situ labeling can be achieved via sustained release of the GNPs from Radiotherapy (RT) biomaterials (e.g. fiducials, spacers) coated/loadedmore » with the GNP. Methods: The minimum concentration (1000 GNPs/cell for 50nm GNPs) to detect GNPs with photoacoustic imaging method was experimentally measured by Mallidi et al. and fixed at the tumor sub-volume periphery. In this work, the GNPs were assumed to diffuse from a point source, placed in the middle of a 2–3cm tumor, with an initial concentration of 7–30 mg/g. The time required to label the cells with GNPs was calculated by solving the three dimensional diffusion-reaction equation analytically. The diffusion coefficient of 10nm GNPs was experimentally determined previously. Stokes-Einstein equation was used to calculate the diffusion coefficients for other sizes (2–50nm) of GNPs. The cellular uptake rate constants for several sizes of GNPs were experimentally measured by Jin et al. Results: The time required to label the cells was found 0.635–15.91 days for 2–50nm GNPs with an initial concentration of 7 mg/g GNPs in a 2 cm tumor; 1.379–34.633 days for 2–50nm GNPs with an initial concentration of 30 mg/g GNPs in a 3cm tumor. Conclusion: Our results highlight new potential for labeling CTCs with GNPs released from smart RT biomaterials (i.e. fiducials or spacers loaded with the GNP) towards enhanced non-invasive imaging/detection via photoacoustic imaging.« less

Progress on EUV mask fabrication for 32-nm technology node and beyond

NASA Astrophysics Data System (ADS)

Zhang, Guojing; Yan, Pei-Yang; Liang, Ted; Park, Seh-jin; Sanchez, Peter; Shu, Emily Y.; Ultanir, Erdem A.; Henrichs, Sven; Stivers, Alan; Vandentop, Gilroy; Lieberman, Barry; Qu, Ping

2007-05-01

Extreme ultraviolet lithography (EUVL) tool development achieved a big milestone last year as two full-field Alpha Demo Tools (ADT) were shipped to customers by ASML. In the future horizon, a full field "EUV1" exposure tool from Nikon will be available by the end of 20071 and the pre-production EUV exposure tools from ASML are targeted for 20092. It is essential that high quality EUVL masks can be made and delivered to the EUVL tool users to support the technology development. In the past year, we have demonstrated mask fabrication with low stress absorber deposition and good etch process control yielding a vertical etch profile and a mask CD control of 5.7 nm for 32 nm (1x) space and 7.4 nm for 32 nm (1x) lines. Mask pattern resolution of 15 nm (1x) dense lines was achieved. Full field reflective mask die-to-die inspection at a 125nm pixel size was demonstrated after low defect multilayer blanks became available. In this paper, we will present details of the Intel EUVL Mask Pilot Line progress in EUVL mask defect reduction, pattern CD performance, program defect mask design and inspection, in-house absorber film development and its performance, and EUVL metrology tool development. We will demonstrate an overall improvement in EUV mask manufacturing readiness due to our Pilot Line activities.

Reticle decision center: a novel applications platform for enhancing reticle yield and productivity at 10nm technology and beyond

NASA Astrophysics Data System (ADS)

Hwa, George; Bugata, Raj; Chiang, Kaiming; Lakkapragada, Suresh; Tolani, Vikram; Gopalakrishnan, Sandhya; Chen, Chun-Jen; Yang, Chin-Ting; Hsu, Sheng-Chang; Tuo, Laurent

2016-10-01

In the semiconductor IC manufacturing industry, challenges associated with producing defect-free photomasks have been dramatically increasing. At the 10nm technology node, since the 193nm immersion scanner numerical aperture has remained the same 1.35 as in previous nodes, more multi-patterning and aggressive SMO illumination sources are being used to effectively print smaller feature CDs and pitches. To accommodate such specialized sources, more model-based mask OPC and ILT have been used making mask designs very complicated. This in turn makes mask manufacturing very challenging especially for the defect inspection, repair, and metrology processes that need to guarantee defect-free masks. Over the past few years, considerable innovation have been made in the areas of defect inspection and disposition that has ensured continued predictability of mask quality to wafer and final chip yields. The accurate disposition of each mask defect before and after repair has been facilitated by a suite of automated applications such as ADC, LPR, RPG, AIA, etc. that work together with the inspection, repair, and metrology tools and effectively also provide the best possible utilization of the tool capability, capacity and operator resources. In this paper we introduce a new consolidated applications platform called the Reticle Decision Center (RDC) which hosts all these supporting software applications on a centralized server with direct connectivity to mask inspection, repair, metrology tools and more. The paper details how the RDC server is architected to host any application in its native operating system environment and provides for high availability with automatic failover and redundancy. The server along with its host of applications has been tightly integrated with KLA-Tencor's Teron mask inspectors. The paper concludes with showing benefits realized in mask cycle-time and yield as a result of implementing RDC into a high-volume 10nm mask-shop production line.

Quantitative photoacoustic assessment of ex-vivo lymph nodes of colorectal cancer patients

NASA Astrophysics Data System (ADS)

Sampathkumar, Ashwin; Mamou, Jonathan; Saegusa-Beercroft, Emi; Chitnis, Parag V.; Machi, Junji; Feleppa, Ernest J.

2015-03-01

Staging of cancers and selection of appropriate treatment requires histological examination of multiple dissected lymph nodes (LNs) per patient, so that a staggering number of nodes require histopathological examination, and the finite resources of pathology facilities create a severe processing bottleneck. Histologically examining the entire 3D volume of every dissected node is not feasible, and therefore, only the central region of each node is examined histologically, which results in severe sampling limitations. In this work, we assess the feasibility of using quantitative photoacoustics (QPA) to overcome the limitations imposed by current procedures and eliminate the resulting under sampling in node assessments. QPA is emerging as a new hybrid modality that assesses tissue properties and classifies tissue type based on multiple estimates derived from spectrum analysis of photoacoustic (PA) radiofrequency (RF) data and from statistical analysis of envelope-signal data derived from the RF signals. Our study seeks to use QPA to distinguish cancerous from non-cancerous regions of dissected LNs and hence serve as a reliable means of imaging and detecting small but clinically significant cancerous foci that would be missed by current methods. Dissected lymph nodes were placed in a water bath and PA signals were generated using a wavelength-tunable (680-950 nm) laser. A 26-MHz, f-2 transducer was used to sense the PA signals. We present an overview of our experimental setup; provide a statistical analysis of multi-wavelength classification parameters (mid-band fit, slope, intercept) obtained from the PA signal spectrum generated in the LNs; and compare QPA performance with our established quantitative ultrasound (QUS) techniques in distinguishing metastatic from non-cancerous tissue in dissected LNs. QPA-QUS methods offer a novel general means of tissue typing and evaluation in a broad range of disease-assessment applications, e.g., cardiac, intravascular, musculoskeletal, endocrine-gland, etc.

Nanoindentation investigation of HfO2 and Al2O3 films grown by atomic layer deposition

Treesearch

K. Tapily; Joseph E. Jakes; D. S. Stone; P. Shrestha; D. Gu; H. Baumgart; A. A. Elmustafa

2008-01-01

The challenges of reducing gate leakage current and dielectric breakdown beyond the 45 nm technology node have shifted engineers’ attention from the traditional and proven dielectric SiO2 to materials of higher dielectric constant also known as high-k materials such as hafnium oxide (HfO2) and aluminum oxide (Al2O3). These high-k materials are projected to...

Layout optimization with assist features placement by model based rule tables for 2x node random contact

NASA Astrophysics Data System (ADS)

Jun, Jinhyuck; Park, Minwoo; Park, Chanha; Yang, Hyunjo; Yim, Donggyu; Do, Munhoe; Lee, Dongchan; Kim, Taehoon; Choi, Junghoe; Luk-Pat, Gerard; Miloslavsky, Alex

2015-03-01

As the industry pushes to ever more complex illumination schemes to increase resolution for next generation memory and logic circuits, sub-resolution assist feature (SRAF) placement requirements become increasingly severe. Therefore device manufacturers are evaluating improvements in SRAF placement algorithms which do not sacrifice main feature (MF) patterning capability. There are known-well several methods to generate SRAF such as Rule based Assist Features (RBAF), Model Based Assist Features (MBAF) and Hybrid Assisted Features combining features of the different algorithms using both RBAF and MBAF. Rule Based Assist Features (RBAF) continue to be deployed, even with the availability of Model Based Assist Features (MBAF) and Inverse Lithography Technology (ILT). Certainly for the 3x nm node, and even at the 2x nm nodes and lower, RBAF is used because it demands less run time and provides better consistency. Since RBAF is needed now and in the future, what is also needed is a faster method to create the AF rule tables. The current method typically involves making masks and printing wafers that contain several experiments, varying the main feature configurations, AF configurations, dose conditions, and defocus conditions - this is a time consuming and expensive process. In addition, as the technology node shrinks, wafer process changes and source shape redesigns occur more frequently, escalating the cost of rule table creation. Furthermore, as the demand on process margin escalates, there is a greater need for multiple rule tables: each tailored to a specific set of main-feature configurations. Model Assisted Rule Tables(MART) creates a set of test patterns, and evaluates the simulated CD at nominal conditions, defocused conditions and off-dose conditions. It also uses lithographic simulation to evaluate the likelihood of AF printing. It then analyzes the simulation data to automatically create AF rule tables. It means that analysis results display the cost of different AF configurations as the space grows between a pair of main features. In summary, model based rule tables method is able to make it much easier to create rule tables, leading to faster rule-table creation and a lower barrier to the creation of more rule tables.

A Case for Tamper-Resistant and Tamper-Evident Computer Systems

DTIC Science & Technology

2007-02-01

such as Kerberos is hard to apply [2] B . Gassend, G. Sub, D. Clarke, M. Dijk, and S. Devadas . Caches and Hash Trees for Efficient Memory Integrity...the block’s data from DRAM. For authentication, Merkle [14] G. Suh, D. Clarke, B . Gassend, M. van Dijk, and S. Devadas . Efficient Memory Integrity...wwi4serverwatch.com/news/article.php/ tion where a data block is encrypted or decrypted through an XOR 1399451, 2000. [11] B . Rogers, Y. Solihin

Template Based Low Data Rate Speech Encoder

DTIC Science & Technology

1993-09-30

Nasality Distinguishes In/ from d/ 95.6 96.9 1m/ from /b/, etc. Sustention Distinguishes /f/ from /p/, $7.5 88.3 ibi from N/, Al from /0 8. etc. Sibilation...processor performs mainly Processor Workstation input/output (I/O) operations. The dynamic random access memory (DRAM) has 16 million bytes of...storage capacity. To execute the 800-b/s voice algorithm, the following amount of memory is needed: 5 MB for tables, 1.5 MB for it "program, and 30 KB for

PDSparc: A Drop-in Replacement for LEON3 Written Using Synopsys Processor Designer

DTIC Science & Technology

2015-08-18

Written Using  Synopsys Processor Designer1  David Whelihan, Ph.D. and Kate Thurmer  MIT Lincoln Laboratory, Lexington, MA, USA    ABSTRACT  Microprocessors ...internet-enabled appliances has opened a significant new niche: the Application Specific Standard Product (ASSP) microprocessor . These processors... microprocessor is a small part of a working system and requires peripherals such as DRAM controllers and communication sub-systems to properly carry out its

Dosimetry and microdosimetry using COTS ICs: A comparative study

NASA Technical Reports Server (NTRS)

Scheick, L.; Swift, G.; Guertin, S.; Roth, D.; McNulty, P.; Nguyen, D.

2002-01-01

A new method using an array of MOS transistors formeasuring dose absorbed from ionizing radiation is compared to previous dosimetric methods., The accuracy and precision of dosimetry based on COTS SRAMs, DRAMs, and WPROMs are compared and contrasted. Applications of these devices in various space missions will be discussed. TID results are presented for this summary and microdosimetricresults will be added to the full paper. Finally, an analysis of the optimal condition for a digital dosimeter will be presented.

Production of EUV mask blanks with low killer defects

NASA Astrophysics Data System (ADS)

Antohe, Alin O.; Kearney, Patrick; Godwin, Milton; He, Long; John Kadaksham, Arun; Goodwin, Frank; Weaver, Al; Hayes, Alan; Trigg, Steve

2014-04-01

For full commercialization, extreme ultraviolet lithography (EUVL) technology requires the availability of EUV mask blanks that are free of defects. This remains one of the main impediments to the implementation of EUV at the 22 nm node and beyond. Consensus is building that a few small defects can be mitigated during mask patterning, but defects over 100 nm (SiO2 equivalent) in size are considered potential "killer" defects or defects large enough that the mask blank would not be usable. The current defect performance of the ion beam sputter deposition (IBD) tool will be discussed and the progress achieved to date in the reduction of large size defects will be summarized, including a description of the main sources of defects and their composition.

SEE Sensitivity Analysis of 180 nm NAND CMOS Logic Cell for Space Applications

NASA Astrophysics Data System (ADS)

Sajid, Muhammad

2016-07-01

This paper focus on Single Event Effects caused by energetic particle strike on sensitive locations in CMOS NAND logic cell designed in 180nm technology node to be operated in space radiation environment. The generation of SE transients as well as upsets as function of LET of incident particle has been determined for logic devices onboard LEO and GEO satellites. The minimum magnitude pulse and pulse-width for threshold LET was determined to estimate the vulnerability /susceptibility of device for heavy ion strike. The impact of temperature, strike location and logic state of NAND circuit on total SEU/SET rate was estimated with physical mechanism simulations using Visual TCAD, Genius, runSEU program and Crad computer codes.

High-volume manufacturing device overlay process control

NASA Astrophysics Data System (ADS)

Lee, Honggoo; Han, Sangjun; Woo, Jaeson; Lee, DongYoung; Song, ChangRock; Heo, Hoyoung; Brinster, Irina; Choi, DongSub; Robinson, John C.

2017-03-01

Overlay control based on DI metrology of optical targets has been the primary basis for run-to-run process control for many years. In previous work we described a scenario where optical overlay metrology is performed on metrology targets on a high frequency basis including every lot (or most lots) at DI. SEM based FI metrology is performed ondevice in-die as-etched on an infrequent basis. Hybrid control schemes of this type have been in use for many process nodes. What is new is the relative size of the NZO as compared to the overlay spec, and the need to find more comprehensive solutions to characterize and control the size and variability of NZO at the 1x nm node: sampling, modeling, temporal frequency and control aspects, as well as trade-offs between SEM throughput and accuracy.

Benchmarks of a III-V TFET technology platform against the 10-nm CMOS FinFET technology node considering basic arithmetic circuits

NASA Astrophysics Data System (ADS)

Strangio, S.; Palestri, P.; Lanuzza, M.; Esseni, D.; Crupi, F.; Selmi, L.

2017-02-01

In this work, a benchmark for low-power digital applications of a III-V TFET technology platform against a conventional CMOS FinFET technology node is proposed. The analysis focuses on full-adder circuits, which are commonly identified as representative of the digital logic environment. 28T and 24T topologies, implemented in complementary-logic and transmission-gate logic, respectively, are investigated. Transient simulations are performed with a purpose-built test-bench on each single-bit full adder solution. The extracted delays and energy characteristics are post-processed and translated into figures-of-merit for multi-bit ripple-carry-adders. Trends related to the different full-adder implementations (for the same device technology platform) and to the different technology platforms (for the same full-adder topology) are presented and discussed.

Pulled microcapillary tube resonators with electrical readout for mass sensing applications

PubMed Central

Lee, Donghyuk; Kim, Joonhui; Cho, Nam-Joon; Kang, Taewook; Kauh, Sangken; Lee, Jungchul

2016-01-01

This paper reports a microfabrication-free approach to make hollow channel mass sensors by pulling a glass capillary and suspending it on top of a machined jig. A part of the pulled section makes simple contact with an actuation node and a quartz tuning fork (QTF) which acts as a sensing node. The two nodes define a pulled micro capillary tube resonator (PμTR) simply supported at two contacts. While a piezo actuator beneath the actuation node excites the PμTR, the QTF senses the resonance frequency of the PμTR. The proposed concept was validated by electrical and optical measurements of resonant spectra of PμTR. Then, different liquid samples including water, ethanol, glycerol, and their binary mixtures were introduced into the PμTR and the resonance frequency of the PμTR was measured as a function of liquid density. Density responsivity of −3,088 Hz-g−1 cm3 obtained is comparable to those of microfabricated hollow resonators. With a micro droplet generation chip configured in series with the PμTR, size distribution of oil droplets suspended in water was successfully measured with the radius resolution of 31 nm at the average droplet radius, 28.47 μm. Overall, typical off-the-shelf parts simply constitute a resonant mass sensing system along with a convenient electrical readout. PMID:27694852

Increasing reticle inspection efficiency and reducing wafer printchecks at 14nm using automated defect classification and simulation

NASA Astrophysics Data System (ADS)

Paracha, Shazad; Goodman, Eliot; Eynon, Benjamin G.; Noyes, Ben F.; Ha, Steven; Kim, Jong-Min; Lee, Dong-Seok; Lee, Dong-Heok; Cho, Sang-Soo; Ham, Young M.; Vacca, Anthony D.; Fiekowsky, Peter J.; Fiekowsky, Daniel I.

2014-10-01

IC fabs inspect critical masks on a regular basis to ensure high wafer yields. These requalification inspections are costly for many reasons including the capital equipment, system maintenance, and labor costs. In addition, masks typically remain in the "requal" phase for extended, non-productive periods of time. The overall "requal" cycle time in which reticles remain non-productive is challenging to control. Shipping schedules can slip when wafer lots are put on hold until the master critical layer reticle is returned to production. Unfortunately, substituting backup critical layer reticles can significantly reduce an otherwise tightly controlled process window adversely affecting wafer yields. One major requal cycle time component is the disposition process of mask inspections containing hundreds of defects. Not only is precious non-productive time extended by reviewing hundreds of potentially yield-limiting detections, each additional classification increases the risk of manual review techniques accidentally passing real yield limiting defects. Even assuming all defects of interest are flagged by operators, how can any person's judgment be confident regarding lithographic impact of such defects? The time reticles spend away from scanners combined with potential yield loss due to lithographic uncertainty presents significant cycle time loss and increased production costs An automatic defect analysis system (ADAS), which has been in fab production for numerous years, has been improved to handle the new challenges of 14nm node automate reticle defect classification by simulating each defect's printability under the intended illumination conditions. In this study, we have created programmed defects on a production 14nm node critical-layer reticle. These defects have been analyzed with lithographic simulation software and compared to the results of both AIMS optical simulation and to actual wafer prints.

Surface characterization of InP trenches embedded in oxide using scanning probe microscopy

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mannarino, Manuel, E-mail: manuel.mannarino@imec.be, E-mail: manuelmannarino@gmail.com; Chintala, Ravi; Vandervorst, Wilfried

2015-12-14

Metrology for structural and electrical analyses at device level has been identified as one of the major challenges to be resolved for the sub-14 nm technology nodes. In these advanced nodes, new high mobility semiconductors, such as III–V compounds, are grown in narrow trenches on a Si substrate. Probing the nature of the defects, the defect density, and the role of processing steps on the surface of such structures are prime metrology requirements. In order to enable defect analysis on a (III–V) surface, a proper sample preparation for oxide removal is of primary importance. In this work, the effectiveness of differentmore » chemical cleanings and thermal annealing procedures is investigated on both blanket InP and oxide embedded InP trenches by means of scanning probe microscopy techniques. It is found that the most effective approach is a combination of an HCl-based chemical cleaning combined with a low-temperature thermal annealing leading to an oxide free surface with atomically flat areas. Scanning tunneling microscopy (STM) has been the preferred method for such investigations on blanket films due to its intrinsic sub-nm spatial resolution. However, its application on oxide embedded structures is non-trivial. To perform STM on the trenches of interest (generally <20 nm wide), we propose a combination of non-contact atomic force microscopy and STM using the same conductive atomic force microscopy tip Our results prove that with these procedures, it is possible to perform STM in narrow InP trenches showing stacking faults and surface reconstruction. Significant differences in terms of roughness and terrace formation are also observed between the blanket and the oxide embedded InP.« less

Designing to win in sub-90nm mask production

NASA Astrophysics Data System (ADS)

Zhang, Yuan

2005-11-01

An informal survey conducted with key customers by Photronics indicates that the time gap between technology nodes has accelerated in recent years. Previously the cycle was three years. However, between 130nm and 90nm there was less than a 2 year gap, and between 90nm and 65nm a 1.5 year gap exists. As a result, the technical challenges have increased substantially. In addition, mask costs are rising exponentially due to high capital equipment cost, a shrinking customer base, long write times and increased applications of 193nm EAPSM or AAPSM. Collaboration among EDA companies, mask houses and wafer manufacturers is now more important than ever. This paper will explore avenues for reducing mask costs, mainly in the areas of: write-time reduction through design for manufacturing (DFM), and yield improvement through specification relaxation. Our study conducted through layout vertex modeling suggests that a simple design shape such as a square versus a circle or an angled structure helps reduce shot count and write time. Shot count reduction through mask layout optimization, and advancement in new generation E-beam writers can reduce write time up to 65%. An advanced laser writer can produce those less critical E-beam layers in less than half the time of an e-beam writer. Additionally, the emerging imprint lithography brings new life and new challenges to the photomask industry with applications in many fields outside of the semiconductor industry. As immersion lithography is introduced for 45nm device production, polarization and MEEF effects due to the mask will become severe. Larger magnification not only provides benefits on CD control and MEEF, but also extends the life time of current 90nm/65nm tool sets where 45nm mask sets can be produced at a lower cost.

EUV lithography: NXE platform performance overview

NASA Astrophysics Data System (ADS)

Peeters, Rudy; Lok, Sjoerd; Mallman, Joerg; van Noordenburg, Martijn; Harned, Noreen; Kuerz, Peter; Lowisch, Martin; van Setten, Eelco; Schiffelers, Guido; Pirati, Alberto; Stoeldraijer, Judon; Brandt, David; Farrar, Nigel; Fomenkov, Igor; Boom, Herman; Meiling, Hans; Kool, Ron

2014-04-01

The first NXE3300B systems have been qualified and shipped to customers. The NXE:3300B is ASML's third generation EUV system and has an NA of 0.33. It succeeds the NXE:3100 system (NA of 0.25), which has allowed customers to gain valuable EUV experience. Good overlay and imaging performance has been shown on the NXE:3300B system in line with 22nm device requirements. Full wafer CDU performance of <1.5nm for 22nm dense and iso lines at a dose of ~16mJ/cm2 has been achieved. Matched machine overlay (NXE to immersion) of around 3.5nm has been demonstrated on multiple systems. Dense lines have been exposed down to 13nm half pitch, and contact holes down to 17nm half pitch. 10nm node Metal-1 layers have been exposed with a DOF of 120nm, and using single spacer assisted double patterning flow a resolution of 9nm has been achieved. Source power is the major challenge to overcome in order to achieve cost-effectiveness in EUV and enable introduction into High Volume Manufacturing. With the development of the MOPA+prepulse operation of the source, steps in power have been made, and with automated control the sources have been prepared to be used in a preproduction fab environment. Flexible pupil formation is under development for the NXE:3300B which will extend the usage of the system in HVM, and the resolution for the full system performance can be extended to 16nm. Further improvements in defectivity performance have been made, while in parallel full-scale pellicles are being developed. In this paper we will discuss the current NXE:3300B performance, its future enhancements and the recent progress in EUV source performance.

How small can MOSFETs get?

NASA Astrophysics Data System (ADS)

Risch, Lothar

2001-10-01

Scaling of CMOS technology made possible the key appliances of our information technology society, like the PC, mobile communication, and the internet. Reduction of feature sizes for semiconductor devices continued according to Moore's law for the last 25 years in order to achieve higher integration densities, higher speed, lower power consumption, and lower costs. But now, as we approach the sub 100 nm regime, several roadblocks have been predicted for the next generations down to 35 nm. The latest ITRS roadmap 99 describes in detail the challenges which have to be addressed for the future CMOS technology nodes, regarding lithography, metallization, power dissipation, and circuit design. Also for the MOSFET, performance degradation is a big issue. Because this is not a limitation from basic physical laws, novel architectures for MOSFETs will be needed to improve again the electrical characteristics and thus pave the way to much smaller transistors than expected in the past. 25 nm CMOS seems to be feasible using very thin silicon substrates on insulator. Further improvements down to 10 nm are very likely with two gates for the control of the charge carriers. So, it is very likely that CMOS will not end with today's roadmap at 35 nm or even before, but may continue with non bulk devices and fully depleted channels. Finally, tunnelling from source to drain will set an end to the reduction of channel length, which is estimated to be below 5 nm.

Synchrotron radiation x-ray photoelectron spectroscopy study on the interface chemistry of high-k PrxAl2-xO3 (x=0-2) dielectrics on TiN for dynamic random access memory applications

NASA Astrophysics Data System (ADS)

Schroeder, T.; Lupina, G.; Sohal, R.; Lippert, G.; Wenger, Ch.; Seifarth, O.; Tallarida, M.; Schmeisser, D.

2007-07-01

Engineered dielectrics combined with compatible metal electrodes are important materials science approaches to scale three-dimensional trench dynamic random access memory (DRAM) cells. Highly insulating dielectrics with high dielectric constants were engineered in this study on TiN metal electrodes by partly substituting Al in the wide band gap insulator Al2O3 by Pr cations. High quality PrAlO3 metal-insulator-metal capacitors were processed with a dielectric constant of 19, three times higher than in the case of Al2O3 reference cells. As a parasitic low dielectric constant interface layer between PrAlO3 and TiN limits the total performance gain, a systematic nondestructive synchrotron x-ray photoelectron spectroscopy study on the interface chemistry of PrxAl2-xO3 (x =0-2) dielectrics on TiN layers was applied to unveil its chemical origin. The interface layer results from the decreasing chemical reactivity of PrxAl2-xO3 dielectrics with increasing Pr content x to reduce native Ti oxide compounds present on unprotected TiN films. Accordingly, PrAlO3 based DRAM capacitors require strict control of the surface chemistry of the TiN electrode, a parameter furthermore of importance to engineer the band offsets of PrxAl2-xO3/TiN heterojunctions.

Non-volatile main memory management methods based on a file system.

PubMed

Oikawa, Shuichi

2014-01-01

There are upcoming non-volatile (NV) memory technologies that provide byte addressability and high performance. PCM, MRAM, and STT-RAM are such examples. Such NV memory can be used as storage because of its data persistency without power supply while it can be used as main memory because of its high performance that matches up with DRAM. There are a number of researches that investigated its uses for main memory and storage. They were, however, conducted independently. This paper presents the methods that enables the integration of the main memory and file system management for NV memory. Such integration makes NV memory simultaneously utilized as both main memory and storage. The presented methods use a file system as their basis for the NV memory management. We implemented the proposed methods in the Linux kernel, and performed the evaluation on the QEMU system emulator. The evaluation results show that 1) the proposed methods can perform comparably to the existing DRAM memory allocator and significantly better than the page swapping, 2) their performance is affected by the internal data structures of a file system, and 3) the data structures appropriate for traditional hard disk drives do not always work effectively for byte addressable NV memory. We also performed the evaluation of the effects caused by the longer access latency of NV memory by cycle-accurate full-system simulation. The results show that the effect on page allocation cost is limited if the increase of latency is moderate.

Wide-bandwidth high-resolution search for extraterrestrial intelligence

NASA Technical Reports Server (NTRS)

Horowitz, Paul

1993-01-01

A third antenna was added to the system. It is a terrestrial low-gain feed, to act as a veto for local interference. The 3-chip design for a 4 megapoint complex FFT was reduced to finished working hardware. The 4-Megachannel circuit board contains 36 MByte of DRAM, 5 CPLDs, the three large FFT ASICs, and 74 ICs in all. The Austek FDP-based Spectrometer/Power Accumulator (SPA) has now been implemented as a 4-layer printed circuit. A PC interface board has been designed and together with its associated user interface and control software allows an IBM compatible computer to control the SPA board, and facilitates the transfer of spectra to the PC for display, processing, and storage. The Feature Recognizer Array cards receive the stream of modulus words from the 4M FFT cards, and forward a greatly thinned set of reports to the PC's in whose backplane they reside. In particular, a powerful ROM-based state-machine architecture has been adopted, and DRAM has been added to permit integration modes when tracking or reobserving source candidates. The general purpose (GP) array consists of twenty '486 PC class computers, each of which receives and processes the data from a feature extractor/correlator board set. The array performs a first analysis on the provided 'features' and then passes this information on to the workstation. The core workstation software is now written. That is, the communication channels between the user interface, the backend monitor program and the PC's have working software.

Comprehensive analysis of sub-20 nm black phosphorus based junctionless-recessed channel MOSFET for analog/RF applications

NASA Astrophysics Data System (ADS)

Kumar, Ajay; Tripathi, M. M.; Chaujar, Rishu

2018-04-01

In this work, a comprehensive analog and RF performance of a novel Black Phosphorus-Junctionless-Recessed Channel (BP-JL-RC) MOSFET has been explored at 45 nm technology node (Gate length = 20 nm). The integration of black phosphorus with junctionless recessed channel MOSFET, leads to higher drain current of about 0.3 mA and excellent switching ratio (of the order of 1011) due to reduced off-current which leads to improvement in sub-threshold slope (SS) (67mV/dec). Further, RF performance metrics have also been studied with an aim to analyze high-frequency performance. The following FOMs have been evaluated: cut-off frequency (fT), maximum oscillator frequency (fMAX), stern stability factor, various power gains and parasitic capacitances at THz frequency range. Thus, in addition to the high packing density offered by RC MOSFET, the proposed design finds numerous application at THz frequency making it a promising candidate at wafer scale integration level.

Downconversion quantum interface for a single quantum dot spin and 1550-nm single-photon channel.

PubMed

Pelc, Jason S; Yu, Leo; De Greve, Kristiaan; McMahon, Peter L; Natarajan, Chandra M; Esfandyarpour, Vahid; Maier, Sebastian; Schneider, Christian; Kamp, Martin; Höfling, Sven; Hadfield, Robert H; Forchel, Alfred; Yamamoto, Yoshihisa; Fejer, M M

2012-12-03

Long-distance quantum communication networks require appropriate interfaces between matter qubit-based nodes and low-loss photonic quantum channels. We implement a downconversion quantum interface, where the single photons emitted from a semiconductor quantum dot at 910 nm are downconverted to 1560 nm using a fiber-coupled periodically poled lithium niobate waveguide and a 2.2-μm pulsed pump laser. The single-photon character of the quantum dot emission is preserved during the downconversion process: we measure a cross-correlation g(2)(τ = 0) = 0.17 using resonant excitation of the quantum dot. We show that the downconversion interface is fully compatible with coherent optical control of the quantum dot electron spin through the observation of Rabi oscillations in the downconverted photon counts. These results represent a critical step towards a long-distance hybrid quantum network in which subsystems operating at different wavelengths are connected through quantum frequency conversion devices and 1.5-μm quantum channels.

Flexible single-layer ionic organic-inorganic frameworks towards precise nano-size separation

NASA Astrophysics Data System (ADS)

Yue, Liang; Wang, Shan; Zhou, Ding; Zhang, Hao; Li, Bao; Wu, Lixin

2016-02-01

Consecutive two-dimensional frameworks comprised of molecular or cluster building blocks in large area represent ideal candidates for membranes sieving molecules and nano-objects, but challenges still remain in methodology and practical preparation. Here we exploit a new strategy to build soft single-layer ionic organic-inorganic frameworks via electrostatic interaction without preferential binding direction in water. Upon consideration of steric effect and additional interaction, polyanionic clusters as connection nodes and cationic pseudorotaxanes acting as bridging monomers connect with each other to form a single-layer ionic self-assembled framework with 1.4 nm layer thickness. Such soft supramolecular polymer frameworks possess uniform and adjustable ortho-tetragonal nanoporous structure in pore size of 3.4-4.1 nm and exhibit greatly convenient solution processability. The stable membranes maintaining uniform porous structure demonstrate precisely size-selective separation of semiconductor quantum dots within 0.1 nm of accuracy and may hold promise for practical applications in selective transport, molecular separation and dialysis systems.

Down to 2 nm Ultra Shallow Junctions : Fabrication by IBS Plasma Immersion Ion Implantation Prototype PULSION registered

DOE Office of Scientific and Technical Information (OSTI.GOV)

Torregrosa, Frank; Etienne, Hasnaa; Mathieu, Gilles

Classical beam line implantation is limited in low energies and cannot achieve P+/N junctions requirements for <45nm node. Compared to conventional beam line ion implantation, limited to a minimum of about 200 eV, the efficiency of Plasma Immersion Ion Implantation (PIII) is no more to prove for the realization of Ultra Shallow Junctions (USJ) in semiconductor applications: this technique allows to get ultimate shallow profiles (as implanted) thanks to no lower limitation of energy and offers high dose rate. In the field of the European consortium NANOCMOS, Ultra Shallow Junctions implanted on a semi-industrial PIII prototype (PULSION registered ) designedmore » by the French company IBS, have been studied. Ultra shallow junctions implanted with BF3 at acceleration voltages down to 20V were realized. Contamination level, homogeneity and depth profile are studied. The SIMS profiles obtained show the capability to make ultra shallow profiles (as implanted) down to 2nm.« less

Application of CPL with Interference Mapping Lithography to generate random contact reticle designs for the 65-nm node

NASA Astrophysics Data System (ADS)

Van Den Broeke, Douglas J.; Laidig, Thomas L.; Chen, J. Fung; Wampler, Kurt E.; Hsu, Stephen D.; Shi, Xuelong; Socha, Robert J.; Dusa, Mircea V.; Corcoran, Noel P.

2004-08-01

Imaging contact and via layers continues to be one of the major challenges to be overcome for 65nm node lithography. Initial results of using ASML MaskTools' CPL Technology to print contact arrays through pitch have demonstrated the potential to further extend contact imaging to a k1 near 0.30. While there are advantages and disadvantages for any potential RET, the benefits of not having to solve the phase assignment problem (which can lead to unresolvable phase conflicts), of it being a single reticle - single exposure technique, and its application to multiple layers within a device (clear field and dark field) make CPL an attractive, cost effective solution to low k1 imaging. However, real semiconductor circuit designs consist of much more than regular arrays of contact holes and a method to define the CPL reticle design for a full chip circuit pattern is required in order for this technique to be feasible in volume manufacturing. Interference Mapping Lithography (IML) is a novel approach for defining optimum reticle patterns based on the imaging conditions that will be used when the wafer is exposed. Figure 1 shows an interference map for an isolated contact simulated using ASML /1150 settings of 0.75NA and 0.92/0.72/30deg Quasar illumination. This technique provides a model-based approach for placing all types features (scattering bars, anti-scattering bars, non-printing assist features, phase shifted and non-phase shifted) for the purpose of enhancing the resolution of the target pattern and it can be applied to any reticle type including binary (COG), attenuated phase shifting mask (attPSM), alternating aperture phase shifting mask (altPSM), and CPL. In this work, we investigate the application of IML to generate CPL reticle designs for random contact patterns that are typical for 65nm node logic devices. We examine the critical issues related to using CPL with Interference Mapping Lithography including controlling side lobe printing, contact patterns with odd symmetry, forbidden pitch regions, and reticle manufacturing constraints. Multiple methods for deriving the interference map used to define reticle patterns for various RET's will be discussed. CPL reticle designs that were created from implementing automated algorithms for contact pattern decomposition using MaskWeaver will also be presented.

Electromigration Reliability of Advanced Interconnects

NASA Astrophysics Data System (ADS)

Hu, C.-K.; Gignac, L. M.; Baker-O'Neal, B.; Liniger, E.; Yu, R.; Flaitz, P.; Stamper, A. K.

2007-10-01

Electromigration behavior in Cu damascene wires was studied for various metal line widths, thicknesses and grain sizes where the grain size was modulated by Cu linewidth and thickness, and by adjusting the wafer annealing process step after Cu electroplating and before Cu chemical mechanical polishing. Significantly different results were found between 0.2 μm and 65 nm CMOS node technologies. A larger variation of Cu grain size between the samples was achieved on 65 nm node which was due to the finer line width and thinner metal thickness. The Cu lifetime and mass flow in samples with bamboo, near bamboo, bamboo-polycrystalline mixture, and polycrystalline grain structures were measured. These factors allow one to accurately resolve the relative contribution between grain boundary and interface diffusions in the Cu nanowires. The electromigration mass flow estimated from the lifetime on the test line on a W via and physically stable liner was found to be linearly proportional to current density. The effects of Cu(Ti) alloy seeds and Cu surface pre-clean techniques before the dielectric cap depositions on Cu electromigration were also observed. A significantly improved Cu lifetime, at the expense of the Cu conductivity, was found. The electromigration activation energies for Cu in Cu(Ti) alloy, along Cu/amorphous a-SiCxNyHz interface and in Cu grain boundaries were found to be 1.3, 0.95 and 0.79+0.05 eV, respectively.

Ultra-Shallow Junctions Fabrication by Plasma Immersion Implantation on PULSION registered Followed by Laser Thermal Processing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Torregrosa, Frank; Etienne, Hasnaa; Sempere, Guillaume

In order to achieve the requirements for P+/N junctions for <45 nm ITRS nodes, ultra low energy and high dose implantations are needed. Classical beamline implantation is now limited in low energies, compared to Plasma Immersion Ion Implantation (PIII) which efficiency is no more to prove for the realization of Ultra-Shallow Junctions (USJ) in semiconductor applications : this technique allows to get ultimate shallow profiles (as implanted) due to no lower limitation of energy and high dose rate. Electrical activation is also a big issue since it has to afford high electrical activation rate with very low diffusion. Laser annealingmore » is one of the candidates for the 45 nm node. This paper presents electrical and physico-chemical characterizations of junctions realized with BF3 PIII followed by laser thermal processing with aim to obtain ultra-shallow junctions. Different implantation conditions (acceleration voltage/dose) and laser conditions (laser types, fluence/number of shots) are used for this study. Pre-amorphization is also used to confine the junction depth, and is shown to have a positive effect on junction depth but leads in higher junction leakage due to the remaining of EOR defects. The characterization is done using Optical characterization tool (SEMILAB) for sheet resistance and junction leakage measurements. SIMS is used for Boron profile and junction depth.« less

Extreme ultraviolet resist materials for sub-7 nm patterning.

PubMed

Li, Li; Liu, Xuan; Pal, Shyam; Wang, Shulan; Ober, Christopher K; Giannelis, Emmanuel P

2017-08-14

Continuous ongoing development of dense integrated circuits requires significant advancements in nanoscale patterning technology. As a key process in semiconductor high volume manufacturing (HVM), high resolution lithography is crucial in keeping with Moore's law. Currently, lithography technology for the sub-7 nm node and beyond has been actively investigated approaching atomic level patterning. EUV technology is now considered to be a potential alternative to HVM for replacing in some cases ArF immersion technology combined with multi-patterning. Development of innovative resist materials will be required to improve advanced fabrication strategies. In this article, advancements in novel resist materials are reviewed to identify design criteria for establishment of a next generation resist platform. Development strategies and the challenges in next generation resist materials are summarized and discussed.

Patterning and templating for nanoelectronics.

PubMed

Galatsis, Kosmas; Wang, Kang L; Ozkan, Mihri; Ozkan, Cengiz S; Huang, Yu; Chang, Jane P; Monbouquette, Harold G; Chen, Yong; Nealey, Paul; Botros, Youssry

2010-02-09

The semiconductor industry will soon be launching 32 nm complementary metal oxide semiconductor (CMOS) technology node using 193 nm lithography patterning technology to fabricate microprocessors with more than 2 billion transistors. To ensure the survival of Moore's law, alternative patterning techniques that offer advantages beyond conventional top-down patterning are aggressively being explored. It is evident that most alternative patterning techniques may not offer compelling advantages to succeed conventional top-down lithography for silicon integrated circuits, but alternative approaches may well indeed offer functional advantages in realising next-generation information processing nanoarchitectures such as those based on cellular, bioinsipired, magnetic dot logic, and crossbar schemes. This paper highlights and evaluates some patterning methods from the Center on Functional Engineered Nano Architectonics in Los Angeles and discusses key benchmarking criteria with respect to CMOS scaling.

Challenges of anamorphic high-NA lithography and mask making

NASA Astrophysics Data System (ADS)

Hsu, Stephen D.; Liu, Jingjing

2017-06-01

Chip makers are actively working on the adoption of 0.33 numerical aperture (NA) EUV scanners for the 7-nm and 5-nm nodes (B. Turko, S. L. Carson, A. Lio, T. Liang, M. Phillips, et al., in `Proc. SPIE9776, Extreme Ultraviolet (EUV) Lithography VII', vol. 977602 (2016) doi: 10.1117/12.2225014; A. Lio, in `Proc. SPIE9776, Extreme Ultraviolet (EUV) Lithography VII', vol. 97760V (2016) doi: 10.1117/12.2225017). In the meantime, leading foundries and integrated device manufacturers are starting to investigate patterning options beyond the 5-nm node (O. Wood, S. Raghunathan, P. Mangat, V. Philipsen, V. Luong, et al., in `Proc. SPIE. 9422, Extreme Ultraviolet (EUV) Lithography VI', vol. 94220I (2015) doi: 10.1117/12.2085022). To minimize the cost and process complexity of multiple patterning beyond the 5-nm node, EUV high-NA single-exposure patterning is a preferred method over EUV double patterning (O. Wood, S. Raghunathan, P. Mangat, V. Philipsen, V. Luong, et al., in `Proc. SPIE. 9422, Extreme Ultraviolet (EUV) Lithography VI', vol. 94220I (2015) doi: 10.1117/12.2085022; J. van Schoot, K. van Ingen Schenau, G. Bottiglieri, K. Troost, J. Zimmerman, et al., `Proc. SPIE. 9776, Extreme Ultraviolet (EUV) Lithography VII', vol. 97761I (2016) doi: 10.1117/12.2220150). The EUV high-NA scanner equipped with a projection lens of 0.55 NA is designed to support resolutions below 10 nm. The high-NA system is beneficial for enhancing resolution, minimizing mask proximity correction bias, improving normalized image log slope (NILS), and controlling CD uniformity (CDU). However, increasing NA from 0.33 to 0.55 reduces the depth of focus (DOF) significantly. Therefore, the source mask optimization (SMO) with sub-resolution assist features (SRAFs) are needed to increase DOF to meet the demanding full chip process control requirements (S. Hsu, R. Howell, J. Jia, H.-Y. Liu, K. Gronlund, et al., EUV `Proc. SPIE9048, Extreme Ultraviolet (EUV) Lithography VI', (2015) doi: 10.1117/12.2086074). To ensure no assist feature printing, the assist feature sizes need to be scaled with λ/NA. The extremely small SRAF width (below 25 nm on the reticle) is difficult to fabricate across the full reticle. In this paper, we introduce an innovative `attenuated SRAF' to improve SRAF manufacturability and still maintain the process window benefit. A new mask fabrication process is proposed to use existing mask-making capability to manufacture the attenuated SRAFs. The high-NA EUV system utilizes anamorphic reduction; 4× in the horizontal (slit) direction and 8× in the vertical (scanning) direction (J. van Schoot, K. van Ingen Schenau, G. Bottiglieri, K. Troost, J. Zimmerman, et al., `Proc. SPIE. 9776, Extreme Ultraviolet (EUV) Lithography VII', vol. 97761I (2016) doi: 10.1117/12.2220150; B. Kneer, S. Migura, W. Kaiser, J. T. Neumann, J. van Schoot, in `Proc. SPIE9422, Extreme Ultraviolet (EUV) Lithography VI', vol. 94221G (2015) doi: 10.1117/12.2175488). For an anamorphic system, the magnification has an angular dependency, and thus, familiar mask specifications such as mask error factor (MEF) need to be redefined. Similarly, mask-manufacturing rule check (MRC) needs to consider feature orientation.

EUV process establishment through litho and etch for N7 node

NASA Astrophysics Data System (ADS)

Kuwahara, Yuhei; Kawakami, Shinichiro; Kubota, Minoru; Matsunaga, Koichi; Nafus, Kathleen; Foubert, Philippe; Mao, Ming

2016-03-01

Extreme ultraviolet lithography (EUVL) technology is steadily reaching high volume manufacturing for 16nm half pitch node and beyond. However, some challenges, for example scanner availability and resist performance (resolution, CD uniformity (CDU), LWR, etch behavior and so on) are remaining. Advance EUV patterning on the ASML NXE:3300/ CLEAN TRACK LITHIUS Pro Z- EUV litho cluster is launched at imec, allowing for finer pitch patterns for L/S and CH. Tokyo Electron Ltd. and imec are continuously collabo rating to develop manufacturing quality POR processes for NXE:3300. TEL's technologies to enhance CDU, defectivity and LWR/LER can improve patterning performance. The patterning is characterized and optimized in both litho and etch for a more complete understanding of the final patterning performance. This paper reports on post-litho CDU improvement by litho process optimization and also post-etch LWR reduction by litho and etch process optimization.

Simulations of Scatterometry Down to 22 nm Structure Sizes and Beyond with Special Emphasis on LER

NASA Astrophysics Data System (ADS)

Osten, W.; Ferreras Paz, V.; Frenner, K.; Schuster, T.; Bloess, H.

2009-09-01

In recent years, scatterometry has become one of the most commonly used methods for CD metrology. With decreasing structure size for future technology nodes, the search for optimized scatterometry measurement configurations gets more important to exploit maximum sensitivity. As widespread industrial scatterometry tools mainly still use a pre-set measurement configuration, there are still free parameters to improve sensitivity. Our current work uses a simulation based approach to predict and optimize sensitivity of future technology nodes. Since line edge roughness is getting important for such small structures, these imperfections of the periodic continuation cannot be neglected. Using fourier methods like e.g. rigorous coupled wave approach (RCWA) for diffraction calculus, nonperiodic features are hard to reach. We show that in this field certain types of fieldstitching methods show nice numerical behaviour and lead to useful results.

Gaps analysis for CD metrology beyond the 22nm node

NASA Astrophysics Data System (ADS)

Bunday, Benjamin; Germer, Thomas A.; Vartanian, Victor; Cordes, Aaron; Cepler, Aron; Settens, Charles

2013-04-01

This paper will examine the future for critical dimension (CD) metrology. First, we will present the extensive list of applications for which CD metrology solutions are needed, showing commonalities and differences among the various applications. We will then report on the expected technical limits of the metrology solutions currently being investigated by SEMATECH and others in the industry to address the metrology challenges of future nodes, including conventional CD scanning electron microscopy (CD-SEM) and optical critical dimension (OCD) metrology and new potential solutions such as He-ion microscopy (HeIM, sometimes elsewhere referred to as HIM), CD atomic force microscopy (CD-AFM), CD small-angle x-ray scattering (CD-SAXS), high-voltage scanning electron microscopy (HV-SEM), and other types. A technical gap analysis matrix will then be demonstrated, showing the current state of understanding of the future of the CD metrology space.

Initial benchmarking of a new electron-beam raster pattern generator for 130-100 nm maskmaking

NASA Astrophysics Data System (ADS)

Sauer, Charles A.; Abboud, Frank E.; Babin, Sergey V.; Chakarian, Varoujan; Ghanbari, Abe; Innes, Robert; Trost, David; Raymond, Frederick, III

2000-07-01

The decision by the Semiconductor Industry Association (SIA) to accelerate the continuing evolution to smaller linewidths is consistent with the commitment by Etec Systems, Inc. to rapidly develop new technologies for pattern generation systems with improved resolution, critical dimension (CD) uniformity, positional accuracy, and throughput. Current pattern generation designs are inadequate to meet the more advanced requirements for masks, particularly at or below the 100 nm node. Major changes to all pattern generation tools will be essential to meet future market requirements. An electron-beam (e-beam) system that is designed to meet the challenges for 130 - 100 nm device generation with extendibility to the 70-nm range will be discussed. This system has an architecture that includes a graybeam writing strategy, a new state system, and improved thermal management. Detailed changes include a pulse width modulated blanking system, per-pixel deflection, retrograde scanning multipass writing, and a column with a 50 kV accelerating voltage that supports a dose of up to 45 (mu) C/cm2 with minimal amounts of resist heating. This paper examines current issues, our approach to meeting International Technology Roadmap for Semiconductors (ITRS) requirements, and some preliminary results from a new pattern generator.

Design of an integrated aerial image sensor

NASA Astrophysics Data System (ADS)

Xue, Jing; Spanos, Costas J.

2005-05-01

The subject of this paper is a novel integrated aerial image sensor (IAIS) system suitable for integration within the surface of an autonomous test wafer. The IAIS could be used as a lithography processing monitor, affording a "wafer's eye view" of the process, and therefore facilitating advanced process control and diagnostics without integrating (and dedicating) the sensor to the processing equipment. The IAIS is composed of an aperture mask and an array of photo-detectors. In order to retrieve nanometer scale resolution of the aerial image with a practical photo-detector pixel size, we propose a design of an aperture mask involving a series of spatial phase "moving" aperture groups. We demonstrate a design example aimed at the 65nm technology node through TEMPEST simulation. The optimized, key design parameters include an aperture width in the range of 30nm, aperture thickness in the range of 70nm, and offer a spatial resolution of about 5nm, all with comfortable fabrication tolerances. Our preliminary simulation work indicates the possibility of the IAIS being applied to the immersion lithography. A bench-top far-field experiment verifies that our approach of the spatial frequency down-shift through forming large Moire patterns is feasible.

SSD Market Overview

NASA Astrophysics Data System (ADS)

Wong, G.

The unparalleled cost and form factor advantages of NAND flash memory has driven 35 mm photographic film, floppy disks and one-inch hard drives to extinction. Due to its compelling price/performance characteristics, NAND Flash memory is now expanding its reach into the once-exclusive domain of hard disk drives and DRAM in the form of Solid State Drives (SSDs). Driven by the proliferation of thin and light mobile devices and the need for near-instantaneous accessing and sharing of content through the cloud, SSDs are expected to become a permanent fixture in the computing infrastructure.

Static power reduction for midpoint-terminated busses

DOEpatents

Coteus, Paul W [Yorktown Heights, NY; Takken, Todd [Brewster, NY

2011-01-18

A memory system is disclosed which is comprised of a memory controller and addressable memory devices such as DRAMs. The invention provides a programmable register to control the high vs. low drive state of each bit of a memory system address and control bus during periods of bus inactivity. In this way, termination voltage supply current can be minimized, while permitting selected bus bits to be driven to a required state. This minimizes termination power dissipation while not affecting memory system performance. The technique can be extended to work for other high-speed busses as well.

Scaling and Single Event Effects (SEE) Sensitivity

NASA Technical Reports Server (NTRS)

Oldham, Timothy R.

2003-01-01

This paper begins by discussing the potential for scaling down transistors and other components to fit more of them on chips in order to increasing computer processing speed. It also addresses technical challenges to further scaling. Components have been scaled down enough to allow single particles to have an effect, known as a Single Event Effect (SEE). This paper explores the relationship between scaling and the following SEEs: Single Event Upsets (SEU) on DRAMs and SRAMs, Latch-up, Snap-back, Single Event Burnout (SEB), Single Event Gate Rupture (SEGR), and Ion-induced soft breakdown (SBD).

Design, Fabrication, Testing, and Installation of a Press-Lam Bridge.

DTIC Science & Technology

1979-01-01

lild components Alt eneers specific gravity, and ring count (table 11 INA NA NI In Douglas-fir logs of these diameters . the width of sapwood is...typically small, dram .’, 14 I 17 , I to 3 inches The moisture content t , I 4S 9 40 4 (ovendry basis) of sapwood was as high I t, . as 140 percent... sapwood and heartwood Veneers having greater lest maleital 1 196 veneer, brilte i mnonents :. I oeneem ttalW eets Itraded S 4;6 than 25 percent sapwood

Immune stimulation following dermal exposure to unsintered indium tin oxide

PubMed Central

Brock, Kristie; Anderson, Stacey E.; Lukomska, Ewa; Long, Carrie; Anderson, Katie; Marshall, Nikki; Meade, B. Jean

2015-01-01

In recent years, several types of pulmonary pathology, including alveolar proteinosis, fibrosis, and emphysema, have been reported in workers in the indium industry. To date, there remains no clear understanding of the underlying mechanism(s). Pulmonary toxicity studies in rats and mice have demonstrated the development of mediastinal lymph node hyperplasia and granulomas of mediastinal lymph nodes and bronchus-associated lymphoid tissues following exposure to indium tin oxide. Given the association between exposure to other metals and the development of immune-mediated diseases, these studies were undertaken to begin to investigate the immuno-modulatory potential of unsintered indium tin oxide (uITO) in a mouse model. Using modifications of the local lymph node assay, BALB/c mice (five animals/group) were exposed topically via intact or breached skin or injected intradermally at the base of the ear pinnae with either vehicle or increasing concentrations 2.5–10% uITO (90:10 indium oxide/tin oxide, particle size <50 nm). Dose-responsive increases in lymphocyte proliferation were observed with a calculated EC3 of 4.7% for the intact skin study. Phenotypic analysis of draining lymph node cells following intradermal injection with 5% uITO yielded a profile consistent with a T-cell-mediated response. These studies demonstrate the potential for uITO to induce sensitization and using lymphocyte proliferation as a biomarker of exposure, and demonstrate the potential for uITO to penetrate both intact and breached skin. PMID:24164313

Acute desensitization of acetylcholine and endothelin-1 activated inward rectifier K+ current in myocytes from the cardiac atrioventricular node.

PubMed

Choisy, Stéphanie C M; James, Andrew F; Hancox, Jules C

2012-07-06

The atrioventricular node (AVN) is a vital component of the pacemaker-conduction system of the heart, co-ordinating conduction of electrical excitation from cardiac atria to ventricles and acting as a secondary pacemaker. The electrical behaviour of the AVN is modulated by vagal activity via activation of muscarinic potassium current, IKACh. However, it is not yet known if this response exhibits 'fade' or desensitization in the AVN, as established for the heart's primary pacemaker--the sinoatrial node. In this study, acute activation of IKACh in rabbit single AVN cells was investigated using whole-cell patch clamp at 37 °C. 0.1-1 μM acetylcholine (ACh) rapidly activated a robust IKACh in AVN myocytes during a descending voltage-ramp protocol. This response was inhibited by tertiapin-Q (TQ; 300 nM) and by the M2 muscarinic ACh receptor antagonist AFDX-116 (1 μM). During sustained ACh exposure the elicited IKACh exhibited bi-exponential fade (τf of 2.0 s and τs 76.9 s at -120 mV; 1 μM ACh). 10 nM ET-1 elicited a current similar to IKACh, which faded with a mono-exponential time-course (τ of 52.6 s at -120 mV). When ET-1 was applied following ACh, the ET-1 activated response was greatly attenuated, demonstrating that ACh could desensitize the response to ET-1. For neither ACh nor ET-1 was the rate of current fade dependent upon the initial response magnitude, which is inconsistent with K+ flux mediated changes in electrochemical driving force as the underlying mechanism. Collectively, these findings demonstrate that TQ sensitive inwardly rectifying K+ current in cardiac AVN cells, elicited by M2 muscarinic receptor or ET-1 receptor activation, exhibits fade due to rapid desensitization. Copyright © 2012 Elsevier Inc. All rights reserved.

Diamonds in the rough: key performance indicators for reticles and design sets

NASA Astrophysics Data System (ADS)

Ackmann, Paul

2008-10-01

The discussion on reticle cost continues to raise questions by many in the semiconductor industry. The diamond industry developed a method to judge and grade diamonds. [1, 11] The diamond-marketing tool of "The 4Cs of Diamonds" and other slogans help explain the multiple, complex variables that determine the value of a particular stone. Understanding the critical factors of Carat, Clarity, Color, and Cut allows all customers to choose a gem that matches their unique desires. I apply the same principles of "The 4Cs of Diamonds" to develop an analogous method for rating and tracking reticle performance. I introduced the first 3Cs of reticle manufacturing during my BACUS presentation panel at SPIE in February 2008. [2] To these first 3Cs (Capital, Complexity, and Content), I now add a fourth, Cycle time. I will look at how our use of reticles changes by node and use "The 4Cs of Reticles" to develop the key performance indicators (KPI) that will help our industry set standards for evaluating reticle technology. Capital includes both cost and utilization. This includes tools, people, facilities, and support systems required for building the most critical reticles. Tools have highest value in the first two years of use, and each new technology node will likely increase the Capital cost of reticles. New technologies, specifications, and materials drive Complexity for reticles, including smaller feature size, increased optical proximity correction (OPC), and more levels at sub-wavelength. The large data files needed to create finer features require the use of the newest tools for writing, inspection, and repair. Content encompasses the customer's specifications and requirements, which the mask shop must meet. The specifications are critical because they drive wafer yield. A clear increase of the number of masking levels has occurred since the 90 nm node. Cycle time starts when the design is finished and lasts until the mask house ships the reticle to the fab. Depending on the level of Complexity, a reticle can take from as few as one, to more than forty, days to build. By using the 4Cs, I can show how the reticle build has changed from the 90 nm technology node. I will begin by delineating proposed KPIs for reticles.

Software-based data path for raster-scanned multi-beam mask lithography

NASA Astrophysics Data System (ADS)

Rajagopalan, Archana; Agarwal, Ankita; Buck, Peter; Geller, Paul; Hamaker, H. Christopher; Rao, Nagswara

2016-10-01

According to the 2013 SEMATECH Mask Industry Survey,i roughly half of all photomasks are produced using laser mask pattern generator ("LMPG") lithography. LMPG lithography can be used for all layers at mature technology nodes, and for many non-critical and semi-critical masks at advanced nodes. The extensive use of multi-patterning at the 14-nm node significantly increases the number of critical mask layers, and the transition in wafer lithography from positive tone resist to negative tone resist at the 14-nm design node enables the switch from advanced binary masks back to attenuated phase shifting masks that require second level writes to remove unwanted chrome. LMPG lithography is typically used for second level writes due to its high productivity, absence of charging effects, and versatile non-actinic alignment capability. As multi-patterning use expands from double to triple patterning and beyond, the number of LMPG second level writes increases correspondingly. The desire to reserve the limited capacity of advanced electron beam writers for use when essential is another factor driving the demand for LMPG capacity. The increasing demand for cost-effective productivity has kept most of the laser mask writers ever manufactured running in production, sometimes long past their projected lifespan, and new writers continue to be built based on hardware developed some years ago.ii The data path is a case in point. While state-ofthe- art when first introduced, hardware-based data path systems are difficult to modify or add new features to meet the changing requirements of the market. As data volumes increase, design styles change, and new uses are found for laser writers, it is useful to consider a replacement for this critical subsystem. The availability of low-cost, high-performance, distributed computer systems combined with highly scalable EDA software lends itself well to creating an advanced data path system. EDA software, in routine production today, scales well to hundreds or even thousands of CPU-cores, offering the potential for virtually unlimited capacity. Features available in EDA software such as sizing, scaling, tone reversal, OPC, MPC, rasterization, and others are easily adapted to the requirements of a data path system. This paper presents the motivation, requirements, design and performance of an advanced, scalable software data path system suitable to support multi-beam laser mask lithography.

Design intent optimization at the beyond 7nm node: the intersection of DTCO and EUVL stochastic mitigation techniques

NASA Astrophysics Data System (ADS)

Crouse, Michael; Liebmann, Lars; Plachecki, Vince; Salama, Mohamed; Chen, Yulu; Saulnier, Nicole; Dunn, Derren; Matthew, Itty; Hsu, Stephen; Gronlund, Keith; Goodwin, Francis

2017-03-01

The initial readiness of EUV patterning was demonstrated in 2016 with IBM Alliance's 7nm device technology. The focus has now shifted to driving the 'effective' k1 factor and enabling the second generation of EUV patterning. Thus, Design Technology Co-optimization (DTCO) has become a critical part of technology enablement as scaling has become more challenging and the industry pushes the limits of EUV lithography. The working partnership between the design teams and the process development teams typically involves an iterative approach to evaluate the manufacturability of proposed designs, subsequent modifications to those designs and finally a design manual for the technology. While this approach has served the industry well for many generations, the challenges at the Beyond 7nm node require a more efficient approach. In this work, we describe the use of "Design Intent" lithographic layout optimization where we remove the iterative component of DTCO and replace it with an optimization that achieves both a "patterning friendly" design and minimizes the well-known EUV stochastic effects. Solved together, this "design intent" approach can more quickly achieve superior lithographic results while still meeting the original device's functional specifications. Specifically, in this work we will demonstrate "design intent" optimization for critical BEOL layers using design tolerance bands to guide the source mask co-optimization. The design tolerance bands can be either supplied as part of the original design or derived from some basic rules. Additionally, the EUV stochastic behavior is mitigated by enhancing the image log slope (ILS) for specific key features as part of the overall optimization. We will show the benefit of the "design intent approach" on both bidirectional and unidirectional 28nm min pitch standard logic layouts and compare the more typical iterative SMO approach. Thus demonstrating the benefit of allowing the design to float within the specified range. Lastly, we discuss how the evolution of this approach could lead to layout optimization based entirely on some minimal set of functional requirements and process constraints.

Stability and imaging of the ASML EUV alpha demo tool

NASA Astrophysics Data System (ADS)

Hermans, Jan V.; Baudemprez, Bart; Lorusso, Gian; Hendrickx, Eric; van Dijk, Andre; Jonckheere, Rik; Goethals, Anne-Marie

2009-03-01

Extreme Ultra-Violet (EUV) lithography is the leading candidate for semiconductor manufacturing of the 22nm technology node and beyond, due to the very short wavelength of 13.5nm. However, reducing the wavelength adds complexity to the lithographic process. The impact of the EUV specific conditions on lithographic performance needs to be understood, before bringing EUV lithography into pre-production. To provide early learning on EUV, an EUV fullfield scanner, the Alpha Demo Tool (ADT) from ASML was installed at IMEC, using a Numerical Aperture (NA) of 0.25. In this paper we report on different aspects of the ADT: the imaging and overlay performance and both short and long-term stability. For 40nm dense Lines-Spaces (LS), the ADT shows an across field overlapping process window of 270nm Depth Of Focus (DOF) at 10% Exposure Latitude (EL) and a wafer CD Uniformity (CDU) of 3nm 3σ, without any corrections for process or reticle. The wafer CDU is correlated to different factors that are known to influence the CD fingerprint from traditional lithography: slit intensity uniformity, focus plane deviation and reticle CD error. Taking these contributions into account, the CD through slit fingerprint for 40nm LS is simulated with excellent agreement to experimental data. The ADT shows good CD stability over 9 months of operation, both intrafield and across wafer. The projection optics reflectivity has not degraded over 9 months. Measured overlay performance with respect to a dry tool shows |Mean|+3σ below 20nm with more correction potential by applying field-by-field corrections (|Mean|+3σ <=10nm). For 22nm SRAM application, both contact hole and metal layer were printed in EUV with 10% CD and 15nm overlay control. Below 40nm, the ADT shows good wafer CDU for 30nm dense and isolated lines (on the same wafer) and 38nm dense Contact Holes (CH). First 28nm dense line CDU data are achieved. The results indicate that the ADT can be used effectively for EUV process development before installation of the pre-production tool, the ASML NXE Gen. 1 at IMEC.

High-Performance Blue-Excitable Yellow Phosphor Obtained from an Activated Solvochromic Bismuth-Fluorophore Metal–Organic Framework

DOE PAGES

Deibert, Benjamin J.; Velasco, Ever; Liu, Wei; ...

2016-06-23

Here, we report the synthesis, structure, and photoluminescence properties of a new bismuth based luminescent metal-organic framework (LMOF). The framework is comprised of a 9-coordinated Bi 3+ building unit and 4', 4''', 4''''', 4'''''''-(ethene-1,1,2,2-tetrayl)tetrakis([1,1'-biphenyl]-4-carboxylic acid) (H 4tcbpe) organic linker, which has strong yellow aggregation induced emission (AIE). The structure can be viewed as two interpenetrated 4,4-anionic nets that are stabilized by K + ions forming one-dimensional helical inorganic chains by connecting bismuth nodes through shared oxygen bonds. The as-made LMOF has a bluish emission centered at 459 nm with an internal quantum yield of 57% when excited at 360 nm.more » The emission properties of the LMOF were found to be highly solvochromic with respect to DMF. Upon partial solvent removal, the framework undergoes significant red-shifting to a greenish emission centered at 500 nm. Complete removal of DMF results in additional red-shifting fluorescence coupled with structural changes. The resulting material has strong blue-excitable (455 nm) yellow emission centered at 553 nm, with a quantum yield of 74%, which is maintained after heating in air for 5 days at 90°C. This is the second highest quantum yield value for blue-excited yellow emission among all reported LMOFs.« less

High-Performance Blue-Excitable Yellow Phosphor Obtained from an Activated Solvochromic Bismuth-Fluorophore Metal–Organic Framework

DOE Office of Scientific and Technical Information (OSTI.GOV)

Deibert, Benjamin J.; Velasco, Ever; Liu, Wei

Here, we report the synthesis, structure, and photoluminescence properties of a new bismuth based luminescent metal-organic framework (LMOF). The framework is comprised of a 9-coordinated Bi 3+ building unit and 4', 4''', 4''''', 4'''''''-(ethene-1,1,2,2-tetrayl)tetrakis([1,1'-biphenyl]-4-carboxylic acid) (H 4tcbpe) organic linker, which has strong yellow aggregation induced emission (AIE). The structure can be viewed as two interpenetrated 4,4-anionic nets that are stabilized by K + ions forming one-dimensional helical inorganic chains by connecting bismuth nodes through shared oxygen bonds. The as-made LMOF has a bluish emission centered at 459 nm with an internal quantum yield of 57% when excited at 360 nm.more » The emission properties of the LMOF were found to be highly solvochromic with respect to DMF. Upon partial solvent removal, the framework undergoes significant red-shifting to a greenish emission centered at 500 nm. Complete removal of DMF results in additional red-shifting fluorescence coupled with structural changes. The resulting material has strong blue-excitable (455 nm) yellow emission centered at 553 nm, with a quantum yield of 74%, which is maintained after heating in air for 5 days at 90°C. This is the second highest quantum yield value for blue-excited yellow emission among all reported LMOFs.« less

Mutant p53 proteins counteract autophagic mechanism sensitizing cancer cells to mTOR inhibition.

PubMed

Cordani, Marco; Oppici, Elisa; Dando, Ilaria; Butturini, Elena; Dalla Pozza, Elisa; Nadal-Serrano, Mercedes; Oliver, Jordi; Roca, Pilar; Mariotto, Sofia; Cellini, Barbara; Blandino, Giovanni; Palmieri, Marta; Di Agostino, Silvia; Donadelli, Massimo

2016-08-01

Mutations in TP53 gene play a pivotal role in tumorigenesis and cancer development. Here, we report that gain-of-function mutant p53 proteins inhibit the autophagic pathway favoring antiapoptotic effects as well as proliferation of pancreas and breast cancer cells. We found that mutant p53 significantly counteracts the formation of autophagic vesicles and their fusion with lysosomes throughout the repression of some key autophagy-related proteins and enzymes as BECN1 (and P-BECN1), DRAM1, ATG12, SESN1/2 and P-AMPK with the concomitant stimulation of mTOR signaling. As a paradigm of this mechanism, we show that atg12 gene repression was mediated by the recruitment of the p50 NF-κB/mutant p53 protein complex onto the atg12 promoter. Either mutant p53 or p50 NF-κB depletion downregulates atg12 gene expression. We further correlated the low expression levels of autophagic genes (atg12, becn1, sesn1, and dram1) with a reduced relapse free survival (RFS) and distant metastasis free survival (DMFS) of breast cancer patients carrying TP53 gene mutations conferring a prognostic value to this mutant p53-and autophagy-related signature. Interestingly, the mutant p53-driven mTOR stimulation sensitized cancer cells to the treatment with the mTOR inhibitor everolimus. All these results reveal a novel mechanism through which mutant p53 proteins promote cancer cell proliferation with the concomitant inhibition of autophagy. Copyright © 2016 Federation of European Biochemical Societies. Published by Elsevier B.V. All rights reserved.

The Impact on Space Radiation Requirements and Effects on ASIMS

NASA Technical Reports Server (NTRS)

Barnes, C.; Johnston, A.; Swift, G.

1995-01-01

The evolution of highly miniaturized electronic and mechanical systems will be accompanied by new problems and issues regarding the radiation response of these systems in the space environment. In this paper we discuss some of the more prominent radiation problems brought about by miniaturization. For example, autonomous micro-spacecraft will require large amounts of high density memory, most likely in the form of stacked, multichip modules of DRAM's, that must tolerate the radiation environment. However, advanced DRAM's (16 to 256 Mbit) are quite susceptible to radiation, particularly single event effects, and even exhibit new radiation phenomena that were not a problem for older, less dense memory chips. Another important trend in micro-spacecraft electronics is toward the use of low-voltage microelectronic systems that consume less power. However, the reduction in operating voltage also caries with it an increased susceptibility to radiation. In the case of application specific integrated microcircuits (ASIM's), advanced devices of this type, such as high density field programmable gate arrays (FPGA's) exhibit new single event effects (SEE), such as single particle reprogramming of anti-fuse links. New advanced bipolar circuits have been shown recently to degrade more rapidly in the low dose rate space environment than in the typical laboratory total dose radiation test used to qualify such devices. Thus total dose testing of these parts is no longer an appropriately conservative measure to be used for hardness assurance. We also note that the functionality of micromechanical Si-based devices may be altered due to the radiation-induced deposition of charge in the oxide passivation layers.

Enabling CD SEM metrology for 5nm technology node and beyond

NASA Astrophysics Data System (ADS)

Lorusso, Gian Francesco; Ohashi, Takeyoshi; Yamaguchi, Astuko; Inoue, Osamu; Sutani, Takumichi; Horiguchi, Naoto; Bömmels, Jürgen; Wilson, Christopher J.; Briggs, Basoene; Tan, Chi Lim; Raymaekers, Tom; Delhougne, Romain; Van den Bosch, Geert; Di Piazza, Luca; Kar, Gouri Sankar; Furnémont, Arnaud; Fantini, Andrea; Donadio, Gabriele Luca; Souriau, Laurent; Crotti, Davide; Yasin, Farrukh; Appeltans, Raf; Rao, Siddharth; De Simone, Danilo; Rincon Delgadillo, Paulina; Leray, Philippe; Charley, Anne-Laure; Zhou, Daisy; Veloso, Anabela; Collaert, Nadine; Hasumi, Kazuhisa; Koshihara, Shunsuke; Ikota, Masami; Okagawa, Yutaka; Ishimoto, Toru

2017-03-01

The CD SEM (Critical Dimension Scanning Electron Microscope) is one of the main tools used to estimate Critical Dimension (CD) in semiconductor manufacturing nowadays, but, as all metrology tools, it will face considerable challenges to keep up with the requirements of the future technology nodes. The root causes of these challenges are not uniquely related to the shrinking CD values, as one might expect, but to the increase in complexity of the devices in terms of morphology and chemical composition as well. In fact, complicated threedimensional device architectures, high aspect ratio features, and wide variety of materials are some of the unavoidable characteristics of the future metrology nodes. This means that, beside an improvement in resolution, it is critical to develop a CD SEM metrology capable of satisfying the specific needs of the devices of the nodes to come, needs that sometimes will have to be addressed through dramatic changes in approach with respect to traditional CD SEM metrology. In this paper, we report on the development of advanced CD SEM metrology at imec on a variety of device platform and processes, for both logic and memories. We discuss newly developed approaches for standard, IIIV, and germanium FinFETs (Fin Field Effect Transistors), for lateral and vertical nanowires (NW), 3D NAND (three-dimensional NAND), STT-MRAM (Spin Transfer Magnetic Torque Random-Access Memory), and ReRAM (Resistive Random Access Memory). Applications for both front-end of line (FEOL) and back-end of line (BEOL) are developed. In terms of process, S/D Epi (Source Drain Epitaxy), SAQP (Self-Aligned Quadruple Patterning), DSA (Dynamic Self-Assembly), and EUVL (Extreme Ultraviolet Lithography) have been used. The work reported here has been performed on Hitachi CG5000, CG6300, and CV5000. In terms of logic, we discuss here the S/D epi defect classification, the metrology optimization for STI (Shallow Trench Isolation) Ge FinFETs, the defectivity of III-V STI FinFETs,, metrology for vertical and horizontal NWs. With respect to memory, we discuss a STT-RAM statistical CD analysis and its comparison to electrical performance, ReRAM metrology for VMCO (Vacancy-modulated conductive oxide) with comparison with electrical performance, 3D NAND ONO (Oxide Nitride Oxide) thickness measurements. In addition, we report on 3D morphological reconstruction using CD SEM in conjunction with FIB (Focused Ion Beam), on optimized BKM (Best Known Methods) development methodologies, and on CD SEM overlay. The large variety of results reported here gives a clear overview of the creative effort put in place to ensure that the critical potential of CD SEM metrology tools is fully enabled for the 5nm node and beyond.

A films based approach to intensity imbalance correction for 65nm node c:PSM

NASA Astrophysics Data System (ADS)

Cottle, Rand; Sixt, Pierre; Lassiter, Matt; Cangemi, Marc; Martin, Patrick; Progler, Chris

2005-11-01

Intensity imbalance between the 0 and π phase features of c:PSM cause gate CD control and edge placement problems. Strategies such as undercut, selective biasing, and combinations of undercut and bias are currently used in production to mitigate these problems. However, there are drawbacks to these strategies such as space CD delta through pitch, gate CD control through defocus, design rule restrictions, and reticle manufacturability. This paper investigates the application of an innovative films-based approach to intensity balancing known as the Transparent Etch Stop Layer (TESL). TESL, in addition to providing a host of reticle quality and manufacturability benefits, also can be tuned to significantly reduce imbalance. Rigorous 3D vector simulations and experimental data compare through pitch and defocus performance of TESL and conventional c:PSM for 65nm design rules.

The novel top-coat material for RLS trade-off reduction in EUVL

NASA Astrophysics Data System (ADS)

Onishi, Ryuji; Sakamoto, Rikimaru; Fujitani, Noriaki; Endo, Takafumi; Ho, Bang-ching

2012-03-01

For the next generation lithography (NGL), several technologies have been proposed to achieve the 22nm-node devices and beyond. Extreme ultraviolet (EUV) lithography is one of the candidates for the next generation lithography. In EUV light source development, low power is one of the critical issue because of the low throughput, and another issue is Out of Band (OoB) light existing in EUV light. OoB is concerned to be the cause of deterioration for the lithography performance. In order to avoid this critical issue, we focused on development of the resist top coat material with OoB absorption property as Out of Band Protection Layer (OBPL). We designed this material having high absorbance around 240nm wavelength and high transmittance for EUV light. And this material aimed to improve sensitivity, resolution and LWR performance.

Microeconomics of yield learning and process control in semiconductor manufacturing

NASA Astrophysics Data System (ADS)

Monahan, Kevin M.

2003-06-01

Simple microeconomic models that directly link yield learning to profitability in semiconductor manufacturing have been rare or non-existent. In this work, we review such a model and provide links to inspection capability and cost. Using a small number of input parameters, we explain current yield management practices in 200mm factories. The model is then used to extrapolate requirements for 300mm factories, including the impact of technology transitions to 130nm design rules and below. We show that the dramatic increase in value per wafer at the 300mm transition becomes a driver for increasing metrology and inspection capability and sampling. These analyses correlate well wtih actual factory data and often identify millions of dollars in potential cost savings. We demonstrate this using the example of grating-based overlay metrology for the 65nm node.

Manufacturing of ArF chromeless hard shifter for 65-nm technology

NASA Astrophysics Data System (ADS)

Park, Keun-Taek; Dieu, Laurent; Hughes, Greg P.; Green, Kent G.; Croffie, Ebo H.; Taravade, Kunal N.

2003-12-01

For logic design, Chrome-less Phase Shift Mask is one of the possible solutions for defining small geometry with low MEF (mask enhancement factor) for the 65nm node. There have been lots of dedicated studies on the PCO (Phase Chrome Off-axis) mask technology and several design approaches have been proposed including grating background, chrome patches (or chrome shield) for applying PCO on line/space and contact pattern. In this paper, we studied the feasibility of grating design for line and contact pattern. The design of the grating pattern was provided from the EM simulation software (TEMPEST) and the aerial image simulation software. AIMS measurements with high NA annular illumination were done. Resist images were taken on designed pattern in different focus. Simulations, AIMS are compared to verify the consistency of the process with wafer printed performance.

Selective MBE growth of hexagonal networks of trapezoidal and triangular GaAs nanowires on patterned (1 1 1)B substrates

NASA Astrophysics Data System (ADS)

Tamai, Isao; Hasegawa, Hideki

2007-04-01

As a combination of novel hardware architecture and novel system architecture for future ultrahigh-density III-V nanodevice LSIs, the authors' group has recently proposed a hexagonal binary decision diagram (BDD) quantum circuit approach where gate-controlled path switching BDD node devices for a single or few electrons are laid out on a hexagonal nanowire network to realize a logic function. In this paper, attempts are made to establish a method to grow highly dense hexagonal nanowire networks for future BDD circuits by selective molecular beam epitaxy (MBE) on (1 1 1)B substrates. The (1 1 1)B orientation is suitable for BDD architecture because of the basic three-fold symmetry of the BDD node device. The growth experiments showed complex evolution of the cross-sectional structures, and it was explained in terms of kinetics determining facet boundaries. Straight arrays of triangular nanowires with 60 nm base width as well as hexagonal arrays of trapezoidal nanowires with a node density of 7.5×10 6 cm -2 were successfully grown with the aid of computer simulation. The result shows feasibility of growing high-density hexagonal networks of GaAs nanowires with precise control of the shape and size.

Results from prototype die-to-database reticle inspection system

NASA Astrophysics Data System (ADS)

Mu, Bo; Dayal, Aditya; Broadbent, Bill; Lim, Phillip; Goonesekera, Arosha; Chen, Chunlin; Yeung, Kevin; Pinto, Becky

2009-03-01

A prototype die-to-database high-resolution reticle defect inspection system has been developed for 32nm and below logic reticles, and 4X Half Pitch (HP) production and 3X HP development memory reticles. These nodes will use predominantly 193nm immersion lithography (with some layers double patterned), although EUV may also be used. Many different reticle types may be used for these generations including: binary (COG, EAPSM), simple tritone, complex tritone, high transmission, dark field alternating (APSM), mask enhancer, CPL, and EUV. Finally, aggressive model based OPC is typically used, which includes many small structures such as jogs, serifs, and SRAF (sub-resolution assist features), accompanied by very small gaps between adjacent structures. The architecture and performance of the prototype inspection system is described. This system is designed to inspect the aforementioned reticle types in die-todatabase mode. Die-to-database inspection results are shown on standard programmed defect test reticles, as well as advanced 32nm logic, and 4X HP and 3X HP memory reticles from industry sources. Direct comparisons with currentgeneration inspection systems show measurable sensitivity improvement and a reduction in false detections.

High order field-to-field corrections for imaging and overlay to achieve sub 20-nm lithography requirements

NASA Astrophysics Data System (ADS)

Mulkens, Jan; Kubis, Michael; Hinnen, Paul; de Graaf, Roelof; van der Laan, Hans; Padiy, Alexander; Menchtchikov, Boris

2013-04-01

Immersion lithography is being extended to the 20-nm and 14-nm node and the lithography performance requirements need to be tightened further to enable this shrink. In this paper we present an integral method to enable high-order fieldto- field corrections for both imaging and overlay, and we show that this method improves the performance with 20% - 50%. The lithography architecture we build for these higher order corrections connects the dynamic scanner actuators with the angle resolved scatterometer via a separate application server. Improvements of CD uniformity are based on enabling the use of freeform intra-field dose actuator and field-to-field control of focus. The feedback control loop uses CD and focus targets placed on the production mask. For the overlay metrology we use small in-die diffraction based overlay targets. Improvements of overlay are based on using the high order intra-field correction actuators on a field-tofield basis. We use this to reduce the machine matching error, extending the heating control and extending the correction capability for process induced errors.

Cubic sub-20 nm NaLuF(4)-based upconversion nanophosphors for high-contrast bioimaging in different animal species.

PubMed

Yang, Tianshe; Sun, Yun; Liu, Qian; Feng, Wei; Yang, Pengyuan; Li, Fuyou

2012-05-01

A new upconversion luminescence (UCL) nanophosphors based on host matrix of cubic NaLuF(4) with bright luminescence have been synthesized by a solvothermal method, facilitate the nanocrystals potential candidates for imaging in vivo, especially large-animals. The sub-20 nm NaLuF(4) co-doped Yb(3+) and Er(3+) (Tm(3+)) showed about 10-fold stronger UCL emission than that of corresponding hexagonal NaYF(4)-based nanocrystals with a 20 nm diameter. Near-infrared to near-infrared (NIR-to-NIR) UCL emission of PAA-coated NaLuF(4):20%Yb,1%Tm (PAA-Lu(Tm)) can penetrate >1.5 cm tissue of pork with high contrast. Based on super-strong UCL emission and deep penetration, PAA-Lu(Tm) as optical bioprobe has been demonstrated by in vivo UCL imaging of a normal black mouse, even rabbit with excellent signal-to-noise ratio. Furthermore, such cubic NaLuF(4)-based nanophosphor was applied in lymph node imaging of live Kunming mouse with rich white fur. Copyright © 2012 Elsevier Ltd. All rights reserved.

Deep-submicron Graphene Field-Effect Transistors with State-of-Art fmax

PubMed Central

Lyu, Hongming; Lu, Qi; Liu, Jinbiao; Wu, Xiaoming; Zhang, Jinyu; Li, Junfeng; Niu, Jiebin; Yu, Zhiping; Wu, Huaqiang; Qian, He

2016-01-01

In order to conquer the short-channel effects that limit conventional ultra-scale semiconductor devices, two-dimensional materials, as an option of ultimate thin channels, receive wide attention. Graphene, in particular, bears great expectations because of its supreme carrier mobility and saturation velocity. However, its main disadvantage, the lack of bandgap, has not been satisfactorily solved. As a result, maximum oscillation frequency (fmax) which indicates transistors’ power amplification ability has been disappointing. Here, we present submicron field-effect transistors with specially designed low-resistance gate and excellent source/drain contact, and therefore significantly improved fmax. The fabrication was assisted by the advanced 8-inch CMOS back-end-of-line technology. A 200-nm-gate-length GFET achieves fT/fmax = 35.4/50 GHz. All GFET samples with gate lengths ranging from 200 nm to 400 nm possess fmax 31–41% higher than fT, closely resembling Si n-channel MOSFETs at comparable technology nodes. These results re-strengthen the promise of graphene field-effect transistors in next generation semiconductor electronics. PMID:27775009

Pulmonary Laser Metastasectomy by 1318-nm Neodymium-Doped Yttrium-Aluminum Garnet Laser: A Retrospective Study About Laser Metastasectomy of the Lung.

PubMed

Porrello, Calogero; Gullo, Roberto; Vaglica, Antonino; Scerrino, Gregorio; Salamone, Giuseppe; Licari, Leo; Raspanti, Cristina; Gulotta, Eliana; Gulotta, Gaspare; Cocorullo, Gianfranco

2018-04-01

The lungs are among the first organ affected by remote metastases from many primary tumors. The surgical resection of isolated pulmonary metastases represents an important and effective element of therapy. This is a retrospective study about our entire experience with pulmonary resection for metastatic cancer using 1318-nm neodymium-doped yttrium-aluminum garnet laser. In this single-institution study, we retrospectively analyzed a group of 209 patients previously treated for primary malignant solid tumors. We excluded 103 patients. The number and location of lesions in the lungs was determined using chest computed tomography and positron emission tomography-computed tomography. Disseminated malignancy was excluded. All pulmonary laser resections are performed via an anteroaxillary muscle-sparing thoracotomy. All lesions were routinely removed by laser with a small (5-10 mm) margin of the healthy lung. Patients received systematic lymph node sampling with intraoperative smear cytology of sampled lymph nodes. Mortality at 2 years from the first surgery is around 20% (10% annually). This value increases to 45% in the third year. The estimated median survival for patients who underwent the first surgery is reported to be approximately 42 months. Our results show that laser resection of lung metastases can achieve good result, in terms of radical resection and survival, as conventional surgical metastasectomy. The great advantage is the possibility of limiting the damage to the lung. Stapler resection of a high number of metastases would mutilate the lung.

Defect window analysis by using SEM-contour based shape quantifying method for sub-20nm node production

NASA Astrophysics Data System (ADS)

Hibino, Daisuke; Hsu, Mingyi; Shindo, Hiroyuki; Izawa, Masayuki; Enomoto, Yuji; Lin, J. F.; Hu, J. R.

2013-04-01

The impact on yield loss due to systematic defect which remains after Optical Proximity Correction (OPC) modeling has increased, and achieving an acceptable yield has become more difficult in the leading technology beyond 20 nm node production. Furthermore Process-Window has become narrow because of the complexity of IC design and less process margin. In the past, the systematic defects have been inspected by human-eyes. However the judgment by human-eyes is sometime unstable and not accurate. Moreover an enormous amount of time and labor will have to be expended on the one-by-one judgment for several thousands of hot-spot defects. In order to overcome these difficulties and improve the yield and manufacturability, the automated system, which can quantify the shape difference with high accuracy and speed, is needed. Inspection points could be increased for getting higher yield, if the automated system achieves our goal. Defect Window Analysis (DWA) system by using high-precision-contour extraction from SEM image on real silicon and quantifying method which can calculate the difference between defect pattern and non-defect pattern automatically, which was developed by Hitachi High-Technologies, has been applied to the defect judgment instead of the judgment by human-eyes. The DWA result which describes process behavior might be feedback to design or OPC or mask. This new methodology and evaluation results will be presented in detail in this paper.

Improved control of multi-layer overlay in advanced 8nm logic nodes

NASA Astrophysics Data System (ADS)

Kim, Tae-Sun; Park, Young-Sik; Kim, Yong-Chul; Kim, Byoung-Hoon; Lee, Ji-Hun; Kwak, Min-Keun; Choi, Sung-Won; Park, Joon-Soo; Yang, Hong-Cheon; Meixner, Philipp; Lee, Dong-jin; Kwon, Oh-Sung; Kim, Hyun-Su; Park, Jin-Tae; Lee, Sung-Min; Grouwstra, Cedric; van der Meijden, Vidar; El Kodadi, Mohamed; Kim, Chris; Guittet, Pierre-Yves; Nooitgedagt, Tjitte

2018-03-01

With the increase of litho-etch steps the industry requires metrology to deliver solutions to improve throughput of overlay measurements without impacting accuracy. ASML's YieldStar 350E is capable of utilizing targets, which can measure the overlay of multiple layers simultaneously. For the work discussed in this paper, an evaluation is performed on Logic product wafers using both single-layer and multi-layer (MLT) quad type targets (able to capture up to four litho-etch steps). Different target types were compared in terms of Move-and-Acquire (MA) time, residual and matching to SEM. Using the MLT targets, an MA time improvement of 56% was demonstrated on the singlelayer. The maximum delta between the overlay residual among the YieldStar targets after applying an high order model was shown to be 0.05 nm. In comparison to after-etch overlay, the correlation of the MLT target was determined with an R2 > 0.95 using a set-get wafer with induced 10 nm overlay range. On a normal production wafer, the correlation was R2 > 0.67, which is high on a wafer without induced overlay. The comparison of modeling parameters between SEM and MLT targets shows a good match (< 0.16nm) as well.

Towards large size substrates for III-V co-integration made by direct wafer bonding on Si

NASA Astrophysics Data System (ADS)

Daix, N.; Uccelli, E.; Czornomaz, L.; Caimi, D.; Rossel, C.; Sousa, M.; Siegwart, H.; Marchiori, C.; Hartmann, J. M.; Shiu, K.-T.; Cheng, C.-W.; Krishnan, M.; Lofaro, M.; Kobayashi, M.; Sadana, D.; Fompeyrine, J.

2014-08-01

We report the first demonstration of 200 mm InGaAs-on-insulator (InGaAs-o-I) fabricated by the direct wafer bonding technique with a donor wafer made of III-V heteroepitaxial structure grown on 200 mm silicon wafer. The measured threading dislocation density of the In0.53Ga0.47As (InGaAs) active layer is equal to 3.5 × 109 cm-2, and it does not degrade after the bonding and the layer transfer steps. The surface roughness of the InGaAs layer can be improved by chemical-mechanical-polishing step, reaching values as low as 0.4 nm root-mean-square. The electron Hall mobility in 450 nm thick InGaAs-o-I layer reaches values of up to 6000 cm2/Vs, and working pseudo-MOS transistors are demonstrated with an extracted electron mobility in the range of 2000-3000 cm2/Vs. Finally, the fabrication of an InGaAs-o-I substrate with the active layer as thin as 90 nm is achieved with a Buried Oxide of 50 nm. These results open the way to very large scale production of III-V-o-I advanced substrates for future CMOS technology nodes.

Direct Generation and Detection of Quantum Correlated Photons with 3.2 um Wavelength Spacing.

PubMed

Sua, Yong Meng; Fan, Heng; Shahverdi, Amin; Chen, Jia-Yang; Huang, Yu-Ping

2017-12-13

Quantum correlated, highly non-degenerate photons can be used to synthesize disparate quantum nodes and link quantum processing over incompatible wavelengths, thereby constructing heterogeneous quantum systems for otherwise unattainable superior performance. Existing techniques for correlated photons have been concentrated in the visible and near-IR domains, with the photon pairs residing within one micron. Here, we demonstrate direct generation and detection of high-purity photon pairs at room temperature with 3.2 um wavelength spacing, one at 780 nm to match the rubidium D2 line, and the other at 3950 nm that falls in a transparent, low-scattering optical window for free space applications. The pairs are created via spontaneous parametric downconversion in a lithium niobate waveguide with specially designed geometry and periodic poling. The 780 nm photons are measured with a silicon avalanche photodiode, and the 3950 nm photons are measured with an upconversion photon detector using a similar waveguide, which attains 34% internal conversion efficiency. Quantum correlation measurement yields a high coincidence-to-accidental ratio of 54, which indicates the strong correlation with the extremely non-degenerate photon pairs. Our system bridges existing quantum technology to the challenging mid-IR regime, where unprecedented applications are expected in quantum metrology and sensing, quantum communications, medical diagnostics, and so on.

Hybrid Metrology and 3D-AFM Enhancement for CD Metrology Dedicated to 28 nm Node and Below Requirements

DOE Office of Scientific and Technical Information (OSTI.GOV)

Foucher, J.; Faurie, P.; Dourthe, L.

2011-11-10

The measurement accuracy is becoming one of the major components that have to be controlled in order to guarantee sufficient production yield. Already at the R and D level, we have to come up with the accurate measurements of sub-40 nm dense trenches and contact holes coming from 193 immersion lithography or E-Beam lithography. Current production CD (Critical Dimension) metrology techniques such as CD-SEM (CD-Scanning Electron Microscope) and OCD (Optical Critical Dimension) are limited in relative accuracy for various reasons (i.e electron proximity effect, outputs parameters correlation, stack influence, electron interaction with materials...). Therefore, time for R and D ismore » increasing, process windows degrade and finally production yield can decrease because you cannot manufactured correctly if you are unable to measure correctly. A new high volume manufacturing (HVM) CD metrology solution has to be found in order to improve the relative accuracy of production environment otherwise current CD Metrology solution will very soon get out of steam.In this paper, we will present a potential Hybrid CD metrology solution that smartly tuned 3D-AFM (3D-Atomic Force Microscope) and CD-SEM data in order to add accuracy both in R and D and production. The final goal for 'chip makers' is to improve yield and save R and D and production costs through real-time feedback loop implement on CD metrology routines. Such solution can be implemented and extended to any kind of CD metrology solution. In a 2{sup nd} part we will discuss and present results regarding a new AFM3D probes breakthrough with the introduction of full carbon tips made will E-Beam Deposition process. The goal is to overcome the current limitations of conventional flared silicon tips which are definitely not suitable for sub-32 nm nodes production.« less

PULSION® HP: Tunable, High Productivity Plasma Doping

NASA Astrophysics Data System (ADS)

Felch, S. B.; Torregrosa, F.; Etienne, H.; Spiegel, Y.; Roux, L.; Turnbaugh, D.

2011-01-01

Plasma doping has been explored for many implant applications for over two decades and is now being used in semiconductor manufacturing for two applications: DRAM polysilicon counter-doping and contact doping. The PULSION HP is a new plasma doping tool developed by Ion Beam Services for high-volume production that enables customer control of the dominant mechanism—deposition, implant, or etch. The key features of this tool are a proprietary, remote RF plasma source that enables a high density plasma with low chamber pressure, resulting in a wide process space, and special chamber and wafer electrode designs that optimize doping uniformity.

A Series of Designated Papers. Total Quality Management in the Aerospace Defense Industry. Economic Impact of Defense Budget Cuts. Korea Incorporated: A Case Study of a Newly Industrializing Nation

DTIC Science & Technology

1992-08-01

Tanzer, 1988) 200 Lee placed great emphasis on employee training, and developed the Samsung Education and Training Center modeled after Matsushita’s...their employees was credited with this huge success. By 1988 Samsung had the capability to produce between five to eight million 256K DRAM chips per...organization in which everyone, from top management to the lowest line level employees , had to work together as a team. The concept of teamwork at every

Using synchrotron light to accelerate EUV resist and mask materials learning

NASA Astrophysics Data System (ADS)

Naulleau, Patrick; Anderson, Christopher N.; Baclea-an, Lorie-Mae; Denham, Paul; George, Simi; Goldberg, Kenneth A.; Jones, Gideon; McClinton, Brittany; Miyakawa, Ryan; Mochi, Iacopo; Montgomery, Warren; Rekawa, Seno; Wallow, Tom

2011-03-01

As commercialization of extreme ultraviolet lithography (EUVL) progresses, direct industry activities are being focused on near term concerns. The question of long term extendibility of EUVL, however, remains crucial given the magnitude of the investments yet required to make EUVL a reality. Extendibility questions are best addressed using advanced research tools such as the SEMATECH Berkeley microfield exposure tool (MET) and actinic inspection tool (AIT). Utilizing Lawrence Berkeley National Laboratory's Advanced Light Source facility as the light source, these tools benefit from the unique properties of synchrotron light enabling research at nodes generations ahead of what is possible with commercial tools. The MET for example uses extremely bright undulator radiation to enable a lossless fully programmable coherence illuminator. Using such a system, resolution enhancing illuminations achieving k1 factors of 0.25 can readily be attained. Given the MET numerical aperture of 0.3, this translates to an ultimate resolution capability of 12 nm. Using such methods, the SEMATECH Berkeley MET has demonstrated resolution in resist to 16-nm half pitch and below in an imageable spin-on hard mask. At a half pitch of 16 nm, this material achieves a line-edge roughness of 2 nm with a correlation length of 6 nm. These new results demonstrate that the observed stall in ultimate resolution progress in chemically amplified resists is a materials issue rather than a tool limitation. With a resolution limit of 20-22 nm, the CAR champion from 2008 remains as the highest performing CAR tested to date. To enable continued advanced learning in EUV resists, SEMATECH has initiated a plan to implement a 0.5 NA microfield tool at the Advanced Light Source synchrotron facility. This tool will be capable of printing down to 8-nm half pitch.

High-Throughput Bit-Serial LDPC Decoder LSI Based on Multiple-Valued Asynchronous Interleaving

NASA Astrophysics Data System (ADS)

Onizawa, Naoya; Hanyu, Takahiro; Gaudet, Vincent C.

This paper presents a high-throughput bit-serial low-density parity-check (LDPC) decoder that uses an asynchronous interleaver. Since consecutive log-likelihood message values on the interleaver are similar, node computations are continuously performed by using the most recently arrived messages without significantly affecting bit-error rate (BER) performance. In the asynchronous interleaver, each message's arrival rate is based on the delay due to the wire length, so that the decoding throughput is not restricted by the worst-case latency, which results in a higher average rate of computation. Moreover, the use of a multiple-valued data representation makes it possible to multiplex control signals and data from mutual nodes, thus minimizing the number of handshaking steps in the asynchronous interleaver and eliminating the clock signal entirely. As a result, the decoding throughput becomes 1.3 times faster than that of a bit-serial synchronous decoder under a 90nm CMOS technology, at a comparable BER.

Two-photon interference at telecom wavelengths for time-bin-encoded single photons from quantum-dot spin qubits

NASA Astrophysics Data System (ADS)

Yu, Leo; Natarajan, Chandra M.; Horikiri, Tomoyuki; Langrock, Carsten; Pelc, Jason S.; Tanner, Michael G.; Abe, Eisuke; Maier, Sebastian; Schneider, Christian; Höfling, Sven; Kamp, Martin; Hadfield, Robert H.; Fejer, Martin M.; Yamamoto, Yoshihisa

2015-11-01

Practical quantum communication between remote quantum memories rely on single photons at telecom wavelengths. Although spin-photon entanglement has been demonstrated in atomic and solid-state qubit systems, the produced single photons at short wavelengths and with polarization encoding are not suitable for long-distance communication, because they suffer from high propagation loss and depolarization in optical fibres. Establishing entanglement between remote quantum nodes would further require the photons generated from separate nodes to be indistinguishable. Here, we report the observation of correlations between a quantum-dot spin and a telecom single photon across a 2-km fibre channel based on time-bin encoding and background-free frequency downconversion. The downconverted photon at telecom wavelengths exhibits two-photon interference with another photon from an independent source, achieving a mean wavepacket overlap of greater than 0.89 despite their original wavelength mismatch (900 and 911 nm). The quantum-networking operations that we demonstrate will enable practical communication between solid-state spin qubits across long distances.

Two-photon interference at telecom wavelengths for time-bin-encoded single photons from quantum-dot spin qubits.

PubMed

Yu, Leo; Natarajan, Chandra M; Horikiri, Tomoyuki; Langrock, Carsten; Pelc, Jason S; Tanner, Michael G; Abe, Eisuke; Maier, Sebastian; Schneider, Christian; Höfling, Sven; Kamp, Martin; Hadfield, Robert H; Fejer, Martin M; Yamamoto, Yoshihisa

2015-11-24

Practical quantum communication between remote quantum memories rely on single photons at telecom wavelengths. Although spin-photon entanglement has been demonstrated in atomic and solid-state qubit systems, the produced single photons at short wavelengths and with polarization encoding are not suitable for long-distance communication, because they suffer from high propagation loss and depolarization in optical fibres. Establishing entanglement between remote quantum nodes would further require the photons generated from separate nodes to be indistinguishable. Here, we report the observation of correlations between a quantum-dot spin and a telecom single photon across a 2-km fibre channel based on time-bin encoding and background-free frequency downconversion. The downconverted photon at telecom wavelengths exhibits two-photon interference with another photon from an independent source, achieving a mean wavepacket overlap of greater than 0.89 despite their original wavelength mismatch (900 and 911 nm). The quantum-networking operations that we demonstrate will enable practical communication between solid-state spin qubits across long distances.

Inline detection of Chrome degradation on binary 193nm photomasks

NASA Astrophysics Data System (ADS)

Dufaye, Félix; Sippel, Astrid; Wylie, Mark; García-Berríos, Edgardo; Crawford, Charles; Hess, Carl; Sartelli, Luca; Pogliani, Carlo; Miyashita, Hiroyuki; Gough, Stuart; Sundermann, Frank; Brochard, Christophe

2013-09-01

193nm binary photomasks are still used in the semiconductor industry for the lithography of some critical layers for the nodes 90nm and 65nm, with high volumes and over long periods. However, these 193nm binary photomasks can be impacted by a phenomenon of chrome oxidation leading to critical dimensions uniformity (CDU) degradation with a pronounced radial signature. If not detected early enough, this CDU degradation may cause defectivity issues and lower yield on wafers. Fortunately, a standard cleaning and repellicle service at the mask shop has been demonstrated as efficient to remove the grown materials and get the photomask CD back on target.Some detection methods have been already described in literature, such as wafer CD intrafield monitoring (ACLV), giving reliable results but also consuming additional SEM time with less precision than direct photomask measurement. In this paper, we propose another approach, by monitoring the CDU directly on the photomask, concurrently with defect inspection for regular requalification to production for wafer fabs. For this study, we focused on a Metal layer in a 90nm technology node. Wafers have been exposed with production conditions and then measured by SEM-CD. Afterwards, this photomask has been measured with a SEM-CD in mask shop and also inspected on a KLA-Tencor X5.2 inspection system, with pixels 125 and 90nm, to evaluate the Intensity based Critical Dimension Uniformity (iCDU) option. iCDU was firstly developed to provide feed-forward CDU maps for scanner intrafield corrections, from arrayed dense structures on memory photomasks. Due to layout complexity and differing feature types, CDU monitoring on logic photomasks used to pose unique challenges.The selection of suitable feature types for CDU monitoring on logic photomasks is no longer an issue, since the transmitted intensity map gives all the needed information, as shown in this paper. In this study, the photomask was heavily degraded after more than 18,000 300mm wafers exposed and the cleaning brought it back almost to its original state after manufacture. Wafer CD, photomask CD and iCDU results can be compared, before and after a standard mask shop cleaning. Measurement points have be chosen in logic areas and SRAM areas, so that their respective behaviours can be studied separately. Transmitted maps before and after cleaning were analysed in terms of CD shift and CDU degradation. The delta map shows a nice correlation with photomask CD shift. iCDU demonstrated the capability to detect a reliable CD range degradation of 5nm on photomask by a comparison between a reference inspection and the current inspection. Die to die inspection mode provides also valuable data, highlighting the degraded chrome sidewalls, more in the photomask centre than on the edges. Ultimately, these results would enable to trigger the preventive cleanings rather than on predefined thresholds. The expected gains for wafer fabs are cost savings (adapted cleanings frequency), increased photomask availability for production, longer photomask lifetime, no additional SEM time neither for photomask nor on wafer.

Evaluating architecture impact on system energy efficiency

PubMed Central

Yu, Shijie; Wang, Rui; Luan, Zhongzhi; Qian, Depei

2017-01-01

As the energy consumption has been surging in an unsustainable way, it is important to understand the impact of existing architecture designs from energy efficiency perspective, which is especially valuable for High Performance Computing (HPC) and datacenter environment hosting tens of thousands of servers. One obstacle hindering the advance of comprehensive evaluation on energy efficiency is the deficient power measuring approach. Most of the energy study relies on either external power meters or power models, both of these two methods contain intrinsic drawbacks in their practical adoption and measuring accuracy. Fortunately, the advent of Intel Running Average Power Limit (RAPL) interfaces has promoted the power measurement ability into next level, with higher accuracy and finer time resolution. Therefore, we argue it is the exact time to conduct an in-depth evaluation of the existing architecture designs to understand their impact on system energy efficiency. In this paper, we leverage representative benchmark suites including serial and parallel workloads from diverse domains to evaluate the architecture features such as Non Uniform Memory Access (NUMA), Simultaneous Multithreading (SMT) and Turbo Boost. The energy is tracked at subcomponent level such as Central Processing Unit (CPU) cores, uncore components and Dynamic Random-Access Memory (DRAM) through exploiting the power measurement ability exposed by RAPL. The experiments reveal non-intuitive results: 1) the mismatch between local compute and remote memory node caused by NUMA effect not only generates dramatic power and energy surge but also deteriorates the energy efficiency significantly; 2) for multithreaded application such as the Princeton Application Repository for Shared-Memory Computers (PARSEC), most of the workloads benefit a notable increase of energy efficiency using SMT, with more than 40% decline in average power consumption; 3) Turbo Boost is effective to accelerate the workload execution and further preserve the energy, however it may not be applicable on system with tight power budget. PMID:29161317

Evaluating architecture impact on system energy efficiency.

PubMed

Yu, Shijie; Yang, Hailong; Wang, Rui; Luan, Zhongzhi; Qian, Depei

2017-01-01

As the energy consumption has been surging in an unsustainable way, it is important to understand the impact of existing architecture designs from energy efficiency perspective, which is especially valuable for High Performance Computing (HPC) and datacenter environment hosting tens of thousands of servers. One obstacle hindering the advance of comprehensive evaluation on energy efficiency is the deficient power measuring approach. Most of the energy study relies on either external power meters or power models, both of these two methods contain intrinsic drawbacks in their practical adoption and measuring accuracy. Fortunately, the advent of Intel Running Average Power Limit (RAPL) interfaces has promoted the power measurement ability into next level, with higher accuracy and finer time resolution. Therefore, we argue it is the exact time to conduct an in-depth evaluation of the existing architecture designs to understand their impact on system energy efficiency. In this paper, we leverage representative benchmark suites including serial and parallel workloads from diverse domains to evaluate the architecture features such as Non Uniform Memory Access (NUMA), Simultaneous Multithreading (SMT) and Turbo Boost. The energy is tracked at subcomponent level such as Central Processing Unit (CPU) cores, uncore components and Dynamic Random-Access Memory (DRAM) through exploiting the power measurement ability exposed by RAPL. The experiments reveal non-intuitive results: 1) the mismatch between local compute and remote memory node caused by NUMA effect not only generates dramatic power and energy surge but also deteriorates the energy efficiency significantly; 2) for multithreaded application such as the Princeton Application Repository for Shared-Memory Computers (PARSEC), most of the workloads benefit a notable increase of energy efficiency using SMT, with more than 40% decline in average power consumption; 3) Turbo Boost is effective to accelerate the workload execution and further preserve the energy, however it may not be applicable on system with tight power budget.

IE Data Processing.

DTIC Science & Technology

1984-10-01

RN4 DMT P6 CAnQ fram P4 Satellite ID-343567656469B Sensor Bias Node Voltages 1 1.27 0. 2 7.54 6.31 3 16.42 15.26 4 28.93 27.87 NmDber of sectors per...Monitor Interoretation Event Yloitor Voltage Change Sensor Operation Mode Cange Duration Frequency 0 20 Elec: Density Cal2 1024 ion: Density 1 K 2, 3of...34"Event monitor voltage decreases linearly fron 500 to 100 during electron sweep. • Event monitor voltage increases linearly from 10 to 500 during

Self-aligned block technology: a step toward further scaling

NASA Astrophysics Data System (ADS)

Lazzarino, Frédéric; Mohanty, Nihar; Feurprier, Yannick; Huli, Lior; Luong, Vinh; Demand, Marc; Decoster, Stefan; Vega Gonzalez, Victor; Ryckaert, Julien; Kim, Ryan Ryoung Han; Mallik, Arindam; Leray, Philippe; Wilson, Chris; Boemmels, Jürgen; Kumar, Kaushik; Nafus, Kathleen; deVilliers, Anton; Smith, Jeffrey; Fonseca, Carlos; Bannister, Julie; Scheer, Steven; Tokei, Zsolt; Piumi, Daniele; Barla, Kathy

2017-04-01

In this work, we present and compare two integration approaches to enable self-alignment of the block suitable for the 5- nm technology node. The first approach is exploring the insertion of a spin-on metal-based material to memorize the first block and act as an etch stop layer in the overall integration. The second approach is evaluating the self-aligned block technology employing widely used organic materials and well-known processes. The concept and the motivation are discussed considering the effects on design and mask count as well as the impact on process complexity and EPE budget. We show the integration schemes and discuss the requirements to enable self-alignment. We present the details of materials and processes selection to allow optimal selective etches and we demonstrate the proof of concept using a 16- nm half-pitch BEOL vehicle. Finally, a study on technology insertion and cost estimation is presented.

Mask manufacturing of advanced technology designs using multi-beam lithography (Part 1)

NASA Astrophysics Data System (ADS)

Green, Michael; Ham, Young; Dillon, Brian; Kasprowicz, Bryan; Hur, Ik Boum; Park, Joong Hee; Choi, Yohan; McMurran, Jeff; Kamberian, Henry; Chalom, Daniel; Klikovits, Jan; Jurkovic, Michal; Hudek, Peter

2016-10-01

As optical lithography is extended into 10nm and below nodes, advanced designs are becoming a key challenge for mask manufacturers. Techniques including advanced Optical Proximity Correction (OPC) and Inverse Lithography Technology (ILT) result in structures that pose a range of issues across the mask manufacturing process. Among the new challenges are continued shrinking Sub-Resolution Assist Features (SRAFs), curvilinear SRAFs, and other complex mask geometries that are counter-intuitive relative to the desired wafer pattern. Considerable capability improvements over current mask making methods are necessary to meet the new requirements particularly regarding minimum feature resolution and pattern fidelity. Advanced processes using the IMS Multi-beam Mask Writer (MBMW) are feasible solutions to these coming challenges. In this paper, we study one such process, characterizing mask manufacturing capability of 10nm and below structures with particular focus on minimum resolution and pattern fidelity.

Acoustic Phonons and Mechanical Properties of Ultra-Thin Porous Low-k Films: A Surface Brillouin Scattering Study

NASA Astrophysics Data System (ADS)

Zizka, J.; King, S.; Every, A.; Sooryakumar, R.

2018-04-01

To reduce the RC (resistance-capacitance) time delay of interconnects, a key development of the past 20 years has been the introduction of porous low-k dielectrics to replace the traditional use of SiO2. Moreover, in keeping pace with concomitant reduction in technology nodes, these low-k materials have reached thicknesses below 100 nm wherein the porosity becomes a significant fraction of the film volume. The large degree of porosity not only reduces mechanical strength of the dielectric layer but also renders a need for non-destructive approaches to measure the mechanical properties of such ultra-thin films within device configurations. In this study, surface Brillouin scattering (SBS) is utilized to determine the elastic constants, Poisson's ratio, and Young's modulus of these porous low-k SiOC:H films (˜ 25-250 nm thick) grown on Si substrates by probing surface acoustic phonons and their dispersions.

EDMOS in ultrathin FDSOI: Impact of the drift region properties

NASA Astrophysics Data System (ADS)

Litty, Antoine; Ortolland, Sylvie; Golanski, Dominique; Dutto, Christian; Cristoloveanu, Sorin

2016-11-01

The development of high-voltage MOSFET (HVMOS) is necessary for including power management or radiofrequency functionalities in CMOS technology. In this paper, we investigate the fabrication and optimization of an Extended Drain MOSFET (EDMOS) directly integrated in the ultra-thin SOI film (7 nm) of the 28 nm FDSOI CMOS technology node. Thanks to TCAD simulations, we analyse in detail the device behaviour as a function of the doping level and length of the drift region. The influence of the back-plane doping type and of the back-biasing schemes is discussed. DC measurements of fabricated EDMOS samples reveal promising performances in particular in terms of specific on-resistance versus breakdown voltage trade-off. The experimental results indicate that, even in an ultrathin film, the engineering of the drift region could be a lever to obtain integrated HVMOS (3.3-5 V).

Programming scheme based optimization of hybrid 4T-2R OxRAM NVSRAM

NASA Astrophysics Data System (ADS)

Majumdar, Swatilekha; Kingra, Sandeep Kaur; Suri, Manan

2017-09-01

In this paper, we present a novel single-cycle programming scheme for 4T-2R NVSRAM, exploiting pulse engineered input signals. OxRAM devices based on 3 nm thick bi-layer active switching oxide and 90 nm CMOS technology node were used for all simulations. The cell design is implemented for real-time non-volatility rather than last-bit, or power-down non-volatility. Detailed analysis of the proposed single-cycle, parallel RRAM device programming scheme is presented in comparison to the two-cycle sequential RRAM programming used for similar 4T-2R NVSRAM bit-cells. The proposed single-cycle programming scheme coupled with the 4T-2R architecture leads to several benefits such as- possibility of unconventional transistor sizing, 50% lower latency, 20% improvement in SNM and ∼20× reduced energy requirements, when compared against two-cycle programming approach.

Acoustic Phonons and Mechanical Properties of Ultra-Thin Porous Low- k Films: A Surface Brillouin Scattering Study

NASA Astrophysics Data System (ADS)

Zizka, J.; King, S.; Every, A.; Sooryakumar, R.

2018-07-01

To reduce the RC (resistance-capacitance) time delay of interconnects, a key development of the past 20 years has been the introduction of porous low- k dielectrics to replace the traditional use of SiO2. Moreover, in keeping pace with concomitant reduction in technology nodes, these low- k materials have reached thicknesses below 100 nm wherein the porosity becomes a significant fraction of the film volume. The large degree of porosity not only reduces mechanical strength of the dielectric layer but also renders a need for non-destructive approaches to measure the mechanical properties of such ultra-thin films within device configurations. In this study, surface Brillouin scattering (SBS) is utilized to determine the elastic constants, Poisson's ratio, and Young's modulus of these porous low- k SiOC:H films (˜ 25-250 nm thick) grown on Si substrates by probing surface acoustic phonons and their dispersions.

Optimized filtration for reduced defectivity and improved dispense recipe in 193-nm BARC lithography

NASA Astrophysics Data System (ADS)

Do, Phong; Pender, Joe; Lehmann, Thomas; Mc Ardle, Leo P.; Gotlinsky, Barry; Mesawich, Michael

2004-05-01

The implementation of 193 nm lithography into production has been complicated by high defectivity issues. Many companies have been struggling with high defect densities, forcing process and lithography engineers to focus their efforts on chemical filtration instead of process development. After-etch defects have complicated the effort to reduce this problem. In particular it has been determined that chemical filtration at the 90 nm node and below is a crucial item which current industry standard pump recipes and material choices are not able to address. LSI Logic and Pall Corporation have been working together exploring alternative materials and resist pump process parameters to address these issues. These changes will free up process development time by reducing these high defect density issues. This paper provides a fundamental understanding of how 20nm filtration combined with optimized resist pump set-up and dispense can significantly reduce defects in 193nm lithography. The purpose of this study is to examine the effectiveness of 20 nanometer rated filters to reduce various defects observed in bottom anti reflective coating materials. Multiple filter types were installed on a Tokyo Electron Limited Clean Track ACT8 tool utilizing two-stage resist pumps. Lithographic performance of the filtered resist and defect analysis of patterned and non-patterned wafers were performed. Optimized pump start-up and dispense recipes also were evaluated to determine their effect on defect improvements. The track system used in this experiment was a standard production tool and was not modified from its original specifications.

3D Stacked Memory Final Report CRADA No. TC-0494-93

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bernhardt, A.; Beene, G.

TI and LLNL demonstrated: (1) a process for the fabrication of 3-D memory using stacked DRAM chips, and (2) a fast prototyping process for 3-D stacks and MCMs. The metallization to route the chip pads to the sides of the die was carried out in a single high-speed masking step. The mask was not the usual physical one in glass and chrome, but was simply a computer file used to control the laser patterning process. Changes in either chip or customer circuit-board pad layout were easily and inexpensively accommodated, so that prototyping was a natural consequence of the laser patterningmore » process. As in the current TI process, a dielectric layer was added to the wafer, and vias to the chip I/0 pads were formed. All of the steps in Texas Instruments earlier process that were required to gold bump the pads were eliminated, significantly reducing fabrication cost and complexity. Pads were created on the sides of ·the die, which became pads on the side of the stack. In order to extend the process to accommodate non-memory devices with substantially greater I/0 than is required for DRAMs, pads were patterned on two sides of the memory stacks as a proof of principle. Stacking and bonding were done using modifications of the current TI process. After stacking and bonding, the pads on the sides of the dice were connected by application of a polyimide insulator film with laser ablation of the polyimide to form contacts to the pads. Then metallization was accomplished in the same manner as on the individual die.« less

Cost effective solution using inverse lithography OPC for DRAM random contact layer

NASA Astrophysics Data System (ADS)

Jun, Jinhyuck; Hwang, Jaehee; Choi, Jaeseung; Oh, Seyoung; Park, Chanha; Yang, Hyunjo; Dam, Thuc; Do, Munhoe; Lee, Dong Chan; Xiao, Guangming; Choi, Jung-Hoe; Lucas, Kevin

2017-04-01

Many different advanced devices and design layers currently employ double patterning technology (DPT) as a means to overcome lithographic and OPC limitations at low k1 values. Certainly device layers with k1 value below 0.25 require DPT or other pitch splitting methodologies. DPT has also been used to improve patterning of certain device layers with k1 values slightly above 0.25, due to the difficulty of achieving sufficient pattern fidelity with only a single exposure. Unfortunately, this broad adoption of DPT also came with a significant increase in patterning process cost. In this paper, we discuss the development of a single patterning technology process using an integrated Inverse Lithography Technology (ILT) flow for mask synthesis. A single pattering technology flow will reduce the manufacturing cost for a k1 > 0.25 full chip random contact layer in a memory device by replacing the more expensive DPT process with ILT flow, while also maintaining good lithographic production quality and manufacturable OPC/RET production metrics. This new integrated flow consists of applying ILT to the difficult core region and traditional rule-based assist features (RBAFs) with OPC to the peripheral region of a DRAM contact layer. Comparisons of wafer results between the ILT process and the non-ILT process showed the lithographic benefits of ILT and its ability to enable a robust single patterning process for this low-k1 device layer. Advanced modeling with a negative tone develop (NTD) process achieved the accuracy levels needed for ILT to control feature shapes through dose and focus. Details of these afore mentioned results will be described in the paper.

MPEG-1 low-cost encoder solution

NASA Astrophysics Data System (ADS)

Grueger, Klaus; Schirrmeister, Frank; Filor, Lutz; von Reventlow, Christian; Schneider, Ulrich; Mueller, Gerriet; Sefzik, Nicolai; Fiedrich, Sven

1995-02-01

A solution for real-time compression of digital YCRCB video data to an MPEG-1 video data stream has been developed. As an additional option, motion JPEG and video telephone streams (H.261) can be generated. For MPEG-1, up to two bidirectional predicted images are supported. The required computational power for motion estimation and DCT/IDCT, memory size and memory bandwidth have been the main challenges. The design uses fast-page-mode memory accesses and requires only one single 80 ns EDO-DRAM with 256 X 16 organization for video encoding. This can be achieved only by using adequate access and coding strategies. The architecture consists of an input processing and filter unit, a memory interface, a motion estimation unit, a motion compensation unit, a DCT unit, a quantization control, a VLC unit and a bus interface. For using the available memory bandwidth by the processing tasks, a fixed schedule for memory accesses has been applied, that can be interrupted for asynchronous events. The motion estimation unit implements a highly sophisticated hierarchical search strategy based on block matching. The DCT unit uses a separated fast-DCT flowgraph realized by a switchable hardware unit for both DCT and IDCT operation. By appropriate multiplexing, only one multiplier is required for: DCT, quantization, inverse quantization, and IDCT. The VLC unit generates the video-stream up to the video sequence layer and is directly coupled with an intelligent bus-interface. Thus, the assembly of video, audio and system data can easily be performed by the host computer. Having a relatively low complexity and only small requirements for DRAM circuits, the developed solution can be applied to low-cost encoding products for consumer electronics.

A novel barium strontium titanate/nickel/titanium nitride/silicon structure for gigabit-scale DRAM capacitors

NASA Astrophysics Data System (ADS)

Ritums, Dwight Lenards

A materials system has been developed for advanced oxide high permittivity capacitors for use in Dynamic Random Access Memory (DRAM) applications. A capacitor test structure has been fabricated, demonstrating the integration of this materials system onto Si. It is a 3-D stacked electrode structure which uses the high-K dielectric material Ba1- xSrxTiO 3 (BST) and a novel Ni/TiN bottom electrode system. The structure was grown using pulsed laser deposition (PLD), photo-assisted metal-organic chemical vapor deposition (PhA-MOCVD), and electron beam deposition, and resulted in thin film capacitors with dielectric constants over 500. Other advanced oxides, principally SrVO3, were also investigated for use as electrode materials. The fabricated test structure is 3 μgm wide and 1 μm thick. RIE was used to generate the 3-D structure, and an etch gas recipe was developed to pattern the 3-D electrode structure onto the TiN. The Ni was deposited by electron beam deposition, and the BST was grown by PLD and PhA-MOCVD. Conformal coating of the electrode by the BST was achieved. The film structure was analyzed with XRD, SEM, EDS, XPS, AES, and AFM, and the electronic properties of the devices were characterized. Permittivites of up to 500 were seen in the PLD-grown films, and values up to 700 were seen in the MOCVD- deposited films. The proof of concept of a high permittivity material directly integrated onto Si has been demonstrated for this capacitor materials system. With further lithographic developments, this system can be applied toward gigabit device fabrication.

In house development of (99m)Tc-Rhenium sulfide colloidal nanoparticles for sentinel lymph node detection.

PubMed

Dar, Ume-Kalsoom; Khan, Irfanullah; Javed, Muhammad; Ali, Muhammad; Hyder, Syed Waqar; Murad, Sohail; Anwar, Jamil

2013-03-01

In this study, rhenium sulfide colloidal nanoparticles were developed as radiopharmaceutical for sentinel lymph node detection. We directly used rhenium sulfide as a starting material for the preparation of colloidal nanoparticles. UV-visible spectrophotometry was used for characterization of in house developed colloidal particles. The size distribution of radioactive particles was studied by using membrane filtration method. The percentage of radiolabeled colloidal nanoparticles was determined by paper chromatography (PC). The study also includes in vitro stability, protein binding in human blood and bioevaluation in a rabbit model. The results indicate that 77.27 ± 3.26 % particles of size less than 20nm (suitable for lymphoscintigraphy) were radiolabeled. (99m)Tc labeled rhenium sulfide labeling efficacy with the radiometal is 98.5 ± 0.5%, which remains considerably stable beyond 5h at room temperature. Furthermore, it was observed that 70.2 ± 1.3% radiolabeled colloid complex showed binding with the blood protein. Bioevaluation results show the remarkable achievement of our radiopharmaceutical. The in house prepared (99m)Tc labeled rhenium sulfide colloidal nanoparticles reached the sentinel node within 15 min of post injection. These results indicate that (99m)Tc labeled rhenium sulfide colloid nanoparticles kit produced by a novel procedure seems of significant potential as a feasible candidate for further development to be used in clinical practice.

The effects of prolonged oral administration of gold nanoparticles on the morphology of hematopoietic and lymphoid organs

NASA Astrophysics Data System (ADS)

Bucharskaya, Alla B.; Pakhomy, Svetlana S.; Zlobina, Olga V.; Maslyakova, Galina N.; Navolokin, Nikita A.; Matveeva, Olga V.; Khlebtsov, Boris N.; Bogatyrev, Vladimir A.; Khlebtsov, Nikolai G.; Tuchin, Valery V.

2017-02-01

Currently, the usage of gold nanoparticles as photosensitizers and immunomodulators for plasmonic photothermal therapy has attracted a great attention of researches and end-users. In our work, the influence of prolonged peroral administration of gold nanoparticles (GNPs) with different sizes on the morphological changes of hematopoietic and lymphoid organs was investigated. The 24 white outbred male rats weighing 180-220 g were randomly divided into groups and administered orally for 30 days the suspension of gold nanospheres with diameters of 2, 15 and 50 nm at a dosage of 190 μg/kg of animal body weight. To prevent GNPs aggregation in a tissue and enhance biocompatibility, they were functionalized with thiolated polyethylene glycol. The withdrawal of the animals from the experiment and sampling of spleen, lymph nodes and bone marrow tissues for morphological study were performed a day after the last administration. In the spleen the boundary between the red and white pulp was not clearly differ in all experimental groups, lymphoid follicles were significantly increased in size, containing bright germinative centers represented by large blast cells. The stimulation of lymphocyte and myelocytic series of hematopoiesis was recorded at morphological study of the bone marrow. The number of immunoblasts and large lymphocytes was increased in all structural zones of lymph nodes. The more pronounced changes were found in the group with administration of 15 nm nanoparticles. Thus, the morphological changes of cellular components of hematopoietic organs have size-dependent character and indicate the activation of the migration, proliferation and differentiation of immune cells after prolonged oral administration of GNPs.

Novel EUV photoresist for sub-7nm node (Conference Presentation)

NASA Astrophysics Data System (ADS)

Furukawa, Tsuyoshi; Naruoka, Takehiko; Nakagawa, Hisashi; Miyata, Hiromu; Shiratani, Motohiro; Hori, Masafumi; Dei, Satoshi; Ayothi, Ramakrishnan; Hishiro, Yoshi; Nagai, Tomoki

2017-04-01

Extreme ultraviolet (EUV) lithography has been recognized as a promising candidate for the manufacturing of semiconductor devices as LS and CH pattern for 7nm node and beyond. EUV lithography is ready for high volume manufacturing stage. For the high volume manufacturing of semiconductor devices, significant improvement of sensitivity and line edge roughness (LWR) and Local CD Uniformity (LCDU) is required for EUV resist. It is well-known that the key challenge for EUV resist is the simultaneous requirement of ultrahigh resolution (R), low line edge roughness (L) and high sensitivity (S). Especially high sensitivity and good roughness is important for EUV lithography high volume manufacturing. We are trying to improve sensitivity and LWR/LCDU from many directions. From material side, we found that both sensitivity and LWR/LCDU are simultaneously improved by controlling acid diffusion length and efficiency of acid generation using novel resin and PAG. And optimizing EUV integration is one of the good solution to improve sensitivity and LWR/LCDU. We are challenging to develop new multi-layer materials to improve sensitivity and LWR/LCDU. Our new multi-layer materials are designed for best performance in EUV lithography system. From process side, we found that sensitivity was substantially improved maintaining LWR applying novel type of chemical amplified resist (CAR) and process. EUV lithography evaluation results obtained for new CAR EUV interference lithography. And also metal containing resist is one possibility to break through sensitivity and LWR trade off. In this paper, we will report the recent progress of sensitivity and LWR/LCDU improvement of JSR novel EUV resist and process.

CHAM: weak signals detection through a new multivariate algorithm for process control

NASA Astrophysics Data System (ADS)

Bergeret, François; Soual, Carole; Le Gratiet, B.

2016-10-01

Derivatives technologies based on core CMOS processes are significantly aggressive in term of design rules and process control requirements. Process control plan is a derived from Process Assumption (PA) calculations which result in a design rule based on known process variability capabilities, taking into account enough margin to be safe not only for yield but especially for reliability. Even though process assumptions are calculated with a 4 sigma known process capability margin, efficient and competitive designs are challenging the process especially for derivatives technologies in 40 and 28nm nodes. For wafer fab process control, PA are declined in monovariate (layer1 CD, layer2 CD, layer2 to layer1 overlay, layer3 CD etc….) control charts with appropriated specifications and control limits which all together are securing the silicon. This is so far working fine but such system is not really sensitive to weak signals coming from interactions of multiple key parameters (high layer2 CD combined with high layer3 CD as an example). CHAM is a software using an advanced statistical algorithm specifically designed to detect small signals, especially when there are many parameters to control and when the parameters can interact to create yield issues. In this presentation we will first present the CHAM algorithm, then the case-study on critical dimensions, with the results, and we will conclude on future work. This partnership between Ippon and STM is part of E450LMDAP, European project dedicated to metrology and lithography development for future technology nodes, especially 10nm.

From powerful research platform for industrial EUV photoresist development, to world record resolution by photolithography: EUV interference lithography at the Paul Scherrer Institute

NASA Astrophysics Data System (ADS)

Buitrago, Elizabeth; Fallica, Roberto; Fan, Daniel; Karim, Waiz; Vockenhuber, Michaela; van Bokhoven, Jeroen A.; Ekinci, Yasin

2016-09-01

Extreme ultraviolet interference lithography (EUV-IL, λ = 13.5 nm) has been shown to be a powerful technique not only for academic, but also for industrial research and development of EUV materials due to its relative simplicity yet record high-resolution patterning capabilities. With EUV-IL, it is possible to pattern high-resolution periodic images to create highly ordered nanostructures that are difficult or time consuming to pattern by electron beam lithography (EBL) yet interesting for a wide range of applications such as catalysis, electronic and photonic devices, and fundamental materials analysis, among others. Here, we will show state-of the-art research performed using the EUV-IL tool at the Swiss Light Source (SLS) synchrotron facility in the Paul Scherrer Institute (PSI). For example, using a grating period doubling method, a diffraction mask capable of patterning a world record in photolithography of 6 nm half-pitch (HP), was produced. In addition to the description of the method, we will give a few examples of applications of the technique. Well-ordered arrays of suspended silicon nanowires down to 6.5 nm linewidths have been fabricated and are to be studied as field effect transistors (FETs) or biosensors, for instance. EUV achromatic Talbot lithography (ATL), another interference scheme that utilizes a single grating, was shown to yield well-defined nanoparticles over large-areas with high uniformity presenting great opportunities in the field of nanocatalysis. EUV-IL is in addition, playing a key role in the future introduction of EUV lithography into high volume manufacturing (HVM) of semiconductor devices for the 7 and 5 nm logic node (16 nm and 13 nm HP, respectively) and beyond while the availability of commercial EUV-tools is still very much limited for research.

Registration performance on EUV masks using high-resolution registration metrology

NASA Astrophysics Data System (ADS)

Steinert, Steffen; Solowan, Hans-Michael; Park, Jinback; Han, Hakseung; Beyer, Dirk; Scherübl, Thomas

2016-10-01

Next-generation lithography based on EUV continues to move forward to high-volume manufacturing. Given the technical challenges and the throughput concerns a hybrid approach with 193 nm immersion lithography is expected, at least in the initial state. Due to the increasing complexity at smaller nodes a multitude of different masks, both DUV (193 nm) and EUV (13.5 nm) reticles, will then be required in the lithography process-flow. The individual registration of each mask and the resulting overlay error are of crucial importance in order to ensure proper functionality of the chips. While registration and overlay metrology on DUV masks has been the standard for decades, this has yet to be demonstrated on EUV masks. Past generations of mask registration tools were not necessarily limited in their tool stability, but in their resolution capabilities. The scope of this work is an image placement investigation of high-end EUV masks together with a registration and resolution performance qualification. For this we employ a new generation registration metrology system embedded in a production environment for full-spec EUV masks. This paper presents excellent registration performance not only on standard overlay markers but also on more sophisticated e-beam calibration patterns.

Investigation of microstructure and properties of ultrathin graded ZrNx self-assembled diffusion barrier in deep nano-vias prepared by plasma ion immersion implantation

NASA Astrophysics Data System (ADS)

Zou, Jianxiong; Liu, Bo; Lin, Liwei; Lu, Yuanfu; Dong, Yuming; Jiao, Guohua; Ma, Fei; Li, Qiran

2018-01-01

Ultrathin graded ZrNx self-assembled diffusion barriers with controllable stoichiometry was prepared in Cu/p-SiOC:H interfaces by plasma immersion ion implantation (PIII) with dynamic regulation of implantation fluence. The fundamental relationship between the implantation fluence of N+ and the stoichiometry and thereby the electrical properties of the ZrNx barrier was established. The optimized fluence of a graded ZrN thin film with gradually decreased Zr valence was obtained with the best electrical performance as well. The Cu/p-SiOC:H integration is thermally stable up to 500 °C due to the synergistic effect of Cu3Ge and ZrNx layers. Accordingly, the PIII process was verified in a 100-nm-thick Cu dual-damascene interconnect, in which the ZrNx diffusion barrier of 1 nm thick was successfully self-assembled on the sidewall without barrier layer on the via bottom. In this case, the via resistance was reduced by approximately 50% in comparison with Ta/TaN barrier. Considering the results in this study, ultrathin ZrNx conformal diffusion barrier can be adopted in the sub-14 nm technology node.

The line roughness improvement with plasma coating and cure treatment for 193nm lithography and beyond

NASA Astrophysics Data System (ADS)

Zheng, Erhu; Huang, Yi; Zhang, Haiyang

2017-03-01

As CMOS technology reaches 14nm node and beyond, one of the key challenges of the extension of 193nm immersion lithography is how to control the line edge and width roughness (LER/LWR). For Self-aligned Multiple Patterning (SaMP), LER becomes larger while LWR becomes smaller as the process proceeds[1]. It means plasma etch process becomes more and more dominant for LER reduction. In this work, we mainly focus on the core etch solution including an extra plasma coating process introduced before the bottom anti reflective coating (BARC) open step, and an extra plasma cure process applied right after BARC-open step. Firstly, we leveraged the optimal design experiment (ODE) to investigate the impact of plasma coating step on LER and identified the optimal condition. ODE is an appropriate method for the screening experiments of non-linear parameters in dynamic process models, especially for high-cost-intensive industry [2]. Finally, we obtained the proper plasma coating treatment condition that has been proven to achieve 32% LER improvement compared with standard process. Furthermore, the plasma cure scheme has been also optimized with ODE method to cover the LWR degradation induced by plasma coating treatment.

Compensation of long-range process effects on photomasks by design data correction

NASA Astrophysics Data System (ADS)

Schneider, Jens; Bloecker, Martin; Ballhorn, Gerd; Belic, Nikola; Eisenmann, Hans; Keogan, Danny

2002-12-01

CD requirements for advanced photomasks are getting very demanding for the 100 nm-node and below; the ITRS roadmap requires CD uniformities below 10 nm for the most critical layers. To reach this goal, statistical as well as systematic CD contributions must be minimized. Here, we focus on the reduction of systematic CD variations across the masks that may be caused by process effects, e.g. dry etch loading. We address this topic by compensating such effects via design data correction analogous to proximity correction. Dry etch loading is modeled by gaussian convolution of pattern densities. Data correction is done geometrically by edge shifting. As the effect amplitude has an order of magnitude of 10 nm this can only be done on e-beam writers with small address grids to reduce big CD steps in the design data. We present modeling and correction results for special mask patterns with very strong pattern density variations showing that the compensation method is able to reduce CD uniformity by 50-70% depending on pattern details. The data correction itself is done with a new module developed especially to compensate long-range effects and fits nicely into the common data flow environment.

Plasma-Assisted Dry Etching of Ferroelectric Capacitor Modules and Application to a 32M Ferroelectric Random Access Memory Devices with Submicron Feature Sizes

NASA Astrophysics Data System (ADS)

Lee, Sang-Woo; Joo, Suk-Ho; Cho, Sung Lae; Son, Yoon-Ho; Lee, Kyu-Mann; Nam, Sang-Don; Park, Kun-Sang; Lee, Yong-Tak; Seo, Jung-Suk; Kim, Young-Dae; An, Hyeong-Geun; Kim, Hyoung-Joon; Jung, Yong-Ju; Heo, Jang-Eun; Lee, Moon-Sook; Park, Soon-Oh; Chung, U-In; Moon, Joo-Tae

2002-11-01

In the manufacturing of a 32M ferroelectric random access memory (FRAM) device on the basis of 0.25 design rule (D/R), one of the most difficult processes is to pattern a submicron capacitor module while retaining good ferroelectric properties. In this paper, we report the ferroelectric property of patterned submicron capacitor modules with a stack height of 380 nm, where the 100 nm-thick Pb(Zr, Ti)O3 (PZT) films were prepared by the sol-gel method. After patterning, overall sidewall slope was approximately 70° and cell-to-cell node separation was made to be 80 nm to prevent possible twin-bit failure in the device. Finally, several heat treatment conditions were investigated to retain the ferroelectric property of the patterned capacitor. It was found that rapid thermal processing (RTP) treatment yields better properties than conventional furnace annealing. This result is directly related to the near-surface chemistry of the PZT films, as confirmed by X-ray photoelectron spectroscopy (XPS) analysis. The resultant switching polarization value of the submicron capacitor was approximately 30 μC/cm2 measured at 3 V.

Dry etching of chrome for photomasks for 100-nm technology using chemically amplified resist

NASA Astrophysics Data System (ADS)

Mueller, Mark; Komarov, Serguie; Baik, Ki-Ho

2002-07-01

Photo mask etching for the 100nm technology node places new requirements on dry etching processes. As the minimum-size features on the mask, such as assist bars and optical proximity correction (OPC) patterns, shrink down to 100nm, it is necessary to produce etch CD biases of below 20nm in order to reproduce minimum resist features into chrome with good pattern fidelity. In addition, vertical profiles are necessary. In previous generations of photomask technology, footing and sidewall profile slope were tolerated, since this dry etch profile was an improvement from wet etching. However, as feature sizes shrink, it is extremely important to select etch processes which do not generate a foot, because this will affect etch linearity and also limit the smallest etched feature size. Chemically amplified resist (CAR) from TOK is patterned with a 50keV MEBES eXara e-beam writer, allowing for patterning of small features with vertical resist profiles. This resist is developed for raster scan 50 kV e-beam systems. It has high contrast, good coating characteristics, good dry etch selectivity, and high environmental stability. Chrome etch process development has been performed using Design of Experiments to optimize parameters such as sidewall profile, etch CD bias, etch CD linearity for varying sizes of line/space patterns, etch CD linearity for varying sizes of isolated lines and spaces, loading effects, and application to contact etching.

Body Bias usage in UTBB FDSOI designs: A parametric exploration approach

NASA Astrophysics Data System (ADS)

Puschini, Diego; Rodas, Jorge; Beigne, Edith; Altieri, Mauricio; Lesecq, Suzanne

2016-03-01

Some years ago, UTBB FDSOI has appeared in the horizon of low-power circuit designers. With the 14 nm and 10 nm nodes in the road-map, the industrialized 28 nm platform promises highly efficient designs with Ultra-Wide Voltage Range (UWVR) thanks to extended Body Bias properties. From the power management perspective, this new opportunity is considered as a new degree of freedom in addition to the classic Dynamic Voltage Scaling (DVS), increasing the complexity of the power optimization problem at design time. However, so far no formal or empiric tool allows to early evaluate the real need for a Dynamic Body Bias (DBB) mechanism on future designs. This paper presents a parametric exploration approach that analyzes the benefits of using Body Bias in 28 nm UTBB FDSOI circuits. The exploration is based on electrical simulations of a ring-oscillator structure. These experiences show that a Body Bias strategy is not always required but, they underline the large power reduction that can be achieved when mandatory. Results are summarized in order to help designers to analyze how to choose the best dynamic power management strategy for a given set of operating conditions in terms of temperature, circuit activity and process choice. This exploration contributes to the identification of conditions that make DBB more efficient than DVS, and vice versa, and when both methods are mandatory to optimize power consumption.

A modified implementation of tristate inverter based static master-slave flip-flop with improved power-delay-area product.

PubMed

Singh, Kunwar; Tiwari, Satish Chandra; Gupta, Maneesha

2014-01-01

The paper introduces novel architectures for implementation of fully static master-slave flip-flops for low power, high performance, and high density. Based on the proposed structure, traditional C(2)MOS latch (tristate inverter/clocked inverter) based flip-flop is implemented with fewer transistors. The modified C(2)MOS based flip-flop designs mC(2)MOSff1 and mC(2)MOSff2 are realized using only sixteen transistors each while the number of clocked transistors is also reduced in case of mC(2)MOSff1. Postlayout simulations indicate that mC(2)MOSff1 flip-flop shows 12.4% improvement in PDAP (power-delay-area product) when compared with transmission gate flip-flop (TGFF) at 16X capacitive load which is considered to be the best design alternative among the conventional master-slave flip-flops. To validate the correct behaviour of the proposed design, an eight bit asynchronous counter is designed to layout level. LVS and parasitic extraction were carried out on Calibre, whereas layouts were implemented using IC station (Mentor Graphics). HSPICE simulations were used to characterize the transient response of the flip-flop designs in a 180 nm/1.8 V CMOS technology. Simulations were also performed at 130 nm, 90 nm, and 65 nm to reveal the scalability of both the designs at modern process nodes.

A Modified Implementation of Tristate Inverter Based Static Master-Slave Flip-Flop with Improved Power-Delay-Area Product

PubMed Central

Tiwari, Satish Chandra; Gupta, Maneesha

2014-01-01

The paper introduces novel architectures for implementation of fully static master-slave flip-flops for low power, high performance, and high density. Based on the proposed structure, traditional C2MOS latch (tristate inverter/clocked inverter) based flip-flop is implemented with fewer transistors. The modified C2MOS based flip-flop designs mC2MOSff1 and mC2MOSff2 are realized using only sixteen transistors each while the number of clocked transistors is also reduced in case of mC2MOSff1. Postlayout simulations indicate that mC2MOSff1 flip-flop shows 12.4% improvement in PDAP (power-delay-area product) when compared with transmission gate flip-flop (TGFF) at 16X capacitive load which is considered to be the best design alternative among the conventional master-slave flip-flops. To validate the correct behaviour of the proposed design, an eight bit asynchronous counter is designed to layout level. LVS and parasitic extraction were carried out on Calibre, whereas layouts were implemented using IC station (Mentor Graphics). HSPICE simulations were used to characterize the transient response of the flip-flop designs in a 180 nm/1.8 V CMOS technology. Simulations were also performed at 130 nm, 90 nm, and 65 nm to reveal the scalability of both the designs at modern process nodes. PMID:24723808

Radiation Hardened DDR2 SDRAM Solution

NASA Astrophysics Data System (ADS)

Wang, Pierre-Xiao; Sellier, Charles

2016-08-01

The Radiation Hardened (RH) DDR2 SDRAM Solution is a User's Friendly, Plug-and-Play and Radiation Hardened DDR2 solution, which includes the radiation tolerant stacking DDR2 modules and a radiation intelligent memory controller (RIMC) IP core. It provides a high speed radiation hardened by design DRAM solution suitable for all space applications such as commercial or scientific geo-stationary missions, earth observation, navigation, manned space vehicles and deep space scientific exploration. The DDR2 module has been guaranteed with SEL immune and TID > 100Krad(Si), on the other hand the RIMC IP core provides a full protection against the DDR2 radiation effects such as SEFI and SEU.

Processing and properties of Pb(Mg(1/3)Nb(2/3))O3--PbTiO3 thin films by pulsed laser deposition

NASA Astrophysics Data System (ADS)

Tantigate, C.; Lee, J.; Safari, A.

1995-03-01

The objectives of this study were to prepare in situ Pb(Mg(1/3)Nb(2/3))O3 (PMN) and PMN-PT thin films by pulsed laser deposition and to investigate the electrical features of thin films for possible dynamic random access memory (DRAM) and microactuator applications. The impact of processing parameters such compositions, substrate temperature, and oxygen pressure on perovskite phase formation and dielectric characteristics were reported. It was found that the highest dielectric constant, measured at room temperature and 10 kHz, was attained from the PMN with 99% perovskite.

Computational metrology: enabling full-lot high-density fingerprint information without adding wafer metrology budget, and driving improved monitoring and process control

NASA Astrophysics Data System (ADS)

Kim, Hyun-Sok; Hyun, Min-Sung; Ju, Jae-Wuk; Kim, Young-Sik; Lambregts, Cees; van Rhee, Peter; Kim, Johan; McNamara, Elliott; Tel, Wim; Böcker, Paul; Oh, Nang-Lyeom; Lee, Jun-Hyung

2018-03-01

Computational metrology has been proposed as the way forward to resolve the need for increased metrology density, resulting from extending correction capabilities, without adding actual metrology budget. By exploiting TWINSCAN based metrology information, dense overlay fingerprints for every wafer can be computed. This extended metrology dataset enables new use cases, such as monitoring and control based on fingerprints for every wafer of the lot. This paper gives a detailed description, discusses the accuracy of the fingerprints computed, and will show results obtained in a DRAM HVM manufacturing environment. Also an outlook for improvements and extensions will be shared.

nm23-H1 gene driven by hTERT promoter induces inhibition of invasive phenotype and metastasis of lung cancer xenograft in mice.

PubMed

Fan, Yu; Yao, Yibing; Li, Lu; Wu, Zhihao; Xu, Feng; Hou, Mei; Wu, Heng; Shen, Yali; Wan, Haisu; Zhou, Qinghua

2013-02-01

Lung cancer is the leading cause of cancer death in both men and women worldwide. Tumor metastasis is an essential aspect of lung cancer progression and patient death. The nm23-H1 gene has been extensively investigated as a metastasis suppressor gene. Our previous studies have revealed: that a significant relationship exists between the low-level expression nm23-H1 in primary non-small cell lung cancer (NSCLC) with increased metastasis and a poor prognosis; that L9981-nm23-H1 cells (a nm23-H1 transfactant cell) exhibited lower cell proliferation rates, more G0/G1 phase growth, and an increase in apoptosis with a dramatic decrease in the tumor cells' ability to invade than L9981 cells did; and that L9981- nm23-H1 cells also demonstrated a significantly reduced lymph node and distant metastatic capacity in vivo than L9981 cells did in nude mice. In this study, we construct a plasmid containing the nm23-H1 gene, which was driven by the human telomerase reverse transcriptase (hTERT) promoter. We evaluated the anti-invasion and anti-metastatic effects of pGL3-hTP-nm23 on L9981, a human large cell lung cancer cell line with nm23-H1 negative expression, by transwell assay in vitro and bioluminescence in nude mice models. The toxicity of pGL3-hTP-nm23 and its effects on tumor growth were evaluated in nude mice models after gene therapy. The cell cycles, apoptosis, and proliferation of the nm23-H1 transfactant were also detected by 3-(4,5-Dimethylthiazol-2-yl)-2,5-diphenyltetrazolium bromide (MTT assay) and flow cytometry (FCM). The results showed that the hTERT-promoter dramatically drives nm23-H1 gene expression, and induces inhibition of cell growth and migration in L9981-luc cells and MRC-5 cells in vitro. nm23-H1 also significantly inhibited the tumorigenesis and distant metastasis of L9981-luc cell in vivo. Moreover, no obvious side effect was detected in normal mouse tissues after intratumoral injection of the vector. The treatment of the nm23-H1 gene driven by hTERT promoter appears to be a promising approach for the gene therapy of nm23-H1 low-expressed tumors. © 2012 Tianjin Lung Cancer Institute and Wiley Publishing Asia Pty Ltd.

Image-guided surgery using near-infrared fluorescent light: from bench to bedside

NASA Astrophysics Data System (ADS)

Boogerd, Leonora S. F.; Handgraaf, Henricus J. M.; van de Velde, Cornelis J. H.; Vahrmeijer, Alexander L.

2015-03-01

Due to its relatively high tissue penetration, near-infrared (NIR; 700-900 nm) fluorescent light has the potential to visualize structures that need to be resected (e.g. tumors, lymph nodes) and structures that need to be spared (e.g. nerves, ureters, bile ducts). Until now, most clinical trials have focused on suboptimal, non-targeted dyes. Although successful, a new era in image-guided surgery has begun by the introduction of tumor-targeted agents. In this paper, we will describe how tumor-targeted NIR fluorescent imaging can be applied in a clinical setting.

Thermal Radiometer Signal Processing Using Radiation Hard CMOS Application Specific Integrated Circuits for Use in Harsh Planetary Environments

NASA Technical Reports Server (NTRS)

Quilligan, G.; DuMonthier, J.; Aslam, S.; Lakew, B.; Kleyner, I.; Katz, R.

2015-01-01

Thermal radiometers such as proposed for the Europa Clipper flyby mission require low noise signal processing for thermal imaging with immunity to Total Ionizing Dose (TID) and Single Event Latchup (SEL). Described is a second generation Multi- Channel Digitizer (MCD2G) Application Specific Integrated Circuit (ASIC) that accurately digitizes up to 40 thermopile pixels with greater than 50 Mrad (Si) immunity TID and 174 MeV-sq cm/mg SEL. The MCD2G ASIC uses Radiation Hardened By Design (RHBD) techniques with a 180 nm CMOS process node.

Thermal Radiometer Signal Processing using Radiation Hard CMOS Application Specific Integrated Circuits for use in Harsh Planetary Environments

NASA Astrophysics Data System (ADS)

Quilligan, G.; DuMonthier, J.; Aslam, S.; Lakew, B.; Kleyner, I.; Katz, R.

2015-10-01

Thermal radiometers such as proposed for the Europa Clipper flyby mission [1] require low noise signal processing for thermal imaging with immunity to Total Ionizing Dose (TID) and Single Event Latchup (SEL). Described is a second generation Multi- Channel Digitizer (MCD2G) Application Specific Integrated Circuit (ASIC) that accurately digitizes up to 40 thermopile pixels with greater than 50 Mrad (Si) immunity TID and 174 MeV-cm2/mg SEL. The MCD2G ASIC uses Radiation Hardened By Design (RHBD) techniques with a 180 nm CMOS process node.

EBIC/TEM investigations of process-induced defects in EFG silicon ribbon

NASA Technical Reports Server (NTRS)

Cunningham, B.; Ast, D. G.

1981-01-01

Electron bombardment induced conductivity and scanning transmission electron microscopy observations on unprocessed and processed edge-defined film-fed growth ribbon show that the phosphorus diffused junction depth is not uniform, and that a variety of chemical impurities precipitate out during processing. Two kinds of precipitates are found (1) 10 nm or less in size, located at the dislocation nodes in sub-boundary like dislocation arrangements formed during processing and (2) large precipitates, the chemical composition of which has been partially identified. These large precipitates emit dense dislocations tangles into the adjacent crystal volume.

Photoacoustic sentinel lymph node imaging with self-assembled copper neodecanoate nanoparticles.

PubMed

Pan, Dipanjan; Cai, Xin; Yalaz, Ceren; Senpan, Angana; Omanakuttan, Karthik; Wickline, Samuel A; Wang, Lihong V; Lanza, Gregory M

2012-02-28

Photoacoustic tomography (PAT) is emerging as a novel, hybrid, and non-ionizing imaging modality because of its satisfactory spatial resolution and high soft tissue contrast. PAT combines the advantages of both optical and ultrasonic imaging methods. It opens up the possibilities for noninvasive staging of breast cancer and may replace sentinel lymph node (SLN) biopsy in clinic in the near future. In this work, we demonstrate for the first time that copper can be used as a contrast metal for near-infrared detection of SLN using PAT. A unique strategy is adopted to encapsulate multiple copies of Cu as organically soluble small molecule complexes within a phospholipid-entrapped nanoparticle. The nanoparticles assumed a size of 80-90 nm, which is the optimum hydrodynamic diameter for its distribution throughout the lymphatic systems. These particles provided at least 6-fold higher signal sensitivity in comparison to blood, which is a natural absorber of light. We also demonstrated that high SLN detection sensitivity with PAT can be achieved in a rodent model. This work clearly demonstrates for the first time the potential use of copper as an optical contrast agent.

Two-photon interference at telecom wavelengths for time-bin-encoded single photons from quantum-dot spin qubits

PubMed Central

Yu, Leo; Natarajan, Chandra M.; Horikiri, Tomoyuki; Langrock, Carsten; Pelc, Jason S.; Tanner, Michael G.; Abe, Eisuke; Maier, Sebastian; Schneider, Christian; Höfling, Sven; Kamp, Martin; Hadfield, Robert H.; Fejer, Martin M.; Yamamoto, Yoshihisa

2015-01-01

Practical quantum communication between remote quantum memories rely on single photons at telecom wavelengths. Although spin-photon entanglement has been demonstrated in atomic and solid-state qubit systems, the produced single photons at short wavelengths and with polarization encoding are not suitable for long-distance communication, because they suffer from high propagation loss and depolarization in optical fibres. Establishing entanglement between remote quantum nodes would further require the photons generated from separate nodes to be indistinguishable. Here, we report the observation of correlations between a quantum-dot spin and a telecom single photon across a 2-km fibre channel based on time-bin encoding and background-free frequency downconversion. The downconverted photon at telecom wavelengths exhibits two-photon interference with another photon from an independent source, achieving a mean wavepacket overlap of greater than 0.89 despite their original wavelength mismatch (900 and 911 nm). The quantum-networking operations that we demonstrate will enable practical communication between solid-state spin qubits across long distances. PMID:26597223

Metal nanoparticles in the presence of lipopolysaccharides trigger the onset of metal allergy in mice

NASA Astrophysics Data System (ADS)

Hirai, Toshiro; Yoshioka, Yasuo; Izumi, Natsumi; Ichihashi, Ko-Ichi; Handa, Takayuki; Nishijima, Nobuo; Uemura, Eiichiro; Sagami, Ko-Ichi; Takahashi, Hideki; Yamaguchi, Manami; Nagano, Kazuya; Mukai, Yohei; Kamada, Haruhiko; Tsunoda, Shin-Ichi; Ishii, Ken J.; Higashisaka, Kazuma; Tsutsumi, Yasuo

2016-09-01

Many people suffer from metal allergy, and the recently demonstrated presence of naturally occurring metal nanoparticles in our environment could present a new candidate for inducing metal allergy. Here, we show that mice pretreated with silver nanoparticles (nAg) and lipopolysaccharides, but not with the silver ions that are thought to cause allergies, developed allergic inflammation in response to the silver. nAg-induced acquired immune responses depended on CD4+ T cells and elicited IL-17A-mediated inflammation, similar to that observed in human metal allergy. Nickel nanoparticles also caused sensitization in the mice, whereas gold and silica nanoparticles, which are minimally ionizable, did not. Quantitative analysis of the silver distribution suggested that small nAg (≤10 nm) transferred to the draining lymph node and released ions more readily than large nAg (>10 nm). These results suggest that metal nanoparticles served as ion carriers to enable metal sensitization. Our data demonstrate a potentially new trigger for metal allergy.

The use of computational inspection to identify process window limiting hotspots and predict sub-15nm defects with high capture rate

NASA Astrophysics Data System (ADS)

Ham, Boo-Hyun; Kim, Il-Hwan; Park, Sung-Sik; Yeo, Sun-Young; Kim, Sang-Jin; Park, Dong-Woon; Park, Joon-Soo; Ryu, Chang-Hoon; Son, Bo-Kyeong; Hwang, Kyung-Bae; Shin, Jae-Min; Shin, Jangho; Park, Ki-Yeop; Park, Sean; Liu, Lei; Tien, Ming-Chun; Nachtwein, Angelique; Jochemsen, Marinus; Yan, Philip; Hu, Vincent; Jones, Christopher

2017-03-01

As critical dimensions for advanced two dimensional (2D) DUV patterning continue to shrink, the exact process window becomes increasingly difficult to determine. The defect size criteria shrink with the patterning critical dimensions and are well below the resolution of current optical inspection tools. As a result, it is more challenging for traditional bright field inspection tools to accurately discover the hotspots that define the process window. In this study, we use a novel computational inspection method to identify the depth-of-focus limiting features of a 10 nm node mask with 2D metal structures (single exposure) and compare the results to those obtained with a traditional process windows qualification (PWQ) method based on utilizing a focus modulated wafer and bright field inspection (BFI) to detect hotspot defects. The method is extended to litho-etch litho-etch (LELE) on a different test vehicle to show that overlay related bridging hotspots also can be identified.

EXTATIC: ASML's α-tool development for EUVL

NASA Astrophysics Data System (ADS)

Meiling, Hans; Benschop, Jos P.; Hartman, Robert A.; Kuerz, Peter; Hoghoj, Peter; Geyl, Roland; Harned, Noreen

2002-07-01

Within the recently initiated EXTATIC project a complete full-field lithography exposure tool for he 50-nm technology node is being developed. The goal is to demonstrate the feasibility of extreme UV lithography (EUVL) for 50-nm imaging and to reduce technological risks in the development of EUVL production tools. We describe the EUV MEDEA+) framework in which EXTATIC is executed, and give an update on the status of the (alpha) -tool development. A brief summary of our in-house source-collector module development is given, as well as the general vacuum architecture of the (alpha) -tool is discussed. We discuss defect-free reticle handling, and investigated the uses of V-grooved brackets glued to the side of the reticle to reduce particle generation during takeovers. These takeovers do not only occur in the exposure tool, but also in multilayer deposition equipment, e-beam pattern writers, inspection tools, etc., where similar requirements on particle contamination are present. Finally, we present an update of mirror fabrication technology and show improved mirror figuring and finishing results.

Co-integration of nano-scale vertical- and horizontal-channel metal-oxide-semiconductor field-effect transistors for low power CMOS technology.

PubMed

Sun, Min-Chul; Kim, Garam; Kim, Sang Wan; Kim, Hyun Woo; Kim, Hyungjin; Lee, Jong-Ho; Shin, Hyungcheol; Park, Byung-Gook

2012-07-01

In order to extend the conventional low power Si CMOS technology beyond the 20-nm node without SOI substrates, we propose a novel co-integration scheme to build horizontal- and vertical-channel MOSFETs together and verify the idea using TCAD simulations. From the fabrication viewpoint, it is highlighted that this scheme provides additional vertical devices with good scalability by adding a few steps to the conventional CMOS process flow for fin formation. In addition, the benefits of the co-integrated vertical devices are investigated using a TCAD device simulation. From this study, it is confirmed that the vertical device shows improved off-current control and a larger drive current when the body dimension is less than 20 nm, due to the electric field coupling effect at the double-gated channel. Finally, the benefits from the circuit design viewpoint, such as the larger midpoint gain and beta and lower power consumption, are confirmed by the mixed-mode circuit simulation study.

Ge-cap quantum-well bulk FinFET for 5 nm node CMOS integration

NASA Astrophysics Data System (ADS)

Dwi Kurniawan, Erry; Peng, Kang-Hui; Yang, Shang-Yi; Yang, Yi-Yun; Thirunavukkarasu, Vasanthan; Lin, Yu-Hsien; Wu, Yung-Chun

2018-04-01

We propose the use of Ge-cap quantum-well (QW) bulk FinFET for 5 nm CMOS integration, which is a Si channel wrapped with Ge around three sides of the fin channel. The simulation results show that the Ge-cap FinFET structure demonstrates better performance than pure Si, pure Ge, and Si-cap FinFET structures. By optimizing Si fin width and Ge-cap thickness, the on-state current of nFET and pFET can also be symmetric without changing the total fin width (F Wp = F Wn). The electrons in Ge-cap nFinFET concentrate in the Si channel because of QWs formed in the lowest conduction band of the Ge and Si heterostructure, while the holes in Ge-cap pFinFET prefer to stay in Ge surfaces owing to QWs formed in the Ge valence band. The physics studies of this device have made the design rules relevant for the application of the CMOS inverter and static random access memory (SRAM) application technology.

The future of EUV lithography: enabling Moore's Law in the next decade

NASA Astrophysics Data System (ADS)

Pirati, Alberto; van Schoot, Jan; Troost, Kars; van Ballegoij, Rob; Krabbendam, Peter; Stoeldraijer, Judon; Loopstra, Erik; Benschop, Jos; Finders, Jo; Meiling, Hans; van Setten, Eelco; Mika, Niclas; Dredonx, Jeannot; Stamm, Uwe; Kneer, Bernhard; Thuering, Bernd; Kaiser, Winfried; Heil, Tilmann; Migura, Sascha

2017-03-01

While EUV systems equipped with a 0.33 Numerical Aperture lenses are readying to start volume manufacturing, ASML and Zeiss are ramping up their development activities on a EUV exposure tool with Numerical Aperture greater than 0.5. The purpose of this scanner, targeting a resolution of 8nm, is to extend Moore's law throughout the next decade. A novel, anamorphic lens design, has been developed to provide the required Numerical Aperture; this lens will be paired with new, faster stages and more accurate sensors enabling Moore's law economical requirements, as well as the tight focus and overlay control needed for future process nodes. The tighter focus and overlay control budgets, as well as the anamorphic optics, will drive innovations in the imaging and OPC modelling, and possibly in the metrology concepts. Furthermore, advances in resist and mask technology will be required to image lithography features with less than 10nm resolution. This paper presents an overview of the key technology innovations and infrastructure requirements for the next generation EUV systems.

Controlling bridging and pinching with pixel-based mask for inverse lithography

NASA Astrophysics Data System (ADS)

Kobelkov, Sergey; Tritchkov, Alexander; Han, JiWan

2016-03-01

Inverse Lithography Technology (ILT) has become a viable computational lithography candidate in recent years as it can produce mask output that results in process latitude and CD control in the fab that is hard to match with conventional OPC/SRAF insertion approaches. An approach to solving the inverse lithography problem as a nonlinear, constrained minimization problem over a domain mask pixels was suggested in the paper by Y. Granik "Fast pixel-based mask optimization for inverse lithography" in 2006. The present paper extends this method to satisfy bridging and pinching constraints imposed on print contours. Namely, there are suggested objective functions expressing penalty for constraints violations, and their minimization with gradient descent methods is considered. This approach has been tested with an ILT-based Local Printability Enhancement (LPTM) tool in an automated flow to eliminate hotspots that can be present on the full chip after conventional SRAF placement/OPC and has been applied in 14nm, 10nm node production, single and multiple-patterning flows.

Top-coatless 193nm positive-tone development immersion resist for logic application

NASA Astrophysics Data System (ADS)

Liu, Lian Cong; Yeh, Tsung Ju; Lin, Yeh-Sheng; Huang, Yu Chin; Kuo, Chien Wen; Huang, Wen Liang; Lin, Chia Hung; Yu, Chun Chi; Hsu, Ray; Wan, I.-Yuan; Lin, Jeff; Im, Kwang-Hwyi; Lim, Hae Jin; Jeon, Hyun K.; Suzuki, Yasuhiro; Xu, Cheng Bai

2015-03-01

In this paper, we summarize our development efforts for a top-coatless 193nm immersion positive tone development (PTD) contact hole (C/H) resist with improved litho and defect performances for logic application specifically with an advance node. The ultimate performance goal was to improve the depth of focus (DoF) margin, mask error enhancement factor (MEEF), critical dimension uniformity (CDU), contact edge roughness (CER), and defect performance. Also, the through pitch CD difference was supposed to be comparable to the previous control resist. Effects of polymer and PAG properties have been evaluated for this purpose. The material properties focused in the evaluation study were polymer activation energy (Ea), polymer solubility differentiated by polymerization process types, and diffusion length (DL) and acidity (pKa) of photoacid generator (PAG). Additionally, the impact of post exposure bake (PEB) temperature was investigated for process condition optimization. As a result of this study, a new resist formulation to satisfy all litho and defect performance was developed and production yield was further improved.

Virtual overlay metrology for fault detection supported with integrated metrology and machine learning

NASA Astrophysics Data System (ADS)

Lee, Hong-Goo; Schmitt-Weaver, Emil; Kim, Min-Suk; Han, Sang-Jun; Kim, Myoung-Soo; Kwon, Won-Taik; Park, Sung-Ki; Ryan, Kevin; Theeuwes, Thomas; Sun, Kyu-Tae; Lim, Young-Wan; Slotboom, Daan; Kubis, Michael; Staecker, Jens

2015-03-01

While semiconductor manufacturing moves toward the 7nm node for logic and 15nm node for memory, an increased emphasis has been placed on reducing the influence known contributors have toward the on product overlay budget. With a machine learning technique known as function approximation, we use a neural network to gain insight to how known contributors, such as those collected with scanner metrology, influence the on product overlay budget. The result is a sufficiently trained function that can approximate overlay for all wafers exposed with the lithography system. As a real world application, inline metrology can be used to measure overlay for a few wafers while using the trained function to approximate overlay vector maps for the entire lot of wafers. With the approximated overlay vector maps for all wafers coming off the track, a process engineer can redirect wafers or lots with overlay signatures outside the standard population to offline metrology for excursion validation. With this added flexibility, engineers will be given more opportunities to catch wafers that need to be reworked, resulting in improved yield. The quality of the derived corrections from measured overlay metrology feedback can be improved using the approximated overlay to trigger, which wafers should or shouldn't be, measured inline. As a development or integration engineer the approximated overlay can be used to gain insight into lots and wafers used for design of experiments (DOE) troubleshooting. In this paper we will present the results of a case study that follows the machine learning function approximation approach to data analysis, with production overlay measured on an inline metrology system at SK hynix.

[Development and Validation of a Three-Dimensional Finite Element Model of Inferior Cervical Spinal Segments C(4-7) for a Healthy Person].

PubMed

Deng, Zhen; Wang, Huihao; Niu, Wenxin; Lan, Tianying; Wang, Kuan; Zhan, Hongsheng

2016-08-01

This study aims to develop and validate a three-dimensional finite element model of inferior cervical spinal segments C4-7of a healthy volunteer,and to provide a computational platform for investigating the biomechanical mechanism of treating cervical vertebra disease with Traditional Chinese Traumotology Manipulation(TCTM).A series of computed tomography(CT)images of C4-7segments were processed to establish the finite element model using softwares Mimics 17.0,Geromagic12.0,and Abaqus 6.13.A reference point(RP)was created on the endplate of C4 and coupled with all nodes of C4.All loads(±0.5,±1,±1.5and±2Nm)were added to the RP for the six simulations(flexion,extension,lateral bending and axial rotation).Then,the range of motion of each segment was calculated and compared with experimental measurements of in vitro studies.On the other hand,1Nm moment was loaded on the model to observe the main stress regions of the model in different status.We successfully established a detail model of inferior cervical spinal segments C4-7of a healthy volunteer with 591 459 elements and 121 446 nodes which contains the structure of the vertebra,intervertebral discs,ligaments and facet joints.The model showed an accordance result after the comparison with the in vitro studies in the six simulations.Moreover,the main stress region occurred on the model could reflect the main stress distribution of normal human cervical spine.The model is accurate and realistic which is consistent with the biomechanical properties of the cervical spine.The model can be used to explore the biomechanical mechanism of treating cervical vertebra disease with TCTM.

A spinal cord fate map in the avian embryo: while regressing, Hensen's node lays down the notochord and floor plate thus joining the spinal cord lateral walls.

PubMed

Catala, M; Teillet, M A; De Robertis, E M; Le Douarin, M L

1996-09-01

The spinal cord of thoracic, lumbar and caudal levels is derived from a region designated as the sinus rhomboidalis in the 6-somite-stage embryo. Using quail/chick grafts performed in ovo, we show the following. (1) The floor plate and notochord derive from a common population of cells, located in Hensen's node, which is equivalent to the chordoneural hinge (CNH) as it was defined at the tail bud stage. (2) The lateral walls and the roof of the neural tube originate caudally and laterally to Hensen's node, during the regression of which the basal plate anlage is bisected by floor plate tissue. (3) Primary and secondary neurulations involve similar morphogenetic movements but, in contrast to primary neurulation, extensive bilateral cell mixing is observed on the dorsal side of the region of secondary neurulation. (4) The posterior midline of the sinus rhomboidalis gives rise to somitic mesoderm and not to spinal cord. Moreover, mesodermal progenitors are spatially arranged along the rest of the primitive streak, more caudal cells giving rise to more lateral embryonic structures. Together with the results reported in our study of tail bud development (Catala, M., Teillet, M.-A. and Le Douarin, N.M. (1995). Mech. Dev. 51, 51-65), these results show that the mechanisms that preside at axial elongation from the 6-somite stage onwards are fundamentally similar during the complete process of neurulation.

Memory Circuit Fault Simulator

NASA Technical Reports Server (NTRS)

Sheldon, Douglas J.; McClure, Tucker

2013-01-01

Spacecraft are known to experience significant memory part-related failures and problems, both pre- and postlaunch. These memory parts include both static and dynamic memories (SRAM and DRAM). These failures manifest themselves in a variety of ways, such as pattern-sensitive failures, timingsensitive failures, etc. Because of the mission critical nature memory devices play in spacecraft architecture and operation, understanding their failure modes is vital to successful mission operation. To support this need, a generic simulation tool that can model different data patterns in conjunction with variable write and read conditions was developed. This tool is a mathematical and graphical way to embed pattern, electrical, and physical information to perform what-if analysis as part of a root cause failure analysis effort.

Memory-Intensive Benchmarks: IRAM vs. Cache-Based Machines

NASA Technical Reports Server (NTRS)

Biswas, Rupak; Gaeke, Brian R.; Husbands, Parry; Li, Xiaoye S.; Oliker, Leonid; Yelick, Katherine A.; Biegel, Bryan (Technical Monitor)

2002-01-01

The increasing gap between processor and memory performance has lead to new architectural models for memory-intensive applications. In this paper, we explore the performance of a set of memory-intensive benchmarks and use them to compare the performance of conventional cache-based microprocessors to a mixed logic and DRAM processor called VIRAM. The benchmarks are based on problem statements, rather than specific implementations, and in each case we explore the fundamental hardware requirements of the problem, as well as alternative algorithms and data structures that can help expose fine-grained parallelism or simplify memory access patterns. The benchmarks are characterized by their memory access patterns, their basic control structures, and the ratio of computation to memory operation.

Overlay leaves litho: impact of non-litho processes on overlay and compensation

NASA Astrophysics Data System (ADS)

Ruhm, Matthias; Schulz, Bernd; Cotte, Eric; Seltmann, Rolf; Hertzsch, Tino

2014-10-01

According to the ITRS roadmap [1], the overlay requirement for the 28nm node is 8nm. If we compare this number with the performance given by tool vendors for their most advanced immersion systems (which is < 3nm), there seems to remain a large margin. Does that mean that today's leading edge Fab has an easy life? Unfortunately not, as other contributors affecting overlay are emerging. Mask contributions and so-called non-linear wafer distortions are known effects that can impact overlay quite significantly. Furthermore, it is often forgotten that downstream (post-litho) processes can impact the overlay as well. Thus, it can be required to compensate for the effects of subsequent processes already at the lithography operation. Within our paper, we will briefly touch on the wafer distortion topic and discuss the limitations of lithography compensation techniques such as higher order corrections versus solving the root cause of the distortions. The primary focus will be on the impact of the etch processes on the pattern placement error. We will show how individual layers can get affected differently by showing typical wafer signatures. However, in contrast to the above-mentioned wafer distortion topic, lithographic compensation techniques can be highly effective to reduce the placement error significantly towards acceptable levels (see Figure 1). Finally we will discuss the overall overlay budget for a 28nm contact to gate case by taking the impact of the individual process contributors into account.

Metal1 patterning study for random-logic applications with 193i, using calibrated OPC for litho and etch

NASA Astrophysics Data System (ADS)

Mailfert, Julien; Van de Kerkhove, Jeroen; De Bisschop, Peter; De Meyer, Kristin

2014-03-01

A Metal1-layer (M1) patterning study is conducted on 20nm node (N20) for random-logic applications. We quantified the printability performance on our test vehicle for N20, corresponding to Poly/M1 pitches of 90/64nm, and with a selected minimum M1 gap size of 70nm. The Metal1 layer is patterned with 193nm immersion lithography (193i) using Negative Tone Developer (NTD) resist, and a double-patterning Litho-Etch-Litho-Etch (LELE) process. Our study is based on Logic test blocks that we OPCed with a combination of calibrated models for litho and for etch. We report the Overlapping Process Window (OPW), based on a selection of test structures measured after-etch. We find that most of the OPW limiting structures are EOL (End-of-Line) configurations. Further analysis of these individual OPW limiters will reveal that they belong to different types, such as Resist 3D (R3D) and Mask 3D (M3D) sensitive structures, limiters related to OPC (Optical Proximity Corrections) options such as assist placement, or the choice of CD metrics and tolerances for calculation of the process windows itself. To guide this investigation, we will consider a `reference OPC' case to be compared with other solutions. In addition, rigorous simulations and OPC verifications will complete the after-etch measurements to help us to validate our experimental findings.

Implementation of random contact hole design with CPL mask by using IML technology

NASA Astrophysics Data System (ADS)

Hsu, Michael; Van Den Broeke, Doug; Hsu, Stephen; Chen, J. Fung; Shi, Xuelong; Corcoran, Noel; Yu, Linda

2005-11-01

The contact hole imaging is a very challenge task for the optical lithography process during IC manufacturing. Lots of RETs were proposed to improve the contrast of small opening hole. Scattering Bar (SB) OPC, together with optimized illumination, is no doubt one of the critical enablers for low k1 contact imaging. In this study, an effective model-based SB OPC based on IML technology is implemented for contact layer at 90nm, 65nm, and 45nm nodes. For our full-chip implementation flow, the first step is to determine the critical design area and then to proceed with NA and illumination optimization. Then, we selected the best NA in combination with optimum illumination via a Diffraction Optical Element (DOE). With optimized illumination, it is now possible to construct an interference map for the full-chip mask pattern. Utilizing the interference map, the model-based SB OPC is performed. Next, model OPC can be applied with the presence of SB for the entire chip. It is important to note that, for patterning at k1 near 0.35 or below, it may be necessary to include 3D mask effects with a high NA OPC model. With enhanced DOF by IML and immersion process, the low k1 production worthy contact process is feasible.

Advanced lithographic filtration and contamination control for 14nm node and beyond semiconductor processes

NASA Astrophysics Data System (ADS)

Varanasi, Rao; Mesawich, Michael; Connor, Patrick; Johnson, Lawrence

2017-03-01

Two versions of a specific 2nm rated filter containing filtration medium and all other components produced from high density polyethylene (HDPE), one subjected to standard cleaning, the other to specialized ultra-cleaning, were evaluated in terms of their cleanliness characteristics, and also defectivity of wafers processed with photoresist filtered through each. With respect to inherent cleanliness, the ultraclean version exhibited a 70% reduction in total metal extractables and 90% reduction in organics extractables compared to the standard clean version. In terms of particulate cleanliness, the ultraclean version achieved stability of effluent particles 30nm and larger in about half the time required by the standard clean version, also exhibiting effluent levels at stability almost 90% lower. In evaluating defectivity of blanket wafers processed with photoresist filtered through either version, initial defect density while using the ultraclean version was about half that observed when the standard clean version was in service, with defectivity also falling more rapidly during subsequent usage of the ultraclean version compared to the standard clean version. Similar behavior was observed for patterned wafers, where the enhanced defect reduction was primarily of bridging defects. The filter evaluation and actual process-oriented results demonstrate the extreme value in using filtration designed possessing the optimal intrinsic characteristics, but with further improvements possible through enhanced cleaning processes

The way to zeros: The future of semiconductor device and chemical mechanical polishing technologies

NASA Astrophysics Data System (ADS)

Tsujimura, Manabu

2016-06-01

For the last 60 years, the development of cutting-edge semiconductor devices has strongly emphasized scaling; the effort to scale down current CMOS devices may well achieve the target of 5 nm nodes by 2020. Planarization by chemical mechanical polishing (CMP), is one technology essential for supporting scaling. This paper summarizes the history of CMP transitions in the planarization process as well as the changing degree of planarity required, and, finally, introduces innovative technologies to meet the requirements. The use of CMP was triggered by the replacement of local oxidation of silicon (LOCOS) as the element isolation technology by shallow trench isolation (STI) in the 1980s. Then, CMP’s use expanded to improving embedability of aluminum wiring, tungsten (W) contacts, Cu wiring, and, more recently, to its adoption in high-k metal gate (HKMG) and FinFET (FF) processes. Initially, the required degree of planarity was 50 nm, but now 0 nm is required. Further, zero defects on a post-CMP wafer is now the goal, and it is possible that zero psi CMP loading pressure will be required going forward. Soon, it seems, everything will have to be “zero” and perfect. Although the process is also chemical in nature, the CMP process is actually mechanical with a load added using slurry particles several tens of nm in diameter. Zero load in the loading process, zero nm planarity with no trace of processing, and zero residual foreign material, including the very slurry particles used in the process, are all required. This article will provide an overview of how to achieve these new requirements and what technologies should be employed.

How thin barrier metal can be used to prevent Co diffusion in the modern integrated circuits?

NASA Astrophysics Data System (ADS)

Dixit, Hemant; Konar, Aniruddha; Pandey, Rajan; Ethirajan, Tamilmani

2017-11-01

In modern integrated circuits (ICs), billions of transistors are connected to each other via thin metal layers (e.g. copper, cobalt, etc) known as interconnects. At elevated process temperatures, inter-diffusion of atomic species can occur among these metal layers, causing sub-optimal performance of interconnects, which may lead to the failure of an IC. Thus, typically a thin barrier metal layer is used to prevent the inter-diffusion of atomic species within interconnects. For ICs with sub-10 nm transistors (10 nm technology node), the design rule (thickness scaling) demands the thinnest possible barrier layer. Therefore, here we investigate the critical thickness of a titanium-nitride (TiN) barrier that can prevent the cobalt diffusion using multi-scale modeling and simulations. First, we compute the Co diffusion barrier in crystalline and amorphous TiN with the nudged elastic band method within first-principles density functional theory simulations. Later, using the calculated activation energy barriers, we quantify the Co diffusion length in the TiN metal layer with the help of kinetic Monte Carlo simulations. Such a multi-scale modelling approach yields an exact critical thickness of the metal layer sufficient to prevent the Co diffusion in IC interconnects. We obtain a diffusion length of a maximum of 2 nm for a typical process of thermal annealing at 400 °C for 30 min. Our study thus provides useful physical insights for the Co diffusion in the TiN layer and further quantifies the critical thickness (~2 nm) to which the metal barrier layer can be thinned down for sub-10 nm ICs.

A 45 nm Stacked CMOS Image Sensor Process Technology for Submicron Pixel.

PubMed

Takahashi, Seiji; Huang, Yi-Min; Sze, Jhy-Jyi; Wu, Tung-Ting; Guo, Fu-Sheng; Hsu, Wei-Cheng; Tseng, Tung-Hsiung; Liao, King; Kuo, Chin-Chia; Chen, Tzu-Hsiang; Chiang, Wei-Chieh; Chuang, Chun-Hao; Chou, Keng-Yu; Chung, Chi-Hsien; Chou, Kuo-Yu; Tseng, Chien-Hsien; Wang, Chuan-Joung; Yaung, Dun-Nien

2017-12-05

A submicron pixel's light and dark performance were studied by experiment and simulation. An advanced node technology incorporated with a stacked CMOS image sensor (CIS) is promising in that it may enhance performance. In this work, we demonstrated a low dark current of 3.2 e - /s at 60 °C, an ultra-low read noise of 0.90 e - ·rms, a high full well capacity (FWC) of 4100 e - , and blooming of 0.5% in 0.9 μm pixels with a pixel supply voltage of 2.8 V. In addition, the simulation study result of 0.8 μm pixels is discussed.

DOMe: A deduplication optimization method for the NewSQL database backups

PubMed Central

Wang, Longxiang; Zhu, Zhengdong; Zhang, Xingjun; Wang, Yinfeng

2017-01-01

Reducing duplicated data of database backups is an important application scenario for data deduplication technology. NewSQL is an emerging database system and is now being used more and more widely. NewSQL systems need to improve data reliability by periodically backing up in-memory data, resulting in a lot of duplicated data. The traditional deduplication method is not optimized for the NewSQL server system and cannot take full advantage of hardware resources to optimize deduplication performance. A recent research pointed out that the future NewSQL server will have thousands of CPU cores, large DRAM and huge NVRAM. Therefore, how to utilize these hardware resources to optimize the performance of data deduplication is an important issue. To solve this problem, we propose a deduplication optimization method (DOMe) for NewSQL system backup. To take advantage of the large number of CPU cores in the NewSQL server to optimize deduplication performance, DOMe parallelizes the deduplication method based on the fork-join framework. The fingerprint index, which is the key data structure in the deduplication process, is implemented as pure in-memory hash table, which makes full use of the large DRAM in NewSQL system, eliminating the performance bottleneck problem of fingerprint index existing in traditional deduplication method. The H-store is used as a typical NewSQL database system to implement DOMe method. DOMe is experimentally analyzed by two representative backup data. The experimental results show that: 1) DOMe can reduce the duplicated NewSQL backup data. 2) DOMe significantly improves deduplication performance by parallelizing CDC algorithms. In the case of the theoretical speedup ratio of the server is 20.8, the speedup ratio of DOMe can achieve up to 18; 3) DOMe improved the deduplication throughput by 1.5 times through the pure in-memory index optimization method. PMID:29049307

TP53-dependent autophagy links the ATR-CHEK1 axis activation to proinflammatory VEGFA production in human bronchial epithelial cells exposed to fine particulate matter (PM2.5).

PubMed

Xu, Xiuduan; Wang, Hongli; Liu, Shasha; Xing, Chen; Liu, Yang; Aodengqimuge; Zhou, Wei; Yuan, Xiaoyan; Ma, Yongfu; Hu, Meiru; Hu, Yongliang; Zou, Shuxian; Gu, Ye; Peng, Shuangqing; Yuan, Shengtao; Li, Weiping; Ma, Yuanfang; Song, Lun

2016-10-02

ABSTARCT Epidemiological and clinical studies have increasingly shown that fine particulate matter (PM2.5) is associated with a number of pathological respiratory diseases, such as bronchitis, asthma, and chronic obstructive pulmonary disease, which share the common feature of airway inflammation induced by particle exposure. Thus, understanding how PM2.5 triggers inflammatory responses in the respiratory system is crucial for the study of PM2.5 toxicity. In the current study, we found that exposing human bronchial epithelial cells (immortalized Beas-2B cells and primary cells) to PM2.5 collected in the winter in Wuhan, a city in southern China, induced a significant upregulation of VEGFA (vascular endothelial growth factor A) production, a signaling event that typically functions to control chronic airway inflammation and vascular remodeling. Further investigations showed that macroautophagy/autophagy was induced upon PM2.5 exposure and then mediated VEGFA upregulation by activating the SRC (SRC proto-oncogene, non-receptor tyrosine kinase)-STAT3 (signal transducer and activator of transcription 3) pathway in bronchial epithelial cells. By exploring the upstream signaling events responsible for autophagy induction, we revealed a requirement for TP53 (tumor protein p53) activation and the expression of its downstream target DRAM1 (DNA damage regulated autophagy modulator 1) for the induction of autophagy. These results thus extend the role of TP53-DRAM1-dependent autophagy beyond cell fate determination under genotoxic stress and to the control of proinflammatory cytokine production. Moreover, PM2.5 exposure strongly induced the activation of the ATR (ATR serine/threonine kinase)-CHEK1/CHK1 (checkpoint kinase 1) axis, which subsequently triggered TP53-dependent autophagy and VEGFA production in Beas-2B cells. Therefore, these findings suggest a novel link between processes regulating genomic integrity and airway inflammation via autophagy induction in bronchial epithelial cells under PM2.5 exposure.

Matching OPC and masks on 300-mm lithography tools utilizing variable illumination settings

NASA Astrophysics Data System (ADS)

Palitzsch, Katrin; Kubis, Michael; Schroeder, Uwe P.; Schumacher, Karl; Frangen, Andreas

2004-05-01

CD control is crucial to maximize product yields on 300mm wafers. This is particularly true for DRAM frontend lithography layers, like gate level, and deep trench (capacitor) level. In the DRAM process, large areas of the chip are taken up by array structures, which are difficult to structure due to aggressive pitch requirements. Consequently, the lithography process is centered such that the array structures are printed on target. Optical proximity correction is applied to print gate level structures in the periphery circuitry on target. Only slight differences of the different Zernike terms can cause rather large variations of the proximity curves, resulting in a difference of isolated and semi-isolated lines printed on different tools. If the deviations are too large, tool specific OPC is needed. The same is true for deep trench level, where the length to width ratio of elongated contact-like structures is an important parameter to adjust the electrical properties of the chip. Again, masks with specific biases for tools with different Zernikes are needed to optimize product yield. Additionally, mask making contributes to the CD variation of the process. Theoretically, the CD deviation caused by an off-centered mask process can easily eat up the majority of the CD budget of a lithography process. In practice, masks are very often distributed intelligently among production tools, such that lens and mask effects cancel each other. However, only dose adjusting and mask allocation may still result in a high CD variation with large systematical contributions. By adjusting the illumination settings, we have successfully implemented a method to reduce CD variation on our advanced processes. Especially inner and outer sigma for annular illumination, and the numerical aperture, can be optimized to match mask and stepper properties. This process will be shown to overcome slight lens and mask differences effectively. The effects on lithography process windows have to be considered, nonetheless.

The new analysis method of PWQ in the DRAM pattern

NASA Astrophysics Data System (ADS)

Han, Daehan; Chang, Jinman; Kim, Taeheon; Lee, Kyusun; Kim, Yonghyeon; Kang, Jinyoung; Hong, Aeran; Choi, Bumjin; Lee, Joosung; Kim, Hyoung Jun; Lee, Kweonjae; Hong, Hyoungsun; Jin, Gyoyoung

2016-03-01

In a sub 2Xnm node process, the feedback of pattern weak points is more and more significant. Therefore, it is very important to extract the systemic defect in Double Patterning Technology(DPT), however, it is impossible to predict exact systemic defect at the recent photo simulation tool.[1] Therefore, the method of Process Window Qualification (PWQ) is very serious and essential these days. Conventional PWQ methods are die to die image comparison by using an e-beam or bright field machine. Results are evaluated by the person, who reviews the images, in some cases. However, conventional die to die comparison method has critical problem. If reference die and comparison die have same problem, such as both of dies have pattern problems, the issue patterns are not detected by current defect detecting approach. Aside from the inspection accuracy, reviewing the wafer requires much effort and time to justify the genuine issue patterns. Therefore, our company adopts die to data based matching PWQ method that is using NGR machine. The main features of the NGR are as follows. First, die to data based matching, second High speed, finally massive data were used for evaluation of pattern inspection.[2] Even though our die to data based matching PWQ method measures the mass data, our margin decision process is based on image shape. Therefore, it has some significant problems. First, because of the long analysis time, the developing period of new device is increased. Moreover, because of the limitation of resources, it may not examine the full chip area. Consequently, the result of PWQ weak points cannot represent the all the possible defects. Finally, since the PWQ margin is not decided by the mathematical value, to make the solid definition of killing defect is impossible. To overcome these problems, we introduce a statistical values base process window qualification method that increases the accuracy of process margin and reduces the review time. Therefore, it is possible to see the genuine margin of the critical pattern issue which we cannot see on our conventional PWQ inspection; hence we can enhance the accuracy of PWQ margin.

Generation of “LYmph Node Derived Antibody Libraries” (LYNDAL) for selecting fully human antibody fragments with therapeutic potential

PubMed Central

Diebolder, Philipp; Keller, Armin; Haase, Stephanie; Schlegelmilch, Anne; Kiefer, Jonathan D; Karimi, Tamana; Weber, Tobias; Moldenhauer, Gerhard; Kehm, Roland; Eis-Hübinger, Anna M; Jäger, Dirk; Federspil, Philippe A; Herold-Mende, Christel; Dyckhoff, Gerhard; Kontermann, Roland E; Arndt, Michaela AE; Krauss, Jürgen

2014-01-01

The development of efficient strategies for generating fully human monoclonal antibodies with unique functional properties that are exploitable for tailored therapeutic interventions remains a major challenge in the antibody technology field. Here, we present a methodology for recovering such antibodies from antigen-encountered human B cell repertoires. As the source for variable antibody genes, we cloned immunoglobulin G (IgG)-derived B cell repertoires from lymph nodes of 20 individuals undergoing surgery for head and neck cancer. Sequence analysis of unselected “LYmph Node Derived Antibody Libraries” (LYNDAL) revealed a naturally occurring distribution pattern of rearranged antibody sequences, representing all known variable gene families and most functional germline sequences. To demonstrate the feasibility for selecting antibodies with therapeutic potential from these repertoires, seven LYNDAL from donors with high serum titers against herpes simplex virus (HSV) were panned on recombinant glycoprotein B of HSV-1. Screening for specific binders delivered 34 single-chain variable fragments (scFvs) with unique sequences. Sequence analysis revealed extensive somatic hypermutation of enriched clones as a result of affinity maturation. Binding of scFvs to common glycoprotein B variants from HSV-1 and HSV-2 strains was highly specific, and the majority of analyzed antibody fragments bound to the target antigen with nanomolar affinity. From eight scFvs with HSV-neutralizing capacity in vitro, the most potent antibody neutralized 50% HSV-2 at 4.5 nM as a dimeric (scFv)2. We anticipate our approach to be useful for recovering fully human antibodies with therapeutic potential. PMID:24256717

Generation of “LYmph Node Derived Antibody Libraries” (LYNDAL) for selecting fully human antibody fragments with therapeutic potential.

PubMed

Diebolder, Philipp; Keller, Armin; Haase, Stephanie; Schlegelmilch, Anne; Kiefer, Jonathan D; Karimi, Tamana; Weber, Tobias; Moldenhauer, Gerhard; Kehm, Roland; Eis-Hübinger, Anna M; Jäger, Dirk; Federspil, Philippe A; Herold-Mende, Christel; Dyckhoff, Gerhard; Kontermann, Roland E; Arndt, Michaela A E; Krauss, Jürgen

2014-01-01

The development of efficient strategies for generating fully human monoclonal antibodies with unique functional properties that are exploitable for tailored therapeutic interventions remains a major challenge in the antibody technology field. Here, we present a methodology for recovering such antibodies from antigen-encountered human B cell repertoires. As the source for variable antibody genes, we cloned immunoglobulin G (IgG)-derived B cell repertoires from lymph nodes of 20 individuals undergoing surgery for head and neck cancer. Sequence analysis of unselected “LYmph Node Derived Antibody Libraries” (LYNDAL) revealed a naturally occurring distribution pattern of rearranged antibody sequences, representing all known variable gene families and most functional germline sequences. To demonstrate the feasibility for selecting antibodies with therapeutic potential from these repertoires, seven LYNDAL from donors with high serum titers against herpes simplex virus (HSV) were panned on recombinant glycoprotein B of HSV-1. Screening for specific binders delivered 34 single-chain variable fragments (scFvs) with unique sequences. Sequence analysis revealed extensive somatic hypermutation of enriched clones as a result of affinity maturation. Binding of scFvs to common glycoprotein B variants from HSV-1 and HSV-2 strains was highly specific, and the majority of analyzed antibody fragments bound to the target antigen with nanomolar affinity. From eight scFvs with HSV-neutralizing capacity in vitro,the most potent antibody neutralized 50% HSV-2 at 4.5 nM as a dimeric (scFv)2. We anticipate our approach to be useful for recovering fully human antibodies with therapeutic potential.

Using optical masks to create and image sub-optical wavelength atomic structures in a MOT

NASA Astrophysics Data System (ADS)

Turlapov, Andrey; Tonyushkin, Aleksey; Sleator, Tycho

2002-05-01

We have used an ``optical mask'' for Rubidium atoms in a magneto-optical trap to create and image atomic density gratings with periodicities as small as 1/8th of an optical wavelength ( ˜ 100 nm). The mask consists of a pulse of an optical standing wave (wavelength λ) resonant to an open atomic transition. The interaction pumps all atoms except those near the nodes into another hyperfine ground state, leaving a grating of ``spikes'' in atomic density in the initial ground state. The nodes of the standing wave serve as slits of the mask. By applying two such masks separated by time T, we have created atomic gratings of period λ/(2n) (or smaller) at times (n+1)/n T after the first mask pulse. For T on the order of the Talbot time (or inverse recoil frequency), quantum effects are important for the dynamics of the atomic center of mass. Under appropriate conditions, these quantum effects led to a reduction of the period of the resulting density gratings (Talbot-Lau effect). The resulting density gratings of period λ/2n (for n=1 to 4) were imaged in real time using an additional optical mask.

Processing-in-Memory Enabled Graphics Processors for 3D Rendering

DOE Office of Scientific and Technical Information (OSTI.GOV)

Xie, Chenhao; Song, Shuaiwen; Wang, Jing

2017-02-06

The performance of 3D rendering of Graphics Processing Unit that convents 3D vector stream into 2D frame with 3D image effects significantly impact users’ gaming experience on modern computer systems. Due to the high texture throughput in 3D rendering, main memory bandwidth becomes a critical obstacle for improving the overall rendering performance. 3D stacked memory systems such as Hybrid Memory Cube (HMC) provide opportunities to significantly overcome the memory wall by directly connecting logic controllers to DRAM dies. Based on the observation that texel fetches significantly impact off-chip memory traffic, we propose two architectural designs to enable Processing-In-Memory based GPUmore » for efficient 3D rendering.« less

In-line verification of linewidth uniformity for 0.18 and below: design rule reticles

NASA Astrophysics Data System (ADS)

Tan, TaiSheng; Kuo, Shen C.; Wu, Clare; Falah, Reuven; Hemar, Shirley; Sade, Amikam; Gottlib, Gidon

2000-07-01

Mask making process development and control is addressed using a reticle inspection tool equipped with the new revolutionized application called LBM-Linewidth Bias Monitoring. In order to use the LBM for mask-making process control, procedures and corresponding test plates are a developed, such that routine monitoring of the manufacturing process discloses process variation and machine variation. At the same time systematic variation are studied and either taken care of or taken into consideration to allow successful production line work. In this paper the contribution of the LBM for mask quality monitoring is studied with respect to dense layers, e.g. DRAM. Another aspect of this application - the detection of very small CD mis-uniformity areas is discussed.

BLACKCOMB2: Hardware-software co-design for non-volatile memory in exascale systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mudge, Trevor

This work was part of a larger project, Blackcomb2, centered at Oak Ridge National Labs (Jeff Vetter PI) to investigate the opportunities for replacing or supplementing DRAM main memory with nonvolatile memory (NVmemory) in Exascale memory systems. The goal was to reduce the energy consumed by in future supercomputer memory systems and to improve their resiliency. Building on the accomplishments of the original Blackcomb Project, funded in 2010, the goal for Blackcomb2 was to identify, evaluate, and optimize the most promising emerging memory technologies, architecture hardware and software technologies, which are essential to provide the necessary memory capacity, performance, resilience,more » and energy efficiency in Exascale systems. Capacity and energy are the key drivers.« less

Piezo-based motion stages for heavy duty operation in clean environments

NASA Astrophysics Data System (ADS)

Karasikov, Nir; Peled, Gal; Yasinov, Roman; Gissin, Michael; Feinstein, Alan

2018-02-01

A range of heavy duty, ultra-precise motion stages had been developed for precise positioning in semiconductor manufacturing and metrology, for use in a clean room and high vacuum (HV and UHV) environments, to meet the precision requirements for 7, 5 nm nodes and beyond. These stages are powered by L1B2 direct drive ultrasonic motors, which allows combining long motion range, sub-nanometer positioning accuracy, high stiffness (in the direction of motion), low power consumption and active compensation of thermal and structural drift while holding position. The mechanical design, material selection for clean room and high vacuum preparation techniques are reviewed. Test results in a clean room are reported for a two-axis (X-Y) stage, having a load capacity of 30 kg, a motion range of 450 mm, a positioning accuracy of < 1 nm, a maximum motion speed of > 200 mm/s and a < 2 nm position stability (3 sigma). Long term drift compensation to sub-nm level, against thermal drift, has been validated for more than 10 hours. Heavy duty operation in a high vacuum is exemplified via a single axis stage operating at 5E-7 Torr, having a moving mass of 0.96 kg, oriented against gravity. The stage is operated periodically (up and down) over a travel length of 45 mm. The motion profile has a trapezoidal shape with an acceleration of 1m/s2 and a constant velocity of 100 mm/s. The operational parameters (average absolute position error during constant velocity, motor force, dead zone level) remain stable over more than 370000 passes (experiment duration).

BrO, OClO and HCHO Observations from the EOS-Aura Ozone Monitoring Instrument

NASA Astrophysics Data System (ADS)

Kurosu, T. P.; Chance, K.; Sioris, C. E.

2004-12-01

The Ozone Monitoring Instrument (OMI) was launched on 15 July 2004 on the EOS-Aura platform into a sun-synchronous, polar orbit with an equator crossing time of 13:45h (ascending node). OMI is a nadir-viewing near-UV/Visible spectrometer, covering the spectral region of 270 nm to 500 nm with a resolution between 0.45 nm and 1.0 nm and a nominal ground footprint of 13 km×24 km. Global coverage is achieved in one day. The very high spatial resolution of OMI measurements sets a new standard for trace gas and air quality monitoring from space. Combined with daily global coverage, this significantly advances our ability to answer outstanding questions on air pollution, including the determination of BrO sources in mid and low latitudes, BrO--O3 anti-correlations as a function of latitude, and the production of formaldehyde in cities of the developing world. We introduce the design of the OMI operational retrieval algorithm for BrO, OClO and HCHO. Based on a direct (non-DOAS) non-linear fitting approach, it includes wavelength calibration for radiances and irradiances, an undersampling correction, and the characterization of the instrument slit function. We will present results of BrO (global distribution, and tropospheric contributions from the break-up ice shelves and volcanic emissions), formaldehyde (over regions of isoprene emissions, forest fires, and heavy urban pollution), and, contingent upon the availability of suitable OMI observations, OClO (under ozone hole conditions). Where available, trace gas retrievals from OMI will be compared to results from the SCIAMACHY and GOME instruments.

Variations in the structure of nexuses in the myocardium of the golden hamster Mesocricetus auratus.

PubMed Central

Skepper, J N; Navaratnam, V

1986-01-01

The structure of nexuses in the atrioventricular node of the golden hamster was studied with the transmission electron microscope, using thin sections and freeze-fracture replicas, and was compared with that of nexuses in the working myocardium of the right ventricular wall. Whereas ventricular myocardium contained macular nexuses only, nodal tissue contained annular and linear configurations as well as maculae of varying size. The significance of such variations in nexus pattern is not clear although several hypotheses are discussed in the literature. Measurements made on electron micrographs, after allowing for tilt of the specimen, yielded a particle diameter of 10.59 nm for nodal myocardium and 10.95 nm for ventricular myocardium, both measurements being substantially higher than figures generally cited in the literature. In each area the measurements had a normal distribution suggesting a single type of particle. The small but significant difference in particle size between the two areas is more likely to be caused by dissimilarities in packing arrangement rather than by differences in intrinsic structure or in functional state. Images Fig. 1 Fig. 3 PMID:3693102

A 75-ps Gated CMOS Image Sensor with Low Parasitic Light Sensitivity

PubMed Central

Zhang, Fan; Niu, Hanben

2016-01-01

In this study, a 40 × 48 pixel global shutter complementary metal-oxide-semiconductor (CMOS) image sensor with an adjustable shutter time as low as 75 ps was implemented using a 0.5-μm mixed-signal CMOS process. The implementation consisted of a continuous contact ring around each p+/n-well photodiode in the pixel array in order to apply sufficient light shielding. The parasitic light sensitivity of the in-pixel storage node was measured to be 1/8.5 × 107 when illuminated by a 405-nm diode laser and 1/1.4 × 104 when illuminated by a 650-nm diode laser. The pixel pitch was 24 μm, the size of the square p+/n-well photodiode in each pixel was 7 μm per side, the measured random readout noise was 217 e− rms, and the measured dynamic range of the pixel of the designed chip was 5500:1. The type of gated CMOS image sensor (CIS) that is proposed here can be used in ultra-fast framing cameras to observe non-repeatable fast-evolving phenomena. PMID:27367699

A 75-ps Gated CMOS Image Sensor with Low Parasitic Light Sensitivity.

PubMed

Zhang, Fan; Niu, Hanben

2016-06-29

In this study, a 40 × 48 pixel global shutter complementary metal-oxide-semiconductor (CMOS) image sensor with an adjustable shutter time as low as 75 ps was implemented using a 0.5-μm mixed-signal CMOS process. The implementation consisted of a continuous contact ring around each p+/n-well photodiode in the pixel array in order to apply sufficient light shielding. The parasitic light sensitivity of the in-pixel storage node was measured to be 1/8.5 × 10⁷ when illuminated by a 405-nm diode laser and 1/1.4 × 10⁴ when illuminated by a 650-nm diode laser. The pixel pitch was 24 μm, the size of the square p+/n-well photodiode in each pixel was 7 μm per side, the measured random readout noise was 217 e(-) rms, and the measured dynamic range of the pixel of the designed chip was 5500:1. The type of gated CMOS image sensor (CIS) that is proposed here can be used in ultra-fast framing cameras to observe non-repeatable fast-evolving phenomena.

High-NA EUV lithography enabling Moore's law in the next decade

NASA Astrophysics Data System (ADS)

van Schoot, Jan; Troost, Kars; Bornebroek, Frank; van Ballegoij, Rob; Lok, Sjoerd; Krabbendam, Peter; Stoeldraijer, Judon; Loopstra, Erik; Benschop, Jos P.; Finders, Jo; Meiling, Hans; van Setten, Eelco; Kneer, Bernhard; Kuerz, Peter; Kaiser, Winfried; Heil, Tilmann; Migura, Sascha; Neumann, Jens Timo

2017-10-01

While EUV systems equipped with a 0.33 Numerical Aperture lenses are readying to start volume manufacturing, ASML and Zeiss are ramping up their activities on a EUV exposure tool with Numerical Aperture of 0.55. The purpose of this scanner, targeting an ultimate resolution of 8nm, is to extend Moore's law throughout the next decade. A novel, anamorphic lens design, capable of providing the required Numerical Aperture has been investigated; This lens will be paired with new, faster stages and more accurate sensors enabling Moore's law economical requirements, as well as the tight focus and overlay control needed for future process nodes. The tighter focus and overlay control budgets, as well as the anamorphic optics, will drive innovations in the imaging and OPC modelling. Furthermore, advances in resist and mask technology will be required to image lithography features with less than 10nm resolution. This paper presents an overview of the target specifications, key technology innovations and imaging simulations demonstrating the advantages as compared to 0.33NA and showing the capabilities of the next generation EUV systems.

Fully industrialised single photon avalanche diodes

NASA Astrophysics Data System (ADS)

Pellegrini, S.; Rae, B.

2017-05-01

Single Photon Avalanche diodes (SPADs) were first realized more than five decades ago[1][1], and have now been industrialized for mass production in the 130 nm CMOS technology node by STMicroelectronics (STM). In this paper we present the latest STM SPAD with an excellent NIR photon detection probability (>5% at 850nm), a dark count rate median of 100 cps at room temperature and a low breakdown voltage of 14.2V. The dead time of the SPAD is approximately 25 ns, leading to a maximum count rate of 40 Mcps. Thanks to the 130 nm gate length of the CMOS technology used and the associated high digital gate density, complex digital signal processing can be implemented allowing fully integrated systems to be realized. The low bias required by the SPAD makes it possible for voltage generation to be achieved on-chip (e.g. charge pumped). We introduce our first generation time-of-flight system (VL6180) based on the STM SPAD technology, which is capable of ranging up to 60 cm in 60 ms. Ranging capabilities and accuracy are measured using a set of moving targets with reflectance of 5%, 17% and 88% in a fully automated test bed. To the best of our knowledge this was the first high volume SPAD-based device. To our knowledge this is the first time details of SPAD performance over production volumes and lifetime have been presented.

Characterization of Gd loaded chitosan-TPP nanohydrogels by a multi-technique approach combining dynamic light scattering (DLS), asymetrical flow-field-flow-fractionation (AF4) and atomic force microscopy (AFM) and design of positive contrast agents for molecular resonance imaging (MRI)

NASA Astrophysics Data System (ADS)

Rigaux, G.; Gheran, C. V.; Callewaert, M.; Cadiou, C.; Voicu, S. N.; Dinischiotu, A.; Andry, M. C.; Vander Elst, L.; Laurent, S.; Muller, R. N.; Berquand, A.; Molinari, M.; Huclier-Markai, S.; Chuburu, F.

2017-02-01

Chitosan CS—tripolyphosphate TPP/hyaluronic acid HA nanohydrogels loaded with gadolinium chelates (GdDOTA ⊂ CS-TPP/HA NGs) synthesized by ionic gelation were designed for lymph node (LN) MRI. In order to be efficiently drained to LNs, nanogels (NGs) needed to exhibit a diameter ϕ < 100 nm. For that, formulation parameters were tuned, using (i) CS of two different molecular weights (51 and 37 kDa) and (ii) variable CS/TPP ratio (2 < CS/TPP < 8). Characterization of NG size distribution by dynamic light scattering (DLS) and asymetrical flow-field-flow-fractionation (AF4) showed discrepancies since DLS diameters were consistently above 200 nm while AF4 showed individual nano-objects with ϕ < 100 nm. Such a difference could be correlated to the presence of aggregates inherent to ionic gelation. This point was clarified by atomic force microscopy (AFM) in liquid mode which highlighted the main presence of individual nano-objects in nanosuspensions. Thus, combination of DLS, AF4 and AFM provided a more precise characterization of GdDOTA ⊂ CS-TPP/HA nanohydrogels which, in turn, allowed to select formulations leading to NGs of suitable mean sizes showing good MRI efficiency and negligible toxicity.

A hybrid magnetic/complementary metal oxide semiconductor three-context memory bit cell for non-volatile circuit design

NASA Astrophysics Data System (ADS)

Jovanović, B.; Brum, R. M.; Torres, L.

2014-04-01

After decades of continued scaling to the beat of Moore's law, it now appears that conventional silicon based devices are approaching their physical limits. In today's deep-submicron nodes, a number of short-channel and quantum effects are emerging that affect the manufacturing process, as well as, the functionality of the microelectronic systems-on-chip. Spintronics devices that exploit both the intrinsic spin of the electron and its associated magnetic moment, in addition to its fundamental electronic charge, are promising solutions to circumvent these scaling threats. Being compatible with the CMOS technology, such devices offer a promising synergy of radiation immunity, infinite endurance, non-volatility, increased density, etc. In this paper, we present a hybrid (magnetic/CMOS) cell that is able to store and process data both electrically and magnetically. The cell is based on perpendicular spin-transfer torque magnetic tunnel junctions (STT-MTJs) and is suitable for use in magnetic random access memories and reprogrammable computing (non-volatile registers, processor cache memories, magnetic field-programmable gate arrays, etc). To demonstrate the potential our hybrid cell, we physically implemented a small hybrid memory block using 45 nm × 45 nm round MTJs for the magnetic part and 28 nm fully depleted silicon on insulator (FD-SOI) technology for the CMOS part. We also report the cells measured performances in terms of area, robustness, read/write speed and energy consumption.

Three dimensional profile measurement using multi-channel detector MVM-SEM

NASA Astrophysics Data System (ADS)

Yoshikawa, Makoto; Harada, Sumito; Ito, Keisuke; Murakawa, Tsutomu; Shida, Soichi; Matsumoto, Jun; Nakamura, Takayuki

2014-07-01

In next generation lithography (NGL) for the 1x nm node and beyond, the three dimensional (3D) shape measurements such as side wall angle (SWA) and height of feature on photomask become more critical for the process control. Until today, AFM (Atomic Force Microscope), X-SEM (cross-section Scanning Electron Microscope) and TEM (Transmission Electron Microscope) tools are normally used for 3D measurements, however, these techniques require time-consuming preparation and observation. And both X-SEM and TEM are destructive measurement techniques. This paper presents a technology for quick and non-destructive 3D shape analysis using multi-channel detector MVM-SEM (Multi Vision Metrology SEM), and also reports its accuracy and precision.

High histologic grade and increased relative content of tryptophan in breast cancer using ratios from fingerprint fluorescence spectral peaks

NASA Astrophysics Data System (ADS)

Sordillo, Laura A.; Sordillo, Peter P.; Budansky, Yury; Pu, Yang; Alfano, R. R.

2015-03-01

Histologic grade is a very important, but underappreciated, parameter of breast cancer aggressiveness. Despite its importance, it has historically not been included as one of the criteria for staging of this cancer. In this study, spectral fluorescence profiles from patients with breast carcinoma were acquired. Ratios of emission peaks at 340 over 440,460 nm from biomolecules in malignant and normal samples were calculated. Cancerous over normal ratios (double ratio (DR) method) were evaluated with respect to tumor characteristics. Increased tryptophan content in breast cancer tissues correlates strongly with high grade, but not with lymph node metastases, estrogen receptor, progesterone receptor or Her-2-Neu receptor status.

A 45 nm Stacked CMOS Image Sensor Process Technology for Submicron Pixel †

PubMed Central

Takahashi, Seiji; Huang, Yi-Min; Sze, Jhy-Jyi; Wu, Tung-Ting; Guo, Fu-Sheng; Hsu, Wei-Cheng; Tseng, Tung-Hsiung; Liao, King; Kuo, Chin-Chia; Chen, Tzu-Hsiang; Chiang, Wei-Chieh; Chuang, Chun-Hao; Chou, Keng-Yu; Chung, Chi-Hsien; Chou, Kuo-Yu; Tseng, Chien-Hsien; Wang, Chuan-Joung; Yaung, Dun-Nien

2017-01-01

A submicron pixel’s light and dark performance were studied by experiment and simulation. An advanced node technology incorporated with a stacked CMOS image sensor (CIS) is promising in that it may enhance performance. In this work, we demonstrated a low dark current of 3.2 e−/s at 60 °C, an ultra-low read noise of 0.90 e−·rms, a high full well capacity (FWC) of 4100 e−, and blooming of 0.5% in 0.9 μm pixels with a pixel supply voltage of 2.8 V. In addition, the simulation study result of 0.8 μm pixels is discussed. PMID:29206162

Multiple beam mask writers: an industry solution to the write time crisis

NASA Astrophysics Data System (ADS)

Litt, Lloyd C.

2010-09-01

The semiconductor industry is under constant pressure to reduce production costs even as technology complexity increases. Lithography represents the most expensive process due to its high capital equipment costs and the implementation of low-k1 lithographic processes, which has added to the complexity of making masks through the greater use of optical proximity correction, pixelated masks, and double or triple patterning. Each of these mask technologies allows the production of semiconductors at future nodes while extending the utility of current immersion tools. Low k1 patterning complexity combined with increased data due to smaller feature sizes is driving extremely long mask write times. While a majority of the industry is willing to accept mask write times of up to 24 hours, evidence suggests that the write times for many masks at the 22 nm node and beyond will be significantly longer. It has been estimated that $50M+ in non-recurring engineering (NRE) costs will be required to develop a multiple beam mask writer system, yet the business case to recover this kind of investment is not strong. Moreover, funding such a development is a high risk for an individual supplier. The problem is compounded by a disconnect between the tool customer (the mask supplier) and the final mask customer that will bear the increased costs if a high speed writer is not available. Since no individual company will likely risk entering this market, some type of industry-wide funding model will be needed. Because SEMATECH's member companies strongly support a multiple beam technology for mask writers to reduce the write time and cost of 193 nm and EUV masks, SEMATECH plans to pursue an advanced mask writer program in 2011 and 2012. In 2010, efforts will focus on identifying a funding model to address the investment to develop such a technology.

The natriuretic peptides BNP and CNP increase heart rate and electrical conduction by stimulating ionic currents in the sinoatrial node and atrial myocardium following activation of guanylyl cyclase-linked natriuretic peptide receptors.

PubMed

Springer, Jeremy; Azer, John; Hua, Rui; Robbins, Courtney; Adamczyk, Andrew; McBoyle, Sarah; Bissell, Mary Beth; Rose, Robert A

2012-05-01

Natriuretic peptides (NPs) are best known for their ability to regulate blood vessel tone and kidney function whereas their electrophysiological effects on the heart are less clear. Here, we measured the effects of BNP and CNP on sinoatrial node (SAN) and atrial electrophysiology in isolated hearts as well as isolated SAN and right atrial myocytes from mice. BNP and CNP dose-dependently increased heart rate and conduction through the heart as indicated by reductions in R-R interval, P wave duration and P-R interval on ECGs. In conjunction with these ECG changes BNP and CNP (100 nM) increased spontaneous action potential frequency in isolated SAN myocytes by increasing L-type Ca(2+) current (I(Ca,L)) and the hyperpolarization-activated current (I(f)). BNP had no effect on right atrial myocyte APs in basal conditions; however, in the presence of isoproterenol (10nM), BNP increased atrial AP duration and I(Ca,L). Quantitative gene expression and immunocytochemistry data show that all three NP receptors (NPR-A, NPR-B and NPR-C) are expressed in the SAN and atrium. The effects of BNP and CNP on SAN and right atrial myocytes were maintained in mutant mice lacking functional NPR-C receptors and blocked by the NPR-A antagonist A71915 indicating that BNP and CNP function through their guanylyl cyclase-linked receptors. Our data also show that the effects of BNP and CNP are completely absent in the presence of the phosphodiesterase 3 inhibitor milrinone. Based on these data we conclude that NPs can increase heart rate and electrical conduction by activating the guanylyl cyclase-linked NPR-A and NPR-B receptors and inhibiting PDE3 activity. Copyright © 2012 Elsevier Ltd. All rights reserved.

0.25-μm lithography using a 50-kV shaped electron-beam vector scan system

NASA Astrophysics Data System (ADS)

Gesley, Mark A.; Mulera, Terry; Nurmi, C.; Radley, J.; Sagle, Allan L.; Standiford, Keith P.; Tan, Zoilo C. H.; Thomas, John R.; Veneklasen, Lee

1995-05-01

Performance data from a prototype 50 kV shaped electron-beam (e-beam) pattern generator is presented. This technology development is targeted towards 180-130 nm device design rules. It will be able to handle 1X NIST X-ray membranes, glass reduction reticles, and 4- to 8-inch wafers. The prototype system uses a planar stage adapted from the IBM EL-4 design. The electron optics is an 50 kV extension of the AEBLE%+TM) design. Lines and spaces of 0.12 micrometers with < 40 nm corner radius are resolved in 0.4 micrometers thick resist at 50 kV. This evolutionary platform will evolve further to include a new 100 kV column with telecentric deflection and a 21-bit (0.5 mm) major field for improved placement accuracy. A unique immersion shaper, faster data path electronics, and 15-bit (32 micrometers ) minor field deflection electronics will substantially increase the flash rate. To match its much finer address structure, the pattern generator figure word size will increase from 80 to 96 bits. The data path electronics uses field programmable gate array (FPGA) logic allowing writing strategy optimization via software reconfiguration. An advanced stage position control (ASPC) includes three-axis, (lambda) /1024 interferometry and a high bandwidth dynamic corrections processor (DCP). Along with its normal role of coordinate transformation and dynamic correction of deflection distortion, astigmatism, and defocus; the DCP improves accuracy by modifying deflection conditions and focus according to measured substrate height variations. It also enables yaw calibration and correction for Write-on-the FlyTM motion. The electronics incorporates JTAG components for built-in self- test (BIST), as well as syndrome checking to ensure data integrity. The design includes diagnostic capabilities from offsite as well as from the operator console. A combination of third-party software and an internal job preparation software system is used to fracture patterns. It handles tone reversal, overlap removal, sizing, and proximity correction. Processing of large files in a commercial mask shop environment is made more efficient by retaining hierarchy and using parallel processing and data compression techniques. Large GDSIITM and MEBES data files can be processed. Data includes timing benchmarks for a 1 Gbit DRAM on both proximity and reduction reticles. The paper presents 50 kV results on silicon and quartz substrates along with examples of overlay to an external grid, field butting, and critical dimension (CD) control data. Selective experiments testing system stability, calibration accuracy, and local correction software implementation on a VAX control computer are also given.

Tracing Cadmium from Culture to Spikelet: Noninvasive Imaging and Quantitative Characterization of Absorption, Transport, and Accumulation of Cadmium in an Intact Rice Plant1[W][OA

PubMed Central

Fujimaki, Shu; Suzui, Nobuo; Ishioka, Noriko S.; Kawachi, Naoki; Ito, Sayuri; Chino, Mitsuo; Nakamura, Shin-ichi

2010-01-01

We characterized the absorption and short-term translocation of cadmium (Cd) in rice (Oryza sativa ‘Nipponbare’) quantitatively using serial images observed with a positron-emitting tracer imaging system. We fed a positron-emitting 107Cd (half-life of 6.5 h) tracer to the hydroponic culture solution and noninvasively obtained serial images of Cd distribution in intact rice plants at the vegetative stage and at the grain-filling stage every 4 min for 36 h. The rates of absorption of Cd by the root were proportional to Cd concentrations in the culture solution within the tested range of 0.05 to 100 nm. It was estimated that the radial transport from the culture to the xylem in the root tissue was completed in less than 10 min. Cd moved up through the shoot organs with velocities of a few centimeters per hour at both stages, which was obviously slower than the bulk flow in the xylem. Finally, Cd arrived at the panicles 7 h after feeding and accumulated there constantly, although no Cd was observed in the leaf blades within the initial 36 h. The nodes exhibited the most intensive Cd accumulation in the shoot at both stages, and Cd transport from the basal nodes to crown root tips was observed at the vegetative stage. We conclude that the nodes are the central organ where xylem-to-phloem transfer takes place and play a pivotal role in the half-day travel of Cd from the soil to the grains at the grain-filling stage. PMID:20172965

Design of the SLAC RCE Platform: A General Purpose ATCA Based Data Acquisition System

DOE Office of Scientific and Technical Information (OSTI.GOV)

Herbst, R.; Claus, R.; Freytag, M.

2015-01-23

The SLAC RCE platform is a general purpose clustered data acquisition system implemented on a custom ATCA compliant blade, called the Cluster On Board (COB). The core of the system is the Reconfigurable Cluster Element (RCE), which is a system-on-chip design based upon the Xilinx Zynq family of FPGAs, mounted on custom COB daughter-boards. The Zynq architecture couples a dual core ARM Cortex A9 based processor with a high performance 28nm FPGA. The RCE has 12 external general purpose bi-directional high speed links, each supporting serial rates of up to 12Gbps. 8 RCE nodes are included on a COB, eachmore » with a 10Gbps connection to an on-board 24-port Ethernet switch integrated circuit. The COB is designed to be used with a standard full-mesh ATCA backplane allowing multiple RCE nodes to be tightly interconnected with minimal interconnect latency. Multiple shelves can be clustered using the front panel 10-gbps connections. The COB also supports local and inter-blade timing and trigger distribution. An experiment specific Rear Transition Module adapts the 96 high speed serial links to specific experiments and allows an experiment-specific timing and busy feedback connection. This coupling of processors with a high performance FPGA fabric in a low latency, multiple node cluster allows high speed data processing that can be easily adapted to any physics experiment. RTEMS and Linux are both ported to the module. The RCE has been used or is the baseline for several current and proposed experiments (LCLS, HPS, LSST, ATLAS-CSC, LBNE, DarkSide, ILC-SiD, etc).« less

OPC care-area feedforwarding to MPC

NASA Astrophysics Data System (ADS)

Dillon, Brian; Peng, Yi-Hsing; Hamaji, Masakazu; Tsunoda, Dai; Muramatsu, Tomoyuki; Ohara, Shuichiro; Zou, Yi; Arnoux, Vincent; Baron, Stanislas; Zhang, Xiaolong

2016-10-01

Demand for mask process correction (MPC) is growing for leading-edge process nodes. MPC was originally intended to correct CD linearity for narrow assist features difficult to resolve on a photomask without any correction, but it has been extended to main features as process nodes have been shrinking. As past papers have observed, MPC shows improvements in photomask fidelity. Using advanced shape and dose corrections could give more improvements, especially at line-ends and corners. However, there is a dilemma on using such advanced corrections on full mask level because it increases data volume and run time. In addition, write time on variable shaped beam (VSB) writers also increases as the number of shots increases. Optical proximity correction (OPC) care-area defines circuit design locations that require high mask fidelity under mask writing process variations such as energy fluctuation. It is useful for MPC to switch its correction strategy and permit the use of advanced mask correction techniques in those local care-areas where they provide maximum wafer benefits. The use of mask correction techniques tailored to localized post-OPC design can result in similar desired level of data volume, run time, and write time. ASML Brion and NCS have jointly developed a method to feedforward the care-area information from Tachyon LMC to NDE-MPC to provide real benefit for improving both mask writing and wafer printing quality. This paper explains the detail of OPC care-area feedforwarding to MPC between ASML Brion and NCS, and shows the results. In addition, improvements on mask and wafer simulations are also shown. The results indicate that the worst process variation (PV) bands are reduced up to 37% for a 10nm tech node metal case.

TOPICAL REVIEW: Synthesis and applications of magnetic nanoparticles for biorecognition and point of care medical diagnostics

NASA Astrophysics Data System (ADS)

Sandhu, Adarsh; Handa, Hiroshi; Abe, Masanori

2010-11-01

Functionalized magnetic nanoparticles are important components in biorecognition and medical diagnostics. Here, we present a review of our contribution to this interdisciplinary research field. We start by describing a simple one-step process for the synthesis of highly uniform ferrite nanoparticles (d = 20-200 nm) and their functionalization with amino acids via carboxyl groups. For real-world applications, we used admicellar polymerization to produce 200 nm diameter 'FG beads', consisting of several 40 nm diameter ferrite nanoparticles encapsulated in a co-polymer of styrene and glycidyl methacrylate for high throughput molecular screening. The highly dispersive FG beads were functionalized with an ethylene glycol diglycidyl ether spacer and used for affinity purification of methotrexate—an anti-cancer agent. We synthesized sub-100 nm diameter magnetic nanocapsules by exploiting the self-assembly of viral capsid protein pentamers, where single 8, 20, and 27 nm nanoparticles were encapsulated with VP1 pentamers for applications including MRI contrast agents. The FG beads are now commercially available for use in fully automated bio-screening systems. We also incorporated europium complexes inside a polymer matrix to produce 140 nm diameter fluorescent-ferrite beads (FF beads), which emit at 618 nm. These FF beads were used for immunofluorescent staining for diagnosis of cancer metastases to lymph nodes during cancer resection surgery by labeling tumor cell epidermal growth factor receptor (EGFRs), and for the detection of brain natriuretic peptide (BNP)—a hormone secreted in excess amounts by the heart when stressed—to a level of 2.0 pg ml - 1. We also describe our work on Hall biosensors made using InSb and GaAs/InGaAs/AlGaAs 2DEG heterostructures integrated with gold current strips to reduce measurement times. Our approach for the detection of sub-200 nm magnetic bead is also described: we exploit the magnetically induced capture of micrometer sized 'probe beads' by nanometer sized 'target beads', enabling the detection of small concentrations of beads as small as 8 nm in 'pumpless' microcapillary systems. Finally, we describe a 'label-less homogeneous' procedure referred to as 'magneto-optical transmission (MT) sensing', where the optical transmission of a solution containing rotating linear chains of magnetic nanobeads was used to detect biomolecules with pM-level sensitivity with a dynamic range of more than four orders of magnitude. Our research on the synthesis and applications of nanoparticles is particularly suitable for point of care diagnostics.

Synthesis and applications of magnetic nanoparticles for biorecognition and point of care medical diagnostics.

PubMed

Sandhu, Adarsh; Handa, Hiroshi; Abe, Masanori

2010-11-05

Functionalized magnetic nanoparticles are important components in biorecognition and medical diagnostics. Here, we present a review of our contribution to this interdisciplinary research field. We start by describing a simple one-step process for the synthesis of highly uniform ferrite nanoparticles (d = 20-200 nm) and their functionalization with amino acids via carboxyl groups. For real-world applications, we used admicellar polymerization to produce 200 nm diameter 'FG beads', consisting of several 40 nm diameter ferrite nanoparticles encapsulated in a co-polymer of styrene and glycidyl methacrylate for high throughput molecular screening. The highly dispersive FG beads were functionalized with an ethylene glycol diglycidyl ether spacer and used for affinity purification of methotrexate-an anti-cancer agent. We synthesized sub-100 nm diameter magnetic nanocapsules by exploiting the self-assembly of viral capsid protein pentamers, where single 8, 20, and 27 nm nanoparticles were encapsulated with VP1 pentamers for applications including MRI contrast agents. The FG beads are now commercially available for use in fully automated bio-screening systems. We also incorporated europium complexes inside a polymer matrix to produce 140 nm diameter fluorescent-ferrite beads (FF beads), which emit at 618 nm. These FF beads were used for immunofluorescent staining for diagnosis of cancer metastases to lymph nodes during cancer resection surgery by labeling tumor cell epidermal growth factor receptor (EGFRs), and for the detection of brain natriuretic peptide (BNP)-a hormone secreted in excess amounts by the heart when stressed-to a level of 2.0 pg ml(-1). We also describe our work on Hall biosensors made using InSb and GaAs/InGaAs/AlGaAs 2DEG heterostructures integrated with gold current strips to reduce measurement times. Our approach for the detection of sub-200 nm magnetic bead is also described: we exploit the magnetically induced capture of micrometer sized 'probe beads' by nanometer sized 'target beads', enabling the detection of small concentrations of beads as small as 8 nm in 'pumpless' microcapillary systems. Finally, we describe a 'label-less homogeneous' procedure referred to as 'magneto-optical transmission (MT) sensing', where the optical transmission of a solution containing rotating linear chains of magnetic nanobeads was used to detect biomolecules with pM-level sensitivity with a dynamic range of more than four orders of magnitude. Our research on the synthesis and applications of nanoparticles is particularly suitable for point of care diagnostics.

Electrical and dielectric properties of (barium, strontium) titanium trioxide thin film capacitors for ultra-high density dynamic random access memories

NASA Astrophysics Data System (ADS)

Basceri, Cem

The electrical and dielectric properties of fiber-textured, MOCVD (Basb{0.7}Srsb{0.3})TiOsb3 (BST) thin film capacitors appropriate for ultra-large scale integration (ULSI) dynamic random access memory (DRAM) applications have been analyzed. Dielectric relaxation, leakage, resistance degradation, and dielectric response phenomena, within a comprehensive matrix of external and material parameters, have been investigated. The phenomenology of the dielectric response of our BST films has been shown to be well-described by Curie-von Schweidler behavior, although the microscopic origin of this behavior has not been presently agreed upon. The time-dependent polarization behavior has been linked to the dispersion in permittivity with respect to frequency. The leakage current through our BST films has been found to be primarily limited by interfacial Schottky barriers whose properties depend on the electrode material, interface microstructure, and deposition conditions. Its temperature and voltage dependence have been interpreted via a thermionic emission model. Analysis in terms of Schottky-barrier limited current flow gave acceptable values for the cathode barrier height. The results have indicated that our BST films, appropriate for DRAM applications, do not possess depletion layers at the film-electrode interfaces. Instead, they must be considered as depleted of charge carriers across their entire thickness. Resistance degradation has been found to be thermally activated and voltage/field dependent. The results have indicated that there is a film thickness effect, which manifests itself as a decrease in the activation energy with respect to temperature for thicker films. A significant stoichiometry effect on the measured resistance degradation lifetimes has been observed. The analyses of the leakage and capacitance-voltage behaviors for the degraded samples have indicated that a demixing of oxygen vacancies occurs during resistance degradation, which causes the Schottky barrier height to decrease, in agreement with the observed relative shift of the peak capacitance as a function of voltage. For all the film thicknesses and compositions studied, extrapolated resistance degradation lifetimes of our BST films, which were obtained by using an appropriate form, are well above the current benchmark of 10 years at the DRAM operating conditions of 1.6 V and 85sp°C. Above the bulk Curie point (˜300 K), the phenomenological approach, i.e., Landau-Ginzburg-Devonshire (LGD) theory, has been demonstrated to account very well for the observed C-V behavior in our BST films. Furthermore, temperature dependent measurements gave evidence that, as expected, the form of the dielectric behavior changes near the bulk Curie point, but that the phase transition appears for some reason to be frustrated. Film thickness has been established to impact primarily the zero-bias permittivity through a thickness dependence of the first order coefficient of the LGD power series. Our analysis does indicate that if it results from a series-connected interfacial layer, that layer must be a nonlinear dielectric, as must the bulk of the film. The dielectric constant has been found to be composition dependent, reaching its highest values for compositions near the stoichiometric values. Furthermore, film stoichiometry has been established to strongly effect both the first order and third order coefficients of the LGD power series.

In-die photomask registration and overlay metrology with PROVE using 2D correlation methods

NASA Astrophysics Data System (ADS)

Seidel, D.; Arnz, M.; Beyer, D.

2011-11-01

According to the ITRS roadmap, semiconductor industry drives the 193nm lithography to its limits, using techniques like double exposure, double patterning, mask-source optimization and inverse lithography. For photomask metrology this translates to full in-die measurement capability for registration and critical dimension together with challenging specifications for repeatability and accuracy. Especially, overlay becomes more and more critical and must be ensured on every die. For this, Carl Zeiss SMS has developed the next generation photomask registration and overlay metrology tool PROVE® which serves the 32nm node and below and which is already well established in the market. PROVE® features highly stable hardware components for the stage and environmental control. To ensure in-die measurement capability, sophisticated image analysis methods based on 2D correlations have been developed. In this paper we demonstrate the in-die capability of PROVE® and present corresponding measurement results for shortterm and long-term measurements as well as the attainable accuracy for feature sizes down to 85nm using different illumination modes and mask types. Standard measurement methods based on threshold criteria are compared with the new 2D correlation methods to demonstrate the performance gain of the latter. In addition, mask-to-mask overlay results of typical box-in-frame structures down to 200nm feature size are presented. It is shown, that from overlay measurements a reproducibility budget can be derived that takes into account stage, image analysis and global effects like mask loading and environmental control. The parts of the budget are quantified from measurement results to identify critical error contributions and to focus on the corresponding improvement strategies.

Simultaneous multi-scale microscopy as a potential dedicated tool for intra-operative parathyroid identification during thyroid surgery (Conference Presentation)

NASA Astrophysics Data System (ADS)

De Montigny, Étienne; Goulamhoussen, Nadir; Madore, Wendy-Julie; Strupler, Mathias; Maniakas, Anastasios; Ayad, Tareck; Boudoux, Caroline

2016-02-01

While thyroidectomy is considered a safe surgery, dedicated tools facilitating tissue identification during surgery could improve its outcome. The most common complication following surgery is hypocalcaemia, which results from iatrogenic removal or damage to parathyroid glands. This research project aims at developing and validating an instrument based on optical microscopy modalities to identify tissues in real time during surgery. Our approach is based on a combination of reflectance confocal microscopy (RCM) and optical coherence tomography (OCT) to obtain multi-scale morphological contrast images. The orthogonal field of views provide information to navigate through the sample. To allow simultaneous, synchronized video-rate imaging in both modalities, we designed and built a dual-band wavelength-swept laser which scans a 30 nm band centered at 780 nm and a 90 nm band centered at 1310 nm. We built an imaging setup integrating a custom-made objective lens and a double-clad fibre coupler optimized for confocal microscopy. It features high resolutions in RCM (2µm lateral and 20 µm axial) in a 500 µm x 500 µm field-of-view and a larger field-of-view of 2 mm (lateral) x 5 mm (axial) with 20 µm lateral and axial resolutions in OCT. Imaging of ex vivo animal samples is demonstrated on a bench-top system. Tissues that are visually difficult to distinguish from each other intra-operatively such as parathyroid gland, lymph nodes and adipose tissue are imaged to show the potential of this approach in differentiating neck tissues. We will also provide an update on our ongoing clinical pilot study on patients undergoing thyroidectomy.

Effect of Ion Flux (Dose Rate) in Source-Drain Extension Ion Implantation for 10-nm Node FinFET and Beyond on 300/450mm Platforms

NASA Astrophysics Data System (ADS)

Shen, Ming-Yi

The improvement of wafer equipment productivity has been a continuous effort of the semiconductor industry. Higher productivity implies lower product price, which economically drives more demand from the market. This is desired by the semiconductor manufacturing industry. By raising the ion beam current of the ion implanter for 300/450mm platforms, it is possible to increase the throughput of the ion implanter. The resulting dose rate can be comparable to the performance of conventional ion implanters or higher, depending on beam current and beam size. Thus, effects caused by higher dose rate must be investigated further. One of the major applications of ion implantation (I/I) is source-drain extension (SDE) I/I for the silicon FinFET device. This study investigated the dose rate effects on the material properties and device performance of the 10-nm node silicon FinFET. In order to gain better understanding of the dose rate effects, the dose rate study is based on Synopsys Technology CAD (TCAD) process and device simulations that are calibrated and validated using available structural silicon fin samples. We have successfully shown that the kinetic monte carlo (KMC) I/I simulation can precisely model both the silicon amorphization and the arsenic distribution in the fin by comparing the KMC simulation results with TEM images. The results of the KMC I/I simulation show that at high dose rate more activated arsenic dopants were in the source-drain extension (SDE) region. This finding matches with the increased silicon amorphization caused by the high dose-rate I/I, given that the arsenic atoms could be more easily activated by the solid phase epitaxial regrowth process. This increased silicon amorphization led to not only higher arsenic activation near the spacer edge, but also less arsenic atoms straggling into the channel. Hence, it is possible to improve the throughput of the ion implanter when the dopants are implanted at high dose rate if the same doping level with a lower wafer dose can be achieved. In addition, the leakage current might also be reduced due to less undesired dopants in the channel. However, the twin defects from the problematic Si{111} recrystallization is well-known to cause excessive leakage current to the FinFET. This drawback can offset the benefits of the high dose rate I/I mentioned above. This work produced the first attempt at simulating the electrical impact of twin defects on advanced-node (10 nm) FinFET device performance. It was found that the high dose-rate I/I causes more twin defects in the silicon fin, and the physical locations of these defects were close to the channel. The defects undesirably induced trap-assisted band-to-band tunneling near the drain, which increased the leakage current. This issue could be mitigated by using asymmetrical gate overlap/underlap design or thicker spacer for SDE I/I so that the twin defects are not located in the depletion region near the drain.

Slip-flow in complex porous media as determined by a multi-relaxation-time lattice Boltzmann model

NASA Astrophysics Data System (ADS)

Landry, C. J.; Prodanovic, M.; Eichhubl, P.

2014-12-01

The pores and throats of shales and mudrocks are predominantly found within a range of 1-100 nm, within this size range the flow of gas at reservoir conditions will fall within the slip-flow and low transition-flow regime (0.001 < Kn < 0.5). Currently, the study of slip-flows is for the most part limited to simple tube and channel geometries, however, the geometry of mudrock pores is often sponge-like (organic matter) and/or platy (clays). Molecular dynamics (MD) simulations can be used to predict slip-flow in complex geometries, but due to prohibitive computational demand are generally limited to small volumes (one to several pores). Here we present a multi-relaxation-time lattice Boltzmann model (LBM) parameterized for slip-flow (Guo et al. 2008) and adapted here to complex geometries. LBMs are inherently parallelizable, such that flow in complex geometries of significant (near REV-scale) volumes can be readily simulated at a fraction of the computational cost of MD simulations. At the macroscopic-scale the LBM is parameterized with local effective viscosities at each node to capture the variance of the mean-free-path of gas molecules in a bounded system. The corrected mean-free-path for each lattice node is determined using the mean distance of the node to the pore-wall and Stop's correction for mean-free-paths in an infinite parallel-plate geometry. At the microscopic-scale, a combined bounce-back specular-reflection boundary condition is applied to the pore-wall nodes to capture Maxwellian-slip. The LBM simulation results are first validated in simple tube and channel geometries, where good agreement is found for Knudsen numbers below 0.1, and fair agreement is found for Knudsen numbers between 0.1 and 0.5. More complex geometries are then examined including triangular-ducts and ellipsoid-ducts, both with constant and tapering/expanding cross-sections, as well as a clay pore-network imaged from a hydrocarbon producing shale by sequential focused ion-beam scanning electron microscopy. These results are analyzed to determine grid-independent resolutions, and used to explore the relationship between effective permeability and Knudsen number in complex geometries.

Mannosylated dextran derivatives labeled with fac-[M(CO)₃]+ (M = (99m)Tc, Re) for specific targeting of sentinel lymph node.

PubMed

Morais, Maurício; Subramanian, Suresh; Pandey, Usha; Samuel, Grace; Venkatesh, Meera; Martins, Manuel; Pereira, Sérgio; Correia, João D G; Santos, Isabel

2011-04-04

Despite being widely used in the clinical setting for sentinel lymph node detection (SLND), (99m)Tc-based colloids (e.g., (99m)Tc-human serum albumin colloids) present a set of properties that are far from ideal. Aiming to design novel compounds with improved biological properties, we describe herein the first class of fully characterized (99m)Tc(CO)₃-mannosylated dextran derivatives with adequate features for SLND. Dextran derivatives, containing the same number of pendant mannose units (13) and a variable number (n) of tridentate chelators (9, n = 1; 10, n = 4, 11, n= 12), have been synthesized and fully characterized. Radiolabeled polymers of the type fac-[(99m)Tc(CO)₃(k³-L)] (12, L = 9, 13, L = 10, 14, L = 11) have been obtained quantitatively in high radiochemical purity (≥ 98%) upon reaction of the dextran derivatives with fac-[(99m)Tc(CO)₃(H₂O)₃]+. The highly stable compounds 13 and 14 were identified by comparing their HPLC chromatograms with the ones obtained for the corresponding rhenium surrogates fac-[Re(CO)₃(k³-10)] (13a) and fac-[Re(CO)₃(k³-11)] (14a), which have been characterized both at the chemical (NMR and IR spectroscopy, and HPLC) and physical level (DLS, AFM and LDV). Compounds 13a and 14a present a positive zeta potential (+ 7.1 mV, pH 7.4) and a hydrodynamic diameter in the range 8.4-8.7 nm. Scintigraphic imaging and biodistribution studies in Wistar rats have shown good accumulation in the sentinel node at 60 min postinjection (6.71 ± 2.35%, 13; and 7.53 ± 0.69%, 14), with significant retention up to 180 min. A clear delineation of the sentinel lymph node without significant washout to other regions was observed in the scintigraphic images. The popliteal extraction of 94.47 ± 2.45% for 14 at 1 h postinjection, as compared to 61.81 ± 2.4% for 13, indicated that 14 is a very promising compound to be further explored as SLN imaging agent.

EUV mask pilot line at Intel Corporation

NASA Astrophysics Data System (ADS)

Stivers, Alan R.; Yan, Pei-Yang; Zhang, Guojing; Liang, Ted; Shu, Emily Y.; Tejnil, Edita; Lieberman, Barry; Nagpal, Rajesh; Hsia, Kangmin; Penn, Michael; Lo, Fu-Chang

2004-12-01

The introduction of extreme ultraviolet (EUV) lithography into high volume manufacturing requires the development of a new mask technology. In support of this, Intel Corporation has established a pilot line devoted to encountering and eliminating barriers to manufacturability of EUV masks. It concentrates on EUV-specific process modules and makes use of the captive standard photomask fabrication capability of Intel Corporation. The goal of the pilot line is to accelerate EUV mask development to intersect the 32nm technology node. This requires EUV mask technology to be comparable to standard photomask technology by the beginning of the silicon wafer process development phase for that technology node. The pilot line embodies Intel's strategy to lead EUV mask development in the areas of the mask patterning process, mask fabrication tools, the starting material (blanks) and the understanding of process interdependencies. The patterning process includes all steps from blank defect inspection through final pattern inspection and repair. We have specified and ordered the EUV-specific tools and most will be installed in 2004. We have worked with International Sematech and others to provide for the next generation of EUV-specific mask tools. Our process of record is run repeatedly to ensure its robustness. This primes the supply chain and collects information needed for blank improvement.

Coater/developer based techniques to improve high-resolution EUV patterning defectivity

NASA Astrophysics Data System (ADS)

Hontake, Koichi; Huli, Lior; Lemley, Corey; Hetzer, Dave; Liu, Eric; Ko, Akiteru; Kawakami, Shinichiro; Shimoaoki, Takeshi; Hashimoto, Yusaku; Tanaka, Koichiro; Petrillo, Karen; Meli, Luciana; De Silva, Anuja; Xu, Yongan; Felix, Nelson; Johnson, Richard; Murray, Cody; Hubbard, Alex

2017-10-01

Extreme ultraviolet lithography (EUVL) technology is one of the leading candidates under consideration for enabling the next generation of devices, for 7nm node and beyond. As the focus shifts to driving down the 'effective' k1 factor and enabling the full scaling entitlement of EUV patterning, new techniques and methods must be developed to reduce the overall defectivity, mitigate pattern collapse, and eliminate film-related defects. In addition, CD uniformity and LWR/LER must be improved in terms of patterning performance. Tokyo Electron Limited (TEL™) and IBM Corporation are continuously developing manufacturing quality processes for EUV. In this paper, we review the ongoing progress in coater/developer based processes (coating, developing, baking) that are required to enable EUV patterning.

Soft errors in commercial off-the-shelf static random access memories

NASA Astrophysics Data System (ADS)

Dilillo, L.; Tsiligiannis, G.; Gupta, V.; Bosser, A.; Saigne, F.; Wrobel, F.

2017-01-01

This article reviews state-of-the-art techniques for the evaluation of the effect of radiation on static random access memory (SRAM). We detailed irradiation test techniques and results from irradiation experiments with several types of particles. Two commercial SRAMs, in 90 and 65 nm technology nodes, were considered as case studies. Besides the basic static and dynamic test modes, advanced stimuli for the irradiation tests were introduced, as well as statistical post-processing techniques allowing for deeper analysis of the correlations between bit-flip cross-sections and design/architectural characteristics of the memory device. Further insight is provided on the response of irradiated stacked layer devices and on the use of characterized SRAM devices as particle detectors.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yin, Lan; Harburg, Daniel V.; Rogers, John A., E-mail: jrogers@illinois.edu

Tungsten interconnects in silicon integrated circuits built at the 90 nm node with releasable configurations on silicon on insulator wafers serve as the basis for advanced forms of water-soluble electronics. These physically transient systems have potential uses in applications that range from temporary biomedical implants to zero-waste environmental sensors. Systematic experimental studies and modeling efforts reveal essential aspects of electrical performance in field effect transistors and complementary ring oscillators with as many as 499 stages. Accelerated tests reveal timescales for dissolution of the various constituent materials, including tungsten, silicon, and silicon dioxide. The results demonstrate that silicon complementary metal-oxide-semiconductor circuits formedmore » with tungsten interconnects in foundry-compatible fabrication processes can serve as a path to high performance, mass-produced transient electronic systems.« less