Field results from a new die-to-database reticle inspection platform

NASA Astrophysics Data System (ADS)

Broadbent, William; Yokoyama, Ichiro; Yu, Paul; Seki, Kazunori; Nomura, Ryohei; Schmalfuss, Heiko; Heumann, Jan; Sier, Jean-Paul

2007-05-01

A new die-to-database high-resolution reticle defect inspection platform, TeraScanHR, has been developed for advanced production use with the 45nm logic node, and extendable for development use with the 32nm node (also the comparable memory nodes). These nodes will use predominantly ArF immersion lithography although EUV may also be used. According to recent surveys, the predominant reticle types for the 45nm node are 6% simple tri-tone and COG. Other advanced reticle types may also be used for these nodes including: dark field alternating, Mask Enhancer, complex tri-tone, high transmission, CPL, etc. Finally, aggressive model based OPC will typically be used which will include many small structures such as jogs, serifs, and SRAF (sub-resolution assist features) with accompanying very small gaps between adjacent structures. The current generation of inspection systems is inadequate to meet these requirements. The architecture and performance of the new TeraScanHR reticle inspection platform is described. This new platform is designed to inspect the aforementioned reticle types in die-to-database and die-to-die modes using both transmitted and reflected illumination. Recent results from field testing at two of the three beta sites are shown (Toppan Printing in Japan and the Advanced Mask Technology Center in Germany). The results include applicable programmed defect test reticles and advanced 45nm product reticles (also comparable memory reticles). The results show high sensitivity and low false detections being achieved. The platform can also be configured for the current 65nm, 90nm, and 130nm nodes.

Manufacturability of the X Architecture at the 90-nm technology node

NASA Astrophysics Data System (ADS)

Smayling, Michael C.; Sarma, Robin C.; Nagata, Toshiyuki; Arora, Narain; Duane, Michael P.; Oemardani, Shiany; Shah, Santosh

2004-05-01

In this paper, we discuss the results from a test chip that demonstrate the manufacturability and integration-worthiness of the X Architecture at the 90-nm technology node. We discuss how a collaborative effort between the design and chip making communities used the current generation of mask, lithography, wafer processing, inspection and metrology equipment to create 45 degree wires in typical metal pitches for the upper layers on a 90-nm device in a production environment. Cadence Design Systems created the test structure design and chip validation tools for the project. Canon"s KrF ES3 and ArF AS2 scanners were used for the lithography. Applied Materials used its interconnect fabrication technologies to produce the multilayer copper, low-k interconnect on 300-mm wafers. The results were confirmed for critical dimension and defect levels using Applied Materials" wafer inspection and metrology systems.

High-speed logic integrated circuits with solution-processed self-assembled carbon nanotubes

NASA Astrophysics Data System (ADS)

Han, Shu-Jen; Tang, Jianshi; Kumar, Bharat; Falk, Abram; Farmer, Damon; Tulevski, George; Jenkins, Keith; Afzali, Ali; Oida, Satoshi; Ott, John; Hannon, James; Haensch, Wilfried

2017-09-01

As conventional monolithic silicon technology struggles to meet the requirements for the 7-nm technology node, there has been tremendous progress in demonstrating the scalability of carbon nanotube field-effect transistors down to the size that satisfies the 3-nm node and beyond. However, to date, circuits built with carbon nanotubes have overlooked key aspects of a practical logic technology and have stalled at simple functionality demonstrations. Here, we report high-performance complementary carbon nanotube ring oscillators using fully manufacturable processes, with a stage switching frequency of 2.82 GHz. The circuit was built on solution-processed, self-assembled carbon nanotube arrays with over 99.9% semiconducting purity, and the complementary feature was achieved by employing two different work function electrodes.

High-speed logic integrated circuits with solution-processed self-assembled carbon nanotubes.

PubMed

Han, Shu-Jen; Tang, Jianshi; Kumar, Bharat; Falk, Abram; Farmer, Damon; Tulevski, George; Jenkins, Keith; Afzali, Ali; Oida, Satoshi; Ott, John; Hannon, James; Haensch, Wilfried

2017-09-01

As conventional monolithic silicon technology struggles to meet the requirements for the 7-nm technology node, there has been tremendous progress in demonstrating the scalability of carbon nanotube field-effect transistors down to the size that satisfies the 3-nm node and beyond. However, to date, circuits built with carbon nanotubes have overlooked key aspects of a practical logic technology and have stalled at simple functionality demonstrations. Here, we report high-performance complementary carbon nanotube ring oscillators using fully manufacturable processes, with a stage switching frequency of 2.82 GHz. The circuit was built on solution-processed, self-assembled carbon nanotube arrays with over 99.9% semiconducting purity, and the complementary feature was achieved by employing two different work function electrodes.

Way for LEEPL technology to succeed in memory device application

NASA Astrophysics Data System (ADS)

Kim, In-Sung; Woo, Sang-Gyun; Cho, Han-Ku; Han, Woo-Sung; Moon, Joo-Tae

2004-05-01

Lithography for 65nm-node device is drawing a lot of attentions these days especially because lithography solution for this node is not clear and even tool makers tend to wait for the consensus in lithography roadmap to avoid the risk of erroneous amount of investment. Recently proposed concept of low energy electron-beam proximity-projection lithography (LEEPL)1,2 technology has already released its first production machine in 2003, which is being expected to cover the design rule down to 65nm-node and even smaller3. Although production of semiconductor device has been pursuing optical lithography, without any optical technology that is proved as a convincing solution for 65nm node and below, we need to take account of all the candidates. So we made an investigation on LEEPL technology and evaluated beta and first production tool to see the feasibility of printing sub-70nm resolution and of optic-first mix-and-match overlay from a chip maker"s point of view. Two different kinds of stencil masks were fabricated for the evaluation, which are fabricated in SiC and Si membrane. The former mask is for sparse contact holes(C/H) and the latter for dense C/Hs. Beta-tool showed a good resolving power of sub-70nm sparse C/Hs of SRAM with negligibly small proximity effect. It implies that LEEPL does not require much effort for proximity correction comparing to that required in optical lithography, which is one of the biggest issues in low-k1. LEEPL also showed a good capability of optic-first mix-and-match overlay correction and this is the most stringent and important functionality for optic-first mix-and-match application. However random intra-membrane image placement(IP) error that is a little bit larger than the requirement for sub-70nm node was observed, which is interpreted to come from the larger stress of 100MPa in 3X3mm2 dry-etched SiC unit membrane. For dense C/Hs, we failed, to the contrary, to obtain any good quality of stencil masks for DRAM cell patterns because of e-beam proximity effect which is unavoidable in the reversed order of front-side forward direct writing and back-side later membrane formation. Pros and cons of LEEPL technology are discussed based on the evaluation results and estimation from the memory device standpoint. We also propose a novel concept of stencil mask that can be helpful in memory device application.

FDSOI 28nm performances study for RF energy scavenging

NASA Astrophysics Data System (ADS)

Rochefeuille, E.; Alicalapa, F.; Douyère, A.; Vuong, T. P.

2018-03-01

This paper presents a study on an integrated technology: Fully-Depleted-Silicon-On-Insulator (FDSOI) at a 28nm node. FDSOI results are compared to another technology: Complementary-Metal-Oxide-Semiconductor (CMOS) 350nm. The aim of this work was to demonstrate the advantages of using FDSOI technology in RF energy scavenging applications. Characteristics of transistors are pointed out and results showed an improved 22%-output voltage gain for a series rectifier and a 13%-output voltage gain for a Dickson charge pump in FDSOI technology compared to CMOS, for an input voltage and power of 0.5 V and 0 dBm respectively. Those results allowed to prove that FDSOI 28nm is a better technology choice for energy scavenging and low-power applications.

Advanced Technology for Ultra-Low Power System-on-Chip (SoC)

DTIC Science & Technology

2017-06-01

design at IDS=1mA/μm compared with that in experimental 14nm-node FinFET. The redistributed electric field along the channel length direction can... design can result in more uniform electron density and electron velocity distributions compared to a homojunction device. This uniform electron... design at IDS=1mA/μm compared with that in experimental 14nm-node FinFET. 14 Approved for public release, distribution is unlimited. 0 5 10 15 20

DUV mask writer for BEOL 90-nm technology layers

NASA Astrophysics Data System (ADS)

Hong, Dongsung; Krishnan, Prakash; Coburn, Dianna; Jeewakhan, Nazneen; Xie, Shengqi; Broussard, Joshua; Ferguson, Bradley; Green, Kent G.; Buck, Peter; Jackson, Curt A.; Martinez, Larry

2003-12-01

Mask CD resolution and uniformity requirements for back end of line (BEOL) layers for the 90nm Technology Node push the capability of I-line mask writers; yet, do not require the capability offered by more expensive 50KeV ebeam mask writers. This suite of mask layers seems to be a perfect match for the capabilities of the DUV mask writing tools, which offer a lower cost option to the 50KeV platforms. This paper will evaluate both the mask and wafer results from all three platforms of mask writers (50KeV VSB,ETEC Alta 4300TM DUV laser and ETEC Alta 3500TM I-line laser) for a Cypress 90nm node Metal 1 layer, and demonstrate the benefits of the DUV platform with no change to OPC for this layer.

Electron beam mask writer EBM-9500 for logic 7nm node generation

NASA Astrophysics Data System (ADS)

Matsui, Hideki; Kamikubo, Takashi; Nakahashi, Satoshi; Nomura, Haruyuki; Nakayamada, Noriaki; Suganuma, Mizuna; Kato, Yasuo; Yashima, Jun; Katsap, Victor; Saito, Kenichi; Kobayashi, Ryoei; Miyamoto, Nobuo; Ogasawara, Munehiro

2016-10-01

Semiconductor scaling is slowing down because of difficulties of device manufacturing below logic 7nm node generation. Various lithography candidates which include ArF immersion with resolution enhancement technology (like Inversed Lithography technology), Extreme Ultra Violet lithography and Nano Imprint lithography are being developed to address the situation. In such advanced lithography, shot counts of mask patterns are estimated to increase explosively in critical layers, and then it is hoped that multi beam mask writer (MBMW) is released to handle them within realistic write time. However, ArF immersion technology with multiple patterning will continue to be a mainstream lithography solution for most of the layers. Then, the shot counts in less critical layers are estimated to be stable because of the limitation of resolution in ArF immersion technology. Therefore, single beam mask writer (SBMW) can play an important role for mask production still, relative to MBMW. Also the demand of SBMW seems actually strong for the logic 7nm node. To realize this, we have developed a new SBMW, EBM-9500 for mask fabrication in this generation. A newly introduced electron beam source enables higher current density of 1200A/cm2. Heating effect correction function has also been newly introduced to satisfy the requirements for both pattern accuracy and throughput. In this paper, we will report the configuration and performance of EBM-9500.

Driving down defect density in composite EUV patterning film stacks

NASA Astrophysics Data System (ADS)

Meli, Luciana; Petrillo, Karen; De Silva, Anuja; Arnold, John; Felix, Nelson; Johnson, Richard; Murray, Cody; Hubbard, Alex; Durrant, Danielle; Hontake, Koichi; Huli, Lior; Lemley, Corey; Hetzer, Dave; Kawakami, Shinichiro; Matsunaga, Koichi

2017-03-01

Extreme ultraviolet lithography (EUVL) technology is one of the leading candidates for enabling the next generation devices, for 7nm node and beyond. As the technology matures, further improvement is required in the area of blanket film defectivity, pattern defectivity, CD uniformity, and LWR/LER. As EUV pitch scaling approaches sub 20 nm, new techniques and methods must be developed to reduce the overall defectivity, mitigate pattern collapse and eliminate film related defect. IBM Corporation and Tokyo Electron Limited (TELTM) are continuously collaborating to develop manufacturing quality processes for EUVL. In this paper, we review key defectivity learning required to enable 7nm node and beyond technology. We will describe ongoing progress in addressing these challenges through track-based processes (coating, developer, baking), highlighting the limitations of common defect detection strategies and outlining methodologies necessary for accurate characterization and mitigation of blanket defectivity in EUV patterning stacks. We will further discuss defects related to pattern collapse and thinning of underlayer films.

Contact patterning strategies for 32nm and 28nm technology

NASA Astrophysics Data System (ADS)

Morgenfeld, Bradley; Stobert, Ian; An, Ju j.; Kanai, Hideki; Chen, Norman; Aminpur, Massud; Brodsky, Colin; Thomas, Alan

2011-04-01

As 193 nm immersion lithography is extended indefinitely to sustain technology roadmaps, there is increasing pressure to contain escalating lithography costs by identifying patterning solutions that can minimize the use of multiple-pass processes. Contact patterning for the 32/28 nm technology nodes has been greatly facilitated by just-in-time introduction of new process enablers that allow the simultaneous support of flexible foundry-oriented ground rules alongside highperformance technology, while also migrating to a single-pass patterning process. The incorporation of device based performance metrics along with rigorous patterning and structural variability studies were critical in the evaluation of material innovation for improved resolution and CD shrink along with novel data preparation flows utilizing aggressive strategies for SRAF insertion and retargeting.

N7 logic via patterning using templated DSA: implementation aspects

NASA Astrophysics Data System (ADS)

Bekaert, J.; Doise, J.; Gronheid, R.; Ryckaert, J.; Vandenberghe, G.; Fenger, G.; Her, Y. J.; Cao, Y.

2015-07-01

In recent years, major advancements have been made in the directed self-assembly (DSA) of block copolymers (BCP). Insertion of DSA for IC fabrication is seriously considered for the 7 nm node. At this node the DSA technology could alleviate costs for multiple patterning and limit the number of masks that would be required per layer. At imec, multiple approaches for inserting DSA into the 7 nm node are considered. One of the most straightforward approaches for implementation would be for via patterning through templated DSA; a grapho-epitaxy flow using cylindrical phase BCP material resulting in contact hole multiplication within a litho-defined pre-pattern. To be implemented for 7 nm node via patterning, not only the appropriate process flow needs to be available, but also DSA-aware mask decomposition is required. In this paper, several aspects of the imec approach for implementing templated DSA will be discussed, including experimental demonstration of density effect mitigation, DSA hole pattern transfer and double DSA patterning, creation of a compact DSA model. Using an actual 7 nm node logic layout, we derive DSA-friendly design rules in a logical way from a lithographer's view point. A concrete assessment is provided on how DSA-friendly design could potentially reduce the number of Via masks for a place-and-routed N7 logic pattern.

Patterning with metal-oxide EUV photoresist: patterning capability, resist smoothing, trimming, and selective stripping

NASA Astrophysics Data System (ADS)

Mao, Ming; Lazzarino, Frederic; De Schepper, Peter; De Simone, Danilo; Piumi, Daniele; Luong, Vinh; Yamashita, Fumiko; Kocsis, Michael; Kumar, Kaushik

2017-03-01

Inpria metal-oxide photoresist (PR) serves as a thin spin-on patternable hard mask for EUV lithography. Compared to traditional organic photoresists, the ultrathin metal-oxide photoresist ( 12nm after development) effectively mitigates pattern collapse. Because of the high etch resistance of the metal-oxide resist, this may open up significant scope for more aggressive etches, new chemistries, and novel integration schemes. We have previously shown that metal-oxide PR can be successfully used to pattern the block layer for the imec 7-nm technology node[1] and advantageously replace a multiple patterning approach, which significantly reduces the process complexity and effectively decreases the cost. We also demonstrated the formation of 16nm half pitch 1:1 line/space with EUV single print[2], which corresponds to a metal 2 layer for the imec 7-nm technology node. In this paper, we investigate the feasibility of using Inpria's metal-oxide PR for 16nm line/space patterning. In meanwhile, we also explore the different etch process for LWR smoothing, resist trimming and resist stripping.

Process variation challenges and resolution in the negative-tone develop double patterning for 20nm and below technology node

NASA Astrophysics Data System (ADS)

Mehta, Sohan S.; Ganta, Lakshmi K.; Chauhan, Vikrant; Wu, Yixu; Singh, Sunil; Ann, Chia; Subramany, Lokesh; Higgins, Craig; Erenturk, Burcin; Srivastava, Ravi; Singh, Paramjit; Koh, Hui Peng; Cho, David

2015-03-01

Immersion based 20nm technology node and below becoming very challenging to chip designers, process and integration due to multiple patterning to integrate one design layer . Negative tone development (NTD) processes have been well accepted by industry experts for enabling technologies 20 nm and below. 193i double patterning is the technology solution for pitch down to 80 nm. This imposes tight control in critical dimension(CD) variation in double patterning where design patterns are decomposed in two different masks such as in litho-etch-litho etch (LELE). CD bimodality has been widely studied in LELE double patterning. A portion of CD tolerance budget is significantly consumed by variations in CD in double patterning. The objective of this work is to study the process variation challenges and resolution in the Negative Tone Develop Process for 20 nm and Below Technology Node. This paper describes the effect of dose slope on CD variation in negative tone develop LELE process. This effect becomes even more challenging with standalone NTD developer process due to q-time driven CD variation. We studied impact of different stacks with combination of binary and attenuated phase shift mask and estimated dose slope contribution individually from stack and mask type. Mask 3D simulation was carried out to understand theoretical aspect. In order to meet the minimum insulator requirement for the worst case on wafer the overlay and critical dimension uniformity (CDU) budget margins have slimmed. Besides the litho process and tool control using enhanced metrology feedback, the variation control has other dependencies too. Color balancing between the two masks in LELE is helpful in countering effects such as iso-dense bias, and pattern shifting. Dummy insertion and the improved decomposition techniques [2] using multiple lower priority constraints can help to a great extent. Innovative color aware routing techniques [3] can also help with achieving more uniform density and color balanced layouts.

Dual Interlocked Logic for Single-Event Transient Mitigation

DTIC Science & Technology

2017-03-01

SPICE simulation and fault-injection analysis. Exemplar SPICE simulations have been performed in a 32nm partially- depleted silicon-on-insulator...in this work. The model has been validated at the 32nm SOI technology node with extensive heavy-ion data [7]. For the SPICE simulations, three

Design and pitch scaling for affordable node transition and EUV insertion scenario

NASA Astrophysics Data System (ADS)

Kim, Ryoung-han; Ryckaert, Julien; Raghavan, Praveen; Sherazi, Yasser; Debacker, Peter; Trivkovic, Darko; Gillijns, Werner; Tan, Ling Ee; Drissi, Youssef; Blanco, Victor; Bekaert, Joost; Mao, Ming; Larivière, Stephane; McIntyre, Greg

2017-04-01

imec's DTCO and EUV achievement toward imec 7nm (iN7) technology node which is industry 5nm node equivalent is reported with a focus on cost and scaling. Patterning-aware design methodology supports both iArF multiple patterning and EUV under one compliant design rule. FinFET device with contacted poly pitch of 42nm and metal pitch of 32nm with 7.5-track, 6.5-track, and 6-track standard cell library are explored. Scaling boosters are used to provide additional scaling and die cost benefit while lessening pitch shrink burden, and it makes EUV insertion more affordable. EUV pattern fidelity is optimized through OPC, SMO, M3D, mask sizing and SRAF. Processed wafers were characterized and edge-placement-error (EPE) variability is validated for EUV insertion. Scale-ability and cost of ownership of EUV patterning in aligned with iN7 standard cell design, integration and patterning specification are discussed.

State-of-the-art EUV materials and processes for the 7nm node and beyond

NASA Astrophysics Data System (ADS)

Buitrago, Elizabeth; Meeuwissen, Marieke; Yildirim, Oktay; Custers, Rolf; Hoefnagels, Rik; Rispens, Gijsbert; Vockenhuber, Michaela; Mochi, Iacopo; Fallica, Roberto; Tasdemir, Zuhal; Ekinci, Yasin

2017-03-01

Extreme ultraviolet lithography (EUVL, λ = 13.5 nm) being the most likely candidate to manufacture electronic devices for future technology nodes is to be introduced in high volume manufacturing (HVM) at the 7 nm logic node, at least at critical lithography levels. With this impending introduction, it is clear that excellent resist performance at ultra-high printing resolutions (below 20 nm line/space L/S) is ever more pressing. Nonetheless, EUVL has faced many technical challenges towards this paradigm shift to a new lithography wavelength platform. Since the inception of chemically amplified resists (CARs) they have been the base upon which state-of-the art photoresist technology has been developed from. Resist performance as measured in terms of printing resolution (R), line edge roughness (LER), sensitivity (D or exposure dose) and exposure latitude (EL) needs to be improved but there are well known trade-off relationships (LRS trade-off) among these parameters for CARs that hamper their simultaneous enhancement. Here, we present some of the most promising EUVL materials tested by EUV interference lithography (EUV-IL) with the aim of resolving features down to 11 nm half-pitch (HP), while focusing on resist performance at 16 and 13 nm HP as needed for the 7 and 5 nm node, respectively. EUV-IL has enabled the characterization and development of new resist materials before commercial EUV exposure tools become available and is therefore a powerful research and development tool. With EUV-IL, highresolution periodic images can be printed by the interference of two or more spatially coherent beams through a transmission-diffraction grating mask. For this reason, our experiments have been performed by EUV-IL at Swiss Light Source (SLS) synchrotron facility located at the Paul Scherrer Institute (PSI). Having the opportunity to test hundreds of EUVL materials from vendors and research partners from all over the world, PSI is able to give a global update on some of the most promising materials tested.

Radiation Status of Sub-65 nm Electronics

NASA Technical Reports Server (NTRS)

Pellish, Jonathan A.

2011-01-01

Ultra-scaled complementary metal oxide semiconductor (CMOS) includes commercial foundry capabilities at and below the 65 nm technology node Radiation evaluations take place using standard products and test characterization vehicles (memories, logic/latch chains, etc.) NEPP focus is two-fold: (1) Conduct early radiation evaluations to ascertain viability for future NASA missions (i.e. leverage commercial technology development). (2) Uncover gaps in current testing methodologies and mechanism comprehension -- early risk mitigation.

Application of resist-profile-aware source optimization in 28 nm full chip optical proximity correction

NASA Astrophysics Data System (ADS)

Zhu, Jun; Zhang, David Wei; Kuo, Chinte; Wang, Qing; Wei, Fang; Zhang, Chenming; Chen, Han; He, Daquan; Hsu, Stephen D.

2017-07-01

As technology node shrinks, aggressive design rules for contact and other back end of line (BEOL) layers continue to drive the need for more effective full chip patterning optimization. Resist top loss is one of the major challenges for 28 nm and below technology nodes, which can lead to post-etch hotspots that are difficult to predict and eventually degrade the process window significantly. To tackle this problem, we used an advanced programmable illuminator (FlexRay) and Tachyon SMO (Source Mask Optimization) platform to make resistaware source optimization possible, and it is proved to greatly improve the imaging contrast, enhance focus and exposure latitude, and minimize resist top loss thus improving the yield.

Photomask etch system and process for 10nm technology node and beyond

NASA Astrophysics Data System (ADS)

Chandrachood, Madhavi; Grimbergen, Michael; Yu, Keven; Leung, Toi; Tran, Jeffrey; Chen, Jeff; Bivens, Darin; Yalamanchili, Rao; Wistrom, Richard; Faure, Tom; Bartlau, Peter; Crawford, Shaun; Sakamoto, Yoshifumi

2015-10-01

While the industry is making progress to offer EUV lithography schemes to attain ultimate critical dimensions down to 20 nm half pitch, an interim optical lithography solution to address an immediate need for resolution is offered by various integration schemes using advanced PSM (Phase Shift Mask) materials including thin e-beam resist and hard mask. Using the 193nm wavelength to produce 10nm or 7nm patterns requires a range of optimization techniques, including immersion and multiple patterning, which place a heavy demand on photomask technologies. Mask schemes with hard mask certainly help attain better selectivity and hence better resolution but pose integration challenges and defectivity issues. This paper presents a new photomask etch solution for attenuated phase shift masks that offers high selectivity (Cr:Resist > 1.5:1), tighter control on the CD uniformity with a 3sigma value approaching 1 nm and controllable CD bias (5-20 nm) with excellent CD linearity performance (<5 nm) down to the finer resolution. The new system has successfully demonstrated capability to meet the 10 nm node photomask CD requirements without the use of more complicated hard mask phase shift blanks. Significant improvement in post wet clean recovery performance was demonstrated by the use of advanced chamber materials. Examples of CD uniformity, linearity, and minimum feature size, and etch bias performance on 10 nm test site and production mask designs will be shown.

Immersion and dry scanner extensions for sub-10nm production nodes

NASA Astrophysics Data System (ADS)

Weichselbaum, Stefan; Bornebroek, Frank; de Kort, Toine; Droste, Richard; de Graaf, Roelof F.; van Ballegoij, Rob; Botter, Herman; McLaren, Matthew G.; de Boeij, Wim P.

2015-03-01

Progressing towards the 10nm and 7nm imaging node, pattern-placement and layer-to-layer overlay requirements keep on scaling down and drives system improvements in immersion (ArFi) and dry (ArF/KrF) scanners. A series of module enhancements in the NXT platform have been introduced; among others, the scanner is equipped with exposure stages with better dynamics and thermal control. Grid accuracy improvements with respect to calibration, setup, stability, and layout dependency tighten MMO performance and enable mix and match scanner operation. The same platform improvements also benefit focus control. Improvements in detectability and reproducibility of low contrast alignment marks enhance the alignment solution window for 10nm logic processes and beyond. The system's architecture allows dynamic use of high-order scanner optimization based on advanced actuators of projection lens and scanning stages. This enables a holistic optimization approach for the scanner, the mask, and the patterning process. Productivity scanner design modifications esp. stage speeds and optimization in metrology schemes provide lower layer costs for customers using immersion lithography as well as conventional dry technology. Imaging, overlay, focus, and productivity data is presented, that demonstrates 10nm and 7nm node litho-capability for both (immersion & dry) platforms.

Ultimate patterning limits for EUV at 5nm node and beyond

NASA Astrophysics Data System (ADS)

Ali, Rehab Kotb; Hamed Fatehy, Ahmed; Lafferty, Neal; Word, James

2018-03-01

The 5nm technology node introduces more aggressive geometries than previous nodes. In this paper, we are introducing a comprehensive study to examine the pattering limits of EUV at 0.33NA. The study is divided into two main approaches: (A) Exploring pattering limits of Single Exposure EUV Cut/Block mask in Self-Aligned-Multi-Patterning (SAMP) process, and (B) Exploring the pattering limits of a Single Exposure EUV printing of metal Layers. The printability of the resulted OPC masks is checked through a model based manufacturing flow for the two pattering approaches. The final manufactured patterns are quantified by Edge Placement Error (EPE), Process Variation Band (PVBand), soft/hard bridging and pinching, Image Log Slope (ILS) and Common Depth of Focus (CDOF)

A novel approach of ensuring layout regularity correct by construction in advanced technologies

NASA Astrophysics Data System (ADS)

Ahmed, Shafquat Jahan; Vaderiya, Yagnesh; Gupta, Radhika; Parthasarathy, Chittoor; Marin, Jean-Claude; Robert, Frederic

2017-03-01

In advanced technology nodes, layout regularity has become a mandatory prerequisite to create robust designs less sensitive to variations in manufacturing process in order to improve yield and minimizing electrical variability. In this paper we describe a method for designing regular full custom layouts based on design and process co-optimization. The method includes various design rule checks that can be used on-the-fly during leaf-cell layout development. We extract a Layout Regularity Index (LRI) from the layouts based on the jogs, alignments and pitches used in the design for any given metal layer. Regularity Index of a layout is the direct indicator of manufacturing yield and is used to compare the relative health of different layout blocks in terms of process friendliness. The method has been deployed for 28nm and 40nm technology nodes for Memory IP and is being extended to other IPs (IO, standard-cell). We have quantified the gain of layout regularity with the deployed method on printability and electrical characteristics by process-variation (PV) band simulation analysis and have achieved up-to 5nm reduction in PV band.

Nanosatellite optical downlink experiment: design, simulation, and prototyping

NASA Astrophysics Data System (ADS)

Clements, Emily; Aniceto, Raichelle; Barnes, Derek; Caplan, David; Clark, James; Portillo, Iñigo del; Haughwout, Christian; Khatsenko, Maxim; Kingsbury, Ryan; Lee, Myron; Morgan, Rachel; Twichell, Jonathan; Riesing, Kathleen; Yoon, Hyosang; Ziegler, Caleb; Cahoy, Kerri

2016-11-01

The nanosatellite optical downlink experiment (NODE) implements a free-space optical communications (lasercom) capability on a CubeSat platform that can support low earth orbit (LEO) to ground downlink rates>10 Mbps. A primary goal of NODE is to leverage commercially available technologies to provide a scalable and cost-effective alternative to radio-frequency-based communications. The NODE transmitter uses a 200-mW 1550-nm master-oscillator power-amplifier design using power-efficient M-ary pulse position modulation. To facilitate pointing the 0.12-deg downlink beam, NODE augments spacecraft body pointing with a microelectromechanical fast steering mirror (FSM) and uses an 850-nm uplink beacon to an onboard CCD camera. The 30-cm aperture ground telescope uses an infrared camera and FSM for tracking to an avalanche photodiode detector-based receiver. Here, we describe our approach to transition prototype transmitter and receiver designs to a full end-to-end CubeSat-scale system. This includes link budget refinement, drive electronics miniaturization, packaging reduction, improvements to pointing and attitude estimation, implementation of modulation, coding, and interleaving, and ground station receiver design. We capture trades and technology development needs and outline plans for integrated system ground testing.

Manufacturability study of masks created by inverse lithography technology (ILT)

NASA Astrophysics Data System (ADS)

Martin, Patrick M.; Progler, C. J.; Xiao, G.; Gray, R.; Pang, L.; Liu, Y.

2005-11-01

As photolithography is pushed to fabricate deep-sub wavelength devices for 90nm, 65nm and smaller technology nodes using available exposure tools (i.e., 248nm, 193nm steppers), photomask capability is becoming extremely critical. For example, PSM masks require more complicated processing; aggressive OPC makes the writing time longer and sometimes unpredictable; and, high MEEF imposes much more stringent demands on mask quality. Therefore, in order for any new lithography technology to be adopted into production, mask manufacturability must be studied thoroughly and carefully. In this paper we will present the mask manufacturability study on mask patterns created using Inverse Lithography Technology (ILT). Unlike conventional OPC methodologies, ILT uses a unique outcome-based technology to mathematically determine the mask features that produce the desired on-wafer results. ILT solves the most critical litho challenges of the deep sub-wavelength era. Potential benefits include: higher yield; expanded litho process windows; superb pattern fidelity at 90, 65 & 45-nm nodes; and reduced time-to-silicon - all without changing the existing lithography infrastructure and design-to-silicon flow. In this study a number of cell structures were selected and used as test patterns. "Luminized patterns" were generated for binary mask and attenuated phase-shift mask. Both conventional OPC patterns and "luminized patterns" were put on a test reticle side by side, and they all have a number of variations in term of correction aggressivity level and mask complexity. Mask manufacturability, including data fracturing, writing time, mask inspection, and metrology were studied. The results demonstrate that, by optimizing the inspection recipe, masks created using ILT technology can be made and qualified using current processes with a reasonable turn-around time.

Verification of E-Beam direct write integration into 28nm BEOL SRAM technology

NASA Astrophysics Data System (ADS)

Hohle, Christoph; Choi, Kang-Hoon; Gutsch, Manuela; Hanisch, Norbert; Seidel, Robert; Steidel, Katja; Thrun, Xaver; Werner, Thomas

2015-03-01

Electron beam direct write lithography (EBDW) potentially offers advantages for low-volume semiconductor manufacturing, rapid prototyping or design verification due to its high flexibility without the need of costly masks. However, the integration of this advanced patterning technology into complex CMOS manufacturing processes remains challenging. The low throughput of today's single e-Beam tools limits high volume manufacturing applications and maturity of parallel (multi) beam systems is still insufficient [1,2]. Additional concerns like transistor or material damage of underlying layers during exposure at high electron density or acceleration voltage have to be addressed for advanced technology nodes. In the past we successfully proved that potential degradation effects of high-k materials or ULK shrink can be neglected and were excluded by demonstrating integrated electrical results of 28nm node transistor and BEOL performance following 50kV electron beam dry exposure [3]. Here we will give an update on the integration of EBDW in the 300mm CMOS manufacturing processes of advanced integrated circuits at the 28nm SRAM node of GLOBALFOUNDRIES Dresden. The work is an update to what has been previously published [4]. E-beam patterning results of BEOL full chip metal and via layers with a dual damascene integration scheme using a 50kV VISTEC SB3050DW variable shaped electron beam direct writer at Fraunhofer IPMSCNT are demonstrated. For the patterning of the Metal layer a Mix & Match concept based on the sequence litho - etch -litho -etch (LELE) was developed and evaluated wherein several exposure fields were blanked out during the optical exposure. Etch results are shown and compared to the POR. Results are also shown on overlay performance and optimized e-Beam exposure time using most advanced data prep solutions and resist processes. The patterning results have been verified using fully integrated electrical measurement of metal lines and vias on wafer level. In summary we demonstrate the integration capability of EBDW into a productive CMOS process flow at the example of the 28nm SRAM technology node.

Panel discussion summary: do we need a revolution in design and process integration to enable sub-100-nm technology nodes?

NASA Astrophysics Data System (ADS)

Grobman, Warren D.

2002-07-01

Dramatically increasing mask set costs, long-loop design-fabrication iterations, and lithography of unprecedented complexity and cost threaten to disrupt time-accepted IC industry progression as described by Moore"s Law. Practical and cost-effective IC manufacturing below the 100nm technology node presents significant and unique new challenges spanning multiple disciplines and overlapping traditionally separable components of the design-through-chip manufacturing flow. Lithographic and other process complexity is compounded by design, mask, and infrastructure technologies, which do not sufficiently account for increasingly stringent and complex manufacturing issues. Deep subwavelength and atomic-scale process and device physics effects increasingly invade and impact the design flow strongly at a time when the pressures for increased design productivity are escalating at a superlinear rate. Productivity gaps, both upstream in design and downstream in fabrication, are anticipated by many to increase due to dramatic increases in inherent complexity of the design-to-chip equation. Furthermore, the cost of lithographic equipment is increasing at an aggressive compound growth rate so large that we can no longer economically derive the benefit of the increased number of circuits per unit area unless we extend the life of lithographic equipment for more generations, and deeper into the subwavelength regime. Do these trends unambiguously lead to the conclusion that we need a revolution in design and design-process integration to enable the sub-100nm nodes? Or is such a premise similar to other well-known predictions of technology brick walls that never came true?

A general design strategy for block copolymer directed self-assembly patterning of integrated circuits contact holes using an alphabet approach.

PubMed

Yi, He; Bao, Xin-Yu; Tiberio, Richard; Wong, H-S Philip

2015-02-11

Directed self-assembly (DSA) is a promising lithography candidate for technology nodes beyond 14 nm. Researchers have shown contact hole patterning for random logic circuits using DSA with small physical templates. This paper introduces an alphabet approach that uses a minimal set of small physical templates to pattern all contacts configurations on integrated circuits. We illustrate, through experiments, a general and scalable template design strategy that links the DSA material properties to the technology node requirements.

Simulation study of reticle enhancement technology applications for 157-nm lithography

NASA Astrophysics Data System (ADS)

Schurz, Dan L.; Flack, Warren W.; Karklin, Linard

2002-03-01

The acceleration of the International Technology Roadmap for Semiconductors (ITRS) is placing significant pressure on the industry's infrastructure, particularly the lithography equipment. As recently as 1997, there was no optical solution offered past the 130 nm design node. The current roadmap has the 65 nm node (reduced from 70 nm) pulled in one year to 2007. Both 248 nm and 193 nm wavelength lithography tools will be pushed to their practical resolution limits in the near term. Very high numerical aperture (NA) 193 nm exposure tools in conjunction with resolution enhancement techniques (RET) will postpone the requirement for 157 nm lithography in manufacturing. However, ICs produced at 70 nm design rules with manufacturable k 1 values will require that 157 nm wavelength lithography tools incorporate the same RETs utilized in 248nm, and 193 nm tools. These enhancements will include Alternating Phase Shifting Masks (AltPSM) and Optical Proximity Correction (OPC) on F 2 doped quartz reticle substrates. This study investigates simulation results when AltPSM is applied to sub-100 nm test patterns in 157 nm lithography in order to maintain Critical Dimension (CD) control for both nested and isolated geometries. Aerial image simulations are performed for a range of numerical apertures, chrome regulators, gate pitches and gate widths. The relative performance for phase shifted versus binary structures is also compared. Results are demonstrated in terms of aerial image contrast and process window changes. The results clearly show that a combination of high NA and RET is necessary to achieve usable process windows for 70 nm line/space structures. In addition, it is important to consider two-dimensional proximity effects for sub-100 nm gate structures.

Exploring EUV and SAQP pattering schemes at 5nm technology node

NASA Astrophysics Data System (ADS)

Hamed Fatehy, Ahmed; Kotb, Rehab; Lafferty, Neal; Jiang, Fan; Word, James

2018-03-01

For years, Moore's law keeps driving the semiconductors industry towards smaller dimensions and higher density chips with more devices. Earlier, the correlation between exposure source's wave length and the smallest resolvable dimension, mandated the usage of Deep Ultra-Violent (DUV) optical lithography system which has been used for decades to sustain Moore's law, especially when immersion lithography was introduced with 193nm ArF laser sources. As dimensions of devices get smaller beyond Deep Ultra-Violent (DUV) optical resolution limits, the need for Extremely Ultra-Violent (EUV) optical lithography systems was a must. However, EUV systems were still under development at that time for the mass-production in semiconductors industry. Theretofore, Multi-Patterning (MP) technologies was introduced to swirl about DUV optical lithography limitations in advanced nodes beyond minimum dimension (CD) of 20nm. MP can be classified into two main categories; the first one is to split the target itself across multiple masks that give the original target patterns when they are printed. This category includes Double, Triple and Quadruple patterning (DP, TP, and QP). The second category is the Self-Aligned Patterning (SAP) where the target is divided into Mandrel patterns and non-Mandrel patterns. The Mandrel patterns get printed first, then a self-aligned sidewalls are grown around these printed patterns drawing the other non-Mandrel targets, afterword, a cut mask(s) is used to define target's line-ends. This approach contains Self-Aligned-Double Pattering (SADP) and Self-Aligned- Quadruple-Pattering (SAQP). DUV and MP along together paved the way for the industry down to 7nm. However, with the start of development at the 5nm node and the readiness of EUV, the differentiation question is aroused again, which pattering approach should be selected, direct printing using EUV or DUV with MP, or a hybrid flow that contains both DUV-MP and EUV. In this work we are comparing two potential pattering techniques for Back End Of Line (BEOL) metal layers in the 5nm technology node, the first technique is Single Exposure EUV (SE-EUV) with a Direct Patterning EUV lithography process, and the second one is Self-Aligned Quadruple Patterning (SAQP) with a hybrid lithography processes, where the drawn metal target layer is decomposed into a Mandrel mask and Blocks/Cut mask, Mandrel mask is printed using DUV 193i lithography process, while Block/Cut Mask is printed using SE-EUV lithography process. The pros and cons of each technique are quantified based on Edge-Placement-Error (EPE) and Process Variation Band (PVBand) measured at 1D and 2D edges. The layout used in this comparison is a candidate layout for Foundries 5nm process node.

An improved method for characterizing photoresist lithographic and defectivity performance for sub-20nm node lithography

NASA Astrophysics Data System (ADS)

Amblard, Gilles; Purdy, Sara; Cooper, Ryan; Hockaday, Marjory

2016-03-01

The overall quality and processing capability of lithographic materials are critical for ensuring high device yield and performance at sub-20nm technology nodes in a high volume manufacturing environment. Insufficient process margin and high line width roughness (LWR) cause poor manufacturing control, while high defectivity causes product failures. In this paper, we focus on the most critical layer of a sub-20nm technology node LSI device, and present an improved method for characterizing both lithographic and post-patterning defectivity performance of state-of-the-art immersion photoresists. Multiple formulations from different suppliers were used and compared. Photoresists were tested under various process conditions, and multiple lithographic metrics were investigated (depth of focus, exposure dose latitude, line width roughness, etc.). Results were analyzed and combined using an innovative approach based on advanced software, providing clearer results than previously available. This increased detail enables more accurate performance comparisons among the different photoresists. Post-patterning defectivity was also quantified, with defects reviewed and classified using state-of-the-art inspection tools. Correlations were established between the lithographic and post-patterning defectivity performances for each material, and overall ranking was established among the photoresists, enabling the selection of the best performer for implementation in a high volume manufacturing environment.

A comparison of advanced overlay technologies

NASA Astrophysics Data System (ADS)

Dasari, Prasad; Smith, Nigel; Goelzer, Gary; Liu, Zhuan; Li, Jie; Tan, Asher; Koh, Chin Hwee

2010-03-01

The extension of optical lithography to 22nm and beyond by Double Patterning Technology is often challenged by CDU and overlay control. With reduced overlay measurement error budgets in the sub-nm range, relying on traditional Total Measurement Uncertainty (TMU) estimates alone is no longer sufficient. In this paper we will report scatterometry overlay measurements data from a set of twelve test wafers, using four different target designs. The TMU of these measurements is under 0.4nm, within the process control requirements for the 22nm node. Comparing the measurement differences between DBO targets (using empirical and model based analysis) and with image-based overlay data indicates the presence of systematic and random measurement errors that exceeds the TMU estimate.

Sensitivity study and parameter optimization of OCD tool for 14nm finFET process

NASA Astrophysics Data System (ADS)

Zhang, Zhensheng; Chen, Huiping; Cheng, Shiqiu; Zhan, Yunkun; Huang, Kun; Shi, Yaoming; Xu, Yiping

2016-03-01

Optical critical dimension (OCD) measurement has been widely demonstrated as an essential metrology method for monitoring advanced IC process in the technology node of 90 nm and beyond. However, the rapidly shrunk critical dimensions of the semiconductor devices and the increasing complexity of the manufacturing process bring more challenges to OCD. The measurement precision of OCD technology highly relies on the optical hardware configuration, spectral types, and inherently interactions between the incidence of light and various materials with various topological structures, therefore sensitivity analysis and parameter optimization are very critical in the OCD applications. This paper presents a method for seeking the optimum sensitive measurement configuration to enhance the metrology precision and reduce the noise impact to the greatest extent. In this work, the sensitivity of different types of spectra with a series of hardware configurations of incidence angles and azimuth angles were investigated. The optimum hardware measurement configuration and spectrum parameter can be identified. The FinFET structures in the technology node of 14 nm were constructed to validate the algorithm. This method provides guidance to estimate the measurement precision before measuring actual device features and will be beneficial for OCD hardware configuration.

Design strategy for integrating DSA via patterning in sub-7 nm interconnects

NASA Astrophysics Data System (ADS)

Karageorgos, Ioannis; Ryckaert, Julien; Tung, Maryann C.; Wong, H.-S. P.; Gronheid, Roel; Bekaert, Joost; Karageorgos, Evangelos; Croes, Kris; Vandenberghe, Geert; Stucchi, Michele; Dehaene, Wim

2016-03-01

In recent years, major advancements have been made in the directed self-assembly (DSA) of block copolymers (BCPs). As a result, the insertion of DSA for IC fabrication is being actively considered for the sub-7nm nodes. At these nodes the DSA technology could alleviate costs for multiple patterning and limit the number of litho masks that would be required per metal layer. One of the most straightforward approaches for DSA implementation would be for via patterning through templated DSA, where hole patterns are readily accessible through templated confinement of cylindrical phase BCP materials. Our in-house studies show that decomposition of via layers in realistic circuits below the 7nm node would require at least many multi-patterning steps (or colors), using 193nm immersion lithography. Even the use of EUV might require double patterning in these dimensions, since the minimum via distance would be smaller than EUV resolution. The grouping of vias through templated DSA can resolve local conflicts in high density areas. This way, the number of required colors can be significantly reduced. For the implementation of this approach, a DSA-aware mask decomposition is required. In this paper, our design approach for DSA via patterning in sub-7nm nodes is discussed. We propose options to expand the list of DSA-compatible via patterns (DSA letters) and we define matching cost formulas for the optimal DSA-aware layout decomposition. The flowchart of our proposed approach tool is presented.

In-die mask registration measurement on 28nm-node and beyond

NASA Astrophysics Data System (ADS)

Chen, Shen Hung; Cheng, Yung Feng; Chen, Ming Jui

2013-09-01

As semiconductor go to smaller node, the critical dimension (CD) of process become more and more small. For lithography, RET (Resolution Enhancement Technology) applications can be used for wafer printing of smaller CD/pitch on 28nm node and beyond. SMO (Source Mask Optimization), DPT (Double Patterning Technology) and SADP (Self-Align Double Patterning) can provide lower k1 value for lithography. In another way, image placement error and overlay control also become more and more important for smaller chip size (advanced node). Mask registration (image placement error) and mask overlay are important factors to affect wafer overlay control/performance especially for DPT or SADP. In traditional method, the designed registration marks (cross type, square type) with larger CD were put into scribe-line of mask frame for registration and overlay measurement. However, these patterns are far way from real patterns. It does not show the registration of real pattern directly and is not a convincing method. In this study, the in-die (in-chip) registration measurement is introduced. We extract the dummy patterns that are close to main pattern from post-OPC (Optical Proximity Correction) gds by our desired rule and choose the patterns that distribute over whole mask uniformly. The convergence test shows 100 points measurement has a reliable result.

Looking into the crystal ball: future device learning using hybrid e-beam and optical lithography (Keynote Paper)

NASA Astrophysics Data System (ADS)

Steen, S. E.; McNab, S. J.; Sekaric, L.; Babich, I.; Patel, J.; Bucchignano, J.; Rooks, M.; Fried, D. M.; Topol, A. W.; Brancaccio, J. R.; Yu, R.; Hergenrother, J. M.; Doyle, J. P.; Nunes, R.; Viswanathan, R. G.; Purushothaman, S.; Rothwell, M. B.

2005-05-01

Semiconductor process development teams are faced with increasing process and integration complexity while the time between lithographic capability and volume production has remained more or less constant over the last decade. Lithography tools have often gated the volume checkpoint of a new device node on the ITRS roadmap. The processes have to be redeveloped after the tooling capability for the new groundrule is obtained since straight scaling is no longer sufficient. In certain cases the time window that the process development teams have is actually decreasing. In the extreme, some forecasts are showing that by the time the 45nm technology node is scheduled for volume production, the tooling vendors will just begin shipping the tools required for this technology node. To address this time pressure, IBM has implemented a hybrid-lithography strategy that marries the advantages of optical lithography (high throughput) with electron beam direct write lithography (high resolution and alignment capability). This hybrid-lithography scheme allows for the timely development of semiconductor processes for the 32nm node, and beyond. In this paper we will describe how hybrid lithography has enabled early process integration and device learning and how IBM applied e-beam & optical hybrid lithography to create the world's smallest working SRAM cell.

Downscaling ferroelectric field effect transistors by using ferroelectric Si-doped HfO2

NASA Astrophysics Data System (ADS)

Martin, Dominik; Yurchuk, Ekaterina; Müller, Stefan; Müller, Johannes; Paul, Jan; Sundquist, Jonas; Slesazeck, Stefan; Schlösser, Till; van Bentum, Ralf; Trentzsch, Martin; Schröder, Uwe; Mikolajick, Thomas

2013-10-01

Throughout the 22 nm technology node HfO2 is established as a reliable gate dielectric in contemporary complementary metal oxide semiconductor (CMOS) technology. The working principle of ferroelectric field effect transistors FeFET has also been demonstrated for some time for dielectric materials like Pb[ZrxTi1-x]O3 and SrBi2Ta2O9. However, integrating these into contemporary downscaled CMOS technology nodes is not trivial due to the necessity of an extremely thick gate stack. Recent developments have shown HfO2 to have ferroelectric properties, given the proper doping. Moreover, these doped HfO2 thin films only require layer thicknesses similar to the ones already in use in CMOS technology. This work will show how the incorporation of Si induces ferroelectricity in HfO2 based capacitor structures and finally demonstrate non-volatile storage in nFeFETs down to a gate length of 100 nm. A memory window of 0.41 V can be retained after 20,000 switching cycles. Retention can be extrapolated to 10 years.

Progress and process improvements for multiple electron-beam direct write

NASA Astrophysics Data System (ADS)

Servin, Isabelle; Pourteau, Marie-Line; Pradelles, Jonathan; Essomba, Philippe; Lattard, Ludovic; Brandt, Pieter; Wieland, Marco

2017-06-01

Massively parallel electron beam direct write (MP-EBDW) lithography is a cost-effective patterning solution, complementary to optical lithography, for a variety of applications ranging from 200 to 14 nm. This paper will present last process/integration results to achieve targets for both 28 and 45 nm nodes. For 28 nm node, we mainly focus on line-width roughness (LWR) mitigation by playing with stack, new resist platform and bias design strategy. The lines roughness was reduced by using thicker spin-on-carbon (SOC) hardmask (-14%) or non-chemically amplified (non-CAR) resist with bias writing strategy implementation (-20%). Etch transfer into trilayer has been demonstrated by preserving pattern fidelity and profiles for both CAR and non-CAR resists. For 45 nm node, we demonstrate the electron-beam process integration within optical CMOS flows. Resists based on KrF platform show a full compatibility with multiple stacks to fit with conventional optical flow used for critical layers. Electron-beam resist performances have been optimized to fit the specifications in terms of resolution, energy latitude, LWR and stack compatibility. The patterning process overview showing the latest achievements is mature enough to enable starting the multi-beam technology pre-production mode.

Via patterning in the 7-nm node using immersion lithography and graphoepitaxy directed self-assembly

NASA Astrophysics Data System (ADS)

Doise, Jan; Bekaert, Joost; Chan, Boon Teik; Hori, Masafumi; Gronheid, Roel

2017-04-01

Insertion of a graphoepitaxy directed self-assembly process as a via patterning technology into integrated circuit fabrication is seriously considered for the 7-nm node and beyond. At these dimensions, a graphoepitaxy process using a cylindrical block copolymer that enables hole multiplication can alleviate costs by extending 193-nm immersion-based lithography and significantly reducing the number of masks that would be required per layer. To be considered for implementation, it needs to be proved that this approach can achieve the required pattern quality in terms of defects and variability using a representative, aperiodic design. The patterning of a via layer from an actual 7-nm node logic layout is demonstrated using immersion lithography and graphoepitaxy directed self-assembly in a fab-like environment. The performance of the process is characterized in detail on a full 300-mm wafer scale. The local variability in an edge placement error of the obtained patterns (4.0 nm 3σ for singlets) is in line with the recent results in the field and significantly less than of the prepattern (4.9 nm 3σ for singlets). In addition, it is expected that pattern quality can be further improved through an improved mask design and optical proximity correction. No major complications for insertion of the graphoepitaxy directed self-assembly into device manufacturing were observed.

Toward the 5nm technology: layout optimization and performance benchmark for logic/SRAMs using lateral and vertical GAA FETs

NASA Astrophysics Data System (ADS)

Huynh-Bao, Trong; Ryckaert, Julien; Sakhare, Sushil; Mercha, Abdelkarim; Verkest, Diederik; Thean, Aaron; Wambacq, Piet

2016-03-01

In this paper, we present a layout and performance analysis of logic and SRAM circuits for vertical and lateral GAA FETs using 5nm (iN5) design rules. Extreme ultra-violet lithography (EUVL) processes are exploited to print the critical features: 32 nm gate pitch and 24 nm metal pitch. Layout architectures and patterning compromises for enabling the 5nm node will be discussed in details. A distinct standard-cell template for vertical FETs is proposed and elaborated for the first time. To assess electrical performances, a BSIM-CMG model has been developed and calibrated with TCAD simulations, which accounts for the quasi-ballistic transport in the nanowire channel. The results show that the inbound power rail layout construct for vertical devices could achieve the highest density while the interleaving diffusion template can maximize the port accessibility. By using a representative critical path circuit of a generic low power SoCs, it is shown that the VFET-based circuit is 40% more energy efficient than LFET designs at iso-performance. Regarding SRAMs, benefits given by vertical channel orientation in VFETs has reduced the SRAM area by 20%~30% compared to lateral SRAMs. A double exposures with EUV canner is needed to reach a minimum tip-to-tip (T2T) of 16 nm for middle-of-line (MOL) layers. To enable HD SRAMs with two metal layers, a fully self-aligned gate contact for LFETs and 2D routing of the top electrode for VFETs are required. The standby leakage of vertical SRAMs is 4~6X lower than LFET-based SRAMs at iso-performance and iso-area. The minimum operating voltage (Vmin) of vertical SRAMs is 170 mV lower than lateral SRAMs. A high-density SRAM bitcell of 0.014 um2 can be obtained for the iN5 technology node, which fully follows the SRAM scaling trend for the 45nm nodes and beyond.

Mask manufacturing of advanced technology designs using multi-beam lithography (part 2)

NASA Astrophysics Data System (ADS)

Green, Michael; Ham, Young; Dillon, Brian; Kasprowicz, Bryan; Hur, Ik Boum; Park, Joong Hee; Choi, Yohan; McMurran, Jeff; Kamberian, Henry; Chalom, Daniel; Klikovits, Jan; Jurkovic, Michal; Hudek, Peter

2016-09-01

As optical lithography is extended into 10nm and below nodes, advanced designs are becoming a key challenge for mask manufacturers. Techniques including advanced optical proximity correction (OPC) and Inverse Lithography Technology (ILT) result in structures that pose a range of issues across the mask manufacturing process. Among the new challenges are continued shrinking sub-resolution assist features (SRAFs), curvilinear SRAFs, and other complex mask geometries that are counter-intuitive relative to the desired wafer pattern. Considerable capability improvements over current mask making methods are necessary to meet the new requirements particularly regarding minimum feature resolution and pattern fidelity. Advanced processes using the IMS Multi-beam Mask Writer (MBMW) are feasible solutions to these coming challenges. In this paper, Part 2 of our study, we further characterize an MBMW process for 10nm and below logic node mask manufacturing including advanced pattern analysis and write time demonstration.

Low leakage Ru-strontium titanate-Ru metal-insulator-metal capacitors for sub-20 nm technology node in dynamic random access memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Popovici, M., E-mail: Mihaela.Ioana.Popovici@imec.be; Swerts, J.; Redolfi, A.

2014-02-24

Improved metal-insulator-metal capacitor (MIMCAP) stacks with strontium titanate (STO) as dielectric sandwiched between Ru as top and bottom electrode are shown. The Ru/STO/Ru stack demonstrates clearly its potential to reach sub-20 nm technology nodes for dynamic random access memory. Downscaling of the equivalent oxide thickness, leakage current density (J{sub g}) of the MIMCAPs, and physical thickness of the STO have been realized by control of the Sr/Ti ratio and grain size using a heterogeneous TiO{sub 2}/STO based nanolaminate stack deposition and a two-step crystallization anneal. Replacement of TiN with Ru as both top and bottom electrodes reduces the amount of electricallymore » active defects and is essential to achieve a low leakage current in the MIM capacitor.« less

Reliable high-power injection locked 6kHz 60W laser for ArF immersion lithography

NASA Astrophysics Data System (ADS)

Watanabe, Hidenori; Komae, Shigeo; Tanaka, Satoshi; Nohdomi, Ryoichi; Yamazaki, Taku; Nakarai, Hiroaki; Fujimoto, Junichi; Matsunaga, Takashi; Saito, Takashi; Kakizaki, Kouji; Mizoguchi, Hakaru

2007-03-01

Reliable high power 193nm ArF light source is desired for the successive growth of ArF-immersion technology for 45nm node generation. In 2006, Gigaphoton released GT60A, high power injection locked 6kHz/60W/0.5pm (E95) laser system, to meet the demands of semiconductor markets. In this paper, we report key technologies for reliable mass production GT laser systems and GT60A high durability performance test results up to 20 billion pulses.

Benchmarks of a III-V TFET technology platform against the 10-nm CMOS FinFET technology node considering basic arithmetic circuits

NASA Astrophysics Data System (ADS)

Strangio, S.; Palestri, P.; Lanuzza, M.; Esseni, D.; Crupi, F.; Selmi, L.

2017-02-01

In this work, a benchmark for low-power digital applications of a III-V TFET technology platform against a conventional CMOS FinFET technology node is proposed. The analysis focuses on full-adder circuits, which are commonly identified as representative of the digital logic environment. 28T and 24T topologies, implemented in complementary-logic and transmission-gate logic, respectively, are investigated. Transient simulations are performed with a purpose-built test-bench on each single-bit full adder solution. The extracted delays and energy characteristics are post-processed and translated into figures-of-merit for multi-bit ripple-carry-adders. Trends related to the different full-adder implementations (for the same device technology platform) and to the different technology platforms (for the same full-adder topology) are presented and discussed.

FPGA chip performance improvement with gate shrink through alternating PSM 90nm process

NASA Astrophysics Data System (ADS)

Yu, Chun-Chi; Shieh, Ming-Feng; Liu, Erick; Lin, Benjamin; Ho, Jonathan; Wu, Xin; Panaite, Petrisor; Chacko, Manoj; Zhang, Yunqiang; Lei, Wen-Kang

2005-11-01

In the post-physical verification space called 'Mask Synthesis' a key component of design-for-manufacturing (DFM), double-exposure based, dark-field, alternating PSM (Alt-PSM) is being increasingly applied at the 90nm node in addition with other mature resolution enhancement techniques (RETs) such as optical proximity correction (OPC) and sub-resolution assist features (SRAF). Several high-performance IC manufacturers already use alt-PSM technology in 65nm production. At 90nm having strong control over the lithography process is a critical component in meeting targeted yield goals. However, implementing alt-PSM in production has been challenging due to several factors such as phase conflict errors, mask manufacturing, and the increased production cost due to the need for two masks in the process. Implementation of Alt-PSM generally requires phase compliance rules and proper phase topology in the layout and this has been successful for the technology node with these rules implemented. However, this may not be true for a mature, production process technology, in this case 90 nm. Especially, in the foundry-fabless business model where the foundry provides a standard set of design rules to its customers for a given process technology, and where not all the foundry customers require Alt-PSM in their tapeout flow. With minimum design changes, design houses usually are motivated by higher product performance for the existing designs. What follows is an in-depth review of the motivation to apply alt-PSM on a production FPGA, the DFM challenges to each partner faced, its effect on the tapeout flow, and how design, manufacturing, and EDA teams worked together to resolve phase conflicts, tapeout the chip, and finally verify the silicon results in production.

Evaluating diffraction based overlay metrology for double patterning technologies

NASA Astrophysics Data System (ADS)

Saravanan, Chandra Saru; Liu, Yongdong; Dasari, Prasad; Kritsun, Oleg; Volkman, Catherine; Acheta, Alden; La Fontaine, Bruno

2008-03-01

Demanding sub-45 nm node lithographic methodologies such as double patterning (DPT) pose significant challenges for overlay metrology. In this paper, we investigate scatterometry methods as an alternative approach to meet these stringent new metrology requirements. We used a spectroscopic diffraction-based overlay (DBO) measurement technique in which registration errors are extracted from specially designed diffraction targets for double patterning. The results of overlay measurements are compared to traditional bar-in-bar targets. A comparison between DBO measurements and CD-SEM measurements is done to show the correlation between the two approaches. We discuss the total measurement uncertainty (TMU) requirements for sub-45 nm nodes and compare TMU from the different overlay approaches.

Nanoelectronics and More-than-Moore at IMEC

NASA Astrophysics Data System (ADS)

Cartuyvels, Rudi; Biesemans, Serge; Vandervorst, Wilfried; De Boeck, Jo

2011-11-01

This paper presents an overview of imec's R&D addressing the challenges of CMOS scaling towards the 10 nm node and its outlook beyond. In addition to the relentless geometrical shrinks, opportunities to further increase nanoelectronic system functionality and performance by co-integration and chip stacking technologies combined with emerging MEMS and optoelectronic technologies will be presented.

Exploration of BEOL line-space patterning options at 12 nm half-pitch and below

NASA Astrophysics Data System (ADS)

Decoster, S.; Lazzarino, F.; Petersen Barbosa Lima, L.; Li, W.; Versluijs, J.; Halder, S.; Mallik, A.; Murdoch, G.

2018-03-01

While the semiconductor industry is almost ready for high-volume manufacturing of the 7 nm technology node, research centers are defining and troubleshooting the patterning options for the 5 nm technology node (N5) and below. The target dimension for imec's N5 BEOL applications is 20-24 nm Metal Pitch (MP), which requires Self-Aligned multiple (Double/Quadruple/Octuple) Patterning approaches (SAxP) in combination with EUV or immersion lithography at 193 nm. There are numerous technical challenges to enable gratings at the hard mask level such as good uniformity across wafer, low line edge/width roughness (LER/LWR), large process window, and all of this at low cost. An even greater challenge is to transfer these gratings into the dielectric material at such critical dimensions, where increased line edge roughness, line wiggling and even pattern collapse can be expected for materials with small mechanical stability such as highly porous low-k dielectrics. In this work we first compare three different patterning options for 12 nm half-pitch gratings at the hard mask level: EUV-based SADP and 193i-based SAQP and SAOP. This comparison will be based on process window, line edge/width roughness and cost. Next, the transfer of 12 nm line/space gratings in the dielectric material is discussed and presented. The LER of the dielectric lines is investigated as a function of the dielectric material, the trench depth, and the stress in the sacrificial hard mask. Finally, we elaborate on the different options to enable scaling down from 24 nm MP to 16 nm MP, and demonstrate 8 nm line/space gratings with 193i-based SAOP.

IR-drop analysis for validating power grids and standard cell architectures in sub-10nm node designs

NASA Astrophysics Data System (ADS)

Ban, Yongchan; Wang, Chenchen; Zeng, Jia; Kye, Jongwook

2017-03-01

Since chip performance and power are highly dependent on the operating voltage, the robust power distribution network (PDN) is of utmost importance in designs to provide with the reliable voltage without voltage (IR)-drop. However, rapid increase of parasitic resistance and capacitance (RC) in interconnects makes IR-drop much worse with technology scaling. This paper shows various IR-drop analyses in sub 10nm designs. The major objectives are to validate standard cell architectures, where different sizes of power/ground and metal tracks are validated, and to validate PDN architecture, where types of power hook-up approaches are evaluated with IR-drop calculation. To estimate IR-drops in 10nm and below technologies, we first prepare physically routed designs given standard cell libraries, where we use open RISC RTL, synthesize the CPU, and apply placement & routing with process-design kits (PDK). Then, static and dynamic IR-drop flows are set up with commercial tools. Using the IR-drop flow, we compare standard cell architectures, and analysis impacts on performance, power, and area (PPA) with the previous technology-node designs. With this IR-drop flow, we can optimize the best PDN structure against IR-drops as well as types of standard cell library.

ILT optimization of EUV masks for sub-7nm lithography

NASA Astrophysics Data System (ADS)

Hooker, Kevin; Kuechler, Bernd; Kazarian, Aram; Xiao, Guangming; Lucas, Kevin

2017-06-01

The 5nm and 7nm technology nodes will continue recent scaling trends and will deliver significantly smaller minimum features, standard cell areas and SRAM cell areas vs. the 10nm node. There are tremendous economic pressures to shrink each subsequent technology, though in a cost-effective and performance enhancing manner. IC manufacturers are eagerly awaiting EUV so that they can more aggressively shrink their technology than they could by using complicated MPT. The current 0.33NA EUV tools and processes also have their patterning limitations. EUV scanner lenses, scanner sources, masks and resists are all relatively immature compared to the current lithography manufacturing baseline of 193i. For example, lens aberrations are currently several times larger (as a function of wavelength) in EUV scanners than for 193i scanners. Robustly patterning 16nm L/S fully random logic metal patterns and 40nm pitch random logic rectangular contacts with 0.33NA EUV are tough challenges that will benefit from advanced OPC/RET. For example, if an IC manufacturer can push single exposure device layer resolution 10% tighter using improved ILT to avoid using DPT, there will be a significant cost and process complexity benefit to doing so. ILT is well known to have considerable benefits in finding flexible 193i mask pattern solutions to improve process window, improve 2D CD control, improve resolution in low K1 lithography regime and help to delay the introduction of DPT. However, ILT has not previously been applied to EUV lithography. In this paper, we report on new developments which extend ILT method to EUV lithography and we characterize the benefits seen vs. traditional EUV OPC/RET methods.

Impact of line edge roughness on the performance of 14-nm FinFET: Device-circuit Co-design

NASA Astrophysics Data System (ADS)

Rathore, Rituraj Singh; Rana, Ashwani K.

2018-01-01

With the evolution of sub-20 nm FinFET technology, line edge roughness (LER) has been identified as a critical problem and may result in critical device parameter variation and performance limitation in the future VLSI circuit application. In the present work, an analytical model of fin-LER has been presented, which shows the impact of correlated and uncorrelated LER on FinFET structure. Further, the influence of correlated and uncorrelated fin- LER on all electrical performance parameters is thoroughly investigated using the three-dimensional (3-D) Technology Computer Aided Design (TCAD) simulations for 14-nm technology node. Moreover, the impact of all possible fin shapes on threshold voltage (VTH), drain induced barrier lowering (DIBL), on-current (ION), and off-current (IOFF) has been compared with the well calibrated rectangular FinFET structure. In addition, the influence of all possible fin geometries on the read stability of six-transistor (6-T) Static-Random-Access-Memory (SRAM) has been investigated. The study reveals that fin-LER plays a vital role as it directly governs the electrostatics of the FinFET structure. This has been found that there is a high degree of fluctuations in all performance parameters for uncorrelated fin-LER type FinFETs as compared to correlated fin-LER with respect to rectangular FinFET structure. This paper gives physical insight of FinFET design, especially in sub-20 nm technology nodes by concluding that the impact of LER on electrical parameters are minimum for correlated LER.

Quantum information density scaling and qubit operation time constraints of CMOS silicon-based quantum computer architectures

NASA Astrophysics Data System (ADS)

Rotta, Davide; Sebastiano, Fabio; Charbon, Edoardo; Prati, Enrico

2017-06-01

Even the quantum simulation of an apparently simple molecule such as Fe2S2 requires a considerable number of qubits of the order of 106, while more complex molecules such as alanine (C3H7NO2) require about a hundred times more. In order to assess such a multimillion scale of identical qubits and control lines, the silicon platform seems to be one of the most indicated routes as it naturally provides, together with qubit functionalities, the capability of nanometric, serial, and industrial-quality fabrication. The scaling trend of microelectronic devices predicting that computing power would double every 2 years, known as Moore's law, according to the new slope set after the 32-nm node of 2009, suggests that the technology roadmap will achieve the 3-nm manufacturability limit proposed by Kelly around 2020. Today, circuital quantum information processing architectures are predicted to take advantage from the scalability ensured by silicon technology. However, the maximum amount of quantum information per unit surface that can be stored in silicon-based qubits and the consequent space constraints on qubit operations have never been addressed so far. This represents one of the key parameters toward the implementation of quantum error correction for fault-tolerant quantum information processing and its dependence on the features of the technology node. The maximum quantum information per unit surface virtually storable and controllable in the compact exchange-only silicon double quantum dot qubit architecture is expressed as a function of the complementary metal-oxide-semiconductor technology node, so the size scale optimizing both physical qubit operation time and quantum error correction requirements is assessed by reviewing the physical and technological constraints. According to the requirements imposed by the quantum error correction method and the constraints given by the typical strength of the exchange coupling, we determine the workable operation frequency range of a silicon complementary metal-oxide-semiconductor quantum processor to be within 1 and 100 GHz. Such constraint limits the feasibility of fault-tolerant quantum information processing with complementary metal-oxide-semiconductor technology only to the most advanced nodes. The compatibility with classical complementary metal-oxide-semiconductor control circuitry is discussed, focusing on the cryogenic complementary metal-oxide-semiconductor operation required to bring the classical controller as close as possible to the quantum processor and to enable interfacing thousands of qubits on the same chip via time-division, frequency-division, and space-division multiplexing. The operation time range prospected for cryogenic control electronics is found to be compatible with the operation time expected for qubits. By combining the forecast of the development of scaled technology nodes with operation time and classical circuitry constraints, we derive a maximum quantum information density for logical qubits of 2.8 and 4 Mqb/cm2 for the 10 and 7-nm technology nodes, respectively, for the Steane code. The density is one and two orders of magnitude less for surface codes and for concatenated codes, respectively. Such values provide a benchmark for the development of fault-tolerant quantum algorithms by circuital quantum information based on silicon platforms and a guideline for other technologies in general.

REAP (raster e-beam advanced process) using 50-kV raster e-beam system for sub-100-nm node mask technology

NASA Astrophysics Data System (ADS)

Baik, Ki-Ho; Dean, Robert L.; Mueller, Mark; Lu, Maiying; Lem, Homer Y.; Osborne, Stephen; Abboud, Frank E.

2002-07-01

A chemically amplified resist (CAR) process has been recognized as an approach to meet the demanding critical dimension (CD) specifications of 100nm node technology and beyond. Recently, significant effort has been devoted to optimizing CAR materials, which offer the characteristics required for next generation photomask fabrication. In this paper, a process established with a positive-tone CAR from TOK and 50kV MEBES eXara system is discussed. This resist is developed for raster scan 50 kV e-beam systems. It has high contrast, good coating characteristics, good dry etch selectivity, and high environmental stability. The coating process is conducted in an environment with amine concentration less than 2 ppb. A nitrogen environment is provided during plate transfer steps. Resolution using a 60nm writing grid is 90nm line and space patterns. CD linearity is maintained down to 240nm for isolated lines or spaces by applying embedded proximity effect correction (emPEC). Optimizations of post-apply bake (PAB) and post-expose bake (PEB) time, temperature, and uniformity are completed to improve adhesion, coating uniformity, and resolution. A puddle develop process is optimized to improve line edge roughness, edge slope, and resolution. Dry etch process is optimized on a TetraT system to transfer the resist image into the chrome layer with minimum etch bias.

EUV lithography for 30nm half pitch and beyond: exploring resolution, sensitivity, and LWR tradeoffs

NASA Astrophysics Data System (ADS)

Putna, E. Steve; Younkin, Todd R.; Chandhok, Manish; Frasure, Kent

2009-03-01

The International Technology Roadmap for Semiconductors (ITRS) denotes Extreme Ultraviolet (EUV) lithography as a leading technology option for realizing the 32nm half-pitch node and beyond. Readiness of EUV materials is currently one high risk area according to assessments made at the 2008 EUVL Symposium. The main development issue regarding EUV resist has been how to simultaneously achieve high sensitivity, high resolution, and low line width roughness (LWR). This paper describes the strategy and current status of EUV resist development at Intel Corporation. Data is presented utilizing Intel's Micro-Exposure Tool (MET) examining the feasibility of establishing a resist process that simultaneously exhibits <=30nm half-pitch (HP) L/S resolution at <=10mJ/cm2 with <=4nm LWR.

EUV lithography for 22nm half pitch and beyond: exploring resolution, LWR, and sensitivity tradeoffs

NASA Astrophysics Data System (ADS)

Putna, E. Steve; Younkin, Todd R.; Caudillo, Roman; Chandhok, Manish

2010-04-01

The International Technology Roadmap for Semiconductors (ITRS) denotes Extreme Ultraviolet (EUV) lithography as a leading technology option for realizing the 22nm half pitch node and beyond. Readiness of EUV materials is currently one high risk area according to recent assessments made at the 2009 EUVL Symposium. The main development issue regarding EUV resist has been how to simultaneously achieve high sensitivity, high resolution, and low line width roughness (LWR). This paper describes the strategy and current status of EUV resist development at Intel Corporation. Data collected utilizing Intel's Micro-Exposure Tool (MET) is presented in order to examine the feasibility of establishing a resist process that simultaneously exhibits <=22nm half-pitch (HP) L/S resolution at <= 12.5mJ/cm2 with <= 4nm LWR.

Design considerations and emerging challenges for nanotube-, nanowire-, and negative capacitor-field effect transistors

NASA Astrophysics Data System (ADS)

Wahab, Md. Abdul

As the era of classical planar metal-oxide-semiconductor field-effect transistors (MOSFETs) comes to an end, the semiconductor industry is beginning to adopt 3D device architectures, such as FinFETs, starting at the 22 nm technology node. Since physical limits such as short channel effect (SCE) and self-heating may dominate, it may be difficult to scale Si FinFET below 10 nm. In this regard, transistors with different materials, geometries, or operating principles may help. For example, gate has excellent electrostatic control over 2D thin film channel with planar geometry, and 1D nanowire (NW) channel with gate-all-around (GAA) geometry to reduce SCE. High carrier mobility of single wall carbon nanotube (SWNT) or III-V channels may reduce VDD to reduce power consumption. Therefore, as channel of transistor, 2D thin film of array SWNTs and 1D III-V multi NWs are promising for sub 10 nm technology nodes. In this thesis, we analyze the potential of these transistors from process, performance, and reliability perspectives. For SWNT FETs, we discuss a set of challenges (such as how to (i) characterize diameter distribution, (ii) remove metallic (m)-SWNTs, and (iii) avoid electrostatic cross-talk among the neighboring SWNTs), and demonstrate solution strategies both theoretically and experimentally. Regarding self-heating in these new class of devices (SWNT FET and GAA NW FET including state-of-the-art FinFET), higher thermal resistance from poor thermal conducting oxides results significant temperature rise, and reduces the IC life-time. For GAA NW FETs, we discuss accurate self-heating evaluation with good spatial, temporal, and thermal resolutions. The introduction of negative capacitor (NC), as gate dielectric stack of transistor, allows sub 60 mV/dec operation to reduce power consumption significantly. Taken together, our work provides a comprehensive perspective regarding the challenges and opportunities of sub 10 nm technology nodes.

Microeconomics of process control in semiconductor manufacturing

NASA Astrophysics Data System (ADS)

Monahan, Kevin M.

2003-06-01

Process window control enables accelerated design-rule shrinks for both logic and memory manufacturers, but simple microeconomic models that directly link the effects of process window control to maximum profitability are rare. In this work, we derive these links using a simplified model for the maximum rate of profit generated by the semiconductor manufacturing process. We show that the ability of process window control to achieve these economic objectives may be limited by variability in the larger manufacturing context, including measurement delays and process variation at the lot, wafer, x-wafer, x-field, and x-chip levels. We conclude that x-wafer and x-field CD control strategies will be critical enablers of density, performance and optimum profitability at the 90 and 65nm technology nodes. These analyses correlate well with actual factory data and often identify millions of dollars in potential incremental revenue and cost savings. As an example, we show that a scatterometry-based CD Process Window Monitor is an economically justified, enabling technology for the 65nm node.

Empirical OPC rule inference for rapid RET application

NASA Astrophysics Data System (ADS)

Kulkarni, Anand P.

2006-10-01

A given technological node (45 nm, 65 nm) can be expected to process thousands of individual designs. Iterative methods applied at the node consume valuable days in determining proper placement of OPC features, and manufacturing and testing mask correspondence to wafer patterns in a trial-and-error fashion for each design. Repeating this fabrication process for each individual design is a time-consuming and expensive process. We present a novel technique which sidesteps the requirement to iterate through the model-based OPC analysis and pattern verification cycle on subsequent designs at the same node. Our approach relies on the inference of rules from a correct pattern at the wafer surface it relates to the OPC and pre-OPC pattern layout files. We begin with an offline phase where we obtain a "gold standard" design file that has been fab-tested at the node with a prepared, post-OPC layout file that corresponds to the intended on-wafer pattern. We then run an offline analysis to infer rules to be used in this method. During the analysis, our method implicitly identifies contextual OPC strategies for optimal placement of RET features on any design at that node. Using these strategies, we can apply OPC to subsequent designs at the same node with accuracy comparable to the original design file but significantly smaller expected runtimes. The technique promises to offer a rapid and accurate complement to existing RET application strategies.

Extreme ultraviolet resist materials for sub-7 nm patterning.

PubMed

Li, Li; Liu, Xuan; Pal, Shyam; Wang, Shulan; Ober, Christopher K; Giannelis, Emmanuel P

2017-08-14

Continuous ongoing development of dense integrated circuits requires significant advancements in nanoscale patterning technology. As a key process in semiconductor high volume manufacturing (HVM), high resolution lithography is crucial in keeping with Moore's law. Currently, lithography technology for the sub-7 nm node and beyond has been actively investigated approaching atomic level patterning. EUV technology is now considered to be a potential alternative to HVM for replacing in some cases ArF immersion technology combined with multi-patterning. Development of innovative resist materials will be required to improve advanced fabrication strategies. In this article, advancements in novel resist materials are reviewed to identify design criteria for establishment of a next generation resist platform. Development strategies and the challenges in next generation resist materials are summarized and discussed.

Aerial image measurement technique for automated reticle defect disposition (ARDD) in wafer fabs

NASA Astrophysics Data System (ADS)

Zibold, Axel M.; Schmid, Rainer M.; Stegemann, B.; Scheruebl, Thomas; Harnisch, Wolfgang; Kobiyama, Yuji

2004-08-01

The Aerial Image Measurement System (AIMS)* for 193 nm lithography emulation has been brought into operation successfully worldwide. A second generation system comprising 193 nm AIMS capability, mini-environment and SMIF, the AIMS fab 193 plus is currently introduced into the market. By adjustment of numerical aperture (NA), illumination type and partial illumination coherence to match the conditions in 193 nm steppers or scanners, it can emulate the exposure tool for any type of reticles like binary, OPC and PSM down to the 65 nm node. The system allows a rapid prediction of wafer printability of defects or defect repairs, and critical features, like dense patterns or contacts on the masks without the need to perform expensive image qualification consisting of test wafer exposures followed by SEM measurements. Therefore, AIMS is a mask quality verification standard for high-end photo masks and established in mask shops worldwide. The progress on the AIMS technology described in this paper will highlight that besides mask shops there will be a very beneficial use of the AIMS in the wafer fab and we propose an Automated Reticle Defect Disposition (ARDD) process. With smaller nodes, where design rules are 65 nm or less, it is expected that smaller defects on reticles will occur in increasing numbers in the wafer fab. These smaller mask defects will matter more and more and become a serious yield limiting factor. With increasing mask prices and increasing number of defects and severability on reticles it will become cost beneficial to perform defect disposition on the reticles in wafer production. Currently ongoing studies demonstrate AIMS benefits for wafer fab applications. An outlook will be given for extension of 193 nm aerial imaging down to the 45 nm node based on emulation of immersion scanners.

EUV lithography for 22nm half pitch and beyond: exploring resolution, LWR, and sensitivity tradeoffs

NASA Astrophysics Data System (ADS)

Putna, E. Steve; Younkin, Todd R.; Leeson, Michael; Caudillo, Roman; Bacuita, Terence; Shah, Uday; Chandhok, Manish

2011-04-01

The International Technology Roadmap for Semiconductors (ITRS) denotes Extreme Ultraviolet (EUV) lithography as a leading technology option for realizing the 22nm half pitch node and beyond. According to recent assessments made at the 2010 EUVL Symposium, the readiness of EUV materials remains one of the top risk items for EUV adoption. The main development issue regarding EUV resists has been how to simultaneously achieve high resolution, high sensitivity, and low line width roughness (LWR). This paper describes our strategy, the current status of EUV materials, and the integrated post-development LWR reduction efforts made at Intel Corporation. Data collected utilizing Intel's Micro- Exposure Tool (MET) is presented in order to examine the feasibility of establishing a resist process that simultaneously exhibits <=22nm half-pitch (HP) L/S resolution at <=11.3mJ/cm2 with <=3nm LWR.

Immunoreactivities of human nonmetastatic clone 23 and p53 products are disassociated and not good predictors of lymph node metastases in early-stage cervical cancer patients.

PubMed

Tee, Y T; Wang, P H; Ko, J L; Chen, G D; Chang, H; Lin, L Y

2007-01-01

To assess the relation between expressions of human nonmetastatic clone 23 (nm23-H1) and p53 in cervical cancer, their relationships with lymph node metastasis, and further to examine their predictive of lymph node metastases. nm23-H1 and p53 expression profiles were visualized by immunohistochemistry in early-stage cervical cancer specimens. Immunoreactivities of nm23-H1 and p53 were disassociated. The independent variables related with lymph node metastases were grade of cancer cell differentiation (p < 0.029) and stromal invasion (p < 0.039). Sensitivity, specificity, positive and negative predictive values, and accuracy for lymph node metastasis were calculated to be 91.7%, 13.5%, 25.6%, 83.3%, and 32.7% for nm23-H1 and 66.7%, 51.4%, 30.8%, 82.6%, and 55.1% for p53. Nm23-H1 and p53 are disassociated and not good predictors of lymph node metastases in early-stage cervical cancer patients. However, stromal invasion and cell differentiation can predict lymph node metastasis.

Layout decomposition of self-aligned double patterning for 2D random logic patterning

NASA Astrophysics Data System (ADS)

Ban, Yongchan; Miloslavsky, Alex; Lucas, Kevin; Choi, Soo-Han; Park, Chul-Hong; Pan, David Z.

2011-04-01

Self-aligned double pattering (SADP) has been adapted as a promising solution for sub-30nm technology nodes due to its lower overlay problem and better process tolerance. SADP is in production use for 1D dense patterns with good pitch control such as NAND Flash memory applications, but it is still challenging to apply SADP to 2D random logic patterns. The favored type of SADP for complex logic interconnects is a two mask approach using a core mask and a trim mask. In this paper, we first describe layout decomposition methods of spacer-type double patterning lithography, then report a type of SADP compliant layouts, and finally report SADP applications on Samsung 22nm SRAM layout. For SADP decomposition, we propose several SADP-aware layout coloring algorithms and a method of generating lithography-friendly core mask patterns. Experimental results on 22nm node designs show that our proposed layout decomposition for SADP effectively decomposes any given layouts.

Boundary-based cellwise OPC for standard-cell layouts

NASA Astrophysics Data System (ADS)

Pawlowski, David M.; Deng, Liang; Wong, Martin D. F.

2007-03-01

Model based optical proximity correction (OPC) has become necessary at 90nm technology node. Cellwise OPC is an attractive technique to reduce the mask data size as well as the prohibitive runtime of full-chip OPC. As feature dimensions have gotten smaller, the radius of influence for edge features has extended further into neighboring cells such that it is no longer sufficient to perform cellwise OPC independent of neighboring cells, especially for the critical layers. The methodology described in this work accounts for features in neighboring cells and allows a cellwise approach to be applied to cells with a printed gate length of 45nm with the projection that it can also be applied to future technology nodes. OPC-ready cells are generated at library creation (independent of placement) using a boundary-based technique. Each cell has a tractable number of OPC-ready versions due to an intelligent characterization of standard cell layout features. Results are very promising: the average edge placement error (EPE) for all metal1 features in 100 layouts is 0.731nm which is less than 1% of metal1 width; the maximum EPE for poly features reduced to 1/3, compared to cellwise OPC without considering boundaries, creating similar levels of lithographic accuracy while obviating any of the drawbacks inherent in layout specific full-chip model-based OPC.

Results from a new die-to-database reticle inspection platform

NASA Astrophysics Data System (ADS)

Broadbent, William; Xiong, Yalin; Giusti, Michael; Walsh, Robert; Dayal, Aditya

2007-03-01

A new die-to-database high-resolution reticle defect inspection system has been developed for the 45nm logic node and extendable to the 32nm node (also the comparable memory nodes). These nodes will use predominantly 193nm immersion lithography although EUV may also be used. According to recent surveys, the predominant reticle types for the 45nm node are 6% simple tri-tone and COG. Other advanced reticle types may also be used for these nodes including: dark field alternating, Mask Enhancer, complex tri-tone, high transmission, CPL, EUV, etc. Finally, aggressive model based OPC will typically be used which will include many small structures such as jogs, serifs, and SRAF (sub-resolution assist features) with accompanying very small gaps between adjacent structures. The current generation of inspection systems is inadequate to meet these requirements. The architecture and performance of a new die-to-database inspection system is described. This new system is designed to inspect the aforementioned reticle types in die-to-database and die-to-die modes. Recent results from internal testing of the prototype systems are shown. The results include standard programmed defect test reticles and advanced 45nm and 32nm node reticles from industry sources. The results show high sensitivity and low false detections being achieved.

Alternating phase-shift mask and binary mask for 45-nm node and beyond: the impact on the mask error control

NASA Astrophysics Data System (ADS)

Kojima, Yosuke; Shirasaki, Masanori; Chiba, Kazuaki; Tanaka, Tsuyoshi; Inazuki, Yukio; Yoshikawa, Hiroki; Okazaki, Satoshi; Iwase, Kazuya; Ishikawa, Kiichi; Ozawa, Ken

2007-05-01

For 45 nm node and beyond, the alternating phase-shift mask (alt. PSM), one of the most expected resolution enhancement technologies (RET) because of its high image contrast and small mask error enhancement factor (MEEF), and the binary mask (BIM) attract attention. Reducing CD and registration errors and defect are their critical issues. As the solution, the new blank for alt. PSM and BIM is developed. The top film of new blank is thin Cr, and the antireflection film and shielding film composed of MoSi are deposited under the Cr film. The mask CD performance is evaluated for through pitch, CD linearity, CD uniformity, global loading, resolution and pattern fidelity, and the blank performance is evaluated for optical density, reflectivity, sheet resistance, flatness and defect level. It is found that the performance of new blank is equal to or better than that of conventional blank in all items. The mask CD performance shows significant improvement. The lithography performance of new blank is confirmed by wafer printing and AIMS measurement. The full dry type alt. PSM has been used as test plate, and the test results show that new blank can almost meet the specifications of pi-0 CD difference, CD uniformity and process margin for 45 nm node. Additionally, the new blank shows the better pattern fidelity than that of conventional blank on wafer. AIMS results are almost same as wafer results except for the narrowest pattern. Considering the result above, this new blank can reduce the mask error factors of alt. PSM and BIM for 45 nm node and beyond.

High-speed and low-power repeater for VLSI interconnects

NASA Astrophysics Data System (ADS)

Karthikeyan, A.; Mallick, P. S.

2017-10-01

This paper proposes a repeater for boosting the speed of interconnects with low power dissipation. We have designed and implemented at 45 and 32 nm technology nodes. Delay and power dissipation performances are analyzed for various voltage levels at these technology nodes using Spice simulations. A significant reduction in delay and power dissipation are observed compared to a conventional repeater. The results show that the proposed high-speed low-power repeater has a reduced delay for higher load capacitance. The proposed repeater is also compared with LPTG CMOS repeater, and the results shows that the proposed repeater has reduced delay. The proposed repeater can be suitable for high-speed global interconnects and has the capacity to drive large loads.

Novel contact hole reticle design for enhanced lithography process window in IC manufacturing

NASA Astrophysics Data System (ADS)

Chang, Chung-Hsing

2005-01-01

For 90nm node generation, 65nm, and beyond, dark field mask types such as contact-hole, via, and trench patterns that all are very challenging to print with satisfactory process windows for day-to-day lithography manufacturing. Resolution enhancement technology (RET) masks together with ArF high numerical aperture (NA) scanners have been recognized as the inevitable choice of method for 65nm node manufacturing. Among RET mask types, the alternating phase shifting mask (AltPSM) is one of the well-known strong enhancement techniques. However AltPSM can have a very strong optical proximity effect that comes with the use of small on-axis illumination sigma setting. For very dense contact features, it may be possible for AltPSM to overcome the phase conflict by limiting the mask design rules. But it is not feasible to resolve the inherent phase conflict for the semi-dense, semi-isolated and isolated contact areas. Hence the adoption of this strong enhancement technique for dark filed mask types in today"s IC manufacturing has been very limited. In this paper, we present a novel yet a very powerful design method to achieve contact and via masks printing for 90nm, 65nm, and beyond. We name our new mask design as: Novel Improved Contact-hole pattern Exposure PSM (NICE PSM) with off-axis illumination, such as QUASAR. This RET masks design can enhance the process window of isolated, semi-isolated contact hole and via hole patterns. The main concepts of NICE PSM with QUASAR off-axis illumination are analogous to the Super-FLEX pupil filter technology.

Novel contact hole reticle design for enhanced lithography process window in IC manufacturing

NASA Astrophysics Data System (ADS)

Chang, Chung-Hsing

2004-10-01

For 90nm node generation, 65nm, and beyond, dark field mask types such as contact-hole, via, and trench patterns that all are very challenging to print with satisfactory process windows for day-to-day lithography manufacturing. Resolution enhancement technology (RET) masks together with ArF high numerical aperture (NA) scanners have been recognized as the inevitable choice of method for 65nm node manufacturing. Among RET mask types, the alternating phase shifting mask (AltPSM) is one of the well-known strong enhancement techniques. However, AltPSM can have a very strong optical proximity effect that comes with the use of small on-axis illumination sigma setting. For very dense contact features, it may be possible for AltPSM to overcome the phase conflict by limiting the mask design rules. But it is not feasible to resolve the inherent phase conflict for the semi-dense, semi-isolated and isolated contact areas. Hence the adoption of this strong enhancement technique for dark filed mask types in today"s IC manufacturing has been very limited. In this paper, we report a novel yet a very powerful design method to achieve contact and via masks printing for 90nm, 65nm, and beyond. We name our new mask design as: Novel Improved Contact-hole pattern Exposure PSM (NICE PSM) with off-axis illumination, such as QUASAR. This RET masks design can enhance the process window of isolated, semi-isolated contact hole and via hole patterns. The main concepts of NICE PSM with QUASAR off-axis illumination are analogous to the Super-FLEX pupil filter technology.

An investigation into scalability and compliance for triple patterning with stitches for metal 1 at the 14nm node

NASA Astrophysics Data System (ADS)

Cork, Christopher; Miloslavsky, Alexander; Friedberg, Paul; Luk-Pat, Gerry

2013-04-01

Lithographers had hoped that single patterning would be enabled at the 20nm node by way of EUV lithography. However, due to delays in EUV readiness, double patterning with 193i lithography is currently relied upon for volume production for the 20nm node's metal 1 layer. At the 14nm and likely at the 10nm node, LE-LE-LE triple patterning technology (TPT) is one of the favored options [1,2] for patterning local interconnect and Metal 1 layers. While previous research has focused on TPT for contact mask, metal layers offer new challenges and opportunities, in particular the ability to decompose design polygons across more than one mask. The extra flexibility offered by the third mask and ability to leverage polygon stitching both serve to improve compliance. However, ensuring TPT compliance - the task of finding a 3-color mask decomposition for a design - is still a difficult task. Moreover, scalability concerns multiply the difficulty of triple patterning decomposition which is an NP-complete problem. Indeed previous work shows that network sizes above a few thousand nodes or polygons start to take significantly longer times to compute [3], making full chip decomposition for arbitrary layouts impractical. In practice Metal 1 layouts can be considered as two separate problem domains, namely: decomposition of standard cells and decomposition of IP blocks. Standard cells typically include only a few 10's of polygons and should be amenable to fast decomposition. Successive design iterations should resolve compliance issues and improve packing density. Density improvements are multiplied repeatedly as standard cells are placed multiple times. IP blocks, on the other hand, may involve very large networks. This paper evaluates multiple approaches to triple patterning decomposition for the Metal 1 layer. The benefits of polygon stitching, in particular, the ability to resolve commonly encountered non-compliant layout configurations and improve packing density, are weighed against the increased difficulty in finding an optimized, legal decomposition and coping with the increased scalability challenges.

Self-aligned blocking integration demonstration for critical sub-30nm pitch Mx level patterning with EUV self-aligned double patterning

NASA Astrophysics Data System (ADS)

Raley, Angélique; Lee, Joe; Smith, Jeffrey T.; Sun, Xinghua; Farrell, Richard A.; Shearer, Jeffrey; Xu, Yongan; Ko, Akiteru; Metz, Andrew W.; Biolsi, Peter; Devilliers, Anton; Arnold, John; Felix, Nelson

2018-04-01

We report a sub-30nm pitch self-aligned double patterning (SADP) integration scheme with EUV lithography coupled with self-aligned block technology (SAB) targeting the back end of line (BEOL) metal line patterning applications for logic nodes beyond 5nm. The integration demonstration is a validation of the scalability of a previously reported flow, which used 193nm immersion SADP targeting a 40nm pitch with the same material sets (Si3N4 mandrel, SiO2 spacer, Spin on carbon, spin on glass). The multi-color integration approach is successfully demonstrated and provides a valuable method to address overlay concerns and more generally edge placement error (EPE) as a whole for advanced process nodes. Unbiased LER/LWR analysis comparison between EUV SADP and 193nm immersion SADP shows that both integrations follow the same trend throughout the process steps. While EUV SADP shows increased LER after mandrel pull, metal hardmask open and dielectric etch compared to 193nm immersion SADP, the final process performance is matched in terms of LWR (1.08nm 3 sigma unbiased) and is only 6% higher than 193nm immersion SADP for average unbiased LER. Using EUV SADP enables almost doubling the line density while keeping most of the remaining processes and films unchanged, and provides a compelling alternative to other multipatterning integrations, which present their own sets of challenges.

Diffraction based overlay and image based overlay on production flow for advanced technology node

NASA Astrophysics Data System (ADS)

Blancquaert, Yoann; Dezauzier, Christophe

2013-04-01

One of the main challenges for lithography step is the overlay control. For the advanced technology node like 28nm and 14nm, the overlay budget becomes very tight. Two overlay techniques compete in our advanced semiconductor manufacturing: the Diffraction based Overlay (DBO) with the YieldStar S200 (ASML) and the Image Based Overlay (IBO) with ARCHER (KLA). In this paper we will compare these two methods through 3 critical production layers: Poly Gate, Contact and first metal layer. We will show the overlay results of the 2 techniques, explore the accuracy and compare the total measurement uncertainty (TMU) for the standard overlay targets of both techniques. We will see also the response and impact for the Image Based Overlay and Diffraction Based Overlay techniques through a process change like an additional Hardmask TEOS layer on the front-end stack. The importance of the target design is approached; we will propose more adapted design for image based targets. Finally we will present embedded targets in the 14 FDSOI with first results.

Analysis method to determine and characterize the mask mean-to-target and uniformity specification

NASA Astrophysics Data System (ADS)

Lee, Sung-Woo; Leunissen, Leonardus H. A.; Van de Kerkhove, Jeroen; Philipsen, Vicky; Jonckheere, Rik; Lee, Suk-Joo; Woo, Sang-Gyun; Cho, Han-Ku; Moon, Joo-Tae

2006-06-01

The specification of the mask mean-to-target (MTT) and uniformity is related to functions as: mask error enhancement factor, dose sensitivity and critical dimension (CD) tolerances. The mask MTT shows a trade-off relationship with the uniformity. Simulations for the mask MTT and uniformity (M-U) are performed for LOGIC devices of 45 and 37 nm nodes according to mask type, illumination condition and illuminator polarization state. CD tolerances and after develop inspection (ADI) target CD's in the simulation are taken from the 2004 ITRS roadmap. The simulation results allow for much smaller tolerances in the uniformity and larger offsets in the MTT than the values as given in the ITRS table. Using the parameters in the ITRS table, the mask uniformity contributes to nearly 95% of total CDU budget for the 45 nm node, and is even larger than the CDU specification of the ITRS for the 37 nm node. We also compared the simulation requirements with the current mask making capabilities. The current mask manufacturing status of the mask uniformity is barely acceptable for the 45 nm node, but requires process improvements towards future nodes. In particular, for the 37 nm node, polarized illumination is necessary to meet the ITRS requirements. The current mask linearity deviates for pitches smaller than 300 nm, which is not acceptable even for the 45 nm node. More efforts on the proximity correction method are required to improve the linearity behavior.

The Reduction of TED in Ion Implanted Silicon

NASA Astrophysics Data System (ADS)

Jain, Amitabh

2008-11-01

The leading challenge in the continued scaling of junctions made by ion implantation and annealing is the control of the undesired transient enhanced diffusion (TED) effect. Spike annealing has been used as a means to reduce this effect and has proven successful in previous nodes. The peak temperature in this process is typically 1050 °C and the time spent within 50 °C of the peak is of the order of 1.5 seconds. As technology advances along the future scaling roadmap, further reduction or elimination of the enhanced diffusion effect is necessary. We have shown that raising the peak temperature to 1175 °C or more and reduction of the anneal time at peak temperature to less than a millisecond is effective in eliminating enhanced diffusion. We show that it is possible to employ a sequence of millisecond anneal followed by spike anneal to obtain profiles that do not exhibit gradient degradation at the junction and have junction depth and sheet resistance appropriate to the needs of future technology nodes. We have implemented millisecond annealing using a carbon dioxide laser to support high-volume manufacturing of 65 nm microprocessors and system-on-chip products. We further show how the use of molecular ion implantation to produce amorphousness followed by laser annealing to produce solid phase epitaxial regrowth results in junctions that meet the shallow depth and abruptness requirements of the 32 nm node.

Exact sampling of graphs with prescribed degree correlations

NASA Astrophysics Data System (ADS)

Bassler, Kevin E.; Del Genio, Charo I.; Erdős, Péter L.; Miklós, István; Toroczkai, Zoltán

2015-08-01

Many real-world networks exhibit correlations between the node degrees. For instance, in social networks nodes tend to connect to nodes of similar degree and conversely, in biological and technological networks, high-degree nodes tend to be linked with low-degree nodes. Degree correlations also affect the dynamics of processes supported by a network structure, such as the spread of opinions or epidemics. The proper modelling of these systems, i.e., without uncontrolled biases, requires the sampling of networks with a specified set of constraints. We present a solution to the sampling problem when the constraints imposed are the degree correlations. In particular, we develop an exact method to construct and sample graphs with a specified joint-degree matrix, which is a matrix providing the number of edges between all the sets of nodes of a given degree, for all degrees, thus completely specifying all pairwise degree correlations, and additionally, the degree sequence itself. Our algorithm always produces independent samples without backtracking. The complexity of the graph construction algorithm is {O}({NM}) where N is the number of nodes and M is the number of edges.

64nm pitch metal1 double patterning metrology: CD and OVL control by SEMCD, image based overlay and diffraction based overlay

NASA Astrophysics Data System (ADS)

Ducoté, Julien; Dettoni, Florent; Bouyssou, Régis; Le-Gratiet, Bertrand; Carau, Damien; Dezauzier, Christophe

2015-03-01

Patterning process control of advanced nodes has required major changes over the last few years. Process control needs of critical patterning levels since 28nm technology node is extremely aggressive showing that metrology accuracy/sensitivity must be finely tuned. The introduction of pitch splitting (Litho-Etch-Litho-Etch) at 14FDSOInm node requires the development of specific metrologies to adopt advanced process control (for CD, overlay and focus corrections). The pitch splitting process leads to final line CD uniformities that are a combination of the CD uniformities of the two exposures, while the space CD uniformities are depending on both CD and OVL variability. In this paper, investigations of CD and OVL process control of 64nm minimum pitch at Metal1 level of 14FDSOI technology, within the double patterning process flow (Litho, hard mask etch, line etch) are presented. Various measurements with SEMCD tools (Hitachi), and overlay tools (KT for Image Based Overlay - IBO, and ASML for Diffraction Based Overlay - DBO) are compared. Metrology targets are embedded within a block instanced several times within the field to perform intra-field process variations characterizations. Specific SEMCD targets were designed for independent measurement of both line CD (A and B) and space CD (A to B and B to A) for each exposure within a single measurement during the DP flow. Based on those measurements correlation between overlay determined with SEMCD and with standard overlay tools can be evaluated. Such correlation at different steps through the DP flow is investigated regarding the metrology type. Process correction models are evaluated with respect to the measurement type and the intra-field sampling.

A novel double patterning approach for 30nm dense holes

NASA Astrophysics Data System (ADS)

Hsu, Dennis Shu-Hao; Wang, Walter; Hsieh, Wei-Hsien; Huang, Chun-Yen; Wu, Wen-Bin; Shih, Chiang-Lin; Shih, Steven

2011-04-01

Double Patterning Technology (DPT) was commonly accepted as the major workhorse beyond water immersion lithography for sub-38nm half-pitch line patterning before the EUV production. For dense hole patterning, classical DPT employs self-aligned spacer deposition and uses the intersection of horizontal and vertical lines to define the desired hole patterns. However, the increase in manufacturing cost and process complexity is tremendous. Several innovative approaches have been proposed and experimented to address the manufacturing and technical challenges. A novel process of double patterned pillars combined image reverse will be proposed for the realization of low cost dense holes in 30nm node DRAM. The nature of pillar formation lithography provides much better optical contrast compared to the counterpart hole patterning with similar CD requirements. By the utilization of a reliable freezing process, double patterned pillars can be readily implemented. A novel image reverse process at the last stage defines the hole patterns with high fidelity. In this paper, several freezing processes for the construction of the double patterned pillars were tested and compared, and 30nm double patterning pillars were demonstrated successfully. A variety of different image reverse processes will be investigated and discussed for their pros and cons. An economic approach with the optimized lithography performance will be proposed for the application of 30nm DRAM node.

Electrical comparison of iN7 EUV hybrid and EUV single patterning BEOL metal layers

NASA Astrophysics Data System (ADS)

Larivière, Stéphane; Wilson, Christopher J.; Kutrzeba Kotowska, Bogumila; Versluijs, Janko; Decoster, Stefan; Mao, Ming; van der Veen, Marleen H.; Jourdan, Nicolas; El-Mekki, Zaid; Heylen, Nancy; Kesters, Els; Verdonck, Patrick; Béral, Christophe; Van den Heuvel, Dieter; De Bisschop, Peter; Bekaert, Joost; Blanco, Victor; Ciofi, Ivan; Wan, Danny; Briggs, Basoene; Mallik, Arindam; Hendrickx, Eric; Kim, Ryoung-han; McIntyre, Greg; Ronse, Kurt; Bömmels, Jürgen; Tőkei, Zsolt; Mocuta, Dan

2018-03-01

The semiconductor scaling roadmap shows the continuous node to node scaling to push Moore's law down to the next generations. In that context, the foundry N5 node requires 32nm metal pitch interconnects for the advanced logic Back- End of Line (BEoL). 193immersion usage now requires self-aligned and/or multiple patterning technique combinations to enable such critical dimension. On the other hand, EUV insertion investigation shows that 32nm metal pitch is still a challenge but, related to process flow complexity, presents some clear motivations. Imec has already evaluated on test chip vehicles with different patterning approaches: 193i SAQP (Self-Aligned Quadruple Patterning), LE3 (triple patterning Litho Etch), tone inversion, EUV SE (Single Exposure) with SMO (Source-mask optimization). Following the run path in the technology development for EUV insertion, imec N7 platform (iN7, corresponding node to the foundry N5) is developed for those BEoL layers. In this paper, following technical motivation and development learning, a comparison between the iArF SAQP/EUV block hybrid integration scheme and a single patterning EUV flow is proposed. These two integration patterning options will be finally compared from current morphological and electrical criteria.

Self-aligned block technology: a step toward further scaling

NASA Astrophysics Data System (ADS)

Lazzarino, Frédéric; Mohanty, Nihar; Feurprier, Yannick; Huli, Lior; Luong, Vinh; Demand, Marc; Decoster, Stefan; Vega Gonzalez, Victor; Ryckaert, Julien; Kim, Ryan Ryoung Han; Mallik, Arindam; Leray, Philippe; Wilson, Chris; Boemmels, Jürgen; Kumar, Kaushik; Nafus, Kathleen; deVilliers, Anton; Smith, Jeffrey; Fonseca, Carlos; Bannister, Julie; Scheer, Steven; Tokei, Zsolt; Piumi, Daniele; Barla, Kathy

2017-04-01

In this work, we present and compare two integration approaches to enable self-alignment of the block suitable for the 5- nm technology node. The first approach is exploring the insertion of a spin-on metal-based material to memorize the first block and act as an etch stop layer in the overall integration. The second approach is evaluating the self-aligned block technology employing widely used organic materials and well-known processes. The concept and the motivation are discussed considering the effects on design and mask count as well as the impact on process complexity and EPE budget. We show the integration schemes and discuss the requirements to enable self-alignment. We present the details of materials and processes selection to allow optimal selective etches and we demonstrate the proof of concept using a 16- nm half-pitch BEOL vehicle. Finally, a study on technology insertion and cost estimation is presented.

Modeling and characterization of shielded low loss CPWs on 65 nm node silicon

NASA Astrophysics Data System (ADS)

Hongrui, Wang; Dongxu, Yang; Li, Zhang; Lei, Zhang; Zhiping, Yu

2011-06-01

Coplanar waveguides (CPWs) are promising candidates for high quality passive devices in millimeter-wave frequency bands. In this paper, CPW transmission lines with and without ground shields have been designed and fabricated on 65 nm CMOS technology. A physical-based model is proposed to describe the frequency-dependent per-unit-length L, C, R and G parameters. Starting with a basic CPW structure, the slow-wave effect and ground-shield influence have been analyzed and incorporated into the general model. The accuracy of the model is confirmed by experimental results.

Self-aligned blocking integration demonstration for critical sub-40nm pitch Mx level patterning

NASA Astrophysics Data System (ADS)

Raley, Angélique; Mohanty, Nihar; Sun, Xinghua; Farrell, Richard A.; Smith, Jeffrey T.; Ko, Akiteru; Metz, Andrew W.; Biolsi, Peter; Devilliers, Anton

2017-04-01

Multipatterning has enabled continued scaling of chip technology at the 28nm node and beyond. Selfaligned double patterning (SADP) and self-aligned quadruple patterning (SAQP) as well as Litho- Etch/Litho-Etch (LELE) iterations are widely used in the semiconductor industry to enable patterning at sub 193 immersion lithography resolutions for layers such as FIN, Gate and critical Metal lines. Multipatterning requires the use of multiple masks which is costly and increases process complexity as well as edge placement error variation driven mostly by overlay. To mitigate the strict overlay requirements for advanced technology nodes (7nm and below), a self-aligned blocking integration is desirable. This integration trades off the overlay requirement for an etch selectivity requirement and enables the cut mask overlay tolerance to be relaxed from half pitch to three times half pitch. Selfalignement has become the latest trend to enable scaling and self-aligned integrations are being pursued and investigated for various critical layers such as contact, via, metal patterning. In this paper we propose and demonstrate a low cost flexible self-aligned blocking strategy for critical metal layer patterning for 7nm and beyond from mask assembly to low -K dielectric etch. The integration is based on a 40nm pitch SADP flow with 2 cut masks compatible with either cut or block integration and employs dielectric films widely used in the back end of the line. As a consequence this approach is compatible with traditional etch, deposition and cleans tools that are optimized for dielectric etches. We will review the critical steps and selectivities required to enable this integration along with bench-marking of each integration option (cut vs. block).

Research on high-efficiency polishing technology of photomask substrate

NASA Astrophysics Data System (ADS)

Zhao, Shijie; Xie, Ruiqing; Zhou, Lian; Liao, Defeng; Chen, Xianhua; Wang, Jian

2018-03-01

A method of photomask substrate fabrication is demonstrated ,that the surface figure and roughness of fused silica will converge to target precision rapidly with the full aperture polishing. Surface figure of optical flats in full aperture polishing processes is primarily dependent on the surface profile of polishing pad, therefor, a improved function of polishing mechanism was put forward based on two axis lapping machine and technology experience, and the pad testing based on displacement sensor and the active conditioning method of the pad is applied in this research. Moreover , the clamping deformation of the thin glass is solved by the new pitch dispensing method. The experimental results show that the surface figure of the 152mm×152mm×6.35mm optical glass is 0.25λ(λ=633nm) and the roughness is 0.32nm ,which has meet the requirements of mask substrate for 90 45nm nodes.

Integrated approach to improving local CD uniformity in EUV patterning

NASA Astrophysics Data System (ADS)

Liang, Andrew; Hermans, Jan; Tran, Timothy; Viatkina, Katja; Liang, Chen-Wei; Ward, Brandon; Chuang, Steven; Yu, Jengyi; Harm, Greg; Vandereyken, Jelle; Rio, David; Kubis, Michael; Tan, Samantha; Dusa, Mircea; Singhal, Akhil; van Schravendijk, Bart; Dixit, Girish; Shamma, Nader

2017-03-01

Extreme ultraviolet (EUV) lithography is crucial to enabling technology scaling in pitch and critical dimension (CD). Currently, one of the key challenges of introducing EUV lithography to high volume manufacturing (HVM) is throughput, which requires high source power and high sensitivity chemically amplified photoresists. Important limiters of high sensitivity chemically amplified resists (CAR) are the effects of photon shot noise and resist blur on the number of photons received and of photoacids generated per feature, especially at the pitches required for 7 nm and 5 nm advanced technology nodes. These stochastic effects are reflected in via structures as hole-to-hole CD variation or local CD uniformity (LCDU). Here, we demonstrate a synergy of film stack deposition, EUV lithography, and plasma etch techniques to improve LCDU, which allows the use of high sensitivity resists required for the introduction of EUV HVM. Thus, to improve LCDU to a level required by 5 nm node and beyond, film stack deposition, EUV lithography, and plasma etch processes were combined and co-optimized to enhance LCDU reduction from synergies. Test wafers were created by depositing a pattern transfer stack on a substrate representative of a 5 nm node target layer. The pattern transfer stack consisted of an atomically smooth adhesion layer and two hardmasks and was deposited using the Lam VECTOR PECVD product family. These layers were designed to mitigate hole roughness, absorb out-of-band radiation, and provide additional outlets for etch to improve LCDU and control hole CD. These wafers were then exposed through an ASML NXE3350B EUV scanner using a variety of advanced positive tone EUV CAR. They were finally etched to the target substrate using Lam Flex dielectric etch and Kiyo conductor etch systems. Metrology methodologies to assess dimensional metrics as well as chip performance and defectivity were investigated to enable repeatable patterning process development. Illumination conditions in EUV lithography were optimized to improve normalized image log slope (NILS), which is expected to reduce shot noise related effects. It can be seen that the EUV imaging contrast improvement can further reduce post-develop LCDU from 4.1 nm to 3.9 nm and from 2.8 nm to 2.6 nm. In parallel, etch processes were developed to further reduce LCDU, to control CD, and to transfer these improvements into the final target substrate. We also demonstrate that increasing post-develop CD through dose adjustment can enhance the LCDU reduction from etch. Similar trends were also observed in different pitches down to 40 nm. The solutions demonstrated here are critical to the introduction of EUV lithography in high volume manufacturing. It can be seen that through a synergistic deposition, lithography, and etch optimization, LCDU at a 40 nm pitch can be improved to 1.6 nm (3-sigma) in a target oxide layer and to 1.4 nm (3-sigma) at the photoresist layer.

How small can MOSFETs get?

NASA Astrophysics Data System (ADS)

Risch, Lothar

2001-10-01

Scaling of CMOS technology made possible the key appliances of our information technology society, like the PC, mobile communication, and the internet. Reduction of feature sizes for semiconductor devices continued according to Moore's law for the last 25 years in order to achieve higher integration densities, higher speed, lower power consumption, and lower costs. But now, as we approach the sub 100 nm regime, several roadblocks have been predicted for the next generations down to 35 nm. The latest ITRS roadmap 99 describes in detail the challenges which have to be addressed for the future CMOS technology nodes, regarding lithography, metallization, power dissipation, and circuit design. Also for the MOSFET, performance degradation is a big issue. Because this is not a limitation from basic physical laws, novel architectures for MOSFETs will be needed to improve again the electrical characteristics and thus pave the way to much smaller transistors than expected in the past. 25 nm CMOS seems to be feasible using very thin silicon substrates on insulator. Further improvements down to 10 nm are very likely with two gates for the control of the charge carriers. So, it is very likely that CMOS will not end with today's roadmap at 35 nm or even before, but may continue with non bulk devices and fully depleted channels. Finally, tunnelling from source to drain will set an end to the reduction of channel length, which is estimated to be below 5 nm.

Advanced optical imaging platform for CD metrology and defect review on 130-nm to 100-nm node reticles: an overview of preliminary results

NASA Astrophysics Data System (ADS)

Hourd, Andrew C.; Grimshaw, Anthony; Scheuring, Gerd; Gittinger, Christian; Brueck, Hans-Juergen; Chen, Shiuh-Bin; Chen, Parkson W.; Hartmann, Hans; Ordynskyy, Volodymyr; Jonckheere, Rik M.; Philipsen, Vicky; Schaetz, Thomas; Sommer, Karl

2002-08-01

Critical Dimension fidelity continues to be one of the key driving parameters defining photomask quality and printing performance. The present advanced optical CD metrology systems, operating at i-line, will very soon be challenged as viable tools owing to their restricted resolution and measurement linearity impact on the ability to produce repeatable measurements. Alternative measurement technologies such as CD-SEM and -AFM have started to appear, but are also not without tier concerns in the field of reticle CD metrology. This paper introduces a new optical metrology system (MueTec /) operating at DUV wavelength (248nm), which has been specifically designed to meet the resolution and measurement repeatability requirements of reticle manufacture at the 130nm and 100nm nodes. The system is based upon a specially designed mechanical-optical platform for maximum stability and very advanced optical, illumination, alignment and software systems. The at wavelength operation of this system also makes it an ideal platform for defect printability analysis and review. The system is currently part of a European Commission funded assessment project (IST-2000-28086: McD'OR) to develop a testing strategy to verify the system performance, agree on equipment specifications and demonstrate its capability on advanced production reticles - including long-term reliability. It is the preliminary results from this evaluation that are presented here.

Megasonic cleaning strategy for sub-10nm photomasks

NASA Astrophysics Data System (ADS)

Hsu, Jyh-Wei; Samayoa, Martin; Dress, Peter; Dietze, Uwe; Ma, Ai-Jay; Lin, Chia-Shih; Lai, Rick; Chang, Peter; Tuo, Laurent

2016-10-01

One of the main challenges in photomask cleaning is balancing particle removal efficiency (PRE) with pattern damage control. To overcome this challenge, a high frequency megasonic cleaning strategy is implemented. Apart from megasonic frequency and power, photomask surface conditioning also influences cleaning performance. With improved wettability, cleanliness is enhanced while pattern damage risk is simultaneously reduced. Therefore, a particle removal process based on higher megasonic frequencies, combined with proper surface pre-treatment, provides improved cleanliness without the unintended side effects of pattern damage, thus supporting the extension of megasonic cleaning technology into 10nm half pitch (hp) device node and beyond.

Imaging performance and challenges of 10nm and 7nm logic nodes with 0.33 NA EUV

NASA Astrophysics Data System (ADS)

van Setten, Eelco; Schiffelers, Guido; Psara, Eleni; Oorschot, Dorothe; Davydova, Natalia; Finders, Jo; Depre, Laurent; Farys, Vincent

2014-10-01

The NXE:3300B is ASML's third generation EUV system and has an NA of 0.33 and is positioned at a resolution of 22nm, which can be extended down to 18nm and below with off-axis illumination at full transmission. Multiple systems have been qualified and installed at customers. The NXE:3300B succeeds the NXE:3100 system (NA of 0.25), which has allowed customers to gain valuable EUV experience. It is expected that EUV will be adopted first for critical Logic layers at 10nm and 7nm nodes, such as Metal-1, to avoid the complexity of triple patterning schemes using ArF immersion. In this paper we will evaluate the imaging performance of (sub-)10nm node Logic M1 on the NXE:3300B EUV scanner. We will show the line-end performance of tip-to-tip and tip-to-space test features for various pitches and illumination settings and the performance enhancement obtained by means of a 1st round of OPC. We will also show the magnitude of local variations. The Logic M1 cell is evaluated at various critical features to identify hot spots. A 2nd round OPC model was calibrated of which we will show the model accuracy and ability to predict hot spots in the Logic M1 cell. The calibrated OPC model is used to predict the expected performance at 7nm node Logic using off-axis illumination at 16nm minimum half pitch. Initial results of L/S exposed on the NXE:3300B at 7nm node resolutions will be shown. An outlook is given to future 0.33 NA systems on the ASML roadmap with enhanced illuminator capabilities to further improve performance and process window.

Patterning and templating for nanoelectronics.

PubMed

Galatsis, Kosmas; Wang, Kang L; Ozkan, Mihri; Ozkan, Cengiz S; Huang, Yu; Chang, Jane P; Monbouquette, Harold G; Chen, Yong; Nealey, Paul; Botros, Youssry

2010-02-09

The semiconductor industry will soon be launching 32 nm complementary metal oxide semiconductor (CMOS) technology node using 193 nm lithography patterning technology to fabricate microprocessors with more than 2 billion transistors. To ensure the survival of Moore's law, alternative patterning techniques that offer advantages beyond conventional top-down patterning are aggressively being explored. It is evident that most alternative patterning techniques may not offer compelling advantages to succeed conventional top-down lithography for silicon integrated circuits, but alternative approaches may well indeed offer functional advantages in realising next-generation information processing nanoarchitectures such as those based on cellular, bioinsipired, magnetic dot logic, and crossbar schemes. This paper highlights and evaluates some patterning methods from the Center on Functional Engineered Nano Architectonics in Los Angeles and discusses key benchmarking criteria with respect to CMOS scaling.

Integration of Photo-Patternable Low-κ Material into Advanced Cu Back-End-Of-The-Line

NASA Astrophysics Data System (ADS)

Lin, Qinghuang; Nelson, Alshakim; Chen, Shyng-Tsong; Brock, Philip; Cohen, Stephan A.; Davis, Blake; Kaplan, Richard; Kwong, Ranee; Liniger, Eric; Neumayer, Debra; Patel, Jyotica; Shobha, Hosadurga; Sooriyakumaran, Ratnam; Purushothaman, Sampath; Miller, Robert; Spooner, Terry; Wisnieff, Robert

2010-05-01

We report herein the demonstration of a simple, low-cost Cu back-end-of-the-line (BEOL) dual-damascene integration using a novel photo-patternable low-κ dielectric material concept that dramatically reduces Cu BEOL integration complexity. This κ=2.7 photo-patternable low-κ material is based on the SiCOH-based material platform and has sub-200 nm resolution capability with 248 nm optical lithography. Cu/photo-patternable low-κ dual-damascene integration at 45 nm node BEOL fatwire levels has been demonstrated with very high electrical yields using the current manufacturing infrastructure. The photo-patternable low-κ concept is, therefore, a promising technology for highly efficient semiconductor Cu BEOL manufacturing.

Lithographic qualification of high-transmission mask blank for 10nm node and beyond

NASA Astrophysics Data System (ADS)

Xu, Yongan; Faure, Tom; Viswanathan, Ramya; Lobb, Granger; Wistrom, Richard; Burns, Sean; Hu, Lin; Graur, Ioana; Bleiman, Ben; Fischer, Dan; Mignot, Yann; Sakamoto, Yoshifumi; Toda, Yusuke; Bolton, John; Bailey, Todd; Felix, Nelson; Arnold, John; Colburn, Matthew

2016-04-01

In this paper, we discuss the lithographic qualification of high transmission (High T) mask for Via and contact hole applications in 10nm node and beyond. First, the simulated MEEF and depth of focus (DoF) data are compared between the 6% and High T attnPSM masks with the transmission of High T mask blank varying from 12% to 20%. The 12% High T blank shows significantly better MEEF and larger DoF than those of 6% attnPSM mask blank, which are consistent with our wafer data. However, the simulations show no obvious advantage in MEEF and DoF when the blank transmittance is larger than 12%. From our wafer data, it has been seen that the common process window from High T mask is 40nm bigger than that from the 6% attnPSM mask. In the elongated bar structure with smaller aspect ratio, 1.26, the 12% High T mask shows significantly less develop CD pull back in the major direction. Compared to the High T mask, the optimized new illumination condition for 6% attnPSM shows limited improvement in MEEF and the DoF through pitch. In addition, by using the High T mask blank, we have also investigated the SRAF printing, side lobe printing and the resist profile through cross sections, and no patterning risk has been found for manufacturing. As part of this work new 12% High T mask blank materials and processes were developed, and a brief overview of key mask technology development results have been shared. Overall, it is concluded that the High T mask, 12% transmission, provides the most robust and extendable lithographic solution for 10nm node and beyond.

ILP-based co-optimization of cut mask layout, dummy fill, and timing for sub-14nm BEOL technology

NASA Astrophysics Data System (ADS)

Han, Kwangsoo; Kahng, Andrew B.; Lee, Hyein; Wang, Lutong

2015-10-01

Self-aligned multiple patterning (SAMP), due to its low overlay error, has emerged as the leading option for 1D gridded back-end-of-line (BEOL) in sub-14nm nodes. To form actual routing patterns from a uniform "sea of wires", a cut mask is needed for line-end cutting or realization of space between routing segments. Constraints on cut shapes and minimum cut spacing result in end-of-line (EOL) extensions and non-functional (i.e. dummy fill) patterns; the resulting capacitance and timing changes must be consistent with signoff performance analyses and their impacts should be minimized. In this work, we address the co-optimization of cut mask layout, dummy fill, and design timing for sub-14nm BEOL design. Our central contribution is an optimizer based on integer linear programming (ILP) to minimize the timing impact due to EOL extensions, considering (i) minimum cut spacing arising in sub-14nm nodes; (ii) cut assignment to different cut masks (color assignment); and (iii) the eligibility to merge two unit-size cuts into a bigger cut. We also propose a heuristic approach to remove dummy fills after the ILP-based optimization by extending the usage of cut masks. Our heuristic can improve critical path performance under minimum metal density and mask density constraints. In our experiments, we study the impact of number of cut masks, minimum cut spacing and metal density under various constraints. Our studies of optimized cut mask solutions in these varying contexts give new insight into the tradeoff of performance and cost that is afforded by cut mask patterning technology options.

Sentinel Node Mapping Using a Fluorescent Dye and Visible Light During Laparoscopic Gastrectomy for Early Gastric Cancer: Result of a Prospective Study From a Single Institute.

PubMed

Lee, Chang Min; Park, Sungsoo; Park, Seong-Heum; Jung, Sung Woo; Choe, Jung Wan; Sul, Ji-Young; Jang, You Jin; Mok, Young-Jae; Kim, Jong-Han

2017-04-01

The aim of this study was to investigate the feasibility of sentinel node mapping using a fluorescent dye and visible light in patients with gastric cancer. Recently, fluorescent imaging technology offers improved visibility with the possibility of better sensitivity or accuracy in sentinel node mapping. Twenty patients with early gastric cancer, for whom laparoscopic distal gastrectomy with standard lymphadenectomy had been planned, were enrolled in this study. Before lymphadenectomy, the patients received a gastrofiberoscopic peritumoral injection of fluorescein solution. The sentinel basin was investigated via laparoscopic fluorescent imaging under blue light (wavelength of 440-490 nm) emitted from an LED curing light. The detection rate and lymph node status were analyzed in the enrolled patients. In addition, short-term clinical outcomes were also investigated. No hypersensitivity to the dye was identified in any enrolled patients. Sentinel nodes were detected in 19 of 20 enrolled patients (95.0%), and metastatic lymph nodes were found in 2 patients. The latter lymph nodes belonged to the sentinel basin of each patient. Meanwhile, 1 patient (5.0%) experienced a postoperative complication that was unrelated to sentinel node mapping. No mortality was recorded among enrolled cases. Sentinel node mapping with visible light fluorescence was a feasible method for visualizing sentinel nodes in patients with early gastric cancer. In addition, this method is advantageous in terms of visualizing the concrete relationship between the sentinel nodes and surrounding structures.

EUV process establishment through litho and etch for N7 node

NASA Astrophysics Data System (ADS)

Kuwahara, Yuhei; Kawakami, Shinichiro; Kubota, Minoru; Matsunaga, Koichi; Nafus, Kathleen; Foubert, Philippe; Mao, Ming

2016-03-01

Extreme ultraviolet lithography (EUVL) technology is steadily reaching high volume manufacturing for 16nm half pitch node and beyond. However, some challenges, for example scanner availability and resist performance (resolution, CD uniformity (CDU), LWR, etch behavior and so on) are remaining. Advance EUV patterning on the ASML NXE:3300/ CLEAN TRACK LITHIUS Pro Z- EUV litho cluster is launched at imec, allowing for finer pitch patterns for L/S and CH. Tokyo Electron Ltd. and imec are continuously collabo rating to develop manufacturing quality POR processes for NXE:3300. TEL's technologies to enhance CDU, defectivity and LWR/LER can improve patterning performance. The patterning is characterized and optimized in both litho and etch for a more complete understanding of the final patterning performance. This paper reports on post-litho CDU improvement by litho process optimization and also post-etch LWR reduction by litho and etch process optimization.

Simulations of Scatterometry Down to 22 nm Structure Sizes and Beyond with Special Emphasis on LER

NASA Astrophysics Data System (ADS)

Osten, W.; Ferreras Paz, V.; Frenner, K.; Schuster, T.; Bloess, H.

2009-09-01

In recent years, scatterometry has become one of the most commonly used methods for CD metrology. With decreasing structure size for future technology nodes, the search for optimized scatterometry measurement configurations gets more important to exploit maximum sensitivity. As widespread industrial scatterometry tools mainly still use a pre-set measurement configuration, there are still free parameters to improve sensitivity. Our current work uses a simulation based approach to predict and optimize sensitivity of future technology nodes. Since line edge roughness is getting important for such small structures, these imperfections of the periodic continuation cannot be neglected. Using fourier methods like e.g. rigorous coupled wave approach (RCWA) for diffraction calculus, nonperiodic features are hard to reach. We show that in this field certain types of fieldstitching methods show nice numerical behaviour and lead to useful results.

Design intent optimization at the beyond 7nm node: the intersection of DTCO and EUVL stochastic mitigation techniques

NASA Astrophysics Data System (ADS)

Crouse, Michael; Liebmann, Lars; Plachecki, Vince; Salama, Mohamed; Chen, Yulu; Saulnier, Nicole; Dunn, Derren; Matthew, Itty; Hsu, Stephen; Gronlund, Keith; Goodwin, Francis

2017-03-01

The initial readiness of EUV patterning was demonstrated in 2016 with IBM Alliance's 7nm device technology. The focus has now shifted to driving the 'effective' k1 factor and enabling the second generation of EUV patterning. Thus, Design Technology Co-optimization (DTCO) has become a critical part of technology enablement as scaling has become more challenging and the industry pushes the limits of EUV lithography. The working partnership between the design teams and the process development teams typically involves an iterative approach to evaluate the manufacturability of proposed designs, subsequent modifications to those designs and finally a design manual for the technology. While this approach has served the industry well for many generations, the challenges at the Beyond 7nm node require a more efficient approach. In this work, we describe the use of "Design Intent" lithographic layout optimization where we remove the iterative component of DTCO and replace it with an optimization that achieves both a "patterning friendly" design and minimizes the well-known EUV stochastic effects. Solved together, this "design intent" approach can more quickly achieve superior lithographic results while still meeting the original device's functional specifications. Specifically, in this work we will demonstrate "design intent" optimization for critical BEOL layers using design tolerance bands to guide the source mask co-optimization. The design tolerance bands can be either supplied as part of the original design or derived from some basic rules. Additionally, the EUV stochastic behavior is mitigated by enhancing the image log slope (ILS) for specific key features as part of the overall optimization. We will show the benefit of the "design intent approach" on both bidirectional and unidirectional 28nm min pitch standard logic layouts and compare the more typical iterative SMO approach. Thus demonstrating the benefit of allowing the design to float within the specified range. Lastly, we discuss how the evolution of this approach could lead to layout optimization based entirely on some minimal set of functional requirements and process constraints.

Nanoindentation investigation of HfO2 and Al2O3 films grown by atomic layer deposition

Treesearch

K. Tapily; Joseph E. Jakes; D. S. Stone; P. Shrestha; D. Gu; H. Baumgart; A. A. Elmustafa

2008-01-01

The challenges of reducing gate leakage current and dielectric breakdown beyond the 45 nm technology node have shifted engineers’ attention from the traditional and proven dielectric SiO2 to materials of higher dielectric constant also known as high-k materials such as hafnium oxide (HfO2) and aluminum oxide (Al2O3). These high-k materials are projected to...

Diamonds in the rough: key performance indicators for reticles and design sets

NASA Astrophysics Data System (ADS)

Ackmann, Paul

2008-10-01

The discussion on reticle cost continues to raise questions by many in the semiconductor industry. The diamond industry developed a method to judge and grade diamonds. [1, 11] The diamond-marketing tool of "The 4Cs of Diamonds" and other slogans help explain the multiple, complex variables that determine the value of a particular stone. Understanding the critical factors of Carat, Clarity, Color, and Cut allows all customers to choose a gem that matches their unique desires. I apply the same principles of "The 4Cs of Diamonds" to develop an analogous method for rating and tracking reticle performance. I introduced the first 3Cs of reticle manufacturing during my BACUS presentation panel at SPIE in February 2008. [2] To these first 3Cs (Capital, Complexity, and Content), I now add a fourth, Cycle time. I will look at how our use of reticles changes by node and use "The 4Cs of Reticles" to develop the key performance indicators (KPI) that will help our industry set standards for evaluating reticle technology. Capital includes both cost and utilization. This includes tools, people, facilities, and support systems required for building the most critical reticles. Tools have highest value in the first two years of use, and each new technology node will likely increase the Capital cost of reticles. New technologies, specifications, and materials drive Complexity for reticles, including smaller feature size, increased optical proximity correction (OPC), and more levels at sub-wavelength. The large data files needed to create finer features require the use of the newest tools for writing, inspection, and repair. Content encompasses the customer's specifications and requirements, which the mask shop must meet. The specifications are critical because they drive wafer yield. A clear increase of the number of masking levels has occurred since the 90 nm node. Cycle time starts when the design is finished and lasts until the mask house ships the reticle to the fab. Depending on the level of Complexity, a reticle can take from as few as one, to more than forty, days to build. By using the 4Cs, I can show how the reticle build has changed from the 90 nm technology node. I will begin by delineating proposed KPIs for reticles.

Mask etcher data strategy for 45nm and beyond

NASA Astrophysics Data System (ADS)

Lewington, Richard; Ibrahim, Ibrahim M.; Panayil, Sheeba; Kumar, Ajay; Yamartino, John

2006-05-01

Mask Etching for the 45nm technology node and beyond requires a system-level data and diagnostics strategy. This necessity stems from the need to control the performance of the mask etcher to increasingly stringent and diverse requirements of the mask production environment. Increasing mask costs and the capability to acquire and consolidate a wealth of data within the mask etch platform are primary motivators towards harnessing data mines for feedback into the mask etching optimization. There are offline and real-time possibilities and scenarios. Here, we discuss the data architecture, acquisition, and strategies of the Applied Materials Tetra II TM Mask Etch System.

Manufacturing of ArF chromeless hard shifter for 65-nm technology

NASA Astrophysics Data System (ADS)

Park, Keun-Taek; Dieu, Laurent; Hughes, Greg P.; Green, Kent G.; Croffie, Ebo H.; Taravade, Kunal N.

2003-12-01

For logic design, Chrome-less Phase Shift Mask is one of the possible solutions for defining small geometry with low MEF (mask enhancement factor) for the 65nm node. There have been lots of dedicated studies on the PCO (Phase Chrome Off-axis) mask technology and several design approaches have been proposed including grating background, chrome patches (or chrome shield) for applying PCO on line/space and contact pattern. In this paper, we studied the feasibility of grating design for line and contact pattern. The design of the grating pattern was provided from the EM simulation software (TEMPEST) and the aerial image simulation software. AIMS measurements with high NA annular illumination were done. Resist images were taken on designed pattern in different focus. Simulations, AIMS are compared to verify the consistency of the process with wafer printed performance.

Sensitivity enhancement of chemically amplified resists and performance study using EUV interference lithography

NASA Astrophysics Data System (ADS)

Buitrago, Elizabeth; Nagahara, Seiji; Yildirim, Oktay; Nakagawa, Hisashi; Tagawa, Seiichi; Meeuwissen, Marieke; Nagai, Tomoki; Naruoka, Takehiko; Verspaget, Coen; Hoefnagels, Rik; Rispens, Gijsbert; Shiraishi, Gosuke; Terashita, Yuichi; Minekawa, Yukie; Yoshihara, Kosuke; Oshima, Akihiro; Vockenhuber, Michaela; Ekinci, Yasin

2016-03-01

Extreme ultraviolet lithography (EUVL, λ = 13.5 nm) is the most promising candidate to manufacture electronic devices for future technology nodes in the semiconductor industry. Nonetheless, EUVL still faces many technological challenges as it moves toward high-volume manufacturing (HVM). A key bottleneck from the tool design and performance point of view has been the development of an efficient, high power EUV light source for high throughput production. Consequently, there has been extensive research on different methodologies to enhance EUV resist sensitivity. Resist performance is measured in terms of its ultimate printing resolution, line width roughness (LWR), sensitivity (S or best energy BE) and exposure latitude (EL). However, there are well-known fundamental trade-off relationships (LRS trade-off) among these parameters for chemically amplified resists (CARs). Here we present early proof-of-principle results for a multi-exposure lithography process that has the potential for high sensitivity enhancement without compromising other important performance characteristics by the use of a Photosensitized Chemically Amplified Resist (PSCAR). With this method, we seek to increase the sensitivity by combining a first EUV pattern exposure with a second UV flood exposure (λ = 365 nm) and the use of a PSCAR. In addition, we have evaluated over 50 different state-of-the-art EUV CARs. Among these, we have identified several promising candidates that simultaneously meet sensitivity, LWR and EL high performance requirements with the aim of resolving line space (L/S) features for the 7 and 5 nm logic node (16 nm and 13 nm half-pitch HP, respectively) for HVM. Several CARs were additionally found to be well resolved down to 12 nm and 11 nm HP with minimal pattern collapse and bridging, a remarkable feat for CARs. Finally, the performance of two negative tone state-of-the-art alternative resist platforms previously investigated was compared to the CAR performance at and below 16 nm HP resolution, demonstrating the need for alternative resist solutions at 13 nm resolution and below. EUV interference lithography (IL) has provided and continues to provide a simple yet powerful platform for academic and industrial research enabling the characterization and development of new resist materials before commercial EUV exposure tools become available. Our experiments have been performed at the EUV-IL set-up in the Swiss Light Source (SLS) synchrotron facility located at the Paul Scherrer Institute (PSI).

Progress on EUV mask fabrication for 32-nm technology node and beyond

NASA Astrophysics Data System (ADS)

Zhang, Guojing; Yan, Pei-Yang; Liang, Ted; Park, Seh-jin; Sanchez, Peter; Shu, Emily Y.; Ultanir, Erdem A.; Henrichs, Sven; Stivers, Alan; Vandentop, Gilroy; Lieberman, Barry; Qu, Ping

2007-05-01

Extreme ultraviolet lithography (EUVL) tool development achieved a big milestone last year as two full-field Alpha Demo Tools (ADT) were shipped to customers by ASML. In the future horizon, a full field "EUV1" exposure tool from Nikon will be available by the end of 20071 and the pre-production EUV exposure tools from ASML are targeted for 20092. It is essential that high quality EUVL masks can be made and delivered to the EUVL tool users to support the technology development. In the past year, we have demonstrated mask fabrication with low stress absorber deposition and good etch process control yielding a vertical etch profile and a mask CD control of 5.7 nm for 32 nm (1x) space and 7.4 nm for 32 nm (1x) lines. Mask pattern resolution of 15 nm (1x) dense lines was achieved. Full field reflective mask die-to-die inspection at a 125nm pixel size was demonstrated after low defect multilayer blanks became available. In this paper, we will present details of the Intel EUVL Mask Pilot Line progress in EUVL mask defect reduction, pattern CD performance, program defect mask design and inspection, in-house absorber film development and its performance, and EUVL metrology tool development. We will demonstrate an overall improvement in EUV mask manufacturing readiness due to our Pilot Line activities.

Evaluating practical vs. theoretical inspection system capability with a new programmed defect test mask designed for 3X and 4X technology nodes

NASA Astrophysics Data System (ADS)

Glasser, Joshua; Pratt, Tim

2008-10-01

Programmed defect test masks serve the useful purpose of evaluating inspection system sensitivity and capability. It is widely recognized that when evaluating inspection system capability, it is important to understand the actual sensitivity of the inspection system in production; yet unfortunately we have observed that many test masks are a more accurate judge of theoretical sensitivity rather than real-world usable capability. Use of ineffective test masks leave the purchaser of inspection equipment open to the risks of over-estimating the capability of their inspection solution and overspecifying defect sensitivity to their customers. This can result in catastrophic yield loss for device makers. In this paper we examine some of the lithography-related technology advances which place an increasing burden on mask inspection complexity, such as MEEF, defect printability estimation, aggressive OPC, double patterning, and OPC jogs. We evaluate the key inspection system component contributors to successful mask inspection, including what can "go wrong" with these components. We designed and fabricated a test mask which both (a) more faithfully represents actual production use cases; and (b) stresses the key components of the inspection system. This mask's patterns represent 32nm, 36nm, and 45nm logic and memory technology including metal and poly like background patterns with programmed defects. This test mask takes into consideration requirements of advanced lithography, such as MEEF, defect printability, assist features, nearly-repetitive patterns, and data preparation. This mask uses patterns representative of 32nm, 36nm, and 45nm logic, flash, and DRAM technology. It is specifically designed to have metal and poly like background patterns with programmed defects. The mask is complex tritone and was designed for annular immersion lithography.

Demonstration of lithography patterns using reflective e-beam direct write

NASA Astrophysics Data System (ADS)

Freed, Regina; Sun, Jeff; Brodie, Alan; Petric, Paul; McCord, Mark; Ronse, Kurt; Haspeslagh, Luc; Vereecke, Bart

2011-04-01

Traditionally, e-beam direct write lithography has been too slow for most lithography applications. E-beam direct write lithography has been used for mask writing rather than wafer processing since the maximum blur requirements limit column beam current - which drives e-beam throughput. To print small features and a fine pitch with an e-beam tool requires a sacrifice in processing time unless one significantly increases the total number of beams on a single writing tool. Because of the uncertainty with regards to the optical lithography roadmap beyond the 22 nm technology node, the semiconductor equipment industry is in the process of designing and testing e-beam lithography tools with the potential for high volume wafer processing. For this work, we report on the development and current status of a new maskless, direct write e-beam lithography tool which has the potential for high volume lithography at and below the 22 nm technology node. A Reflective Electron Beam Lithography (REBL) tool is being developed for high throughput electron beam direct write maskless lithography. The system is targeting critical patterning steps at the 22 nm node and beyond at a capital cost equivalent to conventional lithography. Reflective Electron Beam Lithography incorporates a number of novel technologies to generate and expose lithographic patterns with a throughput and footprint comparable to current 193 nm immersion lithography systems. A patented, reflective electron optic or Digital Pattern Generator (DPG) enables the unique approach. The Digital Pattern Generator is a CMOS ASIC chip with an array of small, independently controllable lens elements (lenslets), which act as an array of electron mirrors. In this way, the REBL system is capable of generating the pattern to be written using massively parallel exposure by ~1 million beams at extremely high data rates (~ 1Tbps). A rotary stage concept using a rotating platen carrying multiple wafers optimizes the writing strategy of the DPG to achieve the capability of high throughput for sparse pattern wafer levels. The lens elements on the DPG are fabricated at IMEC (Leuven, Belgium) under IMEC's CMORE program. The CMOS fabricated DPG contains ~ 1,000,000 lens elements, allowing for 1,000,000 individually controllable beamlets. A single lens element consists of 5 electrodes, each of which can be set at controlled voltage levels to either absorb or reflect the electron beam. A system using a linear movable stage and the DPG integrated into the electron optics module was used to expose patterns on device representative wafers. Results of these exposure tests are discussed.

The way to zeros: The future of semiconductor device and chemical mechanical polishing technologies

NASA Astrophysics Data System (ADS)

Tsujimura, Manabu

2016-06-01

For the last 60 years, the development of cutting-edge semiconductor devices has strongly emphasized scaling; the effort to scale down current CMOS devices may well achieve the target of 5 nm nodes by 2020. Planarization by chemical mechanical polishing (CMP), is one technology essential for supporting scaling. This paper summarizes the history of CMP transitions in the planarization process as well as the changing degree of planarity required, and, finally, introduces innovative technologies to meet the requirements. The use of CMP was triggered by the replacement of local oxidation of silicon (LOCOS) as the element isolation technology by shallow trench isolation (STI) in the 1980s. Then, CMP’s use expanded to improving embedability of aluminum wiring, tungsten (W) contacts, Cu wiring, and, more recently, to its adoption in high-k metal gate (HKMG) and FinFET (FF) processes. Initially, the required degree of planarity was 50 nm, but now 0 nm is required. Further, zero defects on a post-CMP wafer is now the goal, and it is possible that zero psi CMP loading pressure will be required going forward. Soon, it seems, everything will have to be “zero” and perfect. Although the process is also chemical in nature, the CMP process is actually mechanical with a load added using slurry particles several tens of nm in diameter. Zero load in the loading process, zero nm planarity with no trace of processing, and zero residual foreign material, including the very slurry particles used in the process, are all required. This article will provide an overview of how to achieve these new requirements and what technologies should be employed.

EXTATIC: ASML's α-tool development for EUVL

NASA Astrophysics Data System (ADS)

Meiling, Hans; Benschop, Jos P.; Hartman, Robert A.; Kuerz, Peter; Hoghoj, Peter; Geyl, Roland; Harned, Noreen

2002-07-01

Within the recently initiated EXTATIC project a complete full-field lithography exposure tool for he 50-nm technology node is being developed. The goal is to demonstrate the feasibility of extreme UV lithography (EUVL) for 50-nm imaging and to reduce technological risks in the development of EUVL production tools. We describe the EUV MEDEA+) framework in which EXTATIC is executed, and give an update on the status of the (alpha) -tool development. A brief summary of our in-house source-collector module development is given, as well as the general vacuum architecture of the (alpha) -tool is discussed. We discuss defect-free reticle handling, and investigated the uses of V-grooved brackets glued to the side of the reticle to reduce particle generation during takeovers. These takeovers do not only occur in the exposure tool, but also in multilayer deposition equipment, e-beam pattern writers, inspection tools, etc., where similar requirements on particle contamination are present. Finally, we present an update of mirror fabrication technology and show improved mirror figuring and finishing results.

Effects of ultra-thin Si-fin body widths upon SOI PMOS FinFETs

NASA Astrophysics Data System (ADS)

Liaw, Yue-Gie; Chen, Chii-Wen; Liao, Wen-Shiang; Wang, Mu-Chun; Zou, Xuecheng

2018-05-01

Nano-node tri-gate FinFET devices have been developed after integrating a 14 Å nitrided gate oxide upon the silicon-on-insulator (SOI) wafers established on an advanced CMOS logic platform. These vertical double gate (FinFET) devices with ultra-thin silicon fin (Si-fin) widths ranging from 27 nm to 17 nm and gate length down to 30 nm have been successfully developed with a 193 nm scanner lithography tool. Combining the cobalt fully silicidation and the CESL strain technology beneficial for PMOS FinFETs was incorporated into this work. Detailed analyses of Id-Vg characteristics, threshold voltage (Vt), and drain-induced barrier lowering (DIBL) illustrate that the thinnest 17 nm Si-fin width FinFET exhibits the best gate controllability due to its better suppression of short channel effect (SCE). However, higher source/drain resistance (RSD), channel mobility degradation due to dry etch steps, or “current crowding effect” will slightly limit its transconductance (Gm) and drive current.

Initial benchmarking of a new electron-beam raster pattern generator for 130-100 nm maskmaking

NASA Astrophysics Data System (ADS)

Sauer, Charles A.; Abboud, Frank E.; Babin, Sergey V.; Chakarian, Varoujan; Ghanbari, Abe; Innes, Robert; Trost, David; Raymond, Frederick, III

2000-07-01

The decision by the Semiconductor Industry Association (SIA) to accelerate the continuing evolution to smaller linewidths is consistent with the commitment by Etec Systems, Inc. to rapidly develop new technologies for pattern generation systems with improved resolution, critical dimension (CD) uniformity, positional accuracy, and throughput. Current pattern generation designs are inadequate to meet the more advanced requirements for masks, particularly at or below the 100 nm node. Major changes to all pattern generation tools will be essential to meet future market requirements. An electron-beam (e-beam) system that is designed to meet the challenges for 130 - 100 nm device generation with extendibility to the 70-nm range will be discussed. This system has an architecture that includes a graybeam writing strategy, a new state system, and improved thermal management. Detailed changes include a pulse width modulated blanking system, per-pixel deflection, retrograde scanning multipass writing, and a column with a 50 kV accelerating voltage that supports a dose of up to 45 (mu) C/cm2 with minimal amounts of resist heating. This paper examines current issues, our approach to meeting International Technology Roadmap for Semiconductors (ITRS) requirements, and some preliminary results from a new pattern generator.

Challenges in process marginality for advanced technology nodes and tackling its contributors

NASA Astrophysics Data System (ADS)

Narayana Samy, Aravind; Schiwon, Roberto; Seltmann, Rolf; Kahlenberg, Frank; Katakamsetty, Ushasree

2013-10-01

Process margin is getting critical in the present node shrinkage scenario due to the physical limits reached (Rayleigh's criterion) using ArF lithography tools. K1 is used to its best for better resolution and to enhance the process margin (28nm metal patterning k1=0.31). In this paper, we would like to give an overview of various contributors in the advanced technology nodes which limit the process margins and how the challenges have been tackled in a modern foundry model. Advanced OPC algorithms are used to make the design content at the mask optimum for patterning. However, as we work at the physical limit, critical features (Hot-spots) are very susceptible to litho process variations. Furthermore, etch can have a significant impact as well. Pattern that still looks healthy at litho can fail due to etch interactions. This makes the traditional 2D contour output from ORC tools not able to predict accurately all defects and hence not able to fully correct it in the early mask tapeout phase. The above makes a huge difference in the fast ramp-up and high yield in a competitive foundry market. We will explain in this paper how the early introduction of 3D resist model based simulation of resist profiles (resist top-loss, bottom bridging, top-rounding, etc.,) helped in our prediction and correction of hot-spots in the early 28nm process development phase. The paper also discusses about the other overall process window reduction contributors due to mask 3D effects, wafer topography (focus shifts/variations) and how this has been addressed with different simulation efforts in a fast and timely manner.

Mask manufacturing of advanced technology designs using multi-beam lithography (Part 1)

NASA Astrophysics Data System (ADS)

Green, Michael; Ham, Young; Dillon, Brian; Kasprowicz, Bryan; Hur, Ik Boum; Park, Joong Hee; Choi, Yohan; McMurran, Jeff; Kamberian, Henry; Chalom, Daniel; Klikovits, Jan; Jurkovic, Michal; Hudek, Peter

2016-10-01

As optical lithography is extended into 10nm and below nodes, advanced designs are becoming a key challenge for mask manufacturers. Techniques including advanced Optical Proximity Correction (OPC) and Inverse Lithography Technology (ILT) result in structures that pose a range of issues across the mask manufacturing process. Among the new challenges are continued shrinking Sub-Resolution Assist Features (SRAFs), curvilinear SRAFs, and other complex mask geometries that are counter-intuitive relative to the desired wafer pattern. Considerable capability improvements over current mask making methods are necessary to meet the new requirements particularly regarding minimum feature resolution and pattern fidelity. Advanced processes using the IMS Multi-beam Mask Writer (MBMW) are feasible solutions to these coming challenges. In this paper, we study one such process, characterizing mask manufacturing capability of 10nm and below structures with particular focus on minimum resolution and pattern fidelity.

EDMOS in ultrathin FDSOI: Impact of the drift region properties

NASA Astrophysics Data System (ADS)

Litty, Antoine; Ortolland, Sylvie; Golanski, Dominique; Dutto, Christian; Cristoloveanu, Sorin

2016-11-01

The development of high-voltage MOSFET (HVMOS) is necessary for including power management or radiofrequency functionalities in CMOS technology. In this paper, we investigate the fabrication and optimization of an Extended Drain MOSFET (EDMOS) directly integrated in the ultra-thin SOI film (7 nm) of the 28 nm FDSOI CMOS technology node. Thanks to TCAD simulations, we analyse in detail the device behaviour as a function of the doping level and length of the drift region. The influence of the back-plane doping type and of the back-biasing schemes is discussed. DC measurements of fabricated EDMOS samples reveal promising performances in particular in terms of specific on-resistance versus breakdown voltage trade-off. The experimental results indicate that, even in an ultrathin film, the engineering of the drift region could be a lever to obtain integrated HVMOS (3.3-5 V).

Dry etching of chrome for photomasks for 100-nm technology using chemically amplified resist

NASA Astrophysics Data System (ADS)

Mueller, Mark; Komarov, Serguie; Baik, Ki-Ho

2002-07-01

Photo mask etching for the 100nm technology node places new requirements on dry etching processes. As the minimum-size features on the mask, such as assist bars and optical proximity correction (OPC) patterns, shrink down to 100nm, it is necessary to produce etch CD biases of below 20nm in order to reproduce minimum resist features into chrome with good pattern fidelity. In addition, vertical profiles are necessary. In previous generations of photomask technology, footing and sidewall profile slope were tolerated, since this dry etch profile was an improvement from wet etching. However, as feature sizes shrink, it is extremely important to select etch processes which do not generate a foot, because this will affect etch linearity and also limit the smallest etched feature size. Chemically amplified resist (CAR) from TOK is patterned with a 50keV MEBES eXara e-beam writer, allowing for patterning of small features with vertical resist profiles. This resist is developed for raster scan 50 kV e-beam systems. It has high contrast, good coating characteristics, good dry etch selectivity, and high environmental stability. Chrome etch process development has been performed using Design of Experiments to optimize parameters such as sidewall profile, etch CD bias, etch CD linearity for varying sizes of line/space patterns, etch CD linearity for varying sizes of isolated lines and spaces, loading effects, and application to contact etching.

Preparation and evaluation of poly(2-hydroxyethyl aspartamide)-hexadecylamine-iron oxide for MR imaging of lymph nodes

PubMed Central

2014-01-01

The purpose of this study was to synthesize biocompatible poly(2-hydroxyethyl aspartamide)–C16-iron oxide (PHEA-C16-iron oxide) nanoparticles and to evaluate their efficacy as a contrast agent for magnetic resonance imaging of lymph nodes. The PHEA-C16-iron oxide nanoparticles were synthesized by coprecipitation method. The core size of the PHEA-C16-iron oxide nanoparticles was about 5 to 7 nm, and the overall size of the nanoparticles was around 20, 60, and 150 nm in aqueous solution. The size of the nanoparticles was controlled by the amount of C16. The 3.0-T MRI signal intensity of a rabbit lymph node was effectively reduced after intravenous administration of PHEA-C16-iron oxide with the size of 20 nm. The in vitro and in vivo toxicity tests revealed the high biocompatibility of PHEA-C16-iron oxide nanoparticles. Therefore, PHEA-C16-iron oxide nanoparticles with 20-nm size can be potentially useful as T2-weighted MR imaging contrast agents for the detection of lymph nodes. PMID:24438671

Deep-submicron Graphene Field-Effect Transistors with State-of-Art fmax

PubMed Central

Lyu, Hongming; Lu, Qi; Liu, Jinbiao; Wu, Xiaoming; Zhang, Jinyu; Li, Junfeng; Niu, Jiebin; Yu, Zhiping; Wu, Huaqiang; Qian, He

2016-01-01

In order to conquer the short-channel effects that limit conventional ultra-scale semiconductor devices, two-dimensional materials, as an option of ultimate thin channels, receive wide attention. Graphene, in particular, bears great expectations because of its supreme carrier mobility and saturation velocity. However, its main disadvantage, the lack of bandgap, has not been satisfactorily solved. As a result, maximum oscillation frequency (fmax) which indicates transistors’ power amplification ability has been disappointing. Here, we present submicron field-effect transistors with specially designed low-resistance gate and excellent source/drain contact, and therefore significantly improved fmax. The fabrication was assisted by the advanced 8-inch CMOS back-end-of-line technology. A 200-nm-gate-length GFET achieves fT/fmax = 35.4/50 GHz. All GFET samples with gate lengths ranging from 200 nm to 400 nm possess fmax 31–41% higher than fT, closely resembling Si n-channel MOSFETs at comparable technology nodes. These results re-strengthen the promise of graphene field-effect transistors in next generation semiconductor electronics. PMID:27775009

EUV mask pilot line at Intel Corporation

NASA Astrophysics Data System (ADS)

Stivers, Alan R.; Yan, Pei-Yang; Zhang, Guojing; Liang, Ted; Shu, Emily Y.; Tejnil, Edita; Lieberman, Barry; Nagpal, Rajesh; Hsia, Kangmin; Penn, Michael; Lo, Fu-Chang

2004-12-01

The introduction of extreme ultraviolet (EUV) lithography into high volume manufacturing requires the development of a new mask technology. In support of this, Intel Corporation has established a pilot line devoted to encountering and eliminating barriers to manufacturability of EUV masks. It concentrates on EUV-specific process modules and makes use of the captive standard photomask fabrication capability of Intel Corporation. The goal of the pilot line is to accelerate EUV mask development to intersect the 32nm technology node. This requires EUV mask technology to be comparable to standard photomask technology by the beginning of the silicon wafer process development phase for that technology node. The pilot line embodies Intel's strategy to lead EUV mask development in the areas of the mask patterning process, mask fabrication tools, the starting material (blanks) and the understanding of process interdependencies. The patterning process includes all steps from blank defect inspection through final pattern inspection and repair. We have specified and ordered the EUV-specific tools and most will be installed in 2004. We have worked with International Sematech and others to provide for the next generation of EUV-specific mask tools. Our process of record is run repeatedly to ensure its robustness. This primes the supply chain and collects information needed for blank improvement.

Advancement of CMOS Doping Technology in an External Development Framework

NASA Astrophysics Data System (ADS)

Jain, Amitabh; Chambers, James J.; Shaw, Judy B.

2011-01-01

The consumer appetite for a rich multimedia experience drives technology development for mobile hand-held devices and the infrastructure to support them. Enhancements in functionality, speed, and user experience are derived from advancements in CMOS technology. The technical challenges in developing each successive CMOS technology node to support these enhancements have become increasingly difficult. These trends have motivated the CMOS business towards a collaborative approach based on strategic partnerships. This paper describes our model and experience of CMOS development, based on multi-dimensional industrial and academic partnerships. We provide to our process equipment, materials, and simulation partners, as well as to our silicon foundry partners, the detailed requirements for future integrated circuit products. This is done very early in the development cycle to ensure that these requirements can be met. In order to determine these fundamental requirements, we rely on a strategy that requires strong interaction between process and device simulation, physical and chemical analytical methods, and research at academic institutions. This learning is shared with each project partner to address integration and manufacturing issues encountered during CMOS technology development from its inception through product ramp. We utilize TI's core strengths in physical analysis, unit processes and integration, yield ramp, reliability, and product engineering to support this technological development. Finally, this paper presents examples of the advancement of CMOS doping technology for the 28 nm node and beyond through this development model.

Meeting critical gate linewidth control needs at the 65 nm node

NASA Astrophysics Data System (ADS)

Mahorowala, Arpan; Halle, Scott; Gabor, Allen; Chu, William; Barberet, Alexandra; Samuels, Donald; Abdo, Amr; Tsou, Len; Yan, Wendy; Iseda, Seiji; Patel, Kaushal; Dirahoui, Bachir; Nomura, Asuka; Ahsan, Ishtiaq; Azam, Faisal; Berg, Gary; Brendler, Andrew; Zimmerman, Jeffrey; Faure, Tom

2006-03-01

With the nominal gate length at the 65 nm node being only 35 nm, controlling the critical dimension (CD) in polysilicon to within a few nanometers is essential to achieve a competitive power-to-performance ratio. Gate linewidths must be controlled, not only at the chip level so that the chip performs as the circuit designers and device engineers had intended, but also at the wafer level so that more chips with the optimum power-to-performance ratio are manufactured. Achieving tight across-chip linewidth variation (ACLV) and chip mean variation (CMV) is possible only if the mask-making, lithography, and etching processes are all controlled to very tight specifications. This paper identifies the various ACLV and CMV components, describes their root causes, and discusses a methodology to quantify them. For example, the site-to-site ACLV component is divided into systematic and random sub-components. The systematic component of the variation is attributed in part to pattern density variation across the field, and variation in exposure dose across the slit. The paper demonstrates our team's success in achieving the tight gate CD tolerances required for 65 nm technology. Certain key challenges faced, and methods employed to overcome them are described. For instance, the use of dose-compensation strategies to correct the small but systematic CD variations measured across the wafer, is described. Finally, the impact of immersion lithography on both ACLV and CMV is briefly discussed.

CHAM: weak signals detection through a new multivariate algorithm for process control

NASA Astrophysics Data System (ADS)

Bergeret, François; Soual, Carole; Le Gratiet, B.

2016-10-01

Derivatives technologies based on core CMOS processes are significantly aggressive in term of design rules and process control requirements. Process control plan is a derived from Process Assumption (PA) calculations which result in a design rule based on known process variability capabilities, taking into account enough margin to be safe not only for yield but especially for reliability. Even though process assumptions are calculated with a 4 sigma known process capability margin, efficient and competitive designs are challenging the process especially for derivatives technologies in 40 and 28nm nodes. For wafer fab process control, PA are declined in monovariate (layer1 CD, layer2 CD, layer2 to layer1 overlay, layer3 CD etc….) control charts with appropriated specifications and control limits which all together are securing the silicon. This is so far working fine but such system is not really sensitive to weak signals coming from interactions of multiple key parameters (high layer2 CD combined with high layer3 CD as an example). CHAM is a software using an advanced statistical algorithm specifically designed to detect small signals, especially when there are many parameters to control and when the parameters can interact to create yield issues. In this presentation we will first present the CHAM algorithm, then the case-study on critical dimensions, with the results, and we will conclude on future work. This partnership between Ippon and STM is part of E450LMDAP, European project dedicated to metrology and lithography development for future technology nodes, especially 10nm.

Sensitivity enhancement of chemically amplified resists and performance study using extreme ultraviolet interference lithography

NASA Astrophysics Data System (ADS)

Buitrago, Elizabeth; Nagahara, Seiji; Yildirim, Oktay; Nakagawa, Hisashi; Tagawa, Seiichi; Meeuwissen, Marieke; Nagai, Tomoki; Naruoka, Takehiko; Verspaget, Coen; Hoefnagels, Rik; Rispens, Gijsbert; Shiraishi, Gosuke; Terashita, Yuichi; Minekawa, Yukie; Yoshihara, Kosuke; Oshima, Akihiro; Vockenhuber, Michaela; Ekinci, Yasin

2016-07-01

Extreme ultraviolet lithography (EUVL, λ=13.5 nm) is the most promising candidate to manufacture electronic devices for future technology nodes in the semiconductor industry. Nonetheless, EUVL still faces many technological challenges as it moves toward high-volume manufacturing (HVM). A key bottleneck from the tool design and performance point of view has been the development of an efficient, high-power EUV light source for high throughput production. Consequently, there has been extensive research on different methodologies to enhance EUV resist sensitivity. Resist performance is measured in terms of its ultimate printing resolution, line width roughness (LWR), sensitivity [S or best energy (BE)], and exposure latitude (EL). However, there are well-known fundamental trade-off relationships (line width roughness, resolution and sensitivity trade-off) among these parameters for chemically amplified resists (CARs). We present early proof-of-principle results for a multiexposure lithography process that has the potential for high sensitivity enhancement without compromising other important performance characteristics by the use of a "Photosensitized Chemically Amplified Resist™" (PSCAR™). With this method, we seek to increase the sensitivity by combining a first EUV pattern exposure with a second UV-flood exposure (λ=365 nm) and the use of a PSCAR. In addition, we have evaluated over 50 different state-of-the-art EUV CARs. Among these, we have identified several promising candidates that simultaneously meet sensitivity, LWR, and EL high-performance requirements with the aim of resolving line space (L/S) features for the 7- and 5-nm logic node [16- and 13-nm half-pitch (HP), respectively] for HVM. Several CARs were additionally found to be well resolved down to 12- and 11-nm HP with minimal pattern collapse and bridging, a remarkable feat for CARs. Finally, the performance of two negative tone state-of-the-art alternative resist platforms previously investigated was compared to the CAR performance at and below 16-nm HP resolution, demonstrating the need for alternative resist solutions at 13-nm resolution and below. EUV interference lithography (IL) has provided and continues to provide a simple yet powerful platform for academic and industrial research, enabling the characterization and development of resist materials before commercial EUV exposure tools become available. Our experiments have been performed at the EUV-IL set-up in the Swiss Light Source (SLS) synchrotron facility located at the Paul Scherrer Institute (PSI).

Double exposure technique for 45nm node and beyond

NASA Astrophysics Data System (ADS)

Hsu, Stephen; Park, Jungchul; Van Den Broeke, Douglas; Chen, J. Fung

2005-11-01

The technical challenges in using F2 lithography for the 45nm node, along with the insurmountable difficulties in EUV lithography, has driven the semiconductor chipmaker into the low k1 lithography era under the pressure of ever decreasing feature sizes. Extending lithography towards lower k1 puts heavy demand on the resolution enhancement technique (RET), exposure tool, and the need for litho friendly design. Hyper numerical aperture (NA) exposure tools, immersion, and double exposure techniques (DET's) are the promising methods to extend lithography manufacturing to the 45nm node at k1 factors below 0.3. Scattering bars (SB's) have become an integral part of the lithography process as chipmakers move to production at ever lower k1 factors. To achieve better critical dimension (CD) control, polarization is applied to enhance the image contrast in the preferential imaging orientation, which increases the risk of SB printability. The optimum SB width is approximately (0.20 ~ 0.25)*(λ/NA). When the SB width becomes less than the exposure wavelength on the 4X mask, Kirchhoff's scalar theory under predicts the SB intensity. The optical weighting factor of the SB increases (Figure 1b) and the SB's become more susceptible to printing. Meanwhile, under hyper NA conditions, the effectiveness of "subresolution" SB's is significantly diminished. A full-sized scattering bars (FSB) scheme becomes necessary. Double exposure methods, such as using ternary 6% attenuated PSM (attPSM) for DDL, are good imaging solutions that can reach and likely go beyond the 45nm node. Today DDL, using binary chrome masks, is capable of printing 65 nm device patterns. In this work, we investigate the use of DET with 6% attPSM masks to target 45nm node device. The SB scalability and printability issues can be taken cared of by using "mutual trimming", i.e., with the combined energy from the two exposures. In this study, we share our findings of using DET to pattern a 45nm node device design with polarization and immersion. We also explore other double patterning methods which in addition to having two exposures, incorporates double coat/developing/etch processing to break the 0.25 k1 barrier.

Reticle decision center: a novel applications platform for enhancing reticle yield and productivity at 10nm technology and beyond

NASA Astrophysics Data System (ADS)

Hwa, George; Bugata, Raj; Chiang, Kaiming; Lakkapragada, Suresh; Tolani, Vikram; Gopalakrishnan, Sandhya; Chen, Chun-Jen; Yang, Chin-Ting; Hsu, Sheng-Chang; Tuo, Laurent

2016-10-01

In the semiconductor IC manufacturing industry, challenges associated with producing defect-free photomasks have been dramatically increasing. At the 10nm technology node, since the 193nm immersion scanner numerical aperture has remained the same 1.35 as in previous nodes, more multi-patterning and aggressive SMO illumination sources are being used to effectively print smaller feature CDs and pitches. To accommodate such specialized sources, more model-based mask OPC and ILT have been used making mask designs very complicated. This in turn makes mask manufacturing very challenging especially for the defect inspection, repair, and metrology processes that need to guarantee defect-free masks. Over the past few years, considerable innovation have been made in the areas of defect inspection and disposition that has ensured continued predictability of mask quality to wafer and final chip yields. The accurate disposition of each mask defect before and after repair has been facilitated by a suite of automated applications such as ADC, LPR, RPG, AIA, etc. that work together with the inspection, repair, and metrology tools and effectively also provide the best possible utilization of the tool capability, capacity and operator resources. In this paper we introduce a new consolidated applications platform called the Reticle Decision Center (RDC) which hosts all these supporting software applications on a centralized server with direct connectivity to mask inspection, repair, metrology tools and more. The paper details how the RDC server is architected to host any application in its native operating system environment and provides for high availability with automatic failover and redundancy. The server along with its host of applications has been tightly integrated with KLA-Tencor's Teron mask inspectors. The paper concludes with showing benefits realized in mask cycle-time and yield as a result of implementing RDC into a high-volume 10nm mask-shop production line.

A 45 nm Stacked CMOS Image Sensor Process Technology for Submicron Pixel.

PubMed

Takahashi, Seiji; Huang, Yi-Min; Sze, Jhy-Jyi; Wu, Tung-Ting; Guo, Fu-Sheng; Hsu, Wei-Cheng; Tseng, Tung-Hsiung; Liao, King; Kuo, Chin-Chia; Chen, Tzu-Hsiang; Chiang, Wei-Chieh; Chuang, Chun-Hao; Chou, Keng-Yu; Chung, Chi-Hsien; Chou, Kuo-Yu; Tseng, Chien-Hsien; Wang, Chuan-Joung; Yaung, Dun-Nien

2017-12-05

A submicron pixel's light and dark performance were studied by experiment and simulation. An advanced node technology incorporated with a stacked CMOS image sensor (CIS) is promising in that it may enhance performance. In this work, we demonstrated a low dark current of 3.2 e - /s at 60 °C, an ultra-low read noise of 0.90 e - ·rms, a high full well capacity (FWC) of 4100 e - , and blooming of 0.5% in 0.9 μm pixels with a pixel supply voltage of 2.8 V. In addition, the simulation study result of 0.8 μm pixels is discussed.

Considerations for fine hole patterning for the 7nm node

NASA Astrophysics Data System (ADS)

Yaegashi, Hidetami; Oyama, Kenichi; Hara, Arisa; Natori, Sakurako; Yamauchi, Shohei; Yamato, Masatoshi; Koike, Kyohei

2016-03-01

One of the practical candidates to produce 7nm node logic devices is to use the multiple patterning with 193-immersion exposure. For the multiple patterning, it is important to evaluate the relation between the number of mask layer and the minimum pitch systematically to judge the device manufacturability. Although the number of the time of patterning, namely LE(Litho-Etch) ^ x-time, and overlay steps have to be reduced, there are some challenges in miniaturization of hole size below 20nm. Various process fluctuations on contact hole have a direct impact on device performance. According to the technical trend, 12nm diameter hole on 30nm-pitch hole will be needed on 7nm node. Extreme ultraviolet lithography (EUV) and Directed self-assembly (DSA) are attracting considerable attention to obtain small feature size pattern, however, 193-immersion still has the potential to extend optical lithography cost-effectively for sub-7nm node. The objective of this work is to study the process variation challenges and resolution in post-processing for the CD-bias control to meet sub-20nm diameter contact hole. Another pattern modulation is also demonstrated during post-processing step for hole shrink. With the realization that pattern fidelity and pattern placement management will limit scaling long before devices and interconnects fail to perform intrinsically, the talk will also outline how circle edge roughness (CER) and Local-CD uniformity can correct efficiency. On the other hand, 1D Gridded-Design-Rules layout (1D layout) has simple rectangular shapes. Also, we have demonstrated CD-bias modification on short trench pattern to cut grating line for its fabrication.

Production of EUV mask blanks with low killer defects

NASA Astrophysics Data System (ADS)

Antohe, Alin O.; Kearney, Patrick; Godwin, Milton; He, Long; John Kadaksham, Arun; Goodwin, Frank; Weaver, Al; Hayes, Alan; Trigg, Steve

2014-04-01

For full commercialization, extreme ultraviolet lithography (EUVL) technology requires the availability of EUV mask blanks that are free of defects. This remains one of the main impediments to the implementation of EUV at the 22 nm node and beyond. Consensus is building that a few small defects can be mitigated during mask patterning, but defects over 100 nm (SiO2 equivalent) in size are considered potential "killer" defects or defects large enough that the mask blank would not be usable. The current defect performance of the ion beam sputter deposition (IBD) tool will be discussed and the progress achieved to date in the reduction of large size defects will be summarized, including a description of the main sources of defects and their composition.

SEE Sensitivity Analysis of 180 nm NAND CMOS Logic Cell for Space Applications

NASA Astrophysics Data System (ADS)

Sajid, Muhammad

2016-07-01

This paper focus on Single Event Effects caused by energetic particle strike on sensitive locations in CMOS NAND logic cell designed in 180nm technology node to be operated in space radiation environment. The generation of SE transients as well as upsets as function of LET of incident particle has been determined for logic devices onboard LEO and GEO satellites. The minimum magnitude pulse and pulse-width for threshold LET was determined to estimate the vulnerability /susceptibility of device for heavy ion strike. The impact of temperature, strike location and logic state of NAND circuit on total SEU/SET rate was estimated with physical mechanism simulations using Visual TCAD, Genius, runSEU program and Crad computer codes.

OPC model data collection for 45-nm technology node using automatic CD-SEM offline recipe creation

NASA Astrophysics Data System (ADS)

Fischer, Daniel; Talbi, Mohamed; Wei, Alex; Menadeva, Ovadya; Cornell, Roger

2007-03-01

Optical and Process Correction in the 45nm node is requiring an ever higher level of characterization. The greater complexity drives a need for automation of the metrology process allowing more efficient, accurate and effective use of the engineering resources and metrology tool time in the fab, helping to satisfy what seems an insatiable appetite for data by lithographers and modelers charged with development of 45nm and 32nm processes. The scope of the work referenced here is a 45nm design cycle "full-loop automation", starting with gds formatted target design layout and ending with the necessary feedback of one and two dimensional printed wafer metrology. In this paper the authors consider the key elements of software, algorithmic framework and Critical Dimension Scanning Electron Microscope (CDSEM) functionality necessary to automate its recipe creation. We evaluate specific problems with the methodology of the former art, "on-tool on-wafer" recipe construction, and discuss how the implementation of the design based recipe generation improves upon the overall metrology process. Individual target-by-target construction, use of a one pattern recognition template fits all approach, a blind navigation to the desired measurement feature, lengthy sessions on tool to construct recipes and limited ability to determine measurement quality in the resultant data set are each discussed as to how the state of the art Design Based Metrology (DBM) approach is implemented. The offline created recipes have shown pattern recognition success rates of up to 100% and measurement success rates of up to 93% for line/space as well as for 2D Minimum/Maximum measurements without manual assists during measurement.

Layout optimization with assist features placement by model based rule tables for 2x node random contact

NASA Astrophysics Data System (ADS)

Jun, Jinhyuck; Park, Minwoo; Park, Chanha; Yang, Hyunjo; Yim, Donggyu; Do, Munhoe; Lee, Dongchan; Kim, Taehoon; Choi, Junghoe; Luk-Pat, Gerard; Miloslavsky, Alex

2015-03-01

As the industry pushes to ever more complex illumination schemes to increase resolution for next generation memory and logic circuits, sub-resolution assist feature (SRAF) placement requirements become increasingly severe. Therefore device manufacturers are evaluating improvements in SRAF placement algorithms which do not sacrifice main feature (MF) patterning capability. There are known-well several methods to generate SRAF such as Rule based Assist Features (RBAF), Model Based Assist Features (MBAF) and Hybrid Assisted Features combining features of the different algorithms using both RBAF and MBAF. Rule Based Assist Features (RBAF) continue to be deployed, even with the availability of Model Based Assist Features (MBAF) and Inverse Lithography Technology (ILT). Certainly for the 3x nm node, and even at the 2x nm nodes and lower, RBAF is used because it demands less run time and provides better consistency. Since RBAF is needed now and in the future, what is also needed is a faster method to create the AF rule tables. The current method typically involves making masks and printing wafers that contain several experiments, varying the main feature configurations, AF configurations, dose conditions, and defocus conditions - this is a time consuming and expensive process. In addition, as the technology node shrinks, wafer process changes and source shape redesigns occur more frequently, escalating the cost of rule table creation. Furthermore, as the demand on process margin escalates, there is a greater need for multiple rule tables: each tailored to a specific set of main-feature configurations. Model Assisted Rule Tables(MART) creates a set of test patterns, and evaluates the simulated CD at nominal conditions, defocused conditions and off-dose conditions. It also uses lithographic simulation to evaluate the likelihood of AF printing. It then analyzes the simulation data to automatically create AF rule tables. It means that analysis results display the cost of different AF configurations as the space grows between a pair of main features. In summary, model based rule tables method is able to make it much easier to create rule tables, leading to faster rule-table creation and a lower barrier to the creation of more rule tables.

Clinical significance of nm23 gene expression in gastric cancer.

PubMed

Mönig, Stefan P; Nolden, Brit; Lübke, Thomas; Pohl, Alexandra; Grass, Guido; Schneider, Paul M; Dienes, Hans P; Hölscher, Arnulf H; Baldus, Stephan E

2007-01-01

The expression of the nm23 gene has been associated with the development of metastasis. Numerous studies have shown down-regulation of nm23 expression in metastatic breast and colon cancer. The expression of the putative metastasis-suppressor gene nm23 in gastric carcinoma is controversial. The aim of this study was the analysis of nm23 expression in a large series of gastric cancer patients. In a retrospective immunohistochemical study specimens obtained from 116 gastric cancer patients (mean age 64 years; range: 33-85) who had undergone gastrectomy with extended lymphadenectomy were analyzed. Nm23 expression in the tumor epithelium was studied by immunohistochemistry followed by a semi-quantitative (score 0-3) evaluation. Statistical analysis including Chi-square test, uni- and multivariate survival analyses were performed. The nm23 staining pattern was positive (score 2-3) in 100 (86.2%) specimens and negative (score 0-1) in 16 (13.8%) samples. Lymph node metastasis was found in 65% of the patients. No significant correlations could be determined between nm23 expression and other variables such as gender, age, tumor differentiation, WHO-, Laurén-, Goseki-, or Ming-classification. The intensity of nm23 staining in the tumor cells was not significantly correlated with depth of tumor infiltration (T-stage), lymph node metastasis (N-stage), distant metastasis (M-stage), UICC-stage, or prognosis. Our series did not show a correlation of nm23 expression in terms of lymph node and distant metastasis or prognosis in gastric cancer patients.

1D design style implications for mask making and CEBL

NASA Astrophysics Data System (ADS)

Smayling, Michael C.

2013-09-01

At advanced nodes, CMOS logic is being designed in a highly regular design style because of the resolution limitations of optical lithography equipment. Logic and memory layouts using 1D Gridded Design Rules (GDR) have been demonstrated to nodes beyond 12nm.[1-4] Smaller nodes will require the same regular layout style but with multiple patterning for critical layers. One of the significant advantages of 1D GDR is the ease of splitting layouts into lines and cuts. A lines and cuts approach has been used to achieve good pattern fidelity and process margin to below 12nm.[4] Line scaling with excellent line-edge roughness (LER) has been demonstrated with self-aligned spacer processing.[5] This change in design style has important implications for mask making: • The complexity of the masks will be greatly reduced from what would be required for 2D designs with very complex OPC or inverse lithography corrections. • The number of masks will initially increase, as for conventional multiple patterning. But in the case of 1D design, there are future options for mask count reduction. • The line masks will remain simple, with little or no OPC, at pitches (1x) above 80nm. This provides an excellent opportunity for continual improvement of line CD and LER. The line pattern will be processed through a self-aligned pitch division sequence to divide pitch by 2 or by 4. • The cut masks can be done with "simple OPC" as demonstrated to beyond 12nm.[6] Multiple simple cut masks may be required at advanced nodes. "Coloring" has been demonstrated to below 12nm for two colors and to 8nm for three colors. • Cut/hole masks will eventually be replaced by e-beam direct write using complementary e-beam lithography (CEBL).[7-11] This transition is gated by the availability of multiple column e-beam systems with throughput adequate for high- volume manufacturing. A brief description of 1D and 2D design styles will be presented, followed by examples of 1D layouts. Mask complexity for 1D layouts patterned directly will be compared to mask complexity for lines and cuts at nodes larger than 20nm. No such comparison is possible below 20nm since single-patterning does not work below ~80nm pitch using optical exposure tools. Also discussed will be recently published wafer results for line patterns with pitch division by-2 and by-4 at sub-12nm nodes, plus examples of post-etch results for 1D patterns done with cut masks and compared to cuts exposed by a single-column e-beam direct write system.

Defect window analysis by using SEM-contour based shape quantifying method for sub-20nm node production

NASA Astrophysics Data System (ADS)

Hibino, Daisuke; Hsu, Mingyi; Shindo, Hiroyuki; Izawa, Masayuki; Enomoto, Yuji; Lin, J. F.; Hu, J. R.

2013-04-01

The impact on yield loss due to systematic defect which remains after Optical Proximity Correction (OPC) modeling has increased, and achieving an acceptable yield has become more difficult in the leading technology beyond 20 nm node production. Furthermore Process-Window has become narrow because of the complexity of IC design and less process margin. In the past, the systematic defects have been inspected by human-eyes. However the judgment by human-eyes is sometime unstable and not accurate. Moreover an enormous amount of time and labor will have to be expended on the one-by-one judgment for several thousands of hot-spot defects. In order to overcome these difficulties and improve the yield and manufacturability, the automated system, which can quantify the shape difference with high accuracy and speed, is needed. Inspection points could be increased for getting higher yield, if the automated system achieves our goal. Defect Window Analysis (DWA) system by using high-precision-contour extraction from SEM image on real silicon and quantifying method which can calculate the difference between defect pattern and non-defect pattern automatically, which was developed by Hitachi High-Technologies, has been applied to the defect judgment instead of the judgment by human-eyes. The DWA result which describes process behavior might be feedback to design or OPC or mask. This new methodology and evaluation results will be presented in detail in this paper.

Immersion lithography: its history, current status and future prospects

NASA Astrophysics Data System (ADS)

Owa, Soichi; Nagasaka, Hiroyuki

2008-11-01

Since the 1980's, immersion exposure has been proposed several times. At the end of 1990's, however, these concepts were almost forgotten because other technologies, such as electron beam projection, EUVL, and 157 nm were believed to be more promising than immersion exposures. The current work in immersion lithography started in 2001 with the report of Switkes and Rothschild. Although their first proposal was at 157 nm wavelength, their report in the following year on 193 nm immersion with purified water turned out to be the turning point for the introduction of water-based 193 nm immersion lithography. In February, 2003, positive feasibility study results of 193 nm immersion were presented at the SPIE microlithography conference. Since then, the development of 193 nm immersion exposure tools accelerated. Currently (year 2008), multiple hyper NA (NA>1.0) scanners are generating mass production 45 nm half pitch devices in semiconductor manufacturing factories. As a future extension, high index immersion was studied over the past few years, but material development lagged more than expected, which resulted in the cancellation of high index immersion plans at scanner makers. Instead, double patterning, double dipole exposure, and customized illuminations techniques are expected as techniques to extend immersion for the 32 nm node and beyond.

Co-integration of nano-scale vertical- and horizontal-channel metal-oxide-semiconductor field-effect transistors for low power CMOS technology.

PubMed

Sun, Min-Chul; Kim, Garam; Kim, Sang Wan; Kim, Hyun Woo; Kim, Hyungjin; Lee, Jong-Ho; Shin, Hyungcheol; Park, Byung-Gook

2012-07-01

In order to extend the conventional low power Si CMOS technology beyond the 20-nm node without SOI substrates, we propose a novel co-integration scheme to build horizontal- and vertical-channel MOSFETs together and verify the idea using TCAD simulations. From the fabrication viewpoint, it is highlighted that this scheme provides additional vertical devices with good scalability by adding a few steps to the conventional CMOS process flow for fin formation. In addition, the benefits of the co-integrated vertical devices are investigated using a TCAD device simulation. From this study, it is confirmed that the vertical device shows improved off-current control and a larger drive current when the body dimension is less than 20 nm, due to the electric field coupling effect at the double-gated channel. Finally, the benefits from the circuit design viewpoint, such as the larger midpoint gain and beta and lower power consumption, are confirmed by the mixed-mode circuit simulation study.

The future of EUV lithography: enabling Moore's Law in the next decade

NASA Astrophysics Data System (ADS)

Pirati, Alberto; van Schoot, Jan; Troost, Kars; van Ballegoij, Rob; Krabbendam, Peter; Stoeldraijer, Judon; Loopstra, Erik; Benschop, Jos; Finders, Jo; Meiling, Hans; van Setten, Eelco; Mika, Niclas; Dredonx, Jeannot; Stamm, Uwe; Kneer, Bernhard; Thuering, Bernd; Kaiser, Winfried; Heil, Tilmann; Migura, Sascha

2017-03-01

While EUV systems equipped with a 0.33 Numerical Aperture lenses are readying to start volume manufacturing, ASML and Zeiss are ramping up their development activities on a EUV exposure tool with Numerical Aperture greater than 0.5. The purpose of this scanner, targeting a resolution of 8nm, is to extend Moore's law throughout the next decade. A novel, anamorphic lens design, has been developed to provide the required Numerical Aperture; this lens will be paired with new, faster stages and more accurate sensors enabling Moore's law economical requirements, as well as the tight focus and overlay control needed for future process nodes. The tighter focus and overlay control budgets, as well as the anamorphic optics, will drive innovations in the imaging and OPC modelling, and possibly in the metrology concepts. Furthermore, advances in resist and mask technology will be required to image lithography features with less than 10nm resolution. This paper presents an overview of the key technology innovations and infrastructure requirements for the next generation EUV systems.

Qualification of local advanced cryogenic cleaning technology for 14nm photomask fabrication

NASA Astrophysics Data System (ADS)

Taumer, Ralf; Krome, Thorsten; Bowers, Chuck; Varghese, Ivin; Hopkins, Tyler; White, Roy; Brunner, Martin; Yi, Daniel

2014-10-01

The march toward tighter design rules, and thus smaller defects, implies stronger surface adhesion between defects and the photomask surface compared to past generations, thereby resulting in increased difficulty in photomask cleaning. Current state-of-the-art wet clean technologies utilize functional water and various energies in an attempt to produce similar yield to the acid cleans of previous generations, but without some of the negative side effects. Still, wet cleans have continued to be plagued with issues such as persistent particles and contaminations, SRAF and feature damages, leaving contaminants behind that accelerate photo-induced defect growth, and others. This paper details work done through a design of experiments (DOE) utilized to qualify an improved cryogenic cleaning technology for production in the Advanced Mask Technology Center (AMTC) advanced production lines for 20 and 14 nm processing. All work was conducted at the AMTC facility in Dresden, Germany utilizing technology developed by Eco-Snow Systems and RAVE LLC for their cryogenic local cleaning VC1200F platform. This system uses a newly designed nozzle, improved gaseous CO2 delivery, extensive filtration to remove hydrocarbons and minimize particle adders, and other process improvements to overcome the limitations of the previous generation local cleaning tool. AMTC has successfully qualified this cryogenic cleaning technology and is currently using it regularly to enhance production yields even at the most challenging technology nodes.

A 45 nm Stacked CMOS Image Sensor Process Technology for Submicron Pixel †

PubMed Central

Takahashi, Seiji; Huang, Yi-Min; Sze, Jhy-Jyi; Wu, Tung-Ting; Guo, Fu-Sheng; Hsu, Wei-Cheng; Tseng, Tung-Hsiung; Liao, King; Kuo, Chin-Chia; Chen, Tzu-Hsiang; Chiang, Wei-Chieh; Chuang, Chun-Hao; Chou, Keng-Yu; Chung, Chi-Hsien; Chou, Kuo-Yu; Tseng, Chien-Hsien; Wang, Chuan-Joung; Yaung, Dun-Nien

2017-01-01

A submicron pixel’s light and dark performance were studied by experiment and simulation. An advanced node technology incorporated with a stacked CMOS image sensor (CIS) is promising in that it may enhance performance. In this work, we demonstrated a low dark current of 3.2 e−/s at 60 °C, an ultra-low read noise of 0.90 e−·rms, a high full well capacity (FWC) of 4100 e−, and blooming of 0.5% in 0.9 μm pixels with a pixel supply voltage of 2.8 V. In addition, the simulation study result of 0.8 μm pixels is discussed. PMID:29206162

Elastic scattering spectroscopy findings in formalin-fixed oral squamous cell carcinoma specimens

NASA Astrophysics Data System (ADS)

Swinson, B.; Elmaaytah, M.; Jerjes, W.; Hopper, C.

2005-11-01

Oral squamous cell carcinoma (OSCC) has been shown to spread locally and infiltrate adjacent bone or via the lymphatic system to the cervical lymph nodes. This usually necessitates a surgical neck dissection and either a local or segmental resection for bone clearance. While histopathology remains the gold standard for tissue diagnosis, several new diagnostic techniques are being developed that rely on physical and biochemical changes that mirror or precede malignant changes within tissue. The aim of this study was to compare findings of Elastic Scattering Spectroscopy (ESS) with histopathology on formalin-fixed specimens of both neck lymph node dissections and de-calcified archival bone from patients with OSCC. We wished to see if this technique could be used as an adjunct or alternative to histopathology in defining cervical nodal involvement and if it could be used to identify bone resection margins positive for tumour. 130 lymph nodes were examined from 13 patients. The nodes were formalin-fixed, bivalved and examined by ESS. The intensity of the spectrum at 4 points was considered for comparison; at 360nm, 450nm, 630nm and 690nm. 341 spectra were taken from the mandibular specimens of 21 patients, of which 231 spectra were taken from histologically positive sites and the rest were normal. The nodes and bone specimens were then routinely processed with haematoxylin and eosin-stained sections, examined histopathologically, and the results compared. Using Linear Discriminant Analysis (LDA) as a statistical method, a sensitivity of 98% and a specificity of 68% was obtained for the neck nodes and a sensitivity of 87% and a specificity of 80% for the bone margins.

65nm RadSafe™ Technology for RC64 and Advanced SOCs

NASA Astrophysics Data System (ADS)

Liran, Tuvia; Ginosar, Ran; Lange, Fredy; Mandler, Alberto; Aviely, Peleg; Meirov, Henri; Goldberg, Michael; Meister, Zeev; Oliel, Mickey

2015-09-01

The trend of scaling of microelectronic provides certain advantages for space components, as well as some challenges. It enables implementing highly integrated and high performance ASICs, reducing power, area and weight. Scaling also improves the immunity to TID and SEL in most cases, but increases soft error rate significantly. Ramon Chips adopted the 65nm technology for implementing RC64 [1,2], a 64 core DSP for space applications, and for making other future products. The 65nm process node is widely used, very mature, and supported by wide range of IP providers. Thus the need for full custom design of cores and IPs is minimized, and radiation hardening is achievable by mitigating the radiation effects on the available IPs, and developing proprietary IPs only for complementing the available IPs. The RadSafe_65TM technology includes hardened standard cells and I/O libraries, methods for mitigation of radiation effects in COTS IP cores (SRAM, PLL, SERDES, DDR2/3 interface) and adding unique cores for monitoring radiation effects and junction temperature. We had developed RADIC6, a technology development vehicle, for verification of all hard cores and verification of the methodologies and design flow required for RC64. RADIC6 includes the test structures for characterizing the IP cores for immunity to all radiation effects. This paper describes the main elements and IP cores of RadSafe_65TM, as well as the contents of RADIC6 test chip.

Fully industrialised single photon avalanche diodes

NASA Astrophysics Data System (ADS)

Pellegrini, S.; Rae, B.

2017-05-01

Single Photon Avalanche diodes (SPADs) were first realized more than five decades ago[1][1], and have now been industrialized for mass production in the 130 nm CMOS technology node by STMicroelectronics (STM). In this paper we present the latest STM SPAD with an excellent NIR photon detection probability (>5% at 850nm), a dark count rate median of 100 cps at room temperature and a low breakdown voltage of 14.2V. The dead time of the SPAD is approximately 25 ns, leading to a maximum count rate of 40 Mcps. Thanks to the 130 nm gate length of the CMOS technology used and the associated high digital gate density, complex digital signal processing can be implemented allowing fully integrated systems to be realized. The low bias required by the SPAD makes it possible for voltage generation to be achieved on-chip (e.g. charge pumped). We introduce our first generation time-of-flight system (VL6180) based on the STM SPAD technology, which is capable of ranging up to 60 cm in 60 ms. Ranging capabilities and accuracy are measured using a set of moving targets with reflectance of 5%, 17% and 88% in a fully automated test bed. To the best of our knowledge this was the first high volume SPAD-based device. To our knowledge this is the first time details of SPAD performance over production volumes and lifetime have been presented.

Multiple beam mask writers: an industry solution to the write time crisis

NASA Astrophysics Data System (ADS)

Litt, Lloyd C.

2010-09-01

The semiconductor industry is under constant pressure to reduce production costs even as technology complexity increases. Lithography represents the most expensive process due to its high capital equipment costs and the implementation of low-k1 lithographic processes, which has added to the complexity of making masks through the greater use of optical proximity correction, pixelated masks, and double or triple patterning. Each of these mask technologies allows the production of semiconductors at future nodes while extending the utility of current immersion tools. Low k1 patterning complexity combined with increased data due to smaller feature sizes is driving extremely long mask write times. While a majority of the industry is willing to accept mask write times of up to 24 hours, evidence suggests that the write times for many masks at the 22 nm node and beyond will be significantly longer. It has been estimated that $50M+ in non-recurring engineering (NRE) costs will be required to develop a multiple beam mask writer system, yet the business case to recover this kind of investment is not strong. Moreover, funding such a development is a high risk for an individual supplier. The problem is compounded by a disconnect between the tool customer (the mask supplier) and the final mask customer that will bear the increased costs if a high speed writer is not available. Since no individual company will likely risk entering this market, some type of industry-wide funding model will be needed. Because SEMATECH's member companies strongly support a multiple beam technology for mask writers to reduce the write time and cost of 193 nm and EUV masks, SEMATECH plans to pursue an advanced mask writer program in 2011 and 2012. In 2010, efforts will focus on identifying a funding model to address the investment to develop such a technology.

Complete data preparation flow for Massively Parallel E-Beam lithography on 28nm node full-field design

NASA Astrophysics Data System (ADS)

Fay, Aurélien; Browning, Clyde; Brandt, Pieter; Chartoire, Jacky; Bérard-Bergery, Sébastien; Hazart, Jérôme; Chagoya, Alexandre; Postnikov, Sergei; Saib, Mohamed; Lattard, Ludovic; Schavione, Patrick

2016-03-01

Massively parallel mask-less electron beam lithography (MP-EBL) offers a large intrinsic flexibility at a low cost of ownership in comparison to conventional optical lithography tools. This attractive direct-write technique needs a dedicated data preparation flow to correct both electronic and resist processes. Moreover, Data Prep has to be completed in a short enough time to preserve the flexibility advantage of MP-EBL. While the MP-EBL tools have currently entered an advanced stage of development, this paper will focus on the data preparation side of the work for specifically the MAPPER Lithography FLX-1200 tool [1]-[4], using the ASELTA Nanographics Inscale software. The complete flow as well as the methodology used to achieve a full-field layout data preparation, within an acceptable cycle time, will be presented. Layout used for Data Prep evaluation was one of a 28 nm technology node Metal1 chip with a field size of 26x33mm2, compatible with typical stepper/scanner field sizes and wafer stepping plans. Proximity Effect Correction (PEC) was applied to the entire field, which was then exported as a single file to MAPPER Lithography's machine format, containing fractured shapes and dose assignments. The Soft Edge beam to beam stitching method was employed in the specific overlap regions defined by the machine format as well. In addition to PEC, verification of the correction was included as part of the overall data preparation cycle time. This verification step was executed on the machine file format to ensure pattern fidelity and accuracy as late in the flow as possible. Verification over the full chip, involving billions of evaluation points, is performed both at nominal conditions and at Process Window corners in order to ensure proper exposure and process latitude. The complete MP-EBL data preparation flow was demonstrated for a 28 nm node Metal1 layout in 37 hours. The final verification step shows that the Edge Placement Error (EPE) is kept below 2.25 nm over an exposure dose variation of 8%.

PMJ 2007 panel discussion overview: double exposure and double patterning for 32-nm half-pitch design node

NASA Astrophysics Data System (ADS)

Nagaoka, Yoshinori; Watanabe, Hidehiro

2007-10-01

As part of the technical program in Photomask Japan 2007, we held a panel discussion to discuss challenges and solutions for the double exposure and double patterning lithography technique for 32nm half-pitch design node. 4 panelists, Rik Jonckheere of IMEC, Belgium), Tsann-Binn Chiou of ASML Taiwan Ltd., Taiwan), Judy Huckabay of Cadence Design Systems Inc. (USA) and Yoshimitsu Okuda of Toppan Printing Co., Ltd., Japan) were invited to represent each key technical area. We also took a survey from the PMJ attendees prior to the panel discussion, to vote which key technical area they think the challenge exists for the 32nm half-pitch DE/DP lithography. The result of the survey was also presented during the panel discussion. One would intuitively think that by using a DE/DP technique you're relaxing the design rule by 2x, thus for 32nm node it's essentially the 65nm process- you're just repeating it 2 times. Well, not exactly, as identified by the panelists and the participants in the discussion. We recognized the difficulties in the LSI fabrication process steps, the lithography tool overlay, photomask CD and registration, and the issue of data splitting conflict. These difficulties are big challenge for both LSI and photomask manufactures; however, we have confirmed some solutions are already examined by the theoretical and experimental works of the people in research. Despite these difficulties, we are convinced that the immersion lithography with double exposure and double patterning techniques is one of the most promising candidates of the lithography for 32nm half pitch design node.

Design of nodes for embedded and ultra low-power wireless sensor networks

NASA Astrophysics Data System (ADS)

Xu, Jun; You, Bo; Cui, Juan; Ma, Jing; Li, Xin

2008-10-01

Sensor network integrates sensor technology, MEMS (Micro-Electro-Mechanical system) technology, embedded computing, wireless communication technology and distributed information management technology. It is of great value to use it where human is quite difficult to reach. Power consumption and size are the most important consideration when nodes are designed for distributed WSN (wireless sensor networks). Consequently, it is of great importance to decrease the size of a node, reduce its power consumption and extend its life in network. WSN nodes have been designed using JN5121-Z01-M01 module produced by jennic company and IEEE 802.15.4/ZigBee technology. Its new features include support for CPU sleep modes and a long-term ultra low power sleep mode for the entire node. In low power configuration the node resembles existing small low power nodes. An embedded temperature sensor node has been developed to verify and explore our architecture. The experiment results indicate that the WSN has the characteristic of high reliability, good stability and ultra low power consumption.

Rigorous assessment of patterning solution of metal layer in 7 nm technology node

NASA Astrophysics Data System (ADS)

Gao, Weimin; Ciofi, Ivan; Saad, Yves; Matagne, Philippe; Bachmann, Michael; Gillijns, Werner; Lucas, Kevin; Demmerle, Wolfgang; Schmoeller, Thomas

2016-01-01

In a 7 nm node (N7), the logic design requires a critical poly pitch of 42 to 45 nm and a metal 1 (M1) pitch of 28 to 32 nm. Such high-pattern density pushes the 193 immersion lithography solution toward its limit and also brings extremely complex patterning scenarios. The N7 M1 layer may require a self-aligned quadruple patterning (SAQP) with a triple litho-etch (LE3) block process. Therefore, the whole patterning process flow requires multiple exposure+etch+deposition processes and each step introduces a particular impact on the pattern profiles and the topography. In this study, we have successfully integrated a simulation tool that enables emulation of the whole patterning flow with realistic process-dependent three-dimensional (3-D) profile and topology. We use this tool to study the patterning process variations of the N7 M1 layer including the overlay control, the critical dimension uniformity budget, and the lithographic process window (PW). The resulting 3-D pattern structure can be used to optimize the process flow, verify design rules, extract parasitics, and most importantly, simulate the electric field, and identify hot spots for dielectric reliability. As an example application, the maximum electric field at M1 tip-to-tip, which is one of the most critical patterning locations, has been simulated and extracted. The approach helps to investigate the impact of process variations on dielectric reliability. We have also assessed the alternative M1 patterning flow with a single exposure block using extreme ultraviolet lithography (EUVL) and analyzed its advantages compared to the LE3 block approach.

Comprehensive analysis of sub-20 nm black phosphorus based junctionless-recessed channel MOSFET for analog/RF applications

NASA Astrophysics Data System (ADS)

Kumar, Ajay; Tripathi, M. M.; Chaujar, Rishu

2018-04-01

In this work, a comprehensive analog and RF performance of a novel Black Phosphorus-Junctionless-Recessed Channel (BP-JL-RC) MOSFET has been explored at 45 nm technology node (Gate length = 20 nm). The integration of black phosphorus with junctionless recessed channel MOSFET, leads to higher drain current of about 0.3 mA and excellent switching ratio (of the order of 1011) due to reduced off-current which leads to improvement in sub-threshold slope (SS) (67mV/dec). Further, RF performance metrics have also been studied with an aim to analyze high-frequency performance. The following FOMs have been evaluated: cut-off frequency (fT), maximum oscillator frequency (fMAX), stern stability factor, various power gains and parasitic capacitances at THz frequency range. Thus, in addition to the high packing density offered by RC MOSFET, the proposed design finds numerous application at THz frequency making it a promising candidate at wafer scale integration level.

Planar Fully-Depleted-Silicon-On-Insulator technologies: Toward the 28 nm node and beyond

NASA Astrophysics Data System (ADS)

Doris, B.; DeSalvo, B.; Cheng, K.; Morin, P.; Vinet, M.

2016-03-01

This paper presents a comprehensive overview of the research done in the last decade on planar Fully-Depleted-Silicon-On-Insulator (FDSOI) technologies in the frame of the joint development program between IBM, ST Microelectronics and CEA-LETI. In particular, we review the technological developments ranging from substrate engineering to process modules that enable functionality and improve FDSOI performance over several generations. Various multi Vt integration schemes to maximize the benefits of the thin BOX FDSOI platform are discussed. Manufacturability as well as scalability concerns are highlighted and addressed. In addition, this work provides understanding of the performance/power trade-offs for FDSOI circuits and device variability. Finally, clear directions for future application-specific products are given, demonstrating that FDSOI is an attractive CMOS option for next generation high performance and low-power applications.

The verification of printability about marginal defects and the detectability at the inspection tool in sub 50nm node

NASA Astrophysics Data System (ADS)

Lee, Hyemi; Jeong, Goomin; Seo, Kangjun; Kim, Sangchul; kim, changreol

2008-05-01

Since mask design rule is smaller and smaller, Defects become one of the issues dropping the mask yield. Furthermore controlled defect size become smaller while masks are manufactured. According to ITRS roadmap on 2007, controlled defect size is 46nm in 57nm node and 36nm in 45nm node on a mask. However the machine development is delayed in contrast with the speed of the photolithography development. Generally mask manufacturing process is divided into 3 parts. First part is patterning on a mask and second part is inspecting the pattern and repairing the defect on the mask. At that time, inspection tools of transmitted light type are normally used and are the most trustful as progressive type in the developed inspection tools until now. Final part is shipping the mask after the qualifying the issue points and weak points. Issue points on a mask are qualified by using the AIMS (Aerial image measurement system). But this system is including the inherent error possibility, which is AIMS measures the issue points based on the inspection results. It means defects printed on a wafer are over the specific size detected by inspection tools and the inspection tool detects the almost defects. Even though there are no tools to detect the 46nm and 36nm defects suggested by ITRS roadmap, this assumption is applied to manufacturing the 57nm and 45nm device. So we make the programmed defect mask consisted with various defect type such as spot, clear extension, dark extension and CD variation on L/S(line and space), C/H(contact hole) and Active pattern in 55nm and 45nm node. And the programmed defect mask was inspected by using the inspection tool of transmitted light type and was measured by using AIMS 45-193i. Then the marginal defects were compared between the inspection tool and AIMS. Accordingly we could verify whether defect size is proper or not, which was suggested to be controlled on a mask by ITRS roadmap. Also this result could suggest appropriate inspection tools for next generation device among the inspection tools of transmitted light type, reflected light type and aerial image type.

A dual-modal magnetic nanoparticle probe for preoperative and intraoperative mapping of sentinel lymph nodes by magnetic resonance and near infrared fluorescence imaging

PubMed Central

Zhou, Zhengyang; Chen, Hongwei; Lipowska, Malgorzata; Wang, Liya; Yu, Qiqi; Yang, Xiaofeng; Tiwari, Diana; Yang, Lily; Mao, Hui

2016-01-01

The ability to reliably detect sentinel lymph nodes for sentinel lymph node biopsy and lymphadenectomy is important in clinical management of patients with metastatic cancers. However, the traditional sentinel lymph node mapping with visible dyes is limited by the penetration depth of light and fast clearance of the dyes. On the other hand, sentinel lymph node mapping with radionucleotide technique has intrinsically low spatial resolution and does not provide anatomic details in the sentinel lymph node mapping procedure. This work reports the development of a dual modality imaging probe with magnetic resonance and near infrared imaging capabilities for sentinel lymph node mapping using magnetic iron oxide nanoparticles (10 nm core size) conjugated with a near infrared molecule with emission at 830 nm. Accumulation of magnetic iron oxide nanoparticles in sentinel lymph nodes leads to strong T2 weighted magnetic resonance imaging contrast that can be potentially used for preoperative localization of sentinel lymph nodes, while conjugated near infrared molecules provide optical imaging tracking of lymph nodes with a high signal to background ratio. The new magnetic nanoparticle based dual imaging probe exhibits a significant longer lymph node retention time. Near infrared signals from nanoparticle conjugated near infrared dyes last up to 60 min in sentinel lymph node compared to that of 25 min for the free near infrared dyes in a mouse model. Furthermore, axillary lymph nodes, in addition to sentinel lymph nodes, can be also visualized with this probe, given its slow clearance and sufficient sensitivity. Therefore, this new dual modality imaging probe with the tissue penetration and sensitive detection of sentinel lymph nodes can be applied for preoperative survey of lymph nodes with magnetic resonance imaging and allows intraoperative sentinel lymph node mapping using near infrared optical devices. PMID:23812946

Extreme ultraviolet patterned mask inspection performance of advanced projection electron microscope system for 11nm half-pitch generation

NASA Astrophysics Data System (ADS)

Hirano, Ryoichi; Iida, Susumu; Amano, Tsuyoshi; Watanabe, Hidehiro; Hatakeyama, Masahiro; Murakami, Takeshi; Suematsu, Kenichi; Terao, Kenji

2016-03-01

Novel projection electron microscope optics have been developed and integrated into a new inspection system named EBEYE-V30 ("Model EBEYE" is an EBARA's model code) , and the resulting system shows promise for application to half-pitch (hp) 16-nm node extreme ultraviolet lithography (EUVL) patterned mask inspection. To improve the system's inspection throughput for 11-nm hp generation defect detection, a new electron-sensitive area image sensor with a high-speed data processing unit, a bright and stable electron source, and an image capture area deflector that operates simultaneously with the mask scanning motion have been developed. A learning system has been used for the mask inspection tool to meet the requirements of hp 11-nm node EUV patterned mask inspection. Defects are identified by the projection electron microscope system using the "defectivity" from the characteristics of the acquired image. The learning system has been developed to reduce the labor and costs associated with adjustment of the detection capability to cope with newly-defined mask defects. We describe the integration of the developed elements into the inspection tool and the verification of the designed specification. We have also verified the effectiveness of the learning system, which shows enhanced detection capability for the hp 11-nm node.

The novel top-coat material for RLS trade-off reduction in EUVL

NASA Astrophysics Data System (ADS)

Onishi, Ryuji; Sakamoto, Rikimaru; Fujitani, Noriaki; Endo, Takafumi; Ho, Bang-ching

2012-03-01

For the next generation lithography (NGL), several technologies have been proposed to achieve the 22nm-node devices and beyond. Extreme ultraviolet (EUV) lithography is one of the candidates for the next generation lithography. In EUV light source development, low power is one of the critical issue because of the low throughput, and another issue is Out of Band (OoB) light existing in EUV light. OoB is concerned to be the cause of deterioration for the lithography performance. In order to avoid this critical issue, we focused on development of the resist top coat material with OoB absorption property as Out of Band Protection Layer (OBPL). We designed this material having high absorbance around 240nm wavelength and high transmittance for EUV light. And this material aimed to improve sensitivity, resolution and LWR performance.

Microeconomics of yield learning and process control in semiconductor manufacturing

NASA Astrophysics Data System (ADS)

Monahan, Kevin M.

2003-06-01

Simple microeconomic models that directly link yield learning to profitability in semiconductor manufacturing have been rare or non-existent. In this work, we review such a model and provide links to inspection capability and cost. Using a small number of input parameters, we explain current yield management practices in 200mm factories. The model is then used to extrapolate requirements for 300mm factories, including the impact of technology transitions to 130nm design rules and below. We show that the dramatic increase in value per wafer at the 300mm transition becomes a driver for increasing metrology and inspection capability and sampling. These analyses correlate well wtih actual factory data and often identify millions of dollars in potential cost savings. We demonstrate this using the example of grating-based overlay metrology for the 65nm node.

Implementation of random contact hole design with CPL mask by using IML technology

NASA Astrophysics Data System (ADS)

Hsu, Michael; Van Den Broeke, Doug; Hsu, Stephen; Chen, J. Fung; Shi, Xuelong; Corcoran, Noel; Yu, Linda

2005-11-01

The contact hole imaging is a very challenge task for the optical lithography process during IC manufacturing. Lots of RETs were proposed to improve the contrast of small opening hole. Scattering Bar (SB) OPC, together with optimized illumination, is no doubt one of the critical enablers for low k1 contact imaging. In this study, an effective model-based SB OPC based on IML technology is implemented for contact layer at 90nm, 65nm, and 45nm nodes. For our full-chip implementation flow, the first step is to determine the critical design area and then to proceed with NA and illumination optimization. Then, we selected the best NA in combination with optimum illumination via a Diffraction Optical Element (DOE). With optimized illumination, it is now possible to construct an interference map for the full-chip mask pattern. Utilizing the interference map, the model-based SB OPC is performed. Next, model OPC can be applied with the presence of SB for the entire chip. It is important to note that, for patterning at k1 near 0.35 or below, it may be necessary to include 3D mask effects with a high NA OPC model. With enhanced DOF by IML and immersion process, the low k1 production worthy contact process is feasible.

Integrated scatterometry for tight overlay and CD control to enable 20-nm node wafer manufacturing.

NASA Astrophysics Data System (ADS)

Benschop, Jos; Engelen, Andre; Cramer, Hugo; Kubis, Michael; Hinnen, Paul; van der Laan, Hans; Bhattacharyya, Kaustuve; Mulkens, Jan

2013-04-01

The overlay, CDU and focus requirements for the 20nm node can only be met using a holistic lithography approach whereby full use is made of high-order, field-by-field, scanner correction capabilities. An essential element in this approach is a fast, precise and accurate in-line metrology sensor, capable to measure on product. The capabilities of the metrology sensor as well as the impact on overlay, CD and focus will be shared in this paper.

High-NA EUV lithography enabling Moore's law in the next decade

NASA Astrophysics Data System (ADS)

van Schoot, Jan; Troost, Kars; Bornebroek, Frank; van Ballegoij, Rob; Lok, Sjoerd; Krabbendam, Peter; Stoeldraijer, Judon; Loopstra, Erik; Benschop, Jos P.; Finders, Jo; Meiling, Hans; van Setten, Eelco; Kneer, Bernhard; Kuerz, Peter; Kaiser, Winfried; Heil, Tilmann; Migura, Sascha; Neumann, Jens Timo

2017-10-01

While EUV systems equipped with a 0.33 Numerical Aperture lenses are readying to start volume manufacturing, ASML and Zeiss are ramping up their activities on a EUV exposure tool with Numerical Aperture of 0.55. The purpose of this scanner, targeting an ultimate resolution of 8nm, is to extend Moore's law throughout the next decade. A novel, anamorphic lens design, capable of providing the required Numerical Aperture has been investigated; This lens will be paired with new, faster stages and more accurate sensors enabling Moore's law economical requirements, as well as the tight focus and overlay control needed for future process nodes. The tighter focus and overlay control budgets, as well as the anamorphic optics, will drive innovations in the imaging and OPC modelling. Furthermore, advances in resist and mask technology will be required to image lithography features with less than 10nm resolution. This paper presents an overview of the target specifications, key technology innovations and imaging simulations demonstrating the advantages as compared to 0.33NA and showing the capabilities of the next generation EUV systems.

Design for manufacturability production management activity report

NASA Astrophysics Data System (ADS)

Miyazaki, Norihiko; Sato, T.; Honma, M.; Yoshioka, N.; Hosono, K.; Onodera, T.; Itoh, H.; Suzuki, H.; Uga, T.; Kadota, K.; Iriki, N.

2006-05-01

Design For Manufacturability Production Management (DFM-PM) Subcommittee has been started in succession to Reticle Management Subcommittee (RMS) in Semiconductor Manufacturing Technology Committee for Japan (SMTCJ) from 2005. Our activity focuses on the SoC (System On Chip) Business, and it pursues the improvement of communication in manufacturing technique. The first theme of activity is the investigation and examination of the new trends about production (manufacturer) technology and related information, and proposals of business solution. The second theme is the standardization activity about manufacture technology and the cooperation with related semiconductors' organizations. And the third theme is holding workshop and support for promotion and spread of the standardization technology throughout semiconductor companies. We expand a range of scope from design technology to wafer pattern reliability and we will propose the competition domain, the collaboration area and the standardization technology on DFM. Furthermore, we will be able to make up a SoC business model as the 45nm node technology beyond manufacturing platform in cooperating with the design information and the production information by utilizing EDA technology.

Size-dependent lymphatic uptake of nanoscale-tailored particles as tumor mass increases.

PubMed

Kjellman, Pontus; Fredriksson, Sarah; Kjellman, Christian; Strand, Sven-Erik; Zandt, René In 't

2015-11-01

To investigate the size-dependent lymphatic uptake of nanoparticles in mice with rapidly growing syngeneic tumors. Mice were inoculated subcutaneously with EL4 lymphoma cells and on day 5 or day 6 of tumor growth, injected peritumorally with either 29 nm or 58 nm of ultra-small superparamagnetic iron oxide nanoparticles. Twenty-four hours later the animals were imaged using MRI. The larger of the two particles can only be detected in the lymph node when injected in animals with 6-day-old tumors while the 29 nm ultra-small superparamagnetic iron oxide nanoparticle is observed on both time points. Tumor mass greatly impacts the size of particles that are transported to the lymph nodes.

Low-energy electron beam proximity projection lithography (LEEPL): the world's first e-beam production tool, LEEPL 3000

NASA Astrophysics Data System (ADS)

Behringer, Uwe F. W.

2004-06-01

In June 2000 ago the company Accretech and LEEPL corporation decided to develop an E-beam lithography tool for high throughput wafer exposure, called LEEPL. In an amazing short time the alpha tool was built. In 2002 the beta tool was installed at Accretech. Today the first production tool the LEEPL 3000 is ready to be shipped. The 2keV E-beam tool will be used in the first lithography strategy to expose (in mix and match mode with optical exposure tools) critical levels like gate structures, contact holes (CH), and via pattern of the 90 nm and 65 nm node. At the SEMATECH EPL workshop on September 22nd in Cambridge, England it was mentioned that the amount of these levels will increase very rapidly (8 in 2007; 13 in 2010 and 17 in 2013). The schedule of the production tool for 45 nm node is mid 2005 and for the 32 nm node 2008. The Figure 1 shows from left to right α-tool, the β-tool and the production tool LEEPL 3000. Figure 1 also shows the timetable of the 4 LEEPL forum all held in Japan.

A hybrid optic-fiber sensor network with the function of self-diagnosis and self-healing

NASA Astrophysics Data System (ADS)

Xu, Shibo; Liu, Tiegen; Ge, Chunfeng; Chen, Cheng; Zhang, Hongxia

2014-11-01

We develop a hybrid wavelength division multiplexing optical fiber network with distributed fiber-optic sensors and quasi-distributed FBG sensor arrays which detect vibrations, temperatures and strains at the same time. The network has the ability to locate the failure sites automatically designated as self-diagnosis and make protective switching to reestablish sensing service designated as self-healing by cooperative work of software and hardware. The processes above are accomplished by master-slave processors with the help of optical and wireless telemetry signals. All the sensing and optical telemetry signals transmit in the same fiber either working fiber or backup fiber. We take wavelength 1450nm as downstream signal and wavelength 1350nm as upstream signal to control the network in normal circumstances, both signals are sent by a light emitting node of the corresponding processor. There is also a continuous laser wavelength 1310nm sent by each node and received by next node on both working and backup fibers to monitor their healthy states, but it does not carry any message like telemetry signals do. When fibers of two sensor units are completely damaged, the master processor will lose the communication with the node between the damaged ones.However we install RF module in each node to solve the possible problem. Finally, the whole network state is transmitted to host computer by master processor. Operator could know and control the network by human-machine interface if needed.

Anisotropic stress in narrow sGe fin field-effect transistor channels measured using nano-focused Raman spectroscopy

NASA Astrophysics Data System (ADS)

Nuytten, T.; Bogdanowicz, J.; Witters, L.; Eneman, G.; Hantschel, T.; Schulze, A.; Favia, P.; Bender, H.; De Wolf, I.; Vandervorst, W.

2018-05-01

The continued importance of strain engineering in semiconductor technology demands fast and reliable stress metrology that is non-destructive and process line-compatible. Raman spectroscopy meets these requirements but the diffraction limit prevents its application in current and future technology nodes. We show that nano-focused Raman scattering overcomes these limitations and can be combined with oil-immersion to obtain quantitative anisotropic stress measurements. We demonstrate accurate stress characterization in strained Ge fin field-effect transistor channels without sample preparation or advanced microscopy. The detailed analysis of the enhanced Raman response from a periodic array of 20 nm-wide Ge fins provides direct access to the stress levels inside the nanoscale channel, and the results are validated using nano-beam diffraction measurements.

Overlay performance assessment of MAPPER's FLX-1200 (Conference Presentation)

NASA Astrophysics Data System (ADS)

Lattard, Ludovic; Servin, Isabelle; Pradelles, Jonathan; Blancquaert, Yoann; Rademaker, Guido; Pain, Laurent; de Boer, Guido; Brandt, Pieter; Dansberg, Michel; Jager, Remco J. A.; Peijster, Jerry J. M.; Slot, Erwin; Steenbrink, Stijn W. H. K.; Vergeer, Niels; Wieland, Marco

2017-04-01

Mapper Lithography has introduced its first product, the FLX-1200, which is installed at CEA-Leti in Grenoble (France). This is a mask less lithography system, based on massively parallel electron-beam writing with high-speed optical data transport for switching the electron beams. This FLX platform is initially targeted for 1 wph performance for 28 nm technology nodes, but can also be used for less demanding imaging. The electron source currently integrated is capable of scaling to 10 wph at the same resolution performance, which will be implemented by gradually upgrading the illumination optics. The system has an optical alignment system enabling mix-and-match with optical 193 nm immersion systems using standard NVSM marks. The tool at CEA-Leti is in-line with a Sokudo Duo clean track. Mapper Lithography and CEA-Leti are working in collaboration to develop turnkey solution for specific applications. At previous conferences we have presented imaging results including 28nm node resolution, cross wafer CDu of 2.5nm 3 and a throughput of half a wafer per hour, overhead times included. At this conference we will present results regarding the overlay performance of the FLX-1200. In figure 2 an initial result towards measuring the overlay performance of the FLX-1200 is shown. We have exposed a wafer twice without unloading the wafer in between exposures. In the first exposure half of a dense dot array is exposed. In the second exposure the remainder of the dense dot array is exposed. After development the wafer has been inspected using a CD-SEM at 480 locations distributed over an area of 100mm x 100mm. For each SEM image the shift of the pattern written in the first exposure relative to the pattern written in the second exposure is measured. Cross wafer this shift is 7 nm u+3s in X and 5 nm u+3s in Y. The next step is to evaluate the impact of unloading and loading of the wafer in between exposures. At the conference the latest results will be presented.

Design of an integrated aerial image sensor

NASA Astrophysics Data System (ADS)

Xue, Jing; Spanos, Costas J.

2005-05-01

The subject of this paper is a novel integrated aerial image sensor (IAIS) system suitable for integration within the surface of an autonomous test wafer. The IAIS could be used as a lithography processing monitor, affording a "wafer's eye view" of the process, and therefore facilitating advanced process control and diagnostics without integrating (and dedicating) the sensor to the processing equipment. The IAIS is composed of an aperture mask and an array of photo-detectors. In order to retrieve nanometer scale resolution of the aerial image with a practical photo-detector pixel size, we propose a design of an aperture mask involving a series of spatial phase "moving" aperture groups. We demonstrate a design example aimed at the 65nm technology node through TEMPEST simulation. The optimized, key design parameters include an aperture width in the range of 30nm, aperture thickness in the range of 70nm, and offer a spatial resolution of about 5nm, all with comfortable fabrication tolerances. Our preliminary simulation work indicates the possibility of the IAIS being applied to the immersion lithography. A bench-top far-field experiment verifies that our approach of the spatial frequency down-shift through forming large Moire patterns is feasible.

Acoustic Phonons and Mechanical Properties of Ultra-Thin Porous Low-k Films: A Surface Brillouin Scattering Study

NASA Astrophysics Data System (ADS)

Zizka, J.; King, S.; Every, A.; Sooryakumar, R.

2018-04-01

To reduce the RC (resistance-capacitance) time delay of interconnects, a key development of the past 20 years has been the introduction of porous low-k dielectrics to replace the traditional use of SiO2. Moreover, in keeping pace with concomitant reduction in technology nodes, these low-k materials have reached thicknesses below 100 nm wherein the porosity becomes a significant fraction of the film volume. The large degree of porosity not only reduces mechanical strength of the dielectric layer but also renders a need for non-destructive approaches to measure the mechanical properties of such ultra-thin films within device configurations. In this study, surface Brillouin scattering (SBS) is utilized to determine the elastic constants, Poisson's ratio, and Young's modulus of these porous low-k SiOC:H films (˜ 25-250 nm thick) grown on Si substrates by probing surface acoustic phonons and their dispersions.

Programming scheme based optimization of hybrid 4T-2R OxRAM NVSRAM

NASA Astrophysics Data System (ADS)

Majumdar, Swatilekha; Kingra, Sandeep Kaur; Suri, Manan

2017-09-01

In this paper, we present a novel single-cycle programming scheme for 4T-2R NVSRAM, exploiting pulse engineered input signals. OxRAM devices based on 3 nm thick bi-layer active switching oxide and 90 nm CMOS technology node were used for all simulations. The cell design is implemented for real-time non-volatility rather than last-bit, or power-down non-volatility. Detailed analysis of the proposed single-cycle, parallel RRAM device programming scheme is presented in comparison to the two-cycle sequential RRAM programming used for similar 4T-2R NVSRAM bit-cells. The proposed single-cycle programming scheme coupled with the 4T-2R architecture leads to several benefits such as- possibility of unconventional transistor sizing, 50% lower latency, 20% improvement in SNM and ∼20× reduced energy requirements, when compared against two-cycle programming approach.

Acoustic Phonons and Mechanical Properties of Ultra-Thin Porous Low- k Films: A Surface Brillouin Scattering Study

NASA Astrophysics Data System (ADS)

Zizka, J.; King, S.; Every, A.; Sooryakumar, R.

2018-07-01

To reduce the RC (resistance-capacitance) time delay of interconnects, a key development of the past 20 years has been the introduction of porous low- k dielectrics to replace the traditional use of SiO2. Moreover, in keeping pace with concomitant reduction in technology nodes, these low- k materials have reached thicknesses below 100 nm wherein the porosity becomes a significant fraction of the film volume. The large degree of porosity not only reduces mechanical strength of the dielectric layer but also renders a need for non-destructive approaches to measure the mechanical properties of such ultra-thin films within device configurations. In this study, surface Brillouin scattering (SBS) is utilized to determine the elastic constants, Poisson's ratio, and Young's modulus of these porous low- k SiOC:H films (˜ 25-250 nm thick) grown on Si substrates by probing surface acoustic phonons and their dispersions.

UTBB FDSOI suitability for IoT applications: Investigations at device, design and architectural levels

NASA Astrophysics Data System (ADS)

Berthier, Florent; Beigne, Edith; Heitzmann, Frédéric; Debicki, Olivier; Christmann, Jean-Frédéric; Valentian, Alexandre; Billoint, Olivier; Amat, Esteve; Morche, Dominique; Chairat, Soundous; Sentieys, Olivier

2016-11-01

In this paper, we propose to analyze Ultra Thin Body and Box FDSOI technology suitability and architectural solutions for IoT applications and more specifically for autonomous Wireless Sensor Nodes (WSNs). As IoT applications are extremely diversified there is a strong need for flexible solutions at design, architectural level but also at technological level. Moreover, as most of those systems are recovering their energy from the environment, they are challenged by low voltage supplies and low leakage functionalities. We detail in this paper some Ultra Thin Body and Box FDSOI 28 nm characteristics and results demonstrating that this technology could be a perfect option for multidisciplinary IoT devices. Back biasing capabilities and low voltage features are investigated demonstrating efficient high speed/low leakage flexibility. In addition, architectural solutions for WSNs microcontroller are also proposed taking advantage of Ultra Thin Body and Box FDSOI characteristics for full user applicative flexibility. A partitioned architecture between an Always Responsive part with an asynchronous Wake Up Controller (WUC) managing WSN current tasks and an On Demand part with a main processor for application maintenance is presented. First results of the Always Responsive part implemented in Ultra Thin Body and Box FDSOI 28 nm are also exposed.

Sentinel lymph nodes detection with an imaging system using Patent Blue V dye as fluorescent tracer

NASA Astrophysics Data System (ADS)

Tellier, F.; Steibel, J.; Chabrier, R.; Rodier, J. F.; Pourroy, G.; Poulet, P.

2013-03-01

Sentinel lymph node biopsy is the gold standard to detect metastatic invasion from primary breast cancer. This method can help patients avoid full axillary chain dissection, thereby decreasing the risk of morbidity. We propose an alternative to the traditional isotopic method, to detect and map the sentinel lymph nodes. Indeed, Patent Blue V is the most widely used dye in clinical routine for the visual detection of sentinel lymph nodes. A Recent study has shown the possibility of increasing the fluorescence quantum yield of Patent Blue V, when it is bound to human serum albumin. In this study we present a preclinical fluorescence imaging system to detect sentinel lymph nodes labeled with this fluorescent tracer. The setup is composed of a black and white CCD camera and two laser sources. One excitation source with a laser emitting at 635 nm and a second laser at 785 nm to illuminate the region of interest. The prototype is operated via a laptop. Preliminary experiments permitted to determine the device sensitivity in the μmol.L-1 range as regards the detection of PBV fluorescence signals. We also present a preclinical evaluation performed on Lewis rats, during which the fluorescence imaging setup detected the accumulation and fixation of the fluorescent dye on different nodes through the skin.

DUV phase mask for 100 nm period grating printing

NASA Astrophysics Data System (ADS)

Jourlin, Y.; Bourgin, Y.; Reynaud, S.; Parriaux, O.; Talneau, A.; Karvinen, P.; Passilly, N.; Zain, A. Md.; De La Rue, R. M.

2008-04-01

Whereas microelectronic lithography is heading to the 32 nm node and discussing immersion and double-patterning strategies, there is much which can be done with the 45 nm node in microoptics for white light processing. For instance, one of the most demanding applications in terms of achievable period is the LCD lossless polarizer, which can transmit the TM polarization and reflect the TE polarization evenly all through the visible spectrum - provided that a 1D metal grid of 100 nm period can be fabricated. The manufacture of such polarizing panels cannot resort to the step & repeat cameras of microelectronics since the substrates are too large, too thin, too wavy and full of contaminants. There is therefore a need for specific fabrication techniques. It is one of these techniques that a subgroup of partners belonging to two of the Networks of Excellence of the European Community, NEMO and ePIXnet, have decided to explore together.

EUVL masks: paving the path for commercialization

NASA Astrophysics Data System (ADS)

Mangat, Pawitter J. S.; Hector, Scott D.

2001-09-01

Optical projection lithography has been the principal vehicle of semiconductor manufacturing for more than 20 years and is marching aggressively to satisfy the needs of semiconductor manufacturers for 100nm devices. However, the complexity of optical lithography continues to increase as wavelength reduction continues to 157nm. Extreme Ultraviolet Lithography (EUVL), with wavelength from 13-14 nm, is evolving as a leading next generation lithography option for semiconductor industry to stay on the path laid by Moore's Law. Masks are a critical part of the success of any technology and are considered to be high risk both for optical lithography and NGL technologies for sub-100nm lithography. Two key areas of EUV mask fabrication are reflective multilayer deposition and absorber patterning. In the case of reflective multilayers, delivering defect free multilayers for mask blanks is the biggest challenge. Defect mitigation is being explored as a possible option to smooth the multilayer defects in addition to optimization of the deposition process to reduce defect density. The mask patterning process needs focus on the defect-free absorber stack patterning process, mask cleaning, inspection and repair. In addition, there is considerable effort to understand by simulations, the defect printability, thermal and mechanical distortions, and non-telecentric illumination, to mention a few. To protect the finished mask from defects added during use, a removable pellicle strategy combined with thermophoretic protection during exposure is being developed. Recent migration to square form factor using low thermal expansion material (LTEM) is advantageous as historical developments in optical masks can be applied to EUV mask patterning. This paper addresses recent developments in the EUV mask patterning and highlights critical manufacturing process controls needed to fabricate defect-free full field masks with CD and image placement specifications for sub-70nm node lithography. No technology can be implemented without establishing the commercial infrastructure. The rising cost seems to be a major issue affecting the technology development. With respect to mask fabrication for commercial availability, a virtual mask shop analysis is presented that indicates that the process cost for EUVL masks are comparable to the high end optical mask with a reasonable yield. However, the cost for setting up a new mask facility is considerably high.

Enabling CD SEM metrology for 5nm technology node and beyond

NASA Astrophysics Data System (ADS)

Lorusso, Gian Francesco; Ohashi, Takeyoshi; Yamaguchi, Astuko; Inoue, Osamu; Sutani, Takumichi; Horiguchi, Naoto; Bömmels, Jürgen; Wilson, Christopher J.; Briggs, Basoene; Tan, Chi Lim; Raymaekers, Tom; Delhougne, Romain; Van den Bosch, Geert; Di Piazza, Luca; Kar, Gouri Sankar; Furnémont, Arnaud; Fantini, Andrea; Donadio, Gabriele Luca; Souriau, Laurent; Crotti, Davide; Yasin, Farrukh; Appeltans, Raf; Rao, Siddharth; De Simone, Danilo; Rincon Delgadillo, Paulina; Leray, Philippe; Charley, Anne-Laure; Zhou, Daisy; Veloso, Anabela; Collaert, Nadine; Hasumi, Kazuhisa; Koshihara, Shunsuke; Ikota, Masami; Okagawa, Yutaka; Ishimoto, Toru

2017-03-01

The CD SEM (Critical Dimension Scanning Electron Microscope) is one of the main tools used to estimate Critical Dimension (CD) in semiconductor manufacturing nowadays, but, as all metrology tools, it will face considerable challenges to keep up with the requirements of the future technology nodes. The root causes of these challenges are not uniquely related to the shrinking CD values, as one might expect, but to the increase in complexity of the devices in terms of morphology and chemical composition as well. In fact, complicated threedimensional device architectures, high aspect ratio features, and wide variety of materials are some of the unavoidable characteristics of the future metrology nodes. This means that, beside an improvement in resolution, it is critical to develop a CD SEM metrology capable of satisfying the specific needs of the devices of the nodes to come, needs that sometimes will have to be addressed through dramatic changes in approach with respect to traditional CD SEM metrology. In this paper, we report on the development of advanced CD SEM metrology at imec on a variety of device platform and processes, for both logic and memories. We discuss newly developed approaches for standard, IIIV, and germanium FinFETs (Fin Field Effect Transistors), for lateral and vertical nanowires (NW), 3D NAND (three-dimensional NAND), STT-MRAM (Spin Transfer Magnetic Torque Random-Access Memory), and ReRAM (Resistive Random Access Memory). Applications for both front-end of line (FEOL) and back-end of line (BEOL) are developed. In terms of process, S/D Epi (Source Drain Epitaxy), SAQP (Self-Aligned Quadruple Patterning), DSA (Dynamic Self-Assembly), and EUVL (Extreme Ultraviolet Lithography) have been used. The work reported here has been performed on Hitachi CG5000, CG6300, and CV5000. In terms of logic, we discuss here the S/D epi defect classification, the metrology optimization for STI (Shallow Trench Isolation) Ge FinFETs, the defectivity of III-V STI FinFETs,, metrology for vertical and horizontal NWs. With respect to memory, we discuss a STT-RAM statistical CD analysis and its comparison to electrical performance, ReRAM metrology for VMCO (Vacancy-modulated conductive oxide) with comparison with electrical performance, 3D NAND ONO (Oxide Nitride Oxide) thickness measurements. In addition, we report on 3D morphological reconstruction using CD SEM in conjunction with FIB (Focused Ion Beam), on optimized BKM (Best Known Methods) development methodologies, and on CD SEM overlay. The large variety of results reported here gives a clear overview of the creative effort put in place to ensure that the critical potential of CD SEM metrology tools is fully enabled for the 5nm node and beyond.

High-Throughput Bit-Serial LDPC Decoder LSI Based on Multiple-Valued Asynchronous Interleaving

NASA Astrophysics Data System (ADS)

Onizawa, Naoya; Hanyu, Takahiro; Gaudet, Vincent C.

This paper presents a high-throughput bit-serial low-density parity-check (LDPC) decoder that uses an asynchronous interleaver. Since consecutive log-likelihood message values on the interleaver are similar, node computations are continuously performed by using the most recently arrived messages without significantly affecting bit-error rate (BER) performance. In the asynchronous interleaver, each message's arrival rate is based on the delay due to the wire length, so that the decoding throughput is not restricted by the worst-case latency, which results in a higher average rate of computation. Moreover, the use of a multiple-valued data representation makes it possible to multiplex control signals and data from mutual nodes, thus minimizing the number of handshaking steps in the asynchronous interleaver and eliminating the clock signal entirely. As a result, the decoding throughput becomes 1.3 times faster than that of a bit-serial synchronous decoder under a 90nm CMOS technology, at a comparable BER.

A hybrid magnetic/complementary metal oxide semiconductor three-context memory bit cell for non-volatile circuit design

NASA Astrophysics Data System (ADS)

Jovanović, B.; Brum, R. M.; Torres, L.

2014-04-01

After decades of continued scaling to the beat of Moore's law, it now appears that conventional silicon based devices are approaching their physical limits. In today's deep-submicron nodes, a number of short-channel and quantum effects are emerging that affect the manufacturing process, as well as, the functionality of the microelectronic systems-on-chip. Spintronics devices that exploit both the intrinsic spin of the electron and its associated magnetic moment, in addition to its fundamental electronic charge, are promising solutions to circumvent these scaling threats. Being compatible with the CMOS technology, such devices offer a promising synergy of radiation immunity, infinite endurance, non-volatility, increased density, etc. In this paper, we present a hybrid (magnetic/CMOS) cell that is able to store and process data both electrically and magnetically. The cell is based on perpendicular spin-transfer torque magnetic tunnel junctions (STT-MTJs) and is suitable for use in magnetic random access memories and reprogrammable computing (non-volatile registers, processor cache memories, magnetic field-programmable gate arrays, etc). To demonstrate the potential our hybrid cell, we physically implemented a small hybrid memory block using 45 nm × 45 nm round MTJs for the magnetic part and 28 nm fully depleted silicon on insulator (FD-SOI) technology for the CMOS part. We also report the cells measured performances in terms of area, robustness, read/write speed and energy consumption.

Electromigration Reliability of Advanced Interconnects

NASA Astrophysics Data System (ADS)

Hu, C.-K.; Gignac, L. M.; Baker-O'Neal, B.; Liniger, E.; Yu, R.; Flaitz, P.; Stamper, A. K.

2007-10-01

Electromigration behavior in Cu damascene wires was studied for various metal line widths, thicknesses and grain sizes where the grain size was modulated by Cu linewidth and thickness, and by adjusting the wafer annealing process step after Cu electroplating and before Cu chemical mechanical polishing. Significantly different results were found between 0.2 μm and 65 nm CMOS node technologies. A larger variation of Cu grain size between the samples was achieved on 65 nm node which was due to the finer line width and thinner metal thickness. The Cu lifetime and mass flow in samples with bamboo, near bamboo, bamboo-polycrystalline mixture, and polycrystalline grain structures were measured. These factors allow one to accurately resolve the relative contribution between grain boundary and interface diffusions in the Cu nanowires. The electromigration mass flow estimated from the lifetime on the test line on a W via and physically stable liner was found to be linearly proportional to current density. The effects of Cu(Ti) alloy seeds and Cu surface pre-clean techniques before the dielectric cap depositions on Cu electromigration were also observed. A significantly improved Cu lifetime, at the expense of the Cu conductivity, was found. The electromigration activation energies for Cu in Cu(Ti) alloy, along Cu/amorphous a-SiCxNyHz interface and in Cu grain boundaries were found to be 1.3, 0.95 and 0.79+0.05 eV, respectively.

Writing time estimation of EB mask writer EBM-9000 for hp16nm/logic11nm node generation

NASA Astrophysics Data System (ADS)

Kamikubo, Takashi; Takekoshi, Hidekazu; Ogasawara, Munehiro; Yamada, Hirokazu; Hattori, Kiyoshi

2014-10-01

The scaling of semiconductor devices is slowing down because of the difficulty in establishing their functionality at the nano-size level and also because of the limitations in fabrications, mainly the delay of EUV lithography. While multigate devices (FinFET) are currently the main driver for scalability, other types of devices, such as 3D devices, are being realized to relax the scaling of the node. In lithography, double or multiple patterning using ArF immersion scanners is still a realistic solution offered for the hp16nm node fabrication. Other lithography candidates are those called NGL (Next Generation Lithography), such as DSA (Directed-Self-Assembling) or nanoimprint. In such situations, shot count for mask making by electron beam writers will not increase. Except for some layers, it is not increasing as previously predicted. On the other hand, there is another aspect that increases writing time. The exposure dose for mask writing is getting higher to meet tighter specifications of CD uniformity, in other words, reduce LER. To satisfy these requirements, a new electron beam mask writer, EBM-9000, has been developed for hp16nm/logic11nm generation. Electron optical system, which has the immersion lens system, was evolved from EBM-8000 to achieve higher current density of 800A/cm2. In this paper, recent shot count and dose trend are discussed. Also, writing time is estimated for the requirements in EBM-9000.

Surface characterization of InP trenches embedded in oxide using scanning probe microscopy

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mannarino, Manuel, E-mail: manuel.mannarino@imec.be, E-mail: manuelmannarino@gmail.com; Chintala, Ravi; Vandervorst, Wilfried

2015-12-14

Metrology for structural and electrical analyses at device level has been identified as one of the major challenges to be resolved for the sub-14 nm technology nodes. In these advanced nodes, new high mobility semiconductors, such as III–V compounds, are grown in narrow trenches on a Si substrate. Probing the nature of the defects, the defect density, and the role of processing steps on the surface of such structures are prime metrology requirements. In order to enable defect analysis on a (III–V) surface, a proper sample preparation for oxide removal is of primary importance. In this work, the effectiveness of differentmore » chemical cleanings and thermal annealing procedures is investigated on both blanket InP and oxide embedded InP trenches by means of scanning probe microscopy techniques. It is found that the most effective approach is a combination of an HCl-based chemical cleaning combined with a low-temperature thermal annealing leading to an oxide free surface with atomically flat areas. Scanning tunneling microscopy (STM) has been the preferred method for such investigations on blanket films due to its intrinsic sub-nm spatial resolution. However, its application on oxide embedded structures is non-trivial. To perform STM on the trenches of interest (generally <20 nm wide), we propose a combination of non-contact atomic force microscopy and STM using the same conductive atomic force microscopy tip Our results prove that with these procedures, it is possible to perform STM in narrow InP trenches showing stacking faults and surface reconstruction. Significant differences in terms of roughness and terrace formation are also observed between the blanket and the oxide embedded InP.« less

Molecular organization of cytokinesis nodes and contractile rings by super-resolution fluorescence microscopy of live fission yeast

PubMed Central

Laplante, Caroline; Huang, Fang; Tebbs, Irene R.; Bewersdorf, Joerg; Pollard, Thomas D.

2016-01-01

Cytokinesis in animals, fungi, and amoebas depends on the constriction of a contractile ring built from a common set of conserved proteins. Many fundamental questions remain about how these proteins organize to generate the necessary tension for cytokinesis. Using quantitative high-speed fluorescence photoactivation localization microscopy (FPALM), we probed this question in live fission yeast cells at unprecedented resolution. We show that nodes, protein assembly precursors to the contractile ring, are discrete structural units with stoichiometric ratios and distinct distributions of constituent proteins. Anillin Mid1p, Fes/CIP4 homology-Bin/amphiphysin/Rvs (F-BAR) Cdc15p, IQ motif containing GTPase-activating protein (IQGAP) Rng2p, and formin Cdc12p form the base of the node that anchors the ends of myosin II tails to the plasma membrane, with myosin II heads extending into the cytoplasm. This general node organization persists in the contractile ring where nodes move bidirectionally during constriction. We observed the dynamics of the actin network during cytokinesis, starting with the extension of short actin strands from nodes, which sometimes connected neighboring nodes. Later in cytokinesis, a broad network of thick bundles coalesced into a tight ring around the equator of the cell. The actin ring was ∼125 nm wide and ∼125 nm thick. These observations establish the organization of the proteins in the functional units of a cytokinetic contractile ring. PMID:27647921

Designing to win in sub-90nm mask production

NASA Astrophysics Data System (ADS)

Zhang, Yuan

2005-11-01

An informal survey conducted with key customers by Photronics indicates that the time gap between technology nodes has accelerated in recent years. Previously the cycle was three years. However, between 130nm and 90nm there was less than a 2 year gap, and between 90nm and 65nm a 1.5 year gap exists. As a result, the technical challenges have increased substantially. In addition, mask costs are rising exponentially due to high capital equipment cost, a shrinking customer base, long write times and increased applications of 193nm EAPSM or AAPSM. Collaboration among EDA companies, mask houses and wafer manufacturers is now more important than ever. This paper will explore avenues for reducing mask costs, mainly in the areas of: write-time reduction through design for manufacturing (DFM), and yield improvement through specification relaxation. Our study conducted through layout vertex modeling suggests that a simple design shape such as a square versus a circle or an angled structure helps reduce shot count and write time. Shot count reduction through mask layout optimization, and advancement in new generation E-beam writers can reduce write time up to 65%. An advanced laser writer can produce those less critical E-beam layers in less than half the time of an e-beam writer. Additionally, the emerging imprint lithography brings new life and new challenges to the photomask industry with applications in many fields outside of the semiconductor industry. As immersion lithography is introduced for 45nm device production, polarization and MEEF effects due to the mask will become severe. Larger magnification not only provides benefits on CD control and MEEF, but also extends the life time of current 90nm/65nm tool sets where 45nm mask sets can be produced at a lower cost.

Technology-design-manufacturing co-optimization for advanced mobile SoCs

NASA Astrophysics Data System (ADS)

Yang, Da; Gan, Chock; Chidambaram, P. R.; Nallapadi, Giri; Zhu, John; Song, S. C.; Xu, Jeff; Yeap, Geoffrey

2014-03-01

How to maintain the Moore's Law scaling beyond the 193 immersion resolution limit is the key question semiconductor industry needs to answer in the near future. Process complexity will undoubtfully increase for 14nm node and beyond, which brings both challenges and opportunities for technology development. A vertically integrated design-technologymanufacturing co-optimization flow is desired to better address the complicated issues new process changes bring. In recent years smart mobile wireless devices have been the fastest growing consumer electronics market. Advanced mobile devices such as smartphones are complex systems with the overriding objective of providing the best userexperience value by harnessing all the technology innovations. Most critical system drivers are better system performance/power efficiency, cost effectiveness, and smaller form factors, which, in turns, drive the need of system design and solution with More-than-Moore innovations. Mobile system-on-chips (SoCs) has become the leading driver for semiconductor technology definition and manufacturing. Here we highlight how the co-optimization strategy influenced architecture, device/circuit, process technology and package, in the face of growing process cost/complexity and variability as well as design rule restrictions.

EDITORIAL: Extreme Ultraviolet Light Sources for Semiconductor Manufacturing

NASA Astrophysics Data System (ADS)

Attwood, David

2004-12-01

The International Technology Roadmap for Semiconductors (ITRS) [1] provides industry expectations for high volume computer chip fabrication a decade into the future. It provides expectations to anticipated performance and requisite specifications. While the roadmap provides a collective projection of what international industry expects to produce, it does not specify the technology that will be employed. Indeed, there are generally several competing technologies for each two or three year step forward—known as `nodes'. Recent successful technologies have been based on KrF (248 nm), and now ArF (193 nm) lasers, combined with ultraviolet transmissive refractive optics, in what are known as step and scan exposure tools. Less fortunate technologies in the recent past have included soft x-ray proximity printing and, it appears, 157 nm wavelength F2 lasers. In combination with higher numerical aperture liquid emersion optics, 193 nm is expected to be used for the manufacture of leading edge chip performance for the coming five years. Beyond that, starting in about 2009, the technology to be employed is less clear. The leading candidate for the 2009 node is extreme ultraviolet (EUV) lithography, however this requires that several remaining challenges, including sufficient EUV source power, be overcome in a timely manner. This technology is based on multilayer coated reflective optics [2] and an EUV emitting plasma. Following Moore's Law [3] it is expected, for example, that at the 2009 `32 nm node' (printable patterns of 32 nm half-pitch), isolated lines with 18 nm width will be formed in resist (using threshold effects), and that these will be further narrowed to 13 nm in transfer to metalized electronic gates. These narrow features are expected to provide computer chips of 19 GHz clock frequency, with of the order of 1.5 billion transistors per chip [1]. This issue of Journal of Physics D: Applied Physics contains a cluster of eight papers addressing the critical issue of available EUV power from electrical discharge pinch plasmas and laser produced plasmas, including the roots of these requirements, the relevant plasma and radiation physics, and current state-of-the-art commercial technology. In the first paper of the cluster, Vadim Banine and Roel Moors of ASML in the Netherlands provide a detailed review of the required EUV power based on an economically viable throughput of one hundred 300 mm diameter wafers per hour, projected resist sensitivity, number of finite reflectivity multilayer coated surfaces and their collective spectral bandwidth, and a collection solid angle set by optical phase-space constraints and plasma source size. Thomas Krücken and his colleagues from Philips and the Fraunhofer Institute in Aachen present a theoretical model of radiation generation and transport based on model density and temperature profiles in an electrical discharge plasma, providing valuable insights into radiation physics and the limits to achievable power. Kenneth Fahy and his colleagues at UCD in Dublin and NIST in the US, in their paper, describe in detail atomic physics calculations of emission from relevant lines and unresolved transition arrays (UTAs) of candidate xenon and tin ions, each of which radiate strongly within the acceptance bandwidth of the multilayer coatings. The different elements, Xe and Sn, however, raise significantly different implications for source debris production and thus of requisite debris mitigation requirements. Björn Hannson and Hans Hertz of KTH University in Stockholm present a substantial review of laser produced plasmas for the EUV, including those based on liquid jet technologies, leading to a path of mass limited target material, and significant stand-off distance from the solid nozzle, which maximize EUV power generation while minimizing debris production. In addition to an extensive review of EUV source related literature, they describe experiments with laser irradiated droplets and filaments, for both Xe and Sn. The embodiment of electrical discharge plasmas and laser-produced plasmas into commercially available EUV sources, with EUV powers that project to suitable levels, is presented in the fifth paper by Uwe Stamm of XTREME Technologies in Göttingen. For discharge produced plasmas, thermal loading and electrode erosion are significant issues. Vladimir Borisov and his colleagues, at the Troitsk Institute outside Moscow, address these issues and provide novel ideas for the multiplexing of several discharge plasmas feeding a single optical system. Igor Fomenkov and his colleagues at Cymer in San Diego describe issues associated with a dense plasma focus pinch, including a comparison of operations with both positive and negative polarity. In the eighth paper, Malcolm McGeoch of Plex in Massachusetts provides a theoretical description of the vaporization and ionization of spherical tin droplets in discharge plasma. Together this cluster of papers provides a broad review of the current status of high power EUV plasma sources for semiconductor manufacturing. This very current topic, of intense interest worldwide, is considered further in a book [4] of collected papers to become available in mid-2005. Additionally, a special journal issue emphasizing coherent EUV sources, albeit at lower average powers, is soon to appear [5]. References [1] http://public.itrsr.net [2] Attwood D 2000 Soft X-Rays and Extreme Ultraviolet Radiation: Principles and Applications (Cambridge: Cambridge University Press) www.coe.Berkeley.edu/AST/sxreuv [3] Moore G E 1965 Cramming More Components onto Integrated Circuits Electronics Magazine 114 Moore G E 1995 Lithography and the Future of Moore's Law SPIE 243 2 [4] Bakshi V ed 2005 EUV Sources for Lithography (Bellingham WA:SPIE) at press [5] IEEE J. Special Topics in Quantum Electronics, Short Wavelength and EUV Lasers 10 Dec 2004 at press

SU-D-210-04: Using Radiotherapy Biomaterials to Brand and Track Deadly Cancer Cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Altundal, Y; Sajo, E; Ngwa, W

Purpose: Metastasis accounts for over 90% of all cancer associated suffering and death and arguably presents the most formidable challenges in cancer management. The detection of metastatic or rare circulating tumor cells (CTCs) in blood or lymph nodes remains a formidable technological challenge. In this study, we investigated the time needed to label each cancer cell in-situ (right at the source tumor) with sufficient number of GNPs that will allow enhanced non-invasive detection via photoacoustic imaging in the lymph nodes. Such in-situ labeling can be achieved via sustained release of the GNPs from Radiotherapy (RT) biomaterials (e.g. fiducials, spacers) coated/loadedmore » with the GNP. Methods: The minimum concentration (1000 GNPs/cell for 50nm GNPs) to detect GNPs with photoacoustic imaging method was experimentally measured by Mallidi et al. and fixed at the tumor sub-volume periphery. In this work, the GNPs were assumed to diffuse from a point source, placed in the middle of a 2–3cm tumor, with an initial concentration of 7–30 mg/g. The time required to label the cells with GNPs was calculated by solving the three dimensional diffusion-reaction equation analytically. The diffusion coefficient of 10nm GNPs was experimentally determined previously. Stokes-Einstein equation was used to calculate the diffusion coefficients for other sizes (2–50nm) of GNPs. The cellular uptake rate constants for several sizes of GNPs were experimentally measured by Jin et al. Results: The time required to label the cells was found 0.635–15.91 days for 2–50nm GNPs with an initial concentration of 7 mg/g GNPs in a 2 cm tumor; 1.379–34.633 days for 2–50nm GNPs with an initial concentration of 30 mg/g GNPs in a 3cm tumor. Conclusion: Our results highlight new potential for labeling CTCs with GNPs released from smart RT biomaterials (i.e. fiducials or spacers loaded with the GNP) towards enhanced non-invasive imaging/detection via photoacoustic imaging.« less

Micro-bridge defects: characterization and root cause analysis

NASA Astrophysics Data System (ADS)

Santoro, Gaetano; Van den Heuvel, Dieter; Braggin, Jennifer; Rosslee, Craig; Leray, Philippe J.; Cheng, Shaunee; Jehoul, Christiane; Schreutelkamp, Robert; Hillel, Noam

2010-03-01

Defect review of advanced lithography processes is becoming more and more challenging as feature sizes decrease. Previous studies using a defect review SEM on immersion lithography generated wafers have resulted in a defect classification scheme which, among others, includes a category for micro-bridges. Micro-bridges are small connections between two adjacent lines in photo-resist and are considered device killing defects. Micro-bridge rates also tend to increase as feature sizes decrease, making them even more important for the next technology nodes. Especially because micro-bridge defects can originate from different root causes, the need to further refine and split up the classification of this type of defect into sub groups may become a necessity. This paper focuses on finding the correlation of the different types of micro-bridge defects to a particular root cause based on a full characterization and root cause analysis of this class of defects, by using advanced SEM review capabilities like high quality imaging in very low FOV, Multi Perspective SEM Imaging (MPSI), tilted column and rotated stage (Tilt&Rotation) imaging and Focused Ion Beam (FIB) cross sectioning. Immersion lithography material has been mainly used to generate the set of data presented in this work even though, in the last part of the results, some EUV lithography data will be presented as part of the continuing effort to extend the micro-bridge defect characterization to the EUV technology on 40 nm technology node and beyond.

Towards large size substrates for III-V co-integration made by direct wafer bonding on Si

NASA Astrophysics Data System (ADS)

Daix, N.; Uccelli, E.; Czornomaz, L.; Caimi, D.; Rossel, C.; Sousa, M.; Siegwart, H.; Marchiori, C.; Hartmann, J. M.; Shiu, K.-T.; Cheng, C.-W.; Krishnan, M.; Lofaro, M.; Kobayashi, M.; Sadana, D.; Fompeyrine, J.

2014-08-01

We report the first demonstration of 200 mm InGaAs-on-insulator (InGaAs-o-I) fabricated by the direct wafer bonding technique with a donor wafer made of III-V heteroepitaxial structure grown on 200 mm silicon wafer. The measured threading dislocation density of the In0.53Ga0.47As (InGaAs) active layer is equal to 3.5 × 109 cm-2, and it does not degrade after the bonding and the layer transfer steps. The surface roughness of the InGaAs layer can be improved by chemical-mechanical-polishing step, reaching values as low as 0.4 nm root-mean-square. The electron Hall mobility in 450 nm thick InGaAs-o-I layer reaches values of up to 6000 cm2/Vs, and working pseudo-MOS transistors are demonstrated with an extracted electron mobility in the range of 2000-3000 cm2/Vs. Finally, the fabrication of an InGaAs-o-I substrate with the active layer as thin as 90 nm is achieved with a Buried Oxide of 50 nm. These results open the way to very large scale production of III-V-o-I advanced substrates for future CMOS technology nodes.

Direct Generation and Detection of Quantum Correlated Photons with 3.2 um Wavelength Spacing.

PubMed

Sua, Yong Meng; Fan, Heng; Shahverdi, Amin; Chen, Jia-Yang; Huang, Yu-Ping

2017-12-13

Quantum correlated, highly non-degenerate photons can be used to synthesize disparate quantum nodes and link quantum processing over incompatible wavelengths, thereby constructing heterogeneous quantum systems for otherwise unattainable superior performance. Existing techniques for correlated photons have been concentrated in the visible and near-IR domains, with the photon pairs residing within one micron. Here, we demonstrate direct generation and detection of high-purity photon pairs at room temperature with 3.2 um wavelength spacing, one at 780 nm to match the rubidium D2 line, and the other at 3950 nm that falls in a transparent, low-scattering optical window for free space applications. The pairs are created via spontaneous parametric downconversion in a lithium niobate waveguide with specially designed geometry and periodic poling. The 780 nm photons are measured with a silicon avalanche photodiode, and the 3950 nm photons are measured with an upconversion photon detector using a similar waveguide, which attains 34% internal conversion efficiency. Quantum correlation measurement yields a high coincidence-to-accidental ratio of 54, which indicates the strong correlation with the extremely non-degenerate photon pairs. Our system bridges existing quantum technology to the challenging mid-IR regime, where unprecedented applications are expected in quantum metrology and sensing, quantum communications, medical diagnostics, and so on.

Scanner focus metrology and control system for advanced 10nm logic node

NASA Astrophysics Data System (ADS)

Oh, Junghun; Maeng, Kwang-Seok; Shin, Jae-Hyung; Choi, Won-Woong; Won, Sung-Keun; Grouwstra, Cedric; El Kodadi, Mohamed; Heil, Stephan; van der Meijden, Vidar; Hong, Jong Kyun; Kim, Sang-Jin; Kwon, Oh-Sung

2018-03-01

Immersion lithography is being extended beyond the 10-nm node and the lithography performance requirement needs to be tightened further to ensure good yield. Amongst others, good on-product focus control with accurate and dense metrology measurements is essential to enable this. In this paper, we will present new solutions that enable onproduct focus monitoring and control (mean and uniformity) suitable for high volume manufacturing environment. We will introduce the concept of pure focus and its role in focus control through the imaging optimizer scanner correction interface. The results will show that the focus uniformity can be improved by up to 25%.

Expression and significance of CD44s, CD44v6, and nm23 mRNA in human cancer.

PubMed

Liu, Yong-Jun; Yan, Pei-Song; Li, Jun; Jia, Jing-Fen

2005-11-14

To investigate the relationship between the expression levels of nm23 mRNA, CD44s, and CD44v6, and oncogenesis, development and metastasis of human gastric adenocarcinoma, colorectal adenocarcinoma, intraductal carcinoma of breast, and lung cancer. Using tissue microarray by immuhistochemical (IHC) staining and in situ hybridization (ISH), we examined the expression levels of nm23 mRNA, CD44s, and CD44v6 in 62 specimens of human gastric adenocarcinoma and 62 specimens of colorectal adenocarcinoma; the expression of CD44s and CD44v6 in 120 specimens of intraductal carcinoma of breast and 20 specimens of normal breast tissue; the expression of nm23 mRNA in 72 specimens of human lung cancer and 23 specimens of normal tissue adjacent to cancer. The expression of nm23 mRNA in the tissues of gastric and colorectal adenocarcinoma was not significantly different from that in the normal tissues adjacent to cancer (P>0.05), and was not associated with the invasion of tumor and the pathology grade of adenocarcinoma (P>0.05). However, the expression of nm23 mRNA was correlated negatively to the lymph node metastasis of gastric and colorectal adenocarcinoma (r = -0.49, P<0.01; r = -4.93, P<0.01). The expression of CD44s in the tissues of gastric and colorectal adenocarcinoma was significantly different from that in the normal tissues adjacent to cancer (P<0.05; P<0.01). CD44v6 was expressed in the tissues of gastric and colorectal adenocarcinoma only, the expression of CD44v6 was significantly associated with the lymph node metastasis, invasion and pathological grade of the tumor (r = 0.47, P<0.01; r = 5.04, P<0.01). CD44s and CD44v6 were expressed in intraductal carcinoma of breast, the expression of CD44s and CD44v6 was significantly associated with lymph node metastases and invasion (P<0.01). However, neither of them was expressed in the normal breast tissue. In addition, the expression of CD44v6 was closely related to the degree of cell differentiation of intraductal carcinoma of breast (c2 = 5.68, P<0.05). The expressional level of nm23 mRNA was closely related to the degree of cell differentiation (P<0.05) and lymph node metastasis (P<0.01), but the expression of nm23 gene was not related to sex, age, and type of histological classification (P>0.05). Patients with overexpression of CD44s and CD44v6 and low expression of nm23 mRNA have a higher lymph node metastatic rate and invasion. In addition, overexpression of CD44v6 is closely related to the degree of cell differentiation. Detection of the three genes is able to provide a reliable index to evaluate the invasion and metastasis of tumor cells.

Characterization of various Si-photodiode junction combinations and layout specialities in 0.18µm CMOS and HV-CMOS technologies

NASA Astrophysics Data System (ADS)

Jonak-Auer, I.; Synooka, O.; Kraxner, A.; Roger, F.

2017-12-01

With the ongoing miniaturization of CMOS technologies the need for integrated optical sensors on smaller scale CMOS nodes arises. In this paper we report on the development and implementation of different optical sensor concepts in high performance 0.18µm CMOS and high voltage (HV) CMOS technologies on three different substrate materials. The integration process is such that complete modularity of the CMOS processes remains untouched and no additional masks or ion implantation steps are necessary for the sensor integration. The investigated processes support 1.8V and 3V standard CMOS functionality as well as HV transistors capable of operating voltages of 20V and 50V. These processes intrinsically offer a wide variety of junction combinations, which can be exploited for optical sensing purposes. The availability of junction depths from submicron to several microns enables the selection of spectral range from blue to infrared wavelengths. By appropriate layout the contributions of photo-generated carriers outside the target spectral range can be kept to a minimum. Furthermore by making use of other features intrinsically available in 0.18µm CMOS and HV-CMOS processes dark current rates of optoelectronic devices can be minimized. We present TCAD simulations as well as spectral responsivity, dark current and capacitance data measured for various photodiode layouts and the influence of different EPI and Bulk substrate materials thereon. We show examples of spectral responsivity of junction combinations optimized for peak sensitivity in the ranges of 400-500nm, 550-650nm and 700-900nm. Appropriate junction combination enables good spectral resolution for colour sensing applications even without any additional filter implementation. We also show that by appropriate use of shallow trenches dark current values of photodiodes can further be reduced.

Three dimensional profile measurement using multi-channel detector MVM-SEM

NASA Astrophysics Data System (ADS)

Yoshikawa, Makoto; Harada, Sumito; Ito, Keisuke; Murakawa, Tsutomu; Shida, Soichi; Matsumoto, Jun; Nakamura, Takayuki

2014-07-01

In next generation lithography (NGL) for the 1x nm node and beyond, the three dimensional (3D) shape measurements such as side wall angle (SWA) and height of feature on photomask become more critical for the process control. Until today, AFM (Atomic Force Microscope), X-SEM (cross-section Scanning Electron Microscope) and TEM (Transmission Electron Microscope) tools are normally used for 3D measurements, however, these techniques require time-consuming preparation and observation. And both X-SEM and TEM are destructive measurement techniques. This paper presents a technology for quick and non-destructive 3D shape analysis using multi-channel detector MVM-SEM (Multi Vision Metrology SEM), and also reports its accuracy and precision.

Emerging Applications for High K Materials in VLSI Technology

PubMed Central

Clark, Robert D.

2014-01-01

The current status of High K dielectrics in Very Large Scale Integrated circuit (VLSI) manufacturing for leading edge Dynamic Random Access Memory (DRAM) and Complementary Metal Oxide Semiconductor (CMOS) applications is summarized along with the deposition methods and general equipment types employed. Emerging applications for High K dielectrics in future CMOS are described as well for implementations in 10 nm and beyond nodes. Additional emerging applications for High K dielectrics include Resistive RAM memories, Metal-Insulator-Metal (MIM) diodes, Ferroelectric logic and memory devices, and as mask layers for patterning. Atomic Layer Deposition (ALD) is a common and proven deposition method for all of the applications discussed for use in future VLSI manufacturing. PMID:28788599

Pre-PDK block-level PPAC assessment of technology options for sub-7nm high-performance logic

NASA Astrophysics Data System (ADS)

Liebmann, L.; Northrop, G.; Facchini, M.; Riviere Cazaux, L.; Baum, Z.; Nakamoto, N.; Sun, K.; Chanemougame, D.; Han, G.; Gerousis, V.

2018-03-01

This paper describes a rigorous yet flexible standard cell place-and-route flow that is used to quantify block-level power, performance, and area trade-offs driven by two unique cell architectures and their associated design rule differences. The two architectures examined in this paper differ primarily in their use of different power-distribution-networks to achieve the desired circuit performance for high-performance logic designs. The paper shows the importance of incorporating block-level routability experiments in the early phases of design-technology co-optimization by reviewing a series of routing trials that explore different aspects of the technology definition. Since the electrical and physical parameters leading to critical process assumptions and design rules are unique to specific integration schemes and design objectives, it is understood that the goal of this work is not to promote one cell-architecture over another, but rather to convey the importance of exploring critical trade-offs long before the process details of the technology node are finalized to a point where a process design kit can be published.

Hardness Assurance for Low-Energy Proton-Induced Single-Event Effects: Final report for LDRD Project 173134

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dodds, Nathaniel Anson

2015-08-01

This report briefly summarizes three publications that resulted from a two-year LDRD. The three publications address a recently emerging reliability issue: namely, that low-energy protons (LEPs) can cause single-event effects (SEEs) in highly scaled microelectronics. These publications span from low to high technology readiness levels. In the first, novel experiments were used to prove that proton direct ionization is the dominant mechanism for LEP-induced SEEs. In the second, a simple method was developed to calculate expected on-orbit error rates for LEP effects. This simplification was enabled by creating (and characterizing) an accelerated space-like LEP environment in the laboratory. In themore » third publication, this new method was applied to many memory circuits from the 20-90 nm technology nodes to study the general importance of LEP effects, in terms of their contribution to the total on-orbit SEE rate.« less

Describing litho-constrained layout by a high-resolution model filter

NASA Astrophysics Data System (ADS)

Tsai, Min-Chun

2008-05-01

A novel high-resolution model (HRM) filtering technique was proposed to describe litho-constrained layouts. Litho-constrained layouts are layouts that have difficulties to pattern or are highly sensitive to process-fluctuations under current lithography technologies. HRM applies a short-wavelength (or high NA) model simulation directly on the pre-OPC, original design layout to filter out low spatial-frequency regions, and retain high spatial-frequency components which are litho-constrained. Since no OPC neither mask-synthesis steps are involved, this new technique is highly efficient in run time and can be used in design stage to detect and fix litho-constrained patterns. This method has successfully captured all the hot-spots with less than 15% overshoots on a realistic 80 mm2 full-chip M1 layout in 65nm technology node. A step by step derivation of this HRM technique is presented in this paper.

Ge-cap quantum-well bulk FinFET for 5 nm node CMOS integration

NASA Astrophysics Data System (ADS)

Dwi Kurniawan, Erry; Peng, Kang-Hui; Yang, Shang-Yi; Yang, Yi-Yun; Thirunavukkarasu, Vasanthan; Lin, Yu-Hsien; Wu, Yung-Chun

2018-04-01

We propose the use of Ge-cap quantum-well (QW) bulk FinFET for 5 nm CMOS integration, which is a Si channel wrapped with Ge around three sides of the fin channel. The simulation results show that the Ge-cap FinFET structure demonstrates better performance than pure Si, pure Ge, and Si-cap FinFET structures. By optimizing Si fin width and Ge-cap thickness, the on-state current of nFET and pFET can also be symmetric without changing the total fin width (F Wp = F Wn). The electrons in Ge-cap nFinFET concentrate in the Si channel because of QWs formed in the lowest conduction band of the Ge and Si heterostructure, while the holes in Ge-cap pFinFET prefer to stay in Ge surfaces owing to QWs formed in the Ge valence band. The physics studies of this device have made the design rules relevant for the application of the CMOS inverter and static random access memory (SRAM) application technology.

Controlling bridging and pinching with pixel-based mask for inverse lithography

NASA Astrophysics Data System (ADS)

Kobelkov, Sergey; Tritchkov, Alexander; Han, JiWan

2016-03-01

Inverse Lithography Technology (ILT) has become a viable computational lithography candidate in recent years as it can produce mask output that results in process latitude and CD control in the fab that is hard to match with conventional OPC/SRAF insertion approaches. An approach to solving the inverse lithography problem as a nonlinear, constrained minimization problem over a domain mask pixels was suggested in the paper by Y. Granik "Fast pixel-based mask optimization for inverse lithography" in 2006. The present paper extends this method to satisfy bridging and pinching constraints imposed on print contours. Namely, there are suggested objective functions expressing penalty for constraints violations, and their minimization with gradient descent methods is considered. This approach has been tested with an ILT-based Local Printability Enhancement (LPTM) tool in an automated flow to eliminate hotspots that can be present on the full chip after conventional SRAF placement/OPC and has been applied in 14nm, 10nm node production, single and multiple-patterning flows.

Sentinel lymph node detection in gynecologic malignancies by a handheld fluorescence camera

NASA Astrophysics Data System (ADS)

Hirsch, Ole; Szyc, Lukasz; Muallem, Mustafa Zelal; Ignat, Iulia; Chekerov, Radoslav; Macdonald, Rainer; Sehouli, Jalid; Braicu, Ioana; Grosenick, Dirk

2017-02-01

Near-infrared fluorescence imaging using indocyanine green (ICG) as a tracer is a promising technique for mapping the lymphatic system and for detecting sentinel lymph nodes (SLN) during cancer surgery. In our feasibility study we have investigated the application of a custom-made handheld fluorescence camera system for the detection of lymph nodes in gynecological malignancies. It comprises a low cost CCD camera with enhanced NIR sensitivity and two groups of LEDs emitting at wavelengths of 735 nm and 830 nm for interlaced recording of fluorescence and reflectance images of the tissue, respectively. With the help of our system, surgeons can observe fluorescent tissue structures overlaid onto the anatomical image on a monitor in real-time. We applied the camera system for intraoperative lymphatic mapping in 5 patients with vulvar cancer, 5 patients with ovarian cancer, 3 patients with cervical cancer, and 3 patients with endometrial cancer. ICG was injected at four loci around the primary malignant tumor during surgery. After a residence time of typically 15 min fluorescence images were taken in order to visualize the lymph nodes closest to the carcinomas. In cases with vulvar cancer about half of the lymph nodes detected by routinely performed radioactive SLN mapping have shown fluorescence in vivo as well. In the other types of carcinomas several lymph nodes could be detected by fluorescence during laparotomy. We conclude that our low cost camera system has sufficient sensitivity for lymphatic mapping during surgery.

Investigation of microstructure and properties of ultrathin graded ZrNx self-assembled diffusion barrier in deep nano-vias prepared by plasma ion immersion implantation

NASA Astrophysics Data System (ADS)

Zou, Jianxiong; Liu, Bo; Lin, Liwei; Lu, Yuanfu; Dong, Yuming; Jiao, Guohua; Ma, Fei; Li, Qiran

2018-01-01

Ultrathin graded ZrNx self-assembled diffusion barriers with controllable stoichiometry was prepared in Cu/p-SiOC:H interfaces by plasma immersion ion implantation (PIII) with dynamic regulation of implantation fluence. The fundamental relationship between the implantation fluence of N+ and the stoichiometry and thereby the electrical properties of the ZrNx barrier was established. The optimized fluence of a graded ZrN thin film with gradually decreased Zr valence was obtained with the best electrical performance as well. The Cu/p-SiOC:H integration is thermally stable up to 500 °C due to the synergistic effect of Cu3Ge and ZrNx layers. Accordingly, the PIII process was verified in a 100-nm-thick Cu dual-damascene interconnect, in which the ZrNx diffusion barrier of 1 nm thick was successfully self-assembled on the sidewall without barrier layer on the via bottom. In this case, the via resistance was reduced by approximately 50% in comparison with Ta/TaN barrier. Considering the results in this study, ultrathin ZrNx conformal diffusion barrier can be adopted in the sub-14 nm technology node.

The line roughness improvement with plasma coating and cure treatment for 193nm lithography and beyond

NASA Astrophysics Data System (ADS)

Zheng, Erhu; Huang, Yi; Zhang, Haiyang

2017-03-01

As CMOS technology reaches 14nm node and beyond, one of the key challenges of the extension of 193nm immersion lithography is how to control the line edge and width roughness (LER/LWR). For Self-aligned Multiple Patterning (SaMP), LER becomes larger while LWR becomes smaller as the process proceeds[1]. It means plasma etch process becomes more and more dominant for LER reduction. In this work, we mainly focus on the core etch solution including an extra plasma coating process introduced before the bottom anti reflective coating (BARC) open step, and an extra plasma cure process applied right after BARC-open step. Firstly, we leveraged the optimal design experiment (ODE) to investigate the impact of plasma coating step on LER and identified the optimal condition. ODE is an appropriate method for the screening experiments of non-linear parameters in dynamic process models, especially for high-cost-intensive industry [2]. Finally, we obtained the proper plasma coating treatment condition that has been proven to achieve 32% LER improvement compared with standard process. Furthermore, the plasma cure scheme has been also optimized with ODE method to cover the LWR degradation induced by plasma coating treatment.

Advanced process and defect characterization methodology to support process development of advanced patterning structures

NASA Astrophysics Data System (ADS)

Ketkar, Supriya; Lee, Junhan; Asokamani, Sen; Cho, Winston; Mishra, Shailendra

2018-03-01

This paper discusses the approach and solution adopted by GLOBALFOUNDRIES, a high volume manufacturing (HVM) foundry, for dry-etch related edge-signature surface particle defects issue facing the sub-nm node in the gate-etch sector. It is one of the highest die killers for the company in the 14-nm node. We have used different approaches to attack and rectify the edge signature surface particle defect. Several process-related & hardware changes have been successively implemented to achieve defect reduction improvement by 63%. Each systematic process and/or hardware approach has its own unique downstream issues and they have been dealt in a route-cause-effect technique to address the issue.

Automated imprint mask cleaning for step-and-flash imprint lithography

NASA Astrophysics Data System (ADS)

Singh, Sherjang; Chen, Ssuwei; Selinidis, Kosta; Fletcher, Brian; McMackin, Ian; Thompson, Ecron; Resnick, Douglas J.; Dress, Peter; Dietze, Uwe

2009-03-01

Step-and-Flash Imprint Lithography (S-FIL) is a promising lithography strategy for semiconductor manufacturing at device nodes below 32nm. The S-FIL 1:1 pattern transfer technology utilizes a field-by-field ink jet dispense of a low viscosity liquid resist to fill the relief pattern of the device layer etched into the glass mask. Compared to other sub 40nm CD lithography methods, the resulting high resolution, high throughput through clustering, 3D patterning capability, low process complexity, and low cost of ownership (CoO) of S-FIL makes it a widely accepted technology for patterned media as well as a promising mainstream option for future CMOS applications. Preservation of mask cleanliness is essential to avoid risk of repeated printing of defects. The development of mask cleaning processes capable of removing particles adhered to the mask surface without damaging the mask is critical to meet high volume manufacturing requirements. In this paper we have presented various methods of residual (cross-linked) resist removal and final imprint mask cleaning demonstrated on the HamaTech MaskTrack automated mask cleaning system. Conventional and non-conventional (acid free) methods of particle removal have been compared and the effect of mask cleaning on pattern damage and CD integrity is also studied.

Fast mask writers: technology options and considerations

NASA Astrophysics Data System (ADS)

Litt, Lloyd C.; Groves, Timothy; Hughes, Greg

2011-04-01

The semiconductor industry is under constant pressure to reduce production costs even as the complexity of technology increases. Lithography represents the most expensive process due to its high capital equipment costs and the implementation of low-k1 lithographic processes, which have added to the complexity of making masks because of the greater use of optical proximity correction, pixelated masks, and double or triple patterning. Each of these mask technologies allows the production of semiconductors at future nodes while extending the utility of current immersion tools. Low-k1 patterning complexity combined with increased data due to smaller feature sizes is driving extremely long mask write times. While a majority of the industry is willing to accept times of up to 24 hours, evidence suggests that the write times for many masks at the 22 nm node and beyond will be significantly longer. It has been estimated that funding on the order of 50M to 90M for non-recurring engineering (NRE) costs will be required to develop a multiple beam mask writer system, yet the business case to recover this kind of investment is not strong. Moreover, funding such a development poses a high risk for an individual supplier. The structure of the mask fabrication marketplace separates the mask writer equipment customer (the mask supplier) from the final customer (wafer manufacturer) that will be most effected by the increase in mask cost that will result if a high speed mask writer is not available. Since no individual company will likely risk entering this market, some type of industry-wide funding model will be needed.

Application of CPL with Interference Mapping Lithography to generate random contact reticle designs for the 65-nm node

NASA Astrophysics Data System (ADS)

Van Den Broeke, Douglas J.; Laidig, Thomas L.; Chen, J. Fung; Wampler, Kurt E.; Hsu, Stephen D.; Shi, Xuelong; Socha, Robert J.; Dusa, Mircea V.; Corcoran, Noel P.

2004-08-01

Imaging contact and via layers continues to be one of the major challenges to be overcome for 65nm node lithography. Initial results of using ASML MaskTools' CPL Technology to print contact arrays through pitch have demonstrated the potential to further extend contact imaging to a k1 near 0.30. While there are advantages and disadvantages for any potential RET, the benefits of not having to solve the phase assignment problem (which can lead to unresolvable phase conflicts), of it being a single reticle - single exposure technique, and its application to multiple layers within a device (clear field and dark field) make CPL an attractive, cost effective solution to low k1 imaging. However, real semiconductor circuit designs consist of much more than regular arrays of contact holes and a method to define the CPL reticle design for a full chip circuit pattern is required in order for this technique to be feasible in volume manufacturing. Interference Mapping Lithography (IML) is a novel approach for defining optimum reticle patterns based on the imaging conditions that will be used when the wafer is exposed. Figure 1 shows an interference map for an isolated contact simulated using ASML /1150 settings of 0.75NA and 0.92/0.72/30deg Quasar illumination. This technique provides a model-based approach for placing all types features (scattering bars, anti-scattering bars, non-printing assist features, phase shifted and non-phase shifted) for the purpose of enhancing the resolution of the target pattern and it can be applied to any reticle type including binary (COG), attenuated phase shifting mask (attPSM), alternating aperture phase shifting mask (altPSM), and CPL. In this work, we investigate the application of IML to generate CPL reticle designs for random contact patterns that are typical for 65nm node logic devices. We examine the critical issues related to using CPL with Interference Mapping Lithography including controlling side lobe printing, contact patterns with odd symmetry, forbidden pitch regions, and reticle manufacturing constraints. Multiple methods for deriving the interference map used to define reticle patterns for various RET's will be discussed. CPL reticle designs that were created from implementing automated algorithms for contact pattern decomposition using MaskWeaver will also be presented.

A modified implementation of tristate inverter based static master-slave flip-flop with improved power-delay-area product.

PubMed

Singh, Kunwar; Tiwari, Satish Chandra; Gupta, Maneesha

2014-01-01

The paper introduces novel architectures for implementation of fully static master-slave flip-flops for low power, high performance, and high density. Based on the proposed structure, traditional C(2)MOS latch (tristate inverter/clocked inverter) based flip-flop is implemented with fewer transistors. The modified C(2)MOS based flip-flop designs mC(2)MOSff1 and mC(2)MOSff2 are realized using only sixteen transistors each while the number of clocked transistors is also reduced in case of mC(2)MOSff1. Postlayout simulations indicate that mC(2)MOSff1 flip-flop shows 12.4% improvement in PDAP (power-delay-area product) when compared with transmission gate flip-flop (TGFF) at 16X capacitive load which is considered to be the best design alternative among the conventional master-slave flip-flops. To validate the correct behaviour of the proposed design, an eight bit asynchronous counter is designed to layout level. LVS and parasitic extraction were carried out on Calibre, whereas layouts were implemented using IC station (Mentor Graphics). HSPICE simulations were used to characterize the transient response of the flip-flop designs in a 180 nm/1.8 V CMOS technology. Simulations were also performed at 130 nm, 90 nm, and 65 nm to reveal the scalability of both the designs at modern process nodes.

A Modified Implementation of Tristate Inverter Based Static Master-Slave Flip-Flop with Improved Power-Delay-Area Product

PubMed Central

Tiwari, Satish Chandra; Gupta, Maneesha

2014-01-01

The paper introduces novel architectures for implementation of fully static master-slave flip-flops for low power, high performance, and high density. Based on the proposed structure, traditional C2MOS latch (tristate inverter/clocked inverter) based flip-flop is implemented with fewer transistors. The modified C2MOS based flip-flop designs mC2MOSff1 and mC2MOSff2 are realized using only sixteen transistors each while the number of clocked transistors is also reduced in case of mC2MOSff1. Postlayout simulations indicate that mC2MOSff1 flip-flop shows 12.4% improvement in PDAP (power-delay-area product) when compared with transmission gate flip-flop (TGFF) at 16X capacitive load which is considered to be the best design alternative among the conventional master-slave flip-flops. To validate the correct behaviour of the proposed design, an eight bit asynchronous counter is designed to layout level. LVS and parasitic extraction were carried out on Calibre, whereas layouts were implemented using IC station (Mentor Graphics). HSPICE simulations were used to characterize the transient response of the flip-flop designs in a 180 nm/1.8 V CMOS technology. Simulations were also performed at 130 nm, 90 nm, and 65 nm to reveal the scalability of both the designs at modern process nodes. PMID:24723808

Coater/developer based techniques to improve high-resolution EUV patterning defectivity

NASA Astrophysics Data System (ADS)

Hontake, Koichi; Huli, Lior; Lemley, Corey; Hetzer, Dave; Liu, Eric; Ko, Akiteru; Kawakami, Shinichiro; Shimoaoki, Takeshi; Hashimoto, Yusaku; Tanaka, Koichiro; Petrillo, Karen; Meli, Luciana; De Silva, Anuja; Xu, Yongan; Felix, Nelson; Johnson, Richard; Murray, Cody; Hubbard, Alex

2017-10-01

Extreme ultraviolet lithography (EUVL) technology is one of the leading candidates under consideration for enabling the next generation of devices, for 7nm node and beyond. As the focus shifts to driving down the 'effective' k1 factor and enabling the full scaling entitlement of EUV patterning, new techniques and methods must be developed to reduce the overall defectivity, mitigate pattern collapse, and eliminate film-related defects. In addition, CD uniformity and LWR/LER must be improved in terms of patterning performance. Tokyo Electron Limited (TEL™) and IBM Corporation are continuously developing manufacturing quality processes for EUV. In this paper, we review the ongoing progress in coater/developer based processes (coating, developing, baking) that are required to enable EUV patterning.

Soft errors in commercial off-the-shelf static random access memories

NASA Astrophysics Data System (ADS)

Dilillo, L.; Tsiligiannis, G.; Gupta, V.; Bosser, A.; Saigne, F.; Wrobel, F.

2017-01-01

This article reviews state-of-the-art techniques for the evaluation of the effect of radiation on static random access memory (SRAM). We detailed irradiation test techniques and results from irradiation experiments with several types of particles. Two commercial SRAMs, in 90 and 65 nm technology nodes, were considered as case studies. Besides the basic static and dynamic test modes, advanced stimuli for the irradiation tests were introduced, as well as statistical post-processing techniques allowing for deeper analysis of the correlations between bit-flip cross-sections and design/architectural characteristics of the memory device. Further insight is provided on the response of irradiated stacked layer devices and on the use of characterized SRAM devices as particle detectors.

Stability and imaging of the ASML EUV alpha demo tool

NASA Astrophysics Data System (ADS)

Hermans, Jan V.; Baudemprez, Bart; Lorusso, Gian; Hendrickx, Eric; van Dijk, Andre; Jonckheere, Rik; Goethals, Anne-Marie

2009-03-01

Extreme Ultra-Violet (EUV) lithography is the leading candidate for semiconductor manufacturing of the 22nm technology node and beyond, due to the very short wavelength of 13.5nm. However, reducing the wavelength adds complexity to the lithographic process. The impact of the EUV specific conditions on lithographic performance needs to be understood, before bringing EUV lithography into pre-production. To provide early learning on EUV, an EUV fullfield scanner, the Alpha Demo Tool (ADT) from ASML was installed at IMEC, using a Numerical Aperture (NA) of 0.25. In this paper we report on different aspects of the ADT: the imaging and overlay performance and both short and long-term stability. For 40nm dense Lines-Spaces (LS), the ADT shows an across field overlapping process window of 270nm Depth Of Focus (DOF) at 10% Exposure Latitude (EL) and a wafer CD Uniformity (CDU) of 3nm 3σ, without any corrections for process or reticle. The wafer CDU is correlated to different factors that are known to influence the CD fingerprint from traditional lithography: slit intensity uniformity, focus plane deviation and reticle CD error. Taking these contributions into account, the CD through slit fingerprint for 40nm LS is simulated with excellent agreement to experimental data. The ADT shows good CD stability over 9 months of operation, both intrafield and across wafer. The projection optics reflectivity has not degraded over 9 months. Measured overlay performance with respect to a dry tool shows |Mean|+3σ below 20nm with more correction potential by applying field-by-field corrections (|Mean|+3σ <=10nm). For 22nm SRAM application, both contact hole and metal layer were printed in EUV with 10% CD and 15nm overlay control. Below 40nm, the ADT shows good wafer CDU for 30nm dense and isolated lines (on the same wafer) and 38nm dense Contact Holes (CH). First 28nm dense line CDU data are achieved. The results indicate that the ADT can be used effectively for EUV process development before installation of the pre-production tool, the ASML NXE Gen. 1 at IMEC.

Software-based data path for raster-scanned multi-beam mask lithography

NASA Astrophysics Data System (ADS)

Rajagopalan, Archana; Agarwal, Ankita; Buck, Peter; Geller, Paul; Hamaker, H. Christopher; Rao, Nagswara

2016-10-01

According to the 2013 SEMATECH Mask Industry Survey,i roughly half of all photomasks are produced using laser mask pattern generator ("LMPG") lithography. LMPG lithography can be used for all layers at mature technology nodes, and for many non-critical and semi-critical masks at advanced nodes. The extensive use of multi-patterning at the 14-nm node significantly increases the number of critical mask layers, and the transition in wafer lithography from positive tone resist to negative tone resist at the 14-nm design node enables the switch from advanced binary masks back to attenuated phase shifting masks that require second level writes to remove unwanted chrome. LMPG lithography is typically used for second level writes due to its high productivity, absence of charging effects, and versatile non-actinic alignment capability. As multi-patterning use expands from double to triple patterning and beyond, the number of LMPG second level writes increases correspondingly. The desire to reserve the limited capacity of advanced electron beam writers for use when essential is another factor driving the demand for LMPG capacity. The increasing demand for cost-effective productivity has kept most of the laser mask writers ever manufactured running in production, sometimes long past their projected lifespan, and new writers continue to be built based on hardware developed some years ago.ii The data path is a case in point. While state-ofthe- art when first introduced, hardware-based data path systems are difficult to modify or add new features to meet the changing requirements of the market. As data volumes increase, design styles change, and new uses are found for laser writers, it is useful to consider a replacement for this critical subsystem. The availability of low-cost, high-performance, distributed computer systems combined with highly scalable EDA software lends itself well to creating an advanced data path system. EDA software, in routine production today, scales well to hundreds or even thousands of CPU-cores, offering the potential for virtually unlimited capacity. Features available in EDA software such as sizing, scaling, tone reversal, OPC, MPC, rasterization, and others are easily adapted to the requirements of a data path system. This paper presents the motivation, requirements, design and performance of an advanced, scalable software data path system suitable to support multi-beam laser mask lithography.

Portable widefield imaging device for ICG-detection of the sentinel lymph node

NASA Astrophysics Data System (ADS)

Govone, Angelo Biasi; Gómez-García, Pablo Aurelio; Carvalho, André Lopes; Capuzzo, Renato de Castro; Magalhães, Daniel Varela; Kurachi, Cristina

2015-06-01

Metastasis is one of the major cancer complications, since the malignant cells detach from the primary tumor and reaches other organs or tissues. The sentinel lymph node (SLN) is the first lymphatic structure to be affected by the malignant cells, but its location is still a great challenge for the medical team. This occurs due to the fact that the lymph nodes are located between the muscle fibers, making it visualization difficult. Seeking to aid the surgeon in the detection of the SLN, the present study aims to develop a widefield fluorescence imaging device using the indocyanine green as fluorescence marker. The system is basically composed of a 780nm illumination unit, optical components for 810nm fluorescence detection, two CCD cameras, a laptop, and dedicated software. The illumination unit has 16 diode lasers. A dichroic mirror and bandpass filters select and deliver the excitation light to the interrogated tissue, and select and deliver the fluorescence light to the camera. One camera is responsible for the acquisition of visible light and the other one for the acquisition of the ICG fluorescence. The software developed at the LabVIEW® platform generates a real time merged image where it is possible to observe the fluorescence spots, related to the lymph nodes, superimposed at the image under white light. The system was tested in a mice model, and a first patient with tongue cancer was imaged. Both results showed the potential use of the presented fluorescence imaging system assembled for sentinel lymph node detection.

Distributed intelligent control and status networking

NASA Technical Reports Server (NTRS)

Fortin, Andre; Patel, Manoj

1993-01-01

Over the past two years, the Network Control Systems Branch (Code 532) has been investigating control and status networking technologies. These emerging technologies use distributed processing over a network to accomplish a particular custom task. These networks consist of small intelligent 'nodes' that perform simple tasks. Containing simple, inexpensive hardware and software, these nodes can be easily developed and maintained. Once networked, the nodes can perform a complex operation without a central host. This type of system provides an alternative to more complex control and status systems which require a central computer. This paper will provide some background and discuss some applications of this technology. It will also demonstrate the suitability of one particular technology for the Space Network (SN) and discuss the prototyping activities of Code 532 utilizing this technology.

Cognitive Models for Learning to Control Dynamic Systems

DTIC Science & Technology

2008-05-30

2 3N NM NM NMK NK M− + + + + constraints, including KN M+ equality constraints, 7 2NM M+ inequality non- timing constraints and the rest are... inequality timing constraints. The size of the MILP model grows rapidly with the increase of problem size. So it is a big challenge to deal with more...task requirement, are studied in the section. An assumption is made in advance that the time of attack delay and flight time to the sink node are

Range pattern matching with layer operations and continuous refinements

NASA Astrophysics Data System (ADS)

Tseng, I.-Lun; Lee, Zhao Chuan; Li, Yongfu; Perez, Valerio; Tripathi, Vikas; Ong, Jonathan Yoong Seang

2018-03-01

At advanced and mainstream process nodes (e.g., 7nm, 14nm, 22nm, and 55nm process nodes), lithography hotspots can exist in layouts of integrated circuits even if the layouts pass design rule checking (DRC). Existence of lithography hotspots in a layout can cause manufacturability issues, which can result in yield losses of manufactured integrated circuits. In order to detect lithography hotspots existing in physical layouts, pattern matching (PM) algorithms and commercial PM tools have been developed. However, there are still needs to use DRC tools to perform PM operations. In this paper, we propose a PM synthesis methodology, which uses a continuous refinement technique, for the automatic synthesis of a given lithography hotspot pattern into a DRC deck, which consists of layer operation commands, so that an equivalent PM operation can be performed by executing the synthesized deck with the use of a DRC tool. Note that the proposed methodology can deal with not only exact patterns, but also range patterns. Also, lithography hotspot patterns containing multiple layers can be processed. Experimental results show that the proposed methodology can accurately and efficiently detect lithography hotspots in physical layouts.

[Study on genetic instability of nm23H1 gene in Chinese with original gallbladder tumor].

PubMed

Lu, Hai Ying; Zhang, Guo Qiang; Li, Ji Cheng

2006-06-01

The aim of this study was to examine the microsatellite instability (MSI) and loss of heterozygosity (LOH) of locus D17S396 on chromosome 17 and their influence on the expression of nm23H1 in gallbladder tumors, which may provide experimental basis for the tumor occurrence and metastasis. Techniques such as DNA extraction from formalin-fixed paraffin-embedded tissues, polymerase chain reaction-single strand conformation polymorphism (PCR-SSCP), ordinary silver stain were used to study MSI and LOH of locus D17S396. Envision immunohistochemistry and Leica-Qwin computer imaging techniques were used to assess the expression of gene nm23H1. In our experiment, the frequency of genetic instability of malignant gallbladder tumors was 42.55%, which was higher than that of gallbladder adenomas, while there were no genetic instability occurred in chronic cholecystitis tissue. The frequency of LOH seemed higher with the deteriorism of gallbladder tumor. Among 47 gallbladder carcinomas, the frequency of LOH and MSI were different between different differentiation cases (P < 0.05), and the frequency of LOH in liver and lymph node metastasis cases was significantly higher than those without metastasis (P < 0.01). Moreover, the frequency of LOH was higher in stage Nevin IV and V when compared with stage I, II and III. However, the frequency of MSI showed contrary correlation with some clinicopathologic characteristics. The expression of nm23H1 in gallbladder carcinoma, gallbladder adenoma and chronic cholecystitis tissue were different (P < 0.05). The case with lymph node metastasis showed significantly lower nm23H1 expression than those without lymph node metastasis (P < 0.01). Nevin stage IV and V also exhibited lower nm23H1 expression levels compared with stage I, II and Ill. Furthermore, there was no difference in nm23H1 protein expression intensity analyzed by computer imaging techniques. In gallbladder carcinomas, the positive frequency of nm23H1 protein in LOH positive group was lower than that of LOH negative group (P < 0.05). The results indicated that the genetic instability of nm23H1 gene might be implicated in pathogenesis and progression of gallbladder tumor. Both MSI and LOH of nm23H1 gene controlled the development of gallbladder tumor independently in different paths. MSI may be an early stage molecule marker of gallbladder carcinoma. LOH may be molecule marker for the deteriorism of gallbladder tissue, which could inhibit the expression of nm23H1 in local tissue of gallbladder carcinoma and endow it with high aggressive and poor prognosis. Increasing the amount of nm23H1 protein expression could effectively restrain gallbladder carcinoma metastasis and improve prognosis of patients.

Mask cost of ownership for advanced lithography

NASA Astrophysics Data System (ADS)

Muzio, Edward G.; Seidel, Philip K.

2000-07-01

As technology advances, becoming more difficult and more expensive, the cost of ownership (CoO) metric becomes increasingly important in evaluating technical strategies. The International SEMATECH CoC analysis has steadily gained visibility over the past year, as it attempts to level the playing field between technology choices, and create a fair relative comparison. In order to predict mask cots for advanced lithography, mask process flows are modeled using bets-known processing strategies, equipment cost, and yields. Using a newly revised yield mode, and updated mask manufacture flows, representative mask flows can be built. These flows are then used to calculate mask costs for advanced lithography down to the 50 nm node. It is never the goal of this type of work to provide absolute cost estimates for business planning purposes. However, the combination of a quantifiable yield model with a clearly defined set of mask processing flows and a cost model based upon them serves as an excellent starting point for cost driver analysis and process flow discussion.

Ultralow-Noise Atomic-Scale Structures for Quantum Circuitry in Silicon.

PubMed

Shamim, Saquib; Weber, Bent; Thompson, Daniel W; Simmons, Michelle Y; Ghosh, Arindam

2016-09-14

The atomically precise doping of silicon with phosphorus (Si:P) using scanning tunneling microscopy (STM) promises ultimate miniaturization of field effect transistors. The one-dimensional (1D) Si:P nanowires are of particular interest, retaining exceptional conductivity down to the atomic scale, and are predicted as interconnects for a scalable silicon-based quantum computer. Here, we show that ultrathin Si:P nanowires form one of the most-stable electrical conductors, with the phenomenological Hooge parameter of low-frequency noise being as low as ≈10(-8) at 4.2 K, nearly 3 orders of magnitude lower than even carbon-nanotube-based 1D conductors. A in-built isolation from the surface charge fluctuations due to encapsulation of the wires within the epitaxial Si matrix is the dominant cause for the observed suppression of noise. Apart from quantum information technology, our results confirm the promising prospects for precision-doped Si:P structures in atomic-scale circuitry for the 11 nm technology node and beyond.

Acute glandular fever-like illness in a patient with HTLV-III antibody.

PubMed

McCaul, T F; Tovey, G; Farthing, C F; Gazzard, B; Zuckerman, A J

1985-10-01

A lymph node biopsy obtained from a patient with human T-cell lymphocytotropic virus III/lymphadenopathy-associated virus (HTLV-III/LAV) antibody, presenting with an acute glandular fever-like illness, was examined by electron microscopy. Numerous pathological changes were present in the biopsy, including hypertrophy of smooth endoplasmic reticulum, intracytoplasmic rod-like inclusions within the cisternae of endoplasmic reticulum, multivesicular bodies, test-tube and ring-shaped forms, and tubulo-reticular structures. Intranuclear and intracytoplasmic viral-like particles measuring 105-120 nm in diameter and small cytoplasmic particles measuring 50-70 nm in diameter were found in some degenerating lymph node cells. These pathological findings may reflect a host cell response to various pathological and viral stimuli resulting from immune deficiency owing to infection with HTLV-III/LAV.

Materials and fabrication sequences for water soluble silicon integrated circuits at the 90 nm node

NASA Astrophysics Data System (ADS)

Yin, Lan; Bozler, Carl; Harburg, Daniel V.; Omenetto, Fiorenzo; Rogers, John A.

2015-01-01

Tungsten interconnects in silicon integrated circuits built at the 90 nm node with releasable configurations on silicon on insulator wafers serve as the basis for advanced forms of water-soluble electronics. These physically transient systems have potential uses in applications that range from temporary biomedical implants to zero-waste environmental sensors. Systematic experimental studies and modeling efforts reveal essential aspects of electrical performance in field effect transistors and complementary ring oscillators with as many as 499 stages. Accelerated tests reveal timescales for dissolution of the various constituent materials, including tungsten, silicon, and silicon dioxide. The results demonstrate that silicon complementary metal-oxide-semiconductor circuits formed with tungsten interconnects in foundry-compatible fabrication processes can serve as a path to high performance, mass-produced transient electronic systems.

Design & implementation of distributed spatial computing node based on WPS

NASA Astrophysics Data System (ADS)

Liu, Liping; Li, Guoqing; Xie, Jibo

2014-03-01

Currently, the research work of SIG (Spatial Information Grid) technology mostly emphasizes on the spatial data sharing in grid environment, while the importance of spatial computing resources is ignored. In order to implement the sharing and cooperation of spatial computing resources in grid environment, this paper does a systematical research of the key technologies to construct Spatial Computing Node based on the WPS (Web Processing Service) specification by OGC (Open Geospatial Consortium). And a framework of Spatial Computing Node is designed according to the features of spatial computing resources. Finally, a prototype of Spatial Computing Node is implemented and the relevant verification work under the environment is completed.

A weak pattern random creation and scoring method for lithography process tuning

NASA Astrophysics Data System (ADS)

Zhang, Meili; Deng, Guogui; Wang, Mudan; Yu, Shirui; Hu, Xinyi; Du, Chunshan; Wan, Qijian; Liu, Zhengfang; Gao, Gensheng; Kabeel, Aliaa; Madkour, Kareem; ElManhawy, Wael; Kwan, Joe

2018-03-01

As the IC technology node moves forward, critical dimension becomes smaller and smaller, which brings huge challenge to IC manufacturing. Lithography is one of the most important steps during the whole manufacturing process and litho hotspots become a big source of yield detractors. Thus tuning lithographic recipes to cover a big range of litho hotspots is very essential to yield enhancing. During early technology developing stage, foundries only have limited customer layout data for recipe tuning. So collecting enough patterns is significant for process optimization. After accumulating enough patterns, a general way to treat them is not precise and applicable. Instead, an approach to scoring these patterns could provide a priority and reference to address different patterns more effectively. For example, the weakest group of patterns could be applied the most limited specs to ensure process robustness. This paper presents a new method of creation of real design alike patterns of multiple layers based on design rules using Layout Schema Generator (LSG) utility and a pattern scoring flow using Litho-friendly Design (LFD) and Pattern Matching. Through LSG, plenty of new unknown patterns could be created for further exploration. Then, litho simulation through LFD and topological matches by using Pattern Matching is applied on the output patterns of LSG. Finally, lithographical severity, printability properties and topological distribution of every pattern are collected. After a statistical analysis of pattern data, every pattern is given a relative score representing the pattern's yield detracting level. By sorting the output pattern score tables, weak patterns could be filtered out for further research and process tuning. This pattern generation and scoring flow is demonstrated on 28nm logic technology node. A weak pattern library is created and scored to help improve recipe coverage of litho hotspots and enhance the reliability of process.

Process design kit and circuits at a 2 µm technology node for flexible wearable electronics applications (Conference Presentation)

NASA Astrophysics Data System (ADS)

Torres-Miranda, Miguel; Petritz, Andreas; Gold, Herbert; Stadlober, Barbara

2016-09-01

In this work we present our most advanced technology node of organic thin film transistors (OTFTs) manufactured with a channel length as short as 2 μm by contact photolithography and a self-alignment process directly on a plastic substrate. Our process design kit (PDK) is described with P-type transistors, capacitors and 3 metal layers for connections of complex circuits. The OTFTs are composed of a double dielectric layer with a photopatternable ultra thin polymer (PNDPE) and alumina, with a thickness on the order of 100 nm. The organic semiconductor is either Pentacene or DNTT, which have a stable average mobility up to 0.1 cm2/Vs. Finally, a polymer (e.g.: Parylene-C) is used as a passivation layer. We describe also our design rules for the placement of standard circuit cells. A "plastic wafer" is fabricated containing 49 dies. Each die of 1 cm2 has between 25 to 50 devices, proving larger scale integration in such a small space, unique in organic technologies. Finally, we present the design (by simulations using a Spice model for OTFTs) and the test of analog and digital basic circuits: amplifiers with DC gains of about 20 dB, comparators, inverters and logic gates working in the frequency range of 1-10 kHz. These standard circuit cells could be used for signal conditioning and integrated as active matrices for flexible sensors from 3rd party institutions, thus opening our fab to new ideas and sophisticated pre-industrial low cost applications for the emerging fields of biomedical devices and wearable electronics for virtual/augmented reality.

Technology modules from micro- and nano-electronics for the life sciences.

PubMed

Birkholz, M; Mai, A; Wenger, C; Meliani, C; Scholz, R

2016-05-01

The capabilities of modern semiconductor manufacturing offer remarkable possibilities to be applied in life science research as well as for its commercialization. In this review, the technology modules available in micro- and nano-electronics are exemplarily presented for the case of 250 and 130 nm technology nodes. Preparation procedures and the different transistor types as available in complementary metal-oxide-silicon devices (CMOS) and BipolarCMOS (BiCMOS) technologies are introduced as key elements of comprehensive chip architectures. Techniques for circuit design and the elements of completely integrated bioelectronics systems are outlined. The possibility for life scientists to make use of these technology modules for their research and development projects via so-called multi-project wafer services is emphasized. Various examples from diverse fields such as (1) immobilization of biomolecules and cells on semiconductor surfaces, (2) biosensors operating by different principles such as affinity viscosimetry, impedance spectroscopy, and dielectrophoresis, (3) complete systems for human body implants and monitors for bioreactors, and (4) the combination of microelectronics with microfluidics either by chip-in-polymer integration as well as Si-based microfluidics are demonstrated from joint developments with partners from biotechnology and medicine. WIREs Nanomed Nanobiotechnol 2016, 8:355-377. doi: 10.1002/wnan.1367 For further resources related to this article, please visit the WIREs website. © 2015 Wiley Periodicals, Inc.

Improvements in resist performance towards EUV HVM

NASA Astrophysics Data System (ADS)

Yildirim, Oktay; Buitrago, Elizabeth; Hoefnagels, Rik; Meeuwissen, Marieke; Wuister, Sander; Rispens, Gijsbert; van Oosten, Anton; Derks, Paul; Finders, Jo; Vockenhuber, Michaela; Ekinci, Yasin

2017-03-01

Extreme ultraviolet (EUV) lithography with 13.5 nm wavelength is the main option for sub-10nm patterning in the semiconductor industry. We report improvements in resist performance towards EUV high volume manufacturing. A local CD uniformity (LCDU) model is introduced and validated with experimental contact hole (CH) data. Resist performance is analyzed in terms of ultimate printing resolution (R), line width roughness (LWR), sensitivity (S), exposure latitude (EL) and depth of focus (DOF). Resist performance of dense lines at 13 nm half-pitch and beyond is shown by chemical amplified resist (CAR) and non-CAR (Inpria YA Series) on NXE scanner. Resolution down to 10nm half pitch (hp) is shown by Inpria YA Series resist exposed on interference lithography at the Paul Sherrer Institute. Contact holes contrast and consequent LCDU improvement is achieved on a NXE:3400 scanner by decreasing the pupil fill ratio. State-of-the-art imaging meets 5nm node requirements for CHs. A dynamic gas lock (DGL) membrane is introduced between projection optics box (POB) and wafer stage. The DGL membrane will suppress the negative impact of resist outgassing on the projection optics by 100%, enabling a wider range of resist materials to be used. The validated LCDU model indicates that the imaging requirements of the 3nm node can be met with single exposure using a high-NA EUV scanner. The current status, trends, and potential roadblocks for EUV resists are discussed. Our results mark the progress and the improvement points in EUV resist materials to support EUV ecosystem.

Effect of 1,2,4-triazole on galvanic corrosion between cobalt and copper in CMP based alkaline slurry

NASA Astrophysics Data System (ADS)

Fu, Lei; Liu, Yuling; Wang, Chenwei; Han, Linan

2018-04-01

Cobalt has become a new type of barrier material with its unique advantages since the copper-interconnects in the great-large scale integrated circuits (GLSI) into 10 nm and below technical nodes, but cobalt and copper have severe galvanic corrosion during chemical–mechanical flattening. The effect of 1,2,4-triazole on Co/Cu galvanic corrosion in alkaline slurry and the control of rate selectivity of copper and cobalt were investigated in this work. The results of electrochemical experiments and polishing experiments had indicated that a certain concentration of 1,2,4-triazole could form a layer of insoluble and dense passive film on the surface of cobalt and copper, which reduced the corrosion potential difference between cobalt and copper. Meantime, the removal rate of cobalt and copper could be effectively controlled according to demand during the CMP process. When the study optimized slurry was composed of 0.5 wt% colloidal silica, 0.1 %vol. hydrogen peroxide, 0.05 wt% FA/O, 345 ppm 1,2,4-triazole, cobalt had higher corrosion potential than copper and the galvanic corrosion could be reduced effectively when the corrosion potential difference between them decreased to 1 mV and the galvanic corrosion current density reached 0.02 nA/cm2. Meanwhile, the removal rate of Co was 62.396 nm/min, the removal rate of Cu was 47.328 nm/min, so that the removal rate ratio of cobalt and copper was 1.32 : 1, which was a good amendment to the dishing pits. The contact potential corrosion of Co/Cu was very weak, which could be better for meeting the requirements of the barrier CMP. Project supported by the Major National Science and Technology Special Projects (No. 2016ZX02301003-004-007), the Natural Science Foundation of Hebei Province, China (No. F2015202267), and the Outstanding Young Science and Technology Innovation Fund of Hebei University of Technology (No. 2015007).

Positive and negative gain exceeding unity magnitude in silicon quantum well metal-oxide-semiconductor transistors

NASA Astrophysics Data System (ADS)

Hu, Gangyi; Wijesinghe, Udumbara; Naquin, Clint; Maggio, Ken; Edwards, H. L.; Lee, Mark

2017-10-01

Intrinsic gain (AV) measurements on Si quantum well (QW) n-channel metal-oxide-semiconductor (NMOS) transistors show that these devices can have |AV| > 1 in quantum transport negative transconductance (NTC) operation at room temperature. QW NMOS devices were fabricated using an industrial 45 nm technology node process incorporating ion implanted potential barriers to define a lateral QW in the conduction channel under the gate. While NTC at room temperature arising from transport through gate-controlled QW bound states has been previously established, it was unknown whether the quantum NTC mechanism could support gain magnitude exceeding unity. Bias conditions were found giving both positive and negative AV with |AV| > 1 at room temperature. This result means that QW NMOS devices could be useful in amplifier and oscillator applications.

DfM requirements and ROI analysis for system-on-chip

NASA Astrophysics Data System (ADS)

Balasinski, Artur

2005-11-01

DfM (Design-for-Manufacturability) has become staple requirement beyond 100 nm technology node for efficient generation of mask data, cost reduction, and optimal circuit performance. Layout pattern has to comply to many requirements pertaining to database structure and complexity, suitability for image enhancement by the optical proximity correction, and mask data pattern density and distribution over the image field. These requirements are of particular complexity for Systems-on-Chip (SoC). A number of macro-, meso-, and microscopic effects such as reticle macroloading, planarization dishing, and pattern bridging or breaking would compromise fab yield, device performance, or both. In order to determine the optimal set of DfM rules applicable to the particular designs, Return-on-Investment and Failure Mode and Effect Analysis (FMEA) are proposed.

Anticipating and controlling mask costs within EDA physical design

NASA Astrophysics Data System (ADS)

Rieger, Michael L.; Mayhew, Jeffrey P.; Melvin, Lawrence S.; Lugg, Robert M.; Beale, Daniel F.

2003-08-01

For low k1 lithography, more aggressive OPC is being applied to critical layers, and the number of mask layers with OPC treatments is growing rapidly. The 130 nm, process node required, on average, 8 layers containing rules- or model-based OPC. The 90 nm node will have 16 OPC layers, of which 14 layers contain aggressive model-based OPC. This escalation of mask pattern complexity, coupled with the predominant use of vector-scan e-beam (VSB) mask writers contributes to the rising costs of advanced mask sets. Writing times for OPC layouts are several times longer than for traditional layouts, making mask exposure the single largest cost component for OPC masks. Lower mask yields, another key factor in higher mask costs, is also aggravated by OPC. Historical mask set costs are plotted below. The initial cost of a 90 nm-node mask set will exceed one million dollars. The relative impact of mask cost on chip depends on how many total wafers are printed with each mask set. For many foundry chips, where unit production is often well below 1000 wafers, mask costs are larger than wafer processing costs. Further increases in NRE may begin to discourage these suppliers' adoption to 90 nm and smaller nodes. In this paper we will outline several alternatives for reducing mask costs by strategically leveraging dimensional margins. Dimensional specifications for a particular masking layer usually are applied uniformly to all features on that layer. As a practical matter, accuracy requirements on different features in the design may vary widely. Take a polysilicon layer, for example: global tolerance specifications for that layer are driven by the transistor-gate requirements; but these parameters over-specify interconnect feature requirements. By identifying features where dimensional accuracy requirements can be reduced, additional margin can be leveraged to reduce OPC complexity. Mask writing time on VSB tools will drop in nearly direct proportion to reduce shot count. By inspecting masks with reference to feature-dependent margins, instead of uniform specifications, mask yield can be effectively increased further reducing delivered mask expense.

Characterizations of and Radiation Effects in Several Emerging CMOS Technologies

NASA Astrophysics Data System (ADS)

Shufeng Ren

As the conventional scaling of Si based CMOS is approaching its limit at 7 nm technology node, many perceive that the adoption of novel materials and/or device structures are inevitable to keep Moore's law going. High mobility channel materials such as III-V compound semiconductors or Ge are considered promising to replace Si in order to achieve high performance as well as low power consumption. However, interface and oxide traps have become a major obstacle for high-mobility semiconductors (such as Ge, GaAs, InGaAs, GaSb, etc) to replace Si CMOS technology. Therefore novel high-k dielectrics, such as epitaxially grown crystalline oxides, have been explored to be incorporated onto the high mobility channel materials. Moreover, to enable continued scaling, extremely scaled devices structures such as nanowire gate-all-around structure are needed in the near future. Moreover, as the CMOS industry moves into the 7 nm node and beyond, novel lithography techniques such as EUV are believed to be adopted soon, which can bring radiation damage to CMOS devices and circuit during the fabrication process. Therefore radiation hardening technology in future generations of CMOS devices has again become an interesting research topic to deal with the possible process-induced damage as well as damage caused by operating in radiation harsh environment such as outer space, nuclear plant, etc. In this thesis, the electrical properties of a few selected emerging novel CMOS devices are investigated, which include InGaAs based extremely scaled ultra-thin body nanowire gate-all-around MOSFETs, GOI (Ge On Insulator) CMOS with recessed channel and source/drain, GaAs MOSFETs with crystalline La based gate stack, and crystalline SrTiO3, are investigated to extend our understanding of their electrical characteristics, underlying physical mechanisms, and material properties. Furthermore, the radiation responses of these aforementioned novel devices are thoroughly investigated, with a focus on the total ionizing dose (TID) effect, to understand the associated physical mechanisms, and to help to inspire ideas to improve radiation immunity of these novel devices. The experimental methods used in this thesis research include the measurements of C-V, I-V characteristics, where novel gate stack and interface characterization techniques are employed, such as AC Gm method, 1/f low frequency noise method, inelastic electron tunneling spectroscopy (IETS) for chemical bonding and defects detection, and carrier transport modeling. Sentaurus TCAD simulations are also carried out to obtain more physical insight in the complex, extremely scaled, device structures.

Studies on low-loss coupling of non-node anti-resonant hollow-core fiber and tapered fiber

NASA Astrophysics Data System (ADS)

Zhang, Naiqian; Wang, Zefeng; Liu, Wenbo; Xi, Xiaoming

2017-10-01

Up to now, near almost optical fiber gas lasers employ/adopt the scheme of free-space coupling, which increases the difficulty to adjust the optical path, and has poor stability. All-fiber structure fiber-gas lasers are important development directions in the future. We established the numerical model of SMF-28 type tapered single-mode fiber and non-node hollow-core fiber. When the SMF-28 type single-mode fiber has a waist diameter of 40μm when the light source is LP01 fundamental mode with 1550nm wavelength, the mode field diameter is the largest. Meanwhile, we simulated that the equivalent mode field diameter of non-node anti-resonant hollow-core fiber is about 75μm at the same 1550nm wavelength light source. Then, we use different waist diameters of SMF-28 type tapered fibers injected to the non-node anti-resonant hollow-core fiber in simulation and experiments. In the scheme of the single-ended low-loss coupling, the simulation results indicate that the best waist diameter of tapered fiber is 40μm, and the calculated maximum coupling efficiency is 83.55%. Meanwhile, the experimental result of maximum coupling efficiency is 80.74% when the best waist diameter of tapered fiber is also 40μm. As for the double-ended low-loss coupling, the calculated maximum coupling efficiency is near 83.38%.

Sentinel node detection in pre-operative axillary staging.

PubMed

Trifirò, Giuseppe; Viale, Giuseppe; Gentilini, Oreste; Travaini, Laura Lavinia; Paganelli, Giovanni

2004-06-01

The concept of sentinel lymph node biopsy in breast cancer surgery is based on the fact that the tumour drains in a logical way via the lymphatic system, from the first to upper levels. Since axillary node dissection does not improve the prognosis of patients with breast cancer, sentinel lymph node biopsy might replace complete axillary dissection for staging of the axilla in clinically N0 patients. Sentinel lymph node biopsy would represent a significant advantage as a minimally invasive procedure, considering that about 70% of patients are found to be free from metastatic disease, yet axillary node dissection can lead to significant morbidity. Subdermal or peritumoural injection of small aliquots (and very low activity) of radiotracer is preferred to intratumoural administration, and (99m)Tc-labelled colloids with most of the particles in the 100-200 nm size range would be ideal for radioguided sentinel node biopsy in breast cancer. The success rate of radioguidance in localising the sentinel lymph node in breast cancer surgery is about 97% in institutions where a high number of procedures are performed, and the success rate of lymphoscintigraphy in sentinel node detection is about 100%. The sentinel lymph node should be processed for intraoperative frozen section examination in its entirety, based on conventional histopathology and, when necessary, immune staining with anti-cytokeratin antibody. Nowadays, lymphoscintigraphy is a useful procedure in patients with different clinical evidence of breast cancer.

[Advances in sensor node and wireless communication technology of body sensor network].

PubMed

Lin, Weibing; Lei, Sheng; Wei, Caihong; Li, Chunxiang; Wang, Cang

2012-06-01

With the development of the wireless communication technology, implantable biosensor technology, and embedded system technology, Body Sensor Network (BSN) as one branch of wireless sensor networks and important part of the Internet of things has caught more attention of researchers and enterprises. This paper offers the basic concept of the BSN and analyses the related research. We focus on sensor node and wireless communication technology from perspectives of technology challenges, research advance and development trend in the paper. Besides, we also present a relative overview of domestic and overseas projects for the BSN.

Laparoscopic Sentinel Lymph Node Mapping with Indocyanine Green Using the iSpies Platform: Initial Experience Argentina.

PubMed

Di Guilmi, Julian; Darin, Maria Cecilia; Toscano, Maria; Maya, Gustavo

To demonstrate the initial experience in Argentina using the iSpies indocyanine green (ICG) platform in sentinel lymph node mapping in patients with early-stage cervical cancer. Step-by-step demonstration of the technique using a video and pictures (educative video) (Canadian Task Force classification III). Laparoscopic and robotic sentinel lymph node mapping using ICG has been shown to be safe and feasible; however, in developing countries, the opportunities to use fluorescent imaging through a minimally invasive approach are very limited, given the cost restrictions of acquiring the near-infrared technology and the fluorescent dyes. A 47-year-old woman presented with a stage IB1 squamous cervical cancer. Physical examination revealed a 1.5-cm tumor without evidence of parametrial involvement. Magnetic resonance imaging did not show any evidence of metastatic disease. The patient underwent laparoscopic radical hysterectomy with sentinel lymph node mapping. On laparoscopic exposure of the pelvic spaces, a cervical injection of ICG (1 mL superficial and deep) was administered using a spinal needle at the 3 o'clock and 9 o'clock positions. Sentinel lymph node mapping was then performed using the ICG (Pulsion Medical Systems, Feldkirchen, Germany) and an iSpies near-infrared camera (Karl Storz Endoskope, Tuttlingen, Germany). Bilateral sentinel lymph nodes were detected on the left external iliac artery and in the right obturator space. Both were confirmed ex vivo. The total operative time was 170 minutes. No intraoperative or postoperative complications were reported, and the patient was discharged at 48 hours after surgery. Estimated blood loss was minimal. Sentinel lymph node mapping alone is not the standard of care in our institution, and thus bilateral lymphadenectomy was performed. Ultrastaging is routinely performed when a sentinel lymph node is evaluated. Final pathology revealed a tumor confined to the cervix, with tumor-free margins, and a total of 10 lymph nodes that were negative for any evidence of disease. Disadvantages of this technology compared with the Pinpoint ICG system (Novadaq Technologies; Bonita Springs, FL) is the lack of simultaneous white vision and fluorescence ICG detection, and the to manually change normal vision to infrared vision. An advantage of the Storz iSpies system is its availability in our country, considering that the technology developed by Novadaq is not yet approved in Argentina. Although ICG sentinel lymph node mapping is becoming a standard of care [1,2], a lack of ICG dye or laparoscopic near-infrared technologies could be a deterrent to its use in developing countries. A focus on expanding this technology in countries with limited resources would allow patients the opportunity to avoid the morbidity associated with full lymphadenectomy. Copyright © 2017 American Association of Gynecologic Laparoscopists. Published by Elsevier Inc. All rights reserved.

Optimization of aeromedical base locations in New Mexico using a model that considers crash nodes and paths.

PubMed

Erdemir, Elif Tokar; Batta, Rajan; Spielman, Seth; Rogerson, Peter A; Blatt, Alan; Flanigan, Marie

2008-05-01

In a recent paper, Tokar Erdemir et al. (2008) introduce models for service systems with service requests originating from both nodes and paths. We demonstrate how to apply and extend their approach to an aeromedical base location application, with specific focus on the state of New Mexico (NM). The current aeromedical base locations of NM are selected without considering motor vehicle crash paths. Crash paths are the roads on which crashes occur, where each road segment has a weight signifying relative crash occurrence. We analyze the loss in accident coverage and location error for current aeromedical base locations. We also provide insights on the relevance of considering crash paths when selecting aeromedical base locations. Additionally, we look briefly at some of the tradeoff issues in locating additional trauma centers vs. additional aeromedical bases in the current aeromedical system of NM. Not surprisingly, tradeoff analysis shows that by locating additional aeromedical bases, we always attain the required coverage level with a lower cost than with locating additional trauma centers.

A high performance pMOSFET with two-step recessed SiGe-S/D structure for 32 nm node and beyond

NASA Astrophysics Data System (ADS)

Yasutake, Nobuaki; Azuma, Atsushi; Ishida, Tatsuya; Ohuchi, Kazuya; Aoki, Nobutoshi; Kusunoki, Naoki; Mori, Shinji; Mizushima, Ichiro; Morooka, Tetsu; Kawanaka, Shigeru; Toyoshima, Yoshiaki

2007-11-01

A novel SiGe-S/D structure for high performance pMOSFET called two-step recessed SiGe-source/drain (S/D) is developed with careful optimization of recessed SiGe-S/D structure. With this method, hole mobility, short channel effect and S/D resistance in pMOSFET are improved compared with conventional recessed SiGe-S/D structure. To enhance device performance such as drain current drivability, SiGe region has to be closer to channel region. Then, conventional deep SiGe-S/D region with carefully optimized shallow SiGe SDE region showed additional device performance improvement without SCE degradation. As a result, high performance 24 nm gate length pMOSFET was demonstrated with drive current of 451 μA/μm at ∣ Vdd∣ of 0.9 V and Ioff of 100 nA/μm (552 μA/μm at ∣ Vdd∣ of 1.0 V). Furthermore, by combining with Vdd scaling, we indicate the extendability of two-step recessed SiGe-S/D structure down to 15 nm node generation.

A Low Power IoT Sensor Node Architecture for Waste Management Within Smart Cities Context.

PubMed

Cerchecci, Matteo; Luti, Francesco; Mecocci, Alessandro; Parrino, Stefano; Peruzzi, Giacomo; Pozzebon, Alessandro

2018-04-21

This paper focuses on the realization of an Internet of Things (IoT) architecture to optimize waste management in the context of Smart Cities. In particular, a novel typology of sensor node based on the use of low cost and low power components is described. This node is provided with a single-chip microcontroller, a sensor able to measure the filling level of trash bins using ultrasounds and a data transmission module based on the LoRa LPWAN (Low Power Wide Area Network) technology. Together with the node, a minimal network architecture was designed, based on a LoRa gateway, with the purpose of testing the IoT node performances. Especially, the paper analyzes in detail the node architecture, focusing on the energy saving technologies and policies, with the purpose of extending the batteries lifetime by reducing power consumption, through hardware and software optimization. Tests on sensor and radio module effectiveness are also presented.

A Low Power IoT Sensor Node Architecture for Waste Management Within Smart Cities Context

PubMed Central

Cerchecci, Matteo; Luti, Francesco; Mecocci, Alessandro; Parrino, Stefano; Peruzzi, Giacomo

2018-01-01

This paper focuses on the realization of an Internet of Things (IoT) architecture to optimize waste management in the context of Smart Cities. In particular, a novel typology of sensor node based on the use of low cost and low power components is described. This node is provided with a single-chip microcontroller, a sensor able to measure the filling level of trash bins using ultrasounds and a data transmission module based on the LoRa LPWAN (Low Power Wide Area Network) technology. Together with the node, a minimal network architecture was designed, based on a LoRa gateway, with the purpose of testing the IoT node performances. Especially, the paper analyzes in detail the node architecture, focusing on the energy saving technologies and policies, with the purpose of extending the batteries lifetime by reducing power consumption, through hardware and software optimization. Tests on sensor and radio module effectiveness are also presented. PMID:29690552

The performances of different overlay mark types at 65nm node on 300-mm wafers

NASA Astrophysics Data System (ADS)

Tseng, H. T.; Lin, Ling-Chieh; Huang, I. H.; Lin, Benjamin S.; Huang, Chin-Chou K.; Huang, Chien-Jen

2005-05-01

The integrated circuit (IC) manufacturing factories have measured overlay with conventional "box-in-box" (BiB) or "frame-in-frame" (FiF) structures for many years. Since UMC played as a roll of world class IC foundry service provider, tighter and tighter alignment accuracy specs need to be achieved from generation to generation to meet any kind of customers' requirement, especially according to International Technology Roadmap for Semiconductors (ITRS) 2003 METROLOGY section1. The process noises resulting from dishing, overlay mark damaging by chemical mechanism polishing (CMP), and the variation of film thickness during deposition are factors which can be very problematic in mark alignment. For example, the conventional "box-in-box" overlay marks could be damaged easily by CMP, because the less local pattern density and wide feature width of the box induce either dishing or asymmetric damages for the measurement targets, which will make the overlay measurement varied and difficult. After Advanced Imaging Metrology (AIM) overlay targets was introduced by KLA-Tencor, studies in the past shown AIM was more robust in overlay metrology than conventional FiF or BiB targets. In this study, the applications of AIM overlay marks under different process conditions will be discussed and compared with the conventional overlay targets. To evaluate the overlay mark performance against process variation on 65nm technology node in 300-mm wafer, three critical layers were chosen in this study. These three layers were Poly, Contact, and Cu-Metal. The overlay targets used for performance comparison were BiB and Non-Segmented AIM (NS AIM) marks. We compared the overlay mark performance on two main areas. The first one was total measurement uncertainty (TMU)3 related items that include Tool Induced Shift (TIS) variability, precision, and matching. The other area is the target robustness against process variations. Based on the present study AIM mark demonstrated an equal or better performance in the TMU related items under our process conditions. However, when non-optimized tungsten CMP was introduced in the tungsten contact process, due to the dense grating line structure design, we found that AIM mark was much more robust than BiB overlay target.

Performance evaluation of modulation and multiple access schemes in ultraviolet optical wireless connections for two atmosphere thickness cases.

PubMed

Raptis, Nikos; Pikasis, Evangelos; Syvridis, Dimitris

2016-08-01

The exploitation of optical wireless communication channels in a non-line-of-sight regime is studied for point-to-point and networking configurations considering the use of light-emitting diodes. Two environments with different scattering center densities are considered, assuming operation at 265 nm. The bit error rate performance of both pulsed and multicarrier modulation schemes is examined, using numerical approaches. In the networking scenario, a central node only receives data, one node transmits useful data, and the rest of them act as interferers. The performance of the desirable node's transmissions is evaluated. The access to the medium is controlled by a code division multiple access scheme.

Development of Low Parasitic Light Sensitivity and Low Dark Current 2.8 μm Global Shutter Pixel †

PubMed Central

Yokoyama, Toshifumi; Tsutsui, Masafumi; Suzuki, Masakatsu; Nishi, Yoshiaki; Mizuno, Ikuo; Lahav, Assaf

2018-01-01

We developed a low parasitic light sensitivity (PLS) and low dark current 2.8 μm global shutter pixel. We propose a new inner lens design concept to realize both low PLS and high quantum efficiency (QE). 1/PLS is 7700 and QE is 62% at a wavelength of 530 nm. We also propose a new storage-gate based memory node for low dark current. P-type implants and negative gate biasing are introduced to suppress dark current at the surface of the memory node. This memory node structure shows the world smallest dark current of 9.5 e−/s at 60 °C. PMID:29370146

Development of Low Parasitic Light Sensitivity and Low Dark Current 2.8 μm Global Shutter Pixel.

PubMed

Yokoyama, Toshifumi; Tsutsui, Masafumi; Suzuki, Masakatsu; Nishi, Yoshiaki; Mizuno, Ikuo; Lahav, Assaf

2018-01-25

Abstract : We developed a low parasitic light sensitivity (PLS) and low dark current 2.8 μm global shutter pixel. We propose a new inner lens design concept to realize both low PLS and high quantum efficiency (QE). 1/PLS is 7700 and QE is 62% at a wavelength of 530 nm. We also propose a new storage-gate based memory node for low dark current. P-type implants and negative gate biasing are introduced to suppress dark current at the surface of the memory node. This memory node structure shows the world smallest dark current of 9.5 e - /s at 60 °C.

Space Station Freedom Central Thermal Control System Evolution

NASA Technical Reports Server (NTRS)

Bullock, Richard; Olsson, Eric

1990-01-01

The objective of the evolution study is to review the proposed growth scenarios for Space Station Freedom and identify the major CTCS hardware scars and software hooks required to facilitate planned growth and technology obsolescence. The Station's two leading evolutionary configurations are: (1) the Research and Development node, where the fundamental mission is scientific research and commercial endeavors, and (2) the Transportation node, where the emphasis is on supporting Lunar and Mars human exploration. These two nodes evolve from the from the assembly complete configuration by the addition of manned modules, pocket labs, resource nodes, attached payloads, customer servicing facility, and an upper and lower keel and boom truss structure. In the case of the R & D node, the role of the dual keel will be to support external payloads for scientific research. In the case of the Transportation node, the keel will support the Lunar (LTV) and Mars (MTV) transportation vehicle service facilities In addition to external payloads. The transverse boom is extended outboard of the alpha gimbal to accommodate the new solar dynamic arrays for power generation, which will supplement the photovoltaic system. The design, development, deployment, and operation of SSF will take place over a 30 year time period and new Innovations and maturation in technologies can be expected. Evolutionary planning must include the obsolescence and insertion of the new technologies over the life of the program, and the technology growth issues must be addressed in parallel with the development of the baseline thermal control system. Technologies that mature and are available within the next 10 years are best suited for evolutionary consideration as the growth phase begins in the year 2000. To increase TCS capability to accommodate growth using baseline technology would require some penalty in mass, volume, EVA time, manifesting, and operational support. To be cost effective the capabilities of the heat acquisition, transport, and rejection subsystems must be increased.

Ion/Ioff ratio enhancement and scalability of gate-all-around nanowire negative-capacitance FET with ferroelectric HfO2

NASA Astrophysics Data System (ADS)

Jang, Kyungmin; Saraya, Takuya; Kobayashi, Masaharu; Hiramoto, Toshiro

2017-10-01

We have investigated the energy efficiency and scalability of ferroelectric HfO2 (FE:HfO2)-based negative-capacitance field-effect-transistor (NCFET) with gate-all-around (GAA) nanowire (NW) channel structure. Analytic simulation is conducted to characterize NW-NCFET by varying NW diameter and/or thickness of gate insulator as device structural parameters. Due to the negative-capacitance effect and GAA NW channel structure, NW-NCFET is found to have 5× higher Ion/Ioff ratio than classical NW-MOSFET and 2× higher than double-gate (DG) NCFET, which results in wider design window for high Ion/Ioff ratio. To analyze these obtained results from the viewpoint of the device scalability, we have considered constraints regarding very limited device structural spaces to fit by the gate insulator and NW channel for aggresively scaled gate length (Lg) and/or very tight NW pitch. NW-NCFET still has design point with very thinned gate insulator and/or narrowed NW. Therefore, FE:HfO2-based NW-NCFET is applicable to the aggressively scaled technology node of sub-10 nm Lg and to the very tight NW integration of sub-30 nm NW pitch for beyond 7 nm technology. From 2011 to 2014, he engaged in developing high-speed optical transceiver module as an alternative military service in Republic of Korea. His research interest includes the development of steep slope MOSFETs for high energy-efficient operation and ferroelectric HfO2-based semiconductor devices, and fabrication of nanostructured devices. He joined the IBM T.J. Watson Research Center, Yorktown Heights, NY, in 2010, where he worked on advanced CMOS technologies such as FinFET, nanowire FET, SiGe channel and III-V channel. He was also engaged in launching 14 nm SOI FinFET and RMG technology development. Since 2014, he has been an Associate Professor in Institute of Industrial Science, University of Tokyo, Tokyo, Japan, where he has been working on ultralow power transistor and memory technology. Dr. Kobayashi is a member of IEEE and the Japan Society of Applied Physics. Dr. Hiramoto is a fellow of Japan Society of Applied Physics and a member of IEEE and IEICE. He served as the General Chair of Silicon Nanoelectronics Workshop in 2003 and the Program Chair in 1997, 1999, and 2001. He was on Committee of IEDM from 2003 to 2009. He was the Program Chair of Symposium on VLSI Technology in 2013 and was the General Chair in 2015. He is the Program Chair of International Conference on Solid-State Devices and Materials (SSDM) in 2016.

How thin barrier metal can be used to prevent Co diffusion in the modern integrated circuits?

NASA Astrophysics Data System (ADS)

Dixit, Hemant; Konar, Aniruddha; Pandey, Rajan; Ethirajan, Tamilmani

2017-11-01

In modern integrated circuits (ICs), billions of transistors are connected to each other via thin metal layers (e.g. copper, cobalt, etc) known as interconnects. At elevated process temperatures, inter-diffusion of atomic species can occur among these metal layers, causing sub-optimal performance of interconnects, which may lead to the failure of an IC. Thus, typically a thin barrier metal layer is used to prevent the inter-diffusion of atomic species within interconnects. For ICs with sub-10 nm transistors (10 nm technology node), the design rule (thickness scaling) demands the thinnest possible barrier layer. Therefore, here we investigate the critical thickness of a titanium-nitride (TiN) barrier that can prevent the cobalt diffusion using multi-scale modeling and simulations. First, we compute the Co diffusion barrier in crystalline and amorphous TiN with the nudged elastic band method within first-principles density functional theory simulations. Later, using the calculated activation energy barriers, we quantify the Co diffusion length in the TiN metal layer with the help of kinetic Monte Carlo simulations. Such a multi-scale modelling approach yields an exact critical thickness of the metal layer sufficient to prevent the Co diffusion in IC interconnects. We obtain a diffusion length of a maximum of 2 nm for a typical process of thermal annealing at 400 °C for 30 min. Our study thus provides useful physical insights for the Co diffusion in the TiN layer and further quantifies the critical thickness (~2 nm) to which the metal barrier layer can be thinned down for sub-10 nm ICs.

A Physics-Based Engineering Approach to Predict the Cross Section for Advanced SRAMs

NASA Astrophysics Data System (ADS)

Li, Lei; Zhou, Wanting; Liu, Huihua

2012-12-01

This paper presents a physics-based engineering approach to estimate the heavy ion induced upset cross section for 6T SRAM cells from layout and technology parameters. The new approach calculates the effects of radiation with junction photocurrent, which is derived based on device physics. The new and simple approach handles the problem by using simple SPICE simulations. At first, the approach uses a standard SPICE program on a typical PC to predict the SPICE-simulated curve of the collected charge vs. its affected distance from the drain-body junction with the derived junction photocurrent. And then, the SPICE-simulated curve is used to calculate the heavy ion induced upset cross section with a simple model, which considers that the SEU cross section of a SRAM cell is more related to a “radius of influence” around a heavy ion strike than to the physical size of a diffusion node in the layout for advanced SRAMs in nano-scale process technologies. The calculated upset cross section based on this method is in good agreement with the test results for 6T SRAM cells processed using 90 nm process technology.

A Node Localization Algorithm Based on Multi-Granularity Regional Division and the Lagrange Multiplier Method in Wireless Sensor Networks.

PubMed

Shang, Fengjun; Jiang, Yi; Xiong, Anping; Su, Wen; He, Li

2016-11-18

With the integrated development of the Internet, wireless sensor technology, cloud computing, and mobile Internet, there has been a lot of attention given to research about and applications of the Internet of Things. A Wireless Sensor Network (WSN) is one of the important information technologies in the Internet of Things; it integrates multi-technology to detect and gather information in a network environment by mutual cooperation, using a variety of methods to process and analyze data, implement awareness, and perform tests. This paper mainly researches the localization algorithm of sensor nodes in a wireless sensor network. Firstly, a multi-granularity region partition is proposed to divide the location region. In the range-based method, the RSSI (Received Signal Strength indicator, RSSI) is used to estimate distance. The optimal RSSI value is computed by the Gaussian fitting method. Furthermore, a Voronoi diagram is characterized by the use of dividing region. Rach anchor node is regarded as the center of each region; the whole position region is divided into several regions and the sub-region of neighboring nodes is combined into triangles while the unknown node is locked in the ultimate area. Secondly, the multi-granularity regional division and Lagrange multiplier method are used to calculate the final coordinates. Because nodes are influenced by many factors in the practical application, two kinds of positioning methods are designed. When the unknown node is inside positioning unit, we use the method of vector similarity. Moreover, we use the centroid algorithm to calculate the ultimate coordinates of unknown node. When the unknown node is outside positioning unit, we establish a Lagrange equation containing the constraint condition to calculate the first coordinates. Furthermore, we use the Taylor expansion formula to correct the coordinates of the unknown node. In addition, this localization method has been validated by establishing the real environment.

Diffraction based overlay re-assessed

NASA Astrophysics Data System (ADS)

Leray, Philippe; Laidler, David; D'havé, Koen; Cheng, Shaunee

2011-03-01

In recent years, numerous authors have reported the advantages of Diffraction Based Overlay (DBO) over Image Based Overlay (IBO), mainly by comparison of metrology figures of merit such as TIS and TMU. Some have even gone as far as to say that DBO is the only viable overlay metrology technique for advanced technology nodes; 22nm and beyond. Typically the only reported drawback of DBO is the size of the required targets. This severely limits its effective use, when all critical layers of a product, including double patterned layers need to be measured, and in-die overlay measurements are required. In this paper we ask whether target size is the only limitation to the adoption of DBO for overlay characterization and control, or are there other metrics, which need to be considered. For example, overlay accuracy with respect to scanner baseline or on-product process overlay control? In this work, we critically re-assess the strengths and weaknesses of DBO for the applications of scanner baseline and on-product process layer overlay control. A comprehensive comparison is made to IBO. For on product process layer control we compare the performance on critical process layers; Gate, Contact and Metal. In particularly we focus on the response of the scanner to the corrections determined by each metrology technique for each process layer, as a measure of the accuracy. Our results show that to characterize an overlay metrology technique that is suitable for use in advanced technology nodes requires much more than just evaluating the conventional metrology metrics of TIS and TMU.

Generation of “LYmph Node Derived Antibody Libraries” (LYNDAL) for selecting fully human antibody fragments with therapeutic potential

PubMed Central

Diebolder, Philipp; Keller, Armin; Haase, Stephanie; Schlegelmilch, Anne; Kiefer, Jonathan D; Karimi, Tamana; Weber, Tobias; Moldenhauer, Gerhard; Kehm, Roland; Eis-Hübinger, Anna M; Jäger, Dirk; Federspil, Philippe A; Herold-Mende, Christel; Dyckhoff, Gerhard; Kontermann, Roland E; Arndt, Michaela AE; Krauss, Jürgen

2014-01-01

The development of efficient strategies for generating fully human monoclonal antibodies with unique functional properties that are exploitable for tailored therapeutic interventions remains a major challenge in the antibody technology field. Here, we present a methodology for recovering such antibodies from antigen-encountered human B cell repertoires. As the source for variable antibody genes, we cloned immunoglobulin G (IgG)-derived B cell repertoires from lymph nodes of 20 individuals undergoing surgery for head and neck cancer. Sequence analysis of unselected “LYmph Node Derived Antibody Libraries” (LYNDAL) revealed a naturally occurring distribution pattern of rearranged antibody sequences, representing all known variable gene families and most functional germline sequences. To demonstrate the feasibility for selecting antibodies with therapeutic potential from these repertoires, seven LYNDAL from donors with high serum titers against herpes simplex virus (HSV) were panned on recombinant glycoprotein B of HSV-1. Screening for specific binders delivered 34 single-chain variable fragments (scFvs) with unique sequences. Sequence analysis revealed extensive somatic hypermutation of enriched clones as a result of affinity maturation. Binding of scFvs to common glycoprotein B variants from HSV-1 and HSV-2 strains was highly specific, and the majority of analyzed antibody fragments bound to the target antigen with nanomolar affinity. From eight scFvs with HSV-neutralizing capacity in vitro, the most potent antibody neutralized 50% HSV-2 at 4.5 nM as a dimeric (scFv)2. We anticipate our approach to be useful for recovering fully human antibodies with therapeutic potential. PMID:24256717

Generation of “LYmph Node Derived Antibody Libraries” (LYNDAL) for selecting fully human antibody fragments with therapeutic potential.

PubMed

Diebolder, Philipp; Keller, Armin; Haase, Stephanie; Schlegelmilch, Anne; Kiefer, Jonathan D; Karimi, Tamana; Weber, Tobias; Moldenhauer, Gerhard; Kehm, Roland; Eis-Hübinger, Anna M; Jäger, Dirk; Federspil, Philippe A; Herold-Mende, Christel; Dyckhoff, Gerhard; Kontermann, Roland E; Arndt, Michaela A E; Krauss, Jürgen

2014-01-01

The development of efficient strategies for generating fully human monoclonal antibodies with unique functional properties that are exploitable for tailored therapeutic interventions remains a major challenge in the antibody technology field. Here, we present a methodology for recovering such antibodies from antigen-encountered human B cell repertoires. As the source for variable antibody genes, we cloned immunoglobulin G (IgG)-derived B cell repertoires from lymph nodes of 20 individuals undergoing surgery for head and neck cancer. Sequence analysis of unselected “LYmph Node Derived Antibody Libraries” (LYNDAL) revealed a naturally occurring distribution pattern of rearranged antibody sequences, representing all known variable gene families and most functional germline sequences. To demonstrate the feasibility for selecting antibodies with therapeutic potential from these repertoires, seven LYNDAL from donors with high serum titers against herpes simplex virus (HSV) were panned on recombinant glycoprotein B of HSV-1. Screening for specific binders delivered 34 single-chain variable fragments (scFvs) with unique sequences. Sequence analysis revealed extensive somatic hypermutation of enriched clones as a result of affinity maturation. Binding of scFvs to common glycoprotein B variants from HSV-1 and HSV-2 strains was highly specific, and the majority of analyzed antibody fragments bound to the target antigen with nanomolar affinity. From eight scFvs with HSV-neutralizing capacity in vitro,the most potent antibody neutralized 50% HSV-2 at 4.5 nM as a dimeric (scFv)2. We anticipate our approach to be useful for recovering fully human antibodies with therapeutic potential.

A novel ternary content addressable memory design based on resistive random access memory with high intensity and low search energy

NASA Astrophysics Data System (ADS)

Han, Runze; Shen, Wensheng; Huang, Peng; Zhou, Zheng; Liu, Lifeng; Liu, Xiaoyan; Kang, Jinfeng

2018-04-01

A novel ternary content addressable memory (TCAM) design based on resistive random access memory (RRAM) is presented. Each TCAM cell consists of two parallel RRAM to both store and search for ternary data. The cell size of the proposed design is 8F2, enable a ∼60× cell area reduction compared with the conventional static random access memory (SRAM) based implementation. Simulation results also show that the search delay and energy consumption of the proposed design at the 64-bit word search are 2 ps and 0.18 fJ/bit/search respectively at 22 nm technology node, where significant improvements are achieved compared to previous works. The desired characteristics of RRAM for implementation of the high performance TCAM search chip are also discussed.

Impact of Temporal Masking of Flip-Flop Upsets on Soft Error Rates of Sequential Circuits

NASA Astrophysics Data System (ADS)

Chen, R. M.; Mahatme, N. N.; Diggins, Z. J.; Wang, L.; Zhang, E. X.; Chen, Y. P.; Liu, Y. N.; Narasimham, B.; Witulski, A. F.; Bhuva, B. L.; Fleetwood, D. M.

2017-08-01

Reductions in single-event (SE) upset (SEU) rates for sequential circuits due to temporal masking effects are evaluated. The impacts of supply voltage, combinational-logic delay, flip-flop (FF) SEU performance, and particle linear energy transfer (LET) values are analyzed for SE cross sections of sequential circuits. Alpha particles and heavy ions with different LET values are used to characterize the circuits fabricated at the 40-nm bulk CMOS technology node. Experimental results show that increasing the delay of the logic circuit present between FFs and decreasing the supply voltage are two effective ways of reducing SE error rates for sequential circuits for particles with low LET values due to temporal masking. SEU-hardened FFs benefit less from temporal masking than conventional FFs. Circuit hardening implications for SEU-hardened and unhardened FFs are discussed.

Quantum storage of entangled telecom-wavelength photons in an erbium-doped optical fibre

NASA Astrophysics Data System (ADS)

Saglamyurek, Erhan; Jin, Jeongwan; Verma, Varun B.; Shaw, Matthew D.; Marsili, Francesco; Nam, Sae Woo; Oblak, Daniel; Tittel, Wolfgang

2015-02-01

The realization of a future quantum Internet requires the processing and storage of quantum information at local nodes and interconnecting distant nodes using free-space and fibre-optic links. Quantum memories for light are key elements of such quantum networks. However, to date, neither an atomic quantum memory for non-classical states of light operating at a wavelength compatible with standard telecom fibre infrastructure, nor a fibre-based implementation of a quantum memory, has been reported. Here, we demonstrate the storage and faithful recall of the state of a 1,532 nm wavelength photon entangled with a 795 nm photon, in an ensemble of cryogenically cooled erbium ions doped into a 20-m-long silica fibre, using a photon-echo quantum memory protocol. Despite its currently limited efficiency and storage time, our broadband light-matter interface brings fibre-based quantum networks one step closer to reality.

Near-infrared autofluorescence imaging to detect parathyroid glands in thyroid surgery.

PubMed

Ladurner, R; Al Arabi, N; Guendogar, U; Hallfeldt, Kkj; Stepp, H; Gallwas, Jks

2018-01-01

Objective To identify and save parathyroid glands during thyroidectomy by displaying their autofluorescence. Methods Autofluorescence imaging was carried out during thyroidectomy with and without central lymph node dissection. After visual recognition by the surgeon, the parathyroid glands and the surrounding tissue were exposed to near-infrared light with a wavelength of 690-770 nm using a modified Karl Storz near infrared/indocyanine green endoscopic system. Parathyroid tissue was expected to show near infrared autofluorescence at 820 nm, captured in the blue channel of the camera. Results We investigated 41 parathyroid glands from 20 patients; 37 glands were identified correctly based on near-infrared autofluorescence. Neither lymph nodes nor thyroid revealed substantial autofluorescence and nor did adipose tissue. Conclusions Parathyroid tissue is characterised by showing autofluorescence in the near-infrared spectrum. This effect can be used to identify and preserve parathyroid glands during thyroidectomy.

EUV local CDU healing performance and modeling capability towards 5nm node

NASA Astrophysics Data System (ADS)

Jee, Tae Kwon; Timoshkov, Vadim; Choi, Peter; Rio, David; Tsai, Yu-Cheng; Yaegashi, Hidetami; Koike, Kyohei; Fonseca, Carlos; Schoofs, Stijn

2017-10-01

Both local variability and optical proximity correction (OPC) errors are big contributors to the edge placement error (EPE) budget which is closely related to the device yield. The post-litho contact hole healing will be demonstrated to meet after-etch local variability specifications using a low dose, 30mJ/cm2 dose-to-size, positive tone developed (PTD) resist with relevant throughput in high volume manufacturing (HVM). The total local variability of the node 5nm (N5) contact holes will be characterized in terms of local CD uniformity (LCDU), local placement error (LPE), and contact edge roughness (CER) using a statistical methodology. The CD healing process has complex etch proximity effects, so the OPC prediction accuracy is challenging to meet EPE requirements for the N5. Thus, the prediction accuracy of an after-etch model will be investigated and discussed using ASML Tachyon OPC model.

Optical characterization of ex-vivo axillary lymph nodes of breast-cancer patients using a custom-built spectrophotometer

NASA Astrophysics Data System (ADS)

Sampathkumar, Ashwin; Saegusa-Beecroft, Emi; Mamou, Jonathan; Chitnis, Parag V.; Machi, Junji; Feleppa, Ernest J.

2014-03-01

Quantitative photoacoustics is emerging as a new hybrid modality to investigate diseases and cells in human pathology and cytology studies. Optical absorption of light is the predominant mechanism behind the photoacoustic effect. Therefore, a need exits to characterize the optical properties of specimens and to identify the relevant operating wavelengths for photoacoustic imaging. We have developed a custom low-cost spectrophotometer to measure the optical properties of human axillary lymph nodes dissected for breast-cancer staging. Optical extinction curves of positive and negative nodes were determined in the spectral range of 400 to 1000 nm. We have developed a model to estimate tissue optical properties, taking into account the role of fat and saline. Our results enabled us to select the optimal optical wavelengths for maximizing the imaging contrast between metastatic and noncancerous tissue in axillary lymph nodes.

Influence of twin boundaries on superconducting gap nodes in FeSe single crystal studied by STM/STS

NASA Astrophysics Data System (ADS)

Watashige, T.; Hanaguri, T.; Kohsaka, Y.; Iwaya, K.; Fu, Y.; Kasahara, S.; Watanabe, D.; Mizukami, Y.; Mikami, T.; Kawamoto, Y.; Kurata, S.; Shibauchi, T.; Matsuda, Y.; Böhmer, A. E.; Wolf, T.; Meingast, C.; Löhneysen, H. V.

2014-03-01

We performed scanning tunneling microscopy (STM) and spectroscopy (STS) measurements on high-quality FeSe single crystals grown by vapor transport technique to examine the superconducting-gap structure. In MBE-grown FeSe thin films, based on the V-shaped tunneling spectra, nodal superconductivity is suggested. It is interesting to investigate how the nodes are affected by various kinds of defects. We found that twin boundaries bring about drastic effects on the gap nodes. With approaching to the twin boundary, V-shaped spectra gradually change to U-shaped ones. Interestingly, in the area between the twin boundaries separated by about 30 nm, the gap node is completely lifted and there appears a finite gap over +/-0.4 meV. This unusual twin-boundary effect will give us a hint to elucidate the superconducting-gap structure.

MIGRATION OF INTRADERMALLY INJECTED QUANTUM DOTS TO SENTINEL ORGANS IN MICE

PubMed Central

Gopee, Neera V.; Roberts, Dean W.; Webb, Peggy; Cozart, Christy R.; Siitonen, Paul H.; Warbritton, Alan R.; Yu, William W.; Colvin, Vicki L.; Walker, Nigel J.; Howard, Paul C.

2012-01-01

Topical exposure to nanoscale materials is likely from a variety of sources including sunscreens and cosmetics. Because the in vivo disposition of nanoscale materials is not well understood, we have evaluated the distribution of quantum dots (QD) following intradermal injection into female SKH-1 hairless mice as a model system for determining tissue localization following intradermal infiltration. The QD [CdSe core, CdS capped, poly(ethylene glycol) (PEG) coated, 37 nm diameter, 621 nm fluorescence emission] were injected intradermally on the right dorsal flank. Within minutes following intradermal injection, the highly UV fluorescent QD could be observed moving from the injection sites apparently through the lymphatic duct system to regional lymph nodes. Residual fluorescent QD remained at the site of injection until necropsy at 24 hours. Quantification of cadmium and selenium levels after 0, 4, 8, 12 or 24 hours in multiple tissues, using inductively coupled plasma mass spectrometry (ICP-MS) showed a time-dependent loss of cadmium from the injection site, and accumulation in the liver, regional draining lymph nodes, kidney, spleen, and hepatic lymph node. Fluorescence microscopy corroborated the ICP-MS results regarding the tissue distribution of QD. The results indicated that (a) intradermally injected nanoscale QD remained as a deposit in skin and penetrated the surrounding viable subcutis, (b) QD were distributed to draining lymph nodes through the subcutaneous lymphatics and to the liver and other organs, and (c) sentinel organs are effective locations for monitoring transdermal penetration of nanoscale materials into animals. PMID:17404394

Incorporating DSA in multipatterning semiconductor manufacturing technologies

NASA Astrophysics Data System (ADS)

Badr, Yasmine; Torres, J. A.; Ma, Yuansheng; Mitra, Joydeep; Gupta, Puneet

2015-03-01

Multi-patterning (MP) is the process of record for many sub-10nm process technologies. The drive to higher densities has required the use of double and triple patterning for several layers; but this increases the cost of the new processes especially for low volume products in which the mask set is a large percentage of the total cost. For that reason there has been a strong incentive to develop technologies like Directed Self Assembly (DSA), EUV or E-beam direct write to reduce the total number of masks needed in a new technology node. Because of the nature of the technology, DSA cylinder graphoepitaxy only allows single-size holes in a single patterning approach. However, by integrating DSA and MP into a hybrid DSA-MP process, it is possible to come up with decomposition approaches that increase the design flexibility, allowing different size holes or bar structures by independently changing the process for every patterning step. A simple approach to integrate multi-patterning with DSA is to perform DSA grouping and MP decomposition in sequence whether it is: grouping-then-decomposition or decomposition-then-grouping; and each of the two sequences has its pros and cons. However, this paper describes why these intuitive approaches do not produce results of acceptable quality from the point of view of design compliance and we highlight the need for custom DSA-aware MP algorithms.

Fast synthesis of topographic mask effects based on rigorous solutions

NASA Astrophysics Data System (ADS)

Yan, Qiliang; Deng, Zhijie; Shiely, James

2007-10-01

Topographic mask effects can no longer be ignored at technology nodes of 45 nm, 32 nm and beyond. As feature sizes become comparable to the mask topographic dimensions and the exposure wavelength, the popular thin mask model breaks down, because the mask transmission no longer follows the layout. A reliable mask transmission function has to be derived from Maxwell equations. Unfortunately, rigorous solutions of Maxwell equations are only manageable for limited field sizes, but impractical for full-chip optical proximity corrections (OPC) due to the prohibitive runtime. Approximation algorithms are in demand to achieve a balance between acceptable computation time and tolerable errors. In this paper, a fast algorithm is proposed and demonstrated to model topographic mask effects for OPC applications. The ProGen Topographic Mask (POTOMAC) model synthesizes the mask transmission functions out of small-sized Maxwell solutions from a finite-difference-in-time-domain (FDTD) engine, an industry leading rigorous simulator of topographic mask effect from SOLID-E. The integral framework presents a seamless solution to the end user. Preliminary results indicate the overhead introduced by POTOMAC is contained within the same order of magnitude in comparison to the thin mask approach.

Layout-aware simulation of soft errors in sub-100 nm integrated circuits

NASA Astrophysics Data System (ADS)

Balbekov, A.; Gorbunov, M.; Bobkov, S.

2016-12-01

Single Event Transient (SET) caused by charged particle traveling through the sensitive volume of integral circuit (IC) may lead to different errors in digital circuits in some cases. In technologies below 180 nm, a single particle can affect multiple devices causing multiple SET. This fact adds the complexity to fault tolerant devices design, because the schematic design techniques become useless without their layout consideration. The most common layout mitigation technique is a spatial separation of sensitive nodes of hardened circuits. Spatial separation decreases the circuit performance and increases power consumption. Spacing should thus be reasonable and its scaling follows the device dimensions' scaling trend. This paper presents the development of the SET simulation approach comprised of SPICE simulation with "double exponent" current source as SET model. The technique uses layout in GDSII format to locate nearby devices that can be affected by a single particle and that can share the generated charge. The developed software tool automatizes multiple simulations and gathers the produced data to present it as the sensitivity map. The examples of conducted simulations of fault tolerant cells and their sensitivity maps are presented in this paper.

Novel topcoat materials with improved receding angles and dissolution properties for ArF immersion lithography

NASA Astrophysics Data System (ADS)

Yun, Sang Geun; Lee, Jin Young; Yang, Young Soo; Shin, Seung Wook; Lee, Sung Jae; Kwon, Hyo Young; Cho, Youn Jin; Choi, Seung Jib; Choi, Sang Jun; Kim, Jong Seob; Chang, Tuwon

2010-04-01

A topcoat material plays a significant role in achieving technology nodes below 45 nm via ArF immersion lithography. Switching the exposure medium between the lens and the photoresist (PR) film from gas (air, n=1) to liquid (H2O, n=1.44) may lead to leaching of the polymer, the photoacid generator (PAG), or the solvent. These substances can contaminate the lens or cause bubbles, which can lead to defects during the patterning. Previously reported topcoat materials mainly use hydrophobic fluoro-compounds and carboxylic acids to provide high dissolution rates (DR) to basic developers as well as high receding contact angles (RCA). Recently, the demand for a new top-coat material has risen since current materials cause water-mark defects and decreases in scan speeds, due to insufficient RCA's. However, RCA and DR are in a trade-off relationship as an increase in RCA generally results in a lower DR. To overcome this, a novel polymer with high-fluorine content was synthesized to produce a topcoat material with improved DR (120 nm/s in 2.38 wt% TMAH) and RCA (>70°). In addition, a strategy to control the pattern profile according to needs of customers was found.

Holistic approach for overlay and edge placement error to meet the 5nm technology node requirements

NASA Astrophysics Data System (ADS)

Mulkens, Jan; Slachter, Bram; Kubis, Michael; Tel, Wim; Hinnen, Paul; Maslow, Mark; Dillen, Harm; Ma, Eric; Chou, Kevin; Liu, Xuedong; Ren, Weiming; Hu, Xuerang; Wang, Fei; Liu, Kevin

2018-03-01

In this paper, we discuss the metrology methods and error budget that describe the edge placement error (EPE). EPE quantifies the pattern fidelity of a device structure made in a multi-patterning scheme. Here the pattern is the result of a sequence of lithography and etching steps, and consequently the contour of the final pattern contains error sources of the different process steps. EPE is computed by combining optical and ebeam metrology data. We show that high NA optical scatterometer can be used to densely measure in device CD and overlay errors. Large field e-beam system enables massive CD metrology which is used to characterize the local CD error. Local CD distribution needs to be characterized beyond 6 sigma, and requires high throughput e-beam system. We present in this paper the first images of a multi-beam e-beam inspection system. We discuss our holistic patterning optimization approach to understand and minimize the EPE of the final pattern. As a use case, we evaluated a 5-nm logic patterning process based on Self-Aligned-QuadruplePatterning (SAQP) using ArF lithography, combined with line cut exposures using EUV lithography.

Performance analysis of boron nitride embedded armchair graphene nanoribbon metal-oxide-semiconductor field effect transistor with Stone Wales defects

NASA Astrophysics Data System (ADS)

Chanana, Anuja; Sengupta, Amretashis; Mahapatra, Santanu

2014-01-01

We study the performance of a hybrid Graphene-Boron Nitride armchair nanoribbon (a-GNR-BN) n-MOSFET at its ballistic transport limit. We consider three geometric configurations 3p, 3p + 1, and 3p + 2 of a-GNR-BN with BN atoms embedded on either side (2, 4, and 6 BN) on the GNR. Material properties like band gap, effective mass, and density of states of these H-passivated structures are evaluated using the Density Functional Theory. Using these material parameters, self-consistent Poisson-Schrodinger simulations are carried out under the Non Equilibrium Green's Function formalism to calculate the ballistic n-MOSFET device characteristics. For a hybrid nanoribbon of width ˜5 nm, the simulated ON current is found to be in the range of 265 μA-280 μA with an ON/OFF ratio 7.1 × 106-7.4 × 106 for a VDD = 0.68 V corresponding to 10 nm technology node. We further study the impact of randomly distributed Stone Wales (SW) defects in these hybrid structures and only 2.5% degradation of ON current is observed for SW defect density of 3.18%.

PEGylated polylysine dendrimers increase lymphatic exposure to doxorubicin when compared to PEGylated liposomal and solution formulations of doxorubicin.

PubMed

Ryan, Gemma M; Kaminskas, Lisa M; Bulitta, Jürgen B; McIntosh, Michelle P; Owen, David J; Porter, Christopher J H

2013-11-28

Improved delivery of chemotherapeutic drugs to the lymphatic system has the potential to augment outcomes for cancer therapy by enhancing activity against lymph node metastases. Uptake of small molecule chemotherapeutics into the lymphatic system, however, is limited. Nano-sized drug carriers have the potential to promote access to the lymphatics, but to this point, this has not been examined in detail. The current study therefore evaluated the lymphatic exposure of doxorubicin after subcutaneous and intravenous administration as a simple solution formulation or when formulated as a doxorubicin loaded PEGylated poly-lysine dendrimer (hydrodynamic diameter 12 nm), a PEGylated liposome (100 nm) and various pluronic micellar formulations (~5 nm) to thoracic lymph duct cannulated rats. Plasma and lymph pharmacokinetics were analysed by compartmental pharmacokinetic modelling in S-ADAPT, and Berkeley Madonna software was used to predict the lymphatic exposure of doxorubicin over an extended period of time. The micelle formulations displayed poor in vivo stability, resulting in doxorubicin profiles that were similar to that observed after administration of the doxorubicin solution formulation. In contrast, the dendrimer formulation significantly increased the recovery of doxorubicin in the thoracic lymph after both intravenous and subcutaneous dosing when compared to the solution or micellar formulation. Dendrimer-doxorubicin also resulted in increases in lymphatic doxorubicin concentrations when compared to the liposome formulation, although liposomal doxorubicin did increase lymphatic transport when compared to the solution formulation. Specifically, the dendrimer formulation increased the recovery of doxorubicin in the lymph up to 30 h post dose by up to 685 fold and 3.7 fold when compared to the solution and liposomal formulations respectively. Using the compartmental model to predict lymphatic exposure to longer time periods suggested that doxorubicin exposure to the lymphatic system would ultimately be 9796 times and 6.1 times greater after administration of dendrimer doxorubicin when compared to the solution and liposome formulations respectively. The recovery of doxorubicin in the sentinel lymph nodes draining the subcutaneous injection site was also quantified directly, and consistent with the lymph pharmacokinetic data, lymph node recovery was greatest for the dendrimer formulation (12% of dosed doxorubicin/g node) when compared to the liposome (1.4%/g node) and solution (<1%/g node) formulations. The data suggest that dendrimer-based drug delivery systems have the potential to enhance drug exposure to lymph-based drug targets such as lymphatic metastases. © 2013.

Representation of activity in images using geospatial temporal graphs

DOE Office of Scientific and Technical Information (OSTI.GOV)

Brost, Randolph; McLendon, III, William C.; Parekh, Ojas D.

Various technologies pertaining to modeling patterns of activity observed in remote sensing images using geospatial-temporal graphs are described herein. Graphs are constructed by representing objects in remote sensing images as nodes, and connecting nodes with undirected edges representing either distance or adjacency relationships between objects and directed edges representing changes in time. Activity patterns may be discerned from the graphs by coding nodes representing persistent objects like buildings differently from nodes representing ephemeral objects like vehicles, and examining the geospatial-temporal relationships of ephemeral nodes within the graph.

Improving OCD time to solution using Signal Response Metrology

NASA Astrophysics Data System (ADS)

Fang, Fang; Zhang, Xiaoxiao; Vaid, Alok; Pandev, Stilian; Sanko, Dimitry; Ramanathan, Vidya; Venkataraman, Kartik; Haupt, Ronny

2016-03-01

In recent technology nodes, advanced process and novel integration scheme have challenged the precision limits of conventional metrology; with critical dimensions (CD) of device reduce to sub-nanometer region. Optical metrology has proved its capability to precisely detect intricate details on the complex structures, however, conventional RCWA-based (rigorous coupled wave analysis) scatterometry has the limitations of long time-to-results and lack of flexibility to adapt to wide process variations. Signal Response Metrology (SRM) is a new metrology technique targeted to alleviate the consumption of engineering and computation resources by eliminating geometric/dispersion modeling and spectral simulation from the workflow. This is achieved by directly correlating the spectra acquired from a set of wafers with known process variations encoded. In SPIE 2015, we presented the results of SRM application in lithography metrology and control [1], accomplished the mission of setting up a new measurement recipe of focus/dose monitoring in hours. This work will demonstrate our recent field exploration of SRM implementation in 20nm technology and beyond, including focus metrology for scanner control; post etch geometric profile measurement, and actual device profile metrology.

Technology development, demonstration, and orbital support requirements for manned lunar and Mars missions

NASA Technical Reports Server (NTRS)

Llewellyn, Charles P.; Brender, Karen D.

1990-01-01

An overview of the critical technology needs and the Space Station Freedom (SSF) focused support requirements for the Office of Exploration's (OEXP) manned lunar and Mars missions is presented. Major emphasis is directed at the technology needs associated with the low earth orbit (LEO) transportation node assembly and vehicle processing functions required by the lunar and Mars mission flight elements. The key technology areas identified as crucial to support the LEO node function include in-space assembly and construction, in-space vehicle processing and refurbishment, space storable cryogenics, and autonomous rendezvous and docking.

Technology needs development and orbital support requirements for manned lunar and Mars missions

NASA Technical Reports Server (NTRS)

Brender, Karen D.; Llewellyn, Charles P.

1990-01-01

This paper presents an overview of the critical technology needs and the Space Station Freedom focused support requirements for the Office of Exploration's manned lunar and Mars missions. The emphasis is on e directed at the technology needs associated with the low earth orbit (LEO) transportation node assembly and vehicle processing functions required by the lunar Mars mission flight elements. The key technology areas identified as crucial to support the LEO node function include in-space assembly and construction, in-space vehicle processing and refurbishment, space storable cryogenics, and autonomous rendezvous and docking.

Precuring implant photoresists for shrink and patterning control

NASA Astrophysics Data System (ADS)

Winroth, Gustaf; Rosseel, Erik; Delvaux, Christie; Sanchez, Efrain Altamirano; Ercken, Monique

2013-10-01

193-nm compatible photoresists are turning out to be the new platform for implant lithography, due to the increasing requirements in both resolution and overlay. Shrinkage of such resists is becoming progressively the most topical issue for aggressive nodes, where conventional pretreatments from older resist platforms, such as ultraviolet flood exposures, are not directly transferable to (meth-)acrylate-type resists. The precuring options available for state-of-the-art implant photoresists for 193-nm lithography is explored, in which we target to reduce the shrinkage during implantation for trenching critical dimensions (CDs) that are relevant for nodes <20 nm. An extensive study comprising different approaches, including laser-, ion-, and electron-based treatments, is presented. Each treatment is individually investigated with the aim to find not only a valid pretreatment for shrinkage control during implantation, but also to understand what effect alternative pretreatments have on the morphology and the CDs of thick photoresists used as implant stopping layers. Viable options for further process optimization in order to integrate them into device process flows are found. To this extent, the shrink behavior after pretreatment is shown, and the additional shrink dynamics after implantation are compared.

Inline detection of Chrome degradation on binary 193nm photomasks

NASA Astrophysics Data System (ADS)

Dufaye, Félix; Sippel, Astrid; Wylie, Mark; García-Berríos, Edgardo; Crawford, Charles; Hess, Carl; Sartelli, Luca; Pogliani, Carlo; Miyashita, Hiroyuki; Gough, Stuart; Sundermann, Frank; Brochard, Christophe

2013-09-01

193nm binary photomasks are still used in the semiconductor industry for the lithography of some critical layers for the nodes 90nm and 65nm, with high volumes and over long periods. However, these 193nm binary photomasks can be impacted by a phenomenon of chrome oxidation leading to critical dimensions uniformity (CDU) degradation with a pronounced radial signature. If not detected early enough, this CDU degradation may cause defectivity issues and lower yield on wafers. Fortunately, a standard cleaning and repellicle service at the mask shop has been demonstrated as efficient to remove the grown materials and get the photomask CD back on target.Some detection methods have been already described in literature, such as wafer CD intrafield monitoring (ACLV), giving reliable results but also consuming additional SEM time with less precision than direct photomask measurement. In this paper, we propose another approach, by monitoring the CDU directly on the photomask, concurrently with defect inspection for regular requalification to production for wafer fabs. For this study, we focused on a Metal layer in a 90nm technology node. Wafers have been exposed with production conditions and then measured by SEM-CD. Afterwards, this photomask has been measured with a SEM-CD in mask shop and also inspected on a KLA-Tencor X5.2 inspection system, with pixels 125 and 90nm, to evaluate the Intensity based Critical Dimension Uniformity (iCDU) option. iCDU was firstly developed to provide feed-forward CDU maps for scanner intrafield corrections, from arrayed dense structures on memory photomasks. Due to layout complexity and differing feature types, CDU monitoring on logic photomasks used to pose unique challenges.The selection of suitable feature types for CDU monitoring on logic photomasks is no longer an issue, since the transmitted intensity map gives all the needed information, as shown in this paper. In this study, the photomask was heavily degraded after more than 18,000 300mm wafers exposed and the cleaning brought it back almost to its original state after manufacture. Wafer CD, photomask CD and iCDU results can be compared, before and after a standard mask shop cleaning. Measurement points have be chosen in logic areas and SRAM areas, so that their respective behaviours can be studied separately. Transmitted maps before and after cleaning were analysed in terms of CD shift and CDU degradation. The delta map shows a nice correlation with photomask CD shift. iCDU demonstrated the capability to detect a reliable CD range degradation of 5nm on photomask by a comparison between a reference inspection and the current inspection. Die to die inspection mode provides also valuable data, highlighting the degraded chrome sidewalls, more in the photomask centre than on the edges. Ultimately, these results would enable to trigger the preventive cleanings rather than on predefined thresholds. The expected gains for wafer fabs are cost savings (adapted cleanings frequency), increased photomask availability for production, longer photomask lifetime, no additional SEM time neither for photomask nor on wafer.

Evaluation of the tracing effect of carbon nanoparticle and carbon nanoparticle-epirubicin suspension in axillary lymph node dissection for breast cancer treatment.

PubMed

Du, Junze; Zhang, Yongsong; Ming, Jia; Liu, Jing; Zhong, Ling; Liang, Quankun; Fan, Linjun; Jiang, Jun

2016-06-22

Carbon nanoparticle suspension, using smooth carbon particles at a diameter of 21 nm added with suspending agents, is a stable suspension of carbon pellets of 150 nm in diameter. It is obviously inclined to the lymphatic system. There were some studies reporting that carbon nanoparticles are considered as superior tracers for sentinel lymph nodes because of their stability and operational feasibility. However, there were few study concerns about the potential treatment effect including tracing and local chemotherapeutic effect of carbon nanoparticle-epirubicin suspension on breast cancer with axillary metastasis. In the current study, a randomized controlled analysis was performed to investigate the potential treatment effect of carbon nanoparticle-epirubicin suspension on breast cancer with axillary metastasis. A total of 90 breast cancer patients were randomly divided into three equal groups: control, tracer, and drug-load groups. The control group patients did not receive any lymphatic tracers, the tracer group patients were subcutaneously injected with 1 ml carbon nanoparticle suspension, and the drug-load group patients were injected with 3 ml carbon nanoparticle-epirubicin suspension at four separate sites around the areola 24 h before surgery. Modified radical mastectomy, endoscopic subcutaneous mammary resection plus axillary lymph node dissection, and immediate reconstruction with implants or breast-conserving surgery were performed. The mean number of the dissected lymph nodes per patient was significantly higher in the tracer (21.3 ± 6.1) and drug-load (19.5 ± 3.7) groups than in the control group (16.7 ± 3.4) (P < 0.05). Most lymph nodes in the former two groups were stained black (75.7 and 73.3 %, respectively), but with no significant difference between the groups. Most metastatic lymph nodes were also stained black in the tracer group (68.6 %) and drug-load group (78.1 %) and with no significant difference between the groups (P = 0.198). Microscopic examination revealed that the carbon nanoparticles were localized around or among the cancer cell masses and residues of necrotized cancer cells surrounded by fibroblastic proliferation could be found within the stained lymph nodes in the drug-load group. The majority of axillary lymph nodes were stained black by the suspension of carbon nanoparticles, which helped identify the lymph nodes from the surrounding tissues and avoided aggressive axillary treatment. Thus, a combination therapy of carbon nanoparticles with epirubicin could play an important role in lymphatic chemotherapy without affecting tracing. ChiCTRTRC13003419.

Line roughness improvements on self-aligned quadruple patterning by wafer stress engineering

NASA Astrophysics Data System (ADS)

Liu, Eric; Ko, Akiteru; Biolsi, Peter; Chae, Soo Doo; Hsieh, Chia-Yun; Kagaya, Munehito; Lee, Choongman; Moriya, Tsuyoshi; Tsujikawa, Shimpei; Suzuki, Yusuke; Okubo, Kazuya; Imai, Kiyotaka

2018-04-01

In integrated circuit and memory devices, size shrinkage has been the most effective method to reduce production cost and enable the steady increment of the number of transistors per unit area over the past few decades. In order to reduce the die size and feature size, it is necessary to minimize pattern formation in the advance node development. In the node of sub-10nm, extreme ultra violet lithography (EUV) and multi-patterning solutions based on 193nm immersionlithography are the two most common options to achieve the size requirement. In such small features of line and space pattern, line width roughness (LWR) and line edge roughness (LER) contribute significant amount of process variation that impacts both physical and electrical performances. In this paper, we focus on optimizing the line roughness performance by using wafer stress engineering on 30nm pitch line and space pattern. This pattern is generated by a self-aligned quadruple patterning (SAQP) technique for the potential application of fin formation. Our investigation starts by comparing film materials and stress levels in various processing steps and material selection on SAQP integration scheme. From the cross-matrix comparison, we are able to determine the best stack of film selection and stress combination in order to achieve the lowest line roughness performance while obtaining pattern validity after fin etch. This stack is also used to study the step-by-step line roughness performance from SAQP to fin etch. Finally, we will show a successful patterning of 30nm pitch line and space pattern SAQP scheme with 1nm line roughness performance.

Protocol Architecture Model Report

NASA Technical Reports Server (NTRS)

Dhas, Chris

2000-01-01

NASA's Glenn Research Center (GRC) defines and develops advanced technology for high priority national needs in communications technologies for application to aeronautics and space. GRC tasked Computer Networks and Software Inc. (CNS) to examine protocols and architectures for an In-Space Internet Node. CNS has developed a methodology for network reference models to support NASA's four mission areas: Earth Science, Space Science, Human Exploration and Development of Space (REDS), Aerospace Technology. This report applies the methodology to three space Internet-based communications scenarios for future missions. CNS has conceptualized, designed, and developed space Internet-based communications protocols and architectures for each of the independent scenarios. The scenarios are: Scenario 1: Unicast communications between a Low-Earth-Orbit (LEO) spacecraft inspace Internet node and a ground terminal Internet node via a Tracking and Data Rela Satellite (TDRS) transfer; Scenario 2: Unicast communications between a Low-Earth-Orbit (LEO) International Space Station and a ground terminal Internet node via a TDRS transfer; Scenario 3: Multicast Communications (or "Multicasting"), 1 Spacecraft to N Ground Receivers, N Ground Transmitters to 1 Ground Receiver via a Spacecraft.

Latest evolution in a 300mm graphoepitaxy pilot line flow for L/S applications

NASA Astrophysics Data System (ADS)

Claveau, G.; Argoud, M.; Pimenta-Barros, P.; Chamiot-Maitral, G.; Tiron, R.; Chevalier, X.; Navarro, C.

2017-03-01

Directed Self Assembly (DSA) of block-copolymers (BCPs) used as a complementary technique to the 193nm immersion lithography has demonstrated sub-10nm node applications in both via and line/space patterning. We propose however to study the performance of graphoepitaxy which allows DSA with thicker initial BCP layer, higher multiplication factors and stronger orientation control of lamellae. The aim of this work is to use the 300mm pilot line available at LETI and Arkema's advanced materials to evaluate the performances of a novel graphoepitaxy process based on the work on a 38nm period lamellar PS-b-PMMA (L38) reported before.

Link prediction based on local community properties

NASA Astrophysics Data System (ADS)

Yang, Xu-Hua; Zhang, Hai-Feng; Ling, Fei; Cheng, Zhi; Weng, Guo-Qing; Huang, Yu-Jiao

2016-09-01

The link prediction algorithm is one of the key technologies to reveal the inherent rule of network evolution. This paper proposes a novel link prediction algorithm based on the properties of the local community, which is composed of the common neighbor nodes of any two nodes in the network and the links between these nodes. By referring to the node degree and the condition of assortativity or disassortativity in a network, we comprehensively consider the effect of the shortest path and edge clustering coefficient within the local community on node similarity. We numerically show the proposed method provide good link prediction results.

Stitching-aware in-design DPT auto fixing for sub-20nm logic devices

NASA Astrophysics Data System (ADS)

Choi, Soo-Han; Sai Krishna, K. V. V. S.; Pemberton-Smith, David

2017-03-01

As the technology continues to shrink below 20nm, Double Patterning Technology (DPT) becomes one of the mandatory solutions for routing metal layers. From the view point of Place and Route (P&R), the major concerns are how to prevent DPT odd-cycles automatically without sacrificing chip area. Even though the leading-edge P&R tools have advanced algorithms to prevent DPT odd-cycles, it is very hard to prevent the localized DPT odd-cycles, especially in Engineering Change Order (ECO) routing. In the last several years, we developed In-design DPT Auto Fixing method in order to reduce localized DPT odd-cycles significantly during ECO and could achieve remarkable design Turn-Around Times (TATs). But subsequently, as the design complexity continued increasing and chip size continued decreasing, we needed a new In-design DPT Auto Fixing approach to improve the auto. fixing rate. In this paper, we present the Stitching-Aware In-design DPT Auto Fixing method for better fixing rates and smaller chip design. The previous In-design DPT Auto Fixing method detected all DPT odd-cycles and tried to remove oddcycles by increasing the adjacent space. As the metal congestions increase in the newer technology nodes, the older Auto Fixing method has limitations to increase the adjacent space between routing metals. Consequently, the auto fixing rate of older method gets worse with the introduction of the smaller design rules. With DPT stitching enablement at In-design DRC checking procedure, the new Stitching-Aware DPT Auto Fixing method detects the most critical odd-cycles and revolve the odd-cycles automatically. The accuracy of new flow ensures better usage of space in the congested areas, and helps design more smaller chips. By applying the Stitching-Aware DPT Auto Fixing method to sub-20nm logic devices, we can confirm that the auto fixing rate is improved by 2X compared with auto fixing without stitching. Additionally, by developing the better heuristic algorithm and flow for DPT stitching, we can get DPT compliant layout with the acceptable design TATs.

Evaluation of dry technology for removal of pellicle adhesive residue on advanced optical reticles

NASA Astrophysics Data System (ADS)

Paracha, Shazad; Bekka, Samy; Eynon, Benjamin; Choi, Jaehyuck; Balooch, Mehdi; Varghese, Ivin; Hopkins, Tyler

2013-09-01

The fast pace of MOSFET scaling is accelerating the introduction of smaller technology nodes to extend CMOS beyond 20nm as required by Moore's law. To meet these stringent requirements, the industry is seeing an increase in the number of critical layers per reticle set as it move to lower technology nodes especially in a high volume manufacturing operation. These requirements are resulting in reticles with higher feature densities, smaller feature sizes and highly complex Optical Proximity Correction (OPC), built with using new absorber and pellicle materials. These rapid changes are leaving a gap in maintaining these reticles in a fab environment, for not only haze control but also the functionality of the reticle. The industry standard of using wet techniques (which uses aggressive chemicals, like SPM, and SC1) to repel reticles can result in damage to the sub-resolution assist features (SRAF's), create changes to CD uniformity and have potential for creating defects that require other means of removal or repair. Also, these wet cleaning methods in the fab environment can create source for haze growth. Haze can be controlled by: 1) Chemical free (dry) reticle cleaning, 2) In-line reticle inspection in fab, and 3) Manage the environment where reticles are stored. In this paper we will discuss a dry technique (chemical free) to remove pellicle adhesive residue from advanced optical reticles. Samsung Austin Semiconductors (SAS), jointly worked with Eco-Snow System (a division of RAVE N.P., Inc.) to evaluate the use of Dry Reactive Gas (DRG) technique to remove pellicle adhesive residue on reticles. This technique can significantly reduce the impact to the critical geometry in active array of the reticle, resulting in preserving the reticle performance level seen at wafer level. The paper will discuss results on the viability of this technique used on advanced reticles.

Design and Implementation of Secure Area Expansion Scheme for Public Wireless LAN Services

NASA Astrophysics Data System (ADS)

Watanabe, Ryu; Tanaka, Toshiaki

Recently, wireless LAN (WLAN) technology has become a major wireless communication method. The communication bandwidth is increasing and speeds have attained rates exceeding 100 Mbps. Therefore, WLAN technology is regarded as one of the promising communication methods for future networks. In addition, public WLAN connection services can be used in many locations. However, the number of the access points (AP) is insufficient for seamless communication and it cannot be said that users can use the service ubiquitously. An ad-hoc network style connection can be used to expand the coverage area of a public WLAN service. By relaying the user messages among the user nodes, a node can obtain an Internet connection via an AP, even though the node is located outside the AP's direct wireless connection area. Such a coverage area extending technology has many advantages thanks to the feature that no additional infrastructure is required. Therefore, there is a strong demand for this technology as it allows the cost-effective construction of future networks. When a secure ad-hoc routing protocol is used for message exchange in the WLAN service, the message routes are protected from malicious behavior such as route forging and can be maintained appropriately. To do this, however, a new node that wants to join the WLAN service has to obtain information such as the public key certificate and IP address in order to start secure ad-hoc routing. In other words, an initial setup is required for every network node to join the WLAN service properly. Ordinarily, such information should be assigned from the AP. However, new nodes cannot always contact an AP directly. Therefore, there are problems about information delivery in the initial setup of a network node. These problems originate in the multi hop connection based on the ad-hoc routing protocols. In order to realize an expanded area WLAN service, in this paper, the authors propose a secure public key certificate and address provision scheme during the initial setup phase on mobile nodes for the service. The proposed scheme also considers the protection of user privacy. Accordingly, none of the user nodes has to reveal their unique and persistent information to other nodes. Instead of using such information, temporary values are sent by an AP to mobile nodes and used for secure ad-hoc routing operations. Therefore, our proposed scheme prevents tracking by malicious parties by avoiding the use of unique information. Moreover, a test bed was also implemented based on the proposal and an evaluation was carried out in order to confirm performance. In addition, the authors describe a countermeasure against denial of service (DoS) attacks based on the approach to privacy protection described in our proposal.

Low power adder based auditory filter architecture.

PubMed

Rahiman, P F Khaleelur; Jayanthi, V S

2014-01-01

Cochlea devices are powered up with the help of batteries and they should possess long working life to avoid replacing of devices at regular interval of years. Hence the devices with low power consumptions are required. In cochlea devices there are numerous filters, each responsible for frequency variant signals, which helps in identifying speech signals of different audible range. In this paper, multiplierless lookup table (LUT) based auditory filter is implemented. Power aware adder architectures are utilized to add the output samples of the LUT, available at every clock cycle. The design is developed and modeled using Verilog HDL, simulated using Mentor Graphics Model-Sim Simulator, and synthesized using Synopsys Design Compiler tool. The design was mapped to TSMC 65 nm technological node. The standard ASIC design methodology has been adapted to carry out the power analysis. The proposed FIR filter architecture has reduced the leakage power by 15% and increased its performance by 2.76%.

Consideration of VT5 etch-based OPC modeling

NASA Astrophysics Data System (ADS)

Lim, ChinTeong; Temchenko, Vlad; Kaiser, Dieter; Meusel, Ingo; Schmidt, Sebastian; Schneider, Jens; Niehoff, Martin

2008-03-01

Including etch-based empirical data during OPC model calibration is a desired yet controversial decision for OPC modeling, especially for process with a large litho to etch biasing. While many OPC software tools are capable of providing this functionality nowadays; yet few were implemented in manufacturing due to various risks considerations such as compromises in resist and optical effects prediction, etch model accuracy or even runtime concern. Conventional method of applying rule-based alongside resist model is popular but requires a lot of lengthy code generation to provide a leaner OPC input. This work discusses risk factors and their considerations, together with introduction of techniques used within Mentor Calibre VT5 etch-based modeling at sub 90nm technology node. Various strategies are discussed with the aim of better handling of large etch bias offset without adding complexity into final OPC package. Finally, results were presented to assess the advantages and limitations of the final method chosen.

A novel processing platform for post tape out flows

NASA Astrophysics Data System (ADS)

Vu, Hien T.; Kim, Soohong; Word, James; Cai, Lynn Y.

2018-03-01

As the computational requirements for post tape out (PTO) flows increase at the 7nm and below technology nodes, there is a need to increase the scalability of the computational tools in order to reduce the turn-around time (TAT) of the flows. Utilization of design hierarchy has been one proven method to provide sufficient partitioning to enable PTO processing. However, as the data is processed through the PTO flow, its effective hierarchy is reduced. The reduction is necessary to achieve the desired accuracy. Also, the sequential nature of the PTO flow is inherently non-scalable. To address these limitations, we are proposing a quasi-hierarchical solution that combines multiple levels of parallelism to increase the scalability of the entire PTO flow. In this paper, we describe the system and present experimental results demonstrating the runtime reduction through scalable processing with thousands of computational cores.

Power Management Integrated Circuit for Indoor Photovoltaic Energy Harvesting System

NASA Astrophysics Data System (ADS)

Jain, Vipul

In today's world, power dissipation is a main concern for battery operated mobile devices. Key design decisions are being governed by power rather than area/delay because power requirements are growing more stringent every year. Hence, a hybrid power management system is proposed, which uses both a solar panel to harvest energy from indoor lighting and a battery to power the load. The system tracks the maximum power point of the solar panel and regulates the battery and microcontroller output load voltages through the use of an on-chip switched-capacitor DC-DC converter. System performance is verified through simulation at the 180nm technology node and is made to be integrated on-chip with 0.25 second startup time, 79% efficiency, --8/+14% ripple on the load, an average 1micro A of quiescent current (3.7micro W of power) and total on-chip area of 1.8mm2 .

Roughness and uniformity improvements on self-aligned quadruple patterning technique for 10nm node and beyond by wafer stress engineering

NASA Astrophysics Data System (ADS)

Liu, Eric; Ko, Akiteru; O'Meara, David; Mohanty, Nihar; Franke, Elliott; Pillai, Karthik; Biolsi, Peter

2017-05-01

Dimension shrinkage has been a major driving force in the development of integrated circuit processing over a number of decades. The Self-Aligned Quadruple Patterning (SAQP) technique is widely adapted for sub-10nm node in order to achieve the desired feature dimensions. This technique provides theoretical feasibility of multiple pitch-halving from 193nm immersion lithography by using various pattern transferring steps. The major concept of this approach is to a create spacer defined self-aligned pattern by using single lithography print. By repeating the process steps, double, quadruple, or octuple are possible to be achieved theoretically. In these small architectures, line roughness control becomes extremely important since it may contribute to a significant portion of process and device performance variations. In addition, the complexity of SAQP in terms of processing flow makes the roughness improvement indirective and ineffective. It is necessary to discover a new approach in order to improve the roughness in the current SAQP technique. In this presentation, we demonstrate a novel method to improve line roughness performances on 30nm pitch SAQP flow. We discover that the line roughness performance is strongly related to stress management. By selecting different stress level of film to be deposited onto the substrate, we can manipulate the roughness performance in line and space patterns. In addition, the impact of curvature change by applied film stress to SAQP line roughness performance is also studied. No significant correlation is found between wafer curvature and line roughness performance. We will discuss in details the step-by-step physical performances for each processing step in terms of critical dimension (CD)/ critical dimension uniformity (CDU)/line width roughness (LWR)/line edge roughness (LER). Finally, we summarize the process needed to reach the full wafer performance targets of LWR/LER in 1.07nm/1.13nm on 30nm pitch line and space pattern.

The chemistry screening for ultra low-k dielectrics plasma etching

NASA Astrophysics Data System (ADS)

Zotovich, A.; Krishtab, M.; Lazzarino, F.; Baklanov, M. R.

2014-12-01

Nowadays, some of the important problems in microelectronics technological node scaling down are related to interconnect delay, dynamic power consumption and crosstalk. This compels introduction and integration of new materials with low dielectric permittivity (low-k materials) as insulator in interconnects. One of such materials under consideration for sub 10 nm technology node is a spin-coated organosilicate glass layer with ordered porosity (37-40%) and a k-value of 2.2 (OSG 2.2). High porosity leads to significant challenges during the integration and one of them is a material degradation during the plasma etching. The low-k samples have been etched in a CCP double frequency plasma chamber from TEL. Standard recipes developed for microporous materials with k<2.5 and based on mixture of C4F8 and CF4 with N2, O2 and Ar were found significantly damaging for high-porous ULK materials. The standard etch recipe was compared with oxygen free etch chemistries based on mixture CF4 with CH2F2 and Ar assuming that the presence of oxygen in the first recipe will have significant negative impact in high porous ULK materials. The film damage has been analyzed using FTIR spectroscopy and the k-value has been extracted by capacitance CV-measurements. There was indirectly shown that vacuum ultraviolet photons cause the main damage of low-k, whereas radicals and ions are not so harmful. Trench structures have been etched in low-k film and cross-SEM analysis with and without HF dipping has been performed to reveal patterning capability and visualize the sidewall damage and. The bottom roughness was analyzed by AFM.

George E. Pake Prize Lecture: CMOS Technology Roadmap: Is Scaling Ending?

NASA Astrophysics Data System (ADS)

Chen, Tze-Chiang (T. C.)

The development of silicon technology has been based on the principle of physics and driven by the system needs. Traditionally, the system needs have been satisfied by the increase in transistor density and performance, as suggested by Moore's Law and guided by ''Dennard CMOS scaling theory''. As the silicon industry moves towards the 14nm node and beyond, three of the most important challenges facing Moore's Law and continued CMOS scaling are the growing standby power dissipation, the increasing variability in device characteristics and the ever increasing manufacturing cost. Actually, the first two factors are the embodiments of CMOS approaching atomistic and quantum-mechanical physics boundaries. Industry directions for addressing these challenges are also developing along three primary approaches: Extending silicon scaling through innovations in materials and device structure, expanding the level of integration through three-dimensional structures comprised of through-silicon-vias holes and chip stacking in order to enhance functionality and parallelism and exploring post-silicon CMOS innovation with new nano-devices based on distinctly different principles of physics, new materials and new processes such as spintronics, carbon nanotubes and nanowires. Hence, the infusion of new materials, innovative integration and novel device structures will continue to extend CMOS technology scaling for at least another decade.

Light-effect transistor (LET) with multiple independent gating controls for optical logic gates and optical amplification

NASA Astrophysics Data System (ADS)

Marmon, Jason; Rai, Satish; Wang, Kai; Zhou, Weilie; Zhang, Yong

The pathway for CMOS technology beyond the 5-nm technology node remains unclear for both physical and technological reasons. A new transistor paradigm is required. A LET (Marmon et. al., Front. Phys. 2016, 4, No. 8) offers electronic-optical hybridization at the component level, and is capable of continuing Moore's law to the quantum scale. A LET overcomes a FET's fabrication complexity, e.g., physical gate and doping, by employing optical gating and photoconductivity, while multiple independent, optical gates readily realize unique functionalities. We report LET device characteristics and novel digital and analog applications, such as optical logic gates and optical amplification. Prototype CdSe-nanowire-based LETs, incorporating an M-S-M structure, show output and transfer characteristics resembling advanced FETs, e.g., on/off ratios up to 106 with a source-drain voltage of 1.43V, gate-power of 260nW, and a subthreshold swing of 0.3nW/decade (excluding losses). A LET has potential for high-switching (THz) speeds and extremely low-switching energies (aJ) in the ballistic transport region. Our work offers new electronic-optical integration strategies for high speed and low energy computing approaches, which could potentially be extended to other materials and devices.

Performance of ASML YieldStar μDBO overlay targets for advanced lithography nodes C028 and C014 overlay process control

NASA Astrophysics Data System (ADS)

Blancquaert, Yoann; Dezauzier, Christophe; Depre, Jerome; Miqyass, Mohamed; Beltman, Jan

2013-04-01

Continued tightening of overlay control budget in semiconductor lithography drives the need for improved metrology capabilities. Aggressive improvements are needed for overlay metrology speed, accuracy and precision. This paper is dealing with the on product metrology results of a scatterometry based platform showing excellent production results on resolution, precision, and tool matching for overlay. We will demonstrate point to point matching between tool generations as well as between target sizes and types. Nowadays, for the advanced process nodes a lot of information is needed (Higher order process correction, Reticle fingerprint, wafer edge effects) to quantify process overlay. For that purpose various overlay sampling schemes are evaluated: ultra- dense, dense and production type. We will show DBO results from multiple target type and shape for on product overlay control for current and future node down to at least 14 nm node. As overlay requirements drive metrology needs, we will evaluate if the new metrology platform meets the overlay requirements.

Net Warrior D10 Technology Report: Airborne Early Warning and Control (AEW&C) and Data Link Nodes

DTIC Science & Technology

2012-04-01

ADO ) approach to implementing Network Centric Warfare (NCW) through ‘learning by doing’. Net Warrior was conceived to address, through... frameworks are able to satisfy design needs of applications to produce stable mission and net centric systems. NW-D10 employed a SOA approach to...UNCLASSIFIED Net Warrior D10 Technology Report: Airborne Early Warning and Control (AEW&C) and Data Link Nodes Derek Dominish

Investigating the intrinsic cleanliness of automated handling designed for EUV mask pod-in-pod systems

NASA Astrophysics Data System (ADS)

Brux, O.; van der Walle, P.; van der Donck, J. C. J.; Dress, P.

2011-11-01

Extreme Ultraviolet Lithography (EUVL) is the most promising solution for technology nodes 16nm (hp) and below. However, several unique EUV mask challenges must be resolved for a successful launch of the technology into the market. Uncontrolled introduction of particles and/or contamination into the EUV scanner significantly increases the risk for device yield loss and potentially scanner down-time. With the absence of a pellicle to protect the surface of the EUV mask, a zero particle adder regime between final clean and the point-of-exposure is critical for the active areas of the mask. A Dual Pod concept for handling EUV masks had been proposed by the industry as means to minimize the risk of mask contamination during transport and storage. SuSS-HamaTech introduces MaskTrackPro InSync as a fully automated solution for the handling of EUV masks in and out of this Dual Pod System and therefore constitutes an interface between various tools inside the Fab. The intrinsic cleanliness of each individual handling and storage step of the inner shell (EIP) of this Dual Pod and the EUV mask inside the InSync Tool has been investigated to confirm the capability for minimizing the risk of cross-contamination. An Entegris Dual Pod EUV-1000A-A110 has been used for the qualification. The particle detection for the qualification procedure was executed with the TNO's RapidNano Particle Scanner, qualified for particle sizes down to 50nm (PSL equivalent). It has been shown that the target specification of < 2 particles @ 60nm per 25 cycles has been achieved. In case where added particles were measured, the EIP has been identified as a potential root cause for Ni particle generation. Any direct Ni-Al contact has to be avoided to mitigate the risk of material abrasion.

Architecture and method for a burst buffer using flash technology

DOEpatents

Tzelnic, Percy; Faibish, Sorin; Gupta, Uday K.; Bent, John; Grider, Gary Alan; Chen, Hsing-bung

2016-03-15

A parallel supercomputing cluster includes compute nodes interconnected in a mesh of data links for executing an MPI job, and solid-state storage nodes each linked to a respective group of the compute nodes for receiving checkpoint data from the respective compute nodes, and magnetic disk storage linked to each of the solid-state storage nodes for asynchronous migration of the checkpoint data from the solid-state storage nodes to the magnetic disk storage. Each solid-state storage node presents a file system interface to the MPI job, and multiple MPI processes of the MPI job write the checkpoint data to a shared file in the solid-state storage in a strided fashion, and the solid-state storage node asynchronously migrates the checkpoint data from the shared file in the solid-state storage to the magnetic disk storage and writes the checkpoint data to the magnetic disk storage in a sequential fashion.

Finding the right way: DFM versus area efficiency for 65 nm gate layer lithography

NASA Astrophysics Data System (ADS)

Sarma, Chandra S.; Scheer, Steven; Herold, Klaus; Fonseca, Carlos; Thomas, Alan; Schroeder, Uwe P.

2006-03-01

DFM (Design for Manufacturing) has become a buzzword for lithography since the 90nm node. Implementing DFM intelligently can boost yield rates and reliability in semiconductor manufacturing significantly. However, any restriction on the design space will always result in an area loss, thus diminishing the effective shrink factor for a given technology. For a lithographer, the key task is to develop a manufacturable process, while not sacrificing too much area. We have developed a high performing lithography process for attenuated gate level lithography that is based on aggressive illumination and a newly optimized SRAF placement schemes. In this paper we present our methodology and results for this optimization, using an anchored simulation model. The wafer results largely confirm the predictions of the simulations. The use of aggressive SRAF (Sub Resolution Assist Features) strategy leads to reduction of forbidden pitch regions without any SRAF printing. The data show that our OPC is capable of correcting the PC tip to tip distance without bridging between the tips in dense SRAM cells. SRAF strategy for various 2D cases has also been verified on wafer. We have shown that aggressive illumination schemes yielding a high performing lithography process can be employed without sacrificing area. By carefully choosing processing conditions, we were able develop a process that has very little restrictions for design. In our approach, the remaining issues can be addressed by DFM, partly in data prep procedures, which are largely area neutral and transparent to the designers. Hence, we have shown successfully, that DFM and effective technology shrinks are not mutually exclusive.

Microbiology and Biodegradation: Deep Ultraviolet Microscopy for the Detection, Quantification, and Characterization of Microbes

DTIC Science & Technology

2015-11-16

nm;  20  nm  FWHM  –Chroma  Technology 3 C:  340  nm;  20  nm  FWHM  – Semrock 4 C:  360  nm;  40  nm  FWHM...Chroma  Technology 5 C:  387  nm;  11  nm  FWHM  –   Semrock 6 C:  438  nm;  20  nm  FWHM  -­‐   Semrock Table 1

Tannic acid-modified silver nanoparticles for wound healing: the importance of size

PubMed Central

Orlowski, Piotr; Zmigrodzka, Magdalena; Tomaszewska, Emilia; Ranoszek-Soliwoda, Katarzyna; Czupryn, Monika; Antos-Bielska, Malgorzata; Szemraj, Janusz; Celichowski, Grzegorz; Grobelny, Jaroslaw

2018-01-01

Introduction Silver nanoparticles (AgNPs) have been shown to promote wound healing and to exhibit antimicrobial properties against a broad range of bacteria. In our previous study, we prepared tannic acid (TA)-modified AgNPs showing a good toxicological profile and immunomodulatory properties useful for potential dermal applications. Methods In this study, in vitro scratch assay, antimicrobial tests, modified lymph node assay as well as a mouse splint wound model were used to access the wound healing potential of TA-modified and unmodified AgNPs. Results TA-modified but not unmodified AgNPs exhibited effective antibacterial activity against Pseudomonas aeruginosa, Staphylococcus aureus and Escherichia coli and stimulated migration of keratinocytes in vitro. The tests using the mouse splint wound model showed that TA-modified 33 and 46 nm AgNPs promoted better wound closure, epithelialization, angiogenesis and formation of the granulation tissue. Additionally, AgNPs elicited expression of VEGF-α, PDGF-β and TGF-β1 cytokines involved in wound healing more efficiently in comparison to control and TA-treated wounds. However, both the lymph node assay and the wound model showed that TA-modified AgNPs sized 13 nm can elicit strong inflammatory response not only during wound healing but also when applied to the damaged skin. Conclusion TA-modified AgNPs sized >26 nm promote wound healing better than TA-modified or unmodified AgNPs. These findings suggest that TA-modified AgNPs sized >26 nm may have a promising application in wound management. PMID:29497293

SSL: Signal Similarity-Based Localization for Ocean Sensor Networks.

PubMed

Chen, Pengpeng; Ma, Honglu; Gao, Shouwan; Huang, Yan

2015-11-24

Nowadays, wireless sensor networks are often deployed on the sea surface for ocean scientific monitoring. One of the important challenges is to localize the nodes' positions. Existing localization schemes can be roughly divided into two types: range-based and range-free. The range-based localization approaches heavily depend on extra hardware capabilities, while range-free ones often suffer from poor accuracy and low scalability, far from the practical ocean monitoring applications. In response to the above limitations, this paper proposes a novel signal similarity-based localization (SSL) technology, which localizes the nodes' positions by fully utilizing the similarity of received signal strength and the open-air characteristics of the sea surface. In the localization process, we first estimate the relative distance between neighboring nodes through comparing the similarity of received signal strength and then calculate the relative distance for non-neighboring nodes with the shortest path algorithm. After that, the nodes' relative relation map of the whole network can be obtained. Given at least three anchors, the physical locations of nodes can be finally determined based on the multi-dimensional scaling (MDS) technology. The design is evaluated by two types of ocean experiments: a zonal network and a non-regular network using 28 nodes. Results show that the proposed design improves the localization accuracy compared to typical connectivity-based approaches and also confirm its effectiveness for large-scale ocean sensor networks.

Ultimate intra-wafer critical dimension uniformity control by using lithography and etch tool corrections

NASA Astrophysics Data System (ADS)

Kubis, Michael; Wise, Rich; Reijnen, Liesbeth; Viatkina, Katja; Jaenen, Patrick; Luca, Melisa; Mernier, Guillaume; Chahine, Charlotte; Hellin, David; Kam, Benjamin; Sobieski, Daniel; Vertommen, Johan; Mulkens, Jan; Dusa, Mircea; Dixit, Girish; Shamma, Nader; Leray, Philippe

2016-03-01

With shrinking design rules, the overall patterning requirements are getting aggressively tighter. For the 7-nm node and below, allowable CD uniformity variations are entering the Angstrom region (ref [1]). Optimizing inter- and intra-field CD uniformity of the final pattern requires a holistic tuning of all process steps. In previous work, CD control with either litho cluster or etch tool corrections has been discussed. Today, we present a holistic CD control approach, combining the correction capability of the etch tool with the correction capability of the exposure tool. The study is done on 10-nm logic node wafers, processed with a test vehicle stack patterning sequence. We include wafer-to-wafer and lot-to-lot variation and apply optical scatterometry to characterize the fingerprints. Making use of all available correction capabilities (lithography and etch), we investigated single application of exposure tool corrections and of etch tool corrections as well as combinations of both to reach the lowest CD uniformity. Results of the final pattern uniformity based on single and combined corrections are shown. We conclude on the application of this holistic lithography and etch optimization to 7nm High-Volume manufacturing, paving the way to ultimate within-wafer CD uniformity control.

Fin field effect transistor directionality impacts printing of implantation shapes

NASA Astrophysics Data System (ADS)

Wang, Xiren; Granik, Yuri

2018-01-01

In modern integrated circuit (IC) fabrication processes, the photoresist receives considerable illumination energy that is reflected by underlying topography during optical lithography of implantation layers. Bottom antireflective coating (BARC) is helpful to mitigate the reflection. Often, however, BARC is not used, because its removal is technically challenging, in addition to its relatively high economic cost. Furthermore, the advanced technology nodes, such as 14/10-nm nodes, have introduced fin field effect transistor (FinFET), which makes reflection from nonuniform silicon substrates exceptionally complicated. Therefore, modeling reflection from topography becomes obligatory to accurately predict printing of implantation shapes. Typically, FinFET is always fixed in one direction in realistic designs. However, the same implantation rectangle may be oriented in either horizontal or vertical direction. Then, there are two types of relations between the critical dimension (CD) and FinFET, namely a parallel-to and a perpendicular-to relation. We examine the fin directionality impact on CD. We found that this impact may be considerable in some cases. We use our in-house rigorous optical topography simulator to reveal underlining physical reasons. One of the major causes of the CD differences is that in the parallel orientation, the solid sidewalls of the fins conduct considerable light reflections unlike for the perpendicular orientation. This finding can aid the compact modeling in optical proximity correction of implantation masks.

A Low-Complexity Euclidean Orthogonal LDPC Architecture for Low Power Applications.

PubMed

Revathy, M; Saravanan, R

2015-01-01

Low-density parity-check (LDPC) codes have been implemented in latest digital video broadcasting, broadband wireless access (WiMax), and fourth generation of wireless standards. In this paper, we have proposed a high efficient low-density parity-check code (LDPC) decoder architecture for low power applications. This study also considers the design and analysis of check node and variable node units and Euclidean orthogonal generator in LDPC decoder architecture. The Euclidean orthogonal generator is used to reduce the error rate of the proposed LDPC architecture, which can be incorporated between check and variable node architecture. This proposed decoder design is synthesized on Xilinx 9.2i platform and simulated using Modelsim, which is targeted to 45 nm devices. Synthesis report proves that the proposed architecture greatly reduces the power consumption and hardware utilizations on comparing with different conventional architectures.

Using temperature to reduce noise in quantum frequency conversion.

PubMed

Kuo, Paulina S; Pelc, Jason S; Langrock, Carsten; Fejer, M M

2018-05-01

Quantum frequency conversion is important in quantum networks to interface nodes operating at different wavelengths and to enable long-distance quantum communication using telecommunications wavelengths. Unfortunately, frequency conversion in actual devices is not a noise-free process. One main source of noise is spontaneous Raman scattering, which can be reduced by lowering the device operating temperature. We explore frequency conversion of 1554 nm photons to 837 nm using a 1813 nm pump in a periodically poled lithium niobate waveguide device. By reducing the temperature from 85°C to 40°C, we show a three-fold reduction in dark count rates, which is in good agreement with theory.

Performance analysis of boron nitride embedded armchair graphene nanoribbon metal–oxide–semiconductor field effect transistor with Stone Wales defects

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chanana, Anuja; Sengupta, Amretashis; Mahapatra, Santanu

2014-01-21

We study the performance of a hybrid Graphene-Boron Nitride armchair nanoribbon (a-GNR-BN) n-MOSFET at its ballistic transport limit. We consider three geometric configurations 3p, 3p + 1, and 3p + 2 of a-GNR-BN with BN atoms embedded on either side (2, 4, and 6 BN) on the GNR. Material properties like band gap, effective mass, and density of states of these H-passivated structures are evaluated using the Density Functional Theory. Using these material parameters, self-consistent Poisson-Schrodinger simulations are carried out under the Non Equilibrium Green's Function formalism to calculate the ballistic n-MOSFET device characteristics. For a hybrid nanoribbon of widthmore » ∼5 nm, the simulated ON current is found to be in the range of 265 μA–280 μA with an ON/OFF ratio 7.1 × 10{sup 6}–7.4 × 10{sup 6} for a V{sub DD} = 0.68 V corresponding to 10 nm technology node. We further study the impact of randomly distributed Stone Wales (SW) defects in these hybrid structures and only 2.5% degradation of ON current is observed for SW defect density of 3.18%.« less

Overlay improvements using a real time machine learning algorithm

NASA Astrophysics Data System (ADS)

Schmitt-Weaver, Emil; Kubis, Michael; Henke, Wolfgang; Slotboom, Daan; Hoogenboom, Tom; Mulkens, Jan; Coogans, Martyn; ten Berge, Peter; Verkleij, Dick; van de Mast, Frank

2014-04-01

While semiconductor manufacturing is moving towards the 14nm node using immersion lithography, the overlay requirements are tightened to below 5nm. Next to improvements in the immersion scanner platform, enhancements in the overlay optimization and process control are needed to enable these low overlay numbers. Whereas conventional overlay control methods address wafer and lot variation autonomously with wafer pre exposure alignment metrology and post exposure overlay metrology, we see a need to reduce these variations by correlating more of the TWINSCAN system's sensor data directly to the post exposure YieldStar metrology in time. In this paper we will present the results of a study on applying a real time control algorithm based on machine learning technology. Machine learning methods use context and TWINSCAN system sensor data paired with post exposure YieldStar metrology to recognize generic behavior and train the control system to anticipate on this generic behavior. Specific for this study, the data concerns immersion scanner context, sensor data and on-wafer measured overlay data. By making the link between the scanner data and the wafer data we are able to establish a real time relationship. The result is an inline controller that accounts for small changes in scanner hardware performance in time while picking up subtle lot to lot and wafer to wafer deviations introduced by wafer processing.

Advanced in-production hotspot prediction and monitoring with micro-topography

NASA Astrophysics Data System (ADS)

Fanton, P.; Hasan, T.; Lakcher, A.; Le-Gratiet, B.; Prentice, C.; Simiz, J.-G.; La Greca, R.; Depre, L.; Hunsche, S.

2017-03-01

At 28nm technology node and below, hot spot prediction and process window control across production wafers have become increasingly critical to prevent hotspots from becoming yield-limiting defects. We previously established proof of concept for a systematic approach to identify the most critical pattern locations, i.e. hotspots, in a reticle layout by computational lithography and combining process window characteristics of these patterns with across-wafer process variation data to predict where hotspots may become yield impacting defects [1,2]. The current paper establishes the impact of micro-topography on a 28nm metal layer, and its correlation with hotspot best focus variations across a production chip layout. Detailed topography measurements are obtained from an offline tool, and pattern-dependent best focus (BF) shifts are determined from litho simulations that include mask-3D effects. We also establish hotspot metrology and defect verification by SEM image contour extraction and contour analysis. This enables detection of catastrophic defects as well as quantitative characterization of pattern variability, i.e. local and global CD uniformity, across a wafer to establish hotspot defect and variability maps. Finally, we combine defect prediction and verification capabilities for process monitoring by on-product, guided hotspot metrology, i.e. with sampling locations being determined from the defect prediction model and achieved prediction accuracy (capture rate) around 75%

Three-dimensional Optical Coherence Tomography for Optical Biopsy of Lymph Nodes and Assessment of Metastatic Disease

PubMed Central

John, Renu; Adie, Steven G.; Chaney, Eric J.; Marjanovic, Marina; Tangella, Krishnarao V.; Boppart, Stephen A.

2013-01-01

Background Numerous techniques have been developed for localizing lymph nodes before surgical resection and for their histological assessment. Nondestructive high-resolution transcapsule optical imaging of lymph nodes offers the potential for in situ assessment of metastatic involvement, potentially during surgical procedures. Methods Three-dimensional optical coherence tomography (3-D OCT) was used for imaging and assessing resected popliteal lymph nodes from a preclinical rat metastatic tumor model over a 9-day time-course study after tumor induction. The spectral-domain OCT system utilized a center wavelength of 800 nm, provided axial and transverse resolutions of 3 and 12 µm, respectively, and performed imaging at 10,000 axial scans per second. Results OCT is capable of providing high-resolution labelfree images of intact lymph node microstructure based on intrinsic optical scattering properties with penetration depths of ~1–2 mm. The results demonstrate that OCT is capable of differentiating normal, reactive, and metastatic lymph nodes based on microstructural changes. The optical scattering and structural changes revealed by OCT from day 3 to day 9 after the injection of tumor cells into the lymphatic system correlate with inflammatory and immunological changes observed in the capsule, precortical regions, follicles, and germination centers found during histopathology. Conclusions We report for the first time a longitudinal study of 3-D transcapsule OCT imaging of intact lymph nodes demonstrating microstructural changes during metastatic infiltration. These results demonstrate the potential of OCT as a technique for intraoperative, real-time in situ 3-D optical biopsy of lymph nodes for the intraoperative staging of cancer. PMID:22688663

Ultrascalable petaflop parallel supercomputer

DOEpatents

Blumrich, Matthias A [Ridgefield, CT; Chen, Dong [Croton On Hudson, NY; Chiu, George [Cross River, NY; Cipolla, Thomas M [Katonah, NY; Coteus, Paul W [Yorktown Heights, NY; Gara, Alan G [Mount Kisco, NY; Giampapa, Mark E [Irvington, NY; Hall, Shawn [Pleasantville, NY; Haring, Rudolf A [Cortlandt Manor, NY; Heidelberger, Philip [Cortlandt Manor, NY; Kopcsay, Gerard V [Yorktown Heights, NY; Ohmacht, Martin [Yorktown Heights, NY; Salapura, Valentina [Chappaqua, NY; Sugavanam, Krishnan [Mahopac, NY; Takken, Todd [Brewster, NY

2010-07-20

A massively parallel supercomputer of petaOPS-scale includes node architectures based upon System-On-a-Chip technology, where each processing node comprises a single Application Specific Integrated Circuit (ASIC) having up to four processing elements. The ASIC nodes are interconnected by multiple independent networks that optimally maximize the throughput of packet communications between nodes with minimal latency. The multiple networks may include three high-speed networks for parallel algorithm message passing including a Torus, collective network, and a Global Asynchronous network that provides global barrier and notification functions. These multiple independent networks may be collaboratively or independently utilized according to the needs or phases of an algorithm for optimizing algorithm processing performance. The use of a DMA engine is provided to facilitate message passing among the nodes without the expenditure of processing resources at the node.

Multi-petascale highly efficient parallel supercomputer

DOE Office of Scientific and Technical Information (OSTI.GOV)

Asaad, Sameh; Bellofatto, Ralph E.; Blocksome, Michael A.

A Multi-Petascale Highly Efficient Parallel Supercomputer of 100 petaflop-scale includes node architectures based upon System-On-a-Chip technology, where each processing node comprises a single Application Specific Integrated Circuit (ASIC). The ASIC nodes are interconnected by a five dimensional torus network that optimally maximize the throughput of packet communications between nodes and minimize latency. The network implements collective network and a global asynchronous network that provides global barrier and notification functions. Integrated in the node design include a list-based prefetcher. The memory system implements transaction memory, thread level speculation, and multiversioning cache that improves soft error rate at the same time andmore » supports DMA functionality allowing for parallel processing message-passing.« less

Stopping electric field extension in a modified nanostructure based on SOI technology - A comprehensive numerical study

NASA Astrophysics Data System (ADS)

Anvarifard, Mohammad K.; Orouji, Ali A.

2017-11-01

This article has related a particular knowledge in order to reduce short channel effects (SCEs) in nano-devices based on silicon-on-insulator (SOI) MOSFETs. The device under study has been designed in 22 nm node technology with embedding Si3N4 extra oxide as a stopping layer of electric field and a useful heatsink for transferring generated heat. Two important subjects (DC characteristics and RF characteristics) have been investigated, simultaneously. Stopping electric field extension and enhancement of channel thermal conduction are introduced as an entrance gateway for this work so that improve the electrical characteristics, eventually. The inserted extra oxide made by the Si3N4 material has a vital impact on the modification of the electrical and thermal features in the proposed device. An immense comparison between the proposed SOI and conventional SOI showed that the proposed structure has higher electrical and thermal proficiency than the conventional structure in terms of main parameters such as short channel effects (SCEs), leakage current, floating body effect (FBE), self-heating effect (SHE), voltage gain, ratio of On-current to Off- current, transconductance, output conductance, minimum noise figure and power gain.

Nodes

NASA Technical Reports Server (NTRS)

Hanson, John; Martinez, Andres; Petro, Andrew

2015-01-01

Nodes is a technology demonstration mission that is scheduled for launch to the International SpaceStation no earlier than Nov.19, 2015. The two Nodes satellites will be deployed from the Station in early 2016 todemonstrate new network capabilities critical to the operation of swarms of spacecraft. They will demonstrate the ability ofmulti spacecraft swarms to receive and distribute ground commands, exchange information periodically, andautonomously configure the network by determining which spacecraft should communicate with the ground each day ofthe mission.

Assessment of Cognitive Communications Interest Areas for NASA Needs and Benefits

NASA Technical Reports Server (NTRS)

Knoblock, Eric J.; Madanayake, Arjuna

2017-01-01

This effort provides a survey and assessment of various cognitive communications interest areas, including node-to-node link optimization, intelligent routing/networking, and learning algorithms, and is conducted primarily from the perspective of NASA space communications needs and benefits. Areas of consideration include optimization methods, learning algorithms, and candidate implementations/technologies. Assessments of current research efforts are provided with mention of areas for further investment. Other considerations, such as antenna technologies and cognitive radio platforms, are briefly provided as well.

Improved routing strategy based on gravitational field theory

NASA Astrophysics Data System (ADS)

Song, Hai-Quan; Guo, Jin

2015-10-01

Routing and path selection are crucial for many communication and logistic applications. We study the interaction between nodes and packets and establish a simple model for describing the attraction of the node to the packet in transmission process by using the gravitational field theory, considering the real and potential congestion of the nodes. On the basis of this model, we propose a gravitational field routing strategy that considers the attractions of all of the nodes on the travel path to the packet. In order to illustrate the efficiency of proposed routing algorithm, we introduce the order parameter to measure the throughput of the network by the critical value of phase transition from a free flow phase to a congested phase, and study the distribution of betweenness centrality and traffic jam. Simulations show that, compared with the shortest path routing strategy, the gravitational field routing strategy considerably enhances the throughput of the network and balances the traffic load, and nearly all of the nodes are used efficiently. Project supported by the Technology and Development Research Project of China Railway Corporation (Grant No. 2012X007-D) and the Key Program of Technology and Development Research Foundation of China Railway Corporation (Grant No. 2012X003-A).

High resolution distributed time-to-digital converter (TDC) in a White Rabbit network

NASA Astrophysics Data System (ADS)

Pan, Weibin; Gong, Guanghua; Du, Qiang; Li, Hongming; Li, Jianmin

2014-02-01

The Large High Altitude Air Shower Observatory (LHAASO) project consists of a complex detector array with over 6000 detector nodes spreading over 1.2 km2 areas. The arrival times of shower particles are captured by time-to-digital converters (TDCs) in the detectors' frontend electronics, the arrival direction of the high energy cosmic ray are then to be reconstructed from the space-time information of all detector nodes. To guarantee the angular resolution of 0.5°, a time synchronization of 500 ps (RMS) accuracy and 100 ps precision must be achieved among all TDC nodes. A technology enhancing Gigabit Ethernet, called the White Rabbit (WR), has shown the capability of delivering sub-nanosecond accuracy and picoseconds precision of synchronization over the standard data packet transfer. In this paper we demonstrate a distributed TDC prototype system combining the FPGA based TDC and the WR technology. With the time synchronization and data transfer services from a compact WR node, separate FPGA-TDC nodes can be combined to provide uniform time measurement information for correlated events. The design detail and test performance will be described in the paper.

A Low-Complexity Euclidean Orthogonal LDPC Architecture for Low Power Applications

PubMed Central

Revathy, M.; Saravanan, R.

2015-01-01

Low-density parity-check (LDPC) codes have been implemented in latest digital video broadcasting, broadband wireless access (WiMax), and fourth generation of wireless standards. In this paper, we have proposed a high efficient low-density parity-check code (LDPC) decoder architecture for low power applications. This study also considers the design and analysis of check node and variable node units and Euclidean orthogonal generator in LDPC decoder architecture. The Euclidean orthogonal generator is used to reduce the error rate of the proposed LDPC architecture, which can be incorporated between check and variable node architecture. This proposed decoder design is synthesized on Xilinx 9.2i platform and simulated using Modelsim, which is targeted to 45 nm devices. Synthesis report proves that the proposed architecture greatly reduces the power consumption and hardware utilizations on comparing with different conventional architectures. PMID:26065017

Lipid nanoparticle vectorization of indocyanine green improves fluorescence imaging for tumor diagnosis and lymph node resection.

PubMed

Navarro, Fabrice P; Berger, Michel; Guillermet, Stéphanie; Josserand, Véronique; Guyon, Laurent; Neumann, Emmanuelle; Vinet, Françoise; Texier, Isabelle

2012-10-01

Fluorescence imaging is opening a new era in image-guided surgery and other medical applications. The only FDA approved contrast agent in the near infrared is IndoCyanine Green (ICG), which despites its low toxicity, displays poor chemical and optical properties for long-term and sensitive imaging applications in human. Lipid nanoparticles are investigated for improving ICG optical properties and in vivo fluorescence imaging sensitivity. 30 nm diameter lipid nanoparticles (LNP) are loaded with ICG. Their characterization and use for tumor and lymph node imaging are described. Nano-formulation benefits dye optical properties (6 times improved brightness) and chemical stability (>6 months at 4 degrees C in aqueous buffer). More importantly, LNP vectorization allows never reported sensitive and prolonged (>1 day) labeling of tumors and lymph nodes. Composed of human-use approved ingredients, this novel ICG nanometric formulation is foreseen to expand rapidly the field of clinical fluorescence imaging applications.

Demonstration of a roving-host wireless sensor network for rapid assessment monitoring of structural health

NASA Astrophysics Data System (ADS)

Mascarenas, David D. L.; Flynn, Eric; Lin, Kaisen; Farinholt, Kevin; Park, Gyuhae; Gupta, Rajesh; Todd, Michael; Farrar, Charles

2008-03-01

A major challenge impeding the deployment of wireless sensor networks for structural health monitoring (SHM) is developing means to supply power to the sensor nodes in a cost-effective manner. In this work an initial test of a roving-host wireless sensor network was performed on a bridge near Truth or Consequences, NM in August of 2007. The roving-host wireless sensor network features a radio controlled helicopter responsible for wirelessly delivering energy to sensor nodes on an "as-needed" basis. In addition, the helicopter also serves as a central data repository and processing center for the information collected by the sensor network. The sensor nodes used on the bridge were developed for measuring the peak displacement of the bridge, as well as measuring the preload of some of the bolted joints in the bridge. These sensors and sensor nodes were specifically designed to be able to operate from energy supplied wirelessly from the helicopter. The ultimate goal of this research is to ease the requirement for battery power supplies in wireless sensor networks.

Actinic inspection of EUV reticles with arbitrary pattern design

NASA Astrophysics Data System (ADS)

Mochi, Iacopo; Helfenstein, Patrick; Rajeev, Rajendran; Fernandez, Sara; Kazazis, Dimitrios; Yoshitake, Shusuke; Ekinci, Yasin

2017-10-01

The re ective-mode EUV mask scanning lensless imaging microscope (RESCAN) is being developed to provide actinic mask inspection capabilities for defects and patterns with high resolution and high throughput, for 7 nm node and beyond. Here we, will report on our progress and present the results on programmed defect detection on random, logic-like patterns. The defects we investigated range from 200 nm to 50 nm size on the mask. We demonstrated the ability of RESCAN to detect these defects in die-to-die and die-to-database mode with a high signal to noise ratio. We also describe future plans for the upgrades to increase the resolution, the sensitivity, and the inspection speed of the demo tool.

Distributed Multihoming Routing Method by Crossing Control MIPv6 with SCTP

NASA Astrophysics Data System (ADS)

Shi, Hongbo; Hamagami, Tomoki

There are various wireless communication technologies, such as 3G, WiFi, used widely in the world. Recently, not only the laptop but also the smart phones can be equipped with multiple wireless devices. The communication terminals which are implemented with multiple interfaces are usually called multi-homed nodes. Meanwhile, a multi-homed node with multiple interfaces can also be regarded as multiple single-homed nodes. For example, when a person who is using smart phone and laptop to connect to the Internet concurrently, we may regard the person as a multi-homed node in the Internet. This paper proposes a new routing method, Multi-homed Mobile Cross-layer Control to handle multi-homed mobile nodes. Our suggestion can provide a distributed end-to-end routing method for handling the communications among multi-homed nodes at the fundamental network layer.

The Node 1 (or Unity) Module for the International Space Station

NASA Technical Reports Server (NTRS)

1997-01-01

This photograph, taken by the Boeing Company, shows Node 1 (also called Unity), the first U.S. Module for the International Space Station (ISS), with its hatch door installed. The Node 1, or Unity, serves as a cornecting passageway to Space Station modules and was manufactured by the Boeing Company at the Marshall Space Flight Center from 1994 to 1997. The U.S. built Unity module was launched aboard the orbiter Endeavour (STS-88 mission) on December 4, 1998 and connected to the Zarya, the Russian-built Functional Energy Block (FGB). The Zarya was launched on a Russian proton rocket prior to the launch of the Unity. The ISS is a multidisciplinary laboratory, technology test bed, and observatory that will provide unprecedented undertakings in scientific, technological, and international experimentation.

Post-OPC verification using a full-chip pattern-based simulation verification method

NASA Astrophysics Data System (ADS)

Hung, Chi-Yuan; Wang, Ching-Heng; Ma, Cliff; Zhang, Gary

2005-11-01

In this paper, we evaluated and investigated techniques for performing fast full-chip post-OPC verification using a commercial product platform. A number of databases from several technology nodes, i.e. 0.13um, 0.11um and 90nm are used in the investigation. Although it has proven that for most cases, our OPC technology is robust in general, due to the variety of tape-outs with complicated design styles and technologies, it is difficult to develop a "complete or bullet-proof" OPC algorithm that would cover every possible layout patterns. In the evaluation, among dozens of databases, some OPC databases were found errors by Model-based post-OPC checking, which could cost significantly in manufacturing - reticle, wafer process, and more importantly the production delay. From such a full-chip OPC database verification, we have learned that optimizing OPC models and recipes on a limited set of test chip designs may not provide sufficient coverage across the range of designs to be produced in the process. And, fatal errors (such as pinch or bridge) or poor CD distribution and process-sensitive patterns may still occur. As a result, more than one reticle tape-out cycle is not uncommon to prove models and recipes that approach the center of process for a range of designs. So, we will describe a full-chip pattern-based simulation verification flow serves both OPC model and recipe development as well as post OPC verification after production release of the OPC. Lastly, we will discuss the differentiation of the new pattern-based and conventional edge-based verification tools and summarize the advantages of our new tool and methodology: 1). Accuracy: Superior inspection algorithms, down to 1nm accuracy with the new "pattern based" approach 2). High speed performance: Pattern-centric algorithms to give best full-chip inspection efficiency 3). Powerful analysis capability: Flexible error distribution, grouping, interactive viewing and hierarchical pattern extraction to narrow down to unique patterns/cells.

SEMATECH EUVL mask program status

NASA Astrophysics Data System (ADS)

Yun, Henry; Goodwin, Frank; Huh, Sungmin; Orvek, Kevin; Cha, Brian; Rastegar, Abbas; Kearney, Patrick

2009-04-01

As we approach the 22nm half-pitch (hp) technology node, the industry is rapidly running out of patterning options. Of the several lithography techniques highlighted in the International Technology Roadmap for Semiconductors (ITRS), the leading contender for the 22nm hp insertion is extreme ultraviolet lithography (EUVL). Despite recent advances with EUV resist and improvements in source power, achieving defect free EUV mask blank and enabling the EUV mask infrastructure still remain critical issues. To meet the desired EUV high volume manufacturing (HVM) insertion target date of 2013, these obstacles must be resolved on a timely bases. Many of the EUV mask related challenges remain in the pre-competitive stage and a collaborative industry based consortia, such as SEMATECH can play an important role to enable the EUVL landscape. SEMATECH based in Albany, NY is an international consortium representing several of the largest manufacturers in the semiconductor market. Full members include Intel, Samsung, AMD, IBM, Panasonic, HP, TI, UMC, CNSE (College of Nanoscience and Engineering), and Fuller Road Management. Within the SEMATECH lithography division a major thrust is centered on enabling the EUVL ecosystem from mask development, EUV resist development and addressing EUV manufacturability concerns. An important area of focus for the SEMATECH mask program has been the Mask Blank Development Center (MBDC). At the MBDC key issues in EUV blank development such as defect reduction and inspection capabilities are actively pursued together with research partners, key suppliers and member companies. In addition the mask program continues a successful track record of working with the mask community to manage and fund critical mask tools programs. This paper will highlight recent status of mask projects and longer term strategic direction at the MBDC. It is important that mask technology be ready to support pilot line development HVM by 2013. In several areas progress has been made but a continued collaborative effort will be needed along with timely infrastructure investments to meet these challenging goals.

SBDN: an information portal on small bodies and interplanetary dust inside the Europlanet Research Infrastructure

NASA Astrophysics Data System (ADS)

Turrini, Diego; de Sanctis, Maria Cristina; Carraro, Francesco; Fonte, Sergio; Giacomini, Livia; Politi, Romolo

In the framework of the Sixth Framework Programme (FP6) for Research and Technological Development of the European Community, the Europlanet project started the Integrated and Distributed Information Service (IDIS) initiative. The goal of this initiative was to "...offer to the planetary science community a common and user-friendly access to the data and infor-mation produced by the various types of research activities: earth-based observations, space observations, modelling and theory, laboratory experiments...". Four scientific nodes, repre-sentative of a significant fraction of the scientific themes covered by planetary sciences, were created: the Interiors and Surfaces node, the Atmospheres node, the Plasma node and the Small Bodies and Dust node. The original Europlanet program evolved into the Europlanet Research Infrastructure project, funded by the Seventh Framework Programme (FP7) for Research and Technological Development, and the IDIS initiative has been renewed with the addiction of a new scientific node, the Planetary Dynamics node. Here we present the Small Bodies and Dust node (SBDN) and the services it already provides to the scientific community, i.e. a searchable database of resources related to its thematic domains, an online and searchable cat-alogue of emission lines observed in the visible spectrum of comet 153P/2002 C1 Ikeya-Zhang supplemented by a visualization facility, a set of models of the simulated evolution of comet 67P/Churyumov-Gerasimenko with a particular focus on the effects of the distribution of dust and a information system on meteors through the Virtual Meteor Observatory. We will also introduce the new services that will be implemented and made available in the course of the Europlanet Research Infrastructure project.

Advanced diffraction-based overlay for double patterning

NASA Astrophysics Data System (ADS)

Li, Jie; Liu, Yongdong; Dasari, Prasad; Hu, Jiangtao; Smith, Nigel; Kritsun, Oleg; Volkman, Catherine

2010-03-01

Diffraction based overlay (DBO) technologies have been developed to address the tighter overlay control challenges as the dimensions of integrated circuit continue to shrink. Several studies published recently have demonstrated that the performance of DBO technologies has the potential to meet the overlay metrology budget for 22nm technology node. However, several hurdles must be cleared before DBO can be used in production. One of the major hurdles is that most DBO technologies require specially designed targets that consist of multiple measurement pads, which consume too much space and increase measurement time. A more advanced spectroscopic ellipsometry (SE) technology-Mueller Matrix SE (MM-SE) is developed to address the challenge. We use a double patterning sample to demonstrate the potential of MM-SE as a DBO candidate. Sample matrix (the matrix that describes the effects of the sample on the incident optical beam) obtained from MM-SE contains up to 16 elements. We show that the Mueller elements from the off-diagonal 2x2 blocks respond to overlay linearly and are zero when overlay errors are absent. This superior property enables empirical DBO (eDBO) using two pads per direction. Furthermore, the rich information in Mueller matrix and its direct response to overlay make it feasible to extract overlay errors from only one pad per direction using modeling approach (mDBO). We here present the Mueller overlay results using both eDBO and mDBO and compare the results with image-based overlay (IBO) and CD-SEM results. We also report the tool induced shifts (TIS) and dynamic repeatability.

Dual-modality imaging with 99mTc and fluorescent indocyanine green using surface-modified silica nanoparticles for biopsy of the sentinel lymph node: an animal study

PubMed Central

2013-01-01

Background We propose a new approach to facilitate sentinel node biopsy examination by multimodality imaging in which radioactive and near-infrared (NIR) fluorescent nanoparticles depict deeply situated sentinel nodes and fluorescent nodes with anatomical resolution in the surgical field. For this purpose, we developed polyamidoamine (PAMAM)-coated silica nanoparticles loaded with technetium-99m (99mTc) and indocyanine green (ICG). Methods We conducted animal studies to test the feasibility and utility of this dual-modality imaging probe. The mean diameter of the PAMAM-coated silica nanoparticles was 30 to 50 nm, as evaluated from the images of transmission electron microscopy and scanning electron microscopy. The combined labeling with 99mTc and ICG was verified by thin-layer chromatography before each experiment. A volume of 0.1 ml of the nanoparticle solution (7.4 MBq, except for one rat that was injected with 3.7 MBq, and 1 μg of an ICG derivative [ICG-sulfo-OSu]) was injected submucosally into the tongue of six male Wistar rats. Results Scintigraphic images showed increased accumulation of 99mTc in the neck of four of the six rats. Nineteen lymph nodes were identified in the dissected neck of the six rats, and a contact radiographic study showed three nodes with a marked increase in uptake and three nodes with a weak uptake. NIR fluorescence imaging provided real-time clear fluorescent images of the lymph nodes in the neck with anatomical resolution. Six lymph nodes showed weak (+) to strong (+++) fluorescence, whereas other lymph nodes showed no fluorescence. Nodes showing increased radioactivity coincided with the fluorescent nodes. The radioactivity of 15 excised lymph nodes from the four rats was assayed using a gamma well counter. Comparisons of the levels of radioactivity revealed a large difference between the high-fluorescence-intensity group (four lymph nodes; mean, 0.109% ± 0.067%) and the low- or no-fluorescence-intensity group (11 lymph nodes; mean, 0.001% ± 0.000%, p < 0.05). Transmission electron microscopy revealed that small black granules were localized to and dispersed within the cytoplasm of macrophages in the lymph nodes. Conclusion Although further studies are needed to determine the appropriate dose of the dual-imaging nanoparticle probe for effective sensitivity and safety, the results of this animal study revealed a novel method for improved node detection by a dual-modality approach for sentinel lymph node biopsy. PMID:23618132

Addressing FinFET metrology challenges in 1X node using tilt-beam CD-SEM

NASA Astrophysics Data System (ADS)

Zhang, Xiaoxiao; Zhou, Hua; Ge, Zhenhua; Vaid, Alok; Konduparthi, Deepasree; Osorio, Carmen; Ventola, Stefano; Meir, Roi; Shoval, Ori; Kris, Roman; Adan, Ofer; Bar-Zvi, Maayan

2014-04-01

At 1X node, 3D FinFETS raise a number of new metrology challenges. Gate height and fin height are two of the most important parameters for process control. At present there is a metrology gap in inline in-die measurement of these parameters. In order to fill this metrology gap, in-column beam tilt has been developed and implemented on Applied Materials V4i+ top-down CD-SEM for height measurement. A low tilt (5°) beam and a high tilt (14°) beam have been calibrated to obtain two sets of images providing measurement of sidewall edge width to calculate height in the host. Evaluations are done with applications in both gate height and fin height. TEM correlation with R2 being 0.89 and precision of 0.81nm have been achieved on various in-die features in gate height application. Fin height measurement shows less accuracy (R2 being 0.77) and precision (1.49 nm) due to challenges brought by fin geometry, yet still promising as first attempt. Sensitivity to DOE offset, die-to-die and in-die variation is demonstrated in both gate height and fin height. Process defect is successfully captured from inline wafers with gate height measurement implemented in production. This is the first successful demonstration of inline in-die gate height measurement for 14nm FinFET process control.

Advanced coatings for next generation lithography

NASA Astrophysics Data System (ADS)

Naujok, P.; Yulin, S.; Kaiser, N.; Tünnermann, A.

2015-03-01

Beyond EUV lithography at 6.X nm wavelength has a potential to extend EUVL beyond the 11 nm node. To implement B-based mirrors and to enable their industrial application in lithography tools, a reflectivity level of > 70% has to be reached in near future. The authors will prove that transition from conventional La/B4C to promising LaN/B4C multilayer coatings leads to enhanced optical properties. Currently a near normal-incidence reflectivity of 58.1% @ 6.65 nm is achieved by LaN/B4C multilayer mirrors. The introduction of ultrathin diffusion barriers into the multilayer design to reach the targeted reflectivity of 70% was also tested. The optimization of multilayer design and deposition process for interface-engineered La/C/B4C multilayer mirrors resulted in peak reflectivity of 56.8% at the wavelength of 6.66 nm. In addition, the thermal stability of several selected multilayers was investigated and will be discussed.

IJA: an efficient algorithm for query processing in sensor networks.

PubMed

Lee, Hyun Chang; Lee, Young Jae; Lim, Ji Hyang; Kim, Dong Hwa

2011-01-01

One of main features in sensor networks is the function that processes real time state information after gathering needed data from many domains. The component technologies consisting of each node called a sensor node that are including physical sensors, processors, actuators and power have advanced significantly over the last decade. Thanks to the advanced technology, over time sensor networks have been adopted in an all-round industry sensing physical phenomenon. However, sensor nodes in sensor networks are considerably constrained because with their energy and memory resources they have a very limited ability to process any information compared to conventional computer systems. Thus query processing over the nodes should be constrained because of their limitations. Due to the problems, the join operations in sensor networks are typically processed in a distributed manner over a set of nodes and have been studied. By way of example while simple queries, such as select and aggregate queries, in sensor networks have been addressed in the literature, the processing of join queries in sensor networks remains to be investigated. Therefore, in this paper, we propose and describe an Incremental Join Algorithm (IJA) in Sensor Networks to reduce the overhead caused by moving a join pair to the final join node or to minimize the communication cost that is the main consumer of the battery when processing the distributed queries in sensor networks environments. At the same time, the simulation result shows that the proposed IJA algorithm significantly reduces the number of bytes to be moved to join nodes compared to the popular synopsis join algorithm.

IJA: An Efficient Algorithm for Query Processing in Sensor Networks

PubMed Central

Lee, Hyun Chang; Lee, Young Jae; Lim, Ji Hyang; Kim, Dong Hwa

2011-01-01

One of main features in sensor networks is the function that processes real time state information after gathering needed data from many domains. The component technologies consisting of each node called a sensor node that are including physical sensors, processors, actuators and power have advanced significantly over the last decade. Thanks to the advanced technology, over time sensor networks have been adopted in an all-round industry sensing physical phenomenon. However, sensor nodes in sensor networks are considerably constrained because with their energy and memory resources they have a very limited ability to process any information compared to conventional computer systems. Thus query processing over the nodes should be constrained because of their limitations. Due to the problems, the join operations in sensor networks are typically processed in a distributed manner over a set of nodes and have been studied. By way of example while simple queries, such as select and aggregate queries, in sensor networks have been addressed in the literature, the processing of join queries in sensor networks remains to be investigated. Therefore, in this paper, we propose and describe an Incremental Join Algorithm (IJA) in Sensor Networks to reduce the overhead caused by moving a join pair to the final join node or to minimize the communication cost that is the main consumer of the battery when processing the distributed queries in sensor networks environments. At the same time, the simulation result shows that the proposed IJA algorithm significantly reduces the number of bytes to be moved to join nodes compared to the popular synopsis join algorithm. PMID:22319375

A Scalable Software Architecture Booting and Configuring Nodes in the Whitney Commodity Computing Testbed

NASA Technical Reports Server (NTRS)

Fineberg, Samuel A.; Kutler, Paul (Technical Monitor)

1997-01-01

The Whitney project is integrating commodity off-the-shelf PC hardware and software technology to build a parallel supercomputer with hundreds to thousands of nodes. To build such a system, one must have a scalable software model, and the installation and maintenance of the system software must be completely automated. We describe the design of an architecture for booting, installing, and configuring nodes in such a system with particular consideration given to scalability and ease of maintenance. This system has been implemented on a 40-node prototype of Whitney and is to be used on the 500 processor Whitney system to be built in 1998.

Size-dependent tissue kinetics of PEG-coated gold nanoparticles

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cho, Wan-Seob; Department of Toxicological Research, National Institute of Food and Drug Safety Evaluation, Korea Food and Drug Administration, Seoul 122-704; Cho, Minjung

2010-05-15

Gold nanoparticles (AuNPs) can be used in various biomedical applications, however, very little is known about their size-dependent in vivo kinetics. Here, we performed a kinetic study in mice with different sizes of PEG-coated AuNPs. Small AuNPs (4 or 13 nm) showed high levels in blood for 24 h and were cleared by 7 days, whereas large (100 nm) AuNPs were completely cleared by 24 h. All AuNPs in blood re-increased at 3 months, which correlated with organ levels. Levels of small AuNPs were peaked at 7 days in the liver and spleen and at 1 month in the mesentericmore » lymph node, and remained high until 6 months, with slow elimination. In contrast, large AuNPs were taken up rapidly (approx 30 min) into the liver, spleen, and mesenteric lymph nodes with less elimination phase. TEM showed that AuNPs were entrapped in cytoplasmic vesicles and lysosomes of Kupffer cells and macrophages of spleen and mesenteric lymph node. Small AuNPs transiently activated CYP1A1 and 2B, phase I metabolic enzymes, in liver tissues from 24 h to 7 days, which mirrored with elevated gold levels in the liver. Large AuNPs did not affect the metabolic enzymes. Thus, propensity to accumulate in the reticuloendothelial organs and activation of phase I metabolic enzymes, suggest that extensive further studies are needed for practical in vivo applications.« less

Depreciation of bearing blocks of rollers of roller conveyers of rolling mills

NASA Astrophysics Data System (ADS)

Artiukh, Viktor; Belyaev, Michael; Ignatovich, Igor; Miloradova, Nadezda

2017-10-01

Essential increase in functional durability of a node of a roller of the roller conveyer of the rolling mill by the rational choice of parameters of the small-size shock-absorber (buffer adapter) is shown. At the same time dimensions of a node don’t change, costs of reconstruction are small. The possibility of management of loadings in a bearing node without change of technology parameters of the process which is carried out by the rolling mill is confirmed.

Generation of distributed W-states over long distances

NASA Astrophysics Data System (ADS)

Li, Yi

2017-08-01

Ultra-secure quantum communication between distant locations requires distributed entangled states between nodes. Various methodologies have been proposed to tackle this technological challenge, of which the so-called DLCZ protocol is the most promising and widely adopted scheme. This paper aims to extend this well-known protocol to a multi-node setting where the entangled W-state is generated between nodes over long distances. The generation of multipartite W-states is the foundation of quantum networks, paving the way for quantum communication and distributed quantum computation.

Experimental study of {sup 99m}Tc-aluminum oxide use for sentinel lymph nodes detection

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chernov, V. I., E-mail: Chernov@oncology.tomsk.ru; Sinilkin, I. G.; Zelchan, R. V.

The purpose of the study was a comparative research in the possibility of using the radiopharmaceuticals {sup 99m}Tc-Al{sub 2}O{sub 3} and {sup 99m}Tc-Nanocis for visualizing sentinel lymph nodes. The measurement of the sizes of {sup 99m}Tc-Al{sub 2}O{sub 3} and {sup 99m}Tc-Nanocis colloidal particles was performed in seven series of radiopharmaceuticals. The pharmacokinetics of {sup 99m}Tc-Al{sub 2}O{sub 3} and {sup 99m}Tc-Nanocis was researched on 50 white male rats. The possibility of the use of {sup 99m}Tc-Al{sub 2}O{sub 3} and {sup 99m}Tc-Nanocis for lymphoscintigraphy was studied in the experiments on 12 white male rats. The average dynamic diameter of the sol particlemore » was 52–77 nm for {sup 99m}Tc-Al{sub 2}O{sub 3} and 16.7–24.5 nm for {sup 99m}Tc-Nanocis. Radiopharmaceuticals accumulated in the inguinal lymph node in 1 hour after administration; the average uptake of {sup 99}mTc-Al{sub 2}O{sub 3} was 8.6% in it, and the accumulation of {sup 99m}Tc-Nanocis was significantly lower—1.8% (p < 0.05). In all study points the average uptake of {sup 99m}Tc-Al{sub 2}O{sub 3} in the lymph node was significantly higher than {sup 99m}Tc-Nanocis accumulation. The results of dynamic scintigraphic studies in rats showed that {sup 99m}Tc-Al{sub 2}O{sub 3} and {sup 99m}Tc-Nanocis actively accumulated into the lymphatic system. By using {sup 99m}Tc-Al{sub 2}O{sub 3} inguinal lymph node was determined in 5 minutes after injection and clearly visualized in all the animals in the 15th minute, when the accumulation became more than 1% of the administered dose. Further observation indicated that the {sup 99m}Tc-Al{sub 2}O{sub 3} accumulation reached a plateau in a lymph node (average 10.5%) during 2-hour study and then its accumulation remained practically at the same level, slightly increasing to 12% in 24 hours. In case of {sup 99m}Tc-Nanocis inguinal lymph node was visualized in all animals for 15 min when it was accumulated on the average 1.03% of the administered dose. Plateau of {sup 99m}Tc-Nanocis accumulation in the lymph node (average 2.05%) occurred after 2 hours of the study and remained almost on the same level (in average 2.3%) for 24 hours. Thus, the experimental study of a new domestic radiopharmaceutical showed that the {sup 99m}Tc-Al{sub 2}O{sub 3} accumulates actively in the lymph nodes several times as compared to the imported analogue and its practical application will facilitate intraoperative identification of sentinel lymph nodes.« less

UHF front-end feeding RFID-based body sensor networks by exploiting the reader signal

NASA Astrophysics Data System (ADS)

Pasca, M.; Colella, R.; Catarinucci, L.; Tarricone, L.; D'Amico, S.; Baschirotto, A.

2016-05-01

This paper presents an integrated, high-sensitivity UHF radio frequency identification (RFID) power management circuit for body sensor network applications. The circuit consists of a two-stage RF-DC Dickson's rectifier followed by an integrated five-stage DC-DC Pelliconi's charge pump driven by an ultralow start-up voltage LC oscillator. The DC-DC charge pump interposed between the RF-DC rectifier and the output load provides the RF to load isolation avoiding losses due to the diodes reverse saturation current. The RF-DC rectifier has been realized on FR4 substrate, while the charge pump and the oscillator have been realized in 180 nm complementary metal oxide semiconductor (CMOS) technology. Outdoor measurements demonstrate the ability of the power management circuit to provide 400 mV output voltage at 14 m distance from the UHF reader, in correspondence of -25 dBm input signal power. As demonstrated in the literature, such output voltage level is suitable to supply body sensor network nodes.

Effect Of Impurity On Cu Electromigration

NASA Astrophysics Data System (ADS)

Hu, C.-K.; Angyal, M.; Baker, B. C.; Bonilla, G.; Cabral, C.; Canaperi, D. F.; Choi, S.; Clevenger, L.; Edelstein, D.; Gignac, L.; Huang, E.; Kelly, J.; Kim, B. Y.; Kyei-Fordjour, V.; Manikonda, S. L.; Maniscalco, J.; Mittal, S.; Nogami, T.; Parks, C.; Rosenberg, R.; Simon, A.; Xu, Y.; Vo, T. A.; Witt, C.

2010-11-01

The impact of the existence of Cu grain boundaries on the degradation of Cu interconnect lifetime at the 45 nm technology node and beyond has suggested that improved electromigra-tion in Cu grain boundaries has become increasingly important. In this paper, solute effects of non-metallic (C, Cl, O and S) and metallic (Al, Co, In, Mg, Sn, and Ti) impurities on Cu elec-tromigration were investigated. The Cu alloy interconnects were fabricated by adjusting Cu electroplating solutions or by depositing a Cu alloy seed, a thin film layer of impurity, an alloy liner, or a metal cap. A large variation of Cu grain structure in the samples was achieved by adjusting the wafer fabrication process steps. The non-metallic impurities were found to be less than 0.1% in the electroplated Cu with no effect on Cu electromigration lifetimes. Most of the metallic impurities reduced Cu interface and grain boundary mass flows and enhanced Cu lifetime, but Al, Co, and Mg impurities did not mitigate Cu grain boundary diffusion.

The Node 1 (or Unity) Module for the International Space Station

NASA Technical Reports Server (NTRS)

1997-01-01

This photograph, taken by the Boeing Company,shows Boeing technicians preparing to install one of six hatches or doors to the Node 1 (also called Unity), the first U.S. Module for the International Space Station (ISS). The Node 1, or Unity, serves as a cornecting passageway to Space Station modules and was manufactured by the Boeing Company at the Marshall Space Flight Center from 1994 to 1997. The U.S. built Unity module was launched aboard the orbiter Endeavour (STS-88 mission) on December 4, 1998 and connected to the Zarya, the Russian-built Functional Energy Block (FGB). The Zarya was launched on a Russian proton rocket prior to the launch of the Unity. The ISS is a multidisciplinary laboratory, technology test bed, and observatory that will provide unprecedented undertakings in scientific, technological, and international experimentation.

The Node 1 (or Unity) Module for the International Space Station

NASA Technical Reports Server (NTRS)

1997-01-01

This photograph, taken by the Boeing Company, shows Boeing technicians preparing to install one of six hatches or doors to the Node 1 (also called Unity), the first U.S. Module for the International Space Station (ISS). The Node 1, or Unity, serves as a cornecting passageway to Space Station modules and was manufactured by the Boeing Company at the Marshall Space Flight Center from 1994 to 1997. The U.S. built Unity module was launched aboard the orbiter Endeavour (STS-88 mission) on December 4, 1998 and connected to the Zarya, the Russian-built Functional Energy Block (FGB). The Zarya was launched on a Russian proton rocket prior to the launch of the Unity. The ISS is a multidisciplinary laboratory, technology test bed, and observatory that will provide unprecedented undertakings in scientific, technological, and international experimentation.

Smart-Home Architecture Based on Bluetooth mesh Technology

NASA Astrophysics Data System (ADS)

Wan, Qing; Liu, Jianghua

2018-03-01

This paper describes the smart home network system based on Nordic nrf52832 device. Nrf52832 is new generation RF SOC device focus on sensor monitor and low power Bluetooth connection applications. In this smart home system, we set up a self-organizing network system which consists of one control node and a lot of monitor nodes. The control node manages the whole network works; the monitor nodes collect the sensor information such as light intensity, temperature, humidity, PM2.5, etc. Then update to the control node by Bluetooth mesh network. The design results show that the Bluetooth mesh wireless network system is flexible and construction cost is low, which is suitable for the communication characteristics of a smart home network. We believe it will be wildly used in the future.

Status in the development of self-powered wireless sensor node for structural health monitoring and prognosis

NASA Astrophysics Data System (ADS)

Godinez-Azcuaga, Valery F.; Farmer, Justin; Ziehl, Paul H.; Giurgiutiu, Victor; Nanni, Antonio; Inman, Daniel J.

2012-04-01

This paper discusses the development status of a self-powered wireless sensor node for steel and concrete bridges monitoring and prognosis. By the end of the third year in this four-year cross-disciplinary project, the 4-channel acoustic emission wireless node, developed by Mistras Group Inc, has already been deployed in concrete structures by the University of Miami. Also, extensive testing is underway with the node powered by structural vibration and wind energy harvesting modules developed by Virginia Tech. The development of diagnosis tools and models for bridge prognosis, which will be discussed in the paper, continues and the diagnosis tools are expected to be programmed in the node's AVR during the 4th year of the project. The impact of this development extends beyond the area of bridge health monitoring into several fields, such as offshore oil platforms, composite components on military ships and race boats, combat deployable bridges and wind turbine blades. Some of these applications will also be discussed. This project was awarded to a joint venture formed by Mistras Group Inc, Virginia Tech, University of South Carolina and University of Miami by the National Institute of Standards and Technology through its Technology Innovation Program Grant #70NANB9H007.

The Deep Impact Network Experiment Operations Center Monitor and Control System

NASA Technical Reports Server (NTRS)

Wang, Shin-Ywan (Cindy); Torgerson, J. Leigh; Schoolcraft, Joshua; Brenman, Yan

2009-01-01

The Interplanetary Overlay Network (ION) software at JPL is an implementation of Delay/Disruption Tolerant Networking (DTN) which has been proposed as an interplanetary protocol to support space communication. The JPL Deep Impact Network (DINET) is a technology development experiment intended to increase the technical readiness of the JPL implemented ION suite. The DINET Experiment Operations Center (EOC) developed by JPL's Protocol Technology Lab (PTL) was critical in accomplishing the experiment. EOC, containing all end nodes of simulated spaces and one administrative node, exercised publish and subscribe functions for payload data among all end nodes to verify the effectiveness of data exchange over ION protocol stacks. A Monitor and Control System was created and installed on the administrative node as a multi-tiered internet-based Web application to support the Deep Impact Network Experiment by allowing monitoring and analysis of the data delivery and statistics from ION. This Monitor and Control System includes the capability of receiving protocol status messages, classifying and storing status messages into a database from the ION simulation network, and providing web interfaces for viewing the live results in addition to interactive database queries.

The novel solution for negative impact of out-of-band and outgassing by top coat materials in EUVL

NASA Astrophysics Data System (ADS)

Fujitani, Noriaki; Sakamoto, Rikimaru; Endo, Takafumi; Onishi, Ryuji; Nishita, Tokio; Yaguchi, Hiroaki; Ho, Bang-Ching

2013-03-01

EUV lithography (EUVL) is the most promising candidate of next generation technology for hp20nm node device manufacturing and beyond. However, the power of light source, masks and photo resists are the most critical issues for driving the EUVL. Especially, concerning about deterioration of the patterning performance by Out-of-Band (OoB) light existing in the EUV light, and contamination problem of exposure tool due to the resist outgassing are the key issues which have to be resolved in the material view point toward the high volume manufacturing by EUVL. This paper proposes the solution for these critical issues by applying the top coat material. The key characteristics for top coat material are the protection of the OoB effect, the prevention of the outgassing from resist as a barrier layer and enhancement of photo resist performance, like resist profile and process window. This paper describes the material design and performance. The optical property needs having the high absorbance of DUV light in OoB range and high transmittance for 13.5nm wavelength. Outgassing barrier property needs high broking property against non contamination chemical species from photo resist outgassing. The study of TOF-SIMS analysis indicates how much the polymer chemistry can impact for outgassing barrier property. The dependency of material design and lithography performance is also discussed.

Strain effects in low-dimensional silicon MOS and AlGaN/GaN HEMT devices

NASA Astrophysics Data System (ADS)

Baykan, Mehmet Onur

Strained silicon technology is a well established method to enhance sub-100nm MOSFET performance. With the scalability of process-induced strain, strained silicon channels have been used in every advanced CMOS technology since the 90nm node. At the 22nm node, due to the detrimental short channel effects, non-planar silicon CMOS has emerged as a viable solution to sustain transistor scaling without compromising the device performance. Therefore, it is necessary to conduct a physics based investigation of the effects of mechanical strain in silicon MOS device performance enhancement, as the transverse and longitudinal device dimensions scale down for future technology nodes. While silicon is widely used as the material basis for logic transistors, AlGaN/GaN HEMTs promise a superior device platform over silicon based power MOSFETs for high-frequency and high-power applications. In contrast to the mature Si crystal growth technology, the abundance of defects in the GaN material system creates obstacles for the realization of a reliable AlGaN/GaN HEMT device technology. Due to the high levels of internal mechanical strain present in AlGaN/GaN HEMTs, it is of utmost importance to understand the impact of mechanical stress on AlGaN/GaN trap generation. First, we have investigated the underlying physics of the comparable electron mobility observed in (100) and (110) sidewall silicon double-gate FinFETs, which is different from the observed planar (100) and (110) electron mobility. By conducting a systematic experimental study, it is shown that the undoped body, metal gate induced stress, and volume-inversion effects do not explain the comparable electron mobility. Using a self-consistent double-gate FinFET simulator, we have showed that for (110) FinFETs, an increased population of electrons is obtained for the Delta2 valley due to the heavy nonparabolic confinement mass, leading to a comparable average electron transport effective mass for both orientations. The width dependent strain response of tri-gate p-type FinFETs are experimentally extracted using a 4-point bending jig. It is found that the low-field piezoresistance coefficient of p-type FinFETs can be modeled by using a weighted conductance average of the top and sidewall bulk piezoresistance coefficients. Next, the strain enhancement of p-type ballistic silicon nanowire MOSFETs is studied using sp3d 5s* basis nearest-neighbor tight-binding simulations coupled with a semiclassical top-of-the-barrier transport model. Size and orientation dependent strain enhancement of ballistic hole transport is explained by the strain-induced modification of the 1D nanowire valence band density-of-states. Further insights are provided for future p-type high-performance silicon nanowire logic devices. A physics based investigation is conducted to understand the strain effects on surface roughness limited electron mobility in silicon inversion layers. Based on the evidence from electrical and material characterization, a strain-induced surface morphology change is hypothesized. To model the observed electrical characteristics, we have employed a self-consistent MOSFET mobility simulator coupled with an ad hoc strain-induced roughness modification. The strain induced surface morphology change is found to be consistent among electrical and materials characterization, as well as transport simulations. In order to bridge the gap between the drift-diffusion based models for long-channel devices and the quasi-ballistic models for nanoscale channels, a unified carrier transport model is developed using an updated one-flux theory. Including the high-field and carrier confinement effects, a surface-potential based analytical transmission expression is obtained for the entire MOSFET operation range. With the new channel transmission equation and average carrier drift velocity, a new expression for channel ballisticity is defined. Impact of mechanical strain on carrier transport for both nMOSFETs and pMOSFETs in both linear and saturation regimes is explained using the new channel transmission definitions. To understand the impact of mechanical strain on AlGaN/GaN HEMT trap generation, we have devised an experimental method to obtain the photon flux-normalized relative areal trap density distribution using photoionization spectroscopy technique. The details of the trap extraction method and the experimental setup are given. Using this setup, the trap characteristics are extracted for both ungated transmission line module (TLM) and gated HEMT devices from both Si and SiC substrates. The changes in the device trap characteristics are emphasized before and after electrical stressing. It is found through the step-voltage stressing of the AlGaN/GaN HEMT gate stack that the device degradation is due to the near bandgap trap generation, which are shown to be related to the structural defects in GaN.

Intelligent Software Agents: Sensor Integration and Response

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kulesz, James J; Lee, Ronald W

2013-01-01

Abstract In a post Macondo world the buzzwords are Integrity Management and Incident Response Management. The twin processes are not new but the opportunity to link the two is novel. Intelligent software agents can be used with sensor networks in distributed and centralized computing systems to enhance real-time monitoring of system integrity as well as manage the follow-on incident response to changing, and potentially hazardous, environmental conditions. The software components are embedded at the sensor network nodes in surveillance systems used for monitoring unusual events. When an event occurs, the software agents establish a new concept of operation at themore » sensing node, post the event status to a blackboard for software agents at other nodes to see , and then react quickly and efficiently to monitor the scale of the event. The technology addresses a current challenge in sensor networks that prevents a rapid and efficient response when a sensor measurement indicates that an event has occurred. By using intelligent software agents - which can be stationary or mobile, interact socially, and adapt to changing situations - the technology offers features that are particularly important when systems need to adapt to active circumstances. For example, when a release is detected, the local software agent collaborates with other agents at the node to exercise the appropriate operation, such as: targeted detection, increased detection frequency, decreased detection frequency for other non-alarming sensors, and determination of environmental conditions so that adjacent nodes can be informed that an event is occurring and when it will arrive. The software agents at the nodes can also post the data in a targeted manner, so that agents at other nodes and the command center can exercise appropriate operations to recalibrate the overall sensor network and associated intelligence systems. The paper describes the concepts and provides examples of real-world implementations including the Threat Detection and Analysis System (TDAS) at the International Port of Memphis and the Biological Warning and Incident Characterization System (BWIC) Environmental Monitoring (EM) Component. Technologies developed for these 24/7 operational systems have applications for improved real-time system integrity awareness as well as provide incident response (as needed) for production and field applications.« less

Compact 2D OPC modeling of a metal oxide EUV resist for a 7nm node BEOL layer

NASA Astrophysics Data System (ADS)

Lyons, Adam; Rio, David; Lee, Sook; Wallow, Thomas; Delorme, Maxence; Fumar-Pici, Anita; Kocsis, Michael; de Schepper, Peter; Greer, Michael; Stowers, Jason K.; Gillijns, Werner; De Simone, Danilo; Bekaert, Joost

2017-03-01

Inpria has developed a directly patternable metal oxide hard-mask as a high-resolution photoresist for EUV lithography1. In this contribution, we describe a Tachyon 2D OPC full-chip model for an Inpria resist as applied to an N7 BEOL block mask application.

Geospatial-temporal semantic graph representations of trajectories from remote sensing and geolocation data

DOEpatents

Perkins, David Nikolaus; Brost, Randolph; Ray, Lawrence P.

2017-08-08

Various technologies for facilitating analysis of large remote sensing and geolocation datasets to identify features of interest are described herein. A search query can be submitted to a computing system that executes searches over a geospatial temporal semantic (GTS) graph to identify features of interest. The GTS graph comprises nodes corresponding to objects described in the remote sensing and geolocation datasets, and edges that indicate geospatial or temporal relationships between pairs of nodes in the nodes. Trajectory information is encoded in the GTS graph by the inclusion of movable nodes to facilitate searches for features of interest in the datasets relative to moving objects such as vehicles.

The use of artificial intelligence technology to predict lymph node spread in men with clinically localized prostate carcinoma.

PubMed

Crawford, E D; Batuello, J T; Snow, P; Gamito, E J; McLeod, D G; Partin, A W; Stone, N; Montie, J; Stock, R; Lynch, J; Brandt, J

2000-05-01

The current study assesses artificial intelligence methods to identify prostate carcinoma patients at low risk for lymph node spread. If patients can be assigned accurately to a low risk group, unnecessary lymph node dissections can be avoided, thereby reducing morbidity and costs. A rule-derivation technology for simple decision-tree analysis was trained and validated using patient data from a large database (4,133 patients) to derive low risk cutoff values for Gleason sum and prostate specific antigen (PSA) level. An empiric analysis was used to derive a low risk cutoff value for clinical TNM stage. These cutoff values then were applied to 2 additional, smaller databases (227 and 330 patients, respectively) from separate institutions. The decision-tree protocol derived cutoff values of < or = 6 for Gleason sum and < or = 10.6 ng/mL for PSA. The empiric analysis yielded a clinical TNM stage low risk cutoff value of < or = T2a. When these cutoff values were applied to the larger database, 44% of patients were classified as being at low risk for lymph node metastases (0.8% false-negative rate). When the same cutoff values were applied to the smaller databases, between 11 and 43% of patients were classified as low risk with a false-negative rate of between 0.0 and 0.7%. The results of the current study indicate that a population of prostate carcinoma patients at low risk for lymph node metastases can be identified accurately using a simple decision algorithm that considers preoperative PSA, Gleason sum, and clinical TNM stage. The risk of lymph node metastases in these patients is < or = 1%; therefore, pelvic lymph node dissection may be avoided safely. The implications of these findings in surgical and nonsurgical treatment are significant.

Effects of network node consolidation in optical access and aggregation networks on costs and power consumption

NASA Astrophysics Data System (ADS)

Lange, Christoph; Hülsermann, Ralf; Kosiankowski, Dirk; Geilhardt, Frank; Gladisch, Andreas

2010-01-01

The increasing demand for higher bit rates in access networks requires fiber deployment closer to the subscriber resulting in fiber-to-the-home (FTTH) access networks. Besides higher access bit rates optical access network infrastructure and related technologies enable the network operator to establish larger service areas resulting in a simplified network structure with a lower number of network nodes. By changing the network structure network operators want to benefit from a changed network cost structure by decreasing in short and mid term the upfront investments for network equipment due to concentration effects as well as by reducing the energy costs due to a higher energy efficiency of large network sites housing a high amount of network equipment. In long term also savings in operational expenditures (OpEx) due to the closing of central office (CO) sites are expected. In this paper different architectures for optical access networks basing on state-of-the-art technology are analyzed with respect to network installation costs and power consumption in the context of access node consolidation. Network planning and dimensioning results are calculated for a realistic network scenario of Germany. All node consolidation scenarios are compared against a gigabit capable passive optical network (GPON) based FTTH access network operated from the conventional CO sites. The results show that a moderate reduction of the number of access nodes may be beneficial since in that case the capital expenditures (CapEx) do not rise extraordinarily and savings in OpEx related to the access nodes are expected. The total power consumption does not change significantly with decreasing number of access nodes but clustering effects enable a more energyefficient network operation and optimized power purchase order quantities leading to benefits in energy costs.

Classification and printability of EUV mask defects from SEM images

NASA Astrophysics Data System (ADS)

Cho, Wonil; Price, Daniel; Morgan, Paul A.; Rost, Daniel; Satake, Masaki; Tolani, Vikram L.

2017-10-01

Classification and Printability of EUV Mask Defects from SEM images EUV lithography is starting to show more promise for patterning some critical layers at 5nm technology node and beyond. However, there still are many key technical obstacles to overcome before bringing EUV Lithography into high volume manufacturing (HVM). One of the greatest obstacles is manufacturing defect-free masks. For pattern defect inspections in the mask-shop, cutting-edge 193nm optical inspection tools have been used so far due to lacking any e-beam mask inspection (EBMI) or EUV actinic pattern inspection (API) tools. The main issue with current 193nm inspection tools is the limited resolution for mask dimensions targeted for EUV patterning. The theoretical resolution limit for 193nm mask inspection tools is about 60nm HP on masks, which means that main feature sizes on EUV masks will be well beyond the practical resolution of 193nm inspection tools. Nevertheless, 193nm inspection tools with various illumination conditions that maximize defect sensitivity and/or main-pattern modulation are being explored for initial EUV defect detection. Due to the generally low signal-to-noise in the 193nm inspection imaging at EUV patterning dimensions, these inspections often result in hundreds and thousands of defects which then need to be accurately reviewed and dispositioned. Manually reviewing each defect is difficult due to poor resolution. In addition, the lack of a reliable aerial dispositioning system makes it very challenging to disposition for printability. In this paper, we present the use of SEM images of EUV masks for higher resolution review and disposition of defects. In this approach, most of the defects detected by the 193nm inspection tools are first imaged on a mask SEM tool. These images together with the corresponding post-OPC design clips are provided to KLA-Tencor's Reticle Decision Center (RDC) platform which provides ADC (Automated Defect Classification) and S2A (SEM-to-Aerial printability) analysis of every defect. First, a defect-free or reference mask SEM is rendered from the post-OPC design, and the defective signature is detected from the defect-reference difference image. These signatures help assess the true nature of the defect as evident in e-beam imaging; for example, excess or missing absorber, line-edge roughness, contamination, etc. Next, defect and reference contours are extracted from the grayscale SEM images and fed into the simulation engine with an EUV scanner model to generate corresponding EUV defect and reference aerial images. These are then analyzed for printability and dispositioned using an Aerial Image Analyzer (AIA) application to automatically measure and determine the amount of CD errors. Thus by integrating EUV ADC and S2A applications together, every defect detection is characterized for its type and printability which is essential for not only determining which defects to repair, but also in monitoring the performance of EUV mask process tools. The accuracy of the S2A print modeling has been verified with other commercially-available simulators, and will also be verified with actual wafer print results. With EUV lithography progressing towards volume manufacturing at 5nm technology, and the likelihood of EBMI inspectors approaching the horizon, the EUV ADC-S2A system will continue serving an essential role of dispositioning defects off e-beam imaging.

Alternative method for variable aspect ratio vias using a vortex mask

NASA Astrophysics Data System (ADS)

Schepis, Anthony R.; Levinson, Zac; Burbine, Andrew; Smith, Bruce W.

2014-03-01

Historically IC (integrated circuit) device scaling has bridged the gap between technology nodes. Device size reduction is enabled by increased pattern density, enhancing functionality and effectively reducing cost per chip. Exemplifying this trend are aggressive reductions in memory cell sizes that have resulted in systems with diminishing area between bit/word lines. This affords an even greater challenge in the patterning of contact level features that are inherently difficult to resolve because of their relatively small area and complex aerial image. To accommodate these trends, semiconductor device design has shifted toward the implementation of elliptical contact features. This empowers designers to maximize the use of free device space, preserving contact area and effectively reducing the via dimension just along a single axis. It is therefore critical to provide methods that enhance the resolving capacity of varying aspect ratio vias for implementation in electronic design systems. Vortex masks, characterized by their helically induced propagation of light and consequent dark core, afford great potential for the patterning of such features when coupled with a high resolution negative tone resist system. This study investigates the integration of a vortex mask in a 193nm immersion (193i) lithography system and qualifies its ability to augment aspect ratio through feature density using aerial image vector simulation. It was found that vortex fabricated vias provide a distinct resolution advantage over traditionally patterned contact features employing a 6% attenuated phase shift mask (APM). 1:1 features were resolvable at 110nm pitch with a 38nm critical dimension (CD) and 110nm depth of focus (DOF) at 10% exposure latitude (EL). Furthermore, iterative source-mask optimization was executed as means to augment aspect ratio. By employing mask asymmetries and directionally biased sources aspect ratios ranging between 1:1 and 2:1 were achievable, however, this range is ultimately dictated by pitch employed.

Simulation based mask defect repair verification and disposition

NASA Astrophysics Data System (ADS)

Guo, Eric; Zhao, Shirley; Zhang, Skin; Qian, Sandy; Cheng, Guojie; Vikram, Abhishek; Li, Ling; Chen, Ye; Hsiang, Chingyun; Zhang, Gary; Su, Bo

2009-10-01

As the industry moves towards sub-65nm technology nodes, the mask inspection, with increased sensitivity and shrinking critical defect size, catches more and more nuisance and false defects. Increased defect counts pose great challenges in the post inspection defect classification and disposition: which defect is real defect, and among the real defects, which defect should be repaired and how to verify the post-repair defects. In this paper, we address the challenges in mask defect verification and disposition, in particular, in post repair defect verification by an efficient methodology, using SEM mask defect images, and optical inspection mask defects images (only for verification of phase and transmission related defects). We will demonstrate the flow using programmed mask defects in sub-65nm technology node design. In total 20 types of defects were designed including defects found in typical real circuit environments with 30 different sizes designed for each type. The SEM image was taken for each programmed defect after the test mask was made. Selected defects were repaired and SEM images from the test mask were taken again. Wafers were printed with the test mask before and after repair as defect printability references. A software tool SMDD-Simulation based Mask Defect Disposition-has been used in this study. The software is used to extract edges from the mask SEM images and convert them into polygons to save in GDSII format. Then, the converted polygons from the SEM images were filled with the correct tone to form mask patterns and were merged back into the original GDSII design file. This merge is for the purpose of contour simulation-since normally the SEM images cover only small area (~1 μm) and accurate simulation requires including larger area of optical proximity effect. With lithography process model, the resist contour of area of interest (AOI-the area surrounding a mask defect) can be simulated. If such complicated model is not available, a simple optical model can be used to get simulated aerial image intensity in the AOI. With built-in contour analysis functions, the SMDD software can easily compare the contour (or intensity) differences between defect pattern and normal pattern. With user provided judging criteria, this software can be easily disposition the defect based on contour comparison. In addition, process sensitivity properties, like MEEF and NILS, can be readily obtained in the AOI with a lithography model, which will make mask defect disposition criteria more intelligent.

Propagation of resist heating mask error to wafer level

NASA Astrophysics Data System (ADS)

Babin, S. V.; Karklin, Linard

2006-10-01

As technology is approaching 45 nm and below the IC industry is experiencing a severe product yield hit due to rapidly shrinking process windows and unavoidable manufacturing process variations. Current EDA tools are unable by their nature to deliver optimized and process-centered designs that call for 'post design' localized layout optimization DFM tools. To evaluate the impact of different manufacturing process variations on final product it is important to trace and evaluate all errors through design to manufacturing flow. Photo mask is one of the critical parts of this flow, and special attention should be paid to photo mask manufacturing process and especially to mask tight CD control. Electron beam lithography (EBL) is a major technique which is used for fabrication of high-end photo masks. During the writing process, resist heating is one of the sources for mask CD variations. Electron energy is released in the mask body mainly as heat, leading to significant temperature fluctuations in local areas. The temperature fluctuations cause changes in resist sensitivity, which in turn leads to CD variations. These CD variations depend on mask writing speed, order of exposure, pattern density and its distribution. Recent measurements revealed up to 45 nm CD variation on the mask when using ZEP resist. The resist heating problem with CAR resists is significantly smaller compared to other types of resists. This is partially due to higher resist sensitivity and the lower exposure dose required. However, there is no data yet showing CD errors on the wafer induced by CAR resist heating on the mask. This effect can be amplified by high MEEF values and should be carefully evaluated at 45nm and below technology nodes where tight CD control is required. In this paper, we simulated CD variation on the mask due to resist heating; then a mask pattern with the heating error was transferred onto the wafer. So, a CD error on the wafer was evaluated subject to only one term of the mask error budget - the resist heating CD error. In simulation of exposure using a stepper, variable MEEF was considered.

Real-Time Spaceborne Synthetic Aperture Radar Float-Point Imaging System Using Optimized Mapping Methodology and a Multi-Node Parallel Accelerating Technique

PubMed Central

Li, Bingyi; Chen, Liang; Yu, Wenyue; Xie, Yizhuang; Bian, Mingming; Zhang, Qingjun; Pang, Long

2018-01-01

With the development of satellite load technology and very large-scale integrated (VLSI) circuit technology, on-board real-time synthetic aperture radar (SAR) imaging systems have facilitated rapid response to disasters. A key goal of the on-board SAR imaging system design is to achieve high real-time processing performance under severe size, weight, and power consumption constraints. This paper presents a multi-node prototype system for real-time SAR imaging processing. We decompose the commonly used chirp scaling (CS) SAR imaging algorithm into two parts according to the computing features. The linearization and logic-memory optimum allocation methods are adopted to realize the nonlinear part in a reconfigurable structure, and the two-part bandwidth balance method is used to realize the linear part. Thus, float-point SAR imaging processing can be integrated into a single Field Programmable Gate Array (FPGA) chip instead of relying on distributed technologies. A single-processing node requires 10.6 s and consumes 17 W to focus on 25-km swath width, 5-m resolution stripmap SAR raw data with a granularity of 16,384 × 16,384. The design methodology of the multi-FPGA parallel accelerating system under the real-time principle is introduced. As a proof of concept, a prototype with four processing nodes and one master node is implemented using a Xilinx xc6vlx315t FPGA. The weight and volume of one single machine are 10 kg and 32 cm × 24 cm × 20 cm, respectively, and the power consumption is under 100 W. The real-time performance of the proposed design is demonstrated on Chinese Gaofen-3 stripmap continuous imaging. PMID:29495637

Advanced flight computer. Special study

NASA Technical Reports Server (NTRS)

Coo, Dennis

1995-01-01

This report documents a special study to define a 32-bit radiation hardened, SEU tolerant flight computer architecture, and to investigate current or near-term technologies and development efforts that contribute to the Advanced Flight Computer (AFC) design and development. An AFC processing node architecture is defined. Each node may consist of a multi-chip processor as needed. The modular, building block approach uses VLSI technology and packaging methods that demonstrate a feasible AFC module in 1998 that meets that AFC goals. The defined architecture and approach demonstrate a clear low-risk, low-cost path to the 1998 production goal, with intermediate prototypes in 1996.

Hybrid enabled thin film metrology using XPS and optical

NASA Astrophysics Data System (ADS)

Vaid, Alok; Iddawela, Givantha; Mahendrakar, Sridhar; Lenahan, Michael; Hossain, Mainul; Timoney, Padraig; Bello, Abner F.; Bozdog, Cornel; Pois, Heath; Lee, Wei Ti; Klare, Mark; Kwan, Michael; Kang, Byung Cheol; Isbester, Paul; Sendelbach, Matthew; Yellai, Naren; Dasari, Prasad; Larson, Tom

2016-03-01

Complexity of process steps integration and material systems for next-generation technology nodes is reaching unprecedented levels, the appetite for higher sampling rates is on the rise, while the process window continues to shrink. Current thickness metrology specifications reach as low as 0.1A for total error budget - breathing new life into an old paradigm with lower visibility for past few metrology nodes: accuracy. Furthermore, for advance nodes there is growing demand to measure film thickness and composition on devices/product instead of surrogate planar simpler pads. Here we extend our earlier work in Hybrid Metrology to the combination of X-Ray based reference technologies (high performance) with optical high volume manufacturing (HVM) workhorse metrology (high throughput). Our stated goal is: put more "eyes" on the wafer (higher sampling) and enable move to films on pattern structure (control what matters). Examples of 1X front-end applications are used to setup and validate the benefits.

On design of sensor nodes in the rice planthopper monitoring system based on the internet of things

NASA Astrophysics Data System (ADS)

Wang, Ke Qiang; Cai, Ken

2011-02-01

Accurate records and prediction of the number of the rice planthopper's outbreaks and the environmental information of farmland are effective measures to control pests' damages. On the other hand, a new round of technological revolution from the Internet to the Internet of things is taking place in the field of information. The application of the Internet of things in rice planthopper and environmental online monitoring is an effective measure to solve problems existing in the present wired sensor monitoring technology. Having described the general framework of wireless sensor nodes in the Internet of things in this paper, the software and hardware design schemes of wireless sensor nodes are proposed, combining the needs of rice planthopper and environmental monitoring. In these schemes, each module's design and key components' selection are both aiming to the characteristics of the Internet of things, so it has a strong practical value.

Development of assembly and joint concepts for erectable space structures

NASA Technical Reports Server (NTRS)

Jacquemin, G. G.; Bluck, R. M.; Grotbeck, G. H.; Johnson, R. R.

1980-01-01

The technology associated with the on-orbit assembly of tetrahedral truss platforms erected of graphite epoxy tapered columns is examined. Associated with the assembly process is the design and fabrication of nine member node joints. Two such joints demonstrating somewhat different technology were designed and fabricated. Two methods of automatic assembly using the node designs were investigated, and the time of assembly of tetrahedral truss structures up to 1 square km in size was estimated. The effect of column and node joint packaging on the Space Shuttle cargo bay is examined. A brief discussion is included of operating cost considerations and the selection of energy sources. Consideration was given to the design assembly machines from 5 m to 20 m. The smaller machines, mounted on the Space Shuttle, are deployable and restowable. They provide a means of demonstrating the capabilities of the concept and of erecting small specialized platforms on relatively short notice.

Dense, Efficient Chip-to-Chip Communication at the Extremes of Computing

ERIC Educational Resources Information Center

Loh, Matthew

2013-01-01

The scalability of CMOS technology has driven computation into a diverse range of applications across the power consumption, performance and size spectra. Communication is a necessary adjunct to computation, and whether this is to push data from node-to-node in a high-performance computing cluster or from the receiver of wireless link to a neural…

A new routing enhancement scheme based on node blocking state advertisement in wavelength-routed WDM networks

NASA Astrophysics Data System (ADS)

Hu, Peigang; Jin, Yaohui; Zhang, Chunlei; He, Hao; Hu, WeiSheng

2005-02-01

The increasing switching capacity brings the optical node with considerable complexity. Due to the limitation in cost and technology, an optical node is often designed with partial switching capability and partial resource sharing. It means that the node is of blocking to some extent, for example multi-granularity switching node, which in fact is a structure using pass wavelength to reduce the dimension of OXC, and partial sharing wavelength converter (WC) OXC. It is conceivable that these blocking nodes will have great effects on the problem of routing and wavelength assignment. Some previous works studied the blocking case, partial WC OXC, using complicated wavelength assignment algorithm. But the complexities of these schemes decide them to be not in practice in real networks. In this paper, we propose a new scheme based on the node blocking state advertisement to reduce the retry or rerouting probability and improve the efficiency of routing in the networks with blocking nodes. In the scheme, node blocking state are advertised to the other nodes in networks, which will be used for subsequent route calculation to find a path with lowest blocking probability. The performance of the scheme is evaluated using discrete event model in 14-node NSFNET, all the nodes of which employ a kind of partial sharing WC OXC structure. In the simulation, a simple First-Fit wavelength assignment algorithm is used. The simulation results demonstrate that the new scheme considerably reduces the retry or rerouting probability in routing process.

Investigation of Storage Options for Scientific Computing on Grid and Cloud Facilities

NASA Astrophysics Data System (ADS)

Garzoglio, Gabriele

2012-12-01

In recent years, several new storage technologies, such as Lustre, Hadoop, OrangeFS, and BlueArc, have emerged. While several groups have run benchmarks to characterize them under a variety of configurations, more work is needed to evaluate these technologies for the use cases of scientific computing on Grid clusters and Cloud facilities. This paper discusses our evaluation of the technologies as deployed on a test bed at FermiCloud, one of the Fermilab infrastructure-as-a-service Cloud facilities. The test bed consists of 4 server-class nodes with 40 TB of disk space and up to 50 virtual machine clients, some running on the storage server nodes themselves. With this configuration, the evaluation compares the performance of some of these technologies when deployed on virtual machines and on “bare metal” nodes. In addition to running standard benchmarks such as IOZone to check the sanity of our installation, we have run I/O intensive tests using physics-analysis applications. This paper presents how the storage solutions perform in a variety of realistic use cases of scientific computing. One interesting difference among the storage systems tested is found in a decrease in total read throughput with increasing number of client processes, which occurs in some implementations but not others.

Investigation of storage options for scientific computing on Grid and Cloud facilities

DOE Office of Scientific and Technical Information (OSTI.GOV)

Garzoglio, Gabriele

In recent years, several new storage technologies, such as Lustre, Hadoop, OrangeFS, and BlueArc, have emerged. While several groups have run benchmarks to characterize them under a variety of configurations, more work is needed to evaluate these technologies for the use cases of scientific computing on Grid clusters and Cloud facilities. This paper discusses our evaluation of the technologies as deployed on a test bed at FermiCloud, one of the Fermilab infrastructure-as-a-service Cloud facilities. The test bed consists of 4 server-class nodes with 40 TB of disk space and up to 50 virtual machine clients, some running on the storagemore » server nodes themselves. With this configuration, the evaluation compares the performance of some of these technologies when deployed on virtual machines and on bare metal nodes. In addition to running standard benchmarks such as IOZone to check the sanity of our installation, we have run I/O intensive tests using physics-analysis applications. This paper presents how the storage solutions perform in a variety of realistic use cases of scientific computing. One interesting difference among the storage systems tested is found in a decrease in total read throughput with increasing number of client processes, which occurs in some implementations but not others.« less

Faster Bit-Parallel Algorithms for Unordered Pseudo-tree Matching and Tree Homeomorphism

NASA Astrophysics Data System (ADS)

Kaneta, Yusaku; Arimura, Hiroki

In this paper, we consider the unordered pseudo-tree matching problem, which is a problem of, given two unordered labeled trees P and T, finding all occurrences of P in T via such many-one embeddings that preserve node labels and parent-child relationship. This problem is closely related to tree pattern matching problem for XPath queries with child axis only. If m > w , we present an efficient algorithm that solves the problem in O(nm log(w)/w) time using O(hm/w + mlog(w)/w) space and O(m log(w)) preprocessing on a unit-cost arithmetic RAM model with addition, where m is the number of nodes in P, n is the number of nodes in T, h is the height of T, and w is the word length. We also discuss a modification of our algorithm for the unordered tree homeomorphism problem, which corresponds to a tree pattern matching problem for XPath queries with descendant axis only.

SU-E-T-222: Computational Optimization of Monte Carlo Simulation On 4D Treatment Planning Using the Cloud Computing Technology

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chow, J

Purpose: This study evaluated the efficiency of 4D lung radiation treatment planning using Monte Carlo simulation on the cloud. The EGSnrc Monte Carlo code was used in dose calculation on the 4D-CT image set. Methods: 4D lung radiation treatment plan was created by the DOSCTP linked to the cloud, based on the Amazon elastic compute cloud platform. Dose calculation was carried out by Monte Carlo simulation on the 4D-CT image set on the cloud, and results were sent to the FFD4D image deformation program for dose reconstruction. The dependence of computing time for treatment plan on the number of computemore » node was optimized with variations of the number of CT image set in the breathing cycle and dose reconstruction time of the FFD4D. Results: It is found that the dependence of computing time on the number of compute node was affected by the diminishing return of the number of node used in Monte Carlo simulation. Moreover, the performance of the 4D treatment planning could be optimized by using smaller than 10 compute nodes on the cloud. The effects of the number of image set and dose reconstruction time on the dependence of computing time on the number of node were not significant, as more than 15 compute nodes were used in Monte Carlo simulations. Conclusion: The issue of long computing time in 4D treatment plan, requiring Monte Carlo dose calculations in all CT image sets in the breathing cycle, can be solved using the cloud computing technology. It is concluded that the optimized number of compute node selected in simulation should be between 5 and 15, as the dependence of computing time on the number of node is significant.« less

Color Filtering Localization for Three-Dimensional Underwater Acoustic Sensor Networks

PubMed Central

Liu, Zhihua; Gao, Han; Wang, Wuling; Chang, Shuai; Chen, Jiaxing

2015-01-01

Accurate localization of mobile nodes has been an important and fundamental problem in underwater acoustic sensor networks (UASNs). The detection information returned from a mobile node is meaningful only if its location is known. In this paper, we propose two localization algorithms based on color filtering technology called PCFL and ACFL. PCFL and ACFL aim at collaboratively accomplishing accurate localization of underwater mobile nodes with minimum energy expenditure. They both adopt the overlapping signal region of task anchors which can communicate with the mobile node directly as the current sampling area. PCFL employs the projected distances between each of the task projections and the mobile node, while ACFL adopts the direct distance between each of the task anchors and the mobile node. The proportion factor of distance is also proposed to weight the RGB values. By comparing the nearness degrees of the RGB sequences between the samples and the mobile node, samples can be filtered out. The normalized nearness degrees are considered as the weighted standards to calculate the coordinates of the mobile nodes. The simulation results show that the proposed methods have excellent localization performance and can localize the mobile node in a timely way. The average localization error of PCFL is decreased by about 30.4% compared to the AFLA method. PMID:25774706

Solving next generation (1x node) metrology challenges using advanced CDSEM capabilities: tilt, high energy and backscatter imaging

NASA Astrophysics Data System (ADS)

Zhang, Xiaoxiao; Snow, Patrick W.; Vaid, Alok; Solecky, Eric; Zhou, Hua; Ge, Zhenhua; Yasharzade, Shay; Shoval, Ori; Adan, Ofer; Schwarzband, Ishai; Bar-Zvi, Maayan

2015-03-01

Traditional metrology solutions are facing a range of challenges at the 1X node such as three dimensional (3D) measurement capabilities, shrinking overlay and critical dimension (CD) error budgets driven by multi-patterning and via in trench CD measurements. Hybrid metrology offers promising new capabilities to address some of these challenges but it will take some time before fully realized. This paper explores new capabilities currently offered on the in-line Critical Dimension Scanning Electron Microscope (CD-SEM) to address these challenges and enable the CD-SEM to move beyond measuring bottom CD using top down imaging. Device performance is strongly correlated with Fin geometry causing an urgent need for 3D measurements. New beam tilting capabilities enhance the ability to make 3D measurements in the front-end-of-line (FEOL) of the metal gate FinFET process in manufacturing. We explore these new capabilities for measuring Fin height and build upon the work communicated last year at SPIE1. Furthermore, we extend the application of the tilt beam to the back-end-of-line (BEOL) trench depth measurement and demonstrate its capability in production targeting replacement of the existing Atomic Force Microscope (AFM) measurements by including the height measurement in the existing CDSEM recipe to reduce fab cycle time. In the BEOL, another increasingly challenging measurement for the traditional CD-SEM is the bottom CD of the self-aligned via (SAV) in a trench first via last (TFVL) process. Due to the extremely high aspect ratio of the structure secondary electron (SE) collection from the via bottom is significantly reduced requiring the use of backscatter electrons (BSE) to increase the relevant image quality. Even with this solution, the resulting images are difficult to measure with advanced technology nodes. We explore new methods to increase measurement robustness and combine this with novel segmentation-based measurement algorithm generated specifically for BSE images. The results will be contrasted with data from previously used methods to quantify the improvement. We also compare the results to electrical test data to evaluate and quantify the measurement performance improvements. Lastly, according to International Technology Roadmap for Semiconductors (ITRS) from 2013, the overlay 3 sigma requirement will be 3.3 nm in 2015 and 2.9 nm in 2016. Advanced lithography requires overlay measurement in die on features resembling the device geometry. However, current optical overlay measurement is performed in the scribe line on large targets due to optical diffraction limit. In some cases, this limits the usefulness of the measurement since it does not represent the true behavior of the device. We explore using high voltage imaging to help address this urgent need. Novel CD-SEM based overlay targets that optimize the restrictions of process geometry and SEM technique were designed and spread out across the die. Measurements are done on these new targets both after photolithography and etch. Correlation is drawn between the two measurements. These results will also be compared to conventional optical overlay measurement approaches and we will discuss the possibility of using this capability in high volume manufacturing.

Development of Compact Seafloor Cabled Seismic and Tsunami Observation System Using ICT and Installation Plan to Off-Sanriku Region, Japan

NASA Astrophysics Data System (ADS)

Shinohara, M.; Yamada, T.; Sakai, S.; Shiobara, H.; Kanazawa, T.

2014-12-01

A seismic and tsunami observation system using seafloor optical fiber had been installed off Sanriku, northeastern Japan in 1996. The objectives of the system are to obtain exact seismic activity related to plate subduction and to observe tsunami on seafloor. The continuous real-time observation has been carried out since the installation. In March 2011, the Tohoku earthquake occurred at the plate boundary near the Japan Trench, and the system recorded seismic waves and tsunamis by the mainshock. These data are useful to obtain accurate position of the source faults and source region of tsunami generated by the event. However, the landing station of the system was damaged by huge tsunami, and the observation was suspended. Because the real-time seafloor observation by cabled system is important in this region, we decide to reconstruct a landing station and install newly developed Ocean Bottom Cabled Seismic and Tsunami (OBCST) observation system for additional observation and/or replacement of the existing system. From 2005, we have been developed the new compact Ocean Bottom Cabled Seismometer (OBCS) system using Information and Communication Technology (ICT). Our system is characterized by securement of reliability by using TCP/IP technology and down-sizing of an observation node using up-to-date electronics technology. In 2010, the first OBCS was installed near Awashima-island in the Japan Sea, and is being operated continuously. The new OBCST system is placed as the second generation of our system, and has two types of observation nodes. Both types have accelerometers as seismic sensors. One type of observation nodes equips a crystal oscillator type pressure gauge as tsunami sensor. Another type has an external port for additional observation sensor by using Power over Ethernet technology. Clocks in observation nodes can be synchronized through TCP/IP protocol with an accuracy of 300 ns (IEEE 1588). A simple canister for tele-communication seafloor cable is adopted for the observation node, and has diameter of 26 cm and length of about 1.3 m. At the present, we are producing a practical OBCST system which has total length of approximately 100 km and three observation nodes. We have a plan to install the practical system in 2015.

Differences in fluorescence profiles from breast cancer tissues due to changes in relative tryptophan content via energy transfer: tryptophan content correlates with histologic grade and tumor size but not with lymph node metastases

NASA Astrophysics Data System (ADS)

Sordillo, Laura A.; Sordillo, Peter P.; Budansky, Yury; Pu, Yang; Alfano, Robert R.

2014-12-01

The correlation between histologic grade, an increasingly important measure of prognosis for patients with breast cancer, and tryptophan levels from tissues of 15 breast carcinoma patients was investigated. Changes in the relative content of key native organic biomolecule tryptophan were seen from the fluorescence spectra of cancerous and paired normal tissues with excitation wavelengths of 280 and 300 nm. Due to a large spectral overlap and matching excitation-emission spectra, fluorescence resonance energy transfer from tryptophan-donor to reduced nicotinamide adenine dinucleotides-acceptor was noted. We used the ratios of fluorescence intensities at their spectral emission peaks, or spectral fingerprint peaks, at 340, 440, and 460 nm. Higher ratios correlated strongly with high histologic grade, while lower-grade tumors had low ratios. Large tumor size also correlated with high ratios, while the number of lymph node metastases, a major factor in staging, was not correlated with tryptophan levels. High histologic grade correlates strongly with increased content of tryptophan in breast cancer tissues and suggests that measurement of tryptophan content may be useful as a part of the evaluation of these patients.

A solution for exposure tool optimization at the 65-nm node and beyond

NASA Astrophysics Data System (ADS)

Itai, Daisuke

2007-03-01

As device geometries shrink, tolerances for critical dimension, focus, and overlay control decrease. For the stable manufacture of semiconductor devices at (and beyond) the 65nm node, both performance variability and drift in exposure tools are no longer negligible factors. With EES (Equipment Engineering System) as a guidepost, hopes of improving productivity of semiconductor manufacturing are growing. We are developing a system, EESP (Equipment Engineering Support Program), based on the concept of EES. The EESP system collects and stores large volumes of detailed data generated from Canon lithographic equipment while product is being manufactured. It uses that data to monitor both equipment characteristics and process characteristics, which cannot be examined without this system. The goal of EESP is to maximize equipment capabilities, by feeding the result back to APC/FDC and the equipment maintenance list. This was a collaborative study of the system's effectiveness at the device maker's factories. We analyzed the performance variability of exposure tools by using focus residual data. We also attempted to optimize tool performance using the analyzed results. The EESP system can make the optimum performance of exposure tools available to the device maker.

Tissue distribution and elimination after oral and intravenous administration of different titanium dioxide nanoparticles in rats

PubMed Central

2014-01-01

Objective The aim of this study was to obtain kinetic data that can be used in human risk assessment of titanium dioxide nanomaterials. Methods Tissue distribution and blood kinetics of various titanium dioxide nanoparticles (NM-100, NM-101, NM-102, NM-103, and NM-104), which differ with respect to primary particle size, crystalline form and hydrophobicity, were investigated in rats up to 90 days post-exposure after oral and intravenous administration of a single or five repeated doses. Results For the oral study, liver, spleen and mesenteric lymph nodes were selected as target tissues for titanium (Ti) analysis. Ti-levels in liver and spleen were above the detection limit only in some rats. Titanium could be detected at low levels in mesenteric lymph nodes. These results indicate that some minor absorption occurs in the gastrointestinal tract, but to a very limited extent. Both after single and repeated intravenous (IV) exposure, titanium rapidly distributed from the systemic circulation to all tissues evaluated (i.e. liver, spleen, kidney, lung, heart, brain, thymus, reproductive organs). Liver was identified as the main target tissue, followed by spleen and lung. Total recovery (expressed as % of nominal dose) for all four tested nanomaterials measured 24 h after single or repeated exposure ranged from 64-95% or 59-108% for male or female animals, respectively. During the 90 days post-exposure period, some decrease in Ti-levels was observed (mainly for NM-100 and NM-102) with a maximum relative decrease of 26%. This was also confirmed by the results of the kinetic analysis which revealed that for each of the investigated tissues the half-lifes were considerable (range 28–650 days, depending on the TiO2-particle and tissue investigated). Minor differences in kinetic profile were observed between the various particles, though these could not be clearly related to differences in primary particle size or hydrophobicity. Some indications were observed for an effect of crystalline form (anatase vs. rutile) on total Ti recovery. Conclusion Overall, the results of the present oral and IV study indicates very low oral bioavailability and slow tissue elimination. Limited uptake in combination with slow elimination might result in the long run in potential tissue accumulation. PMID:24993397

Energy Options for Wireless Sensor Nodes.

PubMed

Knight, Chris; Davidson, Joshua; Behrens, Sam

2008-12-08

Reduction in size and power consumption of consumer electronics has opened up many opportunities for low power wireless sensor networks. One of the major challenges is in supporting battery operated devices as the number of nodes in a network grows. The two main alternatives are to utilize higher energy density sources of stored energy, or to generate power at the node from local forms of energy. This paper reviews the state-of-the art technology in the field of both energy storage and energy harvesting for sensor nodes. The options discussed for energy storage include batteries, capacitors, fuel cells, heat engines and betavoltaic systems. The field of energy harvesting is discussed with reference to photovoltaics, temperature gradients, fluid flow, pressure variations and vibration harvesting.

Energy efficient sensor network implementations

DOE Office of Scientific and Technical Information (OSTI.GOV)

Frigo, Janette R; Raby, Eric Y; Brennan, Sean M

In this paper, we discuss a low power embedded sensor node architecture we are developing for distributed sensor network systems deployed in a natural environment. In particular, we examine the sensor node for energy efficient processing-at-the-sensor. We analyze the following modes of operation; event detection, sleep(wake-up), data acquisition, data processing modes using low power, high performance embedded technology such as specialized embedded DSP processors and a low power FPGAs at the sensing node. We use compute intensive sensor node applications: an acoustic vehicle classifier (frequency domain analysis) and a video license plate identification application (learning algorithm) as a case study.more » We report performance and total energy usage for our system implementations and discuss the system architecture design trade offs.« less

Energy Options for Wireless Sensor Nodes

PubMed Central

Knight, Chris; Davidson, Joshua; Behrens, Sam

2008-01-01

Reduction in size and power consumption of consumer electronics has opened up many opportunities for low power wireless sensor networks. One of the major challenges is in supporting battery operated devices as the number of nodes in a network grows. The two main alternatives are to utilize higher energy density sources of stored energy, or to generate power at the node from local forms of energy. This paper reviews the state-of-the art technology in the field of both energy storage and energy harvesting for sensor nodes. The options discussed for energy storage include batteries, capacitors, fuel cells, heat engines and betavoltaic systems. The field of energy harvesting is discussed with reference to photovoltaics, temperature gradients, fluid flow, pressure variations and vibration harvesting. PMID:27873975

Feasibility and optimal dosage of indocyanine green fluorescence for sentinel lymph node detection using robotic single-site instrumentation: preclinical study.

PubMed

Levinson, Kimberly L; Mahdi, Haider; Escobar, Pedro F

2013-01-01

The present study was performed to determine the optimal dosage of indocyanine green (ICG) to accurately differentiate the sentinel node from surrounding tissue and then to test this dosage using novel single-port robotic instrumentation. The study was performed in healthy female pigs. After induction of anesthesia, all pigs underwent exploratory laparotomy, dissection of the bladder, and colpotomy to reveal the cervical os. With use of a 21-gauge needle, 0.5 mL normal saline solution was injected at the 3- and 9-o'clock positions as control. Four concentrations of ICG were constituted for doses of 1000, 500, 250, and 175 μg per 0.5 mL. ICG was then injected at the 3- and 9-o'clock positions on the cervix. The SPY camera was used to track ICG into the sentinel nodes and to quantify the intensity of light emitted. SPY technology uses an intensity scale of 1 to 256; this scale was used to determine the difference in intensity between the sentinel node and surrounding tissues. The optimal dosage was tested using single-port robotic instrumentation with the same injection techniques. A sentinel node was identified at all doses except 175 μg, at which ICG stayed in the cervix and vasculature only. For both the 500- and 250-μg doses, the sentinel node was identified before reaching maximum intensity. At maximum intensity, the difference between the surrounding tissue and the node was 207 (251 vs 44) for the 500-μg dose and 159 (251 vs 92) for the 250-μg dose. Sentinel lymph node (SLN) biopsy was successfully performed using single-port robotic technology with both the 250- and 500-μg doses. For SLN detection, the dose of ICG is related to the ability to differentiate the sentinel node from the surrounding tissue. An ICG dose of 250 to 500 μg enables identification of a SLN with more distinction from the surrounding tissues, and this procedure is feasible using single-port robotics instrumentation. Copyright © 2013 AAGL. Published by Elsevier Inc. All rights reserved.

A Proposed Scalable Design and Simulation of Wireless Sensor Network-Based Long-Distance Water Pipeline Leakage Monitoring System

PubMed Central

Almazyad, Abdulaziz S.; Seddiq, Yasser M.; Alotaibi, Ahmed M.; Al-Nasheri, Ahmed Y.; BenSaleh, Mohammed S.; Obeid, Abdulfattah M.; Qasim, Syed Manzoor

2014-01-01

Anomalies such as leakage and bursts in water pipelines have severe consequences for the environment and the economy. To ensure the reliability of water pipelines, they must be monitored effectively. Wireless Sensor Networks (WSNs) have emerged as an effective technology for monitoring critical infrastructure such as water, oil and gas pipelines. In this paper, we present a scalable design and simulation of a water pipeline leakage monitoring system using Radio Frequency IDentification (RFID) and WSN technology. The proposed design targets long-distance aboveground water pipelines that have special considerations for maintenance, energy consumption and cost. The design is based on deploying a group of mobile wireless sensor nodes inside the pipeline and allowing them to work cooperatively according to a prescheduled order. Under this mechanism, only one node is active at a time, while the other nodes are sleeping. The node whose turn is next wakes up according to one of three wakeup techniques: location-based, time-based and interrupt-driven. In this paper, mathematical models are derived for each technique to estimate the corresponding energy consumption and memory size requirements. The proposed equations are analyzed and the results are validated using simulation. PMID:24561404

A proposed scalable design and simulation of wireless sensor network-based long-distance water pipeline leakage monitoring system.

PubMed

Almazyad, Abdulaziz S; Seddiq, Yasser M; Alotaibi, Ahmed M; Al-Nasheri, Ahmed Y; BenSaleh, Mohammed S; Obeid, Abdulfattah M; Qasim, Syed Manzoor

2014-02-20

Anomalies such as leakage and bursts in water pipelines have severe consequences for the environment and the economy. To ensure the reliability of water pipelines, they must be monitored effectively. Wireless Sensor Networks (WSNs) have emerged as an effective technology for monitoring critical infrastructure such as water, oil and gas pipelines. In this paper, we present a scalable design and simulation of a water pipeline leakage monitoring system using Radio Frequency IDentification (RFID) and WSN technology. The proposed design targets long-distance aboveground water pipelines that have special considerations for maintenance, energy consumption and cost. The design is based on deploying a group of mobile wireless sensor nodes inside the pipeline and allowing them to work cooperatively according to a prescheduled order. Under this mechanism, only one node is active at a time, while the other nodes are sleeping. The node whose turn is next wakes up according to one of three wakeup techniques: location-based, time-based and interrupt-driven. In this paper, mathematical models are derived for each technique to estimate the corresponding energy consumption and memory size requirements. The proposed equations are analyzed and the results are validated using simulation.

Autonomous mission planning and scheduling: Innovative, integrated, responsive

NASA Technical Reports Server (NTRS)

Sary, Charisse; Liu, Simon; Hull, Larry; Davis, Randy

1994-01-01

Autonomous mission scheduling, a new concept for NASA ground data systems, is a decentralized and distributed approach to scientific spacecraft planning, scheduling, and command management. Systems and services are provided that enable investigators to operate their own instruments. In autonomous mission scheduling, separate nodes exist for each instrument and one or more operations nodes exist for the spacecraft. Each node is responsible for its own operations which include planning, scheduling, and commanding; and for resolving conflicts with other nodes. One or more database servers accessible to all nodes enable each to share mission and science planning, scheduling, and commanding information. The architecture for autonomous mission scheduling is based upon a realistic mix of state-of-the-art and emerging technology and services, e.g., high performance individual workstations, high speed communications, client-server computing, and relational databases. The concept is particularly suited to the smaller, less complex missions of the future.

Magnetic sensor nodes for enhanced situational awareness in urban settings

NASA Astrophysics Data System (ADS)

Trammell, Hoke; Shelby, Richard; Mathis, Kevin; Dalichaouch, Yacine; Kumar, Sankaran

2005-05-01

Military forces conducting urban operations are in need of non-line-of-sight sensor technologies for enhanced situational awareness. Disposable sensors ought to be able to detect and track targets through walls and within rooms in a building and relay that information in real-time to the soldier. We have recently developed magnetic sensor nodes aimed towards low cost, small size, low power consumption, and wireless communication. The current design uses a three-axis thin-film magnetoresistive sensor for low bandwidth B-field monitoring of magnetic targets such as vehicles and weapons carried by personnel. These sensor nodes are battery operated and use IEEE 802.15.4 communication link for control and data transmission. Power consumption during signal acquisition and communication is approximately 300 mW per channel. We will present and discuss node array performance, future node development and sensor fusion concepts.

A fast process development flow by applying design technology co-optimization

NASA Astrophysics Data System (ADS)

Chen, Yi-Chieh; Yeh, Shin-Shing; Ou, Tsong-Hua; Lin, Hung-Yu; Mai, Yung-Ching; Lin, Lawrence; Lai, Jun-Cheng; Lai, Ya Chieh; Xu, Wei; Hurat, Philippe

2017-03-01

Beyond 40 nm technology node, the pattern weak points and hotspot types increase dramatically. The typical patterns for lithography verification suffers huge turn-around-time (TAT) to handle the design complexity. Therefore, in order to speed up process development and increase pattern variety, accurate design guideline and realistic design combinations are required. This paper presented a flow for creating a cell-based layout, a lite realistic design, to early identify problematic patterns which will negatively affect the yield. A new random layout generating method, Design Technology Co-Optimization Pattern Generator (DTCO-PG), is reported in this paper to create cell-based design. DTCO-PG also includes how to characterize the randomness and fuzziness, so that it is able to build up the machine learning scheme which model could be trained by previous results, and then it generates patterns never seen in a lite design. This methodology not only increases pattern diversity but also finds out potential hotspot preliminarily. This paper also demonstrates an integrated flow from DTCO pattern generation to layout modification. Optical Proximity Correction, OPC and lithographic simulation is then applied to DTCO-PG design database to detect hotspots and then hotspots or weak points can be automatically fixed through the procedure or handled manually. This flow benefits the process evolution to have a faster development cycle time, more complexity pattern design, higher probability to find out potential hotspots in early stage, and a more holistic yield ramping operation.

Ion beam deposition system for depositing low defect density extreme ultraviolet mask blanks

NASA Astrophysics Data System (ADS)

Jindal, V.; Kearney, P.; Sohn, J.; Harris-Jones, J.; John, A.; Godwin, M.; Antohe, A.; Teki, R.; Ma, A.; Goodwin, F.; Weaver, A.; Teora, P.

2012-03-01

Extreme ultraviolet lithography (EUVL) is the leading next-generation lithography (NGL) technology to succeed optical lithography at the 22 nm node and beyond. EUVL requires a low defect density reflective mask blank, which is considered to be one of the top two critical technology gaps for commercialization of the technology. At the SEMATECH Mask Blank Development Center (MBDC), research on defect reduction in EUV mask blanks is being pursued using the Veeco Nexus deposition tool. The defect performance of this tool is one of the factors limiting the availability of defect-free EUVL mask blanks. SEMATECH identified the key components in the ion beam deposition system that is currently impeding the reduction of defect density and the yield of EUV mask blanks. SEMATECH's current research is focused on in-house tool components to reduce their contributions to mask blank defects. SEMATECH is also working closely with the supplier to incorporate this learning into a next-generation deposition tool. This paper will describe requirements for the next-generation tool that are essential to realize low defect density EUV mask blanks. The goal of our work is to enable model-based predictions of defect performance and defect improvement for targeted process improvement and component learning to feed into the new deposition tool design. This paper will also highlight the defect reduction resulting from process improvements and the restrictions inherent in the current tool geometry and components that are an impediment to meeting HVM quality EUV mask blanks will be outlined.

Graphene nanoribbon field effect transistor for nanometer-size on-chip temperature sensor

NASA Astrophysics Data System (ADS)

Banadaki, Yaser M.; Srivastava, Ashok; Sharifi, Safura

2016-04-01

Graphene has been extensively investigated as a promising material for various types of high performance sensors due to its large surface-to-volume ratio, remarkably high carrier mobility, high carrier density, high thermal conductivity, extremely high mechanical strength and high signal-to-noise ratio. The power density and the corresponding die temperature can be tremendously high in scaled emerging technology designs, urging the on-chip sensing and controlling of the generated heat in nanometer dimensions. In this paper, we have explored the feasibility of a thin oxide graphene nanoribbon (GNR) as nanometer-size temperature sensor for detecting local on-chip temperature at scaled bias voltages of emerging technology. We have introduced an analytical model for GNR FET for 22nm technology node, which incorporates both thermionic emission of high-energy carriers and band-to-band-tunneling (BTBT) of carriers from drain to channel regions together with different scattering mechanisms due to intrinsic acoustic phonons and optical phonons and line-edge roughness in narrow GNRs. The temperature coefficient of resistivity (TCR) of GNR FET-based temperature sensor shows approximately an order of magnitude higher TCR than large-area graphene FET temperature sensor by accurately choosing of GNR width and bias condition for a temperature set point. At gate bias VGS = 0.55 V, TCR maximizes at room temperature to 2.1×10-2 /K, which is also independent of GNR width, allowing the design of width-free GNR FET for room temperature sensing applications.

Removal of Tin from Extreme Ultraviolet Collector Optics by an In-Situ Hydrogen Plasma

NASA Astrophysics Data System (ADS)

Elg, Daniel Tyler

Throughout the 1980s and 1990s, as the semiconductor industry upheld Moore's Law and continuously shrank device feature sizes, the wavelength of the lithography source remained at or below the resolution limit of the minimum feature size. Since 2001, however, the light source has been the 193nm ArF excimer laser. While the industry has managed to keep up with Moore's Law, shrinking feature sizes without shrinking the lithographic wavelength has required extra innovations and steps that increase fabrication time, cost, and error. These innovations include immersion lithography and double patterning. Currently, the industry is at the 14 nm technology node. Thus, the minimum feature size is an order of magnitude below the exposure wavelength. For the 10 nm node, triple and quadruple patterning have been proposed, causing potentially even more cost, fabrication time, and error. Such a trend cannot continue indefinitely in an economic fashion, and it is desirable to decrease the wavelength of the lithography sources. Thus, much research has been invested in extreme ultraviolet lithography (EUVL), which uses 13.5 nm light. While much progress has been made in recent years, some challenges must still be solved in order to yield a throughput high enough for EUVL to be commercially viable for high-volume manufacturing (HVM). One of these problems is collector contamination. Due to the 92 eV energy of a 13.5 nm photon, EUV light must be made by a plasma, rather than by a laser. Specifically, the industrially-favored EUV source topology is to irradiate a droplet of molten Sn with a laser, creating a dense, hot laser-produced plasma (LPP) and ionizing the Sn to (on average) the +10 state. Additionally, no materials are known to easily transmit EUV. All EUV light must be collected by a collector optic mirror, which cannot be guarded by a window. The plasmas used in EUV lithography sources expel Sn ions and neutrals, which degrade the quality of collector optics. The mitigation of this debris is one of the main problems facing potential manufacturers of EUV sources. which can damage the collector optic in three ways: sputtering, implantation, and deposition. The first two damage processes are irreversible and are caused by the high energies (1-10 keV) of the ion debris. Debris mitigation methods have largely managed to reduce this problem by using collisions with H2 buffer gas to slow down the energetic ions. However, deposition can take place at all ion and neutral energies, and no mitigation method can deterministically deflect all neutrals away from the collector. Thus, deposition still takes place, lowering the collector reflectivity and increasing the time needed to deliver enough EUV power to pattern a wafer. Additionally, even once EUV reaches HVM insertion, source power will need to be continually increased as feature sizes continue to shrink; this increase in source power may potentially come at a cost of increased debris. Thus, debris mitigation solutions that work for the initial generation of commercial EUVL systems may not be adequate for future generations. An in-situ technology to clean collector optics without source downtime is required. which will require an in-situ technology to clean collector optics. The novel cleaning solution described in this work is to create the radicals directly on the collector surface by using the collector itself to drive a capacitively-coupled hydrogen plasma. This allows for radical creation at the desired location without requiring any delivery system and without requiring any source downtime. Additionally, the plasma provides energetic radicals that aid in the etching process. This work will focus on two areas. First, it will focus on experimental collector cleaning and EUV reflectivity restoration. Second, it will focus on developing an understanding of the fundamental processes governing Sn removal. It will be shown that this plasma technique can clean an entire collector optic and restore EUV reflectivity to MLMs without damaging them. Additionally, it will be shown that, within the parameter space explored, the limiting factor in Sn etching is not hydrogen radical flux or SnH4 decomposition but ion energy flux. This will be backed up by experimental measurements, as well as a plasma chemistry model of the radical density and a 3D model of SnH4 transport and redeposition.

Self-Assembling Block Copolymer Resist Mixtures towards Lithographic Resists for Sub-10 nm Features

NASA Astrophysics Data System (ADS)

Chandler, Curran; Daga, Vikram; Watkins, James

2009-03-01

Significant improvements in 193 nm photolithography have enabled the extension of device feature sizes beyond the 45 nm and 32 nm nodes, yet uncertainty lies beyond 22 nm features as no single replacement has emerged. Here we show that low molecular weight, nonionic block copolymer surfactant blends are capable of self-assembling into highly ordered domains with feature sizes on the order of 5 nm. These surfactants, most of which lack the required χN for microphase separation on their own, exhibit strong segregation and long-range order upon addition of a component capable of multi-point hydrogen bonding that is specific for one of the blocks in the copolymer. This has been demonstrated by our SAXS data for several Pluronic (PEO-b-PPO-b-PEO) and Brij (PEO-b-[CH2]nCH3) surfactants of various molecular weights and PEO volume fractions. Furthermore, we employ these highly-ordered systems as thin film, nanolithographic etch masks for the transfer of sub-10 nm patterns into silicon-based substrates. Small molecule, hydrogen bonding additives containing aromatic or silsesquioxane structure are also used to tune etch contrast between the blocks which is important for reducing line edge roughness (LER) of such small features.

Effect of Ion Flux (Dose Rate) in Source-Drain Extension Ion Implantation for 10-nm Node FinFET and Beyond on 300/450mm Platforms

NASA Astrophysics Data System (ADS)

Shen, Ming-Yi

The improvement of wafer equipment productivity has been a continuous effort of the semiconductor industry. Higher productivity implies lower product price, which economically drives more demand from the market. This is desired by the semiconductor manufacturing industry. By raising the ion beam current of the ion implanter for 300/450mm platforms, it is possible to increase the throughput of the ion implanter. The resulting dose rate can be comparable to the performance of conventional ion implanters or higher, depending on beam current and beam size. Thus, effects caused by higher dose rate must be investigated further. One of the major applications of ion implantation (I/I) is source-drain extension (SDE) I/I for the silicon FinFET device. This study investigated the dose rate effects on the material properties and device performance of the 10-nm node silicon FinFET. In order to gain better understanding of the dose rate effects, the dose rate study is based on Synopsys Technology CAD (TCAD) process and device simulations that are calibrated and validated using available structural silicon fin samples. We have successfully shown that the kinetic monte carlo (KMC) I/I simulation can precisely model both the silicon amorphization and the arsenic distribution in the fin by comparing the KMC simulation results with TEM images. The results of the KMC I/I simulation show that at high dose rate more activated arsenic dopants were in the source-drain extension (SDE) region. This finding matches with the increased silicon amorphization caused by the high dose-rate I/I, given that the arsenic atoms could be more easily activated by the solid phase epitaxial regrowth process. This increased silicon amorphization led to not only higher arsenic activation near the spacer edge, but also less arsenic atoms straggling into the channel. Hence, it is possible to improve the throughput of the ion implanter when the dopants are implanted at high dose rate if the same doping level with a lower wafer dose can be achieved. In addition, the leakage current might also be reduced due to less undesired dopants in the channel. However, the twin defects from the problematic Si{111} recrystallization is well-known to cause excessive leakage current to the FinFET. This drawback can offset the benefits of the high dose rate I/I mentioned above. This work produced the first attempt at simulating the electrical impact of twin defects on advanced-node (10 nm) FinFET device performance. It was found that the high dose-rate I/I causes more twin defects in the silicon fin, and the physical locations of these defects were close to the channel. The defects undesirably induced trap-assisted band-to-band tunneling near the drain, which increased the leakage current. This issue could be mitigated by using asymmetrical gate overlap/underlap design or thicker spacer for SDE I/I so that the twin defects are not located in the depletion region near the drain.

DoS detection in IEEE 802.11 with the presence of hidden nodes

PubMed Central

Soryal, Joseph; Liu, Xijie; Saadawi, Tarek

2013-01-01

The paper presents a novel technique to detect Denial of Service (DoS) attacks applied by misbehaving nodes in wireless networks with the presence of hidden nodes employing the widely used IEEE 802.11 Distributed Coordination Function (DCF) protocols described in the IEEE standard [1]. Attacker nodes alter the IEEE 802.11 DCF firmware to illicitly capture the channel via elevating the probability of the average number of packets transmitted successfully using up the bandwidth share of the innocent nodes that follow the protocol standards. We obtained the theoretical network throughput by solving two-dimensional Markov Chain model as described by Bianchi [2], and Liu and Saadawi [3] to determine the channel capacity. We validated the results obtained via the theoretical computations with the results obtained by OPNET simulator [4] to define the baseline for the average attainable throughput in the channel under standard conditions where all nodes follow the standards. The main goal of the DoS attacker is to prevent the innocent nodes from accessing the channel and by capturing the channel’s bandwidth. In addition, the attacker strives to appear as an innocent node that follows the standards. The protocol resides in every node to enable each node to police other nodes in its immediate wireless coverage area. All innocent nodes are able to detect and identify the DoS attacker in its wireless coverage area. We applied the protocol to two Physical Layer technologies: Direct Sequence Spread Spectrum (DSSS) and Frequency Hopping Spread Spectrum (FHSS) and the results are presented to validate the algorithm. PMID:25685510

DoS detection in IEEE 802.11 with the presence of hidden nodes.

PubMed

Soryal, Joseph; Liu, Xijie; Saadawi, Tarek

2014-07-01

The paper presents a novel technique to detect Denial of Service (DoS) attacks applied by misbehaving nodes in wireless networks with the presence of hidden nodes employing the widely used IEEE 802.11 Distributed Coordination Function (DCF) protocols described in the IEEE standard [1]. Attacker nodes alter the IEEE 802.11 DCF firmware to illicitly capture the channel via elevating the probability of the average number of packets transmitted successfully using up the bandwidth share of the innocent nodes that follow the protocol standards. We obtained the theoretical network throughput by solving two-dimensional Markov Chain model as described by Bianchi [2], and Liu and Saadawi [3] to determine the channel capacity. We validated the results obtained via the theoretical computations with the results obtained by OPNET simulator [4] to define the baseline for the average attainable throughput in the channel under standard conditions where all nodes follow the standards. The main goal of the DoS attacker is to prevent the innocent nodes from accessing the channel and by capturing the channel's bandwidth. In addition, the attacker strives to appear as an innocent node that follows the standards. The protocol resides in every node to enable each node to police other nodes in its immediate wireless coverage area. All innocent nodes are able to detect and identify the DoS attacker in its wireless coverage area. We applied the protocol to two Physical Layer technologies: Direct Sequence Spread Spectrum (DSSS) and Frequency Hopping Spread Spectrum (FHSS) and the results are presented to validate the algorithm.

Marching to the beat of Moore's Law

NASA Astrophysics Data System (ADS)

Borodovsky, Yan

2006-03-01

Area density scaling in integrated circuits, defined as transistor count per unit area, has followed the famous observation-cum-prediction by Gordon Moore for many generations. Known as "Moore's Law" which predicts density doubling every 18-24 month, it has provided all important synchronizing guidance and reference for tools and materials suppliers, IC manufacturers and their customers as to what minimal requirements their products and services need to meet to satisfy technical and financial expectations in support of the infrastructure required for the development and manufacturing of corresponding technology generation nodes. Multiple lithography solutions are usually under considerations for any given node. In general, three broad classes of solutions are considered: evolutionary - technology that is extension of existing technology infrastructure at similar or slightly higher cost and risk to schedule; revolutionary - technology that discards significant parts of the existing infrastructure at similar cost, higher risk to schedule but promises higher capability as compared to the evolutionary approach; and last but not least, disruptive - approach that as a rule promises similar or better capabilities, much lower cost and wholly unpredictable risk to schedule and products yields. This paper examines various lithography approaches, their respective merits against criteria of respective infrastructure availability, affordability and risk to IC manufacturer's schedules and strategy involved in developing and selecting best solution in an attempt to sort out key factors that will impact the decision on the lithography choice for large-scale manufacturing for the future technology nodes.

Performance and analysis of MAC protocols based on application

NASA Astrophysics Data System (ADS)

Yadav, Ravi; Daniel, A. K.

2018-04-01

Wireless Sensor Network is one of the rapid emerging technology in recent decades. It covers large application area as civilian and military. Wireless Sensor Network primary consists of sensor nodes having low-power, low cost and multifunctional activities to collaborates and communicates via wireless medium. The deployment of sensor nodes are adhoc in nature, so sensor nodes are auto organize themselves in such a way to communicate with each other. The characteristics make more challenging areas on WSNs. This paper gives overview about characteristics of WSNs, Architecture and Contention Based MAC protocol. The paper present analysis of various protocol based on performance.

Mobile Router Developed and Tested

NASA Technical Reports Server (NTRS)

Ivancic, William D.

2002-01-01

The NASA Glenn Research Center, under a NASA Space Act Agreement with Cisco Systems, has been performing joint networking research to apply Internet-based technologies and protocols to space-based communications. As a result of this research, NASA performed stringent performance testing of the mobile router, including the interaction of routing and the transport-level protocol. In addition, Cisco Systems developed the mobile router for both commercial and Government markets. The code has become part of the Cisco Systems Internetworking Operating System (IOS) as of release 12.2 (4) T--which will make this capability available to the community at large. The mobile router is software code that resides in a network router and enables entire networks to roam while maintaining connectivity to the Internet. This router code is pertinent to a myriad of applications for both Government and commercial sectors, including the "wireless battlefield." NASA and the Department of Defense will utilize this technology for near-planetary observation and sensing spacecraft. It is also a key enabling technology for aviation-based information applications. Mobile routing will make it possible for information such as weather, air traffic control, voice, and video to be transmitted to aircraft using Internet-based protocols. This technology shows great promise in reducing congested airways and mitigating aviation disasters due to bad weather. The mobile router can also be incorporated into emergency vehicles (such as ambulances and life-flight aircraft) to provide real-time connectivity back to the hospital and health-care experts, enabling the timely application of emergency care. Commercial applications include entertainment services, Internet protocol (IP) telephone, and Internet connectivity for cruise ships, commercial shipping, tour buses, aircraft, and eventually cars. A mobile router, which is based on mobile IP, allows hosts (mobile nodes) to seamlessly "roam" among various IP subnetworks. This is essential in many wireless networks. A mobile router, unlike a mobile IP node, allows entire networks to roam. Hence, a device connected to the mobile router does not need to be a mobile node because the mobile router provides the roaming capabilities. There are three basic elements in the mobile IP: the home agent, the foreign agent, and the mobile node. The home agent is a router on a mobile node's home network that tunnels datagrams for delivery to the mobile node when it is away from home. The foreign agent is a router on a remote network that provides routing services to a registered mobile node. The mobile node is a host or router that changes its point of attachment from one network or subnetwork to another. In mobile routing, virtual communications are maintained by the home agent, which forwards all packets for the mobile networks to the foreign agent. The foreign agent passes the packets to the mobile router, which then forwards the packets to the devices on its networks. As the mobile router moves, it will register with its home agent on its whereabouts via the foreign agent to assure continuous connectivity.

Overview on In-Space Internet Node Testbed (ISINT)

NASA Technical Reports Server (NTRS)

Richard, Alan M.; Kachmar, Brian A.; Fabian, Theodore; Kerczewski, Robert J.

2000-01-01

The Satellite Networks and Architecture Branch has developed the In-Space Internet Node Technology testbed (ISINT) for investigating the use of commercial Internet products for NASA missions. The testbed connects two closed subnets over a tabletop Ka-band transponder by using commercial routers and modems. Since many NASA assets are in low Earth orbits (LEO's), the testbed simulates the varying signal strength, changing propagation delay, and varying connection times that are normally experienced when communicating to the Earth via a geosynchronous orbiting (GEO) communications satellite. Research results from using this testbed will be used to determine which Internet technologies are appropriate for NASA's future communication needs.

Phase-change materials for non-volatile memory devices: from technological challenges to materials science issues

NASA Astrophysics Data System (ADS)

Noé, Pierre; Vallée, Christophe; Hippert, Françoise; Fillot, Frédéric; Raty, Jean-Yves

2018-01-01

Chalcogenide phase-change materials (PCMs), such as Ge-Sb-Te alloys, have shown outstanding properties, which has led to their successful use for a long time in optical memories (DVDs) and, recently, in non-volatile resistive memories. The latter, known as PCM memories or phase-change random access memories (PCRAMs), are the most promising candidates among emerging non-volatile memory (NVM) technologies to replace the current FLASH memories at CMOS technology nodes under 28 nm. Chalcogenide PCMs exhibit fast and reversible phase transformations between crystalline and amorphous states with very different transport and optical properties leading to a unique set of features for PCRAMs, such as fast programming, good cyclability, high scalability, multi-level storage capability, and good data retention. Nevertheless, PCM memory technology has to overcome several challenges to definitively invade the NVM market. In this review paper, we examine the main technological challenges that PCM memory technology must face and we illustrate how new memory architecture, innovative deposition methods, and PCM composition optimization can contribute to further improvements of this technology. In particular, we examine how to lower the programming currents and increase data retention. Scaling down PCM memories for large-scale integration means the incorporation of the PCM into more and more confined structures and raises materials science issues in order to understand interface and size effects on crystallization. Other materials science issues are related to the stability and ageing of the amorphous state of PCMs. The stability of the amorphous phase, which determines data retention in memory devices, can be increased by doping the PCM. Ageing of the amorphous phase leads to a large increase of the resistivity with time (resistance drift), which has up to now hindered the development of ultra-high multi-level storage devices. A review of the current understanding of all these issues is provided from a materials science point of view.

Statistical Memristor Modeling and Case Study in Neuromorphic Computing

DTIC Science & Technology

2012-06-01

use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and...Sundareswaran, R. Panda , and D. Pan, “Electrical impact of line-edge roughness on sub-45nm node standard cell,” in Proc. SPIE, vol. 7275, 2009, pp. 727 518–727 518–10. 590 26.3

Evolving Expert Knowledge Bases: Applications of Crowdsourcing and Serious Gaming to Advance Knowledge Development for Intelligent Tutoring Systems

ERIC Educational Resources Information Center

Floryan, Mark

2013-01-01

This dissertation presents a novel effort to develop ITS technologies that adapt by observing student behavior. In particular, we define an evolving expert knowledge base (EEKB) that structures a domain's information as a set of nodes and the relationships that exist between those nodes. The structure of this model is not the particularly novel…

Large-scale seismic waveform quality metric calculation using Hadoop

NASA Astrophysics Data System (ADS)

Magana-Zook, S.; Gaylord, J. M.; Knapp, D. R.; Dodge, D. A.; Ruppert, S. D.

2016-09-01

In this work we investigated the suitability of Hadoop MapReduce and Apache Spark for large-scale computation of seismic waveform quality metrics by comparing their performance with that of a traditional distributed implementation. The Incorporated Research Institutions for Seismology (IRIS) Data Management Center (DMC) provided 43 terabytes of broadband waveform data of which 5.1 TB of data were processed with the traditional architecture, and the full 43 TB were processed using MapReduce and Spark. Maximum performance of 0.56 terabytes per hour was achieved using all 5 nodes of the traditional implementation. We noted that I/O dominated processing, and that I/O performance was deteriorating with the addition of the 5th node. Data collected from this experiment provided the baseline against which the Hadoop results were compared. Next, we processed the full 43 TB dataset using both MapReduce and Apache Spark on our 18-node Hadoop cluster. These experiments were conducted multiple times with various subsets of the data so that we could build models to predict performance as a function of dataset size. We found that both MapReduce and Spark significantly outperformed the traditional reference implementation. At a dataset size of 5.1 terabytes, both Spark and MapReduce were about 15 times faster than the reference implementation. Furthermore, our performance models predict that for a dataset of 350 terabytes, Spark running on a 100-node cluster would be about 265 times faster than the reference implementation. We do not expect that the reference implementation deployed on a 100-node cluster would perform significantly better than on the 5-node cluster because the I/O performance cannot be made to scale. Finally, we note that although Big Data technologies clearly provide a way to process seismic waveform datasets in a high-performance and scalable manner, the technology is still rapidly changing, requires a high degree of investment in personnel, and will likely require significant changes in other parts of our infrastructure. Nevertheless, we anticipate that as the technology matures and third-party tool vendors make it easier to manage and operate clusters, Hadoop (or a successor) will play a large role in our seismic data processing.

Overlay improvement by exposure map based mask registration optimization

NASA Astrophysics Data System (ADS)

Shi, Irene; Guo, Eric; Chen, Ming; Lu, Max; Li, Gordon; Li, Rivan; Tian, Eric

2015-03-01

Along with the increased miniaturization of semiconductor electronic devices, the design rules of advanced semiconductor devices shrink dramatically. [1] One of the main challenges of lithography step is the layer-to-layer overlay control. Furthermore, DPT (Double Patterning Technology) has been adapted for the advanced technology node like 28nm and 14nm, corresponding overlay budget becomes even tighter. [2][3] After the in-die mask registration (pattern placement) measurement is introduced, with the model analysis of a KLA SOV (sources of variation) tool, it's observed that registration difference between masks is a significant error source of wafer layer-to-layer overlay at 28nm process. [4][5] Mask registration optimization would highly improve wafer overlay performance accordingly. It was reported that a laser based registration control (RegC) process could be applied after the pattern generation or after pellicle mounting and allowed fine tuning of the mask registration. [6] In this paper we propose a novel method of mask registration correction, which can be applied before mask writing based on mask exposure map, considering the factors of mask chip layout, writing sequence, and pattern density distribution. Our experiment data show if pattern density on the mask keeps at a low level, in-die mask registration residue error in 3sigma could be always under 5nm whatever blank type and related writer POSCOR (position correction) file was applied; it proves random error induced by material or equipment would occupy relatively fixed error budget as an error source of mask registration. On the real production, comparing the mask registration difference through critical production layers, it could be revealed that registration residue error of line space layers with higher pattern density is always much larger than the one of contact hole layers with lower pattern density. Additionally, the mask registration difference between layers with similar pattern density could also achieve under 5nm performance. We assume mask registration excluding random error is mostly induced by charge accumulation during mask writing, which may be calculated from surrounding exposed pattern density. Multi-loading test mask registration result shows that with x direction writing sequence, mask registration behavior in x direction is mainly related to sequence direction, but mask registration in y direction would be highly impacted by pattern density distribution map. It proves part of mask registration error is due to charge issue from nearby environment. If exposure sequence is chip by chip for normal multi chip layout case, mask registration of both x and y direction would be impacted analogously, which has also been proved by real data. Therefore, we try to set up a simple model to predict the mask registration error based on mask exposure map, and correct it with the given POSCOR (position correction) file for advanced mask writing if needed.

Improving local clustering based top-L link prediction methods via asymmetric link clustering information

NASA Astrophysics Data System (ADS)

Wu, Zhihao; Lin, Youfang; Zhao, Yiji; Yan, Hongyan

2018-02-01

Networks can represent a wide range of complex systems, such as social, biological and technological systems. Link prediction is one of the most important problems in network analysis, and has attracted much research interest recently. Many link prediction methods have been proposed to solve this problem with various techniques. We can note that clustering information plays an important role in solving the link prediction problem. In previous literatures, we find node clustering coefficient appears frequently in many link prediction methods. However, node clustering coefficient is limited to describe the role of a common-neighbor in different local networks, because it cannot distinguish different clustering abilities of a node to different node pairs. In this paper, we shift our focus from nodes to links, and propose the concept of asymmetric link clustering (ALC) coefficient. Further, we improve three node clustering based link prediction methods via the concept of ALC. The experimental results demonstrate that ALC-based methods outperform node clustering based methods, especially achieving remarkable improvements on food web, hamster friendship and Internet networks. Besides, comparing with other methods, the performance of ALC-based methods are very stable in both globalized and personalized top-L link prediction tasks.

A Mobile Asset Tracking System Architecture under Mobile-Stationary Co-Existing WSNs

PubMed Central

Kim, Tae Hyon; Jo, Hyeong Gon; Lee, Jae Shin; Kang, Soon Ju

2012-01-01

The tracking of multiple wireless mobile nodes is not easy with current legacy WSN technologies, due to their inherent technical complexity, especially when heavy traffic and frequent movement of mobile nodes are encountered. To enable mobile asset tracking under these legacy WSN systems, it is necessary to design a specific system architecture that can manage numerous mobile nodes attached to mobile assets. In this paper, we present a practical system architecture including a communication protocol, a three-tier network, and server-side middleware for mobile asset tracking in legacy WSNs consisting of mobile-stationary co-existing infrastructures, and we prove the functionality of this architecture through careful evaluation in a test bed. Evaluation was carried out in a microwave anechoic chamber as well as on a straight road near our office. We evaluated communication mobility performance between mobile and stationary nodes, location-awareness performance, system stability under numerous mobile node conditions, and the successful packet transfer rate according to the speed of the mobile nodes. The results indicate that the proposed architecture is sufficiently robust for application in realistic mobile asset tracking services that require a large number of mobile nodes. PMID:23242277

SpicyNodes Radial Map Engine

NASA Astrophysics Data System (ADS)

Douma, M.; Ligierko, G.; Angelov, I.

2008-10-01

The need for information has increased exponentially over the past decades. The current systems for constructing, exploring, classifying, organizing, and searching information face the growing challenge of enabling their users to operate efficiently and intuitively in knowledge-heavy environments. This paper presents SpicyNodes, an advanced user interface for difficult interaction contexts. It is based on an underlying structure known as a radial map, which allows users to manipulate and interact in a natural manner with entities called nodes. This technology overcomes certain limitations of existing solutions and solves the problem of browsing complex sets of linked information. SpicyNodes is also an organic system that projects users into a living space, stimulating exploratory behavior and fostering creative thought. Our interactive radial layout is used for educational purposes and has the potential for numerous other applications.

Wi-GIM system: a new wireless sensor network (WSN) for accurate ground instability monitoring

NASA Astrophysics Data System (ADS)

Mucchi, Lorenzo; Trippi, Federico; Schina, Rosa; Fornaciai, Alessandro; Gigli, Giovanni; Nannipieri, Luca; Favalli, Massimiliano; Marturia Alavedra, Jordi; Intrieri, Emanuele; Agostini, Andrea; Carnevale, Ennio; Bertolini, Giovanni; Pizziolo, Marco; Casagli, Nicola

2016-04-01

Landslides are among the most serious and common geologic hazards around the world. Their impact on human life is expected to increase in the next future as a consequence of human-induced climate change as well as the population growth in proximity of unstable slopes. Therefore, developing better performing technologies for monitoring landslides and providing local authorities with new instruments able to help them in the decision making process, is becoming more and more important. The recent progresses in Information and Communication Technologies (ICT) allow us to extend the use of wireless technologies in landslide monitoring. In particular, the developments in electronics components have permitted to lower the price of the sensors and, at the same time, to actuate more efficient wireless communications. In this work we present a new wireless sensor network (WSN) system, designed and developed for landslide monitoring in the framework of EU Wireless Sensor Network for Ground Instability Monitoring - Wi-GIM project (LIFE12 ENV/IT/001033). We show the preliminary performance of the Wi-GIM system after the first period of monitoring on the active Roncovetro Landslide and on a large subsiding area in the neighbourhood of Sallent village. The Roncovetro landslide is located in the province of Reggio Emilia (Italy) and moved an inferred volume of about 3 million cubic meters. Sallent village is located at the centre of the Catalan evaporitic basin in Spain. The Wi-GIM WSN monitoring system consists of three levels: 1) Master/Gateway level coordinates the WSN and performs data aggregation and local storage; 2) Master/Server level takes care of acquiring and storing data on a remote server; 3) Nodes level that is based on a mesh of peripheral nodes, each consisting in a sensor board equipped with sensors and wireless module. The nodes are located in the landslide ground perimeter and are able to create an ad-hoc WSN. The location of each sensor on the ground is determined by integrating an ultra wideband technology with a radar technology; this integration allows to push the accuracy towards the cm. An extended Kalman filter is also used to reduce the noise and enhance the accuracy of the measures. The sensor nodes are organized as a hierarchical cluster, composed by one master and several slave nodes. The landslide movement is detected by comparing day by day the x, y and z coordinates of each nodes. The 3D movements of each sensor during the monitoring period are represented as vector and displayed on a Web-GIS which is accessible at the following link: www.life-wigim.eu.

Line edge roughness (LER) mitigation studies specific to interference-like lithography

NASA Astrophysics Data System (ADS)

Baylav, Burak; Estroff, Andrew; Xie, Peng; Smith, Bruce W.

2013-04-01

Line edge roughness (LER) is a common problem to most lithography approaches and is seen as the main resolution limiter for advanced technology nodes1. There are several contributors to LER such as chemical/optical shot noise, random nature of acid diffusion, development process, and concentration of acid generator/base quencher. Since interference-like lithography (IL) is used to define one directional gridded patterns, some LER mitigation approaches specific to IL-like imaging can be explored. Two methods investigated in this work for this goal are (i) translational image averaging along the line direction and (ii) pupil plane filtering. Experiments regarding the former were performed on both interferometric and projection lithography systems. Projection lithography experiments showed a small amount of reduction in low/mid frequency LER value for image averaged cases at pitch of 150 nm (193 nm illumination, 0.93 NA) with less change for smaller pitches. Aerial image smearing did not significantly increase LER since it was directional. Simulation showed less than 1% reduction in NILS (compared to a static, smooth mask equivalent) with ideal alignment. In addition, description of pupil plane filtering on the transfer of mask roughness is given. When astigmatism-like aberrations were introduced in the pupil, transfer of mask roughness is decreased at best focus. It is important to exclude main diffraction orders from the filtering to prevent contrast and NILS loss. These ideas can be valuable as projection lithography approaches to conditions similar to IL (e.g. strong RET methods).

LoRa Scalability: A Simulation Model Based on Interference Measurements

PubMed Central

Haxhibeqiri, Jetmir; Van den Abeele, Floris; Moerman, Ingrid; Hoebeke, Jeroen

2017-01-01

LoRa is a long-range, low power, low bit rate and single-hop wireless communication technology. It is intended to be used in Internet of Things (IoT) applications involving battery-powered devices with low throughput requirements. A LoRaWAN network consists of multiple end nodes that communicate with one or more gateways. These gateways act like a transparent bridge towards a common network server. The amount of end devices and their throughput requirements will have an impact on the performance of the LoRaWAN network. This study investigates the scalability in terms of the number of end devices per gateway of single-gateway LoRaWAN deployments. First, we determine the intra-technology interference behavior with two physical end nodes, by checking the impact of an interfering node on a transmitting node. Measurements show that even under concurrent transmission, one of the packets can be received under certain conditions. Based on these measurements, we create a simulation model for assessing the scalability of a single gateway LoRaWAN network. We show that when the number of nodes increases up to 1000 per gateway, the losses will be up to 32%. In such a case, pure Aloha will have around 90% losses. However, when the duty cycle of the application layer becomes lower than the allowed radio duty cycle of 1%, losses will be even lower. We also show network scalability simulation results for some IoT use cases based on real data. PMID:28545239

LoRa Scalability: A Simulation Model Based on Interference Measurements.

PubMed

Haxhibeqiri, Jetmir; Van den Abeele, Floris; Moerman, Ingrid; Hoebeke, Jeroen

2017-05-23

LoRa is a long-range, low power, low bit rate and single-hop wireless communication technology. It is intended to be used in Internet of Things (IoT) applications involving battery-powered devices with low throughput requirements. A LoRaWAN network consists of multiple end nodes that communicate with one or more gateways. These gateways act like a transparent bridge towards a common network server. The amount of end devices and their throughput requirements will have an impact on the performance of the LoRaWAN network. This study investigates the scalability in terms of the number of end devices per gateway of single-gateway LoRaWAN deployments. First, we determine the intra-technology interference behavior with two physical end nodes, by checking the impact of an interfering node on a transmitting node. Measurements show that even under concurrent transmission, one of the packets can be received under certain conditions. Based on these measurements, we create a simulation model for assessing the scalability of a single gateway LoRaWAN network. We show that when the number of nodes increases up to 1000 per gateway, the losses will be up to 32%. In such a case, pure Aloha will have around 90% losses. However, when the duty cycle of the application layer becomes lower than the allowed radio duty cycle of 1%, losses will be even lower. We also show network scalability simulation results for some IoT use cases based on real data.

Autonomous Decentralized Voltage Profile Control of Super Distributed Energy System using Multi-agent Technology

NASA Astrophysics Data System (ADS)

Tsuji, Takao; Hara, Ryoichi; Oyama, Tsutomu; Yasuda, Keiichiro

A super distributed energy system is a future energy system in which the large part of its demand is fed by a huge number of distributed generators. At one time some nodes in the super distributed energy system behave as load, however, at other times they behave as generator - the characteristic of each node depends on the customers' decision. In such situation, it is very difficult to regulate voltage profile over the system due to the complexity of power flows. This paper proposes a novel control method of distributed generators that can achieve the autonomous decentralized voltage profile regulation by using multi-agent technology. The proposed multi-agent system employs two types of agent; a control agent and a mobile agent. Control agents generate or consume reactive power to regulate the voltage profile of neighboring nodes and mobile agents transmit the information necessary for VQ-control among the control agents. The proposed control method is tested through numerical simulations.

Research on the key technologies of 3D spatial data organization and management for virtual building environments

NASA Astrophysics Data System (ADS)

Gong, Jun; Zhu, Qing

2006-10-01

As the special case of VGE in the fields of AEC (architecture, engineering and construction), Virtual Building Environment (VBE) has been broadly concerned. Highly complex, large-scale 3d spatial data is main bottleneck of VBE applications, so 3d spatial data organization and management certainly becomes the core technology for VBE. This paper puts forward 3d spatial data model for VBE, and the performance to implement it is very high. Inherent storage method of CAD data makes data redundant, and doesn't concern efficient visualization, which is a practical bottleneck to integrate CAD model, so An Efficient Method to Integrate CAD Model Data is put forward. Moreover, Since the 3d spatial indices based on R-tree are usually limited by their weakness of low efficiency due to the severe overlap of sibling nodes and the uneven size of nodes, a new node-choosing algorithm of R-tree are proposed.

Development of Implantable Wireless Sensor Nodes for Animal Husbandry and MedTech Innovation.

PubMed

Lu, Jian; Zhang, Lan; Zhang, Dapeng; Matsumoto, Sohei; Hiroshima, Hiroshi; Maeda, Ryutaro; Sato, Mizuho; Toyoda, Atsushi; Gotoh, Takafumi; Ohkohchi, Nobuhiro

2018-03-26

In this paper, we report the development, evaluation, and application of ultra-small low-power wireless sensor nodes for advancing animal husbandry, as well as for innovation of medical technologies. A radio frequency identification (RFID) chip with hybrid interface and neglectable power consumption was introduced to enable switching of ON/OFF and measurement mode after implantation. A wireless power transmission system with a maximum efficiency of 70% and an access distance of up to 5 cm was developed to allow the sensor node to survive for a duration of several weeks from a few minutes' remote charge. The results of field tests using laboratory mice and a cow indicated the high accuracy of the collected biological data and bio-compatibility of the package. As a result of extensive application of the above technologies, a fully solid wireless pH sensor and a surgical navigation system using artificial magnetic field and a 3D MEMS magnetic sensor are introduced in this paper, and the preliminary experimental results are presented and discussed.

Planning Multitechnology Access Networks with Performance Constraints

NASA Astrophysics Data System (ADS)

Chamberland, Steven

Considering the number of access network technologies and the investment needed for the “last mile” of a solution, in today’s highly competitive markets, planning tools are crucial for the service providers to optimize the network costs and accelerate the planning process. In this paper, we propose to tackle the problem of planning access networks composed of four technologies/architectures: the digital subscriber line (xDSL) technologies deployed directly from the central office (CO), the fiber-to-the-node (FTTN), the fiber-to-the-micro-node (FTTn) and the fiber-to-the-premises (FTTP). A mathematical programming model is proposed for this planning problem that is solved using a commercial implementation of the branch-and-bound algorithm. Next, a detailed access network planning example is presented followed by a systematic set of experiments designed to assess the performance of the proposed approach.

Doxorubicin loaded superparamagnetic PLGA-iron oxide multifunctional microbubbles for dual-mode US/MR imaging and therapy of metastasis in lymph nodes.

PubMed

Niu, Chengcheng; Wang, Zhigang; Lu, Guangming; Krupka, Tianyi M; Sun, Yang; You, Yufang; Song, Weixiang; Ran, Haitao; Li, Pan; Zheng, Yuanyi

2013-03-01

Current strategies for tumor-induced sentinel lymph node detection and metastasis therapy have limitations. In this work, we co-encapsulated iron oxide nanoparticles and chemotherapeutic drug into poly(lactic-co-glycolic acid) (PLGA) microbubbles to form multifunctional polymer microbubbles (MPMBs) for both tumor lymph node imaging and therapy. Fe(3)O(4) nanoparticles and doxorubicin (DOX) co-encapsulated PLGA microbubbles were prepared and filled with perfluorocarbon gas. Enhancement of ultrasound (US)/magnetic resonance (MR) imaging and US triggered drug delivery were evaluated both in vitro and in vivo. The MPMBs exhibited characters like narrow size distribution and smooth surface with a mean diameter of 868.0 ± 68.73 nm. In addition, varying the concentration of Fe(3)O(4) nanoparticles in the bubbles did not significantly influence the DOX encapsulation efficiency or drug loading efficiency. Our in vitro results demonstrated that these MPMBs could enhance both US and MR imaging which was further validated in vivo showing that these MPMBs enhanced tumor lymph nodes signals. The anti-tumor effect of MPMBs mediated chemotherapy was assessed in vivo using end markers like tumor proliferation index, micro blood vessel density and micro lymphatic vessel density, which were shown consistently the lowest after the MPMBs plus sonication treatment compared to controls. In line with these findings, the tumor cell apoptotic index was found the largest after the MPMBs plus sonication treatment. In conclusion, we have successfully developed a doxorubicin loaded superparamagnetic PLGA-Iron Oxide multifunctional theranostic agent for dual-mode US/MR Imaging of lymph node, and for low frequency US triggered therapy of metastasis in lymph nodes, which might provide a strategy for the imaging and chemotherapy of primary tumor and their metastases. Copyright © 2012 Elsevier Ltd. All rights reserved.

Demonstration of electronic design automation flow for massively parallel e-beam lithography

NASA Astrophysics Data System (ADS)

Brandt, Pieter; Belledent, Jérôme; Tranquillin, Céline; Figueiro, Thiago; Meunier, Stéfanie; Bayle, Sébastien; Fay, Aurélien; Milléquant, Matthieu; Icard, Beatrice; Wieland, Marco

2014-07-01

For proximity effect correction in 5 keV e-beam lithography, three elementary building blocks exist: dose modulation, geometry (size) modulation, and background dose addition. Combinations of these three methods are quantitatively compared in terms of throughput impact and process window (PW). In addition, overexposure in combination with negative bias results in PW enhancement at the cost of throughput. In proximity effect correction by over exposure (PEC-OE), the entire layout is set to fixed dose and geometry sizes are adjusted. In PEC-dose to size (DTS) both dose and geometry sizes are locally optimized. In PEC-background (BG), a background is added to correct the long-range part of the point spread function. In single e-beam tools (Gaussian or Shaped-beam), throughput heavily depends on the number of shots. In raster scan tools such as MAPPER Lithography's FLX 1200 (MATRIX platform) this is not the case and instead of pattern density, the maximum local dose on the wafer is limiting throughput. The smallest considered half-pitch is 28 nm, which may be considered the 14-nm node for Metal-1 and the 10-nm node for the Via-1 layer, achieved in a single exposure with e-beam lithography. For typical 28-nm-hp Metal-1 layouts, it was shown that dose latitudes (size of process window) of around 10% are realizable with available PEC methods. For 28-nm-hp Via-1 layouts this is even higher at 14% and up. When the layouts do not reach the highest densities (up to 10∶1 in this study), PEC-BG and PEC-OE provide the capability to trade throughput for dose latitude. At the highest densities, PEC-DTS is required for proximity correction, as this method adjusts both geometry edges and doses and will reduce the dose at the densest areas. For 28-nm-hp lines critical dimension (CD), hole&dot (CD) and line ends (edge placement error), the data path errors are typically 0.9, 1.0 and 0.7 nm (3σ) and below, respectively. There is not a clear data path performance difference between the investigated PEC methods. After the simulations, the methods were successfully validated in exposures on a MAPPER pre-alpha tool. A 28-nm half pitch Metal-1 and Via-1 layouts show good performance in resist that coincide with the simulation result. Exposures of soft-edge stitched layouts show that beam-to-beam position errors up to ±7 nm specified for FLX 1200 show no noticeable impact on CD. The research leading to these results has been performed in the frame of the industrial collaborative consortium IMAGINE.

Portable real-time optical coherence tomography system for intraoperative imaging and staging of breast cancer

NASA Astrophysics Data System (ADS)

Nguyen, Freddy T.; Zysk, Adam M.; Kotynek, Jan G.; Bellafiore, Frank J.; Rowland, Kendrith M.; Johnson, Patricia A.; Chaney, J. Eric; Boppart, Stephen A.

2007-02-01

Breast cancer continues to be one of the most widely diagnosed forms of cancer amongst women and the second leading type of cancer deaths amongst women. The recurrence rate of breast cancer is highly dependent on several factors including the complete removal of the primary tumor and the presence of cancer cells in involved lymph nodes. The metastatic spread and staging of breast cancer is also evaluated through the nodal assessment of the regional lymphatic system. A portable real-time spectral domain optical coherence tomography system is being presented as a clinical diagnostic tool in the intraoperative delineation of tumor margins as well as for real time lymph node assessment. The system employs a super luminescent diode centered at 1310 nm with a bandwidth of 92 nm. Using a spectral domain detection system, the data is acquired at a rate of 5 KHz / axial scan. The sample arm is a galvanometer scanning telecentric probe with an objective lens (f = 60 mm, confocal parameter = 1.5 mm) yielding an axial resolution of 8.3 μm and a transverse resolution of 35.0 μm. Images of tumor margins are acquired in the operating room ex vivo on freshly excised human tissue specimen. This data shows the potential of the use of OCT in defining the structural tumor margins in breast cancer. Images taken from ex-vivo samples on the bench system clearly delineate the differences between clusters of tumor cells and nearby adipose cells. In addition, the data shows the potential for OCT as a diagnostic tool in the staging of cancer metastasis through locoregional lymph node assessment.

Highly sensitive fluorescence detection of metastatic lymph nodes of gastric cancer with photo-oxidation of protoporphyrin IX.

PubMed

Koizumi, N; Harada, Y; Beika, M; Minamikawa, T; Yamaoka, Y; Dai, P; Murayama, Y; Yanagisawa, A; Otsuji, E; Tanaka, H; Takamatsu, T

2016-08-01

The establishment of a precise and rapid method to detect metastatic lymph nodes (LNs) is essential to perform less invasive surgery with reduced gastrectomy along with reduced lymph node dissection. We herein describe a novel imaging strategy to detect 5-aminolevulinic acid (5-ALA)-induced protoporphyrin IX (PpIX) fluorescence in excised LNs specifically with reduced effects of tissue autofluorescence based on photo-oxidation of PpIX. We applied the method in a clinical setting, and evaluated its feasibility. To reduce the unfavorable effect of autofluorescence, we focused on photo-oxidation of PpIX: Following light irradiation, PpIX changes into another substance, photo-protoporphyrin, via an oxidative process, which has a different spectral peak, at 675 nm, whereas PpIX has its spectral peak at 635 nm. Based on the unique spectral alteration, fluorescence spectral imaging before and after light irradiation and subsequent originally-developed image processing was performed. Following in vitro study, we applied this method to a total of 662 excised LNs obtained from 30 gastric cancer patients administered 5-ALA preoperatively. Specific visualization of PpIX was achieved in in vitro study. The method allowed highly sensitive detection of metastatic LNs, with sensitivity of 91.9% and specificity of 90.8% in the in vivo clinical trial. Receiver operating characteristic analysis indicated high diagnostic accuracy, with the area under the curve of 0.926. We established a highly sensitive and specific 5-ALA-induced fluorescence imaging method applicable in clinical settings. The novel method has a potential to become a useful tool for intraoperative rapid diagnosis of LN metastasis. Copyright © 2016 Elsevier Ltd. All rights reserved.

Guiding gate-etch process development using 3D surface reaction modeling for 7nm and beyond

NASA Astrophysics Data System (ADS)

Dunn, Derren; Sporre, John R.; Deshpande, Vaibhav; Oulmane, Mohamed; Gull, Ronald; Ventzek, Peter; Ranjan, Alok

2017-03-01

Increasingly, advanced process nodes such as 7nm (N7) are fundamentally 3D and require stringent control of critical dimensions over high aspect ratio features. Process integration in these nodes requires a deep understanding of complex physical mechanisms to control critical dimensions from lithography through final etch. Polysilicon gate etch processes are critical steps in several device architectures for advanced nodes that rely on self-aligned patterning approaches to gate definition. These processes are required to meet several key metrics: (a) vertical etch profiles over high aspect ratios; (b) clean gate sidewalls free of etch process residue; (c) minimal erosion of liner oxide films protecting key architectural elements such as fins; and (e) residue free corners at gate interfaces with critical device elements. In this study, we explore how hybrid modeling approaches can be used to model a multi-step finFET polysilicon gate etch process. Initial parts of the patterning process through hardmask assembly are modeled using process emulation. Important aspects of gate definition are then modeled using a particle Monte Carlo (PMC) feature scale model that incorporates surface chemical reactions.1 When necessary, species and energy flux inputs to the PMC model are derived from simulations of the etch chamber. The modeled polysilicon gate etch process consists of several steps including a hard mask breakthrough step (BT), main feature etch steps (ME), and over-etch steps (OE) that control gate profiles at the gate fin interface. An additional constraint on this etch flow is that fin spacer oxides are left intact after final profile tuning steps. A natural optimization required from these processes is to maximize vertical gate profiles while minimizing erosion of fin spacer films.2

Comparative study of angiostatic and anti-invasive gene expressions as prognostic factors in gastric cancer.

PubMed

Lee, J H; Koh, J T; Shin, B A; Ahn, K Y; Roh, J H; Kim, Y J; Kim, K K

2001-02-01

Genes involving angiogenesis and metastasis play an important role in the progression and infiltration of cancer. We examined the expressions of various angiostatic and potential invasion/metastasis suppressor genes through RT-PCR analyses in 32 gastric cancer specimens with or without distant metastasis. The expressions of the invasion/metastasis suppressor, nm23 and E-cadherin increased much more in the cancer tissue (CT) and metastatic lymph node (MLN) than in the extraneoplastic mucosa (EM) and non-metastatic lymph node (NLN), respectively. The expressions of the angiostatic factor, angiopoietin 2 and thrombospondin 2 increased in the CT and MLN as compared with the EM and NLN, respectively. The newly cloned angiostatic factor, brain-specific angiogenesis inhibitor 1 (BAI1) decreased much more in the CT and MLN than the EM and NLN, respectively. However, BAI1 increased in the CT compared with the EM among the patients with poor prognosis and distant metastasis, such as liver or peritoneum. The expressions of the invasive factor, matrix metalloproteinase-2 and its suppressor, tissue inhibitor metalloproteinase-2 (TIMP-2) increased in the CM as compared with the EM, but the increased expression pattern of these genes in the CT became blunted among the patients with good prognosis. Our results indicate that BAI1 and TIMP-2 expressions in the extraneoplastic mucosa and non-metastatic lymph nodes were not suppressed in the patients with good prognosis, but increased expressions of angiopoietin 2, thrombospondin 2, TIMP-2, nm23 and E-cadherin in the tumor tissue did not lead to a long survival after operation. It is suggested that the extent of BAI1 and TIMP-2 expression in the gastric mucosa may be an important prognostic factor for predicting survival in gastric cancer.

Pin routability and pin access analysis on standard cells for layout optimization

NASA Astrophysics Data System (ADS)

Chen, Jian; Wang, Jun; Zhu, ChengYu; Xu, Wei; Li, Shuai; Lin, Eason; Ou, Odie; Lai, Ya-Chieh; Qu, Shengrui

2018-03-01

At advanced process nodes, especially at sub-28nm technology, pin accessibility and routability of standard cells has become one of the most challenging design issues due to the limited router tracks and the increased pin density. If this issue can't be found and resolved during the cell design stage, the pin access problem will be very difficult to be fixed in implementation stage and will make the low efficiency for routing. In this paper, we will introduce a holistic approach for the pin accessibility scoring and routability analysis. For accessibility, the systematic calculator which assigns score for each pin will search the available access points, consider the surrounded router layers, basic design rule and allowed via geometry. Based on the score, the "bad" pins can be found and modified. On pin routability analysis, critical pin points (placing via on this point would lead to failed via insertion) will be searched out for either layout optimization guide or set as OBS for via insertion blocking. By using this pin routability and pin access analysis flow, we are able to improve the library quality and performance.

Evaluation of 3D metrology potential using a multiple detector CDSEM

NASA Astrophysics Data System (ADS)

Hakii, Hidemitsu; Yonekura, Isao; Nishiyama, Yasushi; Tanaka, Keishi; Komoto, Kenji; Murakawa, Tsutomu; Hiroyama, Mitsuo; Shida, Soichi; Kuribara, Masayuki; Iwai, Toshimichi; Matsumoto, Jun; Nakamura, Takayuki

2012-06-01

As feature sizes of semiconductor device structures have continuously decreased, needs for metrology tools with high precision and excellent linearity over actual pattern sizes have been growing. And it has become important to measure not only two-dimensional (2D) but also three-dimensional (3D) shapes of patterns at 22 nm node and beyond. To meet requirements for 3D metrology capabilities, various pattern metrology tools have been developed. Among those, we assume that CDSEM metrology is the most qualified candidate in the light of its non-destructive, high throughput measurement capabilities that are expected to be extended to the much-awaited 3D metrology technology. On the basis of this supposition, we have developed the 3D metrology system, in which side wall angles and heights of photomask patterns can be measured with high accuracy through analyzing CDSEM images generated by multi-channel detectors. In this paper, we will discuss our attempts to measure 3D shapes of defect patterns on a photomask by using Advantest's "Multi Vision Metrology SEM" E3630 (MVM-SEM' E3630).

Biocompatible near-infrared fluorescent nanoparticles for macro and microscopic in vivo functional bioimaging

PubMed Central

Chu, Liliang; Wang, Shaowei; Li, Kanghui; Xi, Wang; Zhao, Xinyuan; Qian, Jun

2014-01-01

Near-infrared (NIR) imaging technology has been widely used for biomedical research and applications, since it can achieve deep penetration in biological tissues due to less absorption and scattering of NIR light. In our research, polymer nanoparticles with NIR fluorophores doped were synthesized. The morphology, absorption/emission features and chemical stability of the fluorescent nanoparticles were characterized, separately. NIR fluorescent nanoparticles were then utilized as bright optical probes for macro in vivo imaging of mice, including sentinel lymph node (SLN) mapping, as well as distribution and excretion monitoring of nanoparticles in animal body. Furthermore, we applied the NIR fluorescent nanoparticles in in vivo microscopic bioimaging via a confocal microscope. Under the 635 nm-CW excitation, the blood vessel architecture in the ear and the brain of mice, which were administered with nanoparticles, was visualized very clearly. The imaging depth of our one-photon microscopy, which was assisted with NIR fluorescent nanoprobes, can reach as deep as 500 μm. Our experiments show that NIR fluorescent nanoparticles have great potentials in various deep-tissue imaging applications. PMID:25426331

Atomic switch: atom/ion movement controlled devices for beyond von-neumann computers.

PubMed

Hasegawa, Tsuyoshi; Terabe, Kazuya; Tsuruoka, Tohru; Aono, Masakazu

2012-01-10

An atomic switch is a nanoionic device that controls the diffusion of metal ions/atoms and their reduction/oxidation processes in the switching operation to form/annihilate a conductive path. Since metal atoms can provide a highly conductive channel even if their cluster size is in the nanometer scale, atomic switches may enable downscaling to smaller than the 11 nm technology node, which is a great challenge for semiconductor devices. Atomic switches also possess novel characteristics, such as high on/off ratios, very low power consumption and non-volatility. The unique operating mechanisms of these devices have enabled the development of various types of atomic switch, such as gap-type and gapless-type two-terminal atomic switches and three-terminal atomic switches. Novel functions, such as selective volatile/nonvolatile, synaptic, memristive, and photo-assisted operations have been demonstrated. Such atomic switch characteristics can not only improve the performance of present-day electronic systems, but also enable development of new types of electronic systems, such as beyond von- Neumann computers. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Scatterometry-based metrology for SAQP pitch walking using virtual reference

NASA Astrophysics Data System (ADS)

Kagalwala, Taher; Vaid, Alok; Mahendrakar, Sridhar; Lenahan, Michael; Fang, Fang; Isbester, Paul; Shifrin, Michael; Etzioni, Yoav; Cepler, Aron; Yellai, Naren; Dasari, Prasad; Bozdog, Cornel

2016-03-01

Advanced technology nodes, 10nm and beyond, employing multi-patterning techniques for pitch reduction pose new process and metrology challenges in maintaining consistent positioning of structural features. Self-Aligned Quadruple Patterning (SAQP) process is used to create the Fins in FinFET devices with pitch values well below optical lithography limits. The SAQP process bares compounding effects from successive Reactive Ion Etch (RIE) and spacer depositions. These processes induce a shift in the pitch value from one fin compared to another neighboring fin. This is known as pitch walking. Pitch walking affects device performance as well as later processes which work on an assumption that there is consistent spacing between fins. In SAQP there are 3 pitch walking parameters of interest, each linked to specific process steps in the flow. These pitch walking parameters are difficult to discriminate at a specific process step by singular evaluation technique or even with reference metrology such as Transmission Electron Microscopy (TEM). In this paper we will utilize a virtual reference to generate a scatterometry model to measure pitch walk for SAQP process flow.

Measuring self-aligned quadruple patterning pitch walking with scatterometry-based metrology utilizing virtual reference

NASA Astrophysics Data System (ADS)

Kagalwala, Taher; Vaid, Alok; Mahendrakar, Sridhar; Lenahan, Michael; Fang, Fang; Isbester, Paul; Shifrin, Michael; Etzioni, Yoav; Cepler, Aron; Yellai, Naren; Dasari, Prasad; Bozdog, Cornel

2016-10-01

Advanced technology nodes, 10 nm and beyond, employing multipatterning techniques for pitch reduction pose new process and metrology challenges in maintaining consistent positioning of structural features. A self-aligned quadruple patterning (SAQP) process is used to create the fins in FinFET devices with pitch values well below optical lithography limits. The SAQP process bears the compounding effects from successive reactive ion etch and spacer depositions. These processes induce a shift in the pitch value from one fin compared to another neighboring fin. This is known as pitch walking. Pitch walking affects device performance as well as later processes, which work on an assumption that there is consistent spacing between fins. In SAQP, there are three pitch walking parameters of interest, each linked to specific process steps in the flow. These pitch walking parameters are difficult to discriminate at a specific process step by singular evaluation technique or even with reference metrology, such as transmission electron microscopy. We will utilize a virtual reference to generate a scatterometry model to measure pitch walk for SAQP process flow.

Understanding and reduction of defects on finished EUV masks

NASA Astrophysics Data System (ADS)

Liang, Ted; Sanchez, Peter; Zhang, Guojing; Shu, Emily; Nagpal, Rajesh; Stivers, Alan

2005-05-01

To reduce the risk of EUV lithography adaptation for the 32nm technology node in 2009, Intel has operated a EUV mask Pilot Line since early 2004. The Pilot Line integrates all the necessary process modules including common tool sets shared with current photomask production as well as EUV specific tools. This integrated endeavor ensures a comprehensive understanding of any issues, and development of solutions for the eventual fabrication of defect-free EUV masks. Two enabling modules for "defect-free" masks are pattern inspection and repair, which have been integrated into the Pilot Line. This is the first time we are able to look at real defects originated from multilayer blanks and patterning process on finished masks over entire mask area. In this paper, we describe our efforts in the qualification of DUV pattern inspection and electron beam mask repair tools for Pilot Line operation, including inspection tool sensitivity, defect classification and characterization, and defect repair. We will discuss the origins of each of the five classes of defects as seen by DUV pattern inspection tool on finished masks, and present solutions of eliminating and mitigating them.

Trend of tunnel magnetoresistance and variation in threshold voltage for keeping data load robustness of metal–oxide–semiconductor/magnetic tunnel junction hybrid latches

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ohsawa, T.; Ikeda, S.; Hanyu, T.

The robustness of data load of metal–oxide–semiconductor/magnetic tunnel junction (MOS/MTJ) hybrid latches at power-on is examined by using Monte Carlo simulation with the variations in magnetoresistances for MTJs and in threshold voltages for MOSFETs involved in 90 nm technology node. Three differential pair type spin-transfer-torque-magnetic random access memory cells (4T2MTJ, 6T2MTJ, and 8T2MTJ) are compared for their successful data load at power-on. It is found that the 4T2MTJ cell has the largest pass area in the shmoo plot in TMR ratio (tunnel magnetoresistance ratio) and V{sub dd} in which a whole 256 kb cell array can be powered-on successfully. The minimum TMRmore » ratio for the 4T2MTJ in 0.9 V < V{sub dd} < 1.9 V is 140%, while the 6T2MTJ and the 8T2MTJ cells require TMR ratio larger than 170%.« less

Sentinel lymph node detection in breast cancer patients using surgical navigation system based on fluorescence molecular imaging technology

NASA Astrophysics Data System (ADS)

Chi, Chongwei; Kou, Deqiang; Ye, Jinzuo; Mao, Yamin; Qiu, Jingdan; Wang, Jiandong; Yang, Xin; Tian, Jie

2015-03-01

Introduction: Precision and personalization treatments are expected to be effective methods for early stage cancer studies. Breast cancer is a major threat to women's health and sentinel lymph node biopsy (SLNB) is an effective method to realize precision and personalized treatment for axillary lymph node (ALN) negative patients. In this study, we developed a surgical navigation system (SNS) based on optical molecular imaging technology for the precise detection of the sentinel lymph node (SLN) in breast cancer patients. This approach helps surgeons in precise positioning during surgery. Methods: The SNS was mainly based on the technology of optical molecular imaging. A novel optical path has been designed in our hardware system and a feature-matching algorithm has been devised to achieve rapid fluorescence and color image registration fusion. Ten in vivo studies of SLN detection in rabbits using indocyanine green (ICG) and blue dye were executed for system evaluation and 8 breast cancer patients accepted the combination method for therapy. Results: The detection rate of the combination method was 100% and an average of 2.6 SLNs was found in all patients. Our results showed that the method of using SNS to detect SLN has the potential to promote its application. Conclusion: The advantage of this system is the real-time tracing of lymph flow in a one-step procedure. The results demonstrated the feasibility of the system for providing accurate location and reliable treatment for surgeons. Our approach delivers valuable information and facilitates more detailed exploration for image-guided surgery research.

Development of GaN-based microchemical sensor nodes

NASA Technical Reports Server (NTRS)

Prokopuk, Nicholas; Son, Kyung-Ah; George, Thomas; Moon, Jeong S.

2005-01-01

Sensors based III-N technology are gaining significant interest due to their potential for monolithic integration of RF transceivers and light sources and the capability of high temperature operations. We are developing a GaN-based micro chemical sensor node for remote detection of chemical toxins, and present electrical responses of AlGaN/GaN HEMT (High Electron Mobility Transistor) sensors to chemical toxins as well as other common gases.

Proactive Fault Tolerance Using Preemptive Migration

DOE Office of Scientific and Technical Information (OSTI.GOV)

Engelmann, Christian; Vallee, Geoffroy R; Naughton, III, Thomas J

2009-01-01

Proactive fault tolerance (FT) in high-performance computing is a concept that prevents compute node failures from impacting running parallel applications by preemptively migrating application parts away from nodes that are about to fail. This paper provides a foundation for proactive FT by defining its architecture and classifying implementation options. This paper further relates prior work to the presented architecture and classification, and discusses the challenges ahead for needed supporting technologies.

Residual energy level based clustering routing protocol for wireless sensor networks

NASA Astrophysics Data System (ADS)

Yuan, Xu; Zhong, Fangming; Chen, Zhikui; Yang, Deli

2015-12-01

The wireless sensor networks, which nodes prone to premature death, with unbalanced energy consumption and a short life time, influenced the promotion and application of this technology in internet of things in agriculture. This paper proposes a clustering routing protocol based on the residual energy level (RELCP). RELCP includes three stages: the selection of cluster head, establishment of cluster and data transmission. RELCP considers the remaining energy level and distance to base station, while election of cluster head nodes and data transmitting. Simulation results demonstrate that the protocol can efficiently balance the energy dissipation of all nodes, and prolong the network lifetime.

Comparative Analysis of the Reliability of Steel Structure with Pinned and Rigid Nodes Subjected to Fire

NASA Astrophysics Data System (ADS)

Kubicka, Katarzyna; Radoń, Urszula; Szaniec, Waldemar; Pawlak, Urszula

2017-10-01

The paper concerns the reliability analysis of steel structures subjected to high temperatures of fire gases. Two types of spatial structures were analysed, namely with pinned and rigid nodes. The fire analysis was carried out according to prescriptions of Eurocode. The static-strength analysis was conducted using the finite element method (FEM). The MES3D program, developed by Szaniec (Kielce University of Technology, Poland), was used for this purpose. The results received from MES3D made it possible to carry out the reliability analysis using the Numpress Explore program that was developed at the Institute of Fundamental Technological Research of the Polish Academy of Sciences [9]. The measurement of reliability of structures is the Hasofer-Lind reliability index (β). The reliability analysis was carried out according to approximation (FORM, SORM) and simulation (Importance Sampling, Monte Carlo) methods. As the fire progresses, the value of reliability index decreases. The analysis conducted for the study made it possible to evaluate the impact of node types on those changes. In real structures, it is often difficult to define correctly types of nodes, so some simplifications are made. The presented analysis contributes to the recognition of consequences of such assumptions for the safety of structures, subjected to fire.

An intelligent anti-jamming network system of data link

NASA Astrophysics Data System (ADS)

Fan, Xiangrui; Lin, Jingyong; Liu, Jiarun; Zhou, Chunmei

2017-10-01

Data link is the key information system for the cooperation of weapons, single physical layer anti-jamming technology has been unable to meet its requirements. High dynamic precision-guided weapon nodes like missiles, anti-jamming design of data link system need to have stronger pertinence and effectiveness: the best anti-jamming communication mode can be selected intelligently in combat environment, in real time, guarantee the continuity of communication. We discuss an anti-jamming intelligent networking technology of data link based on interference awareness, put forward a model of intelligent anti-jamming system, and introduces the cognitive node protocol stack model and intelligent anti-jamming method, in order to improve the data chain of intelligent anti-jamming ability.

Multi-shaped beam: development status and update on lithography results

NASA Astrophysics Data System (ADS)

Slodowski, Matthias; Doering, Hans-Joachim; Dorl, Wolfgang; Stolberg, Ines A.

2011-04-01

According to the ITRS [1] photo mask is a significant challenge for the 22nm technology node requirements and beyond. Mask making capability and cost escalation continue to be critical for future lithography progress. On the technological side mask specifications and complexity have increased more quickly than the half-pitch requirements on the wafer designated by the roadmap due to advanced optical proximity correction and double patterning demands. From the economical perspective mask costs have significantly increased each generation, in which mask writing represents a major portion. The availability of a multi-electron-beam lithography system for mask write application is considered a potential solution to overcome these challenges [2, 3]. In this paper an update of the development status of a full-package high-throughput multi electron-beam writer, called Multi Shaped Beam (MSB), will be presented. Lithography performance results, which are most relevant for mask writing applications, will be disclosed. The MSB technology is an evolutionary development of the matured single Variable Shaped Beam (VSB) technology. An arrangement of Multi Deflection Arrays (MDA) allows operation with multiple shaped beams of variable size, which can be deflected and controlled individually [4]. This evolutionary MSB approach is associated with a lower level of risk and a relatively short time to implementation compared to the known revolutionary concepts [3, 5, 6]. Lithography performance is demonstrated through exposed pattern. Further details of the substrate positioning platform performance will be disclosed. It will become apparent that the MSB operational mode enables lithography on the same and higher performance level compared to single VSB and that there are no specific additional lithography challenges existing beside those which have already been addressed [1].

Vision Sensors and Cameras

NASA Astrophysics Data System (ADS)

Hoefflinger, Bernd

Silicon charge-coupled-device (CCD) imagers have been and are a specialty market ruled by a few companies for decades. Based on CMOS technologies, active-pixel sensors (APS) began to appear in 1990 at the 1 μm technology node. These pixels allow random access, global shutters, and they are compatible with focal-plane imaging systems combining sensing and first-level image processing. The progress towards smaller features and towards ultra-low leakage currents has provided reduced dark currents and μm-size pixels. All chips offer Mega-pixel resolution, and many have very high sensitivities equivalent to ASA 12.800. As a result, HDTV video cameras will become a commodity. Because charge-integration sensors suffer from a limited dynamic range, significant processing effort is spent on multiple exposure and piece-wise analog-digital conversion to reach ranges >10,000:1. The fundamental alternative is log-converting pixels with an eye-like response. This offers a range of almost a million to 1, constant contrast sensitivity and constant colors, important features in professional, technical and medical applications. 3D retino-morphic stacking of sensing and processing on top of each other is being revisited with sub-100 nm CMOS circuits and with TSV technology. With sensor outputs directly on top of neurons, neural focal-plane processing will regain momentum, and new levels of intelligent vision will be achieved. The industry push towards thinned wafers and TSV enables backside-illuminated and other pixels with a 100% fill-factor. 3D vision, which relies on stereo or on time-of-flight, high-speed circuitry, will also benefit from scaled-down CMOS technologies both because of their size as well as their higher speed.

Free-electron laser emission architecture impact on extreme ultraviolet lithography

NASA Astrophysics Data System (ADS)

Hosler, Erik R.; Wood, Obert R.; Barletta, William A.

2017-10-01

Laser-produced plasma (LPP) EUV sources have demonstrated ˜125 W at customer sites, establishing confidence in EUV lithography (EUVL) as a viable manufacturing technology. However, for extension to the 3-nm technology node and beyond, existing scanner/source technology must enable higher-NA imaging systems (requiring increased resist dose and providing half-field exposures) and/or EUV multipatterning (requiring increased wafer throughput proportional to the number of exposure passes). Both development paths will require a substantial increase in EUV source power to maintain the economic viability of the technology, creating an opportunity for free-electron laser (FEL) EUV sources. FEL-based EUV sources offer an economic, high-power/single-source alternative to LPP EUV sources. Should FELs become the preferred next-generation EUV source, the choice of FEL emission architecture will greatly affect its operational stability and overall capability. A near-term industrialized FEL is expected to utilize one of the following three existing emission architectures: (1) self-amplified spontaneous emission, (2) regenerative amplifier, or (3) self-seeding. Model accelerator parameters are put forward to evaluate the impact of emission architecture on FEL output. Then, variations in the parameter space are applied to assess the potential impact to lithography operations, thereby establishing component sensitivity. The operating range of various accelerator components is discussed based on current accelerator performance demonstrated at various scientific user facilities. Finally, comparison of the performance between the model accelerator parameters and the variation in parameter space provides a means to evaluate the potential emission architectures. A scorecard is presented to facilitate this evaluation and provides a framework for future FEL design and enablement for EUVL applications.

Scatterometry or imaging overlay: a comparative study

NASA Astrophysics Data System (ADS)

Hsu, Simon C. C.; Pai, Yuan Chi; Chen, Charlie; Yu, Chun Chi; Hsing, Henry; Wu, Hsing-Chien; Kuo, Kelly T. L.; Amir, Nuriel

2015-03-01

Most fabrication facilities today use imaging overlay measurement methods, as it has been the industry's reliable workhorse for decades. In the last few years, third-generation Scatterometry Overlay (SCOL™) or Diffraction Based Overlay (DBO-1) technology was developed, along another DBO technology (DBO-2). This development led to the question of where the DBO technology should be implemented for overlay measurements. Scatterometry has been adopted for high volume production in only few cases, always with imaging as a backup, but scatterometry overlay is considered by many as the technology of the future. In this paper we compare imaging overlay and DBO technologies by means of measurements and simulations. We outline issues and sensitivities for both technologies, providing guidelines for the best implementation of each. For several of the presented cases, data from two different DBO technologies are compared as well, the first with Pupil data access (DBO-1) and the other without pupil data access (DBO-2). Key indicators of overlay measurement quality include: layer coverage, accuracy, TMU, process robustness and robustness to process changes. Measurement data from real cases across the industry are compared and the conclusions are also backed by simulations. Accuracy is benchmarked with reference OVL, and self-consistency, showing good results for Imaging and DBO-1 technology. Process sensitivity and metrology robustness are mostly simulated with MTD (Metrology Target Designer) comparing the same process variations for both technologies. The experimental data presented in this study was done on ten advanced node layers and three production node layers, for all phases of the IC fabrication process (FEOL, MEOL and BEOL). The metrology tool used for most of the study is KLA-Tencor's Archer 500LCM system (scatterometry-based and imaging-based measurement technologies on the same tool) another type of tool is used for DBO-2 measurements. Finally, we conclude that both imaging overlay technology and DBO-1 technology are fully successful and have a valid roadmap for the next few design nodes, with some use cases better suited for one or the other measurement technologies. Having both imaging and DBO technology options available in parallel, allows Overlay Engineers a mix and match overlay measurement strategy, providing back up when encountering difficulties with one of the technologies and benefiting from the best of both technologies for every use case.

Ad Hoc Access Gateway Selection Algorithm

NASA Astrophysics Data System (ADS)

Jie, Liu

With the continuous development of mobile communication technology, Ad Hoc access network has become a hot research, Ad Hoc access network nodes can be used to expand capacity of multi-hop communication range of mobile communication system, even business adjacent to the community, improve edge data rates. For mobile nodes in Ad Hoc network to internet, internet communications in the peer nodes must be achieved through the gateway. Therefore, the key Ad Hoc Access Networks will focus on the discovery gateway, as well as gateway selection in the case of multi-gateway and handover problems between different gateways. This paper considers the mobile node and the gateway, based on the average number of hops from an average access time and the stability of routes, improved gateway selection algorithm were proposed. An improved gateway selection algorithm, which mainly considers the algorithm can improve the access time of Ad Hoc nodes and the continuity of communication between the gateways, were proposed. This can improve the quality of communication across the network.

Hiding Critical Targets in Smart Grid Networks

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bao, Wei; Li, Qinghua

With the integration of advanced communication technologies, the power grid is expected to greatly enhance efficiency and reliability of future power systems. However, since most electrical devices in power grid substations are connected via communication networks, cyber security of these communication networks becomes a critical issue. Real-World incidents such as Stuxnet have shown the feasibility of compromising a device in the power grid network to further launch more sophisticated attacks. To deal with security attacks of this spirit, this paper aims to hide critical targets from compromised internal nodes and hence protect them from further attacks launched by those compromisedmore » nodes. In particular, we consider substation networks and propose to add carefully-controlled dummy traffic to a substation network to make critical target nodes indistinguishable from other nodes in network traffic patterns. This paper describes the design and evaluation of such a scheme. Evaluations show that the scheme can effectively protect critical nodes with acceptable communication cost.« less

Space information technologies: future agenda

NASA Astrophysics Data System (ADS)

Flournoy, Don M.

2005-11-01

Satellites will operate more like wide area broadband computer networks in the 21st Century. Space-based information and communication technologies will therefore be a lot more accessible and functional for the individual user. These developments are the result of earth-based telecommunication and computing innovations being extended to space. The author predicts that the broadband Internet will eventually be available on demand to users of terrestrial networks wherever they are. Earth and space communication assets will be managed as a single network. Space networks will assure that online access is ubiquitous. No matter whether users are located in cities or in remote locations, they will always be within reach of a node on the Internet. Even today, scalable bandwidth can be delivered to active users when moving around in vehicles on the ground, or aboard ships at sea or in the air. Discussion of the innovative technologies produced by NASA's Advanced Communications Technology Satellite (1993-2004) demonstrates future capabilities of satellites that make them uniquely suited to serve as nodes on the broadband Internet.

Quantitative photoacoustic assessment of ex-vivo lymph nodes of colorectal cancer patients

NASA Astrophysics Data System (ADS)

Sampathkumar, Ashwin; Mamou, Jonathan; Saegusa-Beercroft, Emi; Chitnis, Parag V.; Machi, Junji; Feleppa, Ernest J.

2015-03-01

Staging of cancers and selection of appropriate treatment requires histological examination of multiple dissected lymph nodes (LNs) per patient, so that a staggering number of nodes require histopathological examination, and the finite resources of pathology facilities create a severe processing bottleneck. Histologically examining the entire 3D volume of every dissected node is not feasible, and therefore, only the central region of each node is examined histologically, which results in severe sampling limitations. In this work, we assess the feasibility of using quantitative photoacoustics (QPA) to overcome the limitations imposed by current procedures and eliminate the resulting under sampling in node assessments. QPA is emerging as a new hybrid modality that assesses tissue properties and classifies tissue type based on multiple estimates derived from spectrum analysis of photoacoustic (PA) radiofrequency (RF) data and from statistical analysis of envelope-signal data derived from the RF signals. Our study seeks to use QPA to distinguish cancerous from non-cancerous regions of dissected LNs and hence serve as a reliable means of imaging and detecting small but clinically significant cancerous foci that would be missed by current methods. Dissected lymph nodes were placed in a water bath and PA signals were generated using a wavelength-tunable (680-950 nm) laser. A 26-MHz, f-2 transducer was used to sense the PA signals. We present an overview of our experimental setup; provide a statistical analysis of multi-wavelength classification parameters (mid-band fit, slope, intercept) obtained from the PA signal spectrum generated in the LNs; and compare QPA performance with our established quantitative ultrasound (QUS) techniques in distinguishing metastatic from non-cancerous tissue in dissected LNs. QPA-QUS methods offer a novel general means of tissue typing and evaluation in a broad range of disease-assessment applications, e.g., cardiac, intravascular, musculoskeletal, endocrine-gland, etc.

SL2+: H5 use case

NASA Astrophysics Data System (ADS)

Ito, Kosuke; Liu, Steven; Lee, Isaac; Dover, Russell; Yu, Paul

2008-10-01

Photomask contamination inspections, whether performed at maskshops as an outgoing inspection or at wafer fabs for incoming shipping and handling or progressive defect monitoring, have been performed by KLA-Tencor STARlight systems for a number of design nodes. STARlight has evolved since it first appeared on the 3xx generation of KLA-Tencor mask inspection tools. It was improved with the TeraStar (also known as SLF) based tools with the SL1 algorithm. SL2 first appeared on the TeraScan systems (also known as 5xx) and has been widely adopted in both mask shops and wafer fabs. Design rules continue to advance as do inspection challenges. Advances in computer processing power have enabled more complex and powerful algorithms to be developed and applied to the STARlight technology. The current generation of STARlight, which is known as SL2+, implements improved modeling fidelity as well as a completely new paradigm to the existing STARlight technology known as HiRes5, or simply "H5". H5 is integrated seamlessly within SL2+ and provides die-to-die-like performance in both transmitted and reflected light, in addition to the STARlight detection, in unit time. It achieves this by automatically identifying repeating structures in both X and Y directions and applying image alignment and difference threshold. A leading mask shop partnered with KLA-Tencor in order to evaluate SL2+ at its facility. SL2+ demonstrated a high level of sensitivity on all test reticles, with good inspectability on advanced production reticles. High sensitivity settings were used for 45 nm HP and smaller design rule masks and low false detections were achieved. H5 provided additional sensitivity on production plates, demonstrating the ability to extend the use of SL2+ to cover 32 nm DR plate inspections. This paper reports the findings and results of this evaluation.

Quantifying electrical impacts on redundant wire insertion in 7nm unidirectional designs

NASA Astrophysics Data System (ADS)

Mohyeldin, Ahmed; Schroeder, Uwe Paul; Srinivasan, Ramya; Narisetty, Haritez; Malik, Shobhit; Madhavan, Sriram

2017-04-01

In nano-meter scale Integrated Circuits, via fails due to random defects is a well-known yield detractor, and via redundancy insertion is a common method to help enhance semiconductors yield. For the case of Self Aligned Double Patterning (SADP), which might require unidirectional design layers as in the case of some advanced technology nodes, the conventional methods of inserting redundant vias don't work any longer. This is because adding redundant vias conventionally requires adding metal shapes in the non-preferred direction, which will violate the SADP design constraints in that case. Therefore, such metal layers fabricated using unidirectional SADP require an alternative method for providing the needed redundancy. This paper proposes a post-layout Design for Manufacturability (DFM) redundancy insertion method tailored for the design requirements introduced by unidirectional metal layers. The proposed method adds redundant wires in the preferred direction - after searching for nearby vacant routing tracks - in order to provide redundant paths for electrical signals. This method opportunistically adds robustness against failures due to silicon defects without impacting area or incurring new design rule violations. Implementation details of this redundancy insertion method will be explained in this paper. One known challenge with similar DFM layout fixing methods is the possible introduction of undesired electrical impact, causing other unintentional failures in design functionality. In this paper, a study is presented to quantify the electrical impacts of such redundancy insertion scheme and to examine if that electrical impact can be tolerated. The paper will show results to evaluate DFM insertion rates and corresponding electrical impact for a given design utilization and maximum inserted wire length. Parasitic extraction and static timing analysis results will be presented. A typical digital design implemented using GLOBALFOUNDRIES 7nm technology is used for demonstration. The provided results can help evaluate such extensive DFM insertion method from an electrical standpoint. Furthermore, the results could provide guidance on how to implement the proposed method of adding electrical redundancy such that intolerable electrical impacts could be avoided.

Sentinel node detection in early breast cancer with intraoperative portable gamma camera: UK experience.

PubMed

Ghosh, Debashis; Michalopoulos, Nikolaos V; Davidson, Timothy; Wickham, Fred; Williams, Norman R; Keshtgar, Mohammed R

2017-04-01

Access to nuclear medicine department for sentinel node imaging remains an issue in number of hospitals in the UK and many parts of the world. Sentinella ® is a portable imaging camera used intra-operatively to produce real time visual localisation of sentinel lymph nodes. Sentinella ® was tested in a controlled laboratory environment at our centre and we report our experience on the first use of this technology from UK. Moreover, preoperative scintigrams of the axilla were obtained in 144 patients undergoing sentinel node biopsy using conventional gamma camera. Sentinella ® scans were done intra-operatively to correlate with the pre-operative scintigram and to determine presence of any residual hot node after the axilla was deemed to be clear based on the silence of the hand held gamma probe. Sentinella ® detected significantly more nodes compared with CGC (p < 0.0001). Sentinella ® picked up extra nodes in 5/144 cases after the axilla was found silent using hand held gamma probe. In 2/144 cases, extra nodes detected by Sentinella ® confirmed presence of tumour cells that led to a complete axillary clearance. Sentinella ® is a reliable technique for intra-operative localisation of radioactive nodes. It provides increased nodal visualisation rates compared to static scintigram imaging and proves to be an important tool for harvesting all hot sentinel nodes. This portable gamma camera can definitely replace the use of conventional lymphoscintigrams saving time and money both for patients and the health system. Copyright © 2016 Elsevier Ltd. All rights reserved.

Design of Low-Noise Output Amplifiers for P-channel Charge-Coupled Devices Fabricated on High-Resistivity Silicon

DOE Office of Scientific and Technical Information (OSTI.GOV)

Haque, S; Frost, F Dion R.; Groulx, R

2011-12-22

We describe the design and optimization of low-noise, single-stage output amplifiers for p-channel charge-coupled devices (CCDs) used for scientific applications in astronomy and other fields. The CCDs are fabricated on high-resistivity, 4000–5000 -cm, n-type silicon substrates. Single-stage amplifiers with different output structure designs and technologies have been characterized. The standard output amplifier is designed with an n{sup +} polysilicon gate that has a metal connection to the sense node. In an effort to lower the output amplifier readout noise by minimizing the capacitance seen at the sense node, buried-contact technology has been investigated. In this case, the output transistor hasmore » a p{sup +} polysilicon gate that connects directly to the p{sup +} sense node. Output structures with buried-contact areas as small as 2 μm × 2 μm are characterized. In addition, the geometry of the source-follower transistor was varied, and we report test results on the conversion gain and noise of the various amplifier structures. By use of buried-contact technology, better amplifier geometry, optimization of the amplifier biases and improvements in the test electronics design, we obtain a 45% reduction in noise, corresponding to 1.7 e{sup -} rms at 70 kpixels/sec.« less

Tungsten Contact and Line Resistance Reduction with Advanced Pulsed Nucleation Layer and Low Resistivity Tungsten Treatment

NASA Astrophysics Data System (ADS)

Chandrashekar, Anand; Chen, Feng; Lin, Jasmine; Humayun, Raashina; Wongsenakhum, Panya; Chang, Sean; Danek, Michal; Itou, Takamasa; Nakayama, Tomoo; Kariya, Atsushi; Kawaguchi, Masazumi; Hizume, Shunichi

2010-09-01

This paper describes electrical testing results of new tungsten chemical vapor deposition (CVD-W) process concepts that were developed to address the W contact and bitline scaling issues on 55 nm node devices. Contact resistance (Rc) measurements in complementary metal oxide semiconductor (CMOS) devices indicate that the new CVD-W process for sub-32 nm and beyond - consisting of an advanced pulsed nucleation layer (PNL) combined with low resistivity tungsten (LRW) initiation - produces a 20-30% drop in Rc for diffused NiSi contacts. From cross-sectional bright field and dark field transmission electron microscopy (TEM) analysis, such Rc improvement can be attributed to improved plugfill and larger in-feature W grain size with the advanced PNL+LRW process. More experiments that measured contact resistance for different feature sizes point to favorable Rc scaling with the advanced PNL+LRW process. Finally, 40% improvement in line resistance was observed with this process as tested on 55 nm embedded dynamic random access memory (DRAM) devices, confirming that the advanced PNL+LRW process can be an effective metallization solution for sub-32 nm devices.

An energy efficient distance-aware routing algorithm with multiple mobile sinks for wireless sensor networks.

PubMed

Wang, Jin; Li, Bin; Xia, Feng; Kim, Chang-Seob; Kim, Jeong-Uk

2014-08-18

Traffic patterns in wireless sensor networks (WSNs) usually follow a many-to-one model. Sensor nodes close to static sinks will deplete their limited energy more rapidly than other sensors, since they will have more data to forward during multihop transmission. This will cause network partition, isolated nodes and much shortened network lifetime. Thus, how to balance energy consumption for sensor nodes is an important research issue. In recent years, exploiting sink mobility technology in WSNs has attracted much research attention because it can not only improve energy efficiency, but prolong network lifetime. In this paper, we propose an energy efficient distance-aware routing algorithm with multiple mobile sink for WSNs, where sink nodes will move with a certain speed along the network boundary to collect monitored data. We study the influence of multiple mobile sink nodes on energy consumption and network lifetime, and we mainly focus on the selection of mobile sink node number and the selection of parking positions, as well as their impact on performance metrics above. We can see that both mobile sink node number and the selection of parking position have important influence on network performance. Simulation results show that our proposed routing algorithm has better performance than traditional routing ones in terms of energy consumption.

An Energy Efficient Distance-Aware Routing Algorithm with Multiple Mobile Sinks for Wireless Sensor Networks

PubMed Central

Wang, Jin; Li, Bin; Xia, Feng; Kim, Chang-Seob; Kim, Jeong-Uk

2014-01-01

Traffic patterns in wireless sensor networks (WSNs) usually follow a many-to-one model. Sensor nodes close to static sinks will deplete their limited energy more rapidly than other sensors, since they will have more data to forward during multihop transmission. This will cause network partition, isolated nodes and much shortened network lifetime. Thus, how to balance energy consumption for sensor nodes is an important research issue. In recent years, exploiting sink mobility technology in WSNs has attracted much research attention because it can not only improve energy efficiency, but prolong network lifetime. In this paper, we propose an energy efficient distance-aware routing algorithm with multiple mobile sink for WSNs, where sink nodes will move with a certain speed along the network boundary to collect monitored data. We study the influence of multiple mobile sink nodes on energy consumption and network lifetime, and we mainly focus on the selection of mobile sink node number and the selection of parking positions, as well as their impact on performance metrics above. We can see that both mobile sink node number and the selection of parking position have important influence on network performance. Simulation results show that our proposed routing algorithm has better performance than traditional routing ones in terms of energy consumption. PMID:25196015

Distributed processing method for arbitrary view generation in camera sensor network

NASA Astrophysics Data System (ADS)

Tehrani, Mehrdad P.; Fujii, Toshiaki; Tanimoto, Masayuki

2003-05-01

Camera sensor network as a new advent of technology is a network that each sensor node can capture video signals, process and communicate them with other nodes. The processing task in this network is to generate arbitrary view, which can be requested from central node or user. To avoid unnecessary communication between nodes in camera sensor network and speed up the processing time, we have distributed the processing tasks between nodes. In this method, each sensor node processes part of interpolation algorithm to generate the interpolated image with local communication between nodes. The processing task in camera sensor network is ray-space interpolation, which is an object independent method and based on MSE minimization by using adaptive filtering. Two methods were proposed for distributing processing tasks, which are Fully Image Shared Decentralized Processing (FIS-DP), and Partially Image Shared Decentralized Processing (PIS-DP), to share image data locally. Comparison of the proposed methods with Centralized Processing (CP) method shows that PIS-DP has the highest processing speed after FIS-DP, and CP has the lowest processing speed. Communication rate of CP and PIS-DP is almost same and better than FIS-DP. So, PIS-DP is recommended because of its better performance than CP and FIS-DP.

Air-condition Control System of Weaving Workshop Based on LabVIEW

NASA Astrophysics Data System (ADS)

Song, Jian

The project of air-condition measurement and control system based on LabVIEW is put forward for the sake of controlling effectively the environmental targets in the weaving workshop. In this project, which is based on the virtual instrument technology and in which LabVIEW development platform by NI is adopted, the system is constructed on the basis of the virtual instrument technology. It is composed of the upper PC, central control nodes based on CC2530, sensor nodes, sensor modules and executive device. Fuzzy control algorithm is employed to achieve the accuracy control of the temperature and humidity. A user-friendly man-machine interaction interface is designed with virtual instrument technology at the core of the software. It is shown by experiments that the measurement and control system can run stably and reliably and meet the functional requirements for controlling the weaving workshop.

Transforming Ordinary Buildings into Smart Buildings via Low-Cost, Self-Powering Wireless Sensors & Sensor Networks

DOE Office of Scientific and Technical Information (OSTI.GOV)

Feng, Philip

The research objective of this project is to design and demonstrate a low-cost, compact, easy-to-deploy, maintenance-free sensor node technology, and a network of such sensors, which enable the monitoring of multiphysical parameters and can transform today’s ordinary buildings into smart buildings with environmental awareness. We develop the sensor node and network via engineering and integration of existing technologies, including high-efficiency mechanical energy harvesting, and ultralow-power integrated circuits (ICs) for sensing and wireless communication. Through integration and innovative power management via specifically designed low-power control circuits for wireless sensing applications, and tailoring energy-harvesting components to indoor applications, the target products willmore » have smaller volume, higher efficiency, and much lower cost (in both manufacturing and maintenance) than the baseline technology. Our development and commercialization objective is to create prototypes for our target products under the CWRU-Intwine collaboration.« less

Image sensor pixel with on-chip high extinction ratio polarizer based on 65-nm standard CMOS technology.

PubMed

Sasagawa, Kiyotaka; Shishido, Sanshiro; Ando, Keisuke; Matsuoka, Hitoshi; Noda, Toshihiko; Tokuda, Takashi; Kakiuchi, Kiyomi; Ohta, Jun

2013-05-06

In this study, we demonstrate a polarization sensitive pixel for a complementary metal-oxide-semiconductor (CMOS) image sensor based on 65-nm standard CMOS technology. Using such a deep-submicron CMOS technology, it is possible to design fine metal patterns smaller than the wavelengths of visible light by using a metal wire layer. We designed and fabricated a metal wire grid polarizer on a 20 × 20 μm(2) pixel for image sensor. An extinction ratio of 19.7 dB was observed at a wavelength 750 nm.

Development of GaN-based micro chemical sensor nodes

NASA Technical Reports Server (NTRS)

Son, Kyung-ah; Prokopuk, Nicholas; George, Thomas; Moon, Jeong S.

2005-01-01

Sensors based on III-N technology are gaining significant interest due to their potential for monolithic integration of RF transceivers and light sources and the capability of high temperature operations. We are developing a GaN-based micro chemical sensor node for remote detection of chemical toxins, and present electrical responses of AlGaN/GaN HEMT (High Electron Mobility Transistor) sensors to chemical toxins as well as other common gases.

Efficient and Stable Routing Algorithm Based on User Mobility and Node Density in Urban Vehicular Network.

PubMed

Al-Mayouf, Yusor Rafid Bahar; Ismail, Mahamod; Abdullah, Nor Fadzilah; Wahab, Ainuddin Wahid Abdul; Mahdi, Omar Adil; Khan, Suleman; Choo, Kim-Kwang Raymond

2016-01-01

Vehicular ad hoc networks (VANETs) are considered an emerging technology in the industrial and educational fields. This technology is essential in the deployment of the intelligent transportation system, which is targeted to improve safety and efficiency of traffic. The implementation of VANETs can be effectively executed by transmitting data among vehicles with the use of multiple hops. However, the intrinsic characteristics of VANETs, such as its dynamic network topology and intermittent connectivity, limit data delivery. One particular challenge of this network is the possibility that the contributing node may only remain in the network for a limited time. Hence, to prevent data loss from that node, the information must reach the destination node via multi-hop routing techniques. An appropriate, efficient, and stable routing algorithm must be developed for various VANET applications to address the issues of dynamic topology and intermittent connectivity. Therefore, this paper proposes a novel routing algorithm called efficient and stable routing algorithm based on user mobility and node density (ESRA-MD). The proposed algorithm can adapt to significant changes that may occur in the urban vehicular environment. This algorithm works by selecting an optimal route on the basis of hop count and link duration for delivering data from source to destination, thereby satisfying various quality of service considerations. The validity of the proposed algorithm is investigated by its comparison with ARP-QD protocol, which works on the mechanism of optimal route finding in VANETs in urban environments. Simulation results reveal that the proposed ESRA-MD algorithm shows remarkable improvement in terms of delivery ratio, delivery delay, and communication overhead.

Evaluation of attenuated PSM photomask blanks with TF11 chrome and FEP-171 resist on a 248 nm DUV laser pattern generator

NASA Astrophysics Data System (ADS)

Xing, Kezhao; Björnborg, Charles; Karlsson, Henrik; Paulsson, Adisa; Rosendahl, Anna; Beiming, Peter; Vedenpää, Jukka; Walford, Jonathan; Newman, Tom

2007-10-01

Tighter requirements on mask resolution, CD and image positioning accuracy at and beyond the 45 nm technology node push the development of improved photomask blanks. One such blank for attenuated phase-shift masks (att-PSM) provides a thinner chrome film, named TF11, with higher chrome etch rate compared to the previous generation Att- PSM blank (NTAR5 chrome film) from the same supplier. Reduced stress in the chrome film also results in less image placement error induced by the material. FEP-171 is the positive chemically amplified resist (PCAR) that is most commonly used in advanced mask manufacturing with both 50 keV variable shaped e-beam (VSB) and DUV laser pattern generators. TF11 allows an FEP-171 resist film down to about 2000 Å thickness with sufficient etch resistance, while the standard resist thickness for NTAR5 is around 3000 Å. This work has experimentally evaluated the use of TF11 chrome and FEP-171 resist together with a 248 nm DUV laser pattern generator, the Sigma7500. First, patterning performance in resist with thicknesses from 2000 Å to 2600 Å, in steps of 100 Å, was tested with respect to swing curve and basic lithographic parameters including resolution, CD linearity, CD iso-dense bias and dose sensitivity. Patterning results on mask showed a swing minimum at around 2200 Å and a swing maximum at around 2500 Å, which correspond to reflectivity measurements for 248 nm wavelength performed by the blank supplier. It was concluded that the overall patterning performance was best close to the swing maximum. Thereafter the patterning performance using TF11 at two resist thicknesses, 2000 Å and 2550 Å, was studied in more detail and compared to performance using NTAR5 with 3200 Å resist. The evaluation showed that the Sigma7500-II offers good compatibility with TF11, especially using the optimized FEP-171 resist thickness of 2550 Å. It also showed that the patterning capability of the Sigma7500-II using TF11 and 2550 Å resist is improved compared to using NTAR5 and 3200 Å resist.

Data Summarization in the Node by Parameters (DSNP): Local Data Fusion in an IoT Environment.

PubMed

Maschi, Luis F C; Pinto, Alex S R; Meneguette, Rodolfo I; Baldassin, Alexandro

2018-03-07

With the advent of the Internet of Things, billions of objects or devices are inserted into the global computer network, generating and processing data at a volume never imagined before. This paper proposes a way to collect and process local data through a data fusion technology called summarization. The main feature of the proposal is the local data fusion, through parameters provided by the application, ensuring the quality of data collected by the sensor node. In the evaluation, the sensor node was compared when performing the data summary with another that performed a continuous recording of the collected data. Two sets of nodes were created, one with a sensor node that analyzed the luminosity of the room, which in this case obtained a reduction of 97% in the volume of data generated, and another set that analyzed the temperature of the room, obtaining a reduction of 80% in the data volume. Through these tests, it has been proven that the local data fusion at the node can be used to reduce the volume of data generated, consequently decreasing the volume of messages generated by IoT environments.

High-volume manufacturing device overlay process control

NASA Astrophysics Data System (ADS)

Lee, Honggoo; Han, Sangjun; Woo, Jaeson; Lee, DongYoung; Song, ChangRock; Heo, Hoyoung; Brinster, Irina; Choi, DongSub; Robinson, John C.

2017-03-01

Overlay control based on DI metrology of optical targets has been the primary basis for run-to-run process control for many years. In previous work we described a scenario where optical overlay metrology is performed on metrology targets on a high frequency basis including every lot (or most lots) at DI. SEM based FI metrology is performed ondevice in-die as-etched on an infrequent basis. Hybrid control schemes of this type have been in use for many process nodes. What is new is the relative size of the NZO as compared to the overlay spec, and the need to find more comprehensive solutions to characterize and control the size and variability of NZO at the 1x nm node: sampling, modeling, temporal frequency and control aspects, as well as trade-offs between SEM throughput and accuracy.

Pulled microcapillary tube resonators with electrical readout for mass sensing applications

PubMed Central

Lee, Donghyuk; Kim, Joonhui; Cho, Nam-Joon; Kang, Taewook; Kauh, Sangken; Lee, Jungchul

2016-01-01

This paper reports a microfabrication-free approach to make hollow channel mass sensors by pulling a glass capillary and suspending it on top of a machined jig. A part of the pulled section makes simple contact with an actuation node and a quartz tuning fork (QTF) which acts as a sensing node. The two nodes define a pulled micro capillary tube resonator (PμTR) simply supported at two contacts. While a piezo actuator beneath the actuation node excites the PμTR, the QTF senses the resonance frequency of the PμTR. The proposed concept was validated by electrical and optical measurements of resonant spectra of PμTR. Then, different liquid samples including water, ethanol, glycerol, and their binary mixtures were introduced into the PμTR and the resonance frequency of the PμTR was measured as a function of liquid density. Density responsivity of −3,088 Hz-g−1 cm3 obtained is comparable to those of microfabricated hollow resonators. With a micro droplet generation chip configured in series with the PμTR, size distribution of oil droplets suspended in water was successfully measured with the radius resolution of 31 nm at the average droplet radius, 28.47 μm. Overall, typical off-the-shelf parts simply constitute a resonant mass sensing system along with a convenient electrical readout. PMID:27694852

A wireless modular multi-modal multi-node patch platform for robust biosignal monitoring.

PubMed

Pantelopoulos, Alexandros; Saldivar, Enrique; Roham, Masoud

2011-01-01

In this paper a wireless modular, multi-modal, multi-node patch platform is described. The platform comprises low-cost semi-disposable patch design aiming at unobtrusive ambulatory monitoring of multiple physiological parameters. Owing to its modular design it can be interfaced with various low-power RF communication and data storage technologies, while the data fusion of multi-modal and multi-node features facilitates measurement of several biosignals from multiple on-body locations for robust feature extraction. Preliminary results of the patch platform are presented which illustrate the capability to extract respiration rate from three different independent metrics, which combined together can give a more robust estimate of the actual respiratory rate.

Call for Papers: Photonics in Switching

NASA Astrophysics Data System (ADS)

Wosinska, Lena; Glick, Madeleine

2006-04-01

Call for Papers: Photonics in Switching

Guest Editors:

Lena Wosinska, Royal Institute of Technology (KTH) / ICT Sweden Madeleine Glick, Intel Research, Cambridge, UK

Scope of Submission

• WDM node architectures
• Novel device technologies enabling photonics in switching, such as optical switch fabrics, optical memory, and wavelength conversion
• Routing protocols
• WDM switching and routing
• Quality of service
• Performance measurement and evaluation
• Next-generation optical networks: architecture, signaling, and control
• Traffic measurement and field trials
• Optical burst and packet switching
• OBS/OPS node architectures
• Burst/Packet scheduling and routing algorithms
• Contention resolution/avoidance strategies
• Services and applications for OBS/OPS (e.g., grid networks, storage-area networks, etc.)
• Burst assembly and ingress traffic shaping
• Hybrid OBS/TDM or OBS/wavelength routing

Manuscript Submission

The ARPANET after twenty years

NASA Technical Reports Server (NTRS)

Denning, Peter J.

1989-01-01

The ARPANET began operations in 1969 with four nodes as an experiment in resource sharing among computers. It has evolved into a worldwide research network of over 60,000 nodes, influencing the design of other networks in business, education, and government. It demonstrated the speed and reliability of packet-switching networks. Its protocols have served as the models for international standards. And yet the significance of the ARPANET lies not in its technology, but in the profound alterations networking has produced in human practices. Network designers must now turn their attention to the discourses of scientific technology, business, education, and government that are being mixed together in the milieux of networking, and in particular the conflicts and misunderstandings that arise from the different world views of these discourses.

The exploration of the characteristics of the hyperglycemia serum fluorescence spectrum

NASA Astrophysics Data System (ADS)

Wang, Lexin; Zhao, Zhimin; Chen, Hui; Li, Peng; Xin, Yujun

2008-12-01

Now, spectra technology is widely used in the biomedicine research,so this study investigates variation of the fluorescence spectra in different excitation wavelength, and the spectra of serum with different glucose concentration is tested in the excitation wavelength of 240nm to 280nm. The experimental result shows that the correlation between the serum fluorescence intensity and the excitation light is very close, when the excitation light is in the ultraviolet wave band, the fluorescence of serum is intensive. There is a violent fluorescence emission wavelength, which is 300nm to 410nm, while the excitation wavelength ranges from 220nm to 290nm, and the peaks wavelength are 330nm and 370nm. From 240nm to 280nm, the serum fluorescence intensity increases synchronously with the glucose concentration, and the relationship between the fluorescence peak wavelength and the glucose concentration is almost in line. In this way the blood sugar concentration can be estimated by the fluorescence spectra peak wavelength when the excitation wavelength is from 240nm to 280nm, which is effective. It provides experimental foundation for the wide use of spectra technology in medical diagnose, and the effectiv method to test the blood sugar concentration.

Anchor-free localization method for mobile targets in coal mine wireless sensor networks.

PubMed

Pei, Zhongmin; Deng, Zhidong; Xu, Shuo; Xu, Xiao

2009-01-01

Severe natural conditions and complex terrain make it difficult to apply precise localization in underground mines. In this paper, an anchor-free localization method for mobile targets is proposed based on non-metric multi-dimensional scaling (Multi-dimensional Scaling: MDS) and rank sequence. Firstly, a coal mine wireless sensor network is constructed in underground mines based on the ZigBee technology. Then a non-metric MDS algorithm is imported to estimate the reference nodes' location. Finally, an improved sequence-based localization algorithm is presented to complete precise localization for mobile targets. The proposed method is tested through simulations with 100 nodes, outdoor experiments with 15 ZigBee physical nodes, and the experiments in the mine gas explosion laboratory with 12 ZigBee nodes. Experimental results show that our method has better localization accuracy and is more robust in underground mines.

Precoding based channel prediction for underwater acoustic OFDM

NASA Astrophysics Data System (ADS)

Cheng, En; Lin, Na; Sun, Hai-xin; Yan, Jia-quan; Qi, Jie

2017-04-01

The life duration of underwater cooperative network has been the hot topic in recent years. And the problem of node energy consuming is the key technology to maintain the energy balance among all nodes. To ensure energy efficiency of some special nodes and obtain a longer lifetime of the underwater cooperative network, this paper focuses on adopting precoding strategy to preprocess the signal at the transmitter and simplify the receiver structure. Meanwhile, it takes into account the presence of Doppler shifts and long feedback transmission delay in an underwater acoustic communication system. Precoding technique is applied based on channel prediction to realize energy saving and improve system performance. Different precoding methods are compared. Simulated results and experimental results show that the proposed scheme has a better performance, and it can provide a simple receiver and realize energy saving for some special nodes in a cooperative communication.

Opportunistic Sensor Data Collection with Bluetooth Low Energy

PubMed Central

Aguilar, Sergio; Vidal, Rafael; Gomez, Carles

2017-01-01

Bluetooth Low Energy (BLE) has gained very high momentum, as witnessed by its widespread presence in smartphones, wearables and other consumer electronics devices. This fact can be leveraged to carry out opportunistic sensor data collection (OSDC) in scenarios where a sensor node cannot communicate with infrastructure nodes. In such cases, a mobile entity (e.g., a pedestrian or a vehicle) equipped with a BLE-enabled device can collect the data obtained by the sensor node when both are within direct communication range. In this paper, we characterize, both analytically and experimentally, the performance and trade-offs of BLE as a technology for OSDC, for the two main identified approaches, and considering the impact of its most crucial configuration parameters. Results show that a BLE sensor node running on a coin cell battery can achieve a lifetime beyond one year while transferring around 10 Mbit/day, in realistic OSDC scenarios. PMID:28124987

Opportunistic Sensor Data Collection with Bluetooth Low Energy.

PubMed

Aguilar, Sergio; Vidal, Rafael; Gomez, Carles

2017-01-23

Bluetooth Low Energy (BLE) has gained very high momentum, as witnessed by its widespread presence in smartphones, wearables and other consumer electronics devices. This fact can be leveraged to carry out opportunistic sensor data collection (OSDC) in scenarios where a sensor node cannot communicate with infrastructure nodes. In such cases, a mobile entity (e.g., a pedestrian or a vehicle) equipped with a BLE-enabled device can collect the data obtained by the sensor node when both are within direct communication range. In this paper, we characterize, both analytically and experimentally, the performance and trade-offs of BLE as a technology for OSDC, for the two main identified approaches, and considering the impact of its most crucial configuration parameters. Results show that a BLE sensor node running on a coin cell battery can achieve a lifetime beyond one year while transferring around 10 Mbit/day, in realistic OSDC scenarios.

Photonic Quantum Networks formed from NV− centers

PubMed Central

Nemoto, Kae; Trupke, Michael; Devitt, Simon J.; Scharfenberger, Burkhard; Buczak, Kathrin; Schmiedmayer, Jörg; Munro, William J.

2016-01-01

In this article we present a simple repeater scheme based on the negatively-charged nitrogen vacancy centre in diamond. Each repeater node is built from modules comprising an optical cavity containing a single NV−, with one nuclear spin from 15N as quantum memory. The module uses only deterministic processes and interactions to achieve high fidelity operations (>99%), and modules are connected by optical fiber. In the repeater node architecture, the processes between modules by photons can be in principle deterministic, however current limitations on optical components lead the processes to be probabilistic but heralded. Our resource-modest repeater architecture contains two modules at each node, and the repeater nodes are then connected by entangled photon pairs. We discuss the performance of such a quantum repeater network with modest resources and then incorporate more resource-intense strategies step by step. Our architecture should allow large-scale quantum information networks with existing or near future technology. PMID:27215433

A Teleo-Reactive Node for Implementing Internet of Things Systems

PubMed Central

Álvarez, Bárbara; Fernández, Diego

2018-01-01

The Internet of Things (IoT) is one of today’s main disruptive technologies and, although massive research has been carried out in recent years, there are still some open issues such as the consideration of software engineering methods and tools. We propose the adoption of the Teleo-Reactive approach in order to facilitate the development of Internet of Things systems as a set of communicating Teleo-Reactive nodes. The software behavior of the nodes is specified in terms of goals, perceptions and actions over the environment, achieving higher abstraction than using general-purpose programming languages and therefore, enhancing the involvement of non-technical users in the specification process. Throughout this paper, we describe the elements of a Teleo-Reactive node and a systematic procedure for translating Teleo-Reactive specifications into executable code for Internet of Things devices. The case study of a robotic agent is used in order to validate the whole approach. PMID:29614772

Photonic Quantum Networks formed from NV(-) centers.

PubMed

Nemoto, Kae; Trupke, Michael; Devitt, Simon J; Scharfenberger, Burkhard; Buczak, Kathrin; Schmiedmayer, Jörg; Munro, William J

2016-05-24

In this article we present a simple repeater scheme based on the negatively-charged nitrogen vacancy centre in diamond. Each repeater node is built from modules comprising an optical cavity containing a single NV(-), with one nuclear spin from (15)N as quantum memory. The module uses only deterministic processes and interactions to achieve high fidelity operations (>99%), and modules are connected by optical fiber. In the repeater node architecture, the processes between modules by photons can be in principle deterministic, however current limitations on optical components lead the processes to be probabilistic but heralded. Our resource-modest repeater architecture contains two modules at each node, and the repeater nodes are then connected by entangled photon pairs. We discuss the performance of such a quantum repeater network with modest resources and then incorporate more resource-intense strategies step by step. Our architecture should allow large-scale quantum information networks with existing or near future technology.

A Teleo-Reactive Node for Implementing Internet of Things Systems.

PubMed

Sánchez, Pedro; Álvarez, Bárbara; Antolinos, Elías; Fernández, Diego; Iborra, Andrés

2018-04-01

The Internet of Things (IoT) is one of today's main disruptive technologies and, although massive research has been carried out in recent years, there are still some open issues such as the consideration of software engineering methods and tools. We propose the adoption of the Teleo-Reactive approach in order to facilitate the development of Internet of Things systems as a set of communicating Teleo-Reactive nodes. The software behavior of the nodes is specified in terms of goals, perceptions and actions over the environment, achieving higher abstraction than using general-purpose programming languages and therefore, enhancing the involvement of non-technical users in the specification process. Throughout this paper, we describe the elements of a Teleo-Reactive node and a systematic procedure for translating Teleo-Reactive specifications into executable code for Internet of Things devices. The case study of a robotic agent is used in order to validate the whole approach.

Large-scale seismic waveform quality metric calculation using Hadoop

DOE PAGES

Magana-Zook, Steven; Gaylord, Jessie M.; Knapp, Douglas R.; ...

2016-05-27

Here in this work we investigated the suitability of Hadoop MapReduce and Apache Spark for large-scale computation of seismic waveform quality metrics by comparing their performance with that of a traditional distributed implementation. The Incorporated Research Institutions for Seismology (IRIS) Data Management Center (DMC) provided 43 terabytes of broadband waveform data of which 5.1 TB of data were processed with the traditional architecture, and the full 43 TB were processed using MapReduce and Spark. Maximum performance of ~0.56 terabytes per hour was achieved using all 5 nodes of the traditional implementation. We noted that I/O dominated processing, and that I/Omore » performance was deteriorating with the addition of the 5th node. Data collected from this experiment provided the baseline against which the Hadoop results were compared. Next, we processed the full 43 TB dataset using both MapReduce and Apache Spark on our 18-node Hadoop cluster. We conducted these experiments multiple times with various subsets of the data so that we could build models to predict performance as a function of dataset size. We found that both MapReduce and Spark significantly outperformed the traditional reference implementation. At a dataset size of 5.1 terabytes, both Spark and MapReduce were about 15 times faster than the reference implementation. Furthermore, our performance models predict that for a dataset of 350 terabytes, Spark running on a 100-node cluster would be about 265 times faster than the reference implementation. We do not expect that the reference implementation deployed on a 100-node cluster would perform significantly better than on the 5-node cluster because the I/O performance cannot be made to scale. Finally, we note that although Big Data technologies clearly provide a way to process seismic waveform datasets in a high-performance and scalable manner, the technology is still rapidly changing, requires a high degree of investment in personnel, and will likely require significant changes in other parts of our infrastructure. Nevertheless, we anticipate that as the technology matures and third-party tool vendors make it easier to manage and operate clusters, Hadoop (or a successor) will play a large role in our seismic data processing.« less

Large-scale seismic waveform quality metric calculation using Hadoop

DOE Office of Scientific and Technical Information (OSTI.GOV)

Magana-Zook, Steven; Gaylord, Jessie M.; Knapp, Douglas R.

Here in this work we investigated the suitability of Hadoop MapReduce and Apache Spark for large-scale computation of seismic waveform quality metrics by comparing their performance with that of a traditional distributed implementation. The Incorporated Research Institutions for Seismology (IRIS) Data Management Center (DMC) provided 43 terabytes of broadband waveform data of which 5.1 TB of data were processed with the traditional architecture, and the full 43 TB were processed using MapReduce and Spark. Maximum performance of ~0.56 terabytes per hour was achieved using all 5 nodes of the traditional implementation. We noted that I/O dominated processing, and that I/Omore » performance was deteriorating with the addition of the 5th node. Data collected from this experiment provided the baseline against which the Hadoop results were compared. Next, we processed the full 43 TB dataset using both MapReduce and Apache Spark on our 18-node Hadoop cluster. We conducted these experiments multiple times with various subsets of the data so that we could build models to predict performance as a function of dataset size. We found that both MapReduce and Spark significantly outperformed the traditional reference implementation. At a dataset size of 5.1 terabytes, both Spark and MapReduce were about 15 times faster than the reference implementation. Furthermore, our performance models predict that for a dataset of 350 terabytes, Spark running on a 100-node cluster would be about 265 times faster than the reference implementation. We do not expect that the reference implementation deployed on a 100-node cluster would perform significantly better than on the 5-node cluster because the I/O performance cannot be made to scale. Finally, we note that although Big Data technologies clearly provide a way to process seismic waveform datasets in a high-performance and scalable manner, the technology is still rapidly changing, requires a high degree of investment in personnel, and will likely require significant changes in other parts of our infrastructure. Nevertheless, we anticipate that as the technology matures and third-party tool vendors make it easier to manage and operate clusters, Hadoop (or a successor) will play a large role in our seismic data processing.« less

Increasing reticle inspection efficiency and reducing wafer printchecks at 14nm using automated defect classification and simulation

NASA Astrophysics Data System (ADS)

Paracha, Shazad; Goodman, Eliot; Eynon, Benjamin G.; Noyes, Ben F.; Ha, Steven; Kim, Jong-Min; Lee, Dong-Seok; Lee, Dong-Heok; Cho, Sang-Soo; Ham, Young M.; Vacca, Anthony D.; Fiekowsky, Peter J.; Fiekowsky, Daniel I.

2014-10-01

IC fabs inspect critical masks on a regular basis to ensure high wafer yields. These requalification inspections are costly for many reasons including the capital equipment, system maintenance, and labor costs. In addition, masks typically remain in the "requal" phase for extended, non-productive periods of time. The overall "requal" cycle time in which reticles remain non-productive is challenging to control. Shipping schedules can slip when wafer lots are put on hold until the master critical layer reticle is returned to production. Unfortunately, substituting backup critical layer reticles can significantly reduce an otherwise tightly controlled process window adversely affecting wafer yields. One major requal cycle time component is the disposition process of mask inspections containing hundreds of defects. Not only is precious non-productive time extended by reviewing hundreds of potentially yield-limiting detections, each additional classification increases the risk of manual review techniques accidentally passing real yield limiting defects. Even assuming all defects of interest are flagged by operators, how can any person's judgment be confident regarding lithographic impact of such defects? The time reticles spend away from scanners combined with potential yield loss due to lithographic uncertainty presents significant cycle time loss and increased production costs An automatic defect analysis system (ADAS), which has been in fab production for numerous years, has been improved to handle the new challenges of 14nm node automate reticle defect classification by simulating each defect's printability under the intended illumination conditions. In this study, we have created programmed defects on a production 14nm node critical-layer reticle. These defects have been analyzed with lithographic simulation software and compared to the results of both AIMS optical simulation and to actual wafer prints.

Potential and challenges of body area networks for personal health.

PubMed

Penders, Julien; van de Molengraft, Jef; Brown, Lindsay; Grundlehner, Bernard; Gyselinckx, Bert; Van Hoof, Chris

2009-01-01

This paper illustrates how body area network technology may enable new personal health concepts. A BAN technology platform is presented, which integrates technology building blocks from the Human++ research program on autonomous wireless sensors. Technology evaluation for the case of wireless sleep staging and real-time arousal monitoring is reported. Key technology challenges are discussed. The ultimate target is the development of miniaturized body sensor nodes powered by body-energy, anticipating the needs of emerging personal health applications.

Development of Implantable Wireless Sensor Nodes for Animal Husbandry and MedTech Innovation

PubMed Central

Lu, Jian; Zhang, Lan; Zhang, Dapeng; Matsumoto, Sohei; Hiroshima, Hiroshi; Maeda, Ryutaro; Sato, Mizuho; Toyoda, Atsushi; Gotoh, Takafumi; Ohkohchi, Nobuhiro

2018-01-01

In this paper, we report the development, evaluation, and application of ultra-small low-power wireless sensor nodes for advancing animal husbandry, as well as for innovation of medical technologies. A radio frequency identification (RFID) chip with hybrid interface and neglectable power consumption was introduced to enable switching of ON/OFF and measurement mode after implantation. A wireless power transmission system with a maximum efficiency of 70% and an access distance of up to 5 cm was developed to allow the sensor node to survive for a duration of several weeks from a few minutes’ remote charge. The results of field tests using laboratory mice and a cow indicated the high accuracy of the collected biological data and bio-compatibility of the package. As a result of extensive application of the above technologies, a fully solid wireless pH sensor and a surgical navigation system using artificial magnetic field and a 3D MEMS magnetic sensor are introduced in this paper, and the preliminary experimental results are presented and discussed. PMID:29587448

EUV lithography: NXE platform performance overview

NASA Astrophysics Data System (ADS)

Peeters, Rudy; Lok, Sjoerd; Mallman, Joerg; van Noordenburg, Martijn; Harned, Noreen; Kuerz, Peter; Lowisch, Martin; van Setten, Eelco; Schiffelers, Guido; Pirati, Alberto; Stoeldraijer, Judon; Brandt, David; Farrar, Nigel; Fomenkov, Igor; Boom, Herman; Meiling, Hans; Kool, Ron

2014-04-01

The first NXE3300B systems have been qualified and shipped to customers. The NXE:3300B is ASML's third generation EUV system and has an NA of 0.33. It succeeds the NXE:3100 system (NA of 0.25), which has allowed customers to gain valuable EUV experience. Good overlay and imaging performance has been shown on the NXE:3300B system in line with 22nm device requirements. Full wafer CDU performance of <1.5nm for 22nm dense and iso lines at a dose of ~16mJ/cm2 has been achieved. Matched machine overlay (NXE to immersion) of around 3.5nm has been demonstrated on multiple systems. Dense lines have been exposed down to 13nm half pitch, and contact holes down to 17nm half pitch. 10nm node Metal-1 layers have been exposed with a DOF of 120nm, and using single spacer assisted double patterning flow a resolution of 9nm has been achieved. Source power is the major challenge to overcome in order to achieve cost-effectiveness in EUV and enable introduction into High Volume Manufacturing. With the development of the MOPA+prepulse operation of the source, steps in power have been made, and with automated control the sources have been prepared to be used in a preproduction fab environment. Flexible pupil formation is under development for the NXE:3300B which will extend the usage of the system in HVM, and the resolution for the full system performance can be extended to 16nm. Further improvements in defectivity performance have been made, while in parallel full-scale pellicles are being developed. In this paper we will discuss the current NXE:3300B performance, its future enhancements and the recent progress in EUV source performance.

Novel diagnostic procedure for determining metastasis to sentinel lymph nodes in breast cancer using a semi-dry dot-blot method.

PubMed

Otsubo, Ryota; Oikawa, Masahiro; Hirakawa, Hiroshi; Shibata, Kenichiro; Abe, Kuniko; Hayashi, Tomayoshi; Kinoshita, Naoe; Shigematsu, Kazuto; Hatachi, Toshiko; Yano, Hiroshi; Matsumoto, Megumi; Takagi, Katsunori; Tsuchiya, Tomoshi; Tomoshige, Koichi; Nakashima, Masahiro; Taniguchi, Hideki; Omagari, Takeyuki; Itoyanagi, Noriaki; Nagayasu, Takeshi

2014-02-15

We developed an easy, quick and cost-effective detection method for lymph node metastasis called the semi-dry dot-blot (SDB) method, which visualizes the presence of cancer cells with washing of sectioned lymph nodes by anti-pancytokeratin antibody, modifying dot-blot technology. We evaluated the validity and efficacy of the SDB method for the diagnosis of lymph node metastasis in a clinical setting (Trial 1). To evaluate the validity of the SDB method in clinical specimens, 180 dissected lymph nodes from 29 cases, including breast, gastric and colorectal cancer, were examined. Each lymph node was sliced at the maximum diameter and the sensitivity, specificity and accuracy of the SDB method were determined and compared with the final pathology report. Metastasis was detected in 32 lymph nodes (17.8%), and the sensitivity, specificity and accuracy of the SDB method were 100, 98.0 and 98.3%, respectively (Trial 2). To evaluate the efficacy of the SDB method in sentinel lymph node (SLN) biopsy, 174 SLNs from 100 cases of clinically node-negative breast cancer were analyzed. Each SLN was longitudinally sliced at 2-mm intervals and the sensitivity, specificity, accuracy and time required for the SDB method were determined and compared with the intraoperative pathology report. Metastasis was detected in 15 SLNs (8.6%), and the sensitivity, specificity, accuracy and mean required time of the SDB method were 93.3, 96.9, 96.6 and 43.3 min, respectively. The SDB method is a novel and reliable modality for the intraoperative diagnosis of SLN metastasis. © 2013 UICC.

Towards Terabit Memories

NASA Astrophysics Data System (ADS)

Hoefflinger, Bernd

Memories have been the major yardstick for the continuing validity of Moore's law. In single-transistor-per-Bit dynamic random-access memories (DRAM), the number of bits per chip pretty much gives us the number of transistors. For decades, DRAM's have offered the largest storage capacity per chip. However, DRAM does not scale any longer, both in density and voltage, severely limiting its power efficiency to 10 fJ/b. A differential DRAM would gain four-times in density and eight-times in energy. Static CMOS RAM (SRAM) with its six transistors/cell is gaining in reputation because it scales well in cell size and operating voltage so that its fundamental advantage of speed, non-destructive read-out and low-power standby could lead to just 2.5 electrons/bit in standby and to a dynamic power efficiency of 2aJ/b. With a projected 2020 density of 16 Gb/cm², the SRAM would be as dense as normal DRAM and vastly better in power efficiency, which would mean a major change in the architecture and market scenario for DRAM versus SRAM. Non-volatile Flash memory have seen two quantum jumps in density well beyond the roadmap: Multi-Bit storage per transistor and high-density TSV (through-silicon via) technology. The number of electrons required per Bit on the storage gate has been reduced since their first realization in 1996 by more than an order of magnitude to 400 electrons/Bit in 2010 for a complexity of 32Gbit per chip at the 32 nm node. Chip stacking of eight chips with TSV has produced a 32GByte solid-state drive (SSD). A stack of 32 chips with 2 b/cell at the 16 nm node will reach a density of 2.5 Terabit/cm². Non-volatile memory with a density of 10 × 10 nm²/Bit is the target for widespread development. Phase-change memory (PCM) and resistive memory (RRAM) lead in cell density, and they will reach 20 Gb/cm² in 2D and higher with 3D chip stacking. This is still almost an order-of-magnitude less than Flash. However, their read-out speed is ~10-times faster, with as yet little data on their energy/b. As a read-out memory with unparalleled retention and lifetime, the ROM with electron-beam direct-write-lithography (Chap. 8) should be considered for its projected 2D density of 250 Gb/cm², a very small read energy of 0.1 μW/Gb/s. The lithography write-speed 10 ms/Terabit makes this ROM a serious contentender for the optimum in non-volatile, tamper-proof storage.

LoWMob: Intra-PAN Mobility Support Schemes for 6LoWPAN

PubMed Central

Bag, Gargi; Raza, Muhammad Taqi; Kim, Ki-Hyung; Yoo, Seung-Wha

2009-01-01

Mobility in 6LoWPAN (IPv6 over Low Power Personal Area Networks) is being utilized in realizing many applications where sensor nodes, while moving, sense and transmit the gathered data to a monitoring server. By employing IEEE802.15.4 as a baseline for the link layer technology, 6LoWPAN implies low data rate and low power consumption with periodic sleep and wakeups for sensor nodes, without requiring them to incorporate complex hardware. Also enabling sensor nodes with IPv6 ensures that the sensor data can be accessed anytime and anywhere from the world. Several existing mobility-related schemes like HMIPv6, MIPv6, HAWAII, and Cellular IP require active participation of mobile nodes in the mobility signaling, thus leading to the mobility-related changes in the protocol stack of mobile nodes. In this paper, we present LoWMob, which is a network-based mobility scheme for mobile 6LoWPAN nodes in which the mobility of 6LoWPAN nodes is handled at the network-side. LoWMob ensures multi-hop communication between gateways and mobile nodes with the help of the static nodes within a 6LoWPAN. In order to reduce the signaling overhead of static nodes for supporting mobile nodes, LoWMob proposes a mobility support packet format at the adaptation layer of 6LoWPAN. Also we present a distributed version of LoWMob, named as DLoWMob (or Distributed LoWMob), which employs Mobility Support Points (MSPs) to distribute the traffic concentration at the gateways and to optimize the multi-hop routing path between source and destination nodes in a 6LoWPAN. Moreover, we have also discussed the security considerations for our proposed mobility schemes. The performance of our proposed schemes is evaluated in terms of mobility signaling costs, end-to-end delay, and packet success ratio. PMID:22346730

LoWMob: Intra-PAN Mobility Support Schemes for 6LoWPAN.

PubMed

Bag, Gargi; Raza, Muhammad Taqi; Kim, Ki-Hyung; Yoo, Seung-Wha

2009-01-01

Mobility in 6LoWPAN (IPv6 over Low Power Personal Area Networks) is being utilized in realizing many applications where sensor nodes, while moving, sense and transmit the gathered data to a monitoring server. By employing IEEE802.15.4 as a baseline for the link layer technology, 6LoWPAN implies low data rate and low power consumption with periodic sleep and wakeups for sensor nodes, without requiring them to incorporate complex hardware. Also enabling sensor nodes with IPv6 ensures that the sensor data can be accessed anytime and anywhere from the world. Several existing mobility-related schemes like HMIPv6, MIPv6, HAWAII, and Cellular IP require active participation of mobile nodes in the mobility signaling, thus leading to the mobility-related changes in the protocol stack of mobile nodes. In this paper, we present LoWMob, which is a network-based mobility scheme for mobile 6LoWPAN nodes in which the mobility of 6LoWPAN nodes is handled at the network-side. LoWMob ensures multi-hop communication between gateways and mobile nodes with the help of the static nodes within a 6LoWPAN. In order to reduce the signaling overhead of static nodes for supporting mobile nodes, LoWMob proposes a mobility support packet format at the adaptation layer of 6LoWPAN. Also we present a distributed version of LoWMob, named as DLoWMob (or Distributed LoWMob), which employs Mobility Support Points (MSPs) to distribute the traffic concentration at the gateways and to optimize the multi-hop routing path between source and destination nodes in a 6LoWPAN. Moreover, we have also discussed the security considerations for our proposed mobility schemes. The performance of our proposed schemes is evaluated in terms of mobility signaling costs, end-to-end delay, and packet success ratio.

A Low-Noise X-ray Astronomical Silicon-On-Insulator Pixel Detector Using a Pinned Depleted Diode Structure

PubMed Central

Kamehama, Hiroki; Kawahito, Shoji; Shrestha, Sumeet; Nakanishi, Syunta; Yasutomi, Keita; Takeda, Ayaki; Tsuru, Takeshi Go

2017-01-01

This paper presents a novel full-depletion Si X-ray detector based on silicon-on-insulator pixel (SOIPIX) technology using a pinned depleted diode structure, named the SOIPIX-PDD. The SOIPIX-PDD greatly reduces stray capacitance at the charge sensing node, the dark current of the detector, and capacitive coupling between the sensing node and SOI circuits. These features of the SOIPIX-PDD lead to low read noise, resulting high X-ray energy resolution and stable operation of the pixel. The back-gate surface pinning structure using neutralized p-well at the back-gate surface and depleted n-well underneath the p-well for all the pixel area other than the charge sensing node is also essential for preventing hole injection from the p-well by making the potential barrier to hole, reducing dark current from the Si-SiO2 interface and creating lateral drift field to gather signal electrons in the pixel area into the small charge sensing node. A prototype chip using 0.2 μm SOI technology shows very low readout noise of 11.0 e−rms, low dark current density of 56 pA/cm2 at −35 °C and the energy resolution of 200 eV(FWHM) at 5.9 keV and 280 eV (FWHM) at 13.95 keV. PMID:29295523

A Low-Noise X-ray Astronomical Silicon-On-Insulator Pixel Detector Using a Pinned Depleted Diode Structure.

PubMed

Kamehama, Hiroki; Kawahito, Shoji; Shrestha, Sumeet; Nakanishi, Syunta; Yasutomi, Keita; Takeda, Ayaki; Tsuru, Takeshi Go; Arai, Yasuo

2017-12-23

This paper presents a novel full-depletion Si X-ray detector based on silicon-on-insulator pixel (SOIPIX) technology using a pinned depleted diode structure, named the SOIPIX-PDD. The SOIPIX-PDD greatly reduces stray capacitance at the charge sensing node, the dark current of the detector, and capacitive coupling between the sensing node and SOI circuits. These features of the SOIPIX-PDD lead to low read noise, resulting high X-ray energy resolution and stable operation of the pixel. The back-gate surface pinning structure using neutralized p-well at the back-gate surface and depleted n-well underneath the p-well for all the pixel area other than the charge sensing node is also essential for preventing hole injection from the p-well by making the potential barrier to hole, reducing dark current from the Si-SiO₂ interface and creating lateral drift field to gather signal electrons in the pixel area into the small charge sensing node. A prototype chip using 0.2 μm SOI technology shows very low readout noise of 11.0 e - rms , low dark current density of 56 pA/cm² at -35 °C and the energy resolution of 200 eV(FWHM) at 5.9 keV and 280 eV (FWHM) at 13.95 keV.

Modeling single event induced crosstalk in nanometer technologies

NASA Astrophysics Data System (ADS)

Boorla, Vijay K.

Radiation effects become more important in combinational logic circuits with newer technologies. When a high energetic particle strikes at the sensitive region within the combinational logic circuit a voltage pulse called Single Event Transient is created. Recently, researchers reported Single Event Crosstalk because of increasing coupling effects. In this work, the closed form expression for SE crosstalk noise is formulated for the first time. For all calculations, 4-pi model is used in this work. The crosstalk model uses a reduced transfer function between aggressor coupling node and victim node to reduce information loss. Aggressor coupling node waveform is obtained and then applied to transfer function between the coupling node and the victim output to obtain victim noise voltage. This work includes both effect of passive aggressor loading on victim and victim loading on aggressor by considering resistive shielding effect. Noise peak expressions derived in this work show very good results in comparison to HSPICE results. Results show that average error for noise peak is 3.794% while allowing for very fast analysis. Once the SE crosstalk noise is calculated, one can hire mitigation techniques such as driver sizing. A standard DTMOS technique along with sizing is proposed in this work to mitigate SE crosstalk. This combined approach can saves in some areas compared to driver sizing alone. Key Words: Crosstalk Noise, Closed Form Modeling, Standard DTMOS

An improved label propagation algorithm based on node importance and random walk for community detection

NASA Astrophysics Data System (ADS)

Ma, Tianren; Xia, Zhengyou

2017-05-01

Currently, with the rapid development of information technology, the electronic media for social communication is becoming more and more popular. Discovery of communities is a very effective way to understand the properties of complex networks. However, traditional community detection algorithms consider the structural characteristics of a social organization only, with more information about nodes and edges wasted. In the meanwhile, these algorithms do not consider each node on its merits. Label propagation algorithm (LPA) is a near linear time algorithm which aims to find the community in the network. It attracts many scholars owing to its high efficiency. In recent years, there are more improved algorithms that were put forward based on LPA. In this paper, an improved LPA based on random walk and node importance (NILPA) is proposed. Firstly, a list of node importance is obtained through calculation. The nodes in the network are sorted in descending order of importance. On the basis of random walk, a matrix is constructed to measure the similarity of nodes and it avoids the random choice in the LPA. Secondly, a new metric IAS (importance and similarity) is calculated by node importance and similarity matrix, which we can use to avoid the random selection in the original LPA and improve the algorithm stability. Finally, a test in real-world and synthetic networks is given. The result shows that this algorithm has better performance than existing methods in finding community structure.

Evaluation of the Effects of Hidden Node Problems in IEEE 802.15.7 Uplink Performance

PubMed Central

Ley-Bosch, Carlos; Alonso-González, Itziar; Sánchez-Rodríguez, David; Ramírez-Casañas, Carlos

2016-01-01

In the last few years, the increasing use of LEDs in illumination systems has been conducted due to the emergence of Visible Light Communication (VLC) technologies, in which data communication is performed by transmitting through the visible band of the electromagnetic spectrum. In 2011, the Institute of Electrical and Electronics Engineers (IEEE) published the IEEE 802.15.7 standard for Wireless Personal Area Networks based on VLC. Due to limitations in the coverage of the transmitted signal, wireless networks can suffer from the hidden node problems, when there are nodes in the network whose transmissions are not detected by other nodes. This problem can cause an important degradation in communications when they are made by means of the Carrier Sense Multiple Access with Collision Avoidance (CSMA/CA) access control method, which is used in IEEE 802.15.7 This research work evaluates the effects of the hidden node problem in the performance of the IEEE 802.15.7 standard We implement a simulator and analyze VLC performance in terms of parameters like end-to-end goodput and message loss rate. As part of this research work, a solution to the hidden node problem is proposed, based on the use of idle patterns defined in the standard. Idle patterns are sent by the network coordinator node to communicate to the other nodes that there is an ongoing transmission. The validity of the proposed solution is demonstrated with simulation results. PMID:26861352

Evaluation of the Effects of Hidden Node Problems in IEEE 802.15.7 Uplink Performance.

PubMed

Ley-Bosch, Carlos; Alonso-González, Itziar; Sánchez-Rodríguez, David; Ramírez-Casañas, Carlos

2016-02-06

In the last few years, the increasing use of LEDs in illumination systems has been conducted due to the emergence of Visible Light Communication (VLC) technologies, in which data communication is performed by transmitting through the visible band of the electromagnetic spectrum. In 2011, the Institute of Electrical and Electronics Engineers (IEEE) published the IEEE 802.15.7 standard for Wireless Personal Area Networks based on VLC. Due to limitations in the coverage of the transmitted signal, wireless networks can suffer from the hidden node problems, when there are nodes in the network whose transmissions are not detected by other nodes. This problem can cause an important degradation in communications when they are made by means of the Carrier Sense Multiple Access with Collision Avoidance (CSMA/CA) access control method, which is used in IEEE 802.15.7 This research work evaluates the effects of the hidden node problem in the performance of the IEEE 802.15.7 standard We implement a simulator and analyze VLC performance in terms of parameters like end-to-end goodput and message loss rate. As part of this research work, a solution to the hidden node problem is proposed, based on the use of idle patterns defined in the standard. Idle patterns are sent by the network coordinator node to communicate to the other nodes that there is an ongoing transmission. The validity of the proposed solution is demonstrated with simulation results.

Enhanced methodology of focus control and monitoring on scanner tool

NASA Astrophysics Data System (ADS)

Chen, Yen-Jen; Kim, Young Ki; Hao, Xueli; Gomez, Juan-Manuel; Tian, Ye; Kamalizadeh, Ferhad; Hanson, Justin K.

2017-03-01

As the demand of the technology node shrinks from 14nm to 7nm, the reliability of tool monitoring techniques in advanced semiconductor fabs to achieve high yield and quality becomes more critical. Tool health monitoring methods involve periodic sampling of moderately processed test wafers to detect for particles, defects, and tool stability in order to ensure proper tool health. For lithography TWINSCAN scanner tools, the requirements for overlay stability and focus control are very strict. Current scanner tool health monitoring methods include running BaseLiner to ensure proper tool stability on a periodic basis. The focus measurement on YIELDSTAR by real-time or library-based reconstruction of critical dimensions (CD) and side wall angle (SWA) has been demonstrated as an accurate metrology input to the control loop. The high accuracy and repeatability of the YIELDSTAR focus measurement provides a common reference of scanner setup and user process. In order to further improve the metrology and matching performance, Diffraction Based Focus (DBF) metrology enabling accurate, fast, and non-destructive focus acquisition, has been successfully utilized for focus monitoring/control of TWINSCAN NXT immersion scanners. The optimal DBF target was determined to have minimized dose crosstalk, dynamic precision, set-get residual, and lens aberration sensitivity. By exploiting this new measurement target design, 80% improvement in tool-to-tool matching, >16% improvement in run-to-run mean focus stability, and >32% improvement in focus uniformity have been demonstrated compared to the previous BaseLiner methodology. Matching <2.4 nm across multiple NXT immersion scanners has been achieved with the new methodology of set baseline reference. This baseline technique, with either conventional BaseLiner low numerical aperture (NA=1.20) mode or advanced illumination high NA mode (NA=1.35), has also been evaluated to have consistent performance. This enhanced methodology of focus control and monitoring on multiple illumination conditions, opens an avenue to significantly reduce Focus-Exposure Matrix (FEM) wafer exposure for new product/layer best focus (BF) setup.

Re-Engineering the Tropical Rainfall Measuring Mission (TRMM) Satellite Utilizing Goddard Space Flight Center (GSFC) Mission Services Center (GMSEC) Middleware Based Technology to Enable Lights Out Operations and Autonomous Re-Dump of Lost Telemetry Data

NASA Technical Reports Server (NTRS)

Marius, Julio L.; Busch, Jim

2008-01-01

The Tropical Rainfall Measuring Mission (TRMM) spacecraft was launched in November of 1996 in order to obtain unique three dimensional radar cross sectional observations of cloud structures with particular interest in hurricanes. The TRMM mission life was recently extended with current estimates that operations will continue through the 2012-2013 timeframe. Faced with this extended mission profile, the project has embarked on a technology refresh and re-engineering effort. TRMM has recently implemented a re-engineering effort to expand a middleware based messaging architecture to enable fully redundant lights-out of flight operations activities. The middleware approach is based on the Goddard Mission Services Evolution Center (GMSEC) architecture, tools and associated open-source Applications Programming Interface (API). Middleware based messaging systems are useful in spacecraft operations and automation systems because private node based knowledge (such as that within a telemetry and command system) can be broadcast on the middleware messaging bus and hence enable collaborative decisions to be made by multiple subsystems. In this fashion, private data is made public and distributed within the local area network and multiple nodes can remain synchronized with other nodes. This concept is useful in a fully redundant architecture whereby one node is monitoring the processing of the 'prime' node so that in the event of a failure the backup node can assume operations of the prime, without loss of state knowledge. This paper will review and present the experiences, architecture, approach and lessons learned of the TRMM re-engineering effort centered on the GMSEC middleware architecture and tool suite. Relevant information will be presented that relates to the dual redundant parallel nature of the Telemetry and Command (T and C) and Front-End systems and how these systems can interact over a middleware bus to achieve autonomous operations including autonomous commanding to recover missing science data during the same spacecraft contact.

Characterizing Radio Emission From Extensive Air Showers with the SLAC-T510 Experiment, with Applications to ANITA

NASA Astrophysics Data System (ADS)

McGuire, Felicia Ann

Essential to metal-oxide-semiconductor field-effect transistor (MOSFET) scaling is the reduction of the supply voltage to mitigate the power consumption and corresponding heat dissipation. Conventional dielectric materials are subject to the thermal limit imposed by the Boltzmann factor in the subthreshold swing, which places an absolute minimum on the supply voltage required to modulate the current. Furthermore, as technology approaches the 5 nm node, electrostatic control of a silicon channel becomes exceedingly difficult, regardless of the gating technique. This notion of "the end of silicon scaling" has rapidly increased research into more scalable channel materials as well as new methods of transistor operation. Among the many promising options are two-dimensional (2D) FETs and negative capacitance (NC) FETs. 2D-FETs make use of atomically thin semiconducting channels that have enabled demonstrated scalability beyond what silicon can offer. NC-FETs demonstrate an effective negative capacitance arising from the integration of a ferroelectric into the transistor gate stack, allowing sub-60 mV/dec switching. While both of these devices provide significant advantages, neither can accomplish the ultimate goal of a FET that is both low-voltage and scalable. However, an appropriate fusion of the 2D-FET and NC-FET into a 2D NC-FET has the potential of enabling a steep-switching device that is dimensionally scalable beyond the 5 nm technology node. In this work, the motivation for and operation of 2D NC-FETs is presented. Experimental realization of 2D NC-FETs using 2D transition metal dichalcogenide molybdenum disulfide (MoS2) as the channel is shown with two different ferroelectric materials: 1) a solution-processed, polymeric poly(vinylidene difluoride trifluoroethylene) ferroelectric and 2) an atomic layer deposition (ALD) grown hafnium zirconium oxide (HfZrO2) ferroelectric. Each ferroelectric was integrated into the gate stack of a 2D-FET having either a top-gate (polymeric ferroelectric) or bottom-gate (HfZrO2 ferroelectric) configuration. HfZrO 2 devices with metallic interfacial layers (between ferroelectric and dielectric) and thinner ferroelectric layers were found to reduce both the hysteresis and the threshold voltage. Detailed characterization of the devices was performed and, most significantly, the 2D NC-FETs with HfZrO2 reproducibly yielded subthreshold swings well below the thermal limit with over more than four orders of magnitude in drain current modulation. HfZrO 2 devices without metallic interfacial layers were utilized to explore the impact of ferroelectric thickness, dielectric thickness, and dielectric composition on device performance. The impact of an interfacial metallic layer on the device operation was investigated in devices with HfZrO2 and shown to be crucial at enabling sub-60 mV/dec switching and large internal voltage gains. The significance of dielectric material choice on device performance was explored and found to be a critical factor in 2D NC-FET transistor operation. These successful results pave the way for future integration of this new device structure into existing technology markets.

Imaging Grating Spectrometer (I-GRASP) for Solar Soft X-Ray Spectral Measurements in Critically Under-Observed 0.5 - 7 nm Spectral Range

NASA Astrophysics Data System (ADS)

Didkovsky, L. V.; Wieman, S. R.; Chao, W.; Woods, T. N.; Jones, A. R.; Thiemann, E.; Mason, J. P.

2016-12-01

We discuss science and technology advantages of the Imaging Grating Spectrometer (I-GRASP) based on a novel transmission diffracting grating (TDG) made possible by technology for fabricating Fresnel zone plates (ZPs) developed at the Lawrence Berkeley National Laboratory (LBNL). Older version TDGs with 200 nm period available in the 1990s became a proven technology for providing 21 years of regular measurements of solar EUV irradiance. I-GRASP incorporates an advanced TDG with a grating period of 50 nm providing four times better diffraction dispersion than the 200 nm period gratings used in the SOHO/CELIAS/SEM, the SDO/EVE/ESP flight spectrophotometers, and the EVE/SAM sounding rocket channel. Such new technology for the TDG combined with a back-illuminated 2000 x 1504 CMOS image sensor with 7 micron pixels, will provide spatially-and-spectrally resolved images and spectra from individual Active Regions (ARs) and solar flares with high (0.15 nm) spectral resolution. Such measurements are not available in the spectral band from about 2 to 6 nm from existing or planned spectrographs and will be significantly important to study ARs and solar flare temperatures and dynamics, to improve existing spectral models, e.g. CHIANTI, and to better understand processes in the Earth's atmosphere processes. To test this novel technology, we have proposed to the NASA LCAS program an I-GRASP version for a sounding rocket flight to increase the TDG TRL to a level appropriate for future CubeSat projects.

A Mobile Anchor Assisted Localization Algorithm Based on Regular Hexagon in Wireless Sensor Networks

PubMed Central

Rodrigues, Joel J. P. C.

2014-01-01

Localization is one of the key technologies in wireless sensor networks (WSNs), since it provides fundamental support for many location-aware protocols and applications. Constraints of cost and power consumption make it infeasible to equip each sensor node in the network with a global position system (GPS) unit, especially for large-scale WSNs. A promising method to localize unknown nodes is to use several mobile anchors which are equipped with GPS units moving among unknown nodes and periodically broadcasting their current locations to help nearby unknown nodes with localization. This paper proposes a mobile anchor assisted localization algorithm based on regular hexagon (MAALRH) in two-dimensional WSNs, which can cover the whole monitoring area with a boundary compensation method. Unknown nodes calculate their positions by using trilateration. We compare the MAALRH with HILBERT, CIRCLES, and S-CURVES algorithms in terms of localization ratio, localization accuracy, and path length. Simulations show that the MAALRH can achieve high localization ratio and localization accuracy when the communication range is not smaller than the trajectory resolution. PMID:25133212

The PixFEL project: Progress towards a fine pitch X-ray imaging camera for next generation FEL facilities

NASA Astrophysics Data System (ADS)

Rizzo, G.; Batignani, G.; Benkechkache, M. A.; Bettarini, S.; Casarosa, G.; Comotti, D.; Dalla Betta, G.-F.; Fabris, L.; Forti, F.; Grassi, M.; Lodola, L.; Malcovati, P.; Manghisoni, M.; Mendicino, R.; Morsani, F.; Paladino, A.; Pancheri, L.; Paoloni, E.; Ratti, L.; Re, V.; Traversi, G.; Vacchi, C.; Verzellesi, G.; Xu, H.

2016-07-01

The INFN PixFEL project is developing the fundamental building blocks for a large area X-ray imaging camera to be deployed at next generation free electron laser (FEL) facilities with unprecedented intensity. Improvement in performance beyond the state of art in imaging instrumentation will be explored adopting advanced technologies like active edge sensors, a 65 nm node CMOS process and vertical integration. These are the key ingredients of the PixFEL project to realize a seamless large area focal plane instrument composed by a matrix of multilayer four-side buttable tiles. In order to minimize the dead area and reduce ambiguities in image reconstruction, a fine pitch active edge thick sensor is being optimized to cope with very high intensity photon flux, up to 104 photons per pixel, in the range from 1 to 10 keV. A low noise analog front-end channel with this wide dynamic range and a novel dynamic compression feature, together with a low power 10 bit analog to digital conversion up to 5 MHz, has been realized in a 110 μm pitch with a 65 nm CMOS process. Vertical interconnection of two CMOS tiers will be also explored in the future to build a four-side buttable readout chip with high density memories. In the long run the objective of the PixFEL project is to build a flexible X-ray imaging camera for operation both in burst mode, like at the European X-FEL, or in continuous mode with the high frame rates anticipated for future FEL facilities.

MUSIC algorithm DoA estimation for cooperative node location in mobile ad hoc networks

NASA Astrophysics Data System (ADS)

Warty, Chirag; Yu, Richard Wai; ElMahgoub, Khaled; Spinsante, Susanna

In recent years the technological development has encouraged several applications based on distributed communications network without any fixed infrastructure. The problem of providing a collaborative early warning system for multiple mobile nodes against a fast moving object. The solution is provided subject to system level constraints: motion of nodes, antenna sensitivity and Doppler effect at 2.4 GHz and 5.8 GHz. This approach consists of three stages. The first phase consists of detecting the incoming object using a highly directive two element antenna at 5.0 GHz band. The second phase consists of broadcasting the warning message using a low directivity broad antenna beam using 2× 2 antenna array which then in third phase will be detected by receiving nodes by using direction of arrival (DOA) estimation technique. The DOA estimation technique is used to estimate the range and bearing of the incoming nodes. The position of fast arriving object can be estimated using the MUSIC algorithm for warning beam DOA estimation. This paper is mainly intended to demonstrate the feasibility of early detection and warning system using a collaborative node to node communication links. The simulation is performed to show the behavior of detecting and broadcasting antennas as well as performance of the detection algorithm. The idea can be further expanded to implement commercial grade detection and warning system

Downconversion quantum interface for a single quantum dot spin and 1550-nm single-photon channel.

PubMed

Pelc, Jason S; Yu, Leo; De Greve, Kristiaan; McMahon, Peter L; Natarajan, Chandra M; Esfandyarpour, Vahid; Maier, Sebastian; Schneider, Christian; Kamp, Martin; Höfling, Sven; Hadfield, Robert H; Forchel, Alfred; Yamamoto, Yoshihisa; Fejer, M M

2012-12-03

Long-distance quantum communication networks require appropriate interfaces between matter qubit-based nodes and low-loss photonic quantum channels. We implement a downconversion quantum interface, where the single photons emitted from a semiconductor quantum dot at 910 nm are downconverted to 1560 nm using a fiber-coupled periodically poled lithium niobate waveguide and a 2.2-μm pulsed pump laser. The single-photon character of the quantum dot emission is preserved during the downconversion process: we measure a cross-correlation g(2)(τ = 0) = 0.17 using resonant excitation of the quantum dot. We show that the downconversion interface is fully compatible with coherent optical control of the quantum dot electron spin through the observation of Rabi oscillations in the downconverted photon counts. These results represent a critical step towards a long-distance hybrid quantum network in which subsystems operating at different wavelengths are connected through quantum frequency conversion devices and 1.5-μm quantum channels.

Flexible single-layer ionic organic-inorganic frameworks towards precise nano-size separation

NASA Astrophysics Data System (ADS)

Yue, Liang; Wang, Shan; Zhou, Ding; Zhang, Hao; Li, Bao; Wu, Lixin

2016-02-01

Consecutive two-dimensional frameworks comprised of molecular or cluster building blocks in large area represent ideal candidates for membranes sieving molecules and nano-objects, but challenges still remain in methodology and practical preparation. Here we exploit a new strategy to build soft single-layer ionic organic-inorganic frameworks via electrostatic interaction without preferential binding direction in water. Upon consideration of steric effect and additional interaction, polyanionic clusters as connection nodes and cationic pseudorotaxanes acting as bridging monomers connect with each other to form a single-layer ionic self-assembled framework with 1.4 nm layer thickness. Such soft supramolecular polymer frameworks possess uniform and adjustable ortho-tetragonal nanoporous structure in pore size of 3.4-4.1 nm and exhibit greatly convenient solution processability. The stable membranes maintaining uniform porous structure demonstrate precisely size-selective separation of semiconductor quantum dots within 0.1 nm of accuracy and may hold promise for practical applications in selective transport, molecular separation and dialysis systems.

Down to 2 nm Ultra Shallow Junctions : Fabrication by IBS Plasma Immersion Ion Implantation Prototype PULSION registered

DOE Office of Scientific and Technical Information (OSTI.GOV)

Torregrosa, Frank; Etienne, Hasnaa; Mathieu, Gilles

Classical beam line implantation is limited in low energies and cannot achieve P+/N junctions requirements for <45nm node. Compared to conventional beam line ion implantation, limited to a minimum of about 200 eV, the efficiency of Plasma Immersion Ion Implantation (PIII) is no more to prove for the realization of Ultra Shallow Junctions (USJ) in semiconductor applications: this technique allows to get ultimate shallow profiles (as implanted) thanks to no lower limitation of energy and offers high dose rate. In the field of the European consortium NANOCMOS, Ultra Shallow Junctions implanted on a semi-industrial PIII prototype (PULSION registered ) designedmore » by the French company IBS, have been studied. Ultra shallow junctions implanted with BF3 at acceleration voltages down to 20V were realized. Contamination level, homogeneity and depth profile are studied. The SIMS profiles obtained show the capability to make ultra shallow profiles (as implanted) down to 2nm.« less

New Methods and Models in Wireless Networks: Multigraphs--Games--Mechanism Design

ERIC Educational Resources Information Center

Tran, Dung Trung

2010-01-01

The recent evolution of wireless technology makes wireless devices ever more powerful and intelligent. One trend is that wireless devices are becoming more inexpensive and more diverse. As a result, new technologies make it possible to equip wireless nodes with several radio transmitters/receivers. Each radio may support multiple channels which…

S-MMICs: Sub-mm-Wave Transistors and Integrated Circuits

DTIC Science & Technology

2008-09-01

Research Lab BAA DAAD19-03-R-0017 Research area 2.35: RF devices—Dr. Alfred Hung Submitted by: Mark Rodwell, Department of Electrical and Computer ...MOTIVATION / APPLICATION 3 TECHNOLOGY STATUS 4 TRANSISTOR SCALING LAWS 5 256 NM GENERATION 6 HBT POWER AMPLIFIER DEVELOPMENT 7 DRY-ETCHED EMITTER...TECHNOLOGY: 256 NM GENERATION 9 SCALED EPITAXY 11 CONCLUSIONS 12 20081103013 Executive Summary Transistor and power amplifier IC technology was

Efficient and Stable Routing Algorithm Based on User Mobility and Node Density in Urban Vehicular Network

PubMed Central

Al-Mayouf, Yusor Rafid Bahar; Ismail, Mahamod; Abdullah, Nor Fadzilah; Wahab, Ainuddin Wahid Abdul; Mahdi, Omar Adil; Khan, Suleman; Choo, Kim-Kwang Raymond

2016-01-01

Vehicular ad hoc networks (VANETs) are considered an emerging technology in the industrial and educational fields. This technology is essential in the deployment of the intelligent transportation system, which is targeted to improve safety and efficiency of traffic. The implementation of VANETs can be effectively executed by transmitting data among vehicles with the use of multiple hops. However, the intrinsic characteristics of VANETs, such as its dynamic network topology and intermittent connectivity, limit data delivery. One particular challenge of this network is the possibility that the contributing node may only remain in the network for a limited time. Hence, to prevent data loss from that node, the information must reach the destination node via multi-hop routing techniques. An appropriate, efficient, and stable routing algorithm must be developed for various VANET applications to address the issues of dynamic topology and intermittent connectivity. Therefore, this paper proposes a novel routing algorithm called efficient and stable routing algorithm based on user mobility and node density (ESRA-MD). The proposed algorithm can adapt to significant changes that may occur in the urban vehicular environment. This algorithm works by selecting an optimal route on the basis of hop count and link duration for delivering data from source to destination, thereby satisfying various quality of service considerations. The validity of the proposed algorithm is investigated by its comparison with ARP-QD protocol, which works on the mechanism of optimal route finding in VANETs in urban environments. Simulation results reveal that the proposed ESRA-MD algorithm shows remarkable improvement in terms of delivery ratio, delivery delay, and communication overhead. PMID:27855165

Implementation of Distributed Services for a Deep Sea Moored Instrument Network

NASA Astrophysics Data System (ADS)

Oreilly, T. C.; Headley, K. L.; Risi, M.; Davis, D.; Edgington, D. R.; Salamy, K. A.; Chaffey, M.

2004-12-01

The Monterey Ocean Observing System (MOOS) is a moored observatory network consisting of interconnected instrument nodes on the sea surface, midwater, and deep sea floor. We describe Software Infrastructure and Applications for MOOS ("SIAM"), which implement the management, control, and data acquisition infrastructure for the moored observatory. Links in the MOOS network include fiber-optic and 10-BaseT copper connections between the at-sea nodes. A Globalstar satellite transceiver or 900 MHz Freewave terrestrial line-of-sight RF modem provides the link to shore. All of these links support Internet protocols, providing TCP/IP connectivity throughout a system that extends from shore to sensor nodes at the air-sea interface, through the oceanic water column to a benthic network of sensor nodes extending across the deep sea floor. Exploiting this TCP/IP infrastructure as well as capabilities provided by MBARI's MOOS mooring controller, we use powerful Internet software technologies to implement a distributed management, control and data acquisition system for the moored observatory. The system design meets the demanding functional requirements specified for MOOS. Nodes and their instruments are represented by Java RMI "services" having well defined software interfaces. Clients anywhere on the network can interact with any node or instrument through its corresponding service. A client may be on the same node as the service, may be on another node, or may reside on shore. Clients may be human, e.g. when a scientist on shore accesses a deployed instrument in real-time through a user interface. Clients may also be software components that interact autonomously with instruments and nodes, e.g. for purposes such as system resource management or autonomous detection and response to scientifically interesting events. All electrical power to the moored network is provided by solar and wind energy, and the RF shore-to-mooring links are intermittent and relatively low-bandwidth connections. Thus power and wireless bandwidth are limited resources that constrain our choice of service technologies and wireless access strategy. We describe and evaluate system performance in light of actual deployment of observatory elements in Monterey Bay, and discuss how the system can be developed further. We also consider management and control strategies for the cable-to-shore observatory known as MARS ("Monterey Accelerated Research System"). The MARS cable will provide high power and continuous high-bandwidth connectivity between seafloor instrument nodes and shore, thus removing key limitations of the moored observatory. Moreover MARS functional requirements may differ significantly from MOOS requirements. In light of these differences, we discuss how elements of our MOOS moored observatory architecture might be adapted to MARS.