Screening method for selecting semiconductor substrates having defects below a predetermined level in an oxide layer

DOEpatents

Warren, William L.; Vanheusden, Karel J. R.; Schwank, James R.; Fleetwood, Daniel M.; Shaneyfelt, Marty R.; Winokur, Peter S.; Devine, Roderick A. B.

1998-01-01

A method for screening or qualifying semiconductor substrates for integrated circuit fabrication. The method comprises the steps of annealing at least one semiconductor substrate at a first temperature in a defect-activating ambient (e.g. hydrogen, forming gas, or ammonia) for sufficient time for activating any defects within on oxide layer of the substrate; measuring a defect-revealing electrical characteristic of at least a portion of the oxide layer for determining a quantity of activated defects therein; and selecting substrates for which the quantity of activated defects is below a predetermined level. The defect-revealing electrical characteristic may be a capacitance-versus-voltage (C-V) characteristic or a current-versus-voltage (I-V) characteristic that is dependent on an electrical charge in the oxide layer generated by the activated defects. Embodiments of the present invention may be applied for screening any type of semiconductor substrate or wafer having an oxide layer formed thereon or therein. This includes silicon-on-insulator substrates formed by a separation by the implantation of oxygen (SIMOX) process or the bond and etch back silicon-on-insulator (BESOI) process, as well as silicon substrates having a thermal oxide layer or a deposited oxide layer.

The heterogeneous integration of single-walled carbon nanotubes onto complementary metal oxide semiconductor circuitry for sensing applications.

PubMed

Chen, Chia-Ling; Agarwal, Vinay; Sonkusale, Sameer; Dokmeci, Mehmet R

2009-06-03

A simple methodology for integrating single-walled carbon nanotubes (SWNTs) onto complementary metal oxide semiconductor (CMOS) circuitry is presented. The SWNTs were incorporated onto the CMOS chip as the feedback resistor of a two-stage Miller compensated operational amplifier utilizing dielectrophoretic assembly. The measured electrical properties from the integrated SWNTs yield ohmic behavior with a two-terminal resistance of approximately 37.5 kOmega and the measured small signal ac gain (-2) from the inverting amplifier confirmed successful integration of carbon nanotubes onto the CMOS circuitry. Furthermore, the temperature response of the SWNTs integrated onto CMOS circuitry has been measured and had a thermal coefficient of resistance (TCR) of -0.4% degrees C(-1). This methodology, demonstrated for the integration of SWNTs onto CMOS technology, is versatile, high yield and paves the way for the realization of novel miniature carbon-nanotube-based sensor systems.

Heavy-ion induced single-event upset in integrated circuits

NASA Technical Reports Server (NTRS)

Zoutendyk, J. A.

1991-01-01

The cosmic ray environment in space can affect the operation of Integrated Circuit (IC) devices via the phenomenon of Single Event Upset (SEU). In particular, heavy ions passing through an IC can induce sufficient integrated current (charge) to alter the state of a bistable circuit, for example a memory cell. The SEU effect is studied in great detail in both static and dynamic memory devices, as well as microprocessors fabricated from bipolar, Complementary Metal Oxide Semiconductor (CMOS) and N channel Metal Oxide Semiconductor (NMOS) technologies. Each device/process reflects its individual characteristics (minimum scale geometry/process parameters) via a unique response to the direct ionization of electron hole pairs by heavy ion tracks. A summary of these analytical and experimental SEU investigations is presented.

Limits on silicon nanoelectronics for terascale integration.

PubMed

Meindl, J D; Chen, Q; Davis, J A

2001-09-14

Throughout the past four decades, silicon semiconductor technology has advanced at exponential rates in both performance and productivity. Concerns have been raised, however, that the limits of silicon technology may soon be reached. Analysis of fundamental, material, device, circuit, and system limits reveals that silicon technology has an enormous remaining potential to achieve terascale integration (TSI) of more than 1 trillion transistors per chip. Such massive-scale integration is feasible assuming the development and economical mass production of double-gate metal-oxide-semiconductor field effect transistors with gate oxide thickness of about 1 nanometer, silicon channel thickness of about 3 nanometers, and channel length of about 10 nanometers. The development of interconnecting wires for these transistors presents a major challenge to the achievement of nanoelectronics for TSI.

Band edge engineering of oxide photoanodes for photoelectrochemical water splitting: Integration of subsurface dipoles with atomic-scale control

DOE PAGES

Hikita, Yasuyuki; Nishio, Kazunori; Seitz, Linsey C.; ...

2016-01-22

One of the crucial parameters dictating the efficiency of photoelectrochemical water-splitting is the semiconductor band edge alignment with respect to hydrogen and oxygen redox potentials. Despite the importance of metal oxides in their use as photoelectrodes, studies to control the band edge alignment in aqueous solution have been limited predominantly to compound semiconductors with modulation ranges limited to a few hundred mV. The ability to modulate the flat band potential of oxide photoanodes by as much as 1.3 V, using the insertion of subsurface electrostatic dipoles near a Nb-doped SrTiO 3/aqueous electrolyte interface is reported. Lastly, the tunable range achievedmore » far exceeds previous reports in any semiconductor/aqueous electrolyte system and suggests a general design strategy for highly efficient oxide photoelectrodes.« less

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lichterman, Michael F.; Sun, Ke; Hu, Shu

Small-band-gap (E g < 2 eV) semiconductors must be stabilized for use in integrated devices that convert solar energy into the bonding energy of a reduced fuel, specifically H 2 (g) or a reduced-carbon species such as CH 3 OH or CH 4 . To sustainably and scalably complete the fuel cycle, electrons must be liberated through the oxidation of water to O 2 (g). Strongly acidic or strongly alkaline electrolytes are needed to enable efficient and intrinsically safe operation of a full solar-driven water-splitting system. But, under water-oxidation conditions, the small-band-gap semiconductors required for efficient cell operation aremore » unstable, either dissolving or forming insulating surface oxides. Here, we describe herein recent progress in the protection of semiconductor photoanodes under such operational conditions. We specifically describe the properties of two protective overlayers, TiO 2 /Ni and NiO x , both of which have demonstrated the ability to protect otherwise unstable semiconductors for > 100 h of continuous solar-driven water oxidation when in contact with a highly alkaline aqueous electrolyte (1.0 M KOH(aq)). Furthermore, the stabilization of various semiconductor photoanodes is reviewed in the context of the electronic characteristics and a mechanistic analysis of the TiO 2 films, along with a discussion of the optical, catalytic, and electronic nature of NiO x films for stabilization of semiconductor photoanodes for water oxidation.« less

Facet-Selective Epitaxy of Compound Semiconductors on Faceted Silicon Nanowires.

PubMed

Mankin, Max N; Day, Robert W; Gao, Ruixuan; No, You-Shin; Kim, Sun-Kyung; McClelland, Arthur A; Bell, David C; Park, Hong-Gyu; Lieber, Charles M

2015-07-08

Integration of compound semiconductors with silicon (Si) has been a long-standing goal for the semiconductor industry, as direct band gap compound semiconductors offer, for example, attractive photonic properties not possible with Si devices. However, mismatches in lattice constant, thermal expansion coefficient, and polarity between Si and compound semiconductors render growth of epitaxial heterostructures challenging. Nanowires (NWs) are a promising platform for the integration of Si and compound semiconductors since their limited surface area can alleviate such material mismatch issues. Here, we demonstrate facet-selective growth of cadmium sulfide (CdS) on Si NWs. Aberration-corrected transmission electron microscopy analysis shows that crystalline CdS is grown epitaxially on the {111} and {110} surface facets of the Si NWs but that the Si{113} facets remain bare. Further analysis of CdS on Si NWs grown at higher deposition rates to yield a conformal shell reveals a thin oxide layer on the Si{113} facet. This observation and control experiments suggest that facet-selective growth is enabled by the formation of an oxide, which prevents subsequent shell growth on the Si{113} NW facets. Further studies of facet-selective epitaxial growth of CdS shells on micro-to-mesoscale wires, which allows tuning of the lateral width of the compound semiconductor layer without lithographic patterning, and InP shell growth on Si NWs demonstrate the generality of our growth technique. In addition, photoluminescence imaging and spectroscopy show that the epitaxial shells display strong and clean band edge emission, confirming their high photonic quality, and thus suggesting that facet-selective epitaxy on NW substrates represents a promising route to integration of compound semiconductors on Si.

Thermally grown oxide and diffusions for automatic processing of integrated circuits

NASA Technical Reports Server (NTRS)

Kennedy, B. W.

1979-01-01

A totally automated facility for semiconductor oxidation and diffusion was developed using a state-of-the-art diffusion furnace and high temperature grown oxides. Major innovations include: (1) a process controller specifically for semiconductor processing; (2) an automatic loading system to accept wafers from an air track, insert them into a quartz carrier and then place the carrier on a paddle for insertion into the furnace; (3) automatic unloading of the wafers back onto the air track, and (4) boron diffusion using diborane with plus or minus 5 percent uniformity. Processes demonstrated include Wet and dry oxidation for general use and for gate oxide, boron diffusion, phosphorous diffusion, and sintering.

Screening method for selecting semiconductor substrates having defects below a predetermined level in an oxide layer

DOEpatents

Warren, W.L.; Vanheusden, K.J.R.; Schwank, J.R.; Fleetwood, D.M.; Shaneyfelt, M.R.; Winokur, P.S.; Devine, R.A.B.

1998-07-28

A method is disclosed for screening or qualifying semiconductor substrates for integrated circuit fabrication. The method comprises the steps of annealing at least one semiconductor substrate at a first temperature in a defect-activating ambient (e.g. hydrogen, forming gas, or ammonia) for sufficient time for activating any defects within on oxide layer of the substrate; measuring a defect-revealing electrical characteristic of at least a portion of the oxide layer for determining a quantity of activated defects therein; and selecting substrates for which the quantity of activated defects is below a predetermined level. The defect-revealing electrical characteristic may be a capacitance-versus voltage (C-V) characteristic or a current-versus-voltage (I-V) characteristic that is dependent on an electrical charge in the oxide layer generated by the activated defects. Embodiments of the present invention may be applied for screening any type of semiconductor substrate or wafer having an oxide layer formed thereon or therein. This includes silicon-on-insulator substrates formed by a separation by the implantation of oxygen (SIMOX) process or the bond and etch back silicon-on-insulator (BESOI) process, as well as silicon substrates having a thermal oxide layer or a deposited oxide layer. 5 figs.

A silicon-on-insulator complementary-metal-oxide-semiconductor compatible flexible electronics technology

NASA Astrophysics Data System (ADS)

Tu, Hongen; Xu, Yong

2012-07-01

This paper reports a simple flexible electronics technology that is compatible with silicon-on-insulator (SOI) complementary-metal-oxide-semiconductor (CMOS) processes. Compared with existing technologies such as direct fabrication on flexible substrates and transfer printing, the main advantage of this technology is its post-SOI-CMOS compatibility. Consequently, high-performance and high-density CMOS circuits can be first fabricated on SOI wafers using commercial foundry and then be integrated into flexible substrates. The yield is also improved by eliminating the transfer printing step. Furthermore, this technology allows the integration of various sensors and microfluidic devices. To prove the concept of this technology, flexible MOSFETs have been demonstrated.

Active pixel sensor with intra-pixel charge transfer

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

1995-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Active pixel sensor with intra-pixel charge transfer

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

2003-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Active pixel sensor with intra-pixel charge transfer

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

2004-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

High-Performance WSe2 Complementary Metal Oxide Semiconductor Technology and Integrated Circuits.

PubMed

Yu, Lili; Zubair, Ahmad; Santos, Elton J G; Zhang, Xu; Lin, Yuxuan; Zhang, Yuhao; Palacios, Tomás

2015-08-12

Because of their extraordinary structural and electrical properties, two-dimensional materials are currently being pursued for applications such as thin-film transistors and integrated circuit. One of the main challenges that still needs to be overcome for these applications is the fabrication of air-stable transistors with industry-compatible complementary metal oxide semiconductor (CMOS) technology. In this work, we experimentally demonstrate a novel high performance air-stable WSe2 CMOS technology with almost ideal voltage transfer characteristic, full logic swing and high noise margin with different supply voltages. More importantly, the inverter shows large voltage gain (∼38) and small static power (picowatts), paving the way for low power electronic system in 2D materials.

Optimized structural designs for stretchable silicon integrated circuits.

PubMed

Kim, Dae-Hyeong; Liu, Zhuangjian; Kim, Yun-Soung; Wu, Jian; Song, Jizhou; Kim, Hoon-Sik; Huang, Yonggang; Hwang, Keh-Chih; Zhang, Yongwei; Rogers, John A

2009-12-01

Materials and design strategies for stretchable silicon integrated circuits that use non-coplanar mesh layouts and elastomeric substrates are presented. Detailed experimental and theoretical studies reveal many of the key underlying aspects of these systems. The results shpw, as an example, optimized mechanics and materials for circuits that exhibit maximum principal strains less than 0.2% even for applied strains of up to approximately 90%. Simple circuits, including complementary metal-oxide-semiconductor inverters and n-type metal-oxide-semiconductor differential amplifiers, validate these designs. The results suggest practical routes to high-performance electronics with linear elastic responses to large strain deformations, suitable for diverse applications that are not readily addressed with conventional wafer-based technologies.

Hierarchical Assembly of Multifunctional Oxide-based Composite Nanostructures for Energy and Environmental Applications

PubMed Central

Gao, Pu-Xian; Shimpi, Paresh; Gao, Haiyong; Liu, Caihong; Guo, Yanbing; Cai, Wenjie; Liao, Kuo-Ting; Wrobel, Gregory; Zhang, Zhonghua; Ren, Zheng; Lin, Hui-Jan

2012-01-01

Composite nanoarchitectures represent a class of nanostructured entities that integrates various dissimilar nanoscale building blocks including nanoparticles, nanowires, and nanofilms toward realizing multifunctional characteristics. A broad array of composite nanoarchitectures can be designed and fabricated, involving generic materials such as metal, ceramics, and polymers in nanoscale form. In this review, we will highlight the latest progress on composite nanostructures in our research group, particularly on various metal oxides including binary semiconductors, ABO3-type perovskites, A2BO4 spinels and quaternary dielectric hydroxyl metal oxides (AB(OH)6) with diverse application potential. Through a generic template strategy in conjunction with various synthetic approaches— such as hydrothermal decomposition, colloidal deposition, physical sputtering, thermal decomposition and thermal oxidation, semiconductor oxide alloy nanowires, metal oxide/perovskite (spinel) composite nanowires, stannate based nanocompostes, as well as semiconductor heterojunction—arrays and networks have been self-assembled in large scale and are being developed as promising classes of composite nanoarchitectures, which may open a new array of advanced nanotechnologies in solid state lighting, solar absorption, photocatalysis and battery, auto-emission control, and chemical sensing. PMID:22837702

Carbon nanotube-based three-dimensional monolithic optoelectronic integrated system

NASA Astrophysics Data System (ADS)

Liu, Yang; Wang, Sheng; Liu, Huaping; Peng, Lian-Mao

2017-06-01

Single material-based monolithic optoelectronic integration with complementary metal oxide semiconductor-compatible signal processing circuits is one of the most pursued approaches in the post-Moore era to realize rapid data communication and functional diversification in a limited three-dimensional space. Here, we report an electrically driven carbon nanotube-based on-chip three-dimensional optoelectronic integrated circuit. We demonstrate that photovoltaic receivers, electrically driven transmitters and on-chip electronic circuits can all be fabricated using carbon nanotubes via a complementary metal oxide semiconductor-compatible low-temperature process, providing a seamless integration platform for realizing monolithic three-dimensional optoelectronic integrated circuits with diversified functionality such as the heterogeneous AND gates. These circuits can be vertically scaled down to sub-30 nm and operates in photovoltaic mode at room temperature. Parallel optical communication between functional layers, for example, bottom-layer digital circuits and top-layer memory, has been demonstrated by mapping data using a 2 × 2 transmitter/receiver array, which could be extended as the next generation energy-efficient signal processing paradigm.

Method of acquiring an image from an optical structure having pixels with dedicated readout circuits

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

2006-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Extraction of carrier mobility and interface trap density in InGaAs metal oxide semiconductor structures using gated Hall method

NASA Astrophysics Data System (ADS)

Chidambaram, Thenappan

III-V semiconductors are potential candidates to replace Si as a channel material in next generation CMOS integrated circuits owing to their superior carrier mobilities. Low density of states (DOS) and typically high interface and border trap densities (Dit) in high mobility group III-V semiconductors provide difficulties in quantification of Dit near the conduction band edge. The trap response above the threshold voltage of a MOSFET can be very fast, and conventional Dit extraction methods, based on capacitance/conductance response (CV methods) of MOS capacitors at frequencies <1MHz, cannot distinguish conducting and trapped carriers. In addition, the CV methods have to deal with high dispersion in the accumulation region that makes it a difficult task to measure the true oxide capacitance, Cox value. Another implication of these properties of III-V interfaces is an ambiguity of determination of electron density in the MOSFET channel. Traditional evaluation of carrier density by integration of the C-V curve, gives incorrect values for D it and mobility. Here we employ gated Hall method to quantify the D it spectrum at the high-K oxide/III-V semiconductor interface for buried and surface channel devices using Hall measurement and capacitance-voltage data. Determination of electron density directly from Hall measurements allows for obtaining true mobility values.

Thin film transistors for flexible electronics: contacts, dielectrics and semiconductors.

PubMed

Quevedo-Lopez, M A; Wondmagegn, W T; Alshareef, H N; Ramirez-Bon, R; Gnade, B E

2011-06-01

The development of low temperature, thin film transistor processes that have enabled flexible displays also present opportunities for flexible electronics and flexible integrated systems. Of particular interest are possible applications in flexible sensor systems for unattended ground sensors, smart medical bandages, electronic ID tags for geo-location, conformal antennas, radiation detectors, etc. In this paper, we review the impact of gate dielectrics, contacts and semiconductor materials on thin film transistors for flexible electronics applications. We present our recent results to fully integrate hybrid complementary metal oxide semiconductors comprising inorganic and organic-based materials. In particular, we demonstrate novel gate dielectric stacks and semiconducting materials. The impact of source and drain contacts on device performance is also discussed.

Temperature-dependent mechanical behavior of silicon dioxide, gold and gold-vanadium thin films for VLSI integrated circuits and MicroElectroMechanical systems (MEMs)

NASA Astrophysics Data System (ADS)

Lin, Ming-Tzer

The Semiconductor Industry has grown rapidly in the last twenty years. The national technology roadmap for semiconductors plans for developing the complexity and packing density of semiconductor devices into the next decade, allowing ever smaller and more densely packed structures to be fabricated. Recently, MEMS (Micro-Electro-Mechanical Systems) have become important in modern technology. The goal of MEMs is to integrate many types of miniature devices on a single chip, creating a new micro-world. The oxidation of silicon is one of the most important processes in semiconductor technology. Producing high-quality IC's and MEMS devices requires an understanding of the basic oxidation mechanism. In addition, for the reliability of IC's and MEMS devices, the mechanical properties of the oxide play a critical role. There has been an apparent convergence of opinion on the relevant mechanism leading to the "standard computational model" for stress effects on silicon oxidation. This model has recently become suspect. Most of the reasonably direct experimental data on the flow properties of SiO 2 thin film do not support a stress-dependent viscosity of the sort envisioned by the model. Gold and gold vanadium alloys are used in electrical interconnections and in radio frequency switch contacts for the semiconductor industry, MEMs sensors for the aerospace industry and also in brain probes by the bioelectronics mechanical industry. Despite the strong potential usage of gold and gold vanadium thin films at the small scale, very little is known about their mechanical properties. Our goal was to experimentally investigate stress and its influence on SiO2 thin films and the mechanical properties of gold and gold vanadium thin films at room temperature and at elevated temperature of different vanadium concentration. We found that the application of relatively small amounts of bending to an oxidizing silicon substrate leads to significant decreases in oxide thickness in the ultrathin oxide regime. Both tensile and compressive bending retard oxide growth, although compressive bending results in somewhat thinner oxides than does tensile bending. We also determined the modulus of gold and gold vanadium, and discovered that there is some evidence for a vanadium concentration dependence of the mechanical properties.

Chitin Liquid-Crystal-Templated Oxide Semiconductor Aerogels.

PubMed

Chau, Trang The Lieu; Le, Dung Quang Tien; Le, Hoa Thi; Nguyen, Cuong Duc; Nguyen, Long Viet; Nguyen, Thanh-Dinh

2017-09-13

Chitin nanocrystals have been used as a liquid crystalline template to fabricate layered oxide semiconductor aerogels. Anisotropic chitin liquid crystals are transformed to sponge-like aerogels by hydrothermally cross-linked gelation and lyophilization-induced solidification. The hydrothermal gelation of chitin aqueous suspensions then proceeds with peroxotitanate to form hydrogel composites that recover to form aerogels after freeze-drying. The homogeneous peroxotitanate/chitin composites are calcined to generate freestanding titania aerogels that exhibit the nanostructural integrity of layered chitin template. Our extended investigations show that coassembling chitin nanocrystals with other metal-based precursors also yielded semiconductor aerogels of perovskite BaTiO 3 and CuO x nanocrystals. The potential of these materials is great to investigate these chitin sponges for biomedicine and these semiconductor aerogels for photocatalysis, gas sensing, and other applications. Our results present a new aerogel templating method of highly porous, ultralight materials with chitin liquid crystals.

All oxide semiconductor-based bidirectional vertical p-n-p selectors for 3D stackable crossbar-array electronics

PubMed Central

Bae, Yoon Cheol; Lee, Ah Rahm; Baek, Gwang Ho; Chung, Je Bock; Kim, Tae Yoon; Park, Jea Gun; Hong, Jin Pyo

2015-01-01

Three-dimensional (3D) stackable memory devices including nano-scaled crossbar array are central for the realization of high-density non-volatile memory electronics. However, an essential sneak path issue affecting device performance in crossbar array remains a bottleneck and a grand challenge. Therefore, a suitable bidirectional selector as a two-way switch is required to facilitate a major breakthrough in the 3D crossbar array memory devices. Here, we show the excellent selectivity of all oxide p-/n-type semiconductor-based p-n-p open-based bipolar junction transistors as selectors in crossbar memory array. We report that bidirectional nonlinear characteristics of oxide p-n-p junctions can be highly enhanced by manipulating p-/n-type oxide semiconductor characteristics. We also propose an associated Zener tunneling mechanism that explains the unique features of our p-n-p selector. Our experimental findings are further extended to confirm the profound functionality of oxide p-n-p selectors integrated with several bipolar resistive switching memory elements working as storage nodes. PMID:26289565

Transparent Oxide Thin-Film Transistors: Production, Characterization and Integration

NASA Astrophysics Data System (ADS)

Barquinha, Pedro Miguel Candido

This dissertation is devoted to the study of the emerging area of transparent electronics, summarizing research work regarding the development of n-type thin-film transistors (TFTs) based on sputtered oxide semiconductors. All the materials are produced without intentional substrate heating, with annealing temperatures of only 150-200 °C being used to optimize transistor performance. The work is based on the study and optimization of active semiconductors from the gallium-indium-zinc oxide system, including both the binary compounds Ga2O3, In2O3 and ZnO, as well as ternary and quaternary oxides based on mixtures of those, such as IZO and GIZO with different atomic ratios. Several topics are explored, including the study and optimization of the oxide semiconductor thin films, their application as channel layers on TFTs and finally the implementation of the optimized processes to fabricate active matrix backplanes to be integrated in liquid crystal display (LCD) prototypes. Sputtered amorphous dielectrics with high dielectric constant (high-kappa) based on mixtures of tantalum-silicon or tantalum-aluminum oxides are also studied and used as the dielectric layers on fully transparent TFTs. These devices also include transparent and highly conducting IZO thin films as source, drain and gate electrodes. Given the flexibility of the sputtering technique, oxide semiconductors are analyzed regarding several deposition parameters, such as oxygen partial pressure and deposition pressure, as well as target composition. One of the most interesting features of multicomponent oxides such as IZO and GIZO is that, due to their unique electronic configuration and carrier transport mechanism, they allow to obtain amorphous structures with remarkable electrical properties, such as high hall-effect mobility that exceeds 60 cm2 V -1 s-1 for IZO. These properties can be easily tuned by changing the processing conditions and the atomic ratios of the multicomponent oxides, allowing to have amorphous oxides suitable to be used either as transparent semiconductors or as highly conducting electrodes. The amorphous structure, which is maintained even if the thin films are annealed at 500 °C, brings great advantages concerning interface quality and uniformity in large areas. A complete study comprising different deposition conditions of the semiconductor layer is also made regarding TFT electrical performance. Optimized devices present outstanding electrical performance, such as field-effect mobility (muFE) exceeding 20 cm2 V -1 s-1, turn-on voltage (Von) between -1 and 1 V, subthreshold slope (S) lower than 0.25 V dec-1 and On-Off ratio above 107 . Devices employing amorphous multicomponent oxides present largely improved properties when compared with the ones based on polycrystalline ZnO, mostly in terms of muFE. Within the compositional range where IZO and GIZO films are amorphous, TFT performance can be largely adjusted: for instance, high indium contents favor large mu FE but also highly negative Von, which can be compensated by proper amounts of zinc and gallium. Large oxygen concentrations during oxide semiconductor sputtering are found to be deleterious, decreasing muFE, shifting Von towards high values and turning the devices electrically unstable. It is also shown that semiconductor thickness (ds) has a very important role: for instance, by reducing ds to 10 nm it is possible to produce TFTs with Von≈0 V even using deposition conditions and/or target compositions that normally yield highly conducting films. Given the low ds of the films, this behavior is mostly related with surface states existent at the oxide semiconductor air-exposed back-surface, where depletion layers that can extend towards the dielectric/semiconductor interface are created due to the interaction with atmospheric oxygen. Different passivation layers on top of this air-exposed surface are studied, with SU-8 revealing to be to most effective one. Other important topics are source-drain contact resistance assessment and the effect of different annealing temperatures ( TA), being the properties of the TFTs dominated by TA rather than by the deposition conditions as TA increases. Fully transparent TFTs employing sputtered amorphous multicomponent dielectrics produced without intentional substrate heating present excellent electrical properties, that approach those exhibited by devices using PECVD SiO2 produced at 400 °C. Gate leakage current can be greatly reduced by using tantalum-silicon or tantalum-aluminum oxides rather than Ta2O5. A section of this dissertation is also devoted to the analysis of current stress stability and aging effects of the TFTs, being found that optimal devices exhibit recoverable threshold voltage shifts lower than 0.50 V after 24 h stress with constant drain current of 10 muA, as well as negligible aging effects during 18 months. The research work of this dissertation culminates in the fabrication of a backplane employing transparent TFTs and subsequent integration with a LCD frontplane by Hewlett-Packard. The successful operation of this initial 2.8h prototype with 128x128 pixels provides a solid demonstration that oxide semiconductor-based TFTs have the potential to largely contribute to a novel electronics era, where semiconductor materials away from conventional silicon are used to create fascinating applications, such as transparent electronic products.

Integrated Inductors for RF Transmitters in CMOS/MEMS Smart Microsensor Systems

PubMed Central

Kim, Jong-Wan; Takao, Hidekuni; Sawada, Kazuaki; Ishida, Makoto

2007-01-01

This paper presents the integration of an inductor by complementary metal-oxide-semiconductor (CMOS) compatible processes for integrated smart microsensor systems that have been developed to monitor the motion and vital signs of humans in various environments. Integration of radio frequency transmitter (RF) technology with complementary metal-oxide-semiconductor/micro electro mechanical systems (CMOS/MEMS) microsensors is required to realize the wireless smart microsensors system. The essential RF components such as a voltage controlled RF-CMOS oscillator (VCO), spiral inductors for an LC resonator and an integrated antenna have been fabricated and evaluated experimentally. The fabricated RF transmitter and integrated antenna were packaged with subminiature series A (SMA) connectors, respectively. For the impedance (50 Ω) matching, a bonding wire type inductor was developed. In this paper, the design and fabrication of the bonding wire inductor for impedance matching is described. Integrated techniques for the RF transmitter by CMOS compatible processes have been successfully developed. After matching by inserting the bonding wire inductor between the on-chip integrated antenna and the VCO output, the measured emission power at distance of 5 m from RF transmitter was -37 dBm (0.2 μW).

Low-voltage organic electronics based on a gate-tunable injection barrier in vertical graphene-organic semiconductor heterostructures.

PubMed

Hlaing, Htay; Kim, Chang-Hyun; Carta, Fabio; Nam, Chang-Yong; Barton, Rob A; Petrone, Nicholas; Hone, James; Kymissis, Ioannis

2015-01-14

The vertical integration of graphene with inorganic semiconductors, oxide semiconductors, and newly emerging layered materials has recently been demonstrated as a promising route toward novel electronic and optoelectronic devices. Here, we report organic thin film transistors based on vertical heterojunctions of graphene and organic semiconductors. In these thin heterostructure devices, current modulation is accomplished by tuning of the injection barriers at the semiconductor/graphene interface with the application of a gate voltage. N-channel devices fabricated with a thin layer of C60 show a room temperature on/off ratio >10(4) and current density of up to 44 mAcm(-2). Because of the ultrashort channel intrinsic to the vertical structure, the device is fully operational at a driving voltage of 200 mV. A complementary p-channel device is also investigated, and a logic inverter based on two complementary transistors is demonstrated. The vertical integration of graphene with organic semiconductors via simple, scalable, and low-temperature fabrication processes opens up new opportunities to realize flexible, transparent organic electronic, and optoelectronic devices.

Photo-Spectrometer Realized In A Standard Cmos Ic Process

DOEpatents

Simpson, Michael L.; Ericson, M. Nance; Dress, William B.; Jellison, Gerald E.; Sitter, Jr., David N.; Wintenberg, Alan L.

1999-10-12

A spectrometer, comprises: a semiconductor having a silicon substrate, the substrate having integrally formed thereon a plurality of layers forming photo diodes, each of the photo diodes having an independent spectral response to an input spectra within a spectral range of the semiconductor and each of the photo diodes formed only from at least one of the plurality of layers of the semiconductor above the substrate; and, a signal processing circuit for modifying signals from the photo diodes with respective weights, the weighted signals being representative of a specific spectral response. The photo diodes have different junction depths and different polycrystalline silicon and oxide coverings. The signal processing circuit applies the respective weights and sums the weighted signals. In a corresponding method, a spectrometer is manufactured by manipulating only the standard masks, materials and fabrication steps of standard semiconductor processing, and integrating the spectrometer with a signal processing circuit.

Integration of functional oxides and semiconductors

NASA Astrophysics Data System (ADS)

Demkov, Alex

2012-10-01

The astounding progress of recent years in the area of oxide deposition has made possible the creation of oxide heterostructures with atomically abrupt interfaces. The ability to control the length scale, strain, and orbital order in these materials structures offers a uniquely rich toolbox for condensed matter physicists. Because the oxide layers are very thin, the physics is often controlled by the interface. The electronic properties of oxide interfaces are governed by a subtle interplay of many competing interactions such as strain, polar catastrophe, electron correlation, and Jahn-Teller coupling, as well as by defects and phase stability. It is not clear which, if any, of these newly discovered systems will find applications in future high-tech devices. However, they undoubtedly hold tremendous promise, particularly when integrated with conventional semiconductors such as Si. In this talk I will review our recent results in theoretical modeling and experimental realization of several epitaxial oxide heterostructures. I will set the stage with a brief discussion of extrinsic magnetoelectric coupling at the interface of a perovskite ferroelectric and conventional ferromagnet. I will then describe our recent successful attempt to integrate anatase, a photo-catalytic polymorph of TiO2, with Si (001) using molecular beam epitaxy. In conclusion, I will talk about strain stabilized ferromagnetism in correlated LaCoO3 (LCO) and monolithic integration of LCO and silicon for possible applications in spintronics. The integration is achieved via the single crystal SrTiO3 (STO) buffer epitaxially grown on Si. Superconducting quantum interference device magnetization measurements show that, unlike the bulk material, the ground state of the strained LaCoO3 on silicon is ferromagnetic with a TC of 85 K.

Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

2003-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

2000-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor Integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

Method of physical vapor deposition of metal oxides on semiconductors

DOEpatents

Norton, David P.

2001-01-01

A process for growing a metal oxide thin film upon a semiconductor surface with a physical vapor deposition technique in a high-vacuum environment and a structure formed with the process involves the steps of heating the semiconductor surface and introducing hydrogen gas into the high-vacuum environment to develop conditions at the semiconductor surface which are favorable for growing the desired metal oxide upon the semiconductor surface yet is unfavorable for the formation of any native oxides upon the semiconductor. More specifically, the temperature of the semiconductor surface and the ratio of hydrogen partial pressure to water pressure within the vacuum environment are high enough to render the formation of native oxides on the semiconductor surface thermodynamically unstable yet are not so high that the formation of the desired metal oxide on the semiconductor surface is thermodynamically unstable. Having established these conditions, constituent atoms of the metal oxide to be deposited upon the semiconductor surface are directed toward the surface of the semiconductor by a physical vapor deposition technique so that the atoms come to rest upon the semiconductor surface as a thin film of metal oxide with no native oxide at the semiconductor surface/thin film interface. An example of a structure formed by this method includes an epitaxial thin film of (001)-oriented CeO.sub.2 overlying a substrate of (001) Ge.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Moghadam, Reza M.; Xiao, Zhiyong; Ahmadi-Majlan, Kamyar

The epitaxial growth of multifunctional oxides on semiconductors has opened a pathway to introduce new functionalities to semiconductor device technologies. In particular, ferroelectric materials integrated on semiconductors could lead to low-power field-effect devices that can be used for logic or memory. Essential to realizing such field-effect devices is the development of ferroelectric metal-oxide-semiconductor (MOS) capacitors, in which the polarization of a ferroelectric gate is coupled to the surface potential of a semiconducting channel. Here we demonstrate that ferroelectric MOS capacitors can be realized using single crystalline SrZrxTi1-xO3 (x= 0.7) that has been epitaxially grown on Ge. We find that themore » ferroelectric properties of SrZrxTi1-xO3 are exceptionally robust, as gate layers as thin as 5 nm give rise to hysteretic capacitance-voltage characteristics that are 2 V in width. The development of ferroelectric MOS capacitors with gate thicknesses that are technologically relevant opens a pathway to realize scalable ferroelectric field-effect devices.« less

Metal contact engineering and registration-free fabrication of complementary metal-oxide semiconductor integrated circuits using aligned carbon nanotubes.

PubMed

Wang, Chuan; Ryu, Koungmin; Badmaev, Alexander; Zhang, Jialu; Zhou, Chongwu

2011-02-22

Complementary metal-oxide semiconductor (CMOS) operation is very desirable for logic circuit applications as it offers rail-to-rail swing, larger noise margin, and small static power consumption. However, it remains to be a challenging task for nanotube-based devices. Here in this paper, we report our progress on metal contact engineering for n-type nanotube transistors and CMOS integrated circuits using aligned carbon nanotubes. By using Pd as source/drain contacts for p-type transistors, small work function metal Gd as source/drain contacts for n-type transistors, and evaporated SiO(2) as a passivation layer, we have achieved n-type transistor, PN diode, and integrated CMOS inverter with an air-stable operation. Compared with other nanotube n-doping techniques, such as potassium doping, PEI doping, hydrazine doping, etc., using low work function metal contacts for n-type nanotube devices is not only air stable but also integrated circuit fabrication compatible. Moreover, our aligned nanotube platform for CMOS integrated circuits shows significant advantage over the previously reported individual nanotube platforms with respect to scalability and reproducibility and suggests a practical and realistic approach for nanotube-based CMOS integrated circuit applications.

Broadband image sensor array based on graphene-CMOS integration

NASA Astrophysics Data System (ADS)

Goossens, Stijn; Navickaite, Gabriele; Monasterio, Carles; Gupta, Shuchi; Piqueras, Juan José; Pérez, Raúl; Burwell, Gregory; Nikitskiy, Ivan; Lasanta, Tania; Galán, Teresa; Puma, Eric; Centeno, Alba; Pesquera, Amaia; Zurutuza, Amaia; Konstantatos, Gerasimos; Koppens, Frank

2017-06-01

Integrated circuits based on complementary metal-oxide-semiconductors (CMOS) are at the heart of the technological revolution of the past 40 years, enabling compact and low-cost microelectronic circuits and imaging systems. However, the diversification of this platform into applications other than microcircuits and visible-light cameras has been impeded by the difficulty to combine semiconductors other than silicon with CMOS. Here, we report the monolithic integration of a CMOS integrated circuit with graphene, operating as a high-mobility phototransistor. We demonstrate a high-resolution, broadband image sensor and operate it as a digital camera that is sensitive to ultraviolet, visible and infrared light (300-2,000 nm). The demonstrated graphene-CMOS integration is pivotal for incorporating 2D materials into the next-generation microelectronics, sensor arrays, low-power integrated photonics and CMOS imaging systems covering visible, infrared and terahertz frequencies.

CMOS-based carbon nanotube pass-transistor logic integrated circuits

PubMed Central

Ding, Li; Zhang, Zhiyong; Liang, Shibo; Pei, Tian; Wang, Sheng; Li, Yan; Zhou, Weiwei; Liu, Jie; Peng, Lian-Mao

2012-01-01

Field-effect transistors based on carbon nanotubes have been shown to be faster and less energy consuming than their silicon counterparts. However, ensuring these advantages are maintained for integrated circuits is a challenge. Here we demonstrate that a significant reduction in the use of field-effect transistors can be achieved by constructing carbon nanotube-based integrated circuits based on a pass-transistor logic configuration, rather than a complementary metal-oxide semiconductor configuration. Logic gates are constructed on individual carbon nanotubes via a doping-free approach and with a single power supply at voltages as low as 0.4 V. The pass-transistor logic configurarion provides a significant simplification of the carbon nanotube-based circuit design, a higher potential circuit speed and a significant reduction in power consumption. In particular, a full adder, which requires a total of 28 field-effect transistors to construct in the usual complementary metal-oxide semiconductor circuit, uses only three pairs of n- and p-field-effect transistors in the pass-transistor logic configuration. PMID:22334080

An integrated semiconductor device enabling non-optical genome sequencing.

PubMed

Rothberg, Jonathan M; Hinz, Wolfgang; Rearick, Todd M; Schultz, Jonathan; Mileski, William; Davey, Mel; Leamon, John H; Johnson, Kim; Milgrew, Mark J; Edwards, Matthew; Hoon, Jeremy; Simons, Jan F; Marran, David; Myers, Jason W; Davidson, John F; Branting, Annika; Nobile, John R; Puc, Bernard P; Light, David; Clark, Travis A; Huber, Martin; Branciforte, Jeffrey T; Stoner, Isaac B; Cawley, Simon E; Lyons, Michael; Fu, Yutao; Homer, Nils; Sedova, Marina; Miao, Xin; Reed, Brian; Sabina, Jeffrey; Feierstein, Erika; Schorn, Michelle; Alanjary, Mohammad; Dimalanta, Eileen; Dressman, Devin; Kasinskas, Rachel; Sokolsky, Tanya; Fidanza, Jacqueline A; Namsaraev, Eugeni; McKernan, Kevin J; Williams, Alan; Roth, G Thomas; Bustillo, James

2011-07-20

The seminal importance of DNA sequencing to the life sciences, biotechnology and medicine has driven the search for more scalable and lower-cost solutions. Here we describe a DNA sequencing technology in which scalable, low-cost semiconductor manufacturing techniques are used to make an integrated circuit able to directly perform non-optical DNA sequencing of genomes. Sequence data are obtained by directly sensing the ions produced by template-directed DNA polymerase synthesis using all-natural nucleotides on this massively parallel semiconductor-sensing device or ion chip. The ion chip contains ion-sensitive, field-effect transistor-based sensors in perfect register with 1.2 million wells, which provide confinement and allow parallel, simultaneous detection of independent sequencing reactions. Use of the most widely used technology for constructing integrated circuits, the complementary metal-oxide semiconductor (CMOS) process, allows for low-cost, large-scale production and scaling of the device to higher densities and larger array sizes. We show the performance of the system by sequencing three bacterial genomes, its robustness and scalability by producing ion chips with up to 10 times as many sensors and sequencing a human genome.

Pronounced photogating effect in atomically thin WSe2 with a self-limiting surface oxide layer

NASA Astrophysics Data System (ADS)

Yamamoto, Mahito; Ueno, Keiji; Tsukagoshi, Kazuhito

2018-04-01

The photogating effect is a photocurrent generation mechanism that leads to marked responsivity in two-dimensional (2D) semiconductor-based devices. A key step to promote the photogating effect in a 2D semiconductor is to integrate it with a high density of charge traps. Here, we show that self-limiting surface oxides on atomically thin WSe2 can serve as effective electron traps to facilitate p-type photogating. By examining the gate-bias-induced threshold voltage shift of a p-type transistor based on single-layer WSe2 with surface oxide, the electron trap density and the trap rate of the oxide are determined to be >1012 cm-2 and >1010 cm-2 s-1, respectively. White-light illumination on an oxide-covered 4-layer WSe2 transistor leads to the generation of photocurrent, the magnitude of which increases with the hole mobility. During illumination, the photocurrent evolves on a timescale of seconds, and a portion of the current persists even after illumination. These observations indicate that the photogenerated electrons are trapped deeply in the surface oxide and effectively gate the underlying WSe2. Owing to the pronounced photogating effect, the responsivity of the oxide-covered WSe2 transistor is observed to exceed 3000 A/W at an incident optical power of 1.1 nW, suggesting the effectiveness of surface oxidation in facilitating the photogating effect in 2D semiconductors.

CMOS/SOS processing

NASA Technical Reports Server (NTRS)

Ramondetta, P.

1980-01-01

Report describes processes used in making complementary - metal - oxide - semiconductor/silicon-on-sapphire (CMOS/SOS) integrated circuits. Report lists processing steps ranging from initial preparation of sapphire wafers to final mapping of "good" and "bad" circuits on a wafer.

Making A D-Latch Sensitive To Alpha Particles

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Blaes, Brent R.; Nixon, Robert H.

1994-01-01

Standard complementary metal oxide/semiconductor (CMOS) D-latch integrated circuit modified to increase susceptibility to single-event upsets (SEU's) (changes in logic state) caused by impacts of energetic alpha particles. Suitable for use in relatively inexpensive bench-scale SEU tests of itself and of related integrated circuits like static random-access memories.

CMOS Active-Pixel Image Sensor With Intensity-Driven Readout

NASA Technical Reports Server (NTRS)

Langenbacher, Harry T.; Fossum, Eric R.; Kemeny, Sabrina

1996-01-01

Proposed complementary metal oxide/semiconductor (CMOS) integrated-circuit image sensor automatically provides readouts from pixels in order of decreasing illumination intensity. Sensor operated in integration mode. Particularly useful in number of image-sensing tasks, including diffractive laser range-finding, three-dimensional imaging, event-driven readout of sparse sensor arrays, and star tracking.

Flexible MEMS: A novel technology to fabricate flexible sensors and electronics

NASA Astrophysics Data System (ADS)

Tu, Hongen

This dissertation presents the design and fabrication techniques used to fabricate flexible MEMS (Micro Electro Mechanical Systems) devices. MEMS devices and CMOS(Complementary Metal-Oxide-Semiconductor) circuits are traditionally fabricated on rigid substrates with inorganic semiconductor materials such as Silicon. However, it is highly desirable that functional elements like sensors, actuators or micro fluidic components to be fabricated on flexible substrates for a wide variety of applications. Due to the fact that flexible substrate is temperature sensitive, typically only low temperature materials, such as polymers, metals, and organic semiconductor materials, can be directly fabricated on flexible substrates. A novel technology based on XeF2(xenon difluoride) isotropic silicon etching and parylene conformal coating, which is able to monolithically incorporate high temperature materials and fluidic channels, was developed at Wayne State University. The technology was first implemented in the development of out-of-plane parylene microneedle arrays that can be individually addressed by integrated flexible micro-channels. These devices enable the delivery of chemicals with controlled temporal and spatial patterns and allow us to study neurotransmitter-based retinal prosthesis. The technology was further explored by adopting the conventional SOI-CMOS processes. High performance and high density CMOS circuits can be first fabricated on SOI wafers, and then be integrated into flexible substrates. Flexible p-channel MOSFETs (Metal-Oxide-Semiconductor Field-Effect-Transistors) were successfully integrated and tested. Integration of pressure sensors and flow sensors based on single crystal silicon has also been demonstrated. A novel smart yarn technology that enables the invisible integration of sensors and electronics into fabrics has been developed. The most significant advantage of this technology is its post-MEMS and post-CMOS compatibility. Various high-performance MEMS devices and electronics can be integrated into flexible substrates. The potential of our technology is enormous. Many wearable and implantable devices can be developed based on this technology.

Active pixel sensor pixel having a photodetector whose output is coupled to an output transistor gate

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Nakamura, Junichi (Inventor); Kemeny, Sabrina E. (Inventor)

2005-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. A Simple Floating Gate (SFG) pixel structure could also be employed in the imager to provide a non-destructive readout and smaller pixel sizes.

Stabilized CdSe-CoPi composite photoanode for light-assisted water oxidation by transformation of a CdSe/cobalt metal thin film.

PubMed

Costi, Ronny; Young, Elizabeth R; Bulović, Vladimir; Nocera, Daniel G

2013-04-10

Integration of water splitting catalysts with visible-light-absorbing semiconductors would enable direct solar-energy-to-fuel conversion schemes such as those based on water splitting. A disadvantage of some common semiconductors that possess desirable optical bandgaps is their chemical instability under the conditions needed for oxygen evolution reaction (OER). In this study, we demonstrate the dual benefits gained from using a cobalt metal thin-film as the precursor for the preparation of cobalt-phosphate (CoPi) OER catalyst on cadmium chalcogenide photoanodes. The cobalt layer protects the underlying semiconductor from oxidation and degradation while forming the catalyst and simultaneously facilitates the advantageous incorporation of the cadmium chalcogenide layer into the CoPi layer during continued processing of the electrode. The resulting hybrid material forms a stable photoactive anode for light-assisted water splitting.

Training and operation of an integrated neuromorphic network based on metal-oxide memristors.

PubMed

Prezioso, M; Merrikh-Bayat, F; Hoskins, B D; Adam, G C; Likharev, K K; Strukov, D B

2015-05-07

Despite much progress in semiconductor integrated circuit technology, the extreme complexity of the human cerebral cortex, with its approximately 10(14) synapses, makes the hardware implementation of neuromorphic networks with a comparable number of devices exceptionally challenging. To provide comparable complexity while operating much faster and with manageable power dissipation, networks based on circuits combining complementary metal-oxide-semiconductors (CMOSs) and adjustable two-terminal resistive devices (memristors) have been developed. In such circuits, the usual CMOS stack is augmented with one or several crossbar layers, with memristors at each crosspoint. There have recently been notable improvements in the fabrication of such memristive crossbars and their integration with CMOS circuits, including first demonstrations of their vertical integration. Separately, discrete memristors have been used as artificial synapses in neuromorphic networks. Very recently, such experiments have been extended to crossbar arrays of phase-change memristive devices. The adjustment of such devices, however, requires an additional transistor at each crosspoint, and hence these devices are much harder to scale than metal-oxide memristors, whose nonlinear current-voltage curves enable transistor-free operation. Here we report the experimental implementation of transistor-free metal-oxide memristor crossbars, with device variability sufficiently low to allow operation of integrated neural networks, in a simple network: a single-layer perceptron (an algorithm for linear classification). The network can be taught in situ using a coarse-grain variety of the delta rule algorithm to perform the perfect classification of 3 × 3-pixel black/white images into three classes (representing letters). This demonstration is an important step towards much larger and more complex memristive neuromorphic networks.

Generic process for preparing a crystalline oxide upon a group IV semiconductor substrate

DOEpatents

McKee, Rodney A.; Walker, Frederick J.; Chisholm, Matthew F.

2000-01-01

A process for growing a crystalline oxide epitaxially upon the surface of a Group IV semiconductor, as well as a structure constructed by the process, is described. The semiconductor can be germanium or silicon, and the crystalline oxide can generally be represented by the formula (AO).sub.n (A'BO.sub.3).sub.m in which "n" and "m" are non-negative integer repeats of planes of the alkaline earth oxides or the alkaline earth-containing perovskite oxides. With atomic level control of interfacial thermodynamics in a multicomponent semiconductor/oxide system, a highly perfect interface between a semiconductor and a crystalline oxide can be obtained.

Sol-gel zinc oxide humidity sensors integrated with a ring oscillator circuit on-a-chip.

PubMed

Yang, Ming-Zhi; Dai, Ching-Liang; Wu, Chyan-Chyi

2014-10-28

The study develops an integrated humidity microsensor fabricated using the commercial 0.18 μm complementary metal oxide semiconductor (CMOS) process. The integrated humidity sensor consists of a humidity sensor and a ring oscillator circuit on-a-chip. The humidity sensor is composed of a sensitive film and branch interdigitated electrodes. The sensitive film is zinc oxide prepared by sol-gel method. After completion of the CMOS process, the sensor requires a post-process to remove the sacrificial oxide layer and to coat the zinc oxide film on the interdigitated electrodes. The capacitance of the sensor changes when the sensitive film adsorbs water vapor. The circuit is used to convert the capacitance of the humidity sensor into the oscillation frequency output. Experimental results show that the output frequency of the sensor changes from 84.3 to 73.4 MHz at 30 °C as the humidity increases 40 to 90%RH.

Vertically integrated, three-dimensional nanowire complementary metal-oxide-semiconductor circuits.

PubMed

Nam, SungWoo; Jiang, Xiaocheng; Xiong, Qihua; Ham, Donhee; Lieber, Charles M

2009-12-15

Three-dimensional (3D), multi-transistor-layer, integrated circuits represent an important technological pursuit promising advantages in integration density, operation speed, and power consumption compared with 2D circuits. We report fully functional, 3D integrated complementary metal-oxide-semiconductor (CMOS) circuits based on separate interconnected layers of high-mobility n-type indium arsenide (n-InAs) and p-type germanium/silicon core/shell (p-Ge/Si) nanowire (NW) field-effect transistors (FETs). The DC voltage output (V(out)) versus input (V(in)) response of vertically interconnected CMOS inverters showed sharp switching at close to the ideal value of one-half the supply voltage and, moreover, exhibited substantial DC gain of approximately 45. The gain and the rail-to-rail output switching are consistent with the large noise margin and minimal static power consumption of CMOS. Vertically interconnected, three-stage CMOS ring oscillators were also fabricated by using layer-1 InAs NW n-FETs and layer-2 Ge/Si NW p-FETs. Significantly, measurements of these circuits demonstrated stable, self-sustained oscillations with a maximum frequency of 108 MHz, which represents the highest-frequency integrated circuit based on chemically synthesized nanoscale materials. These results highlight the flexibility of bottom-up assembly of distinct nanoscale materials and suggest substantial promise for 3D integrated circuits.

Goals, achievements of microelectronics program

NASA Astrophysics Data System (ADS)

Schronk, L.

1985-05-01

Besides reviewing the objectives of the government's microelectronics program, the Microelectronics Enterprise, the production of metal oxide semiconductors and bipolar integrated-circuit chips, specific research and development results to date, and the plans for future activity are discussed. Marketing and domestic demand are discussed.

Plasmonic nanohole arrays on Si-Ge heterostructures: an approach for integrated biosensors

NASA Astrophysics Data System (ADS)

Augel, L.; Fischer, I. A.; Dunbar, L. A.; Bechler, S.; Berrier, A.; Etezadi, D.; Hornung, F.; Kostecki, K.; Ozdemir, C. I.; Soler, M.; Altug, H.; Schulze, J.

2016-03-01

Nanohole array surface plasmon resonance (SPR) sensors offer a promising platform for high-throughput label-free biosensing. Integrating nanohole arrays with group-IV semiconductor photodetectors could enable low-cost and disposable biosensors compatible to Si-based complementary metal oxide semiconductor (CMOS) technology that can be combined with integrated circuitry for continuous monitoring of biosamples and fast sensor data processing. Such an integrated biosensor could be realized by structuring a nanohole array in the contact metal layer of a photodetector. We used Fouriertransform infrared spectroscopy to investigate nanohole arrays in a 100 nm Al film deposited on top of a vertical Si-Ge photodiode structure grown by molecular beam epitaxy (MBE). We find that the presence of a protein bilayer, constitute of protein AG and Immunoglobulin G (IgG), leads to a wavelength-dependent absorptance enhancement of ~ 8 %.

An optical relay approach to very low cost hybrid polymer-complementary metal-oxide semiconductor electrophoresis instrumentation.

PubMed

Hall, Gordon H; Sloan, David L; Ma, Tianchi; Couse, Madeline H; Martel, Stephane; Elliott, Duncan G; Glerum, D Moira; Backhouse, Christopher J

2014-07-04

Electrophoresis is an integral part of many molecular diagnostics protocols and an inexpensive implementation would greatly facilitate point-of-care (POC) applications. However, the high instrumentation cost presents a substantial barrier, much of it associated with fluorescence detection. The cost of such systems could be substantially reduced by placing the fluidic channel and photodiode directly above the detector in order to collect a larger portion of the fluorescent light. In future, this could be achieved through the integration and monolithic fabrication of photoresist microchannels on complementary metal-oxide semiconductor microelectronics (CMOS). However, the development of such a device is expensive due to high non-recurring engineering costs. To facilitate that development, we present a system that utilises an optical relay to integrate low-cost polymeric microfluidics with a CMOS chip that provides a photodiode, analog-digital conversion and a standard serial communication interface. This system embodies an intermediate level of microelectronic integration, and significantly decreases development costs. With a limit of detection of 1.3±0.4nM of fluorescently end-labeled deoxyribonucleic acid (DNA), it is suitable for diagnostic applications. Copyright © 2014 Elsevier B.V. All rights reserved.

Heterogeneous integration of low-temperature metal-oxide TFTs

NASA Astrophysics Data System (ADS)

Schuette, Michael L.; Green, Andrew J.; Leedy, Kevin D.; McCandless, Jonathan P.; Jessen, Gregg H.

2017-02-01

The breadth of circuit fabrication opportunities enabled by metal-oxide thin-film transistors (MO-TFTs) is unprecedented. Large-area deposition techniques and high electron mobility are behind their adoption in the display industry, and substrate agnosticism and low process temperatures enabled the present wave of flexible electronics research. Reports of circuits involving complementaryMO-TFTs, oxide-organic hybrid combinations, and even MO-TFTs integrated onto Si LSI back end of line interconnects demonstrate this technology's utility in 2D and 3D monolithic heterogeneous integration (HI). In addition to a brief literature review focused on functional HI between MO-TFTs and a variety of dissimilar active devices, we share progress toward integrating MO-TFTs with compound semiconductor devices, namely GaN HEMTs. A monolithically integrated cascode topology was used to couple a HEMT's >200 V breakdown characteristic with the gate driving characteristic of an IGZO TFT, effectively shifting the HEMT threshold voltage from -3 V to +1 V.

The controlled growth of perovskite thin films: Opportunities, challenges, and synthesis

DOE Office of Scientific and Technical Information (OSTI.GOV)

Schlom, D.G.; Theis, C.D.; Hawley, M.E.

1997-10-01

The broad spectrum of electronic and optical properties exhibited by perovskites offers tremendous opportunities for microelectronic devices, especially when a combination of properties in a single device is desired. Molecular beam epitaxy (MBE) has achieved unparalleled control in the integration of semiconductors at the monolayer-level; its use for the integration of perovskites with similar nanoscale customization appears promising. Composition control and oxidation are often significant challenges to the growth of perovskites by MBE, but we show that these can be met through the use of purified ozone as an oxidant and real-time atomic absorption composition control. The opportunities, challenges, andmore » synthesis of oxide heterostructures by reactive MBE are described, with examples taken from the growth of oxide superconductors and oxide ferroelectrics.« less

The Morphologies of the Semiconductor Oxides and Their Gas-Sensing Properties

PubMed Central

Lv, Xin; Li, Shuang; Wang, Qingji

2017-01-01

Semiconductor oxide chemoresistive gas sensors are widely used for detecting deleterious gases due to low cost, simple preparation, rapid response and high sensitivity. The performance of gas sensor is greatly affected by the morphology of the semiconductor oxide. There are many semiconductor oxide morphologies, including zero-dimensional, one-dimensional, two-dimensional and three-dimensional ones. The semiconductor oxides with different morphologies significantly enhance the gas-sensing performance. Among the various morphologies, hollow nanostructures and core-shell nanostructures are always the focus of research in the field of gas sensors due to their distinctive structural characteristics and superior performance. Herein the morphologies of semiconductor oxides and their gas-sensing properties are reviewed. This review also proposes a potential strategy for the enhancement of gas-sensing performance in the future. PMID:29189714

Effect of Al2O3 insulator thickness on the structural integrity of amorphous indium-gallium-zinc-oxide based thin film transistors.

PubMed

Kim, Hak-Jun; Hwang, In-Ju; Kim, Youn-Jea

2014-12-01

The current transparent oxide semiconductors (TOSs) technology provides flexibility and high performance. In this study, multi-stack nano-layers of TOSs were designed for three-dimensional analysis of amorphous indium-gallium-zinc-oxide (a-IGZO) based thin film transistors (TFTs). In particular, the effects of torsional and compressive stresses on the nano-sized active layers such as the a-IGZO layer were investigated. Numerical simulations were carried out to investigate the structural integrity of a-IGZO based TFTs with three different thicknesses of the aluminum oxide (Al2O3) insulator (δ = 10, 20, and 30 nm), respectively, using a commercial code, COMSOL Multiphysics. The results are graphically depicted for operating conditions.

Vertical III-V nanowire device integration on Si(100).

PubMed

Borg, Mattias; Schmid, Heinz; Moselund, Kirsten E; Signorello, Giorgio; Gignac, Lynne; Bruley, John; Breslin, Chris; Das Kanungo, Pratyush; Werner, Peter; Riel, Heike

2014-01-01

We report complementary metal-oxide-semiconductor (CMOS)-compatible integration of compound semiconductors on Si substrates. InAs and GaAs nanowires are selectively grown in vertical SiO2 nanotube templates fabricated on Si substrates of varying crystallographic orientations, including nanocrystalline Si. The nanowires investigated are epitaxially grown, single-crystalline, free from threading dislocations, and with an orientation and dimension directly given by the shape of the template. GaAs nanowires exhibit stable photoluminescence at room temperature, with a higher measured intensity when still surrounded by the template. Si-InAs heterojunction nanowire tunnel diodes were fabricated on Si(100) and are electrically characterized. The results indicate a high uniformity and scalability in the fabrication process.

Radiation hardening of metal-oxide semi-conductor (MOS) devices by boron

NASA Technical Reports Server (NTRS)

Danchenko, V.

1974-01-01

Technique using boron effectively protects metal-oxide semiconductor devices from ionizing radiation without using shielding materials. Boron is introduced into insulating gate oxide layer at semiconductor-insulator interface.

Band-to-band tunneling in a carbon nanotube metal-oxide-semiconductor field-effect transistor is dominated by phonon-assisted tunneling.

PubMed

Koswatta, Siyuranga O; Lundstrom, Mark S; Nikonov, Dmitri E

2007-05-01

Band-to-band tunneling (BTBT) devices have recently gained a lot of interest due to their potential for reducing power dissipation in integrated circuits. We have performed extensive simulations for the BTBT operation of carbon nanotube metal-oxide-semiconductor field-effect transistors (CNT-MOSFETs) using the nonequilibrium Green's function formalism for both ballistic and dissipative quantum transport. In comparison with recently reported experimental data (J. Am. Chem. Soc. 2006, 128, 3518-3519), we have obtained strong evidence that BTBT in CNT-MOSFETs is dominated by optical phonon assisted inelastic transport, which can have important implications on the transistor characteristics. It is shown that, under large biasing conditions, two-phonon scattering may also become important.

Recent progress in magnetic iron oxide-semiconductor composite nanomaterials as promising photocatalysts

NASA Astrophysics Data System (ADS)

Wu, Wei; Changzhong Jiang, Affc; Roy, Vellaisamy A. L.

2014-11-01

Photocatalytic degradation of toxic organic pollutants is a challenging tasks in ecological and environmental protection. Recent research shows that the magnetic iron oxide-semiconductor composite photocatalytic system can effectively break through the bottleneck of single-component semiconductor oxides with low activity under visible light and the challenging recycling of the photocatalyst from the final products. With high reactivity in visible light, magnetic iron oxide-semiconductors can be exploited as an important magnetic recovery photocatalyst (MRP) with a bright future. On this regard, various composite structures, the charge-transfer mechanism and outstanding properties of magnetic iron oxide-semiconductor composite nanomaterials are sketched. The latest synthesis methods and recent progress in the photocatalytic applications of magnetic iron oxide-semiconductor composite nanomaterials are reviewed. The problems and challenges still need to be resolved and development strategies are discussed.

Integration of ZnO and CuO nanowires into a thermoelectric module

PubMed Central

Dalola, Simone; Faglia, Guido; Comini, Elisabetta; Ferroni, Matteo; Soldano, Caterina; Ferrari, Vittorio; Sberveglieri, Giorgio

2014-01-01

Summary Zinc oxide (ZnO, n-type) and copper oxide (CuO, p-type) nanowires have been synthesized and preliminarily investigated as innovative materials for the fabrication of a proof-of-concept thermoelectric device. The Seebeck coefficients, electrical conductivity and thermoelectric power factors (TPF) of both semiconductor materials have been determined independently using a custom experimental set-up, leading to results in agreement with available literature with potential improvement. Combining bundles of ZnO and CuO nanowires in a series of five thermocouples on alumina leads to a macroscopic prototype of a planar thermoelectric generator (TEG) unit. This demonstrates the possibility of further integration of metal oxide nanostructures into efficient thermoelectric devices. PMID:24991531

Integration of ZnO and CuO nanowires into a thermoelectric module.

PubMed

Zappa, Dario; Dalola, Simone; Faglia, Guido; Comini, Elisabetta; Ferroni, Matteo; Soldano, Caterina; Ferrari, Vittorio; Sberveglieri, Giorgio

2014-01-01

Zinc oxide (ZnO, n-type) and copper oxide (CuO, p-type) nanowires have been synthesized and preliminarily investigated as innovative materials for the fabrication of a proof-of-concept thermoelectric device. The Seebeck coefficients, electrical conductivity and thermoelectric power factors (TPF) of both semiconductor materials have been determined independently using a custom experimental set-up, leading to results in agreement with available literature with potential improvement. Combining bundles of ZnO and CuO nanowires in a series of five thermocouples on alumina leads to a macroscopic prototype of a planar thermoelectric generator (TEG) unit. This demonstrates the possibility of further integration of metal oxide nanostructures into efficient thermoelectric devices.

Determination of Insulator-to-Semiconductor Transition in Sol-Gel Oxide Semiconductors Using Derivative Spectroscopy.

PubMed

Lee, Woobin; Choi, Seungbeom; Kim, Kyung Tae; Kang, Jingu; Park, Sung Kyu; Kim, Yong-Hoon

2015-12-23

We report a derivative spectroscopic method for determining insulator-to-semiconductor transition during sol-gel metal-oxide semiconductor formation. When an as-spun sol-gel precursor film is photochemically activated and changes to semiconducting state, the light absorption characteristics of the metal-oxide film is considerable changed particularly in the ultraviolet region. As a result, a peak is generated in the first-order derivatives of light absorption ( A' ) vs. wavelength (λ) plots, and by tracing the peak center shift and peak intensity, transition from insulating-to-semiconducting state of the film can be monitored. The peak generation and peak center shift are described based on photon-energy-dependent absorption coefficient of metal-oxide films. We discuss detailed analysis method for metal-oxide semiconductor films and its application in thin-film transistor fabrication. We believe this derivative spectroscopy based determination can be beneficial for a non-destructive and a rapid monitoring of the insulator-to-semiconductor transition in sol-gel oxide semiconductor formation.

Polymer waveguide grating sensor integrated with a thin-film photodetector

PubMed Central

Song, Fuchuan; Xiao, Jing; Xie, Antonio Jou; Seo, Sang-Woo

2014-01-01

This paper presents a planar waveguide grating sensor integrated with a photodetector (PD) for on-chip optical sensing systems which are suitable for diagnostics in the field and in-situ measurements. III–V semiconductor-based thin-film PD is integrated with a polymer based waveguide grating device on a silicon platform. The fabricated optical sensor successfully discriminates optical spectral characteristics of the polymer waveguide grating from the on-chip PD. In addition, its potential use as a refractive index sensor is demonstrated. Based on a planar waveguide structure, the demonstrated sensor chip may incorporate multiple grating waveguide sensing regions with their own optical detection PDs. In addition, the demonstrated processing is based on a post-integration process which is compatible with silicon complementary metal-oxide semiconductor (CMOS) electronics. Potentially, this leads a compact, chip-scale optical sensing system which can monitor multiple physical parameters simultaneously without need for external signal processing. PMID:24466407

Synthesis, characterization and solid state electrical properties of 1-D coordination polymer of the type [Cu{sub x}Ni{sub 1-x}(dadb){center_dot}yH{sub 2}O]{sub n}

DOE Office of Scientific and Technical Information (OSTI.GOV)

Prasad, R.L., E-mail: rlpjc@yahoo.co.in; Kushwaha, A.; Shrivastava, O.N.

2012-12-15

New heterobimetallic complexes [Cu{sub x}Ni{sub 1-x}(dadb){center_dot}yH{sub 2}O]{sub n} {l_brace}where dadb=2,5-Diamino-3,6-dichloro-1,4-benzoquinone (1); x=1 (2), 0.5 (4), 0.25 (5), 0.125 (6), 0.0625 (7) and 0 (3); y=2; n=degree of polymerization{r_brace} were synthesized and characterized. Heterobimetallic complexes show normal magnetic moments, whereas, monometallic complexes exhibit magnetic moments less than the value due to spin only. Thermo-gravimetric analysis shows that degradation of the ligand dadb moiety is being controlled by the electronic environment of the Cu(II) ions in preference over Ni(II) in heterobimetallic complexes. Existence of the mixed valency/non-integral oxidation states of copper and nickel metal ions in the complex 4 has been attributedmore » from magnetic moment and ESR spectral results. Solid state dc electrical conductivity of all the complexes was investigated. Monometallic complexes were found to be semiconductors, whereas heterobimetallic coordination polymer 4 was found to exhibit metallic behaviour. Existence of mixed valency/ non-integral oxidation state of metal ions seems to be responsible for the metallic behaviour. - Graphical abstract: Contrast to the semiconductor monometallic complexes 2 and 3, the heterobimetallic complex 4 exhibits metallic behaviour attributed to the mixed valency/non-integral oxidation state of the metal ions concluded from magnetic and ESR spectral studies. Highlights: Black-Right-Pointing-Pointer 1-D coordination compounds of the type Cu{sub x}Ni{sub 1-x}(dadb){center_dot}yH{sub 2}O were synthesized and characterized. Black-Right-Pointing-Pointer Thermal degradation of the complexes provides an indication of long range electronic communication between metal to ligand. Black-Right-Pointing-Pointer On inclusion of Ni(II) into 1-D coordination polymer of Cu(II). (a) Cu(II) and Ni(II) ions exhibit non-integral oxidation state. (b) resulting heterobimetallic complex 4 exhibits metallic behaviour at all temperature range of the present study whereas monometallic complexes are semiconductor.« less

Effect of Water Vapor and Surface Morphology on the Low Temperature Response of Metal Oxide Semiconductor Gas Sensors

PubMed Central

Maier, Konrad; Helwig, Andreas; Müller, Gerhard; Hille, Pascal; Eickhoff, Martin

2015-01-01

In this work the low temperature response of metal oxide semiconductor gas sensors is analyzed. Important characteristics of this low-temperature response are a pronounced selectivity to acid- and base-forming gases and a large disparity of response and recovery time constants which often leads to an integrator-type of gas response. We show that this kind of sensor performance is related to the trend of semiconductor gas sensors to adsorb water vapor in multi-layer form and that this ability is sensitively influenced by the surface morphology. In particular we show that surface roughness in the nanometer range enhances desorption of water from multi-layer adsorbates, enabling them to respond more swiftly to changes in the ambient humidity. Further experiments reveal that reactive gases, such as NO2 and NH3, which are easily absorbed in the water adsorbate layers, are more easily exchanged across the liquid/air interface when the humidity in the ambient air is high. PMID:28793583

New Material Transistor with Record-High Field-Effect Mobility among Wide-Band-Gap Semiconductors.

PubMed

Shih, Cheng Wei; Chin, Albert

2016-08-03

At an ultrathin 5 nm, we report a new high-mobility tin oxide (SnO2) metal-oxide-semiconductor field-effect transistor (MOSFET) exhibiting extremely high field-effect mobility values of 279 and 255 cm(2)/V-s at 145 and 205 °C, respectively. These values are the highest reported mobility values among all wide-band-gap semiconductors of GaN, SiC, and metal-oxide MOSFETs, and they also exceed those of silicon devices at the aforementioned elevated temperatures. For the first time among existing semiconductor transistors, a new device physical phenomenon of a higher mobility value was measured at 45-205 °C than at 25 °C, which is due to the lower optical phonon scattering by the large SnO2 phonon energy. Moreover, the high on-current/off-current of 4 × 10(6) and the positive threshold voltage of 0.14 V at 25 °C are significantly better than those of a graphene transistor. This wide-band-gap SnO2 MOSFET exhibits high mobility in a 25-205 °C temperature range, a wide operating voltage of 1.5-20 V, and the ability to form on an amorphous substrate, rendering it an ideal candidate for multifunctional low-power integrated circuit (IC), display, and brain-mimicking three-dimensional IC applications.

Interactive graphical computer-aided design system

NASA Technical Reports Server (NTRS)

Edge, T. M.

1975-01-01

System is used for design, layout, and modification of large-scale-integrated (LSI) metal-oxide semiconductor (MOS) arrays. System is structured around small computer which provides real-time support for graphics storage display unit with keyboard, slave display unit, hard copy unit, and graphics tablet for designer/computer interface.

A zinc oxide nanorod ammonia microsensor integrated with a readout circuit on-a-chip.

PubMed

Yang, Ming-Zhi; Dai, Ching-Liang; Wu, Chyan-Chyi

2011-01-01

A zinc oxide nanorod ammonia microsensor integrated with a readout circuit on-a-chip fabricated using the commercial 0.35 μm complementary metal oxide semiconductor (CMOS) process was investigated. The structure of the ammonia sensor is composed of a sensitive film and polysilicon electrodes. The ammonia sensor requires a post-process to etch the sacrificial layer, and to coat the sensitive film on the polysilicon electrodes. The sensitive film that is prepared by a hydrothermal method is made of zinc oxide. The sensor resistance changes when the sensitive film adsorbs or desorbs ammonia gas. The readout circuit is used to convert the sensor resistance into the voltage output. Experiments show that the ammonia sensor has a sensitivity of about 1.5 mV/ppm at room temperature.

Exploration of oxide-based diluted magnetic semiconductors toward transparent spintronics

NASA Astrophysics Data System (ADS)

Fukumura, T.; Yamada, Y.; Toyosaki, H.; Hasegawa, T.; Koinuma, H.; Kawasaki, M.

2004-02-01

A review is given for the recent progress of research in the field of oxide-based diluted magnetic semiconductor (DMS), which was triggered by combinatorial discovery of transparent ferromagnet. The possible advantages of oxide semiconductor as a host of DMS are described in comparison with conventional compound semiconductors. Limits and problems for identifying novel ferromagnetic DMS are described in view of recent reports in this field. Several characterization techniques are proposed in order to eliminate unidentified ferromagnetism of oxide-based DMS unidentified ferromagnetic oxide (UFO). Perspectives and possible devices are also given.

Sol-Gel Zinc Oxide Humidity Sensors Integrated with a Ring Oscillator Circuit On-a-Chip

PubMed Central

Yang, Ming-Zhi; Dai, Ching-Liang; Wu, Chyan-Chyi

2014-01-01

The study develops an integrated humidity microsensor fabricated using the commercial 0.18 μm complementary metal oxide semiconductor (CMOS) process. The integrated humidity sensor consists of a humidity sensor and a ring oscillator circuit on-a-chip. The humidity sensor is composed of a sensitive film and branch interdigitated electrodes. The sensitive film is zinc oxide prepared by sol-gel method. After completion of the CMOS process, the sensor requires a post-process to remove the sacrificial oxide layer and to coat the zinc oxide film on the interdigitated electrodes. The capacitance of the sensor changes when the sensitive film adsorbs water vapor. The circuit is used to convert the capacitance of the humidity sensor into the oscillation frequency output. Experimental results show that the output frequency of the sensor changes from 84.3 to 73.4 MHz at 30 °C as the humidity increases 40 to 90 %RH. PMID:25353984

Active pixel sensor array with multiresolution readout

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Kemeny, Sabrina E. (Inventor); Pain, Bedabrata (Inventor)

1999-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. The imaging device can also include an electronic shutter formed on the substrate adjacent the photogate, and/or a storage section to allow for simultaneous integration. In addition, the imaging device can include a multiresolution imaging circuit to provide images of varying resolution. The multiresolution circuit could also be employed in an array where the photosensitive portion of each pixel cell is a photodiode. This latter embodiment could further be modified to facilitate low light imaging.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, Ao; Liu, Guoxia, E-mail: gxliu@qdu.edu.cn, E-mail: fukaishan@yahoo.com; Zhu, Huihui

Solution-processed p-type oxide semiconductors have recently attracted increasing interests for the applications in low-cost optoelectronic devices and low-power consumption complementary metal-oxide-semiconductor circuits. In this work, p-type nickel oxide (NiO{sub x}) thin films were prepared using low-temperature solution process and integrated as the channel layer in thin-film transistors (TFTs). The electrical properties of NiO{sub x} TFTs, together with the characteristics of NiO{sub x} thin films, were systematically investigated as a function of annealing temperature. By introducing aqueous high-k aluminum oxide (Al{sub 2}O{sub 3}) gate dielectric, the electrical performance of NiO{sub x} TFT was improved significantly compared with those based on SiO{submore » 2} dielectric. Particularly, the hole mobility was found to be 60 times enhancement, quantitatively from 0.07 to 4.4 cm{sup 2}/V s, which is mainly beneficial from the high areal capacitance of the Al{sub 2}O{sub 3} dielectric and high-quality NiO{sub x}/Al{sub 2}O{sub 3} interface. This simple solution-based method for producing p-type oxide TFTs is promising for next-generation oxide-based electronic applications.« less

Dual passivation of intrinsic defects at the compound semiconductor/oxide interface using an oxidant and a reductant.

PubMed

Kent, Tyler; Chagarov, Evgeniy; Edmonds, Mary; Droopad, Ravi; Kummel, Andrew C

2015-05-26

Studies have shown that metal oxide semiconductor field-effect transistors fabricated utilizing compound semiconductors as the channel are limited in their electrical performance. This is attributed to imperfections at the semiconductor/oxide interface which cause electronic trap states, resulting in inefficient modulation of the Fermi level. The physical origin of these states is still debated mainly because of the difficulty in assigning a particular electronic state to a specific physical defect. To gain insight into the exact source of the electronic trap states, density functional theory was employed to model the intrinsic physical defects on the InGaAs (2 × 4) surface and to model the effective passivation of these defects by utilizing both an oxidant and a reductant to eliminate metallic bonds and dangling-bond-induced strain at the interface. Scanning tunneling microscopy and spectroscopy were employed to experimentally determine the physical and electronic defects and to verify the effectiveness of dual passivation with an oxidant and a reductant. While subsurface chemisorption of oxidants on compound semiconductor substrates can be detrimental, it has been shown theoretically and experimentally that oxidants are critical to removing metallic defects at oxide/compound semiconductor interfaces present in nanoscale channels, oxides, and other nanostructures.

Fabrication of lateral electrodes on semiconductor nanowires through structurally matched insulation for functional optoelectronics.

PubMed

Sheng, Yun; Sun, Huabin; Wang, Jianyu; Gao, Fan; Wang, Junzhuan; Pan, Lijia; Pu, Lin; Zheng, Youdou; Shi, Yi

2013-01-18

A strategy of using structurally matched alumina insulation to produce lateral electrodes on semiconductor nanowires is presented. Nanowires in the architecture are structurally matched with alumina insulation using selective anodic oxidation. Lateral electrodes are fabricated by directly evaporating metallic atoms onto the opposite sides of the nanowires. The integrated architecture with lateral electrodes propels carriers to transport them across nanowires and is crucially beneficial to the injection/extraction in optoelectronics. The matched architecture and the insulating properties of the alumina layer are investigated experimentally. ZnO nanowires are functionalized into an ultraviolet photodiode as an example. The present strategy successfully implements an advantageous architecture and is significant in developing diverse semiconductor nanowires in optoelectronic applications.

Nonvolatile gate effect in a ferroelectric-semiconductor quantum well.

PubMed

Stolichnov, Igor; Colla, Enrico; Setter, Nava; Wojciechowski, Tomasz; Janik, Elzbieta; Karczewski, Grzegorz

2006-12-15

Field effect transistors with ferroelectric gates would make ideal rewritable nonvolatile memories were it not for the severe problems in integrating the ferroelectric oxide directly on the semiconductor channel. We propose a powerful way to avoid these problems using a gate material that is ferroelectric and semiconducting simultaneously. First, ferroelectricity in semiconductor (Cd,Zn)Te films is proven and studied using modified piezoforce scanning probe microscopy. Then, a rewritable field effect device is demonstrated by local poling of the (Cd,Zn)Te layer of a (Cd,Zn)Te/CdTe quantum well, provoking a reversible, nonvolatile change in the resistance of the 2D electron gas. The results point to a potential new family of nanoscale one-transistor memories.

Integration of Multi-Functional Oxide Thin Film Heterostructures with III-V Semiconductors

NASA Astrophysics Data System (ADS)

Rahman, Md. Shafiqur

Integration of multi-functional oxide thin films with semiconductors has attracted considerable attention in recent years due to their potential applications in sensing and logic functionalities that can be incorporated in future system-on-a-chip devices. III-V semiconductor, for example, GaAs, have higher saturated electron velocity and mobility allowing transistors based on GaAs to operate at a much higher frequency with less noise compared to Si. In addition, because of its direct bandgap a number of efficient optical devices are possible and by oxide integrating with other III-V semiconductors the wavelengths can be made tunable through hetero-engineering of the bandgap. This study, based on the use of SrTiO3 (STO) films grown on GaAs (001) substrates by molecular beam epitaxy (MBE) as an intermediate buffer layer for the hetero-epitaxial growth of ferromagnetic La0.7Sr 0.3MnO3 (LSMO) and room temperature multiferroic BiFeO 3 (BFO) thin films and superlattice structures using pulsed laser deposition (PLD). The properties of the multilayer thin films in terms of growth modes, lattice spacing/strain, interface structures and texture were characterized by the in-situ reflection high energy electron diffraction (RHEED). The crystalline quality and chemical composition of the complex oxide heterostructures were investigated by a combination of X-ray diffraction (XRD) and X-ray photoelectron absorption spectroscopy (XPS). Surface morphology, piezo-response with domain structure, and ferroelectric switching observations were carried out on the thin film samples using a scanning probe microscope operated as a piezoresponse force microscopy (PFM) in the contact mode. The magnetization measurements with field cooling exhibit a surprising increment in magnetic moment with enhanced magnetic hysteresis squareness. This is the effect of exchange interaction between the antiferromagnetic BFO and the ferromagnetic LSMO at the interface. The integration of BFO materials with LSMO on GaAs substrate also facilitated the demonstration of resistive random access memory (ReRAM) devices which can be faster with lower energy consumption compared to present commercial technologies. Ferroelectric switching observations using piezoresponse force microscopy show polarization switching demonstrating its potential for read-write operation in NVM devices. The ferroelectric and electrical characterization exhibit strong resistive switching with low SET/RESET voltages. Furthermore, a prototypical epitaxial field effect transistor based on multiferroic BFO as the gate dielectric and ferromagnetic LSMO as the conducting channel was also demonstrated. The device exhibits a modulation in channel conductance with high ON/OFF ratio. The measured nanostructure and physical-compositional results from the multilayer are correlated with their corresponding dielectric, piezoelectric, and ferroelectric properties. These results provide an understanding of the heteroepitaxial growth of ferroelectric (FE)-antiferromagnetic (AFM) BFO on ferromagnetic LSMO as a simple thin film or superlattice structure, integrated on STO buffered GaAs (001) with full control over the interface structure at the atomic-scale. This work also represents the first step toward the realization of magnetoelectronic devices integrated with GaAs (001).

Synthesis of visible-light responsive graphene oxide/TiO(2) composites with p/n heterojunction.

PubMed

Chen, Chao; Cai, Weimin; Long, Mingce; Zhou, Baoxue; Wu, Yahui; Wu, Deyong; Feng, Yujie

2010-11-23

Graphene oxide/TiO(2) composites were prepared by using TiCl(3) and graphene oxide as reactants. The concentration of graphene oxide in starting solution played an important role in photoelectronic and photocatalytic performance of graphene oxide/TiO(2) composites. Either a p-type or n-type semiconductor was formed by graphene oxide in graphene oxide/TiO(2) composites. These semiconductors could be excited by visible light with wavelengths longer than 510 nm and acted as sensitizer in graphene oxide/TiO(2) composites. Visible-light driven photocatalytic performance of graphene oxide/TiO(2) composites in degradation of methyl orange was also studied. Crystalline quality and chemical states of carbon elements from graphene oxide in graphene oxide/TiO(2) composites depended on the concentration of graphene oxide in the starting solution. This study shows a possible way to fabricate graphene oxide/semiconductor composites with different properties by using a tunable semiconductor conductivity type of graphene oxide.

Lithography for enabling advances in integrated circuits and devices.

PubMed

Garner, C Michael

2012-08-28

Because the transistor was fabricated in volume, lithography has enabled the increase in density of devices and integrated circuits. With the invention of the integrated circuit, lithography enabled the integration of higher densities of field-effect transistors through evolutionary applications of optical lithography. In 1994, the semiconductor industry determined that continuing the increase in density transistors was increasingly difficult and required coordinated development of lithography and process capabilities. It established the US National Technology Roadmap for Semiconductors and this was expanded in 1999 to the International Technology Roadmap for Semiconductors to align multiple industries to provide the complex capabilities to continue increasing the density of integrated circuits to nanometre scales. Since the 1960s, lithography has become increasingly complex with the evolution from contact printers, to steppers, pattern reduction technology at i-line, 248 nm and 193 nm wavelengths, which required dramatic improvements of mask-making technology, photolithography printing and alignment capabilities and photoresist capabilities. At the same time, pattern transfer has evolved from wet etching of features, to plasma etch and more complex etching capabilities to fabricate features that are currently 32 nm in high-volume production. To continue increasing the density of devices and interconnects, new pattern transfer technologies will be needed with options for the future including extreme ultraviolet lithography, imprint technology and directed self-assembly. While complementary metal oxide semiconductors will continue to be extended for many years, these advanced pattern transfer technologies may enable development of novel memory and logic technologies based on different physical phenomena in the future to enhance and extend information processing.

Electro-mechanical coupling of semiconductor film grown on stainless steel by oxidation

NASA Astrophysics Data System (ADS)

Lin, M. C.; Wang, G.; Guo, L. Q.; Qiao, L. J.; Volinsky, Alex A.

2013-09-01

Electro-mechanical coupling phenomenon in oxidation film on stainless steel has been discovered by using current-sensing atomic force microscopy, along with the I-V curves measurements. The oxidation films exhibit either ohmic, n-type, or p-type semiconductor properties, according to the obtained I-V curves. This technique allows characterizing oxidation films with high spatial resolution. Semiconductor properties of oxidation films must be considered as additional stress corrosion cracking mechanisms.

In-situ integrated processing and characterization of thin films of high temperature superconductors, dielectrics and semiconductors by MOCVD

NASA Technical Reports Server (NTRS)

Singh, R.; Sinha, S.; Hsu, N. J.; Thakur, R. P. S.; Chou, P.; Kumar, A.; Narayan, J.

1990-01-01

In this strategy of depositing the basic building blocks of superconductors, semiconductors, and dielectric having common elements, researchers deposited superconducting films of Y-Ba-Cu-O, semiconductor films of Cu2O, and dielectric films of BaF2 and Y2O3 by metal oxide chemical vapor deposition (MOCVD). By switching source materials entering the chamber, and by using direct writting capability, complex device structures like three-terminal hybrid semiconductors/superconductors transistors can be fabricated. The Y-Ba-Cu-O superconducting thin films on BaF2/YSZ substrates show a T(sub c) of 80 K and are textured with most of the grains having their c-axis or a-axis perpendicular to the substrate. Electrical characteristics as well as structural characteristics of superconductors and related materials obtained by x-ray defraction, electron microscopy, and energy dispersive x-ray analysis are discussed.

In-situ integrated processing and characterization of thin films of high temperature superconductors, dielectrics and semiconductors by MOCVD

NASA Technical Reports Server (NTRS)

Singh, R.; Sinha, S.; Hsu, N. J.; Thakur, R. P. S.; Chou, P.; Kumar, A.; Narayan, J.

1991-01-01

In this strategy of depositing the basic building blocks of superconductors, semiconductors, and dielectrics having common elements, researchers deposited superconducting films of Y-Ba-Cu-O, semiconductor films of Cu2O, and dielectric films of BaF2 and Y2O3 by metal oxide chemical vapor deposition (MOCVD). By switching source materials entering the chamber, and by using direct writing capability, complex device structures like three terminal hybrid semiconductor/superconductor transistors can be fabricated. The Y-Ba-Cu-O superconducting thin films on BaF2/YSZ substrates show a T(sub c) of 80 K and are textured with most of the grains having their c-axis or a-axis perpendicular to the substrate. Electrical characteristics as well as structural characteristics of superconductors and related materials obtained by x-ray deffraction, electron microscopy, and energy dispersive x-ray analysis are discussed.

Large-scale complementary macroelectronics using hybrid integration of carbon nanotubes and IGZO thin-film transistors.

PubMed

Chen, Haitian; Cao, Yu; Zhang, Jialu; Zhou, Chongwu

2014-06-13

Carbon nanotubes and metal oxide semiconductors have emerged as important materials for p-type and n-type thin-film transistors, respectively; however, realizing sophisticated macroelectronics operating in complementary mode has been challenging due to the difficulty in making n-type carbon nanotube transistors and p-type metal oxide transistors. Here we report a hybrid integration of p-type carbon nanotube and n-type indium-gallium-zinc-oxide thin-film transistors to achieve large-scale (>1,000 transistors for 501-stage ring oscillators) complementary macroelectronic circuits on both rigid and flexible substrates. This approach of hybrid integration allows us to combine the strength of p-type carbon nanotube and n-type indium-gallium-zinc-oxide thin-film transistors, and offers high device yield and low device variation. Based on this approach, we report the successful demonstration of various logic gates (inverter, NAND and NOR gates), ring oscillators (from 51 stages to 501 stages) and dynamic logic circuits (dynamic inverter, NAND and NOR gates).

SEM evaluation of metallization on semiconductors. [Scanning Electron Microscope

NASA Technical Reports Server (NTRS)

Fresh, D. L.; Adolphsen, J. W.

1974-01-01

A test method for the evaluation of metallization on semiconductors is presented and discussed. The method has been prepared in MIL-STD format for submittal as a proposed addition to MIL-STD-883. It is applicable to discrete devices and to integrated circuits and specifically addresses batch-process oriented defects. Quantitative accept/reject criteria are given for contact windows, other oxide steps, and general interconnecting metallization. Figures are provided that illustrate typical types of defects. Apparatus specifications, sampling plans, and specimen preparation and examination requirements are described. Procedures for glassivated devices and for multi-metal interconnection systems are included.

Ratiometric, filter-free optical sensor based on a complementary metal oxide semiconductor buried double junction photodiode.

PubMed

Yung, Ka Yi; Zhan, Zhiyong; Titus, Albert H; Baker, Gary A; Bright, Frank V

2015-07-16

We report a complementary metal oxide semiconductor integrated circuit (CMOS IC) with a buried double junction (BDJ) photodiode that (i) provides a real-time output signal that is related to the intensity ratio at two emission wavelengths and (ii) simultaneously eliminates the need for an optical filter to block Rayleigh scatter. We demonstrate the BDJ platform performance for gaseous NH3 and aqueous pH detection. We also compare the BDJ performance to parallel results obtained by using a slew scanned fluorimeter (SSF). The BDJ results are functionally equivalent to the SSF results without the need for any wavelength filtering or monochromators and the BDJ platform is not prone to errors associated with source intensity fluctuations or sensor signal drift. Copyright © 2015 Elsevier B.V. All rights reserved.

Anisotropy-based crystalline oxide-on-semiconductor material

DOEpatents

McKee, Rodney Allen; Walker, Frederick Joseph

2000-01-01

A semiconductor structure and device for use in a semiconductor application utilizes a substrate of semiconductor-based material, such as silicon, and a thin film of a crystalline oxide whose unit cells are capable of exhibiting anisotropic behavior overlying the substrate surface. Within the structure, the unit cells of the crystalline oxide are exposed to an in-plane stain which influences the geometric shape of the unit cells and thereby arranges a directional-dependent quality of the unit cells in a predisposed orientation relative to the substrate. This predisposition of the directional-dependent quality of the unit cells enables the device to take beneficial advantage of characteristics of the structure during operation. For example, in the instance in which the crystalline oxide of the structure is a perovskite, a spinel or an oxide of similarly-related cubic structure, the structure can, within an appropriate semiconductor device, exhibit ferroelectric, piezoelectric, pyroelectric, electro-optic, ferromagnetic, antiferromagnetic, magneto-optic or large dielectric properties that synergistically couple to the underlying semiconductor substrate.

Transparent megahertz circuits from solution-processed composite thin films.

PubMed

Liu, Xingqiang; Wan, Da; Wu, Yun; Xiao, Xiangheng; Guo, Shishang; Jiang, Changzhong; Li, Jinchai; Chen, Tangsheng; Duan, Xiangfeng; Fan, Zhiyong; Liao, Lei

2016-04-21

Solution-processed amorphous oxide semiconductors have attracted considerable interest in large-area transparent electronics. However, due to its relative low carrier mobility (∼10 cm(2) V(-1) s(-1)), the demonstrated circuit performance has been limited to 800 kHz or less. Herein, we report solution-processed high-speed thin-film transistors (TFTs) and integrated circuits with an operation frequency beyond the megahertz region on 4 inch glass. The TFTs can be fabricated from an amorphous indium gallium zinc oxide/single-walled carbon nanotube (a-IGZO/SWNT) composite thin film with high yield and high carrier mobility of >70 cm(2) V(-1) s(-1). On-chip microwave measurements demonstrate that these TFTs can deliver an unprecedented operation frequency in solution-processed semiconductors, including an extrinsic cut-off frequency (f(T) = 102 MHz) and a maximum oscillation frequency (f(max) = 122 MHz). Ring oscillators further demonstrated an oscillation frequency of 4.13 MHz, for the first time, realizing megahertz circuit operation from solution-processed semiconductors. Our studies represent an important step toward high-speed solution-processed thin film electronics.

Fabrication of eco-friendly PNP transistor using RF magnetron sputtering

NASA Astrophysics Data System (ADS)

Kumar, B. Santhosh; Harinee, N.; Purvaja, K.; Shanker, N. Praveen; Manikandan, M.; Aparnadevi, N.; Mukilraj, T.; Venkateswaran, C.

2018-05-01

An effort has been made to fabricate a thin film transistor using eco-friendly oxide semiconductor materials. Oxide semiconductor materials are cost - effective, thermally and chemically stable with high electron/hole mobility. Copper (II) oxide is a p-type semiconductor and zinc oxide is an n-type semiconductor. A pnp thin film transistor was fabricated using RF magnetron sputtering. The films deposited have been subjected to structural characterization using AFM. I-V characterization of the fabricated device, Ag/CuO/ZnO/CuO/Ag, confirms transistor behaviour. The mechanism of electron/hole transport of the device is discussed below.

Ultralow-power complementary metal-oxide-semiconductor inverters constructed on Schottky barrier modified nanowire metal-oxide-semiconductor field-effect-transistors.

PubMed

Ma, R M; Peng, R M; Wen, X N; Dai, L; Liu, C; Sun, T; Xu, W J; Qin, G G

2010-10-01

We show that the threshold voltages of both n- and p-channel metal-oxide-semiconductor field-effect-transistors (MOSFETs) can be lowered to close to zero by adding extra Schottky contacts on top of nanowires (NWs). Novel complementary metal-oxide-semiconductor (CMOS) inverters are constructed on these Schottky barrier modified n- and p-channel NW MOSFETs. Based on the high performances of the modified n- and p-channel MOSFETs, especially the low threshold voltages, the as-fabricated CMOS inverters have low operating voltage, high voltage gain, and ultra-low static power dissipation.

Solution Processed Metal Oxide High-κ Dielectrics for Emerging Transistors and Circuits.

PubMed

Liu, Ao; Zhu, Huihui; Sun, Huabin; Xu, Yong; Noh, Yong-Young

2018-06-14

The electronic functionalities of metal oxides comprise conductors, semiconductors, and insulators. Metal oxides have attracted great interest for construction of large-area electronics, particularly thin-film transistors (TFTs), for their high optical transparency, excellent chemical and thermal stability, and mechanical tolerance. High-permittivity (κ) oxide dielectrics are a key component for achieving low-voltage and high-performance TFTs. With the expanding integration of complementary metal oxide semiconductor transistors, the replacement of SiO 2 with high-κ oxide dielectrics has become urgently required, because their provided thicker layers suppress quantum mechanical tunneling. Toward low-cost devices, tremendous efforts have been devoted to vacuum-free, solution processable fabrication, such as spin coating, spray pyrolysis, and printing techniques. This review focuses on recent progress in solution processed high-κ oxide dielectrics and their applications to emerging TFTs. First, the history, basics, theories, and leakage current mechanisms of high-κ oxide dielectrics are presented, and the underlying mechanism for mobility enhancement over conventional SiO 2 is outlined. Recent achievements of solution-processed high-κ oxide materials and their applications in TFTs are summarized and traditional coating methods and emerging printing techniques are introduced. Finally, low temperature approaches, e.g., ecofriendly water-induced, self-combustion reaction, and energy-assisted post treatments, for the realization of flexible electronics and circuits are discussed. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Advanced Antireflection Coatings for High-Performance Solar Energy Applications

NASA Technical Reports Server (NTRS)

Pan, Noren

2015-01-01

Phase II objectives: Develop and refine antireflection coatings incorporating lanthanum titanate as an intermediate refractive index material; Investigate wet/dry thermal oxidation of aluminum containing semiconductor compounds as a means of forming a more transparent window layer with equal or better optical properties than its unoxidized form; Develop a fabrication process that allows integration of the oxidized window layer and maintains the necessary electrical properties for contacting the solar cell; Conduct an experimental demonstration of the best candidates for improved antireflection coatings.

Interfacing epitaxial oxides to gallium nitride

NASA Astrophysics Data System (ADS)

Losego, Mark Daniel

Molecular beam epitaxy (MBE) is lauded for its ability to control thin film material structures at the atomic level. This precision of control can improve performance of microelectronic devices and cultivate the development of novel device structures. This thesis explores the utility of MBE for designing interfaces between oxide epilayers and the wide band gap semiconductor gallium nitride (GaN). The allure of wide gap semiconductor microelectronics (like GaN, 3.4 eV) is their ability to operate at higher frequencies, higher powers, and higher temperatures than current semiconductor platforms. Heterostructures between ferroelectric oxides and GaN are also of interest for studying the interaction between GaN's fixed polarization and the ferroelectric's switchable polarization. Two major obstacles to successful integration of oxides with GaN are: (1) interfacial trap states; and (2) small electronic band offsets across the oxide/nitride interface due to the semiconductor's large band gap. For this thesis, epitaxial rocksalt oxide interfacial layers (˜8 eV band gap) are investigated as possible solutions to overcoming the challenges facing oxide integration with GaN. The cubic close-packed structure of rocksalt oxides forms a suitable epitaxial interface with the hexagonal close-packed wurtzite lattice of GaN. Three rocksalt oxide compounds are investigated in this thesis: MgO, CaO, and YbO. All are found to have a (111) MO || (0001) GaN; <1 10> MO || <11 20> GaN epitaxial relationship. Development of the epilayer microstructure is dominated by the high-energy polar growth surface (drives 3D nucleation) and the interfacial symmetry, which permits the formation of twin boundaries. Using STEM, strain relief for these ionicly bonded epilayers is observed to occur through disorder within the initial monolayer of growth. All rocksalt oxides demonstrate chemical stability with GaN to >1000°C. Concurrent MBE deposition of MgO and CaO is known to form complete solid solutions. By controlling the composition of these alloys, the oxide's lattice parameter can be engineered to match GaN and reduce interfacial state density. Compositional control is a universal challenge to oxide MBE, and the MgO-CaO system (MCO) is further complicated by magnesium's high volatility and the lack of a thermodynamically stable phase. Through a detailed investigation of MgO's deposition rate and subsequent impact on MCO composition, the process space for achieving lattice-matched compositions to GaN are fully mapped. Lattice-matched compositions are demonstrated to have the narrowest off-axis rocking curve widths ever reported for an epitaxial oxide deposited directly on GaN (0.7° in φ-circle for 200 reflection). Epitaxial deposition of the ferroelectric (Ba,Sr)TiO3 by hot RF sputtering on GaN surfaces is also demonstrated. Simple MOS capacitors are fabricated from epitaxial rocksalt oxides and (Ba,Sr)TiO3 layers deposited on n-GaN substrates. Current-voltage measurements reveal that BST epilayers have 5 orders of magnitude higher current leakage than rocksalt epilayers. This higher leakage is attributed to the smaller band offset expected at this interface; modeling confirms that electronic transport occurs by Schottky emission. In contrast, current transport across the rocksalt oxide/GaN interface occurs by Frenkel-Poole emission and can be reduced with pre-deposition surface treatments. Finally, through this work, it is realized that the integration of oxides with III-nitrides requires an appreciation of many different fields of research including materials science, surface science, and electrical engineering. By recognizing the importance that each of these fields play in designing oxide/III-nitride interfaces, this thesis has the opportunity to explore other related phenomena including accessing metastable phases through MBE (ytterbium monoxide), spinodal decomposition in metastable alloys (MCO), how polar surfaces grown by MBE compensate their bound surface charge, room temperature epitaxy, and the use of surface modification to achieve selective epitaxial deposition (SeEDed growth).

Survey of key technologies on millimeter-wave CMOS integrated circuits

NASA Astrophysics Data System (ADS)

Yu, Fei; Gao, Lei; Li, Lixiang; Cai, Shuo; Wang, Wei; Wang, Chunhua

2018-05-01

In order to provide guidance for the development of high performance millimeter-wave complementary metal oxide semiconductor (MMW-CMOS) integrated circuits (IC), this paper provides a survey of key technologies on MMW-CMOS IC. Technical background of MMW wireless communications is described. Then the recent development of the critical technologies of the MMW-CMOS IC are introduced in detail and compared. A summarization is given, and the development prospects on MMW-CMOS IC are also discussed.

Real-time, multiplexed electrochemical DNA detection using an active complementary metal-oxide-semiconductor biosensor array with integrated sensor electronics.

PubMed

Levine, Peter M; Gong, Ping; Levicky, Rastislav; Shepard, Kenneth L

2009-03-15

Optical biosensing based on fluorescence detection has arguably become the standard technique for quantifying extents of hybridization between surface-immobilized probes and fluorophore-labeled analyte targets in DNA microarrays. However, electrochemical detection techniques are emerging which could eliminate the need for physically bulky optical instrumentation, enabling the design of portable devices for point-of-care applications. Unlike fluorescence detection, which can function well using a passive substrate (one without integrated electronics), multiplexed electrochemical detection requires an electronically active substrate to analyze each array site and benefits from the addition of integrated electronic instrumentation to further reduce platform size and eliminate the electromagnetic interference that can result from bringing non-amplified signals off chip. We report on an active electrochemical biosensor array, constructed with a standard complementary metal-oxide-semiconductor (CMOS) technology, to perform quantitative DNA hybridization detection on chip using targets conjugated with ferrocene redox labels. A 4 x 4 array of gold working electrodes and integrated potentiostat electronics, consisting of control amplifiers and current-input analog-to-digital converters, on a custom-designed 5 mm x 3 mm CMOS chip drive redox reactions using cyclic voltammetry, sense DNA binding, and transmit digital data off chip for analysis. We demonstrate multiplexed and specific detection of DNA targets as well as real-time monitoring of hybridization, a task that is difficult, if not impossible, with traditional fluorescence-based microarrays.

Large current MOSFET on photonic silicon-on-insulator wafers and its monolithic integration with a thermo-optic 2 × 2 Mach-Zehnder switch.

PubMed

Cong, G W; Matsukawa, T; Chiba, T; Tadokoro, H; Yanagihara, M; Ohno, M; Kawashima, H; Kuwatsuka, H; Igarashi, Y; Masahara, M; Ishikawa, H

2013-03-25

n-channel body-tied partially depleted metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated for large current applications on a silicon-on-insulator wafer with photonics-oriented specifications. The MOSFET can drive an electrical current as large as 20 mA. We monolithically integrated this MOSFET with a 2 × 2 Mach-Zehnder interferometer optical switch having thermo-optic phase shifters. The static and dynamic performances of the integrated device are experimentally evaluated.

Long-Term Characterization of 6H-SiC Transistor Integrated Circuit Technology Operating at 500 C

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Spry, David J.; Chen, Liang-Yu; Chang, Carl W.; Beheim, Glenn M.; Okojie, Robert S.; Evans, Laura J.; Meredith Roger D.; Ferrier, Terry L.; Krasowski, Michael J.;

Microbially-mediated method for synthesis of non-oxide semiconductor nanoparticles

DOEpatents

Phelps, Tommy J.; Lauf, Robert J.; Moon, Ji Won; Rondinone, Adam J.; Love, Lonnie J.; Duty, Chad Edward; Madden, Andrew Stephen; Li, Yiliang; Ivanov, Ilia N.; Rawn, Claudia Jeanette

2014-06-24

The invention is directed to a method for producing non-oxide semiconductor nanoparticles, the method comprising: (a) subjecting a combination of reaction components to conditions conducive to microbially-mediated formation of non-oxide semiconductor nanoparticles, wherein said combination of reaction components comprises i) anaerobic microbes, ii) a culture medium suitable for sustaining said anaerobic microbes, iii) a metal component comprising at least one type of metal ion, iv) a non-metal component containing at least one non-metal selected from the group consisting of S, Se, Te, and As, and v) one or more electron donors that provide donatable electrons to said anaerobic microbes during consumption of the electron donor by said anaerobic microbes; and (b) isolating said non-oxide semiconductor nanoparticles, which contain at least one of said metal ions and at least one of said non-metals. The invention is also directed to non-oxide semiconductor nanoparticle compositions produced as above and having distinctive properties.

Interface Engineering to Create a Strong Spin Filter Contact to Silicon

NASA Astrophysics Data System (ADS)

Caspers, C.; Gloskovskii, A.; Gorgoi, M.; Besson, C.; Luysberg, M.; Rushchanskii, K. Z.; Ležaić, M.; Fadley, C. S.; Drube, W.; Müller, M.

2016-03-01

Integrating epitaxial and ferromagnetic Europium Oxide (EuO) directly on silicon is a perfect route to enrich silicon nanotechnology with spin filter functionality. To date, the inherent chemical reactivity between EuO and Si has prevented a heteroepitaxial integration without significant contaminations of the interface with Eu silicides and Si oxides. We present a solution to this long-standing problem by applying two complementary passivation techniques for the reactive EuO/Si interface: (i) an in situ hydrogen-Si (001) passivation and (ii) the application of oxygen-protective Eu monolayers-without using any additional buffer layers. By careful chemical depth profiling of the oxide-semiconductor interface via hard x-ray photoemission spectroscopy, we show how to systematically minimize both Eu silicide and Si oxide formation to the sub-monolayer regime-and how to ultimately interface-engineer chemically clean, heteroepitaxial and ferromagnetic EuO/Si (001) in order to create a strong spin filter contact to silicon.

Controlled growth of semiconductor crystals

DOEpatents

Bourret-Courchesne, Edith D.

1992-01-01

A method for growth of III-V, II-VI and related semiconductor single crystals that suppresses random nucleation and sticking of the semiconductor melt at the crucible walls. Small pieces of an oxide of boron B.sub.x O.sub.y are dispersed throughout the comminuted solid semiconductor charge in the crucible, with the oxide of boron preferably having water content of at least 600 ppm. The crucible temperature is first raised to a temperature greater than the melt temperature T.sub.m1 of the oxide of boron (T.sub.m1 =723.degree. K. for boron oxide B.sub.2 O.sub.3), and the oxide of boron is allowed to melt and form a reasonably uniform liquid layer between the crucible walls and bottom surfaces and the still-solid semiconductor charge. The temperature is then raised to approximately the melt temperature T.sub.m2 of the semiconductor charge material, and crystal growth proceeds by a liquid encapsulated, vertical gradient freeze process. About half of the crystals grown have a dislocation density of less than 1000/cm.sup.2. If the oxide of boron has water content less than 600 ppm, the crucible material should include boron nitride, a layer of the inner surface of the crucible should be oxidized before the oxide of boron in the crucible charge is melted, and the sum of thicknesses of the solid boron oxide layer and liquid boron oxide layer should be at least 50 .mu.m.

Controlled growth of semiconductor crystals

DOEpatents

Bourret-Courchesne, E.D.

1992-07-21

A method is disclosed for growth of III-V, II-VI and related semiconductor single crystals that suppresses random nucleation and sticking of the semiconductor melt at the crucible walls. Small pieces of an oxide of boron B[sub x]O[sub y] are dispersed throughout the comminuted solid semiconductor charge in the crucible, with the oxide of boron preferably having water content of at least 600 ppm. The crucible temperature is first raised to a temperature greater than the melt temperature T[sub m1] of the oxide of boron (T[sub m1]=723 K for boron oxide B[sub 2]O[sub 3]), and the oxide of boron is allowed to melt and form a reasonably uniform liquid layer between the crucible walls and bottom surfaces and the still-solid semiconductor charge. The temperature is then raised to approximately the melt temperature T[sub m2] of the semiconductor charge material, and crystal growth proceeds by a liquid encapsulated, vertical gradient freeze process. About half of the crystals grown have a dislocation density of less than 1000/cm[sup 2]. If the oxide of boron has water content less than 600 ppm, the crucible material should include boron nitride, a layer of the inner surface of the crucible should be oxidized before the oxide of boron in the crucible charge is melted, and the sum of thicknesses of the solid boron oxide layer and liquid boron oxide layer should be at least 50 [mu]m. 7 figs.

Functional integrity of flexible n-channel metal-oxide-semiconductor field-effect transistors on a reversibly bistable platform

NASA Astrophysics Data System (ADS)

Alfaraj, Nasir; Hussain, Aftab M.; Torres Sevilla, Galo A.; Ghoneim, Mohamed T.; Rojas, Jhonathan P.; Aljedaani, Abdulrahman B.; Hussain, Muhammad M.

2015-10-01

Flexibility can bring a new dimension to state-of-the-art electronics, such as rollable displays and integrated circuit systems being transformed into more powerful resources. Flexible electronics are typically hosted on polymeric substrates. Such substrates can be bent and rolled up, but cannot be independently fixed at the rigid perpendicular position necessary to realize rollable display-integrated gadgets and electronics. A reversibly bistable material can assume two stable states in a reversible way: flexibly rolled state and independently unbent state. Such materials are used in cycling and biking safety wristbands and a variety of ankle bracelets for orthopedic healthcare. They are often wrapped around an object with high impulsive force loading. Here, we study the effects of cumulative impulsive force loading on thinned (25 μm) flexible silicon-based n-channel metal-oxide-semiconductor field-effect transistor devices housed on a reversibly bistable flexible platform. We found that the transistors have maintained their high performance level up to an accumulated 180 kN of impact force loading. The gate dielectric layers have maintained their reliability, which is evidenced by the low leakage current densities. Also, we observed low variation in the effective electron mobility values, which manifests that the device channels have maintained their carrier transport properties.

Multifunctional Hybrid Multilayer Gate Dielectrics with Tunable Surface Energy for Ultralow-Power Organic and Amorphous Oxide Thin-Film Transistors.

PubMed

Byun, Hye-Ran; You, Eun-Ah; Ha, Young-Geun

2017-03-01

For large-area, printable, and flexible electronic applications using advanced semiconductors, novel dielectric materials with excellent capacitance, insulating property, thermal stability, and mechanical flexibility need to be developed to achieve high-performance, ultralow-voltage operation of thin-film transistors (TFTs). In this work, we first report on the facile fabrication of multifunctional hybrid multilayer gate dielectrics with tunable surface energy via a low-temperature solution-process to produce ultralow-voltage organic and amorphous oxide TFTs. The hybrid multilayer dielectric materials are constructed by iteratively stacking bifunctional phosphonic acid-based self-assembled monolayers combined with ultrathin high-k oxide layers. The nanoscopic thickness-controllable hybrid dielectrics exhibit the superior capacitance (up to 970 nF/cm 2 ), insulating property (leakage current densities <10 -7 A/cm 2 ), and thermal stability (up to 300 °C) as well as smooth surfaces (root-mean-square roughness <0.35 nm). In addition, the surface energy of the hybrid multilayer dielectrics are easily changed by switching between mono- and bifunctional phosphonic acid-based self-assembled monolayers for compatible fabrication with both organic and amorphous oxide semiconductors. Consequently, the hybrid multilayer dielectrics integrated into TFTs reveal their excellent dielectric functions to achieve high-performance, ultralow-voltage operation (< ± 2 V) for both organic and amorphous oxide TFTs. Because of the easily tunable surface energy, the multifunctional hybrid multilayer dielectrics can also be adapted for various organic and inorganic semiconductors, and metal gates in other device configurations, thus allowing diverse advanced electronic applications including ultralow-power and large-area electronic devices.

Semiconductor assisted metal deposition for nanolithography applications

DOEpatents

Rajh, Tijana; Meshkov, Natalia; Nedelijkovic, Jovan M.; Skubal, Laura R.; Tiede, David M.; Thurnauer, Marion

2001-01-01

An article of manufacture and method of forming nanoparticle sized material components. A semiconductor oxide substrate includes nanoparticles of semiconductor oxide. A modifier is deposited onto the nanoparticles, and a source of metal ions are deposited in association with the semiconductor and the modifier, the modifier enabling electronic hole scavenging and chelation of the metal ions. The metal ions and modifier are illuminated to cause reduction of the metal ions to metal onto the semiconductor nanoparticles.

Semiconductor assisted metal deposition for nanolithography applications

DOEpatents

Rajh, Tijana; Meshkov, Natalia; Nedelijkovic, Jovan M.; Skubal, Laura R.; Tiede, David M.; Thurnauer, Marion

2002-01-01

An article of manufacture and method of forming nanoparticle sized material components. A semiconductor oxide substrate includes nanoparticles of semiconductor oxide. A modifier is deposited onto the nanoparticles, and a source of metal ions are deposited in association with the semiconductor and the modifier, the modifier enabling electronic hole scavenging and chelation of the metal ions. The metal ions and modifier are illuminated to cause reduction of the metal ions to metal onto the semiconductor nanoparticles.

Morphology control, defect engineering and photoactivity tuning of ZnO crystals by graphene oxide--a unique 2D macromolecular surfactant.

PubMed

Pan, Xiaoyang; Yang, Min-Quan; Xu, Yi-Jun

2014-03-28

Zinc oxide (ZnO) nanostructured materials have received significant attention because of their unique physicochemical and electronic properties. In particular, the functional properties of ZnO are strongly dependent on its morphology and defect structure, particularly for a semiconductor ZnO-based photocatalyst. Here, we demonstrate a simple strategy for simultaneous morphology control, defect engineering and photoactivity tuning of semiconductor ZnO by utilizing the unique surfactant properties of graphene oxide (GO) in a liquid phase. By varying the amount of GO added during the synthesis process, the morphology of ZnO gradually evolves from a one dimensional prismatic rod to a hexagonal tube-like architecture while GO is converted into reduced GO (RGO). In addition, the introduction of GO can create oxygen vacancies in the lattice of ZnO crystals. As a result, the absorption edge of the wide band gap semiconductor ZnO is effectively extended to the visible light region, which thus endows the RGO-ZnO nanocomposites with visible light photoactivity; in contrast, the bare ZnO nanorod is only UV light photoactive. The synergistic integration of the unique morphology and the presence of oxygen vacancies imparts the RGO-ZnO nanocomposite with remarkably enhanced visible light photoactivity as compared to bare ZnO and its counterpart featuring different structural morphologies and the absence of oxygen vacancies. Our promising results highlight the versatility of the 2D GO as a solution-processable macromolecular surfactant to fabricate RGO-semiconductor nanocomposites with tunable morphology, defect structure and photocatalytic performance in a system-materials-engineering way.

Noise and linearity optimization methods for a 1.9GHz low noise amplifier.

PubMed

Guo, Wei; Huang, Da-Quan

2003-01-01

Noise and linearity performances are critical characteristics for radio frequency integrated circuits (RFICs), especially for low noise amplifiers (LNAs). In this paper, a detailed analysis of noise and linearity for the cascode architecture, a widely used circuit structure in LNA designs, is presented. The noise and the linearity improvement techniques for cascode structures are also developed and have been proven by computer simulating experiments. Theoretical analysis and simulation results showed that, for cascode structure LNAs, the first metallic oxide semiconductor field effect transistor (MOSFET) dominates the noise performance of the LNA, while the second MOSFET contributes more to the linearity. A conclusion is thus obtained that the first and second MOSFET of the LNA can be designed to optimize the noise performance and the linearity performance separately, without trade-offs. The 1.9GHz Complementary Metal-Oxide-Semiconductor (CMOS) LNA simulation results are also given as an application of the developed theory.

Electron-beam-evaporated thin films of hafnium dioxide for fabricating electronic devices

DOE PAGES

Xiao, Zhigang; Kisslinger, Kim

2015-06-17

Thin films of hafnium dioxide (HfO 2) are widely used as the gate oxide in fabricating integrated circuits because of their high dielectric constants. In this paper, the authors report the growth of thin films of HfO 2 using e-beam evaporation, and the fabrication of complementary metal-oxide semiconductor (CMOS) integrated circuits using this HfO 2 thin film as the gate oxide. The authors analyzed the thin films using high-resolution transmission electron microscopy and electron diffraction, thereby demonstrating that the e-beam-evaporation-grown HfO 2 film has a polycrystalline structure and forms an excellent interface with silicon. Accordingly, we fabricated 31-stage CMOS ringmore » oscillator to test the quality of the HfO 2 thin film as the gate oxide, and obtained excellent rail-to-rail oscillation waveforms from it, denoting that the HfO 2 thin film functioned very well as the gate oxide.« less

Packet Controller For Wireless Headset

NASA Technical Reports Server (NTRS)

Christensen, Kurt K.; Swanson, Richard J.

1993-01-01

Packet-message controller implements communications protocol of network of wireless headsets. Designed for headset application, readily adapted to other uses; slight modification enables controller to implement Integrated Services Digital Network (ISDN) X.25 protocol, giving far-reaching applications in telecommunications. Circuit converts continuous voice signals into digital packets of data and vice versa. Operates in master or slave mode. Controller reduced to single complementary metal oxide/semiconductor integrated-circuit chip. Occupies minimal space in headset and consumes little power, extending life of headset battery.

Interface Trap Profiles in 4H- and 6H-SiC MOS Capacitors with Nitrogen- and Phosphorus-Doped Gate Oxides

NASA Astrophysics Data System (ADS)

Jiao, C.; Ahyi, A. C.; Dhar, S.; Morisette, D.; Myers-Ward, R.

2017-04-01

We report results on the interface trap density ( D it) of 4H- and 6H-SiC metal-oxide-semiconductor (MOS) capacitors with different interface chemistries. In addition to pure dry oxidation, we studied interfaces formed by annealing thermal oxides in NO or POCl3. The D it profiles, determined by the C- ψ s method, show that, although the as-oxidized 4H-SiC/SiO2 interface has a much higher D it profile than 6H-SiC/SiO2, after postoxidation annealing (POA), both polytypes maintain comparable D it near the conduction band edge for the gate oxides incorporated with nitrogen or phosphorus. Unlike most conventional C- V- or G- ω-based methods, the C- ψ s method is not limited by the maximum probe frequency, therefore taking into account the "fast traps" detected in previous work on 4H-SiC. The results indicate that such fast traps exist near the band edge of 6H-SiC also. For both polytypes, we show that the total interface trap density ( N it) integrated from the C- ψ s method is several times that obtained from the high-low method. The results suggest that the detected fast traps have a detrimental effect on electron transport in metal-oxide-semiconductor field-effect transistor (MOSFET) channels.

The fabrication of carbon nanotube field-effect transistors with semiconductors as the source and drain contact materials.

PubMed

Xiao, Z; Camino, F E

2009-04-01

Sb(2)Te(3) and Bi(2)Te(2)Se semiconductor materials were used as the source and drain contact materials in the fabrication of carbon nanotube field-effect transistors (CNTFETs). Ultra-purified single-walled carbon nanotubes (SWCNTs) were ultrasonically dispersed in N-methyl pyrrolidone solvent. Dielectrophoresis was used to deposit and align SWCNTs for fabrication of CNTFETs. The Sb(2)Te(3)- and Bi(2)Te(2)Se-based CNTFETs demonstrate p-type metal-oxide-silicon-like I-V curves with high on/off drain-source current ratio at large drain-source voltages and good saturation of drain-source current with increasing drain-source voltage. The fabrication process developed is novel and has general meaning, and could be used for the fabrication of SWCNT-based integrated devices and systems with semiconductor contact materials.

Microbially-mediated method for synthesis of non-oxide semiconductor nanoparticles

DOE Office of Scientific and Technical Information (OSTI.GOV)

Phelps, Tommy J.; Lauf, Robert J.; Moon, Ji-Won

The invention is directed to a method for producing non-oxide semiconductor nanoparticles, the method comprising: (a) subjecting a combination of reaction components to conditions conducive to microbially-mediated formation of non-oxide semiconductor nanoparticles, wherein said combination of reaction components comprises i) anaerobic microbes, ii) a culture medium suitable for sustaining said anaerobic microbes, iii) a metal component comprising at least one type of metal ion, iv) a non-metal component comprising at least one non-metal selected from the group consisting of S, Se, Te, and As, and v) one or more electron donors that provide donatable electrons to said anaerobic microbes duringmore » consumption of the electron donor by said anaerobic microbes; and (b) isolating said non-oxide semiconductor nanoparticles, which contain at least one of said metal ions and at least one of said non-metals. The invention is also directed to non-oxide semiconductor nanoparticle compositions produced as above and having distinctive properties.« less

Improved Stability and Performance of Visible Photoelectrochemical Water Splitting on Solution-Processed Organic Semiconductor Thin Films by Ultrathin Metal Oxide Passivation

DOE PAGES

Wang, Lei; Yan, Danhua; Shaffer, David W.; ...

2017-12-27

Solution-processable organic semiconductors have potentials as visible photoelectrochemical (PEC) water splitting photoelectrodes due to their tunable small band gap and electronic energy levels, but they are typically limited by poor stability and photocatalytic activity. In this study, we demonstrate the direct visible PEC water oxidation on solution-processed organic semiconductor thin films with improved stability and performance by ultrathin metal oxide passivation layers. N-type fullerene-derivative thin films passivated by sub-2 nm ZnO via atomic layer deposition enabled the visible PEC water oxidation at wavelengths longer than 600 nm in harsh alkaline electrolyte environments with up to 30 μA/cm 2 photocurrents atmore » the thermodynamic water-oxidation equilibrium potential and the photoanode half-lifetime extended to ~1000 s. The systematic investigation reveals the enhanced water oxidation catalytic activity afforded by ZnO passivation and the charge tunneling governing the hole transfer through passivation layers. Further enhanced PEC performances were realized by improving the bottom ohmic contact to the organic semiconductor, achieving ~60 μA/cm 2 water oxidation photocurrent at the equilibrium potential, the highest values reported for organic semiconductor thin films to our knowledge. The improved stability and performance of passivated organic photoelectrodes and discovered design rationales provide useful guidelines for realizing the stable visible solar PEC water splitting based on organic semiconductor thin films.« less

Electrically coupling complex oxides to semiconductors: A route to novel material functionalities

DOE PAGES

Ngai, J. H.; Ahmadi-Majlan, K.; Moghadam, J.; ...

2017-01-12

Complex oxides and semiconductors exhibit distinct yet complementary properties owing to their respective ionic and covalent natures. By electrically coupling complex oxides to traditional semiconductors within epitaxial heterostructures, enhanced or novel functionalities beyond those of the constituent materials can potentially be realized. Essential to electrically coupling complex oxides to semiconductors is control of the physical structure of the epitaxially grown oxide, as well as the electronic structure of the interface. In this paper, we discuss how composition of the perovskite A- and B-site cations can be manipulated to control the physical and electronic structure of semiconductor—complex oxide heterostructures. Two prototypicalmore » heterostructures, Ba 1-xSr xTiO 3/Ge and SrZr xTi 1-xO 3/Ge, will be discussed. In the case of Ba 1-xSr xTiO 3/Ge, we discuss how strain can be engineered through A-site composition to enable the re-orientable ferroelectric polarization of the former to be coupled to carriers in the semiconductor. In the case of SrZr xTi 1-xO 3/Ge we discuss how B-site composition can be exploited to control the band offset at the interface. Finally, analogous to heterojunctions between compound semiconducting materials, control of band offsets, i.e., band-gap engineering, provides a pathway to electrically couple complex oxides to semiconductors to realize a host of functionalities.« less

Improved Stability and Performance of Visible Photoelectrochemical Water Splitting on Solution-Processed Organic Semiconductor Thin Films by Ultrathin Metal Oxide Passivation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, Lei; Yan, Danhua; Shaffer, David W.

Solution-processable organic semiconductors have potentials as visible photoelectrochemical (PEC) water splitting photoelectrodes due to their tunable small band gap and electronic energy levels, but they are typically limited by poor stability and photocatalytic activity. In this study, we demonstrate the direct visible PEC water oxidation on solution-processed organic semiconductor thin films with improved stability and performance by ultrathin metal oxide passivation layers. N-type fullerene-derivative thin films passivated by sub-2 nm ZnO via atomic layer deposition enabled the visible PEC water oxidation at wavelengths longer than 600 nm in harsh alkaline electrolyte environments with up to 30 μA/cm 2 photocurrents atmore » the thermodynamic water-oxidation equilibrium potential and the photoanode half-lifetime extended to ~1000 s. The systematic investigation reveals the enhanced water oxidation catalytic activity afforded by ZnO passivation and the charge tunneling governing the hole transfer through passivation layers. Further enhanced PEC performances were realized by improving the bottom ohmic contact to the organic semiconductor, achieving ~60 μA/cm 2 water oxidation photocurrent at the equilibrium potential, the highest values reported for organic semiconductor thin films to our knowledge. The improved stability and performance of passivated organic photoelectrodes and discovered design rationales provide useful guidelines for realizing the stable visible solar PEC water splitting based on organic semiconductor thin films.« less

Electrically coupling complex oxides to semiconductors: A route to novel material functionalities

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ngai, J. H.; Ahmadi-Majlan, K.; Moghadam, J.

Complex oxides and semiconductors exhibit distinct yet complementary properties owing to their respective ionic and covalent natures. By electrically coupling complex oxides to traditional semiconductors within epitaxial heterostructures, enhanced or novel functionalities beyond those of the constituent materials can potentially be realized. Essential to electrically coupling complex oxides to semiconductors is control of the physical structure of the epitaxially grown oxide, as well as the electronic structure of the interface. In this paper, we discuss how composition of the perovskite A- and B-site cations can be manipulated to control the physical and electronic structure of semiconductor—complex oxide heterostructures. Two prototypicalmore » heterostructures, Ba 1-xSr xTiO 3/Ge and SrZr xTi 1-xO 3/Ge, will be discussed. In the case of Ba 1-xSr xTiO 3/Ge, we discuss how strain can be engineered through A-site composition to enable the re-orientable ferroelectric polarization of the former to be coupled to carriers in the semiconductor. In the case of SrZr xTi 1-xO 3/Ge we discuss how B-site composition can be exploited to control the band offset at the interface. Finally, analogous to heterojunctions between compound semiconducting materials, control of band offsets, i.e., band-gap engineering, provides a pathway to electrically couple complex oxides to semiconductors to realize a host of functionalities.« less

Strontium ruthenate-anatase titanium dioxide heterojunctions from first-principles: Electronic structure, spin, and interface dipoles

NASA Astrophysics Data System (ADS)

Ferdous, Naheed; Ertekin, Elif

2016-07-01

The epitaxial integration of functional oxides with wide band gap semiconductors offers the possibility of new material systems for electronics and energy conversion applications. We use first principles to consider an epitaxial interface between the correlated metal oxide SrRuO3 and the wide band gap semiconductor TiO2, and assess energy level alignment, interfacial chemistry, and interfacial dipole formation. Due to the ferromagnetic, half-metallic character of SrRuO3, according to which only one spin is present at the Fermi level, we demonstrate the existence of a spin dependent band alignment across the interface. For two different terminations of SrRuO3, the interface is found to be rectifying with a Schottky barrier of ≈1.3-1.6 eV, in good agreement with experiment. In the minority spin, SrRuO3 exhibits a Schottky barrier alignment with TiO2 and our calculated Schottky barrier height is in excellent agreement with previous experimental measurements. For majority spin carriers, we find that SrRuO3 recovers its exchange splitting gap and bulk-like properties within a few monolayers of the interface. These results demonstrate a possible approach to achieve spin-dependent transport across a heteroepitaxial interface between a functional oxide material and a conventional wide band gap semiconductor.

The VLSI design of an error-trellis syndrome decoder for certain convolutional codes

NASA Technical Reports Server (NTRS)

Reed, I. S.; Jensen, J. M.; Hsu, I.-S.; Truong, T. K.

1986-01-01

A recursive algorithm using the error-trellis decoding technique is developed to decode convolutional codes (CCs). An example, illustrating the very large scale integration (VLSI) architecture of such a decode, is given for a dual-K CC. It is demonstrated that such a decoder can be realized readily on a single chip with metal-nitride-oxide-semiconductor technology.

High-performance coatings for micromechanical mirrors.

PubMed

Gatto, Alexandre; Yang, Minghong; Kaiser, Norbert; Heber, Jörg; Schmidt, Jan Uwe; Sandner, Thilo; Schenk, Harald; Lakner, Hubert

2006-03-01

High-performance coatings for micromechanical mirrors were developed. The high-reflective metal systems can be integrated into the technology of MOEMS, such as spatial light modulators and microscanning mirrors from the near-infrared down to the vacuum-ultraviolet spectral regions. The reported metal designs permit high optical performances to be merged with suitable mechanical properties and fitting complementary metal-oxide semiconductor compatibility.

The VLSI design of error-trellis syndrome decoding for convolutional codes

NASA Technical Reports Server (NTRS)

Reed, I. S.; Jensen, J. M.; Truong, T. K.; Hsu, I. S.

1985-01-01

A recursive algorithm using the error-trellis decoding technique is developed to decode convolutional codes (CCs). An example, illustrating the very large scale integration (VLSI) architecture of such a decode, is given for a dual-K CC. It is demonstrated that such a decoder can be realized readily on a single chip with metal-nitride-oxide-semiconductor technology.

Scalable ferroelectric MOS capacitors comprised of single crystalline SrZrxTi1-xO3 on Ge.

NASA Astrophysics Data System (ADS)

Moghadam, Reza; Xiao, Z.-Y.; Ahmadi-Majlan, K.; Grimley, E.; Ong, P. V.; Lebeau, J. M.; Chambers, S. A.; Hong, X.; Sushko, P.; Ngai, J. H.

The epitaxial growth of multifunctional oxides on semiconductors has opened a pathway to introduce new functionalities to semiconductor device technologies. In particular, ferroelectric materials integrated on semiconductors could lead to field-effect devices that require very little power to operate, or that possess both logic and memory functionalities. The development of metal-oxide-semiconductor (MOS) capacitors in which the polarization of a ferroelectric gate is coupled to the surface potential of a semiconducting channel is essential in order to realize such field-effect devices. Here we demonstrate that scalable, ferroelectric MOS capacitors can be realized using single crystalline SrZrxTi1-xO3 (x = 0.7) that has been epitaxially grown on Ge. Single crystalline SrZrxTi1-xO3 exhibits characteristics that are ideal for a ferroelectric gate material, namely, a type-I band offset with respect to Ge, large coercive fields and polarization that can be enhanced with electric field. The latter characteristic stems from the relaxor nature of SrZrxTi1-xO3. These properties enable MOS capacitors with 5 nm thick SrZrxTi1-xO3 layers to exhibit a nearly 2 V wide hysteretic window in the capacitance-voltage characteristics. The realization of ferroelectric MOS capacitors with technologically relevant gate thicknesses opens the pathway to practical field effect devices. NSF DMR 1508530.

Transient Negative Optical Nonlinearity of Indium Oxide Nanorod Arrays in the Full-Visible Range

DOE PAGES

Guo, Peijun; Chang, Robert P. H.; Schaller, Richard D.

2017-06-09

Dynamic control of the optical response of materials at visible wavelengths is key to future metamaterials and photonic integrated circuits. Here we demonstrate large amplitude, negative optical nonlinearity (Δ n from -0.05 to -0.09) of indium oxide nanorod arrays in the full-visible range. We experimentally quantify and theoretically calculate the optical nonlinearity, which arises from the modifications of interband optical transitions. Furthermore, the approach towards negative optical nonlinearity can be generalized to other transparent semiconductors and opens door to reconfigurable, sub-wavelength optical components.

Potentiometric Dye Imaging for Pheochromocytoma and Cortical Neurons with a Novel Measurement System Using an Integrated Complementary Metal-Oxide-Semiconductor Imaging Device

NASA Astrophysics Data System (ADS)

Kobayashi, Takuma; Tagawa, Ayato; Noda, Toshihiko; Sasagawa, Kiyotaka; Tokuda, Takashi; Hatanaka, Yumiko; Tamura, Hideki; Ishikawa, Yasuyuki; Shiosaka, Sadao; Ohta, Jun

2010-11-01

The combination of optical imaging with voltage-sensitive dyes is a powerful tool for studying the spatiotemporal patterns of neural activity and understanding the neural networks of the brain. To visualize the potential status of multiple neurons simultaneously using a compact instrument with high density and a wide range, we present a novel measurement system using an implantable biomedical photonic LSI device with a red absorptive light filter for voltage-sensitive dye imaging (BpLSI-red). The BpLSI-red was developed for sensing fluorescence by the on-chip LSI, which was designed by using complementary metal-oxide-semiconductor (CMOS) technology. A micro-electro-mechanical system (MEMS) microfabrication technique was used to postprocess the CMOS sensor chip; light-emitting diodes (LEDs) were integrated for illumination and to enable long-term cell culture. Using the device, we succeeded in visualizing the membrane potential of 2000-3000 cells and the process of depolarization of pheochromocytoma cells (PC12 cells) and mouse cerebral cortical neurons in a primary culture with cellular resolution. Therefore, our measurement application enables the detection of multiple neural activities simultaneously.

Ultrasonic fingerprint sensor using a piezoelectric micromachined ultrasonic transducer array integrated with complementary metal oxide semiconductor electronics

NASA Astrophysics Data System (ADS)

Lu, Y.; Tang, H.; Fung, S.; Wang, Q.; Tsai, J. M.; Daneman, M.; Boser, B. E.; Horsley, D. A.

2015-06-01

This paper presents an ultrasonic fingerprint sensor based on a 24 × 8 array of 22 MHz piezoelectric micromachined ultrasonic transducers (PMUTs) with 100 μm pitch, fully integrated with 180 nm complementary metal oxide semiconductor (CMOS) circuitry through eutectic wafer bonding. Each PMUT is directly bonded to a dedicated CMOS receive amplifier, minimizing electrical parasitics and eliminating the need for through-silicon vias. The array frequency response and vibration mode-shape were characterized using laser Doppler vibrometry and verified via finite element method simulation. The array's acoustic output was measured using a hydrophone to be ˜14 kPa with a 28 V input, in reasonable agreement with predication from analytical calculation. Pulse-echo imaging of a 1D steel grating is demonstrated using electronic scanning of a 20 × 8 sub-array, resulting in 300 mV maximum received amplitude and 5:1 contrast ratio. Because the small size of this array limits the maximum image size, mechanical scanning was used to image a 2D polydimethylsiloxane fingerprint phantom (10 mm × 8 mm) at a 1.2 mm distance from the array.

Metal oxides for optoelectronic applications.

PubMed

Yu, Xinge; Marks, Tobin J; Facchetti, Antonio

2016-04-01

Metal oxides (MOs) are the most abundant materials in the Earth's crust and are ingredients in traditional ceramics. MO semiconductors are strikingly different from conventional inorganic semiconductors such as silicon and III-V compounds with respect to materials design concepts, electronic structure, charge transport mechanisms, defect states, thin-film processing and optoelectronic properties, thereby enabling both conventional and completely new functions. Recently, remarkable advances in MO semiconductors for electronics have been achieved, including the discovery and characterization of new transparent conducting oxides, realization of p-type along with traditional n-type MO semiconductors for transistors, p-n junctions and complementary circuits, formulations for printing MO electronics and, most importantly, commercialization of amorphous oxide semiconductors for flat panel displays. This Review surveys the uniqueness and universality of MOs versus other unconventional electronic materials in terms of materials chemistry and physics, electronic characteristics, thin-film fabrication strategies and selected applications in thin-film transistors, solar cells, diodes and memories.

Metal oxides for optoelectronic applications

NASA Astrophysics Data System (ADS)

Yu, Xinge; Marks, Tobin J.; Facchetti, Antonio

2016-04-01

Metal oxides (MOs) are the most abundant materials in the Earth's crust and are ingredients in traditional ceramics. MO semiconductors are strikingly different from conventional inorganic semiconductors such as silicon and III-V compounds with respect to materials design concepts, electronic structure, charge transport mechanisms, defect states, thin-film processing and optoelectronic properties, thereby enabling both conventional and completely new functions. Recently, remarkable advances in MO semiconductors for electronics have been achieved, including the discovery and characterization of new transparent conducting oxides, realization of p-type along with traditional n-type MO semiconductors for transistors, p-n junctions and complementary circuits, formulations for printing MO electronics and, most importantly, commercialization of amorphous oxide semiconductors for flat panel displays. This Review surveys the uniqueness and universality of MOs versus other unconventional electronic materials in terms of materials chemistry and physics, electronic characteristics, thin-film fabrication strategies and selected applications in thin-film transistors, solar cells, diodes and memories.

Direct observation of oxygen-vacancy-enhanced polarization in a SrTiO 3-buffered ferroelectric BaTiO 3 film on GaAs

DOE PAGES

Qiao, Q.; Zhang, Y.; Contreras-Guerrero, Rocio; ...

2015-11-16

The integration of functional oxide thin-films on compound semiconductors can lead to a class of reconfigurable spin-based optoelectronic devices if defect-free, fully reversible active layers are stabilized. However, previous first-principles calculations predicted that SrTiO 3 thin filmsgrown on Si exhibit pinned ferroelectric behavior that is not switchable, due to the presence of interfacial vacancies. Meanwhile, piezoresponse force microscopy measurements have demonstrated ferroelectricity in BaTiO 3 grown on semiconductor substrates. The presence of interfacial oxygen vacancies in such complex-oxide/semiconductor systems remains unexplored, and their effect on ferroelectricity is controversial. We also use a combination of aberration-corrected scanning transmission electron microscopy andmore » first-principles density functional theory modeling to examine the role of interfacial oxygen vacancies on the ferroelectricpolarization of a BaTiO 3 thin filmgrown on GaAs. Moreover, we demonstrate that interfacial oxygen vacancies enhance the polar discontinuity (and thus the single domain, out-of-plane polarization pinning in BaTiO 3), and propose that the presence of surface charge screening allows the formation of switchable domains.« less

Substrate Temperature effect on the transition characteristics of Vanadium (IV) oxide

NASA Astrophysics Data System (ADS)

Yang, Tsung-Han; Wei, Wei; Jin, Chunming; Narayan, Jay

2008-10-01

One of the semiconductor to metal transition material (SMT) is Vanadium Oxide (VO2) which has a very sharp transition temperature close to 340 K as the crystal structure changes from monoclinic phase (semiconductor) into tetragonal phase (metal phase). We have grown high-quality epitaxial vanadium oxide (VO2) films on sapphire (0001) substrates by pulsed laser deposition for oxygen pressure 10-2torr and obtained interesting results without further annealing treatments. The epitaxial growth via domain matching epitaxy, where integral multiples of planes matched across the film-substrate interface. We were able to control the transition characteristics such as the sharpness (T), amplitude (A) of SMT transition and the width of thermal hysteresis (H) by altering the substrate temperature from 300 ^oC, 400 ^oC, 500 ^oC, and 600 ^oC. We use the XRD to identify the microstructure of film and measure the optical properties of film. Finally the transition characteristics is observed by the resistance with the increase of temperature by Van Der Pauw method from 25 to 100 ^oC to measure the electrical resistivity hystersis loop during the transition temperature.

Degradation of Gate Oxide Integrity by Formation of Tiny Holes by Metal Contamination of Raw Wafer

NASA Astrophysics Data System (ADS)

Chen, Po-Ying

2008-12-01

Heavy metal atoms (such as Cu) spontaneously undergo a dissolution reaction when they come into contact with silicon. Most investigations in this extensively studied area begin with a clean, bare wafer and focus on metal contamination during the IC manufacturing stage. In this work, the effect of Fe and Cu contamination on raw wafers was elucidated. When two batches of raw wafers are scheduled, one uncontaminated and one with various degrees of contamination ranging from 0.1 to 10 ppb undergo the typical steps of the 90 nm LOGIC complementary metal-oxide-semiconductor (CMOS) semiconductor manufacturing process. The main contribution of this work is the discovery of a previously unidentified cause of gate oxide leakage: the formation of tiny holes by metal contamination during the wafer manufacturing stage. Because tiny holes are formed, a spontaneous reaction can occur even with at very low metal concentration (0.2 ppb), revealing that the wafer manufacturing stage is more vulnerable to metal contamination than the IC manufacturing stage and therefore requires stricter contamination control.

Computer-aided engineering of semiconductor integrated circuits

NASA Astrophysics Data System (ADS)

Meindl, J. D.; Dutton, R. W.; Gibbons, J. F.; Helms, C. R.; Plummer, J. D.; Tiller, W. A.; Ho, C. P.; Saraswat, K. C.; Deal, B. E.; Kamins, T. I.

1980-07-01

Economical procurement of small quantities of high performance custom integrated circuits for military systems is impeded by inadequate process, device and circuit models that handicap low cost computer aided design. The principal objective of this program is to formulate physical models of fabrication processes, devices and circuits to allow total computer-aided design of custom large-scale integrated circuits. The basic areas under investigation are (1) thermal oxidation, (2) ion implantation and diffusion, (3) chemical vapor deposition of silicon and refractory metal silicides, (4) device simulation and analytic measurements. This report discusses the fourth year of the program.

Bragg reflector based gate stack architecture for process integration of excimer laser annealing

NASA Astrophysics Data System (ADS)

Fortunato, G.; Mariucci, L.; Cuscunà, M.; Privitera, V.; La Magna, A.; Spinella, C.; Magrı, A.; Camalleri, M.; Salinas, D.; Simon, F.; Svensson, B.; Monakhov, E.

2006-12-01

An advanced gate stack structure, which incorporates a Bragg reflector, has been developed for the integration of excimer laser annealing into the power metal-oxide semiconductor (MOS) transistor fabrication process. This advanced gate structure effectively protects the gate stack from melting, thus solving the problem related to protrusion formation. By using this gate stack configuration, power MOS transistors were fabricated with improved electrical characteristics. The Bragg reflector based gate stack architecture can be applied to other device structures, such as scaled MOS transistors, thus extending the possibilities of process integration of excimer laser annealing.

Chip-scale sensor system integration for portable health monitoring.

PubMed

Jokerst, Nan M; Brooke, Martin A; Cho, Sang-Yeon; Shang, Allan B

2007-12-01

The revolution in integrated circuits over the past 50 yr has produced inexpensive computing and communications systems that are powerful and portable. The technologies for these integrated chip-scale sensing systems, which will be miniature, lightweight, and portable, are emerging with the integration of sensors with electronics, optical systems, micromachines, microfluidics, and the integration of chemical and biological materials (soft/wet material integration with traditional dry/hard semiconductor materials). Hence, we stand at a threshold for health monitoring technology that promises to provide wearable biochemical sensing systems that are comfortable, inauspicious, wireless, and battery-operated, yet that continuously monitor health status, and can transmit compressed data signals at regular intervals, or alarm conditions immediately. In this paper, we explore recent results in chip-scale sensor integration technology for health monitoring. The development of inexpensive chip-scale biochemical optical sensors, such as microresonators, that are customizable for high sensitivity coupled with rapid prototyping will be discussed. Ground-breaking work in the integration of chip-scale optical systems to support these optical sensors will be highlighted, and the development of inexpensive Si complementary metal-oxide semiconductor circuitry (which makes up the vast majority of computational systems today) for signal processing and wireless communication with local receivers that lie directly on the chip-scale sensor head itself will be examined.

Adaptive Integration of the Compressed Algorithm of CS and NPC for the ECG Signal Compressed Algorithm in VLSI Implementation

PubMed Central

Tseng, Yun-Hua; Lu, Chih-Wen

2017-01-01

Compressed sensing (CS) is a promising approach to the compression and reconstruction of electrocardiogram (ECG) signals. It has been shown that following reconstruction, most of the changes between the original and reconstructed signals are distributed in the Q, R, and S waves (QRS) region. Furthermore, any increase in the compression ratio tends to increase the magnitude of the change. This paper presents a novel approach integrating the near-precise compressed (NPC) and CS algorithms. The simulation results presented notable improvements in signal-to-noise ratio (SNR) and compression ratio (CR). The efficacy of this approach was verified by fabricating a highly efficient low-cost chip using the Taiwan Semiconductor Manufacturing Company’s (TSMC) 0.18-μm Complementary Metal-Oxide-Semiconductor (CMOS) technology. The proposed core has an operating frequency of 60 MHz and gate counts of 2.69 K. PMID:28991216

Room temperature electrical spin injection into GaAs by an oxide spin injector

PubMed Central

Bhat, Shwetha G.; Kumar, P. S. Anil

2014-01-01

Spin injection, manipulation and detection are the integral parts of spintronics devices and have attracted tremendous attention in the last decade. It is necessary to judiciously choose the right combination of materials to have compatibility with the existing semiconductor technology. Conventional metallic magnets were the first choice for injecting spins into semiconductors in the past. So far there is no success in using a magnetic oxide material for spin injection, which is very important for the development of oxide based spintronics devices. Here we demonstrate the electrical spin injection from an oxide magnetic material Fe3O4, into GaAs with the help of tunnel barrier MgO at room temperature using 3-terminal Hanle measurement technique. A spin relaxation time τ ~ 0.9 ns for n-GaAs at 300 K is observed along with expected temperature dependence of τ. Spin injection using Fe3O4/MgO system is further established by injecting spins into p-GaAs and a τ of ~0.32 ns is obtained at 300 K. Enhancement of spin injection efficiency is seen with barrier thickness. In the field of spin injection and detection, our work using an oxide magnetic material establishes a good platform for the development of room temperature oxide based spintronics devices. PMID:24998440

Study of non-stoichiometric BaSrTiFeO3 oxide dedicated to semiconductor gas sensors

NASA Astrophysics Data System (ADS)

Fasquelle, D.; Verbrugghe, N.; Deputier, S.

2016-11-01

Developing instrumentation systems compatible with the European RoHS directive (restriction of hazardous substances) to monitor our environment is of great interest for our society. Our research therefore aims at developing innovating integrated systems of detection dedicated to the characterization of various environmental exposures. These systems, which integrate new gas sensors containing lead-free oxides, are dedicated to the detection of flammable and toxic gases. We have firstly chosen to study semiconductor gas sensors implemented with lead-free oxides in view to develop RoHS devices. Therefore thick films deposited by spin-coating and screen-printing have been chosen for their robustness, ease to realize and ease to finally obtain cost-effective sensors. As crystalline defects and ionic vacancies are of great interest for gas detection, we have decided to study a non-stoichiometric composition of the BaSrTiFeO3 sensible oxide. Nonstoichiometric BaSrTiFeO3 lead-free oxide thick films were deposited by screen-printing on polycrystalline AFO3 substrates covered by a layer of Ag-Pd acting as bottom electrode. The physical characterizations have revealed a crystalline structure mainly composed of BaTiO3 pseudo-cubic phase and Ba4Ti12O27 monoclinic phase for the powder, and a porous microstructure for the thick films. When compared to a BSTF thick film with a stoichiometric composition, a notable increase in the BSTF dielectric constant value was observed when taking into account of a similar microstructure and grain size. The loss tangent mean value varies more softly for the non-stoichiometric BaSrTiFeO3 films than for the perovskite BSTF film as tanδ decreases from 0.45 to 0.04 when the frequency increases from 100 Hz to 1 MHz.

The AMOS cell - An improved metal-semiconductor solar cell. [Antireflection coated Metal Oxide Semiconductor

NASA Technical Reports Server (NTRS)

Stirn, R. J.; Yeh, Y.-C. M.

1975-01-01

A new fabrication process is being developed which significantly improves the efficiency of metal-semiconductor solar cells. The resultant effect, a marked increase in the open-circuit voltage, is produced by the addition of an interfacial layer oxide on the semiconductor. Cells using gold on n-type gallium arsenide have been made in small areas (0.17 sq cm) with conversion efficiencies of 15% in terrestrial sunlight.

Numerical investigation of metal-semiconductor-insulator-semiconductor passivated hole contacts based on atomic layer deposited AlO x

NASA Astrophysics Data System (ADS)

Ke, Cangming; Xin, Zheng; Ling, Zhi Peng; Aberle, Armin G.; Stangl, Rolf

2017-08-01

Excellent c-Si tunnel layer surface passivation has been obtained recently in our lab, using atomic layer deposited aluminium oxide (ALD AlO x ) in the tunnel layer regime of 0.9 to 1.5 nm, investigated to be applied for contact passivation. Using the correspondingly measured interface properties, this paper compares the theoretical collection efficiency of a conventional metal-semiconductor (MS) contact on diffused p+ Si to a metal-semiconductor-insulator-semiconductor (MSIS) contact on diffused p+ Si or on undoped n-type c-Si. The influences of (1) the tunnel layer passivation quality at the tunnel oxide interface (Q f and D it), (2) the tunnel layer thickness and the electron and hole tunnelling mass, (3) the tunnel oxide material, and (4) the semiconductor capping layer material properties are investigated numerically by evaluation of solar cell efficiency, open-circuit voltage, and fill factor.

A rugged 650 V SOI-based high-voltage half-bridge IGBT gate driver IC for motor drive applications

NASA Astrophysics Data System (ADS)

Hua, Qing; Li, Zehong; Zhang, Bo; Chen, Weizhong; Huang, Xiangjun; Feng, Yuxiang

2015-05-01

This paper proposes a rugged high-voltage N-channel insulated gate bipolar transistor (IGBT) gate driver integrated circuit. The device integrates a high-side and a low-side output stages on a single chip, which is designed specifically for motor drive applications. High-voltage level shift technology enables the high-side stage of this device to operate up to 650 V. The logic inputs are complementary metal oxide semiconductor (CMOS)/transistor transistor logic compatible down to 3.3 V. Undervoltage protection functionality with hysteresis characteristic has also been integrated to enhance the device reliability. The device is fabricated in a 1.0 μm, 650 V high-voltage bipolar CMOS double-diffused metal oxide semiconductor (BCD) on silicon-on-insulator (SOI) process. Deep trench dielectric isolation technology is employed to provide complete electrical isolation with advantages such as reduced parasitic effects, excellent noise immunity and low leakage current. Experimental results show that the isolation voltage of this device can be up to approximately 779 V at 25°C, and the leakage current is only 5 nA at 650 V, which is 15% higher and 67% lower than the conventional ones. In addition, it delivers an excellent thermal stability and needs very low quiescent current and offers a high gate driver capability which is needed to adequately drive IGBTs that have large input capacitances.

Single crystal functional oxides on silicon

PubMed Central

Bakaul, Saidur Rahman; Serrao, Claudy Rayan; Lee, Michelle; Yeung, Chun Wing; Sarker, Asis; Hsu, Shang-Lin; Yadav, Ajay Kumar; Dedon, Liv; You, Long; Khan, Asif Islam; Clarkson, James David; Hu, Chenming; Ramesh, Ramamoorthy; Salahuddin, Sayeef

2016-01-01

Single-crystalline thin films of complex oxides show a rich variety of functional properties such as ferroelectricity, piezoelectricity, ferro and antiferromagnetism and so on that have the potential for completely new electronic applications. Direct synthesis of such oxides on silicon remains challenging because of the fundamental crystal chemistry and mechanical incompatibility of dissimilar interfaces. Here we report integration of thin (down to one unit cell) single crystalline, complex oxide films onto silicon substrates, by epitaxial transfer at room temperature. In a field-effect transistor using a transferred lead zirconate titanate layer as the gate insulator, we demonstrate direct reversible control of the semiconductor channel charge with polarization state. These results represent the realization of long pursued but yet to be demonstrated single-crystal functional oxides on-demand on silicon. PMID:26853112

A review of molecular beam epitaxy of ferroelectric BaTiO3 films on Si, Ge and GaAs substrates and their applications

PubMed Central

Mazet, Lucie; Yang, Sang Mo; Kalinin, Sergei V; Schamm-Chardon, Sylvie; Dubourdieu, Catherine

2015-01-01

SrTiO3 epitaxial growth by molecular beam epitaxy (MBE) on silicon has opened up the route to the monolithic integration of various complex oxides on the complementary metal-oxide–semiconductor silicon platform. Among functional oxides, ferroelectric perovskite oxides offer promising perspectives to improve or add functionalities on-chip. We review the growth by MBE of the ferroelectric compound BaTiO3 on silicon (Si), germanium (Ge) and gallium arsenide (GaAs) and we discuss the film properties in terms of crystalline structure, microstructure and ferroelectricity. Finally, we review the last developments in two areas of interest for the applications of BaTiO3 films on silicon, namely integrated photonics, which benefits from the large Pockels effect of BaTiO3, and low power logic devices, which may benefit from the negative capacitance of the ferroelectric. PMID:27877816

Synthesis Methods, Microscopy Characterization and Device Integration of Nanoscale Metal Oxide Semiconductors for Gas Sensing

PubMed Central

Vander Wal, Randy L.; Berger, Gordon M.; Kulis, Michael J.; Hunter, Gary W.; Xu, Jennifer C.; Evans, Laura

2009-01-01

A comparison is made between SnO2, ZnO, and TiO2 single-crystal nanowires and SnO2 polycrystalline nanofibers for gas sensing. Both nanostructures possess a one-dimensional morphology. Different synthesis methods are used to produce these materials: thermal evaporation-condensation (TEC), controlled oxidation, and electrospinning. Advantages and limitations of each technique are listed. Practical issues associated with harvesting, purification, and integration of these materials into sensing devices are detailed. For comparison to the nascent form, these sensing materials are surface coated with Pd and Pt nanoparticles. Gas sensing tests, with respect to H2, are conducted at ambient and elevated temperatures. Comparative normalized responses and time constants for the catalyst and noncatalyst systems provide a basis for identification of the superior metal-oxide nanostructure and catalyst combination. With temperature-dependent data, Arrhenius analyses are made to determine activation energies for the catalyst-assisted systems. PMID:22408484

Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

PubMed Central

Long, Rathnait D.; McIntyre, Paul C.

2012-01-01

The literature on polar Gallium Nitride (GaN) surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS) devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

SOI CMOS Imager with Suppression of Cross-Talk

NASA Technical Reports Server (NTRS)

Pain, Bedabrata; Zheng, Xingyu; Cunningham, Thomas J.; Seshadri, Suresh; Sun, Chao

2009-01-01

A monolithic silicon-on-insulator (SOI) complementary metal oxide/semiconductor (CMOS) image-detecting integrated circuit of the active-pixel-sensor type, now undergoing development, is designed to operate at visible and near-infrared wavelengths and to offer a combination of high quantum efficiency and low diffusion and capacitive cross-talk among pixels. The imager is designed to be especially suitable for astronomical and astrophysical applications. The imager design could also readily be adapted to general scientific, biological, medical, and spectroscopic applications. One of the conditions needed to ensure both high quantum efficiency and low diffusion cross-talk is a relatively high reverse bias potential (between about 20 and about 50 V) on the photodiode in each pixel. Heretofore, a major obstacle to realization of this condition in a monolithic integrated circuit has been posed by the fact that the required high reverse bias on the photodiode is incompatible with metal oxide/semiconductor field-effect transistors (MOSFETs) in the CMOS pixel readout circuitry. In the imager now being developed, the SOI structure is utilized to overcome this obstacle: The handle wafer is retained and the photodiode is formed in the handle wafer. The MOSFETs are formed on the SOI layer, which is separated from the handle wafer by a buried oxide layer. The electrical isolation provided by the buried oxide layer makes it possible to bias the MOSFETs at CMOS-compatible potentials (between 0 and 3 V), while biasing the photodiode at the required higher potential, and enables independent optimization of the sensory and readout portions of the imager.

Interface Engineering to Create a Strong Spin Filter Contact to Silicon

PubMed Central

Caspers, C.; Gloskovskii, A.; Gorgoi, M.; Besson, C.; Luysberg, M.; Rushchanskii, K. Z.; Ležaić, M.; Fadley, C. S.; Drube, W.; Müller, M.

2016-01-01

Integrating epitaxial and ferromagnetic Europium Oxide (EuO) directly on silicon is a perfect route to enrich silicon nanotechnology with spin filter functionality. To date, the inherent chemical reactivity between EuO and Si has prevented a heteroepitaxial integration without significant contaminations of the interface with Eu silicides and Si oxides. We present a solution to this long-standing problem by applying two complementary passivation techniques for the reactive EuO/Si interface: (i) an in situ hydrogen-Si (001) passivation and (ii) the application of oxygen-protective Eu monolayers–without using any additional buffer layers. By careful chemical depth profiling of the oxide-semiconductor interface via hard x-ray photoemission spectroscopy, we show how to systematically minimize both Eu silicide and Si oxide formation to the sub-monolayer regime–and how to ultimately interface-engineer chemically clean, heteroepitaxial and ferromagnetic EuO/Si (001) in order to create a strong spin filter contact to silicon. PMID:26975515

A review of molecular beam epitaxy of ferroelectric BaTiO 3 films on Si, Ge and GaAs substrates and their applications

DOE PAGES

Mazet, Lucie; Yang, Sang Mo; Kalinin, Sergei V.; ...

2015-06-30

SrTiO 3 epitaxial growth by molecular beam epitaxy (MBE) on silicon has opened up the route to the monolithic integration of various complex oxides on the complementary metal-oxide-semiconductor silicon platform. Among functional oxides, ferroelectric perovskite oxides offer promising perspectives to improve or add functionalities on-chip. We review the growth by MBE of the ferroelectric compound BaTiO 3 on silicon (Si), germanium (Ge) and gallium arsenide (GaAs) and we discuss the film properties in terms of crystalline structure, microstructure and ferroelectricity. Lastly, we review the last developments in two areas of interest for the applications of BaTiO 3 films on silicon,more » namely integrated photonics, which benefits from the large Pockels effect of BaTiO 3, and low power logic devices, which may benefit from the negative capacitance of the ferroelectric.« less

Self-cleaning and surface chemical reactions during hafnium dioxide atomic layer deposition on indium arsenide.

PubMed

Timm, Rainer; Head, Ashley R; Yngman, Sofie; Knutsson, Johan V; Hjort, Martin; McKibbin, Sarah R; Troian, Andrea; Persson, Olof; Urpelainen, Samuli; Knudsen, Jan; Schnadt, Joachim; Mikkelsen, Anders

2018-04-12

Atomic layer deposition (ALD) enables the ultrathin high-quality oxide layers that are central to all modern metal-oxide-semiconductor circuits. Crucial to achieving superior device performance are the chemical reactions during the first deposition cycle, which could ultimately result in atomic-scale perfection of the semiconductor-oxide interface. Here, we directly observe the chemical reactions at the surface during the first cycle of hafnium dioxide deposition on indium arsenide under realistic synthesis conditions using photoelectron spectroscopy. We find that the widely used ligand exchange model of the ALD process for the removal of native oxide on the semiconductor and the simultaneous formation of the first hafnium dioxide layer must be significantly revised. Our study provides substantial evidence that the efficiency of the self-cleaning process and the quality of the resulting semiconductor-oxide interface can be controlled by the molecular adsorption process of the ALD precursors, rather than the subsequent oxide formation.

Electra-optical device including a nitrogen containing electrolyte

DOEpatents

Bates, J.B.; Dudney, N.J.; Gruzalski, G.R.; Luck, C.F.

1995-10-03

Described is a thin-film battery, especially a thin-film microbattery, and a method for making same having application as a backup or primary integrated power source for electronic devices. The battery includes a novel electrolyte which is electrochemically stable and does not react with the lithium anode and a novel vanadium oxide cathode. Configured as a microbattery, the battery can be fabricated directly onto a semiconductor chip, onto the semiconductor die or onto any portion of the chip carrier. The battery can be fabricated to any specified size or shape to meet the requirements of a particular application. The battery is fabricated of solid state materials and is capable of operation between {minus}15 C and 150 C.

Cathode for an electrochemical cell

DOEpatents

Bates, John B.; Dudney, Nancy J.; Gruzalski, Greg R.; Luck, Christopher F.

2001-01-01

Described is a thin-film battery, especially a thin-film microbattery, and a method for making same having application as a backup or primary integrated power source for electronic devices. The battery includes a novel electrolyte which is electrochemically stable and does not react with the lithium anode and a novel vanadium oxide cathode. Configured as a microbattery, the battery can be fabricated directly onto a semiconductor chip, onto the semiconductor die or onto any portion of the chip carrier. The battery can be fabricated to any specified size or shape to meet the requirements of a particular application. The battery is fabricated of solid state materials and is capable of operation between -15.degree. C. and 150.degree. C.

Method for making an electrochemical cell

DOEpatents

Bates, John B.; Dudney, Nancy J.

1996-01-01

Described is a thin-film battery, especially a thin-film microbattery, and a method for making same having application as a backup or primary integrated power source for electronic devices. The battery includes a novel electrolyte which is electrochemically stable and does not react with the lithium anode and a novel vanadium oxide cathode Configured as a microbattery, the battery can be fabricated directly onto a semiconductor chip, onto the semiconductor die or onto any portion of the chip carrier. The battery can be fabricated to any specified size or shape to meet the requirements of a particular application. The battery is fabricated of solid state materials and is capable of operation between -15.degree. C. and 150.degree. C.

The PR2D (Place, Route in 2-Dimensions) automatic layout computer program handbook

NASA Technical Reports Server (NTRS)

Edge, T. M.

1978-01-01

Place, Route in 2-Dimensions is a standard cell automatic layout computer program for generating large scale integrated/metal oxide semiconductor arrays. The program was utilized successfully for a number of years in both government and private sectors but until now was undocumented. The compilation, loading, and execution of the program on a Sigma V CP-V operating system is described.

Trap densities and transport properties of pentacene metal-oxide-semiconductor transistors. I. Analytical modeling of time-dependent characteristics

NASA Astrophysics Data System (ADS)

Basile, A. F.; Cramer, T.; Kyndiah, A.; Biscarini, F.; Fraboni, B.

2014-06-01

Metal-oxide-semiconductor (MOS) transistors fabricated with pentacene thin films were characterized by temperature-dependent current-voltage (I-V) characteristics, time-dependent current measurements, and admittance spectroscopy. The channel mobility shows almost linear variation with temperature, suggesting that only shallow traps are present in the semiconductor and at the oxide/semiconductor interface. The admittance spectra feature a broad peak, which can be modeled as the sum of a continuous distribution of relaxation times. The activation energy of this peak is comparable to the polaron binding energy in pentacene. The absence of trap signals in the admittance spectra confirmed that both the semiconductor and the oxide/semiconductor interface have negligible density of deep traps, likely owing to the passivation of SiO2 before pentacene growth. Nevertheless, current instabilities were observed in time-dependent current measurements following the application of gate-voltage pulses. The corresponding activation energy matches the energy of a hole trap in SiO2. We show that hole trapping in the oxide can explain both the temperature and the time dependences of the current instabilities observed in pentacene MOS transistors. The combination of these experimental techniques allows us to derive a comprehensive model for charge transport in hybrid architectures where trapping processes occur at various time and length scales.

High performance flexible electronics for biomedical devices.

PubMed

Salvatore, Giovanni A; Munzenrieder, Niko; Zysset, Christoph; Kinkeldei, Thomas; Petti, Luisa; Troster, Gerhard

2014-01-01

Plastic electronics is soft, deformable and lightweight and it is suitable for the realization of devices which can form an intimate interface with the body, be implanted or integrated into textile for wearable and biomedical applications. Here, we present flexible electronics based on amorphous oxide semiconductors (a-IGZO) whose performance can achieve MHz frequency even when bent around hair. We developed an assembly technique to integrate complex electronic functionalities into textile while preserving the softness of the garment. All this and further developments can open up new opportunities in health monitoring, biotechnology and telemedicine.

High-Speed Binary-Output Image Sensor

NASA Technical Reports Server (NTRS)

Fossum, Eric; Panicacci, Roger A.; Kemeny, Sabrina E.; Jones, Peter D.

1996-01-01

Photodetector outputs digitized by circuitry on same integrated-circuit chip. Developmental special-purpose binary-output image sensor designed to capture up to 1,000 images per second, with resolution greater than 10 to the 6th power pixels per image. Lower-resolution but higher-frame-rate prototype of sensor contains 128 x 128 array of photodiodes on complementary metal oxide/semiconductor (CMOS) integrated-circuit chip. In application for which it is being developed, sensor used to examine helicopter oil to determine whether amount of metal and sand in oil sufficient to warrant replacement.

K-band single-chip electron spin resonance detector.

PubMed

Anders, Jens; Angerhofer, Alexander; Boero, Giovanni

2012-04-01

We report on the design, fabrication, and characterization of an integrated detector for electron spin resonance spectroscopy operating at 27 GHz. The microsystem, consisting of an LC-oscillator and a frequency division module, is integrated onto a single silicon chip using a conventional complementary metal-oxide-semiconductor technology. The achieved room temperature spin sensitivity is about 10(8)spins/G Hz(1/2), with a sensitive volume of about (100 μm)(3). Operation at 77K is also demonstrated. Copyright © 2012 Elsevier Inc. All rights reserved.

1.31-1.55-µm Hybrid integrated optoelectronic receiver using low-loss quasi-monolithic integration technology

NASA Astrophysics Data System (ADS)

Luo, Yang; Huang, Yongqing; Ren, Xiaomin; Duan, Xiaofeng; Wang, Qi

2014-01-01

In order to integrate photonic devices with electronic devices to realize the low-loss hybrid integrated devices. A wide spectral hybrid integrated optoelectronic receiver was fabricated by using quasi-monolithic integration technology (QMIT) in this paper. It consisted of a 8.5 GHz InGaAs photodetector and a 1.25 Gbps mature transimpedance pre-amplifier (TIA) complementrary metal oxide semiconductor (CMOS) chip. The Au layer was deposited on a designed Si platform to form planar waveguide electrode which replaced a part of bonding wire, so it reduced the parasitic parameters of the optoelectronic receiver, and then enhanced high-speed response characteristics and the stability of the hybrid integrated receiver. Finally, a 3 Gbps clear open eye diagram of the hybrid integrated optoelectronic receiver was obtained.

Bacteria inside semiconductors as potential sensor elements: biochip progress.

PubMed

Sah, Vasu R; Baier, Robert E

2014-06-24

It was discovered at the beginning of this Century that living bacteria-and specifically the extremophile Pseudomonas syzgii-could be captured inside growing crystals of pure water-corroding semiconductors-specifically germanium-and thereby initiated pursuit of truly functional "biochip-based" biosensors. This observation was first made at the inside ultraviolet-illuminated walls of ultrapure water-flowing semiconductor fabrication facilities (fabs) and has since been, not as perfectly, replicated in simpler flow cell systems for chip manufacture, described here. Recognizing the potential importance of these adducts as optical switches, for example, or probes of metabolic events, the influences of the fabs and their components on the crystal nucleation and growth phenomena now identified are reviewed and discussed with regard to further research needs. For example, optical beams of current photonic circuits can be more easily modulated by integral embedded cells into electrical signals on semiconductors. Such research responds to a recently published Grand Challenge in ceramic science, designing and synthesizing oxide electronics, surfaces, interfaces and nanoscale structures that can be tuned by biological stimuli, to reveal phenomena not otherwise possible with conventional semiconductor electronics. This short review addresses only the fabrication facilities' features at the time of first production of these potential biochips.

Recent Advances of Solution-Processed Metal Oxide Thin-Film Transistors.

PubMed

Xu, Wangying; Li, Hao; Xu, Jian-Bin; Wang, Lei

2018-03-06

Solution-processed metal oxide thin-film transistors (TFTs) are considered as one of the most promising transistor technologies for future large-area flexible electronics. This review surveys the recent advances in solution-based oxide TFTs, including n-type oxide semiconductors, oxide dielectrics and p-type oxide semiconductors. Firstly, we provide an introduction on oxide TFTs and the TFT configurations and operating principles. Secondly, we present the recent progress in solution-processed n-type transistors, with a special focus on low-temperature and large-area solution processed approaches as well as novel non-display applications. Thirdly, we give a detailed analysis of the state-of-the-art solution-processed oxide dielectrics for low-voltage electronics. Fourthly, we discuss the recent progress in solution-based p-type oxide semiconductors, which will enable the highly desirable future low-cost large-area complementary circuits. Finally, we draw the conclusions and outline the perspectives over the research field.

PdO Doping Tunes Band-Gap Energy Levels as Well as Oxidative Stress Responses to a Co3O4p-Type Semiconductor in Cells and the Lung

PubMed Central

2014-01-01

We demonstrate through PdO doping that creation of heterojunctions on Co3O4 nanoparticles can quantitatively adjust band-gap and Fermi energy levels to study the impact of metal oxide nanoparticle semiconductor properties on cellular redox homeostasis and hazard potential. Flame spray pyrolysis (FSP) was used to synthesize a nanoparticle library in which the gradual increase in the PdO content (0–8.9%) allowed electron transfer from Co3O4 to PdO to align Fermi energy levels across the heterojunctions. This alignment was accompanied by free hole accumulation at the Co3O4 interface and production of hydroxyl radicals. Interestingly, there was no concomitant superoxide generation, which could reflect the hole dominance of a p-type semiconductor. Although the electron flux across the heterojunctions induced upward band bending, the Ec levels of the doped particles showed energy overlap with the biological redox potential (BRP). This allows electron capture from the redox couples that maintain the BRP from −4.12 to −4.84 eV, causing disruption of cellular redox homeostasis and induction of oxidative stress. PdO/Co3O4 nanoparticles showed significant increases in cytotoxicity at 25, 50, 100, and 200 μg/mL, which was enhanced incrementally by PdO doping in BEAS-2B and RAW 264.7 cells. Oxidative stress presented as a tiered cellular response involving superoxide generation, glutathione depletion, cytokine production, and cytotoxicity in epithelial and macrophage cell lines. A progressive series of acute pro-inflammatory effects could also be seen in the lungs of animals exposed to incremental PdO-doped particles. All considered, generation of a combinatorial PdO/Co3O4 nanoparticle library with incremental heterojunction density allowed us to demonstrate the integrated role of Ev, Ec, and Ef levels in the generation of oxidant injury and inflammation by the p-type semiconductor, Co3O4. PMID:24673286

PdO doping tunes band-gap energy levels as well as oxidative stress responses to a Co₃O₄ p-type semiconductor in cells and the lung.

PubMed

Zhang, Haiyuan; Pokhrel, Suman; Ji, Zhaoxia; Meng, Huan; Wang, Xiang; Lin, Sijie; Chang, Chong Hyun; Li, Linjiang; Li, Ruibin; Sun, Bingbing; Wang, Meiying; Liao, Yu-Pei; Liu, Rong; Xia, Tian; Mädler, Lutz; Nel, André E

2014-04-30

We demonstrate through PdO doping that creation of heterojunctions on Co3O4 nanoparticles can quantitatively adjust band-gap and Fermi energy levels to study the impact of metal oxide nanoparticle semiconductor properties on cellular redox homeostasis and hazard potential. Flame spray pyrolysis (FSP) was used to synthesize a nanoparticle library in which the gradual increase in the PdO content (0-8.9%) allowed electron transfer from Co3O4 to PdO to align Fermi energy levels across the heterojunctions. This alignment was accompanied by free hole accumulation at the Co3O4 interface and production of hydroxyl radicals. Interestingly, there was no concomitant superoxide generation, which could reflect the hole dominance of a p-type semiconductor. Although the electron flux across the heterojunctions induced upward band bending, the E(c) levels of the doped particles showed energy overlap with the biological redox potential (BRP). This allows electron capture from the redox couples that maintain the BRP from -4.12 to -4.84 eV, causing disruption of cellular redox homeostasis and induction of oxidative stress. PdO/Co3O4 nanoparticles showed significant increases in cytotoxicity at 25, 50, 100, and 200 μg/mL, which was enhanced incrementally by PdO doping in BEAS-2B and RAW 264.7 cells. Oxidative stress presented as a tiered cellular response involving superoxide generation, glutathione depletion, cytokine production, and cytotoxicity in epithelial and macrophage cell lines. A progressive series of acute pro-inflammatory effects could also be seen in the lungs of animals exposed to incremental PdO-doped particles. All considered, generation of a combinatorial PdO/Co3O4 nanoparticle library with incremental heterojunction density allowed us to demonstrate the integrated role of E(v), E(c), and E(f) levels in the generation of oxidant injury and inflammation by the p-type semiconductor, Co3O4.

Integration of perovskite oxide dielectrics into complementary metal-oxide-semiconductor capacitor structures using amorphous TaSiN as oxygen diffusion barrier

NASA Astrophysics Data System (ADS)

Mešić, Biljana; Schroeder, Herbert

2011-09-01

The high permittivity perovskite oxides have been intensively investigated for their possible application as dielectric materials for stacked capacitors in dynamic random access memory circuits. For the integration of such oxide materials into the CMOS world, a conductive diffusion barrier is indispensable. An optimized stack p++-Si/Pt/Ta21Si57N21/Ir was developed and used as the bottom electrode for the oxide dielectric. The amorphous TaSiN film as oxygen diffusion barrier showed excellent conductive properties and a good thermal stability up to 700 °C in oxygen ambient. The additional protective iridium layer improved the surface roughness after annealing. A 100-nm-thick (Ba,Sr)TiO3 film was deposited using pulsed laser deposition at 550 °C, showing very promising properties for application; the maximum relative dielectric constant at zero field is κ ≈ 470, and the leakage current density is below 10-6 A/cm2 for fields lower then ± 200 kV/cm, corresponding to an applied voltage of ± 2 V.

1 mm3-sized optical neural stimulator based on CMOS integrated photovoltaic power receiver

NASA Astrophysics Data System (ADS)

Tokuda, Takashi; Ishizu, Takaaki; Nattakarn, Wuthibenjaphonchai; Haruta, Makito; Noda, Toshihiko; Sasagawa, Kiyotaka; Sawan, Mohamad; Ohta, Jun

2018-04-01

In this work, we present a simple complementary metal-oxide semiconductor (CMOS)-controlled photovoltaic power-transfer platform that is suitable for very small (less than or equal to 1-2 mm) electronic devices such as implantable health-care devices or distributed nodes for the Internet of Things. We designed a 1.25 mm × 1.25 mm CMOS power receiver chip that contains integrated photovoltaic cells. We characterized the CMOS-integrated power receiver and successfully demonstrated blue light-emitting diode (LED) operation powered by infrared light. Then, we integrated the CMOS chip and a few off-chip components into a 1-mm3 implantable optogenetic stimulator, and demonstrated the operation of the device.

Ferroelectricity in Covalently functionalized Two-dimensional Materials: Integration of High-mobility Semiconductors and Nonvolatile Memory.

PubMed

Wu, Menghao; Dong, Shuai; Yao, Kailun; Liu, Junming; Zeng, Xiao Cheng

2016-11-09

Realization of ferroelectric semiconductors by conjoining ferroelectricity with semiconductors remains a challenging task because most present-day ferroelectric materials are unsuitable for such a combination due to their wide bandgaps. Herein, we show first-principles evidence toward the realization of a new class of two-dimensional (2D) ferroelectric semiconductors through covalent functionalization of many prevailing 2D materials. Members in this new class of 2D ferroelectric semiconductors include covalently functionalized germanene, and stanene (Nat. Commun. 2014, 5, 3389), as well as MoS 2 monolayer (Nat. Chem. 2015, 7, 45), covalent functionalization of the surface of bulk semiconductors such as silicon (111) (J. Phys. Chem. B 2006, 110 , 23898), and the substrates of oxides such as silica with self-assembly monolayers (Nano Lett. 2014, 14, 1354). The newly predicted 2D ferroelectric semiconductors possess high mobility, modest bandgaps, and distinct ferroelectricity that can be exploited for developing various heterostructural devices with desired functionalities. For example, we propose applications of the 2D materials as 2D ferroelectric field-effect transistors with ultrahigh on/off ratio, topological transistors with Dirac Fermions switchable between holes and electrons, ferroelectric junctions with ultrahigh electro-resistance, and multiferroic junctions for controlling spin by electric fields. All these heterostructural devices take advantage of the combination of high-mobility semiconductors with fast writing and nondestructive reading capability of nonvolatile memory, thereby holding great potential for the development of future multifunctional devices.

Ferroelectric switching of poly(vinylidene difluoride-trifluoroethylene) in metal-ferroelectric-semiconductor non-volatile memories with an amorphous oxide semiconductor

NASA Astrophysics Data System (ADS)

Gelinck, G. H.; van Breemen, A. J. J. M.; Cobb, B.

2015-03-01

Ferroelectric polarization switching of poly(vinylidene difluoride-trifluoroethylene) is investigated in different thin-film device structures, ranging from simple capacitors to dual-gate thin-film transistors (TFT). Indium gallium zinc oxide, a high mobility amorphous oxide material, is used as semiconductor. We find that the ferroelectric can be polarized in both directions in the metal-ferroelectric-semiconductor (MFS) structure and in the dual-gate TFT under certain biasing conditions, but not in the single-gate thin-film transistors. These results disprove the common belief that MFS structures serve as a good model system for ferroelectric polarization switching in thin-film transistors.

Nucleation and growth of dielectric films on III-V semiconductors during atomic layer deposition

NASA Astrophysics Data System (ADS)

Granados Alpizar, Bernal

In order to continue with metal-oxide-semiconductors (CMOS) transistor scaling and to reduce the power density, the channel should be replaced with a material having a higher electron mobility, such as a III-V semiconductor. However, the integration of III-V's is a challenge because these materials oxidize rapidly when exposed to air and the native oxide produced is characterized by a high density of defects. Deposition of high-k materials on III-V semiconductors using Atomic Layer Deposition (ALD) reduces the thickness of these oxides, improving the semiconductor/oxide interface quality and the transistor electrical characteristics. In this work, ALD is used to deposit two dielectrics, Al 2O3 and TiO2, on two III-V materials, GaAs and InGaAs, and in-situ X-ray photoelectron spectroscopy (XPS) and in-situ thermal programmed desorption (TPD) are used for interface characterization. Hydrofluoric acid (HF) etching of GaAs(100) and brief reoxidation in air produces a 9.0 ±1.6 Å-thick oxide overlayer containing 86% As oxides. The oxides are removed by 1 s pulses of trimethylaluminum (TMA) or TiCl4. TMA removes the oxide overlayer while depositing a 7.5 ± 1.6 Å thick aluminum oxide. The reaction follows a ligand exchange mechanism producing nonvolatile Al-O species that remain on the surface. TiCl4 exposure removes the oxide overlayer in the temperature range 89°C to 300°C, depositing approximately 0.04 monolayer of titanium oxide for deposition temperatures from 89°C to 135°C, but no titanium oxide is present from 170 °C to 230 °C. TiCl4 forms a volatile oxychloride product and removes O from the surface while leaving Cl atoms adsorbed to an elemental As layer, chemically passivating the surface. The native oxide of In0.53Ga0.47As(100) is removed using liquid HF and gas phase HF before deposition of Al2O3 using TMA and H2O at 170 °C. An aluminium oxide film with a thickness of 7.2 ± 1.2 Å and 7.3 ± 1.2 Å is deposited during the first pulse of TMA on liquid and gas phase HF treated samples, respectively. After three complete ALD cycles the thickness of the aluminum oxide film is 10.0 ± 1.2 Å on liquid HF treated and 6.6 ± 1.2 Å on gas phase HF treated surfaces. Samples treated with gas phase HF inhibit growth. Inhibition is caused by residual F atoms that passivate the surface and by surface poisoning due to the thicker carbon film deposited during the first pulse of TMA. On InGaAs covered by native oxide, the first TMA pulse deposits 9 Å of aluminum oxide, and reaches saturation at 13 Å after 15 pulses of TMA. The film grows by scavenging oxygen from the substrate oxides. Substrate oxides are reduced by the first pulse of TMA even at 0°C. At 0°C, on a 9 Å thick Ga-rich oxide surface, 1 pulse of TMA mainly physisorbs and a limited amount of aluminum oxide is deposited. At 0°C, 110°C, and 170°C, more aluminum oxide is deposited on surfaces initially containing As oxide, and larger binding energy (BE) shifts of the O 1s peak are observed compared to surfaces that contain Ga oxides only, showing that As oxides improve the nucleation of Al2O 3.

The effect of body bias of the metal-oxide-semiconductor field-effect transistor in the resistive network on spatial current distribution in a bio-inspired complementary metal-oxide-semiconductor vision chip

NASA Astrophysics Data System (ADS)

Kong, Jae-Sung; Hyun, Hyo-Young; Seo, Sang-Ho; Shin, Jang-Kyoo

2008-11-01

Complementary metal-oxide-semiconductor (CMOS) vision chips for edge detection based on a resistive circuit have recently been developed. These chips help in the creation of neuromorphic systems of a compact size, high speed of operation, and low power dissipation. The output of the vision chip depends predominantly upon the electrical characteristics of the resistive network which consists of a resistive circuit. In this paper, the body effect of the metal-oxide-semiconductor field-effect transistor for current distribution in a resistive circuit is discussed with a simple model. In order to evaluate the model, two 160 × 120 CMOS vision chips have been fabricated using a standard CMOS technology. The experimental results nicely match our prediction.

DOE Office of Scientific and Technical Information (OSTI.GOV)

De Geronimo, G.; Li, S.; D'Andragora, A.

We present a front-end application-specific integrated circuit (ASIC) for a wire based time-projection-chamber (TPC) operating in liquid Argon (LAr). The LAr TPC will be used for long baseline neutrino oscillation experiments. The ASIC must provide a low-noise readout of the signals induced on the TPC wires, digitization of those signals at 2 MSamples/s, compression, buffering and multiplexing. A resolution of better than 1000 rms electrons at 200 pF input capacitance for an input range of 300 fC is required, along with low power and operation in LAr (at 87 K). We include the characterization of a commercial technology for operationmore » in the cryogenic environment and the first experimental results on the analog front end. The results demonstrate that complementary metal-oxide semiconductor transistors have lower noise and much improved dc characteristics at LAr temperature. Finally, we introduce the concept of '1/f equivalent' to model the low-frequency component of the noise spectral density, for use in the input metal-oxide semiconductor field-effect transistor optimization.« less

CCD imaging sensors

NASA Technical Reports Server (NTRS)

Janesick, James R. (Inventor); Elliott, Stythe T. (Inventor)

1989-01-01

A method for promoting quantum efficiency (QE) of a CCD imaging sensor for UV, far UV and low energy x-ray wavelengths by overthinning the back side beyond the interface between the substrate and the photosensitive semiconductor material, and flooding the back side with UV prior to using the sensor for imaging. This UV flooding promotes an accumulation layer of positive states in the oxide film over the thinned sensor to greatly increase QE for either frontside or backside illumination. A permanent or semipermanent image (analog information) may be stored in a frontside SiO.sub.2 layer over the photosensitive semiconductor material using implanted ions for a permanent storage and intense photon radiation for a semipermanent storage. To read out this stored information, the gate potential of the CCD is biased more negative than that used for normal imaging, and excess charge current thus produced through the oxide is integrated in the pixel wells for subsequent readout by charge transfer from well to well in the usual manner.

Monolithic Integration of a Silicon Nanowire Field-Effect Transistors Array on a Complementary Metal-Oxide Semiconductor Chip for Biochemical Sensor Applications

PubMed Central

Livi, Paolo; Kwiat, Moria; Shadmani, Amir; Pevzner, Alexander; Navarra, Giulio; Rothe, Jörg; Stettler, Alexander; Chen, Yihui; Patolsky, Fernando; Hierlemann, Andreas

2017-01-01

We present a monolithic complementary metal-oxide semiconductor (CMOS)-based sensor system comprising an array of silicon nanowire field-effect transistors (FETs) and the signal-conditioning circuitry on the same chip. The silicon nanowires were fabricated by chemical vapor deposition methods and then transferred to the CMOS chip, where Ti/Pd/Ti contacts had been patterned via e-beam lithography. The on-chip circuitry measures the current flowing through each nanowire FET upon applying a constant source-drain voltage. The analog signal is digitized on chip and then transmitted to a receiving unit. The system has been successfully fabricated and tested by acquiring I−V curves of the bare nanowire-based FETs. Furthermore, the sensing capabilities of the complete system have been demonstrated by recording current changes upon nanowire exposure to solutions of different pHs, as well as by detecting different concentrations of Troponin T biomarkers (cTnT) through antibody-functionalized nanowire FETs. PMID:26348408

Effect of forming gas annealing on the degradation properties of Ge-based MOS stacks

NASA Astrophysics Data System (ADS)

Aguirre, F.; Pazos, S.; Palumbo, F. R. M.; Fadida, S.; Winter, R.; Eizenberg, M.

2018-04-01

The influence of forming gas annealing on the degradation at a constant stress voltage of multi-layered germanium-based Metal-Oxide-Semiconductor capacitors (p-Ge/GeOx/Al2O3/High-K/Metal Gate) has been analyzed in terms of the C-V hysteresis and flat band voltage as a function of both negative and positive stress fields. Significant differences were found for the case of negative voltage stress between the annealed and non-annealed samples, independently of the stressing time. It was found that the hole trapping effect decreases in the case of the forming gas annealed samples, indicating strong passivation of defects with energies close to the valence band existing in the oxide-semiconductor interface during the forming gas annealing. Finally, a comparison between the degradation dynamics of Germanium and III-V (n-InGaAs) MOS stacks is presented to summarize the main challenges in the integration of reliable Ge-III-V hybrid devices.

Monolithic integration of a silicon nanowire field-effect transistors array on a complementary metal-oxide semiconductor chip for biochemical sensor applications.

PubMed

Livi, Paolo; Kwiat, Moria; Shadmani, Amir; Pevzner, Alexander; Navarra, Giulio; Rothe, Jörg; Stettler, Alexander; Chen, Yihui; Patolsky, Fernando; Hierlemann, Andreas

2015-10-06

We present a monolithic complementary metal-oxide semiconductor (CMOS)-based sensor system comprising an array of silicon nanowire field-effect transistors (FETs) and the signal-conditioning circuitry on the same chip. The silicon nanowires were fabricated by chemical vapor deposition methods and then transferred to the CMOS chip, where Ti/Pd/Ti contacts had been patterned via e-beam lithography. The on-chip circuitry measures the current flowing through each nanowire FET upon applying a constant source-drain voltage. The analog signal is digitized on chip and then transmitted to a receiving unit. The system has been successfully fabricated and tested by acquiring I-V curves of the bare nanowire-based FETs. Furthermore, the sensing capabilities of the complete system have been demonstrated by recording current changes upon nanowire exposure to solutions of different pHs, as well as by detecting different concentrations of Troponin T biomarkers (cTnT) through antibody-functionalized nanowire FETs.

Note: A disposable x-ray camera based on mass produced complementary metal-oxide-semiconductor sensors and single-board computers

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hoidn, Oliver R.; Seidler, Gerald T., E-mail: seidler@uw.edu

We have integrated mass-produced commercial complementary metal-oxide-semiconductor (CMOS) image sensors and off-the-shelf single-board computers into an x-ray camera platform optimized for acquisition of x-ray spectra and radiographs at energies of 2–6 keV. The CMOS sensor and single-board computer are complemented by custom mounting and interface hardware that can be easily acquired from rapid prototyping services. For single-pixel detection events, i.e., events where the deposited energy from one photon is substantially localized in a single pixel, we establish ∼20% quantum efficiency at 2.6 keV with ∼190 eV resolution and a 100 kHz maximum detection rate. The detector platform’s useful intrinsic energymore » resolution, 5-μm pixel size, ease of use, and obvious potential for parallelization make it a promising candidate for many applications at synchrotron facilities, in laser-heating plasma physics studies, and in laboratory-based x-ray spectrometry.« less

Direct Growth of Graphene Film on Germanium Substrate

PubMed Central

Wang, Gang; Zhang, Miao; Zhu, Yun; Ding, Guqiao; Jiang, Da; Guo, Qinglei; Liu, Su; Xie, Xiaoming; Chu, Paul K.; Di, Zengfeng; Wang, Xi

2013-01-01

Graphene has been predicted to play a role in post-silicon electronics due to the extraordinary carrier mobility. Chemical vapor deposition of graphene on transition metals has been considered as a major step towards commercial realization of graphene. However, fabrication based on transition metals involves an inevitable transfer step which can be as complicated as the deposition of graphene itself. By ambient-pressure chemical vapor deposition, we demonstrate large-scale and uniform depositon of high-quality graphene directly on a Ge substrate which is wafer scale and has been considered to replace conventional Si for the next generation of high-performance metal-oxide-semiconductor field-effect transistors (MOSFETs). The immiscible Ge-C system under equilibrium conditions dictates graphene depositon on Ge via a self-limiting and surface-mediated process rather than a precipitation process as observed from other metals with high carbon solubility. Our technique is compatible with modern microelectronics technology thus allowing integration with high-volume production of complementary metal-oxide-semiconductors (CMOS). PMID:23955352

A MoTe2-based light-emitting diode and photodetector for silicon photonic integrated circuits.

PubMed

Bie, Ya-Qing; Grosso, Gabriele; Heuck, Mikkel; Furchi, Marco M; Cao, Yuan; Zheng, Jiabao; Bunandar, Darius; Navarro-Moratalla, Efren; Zhou, Lin; Efetov, Dmitri K; Taniguchi, Takashi; Watanabe, Kenji; Kong, Jing; Englund, Dirk; Jarillo-Herrero, Pablo

2017-12-01

One of the current challenges in photonics is developing high-speed, power-efficient, chip-integrated optical communications devices to address the interconnects bottleneck in high-speed computing systems. Silicon photonics has emerged as a leading architecture, in part because of the promise that many components, such as waveguides, couplers, interferometers and modulators, could be directly integrated on silicon-based processors. However, light sources and photodetectors present ongoing challenges. Common approaches for light sources include one or few off-chip or wafer-bonded lasers based on III-V materials, but recent system architecture studies show advantages for the use of many directly modulated light sources positioned at the transmitter location. The most advanced photodetectors in the silicon photonic process are based on germanium, but this requires additional germanium growth, which increases the system cost. The emerging two-dimensional transition-metal dichalcogenides (TMDs) offer a path for optical interconnect components that can be integrated with silicon photonics and complementary metal-oxide-semiconductors (CMOS) processing by back-end-of-the-line steps. Here, we demonstrate a silicon waveguide-integrated light source and photodetector based on a p-n junction of bilayer MoTe 2 , a TMD semiconductor with an infrared bandgap. This state-of-the-art fabrication technology provides new opportunities for integrated optoelectronic systems.

A MoTe2-based light-emitting diode and photodetector for silicon photonic integrated circuits

NASA Astrophysics Data System (ADS)

Bie, Ya-Qing; Grosso, Gabriele; Heuck, Mikkel; Furchi, Marco M.; Cao, Yuan; Zheng, Jiabao; Bunandar, Darius; Navarro-Moratalla, Efren; Zhou, Lin; Efetov, Dmitri K.; Taniguchi, Takashi; Watanabe, Kenji; Kong, Jing; Englund, Dirk; Jarillo-Herrero, Pablo

2017-12-01

One of the current challenges in photonics is developing high-speed, power-efficient, chip-integrated optical communications devices to address the interconnects bottleneck in high-speed computing systems. Silicon photonics has emerged as a leading architecture, in part because of the promise that many components, such as waveguides, couplers, interferometers and modulators, could be directly integrated on silicon-based processors. However, light sources and photodetectors present ongoing challenges. Common approaches for light sources include one or few off-chip or wafer-bonded lasers based on III-V materials, but recent system architecture studies show advantages for the use of many directly modulated light sources positioned at the transmitter location. The most advanced photodetectors in the silicon photonic process are based on germanium, but this requires additional germanium growth, which increases the system cost. The emerging two-dimensional transition-metal dichalcogenides (TMDs) offer a path for optical interconnect components that can be integrated with silicon photonics and complementary metal-oxide-semiconductors (CMOS) processing by back-end-of-the-line steps. Here, we demonstrate a silicon waveguide-integrated light source and photodetector based on a p-n junction of bilayer MoTe2, a TMD semiconductor with an infrared bandgap. This state-of-the-art fabrication technology provides new opportunities for integrated optoelectronic systems.

Bi-component semiconductor oxide photoanodes for the photoelectrocatalytic oxidation of organic solutes and vapours: a short review with emphasis to TiO2-WO3 photoanodes.

PubMed

Georgieva, J; Valova, E; Armyanov, S; Philippidis, N; Poulios, I; Sotiropoulos, S

2012-04-15

The use of binary semiconductor oxide anodes for the photoelectrocatalytic oxidation of organic species (both in solution and gas phase) is reviewed. In the first part of the review, the principle of electrically assisted photocatalysis is presented, the preparation methods for the most common semiconductor oxide catalysts are briefly mentioned, while the advantages of appropriately chosen semiconductor combinations for efficient UV and visible (vis) light utilization are highlighted. The second part of the review focuses on the discussion of TiO(2)-WO(3) photoanodes (among the most studied bi-component semiconductor oxide systems) and in particular on coatings prepared by electrodeposition/electrosynthesis or powder mixtures (the focus of the authors' research during recent years). Studies concerning the microscopic, spectroscopic and photoelectrochemical characterization of the catalysts are presented and examples of photoanode activity towards typical dissolved organic contaminants as well as organic vapours are given. Particular emphasis is paid to: (a) The dependence of photoactivity on catalyst morphology and composition and (b) the possibility of carrying out photoelectrochemistry in all-solid cells, thus opening up the opportunity for photoelectrocatalytic air treatment. Copyright © 2011 Elsevier B.V. All rights reserved.

Investigation of 'surface donors' in Al2O3/AlGaN/GaN metal-oxide-semiconductor heterostructures: Correlation of electrical, structural, and chemical properties

NASA Astrophysics Data System (ADS)

Ťapajna, M.; Stoklas, R.; Gregušová, D.; Gucmann, F.; Hušeková, K.; Haščík, Š.; Fröhlich, K.; Tóth, L.; Pécz, B.; Brunner, F.; Kuzmík, J.

2017-12-01

III-N surface polarization compensating charge referred here to as 'surface donors' (SD) was analyzed in Al2O3/AlGaN/GaN metal-oxide-semiconductor (MOS) heterojunctions using scaled oxide films grown by metal-organic chemical vapor deposition at 600 °C. We systematically investigated impact of HCl pre-treatment prior to oxide deposition and post-deposition annealing (PDA) at 700 °C. SD density was reduced down to 1.9 × 1013 cm-2 by skipping HCl pre-treatment step as compared to 3.3 × 1013 cm-2 for structures with HCl pre-treatment followed by PDA. The nature and origin of SD was then analyzed based on the correlation between electrical, micro-structural, and chemical properties of the Al2O3/GaN interfaces with different SD density (NSD). From the comparison between distributions of interface traps of MOS heterojunction with different NSD, it is demonstrated that SD cannot be attributed to interface trapped charge. Instead, variation in the integrity of the GaOx interlayer confirmed by X-ray photoelectron spectroscopy is well correlated with NSD, indicating SD may be formed by border traps at the Al2O3/GaOx interface.

Colossal change in thermopower with temperature-driven p-n-type conduction switching in La x Sr2-x TiFeO6 double perovskites

NASA Astrophysics Data System (ADS)

Roy, Pinku; Maiti, Tanmoy

2018-02-01

Double perovskite materials have been studied in detail by many researchers, as their magnetic and electronic properties can be controlled by the substitution of alkaline earth metals or lanthanides in the A site and transition metals in the B site. Here we report the temperature-driven, p-n-type conduction switching assisted, large change in thermopower in La3+-doped Sr2TiFeO6-based double perovskites. Stoichiometric compositions of La x Sr2-x TiFeO6 (LSTF) with 0  ⩽  x  ⩽  0.25 were synthesized by the solid-state reaction method. Rietveld refinement of room-temperature XRD data confirmed a single-phase solid solution with cubic crystal structure and Pm\\bar{3}m space group. From temperature-dependent electrical conductivity and Seebeck coefficient (S) studies it is evident that all the compositions underwent an intermediate semiconductor-to-metal transition before the semiconductor phase reappeared at higher temperature. In the process of semiconductor-metal-semiconductor transition, LSTF compositions demonstrated temperature-driven p-n-type conduction switching behavior. The electronic restructuring which occurs due to the intermediate metallic phase between semiconductor phases leads to the colossal change in S for LSTF oxides. The maximum drop in thermopower (ΔS ~ 2516 µV K-1) was observed for LSTF with x  =  0.1 composition. Owing to their enormous change in thermopower of the order of millivolts per kelvin, integrated with p-n-type resistance switching, these double perovskites can be used for various high-temperature multifunctional device applications such as diodes, sensors, switches, thermistors, thyristors, thermal runaway monitors etc. Furthermore, the conduction mechanisms of these oxides were explained by the small polaron hopping model.

Ultrasonic fingerprint sensor using a piezoelectric micromachined ultrasonic transducer array integrated with complementary metal oxide semiconductor electronics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lu, Y.; Fung, S.; Wang, Q.

2015-06-29

This paper presents an ultrasonic fingerprint sensor based on a 24 × 8 array of 22 MHz piezoelectric micromachined ultrasonic transducers (PMUTs) with 100 μm pitch, fully integrated with 180 nm complementary metal oxide semiconductor (CMOS) circuitry through eutectic wafer bonding. Each PMUT is directly bonded to a dedicated CMOS receive amplifier, minimizing electrical parasitics and eliminating the need for through-silicon vias. The array frequency response and vibration mode-shape were characterized using laser Doppler vibrometry and verified via finite element method simulation. The array's acoustic output was measured using a hydrophone to be ∼14 kPa with a 28 V input, in reasonable agreement with predication from analyticalmore » calculation. Pulse-echo imaging of a 1D steel grating is demonstrated using electronic scanning of a 20 × 8 sub-array, resulting in 300 mV maximum received amplitude and 5:1 contrast ratio. Because the small size of this array limits the maximum image size, mechanical scanning was used to image a 2D polydimethylsiloxane fingerprint phantom (10 mm × 8 mm) at a 1.2 mm distance from the array.« less

Three-Dimensional Flexible Complementary Metal-Oxide-Semiconductor Logic Circuits Based On Two-Layer Stacks of Single-Walled Carbon Nanotube Networks.

PubMed

Zhao, Yudan; Li, Qunqing; Xiao, Xiaoyang; Li, Guanhong; Jin, Yuanhao; Jiang, Kaili; Wang, Jiaping; Fan, Shoushan

2016-02-23

We have proposed and fabricated stable and repeatable, flexible, single-walled carbon nanotube (SWCNT) thin film transistor (TFT) complementary metal-oxide-semiconductor (CMOS) integrated circuits based on a three-dimensional (3D) structure. Two layers of SWCNT-TFT devices were stacked, where one layer served as n-type devices and the other one served as p-type devices. On the basis of this method, it is able to save at least half of the area required to construct an inverter and make large-scale and high-density integrated CMOS circuits easier to design and manufacture. The 3D flexible CMOS inverter gain can be as high as 40, and the total noise margin is more than 95%. Moreover, the input and output voltage of the inverter are exactly matched for cascading. 3D flexible CMOS NOR, NAND logic gates, and 15-stage ring oscillators were fabricated on PI substrates with high performance as well. Stable electrical properties of these circuits can be obtained with bending radii as small as 3.16 mm, which shows that such a 3D structure is a reliable architecture and suitable for carbon nanotube electrical applications in complex flexible and wearable electronic devices.

Level Alignment as Descriptor for Semiconductor/Catalyst Systems in Water Splitting: The Case of Hematite/Cobalt Hexacyanoferrate Photoanodes.

PubMed

Hegner, Franziska Simone; Cardenas-Morcoso, Drialys; Giménez, Sixto; López, Núria; Galan-Mascaros, Jose Ramon

2017-11-23

The realization of artificial photosynthesis may depend on the efficient integration of photoactive semiconductors and catalysts to promote photoelectrochemical water splitting. Many efforts are currently devoted to the processing of multicomponent anodes and cathodes in the search for appropriate synergy between light absorbers and active catalysts. No single material appears to combine both features. Many experimental parameters are key to achieve the needed synergy between both systems, without clear protocols for success. Herein, we show how computational chemistry can shed some light on this cumbersome problem. DFT calculations are useful to predict adequate energy-level alignment for thermodynamically favored hole transfer. As proof of concept, we experimentally confirmed the limited performance enhancement in hematite photoanodes decorated with cobalt hexacyanoferrate as a competent water-oxidation catalyst. Computational methods describe the misalignment of their energy levels, which is the origin of this mismatch. Photoelectrochemical studies indicate that the catalyst exclusively shifts the hematite surface state to lower potentials, which therefore reduces the onset for water oxidation. Although kinetics will still depend on interface architecture, our simple theoretical approach may identify and predict plausible semiconductor/catalyst combinations, which will speed up experimental work towards promising photoelectrocatalytic systems. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

An ultra-low-voltage electronic implementation of inertial neuron model with nonmonotonous Liao's activation function.

PubMed

Kant, Nasir Ali; Dar, Mohamad Rafiq; Khanday, Farooq Ahmad

2015-01-01

The output of every neuron in neural network is specified by the employed activation function (AF) and therefore forms the heart of neural networks. As far as the design of artificial neural networks (ANNs) is concerned, hardware approach is preferred over software one because it promises the full utilization of the application potential of ANNs. Therefore, besides some arithmetic blocks, designing AF in hardware is the most important for designing ANN. While attempting to design the AF in hardware, the designs should be compatible with the modern Very Large Scale Integration (VLSI) design techniques. In this regard, the implemented designs should: only be in Metal Oxide Semiconductor (MOS) technology in order to be compatible with the digital designs, provide electronic tunability feature, and be able to operate at ultra-low voltage. Companding is one of the promising circuit design techniques for achieving these goals. In this paper, 0.5 V design of Liao's AF using sinh-domain technique is introduced. Furthermore, the function is tested by implementing inertial neuron model. The performance of the AF and inertial neuron model have been evaluated through simulation results, using the PSPICE software with the MOS transistor models provided by the 0.18-μm Taiwan Semiconductor Manufacturer Complementary Metal Oxide Semiconductor (TSM CMOS) process.

Electrically-driven GHz range ultrafast graphene light emitter (Conference Presentation)

NASA Astrophysics Data System (ADS)

Kim, Youngduck; Gao, Yuanda; Shiue, Ren-Jye; Wang, Lei; Aslan, Ozgur Burak; Kim, Hyungsik; Nemilentsau, Andrei M.; Low, Tony; Taniguchi, Takashi; Watanabe, Kenji; Bae, Myung-Ho; Heinz, Tony F.; Englund, Dirk R.; Hone, James

2017-02-01

Ultrafast electrically driven light emitter is a critical component in the development of the high bandwidth free-space and on-chip optical communications. Traditional semiconductor based light sources for integration to photonic platform have therefore been heavily studied over the past decades. However, there are still challenges such as absence of monolithic on-chip light sources with high bandwidth density, large-scale integration, low-cost, small foot print, and complementary metal-oxide-semiconductor (CMOS) technology compatibility. Here, we demonstrate the first electrically driven ultrafast graphene light emitter that operate up to 10 GHz bandwidth and broadband range (400 1600 nm), which are possible due to the strong coupling of charge carriers in graphene and surface optical phonons in hBN allow the ultrafast energy and heat transfer. In addition, incorporation of atomically thin hexagonal boron nitride (hBN) encapsulation layers enable the stable and practical high performance even under the ambient condition. Therefore, electrically driven ultrafast graphene light emitters paves the way towards the realization of ultrahigh bandwidth density photonic integrated circuits and efficient optical communications networks.

Review on analog/radio frequency performance of advanced silicon MOSFETs

NASA Astrophysics Data System (ADS)

Passi, Vikram; Raskin, Jean-Pierre

2017-12-01

Aggressive gate-length downscaling of the metal-oxide-semiconductor field-effect transistor (MOSFET) has been the main stimulus for the growth of the integrated circuit industry. This downscaling, which has proved beneficial to digital circuits, is primarily the result of the need for improved circuit performance and cost reduction and has resulted in tremendous reduction of the carrier transit time across the channel, thereby resulting in very high cut-off frequencies. It is only in recent decades that complementary metal-oxide-semiconductor (CMOS) field-effect transistor (FET) has been considered as the radio frequency (RF) technology of choice. In this review, the status of the digital, analog and RF figures of merit (FoM) of silicon-based FETs is presented. State-of-the-art devices with very good performance showing low values of drain-induced barrier lowering, sub-threshold swing, high values of gate transconductance, Early voltage, cut-off frequencies, and low minimum noise figure, and good low-frequency noise characteristic values are reported. The dependence of these FoM on the device gate length is also shown, helping the readers to understand the trends and challenges faced by shorter CMOS nodes. Device performance boosters including silicon-on-insulator substrates, multiple-gate architectures, strain engineering, ultra-thin body and buried-oxide and also III-V and 2D materials are discussed, highlighting the transistor characteristics that are influenced by these boosters. A brief comparison of the two main contenders in continuing Moore’s law, ultra-thin body buried-oxide and fin field-effect transistors are also presented. The authors would like to mention that despite extensive research carried out in the semiconductor industry, silicon-based MOSFET will continue to be the driving force in the foreseeable future.

A hard oxide semiconductor with a direct and narrow bandgap and switchable p-n electrical conduction.

PubMed

Ovsyannikov, Sergey V; Karkin, Alexander E; Morozova, Natalia V; Shchennikov, Vladimir V; Bykova, Elena; Abakumov, Artem M; Tsirlin, Alexander A; Glazyrin, Konstantin V; Dubrovinsky, Leonid

2014-12-23

An oxide semiconductor (perovskite-type Mn2 O3 ) is reported which has a narrow and direct bandgap of 0.45 eV and a high Vickers hardness of 15 GPa. All the known materials with similar electronic band structures (e.g., InSb, PbTe, PbSe, PbS, and InAs) play crucial roles in the semiconductor industry. The perovskite-type Mn2 O3 described is much stronger than the above semiconductors and may find useful applications in different semiconductor devices, e.g., in IR detectors. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Large Lateral Photovoltaic Effect in Metal-(Oxide-) Semiconductor Structures

PubMed Central

Yu, Chongqi; Wang, Hui

2010-01-01

The lateral photovoltaic effect (LPE) can be used in position-sensitive detectors to detect very small displacements due to its output of lateral photovoltage changing linearly with light spot position. In this review, we will summarize some of our recent works regarding LPE in metal-semiconductor and metal-oxide-semiconductor structures, and give a theoretical model of LPE in these two structures. PMID:22163463

Electronic structure and relative stability of the coherent and semi-coherent HfO2/III-V interfaces

NASA Astrophysics Data System (ADS)

Lahti, A.; Levämäki, H.; Mäkelä, J.; Tuominen, M.; Yasir, M.; Dahl, J.; Kuzmin, M.; Laukkanen, P.; Kokko, K.; Punkkinen, M. P. J.

2018-01-01

III-V semiconductors are prominent alternatives to silicon in metal oxide semiconductor devices. Hafnium dioxide (HfO2) is a promising oxide with a high dielectric constant to replace silicon dioxide (SiO2). The potentiality of the oxide/III-V semiconductor interfaces is diminished due to high density of defects leading to the Fermi level pinning. The character of the harmful defects has been intensively debated. It is very important to understand thermodynamics and atomic structures of the interfaces to interpret experiments and design methods to reduce the defect density. Various realistic gap defect state free models for the HfO2/III-V(100) interfaces are presented. Relative energies of several coherent and semi-coherent oxide/III-V semiconductor interfaces are determined for the first time. The coherent and semi-coherent interfaces represent the main interface types, based on the Ga-O bridges and As (P) dimers, respectively.

Theoretical analysis of the effects of light intensity on the photocorrosion of semiconductor electrodes

DOE Office of Scientific and Technical Information (OSTI.GOV)

Benito, R.M.; Nozik, A.J.

1985-07-18

A kinetic model was developed to describe the effects of light intensity on the photocorrosion of n-type semiconductor electrodes. The model is an extension of previous work by Gomes and co-workers that includes the possibility of multiple steps for the oxidation reaction of the reducing agent in the electrolyte. Six cases are considered where the semiconductor decomposition reaction is multistep (each step involves a hole); the oxidation reaction of the reducing agent is multistep (each step after the first involves a hole or a chemical intermediate), and the first steps of the competing oxidation reactions are reversible or irreversible. Itmore » was found, contrary to previous results, that the photostability of semiconductor electrodes could increase with increased light intensity if the desired oxidation reaction of the reducing agent in the electrolyte was multistep with the first step being reversible. 14 references, 5 figures, 1 table.« less

Die singulation method

DOEpatents

Swiler, Thomas P.; Garcia, Ernest J.; Francis, Kathryn M.

2013-06-11

A method is disclosed for singulating die from a semiconductor substrate (e.g. a semiconductor-on-insulator substrate or a bulk silicon substrate) containing an oxide layer (e.g. silicon dioxide or a silicate glass) and one or more semiconductor layers (e.g. monocrystalline or polycrystalline silicon) located above the oxide layer. The method etches trenches through the substrate and through each semiconductor layer about the die being singulated, with the trenches being offset from each other around at least a part of the die so that the oxide layer between the trenches holds the substrate and die together. The trenches can be anisotropically etched using a Deep Reactive Ion Etching (DRIE) process. After the trenches are etched, the oxide layer between the trenches can be etched away with an HF etchant to singulate the die. A release fixture can be located near one side of the substrate to receive the singulated die.

Die singulation method

DOEpatents

Swiler, Thomas P [Albuquerque, NM; Garcia, Ernest J [Albuquerque, NM; Francis, Kathryn M [Rio Rancho, NM

2014-01-07

A method is disclosed for singulating die from a semiconductor substrate (e.g. a semiconductor-on-insulator substrate or a bulk silicon substrate) containing an oxide layer (e.g. silicon dioxide or a silicate glass) and one or more semiconductor layers (e.g. monocrystalline or polycrystalline silicon) located above the oxide layer. The method etches trenches through the substrate and through each semiconductor layer about the die being singulated, with the trenches being offset from each other around at least a part of the die so that the oxide layer between the trenches holds the substrate and die together. The trenches can be anisotropically etched using a Deep Reactive Ion Etching (DRIE) process. After the trenches are etched, the oxide layer between the trenches can be etched away with a HF etchant to singulate the die. A release fixture can be located near one side of the substrate to receive the singulated die.

Ferrite film growth on semiconductor substrates towards microwave and millimeter wave integrated circuits

NASA Astrophysics Data System (ADS)

Chen, Z.; Harris, V. G.

2012-10-01

It is widely recognized that as electronic systems' operating frequency shifts to microwave and millimeter wave bands, the integration of ferrite passive devices with semiconductor solid state active devices holds significant advantages in improved miniaturization, bandwidth, speed, power and production costs, among others. Traditionally, ferrites have been employed in discrete bulk form, despite attempts to integrate ferrite as films within microwave integrated circuits. Technical barriers remain centric to the incompatibility between ferrite and semiconductor materials and their processing protocols. In this review, we present past and present efforts at ferrite integration with semiconductor platforms with the aim to identify the most promising paths to realizing the complete integration of on-chip ferrite and semiconductor devices, assemblies and systems.

Electra-optical device including a nitrogen containing electrolyte

DOEpatents

Bates, John B.; Dudney, Nancy J.; Gruzalski, Greg R.; Luck, Christopher F.

1995-01-01

Described is a thin-film battery, especially a thin-film microbattery, and a method for making same having application as a backup or primary integrated power source for electronic devices. The battery includes a novel electrolyte which is electrochemically stable and does not react with the lithium anode and a novel vanadium oxide cathode Configured as a microbattery, the battery can be fabricated directly onto a semiconductor chip, onto the semiconductor die or onto any portion of the chip carrier. The battery can be fabricated to any specified size or shape to meet the requirements of a particular application. The battery is fabricated of solid state materials and is capable of operation between -15.degree. C. and 150.degree. C.

Electrolyte for an electrochemical cell

DOEpatents

Bates, John B.; Dudney, Nancy J.

1997-01-01

Described is a thin-film battery, especially a thin-film microbattery, and a method for making same having application as a backup or primary integrated power source for electronic devices. The battery includes a novel electrolyte amorphous lithium phosphorus oxynitride which is electrochemically stable and does not react with the lithium anode and a novel vanadium oxide cathode Configured as a microbattery, the battery can be fabricated directly onto a semiconductor chip, onto the semiconductor die or onto any portion of the chip carrier. The battery can be fabricated to any specified size or shape to meet the requirements of a particular application. The battery is fabricated of solid state materials and is capable of operation between -15.degree. C. and 150.degree. C.

Electrolyte for an electrochemical cell

DOEpatents

Bates, J.B.; Dudney, N.J.

1997-01-28

Described is a thin-film battery, especially a thin-film microbattery, and a method for making the same having application as a backup or primary integrated power source for electronic devices. The battery includes a novel electrolyte amorphous lithium phosphorus oxynitride which is electrochemically stable and does not react with the lithium anode and a novel vanadium oxide cathode Configured as a microbattery, the battery can be fabricated directly onto a semiconductor chip, onto the semiconductor die or onto any portion of the chip carrier. The battery can be fabricated to any specified size or shape to meet the requirements of a particular application. The battery is fabricated of solid state materials and is capable of operation between {minus}15 C and 150 C. 9 figs.

Method of making an electrolyte for an electrochemical cell

DOEpatents

Bates, J.B.; Dudney, N.J.

1996-04-30

Described is a thin-film battery, especially a thin-film microbattery, and a method for making same having application as a backup or primary integrated power source for electronic devices. The battery includes a novel electrolyte which is electrochemically stable and does not react with the lithium anode and a novel vanadium oxide cathode. Configured as a microbattery, the battery can be fabricated directly onto a semiconductor chip, onto the semiconductor die or onto any portion of the chip carrier. The battery can be fabricated to any specified size or shape to meet the requirements of a particular application. The battery is fabricated of solid state materials and is capable of operation between {minus}15 C and 150 C. 9 figs.

Method of making an electrolyte for an electrochemical cell

DOEpatents

Bates, John B.; Dudney, Nancy J.

1996-01-01

Described is a thin-film battery, especially a thin-film microbattery, and a method for making same having application as a backup or primary integrated power source for electronic devices. The battery includes a novel electrolyte which is electrochemically stable and does not react with the lithium anode and a novel vanadium oxide cathode Configured as a microbattery, the battery can be fabricated directly onto a semiconductor chip, onto the semiconductor die or onto any portion of the chip carrier. The battery can be fabricated to any specified size or shape to meet the requirements of a particular application. The battery is fabricated of solid state materials and is capable of operation between -15.degree. C. and 150.degree. C.

Method for making an electrochemical cell

DOEpatents

Bates, J.B.; Dudney, N.J.

1996-10-22

Described is a thin-film battery, especially a thin-film microbattery, and a method for making the same, having application as a backup or primary integrated power source for electronic devices. The battery includes a novel electrolyte which is electrochemically stable and does not react with the lithium anode and a novel vanadium oxide cathode. Configured as a microbattery, the battery can be fabricated directly onto a semiconductor chip, onto the semiconductor die or onto any portion of the chip carrier. The battery can be fabricated to any specified size or shape to meet the requirements of a particular application. The battery is fabricated of solid state materials and is capable of operation between {minus}15 C and 150 C. 9 figs.

Thin film battery and method for making same

DOEpatents

Bates, J.B.; Dudney, N.J.; Gruzalski, G.R.; Luck, C.F.

1994-08-16

Described is a thin-film battery, especially a thin-film microbattery, and a method for making same having application as a backup or primary integrated power source for electronic devices. The battery includes a novel electrolyte which is electrochemically stable and does not react with the lithium anode and a novel vanadium oxide cathode. Configured as a microbattery, the battery can be fabricated directly onto a semiconductor chip, onto the semiconductor die or onto any portion of the chip carrier. The battery can be fabricated to any specified size or shape to meet the requirements of a particular application. The battery is fabricated of solid state materials and is capable of operation between [minus]15 C and 150 C. 9 figs.

Thin film battery and method for making same

DOEpatents

Bates, John B.; Dudney, Nancy J.; Gruzalski, Greg R.; Luck, Christopher F.

1994-01-01

Described is a thin-film battery, especially a thin-film microbattery, and a method for making same having application as a backup or primary integrated power source for electronic devices. The battery includes a novel electrolyte which is electrochemically stable and does not react with the lithium anode and a novel vanadium oxide cathode Configured as a microbattery, the battery can be fabricated directly onto a semiconductor chip, onto the semiconductor die or onto any portion of the chip carrier. The battery can be fabricated to any specified size or shape to meet the requirements of a particular application. The battery is fabricated of solid state materials and is capable of operation between -15.degree. C. and 150.degree. C.

Plasmonic integrated circuits comprising metal waveguides, multiplexer/demultiplexer, detectors, and logic circuits on a silicon substrate

NASA Astrophysics Data System (ADS)

Fukuda, M.; Ota, M.; Sumimura, A.; Okahisa, S.; Ito, M.; Ishii, Y.; Ishiyama, T.

2017-05-01

A plasmonic integrated circuit configuration comprising plasmonic and electronic components is presented and the feasibility for high-speed signal processing applications is discussed. In integrated circuits, plasmonic signals transmit data at high transfer rates with light velocity. Plasmonic and electronic components such as wavelength-divisionmultiplexing (WDM) networks comprising metal wires, plasmonic multiplexers/demultiplexers, and crossing metal wires are connected via plasmonic waveguides on the nanometer or micrometer scales. To merge plasmonic and electronic components, several types of plasmonic components were developed. To ensure that the plasmonic components could be easily fabricated and monolithically integrated onto a silicon substrate using silicon complementary metal-oxide-semiconductor (CMOS)-compatible processes, the components were fabricated on a Si substrate and made from silicon, silicon oxides, and metal; no other materials were used in the fabrication. The plasmonic components operated in the 1300- and 1550-nm-wavelength bands, which are typically employed in optical fiber communication systems. The plasmonic logic circuits were formed by patterning a silicon oxide film on a metal film, and the operation as a half adder was confirmed. The computed plasmonic signals can propagate through the plasmonic WDM networks and be connected to electronic integrated circuits at high data-transfer rates.

Development of analog watch with minute repeater

NASA Astrophysics Data System (ADS)

Okigami, Tomio; Aoyama, Shigeru; Osa, Takashi; Igarashi, Kiyotaka; Ikegami, Tomomi

A complementary metal oxide semiconductor with large scale integration was developed for an electronic minute repeater. It is equipped with the synthetic struck sound circuit to generate natural struck sound necessary for the minute repeater. This circuit consists of an envelope curve drawing circuit, frequency mixer, polyphonic mixer, and booster circuit made by using analog circuit technology. This large scale integration is a single chip microcomputer with motor drivers and input ports in addition to the synthetic struck sound circuit, and it is possible to make an electronic system of minute repeater at a very low cost in comparison with the conventional type.

CMOS Time-Resolved, Contact, and Multispectral Fluorescence Imaging for DNA Molecular Diagnostics

PubMed Central

Guo, Nan; Cheung, Ka Wai; Wong, Hiu Tung; Ho, Derek

2014-01-01

Instrumental limitations such as bulkiness and high cost prevent the fluorescence technique from becoming ubiquitous for point-of-care deoxyribonucleic acid (DNA) detection and other in-field molecular diagnostics applications. The complimentary metal-oxide-semiconductor (CMOS) technology, as benefited from process scaling, provides several advanced capabilities such as high integration density, high-resolution signal processing, and low power consumption, enabling sensitive, integrated, and low-cost fluorescence analytical platforms. In this paper, CMOS time-resolved, contact, and multispectral imaging are reviewed. Recently reported CMOS fluorescence analysis microsystem prototypes are surveyed to highlight the present state of the art. PMID:25365460

Walk-through survey report: Control technology for integrated circuit fabrication, Xerox Corporation, El Segundo, California

NASA Astrophysics Data System (ADS)

Mihlan, G. J.; Ungers, L. J.; Smith, R. K.; Mitchell, R. I.; Jones, J. H.

1983-05-01

A preliminary control technology assessment survey was conducted at the facility which manufactures N-channel metal oxide semiconductor (NMOS) integrated circuits. The facility has industrial hygiene review procedures for evaluating all new and existing process equipment. Employees are trained in safety, use of personal protective equipment, and emergency response. Workers potentially exposed to arsenic are monitored for urinary arsenic levels. The facility should be considered a candidate for detailed study based on the diversity of process operations encountered and the use of state-of-the-art technology and process equipment.

High-performance, mechanically flexible, and vertically integrated 3D carbon nanotube and InGaZnO complementary circuits with a temperature sensor.

PubMed

Honda, Wataru; Harada, Shingo; Ishida, Shohei; Arie, Takayuki; Akita, Seiji; Takei, Kuniharu

2015-08-26

A vertically integrated inorganic-based flexible complementary metal-oxide-semiconductor (CMOS) inverter with a temperature sensor with a high inverter gain of ≈50 and a low power consumption of <7 nW mm(-1) is demonstrated using a layer-by-layer assembly process. In addition, the negligible influence of the mechanical flexibility on the performance of the CMOS inverter and the temperature dependence of the CMOS inverter characteristics are discussed. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

A fully-integrated 12.5-Gb/s 850-nm CMOS optical receiver based on a spatially-modulated avalanche photodetector.

PubMed

Lee, Myung-Jae; Youn, Jin-Sung; Park, Kang-Yeob; Choi, Woo-Young

2014-02-10

We present a fully integrated 12.5-Gb/s optical receiver fabricated with standard 0.13-µm complementary metal-oxide-semiconductor (CMOS) technology for 850-nm optical interconnect applications. Our integrated optical receiver includes a newly proposed CMOS-compatible spatially-modulated avalanche photodetector, which provides larger photodetection bandwidth than previously reported CMOS-compatible photodetectors. The receiver also has high-speed CMOS circuits including transimpedance amplifier, DC-balanced buffer, equalizer, and limiting amplifier. With the fabricated optical receiver, detection of 12.5-Gb/s optical data is successfully achieved at 5.8 pJ/bit. Our receiver achieves the highest data rate ever reported for 850-nm integrated CMOS optical receivers.

A scalable neural chip with synaptic electronics using CMOS integrated memristors.

PubMed

Cruz-Albrecht, Jose M; Derosier, Timothy; Srinivasa, Narayan

2013-09-27

The design and simulation of a scalable neural chip with synaptic electronics using nanoscale memristors fully integrated with complementary metal-oxide-semiconductor (CMOS) is presented. The circuit consists of integrate-and-fire neurons and synapses with spike-timing dependent plasticity (STDP). The synaptic conductance values can be stored in memristors with eight levels, and the topology of connections between neurons is reconfigurable. The circuit has been designed using a 90 nm CMOS process with via connections to on-chip post-processed memristor arrays. The design has about 16 million CMOS transistors and 73 728 integrated memristors. We provide circuit level simulations of the entire chip performing neuronal and synaptic computations that result in biologically realistic functional behavior.

Charge pump-based MOSFET-only 1.5-bit pipelined ADC stage in digital CMOS technology

NASA Astrophysics Data System (ADS)

Singh, Anil; Agarwal, Alpana

2016-10-01

A simple low-power and low-area metal-oxide-semiconductor field-effect transistor-only fully differential 1.5-bit pipelined analog-to-digital converter stage is proposed and designed in Taiwan Semiconductor Manufacturing Company 0.18 μm-technology using BSIM3v3 parameters with supply voltage of 1.8 V in inexpensive digital complementary metal-oxide semiconductor (CMOS) technology. It is based on charge pump technique to achieve the desired voltage gain of 2, independent of capacitor mismatch and avoiding the need of power hungry operational amplifier-based architecture to reduce the power, Si area and cost. Various capacitances are implemented by metal-oxide semiconductor capacitors, offering compatibility with cheaper digital CMOS process in order to reduce the much required manufacturing cost.

Cobalt Oxide Nanosheet and CNT Micro Carbon Monoxide Sensor Integrated with Readout Circuit on Chip

PubMed Central

Dai, Ching-Liang; Chen, Yen-Chi; Wu, Chyan-Chyi; Kuo, Chin-Fu

2010-01-01

The study presents a micro carbon monoxide (CO) sensor integrated with a readout circuit-on-a-chip manufactured by the commercial 0.35 μm complementary metal oxide semiconductor (CMOS) process and a post-process. The sensing film of the sensor is a composite cobalt oxide nanosheet and carbon nanotube (CoOOH/CNT) film that is prepared by a precipitation-oxidation method. The structure of the CO sensor is composed of a polysilicon resistor and a sensing film. The sensor, which is of a resistive type, changes its resistance when the sensing film adsorbs or desorbs CO gas. The readout circuit is used to convert the sensor resistance into the voltage output. The post-processing of the sensor includes etching the sacrificial layers and coating the sensing film. The advantages of the sensor include room temperature operation, short response/recovery times and easy post-processing. Experimental results show that the sensitivity of the CO sensor is about 0.19 mV/ppm, and the response and recovery times are 23 s and 34 s for 200 ppm CO, respectively. PMID:22294897

Cobalt oxide nanosheet and CNT micro carbon monoxide sensor integrated with readout circuit on chip.

PubMed

Dai, Ching-Liang; Chen, Yen-Chi; Wu, Chyan-Chyi; Kuo, Chin-Fu

2010-01-01

The study presents a micro carbon monoxide (CO) sensor integrated with a readout circuit-on-a-chip manufactured by the commercial 0.35 μm complementary metal oxide semiconductor (CMOS) process and a post-process. The sensing film of the sensor is a composite cobalt oxide nanosheet and carbon nanotube (CoOOH/CNT) film that is prepared by a precipitation-oxidation method. The structure of the CO sensor is composed of a polysilicon resistor and a sensing film. The sensor, which is of a resistive type, changes its resistance when the sensing film adsorbs or desorbs CO gas. The readout circuit is used to convert the sensor resistance into the voltage output. The post-processing of the sensor includes etching the sacrificial layers and coating the sensing film. The advantages of the sensor include room temperature operation, short response/recovery times and easy post-processing. Experimental results show that the sensitivity of the CO sensor is about 0.19 mV/ppm, and the response and recovery times are 23 s and 34 s for 200 ppm CO, respectively.

Self-activated ultrahigh chemosensitivity of oxide thin film nanostructures for transparent sensors

PubMed Central

Moon, Hi Gyu; Shim, Young-Soek; Kim, Do Hong; Jeong, Hu Young; Jeong, Myoungho; Jung, Joo Young; Han, Seung Min; Kim, Jong Kyu; Kim, Jin-Sang; Park, Hyung-Ho; Lee, Jong-Heun; Tuller, Harry L.; Yoon, Seok-Jin; Jang, Ho Won

2012-01-01

One of the top design priorities for semiconductor chemical sensors is developing simple, low-cost, sensitive and reliable sensors to be built in handheld devices. However, the need to implement heating elements in sensor devices, and the resulting high power consumption, remains a major obstacle for the realization of miniaturized and integrated chemoresistive thin film sensors based on metal oxides. Here we demonstrate structurally simple but extremely efficient all oxide chemoresistive sensors with ~90% transmittance at visible wavelengths. Highly effective self-activation in anisotropically self-assembled nanocolumnar tungsten oxide thin films on glass substrate with indium-tin oxide electrodes enables ultrahigh response to nitrogen dioxide and volatile organic compounds with detection limits down to parts per trillion levels and power consumption less than 0.2 microwatts. Beyond the sensing performance, high transparency at visible wavelengths creates opportunities for their use in transparent electronic circuitry and optoelectronic devices with avenues for further functional convergence. PMID:22905319

Oxide semiconductor thin-film transistors: a review of recent advances.

PubMed

Fortunato, E; Barquinha, P; Martins, R

2012-06-12

Transparent electronics is today one of the most advanced topics for a wide range of device applications. The key components are wide bandgap semiconductors, where oxides of different origins play an important role, not only as passive component but also as active component, similar to what is observed in conventional semiconductors like silicon. Transparent electronics has gained special attention during the last few years and is today established as one of the most promising technologies for leading the next generation of flat panel display due to its excellent electronic performance. In this paper the recent progress in n- and p-type oxide based thin-film transistors (TFT) is reviewed, with special emphasis on solution-processed and p-type, and the major milestones already achieved with this emerging and very promising technology are summarizeed. After a short introduction where the main advantages of these semiconductors are presented, as well as the industry expectations, the beautiful history of TFTs is revisited, including the main landmarks in the last 80 years, finishing by referring to some papers that have played an important role in shaping transparent electronics. Then, an overview is presented of state of the art n-type TFTs processed by physical vapour deposition methods, and finally one of the most exciting, promising, and low cost but powerful technologies is discussed: solution-processed oxide TFTs. Moreover, a more detailed focus analysis will be given concerning p-type oxide TFTs, mainly centred on two of the most promising semiconductor candidates: copper oxide and tin oxide. The most recent data related to the production of complementary metal oxide semiconductor (CMOS) devices based on n- and p-type oxide TFT is also be presented. The last topic of this review is devoted to some emerging applications, finalizing with the main conclusions. Related work that originated at CENIMAT|I3N during the last six years is included in more detail, which has led to the fabrication of high performance n- and p-type oxide transistors as well as the fabrication of CMOS devices with and on paper. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Synthesis Methods, Microscopy Characterization and Device Integration of Nanoscale Metal Oxide Semiconductors for Gas Sensing in Aerospace Applications

NASA Technical Reports Server (NTRS)

VanderWal, Randy L.; Berger, Gordon M.; Kulis, Michael J.; Hunter, Gary W.; Xu, Jennifer C.; Evans, Laura J.

2009-01-01

A comparison is made between SnO2, ZnO, and TiO2 single-crystal nanowires and SnO2 polycrystalline nanofibers for gas sensing. Both nanostructures possess a one-dimensional morphology. Different synthesis methods are used to produce these materials: thermal evaporation-condensation (TEC), controlled oxidation, and electrospinning. Advantages and limitations of each technique are listed. Practical issues associated with harvesting, purification, and integration of these materials into sensing devices are detailed. For comparison to the nascent form, these sensing materials are surface coated with Pd and Pt nanoparticles. Gas sensing tests, with respect to H2, are conducted at ambient and elevated temperatures. Comparative normalized responses and time constants for the catalyst and noncatalyst systems provide a basis for identification of the superior metal-oxide nanostructure and catalyst combination. With temperature-dependent data, Arrhenius analyses are made to determine an activation energy for the catalyst-assisted systems.

Product manufacturing, quality, and reliability initiatives to maintain a competitive advantage and meet customer expectations in the semiconductor industry

NASA Astrophysics Data System (ADS)

Capps, Gregory

Semiconductor products are manufactured and consumed across the world. The semiconductor industry is constantly striving to manufacture products with greater performance, improved efficiency, less energy consumption, smaller feature sizes, thinner gate oxides, and faster speeds. Customers have pushed towards zero defects and require a more reliable, higher quality product than ever before. Manufacturers are required to improve yields, reduce operating costs, and increase revenue to maintain a competitive advantage. Opportunities exist for integrated circuit (IC) customers and manufacturers to work together and independently to reduce costs, eliminate waste, reduce defects, reduce warranty returns, and improve quality. This project focuses on electrical over-stress (EOS) and re-test okay (RTOK), two top failure return mechanisms, which both make great defect reduction opportunities in customer-manufacturer relationship. Proactive continuous improvement initiatives and methodologies are addressed with emphasis on product life cycle, manufacturing processes, test, statistical process control (SPC), industry best practices, customer education, and customer-manufacturer interaction.

A nanocryotron comparator can connect single-flux-quantum circuits to conventional electronics

NASA Astrophysics Data System (ADS)

Zhao, Qing-Yuan; McCaughan, Adam N.; Dane, Andrew E.; Berggren, Karl K.; Ortlepp, Thomas

2017-04-01

Integration with conventional electronics offers a straightforward and economical approach to upgrading existing superconducting technologies, such as scaling up superconducting detectors into large arrays and combining single flux quantum (SFQ) digital circuits with semiconductor logic gates and memories. However, direct output signals from superconducting devices (e.g., Josephson junctions) are usually not compatible with the input requirements of conventional devices (e.g., transistors). Here, we demonstrate the use of a single three-terminal superconducting-nanowire device, called the nanocryotron (nTron), as a digital comparator to combine SFQ circuits with mature semiconductor circuits such as complementary metal oxide semiconductor (CMOS) circuits. Since SFQ circuits can digitize output signals from general superconducting devices and CMOS circuits can interface existing CMOS-compatible electronics, our results demonstrate the feasibility of a general architecture that uses an nTron as an interface to realize a ‘super-hybrid’ system consisting of superconducting detectors, superconducting quantum electronics, CMOS logic gates and memories, and other conventional electronics.

Surface Plasmon Polariton-Assisted Long-Range Exciton Transport in Monolayer Semiconductor Lateral Heterostructure

NASA Astrophysics Data System (ADS)

Shi, Jinwei; Lin, Meng-Hsien; Chen, Yi-Tong; Estakhri, Nasim Mohammadi; Tseng, Guo-Wei; Wang, Yanrong; Chen, Hung-Ying; Chen, Chun-An; Shih, Chih-Kang; Alã¹, Andrea; Li, Xiaoqin; Lee, Yi-Hsien; Gwo, Shangjr

Recently, two-dimensional (2D) semiconductor heterostructures, i.e., atomically thin lateral heterostructures (LHSs) based on transition metal dichalcogenides (TMDs) have been demonstrated. In an optically excited LHS, exciton transport is typically limited to a rather short spatial range ( 1 micron). Furthermore, additional losses may occur at the lateral interfacial regions. Here, to overcome these challenges, we experimentally implement a planar metal-oxide-semiconductor (MOS) structure by placing a monolayer of WS2/MoS2 LHS on top of an Al2O3 capped Ag single-crystalline plate. We found that the exciton transport range can be extended to tens of microns. The process of long-range exciton transport in the MOS structure is confirmed to be mediated by an exciton-surface plasmon polariton-exciton conversion mechanism, which allows a cascaded energy transfer process. Thus, the planar MOS structure provides a platform seamlessly combining 2D light-emitting materials with plasmonic planar waveguides, offering great potential for developing integrated photonic/plasmonic functionalities.

Photoinduced Dynamics and Toxicity of a Cancer Drug in Proximity of Inorganic Nanoparticles under Visible Light.

PubMed

Chaudhuri, Siddhi; Sardar, Samim; Bagchi, Damayanti; Dutta, Shreyasi; Debnath, Sushanta; Saha, Partha; Lemmens, Peter; Pal, Samir Kumar

2016-01-18

Drug sensitization with various inorganic nanoparticles (NPs) has proved to be a promising and an emergent concept in the field of nanomedicine. Rose bengal (RB), a notable photosensitizer, triggers the formation of reactive oxygen species under green-light irradiation, and consequently, it induces cytotoxicity and cell death. In the present study, the effect of photoinduced dynamics of RB upon complexation with semiconductor zinc oxide NPs is explored. To accomplish this, we successfully synthesized nanohybrids of RB with ZnO NPs with a particle size of 24 nm and optically characterized them. The uniform size and integrity of the particles were confirmed by high-resolution transmission electron microscopy. UV/Vis absorption and steady-state fluorescence studies reveal the formation of the nanohybrids. ultrafast picosecond-resolved fluorescence studies of RB-ZnO nanohybrids demonstrate an efficient electron transfer from the photoexcited drug to the semiconductor NPs. Picosecond-resolved Förster resonance energy transfer from ZnO NPs to RB unravel the proximity of the drug to the semiconductor at the molecular level. The photoinduced ROS formation was monitored using a dichlorofluorescin oxidation assay, which is a conventional oxidative stress indicator. It is observed that the ROS generation under green light illumination is greater at low concentrations of RB-ZnO nanohybrids compared with free RB. Substantial photodynamic activity of the nanohybrids in bacterial and fungal cell lines validated the in vitro toxicity results. Furthermore, the cytotoxic effect of the nanohybrids in HeLa cells, which was monitored by MTT assay, is also noteworthy. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

The Dye Sensitized Photoelectrosynthesis Cell (DSPEC) for Solar Water Splitting and CO2 Reduction

NASA Astrophysics Data System (ADS)

Meyer, Thomas; Alibabaei, Leila; Sherman, Benjamin; Sheridan, Matthew; Ashford, Dennis; Lapides, Alex; Brennaman, Kyle; Nayak, Animesh; Roy, Subhangi; Wee, Kyung-Ryang; Gish, Melissa; Meyer, Jerry; Papanikolas, John

The dye-sensitized photoelectrosynthesis cell (DSPEC) integrates molecular level light absorption and catalysis with the bandgap properties of stable oxide materials such as TiO2 and NiO. Excitation of surface-bound chromophores leads to excited state formation and rapid electron or hole injection into the conduction or valence bands of n or p-type oxides. Addition of thin layers of TiO2 or NiO on the surfaces of mesoscopic, nanoparticle films of semiconductor or transparent conducting oxides to give core/shell structures provides a basis for accumulating multiple redox equivalents at catalysts for water oxidation or CO2 reduction. UNC EFRC Center for Solar Fuels, an Energy Frontier Research Center funded by the U.S. Department of Energy, Office of Science, Office of Basic Energy Sciences under Award Number DE-SC0001011.

Temperature-dependent degradation mechanisms of threshold voltage in La2O3-gated n-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Wang, Ming-Tsong; Hsu, De-Cheng; Juan, Pi-Chun; Wang, Y. L.; Lee, Joseph Ya-min

2010-09-01

Metal-oxide-semiconductor capacitors and n-channel metal-oxide-semiconductor field-effect transistors with La2O3 gate dielectric were fabricated. The positive bias temperature instability was studied. The degradation of threshold voltage (ΔVT) showed an exponential dependence on the stress time in the temperature range from 25 to 75 °C. The degradation of subthreshold slope (ΔS) and gate leakage (IG) with stress voltage was also measured. The degradation of VT is attributed to the oxide trap charges Qot. The extracted activation energy of 0.2 eV is related to a degradation dominated by the release of atomic hydrogen in La2O3 thin films.

Producing thin film photovoltaic modules with high integrity interconnects and dual layer contacts

DOEpatents

Jansen, Kai W.; Maley, Nagi

2000-01-01

High performance photovoltaic modules are produced with improved interconnects by a special process. Advantageously, the photovoltaic modules have a dual layer back (rear) contact and a front contact with at least one layer. The front contact and the inner layer of the back contact can comprise a transparent conductive oxide. The outer layer of the back contact can comprise a metal or metal oxide. The front contact can also have a dielectric layer. In one form, the dual layer back contact comprises a zinc oxide inner layer and an aluminum outer layer and the front contact comprises a tin oxide inner layer and a silicon dioxide dielectric outer layer. One or more amorphous silicon-containing thin film semiconductors can be deposited between the front and back contacts. The contacts can be positioned between a substrate and an optional superstrate. During production, the transparent conductive oxide layer of the front contact is scribed by a laser, then the amorphous silicon-containing semiconductors and inner layer of the dual layer back contact are simultaneously scribed and trenched (drilled) by the laser and the trench is subsequently filled with the same metal as the outer layer of the dual layer back contact to provide a superb mechanical and electrical interconnect between the front contact and the outer layer of the dual layer back contact. The outer layer of the dual layer back contact can then be scribed by the laser. For enhanced environmental protection, the photovoltaic modules can be encapsulated.

Producing thin film photovoltaic modules with high integrity interconnects and dual layer contacts

DOEpatents

Jansen, Kai W.; Maley, Nagi

2001-01-01

High performance photovoltaic modules are produced with improved interconnects by a special process. Advantageously, the photovoltaic modules have a dual layer back (rear) contact and a front contact with at least one layer. The front contact and the inner layer of the back contact can comprise a transparent conductive oxide. The outer layer of the back contact can comprise a metal or metal oxide. The front contact can also have a dielectric layer. In one form, the dual layer back contact comprises a zinc oxide inner layer and an aluminum outer layer and the front contact comprises a tin oxide inner layer and a silicon dioxide dielectric outer layer. One or more amorphous silicon-containing thin film semiconductors can be deposited between the front and back contacts. The contacts can be positioned between a substrate and an optional superstrate. During production, the transparent conductive oxide layer of the front contact is scribed by a laser, then the amorphous silicon-containing semiconductors and inner layer of the dual layer back contact are simultaneously scribed and trenched (drilled) by the laser and the trench is subsequently filled with the same metal as the outer layer of the dual layer back contact to provide a superb mechanical and electrical interconnect between the front contact and the outer layer of the dual layer back contact. The outer layer of the dual layer back contact can then be scribed by the laser. For enhanced environmental protection, the photovoltaic modules can be encapsulated.

Comparison of modification strategies towards enhanced charge carrier separation and photocatalytic degradation activity of metal oxide semiconductors (TiO2, WO3 and ZnO)

NASA Astrophysics Data System (ADS)

Kumar, S. Girish; Rao, K. S. R. Koteswara

2017-01-01

Metal oxide semiconductors (TiO2, WO3 and ZnO) finds unparalleled opportunity in wastewater purification under UV/visible light, largely encouraged by their divergent admirable features like stability, non-toxicity, ease of preparation, suitable band edge positions and facile generation of active oxygen species in the aqueous medium. However, the perennial failings of these photocatalysts emanates from the stumbling blocks like rapid charge carrier recombination and meager visible light response. In this review, tailoring the surface-bulk electronic structure through the calibrated and veritable approaches such as impurity doping, deposition with noble metals, sensitizing with other compounds (dyes, polymers, inorganic complexes and simple chelating ligands), hydrogenation process (annealing under hydrogen atmosphere), electronic integration with other semiconductors, modifying with carbon nanostructures, designing with exposed facets and tailoring with hierarchical morphologies to overcome their critical drawbacks are summarized. Taking into account the materials intrinsic properties, the pros and cons together with similarities and striking differences for each strategy in specific to TiO2, WO3 & ZnO are highlighted. These subtlety enunciates the primacy for improving the structure-electronic properties of metal oxides and credence to its fore in the practical applications. Future research must focus on comparing the performances of ZnO, TiO2 and WO3 in parallel to get insight into their photocatalytic behaviors. Such comparisons not only reveal the changed surface-electronic structure upon various modifications, but also shed light on charge carrier dynamics, free radical generation, structural stability and compatibility for photocatalytic reactions. It is envisioned that these cardinal tactics have profound implications and can be replicated to other semiconductor photocatalysts like CeO2, In2O3, Bi2O3, Fe2O3, BiVO4, AgX, BiOX (X = Cl, Br & I), Bi2WO6, Bi2MoO6, etc., to improve their competence for various environmental applications.

Photocatalytic oxidation of organic compounds in a hybrid system composed of a molecular catalyst and visible light-absorbing semiconductor.

PubMed

Zhou, Xu; Li, Fei; Li, Xiaona; Li, Hua; Wang, Yong; Sun, Licheng

2015-01-14

Photocatalytic oxidation of organic compounds proceeded efficiently in a hybrid system with ruthenium aqua complexes as catalysts, BiVO4 as a light absorber, [Co(NH3)5Cl](2+) as a sacrificial electron acceptor and water as an oxygen source. The photogenerated holes in the semiconductor are used to oxidize molecular catalysts into the high-valent Ru(IV)=O intermediates for 2e(-) oxidation.

Electrical properties of metal/Al2O3/In0.53Ga0.47As capacitors grown on InP

NASA Astrophysics Data System (ADS)

Ferrandis, Philippe; Billaud, Mathilde; Duvernay, Julien; Martin, Mickael; Arnoult, Alexandre; Grampeix, Helen; Cassé, Mikael; Boutry, Hervé; Baron, Thierry; Vinet, Maud; Reimbold, Gilles

2018-04-01

To overcome the Fermi-level pinning in III-V metal-oxide-semiconductor capacitors, attention is usually focused on the choice of dielectric and surface chemical treatments prior to oxide deposition. In this work, we examined the influence of the III-V material surface cleaning and the semiconductor growth technique on the electrical properties of metal/Al2O3/In0.53Ga0.47As capacitors grown on InP(100) substrates. By means of the capacitance-voltage measurements, we demonstrated that samples do not have the same total oxide charge density depending on the cleaning solution used [(NH4)2S or NH4OH] prior to oxide deposition. The determination of the interface trap density revealed that a Fermi-level pinning occurs for samples grown by metalorganic chemical vapor deposition but not for similar samples grown by molecular beam epitaxy. Deep level transient spectroscopy analysis explained the Fermi-level pinning by an additional signal for samples grown by metalorganic chemical vapor deposition, attributed to the tunneling effect of carriers trapped in oxide toward interface states. This work emphasizes that the choice of appropriate oxide and cleaning treatment is not enough to prevent a Fermi-level pinning in III-V metal-oxide-semiconductor capacitors. The semiconductor growth technique needs to be taken into account because it impacts the trapping properties of the oxide.

76 FR 14688 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-03-17

... Integrated Circuit Semiconductor Chips and Products Containing the Same; Notice of a Commission Determination... certain large scale integrated circuit semiconductor chips and products containing same by reason of... existence of a domestic industry. The Commission's notice of investigation named several respondents...

77 FR 25747 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Institution of...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-05-01

... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-840] Certain Semiconductor Integrated Circuit... States after importation of certain semiconductor integrated circuit devices and products containing same... No. 6,847,904 (``the '904 patent''). The complaint further alleges that an industry in the United...

A new approximation of Fermi-Dirac integrals of order 1/2 for degenerate semiconductor devices

NASA Astrophysics Data System (ADS)

AlQurashi, Ahmed; Selvakumar, C. R.

2018-06-01

There had been tremendous growth in the field of Integrated circuits (ICs) in the past fifty years. Scaling laws mandated both lateral and vertical dimensions to be reduced and a steady increase in doping densities. Most of the modern semiconductor devices have invariably heavily doped regions where Fermi-Dirac Integrals are required. Several attempts have been devoted to developing analytical approximations for Fermi-Dirac Integrals since numerical computations of Fermi-Dirac Integrals are difficult to use in semiconductor devices, although there are several highly accurate tabulated functions available. Most of these analytical expressions are not sufficiently suitable to be employed in semiconductor device applications due to their poor accuracy, the requirement of complicated calculations, and difficulties in differentiating and integrating. A new approximation has been developed for the Fermi-Dirac integrals of the order 1/2 by using Prony's method and discussed in this paper. The approximation is accurate enough (Mean Absolute Error (MAE) = 0.38%) and easy enough to be used in semiconductor device equations. The new approximation of Fermi-Dirac Integrals is applied to a more generalized Einstein Relation which is an important relation in semiconductor devices.

Control of GaAs Microwave Schottky Diode Electrical Characteristics by Contact Geometry: The Gap Diode.

DTIC Science & Technology

1982-05-01

semiconductor Schottky-barrier contacts are used in many semiconductor devices, including switches, rectifiers, varactors , IMPATTs, mixer and detector...ionic materials such as most of the II-VI compound semiconductors (e.g. ZnS and ZnO) and the transition-metal oxides , the barrier height is strongly...the alloying process described above is nonuniformity, due to the incomplete removal of residual surface oxides prior to the evaporation of the metal

Semiconductor structures having electrically insulating and conducting portions formed from an AlSb-alloy layer

DOEpatents

Spahn, Olga B.; Lear, Kevin L.

1998-01-01

A semiconductor structure. The semiconductor structure comprises a plurality of semiconductor layers formed on a substrate including at least one layer of a III-V compound semiconductor alloy comprising aluminum (Al) and antimony (Sb), with at least a part of the AlSb-alloy layer being chemically converted by an oxidation process to form superposed electrically insulating and electrically conducting portions. The electrically insulating portion formed from the AlSb-alloy layer comprises an oxide of aluminum (e.g. Al.sub.2 O.sub.3), while the electrically conducting portion comprises Sb. A lateral oxidation process allows formation of the superposed insulating and conducting portions below monocrystalline semiconductor layers for forming many different types of semiconductor structures having particular utility for optoelectronic devices such as light-emitting diodes, edge-emitting lasers, vertical-cavity surface-emitting lasers, photodetectors and optical modulators (waveguide and surface normal), and for electronic devices such as heterojunction bipolar transistors, field-effect transistors and quantum-effect devices. The invention is expected to be particularly useful for forming light-emitting devices for use in the 1.3-1.6 .mu.m wavelength range, with the AlSb-alloy layer acting to define an active region of the device and to effectively channel an electrical current therein for efficient light generation.

Bacteria Inside Semiconductors as Potential Sensor Elements: Biochip Progress

PubMed Central

Sah, Vasu R.; Baier, Robert E.

2014-01-01

It was discovered at the beginning of this Century that living bacteria—and specifically the extremophile Pseudomonas syzgii—could be captured inside growing crystals of pure water-corroding semiconductors—specifically germanium—and thereby initiated pursuit of truly functional “biochip-based” biosensors. This observation was first made at the inside ultraviolet-illuminated walls of ultrapure water-flowing semiconductor fabrication facilities (fabs) and has since been, not as perfectly, replicated in simpler flow cell systems for chip manufacture, described here. Recognizing the potential importance of these adducts as optical switches, for example, or probes of metabolic events, the influences of the fabs and their components on the crystal nucleation and growth phenomena now identified are reviewed and discussed with regard to further research needs. For example, optical beams of current photonic circuits can be more easily modulated by integral embedded cells into electrical signals on semiconductors. Such research responds to a recently published Grand Challenge in ceramic science, designing and synthesizing oxide electronics, surfaces, interfaces and nanoscale structures that can be tuned by biological stimuli, to reveal phenomena not otherwise possible with conventional semiconductor electronics. This short review addresses only the fabrication facilities' features at the time of first production of these potential biochips. PMID:24961215

Memory effects in a Al/Ti:HfO2/CuPc metal-oxide-semiconductor device

NASA Astrophysics Data System (ADS)

Tripathi, Udbhav; Kaur, Ramneek

2016-05-01

Metal oxide semiconductor structured organic memory device has been successfully fabricated. Ti doped hafnium oxide (Ti:HfO2) nanoparticles has been fabricated by precipitation method and further calcinated at 800 °C. Copper phthalocyanine, a hole transporting material has been utilized as an organic semiconductor. The electrical properties of the fabricated device have been studied by measuring the current-voltage and capacitance-voltage characteristics. The amount of charge stored in the nanoparticles has been calculated by using flat band condition. This simple approach for fabricating MOS memory device has opens up opportunities for the development of next generation memory devices.

Evolution of corundum-structured III-oxide semiconductors: Growth, properties, and devices

NASA Astrophysics Data System (ADS)

Fujita, Shizuo; Oda, Masaya; Kaneko, Kentaro; Hitora, Toshimi

2016-12-01

The recent progress and development of corundum-structured III-oxide semiconductors are reviewed. They allow bandgap engineering from 3.7 to ∼9 eV and function engineering, leading to highly durable electronic devices and deep ultraviolet optical devices as well as multifunctional devices. Mist chemical vapor deposition can be a simple and safe growth technology and is advantageous for reducing energy and cost for the growth. This is favorable for the wide commercial use of devices at low cost. The III-oxide semiconductors are promising candidates for new devices contributing to sustainable social, economic, and technological development for the future.

The effect of doping on low temperature growth of high quality GaAs nanowires on polycrystalline films

PubMed Central

DeJarld, Matt; Teran, Alan; Luengo-Kovac, Marta; Yan, Lifan; Moon, Eun Seong; Beck, Sara; Guillen, Cristina; Sih, Vanessa; Phillips, Jamie; Milunchick, Joanna Mirecki

2016-01-01

The increasing demand for miniature autonomous sensors requires low cost integration methods, but to date, material limitations have prevented the direct growth of optically active III-V materials on CMOS devices. We report on the deposition of GaAs nanowires on polycrystalline conductive films to allow for direct integration of optoelectronic devices on dissimilar materials. Undoped, Si-doped, and Be-doped nanowires were grown at Ts=400°C on oxide (indium tin oxide) and metallic (platinum and titanium) films. Be-doping is shown to significantly reduce the nanowire diameter and improve the nanowire aspect ratio to 50:1. Photoluminescence measurements of Be-doped nanowires are 1–2 orders of magnitude stronger than undoped and Si-doped nanowires and have a thermal activation energy of 14meV, which is comparable to nanowires grown on crystalline substrates. Electrical measurements confirm that the metal-semiconductor junction is Ohmic. These results demonstrate the feasibility of integrating nanowire-based optoelectronic devices directly on CMOS chips. PMID:27834310

Ultrafast recombination dynamics in dye-sensitized SnO 2/TiO 2 core/shell films

DOE PAGES

Gish, Melissa K.; Lapides, Alexander M.; Brennaman, M. Kyle; ...

2016-12-02

In dye-sensitized photoelectrosynthesis cells (DSPECs), molecular chromophores and catalysts are integrated on a semiconductor surface to perform water oxidation or CO 2 reduction after a series of light-induced electron transfer events. Unfortunately, recombination of the charge separated state (CSS) is competitive with productive catalysis. To overcome this major obstacle, implementation of photoanodic core/shell films within these devices improve electrochemical behavior and slow recombination through the introduction of an energetic barrier between the semiconductor core and oxidized species on the surface. In this study, interfacial dynamics are investigated in SnO 2/TiO 2 core/shell films derivatized with a Ru(II)-polypyridyl chromophore ([RuII(bpy)2(4,4'-(PO 3Hmore » 2) 2bpy)] 2+, RuP) using transient absorption methods. Electron injection from the chromophore into the TiO 2 shell occurs within a few picoseconds after photoexcitation. Loss of the oxidized dye through recombination occurs across time scales spanning 10 orders of magnitude. The majority (60%) of charge recombination events occur shortly after injection (τ = 220 ps), while a small fraction (≤20%) of the oxidized chromophores persists for milliseconds. The lifetime of long-lived CSS depends exponentially on shell thickness, suggesting that the injected electrons reside in the SnO 2 core and must tunnel through the TiO 2 shell to recombine with oxidized dyes. While the core/shell architecture extends the lifetime in a small fraction of the CSS, making water oxidation possible, the subnanosecond recombination process has profound implications for the overall efficiencies of DSPECs.« less

Patterning and templating for nanoelectronics.

PubMed

Galatsis, Kosmas; Wang, Kang L; Ozkan, Mihri; Ozkan, Cengiz S; Huang, Yu; Chang, Jane P; Monbouquette, Harold G; Chen, Yong; Nealey, Paul; Botros, Youssry

2010-02-09

The semiconductor industry will soon be launching 32 nm complementary metal oxide semiconductor (CMOS) technology node using 193 nm lithography patterning technology to fabricate microprocessors with more than 2 billion transistors. To ensure the survival of Moore's law, alternative patterning techniques that offer advantages beyond conventional top-down patterning are aggressively being explored. It is evident that most alternative patterning techniques may not offer compelling advantages to succeed conventional top-down lithography for silicon integrated circuits, but alternative approaches may well indeed offer functional advantages in realising next-generation information processing nanoarchitectures such as those based on cellular, bioinsipired, magnetic dot logic, and crossbar schemes. This paper highlights and evaluates some patterning methods from the Center on Functional Engineered Nano Architectonics in Los Angeles and discusses key benchmarking criteria with respect to CMOS scaling.

Cascaded exciton energy transfer in a monolayer semiconductor lateral heterostructure assisted by surface plasmon polariton.

PubMed

Shi, Jinwei; Lin, Meng-Hsien; Chen, I-Tung; Mohammadi Estakhri, Nasim; Zhang, Xin-Quan; Wang, Yanrong; Chen, Hung-Ying; Chen, Chun-An; Shih, Chih-Kang; Alù, Andrea; Li, Xiaoqin; Lee, Yi-Hsien; Gwo, Shangjr

2017-06-26

Atomically thin lateral heterostructures based on transition metal dichalcogenides have recently been demonstrated. In monolayer transition metal dichalcogenides, exciton energy transfer is typically limited to a short range (~1 μm), and additional losses may be incurred at the interfacial regions of a lateral heterostructure. To overcome these challenges, here we experimentally implement a planar metal-oxide-semiconductor structure by placing a WS 2 /MoS 2 monolayer heterostructure on top of an Al 2 O 3 -capped Ag single-crystalline plate. We find that the exciton energy transfer range can be extended to tens of microns in the hybrid structure mediated by an exciton-surface plasmon polariton-exciton conversion mechanism, allowing cascaded exciton energy transfer from one transition metal dichalcogenides region supporting high-energy exciton resonance to a different transition metal dichalcogenides region in the lateral heterostructure with low-energy exciton resonance. The realized planar hybrid structure combines two-dimensional light-emitting materials with planar plasmonic waveguides and offers great potential for developing integrated photonic and plasmonic devices.Exciton energy transfer in monolayer transition metal dichalcogenides is limited to short distances. Here, Shi et al. fabricate a planar metal-oxide-semiconductor structure and show that exciton energy transfer can be extended to tens of microns, mediated by an exciton-surface-plasmon-polariton-exciton conversion mechanism.

Direct protein detection with a nano-interdigitated array gate MOSFET.

PubMed

Tang, Xiaohui; Jonas, Alain M; Nysten, Bernard; Demoustier-Champagne, Sophie; Blondeau, Franoise; Prévot, Pierre-Paul; Pampin, Rémi; Godfroid, Edmond; Iñiguez, Benjamin; Colinge, Jean-Pierre; Raskin, Jean-Pierre; Flandre, Denis; Bayot, Vincent

2009-08-15

A new protein sensor is demonstrated by replacing the gate of a metal oxide semiconductor field effect transistor (MOSFET) with a nano-interdigitated array (nIDA). The sensor is able to detect the binding reaction of a typical antibody Ixodes ricinus immunosuppressor (anti-Iris) protein at a concentration lower than 1 ng/ml. The sensor exhibits a high selectivity and reproducible specific detection. We provide a simple model that describes the behavior of the sensor and explains the origin of its high sensitivity. The simulated and experimental results indicate that the drain current of nIDA-gate MOSFET sensor is significantly increased with the successive binding of the thiol layer, Iris and anti-Iris protein layers. It is found that the sensor detection limit can be improved by well optimizing the geometrical parameters of nIDA-gate MOSFET. This nanobiosensor, with real-time and label-free capabilities, can easily be used for the detection of other proteins, DNA, virus and cancer markers. Moreover, an on-chip associated electronics nearby the sensor can be integrated since its fabrication is compatible with complementary metal oxide semiconductor (CMOS) technology.

Speed-Up Techniques for Complementary Metal Oxide Semiconductor Very Large Scale Integration.

DTIC Science & Technology

1984-12-14

The input voltage at which the two transistors are in the constant current region at the same time marks the active operating region of the inverter...decoder precharge configurations. One circuit displayed a marked enhancement in operation while the other precharged circuit displyed degraded operation due...34 IEEE Journal of Solid State Circuits, SC-18: 457-462 (October 1983). 19. Cobbold , R. Theory and Applications of Field Effect Transistors, New York: John

Improvement of hot-carrier and radiation hardnesses in metal-oxide-nitride-oxide semiconductor devices by irradiation-then-anneal treatments

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chang-Liao, K.S.; Hwu, J.G.

The hardnesses of hot-carrier and radiation of metal-oxide nitride-oxide semiconductor (MONOS) devices can be improved by the irradiation-then-anneal (ITA) treatments. Each treatment includes an irradiation of Co-60 with a total dose of 1M rads(SiO[sub 2]) and an anneal in N[sub 2] at 400 C for 10 min successively. This improvement can be explained by the release of SiO[sub 2]/Si interfacial strain.

Monolithic optoelectronic integrated broadband optical receiver with graphene photodetectors

NASA Astrophysics Data System (ADS)

Cheng, Chuantong; Huang, Beiju; Mao, Xurui; Zhang, Zanyun; Zhang, Zan; Geng, Zhaoxin; Xue, Ping; Chen, Hongda

2017-07-01

Optical receivers with potentially high operation bandwidth and low cost have received considerable interest due to rapidly growing data traffic and potential Tb/s optical interconnect requirements. Experimental realization of 65 GHz optical signal detection and 262 GHz intrinsic operation speed reveals the significance role of graphene photodetectors (PDs) in optical interconnect domains. In this work, a novel complementary metal oxide semiconductor post-backend process has been developed for integrating graphene PDs onto silicon integrated circuit chips. A prototype monolithic optoelectronic integrated optical receiver has been successfully demonstrated for the first time. Moreover, this is a firstly reported broadband optical receiver benefiting from natural broadband light absorption features of graphene material. This work is a perfect exhibition of the concept of monolithic optoelectronic integration and will pave way to monolithically integrated graphene optoelectronic devices with silicon ICs for three-dimensional optoelectronic integrated circuit chips.

75 FR 24742 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-05-05

... Integrated Circuit Semiconductor Chips and Products Containing Same; Notice of Investigation AGENCY: U.S... of certain large scale integrated circuit semiconductor chips and products containing same by reason... alleges that an industry in the United States exists as required by subsection (a)(2) of section 337. The...

75 FR 5804 - In the Matter of: Certain Semiconductor Integrated Circuits and Products Containing Same; Notice...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-02-04

... Semiconductor Integrated Circuits and Products Containing Same; Notice of Commission Determination To Review in... importation of certain semiconductor integrated circuits and products containing same by reason of... that there exists a domestic industry with respect to each of the asserted patents. The complaint named...

Synchronized conductivity modulation to realize broadband lossless magnetic-free non-reciprocity.

PubMed

Dinc, Tolga; Tymchenko, Mykhailo; Nagulu, Aravind; Sounas, Dimitrios; Alu, Andrea; Krishnaswamy, Harish

2017-10-06

Recent research has explored the spatiotemporal modulation of permittivity to break Lorentz reciprocity in a manner compatible with integrated-circuit fabrication. However, permittivity modulation is inherently weak and accompanied by loss due to carrier injection, particularly at higher frequencies, resulting in large insertion loss, size, and/or narrow operation bandwidths. Here, we show that the presence of absorption in an integrated electronic circuit may be counter-intuitively used to our advantage to realize a new generation of magnet-free non-reciprocal components. We exploit the fact that conductivity in semiconductors provides a modulation index several orders of magnitude larger than permittivity. While directly associated with loss in static systems, we show that properly synchronized conductivity modulation enables loss-free, compact and extremely broadband non-reciprocity. We apply these concepts to obtain a wide range of responses, from isolation to gyration and circulation, and verify our findings by realizing a millimeter-wave (25 GHz) circulator fully integrated in complementary metal-oxide-semiconductor technology.Optical non-reciprocity achieved through refractive index modulation can have its challenges and limitations. Here, Dinc et al. introduce the concept of non-reciprocity based on synchronized spatio-temporal modulation of conductivity to achieve different types of non-reciprocal functionality.

Water soluble nano-scale transient material germanium oxide for zero toxic waste based environmentally benign nano-manufacturing

NASA Astrophysics Data System (ADS)

Almuslem, A. S.; Hanna, A. N.; Yapici, T.; Wehbe, N.; Diallo, E. M.; Kutbee, A. T.; Bahabry, R. R.; Hussain, M. M.

2017-02-01

In the recent past, with the advent of transient electronics for mostly implantable and secured electronic applications, the whole field effect transistor structure has been dissolved in a variety of chemicals. Here, we show simple water soluble nano-scale (sub-10 nm) germanium oxide (GeO2) as the dissolvable component to remove the functional structures of metal oxide semiconductor devices and then reuse the expensive germanium substrate again for functional device fabrication. This way, in addition to transiency, we also show an environmentally friendly manufacturing process for a complementary metal oxide semiconductor (CMOS) technology. Every year, trillions of complementary metal oxide semiconductor (CMOS) electronics are manufactured and billions are disposed, which extend the harmful impact to our environment. Therefore, this is a key study to show a pragmatic approach for water soluble high performance electronics for environmentally friendly manufacturing and bioresorbable electronic applications.

Electrical properties of zinc-oxide-based thin-film transistors using strontium-oxide-doped semiconductors

NASA Astrophysics Data System (ADS)

Wu, Shao-Hang; Zhang, Nan; Hu, Yong-Sheng; Chen, Hong; Jiang, Da-Peng; Liu, Xing-Yuan

2015-10-01

Strontium-zinc-oxide (SrZnO) films forming the semiconductor layers of thin-film transistors (TFTs) are deposited by using ion-assisted electron beam evaporation. Using strontium-oxide-doped semiconductors, the off-state current can be dramatically reduced by three orders of magnitude. This dramatic improvement is attributed to the incorporation of strontium, which suppresses carrier generation, thereby improving the TFT. Additionally, the presence of strontium inhibits the formation of zinc oxide (ZnO) with the hexagonal wurtzite phase and permits the formation of an unusual phase of ZnO, thus significantly changing the surface morphology of ZnO and effectively reducing the trap density of the channel. Project supported by the National Natural Science Foundation of China (Grant No. 6140031454) and the Innovation Program of Chinese Academy of Sciences and State Key Laboratory of Luminescence and Applications.

Comprehensive electrical analysis of metal/Al2O3/O-terminated diamond capacitance

NASA Astrophysics Data System (ADS)

Pham, T. T.; Maréchal, A.; Muret, P.; Eon, D.; Gheeraert, E.; Rouger, N.; Pernot, J.

2018-04-01

Metal oxide semiconductor capacitors were fabricated using p - type oxygen-terminated (001) diamond and Al2O3 deposited by atomic layer deposition at two different temperatures 250 °C and 380 °C. Current voltage I(V), capacitance voltage C(V), and capacitance frequency C(f) measurements were performed and analyzed for frequencies ranging from 1 Hz to 1 MHz and temperatures from 160 K to 360 K. A complete model for the Metal-Oxide-Semiconductor Capacitors electrostatics, leakage current mechanisms through the oxide into the semiconductor and small a.c. signal equivalent circuit of the device is proposed and discussed. Interface states densities are then evaluated in the range of 1012eV-1cm-2 . The strong Fermi level pinning is demonstrated to be induced by the combined effects of the leakage current through the oxide and the presence of diamond/oxide interface states.

Atomic switches: atomic-movement-controlled nanodevices for new types of computing

PubMed Central

Hino, Takami; Hasegawa, Tsuyoshi; Terabe, Kazuya; Tsuruoka, Tohru; Nayak, Alpana; Ohno, Takeo; Aono, Masakazu

2011-01-01

Atomic switches are nanoionic devices that control the diffusion of metal cations and their reduction/oxidation processes in the switching operation to form/annihilate a metal atomic bridge, which is a conductive path between two electrodes in the on-state. In contrast to conventional semiconductor devices, atomic switches can provide a highly conductive channel even if their size is of nanometer order. In addition to their small size and low on-resistance, their nonvolatility has enabled the development of new types of programmable devices, which may achieve all the required functions on a single chip. Three-terminal atomic switches have also been developed, in which the formation and annihilation of a metal atomic bridge between a source electrode and a drain electrode are controlled by a third (gate) electrode. Three-terminal atomic switches are expected to enhance the development of new types of logic circuits, such as nonvolatile logic. The recent development of atomic switches that use a metal oxide as the ionic conductive material has enabled the integration of atomic switches with complementary metal-oxide-semiconductor (CMOS) devices, which will facilitate the commercialization of atomic switches. The novel characteristics of atomic switches, such as their learning and photosensing abilities, are also introduced in the latter part of this review. PMID:27877376

Low temperature production of large-grain polycrystalline semiconductors

DOEpatents

Naseem, Hameed A [Fayetteville, AR; Albarghouti, Marwan [Loudonville, NY

2007-04-10

An oxide or nitride layer is provided on an amorphous semiconductor layer prior to performing metal-induced crystallization of the semiconductor layer. The oxide or nitride layer facilitates conversion of the amorphous material into large grain polycrystalline material. Hence, a native silicon dioxide layer provided on hydrogenated amorphous silicon (a-Si:H), followed by deposited Al permits induced crystallization at temperatures far below the solid phase crystallization temperature of a-Si. Solar cells and thin film transistors can be prepared using this method.

Wide Bandgap Semiconductor Nanowires for Electronic, Photonic and Sensing Devices

DTIC Science & Technology

2012-01-05

oxide -based thin film transistors ( TFTs ) have attracted much attention for applications like flexible electronic devices. The...crystals, and ~ 1.5 cm2.V-1.s-1 for pentacene thin films ). A number of groups have demonstrated TFTs based on α- oxide semiconductors such as zinc oxide ...show excellent long-term stability at room temperature. Results: High-performance amorphous (α-) InGaZnO-based thin film transistors ( TFTs )

Multi-layer MOS capacitor based polarization insensitive electro-optic intensity modulator.

PubMed

Qiu, Xiaoming; Ruan, Xiaoke; Li, Yanping; Zhang, Fan

2018-05-28

In this study, a multi-layer metal-oxide-semiconductor capacitor (MLMOSC) polarization insensitive modulator is proposed. The design is validated by numerical simulation with commercial software LUMERICAL SOLUTION. Based on the epsilon-near-zero (ENZ) effect of indium tin oxide (ITO), the device manages to uniformly modulate both the transverse electric (TE) and the transverse magnetic (TM) modes. With a 20μm-long double-layer metal-oxide-semiconductor capacitor (DLMOSC) polarization insensitive modulator, in which two metal-oxide-semiconductor (MOS) structures are formed by the n-doped Si/HfO 2 /ITO/HfO 2 / n-doped Si stack, the extinction ratios (ERs) of both the TE and the TM modes can be over 20dB. The polarization dependent losses of the device can be as low as 0.05dB for the "OFF" state and 0.004dB for the "ON" state. Within 1dB polarization dependent loss, the device can operate with over 20dB ERs at the S, C, and L bands. The polarization insensitive modulator offers various merits including ultra-compact size, broadband spectrum, and complementary metal oxide semiconductor (CMOS) compatibility.

Semiconductor films on flexible iridium substrates

DOEpatents

Goyal, Amit

2005-03-29

A laminate semiconductor article includes a flexible substrate, an optional biaxially textured oxide buffer system on the flexible substrate, a biaxially textured Ir-based buffer layer on the substrate or the buffer system, and an epitaxial layer of a semiconductor. Ir can serve as a substrate with an epitaxial layer of a semiconductor thereon.

Memristor-CMOS hybrid integrated circuits for reconfigurable logic.

PubMed

Xia, Qiangfei; Robinett, Warren; Cumbie, Michael W; Banerjee, Neel; Cardinali, Thomas J; Yang, J Joshua; Wu, Wei; Li, Xuema; Tong, William M; Strukov, Dmitri B; Snider, Gregory S; Medeiros-Ribeiro, Gilberto; Williams, R Stanley

2009-10-01

Hybrid reconfigurable logic circuits were fabricated by integrating memristor-based crossbars onto a foundry-built CMOS (complementary metal-oxide-semiconductor) platform using nanoimprint lithography, as well as materials and processes that were compatible with the CMOS. Titanium dioxide thin-film memristors served as the configuration bits and switches in a data routing network and were connected to gate-level CMOS components that acted as logic elements, in a manner similar to a field programmable gate array. We analyzed the chips using a purpose-built testing system, and demonstrated the ability to configure individual devices, use them to wire up various logic gates and a flip-flop, and then reconfigure devices.

Facet-embedded thin-film III-V edge-emitting lasers integrated with SU-8 waveguides on silicon.

PubMed

Palit, Sabarni; Kirch, Jeremy; Huang, Mengyuan; Mawst, Luke; Jokerst, Nan Marie

2010-10-15

A thin-film InGaAs/GaAs edge-emitting single-quantum-well laser has been integrated with a tapered multimode SU-8 waveguide onto an Si substrate. The SU-8 waveguide is passively aligned to the laser using mask-based photolithography, mimicking electrical interconnection in Si complementary metal-oxide semiconductor, and overlaps one facet of the thin-film laser for coupling power from the laser to the waveguide. Injected threshold current densities of 260A/cm(2) are measured with the reduced reflectivity of the embedded laser facet while improving single mode coupling efficiency, which is theoretically simulated to be 77%.

Calculating Second-Order Effects in MOSFET's

NASA Technical Reports Server (NTRS)

Benumof, Reuben; Zoutendyk, John A.; Coss, James R.

1990-01-01

Collection of mathematical models includes second-order effects in n-channel, enhancement-mode, metal-oxide-semiconductor field-effect transistors (MOSFET's). When dimensions of circuit elements relatively large, effects neglected safely. However, as very-large-scale integration of microelectronic circuits leads to MOSFET's shorter or narrower than 2 micrometer, effects become significant in design and operation. Such computer programs as widely-used "Simulation Program With Integrated Circuit Emphasis, Version 2" (SPICE 2) include many of these effects. In second-order models of n-channel, enhancement-mode MOSFET, first-order gate-depletion region diminished by triangular-cross-section deletions on end and augmented by circular-wedge-cross-section bulges on sides.

Electrical properties of solid-solution SrZrxTi1-xO3 grown epitaxially on Ge by molecular beam epitaxy

NASA Astrophysics Data System (ADS)

Moghadam, Reza; Ahmadi, Kamyar; Xiao, Z.-Y.; Hong, Xia; Ngai, Joseph

The epitaxial growth of crystalline oxides on semiconductors enables new functionalities to be introduced to semiconductor devices. In particular, dielectric and ferroelectric oxides grown epitaxially on semiconductors provide a pathway to realize ultra-low power logic and memory devices. Here we present electrical characterization of solid-solution SrZrxTi1-xO3 grown epitaxially on Ge through oxide molecular beam epitaxy. SrZrxTi1-xO3 is of particular interest since the band offset with respect to the semiconductor can be tuned through Zr content x. We will present current-voltage, capacitance-voltage and piezoforce microscopy characterization of SrZrxTi1-xO3 -Ge heterojunctions. In particular, we will discuss how the electrical characteristics of SrZrxTi1-xO3 -Ge heterojunctions evolve with respect to composition, annealing and film thickness.

Efficient Solar Energy Conversion Systems for Hydrogen Production from Water using Semiconductor Photoelectrodes and Photocatalysts

NASA Astrophysics Data System (ADS)

Sayama, K.; Arai, T.

2008-02-01

Efficient solar energy conversion system for hydrogen production from water, solar-hydrogen system, is one of most important technologies for genuinely sustainable development of the society in the world wide scale. However, there are many problems to breakthrough such as low solar-to-H2 efficiency (STH), high cost, low stability, etc in order to realize the system practically and economically. The solar-hydrogen systems using semiconductors are mainly classified as follows; solar cell-electrolysis system, semiconductor photoelectrode system, and photocatalyst system. There are various merits and demerits in each system. The solar cell-electrolysis system is very efficient but is very high cost. The photocatalyst system is very simple and relatively low cost, but the efficiency is still very low. On the other hand, various semiconductor systems with high efficiency have been investigated. A high STH more than 10% was reported using non-oxide semiconductor photoelectrodes such as InGaP, while the preparation methods were costly. In a European project, some simple oxide semiconductor photoelectrodes such as Fe2O3 and WO3 are mainly studied. Here, we investigated various photoelectrodes using mixed metal oxide especially on BiVO4 semiconductor, and a high throughput screening system of new visible light responsible semiconductors for photoelectrode and photocatalyst. Moreover, photocatalysis-electrolysis hybrid system for economical H2 production is studied to overcome the demerit of photocatalyst system on the gas separation and low efficiency.

Multifunctional Organic-Semiconductor Interfacial Layers for Solution-Processed Oxide-Semiconductor Thin-Film Transistor.

PubMed

Kwon, Guhyun; Kim, Keetae; Choi, Byung Doo; Roh, Jeongkyun; Lee, Changhee; Noh, Yong-Young; Seo, SungYong; Kim, Myung-Gil; Kim, Choongik

2017-06-01

The stabilization and control of the electrical properties in solution-processed amorphous-oxide semiconductors (AOSs) is crucial for the realization of cost-effective, high-performance, large-area electronics. In particular, impurity diffusion, electrical instability, and the lack of a general substitutional doping strategy for the active layer hinder the industrial implementation of copper electrodes and the fine tuning of the electrical parameters of AOS-based thin-film transistors (TFTs). In this study, the authors employ a multifunctional organic-semiconductor (OSC) interlayer as a solution-processed thin-film passivation layer and a charge-transfer dopant. As an electrically active impurity blocking layer, the OSC interlayer enhances the electrical stability of AOS TFTs by suppressing the adsorption of environmental gas species and copper-ion diffusion. Moreover, charge transfer between the organic interlayer and the AOS allows the fine tuning of the electrical properties and the passivation of the electrical defects in the AOS TFTs. The development of a multifunctional solution-processed organic interlayer enables the production of low-cost, high-performance oxide semiconductor-based circuits. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

CMOS array design automation techniques. [metal oxide semiconductors

NASA Technical Reports Server (NTRS)

Ramondetta, P.; Feller, A.; Noto, R.; Lombardi, T.

1975-01-01

A low cost, quick turnaround technique for generating custom metal oxide semiconductor arrays using the standard cell approach was developed, implemented, tested and validated. Basic cell design topology and guidelines are defined based on an extensive analysis that includes circuit, layout, process, array topology and required performance considerations particularly high circuit speed.

Positron studies of metal-oxide-semiconductor structures

NASA Astrophysics Data System (ADS)

Au, H. L.; Asoka-Kumar, P.; Nielsen, B.; Lynn, K. G.

1993-03-01

Positron annihilation spectroscopy provides a new probe to study the properties of interface traps in metal-oxide semiconductors (MOS). Using positrons, we have examined the behavior of the interface traps as a function of gate bias. We propose a simple model to explain the positron annihilation spectra from the interface region of a MOS capacitor.

Metal/oxide/semiconductor interface investigated by monoenergetic positrons

NASA Astrophysics Data System (ADS)

Uedono, A.; Tanigawa, S.; Ohji, Y.

1988-10-01

Variable-energy positron-beam studies have been carried out for the first time on a metal/oxide/semiconductor (MOS) structure of polycrystalline Si/SiO 2/Si-substrate. We were successful in collecting injected positrons at the SiO 2/Si interface by the application of an electric field between the MOS electrodes.

Metal Oxide Semi-Conductor Gas Sensors in Environmental Monitoring

PubMed Central

Fine, George F.; Cavanagh, Leon M.; Afonja, Ayo; Binions, Russell

2010-01-01

Metal oxide semiconductor gas sensors are utilised in a variety of different roles and industries. They are relatively inexpensive compared to other sensing technologies, robust, lightweight, long lasting and benefit from high material sensitivity and quick response times. They have been used extensively to measure and monitor trace amounts of environmentally important gases such as carbon monoxide and nitrogen dioxide. In this review the nature of the gas response and how it is fundamentally linked to surface structure is explored. Synthetic routes to metal oxide semiconductor gas sensors are also discussed and related to their affect on surface structure. An overview of important contributions and recent advances are discussed for the use of metal oxide semiconductor sensors for the detection of a variety of gases—CO, NOx, NH3 and the particularly challenging case of CO2. Finally a description of recent advances in work completed at University College London is presented including the use of selective zeolites layers, new perovskite type materials and an innovative chemical vapour deposition approach to film deposition. PMID:22219672

Ionic Liquid Activation of Amorphous Metal-Oxide Semiconductors for Flexible Transparent Electronic Devices

DOE PAGES

Pudasaini, Pushpa Raj; Noh, Joo Hyon; Wong, Anthony T.; ...

2016-02-09

To begin this abstract, amorphous metal-oxide semiconductors offer the high carrier mobilities and excellent large-area uniformity required for high performance, transparent, flexible electronic devices; however, a critical bottleneck to their widespread implementation is the need to activate these materials at high temperatures which are not compatible with flexible polymer substrates. The highly controllable activation of amorphous indium gallium zinc oxide semiconductor channels using ionic liquid gating at room temperature is reported. Activation is controlled by electric field-induced oxygen migration across the ionic liquid-semiconductor interface. In addition to activation of unannealed devices, it is shown that threshold voltages of a transistormore » can be linearly tuned between the enhancement and depletion modes. Finally, the first ever example of transparent flexible thin film metal oxide transistor on a polyamide substrate created using this simple technique is demonstrated. Finally, this study demonstrates the potential of field-induced activation as a promising alternative to traditional postdeposition thermal annealing which opens the door to wide scale implementation into flexible electronic applications.« less

Collective Poisson process with periodic rates: applications in physics from micro-to nanodevices.

PubMed

da Silva, Roberto; Lamb, Luis C; Wirth, Gilson Inacio

2011-01-28

Continuous reductions in the dimensions of semiconductor devices have led to an increasing number of noise sources, including random telegraph signals (RTS) due to the capture and emission of electrons by traps at random positions between oxide and semiconductor. The models traditionally used for microscopic devices become of limited validity in nano- and mesoscale systems since, in such systems, distributed quantities such as electron and trap densities, and concepts like electron mobility, become inadequate to model electrical behaviour. In addition, current experimental works have shown that RTS in semiconductor devices based on carbon nanotubes lead to giant current fluctuations. Therefore, the physics of this phenomenon and techniques to decrease the amplitudes of RTS need to be better understood. This problem can be described as a collective Poisson process under different, but time-independent, rates, τ(c) and τ(e), that control the capture and emission of electrons by traps distributed over the oxide. Thus, models that consider calculations performed under time-dependent periodic capture and emission rates should be of interest in order to model more efficient devices. We show a complete theoretical description of a model that is capable of showing a noise reduction of current fluctuations in the time domain, and a reduction of the power spectral density in the frequency domain, in semiconductor devices as predicted by previous experimental work. We do so through numerical integrations and a novel Monte Carlo Markov chain (MCMC) algorithm based on microscopic discrete values. The proposed model also handles the ballistic regime, relevant in nano- and mesoscale devices. Finally, we show that the ballistic regime leads to nonlinearity in the electrical behaviour.

Discovery of Fe–Ce Oxide/BiVO 4 Photoanodes through Combinatorial Exploration of Ni–Fe–Co–Ce Oxide Coatings

DOE PAGES

Shinde, Aniketa; Guevarra, Dan; Liu, Guiji; ...

2016-08-23

An efficient photoanode is a prerequisite for a viable solar fuels technology. The challenges to realizing an efficient photoanode include the integration of a semiconductor light absorber and a metal oxide electrocatalyst to optimize corrosion protection, light trapping, hole transport, and photocarrier recombination sites. In order to efficiently explore metal oxide coatings, we employ a high throughput methodology wherein a uniform BiVO 4 film is coated with 858 unique metal oxide coatings covering a range of metal oxide loadings and the full (Ni-Fe-Co-Ce)Ox pseudo-quaternary composition space. Photoelectrochemical characterization of the photoanodes reveals that specific combinations of metal oxide composition andmore » loading provide up to a 13-fold increase in the maximum photoelectrochemical power generation for oxygen evolution in pH 13 electrolyte. Through mining of the high throughput data we identify composition regions that form improved interfaces with BiVO 4. Of particular note, integrated photoanodes with catalyst compositions in the range Fe (0.4-0.6)Ce (0.6-0.4)O x exhibit high interface quality and excellent photoelectrochemical power conversion. Furthermore, for scaled-up inkjet-printed electrodes and photoanodic electrodeposition of this composition on BiVO 4 we can confirm the discovery and the synthesis-independent interface improvement of (Fe-Ce)O x coatings on BiVO 4.« less

Discovery of Fe–Ce Oxide/BiVO 4 Photoanodes through Combinatorial Exploration of Ni–Fe–Co–Ce Oxide Coatings

DOE PAGES

Shinde, Aniketa; Guevarra, Dan; Liu, Guiji; ...

2016-08-23

An efficient photoanode is a prerequisite for a viable solar fuels technology. The challenges to realizing an efficient photoanode include the integration of a semiconductor light absorber and a metal oxide electrocatalyst to optimize corrosion protection, light trapping, hole transport, and photocarrier recombination sites. In order to efficiently explore metal oxide coatings, we employ a high throughput methodology wherein a uniform BiVO 4 film is coated with 858 unique metal oxide coatings covering a range of metal oxide loadings and the full (Ni-Fe-Co-Ce)O x pseudo-quaternary composition space. Photoelectrochemical characterization of the photoanodes reveals that specific combinations of metal oxide compositionmore » and loading provide up to a 13-fold increase in the maximum photoelectrochemical power generation for oxygen evolution in pH 13 electrolyte. Through mining of the high throughput data we identify composition regions that form improved interfaces with BiVO 4. Of particular note, integrated photoanodes with catalyst compositions in the range Fe (0.4-0.6)Ce (0.6-0.4)O x exhibit high interface quality and excellent photoelectrochemical power conversion. Furthermore, for scaled-up inkjet-printed electrodes and photoanodic electrodeposition of this composition on BiVO 4 we can confirm the discovery and the synthesis-independent interface improvement of (Fe-Ce)O x coatings on BiVO 4.« less

Potentials and challenges of integration for complex metal oxides in CMOS devices and beyond

NASA Astrophysics Data System (ADS)

Kim, Y.; Pham, C.; Chang, J. P.

2015-02-01

This review focuses on recent accomplishments on complex metal oxide based multifunctional materials and the potential they hold in advancing integrated circuits. It begins with metal oxide based high-κ materials to highlight the success of their integration since 45 nm complementary metal-oxide-semiconductor (CMOS) devices. By simultaneously offering a higher dielectric constant for improved capacitance as well as providing a thicker physical layer to prevent the quantum mechanical tunnelling of electrons, high-κ materials have enabled the continued down-scaling of CMOS based devices. The most recent technology driver has been the demand to lower device power consumption, which requires the design and synthesis of novel materials, such as complex metal oxides that exhibit remarkable tunability in their ferromagnetic, ferroelectric and multiferroic properties. These properties make them suitable for a wide variety of applications such as magnetoelectric random access memory, radio frequency band pass filters, antennae and magnetic sensors. Single-phase multiferroics, while rare, offer unique functionalities which have motivated much scientific and technological research to ascertain the origins of their multiferroicity and their applicability to potential devices. However, due to the weak magnetoelectric coupling for single-phase multiferroics, engineered multiferroic composites based on magnetostrictive ferromagnets interfacing piezoelectrics or ferroelectrics have shown enhanced multiferroic behaviour from effective strain coupling at the interface. In addition, nanostructuring of the ferroic phases has demonstrated further improvement in the coupling effect. Therefore, single-phase and engineered composite multiferroics consisting of complex metal oxides are reviewed in terms of magnetoelectric coupling effects and voltage controlled ferromagnetic properties, followed by a review on the integration challenges that need to be overcome to realize the materials’ full potential.

Metal-oxide-semiconductor devices using Ga2O3 dielectrics on n-type GaN

NASA Astrophysics Data System (ADS)

Lee, Ching-Ting; Chen, Hong-Wei; Lee, Hsin-Ying

2003-06-01

Using a photoelectrochemical method involving a He-Cd laser, Ga2O3 oxide layers were directly grown on n-type GaN. We demonstrated the performance of the resultant metal-oxide-semiconductor devices based on the grown Ga2O3 layer. An extremely low reverse leakage current of 200 pA was achieved when devices operated at -20 V. Furthermore, high forward and reverse breakdown electric fields of 2.80 MV/cm and 5.70 MV/cm, respectively, were obtained. Using a photoassisted current-voltage method, a low interface state density of 2.53×1011 cm-2 eV-1 was estimated. The varactor devices permit formation of inversion layers, so that they may be applied for the fabrication of metal-oxide-semiconductor field-effect transistors.

Selective etchant for oxide sacrificial material in semiconductor device fabrication

DOEpatents

Clews, Peggy J.; Mani, Seethambal S.

2005-05-17

An etching composition and method is disclosed for removing an oxide sacrificial material during manufacture of semiconductor devices including micromechanical, microelectromechanical or microfluidic devices. The etching composition and method are based on the combination of hydrofluoric acid (HF) and sulfuric acid (H.sub.2 SO.sub.4). These acids can be used in the ratio of 1:3 to 3:1 HF:H.sub.2 SO.sub.4 to remove all or part of the oxide sacrificial material while providing a high etch selectivity for non-oxide materials including polysilicon, silicon nitride and metals comprising aluminum. Both the HF and H.sub.2 SO.sub.4 can be provided as "semiconductor grade" acids in concentrations of generally 40-50% by weight HF, and at least 90% by weight H.sub.2 SO.sub.4.

A comparison of VLSI architecture of finite field multipliers using dual, normal or standard basis

NASA Technical Reports Server (NTRS)

Hsu, I. S.; Truong, T. K.; Shao, H. M.; Deutsch, L. J.; Reed, I. S.

1987-01-01

Three different finite field multipliers are presented: (1) a dual basis multiplier due to Berlekamp; (2) a Massy-Omura normal basis multiplier; and (3) the Scott-Tavares-Peppard standard basis multiplier. These algorithms are chosen because each has its own distinct features which apply most suitably in different areas. Finally, they are implemented on silicon chips with nitride metal oxide semiconductor technology so that the multiplier most desirable for very large scale integration implementations can readily be ascertained.

Wafer-to-wafer bonding of nonplanarized MEMS surfaces using solder

NASA Astrophysics Data System (ADS)

Sparks, D.; Queen, G.; Weston, R.; Woodward, G.; Putty, M.; Jordan, L.; Zarabadi, S.; Jayakar, K.

2001-11-01

The fabrication and reliability of a solder wafer-to-wafer bonding process is discussed. Using a solder reflow process allows vacuum packaging to be accomplished with unplanarized complementary metal-oxide semiconductor (CMOS) surface topography. This capability enables standard CMOS processes, and integrated microelectromechanical systems devices to be packaged at the chip-level. Alloy variations give this process the ability to bond at lower temperatures than most alternatives. Factors affecting hermeticity, shorts, Q values, shifting cavity pressure, wafer saw cleanliness and corrosion resistance will be covered.

Titanium disilicide formation by sputtering of titanium on heated silicon substrate

NASA Astrophysics Data System (ADS)

Tanielian, M.; Blackstone, S.

1984-09-01

We have sputter deposited titanium on bare silicon substrates at elevated temperatures. We find that at a substrate temperature of about 515 °C titanium silicide is formed due to the reaction of the titanium with the Si. The resistivity of the silicide is about 15 μΩ cm and it is not etchable in a selective titanium etch. This process can have applications in low-temperature, metal-oxide-semiconductor self-aligned silicide formation for very large scale integrated

Proceedings of the Workshop on Compound Semiconductor Devices and Integrated Circuits (13th) Held in Cabourg, France on 10-12 May 1989

DTIC Science & Technology

1989-05-12

USA Resonant tunneling transistors and New III-V memory devices for new circuit architectures with reduced complexity F. Capasso, Bell. Murray Hill...the evaporation, or by selective oxidation of As, leaving metallic Ga clusters and b) the interdiffusive deterioration of metal contacts on GaAs...VEB (My) Resonant Tunneling Transistors and New III-V Memory Devices for New Circuit Architectures with Reduced Complexity . Invited: F. Capasso

Nonvolatile programmable neural network synaptic array

NASA Technical Reports Server (NTRS)

Tawel, Raoul (Inventor)

1994-01-01

A floating-gate metal oxide semiconductor (MOS) transistor is implemented for use as a nonvolatile analog storage element of a synaptic cell used to implement an array of processing synaptic cells. These cells are based on a four-quadrant analog multiplier requiring both X and Y differential inputs, where one Y input is UV programmable. These nonvolatile synaptic cells are disclosed fully connected in a 32 x 32 synaptic cell array using standard very large scale integration (VLSI) complementary MOS (CMOS) technology.

Emerging memories: resistive switching mechanisms and current status

NASA Astrophysics Data System (ADS)

Jeong, Doo Seok; Thomas, Reji; Katiyar, R. S.; Scott, J. F.; Kohlstedt, H.; Petraru, A.; Hwang, Cheol Seong

2012-07-01

The resistance switching behaviour of several materials has recently attracted considerable attention for its application in non-volatile memory (NVM) devices, popularly described as resistive random access memories (RRAMs). RRAM is a type of NVM that uses a material(s) that changes the resistance when a voltage is applied. Resistive switching phenomena have been observed in many oxides: (i) binary transition metal oxides (TMOs), e.g. TiO2, Cr2O3, FeOx and NiO; (ii) perovskite-type complex TMOs that are variously functional, paraelectric, ferroelectric, multiferroic and magnetic, e.g. (Ba,Sr)TiO3, Pb(Zrx Ti1-x)O3, BiFeO3 and PrxCa1-xMnO3 (iii) large band gap high-k dielectrics, e.g. Al2O3 and Gd2O3; (iv) graphene oxides. In the non-oxide category, higher chalcogenides are front runners, e.g. In2Se3 and In2Te3. Hence, the number of materials showing this technologically interesting behaviour for information storage is enormous. Resistive switching in these materials can form the basis for the next generation of NVM, i.e. RRAM, when current semiconductor memory technology reaches its limit in terms of density. RRAMs may be the high-density and low-cost NVMs of the future. A review on this topic is of importance to focus concentration on the most promising materials to accelerate application into the semiconductor industry. This review is a small effort to realize the ambitious goal of RRAMs. Its basic focus is on resistive switching in various materials with particular emphasis on binary TMOs. It also addresses the current understanding of resistive switching behaviour. Moreover, a brief comparison between RRAMs and memristors is included. The review ends with the current status of RRAMs in terms of stability, scalability and switching speed, which are three important aspects of integration onto semiconductors.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dahal, Rajendra P.; Bhat, Ishwara B.; Chow, Tat-Sing

Methods for facilitating fabricating semiconductor structures are provided which include: providing a multilayer structure including a semiconductor layer, the semiconductor layer including a dopant and having an increased conductivity; selectively increasing, using electrochemical processing, porosity of the semiconductor layer, at least in part, the selectively increasing porosity utilizing the increased conductivity of the semiconductor layer; and removing, at least in part, the semiconductor layer with the selectively increased porosity from the multilayer structure. By way of example, the selectively increasing porosity may include selectively, anodically oxidizing, at least in part, the semiconductor layer of the multilayer structure.

Comparative analysis of breakdown mechanism in thin SiO2 oxide films in metal-oxide-semiconductor structures under the action of heavy charged particles and a pulsed voltage

NASA Astrophysics Data System (ADS)

Zinchenko, V. F.; Lavrent'ev, K. V.; Emel'yanov, V. V.; Vatuev, A. S.

2016-02-01

Regularities in the breakdown of thin SiO2 oxide films in metal-oxide-semiconductors structures of power field-effect transistors under the action of single heavy charged particles and a pulsed voltage are studied experimentally. Using a phenomenological approach, we carry out comparative analysis of physical mechanisms and energy criteria of the SiO2 breakdown in extreme conditions of excitation of the electron subsystem in the subpicosecond time range.

Erbium-doped zinc-oxide waveguide amplifiers for hybrid photonic integrated circuits

NASA Astrophysics Data System (ADS)

O'Neal, Lawrence; Anthony, Deion; Bonner, Carl; Geddis, Demetris

2016-02-01

CMOS logic circuits have entered the sub-100nm regime, and research is on-going to investigate the quantum effects that are apparent at this dimension. To avoid some of the constraints imposed by fabrication, entropy, energy, and interference considerations for nano-scale devices, many have begun designing hybrid and/or photonic integrated circuits. These circuits consist of transistors, light emitters, photodetectors, and electrical and optical waveguides. As attenuation is a limiting factor in any communications system, it is advantageous to integrate a signal amplifier. There are numerous examples of electrical amplifiers, but in order to take advantage of the benefits provided by optically integrated systems, optical amplifiers are necessary. The erbium doped fiber amplifier is an example of an optical amplifier which is commercially available now, but the distance between the amplifier and the device benefitting from amplification can be decreased and provide greater functionality by providing local, on-chip amplification. Zinc oxide is an attractive material due to its electrical and optical properties. Its wide bandgap (≍3.4 eV) and high refractive index (≍2) make it an excellent choice for integrated optics systems. Moreover, erbium doped zinc oxide (Er:ZnO) is a suitable candidate for optical waveguide amplifiers because of its compatibility with semiconductor processing technology, 1.54 μm luminescence, transparency, low resistivity, and amplification characteristics. This research presents the characterization of radio frequency magnetron sputtered Er:ZnO, the design and fabrication of integrated waveguide amplifiers, and device analysis.

Subwavelength InSb-based Slot wavguides for THz transport: concept and practical implementations.

PubMed

Ma, Youqiao; Zhou, Jun; Pištora, Jaromír; Eldlio, Mohamed; Nguyen-Huu, Nghia; Maeda, Hiroshi; Wu, Qiang; Cada, Michael

2016-12-07

Seeking better surface plasmon polariton (SPP) waveguides is of critical importance to construct the frequency-agile terahertz (THz) front-end circuits. We propose and investigate here a new class of semiconductor-based slot plasmonic waveguides for subwavelength THz transport. Optimizations of the key geometrical parameters demonstrate its better guiding properties for simultaneous realization of long propagation lengths (up to several millimeters) and ultra-tight mode confinement (~λ 2 /530) in the THz spectral range. The feasibility of the waveguide for compact THz components is also studied to lay the foundations for its practical implementations. Importantly, the waveguide is compatible with the current complementary metal-oxide-semiconductor (CMOS) fabrication technique. We believe the proposed waveguide configuration could offer a potential for developing a CMOS plasmonic platform and can be designed into various components for future integrated THz circuits (ITCs).

Semiconductor structures having electrically insulating and conducting portions formed from an AlSb-alloy layer

DOEpatents

Spahn, O.B.; Lear, K.L.

1998-03-10

The semiconductor structure comprises a plurality of semiconductor layers formed on a substrate including at least one layer of a III-V compound semiconductor alloy comprising aluminum (Al) and antimony (Sb), with at least a part of the AlSb-alloy layer being chemically converted by an oxidation process to form superposed electrically insulating and electrically conducting portions. The electrically insulating portion formed from the AlSb-alloy layer comprises an oxide of aluminum (e.g., Al{sub 2}O{sub 3}), while the electrically conducting portion comprises Sb. A lateral oxidation process allows formation of the superposed insulating and conducting portions below monocrystalline semiconductor layers for forming many different types of semiconductor structures having particular utility for optoelectronic devices such as light-emitting diodes, edge-emitting lasers, vertical-cavity surface-emitting lasers, photodetectors and optical modulators (waveguide and surface normal), and for electronic devices such as heterojunction bipolar transistors, field-effect transistors and quantum-effect devices. The invention is expected to be particularly useful for forming light-emitting devices for use in the 1.3--1.6 {mu}m wavelength range, with the AlSb-alloy layer acting to define an active region of the device and to effectively channel an electrical current therein for efficient light generation. 10 figs.

Nano-Multiplication-Region Avalanche Photodiodes and Arrays

NASA Technical Reports Server (NTRS)

Zheng, Xinyu; Pain, Bedabrata; Cunningham, Thomas

2008-01-01

Nano-multiplication-region avalanche photodiodes (NAPDs), and imaging arrays of NAPDs integrated with complementary metal oxide/semiconductor (CMOS) active-pixel-sensor integrated circuitry, are being developed for applications in which there are requirements for high-sensitivity (including photoncounting) detection and imaging at wavelengths from about 250 to 950 nm. With respect to sensitivity and to such other characteristics as speed, geometric array format, radiation hardness, power demand of associated circuitry, size, weight, and robustness, NAPDs and arrays thereof are expected to be superior to prior photodetectors and arrays including CMOS active-pixel sensors (APSs), charge-coupled devices (CCDs), traditional APDs, and microchannelplate/ CCD combinations. Figure 1 depicts a conceptual NAPD array, integrated with APS circuitry, fabricated on a thick silicon-on-insulator wafer (SOI). Figure 2 presents selected aspects of the structure of a typical single pixel, which would include a metal oxide/semiconductor field-effect transistor (MOSFET) integrated with the NAPD. The NAPDs would reside in silicon islands formed on the buried oxide (BOX) layer of the SOI wafer. The silicon islands would be surrounded by oxide-filled insulation trenches, which, together with the BOX layer, would constitute an oxide embedding structure. There would be two kinds of silicon islands: NAPD islands for the NAPDs and MOSFET islands for in-pixel and global CMOS circuits. Typically, the silicon islands would be made between 5 and 10 m thick, but, if necessary, the thickness could be chosen outside this range. The side walls of the silicon islands would be heavily doped with electron-acceptor impurities (p+-doped) to form anodes for the photodiodes and guard layers for the MOSFETs. A nanoscale reach-through structure at the front (top in the figures) central position of each NAPD island would contain the APD multiplication region. Typically, the reach-through structure would be about 0.1 microns in diameter and between 0.3 and 0.4 nm high. The top layer in the reach-through structure would be heavily doped with electron-donor impurities (n+-doped) to make it act as a cathode. A layer beneath the cathode, between 0.1 and 0.2 nm thick, would be p-doped to a concentration .10(exp 17)cu cm. A thin n+-doped polysilicon pad would be formed on the top of the cathode to protect the cathode against erosion during a metal-silicon alloying step that would be part of the process of fabricating the array.

Development of p-type oxide semiconductors based on tin oxide and its alloys: application to thin film transistors

NASA Astrophysics Data System (ADS)

Barros, Ana Raquel Xarouco de

In spite of the recent p-type oxide TFTs developments based on SnOx and CuxO, the results achieved so far refer to devices processed at high temperatures and are limited by a low hole mobility and a low On-Off ratio and still there is no report on p-type oxide TFTs with performance similar to n-type, especially when comparing their field-effect mobility values, which are at least one order of magnitude higher on n-type oxide TFTs. Achieving high performance p-type oxide TFTs will definitely promote a new era for electronics in rigid and flexible substrates, away from silicon. None of the few reported p-channel oxide TFTs is suitable for practical applications, which demand significant improvements in the device engineering to meet the real-world electronic requirements, where low processing temperatures together with high mobility and high On-Off ratio are required for TFT and CMOS applications. The present thesis focuses on the study and optimization of p-type thin film transistors based on oxide semiconductors deposited by r.f. magnetron sputtering without intentional substrate heating. In this work several p-type oxide semiconductors were studied and optimized based on undoped tin oxide, Cu-doped SnOx and In-doped SnO2.

Accuracy of dielectric-dependent hybrid functionals in the prediction of optoelectronic properties of metal oxide semiconductors: a comprehensive comparison with many-body GW and experiments

NASA Astrophysics Data System (ADS)

Gerosa, M.; E Bottani, C.; Di Valentin, C.; Onida, G.; Pacchioni, G.

2018-01-01

Understanding the electronic structure of metal oxide semiconductors is crucial to their numerous technological applications, such as photoelectrochemical water splitting and solar cells. The needed experimental and theoretical knowledge goes beyond that of pristine bulk crystals, and must include the effects of surfaces and interfaces, as well as those due to the presence of intrinsic defects (e.g. oxygen vacancies), or dopants for band engineering. In this review, we present an account of the recent efforts in predicting and understanding the optoelectronic properties of oxides using ab initio theoretical methods. In particular, we discuss the performance of recently developed dielectric-dependent hybrid functionals, providing a comparison against the results of many-body GW calculations, including G 0 W 0 as well as more refined approaches, such as quasiparticle self-consistent GW. We summarize results in the recent literature for the band gap, the band level alignment at surfaces, and optical transition energies in defective oxides, including wide gap oxide semiconductors and transition metal oxides. Correlated transition metal oxides are also discussed. For each method, we describe successes and drawbacks, emphasizing the challenges faced by the development of improved theoretical approaches. The theoretical section is preceded by a critical overview of the main experimental techniques needed to characterize the optoelectronic properties of semiconductors, including absorption and reflection spectroscopy, photoemission, and scanning tunneling spectroscopy (STS).

MCT/MOSFET Switch

NASA Technical Reports Server (NTRS)

Rippel, Wally E.

1990-01-01

Metal-oxide/semiconductor-controlled thyristor (MCT) and metal-oxide/semiconductor field-effect transistor (MOSFET) connected in switching circuit to obtain better performance. Offers high utilization of silicon, low forward voltage drop during "on" period of operating cycle, fast turnon and turnoff, and large turnoff safe operating area. Includes ability to operate at high temperatures, high static blocking voltage, and ease of drive.

General Observation of Photocatalytic Oxygen Reduction to Hydrogen Peroxide by Organic Semiconductor Thin Films and Colloidal Crystals.

PubMed

Gryszel, Maciej; Sytnyk, Mykhailo; Jakešová, Marie; Romanazzi, Giuseppe; Gabrielsson, Roger; Heiss, Wolfgang; Głowacki, Eric Daniel

2018-04-25

Low-cost semiconductor photocatalysts offer unique possibilities for industrial chemical transformations and energy conversion applications. We report that a range of organic semiconductors are capable of efficient photocatalytic oxygen reduction to H 2 O 2 in aqueous conditions. These semiconductors, in the form of thin films, support a 2-electron/2-proton redox cycle involving photoreduction of dissolved O 2 to H 2 O 2 , with the concurrent photooxidation of organic substrates: formate, oxalate, and phenol. Photochemical oxygen reduction is observed in a pH range from 2 to 12. In cases where valence band energy of the semiconductor is energetically high, autoxidation competes with oxidation of the donors, and thus turnover numbers are low. Materials with deeper valence band energies afford higher stability and also oxidation of H 2 O to O 2 . We found increased H 2 O 2 evolution rate for surfactant-stabilized nanoparticles versus planar thin films. These results evidence that photochemical O 2 reduction may be a widespread feature of organic semiconductors, and open potential avenues for organic semiconductors for catalytic applications.

High-mobility BaSnO 3 grown by oxide molecular beam epitaxy

DOE PAGES

Raghavan, Santosh; Schumann, Timo; Kim, Honggyu; ...

2016-01-28

High-mobility perovskite BaSnO 3 films are of significant interest as newwide bandgap semiconductors for power electronics, transparent conductors, and as high mobility channels for epitaxial integration with functional perovskites. Despite promising results for single crystals, high-mobility BaSnO 3 films have been challenging to grow. Here, we demonstrate a modified oxide molecular beam epitaxy (MBE) approach, which supplies pre-oxidized SnO x. This technique addresses issues in the MBE of ternary stannates related to volatile SnO formation and enables growth of epitaxial, stoichiometric BaSnO 3. We demonstrate room temperature electron mobilities of 150 cm 2 V -1 s -1 in films grownmore » on PrScO 3. Lastly, the results open up a wide range of opportunities for future electronic devices.« less

Zinc oxide and related compounds: order within the disorder

NASA Astrophysics Data System (ADS)

Martins, R.; Pereira, Luisa; Barquinha, P.; Ferreira, I.; Prabakaran, R.; Goncalves, G.; Goncalves, A.; Fortunato, E.

2009-02-01

This paper discusses the effect of order and disorder on the electrical and optical performance of ionic oxide semiconductors based on zinc oxide. These materials are used as active thin films in electronic devices such as pn heterojunction solar cells and thin-film transistors. Considering the expected conduction mechanism in ordered and disordered semiconductors the role of the spherical symmetry of the s electron conduction bands will be analyzed and compared to covalent semiconductors. The obtained results show p-type c-Si/a-IZO/poly-ZGO solar cells exhibiting efficiencies above 14%, in device areas of about 2.34 cm2. Amorphous oxide TFTs based on the Ga-Zn-Sn-O system demonstrate superior performance than the polycrystalline TFTs based on ZnO, translated by ION/IOFF ratio exceeding 107, turn-on voltage below 1-2 V and saturation mobility above 25 cm2/Vs. Apart from that, preliminary data on p-type oxide TFT based on the Zn-Cu-O system will also be presented.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Grisi, Marco, E-mail: marco.grisi@epfl.ch; Gualco, Gabriele; Boero, Giovanni

In this article, we present an integrated broadband complementary metal-oxide semiconductor single-chip transceiver suitable for the realization of multi-nuclear pulsed nuclear magnetic resonance (NMR) probes. The realized single-chip transceiver can be interfaced with on-chip integrated microcoils or external LC resonators operating in the range from 1 MHz to 1 GHz. The dimension of the chip is about 1 mm{sup 2}. It consists of a radio-frequency (RF) power amplifier, a low-noise RF preamplifier, a frequency mixer, an audio-frequency amplifier, and fully integrated transmit-receive switches. As specific example, we show its use for multi-nuclear NMR spectroscopy. With an integrated coil of aboutmore » 150 μm external diameter, a {sup 1}H spin sensitivity of about 1.5 × 10{sup 13} spins/Hz{sup 1/2} is achieved at 7 T.« less

Graphene radio frequency receiver integrated circuit.

PubMed

Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A; Haensch, Wilfried

2014-01-01

Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm(2) area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.

Graphene radio frequency receiver integrated circuit

NASA Astrophysics Data System (ADS)

Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A.; Haensch, Wilfried

2014-01-01

Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm2 area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.

Mechanistic insights into chemical and photochemical transformations of bismuth vanadate photoanodes

PubMed Central

Toma, Francesca M.; Cooper, Jason K.; Kunzelmann, Viktoria; McDowell, Matthew T.; Yu, Jie; Larson, David M.; Borys, Nicholas J.; Abelyan, Christine; Beeman, Jeffrey W.; Yu, Kin Man; Yang, Jinhui; Chen, Le; Shaner, Matthew R.; Spurgeon, Joshua; Houle, Frances A.; Persson, Kristin A.; Sharp, Ian D.

2016-01-01

Artificial photosynthesis relies on the availability of semiconductors that are chemically stable and can efficiently capture solar energy. Although metal oxide semiconductors have been investigated for their promise to resist oxidative attack, materials in this class can suffer from chemical and photochemical instability. Here we present a methodology for evaluating corrosion mechanisms and apply it to bismuth vanadate, a state-of-the-art photoanode. Analysis of changing morphology and composition under solar water splitting conditions reveals chemical instabilities that are not predicted from thermodynamic considerations of stable solid oxide phases, as represented by the Pourbaix diagram for the system. Computational modelling indicates that photoexcited charge carriers accumulated at the surface destabilize the lattice, and that self-passivation by formation of a chemically stable surface phase is kinetically hindered. Although chemical stability of metal oxides cannot be assumed, insight into corrosion mechanisms aids development of protection strategies and discovery of semiconductors with improved stability. PMID:27377305

Enhanced biosensing resolution with foundry fabricated individually addressable dual-gated ISFETs.

PubMed

Duarte-Guevara, Carlos; Lai, Fei-Lung; Cheng, Chun-Wen; Reddy, Bobby; Salm, Eric; Swaminathan, Vikhram; Tsui, Ying-Kit; Tuan, Hsiao Chin; Kalnitsky, Alex; Liu, Yi-Shao; Bashir, Rashid

2014-08-19

The adaptation of semiconductor technologies for biological applications may lead to a new era of inexpensive, sensitive, and portable diagnostics. At the core of these developing technologies is the ion-sensitive field-effect transistor (ISFET), a biochemical to electrical transducer with seamless integration to electronic systems. We present a novel structure for a true dual-gated ISFET that is fabricated with a silicon-on-insulator (SOI) complementary metal-oxide-semiconductor process by Taiwan Semiconductor Manufacturing Company (TSMC). In contrast to conventional SOI ISFETs, each transistor has an individually addressable back-gate and a gate oxide that is directly exposed to the solution. The elimination of the commonly used floating gate architecture reduces the chance of electrostatic discharge and increases the potential achievable transistor density. We show that when operated in a "dual-gate" mode, the transistor response can exhibit sensitivities to pH changes beyond the Nernst limit. This enhancement in sensitivity was shown to increase the sensor's signal-to-noise ratio, allowing the device to resolve smaller pH changes. An improved resolution can be used to enhance small signals and increase the sensor accuracy when monitoring small pH dynamics in biological reactions. As a proof of concept, we demonstrate that the amplified sensitivity and improved resolution result in a shorter detection time and a larger output signal of a loop-mediated isothermal DNA amplification reaction (LAMP) targeting a pathogenic bacteria gene, showing benefits of the new structure for biosensing applications.

Nanophotonic Hot Electron Solar-Blind Ultraviolet Detectors with a Metal-Oxide-Semiconductor Structure

NASA Astrophysics Data System (ADS)

Wang, Zhiyuan

Solar-blind ultraviolet detection refers to photon detection specifically in the wavelength range of 200 nm to 320 nm. Without background noises from solar radiation, it has broad applications from homeland security to environmental monitoring. In this thesis, we design and fabricate a nanophotonic metal-oxide-semiconductor device for solar-blind UV detection. Instead of using semiconductors as the active absorber, we use metal Sn nano- grating structures to absorb UV photons and generate hot electrons for internal photoemission across the Sn/SiO 2 interfacial barrier, thereby generating photocurrent between metal and semiconductor region upon UV excitation. The large metal/oxide interfacial energy barrier enables solar-blind UV detection by blocking the less energetic electrons excited by visible photons. With optimized design, 85% UV absorption and hot electron excitation can be achieved within the mean free path of 20 nm from the metal/oxide interface. This feature greatly enhances hot electron transport across the interfacial barrier to generate photocurrent. Various fabrication techniques have been developed for preparing nano gratings. For nominally 20 nm-thick deposited Sn, the self- formed pseudo-periodic nanostructure help achieve 75% UV absorption from lambda=200 nm to 300 nm. With another layer of nominally 20 nm-thick Sn, similar UV absorption is maintained while conductivity is improved, which is beneficial for overall device efficiency. The Sn/SiO2/Si MOS devices show good solar-blind character while achieving 13% internal quantum efficiency for 260 nm UV with only 20 nm-thick Sn and some devices demonstrate much higher (even >100%) internal quantum efficiency. While a more accurate estimation of device effective area is needed for proving our calculation, these results indeed show a great potential for this type of hot-electron-based photodetectors and for Sn nanostructure as an effective UV absorber. The simple geometry of the self- assembled Sn nano-gratings and MOS structure make this novel type of device easy to fabricate and integrate with Si ROICs compared to existing solar-blind UV detection schemes. The presented device structure also breaks through the conventional notion that photon absorption by metal is always a loss in solid-state photodetectors, and it can potentially be extended to other active metal photonic devices.

Technology of GaAs metal-oxide-semiconductor solar cells

NASA Technical Reports Server (NTRS)

Stirn, R. J.; Yeh, Y. C. M.

1977-01-01

The growth of an oxide interfacial layer was recently found to increase the open-circuit voltage (OCV) and efficiency by up to 60 per cent in GaAs metal-semiconductor solar cells. Details of oxidation techniques to provide the necessary oxide thickness and chemical structure and using ozone, water-vapor-saturated oxygen, or oxygen gas discharges are described, as well as apparent crystallographic orientation effects. Preliminary results of the oxide chemistry obtained from X-ray, photoelectron spectroscopy are given. Ratios of arsenic oxide to gallium oxide of unity or less seem to be preferable. Samples with the highest OVC predominantly have As(+3) in the arsenic oxide rather than As(+5). A major difficulty at this time is a reduction in OCV by 100-200 mV when the antireflection coating is vacuum deposited.

An Ultrasensitive Organic Semiconductor NO2 Sensor Based on Crystalline TIPS-Pentacene Films.

PubMed

Wang, Zi; Huang, Lizhen; Zhu, Xiaofei; Zhou, Xu; Chi, Lifeng

2017-10-01

Organic semiconductor gas sensor is one of the promising candidates of room temperature operated gas sensors with high selectivity. However, for a long time the performance of organic semiconductor sensors, especially for the detection of oxidizing gases, is far behind that of the traditional metal oxide gas sensors. Although intensive attempts have been made to address the problem, the performance and the understanding of the sensing mechanism are still far from sufficient. Herein, an ultrasensitive organic semiconductor NO 2 sensor based on 6,13-bis(triisopropylsilylethynyl)-pentacene (TIPS-petacene) is reported. The device achieves a sensitivity over 1000%/ppm and fast response/recovery, together with a low limit of detection (LOD) of 20 ppb, all of which reach the level of metal oxide sensors. After a comprehensive analysis on the morphology and electrical properties of the organic films, it is revealed that the ultrahigh performance is largely related to the film charge transport ability, which was less concerned in the studies previously. And the combination of efficient charge transport and low original charge carrier concentration is demonstrated to be an effective access to obtain high performance organic semiconductor gas sensors. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Neutral- and Multi-Colored Semitransparent Perovskite Solar Cells.

PubMed

Lee, Kyu-Tae; Guo, L Jay; Park, Hui Joon

2016-04-11

In this review, we summarize recent works on perovskite solar cells with neutral- and multi-colored semitransparency for building-integrated photovoltaics and tandem solar cells. The perovskite solar cells exploiting microstructured arrays of perovskite "islands" and transparent electrodes-the latter of which include thin metallic films, metal nanowires, carbon nanotubes, graphenes, and transparent conductive oxides for achieving optical transparency-are investigated. Moreover, the perovskite solar cells with distinctive color generation, which are enabled by engineering the band gap of the perovskite light-harvesting semiconductors with chemical management and integrating with photonic nanostructures, including microcavity, are discussed. We conclude by providing future research directions toward further performance improvements of the semitransparent perovskite solar cells.

On-Chip Optical Nonreciprocity Using an Active Microcavity

PubMed Central

Jiang, Xiaoshun; Yang, Chao; Wu, Hongya; Hua, Shiyue; Chang, Long; Ding, Yang; Hua, Qian; Xiao, Min

2016-01-01

Optically nonreciprocal devices provide critical functionalities such as light isolation and circulation in integrated photonic circuits for optical communications and information processing, but have been difficult to achieve. By exploring gain-saturation nonlinearity, we demonstrate on-chip optical nonreciprocity with excellent isolation performance within telecommunication wavelengths using only one toroid microcavity. Compatible with current complementary metal-oxide-semiconductor process, our compact and simple scheme works for a very wide range of input power levels from ~10 microwatts down to ~10 nanowatts, and exhibits remarkable properties of one-way light transport with sufficiently low insertion loss. These superior features make our device become a promising critical building block indispensable for future integrated nanophotonic networks. PMID:27958356

A molybdenum disulfide/carbon nanotube heterogeneous complementary inverter.

PubMed

Huang, Jun; Somu, Sivasubramanian; Busnaina, Ahmed

2012-08-24

We report a simple, bottom-up/top-down approach for integrating drastically different nanoscale building blocks to form a heterogeneous complementary inverter circuit based on layered molybdenum disulfide and carbon nanotube (CNT) bundles. The fabricated CNT/MoS(2) inverter is composed of n-type molybdenum disulfide (MOS(2)) and p-type CNT transistors, with a high voltage gain of 1.3. The CNT channels are fabricated using directed assembly while the layered molybdenum disulfide channels are fabricated by mechanical exfoliation. This bottom-up fabrication approach for integrating various nanoscale elements with unique characteristics provides an alternative cost-effective methodology to complementary metal-oxide-semiconductors, laying the foundation for the realization of high performance logic circuits.

Monolithic integration of SOI waveguide photodetectors and transimpedance amplifiers

NASA Astrophysics Data System (ADS)

Li, Shuxia; Tarr, N. Garry; Ye, Winnie N.

2018-02-01

In the absence of commercial foundry technologies offering silicon-on-insulator (SOI) photonics combined with Complementary Metal Oxide Semiconductor (CMOS) transistors, monolithic integration of conventional electronics with SOI photonics is difficult. Here we explore the implementation of lateral bipolar junction transistors (LBJTs) and Junction Field Effect Transistors (JFETs) in a commercial SOI photonics technology lacking MOS devices but offering a variety of n- and p-type ion implants intended to provide waveguide modulators and photodetectors. The fabrication makes use of the commercial Institute of Microelectronics (IME) SOI photonics technology. Based on knowledge of device doping and geometry, simple compact LBJT and JFET device models are developed. These models are then used to design basic transimpedance amplifiers integrated with optical waveguides. The devices' experimental current-voltage characteristics results are reported.

Graphitic design: prospects of graphene-based nanocomposites for solar energy conversion, storage, and sensing.

PubMed

Lightcap, Ian V; Kamat, Prashant V

2013-10-15

Graphene not only possesses interesting electrochemical behavior but also has a remarkable surface area and mechanical strength and is naturally abundant, all advantageous properties for the design of tailored composite materials. Graphene-semiconductor or -metal nanoparticle composites have the potential to function as efficient, multifunctional materials for energy conversion and storage. These next-generation composite systems could possess the capability to integrate conversion and storage of solar energy, detection, and selective destruction of trace environmental contaminants or achieve single-substrate, multistep heterogeneous catalysis. These advanced materials may soon become a reality, based on encouraging results in the key areas of energy conversion and sensing using graphene oxide as a support structure. Through recent advances, chemists can now integrate such processes on a single substrate while using synthetic designs that combine simplicity with a high degree of structural and composition selectivity. This progress represents the beginning of a transformative movement leveraging the advancements of single-purpose chemistry toward the creation of composites designed to address whole-process applications. The promising field of graphene nanocomposites for sensing and energy applications is based on fundamental studies that explain the electronic interactions between semiconductor or metal nanoparticles and graphene. In particular, reduced graphene oxide is a suitable composite substrate because of its two-dimensional structure, outstanding surface area, and electrical conductivity. In this Account, we describe common assembly methods for graphene composite materials and examine key studies that characterize its excited state interactions. We also discuss strategies to develop graphene composites and control electron capture and transport through the 2D carbon network. In addition, we provide a brief overview of advances in sensing, energy conversion, and storage applications that incorporate graphene-based composites. With these results in mind, we can envision a new class of semiconductor- or metal-graphene composites sensibly tailored to address the pressing need for advanced energy conversion and storage devices.

Deformable devices with integrated functional nanomaterials for wearable electronics.

PubMed

Kim, Jaemin; Lee, Jongsu; Son, Donghee; Choi, Moon Kee; Kim, Dae-Hyeong

2016-01-01

As the market and related industry for wearable electronics dramatically expands, there are continuous and strong demands for flexible and stretchable devices to be seamlessly integrated with soft and curvilinear human skin or clothes. However, the mechanical mismatch between the rigid conventional electronics and the soft human body causes many problems. Therefore, various prospective nanomaterials that possess a much lower flexural rigidity than their bulk counterparts have rapidly established themselves as promising electronic materials replacing rigid silicon and/or compound semiconductors in next-generation wearable devices. Many hybrid structures of multiple nanomaterials have been also developed to pursue both high performance and multifunctionality. Here, we provide an overview of state-of-the-art wearable devices based on one- or two-dimensional nanomaterials (e.g., carbon nanotubes, graphene, single-crystal silicon and oxide nanomembranes, organic nanomaterials and their hybrids) in combination with zero-dimensional functional nanomaterials (e.g., metal/oxide nanoparticles and quantum dots). Starting from an introduction of materials strategies, we describe device designs and the roles of individual ones in integrated systems. Detailed application examples of wearable sensors/actuators, memories, energy devices, and displays are also presented.

Deformable devices with integrated functional nanomaterials for wearable electronics

NASA Astrophysics Data System (ADS)

Kim, Jaemin; Lee, Jongsu; Son, Donghee; Choi, Moon Kee; Kim, Dae-Hyeong

2016-03-01

As the market and related industry for wearable electronics dramatically expands, there are continuous and strong demands for flexible and stretchable devices to be seamlessly integrated with soft and curvilinear human skin or clothes. However, the mechanical mismatch between the rigid conventional electronics and the soft human body causes many problems. Therefore, various prospective nanomaterials that possess a much lower flexural rigidity than their bulk counterparts have rapidly established themselves as promising electronic materials replacing rigid silicon and/or compound semiconductors in next-generation wearable devices. Many hybrid structures of multiple nanomaterials have been also developed to pursue both high performance and multifunctionality. Here, we provide an overview of state-of-the-art wearable devices based on one- or two-dimensional nanomaterials (e.g., carbon nanotubes, graphene, single-crystal silicon and oxide nanomembranes, organic nanomaterials and their hybrids) in combination with zero-dimensional functional nanomaterials (e.g., metal/oxide nanoparticles and quantum dots). Starting from an introduction of materials strategies, we describe device designs and the roles of individual ones in integrated systems. Detailed application examples of wearable sensors/actuators, memories, energy devices, and displays are also presented.

Method of photocatalytic conversion of C-H organics

DOEpatents

Camaioni, Donald M.; Lilga, Michael A.

1998-01-01

The present invention is the addition of a semiconductor material and energy to the reaction mixture of organic, acid (for example, trifluoroacetate), and oxygen. A transition metal ion may be added to the reaction mixture. The semiconductor material converts energy to oxidants thereby promoting oxidation of the organic. Alternatively, using metal in combination with exposure to light may be used.

Method of photocatalytic conversion of C-H organics

DOEpatents

Camaioni, D.M.; Lilga, M.A.

1998-01-13

The present invention is the addition of a semiconductor material and energy to the reaction mixture of organic, acid (for example, trifluoroacetate), and oxygen. A transition metal ion may be added to the reaction mixture. The semiconductor material converts energy to oxidants thereby promoting oxidation of the organic. Alternatively, using metal in combination with exposure to light may be used.

High performance printed oxide field-effect transistors processed using photonic curing.

PubMed

Garlapati, Suresh Kumar; Marques, Gabriel Cadilha; Gebauer, Julia Susanne; Dehm, Simone; Bruns, Michael; Winterer, Markus; Tahoori, Mehdi Baradaran; Aghassi-Hagmann, Jasmin; Hahn, Horst; Dasgupta, Subho

2018-06-08

Oxide semiconductors are highly promising candidates for the most awaited, next-generation electronics, namely, printed electronics. As a fabrication route for the solution-processed/printed oxide semiconductors, photonic curing is becoming increasingly popular, as compared to the conventional thermal curing method; the former offers numerous advantages over the latter, such as low process temperatures and short exposure time and thereby, high throughput compatibility. Here, using dissimilar photonic curing concepts (UV-visible light and UV-laser), we demonstrate facile fabrication of high performance In 2 O 3 field-effect transistors (FETs). Beside the processing related issues (temperature, time etc.), the other known limitation of oxide electronics is the lack of high performance p-type semiconductors, which can be bypassed using unipolar logics from high mobility n-type semiconductors alone. Interestingly, here we have found that our chosen distinct photonic curing methods can offer a large variation in threshold voltage, when they are fabricated from the same precursor ink. Consequently, both depletion and enhancement-mode devices have been achieved which can be used as the pull-up and pull-down transistors in unipolar inverters. The present device fabrication recipe demonstrates fast processing of low operation voltage, high performance FETs with large threshold voltage tunability.

Platinum nanoparticles on gallium nitride surfaces: effect of semiconductor doping on nanoparticle reactivity.

PubMed

Schäfer, Susanne; Wyrzgol, Sonja A; Caterino, Roberta; Jentys, Andreas; Schoell, Sebastian J; Hävecker, Michael; Knop-Gericke, Axel; Lercher, Johannes A; Sharp, Ian D; Stutzmann, Martin

2012-08-01

Platinum nanoparticles supported on n- and p-type gallium nitride (GaN) are investigated as novel hybrid systems for the electronic control of catalytic activity via electronic interactions with the semiconductor support. In situ oxidation and reduction were studied with high pressure photoemission spectroscopy. The experiments revealed that the underlying wide-band-gap semiconductor has a large influence on the chemical composition and oxygen affinity of supported nanoparticles under X-ray irradiation. For as-deposited Pt cuboctahedra supported on n-type GaN, a higher fraction of oxidized surface atoms was observed compared to cuboctahedral particles supported on p-type GaN. Under an oxygen atmosphere, immediate oxidation was recorded for nanoparticles on n-type GaN, whereas little oxidation was observed for nanoparticles on p-type GaN. Together, these results indicate that changes in the Pt chemical state under X-ray irradiation depend on the type of GaN doping. The strong interaction between the nanoparticles and the support is consistent with charge transfer of X-ray photogenerated free carriers at the semiconductor-nanoparticle interface and suggests that GaN is a promising wide-band-gap support material for photocatalysis and electronic control of catalysis.

High performance printed oxide field-effect transistors processed using photonic curing

NASA Astrophysics Data System (ADS)

Garlapati, Suresh Kumar; Cadilha Marques, Gabriel; Gebauer, Julia Susanne; Dehm, Simone; Bruns, Michael; Winterer, Markus; Baradaran Tahoori, Mehdi; Aghassi-Hagmann, Jasmin; Hahn, Horst; Dasgupta, Subho

2018-06-01

Oxide semiconductors are highly promising candidates for the most awaited, next-generation electronics, namely, printed electronics. As a fabrication route for the solution-processed/printed oxide semiconductors, photonic curing is becoming increasingly popular, as compared to the conventional thermal curing method; the former offers numerous advantages over the latter, such as low process temperatures and short exposure time and thereby, high throughput compatibility. Here, using dissimilar photonic curing concepts (UV–visible light and UV-laser), we demonstrate facile fabrication of high performance In2O3 field-effect transistors (FETs). Beside the processing related issues (temperature, time etc.), the other known limitation of oxide electronics is the lack of high performance p-type semiconductors, which can be bypassed using unipolar logics from high mobility n-type semiconductors alone. Interestingly, here we have found that our chosen distinct photonic curing methods can offer a large variation in threshold voltage, when they are fabricated from the same precursor ink. Consequently, both depletion and enhancement-mode devices have been achieved which can be used as the pull-up and pull-down transistors in unipolar inverters. The present device fabrication recipe demonstrates fast processing of low operation voltage, high performance FETs with large threshold voltage tunability.

Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping

PubMed Central

Rossi, Alessandro; Tanttu, Tuomo; Hudson, Fay E.; Sun, Yuxin; Möttönen, Mikko; Dzurak, Andrew S.

2015-01-01

As mass-produced silicon transistors have reached the nano-scale, their behavior and performances are increasingly affected, and often deteriorated, by quantum mechanical effects such as tunneling through single dopants, scattering via interface defects, and discrete trap charge states. However, progress in silicon technology has shown that these phenomena can be harnessed and exploited for a new class of quantum-based electronics. Among others, multi-layer-gated silicon metal-oxide-semiconductor (MOS) technology can be used to control single charge or spin confined in electrostatically-defined quantum dots (QD). These QD-based devices are an excellent platform for quantum computing applications and, recently, it has been demonstrated that they can also be used as single-electron pumps, which are accurate sources of quantized current for metrological purposes. Here, we discuss in detail the fabrication protocol for silicon MOS QDs which is relevant to both quantum computing and quantum metrology applications. Moreover, we describe characterization methods to test the integrity of the devices after fabrication. Finally, we give a brief description of the measurement set-up used for charge pumping experiments and show representative results of electric current quantization. PMID:26067215

TiOx-based thin-film transistors prepared by femtosecond laser pre-annealing

NASA Astrophysics Data System (ADS)

Shan, Fei; Kim, Sung-Jin

2018-02-01

We report on thin-film transistors (TFTs) based on titanium oxide (TiOx) prepared using femtosecond laser pre-annealing for electrical application of n-type channel oxide transparent TFTs. Amorphous TFTs using TiOx semiconductors as an active layer have a low-temperature process and show remarkable electrical performance. And the femtosecond laser pre-annealing process has greater flexibility and development space for semiconductor production activity, with a fast preparation method. TFTs with a TiOx semiconductor pre-annealed via femtosecond laser at 3 W have a pinhole-free and smooth surface without crystal grains.

Nanocrystal structures

DOEpatents

Eisler, Hans J [Stoneham, MA; Sundar, Vikram C [Stoneham, MA; Walsh, Michael E [Everett, MA; Klimov, Victor I [Los Alamos, NM; Bawendi, Moungi G [Cambridge, MA; Smith, Henry I [Sudbury, MA

2008-12-30

A structure including a grating and a semiconductor nanocrystal layer on the grating, can be a laser. The semiconductor nanocrystal layer can include a plurality of semiconductor nanocrystals including a Group II-VI compound, the nanocrystals being distributed in a metal oxide matrix. The grating can have a periodicity from 200 nm to 500 nm.

Nanocrystal structures

DOEpatents

Eisler, Hans J.; Sundar, Vikram C.; Walsh, Michael E.; Klimov, Victor I.; Bawendi, Moungi G.; Smith, Henry I.

2006-12-19

A structure including a grating and a semiconductor nanocrystal layer on the grating, can be a laser. The semiconductor nanocrystal layer can include a plurality of semiconductor nanocrystals including a Group II–VI compound, the nanocrystals being distributed in a metal oxide matrix. The grating can have a periodicity from 200 nm to 500 nm.

Method for producing a hybridization of detector array and integrated circuit for readout

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Grunthaner, Frank J. (Inventor)

1993-01-01

A process is explained for fabricating a detector array in a layer of semiconductor material on one substrate and an integrated readout circuit in a layer of semiconductor material on a separate substrate in order to select semiconductor material for optimum performance of each structure, such as GaAs for the detector array and Si for the integrated readout circuit. The detector array layer is lifted off its substrate, laminated on the metallized surface on the integrated surface, etched with reticulating channels to the surface of the integrated circuit, and provided with interconnections between the detector array pixels and the integrated readout circuit through the channels. The adhesive material for the lamination is selected to be chemically stable to provide electrical and thermal insulation and to provide stress release between the two structures fabricated in semiconductor materials that may have different coefficients of thermal expansion.

Use of Metal Oxide Nanoparticle Band Gap to Develop a Predictive Paradigm for Oxidative Stress and Acute Pulmonary Inflammation

PubMed Central

Zhang, Haiyuan; Ji, Zhaoxia; Xia, Tian; Meng, Huan; Low-Kam, Cecile; Liu, Rong; Pokhrel, Suman; Lin, Sijie; Wang, Xiang; Liao, Yu-Pei; Wang, Meiying; Li, Linjiang; Rallo, Robert; Damoiseaux, Robert; Telesca, Donatello; Mädler, Lutz; Cohen, Yoram; Zink, Jeffrey I.; Nel, Andre E.

2014-01-01

We demonstrate for 24 metal oxide (MOx) nanoparticles that it is possible to use conduction band energy levels to delineate their toxicological potential at cellular and whole animal levels. Among the materials, the overlap of conduction band energy (Ec) levels with the cellular redox potential (−4.12 to −4.84 eV) was strongly correlated to the ability of Co3O4, Cr2O3, Ni2O3, Mn2O3 and CoO nanoparticles to induce oxygen radicals, oxidative stress and inflammation. This outcome is premised on permissible electron transfers from the biological redox couples that maintain the cellular redox equilibrium to the conduction band of the semiconductor particles. Both single parameter cytotoxic as well as multi-parameter oxidative stress assays in cells showed excellent correlation to the generation of acute neutrophilic inflammation and cytokine responses in the lungs of CB57 Bl/6 mice. Co3O4, Ni2O3, Mn2O3 and CoO nanoparticles could also oxidize cytochrome c as a representative redox couple involved in redox homeostasis. While CuO and ZnO generated oxidative stress and acute pulmonary inflammation that is not predicted by Ec levels, the adverse biological effects of these materials could be explained by their solubility, as demonstrated by ICP-MS analysis. Taken together, these results demonstrate, for the first time, that it is possible to predict the toxicity of a large series of MOx nanoparticles in the lung premised on semiconductor properties and an integrated in vitro/in vivo hazard ranking model premised on oxidative stress. This establishes a robust platform for modeling of MOx structure-activity relationships based on band gap energy levels and particle dissolution. This predictive toxicological paradigm is also of considerable importance for regulatory decision-making about this important class of engineered nanomaterials. PMID:22502734

Use of metal oxide nanoparticle band gap to develop a predictive paradigm for oxidative stress and acute pulmonary inflammation.

PubMed

Zhang, Haiyuan; Ji, Zhaoxia; Xia, Tian; Meng, Huan; Low-Kam, Cecile; Liu, Rong; Pokhrel, Suman; Lin, Sijie; Wang, Xiang; Liao, Yu-Pei; Wang, Meiying; Li, Linjiang; Rallo, Robert; Damoiseaux, Robert; Telesca, Donatello; Mädler, Lutz; Cohen, Yoram; Zink, Jeffrey I; Nel, Andre E

2012-05-22

We demonstrate for 24 metal oxide (MOx) nanoparticles that it is possible to use conduction band energy levels to delineate their toxicological potential at cellular and whole animal levels. Among the materials, the overlap of conduction band energy (E(c)) levels with the cellular redox potential (-4.12 to -4.84 eV) was strongly correlated to the ability of Co(3)O(4), Cr(2)O(3), Ni(2)O(3), Mn(2)O(3), and CoO nanoparticles to induce oxygen radicals, oxidative stress, and inflammation. This outcome is premised on permissible electron transfers from the biological redox couples that maintain the cellular redox equilibrium to the conduction band of the semiconductor particles. Both single-parameter cytotoxic as well as multi-parameter oxidative stress assays in cells showed excellent correlation to the generation of acute neutrophilic inflammation and cytokine responses in the lungs of C57 BL/6 mice. Co(3)O(4), Ni(2)O(3), Mn(2)O(3), and CoO nanoparticles could also oxidize cytochrome c as a representative redox couple involved in redox homeostasis. While CuO and ZnO generated oxidative stress and acute pulmonary inflammation that is not predicted by E(c) levels, the adverse biological effects of these materials could be explained by their solubility, as demonstrated by ICP-MS analysis. These results demonstrate that it is possible to predict the toxicity of a large series of MOx nanoparticles in the lung premised on semiconductor properties and an integrated in vitro/in vivo hazard ranking model premised on oxidative stress. This establishes a robust platform for modeling of MOx structure-activity relationships based on band gap energy levels and particle dissolution. This predictive toxicological paradigm is also of considerable importance for regulatory decision-making about this important class of engineered nanomaterials.

ROLE OF THE NETWORK FORMER IN SEMICONDUCTING OXIDE GLASSES.

DTIC Science & Technology

SEMICONDUCTOR DEVICES, * GLASS ), (*ELECTRICAL NETWORKS, GLASS ), ELECTRICAL PROPERTIES, SEEBECK EFFECT, BORATES, PHOSPHATES, ELECTRICAL RESISTANCE, X RAY DIFFRACTION, ANNEALING, OXIDATION, OXIDES, ELECTRODES, VANADIUM

Coaxial metal-oxide-semiconductor (MOS) Au/Ga2O3/GaN nanowires.

PubMed

Hsieh, Chin-Hua; Chang, Mu-Tung; Chien, Yu-Jen; Chou, Li-Jen; Chen, Lih-Juann; Chen, Chii-Dong

2008-10-01

Coaxial metal-oxide-semiconductor (MOS) Au-Ga2O3-GaN heterostructure nanowires were successfully fabricated by an in situ two-step process. The Au-Ga2O3 core-shell nanowires were first synthesized by the reaction of Ga powder, a mediated Au thin layer, and a SiO2 substrate at 800 degrees C. Subsequently, these core-shell nanowires were nitridized in ambient ammonia to form a GaN coating layer at 600 degrees C. The GaN shell is a single crystal, an atomic flat interface between the oxide and semiconductor that ensures that the high quality of the MOS device is achieved. These novel 1D nitride-based MOS nanowires may have promise as building blocks to the future nitride-based vertical nanodevices.

Gate tunneling current and quantum capacitance in metal-oxide-semiconductor devices with graphene gate electrodes

NASA Astrophysics Data System (ADS)

An, Yanbin; Shekhawat, Aniruddh; Behnam, Ashkan; Pop, Eric; Ural, Ant

2016-11-01

Metal-oxide-semiconductor (MOS) devices with graphene as the metal gate electrode, silicon dioxide with thicknesses ranging from 5 to 20 nm as the dielectric, and p-type silicon as the semiconductor are fabricated and characterized. It is found that Fowler-Nordheim (F-N) tunneling dominates the gate tunneling current in these devices for oxide thicknesses of 10 nm and larger, whereas for devices with 5 nm oxide, direct tunneling starts to play a role in determining the total gate current. Furthermore, the temperature dependences of the F-N tunneling current for the 10 nm devices are characterized in the temperature range 77-300 K. The F-N coefficients and the effective tunneling barrier height are extracted as a function of temperature. It is found that the effective barrier height decreases with increasing temperature, which is in agreement with the results previously reported for conventional MOS devices with polysilicon or metal gate electrodes. In addition, high frequency capacitance-voltage measurements of these MOS devices are performed, which depict a local capacitance minimum under accumulation for thin oxides. By analyzing the data using numerical calculations based on the modified density of states of graphene in the presence of charged impurities, it is shown that this local minimum is due to the contribution of the quantum capacitance of graphene. Finally, the workfunction of the graphene gate electrode is extracted by determining the flat-band voltage as a function of oxide thickness. These results show that graphene is a promising candidate as the gate electrode in metal-oxide-semiconductor devices.

Low temperature processed complementary metal oxide semiconductor (CMOS) device by oxidation effect from capping layer.

PubMed

Wang, Zhenwei; Al-Jawhari, Hala A; Nayak, Pradipta K; Caraveo-Frescas, J A; Wei, Nini; Hedhili, M N; Alshareef, H N

2015-04-20

In this report, both p- and n-type tin oxide thin-film transistors (TFTs) were simultaneously achieved using single-step deposition of the tin oxide channel layer. The tuning of charge carrier polarity in the tin oxide channel is achieved by selectively depositing a copper oxide capping layer on top of tin oxide, which serves as an oxygen source, providing additional oxygen to form an n-type tin dioxide phase. The oxidation process can be realized by annealing at temperature as low as 190 °C in air, which is significantly lower than the temperature generally required to form tin dioxide. Based on this approach, CMOS inverters based entirely on tin oxide TFTs were fabricated. Our method provides a solution to lower the process temperature for tin dioxide phase, which facilitates the application of this transparent oxide semiconductor in emerging electronic devices field.

Low Temperature Processed Complementary Metal Oxide Semiconductor (CMOS) Device by Oxidation Effect from Capping Layer

PubMed Central

Wang, Zhenwei; Al-Jawhari, Hala A.; Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Wei, Nini; Hedhili, M. N.; Alshareef, H. N.

2015-01-01

In this report, both p- and n-type tin oxide thin-film transistors (TFTs) were simultaneously achieved using single-step deposition of the tin oxide channel layer. The tuning of charge carrier polarity in the tin oxide channel is achieved by selectively depositing a copper oxide capping layer on top of tin oxide, which serves as an oxygen source, providing additional oxygen to form an n-type tin dioxide phase. The oxidation process can be realized by annealing at temperature as low as 190°C in air, which is significantly lower than the temperature generally required to form tin dioxide. Based on this approach, CMOS inverters based entirely on tin oxide TFTs were fabricated. Our method provides a solution to lower the process temperature for tin dioxide phase, which facilitates the application of this transparent oxide semiconductor in emerging electronic devices field. PMID:25892711

Hysteresis in Lanthanide Aluminum Oxides Observed by Fast Pulse CV Measurement

PubMed Central

Zhao, Chun; Zhao, Ce Zhou; Lu, Qifeng; Yan, Xiaoyi; Taylor, Stephen; Chalker, Paul R.

2014-01-01

Oxide materials with large dielectric constants (so-called high-k dielectrics) have attracted much attention due to their potential use as gate dielectrics in Metal Oxide Semiconductor Field Effect Transistors (MOSFETs). A novel characterization (pulse capacitance-voltage) method was proposed in detail. The pulse capacitance-voltage technique was employed to characterize oxide traps of high-k dielectrics based on the Metal Oxide Semiconductor (MOS) capacitor structure. The variation of flat-band voltages of the MOS structure was observed and discussed accordingly. Some interesting trapping/detrapping results related to the lanthanide aluminum oxide traps were identified for possible application in Flash memory technology. After understanding the trapping/detrapping mechanism of the high-k oxides, a solid foundation was prepared for further exploration into charge-trapping non-volatile memory in the future. PMID:28788225

Comprehensive review on the development of high mobility in oxide thin film transistors

NASA Astrophysics Data System (ADS)

Choi, Jun Young; Lee, Sang Yeol

2017-11-01

Oxide materials are one of the most advanced key technology in the thin film transistors (TFTs) for the high-end of device applications. Amorphous oxide semiconductors (AOSs) have leading technique for flat panel display (FPD), active matrix organic light emitting display (AMOLED) and active matrix liquid crystal display (AMLCD) due to their excellent electrical characteristics, such as field effect mobility ( μ FE ), subthreshold swing (S.S) and threshold voltage ( V th ). Covalent semiconductor like amorphous silicon (a-Si) is attributed to the anti-bonding and bonding states of Si hybridized orbitals. However, AOSs have not grain boundary and excellent performances originated from the unique characteristics of AOS which is the direct orbital overlap between s orbitals of neighboring metal cations. High mobility oxide TFTs have gained attractive attention during the last few years and today in display industries. It is progressively developed to increase the mobility either by exploring various oxide semiconductors or by adopting new TFT structures. Mobility of oxide thin film transistor has been rapidly increased from single digit to higher than 100 cm2/V·s in a decade. In this review, we discuss on the comprehensive review on the mobility of oxide TFTs in a decade and propose bandgap engineering and novel structure to enhance the electrical characteristics of oxide TFTs.

Visible light water splitting using dye-sensitized oxide semiconductors.

PubMed

Youngblood, W Justin; Lee, Seung-Hyun Anna; Maeda, Kazuhiko; Mallouk, Thomas E

2009-12-21

Researchers are intensively investigating photochemical water splitting as a means of converting solar to chemical energy in the form of fuels. Hydrogen is a key solar fuel because it can be used directly in combustion engines or fuel cells, or combined catalytically with CO(2) to make carbon containing fuels. Different approaches to solar water splitting include semiconductor particles as photocatalysts and photoelectrodes, molecular donor-acceptor systems linked to catalysts for hydrogen and oxygen evolution, and photovoltaic cells coupled directly or indirectly to electrocatalysts. Despite several decades of research, solar hydrogen generation is efficient only in systems that use expensive photovoltaic cells to power water electrolysis. Direct photocatalytic water splitting is a challenging problem because the reaction is thermodynamically uphill. Light absorption results in the formation of energetic charge-separated states in both molecular donor-acceptor systems and semiconductor particles. Unfortunately, energetically favorable charge recombination reactions tend to be much faster than the slow multielectron processes of water oxidation and reduction. Consequently, visible light water splitting has only recently been achieved in semiconductor-based photocatalytic systems and remains an inefficient process. This Account describes our approach to two problems in solar water splitting: the organization of molecules into assemblies that promote long-lived charge separation, and catalysis of the electrolysis reactions, in particular the four-electron oxidation of water. The building blocks of our artificial photosynthetic systems are wide band gap semiconductor particles, photosensitizer and electron relay molecules, and nanoparticle catalysts. We intercalate layered metal oxide semiconductors with metal nanoparticles. These intercalation compounds, when sensitized with [Ru(bpy)(3)](2+) derivatives, catalyze the photoproduction of hydrogen from sacrificial electron donors (EDTA(2-)) or non-sacrificial donors (I(-)). Through exfoliation of layered metal oxide semiconductors, we construct multilayer electron donor-acceptor thin films or sensitized colloids in which individual nanosheets mediate light-driven electron transfer reactions. When sensitizer molecules are "wired" to IrO(2).nH(2)O nanoparticles, a dye-sensitized TiO(2) electrode becomes the photoanode of a water-splitting photoelectrochemical cell. Although this system is an interesting proof-of-concept, the performance of these cells is still poor (approximately 1% quantum yield) and the dye photodegrades rapidly. We can understand the quantum efficiency and degradation in terms of competing kinetic pathways for water oxidation, back electron transfer, and decomposition of the oxidized dye molecules. Laser flash photolysis experiments allow us to measure these competing rates and, in principle, to improve the performance of the cell by changing the architecture of the electron transfer chain.

Plasmonic doped semiconductor nanocrystals: Properties, fabrication, applications and perspectives

NASA Astrophysics Data System (ADS)

Kriegel, Ilka; Scotognella, Francesco; Manna, Liberato

2017-02-01

Degenerately doped semiconductor nanocrystals (NCs) are of recent interest to the NC community due to their tunable localized surface plasmon resonances (LSPRs) in the near infrared (NIR). The high level of doping in such materials with carrier densities in the range of 1021cm-3 leads to degeneracy of the doping levels and intense plasmonic absorption in the NIR. The lower carrier density in degenerately doped semiconductor NCs compared to noble metals enables LSPR tuning over a wide spectral range, since even a minor change of the carrier density strongly affects the spectral position of the LSPR. Two classes of degenerate semiconductors are most relevant in this respect: impurity doped semiconductors, such as metal oxides, and vacancy doped semiconductors, such as copper chalcogenides. In the latter it is the density of copper vacancies that controls the carrier concentration, while in the former the introduction of impurity atoms adds carriers to the system. LSPR tuning in vacancy doped semiconductor NCs such as copper chalcogenides occurs by chemically controlling the copper vacancy density. This goes in hand with complex structural modifications of the copper chalcogenide crystal lattice. In contrast the LSPR of degenerately doped metal oxide NCs is modified by varying the doping concentration or by the choice of host and dopant atoms, but also through the addition of capacitive charge carriers to the conduction band of the metal oxide upon post-synthetic treatments, such as by electrochemical- or photodoping. The NIR LSPRs and the option of their spectral fine-tuning make accessible important new features, such as the controlled coupling of the LSPR to other physical signatures or the enhancement of optical signals in the NIR, sensing application by LSPR tracking, energy production from the NIR plasmon resonance or bio-medical applications in the biological window. In this review we highlight the recent advances in the synthesis of various different plasmonic semiconductor NCs with LSPRs covering the entire spectral range, from the mid- to the NIR. We focus on copper chalcogenide NCs and impurity doped metal oxide NCs as the most investigated alternatives to noble metals. We shed light on the structural changes upon LSPR tuning in vacancy doped copper chalcogenide NCs and deliver a picture for the fundamentally different mechanism of LSPR modification of impurity doped metal oxide NCs. We review on the peculiar optical properties of plasmonic degenerately doped NCs by highlighting the variety of different optical measurements and optical modeling approaches. These findings are merged in an exhaustive section on new and exciting applications based on the special characteristics that plasmonic semiconductor NCs bring along.

Reduction of B-integral accumulation in lasers

DOEpatents

Meyerhofer, David D.; Konoplev, Oleg A.

2000-01-01

A pulsed laser is provided wherein the B-integral accumulated in the laser pulse is reduced using a semiconductor wafer. A laser pulse is generated by a laser pulse source. The laser pulse passes through a semiconductor wafer that has a negative nonlinear index of refraction. Thus, the laser pulse accumulates a negative B-integral. The laser pulse is then fed into a laser amplification medium, which has a positive nonlinear index of refraction. The laser pulse may make a plurality of passes through the laser amplification medium and accumulate a positive B-integral during a positive non-linear phase change. The semiconductor and laser pulse wavelength are chosen such that the negative B-integral accumulated in the semiconductor wafer substantially cancels the positive B-integral accumulated in the laser amplification medium. There may be additional accumulation of positive B-integral if the laser pulse passes through additional optical mediums such as a lens or glass plates. Thus, the effects of self-phase modulation in the laser pulse are substantially reduced.

Investigation of Optical Properties of Zinc Oxide Photodetector

NASA Astrophysics Data System (ADS)

Chism, Tyler

UV photodetection devices have many important applications for uses in biological detection, gas sensing, weaponry detection, fire detection, chemical analysis, and many others. Today's photodetectors often utilize semiconductors such as GaAs to achieve high responsivity and sensitivity. Zinc oxide, unlike many other semiconductors, is cheap, abundant, non-toxic, and easy to grow different morphologies at the micro and nano scale. With the proliferation of these devices also comes the impending need to further study optics and photonics in relation to phononics and plasmonics, and the general principles underlying the interaction of photons with solid state matter and, specifically, semiconductors. For this research a metal-semiconductor-metal UV photodetector has been fabricated by using a quartz substrate on top of which was deposited micropatterned gold in an interdigitated electrode design. On this, sparsely coated zinc oxide nano trees were hydrothermally grown. The UV photodetection device showed promise for detection applications, especially because zinc oxide is also very thermally stable, a quality which is highly sought after in today's UV photodetectors. Furthermore, the newly synthesized photodetector was used to investigate optical properties and how they respond to different stimuli. It was discovered that the photons transmitted through the sparsely coated zinc oxide nano trees decreased as the voltage across the device increased. This research is aimed at better understanding photons interaction with matter and also to open the door for new devices with tunable optical properties such as transmission.

Complementary metal-oxide semiconductor compatible source of single photons at near-visible wavelengths

NASA Astrophysics Data System (ADS)

Cernansky, Robert; Martini, Francesco; Politi, Alberto

2018-02-01

We demonstrate on chip generation of correlated pairs of photons in the near-visible spectrum using a CMOS compatible PECVD Silicon Nitride photonic device. Photons are generated via spontaneous four wave mixing enhanced by a ring resonator with high quality Q-factor of 320,000 resulting in a generation rate of 950,000 $\\frac{pairs}{mW}$. The high brightness of this source offers the opportunity to expand photonic quantum technologies over a broad wavelength range and provides a path to develop fully integrated quantum chips working at room temperature.

Testability of VLSI (Very Large Scale Integration) Leakage Faults in CMOS (Complementary Metal Oxide Semiconductor).

DTIC Science & Technology

1983-09-01

has been reviewed and is approved for publication. Im Ŕ APPROVED: . L,.. &- MARK W. LEVI Project Engineer APPROVED: W.S. TUTHILL, Colonel, USAF Chief...ebetract entered In Block 20, if different from Report) Same IS. SUPPLEMENTARY NOTES RADC Project Engineer: Mark W. Levi (RBRP) This effort was funded...masking the presence of another fault which was a functional or reliability hazard. ’." • ’ ",, ,~ MARK W. LEVI A ec . ston For 1\\ T’ ir I .] / r "- T A

End-of-fabrication CMOS process monitor

NASA Technical Reports Server (NTRS)

Buehler, M. G.; Allen, R. A.; Blaes, B. R.; Hannaman, D. J.; Lieneweg, U.; Lin, Y.-S.; Sayah, H. R.

1990-01-01

A set of test 'modules' for verifying the quality of a complementary metal oxide semiconductor (CMOS) process at the end of the wafer fabrication is documented. By electrical testing of specific structures, over thirty parameters are collected characterizing interconnects, dielectrics, contacts, transistors, and inverters. Each test module contains a specification of its purpose, the layout of the test structure, the test procedures, the data reduction algorithms, and exemplary results obtained from 3-, 2-, or 1.6-micrometer CMOS/bulk processes. The document is intended to establish standard process qualification procedures for Application Specific Integrated Circuits (ASIC's).

Metal oxide gas sensors on the nanoscale

NASA Astrophysics Data System (ADS)

Plecenik, A.; Haidry, A. A.; Plecenik, T.; Durina, P.; Truchly, M.; Mosko, M.; Grancic, B.; Gregor, M.; Roch, T.; Satrapinskyy, L.; Moskova, A.; Mikula, M.; Kus, P.

2014-06-01

Low cost, low power and highly sensitive gas sensors operating at room temperature are very important devices for controlled hydrogen gas production and storage. One of the disadvantages of chemosensors is their high operating temperature (usually 200 - 400 °C), which excludes such type of sensors from usage in explosive environment. In this report, a new concept of gas chemosensors operating at room temperature based on TiO2 thin films is discussed. Integration of such sensor is fully compatible with sub-100 nm semiconductor technology and could be transferred directly from labor to commercial sphere.

High-Performance Inkjet-Printed Indium-Gallium-Zinc-Oxide Transistors Enabled by Embedded, Chemically Stable Graphene Electrodes.

PubMed

Secor, Ethan B; Smith, Jeremy; Marks, Tobin J; Hersam, Mark C

2016-07-13

Recent developments in solution-processed amorphous oxide semiconductors have established indium-gallium-zinc-oxide (IGZO) as a promising candidate for printed electronics. A key challenge for this vision is the integration of IGZO thin-film transistor (TFT) channels with compatible source/drain electrodes using low-temperature, solution-phase patterning methods. Here we demonstrate the suitability of inkjet-printed graphene electrodes for this purpose. In contrast to common inkjet-printed silver-based conductive inks, graphene provides a chemically stable electrode-channel interface. Furthermore, by embedding the graphene electrode between two consecutive IGZO printing passes, high-performance IGZO TFTs are achieved with an electron mobility of ∼6 cm(2)/V·s and current on/off ratio of ∼10(5). The resulting printed devices exhibit robust stability to aging in ambient as well as excellent resilience to thermal stress, thereby offering a promising platform for future printed electronics applications.

Alternative Packaging for Back-Illuminated Imagers

NASA Technical Reports Server (NTRS)

Pain, Bedabrata

2009-01-01

An alternative scheme has been conceived for packaging of silicon-based back-illuminated, back-side-thinned complementary metal oxide/semiconductor (CMOS) and charge-coupled-device image-detector integrated circuits, including an associated fabrication process. This scheme and process are complementary to those described in "Making a Back-Illuminated Imager With Back-Side Connections" (NPO-42839), NASA Tech Briefs, Vol. 32, No. 7 (July 2008), page 38. To avoid misunderstanding, it should be noted that in the terminology of imaging integrated circuits, "front side" or "back side" does not necessarily refer to the side that, during operation, faces toward or away from a source of light or other object to be imaged. Instead, "front side" signifies that side of a semiconductor substrate upon which the pixel pattern and the associated semiconductor devices and metal conductor lines are initially formed during fabrication, and "back side" signifies the opposite side. If the imager is of the type called "back-illuminated," then the back side is the one that faces an object to be imaged. Initially, a back-illuminated, back-side-thinned image-detector is fabricated with its back side bonded to a silicon handle wafer. At a subsequent stage of fabrication, the front side is bonded to a glass wafer (for mechanical support) and the silicon handle wafer is etched away to expose the back side. The frontside integrated circuitry includes metal input/output contact pads, which are rendered inaccessible by the bonding of the front side to the glass wafer. Hence, one of the main problems is to make the input/output contact pads accessible from the back side, which is ultimately to be the side accessible to the external world. The present combination of an alternative packaging scheme and associated fabrication process constitute a solution of the problem.

A zirconium dioxide ammonia microsensor integrated with a readout circuit manufactured using the 0.18 μm CMOS process.

PubMed

Lin, Guan-Ming; Dai, Ching-Liang; Yang, Ming-Zhi

2013-03-15

The study presents an ammonia microsensor integrated with a readout circuit on-a-chip fabricated using the commercial 0.18 μm complementary metal oxide semiconductor (CMOS) process. The integrated sensor chip consists of a heater, an ammonia sensor and a readout circuit. The ammonia sensor is constructed by a sensitive film and the interdigitated electrodes. The sensitive film is zirconium dioxide that is coated on the interdigitated electrodes. The heater is used to provide a working temperature to the sensitive film. A post-process is employed to remove the sacrificial layer and to coat zirconium dioxide on the sensor. When the sensitive film adsorbs or desorbs ammonia gas, the sensor produces a change in resistance. The readout circuit converts the resistance variation of the sensor into the output voltage. The experiments show that the integrated ammonia sensor has a sensitivity of 4.1 mV/ppm.

A study to investigate the chemical stability of gallium phosphate oxide/gallium arsenide phosphide

NASA Technical Reports Server (NTRS)

Kuhlman, G. J.

1979-01-01

The elemental composition with depth into the oxide films was examined using secondary ion mass spectrometry. Results indicate that the layers are arsenic-deficient through the bulk of the oxide and arsenic-rich near both the oxide surface and the oxide-semiconductor interface region. Phosphorus is incorporated into the oxide in an approximately uniform manner. The MIS capacitor structures exhibited deep-depletion characteristics and hysteresis indicative of electron trapping at the oxide-semiconductor interface. Post-oxidation annealing of the films in argon or nitrogen generally results in slightly increased dielectric leakage currents and decreased C-V hysteresis effects, and is associated with arsenic loss at the oxide surface. The results of bias-temperature stress experiments indicate that the major instability effects are due to changes in the electron trapping behavior. No changes were observed in the elemental profiles following electrical stressing, indicating that the grown films are chemically stable under device operating conditions.

Efficient Suppression of Defects and Charge Trapping in High Density In-Sn-Zn-O Thin Film Transistor Prepared using Microwave-Assisted Sputter.

PubMed

Goh, Youngin; Ahn, Jaehan; Lee, Jeong Rak; Park, Wan Woo; Ko Park, Sang-Hee; Jeon, Sanghun

2017-10-25

Amorphous oxide semiconductor-based thin film transistors (TFTs) have been considered as excellent switching elements for driving active-matrix organic light-emitting diodes (AMOLED) owing to their high mobility and process compatibility. However, oxide semiconductors have inherent defects, causing fast transient charge trapping and device instability. For the next-generation displays such as flexible, wearable, or transparent displays, an active semiconductor layer with ultrahigh mobility and high reliability at low deposition temperature is required. Therefore, we introduced high density plasma microwave-assisted (MWA) sputtering method as a promising deposition tool for the formation of high density and high-performance oxide semiconductor films. In this paper, we present the effect of the MWA sputtering method on the defects and fast charge trapping in In-Sn-Zn-O (ITZO) TFTs using various AC device characterization methodologies including fast I-V, pulsed I-V, transient current, low frequency noise, and discharge current analysis. Using these methods, we were able to analyze the charge trapping mechanism and intrinsic electrical characteristics, and extract the subgap density of the states of oxide TFTs quantitatively. In comparison to conventional sputtered ITZO, high density plasma MWA-sputtered ITZO exhibits outstanding electrical performance, negligible charge trapping characteristics and low subgap density of states. High-density plasma MWA sputtering method has high deposition rate even at low working pressure and control the ion bombardment energy, resulting in forming low defect generation in ITZO and presenting high performance ITZO TFT. We expect the proposed high density plasma sputtering method to be applicable to a wide range of oxide semiconductor device applications.

75 FR 51843 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-08-23

... Integrated Circuit Semiconductor Chips and Products Containing the Same; Notice of Commission Decision Not To... semiconductor chips and products containing same by reason of infringement of certain claims of U.S. Patent Nos. 5,933,364 and 6,834,336. The complaint further alleges the existence of a domestic industry. The...

Electrolytic photodissociation of chemical compounds by iron oxide electrodes

DOEpatents

Somorjai, Gabor A.; Leygraf, Christofer H.

1984-01-01

Chemical compounds can be dissociated by contacting the same with a p/n type semi-conductor diode having visible light as its sole source of energy. The diode consists of low cost, readily available materials, specifically polycrystalline iron oxide doped with silicon in the case of the n-type semi-conductor electrode, and polycrystalline iron oxide doped with magnesium in the case of the p-type electrode. So long as the light source has an energy greater than 2.2 electron volts, no added energy source is needed to achieve dissociation.

Electrolytic photodissociation of chemical compounds by iron oxide photochemical diodes

DOEpatents

Somorjai, Gabor A.; Leygraf, Christofer H.

1985-01-01

Chemical compounds can be dissociated by contacting the same with a p/n type semi-conductor photochemical diode having visible light as its sole source of energy. The photochemical diode consists of low cost, readily available materials, specifically polycrystalline iron oxide doped with silicon in the case of the n-type semi-conductor electrode, and polycrystalline iron oxide doped with magnesium in the case of the p-type electrode. So long as the light source has an energy greater than 2.2 electron volts, no added energy source is needed to achieve dissociation.

Thin-film transistor fabricated in single-crystalline transparent oxide semiconductor.

PubMed

Nomura, Kenji; Ohta, Hiromichi; Ueda, Kazushige; Kamiya, Toshio; Hirano, Masahiro; Hosono, Hideo

2003-05-23

We report the fabrication of transparent field-effect transistors using a single-crystalline thin-film transparent oxide semiconductor, InGaO3(ZnO)5, as an electron channel and amorphous hafnium oxide as a gate insulator. The device exhibits an on-to-off current ratio of approximately 106 and a field-effect mobility of approximately 80 square centimeters per volt per second at room temperature, with operation insensitive to visible light irradiation. The result provides a step toward the realization of transparent electronics for next-generation optoelectronics.

Method for restoring the resistance of indium oxide semiconductors after heating while in sealed structures

DOEpatents

Seager, C.H.; Evans, J.T. Jr.

1998-11-24

A method is described for counteracting increases in resistivity encountered when Indium Oxide resistive layers are subjected to high temperature annealing steps during semiconductor device fabrication. The method utilizes a recovery annealing step which returns the Indium Oxide layer to its original resistivity after a high temperature annealing step has caused the resistivity to increase. The recovery anneal comprises heating the resistive layer to a temperature between 100 C and 300 C for a period of time that depends on the annealing temperature. The recovery is observed even when the Indium Oxide layer is sealed under a dielectric layer. 1 fig.

Method for restoring the resistance of indium oxide semiconductors after heating while in sealed structures

DOEpatents

Seager, Carleton H.; Evans, Jr., Joseph Tate

1998-01-01

A method for counteracting increases in resistivity encountered when Indium Oxide resistive layers are subjected to high temperature annealing steps during semiconductor device fabrication. The method utilizes a recovery annealing step which returns the Indium Oxide layer to its original resistivity after a high temperature annealing step has caused the resistivity to increase. The recovery anneal comprises heating the resistive layer to a temperature between 100.degree. C. and 300.degree. C. for a period of time that depends on the annealing temperature. The recovery is observed even when the Indium Oxide layer is sealed under a dielectric layer.

Color-selective photodetection from intermediate colloidal quantum dots buried in amorphous-oxide semiconductors.

PubMed

Cho, Kyung-Sang; Heo, Keun; Baik, Chan-Wook; Choi, Jun Young; Jeong, Heejeong; Hwang, Sungwoo; Lee, Sang Yeol

2017-10-10

We report color-selective photodetection from intermediate, monolayered, quantum dots buried in between amorphous-oxide semiconductors. The proposed active channel in phototransistors is a hybrid configuration of oxide-quantum dot-oxide layers, where the gate-tunable electrical property of silicon-doped, indium-zinc-oxide layers is incorporated with the color-selective properties of quantum dots. A remarkably high detectivity (8.1 × 10 13 Jones) is obtained, along with three major findings: fast charge separation in monolayered quantum dots; efficient charge transport through high-mobility oxide layers (20 cm 2  V -1  s -1 ); and gate-tunable drain-current modulation. Particularly, the fast charge separation rate of 3.3 ns -1 measured with time-resolved photoluminescence is attributed to the intermediate quantum dots buried in oxide layers. These results facilitate the realization of efficient color-selective detection exhibiting a photoconductive gain of 10 7 , obtained using a room-temperature deposition of oxide layers and a solution process of quantum dots. This work offers promising opportunities in emerging applications for color detection with sensitivity, transparency, and flexibility.The development of highly sensitive photodetectors is important for image sensing and optical communication applications. Cho et al., report ultra-sensitive photodetectors based on monolayered quantum dots buried in between amorphous-oxide semiconductors and demonstrate color-detecting logic gates.

Impact of oxygen plasma postoxidation process on Al2O3/n-In0.53Ga0.47As metal-oxide-semiconductor capacitors

NASA Astrophysics Data System (ADS)

Lechaux, Y.; Fadjie-Djomkam, A. B.; Bollaert, S.; Wichmann, N.

2016-09-01

Capacitance-voltage (C-V) measurements and x-ray photoelectron spectroscopy (XPS) analysis were performed in order to investigate the effect of a oxygen (O2) plasma after oxide deposition on the Al2O3/n-In0.53Ga0.47As metal-oxide-semiconductor structure passivated with ammonia NH4OH solution. From C-V measurements, an improvement of charge control is observed using the O2 plasma postoxidation process on In0.53Ga0.47As, while the minimum of interface trap density remains at a good value lower than 1 × 1012 cm-2 eV-1. From XPS measurements, we found that NH4OH passivation removes drastically the Ga and As native oxides on the In0.53Ga0.47As surface and the O2 plasma postoxidation process enables the reduction of interface re-oxidation after post deposition annealing (PDA) of the oxide. The advanced hypothesis is the formation of interfacial barrier between Al2O3 and In0.53Ga0.47As which prevents the diffusion of oxygen species into the semiconductor surface during PDA.

Role of order and disorder on the electronic performances of oxide semiconductor thin film transistors

NASA Astrophysics Data System (ADS)

Martins, R.; Barquinha, P.; Ferreira, I.; Pereira, L.; Gonçalves, G.; Fortunato, E.

2007-02-01

The role of order and disorder on the electronic performances of n-type ionic oxides such as zinc oxide, gallium zinc oxide, and indium zinc oxide used as active (channel) or passive (drain/source) layers in thin film transistors (TFTs) processed at room temperature are discussed, taking as reference the known behavior observed in conventional covalent semiconductors such as silicon. The work performed shows that while in the oxide semiconductors the Fermi level can be pinned up within the conduction band, independent of the state of order, the same does not happen with silicon. Besides, in the oxide semiconductors the carrier mobility is not bandtail limited and so disorder does not affect so strongly the mobility as it happens in covalent semiconductors. The electrical properties of the oxide films (resistivity, carrier concentration, and mobility) are highly dependent on the oxygen vacancies (source of free carriers), which can be controlled by changing the oxygen partial pressure during the deposition process and/or by adding other metal ions to the matrix. In this case, we make the oxide matrix less sensitive to the presence of oxygen, widening the range of oxygen partial pressures that can be used and thus improving the process control of the film resistivity. The results obtained in fully transparent TFT using polycrystalline ZnO or amorphous indium zinc oxide (IZO) as channel layers and highly conductive poly/nanocrystalline ZGO films or amorphous IZO as drain/source layers show that both devices work in the enhancement mode, but the TFT with the highest electronic saturation mobility and on/off ratio 49.9cm2/Vs and 4.3×108, respectively, are the ones in which the active and passive layers are amorphous. The ZnO TFT whose channel is based on polycrystalline ZnO, the mobility and on/off ratio are, respectively, 26cm2/Vs and 3×106. This behavior is attributed to the fact that the electronic transport is governed by the s-like metal cation conduction bands, not significantly affected by any type of angular disorder promoted by the 2p O states related to the valence band, or small amounts of incorporated metal impurities that lead to a better control of vacancies and of the TFT off current.

Epitaxy of Polar Oxides and Semiconductors

NASA Astrophysics Data System (ADS)

Shelton, Christopher Tyrel

Integrating polar oxide materials with wide-bandgap nitride semiconductors offers the possibility of a tunable 2D carrier gas (2DCG) - provided defect densities are low and interfaces are abrupt. This dissertation investigates a portion of the synthesis science necessary to produce a "semiconductor-grade" interface between these highly dissimilar materials. A significant portion of this work is aligned with efforts to engineer a step-free GaN substrate to produce single in-plane oriented rocksalt oxide films. Initially, we explore the homoepitaxial MOCVD growth conditions necessary to produce highquality GaN films on ammonothermally grown substrates. Ammono substrates are only recently available for purchase and are the market leader in low-dislocation density material. Their novelty requires development of an understanding of morphology trade-offs in processing space. This includes preservation of the epi-polished surface in aggressive MOCVD environments and an understanding of the kinetic barriers affecting growth morphologies. Based on several factors, it was determined that GaN exhibits an 'uphill' diffusion bias that may likely be ascribed to a positive Ehrlich-Schwoebel (ES) barrier. This barrier should have a stabilizing effect against step-bunching but, for many growth conditions, regular step bunching was observed. One possible explanation for the step-bunching instability is the presence of impurities. Experimentally, conditions which incorporate more carbon into GaN homoepitaxial layers are correlated with step-bunching while conditions that suppress carbon produce bilayer stepped morphologies. These observations lead us to the conclusion that GaN homoepitaxial morphology is a competition between impurity induced step-bunching and a stabilizing diffusion bias due to a positive ES barrier. Application of the aforementioned homoepitaxial growth techniques to discrete substrate regions using selected- and confined area epitaxy (SAE,CAE) produces some remarkable surface morphologies. This work represents the first effort to extend SAE and CAE to true bulk single-crystal GaN substrates. By carefully controlling supersaturation during growth it is possible to prepare confined areas with a range of step densities, including surfaces that are entirely step-free. Single terrace GaN mesas up to 100 m in size have been observed, however the potential exists, due to the extremely low dislocation density of the substrate, to further extend the dimensions of these regions. Step-free GaN templates are ideal substrates for rocksalt heteroepitaxy and solve a long-standing challenge related to the integration of cubic and hexagonal materials. It has been previously observed that the origin of the two in-plane orientations in rocksalts grown on III-nitrides is a consequence of the stepped GaN surface. By using a substrate that is effectively step-free across a 100 m region, it is possible to prepare a rocksalt // GaN film with a single in-plane orientation. Heterojunctions of this type are disclination defect free and highly crystalline. The ability to locally prepare a single orientation rocksalt film, coupled with commensurate 2D layer-by-layer growth techniques, allows growth, for the first time, of a truly 'semiconductor-grade' oxide-nitride interface. To study the transport properties of oxide-nitride heterostructures, a series of experiments on standard GaN // sapphire template layers were conducted. Devices that allowed contact to the buried oxide-nitride interface were prepared and characterized using low-temperature Hall measurements. Although a high mobility 2DEG was not observed in these samples, a conduction path at the lattice matched Mg0.52Ca0.48O // GaN interface did appear. If confirmed, this finding could represent the first evidence for interfacial polar coupling between an oxide and a nitride. Overcoming the significant symmetry, chemistry and bonding environment barriers to forming a structurally perfect oxide-nitride interface has required many innovations and the development of several new technologies. It is encouraging, however, that a path around such challenging obstacles exists. We believe the techniques and findings presented in this work are general to many systems, offering hope for a future 'materials functionality' based integration strategy. (Abstract shortened by ProQuest.).

Sustained hole inversion layer in a wide-bandgap metal-oxide semiconductor with enhanced tunnel current

NASA Astrophysics Data System (ADS)

Shoute, Gem; Afshar, Amir; Muneshwar, Triratna; Cadien, Kenneth; Barlage, Douglas

2016-02-01

Wide-bandgap, metal-oxide thin-film transistors have been limited to low-power, n-type electronic applications because of the unipolar nature of these devices. Variations from the n-type field-effect transistor architecture have not been widely investigated as a result of the lack of available p-type wide-bandgap inorganic semiconductors. Here, we present a wide-bandgap metal-oxide n-type semiconductor that is able to sustain a strong p-type inversion layer using a high-dielectric-constant barrier dielectric when sourced with a heterogeneous p-type material. A demonstration of the utility of the inversion layer was also investigated and utilized as the controlling element in a unique tunnelling junction transistor. The resulting electrical performance of this prototype device exhibited among the highest reported current, power and transconductance densities. Further utilization of the p-type inversion layer is critical to unlocking the previously unexplored capability of metal-oxide thin-film transistors, such applications with next-generation display switches, sensors, radio frequency circuits and power converters.

Mechanistic insights into chemical and photochemical transformations of bismuth vanadate photoanodes

DOE PAGES

Toma, Francesca M.; Cooper, Jason K.; Kunzelmann, Viktoria; ...

2016-07-05

Artificial photosynthesis relies on the availability of semiconductors that are chemically stable and can efficiently capture solar energy. Although metal oxide semiconductors have been investigated for their promise to resist oxidative attack, materials in this class can suffer from chemical and photochemical instability. Here we present a methodology for evaluating corrosion mechanisms and apply it to bismuth vanadate, a state-of-the-art photoanode. Analysis of changing morphology and composition under solar water splitting conditions reveals chemical instabilities that are not predicted from thermodynamic considerations of stable solid oxide phases, as represented by the Pourbaix diagram for the system. Computational modelling indicates thatmore » photoexcited charge carriers accumulated at the surface destabilize the lattice, and that self-passivation by formation of a chemically stable surface phase is kinetically hindered. Although chemical stability of metal oxides cannot be assumed, insight into corrosion mechanisms aids development of protection strategies and discovery of semiconductors with improved stability.« less

Polymer/metal oxide hybrid dielectrics for low voltage field-effect transistors with solution-processed, high-mobility semiconductors

NASA Astrophysics Data System (ADS)

Held, Martin; Schießl, Stefan P.; Miehler, Dominik; Gannott, Florentina; Zaumseil, Jana

2015-08-01

Transistors for future flexible organic light-emitting diode (OLED) display backplanes should operate at low voltages and be able to sustain high currents over long times without degradation. Hence, high capacitance dielectrics with low surface trap densities are required that are compatible with solution-processable high-mobility semiconductors. Here, we combine poly(methyl methacrylate) (PMMA) and atomic layer deposition hafnium oxide (HfOx) into a bilayer hybrid dielectric for field-effect transistors with a donor-acceptor polymer (DPPT-TT) or single-walled carbon nanotubes (SWNTs) as the semiconductor and demonstrate substantially improved device performances for both. The ultra-thin PMMA layer ensures a low density of trap states at the semiconductor-dielectric interface while the metal oxide layer provides high capacitance, low gate leakage and superior barrier properties. Transistors with these thin (≤70 nm), high capacitance (100-300 nF/cm2) hybrid dielectrics enable low operating voltages (<5 V), balanced charge carrier mobilities and low threshold voltages. Moreover, the hybrid layers substantially improve the bias stress stability of the transistors compared to those with pure PMMA and HfOx dielectrics.

Structural and semiconductor-to-metal transitions of double-perovskite cobalt oxide Sr2-xLaxCoTiO6-δ with enhanced thermoelectric capability

NASA Astrophysics Data System (ADS)

Sugahara, Tohru; Ohtaki, Michitaka

2011-08-01

The thermoelectric properties of double-perovskite oxide Sr2-xLaxCoTiO6-δ were revealed to vary anomalously with the La concentration, plausibly due to a structural transition found in this study. Although the temperature dependence of the resistivity and thermopower of the present oxide showed a semiconductor-to-metal transition similar to those observed for other perovskite-related Co oxides such as Sr1-xYxCoO3-δ, the transition temperature was more than 350 K higher, implying considerable stabilization of the low-spin state of Co ions in the double-perovskite oxide. Consequently, the operating temperature range of the oxide for potential thermoelectric applications was significantly expanded toward higher temperatures.

Assessing the performance of self-consistent hybrid functional for band gap calculation in oxide semiconductors

NASA Astrophysics Data System (ADS)

He, Jiangang; Franchini, Cesare

2017-11-01

In this paper we assess the predictive power of the self-consistent hybrid functional scPBE0 in calculating the band gap of oxide semiconductors. The computational procedure is based on the self-consistent evaluation of the mixing parameter α by means of an iterative calculation of the static dielectric constant using the perturbation expansion after discretization method and making use of the relation \

Characterization of Interface State in Silicon Carbide Metal Oxide Semiconductor Capacitors

NASA Astrophysics Data System (ADS)

Kao, Wei-Chieh

Silicon carbide (SiC) has always been considered as an excellent material for high temperature and high power devices. Since SiC is the only compound semiconductor whose native oxide is silicon dioxide (SiO2), it puts SiC in a unique position. Although SiC metal oxide semiconductor (MOS) technology has made significant progress in recent years, there are still a number of issues to be overcome before more commercial SiC devices can enter the market. The prevailing issues surrounding SiC MOSFET devices are the low channel mobility, the low quality of the oxide layer and the high interface state density at the SiC/SiO2 interface. Consequently, there is a need for research to be performed in order to have a better understanding of the factors causing the poor SiC/SiO2 interface properties. In this work, we investigated the generation lifetime in SiC materials by using the pulsed metal oxide semiconductor (MOS) capacitor method and measured the interface state density distribution at the SiC/SiO2 interface by using the conductance measurement and the high-low frequency capacitance technique. These measurement techniques have been performed on n-type and p-type SiC MOS capacitors. In the course of our investigation, we observed fast interface states at semiconductor-dielectric interfaces in SiC MOS capacitors that underwent three different interface passivation processes, such states were detected in the nitrided samples but not observed in PSG-passivated samples. This result indicate that the lack of fast states at PSG-passivated interface is one of the main reasons for higher channel mobility in PSG MOSFETs. In addition, the effect of mobile ions in the oxide on the response time of interface states has been investigated. In the last chapter we propose additional methods of investigation that can help elucidate the origin of the particular interface states, enabling a more complete understanding of the SiC/SiO2 material system.

Integrated polarization-dependent sensor for autonomous navigation

NASA Astrophysics Data System (ADS)

Liu, Ze; Zhang, Ran; Wang, Zhiwen; Guan, Le; Li, Bin; Chu, Jinkui

2015-01-01

Based on the navigation strategy of insects utilizing the polarized skylight, an integrated polarization-dependent sensor for autonomous navigation is presented. The navigation sensor has the features of compact structure, high precision, strong robustness, and a simple manufacture technique. The sensor is composed by integrating a complementary-metal-oxide-semiconductor sensor with a multiorientation nanowire grid polarizer. By nanoimprint lithography, the multiorientation nanowire polarizer is fabricated in one step and the alignment error is eliminated. The statistical theory is added to the interval-division algorithm to calculate the polarization angle of the incident light. The laboratory and outdoor tests for the navigation sensor are implemented and the errors of the measured angle are ±0.02 deg and ±1.3 deg, respectively. The results show that the proposed sensor has potential for application in autonomous navigation.

CMOS-Compatible Silicon Nanowire Field-Effect Transistor Biosensor: Technology Development toward Commercialization.

PubMed

Tran, Duy Phu; Pham, Thuy Thi Thanh; Wolfrum, Bernhard; Offenhäusser, Andreas; Thierry, Benjamin

2018-05-11

Owing to their two-dimensional confinements, silicon nanowires display remarkable optical, magnetic, and electronic properties. Of special interest has been the development of advanced biosensing approaches based on the field effect associated with silicon nanowires (SiNWs). Recent advancements in top-down fabrication technologies have paved the way to large scale production of high density and quality arrays of SiNW field effect transistor (FETs), a critical step towards their integration in real-life biosensing applications. A key requirement toward the fulfilment of SiNW FETs' promises in the bioanalytical field is their efficient integration within functional devices. Aiming to provide a comprehensive roadmap for the development of SiNW FET based sensing platforms, we critically review and discuss the key design and fabrication aspects relevant to their development and integration within complementary metal-oxide-semiconductor (CMOS) technology.

Real-time, continuous, fluorescence sensing in a freely-moving subject with an implanted hybrid VCSEL/CMOS biosensor

PubMed Central

O’Sullivan, Thomas D.; Heitz, Roxana T.; Parashurama, Natesh; Barkin, David B.; Wooley, Bruce A.; Gambhir, Sanjiv S.; Harris, James S.; Levi, Ofer

2013-01-01

Performance improvements in instrumentation for optical imaging have contributed greatly to molecular imaging in living subjects. In order to advance molecular imaging in freely moving, untethered subjects, we designed a miniature vertical-cavity surface-emitting laser (VCSEL)-based biosensor measuring 1cm3 and weighing 0.7g that accurately detects both fluorophore and tumor-targeted molecular probes in small animals. We integrated a critical enabling component, a complementary metal-oxide semiconductor (CMOS) read-out integrated circuit, which digitized the fluorescence signal to achieve autofluorescence-limited sensitivity. After surgical implantation of the lightweight sensor for two weeks, we obtained continuous and dynamic fluorophore measurements while the subject was un-anesthetized and mobile. The technology demonstrated here represents a critical step in the path toward untethered optical sensing using an integrated optoelectronic implant. PMID:24009996

Energy dependence corrections to MOSFET dosimetric sensitivity.

PubMed

Cheung, T; Butson, M J; Yu, P K N

2009-03-01

Metal Oxide Semiconductor Field Effect Transistors (MOSFET's) are dosimeters which are now frequently utilized in radiotherapy treatment applications. An improved MOSFET, clinical semiconductor dosimetry system (CSDS) which utilizes improved packaging for the MOSFET device has been studied for energy dependence of sensitivity to x-ray radiation measurement. Energy dependence from 50 kVp to 10 MV x-rays has been studied and found to vary by up to a factor of 3.2 with 75 kVp producing the highest sensitivity response. The detectors average life span in high sensitivity mode is energy related and ranges from approximately 100 Gy for 75 kVp x-rays to approximately 300 Gy at 6 MV x-ray energy. The MOSFET detector has also been studied for sensitivity variations with integrated dose history. It was found to become less sensitive to radiation with age and the magnitude of this effect is dependant on radiation energy with lower energies producing a larger sensitivity reduction with integrated dose. The reduction in sensitivity is however approximated reproducibly by a slightly non linear, second order polynomial function allowing corrections to be made to readings to account for this effect to provide more accurate dose assessments both in phantom and in-vivo.

Materials and noncoplanar mesh designs for integrated circuits with linear elastic responses to extreme mechanical deformations.

PubMed

Kim, Dae-Hyeong; Song, Jizhou; Choi, Won Mook; Kim, Hoon-Sik; Kim, Rak-Hwan; Liu, Zhuangjian; Huang, Yonggang Y; Hwang, Keh-Chih; Zhang, Yong-wei; Rogers, John A

2008-12-02

Electronic systems that offer elastic mechanical responses to high-strain deformations are of growing interest because of their ability to enable new biomedical devices and other applications whose requirements are impossible to satisfy with conventional wafer-based technologies or even with those that offer simple bendability. This article introduces materials and mechanical design strategies for classes of electronic circuits that offer extremely high stretchability, enabling them to accommodate even demanding configurations such as corkscrew twists with tight pitch (e.g., 90 degrees in approximately 1 cm) and linear stretching to "rubber-band" levels of strain (e.g., up to approximately 140%). The use of single crystalline silicon nanomaterials for the semiconductor provides performance in stretchable complementary metal-oxide-semiconductor (CMOS) integrated circuits approaching that of conventional devices with comparable feature sizes formed on silicon wafers. Comprehensive theoretical studies of the mechanics reveal the way in which the structural designs enable these extreme mechanical properties without fracturing the intrinsically brittle active materials or even inducing significant changes in their electrical properties. The results, as demonstrated through electrical measurements of arrays of transistors, CMOS inverters, ring oscillators, and differential amplifiers, suggest a valuable route to high-performance stretchable electronics.

Novel Approach to Evaluation of Charging on Semiconductor Surface by Noncontact, Electrode-Free Capacitance/Voltage Measurement

NASA Astrophysics Data System (ADS)

Hirae, Sadao; Kohno, Motohiro; Okada, Hiroshi; Matsubara, Hideaki; Nakatani, Ikuyoshi; Kusuda, Tatsufumi; Sakai, Takamasa

1994-04-01

This paper describes a novel approach to the quantitative characterization of semiconductor surface charging caused by plasma exposures and ion implantations. The problems in conventional evaluation of charging are also discussed. Following the discussions above, the necessity of unified criteria is suggested for efficient development of systems or processes without charging damage. Hence, the charging saturation voltage between a top oxide surface and substrate, V s, and the charging density per unit area per second, ρ0, should be taken as criteria of charging behavior, which effectively represent the charging characteristics of both processes. The unified criteria can be obtained from the exposure time dependence of a net charging density on the thick field oxide. In order to determine V s and ρ0, the analysis using the C-V curve measured in a noncontact method with the metal-air-insulator-semiconductor (MAIS) technique is employed. The total space-charge density in oxide and its centroid can be determined at the same time by analyzing the flat-band voltage (V fb) of the MAIS capacitor as a function of the air gap. The net charge density can be obtained by analyzing the difference between the total space-charge density in oxide before and after charging. Finally, it is shown that charge damage of the large area metal-oxide-semiconductor (MOS) capacitor can be estimated from both V s and ρ0 which are obtained from results for a thick field oxide implanted with As+ and exposed to oxygen plasma.

Monolithic integrated high-T.sub.c superconductor-semiconductor structure

NASA Technical Reports Server (NTRS)

Barfknecht, Andrew T. (Inventor); Garcia, Graham A. (Inventor); Russell, Stephen D. (Inventor); Burns, Michael J. (Inventor); de la Houssaye, Paul R. (Inventor); Clayton, Stanley R. (Inventor)

2000-01-01

A method for the fabrication of active semiconductor and high-temperature superconducting device of the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.

Optical-Interferometry-Based CMOS-MEMS Sensor Transduced by Stress-Induced Nanomechanical Deflection

PubMed Central

Maruyama, Satoshi; Hizawa, Takeshi; Takahashi, Kazuhiro; Sawada, Kazuaki

2018-01-01

We developed a Fabry–Perot interferometer sensor with a metal-oxide-semiconductor field-effect transistor (MOSFET) circuit for chemical sensing. The novel signal transducing technique was performed in three steps: mechanical deflection, transmittance change, and photocurrent change. A small readout photocurrent was processed by an integrated source follower circuit. The movable film of the sensor was a 350-nm-thick polychloro-para-xylylene membrane with a diameter of 100 µm and an air gap of 300 nm. The linearity of the integrated source follower circuit was obtained. We demonstrated a gas response using 80-ppm ethanol detected by small membrane deformation of 50 nm, which resulted in an output-voltage change with the proposed high-efficiency transduction. PMID:29304011

Optical-Interferometry-Based CMOS-MEMS Sensor Transduced by Stress-Induced Nanomechanical Deflection.

PubMed

Maruyama, Satoshi; Hizawa, Takeshi; Takahashi, Kazuhiro; Sawada, Kazuaki

2018-01-05

We developed a Fabry-Perot interferometer sensor with a metal-oxide-semiconductor field-effect transistor (MOSFET) circuit for chemical sensing. The novel signal transducing technique was performed in three steps: mechanical deflection, transmittance change, and photocurrent change. A small readout photocurrent was processed by an integrated source follower circuit. The movable film of the sensor was a 350-nm-thick polychloro-para-xylylene membrane with a diameter of 100 µm and an air gap of 300 nm. The linearity of the integrated source follower circuit was obtained. We demonstrated a gas response using 80-ppm ethanol detected by small membrane deformation of 50 nm, which resulted in an output-voltage change with the proposed high-efficiency transduction.

CMOS-micromachined, two-dimenisional transistor arrays for neural recording and stimulation.

PubMed

Lin, J S; Chang, S R; Chang, C H; Lu, S C; Chen, H

2007-01-01

In-plane microelectrode arrays have proven to be useful tools for studying the connectivities and the functions of neural tissues. However, seldom microelectrode arrays are monolithically-integrated with signal-processing circuits, without which the maximum number of electrodes is limited by the compromise with routing complexity and interferences. This paper proposes a CMOS-compatible, two-dimensional array of oxide-semiconductor field-effect transistors(OSFETs), capable of both recording and stimulating neuronal activities. The fabrication of the OSFETs not only requires simply die-level, post-CMOS micromachining process, but also retains metal layers for monolithic integration with signal-processing circuits. A CMOS microsystem containing the OSFET arrays and gain-programmable recording circuits has been fabricated and tested. The preliminary testing results are presented and discussed.

Neural CMOS-integrated circuit and its application to data classification.

PubMed

Göknar, Izzet Cem; Yildiz, Merih; Minaei, Shahram; Deniz, Engin

2012-05-01

Implementation and new applications of a tunable complementary metal-oxide-semiconductor-integrated circuit (CMOS-IC) of a recently proposed classifier core-cell (CC) are presented and tested with two different datasets. With two algorithms-one based on Fisher's linear discriminant analysis and the other based on perceptron learning, used to obtain CCs' tunable parameters-the Haberman and Iris datasets are classified. The parameters so obtained are used for hard-classification of datasets with a neural network structured circuit. Classification performance and coefficient calculation times for both algorithms are given. The CC has 6-ns response time and 1.8-mW power consumption. The fabrication parameters used for the IC are taken from CMOS AMS 0.35-μm technology.

A physically transient form of silicon electronics.

PubMed

Hwang, Suk-Won; Tao, Hu; Kim, Dae-Hyeong; Cheng, Huanyu; Song, Jun-Kyul; Rill, Elliott; Brenckle, Mark A; Panilaitis, Bruce; Won, Sang Min; Kim, Yun-Soung; Song, Young Min; Yu, Ki Jun; Ameen, Abid; Li, Rui; Su, Yewang; Yang, Miaomiao; Kaplan, David L; Zakin, Mitchell R; Slepian, Marvin J; Huang, Yonggang; Omenetto, Fiorenzo G; Rogers, John A

2012-09-28

A remarkable feature of modern silicon electronics is its ability to remain physically invariant, almost indefinitely for practical purposes. Although this characteristic is a hallmark of applications of integrated circuits that exist today, there might be opportunities for systems that offer the opposite behavior, such as implantable devices that function for medically useful time frames but then completely disappear via resorption by the body. We report a set of materials, manufacturing schemes, device components, and theoretical design tools for a silicon-based complementary metal oxide semiconductor (CMOS) technology that has this type of transient behavior, together with integrated sensors, actuators, power supply systems, and wireless control strategies. An implantable transient device that acts as a programmable nonantibiotic bacteriocide provides a system-level example.

Semiconductor nanostructures for artificial photosynthesis

NASA Astrophysics Data System (ADS)

Yang, Peidong

2012-02-01

Nanowires, with their unique capability to bridge the nanoscopic and macroscopic worlds, have already been demonstrated as important materials for different energy conversion. One emerging and exciting direction is their application for solar to fuel conversion. The generation of fuels by the direct conversion of solar energy in a fully integrated system is an attractive goal, but no such system has been demonstrated that shows the required efficiency, is sufficiently durable, or can be manufactured at reasonable cost. One of the most critical issues in solar water splitting is the development of a suitable photoanode with high efficiency and long-term durability in an aqueous environment. Semiconductor nanowires represent an important class of nanostructure building block for direct solar-to-fuel application because of their high surface area, tunable bandgap and efficient charge transport and collection. Nanowires can be readily designed and synthesized to deterministically incorporate heterojunctions with improved light absorption, charge separation and vectorial transport. Meanwhile, it is also possible to selectively decorate different oxidation or reduction catalysts onto specific segments of the nanowires to mimic the compartmentalized reactions in natural photosynthesis. In this talk, I will highlight several recent examples in this lab using semiconductor nanowires and their heterostructures for the purpose of direct solar water splitting.

Semiconductor technology program. Progress briefs

NASA Technical Reports Server (NTRS)

Bullis, W. M.

1980-01-01

Measurement technology for semiconductor materials, process control, and devices is reviewed. Activities include: optical linewidth and thermal resistance measurements; device modeling; dopant density profiles; resonance ionization spectroscopy; and deep level measurements. Standardized oxide charge terminology is also described.

A CMOS wireless biomolecular sensing system-on-chip based on polysilicon nanowire technology.

PubMed

Huang, C-W; Huang, Y-J; Yen, P-W; Tsai, H-H; Liao, H-H; Juang, Y-Z; Lu, S-S; Lin, C-T

2013-11-21

As developments of modern societies, an on-field and personalized diagnosis has become important for disease prevention and proper treatment. To address this need, in this work, a polysilicon nanowire (poly-Si NW) based biosensor system-on-chip (bio-SSoC) is designed and fabricated by a 0.35 μm 2-Poly-4-Metal (2P4M) complementary metal-oxide-semiconductor (CMOS) process provided by a commercialized semiconductor foundry. Because of the advantages of CMOS system-on-chip (SoC) technologies, the poly-Si NW biosensor is integrated with a chopper differential-difference amplifier (DDA) based analog-front-end (AFE), a successive approximation analog-to-digital converter (SAR ADC), and a microcontroller to have better sensing capabilities than a traditional Si NW discrete measuring system. In addition, an on-off key (OOK) wireless transceiver is also integrated to form a wireless bio-SSoC technology. This is pioneering work to harness the momentum of CMOS integrated technology into emerging bio-diagnosis technologies. This integrated technology is experimentally examined to have a label-free and low-concentration biomolecular detection for both Hepatitis B Virus DNA (10 fM) and cardiac troponin I protein (3.2 pM). Based on this work, the implemented wireless bio-SSoC has demonstrated a good biomolecular sensing characteristic and a potential for low-cost and mobile applications. As a consequence, this developed technology can be a promising candidate for on-field and personalized applications in biomedical diagnosis.

Methods for manufacturing geometric multi-crystalline cast materials

DOEpatents

Stoddard, Nathan G

2013-11-26

Methods are provided for casting one or more of a semi-conductor, an oxide, and an intermetallic material. With such methods, a cast body of a geometrically ordered multi-crystalline form of the one or more of a semiconductor, an oxide, and an intermetallic material may be formed that is free or substantially free of radially-distributed impurities and defects and having at least two dimensions that are each at least about 10 cm.

Methods for manufacturing monocrystalline or near-monocrystalline cast materials

DOEpatents

Stoddard, Nathan G

2014-04-29

Methods are provided for casting one or more of a semiconductor, an oxide, and an intermetallic material. With such methods, a cast body of a monocrystalline form of the one or more of a semiconductor, an oxide, and an intermetallic material may be formed that is free of, or substantially free of, radially-distributed impurities and defects and having at least two dimensions that are each at least about 35 cm.

A 94GHz Temperature Compensated Low Noise Amplifier in 45nm Silicon-on-Insulator Complementary Metal-Oxide Semiconductor (SOI CMOS)

DTIC Science & Technology

2014-01-01

ring oscillator based temperature sensor will be designed to compensate for gain variations over temperature. For comparison to a competing solution...Simulated (Green) Capacitance of the GSG Pads ........................ 9 Figure 6: Die Picture and Schematic of the L-2L Coplanar Waveguides...complementary metal-oxide-semiconductor (CMOS) technology. A ring oscillator based temperature sensor was designed to compensate for gain variations

77 FR 19032 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same Notice of Receipt...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-03-29

... INTERNATIONAL TRADE COMMISSION [DN 2888] Certain Semiconductor Integrated Circuit Devices and... Integrated Circuit Devices and Products Containing Same, DN 2888; the Commission is soliciting comments on... Commission's electronic docket (EDIS) at http://edis.usitc.gov , and will be available for inspection during...

Pseudo 2-transistor active pixel sensor using an n-well/gate-tied p-channel metal oxide semiconductor field eeffect transistor-type photodetector with built-in transfer gate

NASA Astrophysics Data System (ADS)

Seo, Sang-Ho; Seo, Min-Woong; Kong, Jae-Sung; Shin, Jang-Kyoo; Choi, Pyung

2008-11-01

In this paper, a pseudo 2-transistor active pixel sensor (APS) has been designed and fabricated by using an n-well/gate-tied p-channel metal oxide semiconductor field effect transistor (PMOSFET)-type photodetector with built-in transfer gate. The proposed sensor has been fabricated using a 0.35 μm 2-poly 4-metal standard complementary metal oxide semiconductor (CMOS) logic process. The pseudo 2-transistor APS consists of two NMOSFETs and one photodetector which can amplify the generated photocurrent. The area of the pseudo 2-transistor APS is 7.1 × 6.2 μm2. The sensitivity of the proposed pixel is 49 lux/(V·s). By using this pixel, a smaller pixel area and a higher level of sensitivity can be realized when compared with a conventional 3-transistor APS which uses a pn junction photodiode.

Characteristics of Superjunction Lateral-Double-Diffusion Metal Oxide Semiconductor Field Effect Transistor and Degradation after Electrical Stress

NASA Astrophysics Data System (ADS)

Lin, Jyh‑Ling; Lin, Ming‑Jang; Lin, Li‑Jheng

2006-04-01

The superjunction lateral double diffusion metal oxide semiconductor field effect has recently received considerable attention. Introducing heavily doped p-type strips to the n-type drift region increases the horizontal depletion capability. Consequently, the doping concentration of the drift region is higher and the conduction resistance is lower than those of conventional lateral-double-diffusion metal oxide semiconductor field effect transistors (LDMOSFETs). These characteristics may increase breakdown voltage (\\mathit{BV}) and reduce specific on-resistance (Ron,sp). In this study, we focus on the electrical characteristics of conventional LDMOSFETs on silicon bulk, silicon-on-insulator (SOI) LDMOSFETs and superjunction LDMOSFETs after bias stress. Additionally, the \\mathit{BV} and Ron,sp of superjunction LDMOSFETs with different N/P drift region widths and different dosages are discussed. Simulation tools, including two-dimensional (2-D) TSPREM-4/MEDICI and three-dimensional (3-D) DAVINCI, were employed to determine the device characteristics.

Comparative studies of Ge and Si p-channel metal-oxide-semiconductor field-effect-transistors with HfSiON dielectric and TaN metal gate

NASA Astrophysics Data System (ADS)

Hu, Ai-Bin; Xu, Qiu-Xia

2010-05-01

Ge and Si p-channel metal-oxide-semiconductor field-effect-transistors (p-MOSFETs) with hafnium silicon oxynitride (HfSiON) gate dielectric and tantalum nitride (TaN) metal gate are fabricated. Self-isolated ring-type transistor structures with two masks are employed. W/TaN metal stacks are used as gate electrode and shadow masks of source/drain implantation separately. Capacitance-voltage curve hysteresis of Ge metal-oxide-semiconductor (MOS) capacitors may be caused by charge trapping centres in GeO2 (1 < x < 2). Effective hole mobilities of Ge and Si transistors are extracted by using a channel conductance method. The peak hole mobilities of Si and Ge transistors are 33.4 cm2/(V · s) and 81.0 cm2/(V · s), respectively. Ge transistor has a hole mobility 2.4 times higher than that of Si control sample.

Nanometer-scale oxide thin film transistor with potential for high-density image sensor applications.

PubMed

Jeon, Sanghun; Park, Sungho; Song, Ihun; Hur, Ji-Hyun; Park, Jaechul; Kim, Hojung; Kim, Sunil; Kim, Sangwook; Yin, Huaxiang; Chung, U-In; Lee, Eunha; Kim, Changjung

2011-01-01

The integration of electronically active oxide components onto silicon circuits represents an innovative approach to improving the functionality of novel devices. Like most semiconductor devices, complementary-metal-oxide-semiconductor image sensors (CISs) have physical limitations when progressively scaled down to extremely small dimensions. In this paper, we propose a novel hybrid CIS architecture that is based on the combination of nanometer-scale amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) and a conventional Si photo diode (PD). With this approach, we aim to overcome the loss of quantum efficiency and image quality due to the continuous miniaturization of PDs. Specifically, the a-IGZO TFT with 180 nm gate length is probed to exhibit remarkable performance including low 1/f noise and high output gain, despite fabrication temperatures as low as 200 °C. In particular, excellent device performance is achieved using a double-layer gate dielectric (Al₂O₃/SiO₂) combined with a trapezoidal active region formed by a tailored etching process. A self-aligned top gate structure is adopted to ensure low parasitic capacitance. Lastly, three-dimensional (3D) process simulation tools are employed to optimize the four-pixel CIS structure. The results demonstrate how our stacked hybrid device could be the starting point for new device strategies in image sensor architectures. Furthermore, we expect the proposed approach to be applicable to a wide range of micro- and nanoelectronic devices and systems.

Hybrid UV Imager Containing Face-Up AlGaN/GaN Photodiodes

NASA Technical Reports Server (NTRS)

Zheng, Xinyu; Pain, Bedabrata

2005-01-01

A proposed hybrid ultraviolet (UV) image sensor would comprise a planar membrane array of face-up AlGaN/GaN photodiodes integrated with a complementary metal oxide/semiconductor (CMOS) readout-circuit chip. Each pixel in the hybrid image sensor would contain a UV photodiode on the AlGaN/GaN membrane, metal oxide/semiconductor field-effect transistor (MOSFET) readout circuitry on the CMOS chip underneath the photodiode, and a metal via connection between the photodiode and the readout circuitry (see figure). The proposed sensor design would offer all the advantages of comparable prior CMOS active-pixel sensors and AlGaN UV detectors while overcoming some of the limitations of prior (AlGaN/sapphire)/CMOS hybrid image sensors that have been designed and fabricated according to the methodology of flip-chip integration. AlGaN is a nearly ideal UV-detector material because its bandgap is wide and adjustable and it offers the potential to attain extremely low dark current. Integration of AlGaN with CMOS is necessary because at present there are no practical means of realizing readout circuitry in the AlGaN/GaN material system, whereas the means of realizing readout circuitry in CMOS are well established. In one variant of the flip-chip approach to integration, an AlGaN chip on a sapphire substrate is inverted (flipped) and then bump-bonded to a CMOS readout circuit chip; this variant results in poor quantum efficiency. In another variant of the flip-chip approach, an AlGaN chip on a crystalline AlN substrate would be bonded to a CMOS readout circuit chip; this variant is expected to result in narrow spectral response, which would be undesirable in many applications. Two other major disadvantages of flip-chip integration are large pixel size (a consequence of the need to devote sufficient area to each bump bond) and severe restriction on the photodetector structure. The membrane array of AlGaN/GaN photodiodes and the CMOS readout circuit for the proposed image sensor would be fabricated separately.

Analysis of the capability to effectively design complementary metal oxide semiconductor integrated circuits

NASA Astrophysics Data System (ADS)

McConkey, M. L.

1984-12-01

A complete CMOS/BULK design cycle has been implemented and fully tested to evaluate its effectiveness and a viable set of computer-aided design tools for the layout, verification, and simulation of CMOS/BULK integrated circuits. This design cycle is good for p-well, n-well, or twin-well structures, although current fabrication technique available limit this to p-well only. BANE, an integrated layout program from Stanford, is at the center of this design cycle and was shown to be simple to use in the layout of CMOS integrated circuits (it can be also used to layout NMOS integrated circuits). A flowchart was developed showing the design cycle from initial layout, through design verification, and to circuit simulation using NETLIST, PRESIM, and RNL from the University of Washington. A CMOS/BULK library was designed and includes logic gates that were designed and completely tested by following this flowchart. Also designed was an arithmetic logic unit as a more complex test of the CMOS/BULK design cycle.

Radiation induced failures of complementary metal oxide semiconductor containing pacemakers: a potentially lethal complication

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lewin, A.A.; Serago, C.F.; Schwade, J.G.

1984-10-01

New multi-programmable pacemakers frequently employ complementary metal oxide semiconductors (CMOS). This circuitry appears more sensitive to the effects of ionizing radiation when compared to the semiconductor circuits used in older pacemakers. A case of radiation induced runaway pacemaker in a CMOS device is described. Because of this and other recent reports of radiation therapy-induced CMOS type pacemaker failure, these pacemakers should not be irradiated. If necessary, the pacemaker can be shielded or moved to a site which can be shielded before institution of radiation therapy. This is done to prevent damage to the CMOS circuit and the life threatening arrythmiasmore » which may result from such damage.« less

Semiconductor composition containing iron, dysprosium, and terbium

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pooser, Raphael C.; Lawrie, Benjamin J.; Baddorf, Arthur P.

An amorphous semiconductor composition includes 1 to 70 atomic percent iron, 15 to 65 atomic percent dysprosium, 15 to 35 atomic percent terbium, balance X, wherein X is at least one of an oxidizing element and a reducing element. The composition has an essentially amorphous microstructure, an optical transmittance of at least 50% in at least the visible spectrum and semiconductor electrical properties.

Extreme Carrier Depletion and Superlinear Photoconductivity in Ultrathin Parallel-Aligned ZnO Nanowire Array Photodetectors Fabricated by Infiltration Synthesis

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nam, Chang-Yong; Stein, Aaron

Ultrathin semiconductor nanowires enable high-performance chemical sensors and photodetectors, but their synthesis and device integration by standard complementary metal-oxide-semiconductor (CMOS)-compatible processes remain persistent challenges. This work demonstrates fully CMOS-compatible synthesis and integration of parallel-aligned polycrystalline ZnO nanowire arrays into ultraviolet photodetectors via infiltration synthesis, material hybridization technique derived from atomic layer deposition. The nanowire photodetector features unique, high device performances originating from extreme charge carrier depletion, achieving photoconductive on–off ratios of >6 decades, blindness to visible light, and ultralow dark currents as low as 1 fA, the lowest reported for nanostructure-based photoconductive photodetectors. Surprisingly, the low dark current is invariantmore » with increasing number of nanowires and the photodetector shows unusual superlinear photoconductivity, observed for the first time in nanowires, leading to increasing detector responsivity and other parameters for higher incident light powers. Temperature-dependent carrier concentration and mobility reveal the photoelectrochemical-thermionic emission process at grain boundaries, responsible for the observed unique photodetector performances and superlinear photoconductivity. Here, the results elucidate fundamental processes responsible for photogain in polycrystalline nanostructures, providing useful guidelines for developing nanostructure-based detectors and sensors. Lastly, the developed fully CMOS-compatible nanowire synthesis and device fabrication methods also have potentials for scalable integration of nanowire sensor devices and circuitries.« less

Extreme Carrier Depletion and Superlinear Photoconductivity in Ultrathin Parallel-Aligned ZnO Nanowire Array Photodetectors Fabricated by Infiltration Synthesis

DOE PAGES

Nam, Chang-Yong; Stein, Aaron

2017-11-15

Ultrathin semiconductor nanowires enable high-performance chemical sensors and photodetectors, but their synthesis and device integration by standard complementary metal-oxide-semiconductor (CMOS)-compatible processes remain persistent challenges. This work demonstrates fully CMOS-compatible synthesis and integration of parallel-aligned polycrystalline ZnO nanowire arrays into ultraviolet photodetectors via infiltration synthesis, material hybridization technique derived from atomic layer deposition. The nanowire photodetector features unique, high device performances originating from extreme charge carrier depletion, achieving photoconductive on–off ratios of >6 decades, blindness to visible light, and ultralow dark currents as low as 1 fA, the lowest reported for nanostructure-based photoconductive photodetectors. Surprisingly, the low dark current is invariantmore » with increasing number of nanowires and the photodetector shows unusual superlinear photoconductivity, observed for the first time in nanowires, leading to increasing detector responsivity and other parameters for higher incident light powers. Temperature-dependent carrier concentration and mobility reveal the photoelectrochemical-thermionic emission process at grain boundaries, responsible for the observed unique photodetector performances and superlinear photoconductivity. Here, the results elucidate fundamental processes responsible for photogain in polycrystalline nanostructures, providing useful guidelines for developing nanostructure-based detectors and sensors. Lastly, the developed fully CMOS-compatible nanowire synthesis and device fabrication methods also have potentials for scalable integration of nanowire sensor devices and circuitries.« less

Optical devices integrated with semiconductor optical amplifier

NASA Astrophysics Data System (ADS)

Oh, Kwang R.; Park, Moon S.; Jeong, Jong S.; Baek, Yongsoon; Oh, Dae-Kon

2000-07-01

Semiconductor optical amplifiers (SOA's) have been used as a key optical component for the high capacity communication systems. The monolithic integration is necessary for the stable operation of these devices and the wider applications. In this paper, the coupling technique between different waveguides and the integration of SSC's are discussed and the research results of optical devices integrated with SOA's are presented.

Interface Structure of MoO3 on Organic Semiconductors

PubMed Central

White, Robin T.; Thibau, Emmanuel S.; Lu, Zheng-Hong

2016-01-01

We have systematically studied interface structure formed by vapor-phase deposition of typical transition metal oxide MoO3 on organic semiconductors. Eight organic hole transport materials have been used in this study. Ultraviolet photoelectron spectroscopy and X-ray photoelectron spectroscopy are used to measure the evolution of the physical, chemical and electronic structure of the interfaces at various stages of MoO3 deposition on these organic semiconductor surfaces. For the interface physical structure, it is found that MoO3 diffuses into the underlying organic layer, exhibiting a trend of increasing diffusion with decreasing molecular molar mass. For the interface chemical structure, new carbon and molybdenum core-level states are observed, as a result of interfacial electron transfer from organic semiconductor to MoO3. For the interface electronic structure, energy level alignment is observed in agreement with the universal energy level alignment rule of molecules on metal oxides, despite deposition order inversion. PMID:26880185

Method for making a monolithic integrated high-T.sub.c superconductor-semiconductor structure

NASA Technical Reports Server (NTRS)

Burns, Michael J. (Inventor); de la Houssaye, Paul R. (Inventor); Russell, Stephen D. (Inventor); Garcia, Graham A. (Inventor); Barfknecht, Andrew T. (Inventor); Clayton, Stanley R. (Inventor)

2000-01-01

A method for the fabrication of active semiconductor and high-temperature perconducting devices on the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.

Damage free Ar ion plasma surface treatment on In{sub 0.53}Ga{sub 0.47}As-on-silicon metal-oxide-semiconductor device

DOE Office of Scientific and Technical Information (OSTI.GOV)

Koh, Donghyi; Shin, Seung Heon; Ahn, Jaehyun

2015-11-02

In this paper, we investigated the effect of in-situ Ar ion plasma surface pre-treatment in order to improve the interface properties of In{sub 0.53}Ga{sub 0.47}As for high-κ top-gate oxide deposition. X-ray photoelectron spectroscopy (XPS) and metal-oxide-semiconductor capacitors (MOSCAPs) demonstrate that Ar ion treatment removes the native oxide on In{sub 0.53}Ga{sub 0.47}As. The XPS spectra of Ar treated In{sub 0.53}Ga{sub 0.47}As show a decrease in the AsO{sub x} and GaO{sub x} signal intensities, and the MOSCAPs show higher accumulation capacitance (C{sub acc}), along with reduced frequency dispersion. In addition, Ar treatment is found to suppress the interface trap density (D{sub it}),more » which thereby led to a reduction in the threshold voltage (V{sub th}) degradation during constant voltage stress and relaxation. These results outline the potential of surface treatment for III-V channel metal-oxide-semiconductor devices and application to non-planar device process.« less

The preparation method of terahertz monolithic integrated device

NASA Astrophysics Data System (ADS)

Zhang, Cong; Su, Bo; He, Jingsuo; Zhang, Hongfei; Wu, Yaxiong; Zhang, Shengbo; Zhang, Cunlin

2018-01-01

The terahertz monolithic integrated device is to integrate the pumping area of the terahertz generation, the detection area of the terahertz receiving and the metal waveguide of terahertz transmission on the same substrate. The terahertz generation and detection device use a photoconductive antenna structure the metal waveguide use a microstrip line structure. The evanescent terahertz-bandwidth electric field extending above the terahertz transmission line interacts with, and is modified by, overlaid dielectric samples, thus enabling the characteristic vibrational absorption resonances in the sample to be probed. In this device structure, since the semiconductor substrate of the photoconductive antenna is located between the strip conductor and the dielectric layer of the microstrip line, and the semiconductor substrate cannot grow on the dielectric layer directly. So how to prepare the semiconductor substrate of the photoconductive antenna and how to bond the semiconductor substrate to the dielectric layer of the microstrip line is a key step in the terahertz monolithic integrated device. In order to solve this critical problem, the epitaxial wafer structure of the two semiconductor substrates is given and transferred to the desired substrate by two methods, respectively.

Steep-slope hysteresis-free negative capacitance MoS2 transistors

NASA Astrophysics Data System (ADS)

Si, Mengwei; Su, Chun-Jung; Jiang, Chunsheng; Conrad, Nathan J.; Zhou, Hong; Maize, Kerry D.; Qiu, Gang; Wu, Chien-Ting; Shakouri, Ali; Alam, Muhammad A.; Ye, Peide D.

2018-01-01

The so-called Boltzmann tyranny defines the fundamental thermionic limit of the subthreshold slope of a metal-oxide-semiconductor field-effect transistor (MOSFET) at 60 mV dec-1 at room temperature and therefore precludes lowering of the supply voltage and overall power consumption1,2. Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this fundamental barrier3. Meanwhile, two-dimensional semiconductors such as atomically thin transition-metal dichalcogenides, due to their low dielectric constant and ease of integration into a junctionless transistor topology, offer enhanced electrostatic control of the channel4-12. Here, we combine these two advantages and demonstrate a molybdenum disulfide (MoS2) two-dimensional steep-slope transistor with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack. This device exhibits excellent performance in both on and off states, with a maximum drain current of 510 μA μm-1 and a sub-thermionic subthreshold slope, and is essentially hysteresis-free. Negative differential resistance was observed at room temperature in the MoS2 negative-capacitance FETs as the result of negative capacitance due to the negative drain-induced barrier lowering. A high on-current-induced self-heating effect was also observed and studied.

Role of point defects and HfO2/TiN interface stoichiometry on effective work function modulation in ultra-scaled complementary metal-oxide-semiconductor devices

NASA Astrophysics Data System (ADS)

Pandey, R. K.; Sathiyanarayanan, Rajesh; Kwon, Unoh; Narayanan, Vijay; Murali, K. V. R. M.

2013-07-01

We investigate the physical properties of a portion of the gate stack of an ultra-scaled complementary metal-oxide-semiconductor (CMOS) device. The effects of point defects, such as oxygen vacancy, oxygen, and aluminum interstitials at the HfO2/TiN interface, on the effective work function of TiN are explored using density functional theory. We compute the diffusion barriers of such point defects in the bulk TiN and across the HfO2/TiN interface. Diffusion of these point defects across the HfO2/TiN interface occurs during the device integration process. This results in variation of the effective work function and hence in the threshold voltage variation in the devices. Further, we simulate the effects of varying the HfO2/TiN interface stoichiometry on the effective work function modulation in these extremely-scaled CMOS devices. Our results show that the interface rich in nitrogen gives higher effective work function, whereas the interface rich in titanium gives lower effective work function, compared to a stoichiometric HfO2/TiN interface. This theoretical prediction is confirmed by the experiment, demonstrating over 700 meV modulation in the effective work function.

Effects of ultrathin oxides in conducting MIS structures on GaAs

NASA Technical Reports Server (NTRS)

Childs, R. B.; Ruths, J. M.; Sullivan, T. E.; Fonash, S. J.

1978-01-01

Schottky barrier-type GaAs baseline devices (semiconductor surface etched and then immediately metalized) and GaAs conducting metal oxide-semiconductor devices are fabricated and characterized. The baseline surfaces (no purposeful oxide) are prepared by a basic or an acidic etch, while the surface for the MIS devices are prepared by oxidizing after the etch step. The metallizations used are thin-film Au, Ag, Pd, and Al. It is shown that the introduction of purposeful oxide into these Schottky barrier-type structures examined on n-type GaAs modifies the barrier formation, and that thin interfacial layers can modify barrier formation through trapping and perhaps chemical reactions. For Au- and Pd-devices, enhanced photovoltaic performance of the MIS configuration is due to increased barrier height.

Radiation evaluation study of LSI RAM technologies

NASA Astrophysics Data System (ADS)

Dinger, G. L.; Knoll, M. G.

1980-01-01

Five commercial LSI static random access memory technologies having a 1 kilobit capacity were radiation characterized. Arrays from the transistor-transistor-logic (TTL), Schottky TTL, n-channel metal oxide semiconductor, complementary metal oxide semiconductor (CMOS), and CMOS/silicon on sapphire families were evaluated. Radiation failure thresholds for gamma doserate logic upset, total gamma dose survivability, and neutron fluence survivability were determined. A brief analysis of the radiation failure mechanism for each of the logic families tested is included.

In Situ Chemical Modification of Schottky Barrier in Solution-Processed Zinc Tin Oxide Diode.

PubMed

Son, Youngbae; Li, Jiabo; Peterson, Rebecca L

2016-09-14

Here we present a novel in situ chemical modification process to form vertical Schottky diodes using palladium (Pd) rectifying bottom contacts, amorphous zinc tin oxide (Zn-Sn-O) semiconductor made via acetate-based solution process, and molybdenum top ohmic contacts. Using X-ray photoelectron spectroscopy depth profiling, we show that oxygen plasma treatment of Pd creates a PdOx interface layer, which is then reduced back to metallic Pd by in situ reactions during Zn-Sn-O film annealing. The plasma treatment ensures an oxygen-rich environment in the semiconductor near the Schottky barrier, reducing the level of oxygen-deficiency-related defects and improving the rectifying contact. Using this process, we achieve diodes with high forward current density exceeding 10(3)A cm(-2) at 1 V, rectification ratios of >10(2), and ideality factors of around 1.9. The measured diode current-voltage characteristics are compared to numerical simulations of thermionic field emission with sub-bandgap states in the semiconductor, which we attribute to spatial variations in metal stoichiometry of amorphous Zn-Sn-O. To the best of our knowledge, this is the first demonstration of vertical Schottky diodes using solution-processed amorphous metal oxide semiconductor. Furthermore, the in situ chemical modification method developed here can be adapted to tune interface properties in many other oxide devices.

A metallic metal oxide (Ti5O9)-metal oxide (TiO2) nanocomposite as the heterojunction to enhance visible-light photocatalytic activity

NASA Astrophysics Data System (ADS)

Li, L. H.; Deng, Z. X.; Xiao, J. X.; Yang, G. W.

2015-06-01

Coupling titanium dioxide (TiO2) with other semiconductors is a popular method to extend the optical response range of TiO2 and improve its photon quantum efficiency, as coupled semiconductors can increase the separation rate of photoinduced charge carriers in photocatalysts. Differing from normal semiconductors, metallic oxides have no energy gap separating occupied and unoccupied levels, but they can excite electrons between bands to create a high carrier mobility to facilitate kinetic charge separation. Here, we propose the first metallic metal oxide-metal oxide (Ti5O9-TiO2) nanocomposite as a heterojunction for enhancing the visible-light photocatalytic activity of TiO2 nanoparticles and we demonstrate that this hybridized TiO2-Ti5O9 nanostructure possesses an excellent visible-light photocatalytic performance in the process of photodegrading dyes. The TiO2-Ti5O9 nanocomposites are synthesized in one step using laser ablation in liquid under ambient conditions. The as-synthesized nanocomposites show strong visible-light absorption in the range of 300-800 nm and high visible-light photocatalytic activity in the oxidation of rhodamine B. They also exhibit excellent cycling stability in the photodegrading process. A working mechanism for the metallic metal oxide-metal oxide nanocomposite in the visible-light photocatalytic process is proposed based on first-principle calculations of Ti5O9. This study suggests that metallic metal oxides can be regarded as partners for metal oxide photocatalysts in the construction of heterojunctions to improve photocatalytic activity.

A metallic metal oxide (Ti5O9)-metal oxide (TiO2) nanocomposite as the heterojunction to enhance visible-light photocatalytic activity.

PubMed

Li, L H; Deng, Z X; Xiao, J X; Yang, G W

2015-01-26

Coupling titanium dioxide (TiO2) with other semiconductors is a popular method to extend the optical response range of TiO2 and improve its photon quantum efficiency, as coupled semiconductors can increase the separation rate of photoinduced charge carriers in photocatalysts. Differing from normal semiconductors, metallic oxides have no energy gap separating occupied and unoccupied levels, but they can excite electrons between bands to create a high carrier mobility to facilitate kinetic charge separation. Here, we propose the first metallic metal oxide-metal oxide (Ti5O9-TiO2) nanocomposite as a heterojunction for enhancing the visible-light photocatalytic activity of TiO2 nanoparticles and we demonstrate that this hybridized TiO2-Ti5O9 nanostructure possesses an excellent visible-light photocatalytic performance in the process of photodegrading dyes. The TiO2-Ti5O9 nanocomposites are synthesized in one step using laser ablation in liquid under ambient conditions. The as-synthesized nanocomposites show strong visible-light absorption in the range of 300-800 nm and high visible-light photocatalytic activity in the oxidation of rhodamine B. They also exhibit excellent cycling stability in the photodegrading process. A working mechanism for the metallic metal oxide-metal oxide nanocomposite in the visible-light photocatalytic process is proposed based on first-principle calculations of Ti5O9. This study suggests that metallic metal oxides can be regarded as partners for metal oxide photocatalysts in the construction of heterojunctions to improve photocatalytic activity.

A mixed solution-processed gate dielectric for zinc-tin oxide thin-film transistor and its MIS capacitance

NASA Astrophysics Data System (ADS)

Kim, Hunho; Kwack, Young-Jin; Yun, Eui-Jung; Choi, Woon-Seop

2016-09-01

Solution-processed gate dielectrics were fabricated with the combined ZrO2 and Al2O3 (ZAO) in the form of mixed and stacked types for oxide thin film transistors (TFTs). ZAO thin films prepared with double coatings for solid gate dielectrics were characterized by analytical tools. For the first time, the capacitance of the oxide semiconductor was extracted from the capacitance-voltage properties of the zinc-tin oxide (ZTO) TFTs with the combined ZAO dielectrics by using the proposed metal-insulator-semiconductor (MIS) structure model. The capacitance evolution of the semiconductor from the TFT model structure described well the threshold voltage shift observed in the ZTO TFT with the ZAO (1:2) gate dielectric. The electrical properties of the ZTO TFT with a ZAO (1:2) gate dielectric showed low voltage driving with a field effect mobility of 37.01 cm2/Vs, a threshold voltage of 2.00 V, an on-to-off current ratio of 1.46 × 105, and a subthreshold slope of 0.10 V/dec.

A mixed solution-processed gate dielectric for zinc-tin oxide thin-film transistor and its MIS capacitance

PubMed Central

Kim, Hunho; Kwack, Young-Jin; Yun, Eui-Jung; Choi, Woon-Seop

2016-01-01

Solution-processed gate dielectrics were fabricated with the combined ZrO2 and Al2O3 (ZAO) in the form of mixed and stacked types for oxide thin film transistors (TFTs). ZAO thin films prepared with double coatings for solid gate dielectrics were characterized by analytical tools. For the first time, the capacitance of the oxide semiconductor was extracted from the capacitance-voltage properties of the zinc-tin oxide (ZTO) TFTs with the combined ZAO dielectrics by using the proposed metal-insulator-semiconductor (MIS) structure model. The capacitance evolution of the semiconductor from the TFT model structure described well the threshold voltage shift observed in the ZTO TFT with the ZAO (1:2) gate dielectric. The electrical properties of the ZTO TFT with a ZAO (1:2) gate dielectric showed low voltage driving with a field effect mobility of 37.01 cm2/Vs, a threshold voltage of 2.00 V, an on-to-off current ratio of 1.46 × 105, and a subthreshold slope of 0.10 V/dec. PMID:27641430

Silver decorated polymer supported semiconductor thin films by UV aided metalized laser printing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Halbur, Jonathan C.; Padbury, Richard P.; Jur, Jesse S., E-mail: jsjur@ncsu.edu

2016-05-15

A facile ultraviolet assisted metalized laser printing technique is demonstrated through the ability to control selective photodeposition of silver on flexible substrates after atomic layer deposition pretreatment with zinc oxide and titania. The photodeposition of noble metals such as silver onto high surface area, polymer supported semiconductor metal oxides exhibits a new route for nanoparticle surface modification of photoactive enhanced substrates. Photodeposited silver is subsequently characterized using low voltage secondary electron microscopy, x-ray diffraction, and time of flight secondary ion mass spectroscopy. At the nanoscale, the formation of specific morphologies, flake and particle, is highlighted after silver is photodeposited onmore » zinc oxide and titania coated substrates, respectively. The results indicate that the morphology and composition of the silver after photodeposition has a strong dependency on the morphology, crystallinity, and impurity content of the underlying semiconductor oxide. At the macroscale, this work demonstrates how the nanoscale features rapidly coalesce into a printed pattern through the use of masks or an X-Y gantry stage with virtually unlimited design control.« less

Cadmium-free junction fabrication process for CuInSe.sub.2 thin film solar cells

DOEpatents

Ramanathan, Kannan V.; Contreras, Miguel A.; Bhattacharya, Raghu N.; Keane, James; Noufi, Rommel

1999-01-01

The present invention provides an economical, simple, dry and controllable semiconductor layer junction forming process to make cadmium free high efficiency photovoltaic cells having a first layer comprised primarily of copper indium diselenide having a thin doped copper indium diselenide n-type region, generated by thermal diffusion with a group II(b) element such as zinc, and a halide, such as chlorine, and a second layer comprised of a conventional zinc oxide bilayer. A photovoltaic device according the present invention includes a first thin film layer of semiconductor material formed primarily from copper indium diselenide. Doping of the copper indium diselenide with zinc chloride is accomplished using either a zinc chloride solution or a solid zinc chloride material. Thermal diffusion of zinc chloride into the copper indium diselenide upper region creates the thin n-type copper indium diselenide surface. A second thin film layer of semiconductor material comprising zinc oxide is then applied in two layers. The first layer comprises a thin layer of high resistivity zinc oxide. The second relatively thick layer of zinc oxide is doped to exhibit low resistivity.

Sustained hole inversion layer in a wide-bandgap metal-oxide semiconductor with enhanced tunnel current

PubMed Central

Shoute, Gem; Afshar, Amir; Muneshwar, Triratna; Cadien, Kenneth; Barlage, Douglas

2016-01-01

Wide-bandgap, metal-oxide thin-film transistors have been limited to low-power, n-type electronic applications because of the unipolar nature of these devices. Variations from the n-type field-effect transistor architecture have not been widely investigated as a result of the lack of available p-type wide-bandgap inorganic semiconductors. Here, we present a wide-bandgap metal-oxide n-type semiconductor that is able to sustain a strong p-type inversion layer using a high-dielectric-constant barrier dielectric when sourced with a heterogeneous p-type material. A demonstration of the utility of the inversion layer was also investigated and utilized as the controlling element in a unique tunnelling junction transistor. The resulting electrical performance of this prototype device exhibited among the highest reported current, power and transconductance densities. Further utilization of the p-type inversion layer is critical to unlocking the previously unexplored capability of metal-oxide thin-film transistors, such applications with next-generation display switches, sensors, radio frequency circuits and power converters. PMID:26842997

Differential-Mode Biosensor Using Dual Extended-Gate Metal-Oxide-Semiconductor Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Choi, Jinhyeon; Lee, Hee Ho; Ahn, Jungil; Seo, Sang-Ho; Shin, Jang-Kyoo

2012-06-01

In this paper, we present a differential-mode biosensor using dual extended-gate metal-oxide-semiconductor field-effect transistors (MOSFETs), which possesses the advantages of both the extended-gate structure and the differential-mode operation. The extended-gate MOSFET was fabricated using a 0.6 µm standard complementary metal oxide semiconductor (CMOS) process. The Au extended gate is the sensing gate on which biomolecules are immobilized, while the Pt extended gate is the dummy gate for use in the differential-mode detection circuit. The differential-mode operation offers many advantages such as insensitivity to the variation of temperature and light, as well as low noise. The outputs were measured using a semiconductor parameter analyzer in a phosphate buffered saline (PBS; pH 7.4) solution. A standard Ag/AgCl reference electrode was used to apply the gate bias. We measured the variation of output voltage with time, temperature, and light intensity. The bindings of self-assembled monolayer (SAM), streptavidin, and biotin caused a variation in the output voltage of the differential-mode detection circuit and this was confirmed by surface plasmon resonance (SPR) experiment. Biotin molecules could be detected up to a concentration of as low as 0.001 µg/ml.

Polymer/metal oxide hybrid dielectrics for low voltage field-effect transistors with solution-processed, high-mobility semiconductors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Held, Martin; Schießl, Stefan P.; Gannott, Florentina

Transistors for future flexible organic light-emitting diode (OLED) display backplanes should operate at low voltages and be able to sustain high currents over long times without degradation. Hence, high capacitance dielectrics with low surface trap densities are required that are compatible with solution-processable high-mobility semiconductors. Here, we combine poly(methyl methacrylate) (PMMA) and atomic layer deposition hafnium oxide (HfO{sub x}) into a bilayer hybrid dielectric for field-effect transistors with a donor-acceptor polymer (DPPT-TT) or single-walled carbon nanotubes (SWNTs) as the semiconductor and demonstrate substantially improved device performances for both. The ultra-thin PMMA layer ensures a low density of trap states atmore » the semiconductor-dielectric interface while the metal oxide layer provides high capacitance, low gate leakage and superior barrier properties. Transistors with these thin (≤70 nm), high capacitance (100–300 nF/cm{sup 2}) hybrid dielectrics enable low operating voltages (<5 V), balanced charge carrier mobilities and low threshold voltages. Moreover, the hybrid layers substantially improve the bias stress stability of the transistors compared to those with pure PMMA and HfO{sub x} dielectrics.« less

HfSe2 and ZrSe2: Two-dimensional semiconductors with native high-κ oxides

PubMed Central

Mleczko, Michal J.; Zhang, Chaofan; Lee, Hye Ryoung; Kuo, Hsueh-Hui; Magyari-Köpe, Blanka; Moore, Robert G.; Shen, Zhi-Xun; Fisher, Ian R.; Nishi, Yoshio; Pop, Eric

2017-01-01

The success of silicon as a dominant semiconductor technology has been enabled by its moderate band gap (1.1 eV), permitting low-voltage operation at reduced leakage current, and the existence of SiO2 as a high-quality “native” insulator. In contrast, other mainstream semiconductors lack stable oxides and must rely on deposited insulators, presenting numerous compatibility challenges. We demonstrate that layered two-dimensional (2D) semiconductors HfSe2 and ZrSe2 have band gaps of 0.9 to 1.2 eV (bulk to monolayer) and technologically desirable “high-κ” native dielectrics HfO2 and ZrO2, respectively. We use spectroscopic and computational studies to elucidate their electronic band structure and then fabricate air-stable transistors down to three-layer thickness with careful processing and dielectric encapsulation. Electronic measurements reveal promising performance (on/off ratio > 106; on current, ~30 μA/μm), with native oxides reducing the effects of interfacial traps. These are the first 2D materials to demonstrate technologically relevant properties of silicon, in addition to unique compatibility with high-κ dielectrics, and scaling benefits from their atomically thin nature. PMID:28819644

Lower-Dark-Current, Higher-Blue-Response CMOS Imagers

NASA Technical Reports Server (NTRS)

Pain, Bedabrata; Cunningham, Thomas; Hancock, Bruce

2008-01-01

Several improved designs for complementary metal oxide/semiconductor (CMOS) integrated-circuit image detectors have been developed, primarily to reduce dark currents (leakage currents) and secondarily to increase responses to blue light and increase signal-handling capacities, relative to those of prior CMOS imagers. The main conclusion that can be drawn from a study of the causes of dark currents in prior CMOS imagers is that dark currents could be reduced by relocating p/n junctions away from Si/SiO2 interfaces. In addition to reflecting this conclusion, the improved designs include several other features to counteract dark-current mechanisms and enhance performance.

Miniature biotelemeter gives multichannel wideband biomedical data

NASA Technical Reports Server (NTRS)

Carraway, J. B.

1972-01-01

A miniature biotelemeter was developed for sensing and transmitting multiple channels of biomedical data over a radio link. The design of this miniature, 10-channel, wideband (5 kHz/channel), pulse amplitude modulation/ frequency modulation biotelemeter takes advantage of modern device technology (e.g., integrated circuit operational amplifiers, complementary symmetry/metal oxide semiconductor logic, and solid state switches) and hybrid packaging techniques. The telemeter is being used to monitor 10 channels of neuron firings from specific regions of the brain in rats implanted with chronic electrodes. Design, fabrication, and testing of an engineering model biotelemeter are described.

Study of proton radiation effects among diamond and rectangular gate MOSFET layouts

NASA Astrophysics Data System (ADS)

Seixas, L. E., Jr.; Finco, S.; Silveira, M. A. G.; Medina, N. H.; Gimenez, S. P.

2017-01-01

This paper describes an experimental comparative study of proton ionizing radiation effects between the metal-oxide-semiconductor (MOS) Field Effect Transistors (MOSFETs) implemented with hexagonal gate shapes (diamond) and their respective counterparts designed with the classical rectangular ones, regarding the same gate areas, channel widths and geometrical ratios (W/L). The devices were manufactured by using the 350 nm bulk complementary MOS (CMOS) integrated circuits technology. The diamond MOSFET with α angles higher or equal to 90° tends to present a smaller vulnerability to the high doses ionizing radiation than those observed in the typical rectangular MOSFET counterparts.

Biological preconcentrator

DOEpatents

Manginell, Ronald P [Albuquerque, NM; Bunker, Bruce C [Albuquerque, NM; Huber, Dale L [Albuquerque, NM

2008-09-09

A biological preconcentrator comprises a stimulus-responsive active film on a stimulus-producing microfabricated platform. The active film can comprise a thermally switchable polymer film that can be used to selectively absorb and desorb proteins from a protein mixture. The biological microfabricated platform can comprise a thin membrane suspended on a substrate with an integral resistive heater and/or thermoelectric cooler for thermal switching of the active polymer film disposed on the membrane. The active polymer film can comprise hydrogel-like polymers, such as poly(ethylene oxide) or poly(n-isopropylacrylamide), that are tethered to the membrane. The biological preconcentrator can be fabricated with semiconductor materials and technologies.

Researchers Validate UV Light's Use in Improving Semiconductors | News |

Science.gov Websites

device. The ability to use different classes of semiconductors could create additional possibilities for integrating a variety of different semiconductors in the future," Park said. The researchers explored

Stable surface passivation process for compound semiconductors

DOEpatents

Ashby, Carol I. H.

2001-01-01

A passivation process for a previously sulfided, selenided or tellurated III-V compound semiconductor surface. The concentration of undesired mid-gap surface states on a compound semiconductor surface is reduced by the formation of a near-monolayer of metal-(sulfur and/or selenium and/or tellurium)-semiconductor that is effective for long term passivation of the underlying semiconductor surface. Starting with the III-V compound semiconductor surface, any oxidation present thereon is substantially removed and the surface is then treated with sulfur, selenium or tellurium to form a near-monolayer of chalcogen-semiconductor of the surface in an oxygen-free atmosphere. This chalcogenated surface is then contacted with a solution of a metal that will form a low solubility chalcogenide to form a near-monolayer of metal-chalcogen-semiconductor. The resulting passivating layer provides long term protection for the underlying surface at or above the level achieved by a freshly chalcogenated compound semiconductor surface in an oxygen free atmosphere.

Arbitrary Multicolor Photodetection by Hetero-integrated Semiconductor Nanostructures

PubMed Central

Sang, Liwen; Hu, Junqing; Zou, Rujia; Koide, Yasuo; Liao, Meiyong

2013-01-01

The typical photodetectors can only detect one specific optical spectral band, such as InGaAs and graphene-PbS quantum dots for near-infrared (NIR) light detection, CdS and Si for visible light detection, and ZnO and III-nitrides for UV light detection. So far, none of the developed photodetector can achieve the multicolor detection with arbitrary spectral selectivity, high sensitivity, high speed, high signal-to-noise ratio, high stability, and simplicity (called 6S requirements). Here, we propose a universal strategy to develop multicolor photodetectors with arbitrary spectral selectivity by integrating various semiconductor nanostructures on a wide-bandgap semiconductor or an insulator substrate. Because the photoresponse of each spectral band is determined by each semiconductor nanostructure or the semiconductor substrate, multicolor detection satisfying 6S requirements can be readily satisfied by selecting the right semiconductors. PMID:23917790

Photovoltaic devices comprising zinc stannate buffer layer and method for making

DOEpatents

Wu, Xuanzhi; Sheldon, Peter; Coutts, Timothy J.

2001-01-01

A photovoltaic device has a buffer layer zinc stannate Zn.sub.2 SnO.sub.4 disposed between the semiconductor junction structure and the transparent conducting oxide (TCO) layer to prevent formation of localized junctions with the TCO through a thin window semiconductor layer, to prevent shunting through etched grain boundaries of semiconductors, and to relieve stresses and improve adhesion between these layers.

Capacitive Micro Pressure Sensor Integrated with a Ring Oscillator Circuit on Chip

PubMed Central

Dai, Ching-Liang; Lu, Po-Wei; Chang, Chienliu; Liu, Cheng-Yang

2009-01-01

The study investigates a capacitive micro pressure sensor integrated with a ring oscillator circuit on a chip. The integrated capacitive pressure sensor is fabricated using the commercial CMOS (complementary metal oxide semiconductor) process and a post-process. The ring oscillator is employed to convert the capacitance of the pressure sensor into the frequency output. The pressure sensor consists of 16 sensing cells in parallel. Each sensing cell contains a top electrode and a lower electrode, and the top electrode is a sandwich membrane. The pressure sensor needs a post-CMOS process to release the membranes after completion of the CMOS process. The post-process uses etchants to etch the sacrificial layers, and to release the membranes. The advantages of the post-process include easy execution and low cost. Experimental results reveal that the pressure sensor has a high sensitivity of 7 Hz/Pa in the pressure range of 0–300 kPa. PMID:22303167

A Reconfigurable Readout Integrated Circuit for Heterogeneous Display-Based Multi-Sensor Systems

PubMed Central

Park, Kyeonghwan; Kim, Seung Mok; Eom, Won-Jin; Kim, Jae Joon

2017-01-01

This paper presents a reconfigurable multi-sensor interface and its readout integrated circuit (ROIC) for display-based multi-sensor systems, which builds up multi-sensor functions by utilizing touch screen panels. In addition to inherent touch detection, physiological and environmental sensor interfaces are incorporated. The reconfigurable feature is effectively implemented by proposing two basis readout topologies of amplifier-based and oscillator-based circuits. For noise-immune design against various noises from inherent human-touch operations, an alternate-sampling error-correction scheme is proposed and integrated inside the ROIC, achieving a 12-bit resolution of successive approximation register (SAR) of analog-to-digital conversion without additional calibrations. A ROIC prototype that includes the whole proposed functions and data converters was fabricated in a 0.18 μm complementary metal oxide semiconductor (CMOS) process, and its feasibility was experimentally verified to support multiple heterogeneous sensing functions of touch, electrocardiogram, body impedance, and environmental sensors. PMID:28368355

A Reconfigurable Readout Integrated Circuit for Heterogeneous Display-Based Multi-Sensor Systems.

PubMed

Park, Kyeonghwan; Kim, Seung Mok; Eom, Won-Jin; Kim, Jae Joon

2017-04-03

This paper presents a reconfigurable multi-sensor interface and its readout integrated circuit (ROIC) for display-based multi-sensor systems, which builds up multi-sensor functions by utilizing touch screen panels. In addition to inherent touch detection, physiological and environmental sensor interfaces are incorporated. The reconfigurable feature is effectively implemented by proposing two basis readout topologies of amplifier-based and oscillator-based circuits. For noise-immune design against various noises from inherent human-touch operations, an alternate-sampling error-correction scheme is proposed and integrated inside the ROIC, achieving a 12-bit resolution of successive approximation register (SAR) of analog-to-digital conversion without additional calibrations. A ROIC prototype that includes the whole proposed functions and data converters was fabricated in a 0.18 μm complementary metal oxide semiconductor (CMOS) process, and its feasibility was experimentally verified to support multiple heterogeneous sensing functions of touch, electrocardiogram, body impedance, and environmental sensors.

Capacitive micro pressure sensor integrated with a ring oscillator circuit on chip.

PubMed

Dai, Ching-Liang; Lu, Po-Wei; Chang, Chienliu; Liu, Cheng-Yang

2009-01-01

The study investigates a capacitive micro pressure sensor integrated with a ring oscillator circuit on a chip. The integrated capacitive pressure sensor is fabricated using the commercial CMOS (complementary metal oxide semiconductor) process and a post-process. The ring oscillator is employed to convert the capacitance of the pressure sensor into the frequency output. The pressure sensor consists of 16 sensing cells in parallel. Each sensing cell contains a top electrode and a lower electrode, and the top electrode is a sandwich membrane. The pressure sensor needs a post-CMOS process to release the membranes after completion of the CMOS process. The post-process uses etchants to etch the sacrificial layers, and to release the membranes. The advantages of the post-process include easy execution and low cost. Experimental results reveal that the pressure sensor has a high sensitivity of 7 Hz/Pa in the pressure range of 0-300 kPa.

CMOS-Compatible Silicon Nanowire Field-Effect Transistor Biosensor: Technology Development toward Commercialization

PubMed Central

Wolfrum, Bernhard; Thierry, Benjamin

2018-01-01

Owing to their two-dimensional confinements, silicon nanowires display remarkable optical, magnetic, and electronic properties. Of special interest has been the development of advanced biosensing approaches based on the field effect associated with silicon nanowires (SiNWs). Recent advancements in top-down fabrication technologies have paved the way to large scale production of high density and quality arrays of SiNW field effect transistor (FETs), a critical step towards their integration in real-life biosensing applications. A key requirement toward the fulfilment of SiNW FETs’ promises in the bioanalytical field is their efficient integration within functional devices. Aiming to provide a comprehensive roadmap for the development of SiNW FET based sensing platforms, we critically review and discuss the key design and fabrication aspects relevant to their development and integration within complementary metal-oxide-semiconductor (CMOS) technology. PMID:29751688

Millimeter wave complementary metal-oxide-semiconductor on-chip hexagonal nano-ferrite circulator

NASA Astrophysics Data System (ADS)

Chao, Liu; Oukacha, Hassan; Fu, Enjin; Koomson, Valencia Joyner; Afsar, Mohammed N.

2015-05-01

Hexagonal ferrites such as M-type BaFe12O19 and SrFe12O19 have strong uniaxial anisotropic magnetic field and remanent magnetism. The nano-sized ferrite powder exhibits high compatibility and processability in composite material. New magnetic devices using the M-type ferrite materials can work in the tens of GHz frequency range from microwave to millimeter wave without the application of strong external magnetic field. The micro- and nano-sized hexagonal ferrite can be conveniently utilized to fabricate magnetic components integrated in CMOS integrated circuits as thin as several micrometers. The micro-fabrication method of such nano ferrite device is presented in this paper. A circulator working at 60 GHz is designed and integrated into the commercial CMOS process. The circulator exhibits distinct circulation properties in the frequency range from 56 GHz to 58 GHz.

All-optical differential equation solver with constant-coefficient tunable based on a single microring resonator.

PubMed

Yang, Ting; Dong, Jianji; Lu, Liangjun; Zhou, Linjie; Zheng, Aoling; Zhang, Xinliang; Chen, Jianping

2014-07-04

Photonic integrated circuits for photonic computing open up the possibility for the realization of ultrahigh-speed and ultra wide-band signal processing with compact size and low power consumption. Differential equations model and govern fundamental physical phenomena and engineering systems in virtually any field of science and engineering, such as temperature diffusion processes, physical problems of motion subject to acceleration inputs and frictional forces, and the response of different resistor-capacitor circuits, etc. In this study, we experimentally demonstrate a feasible integrated scheme to solve first-order linear ordinary differential equation with constant-coefficient tunable based on a single silicon microring resonator. Besides, we analyze the impact of the chirp and pulse-width of input signals on the computing deviation. This device can be compatible with the electronic technology (typically complementary metal-oxide semiconductor technology), which may motivate the development of integrated photonic circuits for optical computing.

All-optical differential equation solver with constant-coefficient tunable based on a single microring resonator

PubMed Central

Yang, Ting; Dong, Jianji; Lu, Liangjun; Zhou, Linjie; Zheng, Aoling; Zhang, Xinliang; Chen, Jianping

2014-01-01

Photonic integrated circuits for photonic computing open up the possibility for the realization of ultrahigh-speed and ultra wide-band signal processing with compact size and low power consumption. Differential equations model and govern fundamental physical phenomena and engineering systems in virtually any field of science and engineering, such as temperature diffusion processes, physical problems of motion subject to acceleration inputs and frictional forces, and the response of different resistor-capacitor circuits, etc. In this study, we experimentally demonstrate a feasible integrated scheme to solve first-order linear ordinary differential equation with constant-coefficient tunable based on a single silicon microring resonator. Besides, we analyze the impact of the chirp and pulse-width of input signals on the computing deviation. This device can be compatible with the electronic technology (typically complementary metal-oxide semiconductor technology), which may motivate the development of integrated photonic circuits for optical computing. PMID:24993440

Direct Measurement of Cyclic Current-Voltage Responses of Integral Membrane Proteins at a Self-Assembled Lipid-Bilayer-Modified Electrode: Cytochrome f and Cytochrome c Oxidase

NASA Astrophysics Data System (ADS)

Salamon, Z.; Hazzard, J. T.; Tollin, G.

1993-07-01

Direct cyclic voltage-current responses, produced in the absence of redox mediators, for two detergent-solubilized integral membrane proteins, spinach cytochrome f and beef heart cytochrome c oxidase, have been obtained at an optically transparent indium oxide electrode modified with a self-assembled lipid-bilayer membrane. The results indicate that both proteins interact with the lipid membrane so as to support quasi-reversible electron transfer redox reactions at the semiconductor electrode. The redox potentials that were obtained from analysis of the cyclic "voltammograms," 365 mV for cytochrome f and 250 and 380 mV for cytochrome c oxidase (vs. normal hydrogen electrode), compare quite well with the values reported by using conventional titration methods. The ability to obtain direct electrochemical measurements opens up another approach to the investigation of the properties of integral membrane redox proteins.

Novel photoinduced phase transitions in transition metal oxides and diluted magnetic semiconductors.

PubMed

Mizokawa, Takashi

2012-10-23

Some transition metal oxides have frustrated electronic states under multiphase competition due to strongly correlated d electrons with spin, charge, and orbital degrees of freedom and exhibit drastic responses to external stimuli such as optical excitation. Here, we present photoemission studies on Pr0.55(Ca1 - ySry)0.45MnO3 (y = 0.25), SrTiO3, and Ti1 - xCoxO2 (x = 0.05, 0.10) under laser illumination and discuss electronic structural changes induced by optical excitation in these strongly correlated oxides. We discuss the novel photoinduced phase transitions in these transition metal oxides and diluted magnetic semiconductors on the basis of polaronic pictures such as orbital, ferromagnetic, and ferroelectric polarons.

Interface states and internal photoemission in p-type GaAs metal-oxide-semiconductor surfaces

NASA Technical Reports Server (NTRS)

Kashkarov, P. K.; Kazior, T. E.; Lagowski, J.; Gatos, H. C.

1983-01-01

An interface photodischarge study of p-type GaAs metal-oxide-semiconductor (MOS) structures revealed the presence of deep interface states and shallow donors and acceptors which were previously observed in n-type GaAs MOS through sub-band-gap photoionization transitions. For higher photon energies, internal photoemission was observed, i.e., injection of electrons to the conduction band of the oxide from either the metal (Au) or from the GaAs valence band; the threshold energies were found to be 3.25 and 3.7 + or - 0.1 eV, respectively. The measured photoemission current exhibited a thermal activation energy of about 0.06 eV, which is consistent with a hopping mechanism of electron transport in the oxide.

Defect-Rich Dopant-Free ZrO2 Nanostructures with Superior Dilute Ferromagnetic Semiconductor Properties.

PubMed

Rahman, Md Anisur; Rout, S; Thomas, Joseph P; McGillivray, Donald; Leung, Kam Tong

2016-09-14

Control of the spin degree of freedom of an electron has brought about a new era in spin-based applications, particularly spin-based electronics, with the potential to outperform the traditional charge-based semiconductor technology for data storage and information processing. However, the realization of functional spin-based devices for information processing remains elusive due to several fundamental challenges such as the low Curie temperature of group III-V and II-VI semiconductors (<200 K), and the low spin-injection efficiencies of existing III-V, II-VI, and transparent conductive oxide semiconductors in a multilayer device structure, which are caused by precipitation and migration of dopants from the host layer to the adjacent layers. Here, we use catalyst-assisted pulsed laser deposition to grow, for the first time, oxygen vacancy defect-rich, dopant-free ZrO2 nanostructures with high TC (700 K) and high magnetization (5.9 emu/g). The observed magnetization is significantly greater than both doped and defect-rich transparent conductive oxide nanomaterials reported to date. We also provide the first experimental evidence that it is the amounts and types of oxygen vacancy defects in, and not the phase of ZrO2 that control the ferromagnetic order in undoped ZrO2 nanostructures. To explain the origin of ferromagnetism in these ZrO2 nanostructures, we hypothesize a new defect-induced bound polaron model, which is generally applicable to other defect-rich, dopant-free transparent conductive oxide nanostructures. These results provide new insights into magnetic ordering in undoped dilute ferromagnetic semiconductor oxides and contribute to the design of exotic magnetic and novel multifunctional materials.

Low temperature mobility in hafnium-oxide gated germanium p-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Beer, Chris; Whall, Terry; Parker, Evan; Leadley, David; De Jaeger, Brice; Nicholas, Gareth; Zimmerman, Paul; Meuris, Marc; Szostak, Slawomir; Gluszko, Grzegorz; Lukasiak, Lidia

2007-12-01

Effective mobility measurements have been made at 4.2K on high performance high-k gated germanium p-type metal-oxide-semiconductor field effect transistors with a range of Ge/gate dielectric interface state densities. The mobility is successfully modelled by assuming surface roughness and interface charge scattering at the SiO2 interlayer/Ge interface. The deduced interface charge density is approximately equal to the values obtained from the threshold voltage and subthreshold slope measurements on each device. A hydrogen anneal reduces both the interface state density and the surface root mean square roughness by 20%.

Light-Immune pH Sensor with SiC-Based Electrolyte-Insulator-Semiconductor Structure

NASA Astrophysics Data System (ADS)

Lin, Yi-Ting; Huang, Chien-Shiang; Chow, Lee; Lan, Jyun-Ming; Yang, Chia-Ming; Chang, Liann-Be; Lai, Chao-Sung

2013-12-01

An electrolyte-insulator-semiconductor (EIS) structure with high-band-gap semiconductor of silicon carbide is demonstrated as a pH sensor in this report. Two different sensing membranes, i.e., gadolinium oxide (Gd2O3) and hafnium oxide (HfO2), were investigated. The HfO2 film deposited by atomic layer deposition (ALD) at low temperature shows high pH sensing properties with a sensitivity of 52.35 mV/pH and a low signal of 4.95 mV due to light interference. The EIS structures with silicon carbide can provide better visible light immunity due to its high band gap that allows pH detection in an outdoor environment without degradation of pH sensitivity.

The 5-kW arcjet power electronics

NASA Technical Reports Server (NTRS)

Gruber, R. P.; Gott, R. W.; Haag, T. W.

1989-01-01

The initial design and evaluation of a 5 kW arcjet power electronics breadboard which as been integrated with a modified 1 kW design laboratory arcjet is presented. A single stage, 5 kW full bridge, pulse width modulated (PWM), power converter was developed which was phase shift regulated. The converter used metal oxide semiconductor field effect transistor (MOSFET) power switches and incorporated current mode control and an integral arcjet pulse ignition circuit. The unoptimized power efficiency was 93.5 and 93.9 percent at 5 kW and 50A output at input voltages of 130 and 150V, respectively. Line and load current regulation at 50A output was within one percent. The converter provided up to 6.6 kW to the arcjet with simulated ammonia used as a propellant.

Materials and fabrication sequences for water soluble silicon integrated circuits at the 90 nm node

NASA Astrophysics Data System (ADS)

Yin, Lan; Bozler, Carl; Harburg, Daniel V.; Omenetto, Fiorenzo; Rogers, John A.

2015-01-01

Tungsten interconnects in silicon integrated circuits built at the 90 nm node with releasable configurations on silicon on insulator wafers serve as the basis for advanced forms of water-soluble electronics. These physically transient systems have potential uses in applications that range from temporary biomedical implants to zero-waste environmental sensors. Systematic experimental studies and modeling efforts reveal essential aspects of electrical performance in field effect transistors and complementary ring oscillators with as many as 499 stages. Accelerated tests reveal timescales for dissolution of the various constituent materials, including tungsten, silicon, and silicon dioxide. The results demonstrate that silicon complementary metal-oxide-semiconductor circuits formed with tungsten interconnects in foundry-compatible fabrication processes can serve as a path to high performance, mass-produced transient electronic systems.

A 72 × 60 Angle-Sensitive SPAD Imaging Array for Lens-less FLIM.

PubMed

Lee, Changhyuk; Johnson, Ben; Jung, TaeSung; Molnar, Alyosha

2016-09-02

We present a 72 × 60, angle-sensitive single photon avalanche diode (A-SPAD) array for lens-less 3D fluorescence lifetime imaging. An A-SPAD pixel consists of (1) a SPAD to provide precise photon arrival time where a time-resolved operation is utilized to avoid stimulus-induced saturation, and (2) integrated diffraction gratings on top of the SPAD to extract incident angles of the incoming light. The combination enables mapping of fluorescent sources with different lifetimes in 3D space down to micrometer scale. Futhermore, the chip presented herein integrates pixel-level counters to reduce output data-rate and to enable a precise timing control. The array is implemented in standard 180 nm complementary metal-oxide-semiconductor (CMOS) technology and characterized without any post-processing.

Waveguide silicon nitride grating coupler

NASA Astrophysics Data System (ADS)

Litvik, Jan; Dolnak, Ivan; Dado, Milan

2016-12-01

Grating couplers are one of the most used elements for coupling of light between optical fibers and photonic integrated components. Silicon-on-insulator platform provides strong confinement of light and allows high integration. In this work, using simulations we have designed a broadband silicon nitride surface grating coupler. The Fourier-eigenmode expansion and finite difference time domain methods are utilized in design optimization of grating coupler structure. The fully, single etch step grating coupler is based on a standard silicon-on-insulator wafer with 0.55 μm waveguide Si3N4 layer. The optimized structure at 1550 nm wavelength yields a peak coupling efficiency -2.6635 dB (54.16%) with a 1-dB bandwidth up to 80 nm. It is promising way for low-cost fabrication using complementary metal-oxide- semiconductor fabrication process.

Ultralow-Loss CMOS Copper Plasmonic Waveguides.

PubMed

Fedyanin, Dmitry Yu; Yakubovsky, Dmitry I; Kirtaev, Roman V; Volkov, Valentyn S

2016-01-13

Surface plasmon polaritons can give a unique opportunity to manipulate light at a scale well below the diffraction limit reducing the size of optical components down to that of nanoelectronic circuits. At the same time, plasmonics is mostly based on noble metals, which are not compatible with microelectronics manufacturing technologies. This prevents plasmonic components from integration with both silicon photonics and silicon microelectronics. Here, we demonstrate ultralow-loss copper plasmonic waveguides fabricated in a simple complementary metal-oxide semiconductor (CMOS) compatible process, which can outperform gold plasmonic waveguides simultaneously providing long (>40 μm) propagation length and deep subwavelength (∼λ(2)/50, where λ is the free-space wavelength) mode confinement in the telecommunication spectral range. These results create the backbone for the development of a CMOS plasmonic platform and its integration in future electronic chips.

A 72 × 60 Angle-Sensitive SPAD Imaging Array for Lens-less FLIM

PubMed Central

Lee, Changhyuk; Johnson, Ben; Jung, TaeSung; Molnar, Alyosha

2016-01-01

We present a 72 × 60, angle-sensitive single photon avalanche diode (A-SPAD) array for lens-less 3D fluorescence lifetime imaging. An A-SPAD pixel consists of (1) a SPAD to provide precise photon arrival time where a time-resolved operation is utilized to avoid stimulus-induced saturation, and (2) integrated diffraction gratings on top of the SPAD to extract incident angles of the incoming light. The combination enables mapping of fluorescent sources with different lifetimes in 3D space down to micrometer scale. Futhermore, the chip presented herein integrates pixel-level counters to reduce output data-rate and to enable a precise timing control. The array is implemented in standard 180 nm complementary metal-oxide-semiconductor (CMOS) technology and characterized without any post-processing. PMID:27598170

Highly integrated 3×3 silicon thermo-optical switch using a single combined phase shifter for optical interconnects.

PubMed

Wang, Wanjun; Zhou, Haifeng; Yang, Jianyi; Wang, Minghua; Jiang, Xiaoqing

2012-06-15

We report on an experimental 3×3 thermo-optical switch on silicon on insulator. By controlling a single combined phase shifter, light from any input waveguide can be directed to any output waveguide, showing a simple control method and highly integrated structure as compared to the conventional multiway optical switches. Furthermore, the proposed optical switch can be generalized to be a 1×N and N×N optical switch without an extra phase shifter. The switch is fabricated by complementary metal oxide semiconductor technology. By experiment, full 3×3 switching functionality is demonstrated at a wavelength of 1.55 μm, with an average cross talk of -11.1  dB and a power consumption of 97.5 mW.

BRIEF COMMUNICATIONS: Q switching of a resonator by the metal-semiconductor phase transition

NASA Astrophysics Data System (ADS)

Bugaev, A. A.; Zakharchenya, Boris P.; Chudnovskiĭ, F. A.

1981-12-01

An experimental study was made of Q switching in a resonator by a mirror with a nonlinear reflection coefficient. This mirror was an interference reflecting structure containing a vanadium oxide film capable of undergoing a metal-semiconductor transition. The nonlinearity of the reflection coefficient was due to initiation of this phase transition by laser radiation. A determination was made of the parameters of a giant radiation pulse obtained using such a passive switch with a vanadium oxide film.

Silicon Satellites: Picosats, Nanosats, and Microsats

NASA Technical Reports Server (NTRS)

Janson, Siegfried W.

1995-01-01

Silicon, the most abundant solid element in the Earth's lithosphere, is a useful material for spacecraft construction. Silicon is stronger than stainless steel, has a thermal conductivity about half that of aluminum, is transparent to much of the infrared radiation spectrum, and can form a stable oxide. These unique properties enable silicon to become most of the mass of a satellite, it can simultaneously function as structure, heat transfer system, radiation shield, optics, and semiconductor substrate. Semiconductor batch-fabrication techniques can produce low-power digital circuits, low-power analog circuits, silicon-based radio frequency circuits, and micro-electromechanical systems (MEMS) such as thrusters and acceleration sensors on silicon substrates. By exploiting these fabrication techniques, it is possible to produce highly-integrated satellites for a number of applications. This paper analyzes the limitations of silicon satellites due to size. Picosatellites (approximately 1 gram mass), nanosatellites (about 1 kg mass), and highly capable microsatellites (about 10 kg mass) can perform various missions with lifetimes of a few days to greater than a decade.

Quasi-Two-Dimensional h-BN/β-Ga2O3 Heterostructure Metal-Insulator-Semiconductor Field-Effect Transistor.

PubMed

Kim, Janghyuk; Mastro, Michael A; Tadjer, Marko J; Kim, Jihyun

2017-06-28

β-gallium oxide (β-Ga 2 O 3 ) and hexagonal boron nitride (h-BN) heterostructure-based quasi-two-dimensional metal-insulator-semiconductor field-effect transistors (MISFETs) were demonstrated by integrating mechanical exfoliation of (quasi)-two-dimensional materials with a dry transfer process, wherein nanothin flakes of β-Ga 2 O 3 and h-BN were utilized as the channel and gate dielectric, respectively, of the MISFET. The h-BN dielectric, which has an extraordinarily flat and clean surface, provides a minimal density of charged impurities on the interface between β-Ga 2 O 3 and h-BN, resulting in superior device performances (maximum transconductance, on/off ratio, subthreshold swing, and threshold voltage) compared to those of the conventional back-gated configurations. Also, double-gating of the fabricated device was demonstrated by biasing both top and bottom gates, achieving the modulation of the threshold voltage. This heterostructured wide-band-gap nanodevice shows a new route toward stable and high-power nanoelectronic devices.

A self-assembled microbonded germanium/silicon heterojunction photodiode for 25 Gb/s high-speed optical interconnects

PubMed Central

Tseng, Chih-Kuo; Chen, Wei-Ting; Chen, Ku-Hung; Liu, Han-Din; Kang, Yimin; Na, Neil; Lee, Ming-Chang M.

2013-01-01

A novel technique using surface tension to locally bond germanium (Ge) on silicon (Si) is presented for fabricating high performance Ge/Si photodiodes. Surface tension is a cohesive force among liquid molecules that tends to bring contiguous objects in contact to maintain a minimum surface energy. We take advantage of this phenomenon to fabricate a heterojunction optoelectronic device where the lattice constants of joined semiconductors are different. A high-speed Ge/Si heterojunction waveguide photodiode is presented by microbonding a beam-shaped Ge, first grown by rapid-melt-growth (RMG) method, on top of a Si waveguide via surface tension. Excellent device performances such as an operating bandwidth of 17 GHz and a responsivity of 0.66 and 0.70 A/W at the reverse bias of −4 and −6 V, respectively, are demonstrated. This technique can be simply implemented via modern complementary metal-oxide-semiconductor (CMOS) fabrication technologies for integrating Ge on Si devices. PMID:24232956

Silicon and germanium nanowire electronics: physics of conventional and unconventional transistors

NASA Astrophysics Data System (ADS)

Weber, Walter M.; Mikolajick, Thomas

2017-06-01

Research in the field of electronics of 1D group-IV semiconductor structures has attracted increasing attention over the past 15 years. The exceptional combination of the unique 1D electronic transport properties with the mature material know-how of highly integrated silicon and germanium technology holds the promise of enhancing state-of-the-art electronics. In addition of providing conduction channels that can bring conventional field effect transistors to the uttermost scaling limits, the physics of 1D group IV nanowires endows new device principles. Such unconventional silicon and germanium nanowire devices are contenders for beyond complementary metal oxide semiconductor (CMOS) computing by virtue of their distinct switching behavior and higher expressive value. This review conveys to the reader a systematic recapitulation and analysis of the physics of silicon and germanium nanowires and the most relevant CMOS and CMOS-like devices built from silicon and germanium nanowires, including inversion mode, junctionless, steep-slope, quantum well and reconfigurable transistors.

Compact modeling of total ionizing dose and aging effects in MOS technologies

DOE PAGES

Esqueda, Ivan S.; Barnaby, Hugh J.; King, Michael Patrick

2015-06-18

This paper presents a physics-based compact modeling approach that incorporates the impact of total ionizing dose (TID) and stress-induced defects into simulations of metal-oxide-semiconductor (MOS) devices and integrated circuits (ICs). This approach utilizes calculations of surface potential (ψs) to capture the charge contribution from oxide trapped charge and interface traps and to describe their impact on MOS electrostatics and device operating characteristics as a function of ionizing radiation exposure and aging effects. The modeling approach is demonstrated for bulk and silicon-on-insulator (SOI) MOS device. The formulation is verified using TCAD simulations and through the comparison of model calculations and experimentalmore » I-V characteristics from irradiated devices. The presented approach is suitable for modeling TID and aging effects in advanced MOS devices and ICs.« less

The Pr 2O 3/Si(0 0 1) interface studied by synchrotron radiation photo-electron spectroscopy

NASA Astrophysics Data System (ADS)

Schmeißer, D.; Müssig, H.-J.

2003-10-01

Pr 2O 3 is currently under consideration as a potential replacement for SiO 2 as the gate-dielectric material for sub-0.1 μm complementary metal-oxide-semiconductor (CMOS) technology. We studied the Pr 2O 3/Si(0 0 1) interface by a non-destructive depth profiling using synchrotron radiation photoelectron spectroscopy. Our data suggests that there is no silicide formation at the interface. Based on reported results, a chemical reactive interface exists, consisting of a mixed Si-Pr oxide such as (Pr 2O 3) x(SiO 2) 1- x, i.e. as a silicate phase with variable silicon content. This pseudo-binary alloy at the interface offers large flexibility toward successful integration of Pr 2O 3 into future CMOS technologies.

Nanotechnology Based Green Energy Conversion Devices with Multifunctional Materials at Low Temperatures.

PubMed

Lu, Yuzheng; Afzal, Muhammad; Zhu, Bin; Wang, Baoyuan; Wang, Jun; Xia, Chen

2017-07-10

Nanocomposites (integrating the nano and composite technologies) for advanced fuel cells (NANOCOFC) demonstrate the great potential to reduce the operational temperature of solid oxide fuel cell (SOFC) significantly in the low temperature (LT) range 300-600ºC. NANOCOFC has offered the development of multi-functional materials composed of semiconductor and ionic materials to meet the requirements of low temperature solid oxide fuel cell (LTSOFC) and green energy conversion devices with their unique mechanisms. This work reviews the recent developments relevant to the devices and the patents in LTSOFCs from nanotechnology perspectives that reports advances including fabrication methods, material compositions, characterization techniques and cell performances. Finally, the future scope of LTSOFC with nanotechnology and the practical applications are also discussed. Copyright© Bentham Science Publishers; For any queries, please email at epub@benthamscience.org.

75 FR 75694 - Certain Semiconductor Integration Circuits Using Tungsten Metallization and Products Containing...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-12-06

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-648] Certain Semiconductor Integration Circuits Using Tungsten Metallization and Products Containing Same; Notice of Commission Decision To Dismiss the Investigation as Moot AGENCY: U.S. International Trade Commission. ACTION: Notice. SUMMARY...

Pioneering University/Industry Venture Explores VLSI Frontiers.

ERIC Educational Resources Information Center

Davis, Dwight B.

1983-01-01

Discusses industry-sponsored programs in semiconductor research, focusing on Stanford University's Center for Integrated Systems (CIS). CIS, while pursuing research in semiconductor very-large-scale integration, is merging the fields of computer science, information science, and physical science. Issues related to these university/industry…

Effect of NO annealing on charge traps in oxide insulator and transition layer for 4H-SiC metal-oxide-semiconductor devices

NASA Astrophysics Data System (ADS)

Jia, Yifan; Lv, Hongliang; Niu, Yingxi; Li, Ling; Song, Qingwen; Tang, Xiaoyan; Li, Chengzhan; Zhao, Yanli; Xiao, Li; Wang, Liangyong; Tang, Guangming; Zhang, Yimen; Zhang, Yuming

2016-09-01

The effect of nitric oxide (NO) annealing on charge traps in the oxide insulator and transition layer in n-type 4H-SiC metal-oxide-semiconductor (MOS) devices has been investigated using the time-dependent bias stress (TDBS), capacitance-voltage (C-V), and secondary ion mass spectroscopy (SIMS). It is revealed that two main categories of charge traps, near interface oxide traps (Nniot) and oxide traps (Not), have different responses to the TDBS and C-V characteristics in NO-annealed and Ar-annealed samples. The Nniot are mainly responsible for the hysteresis occurring in the bidirectional C-V characteristics, which are very close to the semiconductor interface and can readily exchange charges with the inner semiconductor. However, Not is mainly responsible for the TDBS induced C-V shifts. Electrons tunneling into the Not are hardly released quickly when suffering TDBS, resulting in the problem of the threshold voltage stability. Compared with the Ar-annealed sample, Nniot can be significantly suppressed by the NO annealing, but there is little improvement of Not. SIMS results demonstrate that the Nniot are distributed within the transition layer, which correlated with the existence of the excess silicon. During the NO annealing process, the excess Si atoms incorporate into nitrogen in the transition layer, allowing better relaxation of the interface strain and effectively reducing the width of the transition layer and the density of Nniot. Project supported by the National Natural Science Foundation of China (Grant Nos. 61404098 and 61274079), the Doctoral Fund of Ministry of Education of China (Grant No. 20130203120017), the National Key Basic Research Program of China (Grant No. 2015CB759600), the National Grid Science & Technology Project, China (Grant No. SGRI-WD-71-14-018), and the Key Specific Project in the National Science & Technology Program, China (Grant Nos. 2013ZX02305002-002 and 2015CB759600).

Optical temperature sensor using thermochromic semiconductors

DOEpatents

Kronberg, James W.

1996-01-01

An optical temperature measuring device utilizes thermochromic semiconductors which vary in color in response to changes in temperature. The thermochromic material is sealed in a glass matrix which allows the temperature sensor to detect high temperatures without breakdown. Cuprous oxide and cadmium sulfide are among the semiconductor materials which provide the best results. The changes in color may be detected visually or by utilizing an optical fiber and an electrical sensing circuit.

Optical temperature sensor using thermochromic semiconductors

DOEpatents

Kronberg, James W.

1998-01-01

An optical temperature measuring device utilizes thermochromic semiconductors which vary in color in response to changes in temperature. The thermochromic material is sealed in a glass matrix which allows the temperature sensor to detect high temperatures without breakdown. Cuprous oxide and cadmium sulfide are among the semiconductor materials which provide the best results. The changes in color may be detected visually using a sensor chip and an accompanying color card.

Metal-Semiconductor Nanocomposites for High Efficiency Thermoelectric Power Generation

DTIC Science & Technology

2013-12-07

standard III–V compound semiconductor processing techniques with terbium- doped InGaAs of high terbium concentration, Journal of Vacuum Science...even lower the required temperature for strong covalent bonding. We performed the oxide bonding for this substrate transfer task (see Figure 16 for...appropriate controls for assessing ErSb:InGaSb and other nanocomposites of p-type III-V compound semiconductors and their alloys. UCSC group calculated

Optical temperature sensor using thermochromic semiconductors

DOEpatents

Kronberg, J.W.

1998-06-30

An optical temperature measuring device utilizes thermochromic semiconductors which vary in color in response to changes in temperature. The thermochromic material is sealed in a glass matrix which allows the temperature sensor to detect high temperatures without breakdown. Cuprous oxide and cadmium sulfide are among the semiconductor materials which provide the best results. The changes in color may be detected visually using a sensor chip and an accompanying color card. 8 figs.

Locally oxidized silicon surface-plasmon Schottky detector for telecom regime.

PubMed

Goykhman, Ilya; Desiatov, Boris; Khurgin, Jacob; Shappir, Joseph; Levy, Uriel

2011-06-08

We experimentally demonstrate an on-chip nanoscale silicon surface-plasmon Schottky photodetector based on internal photoemission process and operating at telecom wavelengths. The device is fabricated using a self-aligned approach of local-oxidation of silicon (LOCOS) on silicon on insulator substrate, which provides compatibility with standard complementary metal-oxide semiconductor technology and enables the realization of the photodetector and low-loss bus photonic waveguide at the same fabrication step. Additionally, LOCOS technique allows avoiding lateral misalignment between the silicon surface and the metal layer to form a nanoscale Schottky contact. The fabricated devices showed enhanced detection capability for shorter wavelengths that is attributed to increased probability of the internal photoemission process. We found the responsivity of the nanodetector to be 0.25 and 13.3 mA/W for incident optical wavelengths of 1.55 and 1.31 μm, respectively. The presented device can be integrated with other nanophotonic and nanoplasmonic structures for the realization of monolithic opto-electronic circuitry on-chip.

Chemically Derivatized Semiconductor Photoelectrodes.

ERIC Educational Resources Information Center

Wrighton, Mark S.

1983-01-01

Deliberate modification of semiconductor photoelectrodes to improve durability and enhance rate of desirable interfacial redox processes is discussed for a variety of systems. Modification with molecular-based systems or with metals/metal oxides yields results indicating an important role for surface modification in devices for fundamental study…

Effects of BOX engineering on analogue/RF and circuit performance of InGaAs-OI-Si MOSFET

NASA Astrophysics Data System (ADS)

Maity, Subir Kr.; Pandit, Soumya

2017-11-01

InGaAs is an attractive choice as alternate channel material in n-channel metal oxide semiconductor transistor for high-performance applications. However, electrostatic integrity of such device is poor. In this paper, we present a comprehensive technology computer-aided design simulation-based study of the effect of scaling the thickness of the buried oxide (BOX) region and varying the dielectric constant of BOX material on the electrostatic integrity, analogue/radio frequency (RF) performance and circuit performance of InGaAs-on-Insulator device. Device with thin BOX layer gives better drain-induced barrier lowering performance which enhances output resistance. The carrier mobility remains almost constant with thinning of BOX layer up to certain value. By lowering the dielectric constant of the BOX material, it is further possible to improve the analogue and RF performance. Effect of BOX thickness scaling and role of BOX dielectric material on gain-frequency response of common source amplifier is also studied. It is observed that frequency response of the amplifier improves for thin BOX and with low dielectric constant-based material.

Chip-integrated optical power limiter based on an all-passive micro-ring resonator

NASA Astrophysics Data System (ADS)

Yan, Siqi; Dong, Jianji; Zheng, Aoling; Zhang, Xinliang

2014-10-01

Recent progress in silicon nanophotonics has dramatically advanced the possible realization of large-scale on-chip optical interconnects integration. Adopting photons as information carriers can break the performance bottleneck of electronic integrated circuit such as serious thermal losses and poor process rates. However, in integrated photonics circuits, few reported work can impose an upper limit of optical power therefore prevent the optical device from harm caused by high power. In this study, we experimentally demonstrate a feasible integrated scheme based on a single all-passive micro-ring resonator to realize the optical power limitation which has a similar function of current limiting circuit in electronics. Besides, we analyze the performance of optical power limiter at various signal bit rates. The results show that the proposed device can limit the signal power effectively at a bit rate up to 20 Gbit/s without deteriorating the signal. Meanwhile, this ultra-compact silicon device can be completely compatible with the electronic technology (typically complementary metal-oxide semiconductor technology), which may pave the way of very large scale integrated photonic circuits for all-optical information processors and artificial intelligence systems.

Commercialisation of CMOS integrated circuit technology in multi-electrode arrays for neuroscience and cell-based biosensors.

PubMed

Graham, Anthony H D; Robbins, Jon; Bowen, Chris R; Taylor, John

2011-01-01

The adaptation of standard integrated circuit (IC) technology as a transducer in cell-based biosensors in drug discovery pharmacology, neural interface systems and electrophysiology requires electrodes that are electrochemically stable, biocompatible and affordable. Unfortunately, the ubiquitous Complementary Metal Oxide Semiconductor (CMOS) IC technology does not meet the first of these requirements. For devices intended only for research, modification of CMOS by post-processing using cleanroom facilities has been achieved. However, to enable adoption of CMOS as a basis for commercial biosensors, the economies of scale of CMOS fabrication must be maintained by using only low-cost post-processing techniques. This review highlights the methodologies employed in cell-based biosensor design where CMOS-based integrated circuits (ICs) form an integral part of the transducer system. Particular emphasis will be placed on the application of multi-electrode arrays for in vitro neuroscience applications. Identifying suitable IC packaging methods presents further significant challenges when considering specific applications. The various challenges and difficulties are reviewed and some potential solutions are presented.

5A Zirconium Dioxide Ammonia Microsensor Integrated with a Readout Circuit Manufactured Using the 0.18 μm CMOS Process

PubMed Central

Lin, Guan-Ming; Dai, Ching-Liang; Yang, Ming-Zhi

2013-01-01

The study presents an ammonia microsensor integrated with a readout circuit on-a-chip fabricated using the commercial 0.18 μm complementary metal oxide semiconductor (CMOS) process. The integrated sensor chip consists of a heater, an ammonia sensor and a readout circuit. The ammonia sensor is constructed by a sensitive film and the interdigitated electrodes. The sensitive film is zirconium dioxide that is coated on the interdigitated electrodes. The heater is used to provide a working temperature to the sensitive film. A post-process is employed to remove the sacrificial layer and to coat zirconium dioxide on the sensor. When the sensitive film adsorbs or desorbs ammonia gas, the sensor produces a change in resistance. The readout circuit converts the resistance variation of the sensor into the output voltage. The experiments show that the integrated ammonia sensor has a sensitivity of 4.1 mV/ppm. PMID:23503294

Additional compound semiconductor nanowires for photonics

NASA Astrophysics Data System (ADS)

Ishikawa, F.

2016-02-01

GaAs related compound semiconductor heterostructures are one of the most developed materials for photonics. Those have realized various photonic devices with high efficiency, e. g., lasers, electro-optical modulators, and solar cells. To extend the functions of the materials system, diluted nitride and bismide has been paid attention over the past decade. They can largely decrease the band gap of the alloys, providing the greater tunability of band gap and strain status, eventually suppressing the non-radiative Auger recombinations. On the other hand, selective oxidation for AlGaAs is a vital technique for vertical surface emitting lasers. That enables precisely controlled oxides in the system, enabling the optical and electrical confinement, heat transfer, and mechanical robustness. We introduce the above functions into GaAs nanowires. GaAs/GaAsN core-shell nanowires showed clear redshift of the emitting wavelength toward infrared regime. Further, the introduction of N elongated the carrier lifetime at room temperature indicating the passivation of non-radiative surface recombinations. GaAs/GaAsBi nanowire shows the redshift with metamorphic surface morphology. Selective and whole oxidations of GaAs/AlGaAs core-shell nanowires produce semiconductor/oxide composite GaAs/AlGaOx and oxide GaOx/AlGaOx core-shell nanowires, respectively. Possibly sourced from nano-particle species, the oxide shell shows white luminescence. Those property should extend the functions of the nanowires for their application to photonics.

Interfacial engineering of metal-insulator-semiconductor junctions for efficient and stable photoelectrochemical water oxidation

PubMed Central

Digdaya, Ibadillah A.; Adhyaksa, Gede W. P.; Trześniewski, Bartek J.; Garnett, Erik C.; Smith, Wilson A.

2017-01-01

Solar-assisted water splitting can potentially provide an efficient route for large-scale renewable energy conversion and storage. It is essential for such a system to provide a sufficiently high photocurrent and photovoltage to drive the water oxidation reaction. Here we demonstrate a photoanode that is capable of achieving a high photovoltage by engineering the interfacial energetics of metal–insulator–semiconductor junctions. We evaluate the importance of using two metals to decouple the functionalities for a Schottky contact and a highly efficient catalyst. We also illustrate the improvement of the photovoltage upon incidental oxidation of the metallic surface layer in KOH solution. Additionally, we analyse the role of the thin insulating layer to the pinning and depinning of Fermi level that is responsible to the resulting photovoltage. Finally, we report the advantage of using dual metal overlayers as a simple protection route for highly efficient metal–insulator–semiconductor photoanodes by showing over 200 h of operational stability. PMID:28660883

Tantalum-based semiconductors for solar water splitting.

PubMed

Zhang, Peng; Zhang, Jijie; Gong, Jinlong

2014-07-07

Solar energy utilization is one of the most promising solutions for the energy crises. Among all the possible means to make use of solar energy, solar water splitting is remarkable since it can accomplish the conversion of solar energy into chemical energy. The produced hydrogen is clean and sustainable which could be used in various areas. For the past decades, numerous efforts have been put into this research area with many important achievements. Improving the overall efficiency and stability of semiconductor photocatalysts are the research focuses for the solar water splitting. Tantalum-based semiconductors, including tantalum oxide, tantalate and tantalum (oxy)nitride, are among the most important photocatalysts. Tantalum oxide has the band gap energy that is suitable for the overall solar water splitting. The more negative conduction band minimum of tantalum oxide provides photogenerated electrons with higher potential for the hydrogen generation reaction. Tantalates, with tunable compositions, show high activities owning to their layered perovskite structure. (Oxy)nitrides, especially TaON and Ta3N5, have small band gaps to respond to visible-light, whereas they can still realize overall solar water splitting with the proper positions of conduction band minimum and valence band maximum. This review describes recent progress regarding the improvement of photocatalytic activities of tantalum-based semiconductors. Basic concepts and principles of solar water splitting will be discussed in the introduction section, followed by the three main categories regarding to the different types of tantalum-based semiconductors. In each category, synthetic methodologies, influencing factors on the photocatalytic activities, strategies to enhance the efficiencies of photocatalysts and morphology control of tantalum-based materials will be discussed in detail. Future directions to further explore the research area of tantalum-based semiconductors for solar water splitting are also discussed.

Dominance of Plasmonic Resonant Energy Transfer over Direct Electron Transfer in Substantially Enhanced Water Oxidation Activity of BiVO4 by Shape-Controlled Au Nanoparticles.

PubMed

Lee, Mi Gyoung; Moon, Cheon Woo; Park, Hoonkee; Sohn, Woonbae; Kang, Sung Bum; Lee, Sanghan; Choi, Kyoung Jin; Jang, Ho Won

2017-10-01

The performance of plasmonic Au nanostructure/metal oxide heterointerface shows great promise in enhancing photoactivity, due to its ability to confine light to the small volume inside the semiconductor and modify the interfacial electronic band structure. While the shape control of Au nanoparticles (NPs) is crucial for moderate bandgap semiconductors, because plasmonic resonance by interband excitations overlaps above the absorption edge of semiconductors, its critical role in water splitting is still not fully understood. Here, first, the plasmonic effects of shape-controlled Au NPs on bismuth vanadate (BiVO 4 ) are studied, and a largely enhanced photoactivity of BiVO 4 is reported by introducing the octahedral Au NPs. The octahedral Au NP/BiVO 4 achieves 2.4 mA cm -2 at the 1.23 V versus reversible hydrogen electrode, which is the threefold enhancement compared to BiVO 4 . It is the highest value among the previously reported plasmonic Au NPs/BiVO 4 . Improved photoactivity is attributed to the localized surface plasmon resonance; direct electron transfer (DET), plasmonic resonant energy transfer (PRET). The PRET can be stressed over DET when considering the moderate bandgap semiconductor. Enhanced water oxidation induced by the shape-controlled Au NPs is applicable to moderate semiconductors, and shows a systematic study to explore new efficient plasmonic solar water splitting cells. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Toward Realization of 2.4 GHz Balunless Narrowband Receiver Front-End for Short Range Wireless Applications.

PubMed

El-Desouki, Munir M; Qasim, Syed Manzoor; BenSaleh, Mohammed S; Deen, M Jamal

2015-05-07

The demand for radio frequency (RF) transceivers operating at 2.4 GHz band has attracted considerable research interest due to the advancement in short range wireless technologies. The performance of RF transceivers depends heavily on the transmitter and receiver front-ends. The receiver front-end is comprised of a low-noise amplifier (LNA) and a downconversion mixer. There are very few designs that focus on connecting the single-ended output LNA to a double-balanced mixer without the use of on-chip transformer, also known as a balun. The objective of designing such a receiver front-end is to achieve high integration and low power consumption. To meet these requirements, we present the design of fully-integrated 2.4 GHz receiver front-end, consisting of a narrow-band LNA and a double balanced mixer without using a balun. Here, the single-ended RF output signal of the LNA is translated into differential signal using an NMOS-PMOS (n-channel metal-oxide-semiconductor, p-channel metal-oxide-semiconductor) transistor differential pair instead of the conventional NMOS-NMOS transistor configuration, for the RF amplification stage of the double-balanced mixer. The proposed receiver circuit fabricated using TSMC 0.18 µm CMOS technology operates at 2.4 GHz and produces an output signal at 300 MHz. The fabricated receiver achieves a gain of 16.3 dB and consumes only 6.74 mW operating at 1.5 V, while utilizing 2.08 mm2 of chip area. Measurement results demonstrate the effectiveness and suitability of the proposed receiver for short-range wireless applications, such as in wireless sensor network (WSN).

Valorization of GaN based metal-organic chemical vapor deposition dust a semiconductor power device industry waste through mechanochemical oxidation and leaching: A sustainable green process.

PubMed

Swain, Basudev; Mishra, Chinmayee; Lee, Chan Gi; Park, Kyung-Soo; Lee, Kun-Jae

2015-07-01

Dust generated during metal organic vapor deposition (MOCVD) process of GaN based semiconductor power device industry contains significant amounts of gallium and indium. These semiconductor power device industry wastes contain gallium as GaN and Ga0.97N0.9O0.09 is a concern for the environment which can add value through recycling. In the present study, this waste is recycled through mechanochemical oxidation and leaching. For quantitative recovery of gallium, two different mechanochemical oxidation leaching process flow sheets are proposed. In one process, first the Ga0.97N0.9O0.09 of the MOCVD dust is leached at the optimum condition. Subsequently, the leach residue is mechanochemically treated, followed by oxidative annealing and finally re-leached. In the second process, the MOCVD waste dust is mechanochemically treated, followed by oxidative annealing and finally leached. Both of these treatment processes are competitive with each other, appropriate for gallium leaching and treatment of the waste MOCVD dust. Without mechanochemical oxidation, 40.11 and 1.86 w/w% of gallium and Indium are leached using 4M HCl, 100°C and pulp density of 100 kg/m(3,) respectively. After mechanochemical oxidation, both these processes achieved 90 w/w% of gallium and 1.86 w/w% of indium leaching at their optimum condition. Copyright © 2015 Elsevier Inc. All rights reserved.

Sub-parts per million NO2 chemi-transistor sensors based on composite porous silicon/gold nanostructures prepared by metal-assisted etching.

PubMed

Sainato, Michela; Strambini, Lucanos Marsilio; Rella, Simona; Mazzotta, Elisabetta; Barillaro, Giuseppe

2015-04-08

Surface doping of nano/mesostructured materials with metal nanoparticles to promote and optimize chemi-transistor sensing performance represents the most advanced research trend in the field of solid-state chemical sensing. In spite of the promising results emerging from metal-doping of a number of nanostructured semiconductors, its applicability to silicon-based chemi-transistor sensors has been hindered so far by the difficulties in integrating the composite metal-silicon nanostructures using the complementary metal-oxide-semiconductor (CMOS) technology. Here we propose a facile and effective top-down method for the high-yield fabrication of chemi-transistor sensors making use of composite porous silicon/gold nanostructures (cSiAuNs) acting as sensing gate. In particular, we investigate the integration of cSiAuNs synthesized by metal-assisted etching (MAE), using gold nanoparticles (NPs) as catalyst, in solid-state junction-field-effect transistors (JFETs), aimed at the detection of NO2 down to 100 parts per billion (ppb). The chemi-transistor sensors, namely cSiAuJFETs, are CMOS compatible, operate at room temperature, and are reliable, sensitive, and fully recoverable for the detection of NO2 at concentrations between 100 and 500 ppb, up to 48 h of continuous operation.

Technology modules from micro- and nano-electronics for the life sciences.

PubMed

Birkholz, M; Mai, A; Wenger, C; Meliani, C; Scholz, R

2016-05-01

The capabilities of modern semiconductor manufacturing offer remarkable possibilities to be applied in life science research as well as for its commercialization. In this review, the technology modules available in micro- and nano-electronics are exemplarily presented for the case of 250 and 130 nm technology nodes. Preparation procedures and the different transistor types as available in complementary metal-oxide-silicon devices (CMOS) and BipolarCMOS (BiCMOS) technologies are introduced as key elements of comprehensive chip architectures. Techniques for circuit design and the elements of completely integrated bioelectronics systems are outlined. The possibility for life scientists to make use of these technology modules for their research and development projects via so-called multi-project wafer services is emphasized. Various examples from diverse fields such as (1) immobilization of biomolecules and cells on semiconductor surfaces, (2) biosensors operating by different principles such as affinity viscosimetry, impedance spectroscopy, and dielectrophoresis, (3) complete systems for human body implants and monitors for bioreactors, and (4) the combination of microelectronics with microfluidics either by chip-in-polymer integration as well as Si-based microfluidics are demonstrated from joint developments with partners from biotechnology and medicine. WIREs Nanomed Nanobiotechnol 2016, 8:355-377. doi: 10.1002/wnan.1367 For further resources related to this article, please visit the WIREs website. © 2015 Wiley Periodicals, Inc.

Scalable Nanostructured Carbon Electrode Arrays for Enhanced Dopamine Detection.

PubMed

Demuru, Silvia; Nela, Luca; Marchack, Nathan; Holmes, Steven J; Farmer, Damon B; Tulevski, George S; Lin, Qinghuang; Deligianni, Hariklia

2018-04-27

Dopamine is a neurotransmitter that modulates arousal and motivation in humans and animals. It plays a central role in the brain "reward" system. Its dysregulation is involved in several debilitating disorders such as addiction, depression, Parkinson's disease, and schizophrenia. Dopamine neurotransmission and its reuptake in extracellular space takes place with millisecond temporal and nanometer spatial resolution. Novel nanoscale electrodes are needed with superior sensitivity and improved spatial resolution to gain an improved understanding of dopamine dysregulation. We report on a scalable fabrication of dopamine neurochemical probes of a nanostructured glassy carbon that is smaller than any existing dopamine sensor and arrays of more than 6000 nanorod probes. We also report on the electrochemical dopamine sensing of the glassy carbon nanorod electrode. Compared with a carbon fiber, the nanostructured glassy carbon nanorods provide about 2× higher sensitivity per unit area for dopamine sensing and more than 5× higher signal per unit area at low concentration of dopamine, with comparable LOD and time response. These glassy carbon nanorods were fabricated by pyrolysis of a lithographically defined polymeric nanostructure with an industry standard semiconductor fabrication infrastructure. The scalable fabrication strategy offers the potential to integrate these nanoscale carbon rods with an integrated circuit control system and with other complementary metal oxide semiconductor (CMOS) compatible sensors.

Highly Flexible Hybrid CMOS Inverter Based on Si Nanomembrane and Molybdenum Disulfide.

PubMed

Das, Tanmoy; Chen, Xiang; Jang, Houk; Oh, Il-Kwon; Kim, Hyungjun; Ahn, Jong-Hyun

2016-11-01

2D semiconductor materials are being considered for next generation electronic device application such as thin-film transistors and complementary metal-oxide-semiconductor (CMOS) circuit due to their unique structural and superior electronics properties. Various approaches have already been taken to fabricate 2D complementary logics circuits. However, those CMOS devices mostly demonstrated based on exfoliated 2D materials show the performance of a single device. In this work, the design and fabrication of a complementary inverter is experimentally reported, based on a chemical vapor deposition MoS 2 n-type transistor and a Si nanomembrane p-type transistor on the same substrate. The advantages offered by such CMOS configuration allow to fabricate large area wafer scale integration of high performance Si technology with transition-metal dichalcogenide materials. The fabricated hetero-CMOS inverters which are composed of two isolated transistors exhibit a novel high performance air-stable voltage transfer characteristic with different supply voltages, with a maximum voltage gain of ≈16, and sub-nano watt power consumption. Moreover, the logic gates have been integrated on a plastic substrate and displayed reliable electrical properties paving a realistic path for the fabrication of flexible/transparent CMOS circuits in 2D electronics. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Materials and noncoplanar mesh designs for integrated circuits with linear elastic responses to extreme mechanical deformations

PubMed Central

Kim, Dae-Hyeong; Song, Jizhou; Choi, Won Mook; Kim, Hoon-Sik; Kim, Rak-Hwan; Liu, Zhuangjian; Huang, Yonggang Y.; Hwang, Keh-Chih; Zhang, Yong-wei; Rogers, John A.

2008-01-01

Electronic systems that offer elastic mechanical responses to high-strain deformations are of growing interest because of their ability to enable new biomedical devices and other applications whose requirements are impossible to satisfy with conventional wafer-based technologies or even with those that offer simple bendability. This article introduces materials and mechanical design strategies for classes of electronic circuits that offer extremely high stretchability, enabling them to accommodate even demanding configurations such as corkscrew twists with tight pitch (e.g., 90° in ≈1 cm) and linear stretching to “rubber-band” levels of strain (e.g., up to ≈140%). The use of single crystalline silicon nanomaterials for the semiconductor provides performance in stretchable complementary metal-oxide-semiconductor (CMOS) integrated circuits approaching that of conventional devices with comparable feature sizes formed on silicon wafers. Comprehensive theoretical studies of the mechanics reveal the way in which the structural designs enable these extreme mechanical properties without fracturing the intrinsically brittle active materials or even inducing significant changes in their electrical properties. The results, as demonstrated through electrical measurements of arrays of transistors, CMOS inverters, ring oscillators, and differential amplifiers, suggest a valuable route to high-performance stretchable electronics. PMID:19015528

‘Symbiotic’ semiconductors: unusual and counter-intuitive Ge/Si/O interactions

NASA Astrophysics Data System (ADS)

George, T.; Li, P. W.; Chen, K. H.; Peng, K. P.; Lai, W. T.

2017-03-01

Since the inception of the first transistors in the 1940s, the immense body of work on the Group IV semiconductors, Si and Ge, has spearheaded spectacular advances in modern integrated-circuit (IC) technology that has enabled a vast landscape of device applications in logic, memory, and computing. Although initially Si supplanted Ge as the material of choice for metal-oxide-semiconductor field-effect transistors, Ge-based devices are now breaking new ground. Widespread and innovative Ge-based applications exist in optoelectronics, communications, microelectro-mechanical systems, and energy harvesting/savings. On the fundamental, materials science front, while it is well known that Ge and Si are fully miscible in each other, the nature and extent of their attraction for each other has largely been unexplored. In this paper, we report a rather curious interplay between Ge and Si that occurs at high temperature (~900 °C) and that can be best described as ‘symbiotic’. Each element appears to facilitate reactions in the other which would otherwise not be possible. Oxygen intersititials also appear to play a major role in these reactions. Our experimental work has allowed us to classify four distinct regimes where these reactions occur. We describe these conditions and provide the necessary theoretical explanations for these results.

Designing solution-processable air-stable liquid crystalline crosslinkable semiconductors.

PubMed

McCulloch, Iain; Bailey, Clare; Genevicius, Kristijonas; Heeney, Martin; Shkunov, Maxim; Sparrowe, David; Tierney, Steven; Zhang, Weimin; Baldwin, Rodney; Kreouzis, Theo; Andreasen, Jens W; Breiby, Dag W; Nielsen, Martin M

2006-10-15

Organic electronics technology, in which at least the semiconducting component of the integrated circuit is an organic material, offers the potential for fabrication of electronic products by low-cost printing technologies, such as ink jet, gravure offset lithography and flexography. The products will typically be of lower performance than those using the present state of the art single crystal or polysilicon transistors, but comparable to amorphous silicon. A range of prototypes are under development, including rollable electrophoretic displays, active matrix liquid crystal (LC) displays, flexible organic light emitting diode displays, low frequency radio frequency identification tag and other low performance electronics. Organic semiconductors that offer both electrical performance and stability with respect to storage and operation under ambient conditions are required. This work describes the development of reactive mesogen semiconductors, which form large crosslinked LC domains on polymerization within mesophases. These crosslinked domains offer mechanical stability and are inert to solvent exposure in further processing steps. Reactive mesogens containing conjugated aromatic cores, designed to facilitate charge transport and provide good oxidative stability, were prepared and their liquid crystalline properties evaluated. The organization and alignment of the mesogens, both before and after crosslinking, were probed by grazing incidence wide-angle X-ray scattering of thin films. Both time-of-flight and field effect transistor devices were prepared and their electrical characterization reported.

The Basis for Photocatalytic Writing

ERIC Educational Resources Information Center

Ibanez, Jorge G.; Tausch, Michael W.; Bohrmann-Linde, Claudia; Fernandez-Gallardo, Isabel; Robles-Leyzaola, Ainoha; Krees, Simone; Meuter, Nico; Tennior, Mathias

2011-01-01

We present a demonstration involving the oxidative photobleaching of a raspberry juice dye under visible laser light irradiation using the semiconductor titanium dioxide. A plausible interpretation of the phenomenon is discussed that aids in the understanding of semiconductor energetics and the nature of light. (Contains 2 figures.)

Epitaxial growth of CoO films on semiconductor and metal substrates by constructing a complex heterostructure

NASA Astrophysics Data System (ADS)

Entani, S.; Kiguchi, M.; Saiki, K.; Koma, A.

2003-01-01

Epitaxial growth of CoO films was studied using reflection high-energy electron diffraction (RHEED), electron energy loss spectroscopy (EELS), ultraviolet photoelectron spectroscopy (UPS) and Auger electron spectroscopy (AES). The RHEED results indicated that an epitaxial CoO film grew on semiconductor and metal substrates (CoO (0 0 1)∥GaAs (0 0 1), Cu (0 0 1), Ag (0 0 1) and [1 0 0]CoO∥[1 0 0] substrates) by constructing a complex heterostructure with two alkali halide buffer layers. The AES, EELS and UPS results showed that the grown CoO film had almost the same electronic structure as bulk CoO. We could show that use of alkali halide buffer layers was a good way to grow metal oxide films on semiconductor and metal substrates in an O 2 atmosphere. The alkali halide layers not only works as glue to connect very dissimilar materials but also prevents oxidation of metal and semiconductor substrates.

A p-Type Zinc-Based Metal-Organic Framework.

PubMed

Shang, Congcong; Gautier, Romain; Jiang, Tengfei; Faulques, Eric; Latouche, Camille; Paris, Michael; Cario, Laurent; Bujoli-Doeuff, Martine; Jobic, Stéphane

2017-06-05

An original concept for the property tuning of semiconductors is demonstrated by the synthesis of a p-type zinc oxide (ZnO)-like metal-organic framework (MOF), (ZnC 2 O 3 H 2 ) n , which can be regarded as a possible alternative for ZnO, a natural n-type semiconductor. When small oxygen-rich organic linkers are introduced to the Zn-O system, oxygen vacancies and a deep valence-band maximum, the two obstacles for generating p-type behavior in ZnO, are restrained and raised, respectively. Further studies of this material on the doping and photoluminescence behaviors confirm its resemblance to metal oxides (MOs). This result answers the challenges of generating p-type behavior in an n-type-like system. This concept reveals that a new category of hybrid materials, with an embedded continuous metal-oxygen network, lies between the MOs and MOFs. It provides concrete support for the development of p-type hybrid semiconductors in the near future and, more importantly, the enrichment of tuning possibilities in inorganic semiconductors.

How light-harvesting semiconductors can alter the bias of reversible electrocatalysts in favor of H2 production and CO2 reduction.

PubMed

Bachmeier, Andreas; Wang, Vincent C C; Woolerton, Thomas W; Bell, Sophie; Fontecilla-Camps, Juan C; Can, Mehmet; Ragsdale, Stephen W; Chaudhary, Yatendra S; Armstrong, Fraser A

2013-10-09

The most efficient catalysts for solar fuel production should operate close to reversible potentials, yet possess a bias for the fuel-forming direction. Protein film electrochemical studies of Ni-containing carbon monoxide dehydrogenase and [NiFeSe]-hydrogenase, each a reversible electrocatalyst, show that the electronic state of the electrode strongly biases the direction of electrocatalysis of CO2/CO and H(+)/H2 interconversions. Attached to graphite electrodes, these enzymes show high activities for both oxidation and reduction, but there is a marked shift in bias, in favor of CO2 or H(+) reduction, when the respective enzymes are attached instead to n-type semiconductor electrodes constructed from CdS and TiO2 nanoparticles. This catalytic rectification effect can arise for a reversible electrocatalyst attached to a semiconductor electrode if the electrode transforms between semiconductor- and metallic-like behavior across the same narrow potential range (<0.25 V) that the electrocatalytic current switches between oxidation and reduction.

Fabrication of solid-state secondary battery using semiconductors and evaluation of its charge/discharge characteristics

NASA Astrophysics Data System (ADS)

Sasaki, Atsuya; Sasaki, Akito; Hirabayashi, Hideaki; Saito, Shuichi; Aoki, Katsuaki; Kataoka, Yoshinori; Suzuki, Koji; Yabuhara, Hidehiko; Ito, Takahiro; Takagi, Shigeyuki

2018-04-01

Li-ion batteries have attracted interest for use as storage batteries. However, the risk of fire has not yet been resolved. Although solid Li-ion batteries are possible alternatives, their performance characteristics are unsatisfactory. Recently, research on utilizing the accumulation of carriers at the trap levels of semiconductors has been performed. However, the detailed charge/discharge characteristics and principles have not been reported. In this report, we attempted to form new n-type oxide semiconductor/insulator/p-type oxide semiconductor structures. The battery characteristics of these structures were evaluated by charge/discharge measurements. The obtained results clearly indicated the characteristics of rechargeable batteries. Furthermore, the fabricated structure accumulated an approximately 5000 times larger number of carriers than a parallel plate capacitor. Additionally, by constructing circuit models based on the experimental results, the charge/discharge mechanisms were considered. This is the first detailed experimental report on a rechargeable battery that operates without the double injection of ions and electrons.

Prediction of the thermal annealing of thick oxide metal-oxide-semiconductor dosimeters irradiated in a harsh radiation environment

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ravotti, F.; Glaser, M.; Saigne, F.

Radiation-sensing metal-oxide-semiconductor field-effect transistors produced by the laboratory LAAS-CNRS were exposed to a harsh hadron field that represents the real radiation environment expected at the CERN Large Hadron Collider experiments. The long-term stability of the transistor's I{sub ds}-V{sub gs} characteristic was investigated using the isochronal annealing technique. In this work, devices exposed to high intensity hadron levels ({phi}{>=}10{sup 12} neutrons/cm{sup 2}) show evidences of displacement damages in the I{sub ds}-V{sub gs} annealing behavior. By comparing experimental and simulated results over 14 months, the isochronal annealing method, originally devoted to oxide trapped charge, is shown to enable prediction of the recoverymore » of silicon bulk defects.« less

Silicon Cations Intermixed Indium Zinc Oxide Interface for High-Performance Thin-Film Transistors Using a Solution Process.

PubMed

Na, Jae Won; Rim, You Seung; Kim, Hee Jun; Lee, Jin Hyeok; Hong, Seonghwan; Kim, Hyun Jae

2017-09-06

Solution-processed amorphous metal-oxide thin-film transistors (TFTs) utilizing an intermixed interface between a metal-oxide semiconductor and a dielectric layer are proposed. In-depth physical characterizations are carried out to verify the existence of the intermixed interface that is inevitably formed by interdiffusion of cations originated from a thermal process. In particular, when indium zinc oxide (IZO) semiconductor and silicon dioxide (SiO 2 ) dielectric layer are in contact and thermally processed, a Si 4+ intermixed IZO (Si/IZO) interface is created. On the basis of this concept, a high-performance Si/IZO TFT having both a field-effect mobility exceeding 10 cm 2 V -1 s -1 and a on/off current ratio over 10 7 is successfully demonstrated.

Interface investigation of solution processed high- κ ZrO2/Si MOS structure by DLTS

NASA Astrophysics Data System (ADS)

Kumar, Arvind; Mondal, Sandip; Rao, Ksr Koteswara

The interfacial region is dominating due to the continuous downscaling and integration of high- k oxides in CMOS applications. The accurate characterization of high- k oxides/semiconductor interface has the significant importance towards its usage in memory and thin film devices. The interface traps at the high - k /semiconductor interface can be quantified by deep level transient spectroscopy (DLTS) with better accuracy in contrast to capacitance-voltage (CV) and conductance technique. We report the fabrication of high- k ZrO2 films on p-Si substrate by a simple and inexpensive sol-gel spin-coating technique. Further, the ZrO2/Si interface is characterized through DLTS. The flat-band voltage (VFB) and the density of slow interface states (oxide trapped charges) extracted from CV characteristics are 0.37 V and 2x10- 11 C/cm2, respectively. The activation energy, interface state density and capture cross-section quantified by DLTS are EV + 0.42 eV, 3.4x1011 eV- 1 cm- 2 and 5.8x10- 18 cm2, respectively. The high quality ZrO2 films own high dielectric constant 15 with low leakage current density might be an appropriate insulating layer in future electronic application. The low value of interface state density and capture cross-section are the indication of high quality interface and the defect present at the interface may not affect the device performance to a great extent. The DLTS study provides a broad understanding about the traps present at the interface of spin-coated ZrO2/Si.

Integrated three-dimensional module heat exchanger for power electronics cooling

DOEpatents

Bennion, Kevin; Lustbader, Jason

2013-09-24

Embodiments discussed herein are directed to a power semiconductor packaging that removes heat from a semiconductor package through one or more cooling zones that are located in a laterally oriented position with respect to the semiconductor package. Additional embodiments are directed to circuit elements that are constructed from one or more modular power semiconductor packages.

Solution combustion synthesis of oxide semiconductors

NASA Astrophysics Data System (ADS)

Thomas, Abegayl Lorenda Shara-Lynn

The quest for stable and efficient photocatalytic materials beyond TiO2 and WO3 has over the years led to the development of new materials that possess varied interfacial energetics. This dissertation study focused on using for the first time a novel method, solution combustion synthesis (SCS), to prepare two distinct families of binary metal-based oxide semiconductor materials. Detailed studies on material characteristics and applications were carried out on tungsten- and niobium-based oxide semiconductors with varying principal metals. Initial emphasis was placed on the SCS of tungsten-based oxide semiconductors (ZnWO4, CuWO4, and Ag2WO4). The influence of different tungsten precursor's on the resultant product was of particular relevance to this study, with the most significant effects highlighted. Upon characterization, each sample's photocatalytic activity towards methyl orange dye degradation was studied, and benchmarked against their respective commercial oxide sample, obtained by solid-state ceramic synthesis. Detailed analysis highlighted the importance of the SCS process as a time- and energy-efficient method to produce crystalline nano-sized materials even without additional or excessive heat treatment. It was observed that using different tungstate precursors does influence the structural and morphological make-up of the resulting materials. The as-synthesized tungstate materials showed good photocatalytic performance for the degradation of methyl orange dye, while taking into account specific surface area and adsorbed dye amount on the surface of the material. Like the tungstate's, niobium-based oxide semiconductors CuNb 2O6 and ZnNb2O6 were the first to be synthesized via solution combustion synthesis. Particular attention was placed on the crystal structures formed while using an oxalate niobium precursor during the reaction process. X-ray patterns yielded a multiphase structure for the ZnNb2O6 and a single phase structure for CuNb 2O6. Photoelectrochemical (PEC) measurements were used both as a characterization tool as well as an application for CO2 reduction. The PEC data was consistent with an n-type and p-type semiconductor for ZnNb 2O6 and CuNb2O6 respectively. Good phototelectrochemical behavior was observed for CuNb2O6 with stable, high photocurrents suggesting a suitable material for CO 2 reduction while in a 0.1 M NaHCO3 + CO2 medium. All in all, this dissertation study expounds on metal ion insertion into various structural frameworks (e.g. WO3) which may open sustainable materials chemistry avenues to solar energy conversion and environmental remediation.

Graphene transforms wide band gap ZnS to a visible light photocatalyst. The new role of graphene as a macromolecular photosensitizer.

PubMed

Zhang, Yanhui; Zhang, Nan; Tang, Zi-Rong; Xu, Yi-Jun

2012-11-27

We report the assembly of nanosized ZnS particles on the 2D platform of a graphene oxide (GO) sheet by a facile two-step wet chemistry process, during which the reduced graphene oxide (RGO, also called GR) and the intimate interfacial contact between ZnS nanoparticles and the GR sheet are achieved simultaneously. The ZnS-GR nanocomposites exhibit visible light photoactivity toward aerobic selective oxidation of alcohols and epoxidation of alkenes under ambient conditions. In terms of structure-photoactivity correlation analysis, we for the first time propose a new photocatalytic mechanism where the role of GR in the ZnS-GR nanocomposites acts as an organic dye-like macromolecular "photosensitizer" for ZnS instead of an electron reservoir. This novel photocatalytic mechanism is distinctly different from all previous research on GR-semiconductor photocatalysts, for which GR is claimed to behave as an electron reservoir to capture/shuttle the electrons photogenerated from the semiconductor. This new concept of the reaction mechanism in graphene-semiconductor photocatalysts could provide a new train of thought on designing GR-based composite photocatalysts for targeting applications in solar energy conversion, promoting our in-depth thinking on the microscopic charge carrier transfer pathway connected to the interface between the GR and the semiconductor.

Alternative photocatalysts to TiO2 for the photocatalytic reduction of CO2

NASA Astrophysics Data System (ADS)

Nikokavoura, Aspasia; Trapalis, Christos

2017-01-01

The increased concentration of CO2 in the atmosphere, originating from the burning of fossil fuels in stationary and mobile sources, is referred as the "Anthropogenic Greenhouse Effect" and constitutes a major environmental concern. The scientific community is highly concerned about the resulting enhancement of the mean atmospheric temperature, so a vast diversity of methods has been applied. Thermochemical, electrochemical, photocatalytic, photoelectrochemical processes, as well as combination of solar electricity generation and water splitting processes have been performed in order to lower the CO2 atmospheric levels. Photocatalytic methods are environmental friendly and succeed in reducing the atmospheric CO2 concentration and producing fuels or/and useful organic compounds at the same time. The most common photocatalysts for the CO2 reduction are the inorganic, the carbon based semiconductors and the hybrids based on semiconductors, which combine stability, low cost and appropriate structure in order to accomplish redox reactions. In this review, inorganic semiconductors such as single-metal oxide, mixed-metal oxides, metal oxide composites, layered double hydroxides (LDHs), salt composites, carbon based semiconductors such as graphene based composites, CNT composites, g-C3N4 composites and hybrid organic-inorganic materials (ZIFs) were studied. TiO2 and Ti based photocatalysts are extensively studied and therefore in this review they are not mentioned.

Surface Modification for Improved Design and Functionality of Nanostructured Materials and Devices

NASA Astrophysics Data System (ADS)

Keiper, Timothy Keiper

Progress in nanotechnology is trending towards applications which require the integration of soft (organic or biological) and hard (semiconductor or metallic) materials. Many applications for functional nanomaterials are currently being explored, including chemical and biological sensors, flexible electronics, molecular electronics, etc., with researchers aiming to develop new paradigms of nanoelectronics through manipulation of the physical properties by surface treatments. This dissertation focuses on two surface modification techniques important for integration of hard and soft materials: thermal annealing and molecular modification of semiconductors. First, the effects of thermal annealing are investigated directly for their implication in the fundamental understanding of transparent conducting oxides with respect to low resistivity contacts for electronic and optoelectronic applications and the response to environmental stimuli for sensing applications. The second focus of this dissertation covers two aspects of the importance of molecular modification on semiconductor systems. The first of these is the formation of self-assembled monolayers in patterned arrays which leads explicitly to the directed self-assembly of nanostructures. The second aspect concerns the modification of the underlying magnetic properties of the preeminent dilute magnetic semiconductor, manganese-doped gallium arsenide. Tin oxide belongs to a class of materials known as transparent conducting oxides which have received extensive interest due to their sensitivity to environmental stimuli and their potential application in transparent and flexible electronics. Nanostructures composed of SnO2 have been demonstrated as an advantageous material for high performance, point-of-care nanoelectronic sensors, capable of detecting and distinguishing gaseous or biomolecular interactions on unprecedented fast timescales. Through bottom-up fabrication techniques, binary oxide nanobelts synthesized through catalyst-free physical vapor deposition are implemented in the field-effect transistor structure. We have discovered that conductivity is absent in as-grown devices. However, utilizing a process for thermal treatment in vacuum and oxygen environments is found to be instrumental in fabricating field-effect transistors with significant conductivity, up to five orders of magnitude above the as-grown devices, for field-effect transistor application. Further investigation by photoluminescence coupled with the annealing parameters reveals that the likely cause of conductance comes from the reduction of surface defect states in the material. Importantly, the annealed material maintains its response to an applied gate potential showing orders of magnitude switching from the 'off' to the 'on' state. In order to show the practical relevance of our improvements on the SnO2 material, we show our results for implementing the annealed material in biomolecular sensing experiments to detect the presence of streptavidin and Hepatitis C virus. Surface modification was carried out on oxide-free gallium arsenide (in some cases doped with manganese or zinc) through self-assembly of thiol molecules. First, we investigate the ability to pattern via two complementary micro- and nanopatterning techniques, microcontact printing (muCP) and dip-pen nanolithography (DPN). DPN is a unique lithography tool that allows drawing of arbitrary patterns with a molecular ink on a complementary substrate. It is extremely useful in integration of molecular inks within a pre-defined structure. Here, DPN was used to investigate the diffusion of organic molecules from a point source for both a moving and stationary tip on oxide-free GaAs. The diffusion can be calibrated so that intricate patterns down to tens of nanometers can be arbitrarily drawn on the surface. muCP, a less complicated method for large-scale arrayed patterning, is utilized to investigate the deposition of different thiolated molecular inks on GaAs and (Ga,Mn)As. The patterns deposited by muCP provide the template for directed self-assembly of gold nanoparticles. The systems based on these techniques can be extended to many substrate-molecule-nanostructure systems for an incredible variety of applications. Finally, the thiol-(Ga,Mn)As system is studied to determine the effects of molecular modification on the substrates' magnetic properties via modulation of the hole concentration in the wafer. The results for two molecules, one an electron donor and one an electron acceptor, show opposite trends for modulation of both the Curie temperature and the saturation magnetization. We suggest that nanopatterning of electron donor or electron acceptor molecules could lead to the development of reconfigurable nanomagnetic systems in (Ga,Mn)As with potential applications in molecular spintronics or magnetic memory.

Optical temperature sensor using thermochromic semiconductors

DOEpatents

Kronberg, J.W.

1996-08-20

An optical temperature measuring device utilizes thermochromic semiconductors which vary in color in response to changes in temperature. The thermochromic material is sealed in a glass matrix which allows the temperature sensor to detect high temperatures without breakdown. Cuprous oxide and cadmium sulfide are among the semiconductor materials which provide the best results. The changes in color may be detected visually or by utilizing an optical fiber and an electrical sensing circuit. 7 figs.

Lack of enhanced photocatalytic formation of iodine on particulate semiconductor mixtures.

PubMed

Karunakaran, C; Anilkumar, P; Vinayagamoorthy, P

2012-12-01

Under UV-A light illumination, formation of iodine from iodide ion on the surfaces of anatase TiO(2), ZnO, Fe(2)O(3), CeO(2), MoO(3), Bi(2)O(3), and Nb(2)O(5) increases with the concentration of iodide ion, airflow rate and light intensity and conform to the Langmuir-Hinshelwood kinetic model. Measurement of the particle size of the semiconductor oxides by light scattering method and deduction of the same from the determined specific surface area show that the oxide particles agglomerate in suspension. However, mixtures of any two listed particulate semiconductors do not show enhanced photocatalytic formation of iodine indicating absence of interparticle charge transfer. The results are rationalized. Copyright © 2012 Elsevier B.V. All rights reserved.

Engineering of band gap states of amorphous SiZnSnO semiconductor as a function of Si doping concentration.

PubMed

Choi, Jun Young; Heo, Keun; Cho, Kyung-Sang; Hwang, Sung Woo; Kim, Sangsig; Lee, Sang Yeol

2016-11-04

We investigated the band gap of SiZnSnO (SZTO) with different Si contents. Band gap engineering of SZTO is explained by the evolution of the electronic structure, such as changes in the band edge states and band gap. Using ultraviolet photoelectron spectroscopy (UPS), it was verified that Si atoms can modify the band gap of SZTO thin films. Carrier generation originating from oxygen vacancies can modify the band-gap states of oxide films with the addition of Si. Since it is not easy to directly derive changes in the band gap states of amorphous oxide semiconductors, no reports of the relationship between the Fermi energy level of oxide semiconductor and the device stability of oxide thin film transistors (TFTs) have been presented. The addition of Si can reduce the total density of trap states and change the band-gap properties. When 0.5 wt% Si was used to fabricate SZTO TFTs, they showed superior stability under negative bias temperature stress. We derived the band gap and Fermi energy level directly using data from UPS, Kelvin probe, and high-resolution electron energy loss spectroscopy analyses.

Engineering of band gap states of amorphous SiZnSnO semiconductor as a function of Si doping concentration

PubMed Central

Choi, Jun Young; Heo, Keun; Cho, Kyung-Sang; Hwang, Sung Woo; Kim, Sangsig; Lee, Sang Yeol

2016-01-01

We investigated the band gap of SiZnSnO (SZTO) with different Si contents. Band gap engineering of SZTO is explained by the evolution of the electronic structure, such as changes in the band edge states and band gap. Using ultraviolet photoelectron spectroscopy (UPS), it was verified that Si atoms can modify the band gap of SZTO thin films. Carrier generation originating from oxygen vacancies can modify the band-gap states of oxide films with the addition of Si. Since it is not easy to directly derive changes in the band gap states of amorphous oxide semiconductors, no reports of the relationship between the Fermi energy level of oxide semiconductor and the device stability of oxide thin film transistors (TFTs) have been presented. The addition of Si can reduce the total density of trap states and change the band-gap properties. When 0.5 wt% Si was used to fabricate SZTO TFTs, they showed superior stability under negative bias temperature stress. We derived the band gap and Fermi energy level directly using data from UPS, Kelvin probe, and high-resolution electron energy loss spectroscopy analyses. PMID:27812035

X-ray Characterization of Oxide-based Magnetic Semiconductors

NASA Astrophysics Data System (ADS)

Idzerda, Yves

2008-05-01

Although the evidence for magnetic semiconductors (not simply semiconductors which are ferromagnetic) is compelling, there is much uncertainty in the mechanism for the polarization of the carriers, suggesting that it must be quite novel. Recent experimental evidence suggests that this mechanism is similar to the polaron percolation theory proposed by Kaminski and Das Sarma,ootnotetextKaminski and S. Das Sarma, Physical Review Letters 88, 247202 (2002). which was recently applied specifically to doped oxides by Coey et al.ootnotetextJ. M. D. Coey, M. Venkatesan, and C. B. Fitzgerald, Nature Materials 4, 173 (2005). where the ferromagnetism is driven by the percolation of polarons generated by defects or dopants. We have used X-ray absorption spectroscopy at the L-edges and K-edges for low concentrations transition metal (TM) doped magnetic oxides (including TiO2, La1-xSrxO3, HfO2, and In2O3). We have found that in most cases, the transition metal assumes a valence consistent with being at a substitutional, and not interstitial site. We have also measured the X-ray Magnetic Circular Dichroism spectra. Although these materials show strong bulk magnetization, we are unable to detect a robust dichroism feature associated with magnetic elements in the host semiconductor. In the cases where a dichroism signal was observed, it was very weak and could be ascribed to a distinct ferromagnetic phase (TM metal cluster, TM oxide particulate, etc.) separate from the host material. This fascinating absence of a dichroic signal and its significant substantiation of important features of the polaron percolation model may help to finally resolve the issue of ferromagnetism in magnetically doped oxides.

Analysis of fluctuations in semiconductor devices

NASA Astrophysics Data System (ADS)

Andrei, Petru

The random nature of ion implantation and diffusion processes as well as inevitable tolerances in fabrication result in random fluctuations of doping concentrations and oxide thickness in semiconductor devices. These fluctuations are especially pronounced in ultrasmall (nanoscale) semiconductor devices when the spatial scale of doping and oxide thickness variations become comparable with the geometric dimensions of devices. In the dissertation, the effects of these fluctuations on device characteristics are analyzed by using a new technique for the analysis of random doping and oxide thickness induced fluctuations. This technique is universal in nature in the sense that it is applicable to any transport model (drift-diffusion, semiclassical transport, quantum transport etc.) and it can be naturally extended to take into account random fluctuations of the oxide (trapped) charges and channel length. The technique is based on linearization of the transport equations with respect to the fluctuating quantities. It is computationally much (a few orders of magnitude) more efficient than the traditional Monte-Carlo approach and it yields information on the sensitivity of fluctuations of parameters of interest (e.g. threshold voltage, small-signal parameters, cut-off frequencies, etc.) to the locations of doping and oxide thickness fluctuations. For this reason, it can be very instrumental in the design of fluctuation-resistant structures of semiconductor devices. Quantum mechanical effects are taken into account by using the density-gradient model as well as through self-consistent Poisson-Schrodinger computations. Special attention is paid to the presenting of the technique in a form that is suitable for implementation on commercial device simulators. The numerical implementation of the technique is discussed in detail and numerous computational results are presented and compared with those previously published in literature.

Variable temperature semiconductor film deposition

DOEpatents

Li, X.; Sheldon, P.

1998-01-27

A method of depositing a semiconductor material on a substrate is disclosed. The method sequentially comprises (a) providing the semiconductor material in a depositable state such as a vapor for deposition on the substrate; (b) depositing the semiconductor material on the substrate while heating the substrate to a first temperature sufficient to cause the semiconductor material to form a first film layer having a first grain size; (c) continually depositing the semiconductor material on the substrate while cooling the substrate to a second temperature sufficient to cause the semiconductor material to form a second film layer deposited on the first film layer and having a second grain size smaller than the first grain size; and (d) raising the substrate temperature, while either continuing or not continuing to deposit semiconductor material to form a third film layer, to thereby anneal the film layers into a single layer having favorable efficiency characteristics in photovoltaic applications. A preferred semiconductor material is cadmium telluride deposited on a glass/tin oxide substrate already having thereon a film layer of cadmium sulfide.

Variable temperature semiconductor film deposition

DOEpatents

Li, Xiaonan; Sheldon, Peter

1998-01-01

A method of depositing a semiconductor material on a substrate. The method sequentially comprises (a) providing the semiconductor material in a depositable state such as a vapor for deposition on the substrate; (b) depositing the semiconductor material on the substrate while heating the substrate to a first temperature sufficient to cause the semiconductor material to form a first film layer having a first grain size; (c) continually depositing the semiconductor material on the substrate while cooling the substrate to a second temperature sufficient to cause the semiconductor material to form a second film layer deposited on the first film layer and having a second grain size smaller than the first grain size; and (d) raising the substrate temperature, while either continuing or not continuing to deposit semiconductor material to form a third film layer, to thereby anneal the film layers into a single layer having favorable efficiency characteristics in photovoltaic applications. A preferred semiconductor material is cadmium telluride deposited on a glass/tin oxide substrate already having thereon a film layer of cadmium sulfide.

A room-temperature magnetic semiconductor from a ferromagnetic metallic glass

NASA Astrophysics Data System (ADS)

Liu, Wenjian; Zhang, Hongxia; Shi, Jin-An; Wang, Zhongchang; Song, Cheng; Wang, Xiangrong; Lu, Siyuan; Zhou, Xiangjun; Gu, Lin; Louzguine-Luzgin, Dmitri V.; Chen, Mingwei; Yao, Kefu; Chen, Na

2016-12-01

Emerging for future spintronic/electronic applications, magnetic semiconductors have stimulated intense interest due to their promises for new functionalities and device concepts. So far, the so-called diluted magnetic semiconductors attract many attentions, yet it remains challenging to increase their Curie temperatures above room temperature, particularly those based on III-V semiconductors. In contrast to the concept of doping magnetic elements into conventional semiconductors to make diluted magnetic semiconductors, here we propose to oxidize originally ferromagnetic metals/alloys to form new species of magnetic semiconductors. We introduce oxygen into a ferromagnetic metallic glass to form a Co28.6Fe12.4Ta4.3B8.7O46 magnetic semiconductor with a Curie temperature above 600 K. The demonstration of p-n heterojunctions and electric field control of the room-temperature ferromagnetism in this material reflects its p-type semiconducting character, with a mobility of 0.1 cm2 V-1 s-1. Our findings may pave a new way to realize high Curie temperature magnetic semiconductors with unusual multifunctionalities.

Thin Film Complementary Metal Oxide Semiconductor (CMOS) Device Using a Single-Step Deposition of the Channel Layer

PubMed Central

Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Wang, Zhenwei; Hedhili, M. N.; Wang, Q. X.; Alshareef, H. N.

2014-01-01

We report, for the first time, the use of a single step deposition of semiconductor channel layer to simultaneously achieve both n- and p-type transport in transparent oxide thin film transistors (TFTs). This effect is achieved by controlling the concentration of hydroxyl groups (OH-groups) in the underlying gate dielectrics. The semiconducting tin oxide layer was deposited at room temperature, and the maximum device fabrication temperature was 350°C. Both n and p-type TFTs showed fairly comparable performance. A functional CMOS inverter was fabricated using this novel scheme, indicating the potential use of our approach for various practical applications. PMID:24728223

Radiation hardening of MOS devices by boron. [for stabilizing gate threshold potential of field effect device

NASA Technical Reports Server (NTRS)

Danchenko, V. (Inventor)

1974-01-01

A technique is described for radiation hardening of MOS devices and specifically for stabilizing the gate threshold potential at room temperature of a radiation subjected MOS field-effect device with a semiconductor substrate, an insulating layer of oxide on the substrate, and a gate electrode disposed on the insulating layer. The boron is introduced within a layer of the oxide of about 100 A-300 A thickness immediately adjacent the semiconductor-insulator interface. The concentration of boron in the oxide layer is preferably maintained on the order of 10 to the 18th power atoms/cu cm. The technique serves to reduce and substantially annihilate radiation induced positive gate charge accumulations.