AIN-Coated Al(2)O(3) Substrates For Electronic Circuits

NASA Technical Reports Server (NTRS)

Kolawa, Elzbieta; Lowry, Lynn; Herman, Martin; Lee, Karen

1996-01-01

Type of improved ceramic substrate for high-frequency, high-power electronic circuits combines relatively high thermal conductivity of aluminum nitride with surface smoothness of alumina. Consists of 15-micrometer layer of AIN deposited on highly polished alumina. Used for packaging millimeter-wave gallium arsenide transmitter chips, power silicon chips, and like.

Compact fluid cooled power converter supporting multiple circuit boards

DOEpatents

Radosevich, Lawrence D.; Meyer, Andreas A.; Beihoff, Bruce C.; Kannenberg, Daniel G.

2005-03-08

A support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. The support, in conjunction with other packaging features may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

Packaging Technologies for High Temperature Electronics and Sensors

NASA Technical Reports Server (NTRS)

Chen, Liang-Yu; Hunter, Gary W.; Neudeck, Philip G.; Beheim, Glenn M.; Spry, David J.; Meredith, Roger D.

2013-01-01

This paper reviews ceramic substrates and thick-film metallization based packaging technologies in development for 500 C silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chip-level packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550 C. A 96% alumina based edge connector for a PCB level subsystem interconnection has also been demonstrated recently. The 96% alumina packaging system composed of chip-level packages and PCBs has been tested with high temperature SiC devices at 500 C for over 10,000 hours. In addition to tests in a laboratory environment, a SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE-7 suite to the International Space Station via a Shuttle mission. This packaged SiC transistor was successfully tested in orbit for eighteen months. A spark-plug type sensor package designed for high temperature SiC capacitive pressure sensors was developed. This sensor package combines the high temperature interconnection system with a commercial high temperature high pressure stainless steel seal gland (electrical feed-through). Test results of a packaged high temperature capacitive pressure sensor at 500 C are also discussed. In addition to the pressure sensor package, efforts for packaging high temperature SiC diode-based gas chemical sensors are in process.

Packaging Technologies for High Temperature Electronics and Sensors

NASA Technical Reports Server (NTRS)

Chen, Liangyu; Hunter, Gary W.; Neudeck, Philip G.; Beheim, Glenn M.; Spry, David J.; Meredith, Roger D.

2013-01-01

This paper reviews ceramic substrates and thick-film metallization based packaging technologies in development for 500degC silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chiplevel packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550degC. A 96% alumina based edge connector for a PCB level subsystem interconnection has also been demonstrated recently. The 96% alumina packaging system composed of chip-level packages and PCBs has been tested with high temperature SiC devices at 500degC for over 10,000 hours. In addition to tests in a laboratory environment, a SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE-7 suite to the International Space Station via a Shuttle mission. This packaged SiC transistor was successfully tested in orbit for eighteen months. A spark-plug type sensor package designed for high temperature SiC capacitive pressure sensors was developed. This sensor package combines the high temperature interconnection system with a commercial high temperature high pressure stainless steel seal gland (electrical feed-through). Test results of a packaged high temperature capacitive pressure sensor at 500degC are also discussed. In addition to the pressure sensor package, efforts for packaging high temperature SiC diode-based gas chemical sensors are in process.

Integrated three-dimensional module heat exchanger for power electronics cooling

DOEpatents

Bennion, Kevin; Lustbader, Jason

2013-09-24

Embodiments discussed herein are directed to a power semiconductor packaging that removes heat from a semiconductor package through one or more cooling zones that are located in a laterally oriented position with respect to the semiconductor package. Additional embodiments are directed to circuit elements that are constructed from one or more modular power semiconductor packages.

Low-dielectric constant insulators for future integrated circuits and packages.

PubMed

Kohl, Paul A

2011-01-01

Future integrated circuits and packages will require extraordinary dielectric materials for interconnects to allow transistor advances to be translated into system-level advances. Exceedingly low-permittivity and low-loss materials are required at every level of the electronic system, from chip-level insulators to packages and printed wiring boards. In this review, the requirements and goals for future insulators are discussed followed by a summary of current state-of-the-art materials and technical approaches. Much work needs to be done for insulating materials and structures to meet future needs.

Method Of Packaging And Assembling Electro-Microfluidic Devices

DOEpatents

Benavides, Gilbert L.; Galambos, Paul C.; Emerson, John A.; Peterson, Kenneth A.; Giunta, Rachel K.; Zamora, David Lee; Watson, Robert D.

2004-11-23

A new architecture for packaging surface micromachined electro-microfluidic devices is presented. This architecture relies on two scales of packaging to bring fluid to the device scale (picoliters) from the macro-scale (microliters). The architecture emulates and utilizes electronics packaging technology. The larger package consists of a circuit board with embedded fluidic channels and standard fluidic connectors (e.g. Fluidic Printed Wiring Board). The embedded channels connect to the smaller package, an Electro-Microfluidic Dual-Inline-Package (EMDIP) that takes fluid to the microfluidic integrated circuit (MIC). The fluidic connection is made to the back of the MIC through Bosch-etched holes that take fluid to surface micromachined channels on the front of the MIC. Electrical connection is made to bond pads on the front of the MIC.

Integrated microsystems packaging approach with LCP

NASA Astrophysics Data System (ADS)

Jaynes, Paul; Shacklette, Lawrence W.

2006-05-01

Within the government communication market there is an increasing push to further miniaturize systems with the use of chip-scale packages, flip-chip bonding, and other advances over traditional packaging techniques. Harris' approach to miniaturization includes these traditional packaging advances, but goes beyond this level of miniaturization by combining the functional and structural elements of a system, thus creating a Multi-Functional Structural Circuit (MFSC). An emerging high-frequency, near hermetic, thermoplastic electronic substrate material, Liquid Crystal Polymer (LCP), is the material that will enable the combination of the electronic circuit and the physical structure of the system. The first embodiment of this vision for Harris is the development of a battlefield acoustic sensor module. This paper will introduce LCP and its advantages for MFSC, present an example of the work that Harris has performed, and speak to LCP MFSCs' potential benefits to miniature communications modules and sensor platforms.

Packaging Technologies for 500 C SiC Electronics and Sensors: Challenges in Material Science and Technology

NASA Technical Reports Server (NTRS)

Chen, Liang-Yu; Neudeck, Philip G.; Behelm, Glenn M.; Spry, David J.; Meredith, Roger D.; Hunter, Gary W.

2015-01-01

This paper presents ceramic substrates and thick-film metallization based packaging technologies in development for 500C silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chip-level packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550C. The 96 alumina packaging system composed of chip-level packages and PCBs has been successfully tested with high temperature SiC discrete transistor devices at 500C for over 10,000 hours. In addition to tests in a laboratory environment, a SiC junction field-effect-transistor (JFET) with a packaging system composed of a 96 alumina chip-level package and an alumina printed circuit board was tested on low earth orbit for eighteen months via a NASA International Space Station experiment. In addition to packaging systems for electronics, a spark-plug type sensor package based on this high temperature interconnection system for high temperature SiC capacitive pressure sensors was also developed and tested. In order to further significantly improve the performance of packaging system for higher packaging density, higher operation frequency, power rating, and even higher temperatures, some fundamental material challenges must be addressed. This presentation will discuss previous development and some of the challenges in material science (technology) to improve high temperature dielectrics for packaging applications.

Small, Optically-Driven Power Source

NASA Technical Reports Server (NTRS)

Cockrum, Richard H.; Wang, Ke-Li J.

1988-01-01

Power transmitted along fiber-optic cables. Transmitted as infrared light along fiber-optic cable, converted to electricity to supply small electronic circuit. Power source and circuit remains electrically isolated from each other for safety or reduces electromagnetic interference. Array of diodes made by standard integrated-circuit techniques and packaged for mounting at end of fiber-optic cable.

Packaging printed circuit boards: A production application of interactive graphics

NASA Technical Reports Server (NTRS)

Perrill, W. A.

1975-01-01

The structure and use of an Interactive Graphics Packaging Program (IGPP), conceived to apply computer graphics to the design of packaging electronic circuits onto printed circuit boards (PCB), were described. The intent was to combine the data storage and manipulative power of the computer with the imaginative, intuitive power of a human designer. The hardware includes a CDC 6400 computer and two CDC 777 terminals with CRT screens, light pens, and keyboards. The program is written in FORTRAN 4 extended with the exception of a few functions coded in COMPASS (assembly language). The IGPP performs four major functions for the designer: (1) data input and display, (2) component placement (automatic or manual), (3) conductor path routing (automatic or manual), and (4) data output. The most complex PCB packaged to date measured 16.5 cm by 19 cm and contained 380 components, two layers of ground planes and four layers of conductors mixed with ground planes.

Intelligent structures technology

NASA Astrophysics Data System (ADS)

Crawley, Edward F.

1991-07-01

Viewgraphs on intelligent structures technology are presented. Topics covered include: embedding electronics; electrical and mechanical compatibility; integrated circuit chip packaged for embedding; embedding devices within composite structures; test of embedded circuit in G/E coupon; temperature/humidity/bias test; single-chip microcomputer control experiment; and structural shape determination.

Intelligent structures technology

NASA Technical Reports Server (NTRS)

Crawley, Edward F.

1991-01-01

Viewgraphs on intelligent structures technology are presented. Topics covered include: embedding electronics; electrical and mechanical compatibility; integrated circuit chip packaged for embedding; embedding devices within composite structures; test of embedded circuit in G/E coupon; temperature/humidity/bias test; single-chip microcomputer control experiment; and structural shape determination.

Modular power converter having fluid cooled support

DOEpatents

Beihoff, Bruce C.; Radosevich, Lawrence D.; Meyer, Andreas A.; Gollhardt, Neil; Kannenberg, Daniel G.

2005-09-06

A support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. The support, in conjunction with other packaging features may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

Modular power converter having fluid cooled support

DOEpatents

Beihoff, Bruce C.; Radosevich, Lawrence D.; Meyer, Andreas A.; Gollhardt, Neil; Kannenberg, Daniel G.

2005-12-06

A support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. The support, in conjunction with other packaging features may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

Military Curricula for Vocational & Technical Education. Basic Electricity and Electronics. CANTRAC A-100-0010. Module 34: Linear Integrated Circuits. Study Booklet.

ERIC Educational Resources Information Center

Chief of Naval Education and Training Support, Pensacola, FL.

This individualized learning module on linear integrated circuits is one in a series of modules for a course in basic electricity and electronics. The course is one of a number of military-developed curriculum packages selected for adaptation to vocational instructional and curriculum development in a civilian setting. Two lessons are included in…

Physically separating printed circuit boards with a resilient, conductive contact

NASA Technical Reports Server (NTRS)

Baker, John D. (Inventor); Montalvo, Alberto (Inventor)

1999-01-01

A multi-board module provides high density electronic packaging in which multiple printed circuit boards are stacked. Electrical power, or signals, are conducted between the boards through a resilient contact. One end of the contact is located at a via in the lower circuit board and soldered to a pad near the via. The top surface of the contact rests against a via of the facing printed circuit board.

Flexible packaging of solid-state integrated circuit chips with elastomeric microfluidics

PubMed Central

Zhang, Bowei; Dong, Quan; Korman, Can E.; Li, Zhenyu; Zaghloul, Mona E.

2013-01-01

A flexible technology is proposed to integrate smart electronics and microfluidics all embedded in an elastomer package. The microfluidic channels are used to deliver both liquid samples and liquid metals to the integrated circuits (ICs). The liquid metals are used to realize electrical interconnects to the IC chip. This avoids the traditional IC packaging challenges, such as wire-bonding and flip-chip bonding, which are not compatible with current microfluidic technologies. As a demonstration we integrated a CMOS magnetic sensor chip and associate microfluidic channels on a polydimethylsiloxane (PDMS) substrate that allows precise delivery of small liquid samples to the sensor. Furthermore, the packaged system is fully functional under bending curvature radius of one centimetre and uniaxial strain of 15%. The flexible integration of solid-state ICs with microfluidics enables compact flexible electronic and lab-on-a-chip systems, which hold great potential for wearable health monitoring, point-of-care diagnostics and environmental sensing among many other applications.

Merging parallel optics packaging and surface mount technologies

NASA Astrophysics Data System (ADS)

Kopp, Christophe; Volpert, Marion; Routin, Julien; Bernabé, Stéphane; Rossat, Cyrille; Tournaire, Myriam; Hamelin, Régis

2008-02-01

Optical links are well known to present significant advantages over electrical links for very high-speed data rate at 10Gpbs and above per channel. However, the transition towards optical interconnects solutions for short and very short reach applications requires the development of innovative packaging solutions that would deal with very high volume production capability and very low cost per unit. Moreover, the optoelectronic transceiver components must be able to move from the edge to anywhere on the printed circuit board, for instance close to integrated circuits with high speed IO. In this paper, we present an original packaging design to manufacture parallel optic transceivers that are surface mount devices. The package combines highly integrated Multi-Chip-Module on glass and usual IC ceramics packaging. The use of ceramic and the development of sealing technologies achieve hermetic requirements. Moreover, thanks to a chip scale package approach the final device exhibits a much minimized footprint. One of the main advantages of the package is its flexibility to be soldered or plugged anywhere on the printed circuit board as any other electronic device. As a demonstrator we present a 2 by 4 10Gbps transceiver operating at 850nm.

Modelling of optoelectronic circuits based on resonant tunneling diodes

NASA Astrophysics Data System (ADS)

Rei, João. F. M.; Foot, James A.; Rodrigues, Gil C.; Figueiredo, José M. L.

2017-08-01

Resonant tunneling diodes (RTDs) are the fastest pure electronic semiconductor devices at room temperature. When integrated with optoelectronic devices they can give rise to new devices with novel functionalities due to their highly nonlinear properties and electrical gain, with potential applications in future ultra-wide-band communication systems (see e.g. EU H2020 iBROW Project). The recent coverage on these devices led to the need to have appropriated simulation tools. In this work, we present RTD based optoelectronic circuits simulation packages to provide circuit signal level analysis such as transient and frequency responses. We will present and discuss the models, and evaluate the simulation packages.

Multilead, Vaporization-Cooled Soldering Heat Sink

NASA Technical Reports Server (NTRS)

Rice, John

1995-01-01

Vaporization-cooled heat sink proposed for use during soldering of multiple electrical leads of packaged electronic devices to circuit boards. Heat sink includes compliant wicks held in grooves on edges of metal fixture. Wicks saturated with water. Prevents excessive increases in temperature at entrances of leads into package.

Military Curricula for Vocational & Technical Education. Basic Electricity and Electronics Individualized Learning System. CANTRAC A-100-0010. Module Six: Parallel Circuits. Study Booklet.

ERIC Educational Resources Information Center

Chief of Naval Education and Training Support, Pensacola, FL.

This individualized learning module on parallel circuits is one in a series of modules for a course in basic electricity and electronics. The course is one of a number of military-developed curriculum packages selected for adaptation to vocational instructional and curriculum development in a civilian setting. Four lessons are included in the…

Electrical power converter method and system employing multiple output converters

DOEpatents

Beihoff, Bruce C [Wauwatosa, WI; Radosevich, Lawrence D [Muskego, WI; Meyer, Andreas A [Richmond Heights, OH; Gollhardt, Neil [Fox Point, WI; Kannenberg, Daniel G [Waukesha, WI

2007-05-01

A support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. The support, in conjunction with other packaging features may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

Fluid cooled vehicle drive module

DOEpatents

Beihoff, Bruce C.; Radosevich, Lawrence D.; Meyer, Andreas A.; Gollhardt, Neil; Kannenberg, Daniel G.

2005-11-15

An electric vehicle drive includes a support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. The support, in conjunction with other packaging features may form a shield from both external EM/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

Electrical power converter method and system employing multiple-output converters

DOEpatents

Beihoff, Bruce C.; Radosevich, Lawrence D.; Meyer, Andreas A.; Gollhardt, Neil; Kannenberg, Daniel G.

2006-03-21

A support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. The support, in conjunction with other packaging features may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

Corrosion of silicon integrated circuits and lifetime predictions in implantable electronic devices.

PubMed

Vanhoestenberghe, A; Donaldson, N

2013-06-01

Corrosion is a prime concern for active implantable devices. In this paper we review the principles underlying the concepts of hermetic packages and encapsulation, used to protect implanted electronics, some of which remain widely overlooked. We discuss how technological advances have created a need to update the way we evaluate the suitability of both protection methods. We demonstrate how lifetime predictability is lost for very small hermetic packages and introduce a single parameter to compare different packages, with an equation to calculate the minimum sensitivity required from a test method to guarantee a given lifetime. In the second part of this paper, we review the literature on the corrosion of encapsulated integrated circuits (ICs) and, following a new analysis of published data, we propose an equation for the pre-corrosion lifetime of implanted ICs, and discuss the influence of the temperature, relative humidity, encapsulation and field-strength. As any new protection will be tested under accelerated conditions, we demonstrate the sensitivity of acceleration factors to some inaccurately known parameters. These results are relevant for any application of electronics working in a moist environment. Our comparison of encapsulation and hermetic packages suggests that both concepts may be suitable for future implants.

Thermal Testing and Quality Assurance of BGA LCC & QFN Electronic Packages

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kuper, Cameron Mathias

The purpose of this project is to experimentally validate the thermal fatigue life of solder interconnects for a variety of surface mount electronic packages. Over the years, there has been a significant amount of research and analysis in the fracture of solder joints on printed circuit boards. Solder is important in the mechanical and electronic functionality of the component. It is important throughout the life of the product that the solder remains crack and fracture free. The specific type of solder used in this experiment is a 63Sn37Pb eutectic alloy. Each package was surrounded conformal coating or underfill material.

Designing an Electronics Data Package for Printed Circuit Boards (PCBs)

DTIC Science & Technology

2013-08-01

finished PCB flatness deviation should be less than 0.010 inches per inch. 4  The minimum copper wall thickness of plated-thru holes should be...Memory Card International Association)  IPC-6015 MCM-L (Multi-Chip Module – Laminated )  IPC-6016 HDI (High Density Interconnect)  IPC-6018...Interconnect ICT In Circuit Tester IPC Association Connecting Electronics Industries MCM-L Multi-Chip Module – Laminated MIL Military NEMA National

Hybrid measurement chains for the SAS-C spacecraft. [advantages over analog signal processing circuits

NASA Technical Reports Server (NTRS)

Goeke, R. F.

1975-01-01

Spacecraft electronic systems usually demand tight packaging. It was this consideration which initially forced us to consider hybrid circuits for the analog signal processing circuits in the Small Astronomy Satellite-C (SAS-C) scientific payload. We gradually discovered that increased reliability, low power consumption, and reduced program costs all followed. This paper will attempt to share our laboratory's first experience with hybrid circuits and indicate those areas which we found to be important.

Stitch-bond parallel-gap welding for IC circuits

NASA Technical Reports Server (NTRS)

Chvostal, P.; Tuttle, J.; Vanderpool, R.

1980-01-01

Stitch-bonded flatpacks are superior to soldered dual-in-lines where size, weight, and reliability are important. Results should interest designers of packaging for complex high-reliability electronics, such as that used in security systems, industrial process control, and vehicle electronics.

Use of tear ring permits repair of sealed module circuitry

NASA Technical Reports Server (NTRS)

1965-01-01

Improved packaging technique for modular electronic circuitry utilizes a tear ring which may be removed for repair and resealed. The tear ring is put over the container and header to which the electronic circuit assembly has been attached.

Electronic ripple indicator

NASA Technical Reports Server (NTRS)

Davidson, J. K.; Houck, W. H.

1971-01-01

Electronic circuit for monitoring excessive ripple voltage on dc power lines senses voltage variations from few millivolts to maximum of 10 volts rms. Instrument is used wherever power supply fluctuations might endanger system operations or damage equipment. Device is inexpensive and easily packaged in small chassis.

Optomechanical Design and Characterization of a Printed-Circuit-Board-Based Free-Space Optical Interconnect Package

NASA Astrophysics Data System (ADS)

Zheng, Xuezhe; Marchand, Philippe J.; Huang, Dawei; Kibar, Osman; Ozkan, Nur S. E.; Esener, Sadik C.

1999-09-01

We present a proof of concept and a feasibility demonstration of a practical packaging approach in which free-space optical interconnects (FSOI s) can be integrated simply on electronic multichip modules (MCM s) for intra-MCM board interconnects. Our system-level packaging architecture is based on a modified folded 4 f imaging system that has been implemented with only off-the-shelf optics, conventional electronic packaging, and passive-assembly techniques to yield a potentially low-cost and manufacturable packaging solution. The prototypical system as built supports 48 independent FSOI channels with 8 separate laser and detector chips, for which each chip consists of a one-dimensional array of 12 devices. All the chips are assembled on a single substrate that consists of a printed circuit board or a ceramic MCM. Optical link channel efficiencies of greater than 90% and interchannel cross talk of less than 20 dB at low frequency have been measured. The system is compact at only 10 in. 3 (25.4 cm 3 ) and is scalable, as it can easily accommodate additional chips as well as two-dimensional optoelectronic device arrays for increased interconnection density.

Tool for use in lifting pin supported objects

NASA Technical Reports Server (NTRS)

Marzek, R. A.; Read, W. S. (Inventor)

1974-01-01

A tool for use in lifting a pin-supported, electronic package mounted in juxtaposition with the surface of an electronic circuit board is described. The tool is configured to be received beneath a pin-supported package and is characterized by a manually operable linkage, including an elongated, rigid link is supported for axial reciprocation and a pivotal link pinned to the body and supported for oscillation induced in response to axial motion imparted to the rigid link. A lifting plate is pivotally coupled to the distal end of the pivotal link so that oscillatory motion imparted to the pivotal link serves to move the plate vertically for elevating the plate into lifting engagement with the electronic package positioned thereabove.

Direct Desktop Printed-Circuits-on-Paper Flexible Electronics

PubMed Central

Zheng, Yi; He, Zhizhu; Gao, Yunxia; Liu, Jing

2013-01-01

There currently lacks of a way to directly write out electronics, just like printing pictures on paper by an office printer. Here we show a desktop printing of flexible circuits on paper via developing liquid metal ink and related working mechanisms. Through modifying adhesion of the ink, overcoming its high surface tension by dispensing machine and designing a brush like porous pinhead for printing alloy and identifying matched substrate materials among different papers, the slightly oxidized alloy ink was demonstrated to be flexibly printed on coated paper, which could compose various functional electronics and the concept of Printed-Circuits-on-Paper was thus presented. Further, RTV silicone rubber was adopted as isolating inks and packaging material to guarantee the functional stability of the circuit, which suggests an approach for printing 3D hybrid electro-mechanical device. The present work paved the way for a low cost and easygoing method in directly printing paper electronics.

Tomography experiment of an integrated circuit specimen using 3 MeV electrons in the transmission electron microscope.

PubMed

Zhang, Hai-Bo; Zhang, Xiang-Liang; Wang, Yong; Takaoka, Akio

2007-01-01

The possibility of utilizing high-energy electron tomography to characterize the micron-scale three dimensional (3D) structures of integrated circuits has been demonstrated experimentally. First, electron transmission through a tilted SiO(2) film was measured with an ultrahigh-voltage electron microscope (ultra-HVEM) and analyzed from the point of view of elastic scattering of electrons, showing that linear attenuation of the logarithmic electron transmission still holds valid for effective specimen thicknesses up to 5 microm under 2 MV accelerating voltages. Electron tomography of a micron-order thick integrated circuit specimen including the Cu/via interconnect was then tried with 3 MeV electrons in the ultra-HVEM. Serial projection images of the specimen tilted at different angles over the range of +/-90 degrees were acquired, and 3D reconstruction was performed with the images by means of the IMOD software package. Consequently, the 3D structures of the Cu lines, via and void, were revealed by cross sections and surface rendering.

Package architecture and component design for an implanted neural stimulator with closed loop control.

PubMed

Bjune, Caroline K; Marinis, Thomas F; Brady, Jeanne M; Moran, James; Wheeler, Jesse; Sriram, Tirunelveli S; Parks, Philip D; Widge, Alik S; Dougherty, Darin D; Eskandar, Emad N

2015-08-01

An implanted neural stimulator with closed loop control requires electrodes for stimulation pulses and recording neuron activity. Our system features arrays of 64 electrodes. Each electrode can be addressed through a cross bar switch, to enable it to be used for stimulation or recording. This electrode switch, a bank of low noise amplifiers with an integrated analog to digital converter, power conditioning electronics, and a communications and control gate array are co-located with the electrode array in a 14 millimeter diameter satellite package that is designed to be flush mounted in a skull burr hole. Our system features five satellite packages connected to a central hub processor-controller via ten conductor cables that terminate in a custom designed, miniaturized connector. The connector incorporates features of high reliability, military grade devices and utilizes three distinct seals to isolate the contacts from fluid permeation. The hub system is comprised of a connector header, hermetic electronics package, and rechargeable battery pack, which are mounted on and electrically interconnected by a flexible circuit board. The assembly is over molded with a compliant silicone rubber. The electronics package contains two antennas, a large coil, used for recharging the battery and a high bandwidth antenna that is used to download data and update software. The package is assembled from two machined alumina pieces, a flat base with brazed in, electrical feed through pins and a rectangular cover with rounded corners. Titanium seal rings are brazed onto these two pieces so that they can be sealed by laser welding. A third system antenna is incorporated in the flexible circuit board. It is used to communicate with an externally worn control package, which monitors the health of the system and allows both the user and clinician to control or modify various system function parameters.

The Induction of Chaos in Electronic Circuits Final Report-October 1, 2001

DOE Office of Scientific and Technical Information (OSTI.GOV)

R.M.Wheat, Jr.

2003-04-01

This project, now known by the name ''Chaos in Electronic Circuits,'' was originally tasked as a two-year project to examine various ''fault'' or ''non-normal'' operational states of common electronic circuits with some focus on determining the feasibility of exploiting these states. Efforts over the two-year duration of this project have been dominated by the study of the chaotic behavior of electronic circuits. These efforts have included setting up laboratory space and hardware for conducting laboratory tests and experiments, acquiring and developing computer simulation and analysis capabilities, conducting literature surveys, developing test circuitry and computer models to exercise and test ourmore » capabilities, and experimenting with and studying the use of RF injection as a means of inducing chaotic behavior in electronics. An extensive array of nonlinear time series analysis tools have been developed and integrated into a package named ''After Acquisition'' (AA), including capabilities such as Delayed Coordinate Embedding Mapping (DCEM), Time Resolved (3-D) Fourier Transform, and several other phase space re-creation methods. Many computer models have been developed for Spice and for the ATP (Alternative Transients Program), modeling the several working circuits that have been developed for use in the laboratory. And finally, methods of induction of chaos in electronic circuits have been explored.« less

Proceedings of the Conference on High-temperature Electronics

NASA Technical Reports Server (NTRS)

1981-01-01

The development of electronic devices for use in high temperature environments is addressed. The instrumentational needs of planetary exploration, fossil and nuclear power reactors, turbine engine monitoring, and well logging are defined. Emphasis is place on the fabrication and performance of materials and semiconductor devices, circuits and systems and packaging.

Packaged Capacitive Pressure Sensor System for Aircraft Engine Health Monitoring

NASA Technical Reports Server (NTRS)

Scardelletti, Maximilian C.; Zorman, Christian A.

2016-01-01

This paper describes the development of a packaged silicon carbide (SiC) based MEMS pressure sensor system designed specifically for a conventional turbofan engine. The electronic circuit is based on a Clapp-type oscillator that incorporates a 6H-SiC MESFET, a SiCN MEMS capacitive pressure sensor, titanate MIM capacitors, wirewound inductors, and thick film resistors. The pressure sensor serves as the capacitor in the LC tank circuit, thereby linking pressure to the resonant frequency of the oscillator. The oscillator and DC bias circuitry were fabricated on an alumina substrate and secured inside a metal housing. The packaged sensing system reliably operates at 0 to 350 psi and 25 to 540C. The system has a pressure sensitivity of 6.8 x 10E-2 MHzpsi. The packaged system shows negligible difference in frequency response between 25 and 400C. The fully packaged sensor passed standard benchtop acceptance tests and was evaluated on a flight-worthy engine.

Cochlear Implants (For Parents)

MedlinePlus

... nerve, and send it to the brain. The cochlear implant package is made up of: a receiver-stimulator that contains all of the electronic circuits that control the flow of electrical pulses into the ear an antenna ...

A Basic Research for the Development and Evaluation of Novel MEMS Digital Accelerometers

DTIC Science & Technology

2013-02-01

that timing differences as measured by the circuit are linearly dependent on the measured capacitance changes. As such, the circuit’s readout is...error in the electronic measurement to refine the technique. An additional capability of the circuit is the ability to observe the impact of cold...low resistivity on (ɘ.01 Ω-cm) silicon on insulator wafers (SOI). The beams are fabricated in a 0.3 cm by 0.3 cm die which is then packaged and wire

Improved charge injection device and a focal plane interface electronics board for stellar tracking

NASA Technical Reports Server (NTRS)

Michon, G. J.; Burke, H. K.

1984-01-01

An improved Charge Injection Device (CID) stellar tracking sensor and an operating sensor in a control/readout electronics board were developed. The sensor consists of a shift register scanned, 256x256 CID array organized for readout of 4x4 subarrays. The 4x4 subarrays can be positioned anywhere within the 256x256 array with a 2 pixel resolution. This allows continuous tracking of a number of stars simultaneously since nine pixels (3x3) centered on any star can always be read out. Organization and operation of this sensor and the improvements in design and semiconductor processing are described. A hermetic package incorporating an internal thermoelectric cooler assembled using low temperature solders was developed. The electronics board, which contains the sensor drivers, amplifiers, sample hold circuits, multiplexer, analog to digital converter, and the sensor temperature control circuits, is also described. Packaged sensors were evaluated for readout efficiency, spectral quantum efficiency, temporal noise, fixed pattern noise, and dark current. Eight sensors along with two tracker electronics boards were completed, evaluated, and delivered.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tanaka, T.J.; Nowlen, S.P.; Anderson, D.J.

Smoke can adversely affect digital electronics; in the short term, it can lead to circuit bridging and in the long term to corrosion of metal parts. This report is a summary of the work to date and component-level tests by Sandia National Laboratories for the Nuclear Regulatory Commission to determine the impact of smoke on digital instrumentation and control equipment. The component tests focused on short-term effects such as circuit bridging in typical components and the factors that can influence how much the smoke will affect them. These factors include the component technology and packaging, physical board protection, and environmentalmore » conditions such as the amount of smoke, temperature of burn, and humidity level. The likelihood of circuit bridging was tested by measuring leakage currents and converting those currents to resistance in ohms. Hermetically sealed ceramic packages were more resistant to smoke than plastic packages. Coating the boards with an acrylic spray provided some protection against circuit bridging. The smoke generation factors that affect the resistance the most are humidity, fuel level, and burn temperature. The use of CO{sub 2} as a fire suppressant, the presence of galvanic metal, and the presence of PVC did not significantly affect the outcome of these results.« less

Design and Development of a CPCI-Based Electronics Package for Space Station Experiments

NASA Technical Reports Server (NTRS)

Kolacz, John S.; Clapper, Randy S.; Wade, Raymond P.

2006-01-01

The NASA John H. Glenn Research Center is developing a Compact-PCI (CPCI) based electronics package for controlling space experiment hardware on the International Space Station. Goals of this effort include an easily modified, modular design that allows for changes in experiment requirements. Unique aspects of the experiment package include a flexible circuit used for internal interconnections and a separate enclosure (box in a box) for controlling 1 kW of power for experiment fuel heating requirements. This electronics package was developed as part of the FEANICS (Flow Enclosure Accommodating Novel Investigations in Combustion of Solids) mini-facility which is part of the Fluids and Combustion Facility s Combustion Integrated Rack (CIR). The CIR will be the platform for future microgravity combustion experiments and will reside on the Destiny Module of the International Space Station (ISS). The FEANICS mini-facility will be the primary means for conducting solid fuel combustion experiments in the CIR on ISS. The main focus of many of these solid combustion experiments will be to conduct applied scientific investigations in fire-safety to support NASA s future space missions. A description of the electronics package and the results of functional testing are the subjects of this report. The report concludes that the use of innovative packaging methods combined with readily available COTS hardware can provide a modular electronics package which is easily modified for changing experiment requirements.

Fully Solution-Processable Fabrication of Multi-Layered Circuits on a Flexible Substrate Using Laser Processing

PubMed Central

Ji, Seok Young; Choi, Wonsuk; Jeon, Jin-Woo; Chang, Won Seok

2018-01-01

The development of printing technologies has enabled the realization of electric circuit fabrication on a flexible substrate. However, the current technique remains restricted to single-layer patterning. In this paper, we demonstrate a fully solution-processable patterning approach for multi-layer circuits using a combined method of laser sintering and ablation. Selective laser sintering of silver (Ag) nanoparticle-based ink is applied to make conductive patterns on a heat-sensitive substrate and insulating layer. The laser beam path and irradiation fluence are controlled to create circuit patterns for flexible electronics. Microvia drilling using femtosecond laser through the polyvinylphenol-film insulating layer by laser ablation, as well as sequential coating of Ag ink and laser sintering, achieves an interlayer interconnection between multi-layer circuits. The dimension of microvia is determined by a sophisticated adjustment of the laser focal position and intensity. Based on these methods, a flexible electronic circuit with chip-size-package light-emitting diodes was successfully fabricated and demonstrated to have functional operations. PMID:29425144

Electronic Principles I, 7-5. Military Curriculum Materials for Vocational and Technical Education.

ERIC Educational Resources Information Center

Ohio State Univ., Columbus. National Center for Research in Vocational Education.

This first of 10 blocks of student and teacher materials for a secondary/postsecondary level course in electronic principles comprises one of a number of military-developed curriculum packages selected for adaptation to vocational instruction and curriculum development in a civilian setting. This block on DC circuits contains nine modules covering…

Integrated Electrode Arrays for Neuro-Prosthetic Implants

NASA Technical Reports Server (NTRS)

Brandon, Erik; Mojarradi, Mohammede

2003-01-01

Arrays of electrodes integrated with chip-scale packages and silicon-based integrated circuits have been proposed for use as medical electronic implants, including neuro-prosthetic devices that might be implanted in brains of patients who suffer from strokes, spinal-cord injuries, or amyotrophic lateral sclerosis. The electrodes of such a device would pick up signals from neurons in the cerebral cortex, and the integrated circuit would perform acquisition and preprocessing of signal data. The output of the integrated circuit could be used to generate, for example, commands for a robotic arm. Electrode arrays capable of acquiring electrical signals from neurons already exist, but heretofore, there has been no convenient means to integrate these arrays with integrated-circuit chips. Such integration is needed in order to eliminate the need for the extensive cabling now used to pass neural signals to data-acquisition and -processing equipment outside the body. The proposed integration would enable progress toward neuro-prostheses that would be less restrictive of patients mobility. An array of electrodes would comprise a set of thin wires of suitable length and composition protruding from and supported by a fine-pitch micro-ball grid array or chip-scale package (see figure). The associated integrated circuit would be mounted on the package face opposite the probe face, using the solder bumps (the balls of the ball grid array) to make the electrical connections between the probes and the input terminals of the integrated circuit. The key innovation is the insertion of probe wires of the appropriate length and material into the solder bumps through a reflow process, thereby fixing the probes in place and electrically connecting them with the integrated circuit. The probes could be tailored to any distribution of lengths and made of any suitable metal that could be drawn into fine wires. Furthermore, the wires could be coated with an insulating layer using anodization or other processes, to achieve the correct electrical impedance. The probe wires and the packaging materials must be biocompatible using such materials as lead-free solders. For protection, the chip and package can be coated with parylene.

HEMT Amplifiers and Equipment for their On-Wafer Testing

NASA Technical Reports Server (NTRS)

Fung, King man; Gaier, Todd; Samoska, Lorene; Deal, William; Radisic, Vesna; Mei, Xiaobing; Lai, Richard

2008-01-01

Power amplifiers comprising InP-based high-electron-mobility transistors (HEMTs) in coplanar-waveguide (CPW) circuits designed for operation at frequencies of hundreds of gigahertz, and a test set for onwafer measurement of their power levels have been developed. These amplifiers utilize an advanced 35-nm HEMT monolithic microwave integrated-circuit (MMIC) technology and have potential utility as local-oscillator drivers and power sources in future submillimeter-wavelength heterodyne receivers and imaging systems. The test set can reduce development time by enabling rapid output power characterization, not only of these and similar amplifiers, but also of other coplanar-waveguide power circuits, without the necessity of packaging the circuits.

Package for integrated optic circuit and method

DOEpatents

Kravitz, Stanley H.; Hadley, G. Ronald; Warren, Mial E.; Carson, Richard F.; Armendariz, Marcelino G.

1998-01-01

A structure and method for packaging an integrated optic circuit. The package comprises a first wall having a plurality of microlenses formed therein to establish channels of optical communication with an integrated optic circuit within the package. A first registration pattern is provided on an inside surface of one of the walls of the package for alignment and attachment of the integrated optic circuit. The package in one embodiment may further comprise a fiber holder for aligning and attaching a plurality of optical fibers to the package and extending the channels of optical communication to the fibers outside the package. In another embodiment, a fiber holder may be used to hold the fibers and align the fibers to the package. The fiber holder may be detachably connected to the package.

Package for integrated optic circuit and method

DOEpatents

Kravitz, S.H.; Hadley, G.R.; Warren, M.E.; Carson, R.F.; Armendariz, M.G.

1998-08-04

A structure and method are disclosed for packaging an integrated optic circuit. The package comprises a first wall having a plurality of microlenses formed therein to establish channels of optical communication with an integrated optic circuit within the package. A first registration pattern is provided on an inside surface of one of the walls of the package for alignment and attachment of the integrated optic circuit. The package in one embodiment may further comprise a fiber holder for aligning and attaching a plurality of optical fibers to the package and extending the channels of optical communication to the fibers outside the package. In another embodiment, a fiber holder may be used to hold the fibers and align the fibers to the package. The fiber holder may be detachably connected to the package. 6 figs.

An open-source laser electronics suite

NASA Astrophysics Data System (ADS)

Pisenti, Neal C.; Reschovsky, Benjamin J.; Barker, Daniel S.; Restelli, Alessandro; Campbell, Gretchen K.

2016-05-01

We present an integrated set of open-source electronics for controlling external-cavity diode lasers and other instruments in the laboratory. The complete package includes a low-noise circuit for driving high-voltage piezoelectric actuators, an ultra-stable current controller based on the design of, and a high-performance, multi-channel temperature controller capable of driving thermo-electric coolers or resistive heaters. Each circuit (with the exception of the temperature controller) is designed to fit in a Eurocard rack equipped with a low-noise linear power supply capable of driving up to 5 A at +/- 15 V. A custom backplane allows signals to be shared between modules, and a digital communication bus makes the entire rack addressable by external control software over TCP/IP. The modular architecture makes it easy for additional circuits to be designed and integrated with existing electronics, providing a low-cost, customizable alternative to commercial systems without sacrificing performance.

Thematic mapper flight model preshipment review data package. Volume 4: Appendix. Part E: Electronics module data

NASA Technical Reports Server (NTRS)

1982-01-01

Tests to verify the as-designed performance of all circuits within the thematic mapper electronics module unit are described. Specifically, the tests involved the evaluation of the scan line corrector driver, shutter drivers function, cal lamp controller function, post amplifier function, command decoder verification unit, and the temperature and actuator controllers function.

Electronic scanning pressure measuring system and transducer package

NASA Technical Reports Server (NTRS)

Coe, C. F. (Inventor); Parra, G. T.

1984-01-01

An electronic scanning pressure system that includes a plurality of pressure transducers is examined. A means obtains an electrical signal indicative of a pressure measurement from each of the plurality of pressure transducers. A multiplexing means is connected for selectivity supplying inputs from the plurality of pressure transducers to the signal obtaining means. A data bus connects the plurality of pressure transducers to the multiplexing means. A latch circuit is connected to supply control inputs to the multiplexing means. An address bus is connected to supply an address signal of a selected one of the plurality of pressure transducers to the latch circuit. In operation, each of the pressure transducers is successively scanned by the multiplexing means in response to address signals supplied on the address bus to the latch circuit.

Development Unit Configuration and Current Status of the MIP/MTERC Experiment

NASA Technical Reports Server (NTRS)

Juanero, K. J.; Johnson, K. R.

1999-01-01

The Mars In-Situ Propellant Production (ISPP) Precursor (MIP) experiment package is planned for inclusion on the Mars 2001 Lander. This experiment package consists of five experiments whose purpose is to demonstrate the performance of various ISPP processes in-situ on Mars. The demonstrated ability to produce propellant for Mars Return Vehicles (MRV) is considered to be a necessary precursor to any future manned mission to Mars. The Mars Thermal Environment/Radiator Characterization (MTERC) experiment is part of the MIP package and is intended to determine the Mars night sky temperature as well as to characterize the performance degradation of radiators caused by environmental exposure on Mars over time. Radiators are needed as part of the ISPP process to remove heat from the Mars Atmosphere Acquisition and Compression (MAAC) C02 sorption compressor. MTERC will provide the data needed to optimize the design of radiators for ISPP and other processes. A MTERC Development Unit (DU) has been fabricated and tested at JPL. The MTERC DU consists of: (1) a radiator subassembly, (2) a motor/cover subassembly, (3) a differential temperature control circuit and motor control electronics circuit board, and (4) a command and data handling electronics circuit board. This paper will describe the operational theory and the configuration of the MTERC DU and will discuss the current status of the MTERC experiment development including some selected results of performance testing that has been completed prior to the ISRU III meeting.

Development Unit Configuration and Current Status of the MIP/MTERC Experiment

NASA Technical Reports Server (NTRS)

Juanero, K. J.; Johnson, K. R.

1999-01-01

The Mars In-Situ Propellant Production (ISPP) Precursor (MIP) experiment package is planned for inclusion on the Mars 2001 Lander. This experiment package consists of five experiments whose purpose is to demonstrate the performance of various ISPP processes in-situ on Mars. The demonstrated ability to produce propellant for Mars Return Vehicles (MRV) is considered to be a necessary precursor to any future manned mission to Mars. The Mars Thermal Environment/Radiator Characterization (MTERC) experiment is part of the MIP package and is intended to determine the Mars night sky temperature as well as to characterize the performance degradation of radiators caused by environmental exposure on Mars over time. Radiators are needed as part of the ISPP process to remove heat from the Mars Atmosphere Acquisition and Compression (MAAC) CO2 sorption compressor. MTERC will provide the data needed to optimize the design of radiators for ISPP and other processes. A MTERC Development Unit (DU) has been fabricated and tested at JPL. The MTERC DU consists of 1) a radiator subassembly, 2) a motor/cover subassembly, 3) a differential temperature control circuit and motor control electronics circuit board, and 4) a command and data handling electronics circuit board. This paper will describe the operational theory and the configuration of the MTERC DU and will discuss the current status of the MTERC experiment development including some selected results of performance testing that has been completed prior to the ISRU III meeting.

Basic Mechanisms of Radiation Effects on Electronic Materials, Devices, and Integrated Circuits

DTIC Science & Technology

1982-08-01

recovery time versus reciprocal tempera- ture derived from data of the type shown in Figure 18. . . .31 20 Several ways to alter the charje state of...and long-term recovery processes that occUr in neutron-irradiated silicon ........ 40 29 Annealing factor versus time for 11 ohm-cm p-type bulk silicon...radioactive ele- ments (such as uranium and thorium) which, when incorporated in packaged integrated circuits, can cause occasional transient upsets

GRAPHIC INPUT TABLETS FOR PROGRAMMED INSTRUCTION.

ERIC Educational Resources Information Center

BOOKER, C.A., JR.; AND OTHERS

TO FACILITATE STUDENT-COMPUTER COMMUNICATION IN PROGRAMED INSTRUCTION, A MODIFICATION OF THE RAND TABLET, WHICH CONVERTS POSITION INFORMATION INTO ELECTRICAL SIGNALS, IS PROPOSED. MANUFACTURE OF THE DEVICE WOULD BE MORE ECONOMICAL, AND THE ELECTRONICS PACKAGE, REDESIGNED WITH INTEGRATED CIRCUITS, WOULD BE SMALLER AND MORE FLEXIBLE. MODIFICATION OF…

The Conference on High Temperature Electronics

NASA Technical Reports Server (NTRS)

Hamilton, D. J.; Mccormick, J. B.; Kerwin, W. J.; Narud, J. A.

1981-01-01

The status of and directions for high temperature electronics research and development were evaluated. Major objectives were to (1) identify common user needs; (2) put into perspective the directions for future work; and (3) address the problem of bringing to practical fruition the results of these efforts. More than half of the presentations dealt with materials and devices, rather than circuits and systems. Conference session titles and an example of a paper presented in each session are (1) User requirements: High temperature electronics applications in space explorations; (2) Devices: Passive components for high temperature operation; (3) Circuits and systems: Process characteristics and design methods for a 300 degree QUAD or AMP; and (4) Packaging: Presently available energy supply for high temperature environment.

The Conference on High Temperature Electronics

NASA Astrophysics Data System (ADS)

Hamilton, D. J.; McCormick, J. B.; Kerwin, W. J.; Narud, J. A.

The status of and directions for high temperature electronics research and development were evaluated. Major objectives were to (1) identify common user needs; (2) put into perspective the directions for future work; and (3) address the problem of bringing to practical fruition the results of these efforts. More than half of the presentations dealt with materials and devices, rather than circuits and systems. Conference session titles and an example of a paper presented in each session are (1) User requirements: High temperature electronics applications in space explorations; (2) Devices: Passive components for high temperature operation; (3) Circuits and systems: Process characteristics and design methods for a 300 degree QUAD or AMP; and (4) Packaging: Presently available energy supply for high temperature environment.

Thermal Peak Management Using Organic Phase Change Materials for Latent Heat Storage in Electronic Applications

PubMed Central

Maxa, Jacob; Novikov, Andrej; Nowottnick, Mathias

2017-01-01

Modern high power electronics devices consists of a large amount of integrated circuits for switching and supply applications. Beside the benefits, the technology exhibits the problem of an ever increasing power density. Nowadays, heat sinks that are directly mounted on a device, are used to reduce the on-chip temperature and dissipate the thermal energy to the environment. This paper presents a concept of a composite coating for electronic components on printed circuit boards or electronic assemblies that is able to buffer a certain amount of thermal energy, dissipated from a device. The idea is to suppress temperature peaks in electronic components during load peaks or electronic shorts, which otherwise could damage or destroy the device, by using a phase change material to buffer the thermal energy. The phase change material coating could be directly applied on the chip package or the PCB using different mechanical retaining jigs.

Soft-Matter Printed Circuit Board with UV Laser Micropatterning.

PubMed

Lu, Tong; Markvicka, Eric J; Jin, Yichu; Majidi, Carmel

2017-07-05

When encapsulated in elastomer, micropatterned traces of Ga-based liquid metal (LM) can function as elastically deformable circuit wiring that provides mechanically robust electrical connectivity between solid-state elements (e.g., transistors, processors, and sensor nodes). However, LM-microelectronics integration is currently limited by challenges in rapid fabrication of LM circuits and the creation of vias between circuit terminals and the I/O pins of packaged electronics. In this study, we address both with a unique layup for soft-matter electronics in which traces of liquid-phase Ga-In eutectic (EGaIn) are patterned with UV laser micromachining (UVLM). The terminals of the elastomer-sealed LM circuit connect to the surface mounted chips through vertically aligned columns of EGaIn-coated Ag-Fe 2 O 3 microparticles that are embedded within an interfacial elastomer layer. The processing technique is compatible with conventional UVLM printed circuit board (PCB) prototyping and exploits the photophysical ablation of EGaIn on an elastomer substrate. Potential applications to wearable computing and biosensing are demonstrated with functional implementations in which soft-matter PCBs are populated with surface-mounted microelectronics.

Highly-hermetic feedthrough fiber pigtailed circular TO-can electro-optic sensor for avionics applications

NASA Astrophysics Data System (ADS)

Lauzon, Jocelyn; Leduc, Lorrain; Bessette, Daniel; Bélanger, Nicolas

2012-06-01

Electro-optic sensors made of lasers or photodetectors assemblies can be associated with a window interface. In order to use these sensors in an avionics application, this interface has to be set on the periphery of the aircraft. This creates constraints on both the position/access of the associated electronics circuit card and the aircraft fuselage. Using an optical fiber to guide the light signal to a sensor being situated inside the aircraft where electronics circuit cards are deployed is an obvious solution that can be readily available. Fiber collimators that adapt to circular TO-can type window sensors do exist. However, they are bulky, add weight to the sensor and necessitate regular maintenance of the optical interface since both the sensor window and the collimator end-face are unprotected against contamination. Such maintenance can be complex since the access to the electronics circuit card, where the sensor is sitting, is usually difficult. This interface alignment can also be affected by vibrations and mechanical shocks, thus impacting sensor performances. As a solution to this problem, we propose a highly-hermetic feedthrough fiber pigtailed circular TO-can package. The optical element to optical fiber interface being set inside the hermetic package, there is no risk of contamination and thus, such a component does not require any maintenance. The footprint of these sensors being identical to their window counterparts, they offer drop-in replacement opportunities. Moreover, we have validated such packaged electro-optic sensors can be made to operate between -55 to 115°C, sustain 250 temperature cycles, 1500G mechanical shocks, 20Grms random vibrations without any performance degradations. Their water content is much smaller than the 0.5% limit set by MIL-STD-883, Method 1018. They have also been verified to offer a fiber pigtail strain relief resistance over 400g. Depending on the electronics elements inside these sensors, they can be made to have a MTBF over 50 000h at 100°C.

Testing methods and techniques: Testing electrical and electronic devices: A compilation

NASA Technical Reports Server (NTRS)

1972-01-01

The methods, techniques, and devices used in testing various electrical and electronic apparatus are presented. The items described range from semiconductor package leak detectors to automatic circuit analyzer and antenna simulators for system checkout. In many cases the approaches can result in considerable cost savings and improved quality control. The testing of various electronic components, assemblies, and systems; the testing of various electrical devices; and the testing of cables and connectors are explained.

Assembling surface mounted components on ink-jet printed double sided paper circuit board.

PubMed

Andersson, Henrik A; Manuilskiy, Anatoliy; Haller, Stefan; Hummelgård, Magnus; Sidén, Johan; Hummelgård, Christine; Olin, Håkan; Nilsson, Hans-Erik

2014-03-07

Printed electronics is a rapidly developing field where many components can already be manufactured on flexible substrates by printing or by other high speed manufacturing methods. However, the functionality of even the most inexpensive microcontroller or other integrated circuit is, at the present time and for the foreseeable future, out of reach by means of fully printed components. Therefore, it is of interest to investigate hybrid printed electronics, where regular electrical components are mounted on flexible substrates to achieve high functionality at a low cost. Moreover, the use of paper as a substrate for printed electronics is of growing interest because it is an environmentally friendly and renewable material and is, additionally, the main material used for many packages in which electronics functionalities could be integrated. One of the challenges for such hybrid printed electronics is the mounting of the components and the interconnection between layers on flexible substrates with printed conductive tracks that should provide as low a resistance as possible while still being able to be used in a high speed manufacturing process. In this article, several conductive adhesives are evaluated as well as soldering for mounting surface mounted components on a paper circuit board with ink-jet printed tracks and, in addition, a double sided Arduino compatible circuit board is manufactured and programmed.

Packaging system with cleaning channel and method of making the same

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fang, Lu

A packaging structure and method for surface mount integrated circuits reduces electrochemical migration (ECM) problems by including one or more cleaning channels to effectively and efficiently remove flux residue that may otherwise remain lodged in gaps between the surface mount package and the printed circuit board. A cleaning channel may be formed along a bottom surface of the surface mount package (i.e., the surface facing the printed circuit board), or along a portion of a top surface of the printed circuit board. In either case, the inclusion of a cleaning channel enlarges the gap between the bottom surface of themore » surface mount package and the printed circuit board and creates a path for contaminants to be flushed out during a cleaning process.« less

Composite embedded fiber optic data links in Standard Electronic Modules

NASA Astrophysics Data System (ADS)

Ehlers, S. L.; Jones, K. J.; Morgan, R. E.; Hixson, Jay

1990-12-01

The goal of this project is to fabricate a chassis/circuit card demonstration entirely 'wired' with embedded and interconnected optical fibers. Graphite/epoxy Standard Electronic Module E (SEM-E) configured panels have been successfully fabricated. Fiber-embedded SEM-E configured panels have been subjected to simultaneous signal transmission and vibration testing. Packaging constraints will require tapping composite-embedded optical fibers at right angles to the direction of optical transmission.

Macromodels of digital integrated circuits for program packages of circuit engineering design

NASA Astrophysics Data System (ADS)

Petrenko, A. I.; Sliusar, P. B.; Timchenko, A. P.

1984-04-01

Various aspects of the generation of macromodels of digital integrated circuits are examined, and their effective application in program packages of circuit engineering design is considered. Three levels of macromodels are identified, and the application of such models to the simulation of circuit outputs is discussed.

Monolithic circuits for barium fluoride detectors used in nuclear physics experiments. CRADA final report

DOE Office of Scientific and Technical Information (OSTI.GOV)

Varner, R.L.; Blankenship, J.L.; Beene, J.R.

1998-02-01

Custom monolithic electronic circuits have been developed recently for large detector applications in high energy physics where subsystems require tens of thousands of channels of signal processing and data acquisition. In the design and construction of these enormous detectors, it has been found that monolithic circuits offer significant advantages over discrete implementations through increased performance, flexible packaging, lower power and reduced cost per channel. Much of the integrated circuit design for the high energy physics community is directly applicable to intermediate energy heavy-ion and electron physics. This STTR project conducted in collaboration with researchers at the Holifield Radioactive Ion Beammore » Facility (HRIBF) at Oak Ridge National Laboratory, sought to develop a new integrated circuit chip set for barium fluoride (BaF{sub 2}) detector arrays based upon existing CMOS monolithic circuit designs created for the high energy physics experiments. The work under the STTR Phase 1 demonstrated through the design, simulation, and testing of several prototype chips the feasibility of using custom CMOS integrated circuits for processing signals from BaF{sub 2} detectors. Function blocks including charge-sensitive amplifiers, comparators, one shots, time-to-amplitude converters, analog memory circuits and buffer amplifiers were implemented during Phase 1 effort. Experimental results from bench testing and laboratory testing with sources were documented.« less

Military Curricula for Vocational & Technical Education. Basic Electricity and Electronics. CANTRAC A-100-0010. Module 32: Intermediate Oscillators; Module 33: Special Devices; Module 34: Linear Integrated Circuits. Students Guide.

ERIC Educational Resources Information Center

Chief of Naval Education and Training Support, Pensacola, FL.

This student guidebook is designed for use with the study booklets in modules 32 through 34 included in the military-developed course on basic electricity and electronics. The course is one of a number of military-developed curriculum packages selected for adaptation to vocational instructional and curriculum development in a civilian setting. An…

3-D Packaging: A Technology Review

NASA Technical Reports Server (NTRS)

Strickland, Mark; Johnson, R. Wayne; Gerke, David

2005-01-01

Traditional electronics are assembled as a planar arrangement of components on a printed circuit board (PCB) or other type of substrate. These planar assemblies may then be plugged into a motherboard or card cage creating a volume of electronics. This architecture is common in many military and space electronic systems as well as large computer and telecommunications systems and industrial electronics. The individual PCB assemblies can be replaced if defective or for system upgrade. Some applications are constrained by the volume or the shape of the system and are not compatible with the motherboard or card cage architecture. Examples include missiles, camcorders, and digital cameras. In these systems, planar rigid-flex substrates are folded to create complex 3-D shapes. The flex circuit serves the role of motherboard, providing interconnection between the rigid boards. An example of a planar rigid - flex assembly prior to folding is shown. In both architectures, the interconnection is effectively 2-D.

Highly efficient on-chip direct electronic-plasmonic transducers

NASA Astrophysics Data System (ADS)

Du, Wei; Wang, Tao; Chu, Hong-Son; Nijhuis, Christian A.

2017-10-01

Photonic elements can carry information with a capacity exceeding 1,000 times that of electronic components, but, due to the optical diffraction limit, these elements are large and difficult to integrate with modern-day nanoelectronics or upcoming packages, such as three-dimensional integrated circuits or stacked high-bandwidth memories1-3. Surface plasmon polaritons can be confined to subwavelength dimensions and can carry information at high speeds (>100 THz)4-6. To combine the small dimensions of nanoelectronics with the fast operating speed of optics via plasmonics, on-chip electronic-plasmonic transducers that directly convert electrical signals into plasmonic signals (and vice versa) are required. Here, we report electronic-plasmonic transducers based on metal-insulator-metal tunnel junctions coupled to plasmonic waveguides with high-efficiency on-chip generation, manipulation and readout of plasmons. These junctions can be readily integrated into existing technologies, and we thus believe that they are promising for applications in on-chip integrated plasmonic circuits.

Fractal dendrite-based electrically conductive composites for laser-scribed flexible circuits

PubMed Central

Yang, Cheng; Cui, Xiaoya; Zhang, Zhexu; Chiang, Sum Wai; Lin, Wei; Duan, Huan; Li, Jia; Kang, Feiyu; Wong, Ching-Ping

2015-01-01

Fractal metallic dendrites have been drawing more attentions recently, yet they have rarely been explored in electronic printing or packaging applications because of the great challenges in large-scale synthesis and limited understanding in such applications. Here we demonstrate a controllable synthesis of fractal Ag micro-dendrites at the hundred-gram scale. When used as the fillers for isotropically electrically conductive composites (ECCs), the unique three-dimensional fractal geometrical configuration and low-temperature sintering characteristic render the Ag micro dendrites with an ultra-low electrical percolation threshold of 0.97 vol% (8 wt%). The ultra-low percolation threshold and self-limited fusing ability may address some critical challenges in current interconnect technology for microelectronics. For example, only half of the laser-scribe energy is needed to pattern fine circuit lines printed using the present ECCs, showing great potential for wiring ultrathin circuits for high performance flexible electronics. PMID:26333352

Radiation Testing and Evaluation Issues for Modern Integrated Circuits

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Cohn, Lew M.

2005-01-01

Abstract. Changes in modern integrated circuit (IC) technologies have modified the way we approach and conduct radiation tolerance and testing of electronics. These changes include scaling of geometries, new materials, new packaging technologies, and overall speed and device complexity challenges. In this short course section, we will identify and discuss these issues as they impact radiation testing, modeling, and effects mitigation of modern integrated circuits. The focus will be on CMOS-based technologies, however, other high performance technologies will be discussed where appropriate. The effects of concern will be: Single-Event Effects (SEE) and steady state total ionizing dose (TID) IC response. However, due to the growing use of opto-electronics in space systems issues concerning displacement damage testing will also be considered. This short course section is not intended to provide detailed "how-to-test" information, but simply provide a snapshot of current challenges and some of the approaches being considered.

Foundry fabricated photonic integrated circuit optical phase lock loop.

PubMed

Bałakier, Katarzyna; Fice, Martyn J; Ponnampalam, Lalitha; Graham, Chris S; Wonfor, Adrian; Seeds, Alwyn J; Renaud, Cyril C

2017-07-24

This paper describes the first foundry-based InP photonic integrated circuit (PIC) designed to work within a heterodyne optical phase locked loop (OPLL). The PIC and an external electronic circuit were used to phase-lock a single-line semiconductor laser diode to an incoming reference laser, with tuneable frequency offset from 4 GHz to 12 GHz. The PIC contains 33 active and passive components monolithically integrated on a single chip, fully demonstrating the capability of a generic foundry PIC fabrication model. The electronic part of the OPLL consists of commercially available RF components. This semi-packaged system stabilizes the phase and frequency of the integrated laser so that an absolute frequency, high-purity heterodyne signal can be generated when the OPLL is in operation, with phase noise lower than -100 dBc/Hz at 10 kHz offset from the carrier. This is the lowest phase noise level ever demonstrated by monolithically integrated OPLLs.

An investigation of nonuniform dose deposition from an electron beam

NASA Astrophysics Data System (ADS)

Lilley, William; Luu, Kieu X.

1994-08-01

In a search for an explanation of nonuniform electron-beam dose deposition, the integrated tiger series (ITS) of coupled electron/photon Monte Carlo transport codes was used to calculate energy deposition in the package materials of an application-specific integrated circuit (ASIC) while the thicknesses of some of the materials were varied. The thicknesses of three materials that were in the path of an electron-beam pulse were varied independently so that analysis could determine how the radiation dose measurements using thermoluminescent dosimeters (TLD's) would be affected. The three materials were chosen because they could vary during insertion of the die into the package or during the process of taking dose measurements. The materials were aluminum, HIPEC (a plastic), and silver epoxy. The calculations showed that with very small variations in thickness, the silver epoxy had a large effect on the dose uniformity over the area of the die.

Packaging Of Control Circuits In A Robot Arm

NASA Technical Reports Server (NTRS)

Kast, William

1994-01-01

Packaging system houses and connects control circuitry mounted on circuit boards within shoulder, upper section, and lower section of seven-degree-of-freedom robot arm. Has modular design that incorporates surface-mount technology, multilayer circuit boards, large-scale integrated circuits, and multi-layer flat cables between sections for compactness. Three sections of robot arm contain circuit modules in form of stardardized circuit boards. Each module contains two printed-circuit cards, one of each face.

Small Cold Temperature Instrument Packages

NASA Astrophysics Data System (ADS)

Clark, P. E.; Millar, P. S.; Yeh, P. S.; Feng, S.; Brigham, D.; Beaman, B.

We are developing a small cold temperature instrument package concept that integrates a cold temperature power system with ultra low temperature ultra low power electronics components and power supplies now under development into a 'cold temperature surface operational' version of a planetary surface instrument package. We are already in the process of developing a lower power lower temperature version for an instrument of mutual interest to SMD and ESMD to support the search for volatiles (the mass spectrometer VAPoR, Volatile Analysis by Pyrolysis of Regolith) both as a stand alone instrument and as part of an environmental monitoring package. We build on our previous work to develop strategies for incorporating Ultra Low Temperature/Ultra Low Power (ULT/ULP) electronics, lower voltage power supplies, as well as innovative thermal design concepts for instrument packages. Cryotesting has indicated that our small Si RHBD CMOS chips can deliver >80% of room temperature performance at 40K (nominal minimum lunar surface temperature). We leverage collaborations, past and current, with the JPL battery development program to increase power system efficiency in extreme environments. We harness advances in MOSFET technology that provide lower voltage thresholds for power switching circuits incorporated into our low voltage power supply concept. Conventional power conversion has a lower efficiency. Our low power circuit concept based on 'synchronous rectification' could produce stable voltages as low as 0.6 V with 85% efficiency. Our distributed micro-battery-based power supply concept incorporates cold temperature power supplies operating with a 4 V or 8 V battery. This work will allow us to provide guidelines for applying the low temperature, low power system approaches generically to the widest range of surface instruments.

Electronic Model of a Ferroelectric Field Effect Transistor

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Ho, Fat Duen; Russell, Larry (Technical Monitor)

2001-01-01

A pair of electronic models has been developed of a Ferroelectric Field Effect transistor. These models can be used in standard electrical circuit simulation programs to simulate the main characteristics of the FFET. The models use the Schmitt trigger circuit as a basis for their design. One model uses bipolar junction transistors and one uses MOSFET's. Each model has the main characteristics of the FFET, which are the current hysterisis with different gate voltages and decay of the drain current when the gate voltage is off. The drain current from each model has similar values to an actual FFET that was measured experimentally. T'he input and o Output resistance in the models are also similar to that of the FFET. The models are valid for all frequencies below RF levels. No attempt was made to model the high frequency characteristics of the FFET. Each model can be used to design circuits using FFET's with standard electrical simulation packages. These circuits can be used in designing non-volatile memory circuits and logic circuits and is compatible with all SPICE based circuit analysis programs. The models consist of only standard electrical components, such as BJT's, MOSFET's, diodes, resistors, and capacitors. Each model is compared to the experimental data measured from an actual FFET.

4H-SiC JFET Multilayer Integrated Circuit Technologies Tested Up to 1000 K

NASA Technical Reports Server (NTRS)

Spry, D. J.; Neudeck, P. G.; Chen, L.; Chang, C. W.; Lukco, D.; Beheim, G. M.

2015-01-01

Testing of semiconductor electronics at temperatures above their designed operating envelope is recognized as vital to qualification and lifetime prediction of circuits. This work describes the high temperature electrical testing of prototype 4H silicon carbide (SiC) junction field effect transistor (JFET) integrated circuits (ICs) technology implemented with multilayer interconnects; these ICs are intended for prolonged operation at temperatures up to 773K (500 C). A 50 mm diameter sapphire wafer was used in place of the standard NASA packaging for this experiment. Testing was carried out between 300K (27 C) and 1150K (877 C) with successful electrical operation of all devices observed up to 1000K (727 C).

Results on 3D interconnection from AIDA WP3

NASA Astrophysics Data System (ADS)

Moser, Hans-Günther; AIDA-WP3

2016-09-01

From 2010 to 2014 the EU funded AIDA project established in one of its work packages (WP3) a network of groups working collaboratively on advanced 3D integration of electronic circuits and semiconductor sensors for applications in particle physics. The main motivation came from the severe requirements on pixel detectors for tracking and vertexing at future Particle Physics experiments at LHC, super-B factories and linear colliders. To go beyond the state-of-the-art, the main issues were studying low mass, high bandwidth applications, with radiation hardness capabilities, with low power consumption, offering complex functionality, with small pixel size and without dead regions. The interfaces and interconnects of sensors to electronic readout integrated circuits are a key challenge for new detector applications.

Packaging strategy for maximizing the performance of a screen printed piezoelectric energy harvester

NASA Astrophysics Data System (ADS)

Zhang, Z.; Zhu, D.; Tudor, M. J.; Beeby, S. P.

2013-12-01

This paper reports the extended design and simulation of a screen printed piezoelectric energy harvester. The proposed design was based on a previous credit card sized smart tag sensor node, and packages the power conditioning circuit in the free space above the tungsten proof mass layer. This approach enables electronic components to be mounted onto the cantilever beam, which provides additional weight at the tip of the cantilever structure. The design structure contains a T-shape cantilever beam with size of 47 mm × 30 mm × 0.85 mm which is fabricated using screen printing. ANSYS simulation results predict the revised architecture can generate 421.9 μW approximately twice of the RMS power produced by the original design along with a higher open-circuit RMS Voltage of 8.0 V while the resonant frequency is dropped to 53.4 Hz.

Packaging strategies for printed circuit board components. Volume I, materials & thermal stresses.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Neilsen, Michael K.; Austin, Kevin N.; Adolf, Douglas Brian

2011-09-01

Decisions on material selections for electronics packaging can be quite complicated by the need to balance the criteria to withstand severe impacts yet survive deep thermal cycles intact. Many times, material choices are based on historical precedence perhaps ignorant of whether those initial choices were carefully investigated or whether the requirements on the new component match those of previous units. The goal of this program focuses on developing both increased intuition for generic packaging guidelines and computational methodologies for optimizing packaging in specific components. Initial efforts centered on characterization of classes of materials common to packaging strategies and computational analysesmore » of stresses generated during thermal cycling to identify strengths and weaknesses of various material choices. Future studies will analyze the same example problems incorporating the effects of curing stresses as needed and analyzing dynamic loadings to compare trends with the quasi-static conclusions.« less

Integration and test of high-speed transmitter electronics for free-space laser communications

NASA Technical Reports Server (NTRS)

Soni, Nitin J.; Lizanich, Paul J.

1994-01-01

The NASA Lewis Research Center in Cleveland, Ohio, has developed the electronics for a free-space, direct-detection laser communications system demonstration. Under the High-Speed Laser Integrated Terminal Electronics (Hi-LITE) Project, NASA Lewis has built a prototype full-duplex, dual-channel electronics transmitter and receiver operating at 325 megabit S per second (Mbps) per channel and using quaternary pulse-position modulation (QPPM). This paper describes the integration and testing of the transmitter portion for future application in free-space, direct-detection laser communications. A companion paper reviews the receiver portion of the prototype electronics. Minor modifications to the transmitter were made since the initial report on the entire system, and this paper addresses them. The digital electronics are implemented in gallium arsenide integrated circuits mounted on prototype boards. The fabrication and implementation issues related to these high-speed devices are discussed. The transmitter's test results are documented, and its functionality is verified by exercising all modes of operation. Various testing issues pertaining to high-speed circuits are addressed. A description of the transmitter electronics packaging concludes the paper.

CarbAl Heat Transfer Material

NASA Technical Reports Server (NTRS)

Fink, Richard

2015-01-01

The increasing use of power electronics, such as high-current semiconductor devices and modules, within space vehicles is driving the need to develop specialty thermal management materials in both the packaging of these discrete devices and the packaging of modules consisting of these device arrays. Developed by Applied Nanotech, Inc. (ANI), CarbAl heat transfer material is uniquely characterized by its low density, high thermal diffusivity, and high thermal conductivity. Its coefficient of thermal expansion (CTE) is similar to most power electronic materials, making it an effective base plate substrate for state-of-the-art silicon carbide (SiC) super junction transistors. The material currently is being used to optimize hybrid vehicle inverter packaging. Adapting CarbAl-based substrates to space applications was a major focus of the SBIR project work. In Phase I, ANI completed modeling and experimentation to validate its deployment in a space environment. Key parameters related to cryogenic temperature scaling of CTE, thermal conductivity, and mechanical strength. In Phase II, the company concentrated on improving heat sinks and thermally conductive circuit boards for power electronic applications.

Electrical Performance of a High Temperature 32-I/O HTCC Alumina Package

NASA Technical Reports Server (NTRS)

Chen, Liang-Yu; Neudeck, Philip G.; Spry, David J.; Beheim, Glenn M.; Hunter, Gary W.

2016-01-01

A high temperature co-fired ceramic (HTCC) alumina material was previously electrically tested at temperatures up to 550 C, and demonstrated improved dielectric performance at high temperatures compared with the 96% alumina substrate that we used before, suggesting its potential use for high temperature packaging applications. This paper introduces a prototype 32-I/O (input/output) HTCC alumina package with platinum conductor for 500 C low-power silicon carbide (SiC) integrated circuits. The design and electrical performance of this package including parasitic capacitance and parallel conductance of neighboring I/Os from 100 Hz to 1 MHz in a temperature range from room temperature to 550 C are discussed in detail. The parasitic capacitance and parallel conductance of this package in the entire frequency and temperature ranges measured does not exceed 1.5 pF and 0.05 microsiemens, respectively. SiC integrated circuits using this package and compatible printed circuit board have been successfully tested at 500 C for over 3736 hours continuously, and at 700 C for over 140 hours. Some test examples of SiC integrated circuits with this packaging system are presented. This package is the key to prolonged T greater than or equal to 500 C operational testing of the new generation of SiC high temperature integrated circuits and other devices currently under development at NASA Glenn Research Center.

High-performance packaging for monolithic microwave and millimeter-wave integrated circuits

NASA Technical Reports Server (NTRS)

Shalkhauser, K. A.; Li, K.; Shih, Y. C.

1992-01-01

Packaging schemes are developed that provide low-loss, hermetic enclosure for enhanced monolithic microwave and millimeter-wave integrated circuits. These package schemes are based on a fused quartz substrate material offering improved RF performance through 44 GHz. The small size and weight of the packages make them useful for a number of applications, including phased array antenna systems. As part of the packaging effort, a test fixture was developed to interface the single chip packages to conventional laboratory instrumentation for characterization of the packaged devices.

Final Technical Report - 300°C Capable Electronics Platform and Temperature Sensor System For Enhanced Geothermal Systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chen, Cheng-Po; Shaddock, David; Sandvik, Peter

2012-11-30

A silicon carbide (SiC) based electronic temperature sensor prototype has been demonstrated to operate at 300°C. We showed continuous operation of 1,000 hours with SiC operational amplifier and surface mounted discreet resistors and capacitors on a ceramic circuit board. This feasibility demonstration is a major milestone in the development of high temperature electronics in general and high temperature geothermal exploration and well management tools in particular. SiC technology offers technical advantages that are not found in competing technologies such as silicon-on-insulator (SOI) at high temperatures of 200°C to 300°C and beyond. The SiC integrated circuits and packaging methods can bemore » used in new product introduction by GE Oil and Gas for high temperature down-hole tools. The existing SiC fabrication facility at GE is sufficient to support the quantities currently demanded by the marketplace, and there are other entities in the United States and other countries capable of ramping up SiC technology manufacturing. The ceramic circuit boards are different from traditional organic-based electronics circuit boards, but the fabrication process is compatible with existing ceramic substrate manufacturing. This project has brought high temperature electronics forward, and brings us closer to commercializing tools that will enable and reduce the cost of enhanced geothermal technology to benefit the public in terms of providing clean renewable energy at lower costs.« less

Biocompatible circuit-breaker chip for thermal management of biomedical microsystems

NASA Astrophysics Data System (ADS)

Luo, Yi; Dahmardeh, Masoud; Takahata, Kenichi

2015-05-01

This paper presents a thermoresponsive micro circuit breaker for biomedical applications specifically targeted at electronic intelligent implants. The circuit breaker is micromachined to have a shape-memory-alloy cantilever actuator as a normally closed temperature-sensitive switch to protect the device of interest from overheating, a critical safety feature for smart implants including those that are electrothermally driven with wireless micro heaters. The device is fabricated in a size of 1.5  ×  2.0  ×  0.46 mm3 using biocompatible materials and a chip-based titanium package, exhibiting a nominal cold-state resistance of 14 Ω. The breaker rapidly enters the full open condition when the chip temperature exceeds 63 °C, temporarily breaking the circuit of interest to lower its temperature until chip temperature drops to 51 °C, at which the breaker closes the circuit to allow current to flow through it again, physically limiting the maximum temperature of the circuit. This functionality is tested in combination with a wireless resonant heater powered by radio-frequency electromagnetic radiation, demonstrating self-regulation of heater temperature. The developed circuit-breaker chip operates in a fully passive manner that removes the need for active sensor and circuitry to achieve temperature regulation in a target device, contributing to the miniaturization of biomedical microsystems including electronic smart implants where thermal management is essential.

Waste Minimization in Circuit Board Manufacturing by PARMOD(TM) Technology

DTIC Science & Technology

1998-06-24

a foil package in air or in a plastic syringe. Thermogravimetric Analysis (TGA) Ink samples were evaluated using thermogravimetric analysis in...DTA Differential Thermal Analysis FEP Fluorinated Ethylene Propylene (Teflon®) FTIR Fourier Transform Infrared spectroscopy MOD Metallo-Organic...Decomposition ROM Reactive Organic Medium SEM Scanning Electron Microscopy TGA Thermal Gravimetry Analysis Torr Unit of pressure (one mm mercury

Radio controlled release apparatus for animal data acquisition devices

DOEpatents

Stamps, James Frederick

2000-01-01

A novel apparatus for reliably and selectively releasing a data acquisition package from an animal for recovery. The data package comprises two parts: 1) an animal data acquisition device and 2) a co-located release apparatus. One embodiment, which is useful for land animals, the release apparatus includes two major components: 1) an electronics package, comprising a receiver; a decoder comparator, having at plurality of individually selectable codes; and an actuator circuit and 2) a release device, which can be a mechanical device, which acts to release the data package from the animal. To release a data package from a particular animal, a radio transmitter sends a coded signal which is decoded to determine if the code is valid for that animal data package. Having received a valid code, the release device is activated to release the data package from the animal for subsequent recovery. A second embodiment includes floatation means and is useful for releasing animal data acquisition devices attached to sea animals. This embodiment further provides for releasing a data package underwater by employing an acoustic signal.

A Q-band low noise GaAs pHEMT MMIC power amplifier for pulse electron spin resonance spectrometer

NASA Astrophysics Data System (ADS)

Sitnikov, A.; Kalabukhova, E.; Oliynyk, V.; Kolisnichenko, M.

2017-05-01

We present the design and development of a single stage pulse power amplifier working in the frequency range 32-38 GHz based on a monolithic microwave integrated circuit (MMIC). We have designed the MMIC power amplifier by using the commercially available packaged GaAs pseudomorphic high electron mobility transistor. The circuit fabrication and assembly process includes the elaboration of the matching networks for the MMIC power amplifier and their assembling as well as the topology outline and fabrication of the printed circuit board of the waveguide-microstrip line transitions. At room ambient temperature, the measured peak output power from the prototype amplifier is 35.5 dBm for 16.6 dBm input driving power, corresponding to 19 dB gain. The measured rise/fall time of the output microwave signal modulated by a high-speed PIN diode was obtained as 5-6 ns at 20-250 ns pulse width with 100 kHz pulse repetition rate frequency.

A Q-band low noise GaAs pHEMT MMIC power amplifier for pulse electron spin resonance spectrometer.

PubMed

Sitnikov, A; Kalabukhova, E; Oliynyk, V; Kolisnichenko, M

2017-05-01

We present the design and development of a single stage pulse power amplifier working in the frequency range 32-38 GHz based on a monolithic microwave integrated circuit (MMIC). We have designed the MMIC power amplifier by using the commercially available packaged GaAs pseudomorphic high electron mobility transistor. The circuit fabrication and assembly process includes the elaboration of the matching networks for the MMIC power amplifier and their assembling as well as the topology outline and fabrication of the printed circuit board of the waveguide-microstrip line transitions. At room ambient temperature, the measured peak output power from the prototype amplifier is 35.5 dBm for 16.6 dBm input driving power, corresponding to 19 dB gain. The measured rise/fall time of the output microwave signal modulated by a high-speed PIN diode was obtained as 5-6 ns at 20-250 ns pulse width with 100 kHz pulse repetition rate frequency.

Plastic-Sealed Hybrid Power Circuit Package

NASA Technical Reports Server (NTRS)

Miller, W. N.; Gray, O. E.

1983-01-01

Proposed design for hybrid high-voltage power-circuit package uses molded plastic for hermetic sealing instead of glass-to-metal seal. New package used to house high-voltage regulators and solid-state switches for applications in aircraft, electric automobiles, industrial equipment, satellites, solarcell arrays, and other equipment in extreme environments.

Methods of fabricating applique circuits

DOEpatents

Dimos, Duane B.; Garino, Terry J.

1999-09-14

Applique circuits suitable for advanced packaging applications are introduced. These structures are particularly suited for the simple integration of large amounts (many nanoFarads) of capacitance into conventional integrated circuit and multichip packaging technology. In operation, applique circuits are bonded to the integrated circuit or other appropriate structure at the point where the capacitance is required, thereby minimizing the effects of parasitic coupling. An immediate application is to problems of noise reduction and control in modern high-frequency circuitry.

Neural Implants, Packaging for Biocompatible Implants, and Improving Fabricated Capacitors

NASA Astrophysics Data System (ADS)

Agger, Elizabeth Rose

We have completed the circuit design and packaging procedure for an NIH-funded neural implant, called a MOTE (Microscale Optoelectronically Transduced Electrode). Neural recording implants for mice have greatly advanced neuroscience, but they are often damaging and limited in their recording location. This project will result in free-floating implants that cause less damage, provide rapid electronic recording, and increase range of recording across the cortex. A low-power silicon IC containing amplification and digitization sub-circuits is powered by a dual-function gallium arsenide photovoltaic and LED. Through thin film deposition, photolithography, and chemical and physical etching, the Molnar Group and the McEuen Group (Applied and Engineering Physics department) will package the IC and LED into a biocompatible implant approximately 100microm3. The IC and LED are complete and we have begun refining this packaging procedure in the Cornell NanoScale Science & Technology Facility. ICs with 3D time-resolved imaging capabilities can image microorganisms and other biological samples given proper packaging. A portable, flat, easily manufactured package would enable scientists to place biological samples on slides directly above the Molnar group's imaging chip. We have developed a packaging procedure using laser cutting, photolithography, epoxies, and metal deposition. Using a flip-chip method, we verified the process by aligning and adhering a sample chip to a holder wafer. In the CNF, we have worked on a long-term metal-insulator-metal (MIM) capacitor characterization project. Former Fellow and continuing CNF user Kwame Amponsah developed the original procedure for the capacitor fabrication, and another former fellow, Jonilyn Longenecker, revised the procedure and began the arduous process of characterization. MIM caps are useful to clean room users as testing devices to verify electronic characteristics of their active circuitry. This project's objective is to determine differences in current-voltage (IV) and capacitor-voltage (CV) relationships across variations in capacitor size and dielectric type. This effort requires an approximately 20-step process repeated for two-to-six varieties (dependent on temperature and thermal versus plasma options) of the following dielectrics: HfO2, SiO2, Al2O3, TaOx, and TiO2.

Monolithic microwave integrated circuits: Interconnections and packaging considerations

NASA Astrophysics Data System (ADS)

Bhasin, K. B.; Downey, A. N.; Ponchak, G. E.; Romanofsky, R. R.; Anzic, G.; Connolly, D. J.

Monolithic microwave integrated circuits (MMIC's) above 18 GHz were developed because of important potential system benefits in cost reliability, reproducibility, and control of circuit parameters. The importance of interconnection and packaging techniques that do not compromise these MMIC virtues is emphasized. Currently available microwave transmission media are evaluated to determine their suitability for MMIC interconnections. An antipodal finline type of microstrip waveguide transition's performance is presented. Packaging requirements for MMIC's are discussed for thermal, mechanical, and electrical parameters for optimum desired performance.

Monolithic microwave integrated circuits: Interconnections and packaging considerations

NASA Technical Reports Server (NTRS)

Bhasin, K. B.; Downey, A. N.; Ponchak, G. E.; Romanofsky, R. R.; Anzic, G.; Connolly, D. J.

1984-01-01

Monolithic microwave integrated circuits (MMIC's) above 18 GHz were developed because of important potential system benefits in cost reliability, reproducibility, and control of circuit parameters. The importance of interconnection and packaging techniques that do not compromise these MMIC virtues is emphasized. Currently available microwave transmission media are evaluated to determine their suitability for MMIC interconnections. An antipodal finline type of microstrip waveguide transition's performance is presented. Packaging requirements for MMIC's are discussed for thermal, mechanical, and electrical parameters for optimum desired performance.

More Efficient Power Conversion for EVs: Gallium-Nitride Advanced Power Semiconductor and Packaging

DOE Office of Scientific and Technical Information (OSTI.GOV)

None

2010-02-01

Broad Funding Opportunity Announcement Project: Delphi is developing power converters that are smaller and more energy efficient, reliable, and cost-effective than current power converters. Power converters rely on power transistors which act like a very precisely controlled on-off switch, controlling the electrical energy flowing through an electrical circuit. Most power transistors today use silicon (Si) semiconductors. However, Delphi is using semiconductors made with a thin layer of gallium-nitride (GaN) applied on top of the more conventional Si material. The GaN layer increases the energy efficiency of the power transistor and also enables the transistor to operate at much higher temperatures,more » voltages, and power-density levels compared to its Si counterpart. Delphi is packaging these high-performance GaN semiconductors with advanced electrical connections and a cooling system that extracts waste heat from both sides of the device to further increase the device’s efficiency and allow more electrical current to flow through it. When combined with other electronic components on a circuit board, Delphi’s GaN power transistor package will help improve the overall performance and cost-effectiveness of HEVs and EVs.« less

Design, Fabrication, and Characterization of Carbon Nanotube Field Emission Devices for Advanced Applications

NASA Astrophysics Data System (ADS)

Radauscher, Erich Justin

Carbon nanotubes (CNTs) have recently emerged as promising candidates for electron field emission (FE) cathodes in integrated FE devices. These nanostructured carbon materials possess exceptional properties and their synthesis can be thoroughly controlled. Their integration into advanced electronic devices, including not only FE cathodes, but sensors, energy storage devices, and circuit components, has seen rapid growth in recent years. The results of the studies presented here demonstrate that the CNT field emitter is an excellent candidate for next generation vacuum microelectronics and related electron emission devices in several advanced applications. The work presented in this study addresses determining factors that currently confine the performance and application of CNT-FE devices. Characterization studies and improvements to the FE properties of CNTs, along with Micro-Electro-Mechanical Systems (MEMS) design and fabrication, were utilized in achieving these goals. Important performance limiting parameters, including emitter lifetime and failure from poor substrate adhesion, are examined. The compatibility and integration of CNT emitters with the governing MEMS substrate (i.e., polycrystalline silicon), and its impact on these performance limiting parameters, are reported. CNT growth mechanisms and kinetics were investigated and compared to silicon (100) to improve the design of CNT emitter integrated MEMS based electronic devices, specifically in vacuum microelectronic device (VMD) applications. Improved growth allowed for design and development of novel cold-cathode FE devices utilizing CNT field emitters. A chemical ionization (CI) source based on a CNT-FE electron source was developed and evaluated in a commercial desktop mass spectrometer for explosives trace detection. This work demonstrated the first reported use of a CNT-based ion source capable of collecting CI mass spectra. The CNT-FE source demonstrated low power requirements, pulsing capabilities, and average lifetimes of over 320 hours when operated in constant emission mode under elevated pressures, without sacrificing performance. Additionally, a novel packaged ion source for miniature mass spectrometer applications using CNT emitters, a MEMS based Nier-type geometry, and a Low Temperature Cofired Ceramic (LTCC) 3D scaffold with integrated ion optics were developed and characterized. While previous research has shown other devices capable of collecting ion currents on chip, this LTCC packaged MEMS micro-ion source demonstrated improvements in energy and angular dispersion as well as the ability to direct the ions out of the packaged source and towards a mass analyzer. Simulations and experimental design, fabrication, and characterization were used to make these improvements. Finally, novel CNT-FE devices were developed to investigate their potential to perform as active circuit elements in VMD circuits. Difficulty integrating devices at micron-scales has hindered the use of vacuum electronic devices in integrated circuits, despite the unique advantages they offer in select applications. Using a combination of particle trajectory simulation and experimental characterization, device performance in an integrated platform was investigated. Solutions to the difficulties in operating multiple devices in close proximity and enhancing electron transmission (i.e., reducing grid loss) are explored in detail. A systematic and iterative process was used to develop isolation structures that reduced crosstalk between neighboring devices from 15% on average, to nearly zero. Innovative geometries and a new operational mode reduced grid loss by nearly threefold, thereby improving transmission of the emitted cathode current to the anode from 25% in initial designs to 70% on average. These performance enhancements are important enablers for larger scale integration and for the realization of complex vacuum microelectronic circuits.

Fabric-based active electrode design and fabrication for health monitoring clothing.

PubMed

Merritt, Carey R; Nagle, H Troy; Grant, Edward

2009-03-01

In this paper, two versions of fabric-based active electrodes are presented to provide a wearable solution for ECG monitoring clothing. The first version of active electrode involved direct attachment of surface-mountable components to a textile screen-printed circuit using polymer thick film techniques. The second version involved attaching a much smaller, thinner, and less obtrusive interposer containing the active electrode circuitry to a simplified textile circuit. These designs explored techniques for electronic textile interconnection, chip attachment to textiles, and packaging of circuits on textiles for durability. The results from ECG tests indicate that the performance of each active electrode is comparable to commercial Ag/AgCl electrodes. The interposer-based active electrodes survived a five-cycle washing test while maintaining good signal integrity.

A programmable CCD driver circuit for multiphase CCD operation

NASA Technical Reports Server (NTRS)

Ewin, Audrey J.; Reed, Kenneth V.

1989-01-01

A programmable CCD (charge-coupled device) driver circuit was designed to drive CCDs in multiphased modes. The purpose of the drive electronics is to operate developmental CCD imaging arrays for NASA's tiltable moderate resolution imaging spectrometer (MODIS-T). Five objectives for the driver were considered during its design: (1) the circuit drives CCD electrode voltages between 0 V and +30 V to produce reasonable potential wells, (2) the driving sequence is started with one input signal, (3) the driving sequence is started with one input signal, (4) the circuit allows programming of frame sequences required by arrays of any size, (5) it produces interfacing signals for the CCD and the DTF (detector test facility). Simulation of the driver verified its function with the master clock running up to 10 MHz. This suggests a maximum rate of 400,000 pixels/s. Timing and packaging parameters were verified. The design uses 54 TTL (transistor-transistor logic) chips. Two versions of hardware were fabricated: wirewrap and printed circuit board. Both were verified functionally with a logic analyzer.

Stirling Cooler Designed for Venus Exploration

NASA Technical Reports Server (NTRS)

Landis, Geoffrey A.; Mellott, Kenneth D.

2004-01-01

Venus having an average surface temperature of 460 degrees Celsius (about 860 degrees Fahrenheit) and an atmosphere 150 times denser than the Earth's atmosphere, designing a robot to merely survive on the surface to do planetary exploration is an extremely difficult task. This temperature is hundreds of degrees higher than the maximum operating temperature of currently existing microcontrollers, electronic devices, and circuit boards. To meet the challenge of Venus exploration, researchers at the NASA Glenn Research Center studied methods to keep a pressurized electronics package cooled, so that the operating temperature within the electronics enclosure would be cool enough for electronics to run, to allow a mission to operate on the surface of Venus for extended periods.

Standard high-reliability integrated circuit logic packaging. [for deep space tracking stations

NASA Technical Reports Server (NTRS)

Slaughter, D. W.

1977-01-01

A family of standard, high-reliability hardware used for packaging digital integrated circuits is described. The design transition from early prototypes to production hardware is covered and future plans are discussed. Interconnections techniques are described as well as connectors and related hardware available at both the microcircuit packaging and main-frame level. General applications information is also provided.

Integrated LTCC pressure/flow/temperature multisensor for compressed air diagnostics.

PubMed

Fournier, Yannick; Maeder, Thomas; Boutinard-Rouelle, Grégoire; Barras, Aurélie; Craquelin, Nicolas; Ryser, Peter

2010-01-01

We present a multisensor designed for industrial compressed air diagnostics and combining the measurement of pressure, flow, and temperature, integrated with the corresponding signal conditioning electronics in a single low-temperature co-fired ceramic (LTCC) package. The developed sensor may be soldered onto an integrated electro-fluidic platform by using standard surface mount device (SMD) technology, e.g., as a standard electronic component would be on a printed circuit board, obviating the need for both wires and tubes and thus paving the road towards low-cost integrated electro-fluidic systems. Several performance aspects of this device are presented and discussed, together with electronics design issues.

Integrated LTCC Pressure/Flow/Temperature Multisensor for Compressed Air Diagnostics†

PubMed Central

Fournier, Yannick; Maeder, Thomas; Boutinard-Rouelle, Grégoire; Barras, Aurélie; Craquelin, Nicolas; Ryser, Peter

2010-01-01

We present a multisensor designed for industrial compressed air diagnostics and combining the measurement of pressure, flow, and temperature, integrated with the corresponding signal conditioning electronics in a single low-temperature co-fired ceramic (LTCC) package. The developed sensor may be soldered onto an integrated electro-fluidic platform by using standard surface mount device (SMD) technology, e.g., as a standard electronic component would be on a printed circuit board, obviating the need for both wires and tubes and thus paving the road towards low-cost integrated electro-fluidic systems. Several performance aspects of this device are presented and discussed, together with electronics design issues. PMID:22163518

Package Holds Five Monolithic Microwave Integrated Circuits

NASA Technical Reports Server (NTRS)

Mysoor, Narayan R.; Decker, D. Richard; Olson, Hilding M.

1996-01-01

Packages protect and hold monolithic microwave integrated circuit (MMIC) chips while providing dc and radio-frequency (RF) electrical connections for chips undergoing development. Required to be compact, lightweight, and rugged. Designed to minimize undesired resonances, reflections, losses, and impedance mismatches.

Design of high precision temperature control system for TO packaged LD

NASA Astrophysics Data System (ADS)

Liang, Enji; Luo, Baoke; Zhuang, Bin; He, Zhengquan

2017-10-01

Temperature is an important factor affecting the performance of TO package LD. In order to ensure the safe and stable operation of LD, a temperature control circuit for LD based on PID technology is designed. The MAX1978 and an external PID circuit are used to form a control circuit that drives the thermoelectric cooler (TEC) to achieve control of temperature and the external load can be changed. The system circuit has low power consumption, high integration and high precision,and the circuit can achieve precise control of the LD temperature. Experiment results show that the circuit can achieve effective and stable control of the laser temperature.

Critical Review of Commercial Secondary Lithium-Ion Battery Safety Standards

NASA Astrophysics Data System (ADS)

Jones, Harry P.; Chapin, Thomas, J.; Tabaddor, Mahmod

2010-09-01

The development of Li-ion cells with greater energy density has lead to safety concerns that must be carefully assessed as Li-ion cells power a wide range of products from consumer electronics to electric vehicles to space applications. Documented field failures and product recalls for Li-ion cells, mostly for consumer electronic products, highlight the risk of fire, smoke, and even explosion. These failures have been attributed to the occurrence of internal short circuits and the subsequent thermal runaway that can lead to fire and explosion. As packaging for some applications include a large number of cells, the risk of failure is likely to be magnified. To address concerns about the safety of battery powered products, safety standards have been developed. This paper provides a review of various international safety standards specific to lithium-ion cells. This paper shows that though the standards are harmonized on a host of abuse conditions, most lack a test simulating internal short circuits. This paper describes some efforts to introduce internal short circuit tests into safety standards.

Miniature Radioisotope Thermoelectric Power Cubes

NASA Technical Reports Server (NTRS)

Patel, Jagdish U.; Fleurial, Jean-Pierre; Snyder, G. Jeffrey; Caillat, Thierry

2004-01-01

Cube-shaped thermoelectric devices energized by a particles from radioactive decay of Cm-244 have been proposed as long-lived sources of power. These power cubes are intended especially for incorporation into electronic circuits that must operate in dark, extremely cold locations (e.g., polar locations or deep underwater on Earth, or in deep interplanetary space). Unlike conventional radioisotope thermoelectric generators used heretofore as central power sources in some spacecraft, the proposed power cubes would be small enough (volumes would range between 0.1 and 0.2 cm3) to play the roles of batteries that are parts of, and dedicated to, individual electronic-circuit packages. Unlike electrochemical batteries, these power cubes would perform well at low temperatures. They would also last much longer: given that the half-life of Cm-244 is 18 years, a power cube could remain adequate as a power source for years, depending on the power demand in its particular application.

Flexible Packaging by Film-Assisted Molding for Microintegration of Inertia Sensors

PubMed Central

Hera, Daniel; Berndt, Armin; Günther, Thomas; Schmiel, Stephan; Harendt, Christine; Zimmermann, André

2017-01-01

Packaging represents an important part in the microintegration of sensors based on microelectromechanical system (MEMS). Besides miniaturization and integration density, functionality and reliability in combination with flexibility in packaging design at moderate costs and consequently high-mix, low-volume production are the main requirements for future solutions in packaging. This study investigates possibilities employing printed circuit board (PCB-)based assemblies to provide high flexibility for circuit designs together with film-assisted transfer molding (FAM) to package sensors. The feasibility of FAM in combination with PCB and MEMS as a packaging technology for highly sensitive inertia sensors is being demonstrated. The results prove the technology to be a viable method for damage-free packaging of stress- and pressure-sensitive MEMS. PMID:28653992

Retractable pin dual in-line package test clip

DOEpatents

Bandzuch, Gregory S.; Kosslow, William J.

1996-01-01

This invention is a Dual In-Line Package (DIP) test clip for use when troubleshooting circuits containing DIP integrated circuits. This test clip is a significant improvement over existing DIP test clips in that it has retractable pins which will permit troubleshooting without risk of accidentally shorting adjacent pins together when moving probes to different pins on energized circuits or when the probe is accidentally bumped while taking measurements.

A family of neuromuscular stimulators with optical transcutaneous control.

PubMed

Jarvis, J C; Salmons, S

1991-01-01

A family of miniature implantable neuromuscular stimulators has been developed using surface-mounted Philips 4000-series integrated circuits. The electronic components are mounted by hand on printed circuits (platinum/gold on alumina) and the electrical connections are made by reflow soldering. The plastic integrated-circuit packages, ceramic resistors and metal interconnections are protected from the body fluids by a coating of biocompatible silicone rubber. This simple technology provides reliable function for at least 4 months under implanted conditions. The circuits have in common a single lithium cell power-supply (3.2 V) and an optical sensor which can be used to detect light flashes through the skin after the device has been implanted. This information channel may be used to switch the output of a device on or off, or to cycle through a series of pre-set programs. The devices are currently finding application in studies which provide an experimental basis for the clinical exploitation of electrically stimulated skeletal muscle in cardiac assistance, sphincter reconstruction or functional electrical stimulation of paralysed limbs.

Bias Stress and Temperature Impact on InGaZnO TFTs and Circuits

PubMed Central

Martins, Jorge; Bahubalindruni, Pydi; Rovisco, Ana; Kiazadeh, Asal; Martins, Rodrigo; Fortunato, Elvira; Barquinha, Pedro

2017-01-01

This paper focuses on the analysis of InGaZnO thin-film transistors (TFTs) and circuits under the influence of different temperatures and bias stress, shedding light into their robustness when used in real-world applications. For temperature-dependent measurements, a temperature range of 15 to 85 °C was considered. In case of bias stress, both gate and drain bias were applied for 60 min. Though isolated transistors show a variation of drain current as high as 56% and 172% during bias voltage and temperature stress, the employed circuits were able to counteract it. Inverters and two-TFT current mirrors following simple circuit topologies showed a gain variation below 8%, while the improved robustness of a cascode current mirror design is proven by showing a gain variation less than 5%. The demonstration that the proper selection of TFT materials and circuit topologies results in robust operation of oxide electronics under different stress conditions and over a reasonable range of temperatures proves that the technology is suitable for applications such as smart food packaging and wearables. PMID:28773037

Bias Stress and Temperature Impact on InGaZnO TFTs and Circuits.

PubMed

Martins, Jorge; Bahubalindruni, Pydi; Rovisco, Ana; Kiazadeh, Asal; Martins, Rodrigo; Fortunato, Elvira; Barquinha, Pedro

2017-06-21

This paper focuses on the analysis of InGaZnO thin-film transistors (TFTs) and circuits under the influence of different temperatures and bias stress, shedding light into their robustness when used in real-world applications. For temperature-dependent measurements, a temperature range of 15 to 85 °C was considered. In case of bias stress, both gate and drain bias were applied for 60 min. Though isolated transistors show a variation of drain current as high as 56% and 172% during bias voltage and temperature stress, the employed circuits were able to counteract it. Inverters and two-TFT current mirrors following simple circuit topologies showed a gain variation below 8%, while the improved robustness of a cascode current mirror design is proven by showing a gain variation less than 5%. The demonstration that the proper selection of TFT materials and circuit topologies results in robust operation of oxide electronics under different stress conditions and over a reasonable range of temperatures proves that the technology is suitable for applications such as smart food packaging and wearables.

Materials Advances for Next-Generation Ingestible Electronic Medical Devices.

PubMed

Bettinger, Christopher J

2015-10-01

Electronic medical implants have collectively transformed the diagnosis and treatment of many diseases, but have many inherent limitations. Electronic implants require invasive surgeries, operate in challenging microenvironments, and are susceptible to bacterial infection and persistent inflammation. Novel materials and nonconventional device fabrication strategies may revolutionize the way electronic devices are integrated with the body. Ingestible electronic devices offer many advantages compared with implantable counterparts that may improve the diagnosis and treatment of pathologies ranging from gastrointestinal infections to diabetes. This review summarizes current technologies and highlights recent materials advances. Specific focus is dedicated to next-generation materials for packaging, circuit design, and on-board power supplies that are benign, nontoxic, and even biodegradable. Future challenges and opportunities are also highlighted. Copyright © 2015 Elsevier Ltd. All rights reserved.

Reliability of CGA/LGA/HDI Package Board/Assembly (Final Report)

NASA Technical Reports Server (NTRS)

Ghaffaroam. Reza

2014-01-01

Package manufacturers are now offering commercial-off-the-shelf column grid array (COTS CGA) packaging technologies in high-reliability versions. Understanding the process and quality assurance (QA) indicators for reliability are important for low-risk insertion of these advanced electronics packages. The previous reports, released in January of 2012 and January of 2013, presented package test data, assembly information, and reliability evaluation by thermal cycling for CGA packages with 1752, 1517, 1509, and 1272 inputs/outputs (I/Os) and 1-mm pitch. It presented the thermal cycling (-55C either 100C or 125C) test results for up to 200 cycles. This report presents up to 500 thermal cycles with quality assurance and failure analysis evaluation represented by optical photomicrographs, 2D real time X-ray images, dye-and-pry photomicrographs, and optical/scanning electron Microscopy (SEM) cross-sectional images. The report also presents assembly challenge using reflowing by either vapor phase or rework station of CGA and land grid array (LGA) versions of three high I/O packages both ceramic and plastic configuration. A new test vehicle was designed having high density interconnect (HDI) printed circuit board (PCB) with microvia-in-pad to accommodate both LGA packages as well as a large number of fine pitch ball grid arrays (BGAs). The LGAs either were assembled onto HDI PCB as an LGA or were solder paste print and reflow first to form solder dome on pads before assembly. Both plastic BGAs with 1156 I/O and ceramic LGAs were assembled. It also presented the X-ray inspection results as well as failures due to 200 thermal cycles. Lessons learned on assembly of ceramic LGAs are also presented.

Packaged die heater

DOEpatents

Spielberger, Richard; Ohme, Bruce Walker; Jensen, Ronald J.

2011-06-21

A heater for heating packaged die for burn-in and heat testing is described. The heater may be a ceramic-type heater with a metal filament. The heater may be incorporated into the integrated circuit package as an additional ceramic layer of the package, or may be an external heater placed in contact with the package to heat the die. Many different types of integrated circuit packages may be accommodated. The method provides increased energy efficiency for heating the die while reducing temperature stresses on testing equipment. The method allows the use of multiple heaters to heat die to different temperatures. Faulty die may be heated to weaken die attach material to facilitate removal of the die. The heater filament or a separate temperature thermistor located in the package may be used to accurately measure die temperature.

77 FR 74027 - Certain Integrated Circuit Packages Provided with Multiple Heat-Conducting Paths and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-12-12

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-851] Certain Integrated Circuit Packages Provided with Multiple Heat- Conducting Paths and Products Containing Same; Commission Determination Not To... provided with multiple heat-conducting paths and products containing same by reason of infringement of...

Simulation Model of A Ferroelectric Field Effect Transistor

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Ho, Fat Duen; Russell, Larry W. (Technical Monitor)

2002-01-01

An electronic simulation model has been developed of a ferroelectric field effect transistor (FFET). This model can be used in standard electrical circuit simulation programs to simulate the main characteristics of the FFET. The model uses a previously developed algorithm that incorporates partial polarization as a basis for the design. The model has the main characteristics of the FFET, which are the current hysterisis with different gate voltages and decay of the drain current when the gate voltage is off. The drain current has values matching actual FFET's, which were measured experimentally. The input and output resistance in the model is similar to that of the FFET. The model is valid for all frequencies below RF levels. A variety of different ferroelectric material characteristics can be modeled. The model can be used to design circuits using FFET'S with standard electrical simulation packages. The circuit can be used in designing non-volatile memory circuits and logic circuits and is compatible with all SPICE based circuit analysis programs. The model is a drop in library that integrates seamlessly into a SPICE simulation. A comparison is made between the model and experimental data measured from an actual FFET.

HALT to qualify electronic packages: a proof of concept

NASA Astrophysics Data System (ADS)

Ramesham, Rajeshuni

2014-03-01

A proof of concept of the Highly Accelerated Life Testing (HALT) technique was explored to assess and optimize electronic packaging designs for long duration deep space missions in a wide temperature range (-150°C to +125°C). HALT is a custom hybrid package suite of testing techniques using environments such as extreme temperatures and dynamic shock step processing from 0g up to 50g of acceleration. HALT testing used in this study implemented repetitive shock on the test vehicle components at various temperatures to precipitate workmanship and/or manufacturing defects to show the weak links of the designs. The purpose is to reduce the product development cycle time for improvements to the packaging design qualification. A test article was built using advanced electronic package designs and surface mount technology processes, which are considered useful for a variety of JPL and NASA projects, i.e. (surface mount packages such as ball grid arrays (BGA), plastic ball grid arrays (PBGA), very thin chip array ball grid array (CVBGA), quad flat-pack (QFP), micro-lead-frame (MLF) packages, several passive components, etc.). These packages were daisy-chained and independently monitored during the HALT test. The HALT technique was then implemented to predict reliability and assess survivability of these advanced packaging techniques for long duration deep space missions in much shorter test durations. Test articles were built using advanced electronic package designs that are considered useful in various NASA projects. All the advanced electronic packages were daisychained independently to monitor the continuity of the individual electronic packages. Continuity of the daisy chain packages was monitored during the HALT testing using a data logging system. We were able to test the boards up to 40g to 50g shock levels at temperatures ranging from +125°C to -150°C. The HALT system can deliver 50g shock levels at room temperature. Several tests were performed by subjecting the test boards to various g levels ranging from 5g to 50g, test durations of 10 minutes to 60 minutes, hot temperatures of up to +125°C and cold temperatures down to -150°C. During the HALT test, electrical continuity measurements of the PBGA package showed an open-circuit, whereas the BGA, MLF, and QFPs showed signs of small variations of electrical continuity measurements. The electrical continuity anomaly of the PBGA occurred in the test board within 12 hours of commencing the accelerated test. Similar test boards were assembled, thermal cycled independently from -150°C to +125°C and monitored for electrical continuity through each package design. The PBGA package on the test board showed an anomalous electrical continuity behavior after 959 thermal cycles. Each thermal cycle took around 2.33 hours, so that a total test time to failure of the PBGA was 2,237 hours (or ~3.1 months) due to thermal cycling alone. The accelerated technique (thermal cycling + shock) required only 12 hours to cause a failure in the PBGA electronic package. Compared to the thermal cycle only test, this was an acceleration of ~186 times (more than 2 orders of magnitude). This acceleration process can save significant time and resources for predicting the life of a package component in a given environment, assuming the failure mechanisms are similar in both the tests. Further studies are in progress to make systematic evaluations of the HALT technique on various other advanced electronic packaging components on the test board. With this information one will be able to estimate the number of mission thermal cycles to failure with a much shorter test program. Further studies are in progress to make systematic study of various components, constant temperature range for both the tests. Therefore, one can estimate the number of hours to fail in a given thermal and shock levels for a given test board physical properties.

Stresses in Solder Joints of Electronic Packages

DTIC Science & Technology

1991-12-31

soldering process. The device is soldered to the circuit board at a temperature of +185zc and this tempature is assumed to propagate only to the lead wire...tri-material assembly, showing the notation used hereafter, is shown in Figure 7. The Suhir model is applicable to assemblies with continuous...therefore the radii of curvature of layers are all equal. Using equilibrium equation (7) and moment-curvature equation (9) yields ()D D Xp (x) D T() -m 3 x

Control of dental prosthesis system with microcontroller.

PubMed

Kapidere, M; Müldür, S; Güler, I

2000-04-01

In this study, a microcontroller-based electronic circuit was designed and implemented for dental prosthesis curing system. Heater, compressor and valve were controlled by 8-bit PIC16C64 microcontroller which is programmed using MPASM package. The temperature and time were controlled automatically by preset values which were inputted from keyboard while the pressure was kept constant. Calibration was controlled and the working range was tested. The test results showed that the system provided a good performance.

Integrated circuit package with lead structure and method of preparing the same

NASA Technical Reports Server (NTRS)

Kennedy, B. W. (Inventor)

1973-01-01

A beam-lead integrated circuit package assembly including a beam-lead integrated circuit chip, a lead frame array bonded to projecting fingers of the chip, a rubber potting compound disposed around the chip, and an encapsulating molded plastic is described. The lead frame array is prepared by photographically printing a lead pattern on a base metal sheet, selectively etching to remove metal between leads, and plating with gold. Joining of the chip to the lead frame array is carried out by thermocompression bonding of mating goldplated surfaces. A small amount of silicone rubber is then applied to cover the chip and bonded joints, and the package is encapsulated with epoxy resin, applied by molding.

Testing Services

NASA Technical Reports Server (NTRS)

1993-01-01

Trace Laboratories is an independent testing laboratory specializing in testing printed circuit boards, automotive products and military hardware. Technical information from NASA Tech Briefs and two subsequent JPL Technical Support packages have assisted Trace in testing surface insulation resistance on printed circuit board materials. Testing time was reduced and customer service was improved because of Jet Propulsion Laboratory technical support packages.

77 FR 39735 - Certain Integrated Circuit Packages Provided With Multiple Heat-Conducting Paths and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-07-05

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-851] Certain Integrated Circuit Packages... AGENCY: U.S. International Trade Commission. ACTION: Notice. SUMMARY: Notice is hereby given that a complaint was filed with the U.S. International Trade Commission on May 31, 2012, under section 337 of the...

Method for reworkable packaging of high speed, low electrical parasitic power electronics modules through gate drive integration

DOEpatents

Passmore, Brandon; Cole, Zach; Whitaker, Bret; Barkley, Adam; McNutt, Ty; Lostetter, Alexander

2016-08-02

A multichip power module directly connecting the busboard to a printed-circuit board that is attached to the power substrate enabling extremely low loop inductance for extreme environments such as high temperature operation. Wire bond interconnections are taught from the power die directly to the busboard further enabling enable low parasitic interconnections. Integration of on-board high frequency bus capacitors provide extremely low loop inductance. An extreme environment gate driver board allows close physical proximity of gate driver and power stage to reduce overall volume and reduce impedance in the control circuit. Parallel spring-loaded pin gate driver PCB connections allows a reliable and reworkable power module to gate driver interconnections.

Planned development of a 3D computer based on free-space optical interconnects

NASA Astrophysics Data System (ADS)

Neff, John A.; Guarino, David R.

1994-05-01

Free-space optical interconnection has the potential to provide upwards of a million data channels between planes of electronic circuits. This may result in the planar board and backplane structures of today giving away to 3-D stacks of wafers or multi-chip modules interconnected via channels running perpendicular to the processor planes, thereby eliminating much of the packaging overhead. Three-dimensional packaging is very appealing for tightly coupled fine-grained parallel computing where the need for massive numbers of interconnections is severely taxing the capabilities of the planar structures. This paper describes a coordinated effort by four research organizations to demonstrate an operational fine-grained parallel computer that achieves global connectivity through the use of free space optical interconnects.

Implementation of interconnect simulation tools in spice

NASA Technical Reports Server (NTRS)

Satsangi, H.; Schutt-Aine, J. E.

1993-01-01

Accurate computer simulation of high speed digital computer circuits and communication circuits requires a multimode approach to simulate both the devices and the interconnects between devices. Classical circuit analysis algorithms (lumped parameter) are needed for circuit devices and the network formed by the interconnected devices. The interconnects, however, have to be modeled as transmission lines which incorporate electromagnetic field analysis. An approach to writing a multimode simulator is to take an existing software package which performs either lumped parameter analysis or field analysis and add the missing type of analysis routines to the package. In this work a traditionally lumped parameter simulator, SPICE, is modified so that it will perform lossy transmission line analysis using a different model approach. Modifying SPICE3E2 or any other large software package is not a trivial task. An understanding of the programming conventions used, simulation software, and simulation algorithms is required. This thesis was written to clarify the procedure for installing a device into SPICE3E2. The installation of three devices is documented and the installations of the first two provide a foundation for installation of the lossy line which is the third device. The details of discussions are specific to SPICE, but the concepts will be helpful when performing installations into other circuit analysis packages.

Microcoil Spring Interconnects for Ceramic Grid Array Integrated Circuits

NASA Technical Reports Server (NTRS)

Strickland, S. M.; Hester, J. D.; Gowan, A. K.; Montgomery, R. K.; Geist, D. L.; Blanche, J. F.; McGuire, G. D.; Nash, T. S.

2011-01-01

As integrated circuit miniaturization trends continue, they drive the need for smaller higher input/output (I/O) packages. Hermetically sealed ceramic area array parts are the package of choice by the space community for high reliability space flight electronic hardware. Unfortunately, the coefficient of thermal expansion mismatch between the ceramic area array package and the epoxy glass printed wiring board limits the life of the interconnecting solder joint. This work presents the results of an investigation by Marshall Space Flight Center into a method to increase the life of this second level interconnection by the use of compliant microcoil springs. The design of the spring and its attachment process are presented along with thermal cycling results of microcoil springs (MCS) compared with state-of-the-art ball and column interconnections. Vibration testing has been conducted on MCS and high lead column parts. Radio frequency simulation and measurements have been made and the MCS has been modeled and a stress analysis performed. Thermal cycling and vibration testing have shown MCS interconnects to be significantly more reliable than solder columns. Also, MCS interconnects are less prone to handling damage than solder columns. Future work that includes shock testing, incorporation into a digital signal processor board, and process evaluation of expansion from a 400 I/O device to a device with over 1,100 I/O is identified.

Advanced combined iodine dispenser and detector. [for microorganism annihilation in potable water

NASA Technical Reports Server (NTRS)

Lantz, J. B.; Schubert, F. H.; Jensen, F. C.; Powell, J. D.

1977-01-01

A total weight of 1.23 kg (2.7 lb), a total volume of 1213 cu m (74 cu in), and an average power consumption of 5.5W was achieved in the advanced combined iodine dispenser/detector by integrating the detector with the iodine source, arranging all iodinator components within a compact package and lowering the parasitic power to the detector and electronics circuits. These achievements surpassed the design goals of 1.36 kg (3.0 lb), 1671 cu m (102 cu in) and 8W. The reliability and maintainability were improved by reducing the detector lamp power, using an interchangeable lamp concept, making the electronic circuit boards easily accessible, providing redundant water seals and improving the accessibility to the iodine accumulator for refilling. The system was designed to iodinate (to 5 ppm iodine) the fuel cell water generated during 27 seven-day orbiter missions (equivalent to 18,500 kg (40,700 lb) of water) before the unit must be recharged with iodine crystals.

Waveguide Power-Amplifier Module for 80 to 150 GHz

NASA Technical Reports Server (NTRS)

Samoska, Lorene; Weinreb, Sander; Peralta, Alejandro

2006-01-01

A waveguide power-amplifier module capable of operating over the frequency range from 80 to 150 GHz has been constructed. The module comprises a previously reported power amplifier packaged in a waveguide housing that is compatible with WR-8 waveguides. (WR- 8 is a standard waveguide size for the nominal frequency range from 90 to 140 GHz.) The waveguide power-amplifier module is robust and can be bolted to test equipment and to other electronic circuits with which the amplifier must be connected for normal operation.

Investigation of discrete component chip mounting technology for hybrid microelectronic circuits

NASA Technical Reports Server (NTRS)

Caruso, S. V.; Honeycutt, J. O.

1975-01-01

The use of polymer adhesives for high reliability microcircuit applications is a radical deviation from past practices in electronic packaging. Bonding studies were performed using two gold-filled conductive adhesives, 10/90 tin/lead solder and Indalloy no. 7 solder. Various types of discrete components were mounted on ceramic substrates using both thick-film and thin-film metallization. Electrical and mechanical testing were performed on the samples before and after environmental exposure to MIL-STD-883 screening tests.

Method for Fabricating and Packaging an M.Times.N Phased-Array Antenna

NASA Technical Reports Server (NTRS)

Xu, Xiaochuan (Inventor); Chen, Yihong (Inventor); Chen, Ray T. (Inventor); Subbaraman, Harish (Inventor)

2017-01-01

A method for fabricating an M.times.N, P-bit phased-array antenna on a flexible substrate is disclosed. The method comprising ink jet printing and hardening alignment marks, antenna elements, transmission lines, switches, an RF coupler, and multilayer interconnections onto the flexible substrate. The substrate of the M.times.N, P-bit phased-array antenna may comprise an integrated control circuit of printed electronic components such as, photovoltaic cells, batteries, resistors, capacitors, etc. Other embodiments are described and claimed.

Thin glass based packaging and photonic single-mode waveguide integration by ion-exchange technology on board and module level

NASA Astrophysics Data System (ADS)

Brusberg, Lars; Lang, Günter; Schröder, Henning

2011-01-01

The proposed novel packaging approach merges micro-system packaging and glass integrated optics. It provides 3D optical single-mode intra system links to bridge the gap between novel photonic integrated circuits and the glass fibers for inter system interconnects. We introduce our hybrid 3D photonic packaging approach based on thin glass substrates with planar integrated optical single-mode waveguides for fiber-to-chip and chip-to-chip links. Optical mirrors and lenses provide optical mode matching for photonic IC assemblies and optical fiber interconnects. Thin glass is commercially available in panel and wafer formats and characterizes excellent optical and high-frequency properties as reviewed in the paper. That makes it perfect for micro-system packaging. The adopted planar waveguide process based on ion-exchange technology is capable for high-volume manufacturing. This ion-exchange process and the optical propagation are described in detail for thin glass substrates. An extensive characterization of all basic circuit elements like straight and curved waveguides, couplers and crosses proves the low attenuation of the optical circuit elements.

Quartz/fused silica chip carriers

NASA Technical Reports Server (NTRS)

1992-01-01

The primary objective of this research and development effort was to develop monolithic microwave integrated circuit (MMIC) packaging which will operate efficiently at millimeter-wave frequencies. The packages incorporated fused silica as the substrate material which was selected due to its favorable electrical properties and potential performance improvement over more conventional materials for Ka-band operation. The first step towards meeting this objective is to develop a package that meets standard mechanical and thermal requirements using fused silica and to be compatible with semiconductor devices operating up to at least 44 GHz. The second step is to modify the package design and add multilayer and multicavity capacity to allow for application specific integrated circuits (ASIC's) to control multiple phase shifters. The final step is to adapt the package design to a phased array module with integral radiating elements. The first task was a continuation of the SBIR Phase 1 work. Phase 1 identified fused silica as a viable substrate material by demonstrating various plating, machining, and adhesion properties. In Phase 2 Task 1, a package was designed and fabricated to validate these findings. Task 2 was to take the next step in packaging and fabricate a multilayer, multichip module (MCM). This package is the predecessor to the phased array module and demonstrates the ability to via fill, circuit print, laminate, and to form vertical interconnects. The final task was to build a phased array module. The radiating elements were to be incorporated into the package instead of connecting to it with wire or ribbon bonds.

Electrode array for neural stimulation

DOEpatents

Wessendorf, Kurt O [Albuquerque, NM; Okandan, Murat [Edgewood, NM; Stein, David J [Albuquerque, NM; Yang, Pin [Albuquerque, NM; Cesarano, III, Joseph; Dellinger, Jennifer [Albuquerque, NM

2011-08-16

An electrode array for neural stimulation is disclosed which has particular applications for use in a retinal prosthesis. The electrode array can be formed as a hermetically-sealed two-part ceramic package which includes an electronic circuit such as a demultiplexer circuit encapsulated therein. A relatively large number (up to 1000 or more) of individually-addressable electrodes are provided on a curved surface of a ceramic base portion the electrode array, while a much smaller number of electrical connections are provided on a ceramic lid of the electrode array. The base and lid can be attached using a metal-to-metal seal formed by laser brazing. Electrical connections to the electrode array can be provided by a flexible ribbon cable which can also be used to secure the electrode array in place.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Marques, J.G.; Ramos, A.R.; Fernandes, A.C.

The behavior of electronic components and circuits under radiation is a concern shared by the nuclear industry, the space community and the high-energy physics community. Standard commercial components are used as much as possible instead of radiation hard components, since they are easier to obtain and allow a significant reduction of costs. However, these standard components need to be tested in order to determine their radiation tolerance. The Portuguese Research Reactor (RPI) is a 1 MW pool-type reactor, operating since 1961. The irradiation of electronic components and circuits is one area where a 1 MW reactor can be competitive, sincemore » the fast neutron fluences required for testing are in most cases well below 10{sup 16} n/cm{sup 2}. A program was started in 1999 to test electronics components and circuits for the LHC facility at CERN, initially using a dedicated in-pool irradiation device and later a beam line with tailored neutron and gamma filters. Neutron filters are essential to reduce the intensity of the thermal neutron flux, which does not produce significant defects in electronic components but produces unwanted radiation from activation of contacts and packages of integrated circuits and also of the printed circuit boards. In irradiations performed within the line-of-sight of the core of a fission reactor there is simultaneous gamma radiation which complicates testing in some cases. Filters can be used to reduce its importance and separate testing with a pure gamma radiation source can contribute to clarify some irradiation results. Practice has shown the need to introduce several improvements to the procedures and facilities over the years. We will review improvements done in the following areas: - Optimization of neutron and gamma filters; - Dosimetry procedures in mixed neutron / gamma fields; - Determination of hardness parameter and 1 MeV-equivalent neutron fluence; - Temperature measurement and control during irradiation; - Follow-up of reactor power operational fluctuations; - Study of gamma radiation effects only. The fission neutron spectrum can be limitative for some of the tests, as most neutrons are in the 1-2 MeV energy range. Significant progress has been made lately in compact neutron generators using D-D and D-T fusion reactions, achieving higher neutron fluxes and longer lifetime than previously available. The advantages of using compact neutron generators for testing of electronic components and circuits will be also discussed. (authors)« less

Conduction-driven cooling of LED-based automotive LED lighting systems for abating local hot spots

NASA Astrophysics Data System (ADS)

Saati, Ferina; Arik, Mehmet

2018-02-01

Light-emitting diode (LED)-based automotive lighting systems pose unique challenges, such as dual-side packaging (front side for LEDs and back side for driver electronics circuit), size, harsh ambient, and cooling. Packaging for automotive lighting applications combining the advanced printed circuit board (PCB) technology with a multifunctional LED-based board is investigated with a focus on the effect of thermal conduction-based cooling for hot spot abatement. A baseline study with a flame retardant 4 technology, commonly known as FR4 PCB, is first compared with a metal-core PCB technology, both experimentally and computationally. The double-sided advanced PCB that houses both electronics and LEDs is then investigated computationally and experimentally compared with the baseline FR4 PCB. Computational models are first developed with a commercial computational fluid dynamics software and are followed by an advanced PCB technology based on embedded heat pipes, which is computationally and experimentally studied. Then, attention is turned to studying different heat pipe orientations and heat pipe placements on the board. Results show that conventional FR4-based light engines experience local hot spots (ΔT>50°C) while advanced PCB technology based on heat pipes and thermal spreaders eliminates these local hot spots (ΔT<10°C), leading to a higher lumen extraction with improved reliability. Finally, possible design options are presented with embedded heat pipe structures that further improve the PCB performance.

Aging of electronics with application to nuclear power plant instrumentation. [PWR; BWR

DOE Office of Scientific and Technical Information (OSTI.GOV)

Johnson, Jr, R T; Thome, F V; Craft, C M

1983-01-01

A survey to identify areas of needed research to understand aging mechanisms for electronics in nuclear power plant instrumentation has been completed. The emphasis was on electronic components such as semiconductors, capacitors, and resistors used in safety-related instrumentation in the reactor containment area. The environmental and operational stress factors which may produce degradation during long-term operation were identified. Some attention was also given to humidity effects as related to seals and encapsulants, and failures in printed circuit boards and bonds and solder joints. Results suggest that neutron as well as gamma irradiations should be considered in simulating the aging environmentmore » for electronic components. Radiation dose-rate effects in semiconductor devices and organic capacitors need to be further investigated, as well as radiation-voltage bias synergistic effects in semiconductor devices and leakage and permeation of moisture through seals in electronics packages.« less

Apparatus and method of direct water cooling several parallel circuit cards each containing several chip packages

DOEpatents

Cipolla, Thomas M [Katonah, NY; Colgan, Evan George [Chestnut Ridge, NY; Coteus, Paul W [Yorktown Heights, NY; Hall, Shawn Anthony [Pleasantville, NY; Tian, Shurong [Mount Kisco, NY

2011-12-20

A cooling apparatus, system and like method for an electronic device includes a plurality of heat producing electronic devices affixed to a wiring substrate. A plurality of heat transfer assemblies each include heat spreaders and thermally communicate with the heat producing electronic devices for transferring heat from the heat producing electronic devices to the heat transfer assemblies. The plurality of heat producing electronic devices and respective heat transfer assemblies are positioned on the wiring substrate having the regions overlapping. A heat conduit thermally communicates with the heat transfer assemblies. The heat conduit circulates thermally conductive fluid therethrough in a closed loop for transferring heat to the fluid from the heat transfer assemblies via the heat spreader. A thermally conductive support structure supports the heat conduit and thermally communicates with the heat transfer assemblies via the heat spreader transferring heat to the fluid of the heat conduit from the support structure.

High-performance packaging for monolithic microwave and millimeter-wave integrated circuits

NASA Technical Reports Server (NTRS)

Shalkhauser, K. A.; Li, K.; Shih, Y. C.

1992-01-01

Packaging schemes were developed that provide low-loss, hermetic enclosure for advanced monolithic microwave and millimeter-wave integrated circuits (MMICs). The package designs are based on a fused quartz substrate material that offers improved radio frequency (RF) performance through 44 gigahertz (GHz). The small size and weight of the packages make them appropriate for a variety of applications, including phased array antenna systems. Packages were designed in two forms; one for housing a single MMIC chip, the second in the form of a multi-chip phased array module. The single chip array module was developed in three separate sizes, for chips of different geometry and frequency requirements. The phased array module was developed to address packaging directly for antenna applications, and includes transmission line and interconnect structures to support multi-element operation. All packages are fabricated using fused quartz substrate materials. As part of the packaging effort, a test fixture was developed to interface the single chip packages to conventional laboratory instrumentation for characterization of the packaged devices. The package and test fixture designs were both developed in a generic sense, optimizing performance for a wide range of possible applications and devices.

Performance of High-Speed PWM Control Chips at Cryogenic Temperatures

NASA Technical Reports Server (NTRS)

Elbuluk, Malik E.; Gerber, Scott; Hammoud, Ahmad; Patterson, Richard; Overton, Eric

2001-01-01

The operation of power electronic systems at cryogenic temperatures is anticipated in many NASA space missions such as planetary exploration and deep space probes. In addition to surviving the space hostile environment, electronics capable of low temperature operation would contribute to improving circuit performance, increasing system efficiency, and reducing development and launch costs. As part of the NASA Glenn Low Temperature Electronics Program, several commercial high-speed Pulse Width Modulation (PWM) chips have been characterized in terms of their performance as a function of temperature in the range of 25 to -196 C (liquid nitrogen). These chips ranged in their electrical characteristics, modes of control, packaging options, and applications. The experimental procedures along with the experimental data obtained on the investigated chips are presented and discussed.

Three-Function Logic Gate Controlled by Analog Voltage

NASA Technical Reports Server (NTRS)

Zebulum, Ricardo; Stoica, Adrian

2006-01-01

The figure is a schematic diagram of a complementary metal oxide/semiconductor (CMOS) electronic circuit that performs one of three different logic functions, depending on the level of an externally applied control voltage, V(sub sel). Specifically, the circuit acts as A NAND gate at V(sub sel) = 0.0 V, A wire (the output equals one of the inputs) at V(sub sel) = 1.0 V, or An AND gate at V(sub sel) = -1.8 V. [The nominal power-supply potential (VDD) and logic "1" potential of this circuit is 1.8 V.] Like other multifunctional circuits described in several prior NASA Tech Briefs articles, this circuit was synthesized following an automated evolutionary approach that is so named because it is modeled partly after the repetitive trial-and-error process of biological evolution. An evolved circuit can be tested by computational simulation and/or tested in real hardware, and the results of the test can provide guidance for refining the design through further iteration. The evolutionary synthesis of electronic circuits can now be implemented by means of a software package Genetic Algorithms for Circuit Synthesis (GACS) that was developed specifically for this purpose. GACS was used to synthesize the present trifunctional circuit. As in the cases of other multifunctional circuits described in several prior NASA Tech Briefs articles, the multiple functionality of this circuit, the use of a single control voltage to select the function, and the automated evolutionary approach to synthesis all contribute synergistically to a combination of features that are potentially advantageous for the further development of robust, multiple-function logic circuits, including, especially, field-programmable gate arrays (FPGAs). These advantages include the following: This circuit contains only 9 transistors about half the number of transistors that would be needed to obtain equivalent NAND/wire/AND functionality by use of components from a standard digital design library. If multifunctional gates like this circuit were used in the place of the configurable logic blocks of present commercial FPGAs, it would be possible to change the functions of the resulting digital systems within shorter times. For example, by changing a single control voltage, one could change the function of thousands of FPGA cells within nanoseconds. In contrast, typically, the reconfiguration in a conventional FPGA by use of bits downloaded from look-up tables via a digital bus takes microseconds.

Performance of High Temperature Operational Amplifier, Type LM2904WH, under Extreme Temperatures

NASA Technical Reports Server (NTRS)

Patterson, Richard; Hammoud, Ahmad; Elbuluk, Malik

2008-01-01

Operation of electronic parts and circuits under extreme temperatures is anticipated in NASA space exploration missions as well as terrestrial applications. Exposure of electronics to extreme temperatures and wide-range thermal swings greatly affects their performance via induced changes in the semiconductor material properties, packaging and interconnects, or due to incompatibility issues between interfaces that result from thermal expansion/contraction mismatch. Electronics that are designed to withstand operation and perform efficiently in extreme temperatures would mitigate risks for failure due to thermal stresses and, therefore, improve system reliability. In addition, they contribute to reducing system size and weight, simplifying its design, and reducing development cost through the elimination of otherwise required thermal control elements for proper ambient operation. A large DC voltage gain (100 dB) operational amplifier with a maximum junction temperature of 150 C was recently introduced by STMicroelectronics [1]. This LM2904WH chip comes in a plastic package and is designed specifically for automotive and industrial control systems. It operates from a single power supply over a wide range of voltages, and it consists of two independent, high gain, internally frequency compensated operational amplifiers. Table I shows some of the device manufacturer s specifications.

Patterning two-dimensional chalcogenide crystals of Bi2Se3 and In2Se3 and efficient photodetectors

PubMed Central

Zheng, Wenshan; Xie, Tian; Zhou, Yu; Chen, Y.L.; Jiang, Wei; Zhao, Shuli; Wu, Jinxiong; Jing, Yumei; Wu, Yue; Chen, Guanchu; Guo, Yunfan; Yin, Jianbo; Huang, Shaoyun; Xu, H.Q.; Liu, Zhongfan; Peng, Hailin

2015-01-01

Patterning of high-quality two-dimensional chalcogenide crystals with unique planar structures and various fascinating electronic properties offers great potential for batch fabrication and integration of electronic and optoelectronic devices. However, it remains a challenge that requires accurate control of the crystallization, thickness, position, orientation and layout. Here we develop a method that combines microintaglio printing with van der Waals epitaxy to efficiently pattern various single-crystal two-dimensional chalcogenides onto transparent insulating mica substrates. Using this approach, we have patterned large-area arrays of two-dimensional single-crystal Bi2Se3 topological insulator with a record high Hall mobility of ∼1,750 cm2 V−1 s−1 at room temperature. Furthermore, our patterned two-dimensional In2Se3 crystal arrays have been integrated and packaged to flexible photodetectors, yielding an ultrahigh external photoresponsivity of ∼1,650 A W−1 at 633 nm. The facile patterning, integration and packaging of high-quality two-dimensional chalcogenide crystals hold promise for innovations of next-generation photodetector arrays, wearable electronics and integrated optoelectronic circuits. PMID:25898022

A Boundary Scan Test Vehicle for Direct Chip Attach Testing

NASA Technical Reports Server (NTRS)

Parsons, Heather A.; DAgostino, Saverio; Arakaki, Genji

2000-01-01

To facilitate the new faster, better and cheaper spacecraft designs, smaller more mass efficient avionics and instruments are using higher density electronic packaging technologies such as direct chip attach (DCA). For space flight applications, these technologies need to have demonstrated reliability and reasonably well defined fabrication and assembly processes before they will be accepted as baseline designs in new missions. As electronics shrink in size, not only can repair be more difficult, but 49 probing" circuitry can be very risky and it becomes increasingly more difficult to identify the specific source of a problem. To test and monitor these new technologies, the Direct Chip Attach Task, under NASA's Electronic Parts and Packaging Program (NEPP), chose the test methodology of boundary scan testing. The boundary scan methodology was developed for interconnect integrity and functional testing at hard to access electrical nodes. With boundary scan testing, active devices are used and failures can be identified to the specific device and lead. This technology permits the incorporation of "built in test" into almost any circuit and thus gives detailed test access to the highly integrated electronic assemblies. This presentation will describe boundary scan, discuss the development of the boundary scan test vehicle for DCA and current plans for testing of direct chip attach configurations.

Xyce parallel electronic simulator users guide, version 6.1

DOE Office of Scientific and Technical Information (OSTI.GOV)

Keiter, Eric R; Mei, Ting; Russo, Thomas V.

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas; Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers; A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to developmore » new types of analysis without requiring the implementation of analysis-specific device models; Device models that are specifically tailored to meet Sandia's needs, including some radiationaware devices (for Sandia users only); and Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase-a message passing parallel implementation-which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.« less

Xyce parallel electronic simulator users' guide, Version 6.0.1.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Keiter, Eric R; Mei, Ting; Russo, Thomas V.

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to developmore » new types of analysis without requiring the implementation of analysis-specific device models. Device models that are specifically tailored to meet Sandias needs, including some radiationaware devices (for Sandia users only). Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase a message passing parallel implementation which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.« less

Xyce parallel electronic simulator users guide, version 6.0.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Keiter, Eric R; Mei, Ting; Russo, Thomas V.

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to developmore » new types of analysis without requiring the implementation of analysis-specific device models. Device models that are specifically tailored to meet Sandias needs, including some radiationaware devices (for Sandia users only). Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase a message passing parallel implementation which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.« less

Digital model of a vacuum circuit breaker for the analysis of switching waveforms in electrical circuits

NASA Astrophysics Data System (ADS)

Budzisz, Joanna; Wróblewski, Zbigniew

2016-03-01

The article presents a method of modelling a vaccum circuit breaker in the ATP/EMTP package, the results of the verification of the correctness of the developed digital circuit breaker model operation and its practical usefulness for analysis of overvoltages and overcurrents occurring in commutated capacitive electrical circuits and also examples of digital simulations of overvoltages and overcurrents in selected electrical circuits.

Conformal Thin Film Packaging for SiC Sensor Circuits in Harsh Environments

NASA Technical Reports Server (NTRS)

Scardelletti, Maximilian C.; Karnick, David A.; Ponchak, George E.; Zorman, Christian A.

2011-01-01

In this investigation sputtered silicon carbide annealed at 300 C for one hour is used as a conformal thin film package. A RF magnetron sputterer was used to deposit 500 nm silicon carbide films on gold metal structures on alumina wafers. To determine the reliability and resistance to immersion in harsh environments, samples were submerged in gold etchant for 24 hours, in BOE for 24 hours, and in an O2 plasma etch for one hour. The adhesion strength of the thin film was measured by a pull test before and after the chemical immersion, which indicated that the film has an adhesion strength better than 10(exp 8) N/m2; this is similar to the adhesion of the gold layer to the alumina wafer. MIM capacitors are used to determine the dielectric constant, which is dependent on the SiC anneal temperature. Finally, to demonstrate that the SiC, conformal, thin film may be used to package RF circuits and sensors, an LC resonator circuit was fabricated and tested with and without the conformal SiC thin film packaging. The results indicate that the SiC coating adds no appreciable degradation to the circuits RF performance. Index Terms Sputter, silicon carbide, MIM capacitors, LC resonators, gold etchants, BOE, O2 plasma

Description of the three axis low-g accelerometer package

NASA Technical Reports Server (NTRS)

Amalavage, A. J.; Fikes, E. H.; Berry, E. H.

1978-01-01

The three axis low-g accelerometer package designed for use on the Space Processing Application Rocket (SPAR) Program is described. The package consists of the following major sections: (1) three Kearfott model 2412 accelerometers mounted in an orthogonal triad configuration on a temperature controlled, thermally isolated cube, (2) the accelerometer servoelectronics (printed circuit cards PC-6 through PC-12), and (3) the signal conditioner (printed circuit cards PC-15 and PC-16). The measurement range is 0 + or - 0.031 g with a quantization of 1.1 x 10 to the 7th power g. The package was flown successfully on six SPAR launches with the Black Brant booster. These flights provide approximately 300 s of free fall or zero-g environment.

High-Throughput Printing Process for Flexible Electronics

NASA Astrophysics Data System (ADS)

Hyun, Woo Jin

Printed electronics is an emerging field for manufacturing electronic devices with low cost and minimal material waste for a variety of applications including displays, distributed sensing, smart packaging, and energy management. Moreover, its compatibility with roll-to-roll production formats and flexible substrates is desirable for continuous, high-throughput production of flexible electronics. Despite the promise, however, the roll-to-roll production of printed electronics is quite challenging due to web movement hindering accurate ink registration and high-fidelity printing. In this talk, I will present a promising strategy for roll-to-roll production using a novel printing process that we term SCALE (Self-aligned Capillarity-Assisted Lithography for Electronics). By utilizing capillarity of liquid inks on nano/micro-structured substrates, the SCALE process facilitates high-resolution and self-aligned patterning of electrically functional inks with greatly improved printing tolerance. I will show the fabrication of key building blocks (e.g. transistor, resistor, capacitor) for electronic circuits using the SCALE process on plastics.

Effecting aging time of epoxy molding compound to molding process for integrated circuit packaging

NASA Astrophysics Data System (ADS)

Tachapitunsuk, Jirayu; Ugsornrat, Kessararat; Srisuwitthanon, Warayoot; Thonglor, Panakamon

2017-09-01

This research studied about effecting aging time of epoxy molding compound (EMC) that effect to reliability performance of integrated circuit (IC) package in molding process. Molding process is so important of IC packaging process for protecting IC chip (or die) from temperature and humidity environment using encapsulated EMC. For general molding process, EMC are stored in the frozen at 5°C and left at room temperature at 25 °C for aging time on self before molding of die onto lead frame is 24 hours. The aging time effect to reliability performance of IC package due to different temperature and humidity inside the package. In experiment, aging time of EMC were varied from 0 to 24 hours for molding process of SOIC-8L packages. For analysis, these packages were tested by x-ray and scanning acoustic microscope to analyze properties of EMC with an aging time and also analyzed delamination, internal void, and wire sweep inside the packages with different aging time. The results revealed that different aging time of EMC effect to properties and reliability performance of molding process.

High-density interconnect substrates and device packaging using conductive composites

NASA Astrophysics Data System (ADS)

Gandhi, Pradeep; Gallagher, Catherine; Matijasevic, Goran

1998-02-01

High-end printed circuit board manufacturing technology is receiving increasing attention due to higher functionality in smaller form factors. This is evident from the industry efforts to produced reliable microvias and related trace features to pack as much circuit density as possible. Cost, density and performance requirements have prodded entry into a market that was mainly reserved for ceramic and molded packages for the last forty years. To successfully meet the demanding specifications of this market segment, a worldwide effort is underway for the development of new materials, processes and equipment. A novel base technology that is applicable to most of the major packaging and redistribution elements in an electronic module is presented.High density multilayer circuits with landless blind and buried vias can be fabricated by filling the conductor paste into photoimaged dielectrics and thermally processing it at a relatively lower temperature. Via layers are prepared directly on the inherently planarized circuit layer in an identical fashion. Because these composite materials are applied in an additive fabrication method, metal substrates can be employed for high thermal dissipation and excellent CTE control over a wide temperature range. The conductor material is based on interpenetrating polymer and metal networks that are formed in situ from metal particles and a thermosetting flux/binder. The metal network is formed when the alloy particles melt and react with adjacent high melting point metal particle. Interaction also occurs between the alloy particles and pad, lead or previous trace metallizations provided they are solderable by alloys of tin. The new alloy composition created by the interdiffusion process within the bulk material has a higher melting point than the original alloy and thus solidifies immediately upon formation. This metallurgical reaction, known as transient liquid phase sintering, is facilitated by the polymer mixture. INtegration of the polymer and metal networks is maintained by utilizing a thermosetting polymer system that cures simultaneously with the metallurgical reaction. Although similar in concept and performance to cermet inks, these compositions differ in that their process temperatures are compatible with conventional printed wiring board materials and that the polymeric binder remains to provide adhesion and fatigue resistance to the metallurgical network.

Applications of multi-walled carbon nanotube in electronic packaging

PubMed Central

2012-01-01

Thermal management of integrated circuit chip is an increasing important challenge faced today. Heat dissipation of the chip is generally achieved through the die attach material and solders. With the temperature gradients in these materials, high thermo-mechanical stress will be developed in them, and thus they must also be mechanically strong so as to provide a good mechanical support to the chip. The use of multi-walled carbon nanotube to enhance the thermal conductivity, and the mechanical strength of die attach epoxy and Pb-free solder is demonstrated in this work. PMID:22405035

SVGA and XGA active matrix microdisplays for head-mounted applications

NASA Astrophysics Data System (ADS)

Alvelda, Phillip; Bolotski, Michael; Brown, Imani L.

2000-03-01

The MicroDisplay Corporation's liquid crystal on silicon (LCOS) display devices are based on the union of several technologies with the extreme integration capability of conventionally fabricated CMOS substrates. The fast liquid crystal operation modes and new scalable high-performance pixel addressing architectures presented in this paper enable substantially improved color, contrast, and brightness while still satisfying the optical, packaging, and power requirements of portable applications. The entire suite of MicroDisplay's technologies was devised to create a line of mixed-signal application-specific integrated circuits (ASICs) in single-chip display systems. Mixed-signal circuits can integrate computing, memory, and communication circuitry on the same substrate as the display drivers and pixel array for a multifunctional complete system-on-a-chip. System-on-a-chip benefits also include reduced head supported weight requirements through the elimination of off-chip drive electronics.

The National Si-Soft Project

NASA Astrophysics Data System (ADS)

Chang, Chun-Yen; Trappey, Charles V.

2003-06-01

Taiwan's electronics industry emerged in the 1960s with the creation of a small but well planned integrated circuit (IC) packaging industry. This industry investment led to bolder investments in research, laboratories, and the island's first semiconductor foundries in the 1980s. Following the success of the emerging IC manufacturers and design houses, hundreds of service firms and related industries (software, legal services, substrate, chemical, and test firms among others) opened for business and completed Taiwan's IC manufacturing supply chain. The challenge for Taiwan's electronics industry is to take the lead in the design, manufacture, and marketing of name brand electronic products. This paper introduces the Si-Soft (silicon software) Project, a national initiative that builds on Taiwan's achievements in manufacturing (referred to as Si-Hard or silicon hardware) to launch a new wave of companies. These firms will contribute to the core underlying technology (intellectual property) used in the creation of electronic products.

Cryogenic Behavior of the High Temperature Crystal Oscillator PX-570

NASA Technical Reports Server (NTRS)

Patterson, Richard; Hammoud, Ahmad; Scherer, Steven

2011-01-01

Microprocessors, data-acquisition systems, and electronic controllers usually require timing signals for proper and accurate operation. These signals are, in most cases, provided by circuits that utilize crystal oscillators due to availability, cost, ease of operation, and accuracy. Stability of these oscillators, i.e. crystal characteristics, is usually governed, amongst other things, by the ambient temperature. Operation of these devices under extreme temperatures requires, therefore, the implementation of some temperature-compensation mechanism either through the manufacturing process of the oscillator part or in the design of the circuit to maintain stability as well as accuracy. NASA future missions into deep space and planetary exploration necessitate operation of electronic instruments and systems in environments where extreme temperatures along with wide-range thermal swings are countered. Most of the commercial devices are very limited in terms of their specified operational temperature while very few custom-made and military-grade parts have the ability to operate in a slightly wider range of temperature. Thus, it is becomes mandatory to design and develop circuits that are capable of operation efficiently and reliably under the space harsh conditions. This report presents the results obtained on the evaluation of a new (COTS) commercial-off-the-shelf crystal oscillator under extreme temperatures. The device selected for evaluation comprised of a 10 MHz, PX-570-series crystal oscillator. This type of device was recently introduced by Vectron International and is designed as high temperature oscillator [1]. These parts are fabricated using proprietary manufacturing processes designed specifically for high temperature and harsh environment applications [1]. The oscillators have a wide continuous operating temperature range; making them ideal for use in military and aerospace industry, industrial process control, geophysical fields, avionics, and engine control. They exhibit low jitter and phase noise, consume little power, and are suited for high shock and vibration applications. The unique package design of these crystal oscillators offers a small ceramic package footprint, as well as providing both through-hole mounting and surface mount options.

Optical waveguide circuit board with a surface-mounted optical receiver array

NASA Astrophysics Data System (ADS)

Thomson, J. E.; Levesque, Harold; Savov, Emil; Horwitz, Fred; Booth, Bruce L.; Marchegiano, Joseph E.

1994-03-01

A photonic circuit board is fabricated for potential application to interchip and interboard parallel optical links. The board comprises photolithographically patterned polymer optical waveguides on a conventional glass-epoxy electrical circuit board and a surface-mounted integrated circuit (IC) package that optically and electrically couples to an optoelectronic IC. The waveguide circuits include eight-channel arrays of straights, cross-throughs, curves, self- aligning interconnects to multi-fiber ribbon, and out-of-plane turning mirrors. A coherent, fused bundle of optical fibers couples light between 45-deg waveguide mirrors and a GaAs receiver array in the IC package. The fiber bundle is easily aligned to the mirrors and the receivers and is amenable to surface mounting and hermetic sealing. The waveguide-receiver- array board achieved error-free data rates up to 1.25 Gbits/s per channel, and modal noise was shown to be negligible.

Multi-physics modelling contributions to investigate the atmospheric cosmic rays on the single event upset sensitivity along the scaling trend of CMOS technologies.

PubMed

Hubert, G; Regis, D; Cheminet, A; Gatti, M; Lacoste, V

2014-10-01

Particles originating from primary cosmic radiation, which hit the Earth's atmosphere give rise to a complex field of secondary particles. These particles include neutrons, protons, muons, pions, etc. Since the 1980s it has been known that terrestrial cosmic rays can penetrate the natural shielding of buildings, equipment and circuit package and induce soft errors in integrated circuits. Recently, research has shown that commercial static random access memories are now so small and sufficiently sensitive that single event upsets (SEUs) may be induced from the electronic stopping of a proton. With continued advancements in process size, this downward trend in sensitivity is expected to continue. Then, muon soft errors have been predicted for nano-electronics. This paper describes the effects in the specific cases such as neutron-, proton- and muon-induced SEU observed in complementary metal-oxide semiconductor. The results will allow investigating the technology node sensitivity along the scaling trend. © The Author 2014. Published by Oxford University Press. All rights reserved. For Permissions, please email: journals.permissions@oup.com.

The Assurance Challenges of Advanced Packaging Technologies for Electronics

NASA Technical Reports Server (NTRS)

Sampson, Michael J.

2010-01-01

Advances in microelectronic parts performance are driving towards finer feature sizes, three-dimensional geometries and ever-increasing number of transistor equivalents that are resulting in increased die sizes and interconnection (I/O) counts. The resultant packaging necessary to provide assemble-ability, environmental protection, testability and interconnection to the circuit board for the active die creates major challenges, particularly for space applications, Traditionally, NASA has used hermetically packaged microcircuits whenever available but the new demands make hermetic packaging less and less practical at the same time as more and more expensive, Some part types of great interest to NASA designers are currently only available in non-hermetic packaging. It is a far more complex quality and reliability assurance challenge to gain confidence in the long-term survivability and effectiveness of nonhermetic packages than for hermetic ones. Although they may provide more rugged environmental protection than the familiar Plastic Encapsulated Microcircuits (PEMs), the non-hermetic Ceramic Column Grid Array (CCGA) packages that are the focus of this presentation present a unique combination of challenges to assessing their suitability for spaceflight use. The presentation will discuss the bases for these challenges, some examples of the techniques proposed to mitigate them and a proposed approach to a US MIL specification Class for non-hermetic microcircuits suitable for space application, Class Y, to be incorporated into M. IL-PRF-38535. It has recently emerged that some major packaging suppliers are offering hermetic area array packages that may offer alternatives to the nonhermetic CCGA styles but have also got their own inspectability and testability issues which will be briefly discussed in the presentation,

Low temperature co-fired ceramic packaging of CMOS capacitive sensor chip towards cell viability monitoring.

PubMed

Halonen, Niina; Kilpijärvi, Joni; Sobocinski, Maciej; Datta-Chaudhuri, Timir; Hassinen, Antti; Prakash, Someshekar B; Möller, Peter; Abshire, Pamela; Kellokumpu, Sakari; Lloyd Spetz, Anita

2016-01-01

Cell viability monitoring is an important part of biosafety evaluation for the detection of toxic effects on cells caused by nanomaterials, preferably by label-free, noninvasive, fast, and cost effective methods. These requirements can be met by monitoring cell viability with a capacitance-sensing integrated circuit (IC) microchip. The capacitance provides a measurement of the surface attachment of adherent cells as an indication of their health status. However, the moist, warm, and corrosive biological environment requires reliable packaging of the sensor chip. In this work, a second generation of low temperature co-fired ceramic (LTCC) technology was combined with flip-chip bonding to provide a durable package compatible with cell culture. The LTCC-packaged sensor chip was integrated with a printed circuit board, data acquisition device, and measurement-controlling software. The packaged sensor chip functioned well in the presence of cell medium and cells, with output voltages depending on the medium above the capacitors. Moreover, the manufacturing of microfluidic channels in the LTCC package was demonstrated.

Thermal cycling fatigue of organic thermal interface materials using a thermal-displacement measurement technique

NASA Astrophysics Data System (ADS)

Steill, Jason Scott

The long term reliability of polymer-based thermal interface materials (TIM) is essential for modern electronic packages which require robust thermal management. The challenge for today's materials scientists and engineers is to maximize the heat flow from integrated circuits through a TIM and out the heat sink. Thermal cycling of the electronic package and non-uniformity in the heat flux with respect to the plan area can lead to void formation and delamination which re-introduces inefficient heat transfer. Measurement and understanding at the nano-scale is essential for TIM development. Finding and documenting the evolution of the defects is dependent upon a full understanding of the thermal probes response to changing environmental conditions and the effects of probe usage. The response of the thermal-displacement measurement technique was dominated by changes to the environment. Accurate measurement of the thermal performance was hindered by the inability to create a model system and control the operating conditions. This research highlights the need for continued study into the probe's thermal and mechanical response using tightly controlled test conditions.

Broadband Terahertz Refraction Index Dispersion and Loss of Polymeric Dielectric Substrate and Packaging Materials

NASA Astrophysics Data System (ADS)

Motaharifar, E.; Pierce, R. G.; Islam, R.; Henderson, R.; Hsu, J. W. P.; Lee, Mark

2018-01-01

In the effort to push the high-frequency performance of electronic circuits and signal interconnects from millimeter waves to beyond 1 THz, a quantitative knowledge of complex refraction index values and dispersion in potential dielectric substrate, encapsulation, waveguide, and packaging materials becomes critical. Here we present very broadband measurements of the real and imaginary index spectra of four polymeric dielectric materials considered for use in high-frequency electronics: benzocyclobutene (BCB), polyethylene naphthalate (PEN), the photoresist SU-8, and polydimethylsiloxane (PDMS). Reflectance and transmittance spectra from 3 to 75 THz were made using a Fourier transform spectrometer on freestanding material samples. These data were quantitatively analyzed, taking into account multiple partial reflections from front and back surfaces and molecular bond resonances, where applicable, to generate real and imaginary parts of the refraction index as a function of frequency. All materials showed signatures of infrared active organic molecular bond resonances between 10 and 50 THz. Low-loss transmission windows as well as anti-window bands of high dispersion and loss can be readily identified and incorporated into high-frequency design models.

MEMS Applications in Aerodynamic Measurement Technology

NASA Technical Reports Server (NTRS)

Reshotko, E.; Mehregany, M.; Bang, C.

1998-01-01

Microelectromechanical systems (MEMS) embodies the integration of sensors, actuators, and electronics on a single substrate using integrated circuit fabrication techniques and compatible bulk and surface micromachining processes. Silicon and its derivatives form the material base for the MEMS technology. MEMS devices, including microsensors and microactuators, are attractive because they can be made small (characteristic dimension about 100 microns), be produced in large numbers with uniform performance, include electronics for high performance and sophisticated functionality, and be inexpensive. For aerodynamic measurements, it is preferred that sensors be small so as to approximate measurement at a point, and in fact, MEMS pressure sensors, wall shear-stress sensors, heat flux sensors and micromachined hot wires are nearing application. For the envisioned application to wind tunnel models, MEMS sensors can be placed on the surface or in very shallow grooves. MEMS devices have often been fabricated on stiff, flat silicon substrates, about 0.5 mm thick, and therefore were not easily mounted on curved surfaces. However, flexible substrates are now available and heat-flux sensor arrays have been wrapped around a curved turbine blade. Electrical leads can also be built into the flexible substrate. Thus MEMS instrumented wind tunnel models do not require deep spanwise grooves for tubes and leads that compromise the strength of conventionally instrumented models. With MEMS, even the electrical leads can potentially be eliminated if telemetry of the signals to an appropriate receiver can be implemented. While semiconductor silicon is well known for its electronic properties, it is also an excellent mechanical material for MEMS applications. However, silicon electronics are limited to operations below about 200 C, and silicon's mechanical properties start to diminish above 400 C. In recent years, silicon carbide (SiC) has emerged as the leading material candidate for applications in high temperature environments and can be used for high-temperature MEMS applications. With SiC, diodes and more complex electronics have been shown to operate to about 600 C, while the mechanical properties of SiC are maintained to much higher temperatures. Even when MEMS devices show benefits in the laboratory, there are many packaging challenges for any aeronautics application. Incorporating MEMS into these applications requires new approaches to packaging that goes beyond traditional integrated circuit (IC) packaging technologies. MEMS must interact mechanically, as well as electrically with their environment, making most traditional chip packaging and mounting techniques inadequate. Wind tunnels operate over wide temperature ranges in an environment that is far from being a 'clean-room.' In flight, aircraft are exposed to natural elements (e.g. rain, sun, ice, insects and dirt) and operational interferences(e.g. cleaning and deicing fluids, and maintenance crews). In propulsion systems applications, MEMS devices will have to operate in environments containing gases with very high temperatures, abrasive particles and combustion products. Hence deployment and packaging that maintains the integrity of the MEMS system is crucial. This paper presents an overview of MEMS fabrication and materials, descriptions of available sensors with more details on those being developed in our laboratories, and a discussion of sensor deployment options for wind tunnel and flight applications.

Apparatus and methods for packaging integrated circuit chips with antenna modules providing closed electromagnetic environment for integrated antennas

NASA Technical Reports Server (NTRS)

Gaucher, Brian P. (Inventor); Grzyb, Janusz (Inventor); Liu, Duixian (Inventor); Pfeiffer, Ullrich R. (Inventor)

2008-01-01

Apparatus and methods are provided for packaging IC chips together with integrated antenna modules designed to provide a closed EM (electromagnetic) environment for antenna radiators, thereby allowing antennas to be designed independent from the packaging technology.

Modular chassis simplifies packaging and interconnecting of circuit boards

NASA Technical Reports Server (NTRS)

Arens, W. E.; Boline, K. G.

1964-01-01

A system of modular chassis structures has simplified the design for mounting a number of printed circuit boards. This design is structurally adaptable to computer and industrial control system applications.

Design and Performance of a Miniature Radar L-Band Transceiver

NASA Technical Reports Server (NTRS)

McWatters, D.; Price, D.; Edelstein, W.

2004-01-01

Radar electronics developed for past JPL space missions historically had been custom designed and as such, given budgetary, time, and risk constraints, had not been optimized for maximum flexibility or miniaturization. To help reduce cost and risk of future radar missions, a generic radar module was conceived. The module includes a 1.25-GHz (L-band) transceiver and incorporates miniature high-density packaging of integrated circuits in die/chip form. The technology challenges include overcoming the effect of miniaturization and high packaging density to achieve the performance, reliability, and environmental ruggedness required for space missions. The module was chosen to have representative (generic) functionality most likely required from an L-band radar. For very large aperture phased-array spaceborne radar missions, the large dimensions of the array suggest the benefit of distributing the radar electronics into the antenna array. For such applications, this technology is essential in order to bring down the cost, mass, and power of the radar electronics module replicated in each panel of the array. For smaller sized arrays, a single module can be combined with the central radar controller and still provide the bene.ts of configuration .exibility, low power, and low mass. We present the design approach for the radar electronics module and the test results for its radio frequency (RF) portion: a miniature, low-power, radiation-hard L-band transceiver.

Xyce Parallel Electronic Simulator Users' Guide Version 6.8

DOE Office of Scientific and Technical Information (OSTI.GOV)

Keiter, Eric R.; Aadithya, Karthik Venkatraman; Mei, Ting

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been de- signed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: Capability to solve extremely large circuit problems by supporting large-scale parallel com- puting platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows onemore » to develop new types of analysis without requiring the implementation of analysis-specific device models. Device models that are specifically tailored to meet Sandia's needs, including some radiation- aware devices (for Sandia users only). Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase$-$ a message passing parallel implementation $-$ which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.« less

Multilevel photonic modules for millimeter-wave phased-array antennas

NASA Astrophysics Data System (ADS)

Paolella, Arthur C.; Bauerle, Athena; Joshi, Abhay M.; Wright, James G.; Coryell, Louis A.

2000-09-01

Millimeter wave phased array systems have antenna element sizes and spacings similar to MMIC chip dimensions by virtue of the operating wavelength. Designing modules in traditional planar packaing techniques are therefore difficult to implement. An advantageous way to maintain a small module footprint compatible with Ka-Band and high frequency systems is to take advantage of two leading edge technologies, opto- electronic integrated circuits (OEICs) and multilevel packaging technology. Under a Phase II SBIR these technologies are combined to form photonic modules for optically controlled millimeter wave phased array antennas. The proposed module, consisting of an OEIC integrated with a planar antenna array will operate on the 40GHz region. The OEIC consists of an InP based dual-depletion PIN photodetector and distributed amplifier. The multi-level module will be fabricated using an enhanced circuit processing thick film process. Since the modules are batch fabricated using an enhanced circuit processing thick film process. Since the modules are batch fabricated, using standard commercial processes, it has the potential to be low cost while maintaining high performance, impacting both military and commercial communications systems.

Implementing finite state machines in a computer-based teaching system

NASA Astrophysics Data System (ADS)

Hacker, Charles H.; Sitte, Renate

1999-09-01

Finite State Machines (FSM) are models for functions commonly implemented in digital circuits such as timers, remote controls, and vending machines. Teaching FSM is core in the curriculum of many university digital electronic or discrete mathematics subjects. Students often have difficulties grasping the theoretical concepts in the design and analysis of FSM. This has prompted the author to develop an MS-WindowsTM compatible software, WinState, that provides a tutorial style teaching aid for understanding the mechanisms of FSM. The animated computer screen is ideal for visually conveying the required design and analysis procedures. WinState complements other software for combinatorial logic previously developed by the author, and enhances the existing teaching package by adding sequential logic circuits. WinState enables the construction of a students own FSM, which can be simulated, to test the design for functionality and possible errors.

WFL: Microwave Applications of Thin Ferroelectric Films

NASA Technical Reports Server (NTRS)

Romanofsky, Robert

2013-01-01

We have developed a family of tunable microwave circuits, operating from X- through Ka-band, based on laser ablated BaxSr1-xTiO films on lanthanum aluminate and magnesium oxide substrates. Circuits include voltage controlled oscillators, filters, phase shifters and antennas. A review of the basic theory of operation of these devices will be presented along with measured performance. Emphasis has been on low-loss phase shifters to enable a new phased array architecture. The critical role of phase shifter loss and transient response in reflectarray antennas will be discussed. The Ferroelectric Reflectarray Critical Components Space Experiment was launched on the penultimate Space Shuttle, STS-134, in May of 2011. It included a bank of ferroelectric phase shifters with two different stoichiometries as well as ancillary electronics. The experiment package and status will be reported. In addition, unusual results of a Van der Pauw measurement involving a ferroelectric film grown on buffered high resisitivity silicon will be discussed.

Warpage of QFN Package in Post Mold Cure Process of integrated circuit packaging

NASA Astrophysics Data System (ADS)

Sriwithoon, Nattha; Ugsornrat, Kessararat; Srisuwitthanon, Warayoot; Thonglor, Panakamon

2017-09-01

This research studied about warpage of QFN package in post mold cure process of integrated circuit (IC) packages using pre-plated (PPF) leadframe. For IC package, epoxy molding compound (EMC) are molded by cross linking of compound stiffness but incomplete crosslinked network and leading the fully cured thermoset by post mold cure (PMC) process. The cure temperature of PMC can change microstructure of EMC in term of stress inside the package and effect to warpage of the package due to coefficient of thermal expansion (CTE) between EMC and leadframe. In experiment, cure temperatures were varied to check the effect of internal stress due to different cure temperature after completed post mold cure for TDFN 2×3 8L. The cure temperature were varied with 180 °C, 170 °C, 160 °C, and 150°C with cure time 4 and 6 hours, respectively. For analysis, the TDFN 2×3 8L packages were analyzed the warpage by thickness gauge and scanning acoustic microscope (SAM) after take the test samples out from the oven cure. The results confirmed that effect of different CTE between EMC and leadframe due to different cure temperature resulting to warpage of the TDFN 2×3 8L packages.

Adaptation of ion beam technology to microfabrication of solid state devices and transducers

NASA Technical Reports Server (NTRS)

Topich, J. A.

1978-01-01

A number of areas were investigated to determine the potential uses of ion beam techniques in the construction of solid state devices and transducers and the packaging of implantable electronics for biomedical applications. The five areas investigated during the past year were: (1) diode-like devices fabricated on textured silicon; (2) a photolithographic technique for patterning ion beam sputtered PVC (polyvinyl chloride); (3) use of sputtered Teflon as a protective coating for implantable pressure sensors; (4) the sputtering of Macor to seal implantable hybrid circuits; and (5) the use of sputtered Teflon to immobilize enzymes.

Packaging and Embedded Electronics for the Next Generation

NASA Technical Reports Server (NTRS)

Sampson, Michael J.

2010-01-01

This viewgraph presentation describes examples of electronic packaging that protects an electronic element from handling, contamination, shock, vibration and light penetration. The use of Hermetic and non-hermetic packaging is also discussed. The topics include: 1) What is Electronic Packaging? 2) Why Package Electronic Parts? 3) Evolution of Packaging; 4) General Packaging Discussion; 5) Advanced non-hermetic packages; 6) Discussion of Hermeticity; 7) The Class Y Concept and Possible Extensions; 8) Embedded Technologies; and 9) NEPP Activities.

Fault-tolerant, high-level quantum circuits: form, compilation and description

NASA Astrophysics Data System (ADS)

Paler, Alexandru; Polian, Ilia; Nemoto, Kae; Devitt, Simon J.

2017-06-01

Fault-tolerant quantum error correction is a necessity for any quantum architecture destined to tackle interesting, large-scale problems. Its theoretical formalism has been well founded for nearly two decades. However, we still do not have an appropriate compiler to produce a fault-tolerant, error-corrected description from a higher-level quantum circuit for state-of the-art hardware models. There are many technical hurdles, including dynamic circuit constructions that occur when constructing fault-tolerant circuits with commonly used error correcting codes. We introduce a package that converts high-level quantum circuits consisting of commonly used gates into a form employing all decompositions and ancillary protocols needed for fault-tolerant error correction. We call this form the (I)initialisation, (C)NOT, (M)measurement form (ICM) and consists of an initialisation layer of qubits into one of four distinct states, a massive, deterministic array of CNOT operations and a series of time-ordered X- or Z-basis measurements. The form allows a more flexible approach towards circuit optimisation. At the same time, the package outputs a standard circuit or a canonical geometric description which is a necessity for operating current state-of-the-art hardware architectures using topological quantum codes.

General technique for the integration of MIC/MMIC'S with waveguides

NASA Technical Reports Server (NTRS)

Geller, Bernard D. (Inventor); Zaghloul, Amir I. (Inventor)

1987-01-01

A technique for packaging and integrating of a microwave integrated circuit (MIC) or monolithic microwave integrated circuit (MMIC) with a waveguide uses a printed conductive circuit pattern on a dielectric substrate to transform impedance and mode of propagation between the MIC/MMIC and the waveguide. The virtually coplanar circuit pattern lies on an equipotential surface within the waveguide and therefore makes possible single or dual polarized mode structures.

21 CFR 814.39 - PMA supplements.

Code of Federal Regulations, 2014 CFR

2014-04-01

... sterilization procedures. (5) Changes in packaging. (6) Changes in the performance or design specifications, circuits, components, ingredients, principle of operation, or physical layout of the device. (7) Extension... the performance or design specifications, circuits, components, ingredients, principles of operation...

Lumped element filters for electronic warfare systems

NASA Astrophysics Data System (ADS)

Morgan, D.; Ragland, R.

1986-02-01

Increasing demands which future generations of electronic warfare (EW) systems are to satisfy include a reduction in the size of the equipment. The present paper is concerned with lumped element filters which can make a significant contribution to the downsizing of advanced EW systems. Lumped element filter design makes it possible to obtain very small package sizes by utilizing classical low frequency inductive and capacitive components which are small compared to the size of a wavelength. Cost-effective, temperature-stable devices can be obtained on the basis of new design techniques. Attention is given to aspects of design flexibility, an interdigital filter equivalent circuit diagram, conditions for which the use of lumped element filters can be recommended, construction techniques, a design example, and questions regarding the application of lumped element filters to EW processing systems.

A cryogenic multichannel electronically scanned pressure module

NASA Technical Reports Server (NTRS)

Shams, Qamar A.; Fox, Robert L.; Adcock, Edward E.; Kahng, Seun K.

1992-01-01

Consideration is given to a cryogenic multichannel electronically scanned pressure (ESP) module developed and tested over an extended temperature span from -184 to +50 C and a pressure range of 0 to 5 psig. The ESP module consists of 32 pressure sensor dice, four analog 8 differential-input multiplexers, and an amplifier circuit, all of which are packaged in a physical volume of 2 x 1 x 5/8 in with 32 pressure and two reference ports. Maximum nonrepeatability is measured at 0.21 percent of full-scale output. The ESP modules have performed consistently well over 15 times over the above temperature range and continue to work without any sign of degradation. These sensors are also immune to repeated thermal shock tests over a temperature change of 220 C/sec.

QDENSITY—A Mathematica quantum computer simulation

NASA Astrophysics Data System (ADS)

Juliá-Díaz, Bruno; Burdis, Joseph M.; Tabakin, Frank

2009-03-01

This Mathematica 6.0 package is a simulation of a Quantum Computer. The program provides a modular, instructive approach for generating the basic elements that make up a quantum circuit. The main emphasis is on using the density matrix, although an approach using state vectors is also implemented in the package. The package commands are defined in Qdensity.m which contains the tools needed in quantum circuits, e.g., multiqubit kets, projectors, gates, etc. New version program summaryProgram title: QDENSITY 2.0 Catalogue identifier: ADXH_v2_0 Program summary URL:http://cpc.cs.qub.ac.uk/summaries/ADXH_v2_0.html Program obtainable from: CPC Program Library, Queen's University, Belfast, N. Ireland Licensing provisions: Standard CPC licence, http://cpc.cs.qub.ac.uk/licence/licence.html No. of lines in distributed program, including test data, etc.: 26 055 No. of bytes in distributed program, including test data, etc.: 227 540 Distribution format: tar.gz Programming language: Mathematica 6.0 Operating system: Any which supports Mathematica; tested under Microsoft Windows XP, Macintosh OS X, and Linux FC4 Catalogue identifier of previous version: ADXH_v1_0 Journal reference of previous version: Comput. Phys. Comm. 174 (2006) 914 Classification: 4.15 Does the new version supersede the previous version?: Offers an alternative, more up to date, implementation Nature of problem: Analysis and design of quantum circuits, quantum algorithms and quantum clusters. Solution method: A Mathematica package is provided which contains commands to create and analyze quantum circuits. Several Mathematica notebooks containing relevant examples: Teleportation, Shor's Algorithm and Grover's search are explained in detail. A tutorial, Tutorial.nb is also enclosed. Reasons for new version: The package has been updated to make it fully compatible with Mathematica 6.0 Summary of revisions: The package has been updated to make it fully compatible with Mathematica 6.0 Running time: Most examples included in the package, e.g., the tutorial, Shor's examples, Teleportation examples and Grover's search, run in less than a minute on a Pentium 4 processor (2.6 GHz). The running time for a quantum computation depends crucially on the number of qubits employed.

Computer-Aided Design Package for Designers of Digital Optical Computers

DTIC Science & Technology

1991-02-01

circuit depth and in circuit breadth. It appears, from initial studies by PhD students Gupta and Majidi using the newly modified tools, that a few irregular...Gupta, which is based on an earlier tool developed by Majidi . The tool allows logic gates to have fan-ins and fan-outs that vary, and allows circuits

An application specific integrated circuit based multi-anode microchannel array readout system

NASA Technical Reports Server (NTRS)

Smeins, Larry G.; Stechman, John M.; Cole, Edward H.

1991-01-01

Size reduction of two new multi-anode microchannel array (MAMA) readout systems is described. The systems are based on two analog and one digital application specific integrated circuits (ASICs). The new readout systems reduce volume over previous discrete designs by 80 percent while improving electrical performance on virtually every significant parameter. Emphasis is made on the packaging used to achieve the volume reduction. Surface mount technology (SMT) is combined with modular construction for the analog portion of the readout. SMT reliability concerns and the board area impact of MIL SPEC SMT components is addressed. Package selection for the analog ASIC is discussed. Future sytems will require even denser packaging and the volume reduction progression is shown.

A low-mass faraday cup experiment for the solar wind

NASA Technical Reports Server (NTRS)

Lazarus, A. J.; Steinberg, J. T.; Mcnutt, R. L., Jr.

1993-01-01

Faraday cups have proven to be very reliable and accurate instruments capable of making 3-D velocity distribution measurements on spinning or 3-axis stabilized spacecraft. Faraday cup instrumentation continues to be appropriate for heliospheric missions. As an example, the reductions in mass possible relative to the solar wind detection system about to be flown on the WIND spacecraft were estimated. Through the use of technology developed or used at the MIT Center for Space Research but were not able to utilize for WIND: surface-mount packaging, field-programmable gate arrays, an optically-switched high voltage supply, and an integrated-circuit power converter, it was estimated that the mass of the Faraday Cup system could be reduced from 5 kg to 1.8 kg. Further redesign of the electronics incorporating hybrid integrated circuits as well as a decrease in the sensor size, with a corresponding increase in measurement cycle time, could lead to a significantly lower mass for other mission applications. Reduction in mass of the entire spacecraft-experiment system is critically dependent on early and continual collaborative efforts between the spacecraft engineers and the experimenters. Those efforts concern a range of issues from spacecraft structure to data systems to the spacecraft power voltage levels. Requirements for flight qualification affect use of newer, lighter electronics packaging and its implementation; the issue of quality assurance needs to be specifically addressed. Lower cost and reduced mass can best be achieved through the efforts of a relatively small group dedicated to the success of the mission. Such a group needs a fixed budget and greater control over quality assurance requirements, together with a reasonable oversight mechanism.

Hearing-aid tester

NASA Technical Reports Server (NTRS)

Kessinger, R.; Polhemus, J. T.; Waring, J. G.

1977-01-01

Hearing aids are automatically checked by circuit that applies half-second test signal every thirty minutes. If hearing-aid output is distorted, too small, or if battery is too low, a warning lamp is activated. Test circuit is incorporated directly into hearing-aid package.

Integrated digital printing of flexible circuits for wireless sensing (Conference Presentation)

NASA Astrophysics Data System (ADS)

Mei, Ping; Whiting, Gregory L.; Schwartz, David E.; Ng, Tse Nga; Krusor, Brent S.; Ready, Steve E.; Daniel, George; Veres, Janos; Street, Bob

2016-09-01

Wireless sensing has broad applications in a wide variety of fields such as infrastructure monitoring, chemistry, environmental engineering and cold supply chain management. Further development of sensing systems will focus on achieving light weight, flexibility, low power consumption and low cost. Fully printed electronics provide excellent flexibility and customizability, as well as the potential for low cost and large area applications, but lack solutions for high-density, high-performance circuitry. Conventional electronics mounted on flexible printed circuit boards provide high performance but are not digitally fabricated or readily customizable. Incorporation of small silicon dies or packaged chips into a printed platform enables high performance without compromising flexibility or cost. At PARC, we combine high functionality c-Si CMOS and digitally printed components and interconnects to create an integrated platform that can read and process multiple discrete sensors. Our approach facilitates customization to a wide variety of sensors and user interfaces suitable for a broad range of applications including remote monitoring of health, structures and environment. This talk will describe several examples of printed wireless sensing systems. The technologies required for these sensor systems are a mix of novel sensors, printing processes, conventional microchips, flexible substrates and energy harvesting power solutions.

Advanced packaging for Integrated Micro-Instruments

NASA Technical Reports Server (NTRS)

Lyke, James L.

1995-01-01

The relationship between packaging, microelectronics, and micro-electrical-mechanical systems (MEMS) is an important one, particularly when the edges of performance boundaries are pressed, as in the case of miniaturized systems. Packaging is a sort of physical backbone that enables the maximum performance of these systems to be realized, and the penalties imposed by conventional packing approaches is particularly limiting for MEMS devices. As such, advanced packaging approaches, such as multi-chip modules (MCM's) have been touted as a true means of electronic 'enablement' for a variety of application domains. Realizing an optimum system of packaging, however, in not as simple as replacing a set of single chip packages with a substrate of interconnections. Research at Phillips Laboratory has turned up a number of integrating options in the two- and three-dimensional rending of miniature systems with physical interconnection structures with intrinsically high performance. Not only do these structures motivate the redesign of integrated circuits (IC's) for lower power, but they possess interesting features that provide a framework for the direct integration of MEMS devices. Cost remains a barrier to the application of MEMS devices, even in space systems. Several innovations are suggested that will result in lower cost and more rapid cycle time. First, the novelty of a 'constant floor plan' MCM which encapsulates a variety of commonly used components into a stockable, easily customized assembly is discussed. Next, the use of low-cost substrates is examined. The anticipated advent of ultra-high density interconnect (UHDI) is suggested as the limit argument of advanced packaging. Finally, the concept of a heterogeneous 3-D MCM system is outlined that allows for the combination of different compatible packaging approaches into a uniformly dense structure that could also include MEMS-based sensors.

Advanced Packaging for VLSI/VHSIC (Very Large Scale Integrated Circuits/Very High Speed Integrated Circuits) Applications: Electrical, Thermal, and Mechanical Considerations - An IR&D Report.

DTIC Science & Technology

1987-11-01

developed that can be used by circuit engineers to extract the maximum performance from the devices on various board technologies including multilayer ceramic...Design guidelines have been developed that can be used by circuit engineers to extract the maxi- mum performance from the devices on various board...25 Attenuation and Dispersion Effects ......................................... 27 Skin Effect

Silicon photonics integrated circuits: a manufacturing platform for high density, low power optical I/O's.

PubMed

Absil, Philippe P; Verheyen, Peter; De Heyn, Peter; Pantouvaki, Marianna; Lepage, Guy; De Coster, Jeroen; Van Campenhout, Joris

2015-04-06

Silicon photonics integrated circuits are considered to enable future computing systems with optical input-outputs co-packaged with CMOS chips to circumvent the limitations of electrical interfaces. In this paper we present the recent progress made to enable dense multiplexing by exploiting the integration advantage of silicon photonics integrated circuits. We also discuss the manufacturability of such circuits, a key factor for a wide adoption of this technology.

Ultra-Reliable Digital Avionics (URDA) processor

NASA Astrophysics Data System (ADS)

Branstetter, Reagan; Ruszczyk, William; Miville, Frank

1994-10-01

Texas Instruments Incorporated (TI) developed the URDA processor design under contract with the U.S. Air Force Wright Laboratory and the U.S. Army Night Vision and Electro-Sensors Directorate. TI's approach couples advanced packaging solutions with advanced integrated circuit (IC) technology to provide a high-performance (200 MIPS/800 MFLOPS) modular avionics processor module for a wide range of avionics applications. TI's processor design integrates two Ada-programmable, URDA basic processor modules (BPM's) with a JIAWG-compatible PiBus and TMBus on a single F-22 common integrated processor-compatible form-factor SEM-E avionics card. A separate, high-speed (25-MWord/second 32-bit word) input/output bus is provided for sensor data. Each BPM provides a peak throughput of 100 MIPS scalar concurrent with 400-MFLOPS vector processing in a removable multichip module (MCM) mounted to a liquid-flowthrough (LFT) core and interfacing to a processor interface module printed wiring board (PWB). Commercial RISC technology coupled with TI's advanced bipolar complementary metal oxide semiconductor (BiCMOS) application specific integrated circuit (ASIC) and silicon-on-silicon packaging technologies are used to achieve the high performance in a miniaturized package. A Mips R4000-family reduced instruction set computer (RISC) processor and a TI 100-MHz BiCMOS vector coprocessor (VCP) ASIC provide, respectively, the 100 MIPS of a scalar processor throughput and 400 MFLOPS of vector processing throughput for each BPM. The TI Aladdim ASIC chipset was developed on the TI Aladdin Program under contract with the U.S. Army Communications and Electronics Command and was sponsored by the Advanced Research Projects Agency with technical direction from the U.S. Army Night Vision and Electro-Sensors Directorate.

Xyce™ Parallel Electronic Simulator Users' Guide, Version 6.5.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Keiter, Eric R.; Aadithya, Karthik V.; Mei, Ting

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to developmore » new types of analysis without requiring the implementation of analysis-specific device models. Device models that are specifically tailored to meet Sandia's needs, including some radiation- aware devices (for Sandia users only). Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase -- a message passing parallel implementation -- which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows. The information herein is subject to change without notice. Copyright © 2002-2016 Sandia Corporation. All rights reserved.« less

Nanogranular soft magnetic material and on-package integrated inductors

NASA Astrophysics Data System (ADS)

Li, Liangliang

2007-12-01

Integrated inductors used in electronic circuits are mainly spiral-shaped aluminum devices fabricated on Si chip. They have several disadvantages---large silicon area consumption, high DC resistance and high cost. An attractive approach to address these issues is directly integrating inductors into package substrates, which provide plenty of usage area, low resistance and low cost. The goals of this dissertation are designing and fabricating magnetic and air-core inductors with characteristic low resistance and high quality factor on package substrates. The research work includes three parts which are summarized below. First, the CoFeHfO nanogranular magnetic material developed on Si wafers and package substrates by pulsed DC reactive sputtering were investigated. On Si wafers, the optimized CoFeHfO film has soft magnetic properties. On printed circuit board (PCB) substrates, these magnetic properties degrade due to the rough surface. Surface planarization such as chemical-mechanical polishing can be applied on PCB substrates to reduce the surface roughness and hence improve these properties. Second, on-package inductors with small resistances and high quality factors were designed, fabricated, measured and analyzed. Air-core and magnetic inductors (20 design variations) were built on 8-inch PCB substrates. The DC resistances of these inductors are less than 12 mO, one of the lowest values ever reported. The maximum quality factors can be as large as ˜80 at around 1 GHz for the air-core inductors and ˜25 at 200 MHz for the magnetic inductors. Third, inductor simulation was carried out to study the effects of magnetic materials on the properties of inductors using the Ansoft HFSS software package. The measurement data for the permeability spectra of the CoFeHfO film and the tensor nature of the permeability were taken into account in the simulation. The simulation results matched the experimental data for the inductances, resistances and quality factors. This established an accurate method for modeling high-frequency magnetic devices. Using this method, an inductor with a closed magnetic core was studied by varying the geometry of the core and copper coil. It has been found that the inductance of this inductor depends strongly on whether the permeability of the magnetic core is isotropic or anisotropic.

New Magneto-Inductive DC Magnetometer for Space Missions

NASA Astrophysics Data System (ADS)

Moldwin, M.; Bronner, B.; Regoli, L.; Thoma, J.; Shen, A.; Jenkins, G.; Cutler, J.

2017-12-01

A new magneto-inductive DC magnetometer is being developed at the University of Michigan that provides fluxgate quality measurements in a low mass, volume, power and cost package. The magnetometer enables constellation-class missions not only due to its low-resource requirements, but also its potential for commercial integrated circuit fabrication. The magneto-inductive operating principle is based on a simple resistance-inductor (RL) circuit and involves measurement of the time it takes to charge and discharge the inductor between an upper and lower threshold by means of a Schmitt trigger oscillator. This time is proportional to the inductance that in turn is proportional to the field strength. We have modeled the operating principle in the circuit simulator SPICE and have built a proto-type using modified commercial sensors. The performance specifications include a dynamic range over the full-Earth's field, sampling rates up to 80 Hz, sensor and electronics mass of about 30 g, circuit board and sensor housing volume of < 100 cm3, and power consumption of about 5 mW. This system's noise levels are predicted to be about 100 pT /√Hz @ 1 Hz with a precision of about 100 pT. Due to the simple circuit design, lack of an analog-to-digital converter, and choice of oscillator, we anticipate that it will be extremely temperature stable and radiation tolerant. This presentation will describe the constellation mission enabling design, the development status and the testing results of this new magnetometer.

Fracture Behaviors of Sn-Cu Intermetallic Compound Layer in Ball Grid Array Induced by Thermal Shock

NASA Astrophysics Data System (ADS)

Shen, Jun; Zhai, Dajun; Cao, Zhongming; Zhao, Mali; Pu, Yayun

2014-02-01

In this work, thermal shock reliability testing and finite-element analysis (FEA) of solder joints between ball grid array components and printed circuit boards with Cu pads were used to investigate the failure mechanism of solder interconnections. The morphologies, composition, and thickness of Sn-Cu intermetallic compounds (IMC) at the interface of Sn-3.0Ag-0.5Cu lead-free solder alloy and Cu substrates were investigated by scanning electron microscopy and transmission electron microscopy. Based on the experimental observations and FEA results, it can be recognized that the origin and propagation of cracks are caused primarily by the difference between the coefficient of thermal expansion of different parts of the packaged products, the growth behaviors and roughness of the IMC layer, and the grain size of the solder balls.

Comparing the Robustness of High-Frequency Traveling-Wave Tube Slow-Wave Circuits

NASA Technical Reports Server (NTRS)

Chevalier, Christine T.; Wilson, Jeffrey D.; Kory, Carol L.

2007-01-01

A three-dimensional electromagnetic field simulation software package was used to compute the cold-test parameters, phase velocity, on-axis interaction impedance, and attenuation, for several high-frequency traveling-wave tube slow-wave circuit geometries. This research effort determined the effects of variations in circuit dimensions on cold-test performance. The parameter variations were based on the tolerances of conventional micromachining techniques.

Alignment Jig for the Precise Measurement of THz Radiation

NASA Technical Reports Server (NTRS)

Javadi, Hamid H.

2009-01-01

A miniaturized instrumentation package comprising a (1) Global Positioning System (GPS) receiver, (2) an inertial measurement unit (IMU) consisting largely of surface-micromachined sensors of the microelectromechanical systems (MEMS) type, and (3) a microprocessor, all residing on a single circuit board, is part of the navigation system of a compact robotic spacecraft intended to be released from a larger spacecraft [e.g., the International Space Station (ISS)] for exterior visual inspection of the larger spacecraft. Variants of the package may also be useful in terrestrial collision-detection and -avoidance applications. The navigation solution obtained by integrating the IMU outputs is fed back to a correlator in the GPS receiver to aid in tracking GPS signals. The raw GPS and IMU data are blended in a Kalman filter to obtain an optimal navigation solution, which can be supplemented by range and velocity data obtained by use of (l) a stereoscopic pair of electronic cameras aboard the robotic spacecraft and/or (2) a laser dynamic range imager aboard the ISS. The novelty of the package lies mostly in those aspects of the design of the MEMS IMU that pertain to controlling mechanical resonances and stabilizing scale factors and biases.

GPS/MEMS IMU/Microprocessor Board for Navigation

NASA Technical Reports Server (NTRS)

Gender, Thomas K.; Chow, James; Ott, William E.

2009-01-01

A miniaturized instrumentation package comprising a (1) Global Positioning System (GPS) receiver, (2) an inertial measurement unit (IMU) consisting largely of surface-micromachined sensors of the microelectromechanical systems (MEMS) type, and (3) a microprocessor, all residing on a single circuit board, is part of the navigation system of a compact robotic spacecraft intended to be released from a larger spacecraft [e.g., the International Space Station (ISS)] for exterior visual inspection of the larger spacecraft. Variants of the package may also be useful in terrestrial collision-detection and -avoidance applications. The navigation solution obtained by integrating the IMU outputs is fed back to a correlator in the GPS receiver to aid in tracking GPS signals. The raw GPS and IMU data are blended in a Kalman filter to obtain an optimal navigation solution, which can be supplemented by range and velocity data obtained by use of (l) a stereoscopic pair of electronic cameras aboard the robotic spacecraft and/or (2) a laser dynamic range imager aboard the ISS. The novelty of the package lies mostly in those aspects of the design of the MEMS IMU that pertain to controlling mechanical resonances and stabilizing scale factors and biases.

High-Tc superconductor coplanar waveguide filter

NASA Technical Reports Server (NTRS)

Chew, Wilbert; Bajuk, Louis J.; Cooley, Thomas W.; Foote, Marc C.; Hunt, Brian D.; Rascoe, Daniel L.; Riley, A. L.

1991-01-01

Coplanar waveguide (CPW) low-pass filters made of YBa2Cu3O(7-delta) (YBCO) on LaAlO3 substrates, with dimensions suited for integrated circuits, were fabricated and packaged. A complete filter gives a true idea of the advantages and difficulties in replacing thin-film metal with a high-temperature superconductor in a practical circuit. Measured insertion losses in liquid nitrogen were superior to the loss of a similar thin-film copper filter throughout the 0- to 9.5-GHz passband. These results demonstrate the performance of fully patterned YBCO in a practical CPW structure after sealing in a hermetic package.

PCSIM: A Parallel Simulation Environment for Neural Circuits Fully Integrated with Python

PubMed Central

Pecevski, Dejan; Natschläger, Thomas; Schuch, Klaus

2008-01-01

The Parallel Circuit SIMulator (PCSIM) is a software package for simulation of neural circuits. It is primarily designed for distributed simulation of large scale networks of spiking point neurons. Although its computational core is written in C++, PCSIM's primary interface is implemented in the Python programming language, which is a powerful programming environment and allows the user to easily integrate the neural circuit simulator with data analysis and visualization tools to manage the full neural modeling life cycle. The main focus of this paper is to describe PCSIM's full integration into Python and the benefits thereof. In particular we will investigate how the automatically generated bidirectional interface and PCSIM's object-oriented modular framework enable the user to adopt a hybrid modeling approach: using and extending PCSIM's functionality either employing pure Python or C++ and thus combining the advantages of both worlds. Furthermore, we describe several supplementary PCSIM packages written in pure Python and tailored towards setting up and analyzing neural simulations. PMID:19543450

Push plate, mounting assembly, circuit board, and method of assembling thereof for ball grid array packages

DOE Office of Scientific and Technical Information (OSTI.GOV)

Vaughn, Mark R.; Montague, Stephen

A push plate that includes springs in the form of cantilever flexures and an inspection window is disclosed. The push plate provides a known, uniform, down force and minimal torque to a package to be tested. The cantilevers have a known, calculable down force producing stiffness. The window provides for viewing of the package during testing.

IEEE WMED 2016 Homepage

Science.gov Websites

characterization, design, and new device technologies. This workshop will consist of invited talks, contributed and Reliability Semiconductor package reliability, Design for Manufacturability, Stacked die packaging and Novel assembly processes Microelectronic Circuit Design New product design, high-speed and/or low

Report on Project to Characterize Multi-Junction Solar Cells in the Stratosphere using Low-Cost Balloon and Communication Technologies

NASA Technical Reports Server (NTRS)

Mirza, Ali; Sant, David; Woodyard, James R.; Johnston, Richard R.; Brown, William J.

2002-01-01

Balloon, control and communication technologies are under development in our laboratory for testing multi-junction solar cells in the stratosphere to achieve near AM0 conditions. One flight, Suntracker I, has been carried out reported earlier. We report on our efforts in preparation for a second flight, Suntracker II, that was aborted due to hardware problems. The package for Suntracker I system has been modified to include separate electronics and battery packs for the 70 centimeter and 2 meter systems. The collimator control system and motor gearboxes have been redesigned to address problems with the virtual stops and backlash. Surface mount technology on a printed circuit board was used in place of the through-hole prototype circuit in efforts to reduce weight and size, and improve reliability. A mobile base station has been constructed that includes a 35' tower with a two axis rotator and multi-element yagi antennas. Modifications in Suntracker I and the factors that lead to aborting Suntracker II are discussed.

Plastic substrates for active matrix liquid crystal display incapable of withstanding processing temperature of over 200 C and method of fabrication

DOEpatents

Carey, P.G.; Smith, P.M.; Havens, J.H.; Jones, P.

1999-01-05

Bright-polarizer-free, active-matrix liquid crystal displays (AMLCDs) are formed on plastic substrates. The primary components of the display are a pixel circuit fabricated on one plastic substrate, an intervening liquid-crystal material, and a counter electrode on a second plastic substrate. The-pixel circuit contains one or more thin-film transistors (TFTs) and either a transparent or reflective pixel electrode manufactured at sufficiently low temperatures to avoid damage to the plastic substrate. Fabrication of the TFTs can be carried out at temperatures less than 100 C. The liquid crystal material is a commercially made nematic curvilinear aligned phase (NCAP) film. The counter electrode is comprised of a plastic substrate coated with a transparent conductor, such as indium-doped tin oxide (ITO). By coupling the active matrix with NCAP, a high-information content can be provided in a bright, fully plastic package. Applications include any low cost portable electronics containing flat displays where ruggedization of the display is desired. 12 figs.

Plastic substrates for active matrix liquid crystal display incapable of withstanding processing temperature of over 200.degree. C and method of fabrication

DOEpatents

Carey, Paul G.; Smith, Patrick M.; Havens, John; Jones, Phil

1999-01-01

Bright-polarizer-free, active-matrix liquid crystal displays (AMLCDs) are formed on plastic substrates. The primary components of the display are a pixel circuit fabricated on one plastic substrate, an intervening liquid-crystal material, and a counter electrode on a second plastic substrate. The-pixel circuit contains one or more thin-film transistors (TFTs) and either a transparent or reflective pixel electrode manufactured at sufficiently low temperatures to avoid damage to the plastic substrate. Fabrication of the TFTs can be carried out at temperatures less than 100.degree. C. The liquid crystal material is a commercially made nematic curvilinear aligned phase (NCAP) film. The counter electrode is comprised of a plastic substrate coated with a transparent conductor, such as indium-doped tin oxide (ITO). By coupling the active matrix with NCAP, a high-information content can be provided in a bright, fully plastic package. Applications include any low cost portable electronics containing flat displays where ruggedization of the display is desired.

Hermetic diode laser transmitter module

NASA Astrophysics Data System (ADS)

Ollila, Jyrki; Kautio, Kari; Vahakangas, Jouko; Hannula, Tapio; Kopola, Harri K.; Oikarinen, Jorma; Sivonen, Matti

1999-04-01

In very demanding optoelectronic sensor applications it is necessary to encapsulate semiconductor components hermetically in metal housings to ensure reliable operation of the sensor. In this paper we report on the development work to package a laser diode transmitter module for a time- off-light distance sensor application. The module consists of a lens, laser diode, electronic circuit and optomechanics. Specifications include high acceleration, -40....+75 degree(s)C temperature range, very low gas leakage and mass-production capability. We have applied solder glasses for sealing optical lenses and electrical leads hermetically into a metal case. The lens-metal case sealing has been made by using a special soldering glass preform preserving the optical quality of the lens. The metal housings are finally sealed in an inert atmosphere by welding. The assembly concept to retain excellent optical power and tight optical axis alignment specifications is described. The reliability of the laser modules manufactured has been extensively tested using different aging and environmental test procedures. Sealed packages achieve MIL- 883 standard requirements for gas leakage.

Capacitive charge generation apparatus and method for testing circuits

DOEpatents

Cole, E.I. Jr.; Peterson, K.A.; Barton, D.L.

1998-07-14

An electron beam apparatus and method for testing a circuit are disclosed. The electron beam apparatus comprises an electron beam incident on an outer surface of an insulating layer overlying one or more electrical conductors of the circuit for generating a time varying or alternating current electrical potential on the surface; and a measurement unit connected to the circuit for measuring an electrical signal capacitively coupled to the electrical conductors to identify and map a conduction state of each of the electrical conductors, with or without an electrical bias signal being applied to the circuit. The electron beam apparatus can further include a secondary electron detector for forming a secondary electron image for registration with a map of the conduction state of the electrical conductors. The apparatus and method are useful for failure analysis or qualification testing to determine the presence of any open-circuits or short-circuits, and to verify the continuity or integrity of electrical conductors buried below an insulating layer thickness of 1-100 {micro}m or more without damaging or breaking down the insulating layer. The types of electrical circuits that can be tested include integrated circuits, multi-chip modules, printed circuit boards and flexible printed circuits. 7 figs.

Capacitive charge generation apparatus and method for testing circuits

DOEpatents

Cole, Jr., Edward I.; Peterson, Kenneth A.; Barton, Daniel L.

1998-01-01

An electron beam apparatus and method for testing a circuit. The electron beam apparatus comprises an electron beam incident on an outer surface of an insulating layer overlying one or more electrical conductors of the circuit for generating a time varying or alternating current electrical potential on the surface; and a measurement unit connected to the circuit for measuring an electrical signal capacitively coupled to the electrical conductors to identify and map a conduction state of each of the electrical conductors, with or without an electrical bias signal being applied to the circuit. The electron beam apparatus can further include a secondary electron detector for forming a secondary electron image for registration with a map of the conduction state of the electrical conductors. The apparatus and method are useful for failure analysis or qualification testing to determine the presence of any open-circuits or short-circuits, and to verify the continuity or integrity of electrical conductors buried below an insulating layer thickness of 1-100 .mu.m or more without damaging or breaking down the insulating layer. The types of electrical circuits that can be tested include integrated circuits, multi-chip modules, printed circuit boards and flexible printed circuits.

Reduced-order modeling of piezoelectric energy harvesters with nonlinear circuits under complex conditions

NASA Astrophysics Data System (ADS)

Xiang, Hong-Jun; Zhang, Zhi-Wei; Shi, Zhi-Fei; Li, Hong

2018-04-01

A fully coupled modeling approach is developed for piezoelectric energy harvesters in this work based on the use of available robust finite element packages and efficient reducing order modeling techniques. At first, the harvester is modeled using finite element packages. The dynamic equilibrium equations of harvesters are rebuilt by extracting system matrices from the finite element model using built-in commands without any additional tools. A Krylov subspace-based scheme is then applied to obtain a reduced-order model for improving simulation efficiency but preserving the key features of harvesters. Co-simulation of the reduced-order model with nonlinear energy harvesting circuits is achieved in a system level. Several examples in both cases of harmonic response and transient response analysis are conducted to validate the present approach. The proposed approach allows to improve the simulation efficiency by several orders of magnitude. Moreover, the parameters used in the equivalent circuit model can be conveniently obtained by the proposed eigenvector-based model order reduction technique. More importantly, this work establishes a methodology for modeling of piezoelectric energy harvesters with any complicated mechanical geometries and nonlinear circuits. The input load may be more complex also. The method can be employed by harvester designers to optimal mechanical structures or by circuit designers to develop novel energy harvesting circuits.

Electronic circuits: A compilation. [for electronic equipment in telecommunication

NASA Technical Reports Server (NTRS)

1976-01-01

A compilation containing articles on newly developed electronic circuits and systems is presented. It is divided into two sections: (1) section 1 on circuits and techniques of particular interest in communications technology, and (2) section 2 on circuits designed for a variety of specific applications. The latest patent information available is also given. Circuit diagrams are shown.

Electronic circuits and systems: A compilation. [including integrated circuits, logic circuits, varactor diode circuits, low pass filters, and optical equipment circuits

NASA Technical Reports Server (NTRS)

1975-01-01

Technological information is presented electronic circuits and systems which have potential utility outside the aerospace community. Topics discussed include circuit components such as filters, converters, and integrators, circuits designed for use with specific equipment or systems, and circuits designed primarily for use with optical equipment or displays.

Electronic circuit for measuring series connected electrochemical cell voltages

DOEpatents

Ashtiani, Cyrus N.; Stuart, Thomas A.

2000-01-01

An electronic circuit for measuring voltage signals in an energy storage device is disclosed. The electronic circuit includes a plurality of energy storage cells forming the energy storage device. A voltage divider circuit is connected to at least one of the energy storage cells. A current regulating circuit is provided for regulating the current through the voltage divider circuit. A voltage measurement node is associated with the voltage divider circuit for producing a voltage signal which is proportional to the voltage across the energy storage cell.

Milliwatt dc/dc Inverter

NASA Technical Reports Server (NTRS)

Mclyman, C. W.

1983-01-01

Compact dc/dc inverter uses single integrated-circuit package containing six inverter gates that generate and amplify 100-kHz square-wave switching signal. Square-wave switching inverts 10-volt local power to isolated voltage at another desired level. Relatively high operating frequency reduces size of filter capacitors required, resulting in small package unit.

An Electronics Course Emphasizing Circuit Design

ERIC Educational Resources Information Center

Bergeson, Haven E.

1975-01-01

Describes a one-quarter introductory electronics course in which the students use a variety of inexpensive integrated circuits to design and construct a large number of useful circuits. Presents the subject matter of the course in three parts: linear circuits, digital circuits, and more complex circuits. (GS)

Towards co-packaging of photonics and microelectronics in existing manufacturing facilities

NASA Astrophysics Data System (ADS)

Janta-Polczynski, Alexander; Cyr, Elaine; Bougie, Jerome; Drouin, Alain; Langlois, Richard; Childers, Darrell; Takenobu, Shotaro; Taira, Yoichi; Lichoulas, Ted W.; Kamlapurkar, Swetha; Engelmann, Sebastian; Fortier, Paul; Boyer, Nicolas; Barwicz, Tymon

2018-02-01

The impact of integrated photonics on optical interconnects is currently muted by challenges in photonic packaging and in the dense integration of photonic modules with microelectronic components on printed circuit boards. Single mode optics requires tight alignment tolerance for optical coupling and maintaining this alignment in a cost-efficient package can be challenging during thermal excursions arising from downstream microelectronic assembly processes. In addition, the form factor of typical fiber connectors is incompatible with the dense module integration expected on printed circuit boards. We have implemented novel approaches to interfacing photonic chips to standard optical fibers. These leverage standard high throughput microelectronic assembly tooling and self-alignment techniques resulting in photonic packaging that is scalable in manufacturing volume and in the number of optical IOs per chip. In addition, using dense optical fiber connectors with space-efficient latching of fiber patch cables results in compact module size and efficient board integration, bringing the optics closer to the logic chip to alleviate bandwidth bottlenecks. This packaging direction is also well suited for embedding optics in multi-chip modules, including both photonic and microelectronic chips. We discuss the challenges and rewards in this type of configuration such as thermal management and signal integrity.

NASA Electronic Parts and Packaging Program

NASA Technical Reports Server (NTRS)

Kayali, Sammy

2000-01-01

NEPP program objectives are to: (1) Access the reliability of newly available electronic parts and packaging technologies for usage on NASA projects through validations, assessments, and characterizations, and the development of test methods/tools; (2)Expedite infusion paths for advanced (emerging) electronic parts and packaging technologies by evaluations of readiness for manufacturability and project usage consideration; (3) Provide NASA projects with technology selection, application, and validation guidelines for electronic parts and packaging hardware and processes; nd (4) Retain and disseminate electronic parts and packaging quality assurance, reliability validations, tools, and availability information to the NASA community.

Development of Electronics for Low-Temperature Space Missions

NASA Technical Reports Server (NTRS)

Patterson, Richard L.; Hammoud, Ahmad; Dickman, John E.; Gerber, Scott S.; Overton, Eric

2001-01-01

Electronic systems that are capable of operating at cryogenic temperatures will be needed for many future NASA space missions, including deep space probes and spacecraft for planetary surface exploration. In addition to being able to survive the harsh deep space environment, low-temperature electronics would help improve circuit performance, increase system efficiency, and reduce payload development and launch costs. Terrestrial applications where components and systems must operate in low-temperature environments include cryogenic instrumentation, superconducting magnetic energy storage, magnetic levitation transportation systems, and arctic exploration. An ongoing research and development project for the design, fabrication, and characterization of low-temperature electronics and supporting technologies at NASA Glenn Research Center focuses on efficient power systems capable of surviving in and exploiting the advantages of low-temperature environments. Supporting technologies include dielectric and insulating materials, semiconductor devices, passive power components, optoelectronic devices, and packaging and integration of the developed components into prototype flight hardware. An overview of the project is presented, including a description of the test facilities, a discussion of selected data from component testing, and a presentation of ongoing research activities being performed in collaboration with various organizations.

Xyce Parallel Electronic Simulator : users' guide, version 2.0.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hoekstra, Robert John; Waters, Lon J.; Rankin, Eric Lamont

2004-06-01

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator capable of simulating electrical circuits at a variety of abstraction levels. Primarily, Xyce has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability the current state-of-the-art in the following areas: {sm_bullet} Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). Note that this includes support for most popular parallel and serial computers. {sm_bullet} Improved performance for allmore » numerical kernels (e.g., time integrator, nonlinear and linear solvers) through state-of-the-art algorithms and novel techniques. {sm_bullet} Device models which are specifically tailored to meet Sandia's needs, including many radiation-aware devices. {sm_bullet} A client-server or multi-tiered operating model wherein the numerical kernel can operate independently of the graphical user interface (GUI). {sm_bullet} Object-oriented code design and implementation using modern coding practices that ensure that the Xyce Parallel Electronic Simulator will be maintainable and extensible far into the future. Xyce is a parallel code in the most general sense of the phrase - a message passing of computing platforms. These include serial, shared-memory and distributed-memory parallel implementation - which allows it to run efficiently on the widest possible number parallel as well as heterogeneous platforms. Careful attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows. One feature required by designers is the ability to add device models, many specific to the needs of Sandia, to the code. To this end, the device package in the Xyce These input formats include standard analytical models, behavioral models look-up Parallel Electronic Simulator is designed to support a variety of device model inputs. tables, and mesh-level PDE device models. Combined with this flexible interface is an architectural design that greatly simplifies the addition of circuit models. One of the most important feature of Xyce is in providing a platform for computational research and development aimed specifically at the needs of the Laboratory. With Xyce, Sandia now has an 'in-house' capability with which both new electrical (e.g., device model development) and algorithmic (e.g., faster time-integration methods) research and development can be performed. Ultimately, these capabilities are migrated to end users.« less

New concepts for HgI2 scintillator gamma ray spectroscopy

NASA Technical Reports Server (NTRS)

Iwanczyk, Jan S.

1994-01-01

The primary goals of this project are development of the technology for HgI2 photodetectors (PD's), development of a HgI2/scintillator gamma detector, development of electronics, and development of a prototype gamma spectrometer. Work on the HgI2 PD's involved HgI2 purification and crystal growth, detector surface and electrical contact studies, PD structure optimization, encapsulation and packaging, and testing. Work on the HgI2/scintillator gamma detector involved a study of the optical - mechanical coupling for the optimization of CsI(Tl)/HgI2 gamma ray detectors and determination of the relationship between resolution versus scintillator type and size. The development of the electronics focused on low noise amplification circuits using different preamp input FET's and the use of a coincidence technique to maximize the signal, minimize the noise contribution in the gamma spectra, and improve the overall system resolution.

System on a Chip (SoC) Overview

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.

2010-01-01

System-on-a-chip or system on chip (SoC or SOC) refers to integrating all components of a computer or other electronic system into a single integrated circuit (chip). It may contain digital, analog, mixed-signal, and often radio-frequency functions all on a single chip substrate. Complexity drives it all: Radiation tolerance and testability are challenges for fault isolation, propagation, and validation. Bigger single silicon die than flown before and technology is scaling below 90nm (new qual methods). Packages have changed and are bigger and more difficult to inspect, test, and understand. Add in embedded passives. Material interfaces are more complex (underfills, processing). New rules for board layouts. Mechanical and thermal designs, etc.

77 FR 3386 - Export and Reexport License Requirements for Certain Microwave and Millimeter Wave Electronic...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-01-24

... electronic components. The two components are packaged high electron mobility transistors and packaged..., 2012, FR Doc. 2012- 135). The two components are packaged high electron mobility transistors (HEMT) and...

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rodenbeck, Christopher T; Girardi, Michael

Internal nodes of a constituent integrated circuit (IC) package of a multichip module (MCM) are protected from excessive charge during plasma cleaning of the MCM. The protected nodes are coupled to an internal common node of the IC package by respectively associated discharge paths. The common node is connected to a bond pad of the IC package. During MCM assembly, and before plasma cleaning, this bond pad receives a wire bond to a ground bond pad on the MCM substrate.

Paperless Work Package Application

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kilgore, Jr., William R.; Morrell, Jr., Otto K.; Morrison, Dan

2014-07-31

Paperless Work Package (PWP) System is a computer program process that takes information from Asset Suite, provides a platform for other electronic inputs, Processes the inputs into an electronic package that can be downloaded onto an electronic work tablet or laptop computer, provides a platform for electronic inputs into the work tablet, and then transposes those inputs back into Asset Suite and to permanent SRS records. The PWP System will basically eliminate paper requirements from the maintenance work control system. The program electronically relays the instructions given by the planner to work on a piece of equipment which is currentlymore » relayed via a printed work package. The program does not control/approve what is done. The planner will continue to plan the work package, the package will continue to be routed, approved, and scheduled. The supervisor reviews and approves the work to be performed and assigns work to individuals or to a work group. (The supervisor conducts pre job briefings with the workers involved in the job) The Operations Manager (Work Controlling Entity) approves the work package electronically for the work that will be done in his facility prior to work starting. The PWP System will provide the package in an electronic form. All the reviews, approvals, and safety measures taken by people outside the electronic package does not change from the paper driven work packages.« less

Packaging of microwave integrated circuits operating beyond 100 GHz

NASA Technical Reports Server (NTRS)

Samoska, L.; Daniel, E.; Sokolov, V.; Sommerfeldt, S.; Bublitz, J.; Olson, K.; Gilbert, B.; Chow, D.

2002-01-01

Several methods of packaging high speed (75-330 GHz) InP HEMT MMIC devices are discussed. Coplanar wirebonding is presented with measured insertion loss of less than 0.5dB and return loss better than -17 dB from DC to 110 GHz. A motherboard/daughterboard packaging scheme is presented which supports minimum loss chains of MMICs using this coplanar wirebonding method. Split waveguide block packaging approaches are presented in G-band (140-220 GHz) with two types of MMIC-waveguide transitions: E-plane probe andantipodal finline.

[Not Available].

PubMed

Pecevski, Dejan; Natschläger, Thomas; Schuch, Klaus

2009-01-01

The Parallel Circuit SIMulator (PCSIM) is a software package for simulation of neural circuits. It is primarily designed for distributed simulation of large scale networks of spiking point neurons. Although its computational core is written in C++, PCSIM's primary interface is implemented in the Python programming language, which is a powerful programming environment and allows the user to easily integrate the neural circuit simulator with data analysis and visualization tools to manage the full neural modeling life cycle. The main focus of this paper is to describe PCSIM's full integration into Python and the benefits thereof. In particular we will investigate how the automatically generated bidirectional interface and PCSIM's object-oriented modular framework enable the user to adopt a hybrid modeling approach: using and extending PCSIM's functionality either employing pure Python or C++ and thus combining the advantages of both worlds. Furthermore, we describe several supplementary PCSIM packages written in pure Python and tailored towards setting up and analyzing neural simulations.

Stretchable polymer-based electronic device

DOEpatents

Maghribi, Mariam N [Livermore, CA; Krulevitch, Peter A [Pleasanton, CA; Davidson, James Courtney [Livermore, CA; Wilson, Thomas S [Castro Valley, CA; Hamilton, Julie K [Tracy, CA; Benett, William J [Livermore, CA; Tovar, Armando R [San Antonio, TX

2008-02-26

A stretchable electronic circuit or electronic device and a polymer-based process to produce a circuit or electronic device containing a stretchable conducting circuit. The stretchable electronic apparatus has a central longitudinal axis and the apparatus is stretchable in a longitudinal direction generally aligned with the central longitudinal axis. The apparatus comprises a stretchable polymer body and at least one circuit line operatively connected to the stretchable polymer body. The circuit line extends in the longitudinal direction and has a longitudinal component that extends in the longitudinal direction and has an offset component that is at an angle to the longitudinal direction. The longitudinal component and the offset component allow the apparatus to stretch in the longitudinal direction while maintaining the integrity of the circuit line.

Foldable graphene electronic circuits based on paper substrates.

PubMed

Hyun, Woo Jin; Park, O Ok; Chin, Byung Doo

2013-09-14

Graphene electronic circuits are prepared on paper substrates by using graphene nanoplates and applied to foldable paper-based electronics. The graphene circuits show a small change in conductance under various folding angles and maintain an electronic path on paper substrates after repetition of folding and unfolding. Foldable paper-based applications with graphene circuits exhibit excellent folding stability. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Thin-film decoupling capacitors for multi-chip modules

NASA Astrophysics Data System (ADS)

Dimos, D.; Lockwood, S. J.; Schwartz, R. W.; Rogers, M. S.

Thin-film decoupling capacitors based on ferroelectric lead lanthanum zirconate titanate (PLZT) films are being developed for use in advanced packages, such as multi-chip modules. These thin-film decoupling capacitors are intended to replace multi-layer ceramic capacitors for certain applications, since they can be more fully integrated into the packaging architecture. The increased integration that can be achieved should lead to decreased package volume and improved high-speed performance, due to a decrease in interconnect inductance. PLZT films are fabricated by spin coating using metal carboxylate/alkoxide solutions. These films exhibit very high dielectric constants ((var epsilon) greater than or equal to 900), low dielectric losses (tan(delta) = 0.01), excellent insulation resistances (rho greater than 10(exp 13) (Omega)-cm at 125 C), and good breakdown field strengths (E(sub B) = 900 kV/cm). For integrated circuit applications, the PLZT dielectric is less than 1 micron thick, which results in a large capacitance/area (8-9 nF/sq mm). The thin-film geometry and processing conditions also make these capacitors suitable for direct incorporation onto integrated circuits and for packages that require embedded components.

Compact Receiver Front Ends for Submillimeter-Wave Applications

NASA Technical Reports Server (NTRS)

Mehdi, Imran; Chattopadhyay, Goutam; Schlecht, Erich T.; Lin, Robert H.; Sin, Seth; Peralta, Alejandro; Lee, Choonsup; Gill, John J.; Gulkis, Samuel; Thomas, Bertrand C.

2012-01-01

The current generation of submillimeter-wave instruments is relatively mass and power-hungry. The receiver front ends (RFEs) of a submillimeter instrument form the heart of the instrument, and any mass reduction achieved in this subsystem is propagated through the instrument. In the current implementation, the RFE consists of different blocks for the mixer and LO circuits. The motivation for this work is to reduce the mass of the RFE by integrating the mixer and LO circuits in one waveguide block. The mixer and its associated LO chips will all be packaged in a single waveguide package. This will reduce the mass of the RFE and also provide a number of other advantages. By bringing the mixer and LO circuits close together, losses in the waveguide will be reduced. Moreover, the compact nature of the block will allow for better thermal control of the block, which is important in order to reduce gain fluctuations. A single waveguide block with a 600- GHz RFE functionality (based on a subharmonically pumped Schottky diode pair) has been demonstrated. The block is about 3x3x3 cubic centimeters. The block combines the mixer and multiplier chip in a single package. 3D electromagnetic simulations were carried out to design the waveguide circuit around the mixer and multiplier chip. The circuit is optimized to provide maximum output power and maximum bandwidth. An integrated submillimeter front end featuring a 520-600-GHz sub-harmonic mixer and a 260-300-GHz frequency tripler in a single cavity was tested. Both devices used GaAs MMIC membrane planar Schottky diode technology. The sub-harmonic mixer/tripler circuit has been tested using conventional metal-machined blocks. Measurement results on the metal block give best DSB (double sideband) mixer noise temperature of 2,360 K and conversion losses of 7.7 dB at 520 GHz. The LO input power required to pump the integrated tripler/sub-harmonic mixer is between 30 and 50 mW.

QDENSITY—A Mathematica Quantum Computer simulation

NASA Astrophysics Data System (ADS)

Juliá-Díaz, Bruno; Burdis, Joseph M.; Tabakin, Frank

2006-06-01

This Mathematica 5.2 package is a simulation of a Quantum Computer. The program provides a modular, instructive approach for generating the basic elements that make up a quantum circuit. The main emphasis is on using the density matrix, although an approach using state vectors is also implemented in the package. The package commands are defined in Qdensity.m which contains the tools needed in quantum circuits, e.g., multiqubit kets, projectors, gates, etc. Selected examples of the basic commands are presented here and a tutorial notebook, Tutorial.nb is provided with the package (available on our website) that serves as a full guide to the package. Finally, application is made to a variety of relevant cases, including Teleportation, Quantum Fourier transform, Grover's search and Shor's algorithm, in separate notebooks: QFT.nb, Teleportation.nb, Grover.nb and Shor.nb where each algorithm is explained in detail. Finally, two examples of the construction and manipulation of cluster states, which are part of "one way computing" ideas, are included as an additional tool in the notebook Cluster.nb. A Mathematica palette containing most commands in QDENSITY is also included: QDENSpalette.nb. Program summaryTitle of program: QDENSITY Catalogue identifier: ADXH_v1_0 Program summary URL:http://cpc.cs.qub.ac.uk/summaries/ADXH_v1_0 Program available from: CPC Program Library, Queen's University of Belfast, N. Ireland Operating systems: Any which supports Mathematica; tested under Microsoft Windows XP, Macintosh OS X, and Linux FC4 Programming language used: Mathematica 5.2 No. of bytes in distributed program, including test data, etc.: 180 581 No. of lines in distributed program, including test data, etc.: 19 382 Distribution format: tar.gz Method of solution: A Mathematica package is provided which contains commands to create and analyze quantum circuits. Several Mathematica notebooks containing relevant examples: Teleportation, Shor's Algorithm and Grover's search are explained in detail. A tutorial, Tutorial.nb is also enclosed. QDENSITY is available at http://www.pitt.edu/~tabakin/QDENSITY.

High-Temperature Electronics: A Role for Wide Bandgap Semiconductors?

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Okojie, Robert S.; Chen, Liang-Yu

2002-01-01

It is increasingly recognized that semiconductor based electronics that can function at ambient temperatures higher than 150 C without external cooling could greatly benefit a variety of important applications, especially-in the automotive, aerospace, and energy production industries. The fact that wide bandgap semiconductors are capable of electronic functionality at much higher temperatures than silicon has partially fueled their development, particularly in the case of SiC. It appears unlikely that wide bandgap semiconductor devices will find much use in low-power transistor applications until the ambient temperature exceeds approximately 300 C, as commercially available silicon and silicon-on-insulator technologies are already satisfying requirements for digital and analog very large scale integrated circuits in this temperature range. However, practical operation of silicon power devices at ambient temperatures above 200 C appears problematic, as self-heating at higher power levels results in high internal junction temperatures and leakages. Thus, most electronic subsystems that simultaneously require high-temperature and high-power operation will necessarily be realized using wide bandgap devices, once the technology for realizing these devices become sufficiently developed that they become widely available. Technological challenges impeding the realization of beneficial wide bandgap high ambient temperature electronics, including material growth, contacts, and packaging, are briefly discussed.

Fully Printed, Flexible, Phased Array Antenna for Lunar Surface Communication

NASA Technical Reports Server (NTRS)

Subbaraman, Harish; Hen, Ray T.; Lu, Xuejun; Chen, Maggie Yihong

2013-01-01

NASAs future exploration missions focus on the manned exploration of the Moon, Mars, and beyond, which will rely heavily on the development of a reliable communications infrastructure from planetary surface-to-surface, surface-to-orbit, and back to Earth. Flexible antennas are highly desired in many scenarios. Active phased array antennas (active PAAs) with distributed control and processing electronics at the surface of an antenna aperture offer numerous advantages for radar communications. Large-area active PAAs on flexible substrates are of particular interest in NASA s space radars due to their efficient inflatable package that can be rolled up during transportation and deployed in space. Such an inflatable package significantly reduces stowage volume and mass. Because of these performance and packaging advantages, large-area inflatable active PAAs are highly desired in NASA s surface-to-orbit and surface-to-relay communications. To address the issues of flexible electronics, a room-temperature printing process of active phased-array antennas on a flexible Kapton substrate was developed. Field effect transistors (FETs) based on carbon nanotubes (CNTs), with many unique physical properties, were successfully proved feasible for the PAA system. This innovation is a new type of fully inkjet-printable, two-dimensional, high-frequency PAA on a flexible substrate at room temperature. The designed electronic circuit components, such as the FET switches in the phase shifter, metal interconnection lines, microstrip transmission lines, etc., are all printed using a special inkjet printer. Using the developed technology, entire 1x4, 2x2, and 4x4 PAA systems were developed, packaged, and demonstrated at 5.3 GHz. Several key solutions are addressed in this work to solve the fabrication issues. The source/drain contact is developed using droplets of silver ink printed on the source/drain areas prior to applying CNT thin-film. The wet silver ink droplets allow the silver to wet the CNT thin-film area and enable good contact with the source and drain contact after annealing. A passivation layer to protect the device channel is developed by bonding a thin Kapton film on top of the device channel. This film is also used as the media for transferring the aligned CNT thin-film on the device substrate. A simple and cost-effective technique to form multilayer metal interconnections on flexible substrate is developed and demonstrated. Contact vias are formed on the second substrate prior to bonding on the first substrate. Inkjet printing is used to fill the silver ink into the via structure. The printed silver ink penetrates through the vias to contact with the contact pads on the bottom layer. It is then annealed to form a good connection. One-dimensional and two-dimensional PAAs were fabricated and characterized. In these circuits, multilayer metal interconnects were used to make a complete PAA system.

Laser Welding in Electronic Packaging

NASA Technical Reports Server (NTRS)

2000-01-01

The laser has proven its worth in numerous high reliability electronic packaging applications ranging from medical to missile electronics. In particular, the pulsed YAG laser is an extremely flexible and versatile too] capable of hermetically sealing microelectronics packages containing sensitive components without damaging them. This paper presents an overview of details that must be considered for successful use of laser welding when addressing electronic package sealing. These include; metallurgical considerations such as alloy and plating selection, weld joint configuration, design of optics, use of protective gases and control of thermal distortions. The primary limitations on use of laser welding electronic for packaging applications are economic ones. The laser itself is a relatively costly device when compared to competing welding equipment. Further, the cost of consumables and repairs can be significant. These facts have relegated laser welding to use only where it presents a distinct quality or reliability advantages over other techniques of electronic package sealing. Because of the unique noncontact and low heat inputs characteristics of laser welding, it is an ideal candidate for sealing electronic packages containing MEMS devices (microelectromechanical systems). This paper addresses how the unique advantages of the pulsed YAG laser can be used to simplify MEMS packaging and deliver a product of improved quality.

Design and analysis of high gain and low noise figure CMOS low noise amplifier for Q-band nano-sensor application

NASA Astrophysics Data System (ADS)

Suganthi, K.; Malarvizhi, S.

2018-03-01

A high gain, low power, low Noise figure (NF) and wide band of milli-meter Wave (mmW) circuits design at 50 GHz are used for Radio Frequency (RF) front end. The fundamental necessity of a receiver front-end includes perfect output and input impedance matching and port-to-port isolation with high gain and low noise over the entire band of interest. In this paper, a design of Cascade-Cascode CMOS LNA circuit at 50 GHz for Q-band application is proposed. The design of Low noise amplifier at 50 GHz using Agilent ADS tool with microstrip lines which provides simplicity in fabrication and less chip area. The low off-leakage current Ioff can be maintained with high K-dielectrics CMOS structure. Nano-scale electronics can be achieved with increased robustness. The design has overall gain of 11.091 dB and noise figure of 2.673 dB for the Q-band of 48.3 GHz to 51.3 GHz. Impedance matching is done by T matching network and the obtained input and output reflection coefficients are S11 = <-10 dB and S22 = <-10 dB. Compared to Silicon (Si) material, Wide Band Gap semiconductor materials used attains higher junction temperatures which is well matched to ceramics used in packaging technology, the protection and reliability also can be achieved with the electronic packaging. The reverse transmission coefficient S21 is less than -21 dB has shown that LNA has better isolation between input and output, Stability factor greater than 1 and Power is also optimized in this design. Layout is designed, power gain of 4.6 dB is achieved and area is optimized which is nearly equal to 502 740 μm2. The observed results show that the proposed Cascade-Cascode LNA design can find its suitability in future milli-meter Wave Radar application.

Sensing circuits for multiwire proportional chambers

NASA Technical Reports Server (NTRS)

Peterson, H. T.; Worley, E. R.

1977-01-01

Integrated sensing circuits were designed, fabricated, and packaged for use in determining the direction and fluence of ionizing radiation passing through a multiwire proportional chamber. CMOS on sapphire was selected because of its high speed and low power capabilities. The design of the proposed circuits is described and the results of computer simulations are presented. The fabrication processes for the CMOS on sapphire sensing circuits and hybrid substrates are outlined. Several design options are described and the cost implications of each discussed. To be most effective, each chip should handle not more than 32 inputs, and should be mounted on its own hybrid substrate.

Electronic Circuit Analysis Language (ECAL)

NASA Astrophysics Data System (ADS)

Chenghang, C.

1983-03-01

The computer aided design technique is an important development in computer applications and it is an important component of computer science. The special language for electronic circuit analysis is the foundation of computer aided design or computer aided circuit analysis (abbreviated as CACD and CACA) of simulated circuits. Electronic circuit analysis language (ECAL) is a comparatively simple and easy to use circuit analysis special language which uses the FORTRAN language to carry out the explanatory executions. It is capable of conducting dc analysis, ac analysis, and transient analysis of a circuit. Futhermore, the results of the dc analysis can be used directly as the initial conditions for the ac and transient analyses.

Recent advances in photonics packaging materials

NASA Astrophysics Data System (ADS)

Zweben, Carl

2006-02-01

There are now over a dozen low-CTE materials with thermal conductivities between that of copper (400 w/m-K) and over 4X copper (1700 W/m-K). Most have low densities. For comparison, traditional low-CTE packaging materials like copper/tungsten have thermal conductivities that are little or no better than that of aluminum (200 W/m-K) and high densities. There are also low-density thermal insulators with low CTEs. Some advanced materials are low cost. Most do not outgas. They have a wide range of electrical properties that can be used to minimize electromagnetic emissions or provide EMI shielding. Several are now in commercial and aerospace applications, including laser diode packages; light-emitting diode (LED) packages; thermoelectric cooler bases, plasma displays; power modules; servers; laptops; heat sinks; thermally conductive, low-CTE printed circuit boards; and printed circuit board cold plates. Advanced material payoffs include: improved thermal performance, reliability, alignment and manufacturing yield; reduced thermal stresses and heating power requirements; simplified thermal design; enablement of hard solder direct attach; weight savings up to 85%; size reductions up to 65%; and lower cost. This paper discusses the large and increasing number of advanced packaging materials, including properties, development status, applications, increasing manufacturing yield, cost, lessons learned and future directions, including nanocomposites.

Bi-level microelectronic device package with an integral window

DOEpatents

Peterson, Kenneth A.; Watson, Robert D.

2004-01-06

A package with an integral window for housing a microelectronic device. The integral window is bonded directly to the package without having a separate layer of adhesive material disposed in-between the window and the package. The device can be a semiconductor chip, CCD chip, CMOS chip, VCSEL chip, laser diode, MEMS device, or IMEMS device. The multilayered package can be formed of a LTCC or HTCC cofired ceramic material, with the integral window being simultaneously joined to the package during LTCC or HTCC processing. The microelectronic device can be flip-chip bonded so that the light-sensitive side is optically accessible through the window. The package has at least two levels of circuits for making electrical interconnections to a pair of microelectronic devices. The result is a compact, low-profile package having an integral window that is hermetically sealed to the package prior to mounting and interconnecting the microelectronic device(s).

Preparation of calibrated test packages for particle impact noise detection

NASA Technical Reports Server (NTRS)

1977-01-01

A standard calibration method for any particle impact noise detection (PIND) test system used to detect loose particles responsible for failures in hybrid circuits was developed along with a procedure for preparing PIND standard test devices. Hybrid packages were seeded with a single gold ball, hermetically sealed, leak tested, and PIND tested. Conclusions are presented.

A flexible CPW package for a 30 GHz MMIC amplifier. [coplanar waveguide

NASA Technical Reports Server (NTRS)

Simons, Rainee N.; Taub, Susan R.

1992-01-01

A novel package, which consists of a carrier housing, has been developed for monolithic-millimeter wave Integrated Circuit amplifiers which operate at 30 giga-Hz. The carrier has coplanar waveguide (CPW) interconnects and provides heat-sinking, tuning, and cascading capabilities. The housing provides electrical isolation, mechanical protection and a feed-thru for biasing.

Changes in electrical and thermal parameters of led packages under different current and heating stresses

NASA Astrophysics Data System (ADS)

Jayawardena, Adikaramge Asiri

The goal of this dissertation is to identify electrical and thermal parameters of an LED package that can be used to predict catastrophic failure real-time in an application. Through an experimental study the series electrical resistance and thermal resistance were identified as good indicators of contact failure of LED packages. This study investigated the long-term changes in series electrical resistance and thermal resistance of LED packages at three different current and junction temperature stress conditions. Experiment results showed that the series electrical resistance went through four phases of change; including periods of latency, rapid increase, saturation, and finally a sharp decline just before failure. Formation of voids in the contact metallization was identified as the underlying mechanism for series resistance increase. The rate of series resistance change was linked to void growth using the theory of electromigration. The rate of increase of series resistance is dependent on temperature and current density. The results indicate that void growth occurred in the cap (Au) layer, was constrained by the contact metal (Ni) layer, preventing open circuit failure of contact metal layer. Short circuit failure occurred due to electromigration induced metal diffusion along dislocations in GaN. The increase in ideality factor, and reverse leakage current with time provided further evidence to presence of metal in the semiconductor. An empirical model was derived for estimation of LED package failure time due to metal diffusion. The model is based on the experimental results and theories of electromigration and diffusion. Furthermore, the experimental results showed that the thermal resistance of LED packages increased with aging time. A relationship between thermal resistance change rate, with case temperature and temperature gradient within the LED package was developed. The results showed that dislocation creep is responsible for creep induced plastic deformation in the die-attach solder. The temperatures inside the LED package reached the melting point of die-attach solder due to delamination just before catastrophic open circuit failure. A combined model that could estimate life of LED packages based on catastrophic failure of thermal and electrical contacts is presented for the first time. This model can be used to make a-priori or real-time estimation of LED package life based on catastrophic failure. Finally, to illustrate the usefulness of the findings from this thesis, two different implementations of real-time life prediction using prognostics and health monitoring techniques are discussed.

Molecular interfaces for plasmonic hot electron photovoltaics

NASA Astrophysics Data System (ADS)

Pelayo García de Arquer, F.; Mihi, Agustín; Konstantatos, Gerasimos

2015-01-01

The use of self-assembled monolayers (SAMs) to improve and tailor the photovoltaic performance of plasmonic hot-electron Schottky solar cells is presented. SAMs allow the simultaneous control of open-circuit voltage, hot-electron injection and short-circuit current. To that end, a plurality of molecule structural parameters can be adjusted: SAM molecule's length can be adjusted to control plasmonic hot electron injection. Modifying SAMs dipole moment allows for a precise tuning of the open-circuit voltage. The functionalization of the SAM can also be selected to modify short-circuit current. This allows the simultaneous achievement of high open-circuit voltages (0.56 V) and fill-factors (0.58), IPCE above 5% at the plasmon resonance and maximum power-conversion efficiencies of 0.11%, record for this class of devices.The use of self-assembled monolayers (SAMs) to improve and tailor the photovoltaic performance of plasmonic hot-electron Schottky solar cells is presented. SAMs allow the simultaneous control of open-circuit voltage, hot-electron injection and short-circuit current. To that end, a plurality of molecule structural parameters can be adjusted: SAM molecule's length can be adjusted to control plasmonic hot electron injection. Modifying SAMs dipole moment allows for a precise tuning of the open-circuit voltage. The functionalization of the SAM can also be selected to modify short-circuit current. This allows the simultaneous achievement of high open-circuit voltages (0.56 V) and fill-factors (0.58), IPCE above 5% at the plasmon resonance and maximum power-conversion efficiencies of 0.11%, record for this class of devices. Electronic supplementary information (ESI) available: Contact-potential differentiometry measurements, FTIR characterization, performance statistics and gold devices. See DOI: 10.1039/c4nr06356b

Laser Direct Routing for High Density Interconnects

NASA Astrophysics Data System (ADS)

Moreno, Wilfrido Alejandro

The laser restructuring of electronic circuits fabricated using standard Very Large Scale Integration (VLSI) process techniques, is an excellent alternative that allows low-cost quick turnaround production with full circuit similarity between the Laser Restructured prototype and the customized product for mass production. Laser Restructurable VLSI (LRVLSI) would allow design engineers the capability to interconnect cells that implement generic logic functions and signal processing schemes to achieve a higher level of design complexity. LRVLSI of a particular circuit at the wafer or packaged chip level is accomplished using an integrated computer controlled laser system to create low electrical resistance links between conductors and to cut conductor lines. An infrastructure for rapid prototyping and quick turnaround using Laser Restructuring of VLSI circuits was developed to meet three main parallel objectives: to pursue research on novel interconnect technologies using LRVLSI, to develop the capability of operating in a quick turnaround mode, and to maintain standardization and compatibility with commercially available equipment for feasible technology transfer. The system is to possess a high degree of flexibility, high data quality, total controllability, full documentation, short downtime, a user-friendly operator interface, automation, historical record keeping, and error indication and logging. A specially designed chip "SLINKY" was used as the test vehicle for the complete characterization of the Laser Restructuring system. With the use of Design of Experiment techniques the Lateral Diffused Link (LDL), developed originally at MIT Lincoln Laboratories, was completely characterized and for the first time a set of optimum process parameters was obtained. With the designed infrastructure fully operational, the priority objective was the search for a substitute for the high resistance, high current leakage to substrate, and relatively low density Lateral Diffused Link. A high density Laser Vertical Link with resistance values below 10 ohms was developed, studied and tested using design of experiment methodologies. The vertical link offers excellent advantages in the area of quick prototyping of electronic circuits, but even more important, due to having similar characteristics to a foundry produced via, it gives quick transfer from the prototype system verification stage to the mass production stage.

Fibre Optic Connections And Method For Using Same

DOEpatents

Chan, Benson; Cohen, Mitchell S.; Fortier, Paul F.; Freitag, Ladd W.; Hall, Richard R.; Johnson, Glen W.; Lin, How Tzu; Sherman, John H.

2004-03-30

A package is described that couples a twelve channel wide fiber optic cable to a twelve channel Vertical Cavity Surface Emitting Laser (VCSEL) transmitter and a multiple channel Perpendicularly Aligned Integrated Die (PAID) receiver. The package allows for reduction in the height of the assembly package by vertically orienting certain dies parallel to the fiber optic cable and horizontally orienting certain other dies. The assembly allows the vertically oriented optoelectronic dies to be perpendicularly attached to the horizontally oriented laminate via a flexible circuit.

A nanocryotron comparator can connect single-flux-quantum circuits to conventional electronics

NASA Astrophysics Data System (ADS)

Zhao, Qing-Yuan; McCaughan, Adam N.; Dane, Andrew E.; Berggren, Karl K.; Ortlepp, Thomas

2017-04-01

Integration with conventional electronics offers a straightforward and economical approach to upgrading existing superconducting technologies, such as scaling up superconducting detectors into large arrays and combining single flux quantum (SFQ) digital circuits with semiconductor logic gates and memories. However, direct output signals from superconducting devices (e.g., Josephson junctions) are usually not compatible with the input requirements of conventional devices (e.g., transistors). Here, we demonstrate the use of a single three-terminal superconducting-nanowire device, called the nanocryotron (nTron), as a digital comparator to combine SFQ circuits with mature semiconductor circuits such as complementary metal oxide semiconductor (CMOS) circuits. Since SFQ circuits can digitize output signals from general superconducting devices and CMOS circuits can interface existing CMOS-compatible electronics, our results demonstrate the feasibility of a general architecture that uses an nTron as an interface to realize a ‘super-hybrid’ system consisting of superconducting detectors, superconducting quantum electronics, CMOS logic gates and memories, and other conventional electronics.

Development and characterization of a ferroelectric non-volatile memory for flexible electronics

NASA Astrophysics Data System (ADS)

Mao, Duo

Flexible electronics have received significant attention recently because of the potential applications in displays, sensors, radio frequency identification (RFID) tags and other integrated circuits. Electrically addressable non-volatile memory is a key component for these applications. The major challenges are to fabricate the memory at a low temperature compatible with plastic substrates while maintaining good device reliability, by being compatible with process as needed to integrate with other electronic components for system-on-chip applications. In this work, ferroelectric capacitors fabricated at low temperature were developed. Based on that, a ferroelectric random access memory (FRAM) for flexible electronics was developed and characterized. Poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] copolymer was used as a ferroelectric material and a photolithographic process was developed to fabricate ferroelectric capacitors. Different characterization methods including atomic force microscopy, x-ray diffraction and Fourier-transform infrared reflection-absorption spectroscopy were used to study the material properties of the P(VDF-TrFE) film. The material properties were correlated with the electrical characteristics of the ferroelectric capacitors. To understand the polarization switching behavior of the P(VDF-TrFE) ferroelectric capacitors, a Nucleation-Limited-Switching (NLS) model was used to study the switching kinetics. The switching kinetics were characterized over the temperature range from -60 °C to 100 °C. Fatigue characteristics were studied at different electrical stress voltages and frequencies to evaluate the reliability of the ferroelectric capacitor. The degradation mechanism is attributed to the increase of the activation field and the suppression of the switchable polarization. To develop a FRAM circuit for flexible electronics, an n-channel thin film transistor (TFT) based on CdS as the semiconductor was integrated with a P(VDF-TrFE) ferroelectric capacitor for a one-transistor-one-capacitor (1T1C) memory cell. The 1T1C devices were fabricated at low temperature and demonstrated a memory window (DeltaVBL) of 2.3 V and 3.5 V, depending on the device dimensions. Next, FRAM arrays (4-bit, 16-bit and 64-bit) based on the two-transistor-two-capacitor (2T2C) memory cell architecture were designed and fabricated using a photolithographic process with 9 masks. The fabricated FRAM arrays were packaged in 28-pin ceramic packages. The read/write schemes were developed and the FRAM arrays show successful program and erase with a memory window of approximately 1 V at the output of the sense amplifier.

Extreme temperature packaging: challenges and opportunities

NASA Astrophysics Data System (ADS)

Johnson, R. Wayne

2016-05-01

Consumer electronics account for the majority of electronics manufactured today. Given the temperature limits of humans, consumer electronics are typically rated for operation from -40°C to +85°C. Military applications extend the range to -65°C to +125°C while underhood automotive electronics may see +150°C. With the proliferation of the Internet of Things (IoT), the goal of instrumenting (sensing, computation, transmission) to improve safety and performance in high temperature environments such as geothermal wells, nuclear reactors, combustion chambers, industrial processes, etc. requires sensors, electronics and packaging compatible with these environments. Advances in wide bandgap semiconductors (SiC and GaN) allow the fabrication of high temperature compatible sensors and electronics. Integration and packaging of these devices is required for implementation into actual applications. The basic elements of packaging are die attach, electrical interconnection and the package or housing. Consumer electronics typically use conductive adhesives or low melting point solders for die attach, wire bonds or low melting solder for electrical interconnection and epoxy for the package. These materials melt or decompose in high temperature environments. This paper examines materials and processes for high temperature packaging including liquid transient phase and sintered nanoparticle die attach, high melting point wires for wire bonding and metal and ceramic packages. The limitations of currently available solutions will also be discussed.

47 CFR 32.2232 - Circuit equipment.

Code of Federal Regulations, 2011 CFR

2011-10-01

... subaccount 2232.1 Electronic shall include the original cost of electronic circuit equipment. (c) This... 47 Telecommunication 2 2011-10-01 2011-10-01 false Circuit equipment. 32.2232 Section 32.2232... FOR TELECOMMUNICATIONS COMPANIES Instructions for Balance Sheet Accounts § 32.2232 Circuit equipment...

47 CFR 32.2232 - Circuit equipment.

Code of Federal Regulations, 2012 CFR

2012-10-01

... subaccount 2232.1 Electronic shall include the original cost of electronic circuit equipment. (c) This... 47 Telecommunication 2 2012-10-01 2012-10-01 false Circuit equipment. 32.2232 Section 32.2232... FOR TELECOMMUNICATIONS COMPANIES Instructions for Balance Sheet Accounts § 32.2232 Circuit equipment...

47 CFR 32.2232 - Circuit equipment.

Code of Federal Regulations, 2010 CFR

2010-10-01

... subaccount 2232.1 Electronic shall include the original cost of electronic circuit equipment. (c) This... 47 Telecommunication 2 2010-10-01 2010-10-01 false Circuit equipment. 32.2232 Section 32.2232... FOR TELECOMMUNICATIONS COMPANIES Instructions for Balance Sheet Accounts § 32.2232 Circuit equipment...

Electronic test and calibration circuits, a compilation

NASA Technical Reports Server (NTRS)

1972-01-01

A wide variety of simple test calibration circuits are compiled for the engineer and laboratory technician. The majority of circuits were found inexpensive to assemble. Testing electronic devices and components, instrument and system test, calibration and reference circuits, and simple test procedures are presented.

47 CFR 32.6232 - Circuit equipment expense.

Code of Federal Regulations, 2011 CFR

2011-10-01

...) This subaccount 6232.1 Electronic shall include expenses associated with electronic circuit equipment... 47 Telecommunication 2 2011-10-01 2011-10-01 false Circuit equipment expense. 32.6232 Section 32... SYSTEM OF ACCOUNTS FOR TELECOMMUNICATIONS COMPANIES Instructions for Expense Accounts § 32.6232 Circuit...

47 CFR 32.2232 - Circuit equipment.

Code of Federal Regulations, 2013 CFR

2013-10-01

... subaccount 2232.1 Electronic shall include the original cost of electronic circuit equipment. (c) This... 47 Telecommunication 2 2013-10-01 2013-10-01 false Circuit equipment. 32.2232 Section 32.2232... FOR TELECOMMUNICATIONS COMPANIES Instructions for Balance Sheet Accounts § 32.2232 Circuit equipment...

47 CFR 32.6232 - Circuit equipment expense.

Code of Federal Regulations, 2012 CFR

2012-10-01

...) This subaccount 6232.1 Electronic shall include expenses associated with electronic circuit equipment... 47 Telecommunication 2 2012-10-01 2012-10-01 false Circuit equipment expense. 32.6232 Section 32... SYSTEM OF ACCOUNTS FOR TELECOMMUNICATIONS COMPANIES Instructions for Expense Accounts § 32.6232 Circuit...

47 CFR 32.2232 - Circuit equipment.

Code of Federal Regulations, 2014 CFR

2014-10-01

... subaccount 2232.1 Electronic shall include the original cost of electronic circuit equipment. (c) This... 47 Telecommunication 2 2014-10-01 2014-10-01 false Circuit equipment. 32.2232 Section 32.2232... FOR TELECOMMUNICATIONS COMPANIES Instructions for Balance Sheet Accounts § 32.2232 Circuit equipment...

47 CFR 32.6232 - Circuit equipment expense.

Code of Federal Regulations, 2013 CFR

2013-10-01

...) This subaccount 6232.1 Electronic shall include expenses associated with electronic circuit equipment... 47 Telecommunication 2 2013-10-01 2013-10-01 false Circuit equipment expense. 32.6232 Section 32... SYSTEM OF ACCOUNTS FOR TELECOMMUNICATIONS COMPANIES Instructions for Expense Accounts § 32.6232 Circuit...

47 CFR 32.6232 - Circuit equipment expense.

Code of Federal Regulations, 2010 CFR

2010-10-01

...) This subaccount 6232.1 Electronic shall include expenses associated with electronic circuit equipment... 47 Telecommunication 2 2010-10-01 2010-10-01 false Circuit equipment expense. 32.6232 Section 32... SYSTEM OF ACCOUNTS FOR TELECOMMUNICATIONS COMPANIES Instructions for Expense Accounts § 32.6232 Circuit...

47 CFR 32.6232 - Circuit equipment expense.

Code of Federal Regulations, 2014 CFR

2014-10-01

...) This subaccount 6232.1 Electronic shall include expenses associated with electronic circuit equipment... 47 Telecommunication 2 2014-10-01 2014-10-01 false Circuit equipment expense. 32.6232 Section 32... SYSTEM OF ACCOUNTS FOR TELECOMMUNICATIONS COMPANIES Instructions for Expense Accounts § 32.6232 Circuit...

Update on Waveguide-Embedded Differential MMIC Amplifiers

NASA Technical Reports Server (NTRS)

Kangaslahti, Pekka; Schleht, Erich

2010-01-01

There is an update on the subject matter of Differential InP HEMT MMIC Amplifiers Embedded in Waveguides (NPO-42857) NASA Tech Briefs, Vol. 33, No. 9 (September 2009), page 35. To recapitulate: Monolithic microwave integrated-circuit (MMIC) amplifiers of a type now being developed for operation at frequencies of hundreds of gigahertz contain InP high-electron-mobility transistors (HEMTs) in a differential configuration. The MMICs are designed integrally with, and embedded in, waveguide packages. The instant work does not mention InP HEMTs but otherwise reiterates part of the subject matter of the cited prior article, with emphasis on the following salient points: An MMIC is mounted in the electric-field plane ("E-plane") of a waveguide and includes a finline transition to each differential-amplifier stage. The differential configuration creates a virtual ground within each pair of transistor-gate fingers, eliminating the need for external radio-frequency grounding. This work concludes by describing a single-stage differential submillimeter-wave amplifier packaged in a rectangular waveguide and summarizing results of tests of this amplifier at frequencies of 220 and 305 GHz.

Laser-induced forward transfer for flip-chip packaging of single dies.

PubMed

Kaur, Kamal S; Van Steenberge, Geert

2015-03-20

Flip-chip (FC) packaging is a key technology for realizing high performance, ultra-miniaturized and high-density circuits in the micro-electronics industry. In this technique the chip and/or the substrate is bumped and the two are bonded via these conductive bumps. Many bumping techniques have been developed and intensively investigated since the introduction of the FC technology in 1960(1) such as stencil printing, stud bumping, evaporation and electroless/electroplating2. Despite the progress that these methods have made they all suffer from one or more than one drawbacks that need to be addressed such as cost, complex processing steps, high processing temperatures, manufacturing time and most importantly the lack of flexibility. In this paper, we demonstrate a simple and cost-effective laser-based bump forming technique known as Laser-induced Forward Transfer (LIFT)3. Using the LIFT technique a wide range of bump materials can be printed in a single-step with great flexibility, high speed and accuracy at RT. In addition, LIFT enables the bumping and bonding down to chip-scale, which is critical for fabricating ultra-miniature circuitry.

NOx Sensor for Direct Injection Emission Control

DOE Office of Scientific and Technical Information (OSTI.GOV)

Betteridge, William J

2006-02-28

The Electricore/Delphi team continues to leverage the electrochemical planar sensor technology that has produced stoichiometric planar and wide range oxygen sensors as the basis for development of a NOx sensor. Zirconia cell technology with an integrated heater will provide the foundation for the sensor structure. Proven materials and packaging technology will help to ensure a cost-effective approach to the manufacture of this sensor. The electronics technique and interface is considered to be an area where new strategies need to be employed to produce higher S/N ratios of the NOx signal with emphasis on signal stability over time for robustness andmore » durability Both continuous mode and pulse mode control techniques are being evaluated. Packaging the electronics requires careful design and circuit partitioning so that only the necessary signal conditioning electronics are coupled directly in the wiring harness, while the remainder is situated within the ECM for durability and costs reasons. This task continues to be on hold due to the limitation that the definition of the interface electronics was unavailable until very late in the project. The sense element is based on the amperometric method utilizing integrated alumina and zirconia ceramics. Precious metal electrodes are used to form the integrated heater, the cell electrodes and leads. Inside the actual sense cell structure, it is first necessary to separate NOx from the remaining oxygen constituents of the exhaust, without reducing the NOx. Once separated, the NOx will be measured using a measurement cell. Development or test coupons have been used to facilitate material selection and refinement, cell, diffusion barrier, and chamber development. The sense element currently requires elaborate interconnections. To facilitate a robust durable connection, mechanical and metallurgical connections are under investigation. Materials and process refinements continue to play an important role in the development of the sensor.« less

The NASA Electronic Parts and Packaging (NEPP) Program: Overview and Update FY15 and Beyond

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Sampson, Michael J.

2016-01-01

The NASA Electronic Parts and Packaging (NEPP) program, and its subset the NASA Electronic Parts Assurance Group (NEPAG), are NASA's point-of-contacts for reliability and radiation tolerance of electrical, electronic, and electromechanical (EEE) parts and their packages. This presentation includes a Fiscal Year 2015 program overview.

Magellan/Galileo solder joint failure analysis and recommendations

NASA Technical Reports Server (NTRS)

Ross, Ronald G., Jr.

1989-01-01

On or about November 10, 1988 an open circuit solder joint was discovered in the Magellan Radar digital unit (DFU) during integration testing at Kennedy Space Center (KSC). A detailed analysis of the cause of the failure was conducted at the Jet Propulsion Laboratory leading to the successful repair of many pieces of affected electronic hardware on both the Magellan and Galileo spacecraft. The problem was caused by the presence of high thermal coefficient of expansion heat sink and conformal coating materials located in the large (0.055 inch) gap between Dual Inline Packages (DIPS) and the printed wiring board. The details of the observed problems are described and recommendations are made for improved design and testing activities in the future.

RF lockout circuit for electronic locking system

NASA Astrophysics Data System (ADS)

Becker, Earl M., Jr.; Miller, Allen

1991-02-01

An electronics lockout circuit was invented that includes an antenna adapted to receive radio frequency signals from a transmitter, and a radio frequency detector circuit which converts the radio frequency signals into a first direct current voltage indicative of the relative strength of the field resulting from the radio frequency signals. The first direct current voltage is supplied to a trigger circuit which compares this direct current voltage to an adjustable direct current reference voltage. This provides a second direct current voltage at the output whenever the amplitude of the first direct current voltage exceeds the amplitude of the reference voltage provided by the comparator circuit. This is supplied to a disconnect relay circuit which, upon receiving a signal from the electronic control unit of an electronic combination lock during the time period at which the second direct current voltage is present, isolates the door strike coil of a security door from the electronic control unit. This prevents signals falsely generated by the electronic control unit because of radio frequency signals in the vicinity of the electronic control unit energizing the door strike coil and accidentally opening a security door.

Electronics for Low Temperature Space Exploration Missions

NASA Technical Reports Server (NTRS)

Patterson, Richard L.; Hammoud, Ahmad; Elbuluk, Malik

2007-01-01

Exploration missions to outer planets and deep space require spacecraft, probes, and on-board data and communication systems to operate reliably and efficiently under severe harsh conditions. On-board electronics, in particular those in direct exposures to the space environment without any shielding or protection, will encounter extreme low temperature and thermal cycling in their service cycle in most of NASA s upcoming exploration missions. For example, Venus atmosphere, Jupiter atmosphere, Moon surface, Pluto orbiter, Mars, comets, Titan, Europa, and James Webb Space Telescope all involve low-temperature surroundings. Therefore, electronics for space exploration missions need to be designed for operation under such environmental conditions. There are ongoing efforts at the NASA Glenn Research Center (GRC) to establish a database on the operation and reliability of electronic devices and circuits under extreme temperature operation for space applications. This work is being performed under the Extreme Temperature Electronics Program with collaboration and support of the NASA Electronic Parts and Packaging (NEPP) Program. The results of these investigations will be used to establish safe operating areas and to identify degradation and failure modes, and the information will be disseminated to mission planners and system designers for use as tools for proper part selection and in risk mitigation. An overview of this program along with experimental data will be presented.

Nano-engineered Multiwall Carbon Nanotube-copper Composite Thermal Interface Material for Efficient Heat Conduction

NASA Technical Reports Server (NTRS)

Ngo, Quoc; Cruden, Brett A.; Cassell, Alan M.; Sims, Gerard; Li, Jun; Meyyappa, M.; Yang, Cary Y.

2005-01-01

Efforts in integrated circuit (IC) packaging technologies have recently been focused on management of increasing heat density associated with high frequency and high density circuit designs. While current flip-chip package designs can accommodate relatively high amounts of heat density, new materials need to be developed to manage thermal effects of next-generation integrated circuits. Multiwall carbon nanotubes (MWNT) have been shown to significantly enhance thermal conduction in the axial direction and thus can be considered to be a candidate for future thermal interface materials by facilitating efficient thermal transport. This work focuses on fabrication and characterization of a robust MWNT-copper composite material as an element in IC package designs. We show that using vertically aligned MWNT arrays reduces interfacial thermal resistance by increasing conduction surface area, and furthermore, the embedded copper acts as a lateral heat spreader to efficiently disperse heat, a necessary function for packaging materials. In addition, we demonstrate reusability of the material, and the absence of residue on the contacting material, both novel features of the MWNT-copper composite that are not found in most state-of-the-art thermal interface materials. Electrochemical methods such as metal deposition and etch are discussed for the creation of the MWNT-Cu composite, detailing issues and observations with using such methods. We show that precise engineering of the composite surface affects the ability of this material to act as an efficient thermal interface material. A thermal contact resistance measurement has been designed to obtain a value of thermal contact resistance for a variety of different thermal contact materials.

All-Organic High-Performance Piezoelectric Nanogenerator with Multilayer Assembled Electrospun Nanofiber Mats for Self-Powered Multifunctional Sensors.

PubMed

Maity, Kuntal; Mandal, Dipankar

2018-05-30

Rapid development of wearable electronics, piezoelectric nanogenerator (PNG), has been paid a special attention because of its sustainable and accessible energy generation. In this context, we present a simple yet highly efficient design strategy to enhance the output performance of an all-organic PNG (OPNG) based on multilayer assembled electrospun poly(vinylidene fluoride) (PVDF) nanofiber (NF) mats where vapor-phase polymerized poly(3,4-ethylenedioxythiophene)-coated PVDF NFs are assembled as electrodes and neat PVDF NFs are utilized as an active component. In addition to the multilayer assembly, electrode compatibility and durability remain a challenging task to mitigate the primary requirements of wearable electronics. A multilayer networked three-dimensional structure integrated with a compatible electrode thereby provides enhanced output voltage and current (e.g., open-circuit voltage, V oc ≈ 48 V, and short-circuit current, I sc ≈ 6 μA, upon 8.3 kPa of the applied stress amplitude) with superior piezoelectric energy conversion efficiency of 66% compared to the single-mat device. Besides, OPNG also shows ultrasensitivity toward human movements such as foot strikes and walking. The weight measurement mapping is critically explored by principal component analysis that may have enormous applications in medical diagnosis to smart packaging industries. More importantly, fatigue test under continuous mechanical impact (over 6 months) shows great promise as a robust wearable mechanical energy harvester.

Packaging Technology Designed, Fabricated, and Assembled for High-Temperature SiC Microsystems

NASA Technical Reports Server (NTRS)

Chen, Liang-Yu

2003-01-01

A series of ceramic substrates and thick-film metalization-based prototype microsystem packages designed for silicon carbide (SiC) high-temperature microsystems have been developed for operation in 500 C harsh environments. These prototype packages were designed, fabricated, and assembled at the NASA Glenn Research Center. Both the electrical interconnection system and the die-attach scheme for this packaging system have been tested extensively at high temperatures. Printed circuit boards used to interconnect these chip-level packages and passive components also are being fabricated and tested. NASA space and aeronautical missions need harsh-environment, especially high-temperature, operable microsystems for probing the inner solar planets and for in situ monitoring and control of next-generation aeronautical engines. Various SiC high-temperature-operable microelectromechanical system (MEMS) sensors, actuators, and electronics have been demonstrated at temperatures as high as 600 C, but most of these devices were demonstrated only in the laboratory environment partially because systematic packaging technology for supporting these devices at temperatures of 500 C and beyond was not available. Thus, the development of a systematic high-temperature packaging technology is essential for both in situ testing and the commercialization of high-temperature SiC MEMS. Researchers at Glenn developed new prototype packages for high-temperature microsystems using ceramic substrates (aluminum nitride and 96- and 90-wt% aluminum oxides) and gold (Au) thick-film metalization. Packaging components, which include a thick-film metalization-based wirebond interconnection system and a low-electrical-resistance SiC die-attachment scheme, have been tested at temperatures up to 500 C. The interconnection system composed of Au thick-film printed wire and 1-mil Au wire bond was tested in 500 C oxidizing air with and without 50-mA direct current for over 5000 hr. The Au thick-film metalization-based wirebond electrical interconnection system was also tested in an extremely dynamic thermal environment to assess thermal reliability. The I-V curve1 of a SiC high-temperature diode was measured in oxidizing air at 500 C for 1000 hr to electrically test the Au thick-film material-based die-attach assembly.

Space station power semiconductor package

NASA Technical Reports Server (NTRS)

Balodis, Vilnis; Berman, Albert; Devance, Darrell; Ludlow, Gerry; Wagner, Lee

1987-01-01

A package of high-power switching semiconductors for the space station have been designed and fabricated. The package includes a high-voltage (600 volts) high current (50 amps) NPN Fast Switching Power Transistor and a high-voltage (1200 volts), high-current (50 amps) Fast Recovery Diode. The package features an isolated collector for the transistors and an isolated anode for the diode. Beryllia is used as the isolation material resulting in a thermal resistance for both devices of .2 degrees per watt. Additional features include a hermetical seal for long life -- greater than 10 years in a space environment. Also, the package design resulted in a low electrical energy loss with the reduction of eddy currents, stray inductances, circuit inductance, and capacitance. The required package design and device parameters have been achieved. Test results for the transistor and diode utilizing the space station package is given.

NASA EEE Parts and NASA Electronic Parts and Packaging (NEPP) Program Update 2018

NASA Technical Reports Server (NTRS)

Label, Kenneth A.; Sampson, Michael J.; Pellish, Jonathan A.; Majewicz, Peter J.

2018-01-01

NASA Electronic Parts and Packaging (NEPP) Program and NASA Electronic Parts Assurance Group (NEPAG) are NASAs point-of-contacts for reliability and radiation tolerance of EEE parts and their packages. This presentation includes an FY18 program overview.

An externally head-mounted wireless neural recording device for laboratory animal research and possible human clinical use.

PubMed

Yin, Ming; Li, Hao; Bull, Christopher; Borton, David A; Aceros, Juan; Larson, Lawrence; Nurmikko, Arto V

2013-01-01

In this paper we present a new type of head-mounted wireless neural recording device in a highly compact package, dedicated for untethered laboratory animal research and designed for future mobile human clinical use. The device, which takes its input from an array of intracortical microelectrode arrays (MEA) has ninety-seven broadband parallel neural recording channels and was integrated on to two custom designed printed circuit boards. These house several low power, custom integrated circuits, including a preamplifier ASIC, a controller ASIC, plus two SAR ADCs, a 3-axis accelerometer, a 48MHz clock source, and a Manchester encoder. Another ultralow power RF chip supports an OOK transmitter with the center frequency tunable from 3GHz to 4GHz, mounted on a separate low loss dielectric board together with a 3V LDO, with output fed to a UWB chip antenna. The IC boards were interconnected and packaged in a polyether ether ketone (PEEK) enclosure which is compatible with both animal and human use (e.g. sterilizable). The entire system consumes 17mA from a 1.2Ahr 3.6V Li-SOCl2 1/2AA battery, which operates the device for more than 2 days. The overall system includes a custom RF receiver electronics which are designed to directly interface with any number of commercial (or custom) neural signal processors for multi-channel broadband neural recording. Bench-top measurements and in vivo testing of the device in rhesus macaques are presented to demonstrate the performance of the wireless neural interface.

Truck circuits diagnosis for railway lines equipped with an automatic block signalling system

NASA Astrophysics Data System (ADS)

Spunei, E.; Piroi, I.; Muscai, C.; Răduca, E.; Piroi, F.

2018-01-01

This work presents a diagnosis method for detecting track circuits failures on a railway traffic line equipped with an Automatic Block Signalling installation. The diagnosis method uses the installation’s electrical schemas, based on which a series of diagnosis charts have been created. Further, the diagnosis charts were used to develop a software package, CDCBla, which substantially contributes to reducing the diagnosis time and human error during failure remedies. The proposed method can also be used as a training package for the maintenance staff. Since the diagnosis method here does not need signal or measurement inputs, using it does not necessitate additional IT knowledge and can be deployed on a mobile computing device (tablet, smart phone).

7 CFR 1770.15 - Supplementary accounts required of all borrowers.

Code of Federal Regulations, 2012 CFR

2012-01-01

... Switching—Circuit. 2212.2 2212.2 Digital Electronic Switching—Packet. 2230.11 Central Office Transmission... Retirement Work in Progress. Current Liabilities 2232.1 2232.1 Circuit Equipment—Electronic. 2232.2 2232.2... Expense—Circuit. 6212.2 6212.2 Digital Electronic Switching Expense—Packet. 6230.11 Radio Systems Expense...

7 CFR 1770.15 - Supplementary accounts required of all borrowers.

Code of Federal Regulations, 2014 CFR

2014-01-01

... Switching—Circuit. 2212.2 2212.2 Digital Electronic Switching—Packet. 2230.11 Central Office Transmission... Retirement Work in Progress. Current Liabilities 2232.1 2232.1 Circuit Equipment—Electronic. 2232.2 2232.2... Expense—Circuit. 6212.2 6212.2 Digital Electronic Switching Expense—Packet. 6230.11 Radio Systems Expense...

7 CFR 1770.15 - Supplementary accounts required of all borrowers.

Code of Federal Regulations, 2011 CFR

2011-01-01

... Switching—Circuit. 2212.2 2212.2 Digital Electronic Switching—Packet. 2230.11 Central Office Transmission... Retirement Work in Progress. Current Liabilities 2232.1 2232.1 Circuit Equipment—Electronic. 2232.2 2232.2... Expense—Circuit. 6212.2 6212.2 Digital Electronic Switching Expense—Packet. 6230.11 Radio Systems Expense...

Position sensor for a fuel injection element in an internal combustion engine

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fulkerson, D.E.; Geske, M.L.

1987-08-18

This patent describes an electronic circuit for dynamically sensing and processing signals representative of changes in a magnet field, the circuit comprising: means for sensing a change in a magnetic field external to the circuit and providing an output representative of the change; circuit means electronically coupled with the output of the sensing means for providing an output indicating the presence of the magnetic field change; and a nulling circuit coupled with the output of the sensing means and across the indicating circuit means for nulling the electronic circuit responsive to the sensing means output, to thereby avoid ambient magneticmore » fields temperature and process variations, and wherein the nulling circuit comprises a capacitor coupled to the output of the nulling circuit, means for charging and discharging the capacitor responsive to any imbalance in the input to the nulling circuit, and circuit means coupling the capacitor with the output of the sensing means for nulling any imbalance during the charging or discharging of the capacitor.« less

Fundamentals handbook of electrical and computer engineering. Volume 1 Circuits fields and electronics

NASA Astrophysics Data System (ADS)

Chang, S. S. L.

State of the art technology in circuits, fields, and electronics is discussed. The principles and applications of these technologies to industry, digital processing, microwave semiconductors, and computer-aided design are explained. Important concepts and methodologies in mathematics and physics are reviewed, and basic engineering sciences and associated design methods are dealt with, including: circuit theory and the design of magnetic circuits and active filter synthesis; digital signal processing, including FIR and IIR digital filter design; transmission lines, electromagnetic wave propagation and surface acoustic wave devices. Also considered are: electronics technologies, including power electronics, microwave semiconductors, GaAs devices, and magnetic bubble memories; digital circuits and logic design.

Vehicle drive module having improved cooling configuration

DOEpatents

Radosevich, Lawrence D.; Meyer, Andreas A.; Kannenberg, Daniel G.; Kaishian, Steven C.; Beihoff, Bruce C.

2007-02-13

An electric vehicle drive includes a thermal support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. Power electronic circuits are thermally matched, such as between component layers and between the circuits and the support. The support may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

Thermally matched fluid cooled power converter

DOEpatents

Radosevich, Lawrence D.; Kannenberg, Daniel G.; Kaishian, Steven C.; Beihoff, Bruce C.

2005-06-21

A thermal support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. Power electronic circuits are thermally matched, such as between component layers and between the circuits and the support. The support may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

Drive and protection circuit for converter module of cascaded H-bridge STATCOM

NASA Astrophysics Data System (ADS)

Wang, Xuan; Yuan, Hongliang; Wang, Xiaoxing; Wang, Shuai; Fu, Yongsheng

2018-04-01

Drive and protection circuit is an important part of power electronics, which is related to safe and stable operation issues in the power electronics. The drive and protection circuit is designed for the cascaded H-bridge STATCOM. This circuit can realize flexible dead-time setting, operation status self-detection, fault priority protection and detailed fault status uploading. It can help to improve the reliability of STATCOM's operation. Finally, the proposed circuit is tested and analyzed by power electronic simulation software PSPICE (Simulation Program with IC Emphasis) and a series of experiments. Further studies showed that the proposed circuit can realize drive and control of H-bridge circuit, meanwhile it also can realize fast processing faults and have advantage of high reliability.

The NASA Electronic Parts and Packaging (NEPP) Program: Overview and the New Tenets for Cost Conscious Mission Assurance on Electrical, Electronic, and Electromechanical (EEE) Parts

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Sampson, Michael J.

2015-01-01

The NEPP Program focuses on the reliability aspects of electronic devices (integrated circuits such as a processor in a computer). There are three principal aspects of this reliability: 1) Lifetime, inherent failure and design issues related to the EEE parts technology and packaging; 2) Effects of space radiation and the space environment on these technologies, and; 3) Creation and maintenance of the assurance support infrastructure required for mission success. The NEPP mission is to provide guidance to NASA for the selection and application of microelectronics technologies, to improve understanding of the risks related to the use of these technologies in the space environment, and to ensure that appropriate EEE parts research is performed to meet NASA mission assurance needs. NEPPs FY15 goals are to represent the NASA voice to the greater aerospace EEE parts community including supporting anti-counterfeit and trust, provide relevant guidance to cost-effective missions, aid insertion of advanced (and commercial) technologies, resolve unexpected parts issues, ensure access to appropriate radiation test facilities, and collaborate as widely as possible with external entities. In accordance with the changing mission profiles throughout NASA, the NEPP Program has developed a balanced portfolio of efforts to provide agency-wide assurance for not only traditional spacecraft developments, but also those in-line with the new philosophies emerging worldwide. In this presentation, we shall present an overview of this program and considerations for EEE parts assurance as applied to cost conscious missions.

Industrial Electronics II for ICT. Student's Manual.

ERIC Educational Resources Information Center

Snider, Bob

This student manual contains the following six units for classroom and laboratory experiences in high school industrial electronics: (1) introduction and review of DC and AC circuits; (2) semiconductors; (3) integrated circuits; (4) digital basics; (5) complex digital circuits; and (6) computer circuits. The units include unit objectives, specific…

Packaging of electronic modules

NASA Technical Reports Server (NTRS)

Katzin, L.

1966-01-01

Study of design approaches that are taken toward optimizing the packaging of electronic modules with respect to size, shape, component orientation, interconnections, and structural support. The study does not present a solution to specific packaging problems, but rather the factors to be considered to achieve optimum packaging designs.

Modular electron transfer circuits for synthetic biology

PubMed Central

Agapakis, Christina M

2010-01-01

Electron transfer is central to a wide range of essential metabolic pathways, from photosynthesis to fermentation. The evolutionary diversity and conservation of proteins that transfer electrons makes these pathways a valuable platform for engineered metabolic circuits in synthetic biology. Rational engineering of electron transfer pathways containing hydrogenases has the potential to lead to industrial scale production of hydrogen as an alternative source of clean fuel and experimental assays for understanding the complex interactions of multiple electron transfer proteins in vivo. We designed and implemented a synthetic hydrogen metabolism circuit in Escherichia coli that creates an electron transfer pathway both orthogonal to and integrated within existing metabolism. The design of such modular electron transfer circuits allows for facile characterization of in vivo system parameters with applications toward further engineering for alternative energy production. PMID:21468209

Connector and electronic circuit assembly for improved wet insulation resistance

DOEpatents

Reese, Jason A.; Teli, Samar R.; Keenihan, James R.; Langmaid, Joseph A.; Maak, Kevin D.; Mills, Michael E.; Plum, Timothy C.; Ramesh, Narayan

2016-07-19

The present invention is premised upon a connector and electronic circuit assembly (130) at least partially encased in a polymeric frame (200). The assembly including at least: a connector housing (230); at least one electrical connector (330); at least one electronic circuit component (430); and at least one barrier element (530).

Quantum mechanical settings inspired by RLC circuits

NASA Astrophysics Data System (ADS)

Alicata, G.; Bagarello, F.; Gargano, F.; Spagnolo, S.

2018-04-01

In some recent papers, several authors used electronic circuits to construct loss and gain systems. This is particularly interesting in the context of PT-quantum mechanics, where this kind of effects appears quite naturally. The electronic circuits used so far are simple, but not so much. Surprisingly enough, a rather trivial RLC circuit can be analyzed with the same perspective and it produces a variety of unexpected results, both from a mathematical and on a physical side. In this paper, we show that this circuit produces two biorthogonal bases associated with the Liouville matrix L used in the treatment of its dynamics, with a biorthogonality which is linked to the value of the parameters of the circuit. We also show that the related loss RLC circuit is naturally associated with a gain RLC circuit and that the relation between the two is rather naturally encoded in L . We propose a pseudo-fermionic analysis of the circuit, and we introduce the notion of m-equivalence between electronic circuits.

Hybrid Circuit QED with Electrons on Helium

NASA Astrophysics Data System (ADS)

Yang, Ge

Electrons on helium (eHe) is a 2-dimensional system that forms naturally at the interface between superfluid helium and vacuum. It has the highest measured electron mobility, and long predicted spin coherence time. In this talk, we will first review various quantum computer architecture proposals that take advantage of these exceptional properties. In particular, we describe how electrons on helium can be combined with superconducting microwave circuits to take advantage of the recent progress in the field of circuit quantum electrodynamics (cQED). We will then demonstrate how to reliably trap electrons on these devices hours at a time, at millikelvin temperatures inside a dilution refrigerator. The coupling between the electrons and the microwave resonator exceeds 1 MHz, and can be reproduced from the design geometry using our numerical simulation. Finally, we will present our progress on isolating individual electrons in such circuits, to build single-electron quantum dots with electrons on helium.

Experimental Verification of the Use of Metal Filled Via Hole Fences for Crosstalk Control of Microstrip Lines in LTCC Packages

NASA Technical Reports Server (NTRS)

Ponchak, George E.; Chun, Donghoon; Katehi, Linda P. B.; Yook, Jong-Gwan

1999-01-01

Coupling between microstrip lines in dense RF packages is a common problem that degrades circuit performance. Prior 3D-FEM electromagnetic simulations have shown that metal filled via hole fences between two adjacent microstrip lines actually increases coupling between the lines; however, if the top of the via posts are connected by a metal Strip, coupling is reduced. In this paper, experimental verification of the 3D-FEM simulations Is demonstrated for commercially fabricated LTCC packages.

Using the Arduino with MakerPlot software for the display of resonance curves characterisic of a series LCR circuit

NASA Astrophysics Data System (ADS)

Atkin, Keith

2016-11-01

This paper shows how very simple circuitry attached to an Arduino microcontroller can be used for the measurement of both frequency and amplitude of a sinusoidal signal. It is also shown how the addition of a readily available software package, MakerPlot, can facilitate the display and investigation of resonance curves for a series LCR circuit.

Circuit with a Switch for Charging a Battery in a Battery Capacitor Circuit

NASA Technical Reports Server (NTRS)

Stuart, Thomas A. (Inventor); Ashtiani, Cyrus N. (Inventor)

2008-01-01

A circuit for charging a battery combined with a capacitor includes a power supply adapted to be connected to the capacitor, and the battery. The circuit includes an electronic switch connected to the power supply. The electronic switch is responsive to switch between a conducting state to allow current and a non-conducting state to prevent current flow. The circuit includes a control device connected to the switch and is operable to generate a control signal to continuously switch the electronic switch between the conducting and non-conducting states to charge the battery.

Towards Practical Application of Paper based Printed Circuits: Capillarity Effectively Enhances Conductivity of the Thermoplastic Electrically Conductive Adhesives

PubMed Central

Wu, Haoyi; Chiang, Sum Wai; Lin, Wei; Yang, Cheng; Li, Zhuo; Liu, Jingping; Cui, Xiaoya; Kang, Feiyu; Wong, Ching Ping

2014-01-01

Direct printing nanoparticle-based conductive inks onto paper substrates has encountered difficulties e.g. the nanoparticles are prone to penetrate into the pores of the paper and become partially segmented, and the necessary low-temperature-sintering process is harmful to the dimension-stability of paper. Here we prototyped the paper-based circuit substrate in combination with printed thermoplastic electrically conductive adhesives (ECA), which takes the advantage of the capillarity of paper and thus both the conductivity and mechanical robustness of the printed circuitsweredrastically improved without sintering process. For instance, the electrical resistivity of the ECA specimen on a pulp paper (6 × 10−5Ω·cm, with 50 wt% loading of Ag) was only 14% of that on PET film than that on PET film. This improvement has been found directly related to the sizing degree of paper, in agreement with the effective medium approximation simulation results in this work. The thermoplastic nature also enables excellent mechanical strength of the printed ECA to resist repeated folding. Considering the generality of the process and the wide acceptance of ECA technique in the modern electronic packages, this method may find vast applications in e.g. circuit boards, capacitive touch pads, and radio frequency identification antennas, which have been prototyped in the manuscript. PMID:25182052

E-Learning System for Experiments Involving Construction of Practical Electronic Circuits

ERIC Educational Resources Information Center

Takemura, Atsushi

2013-01-01

This paper proposes a novel e-learning system for technical experiments involving the construction of practical electronic circuits; this system would meet the various demands of individual experimenters. This mixed mode is beneficial for practical use in that an experimenter who does not have sufficient circuit components for circuit making can…

Advanced Power Electronics Components

NASA Technical Reports Server (NTRS)

Schwarze, Gene E.

2004-01-01

This paper will give a description and status of the Advanced Power Electronics Materials and Components Technology program being conducted by the NASA Glenn Research Center for future aerospace power applications. The focus of this research program is on the following: 1) New and/or significantly improved dielectric materials for the development of power capacitors with increased volumetric efficiency, energy density, and operating temperature. Materials being investigated include nanocrystalline and composite ceramic dielectrics and diamond-like carbon films; 2) New and/or significantly improved high frequency, high temperature, low loss soft magnetic materials for the development of transformers/inductors with increased power/energy density, electrical efficiency, and operating temperature. Materials being investigated include nanocrystalline and nanocomposite soft magnetic materials; 3) Packaged high temperature, high power density, high voltage, and low loss SiC diodes and switches. Development of high quality 4H- and 6H- SiC atomically smooth substrates to significantly improve device performance is a major emphasis of the SiC materials program; 4) Demonstration of high temperature (> 200 C) circuits using the components developed above.

Innovative thermal energy harvesting for future autonomous applications

NASA Astrophysics Data System (ADS)

Monfray, Stephane

2013-12-01

As communicating autonomous systems market is booming, the role of energy harvesting will be a key enabler. As example, heat is one of the most abundant energy sources that can be converted into electricity in order to power circuits. Harvesting systems that use wasted heat open new ways to power autonomous sensors when the energy consumption is low, or to create systems of power generators when the conversion efficiency is high. The combination of different technologies (low power μ-processors, μ-batteries, radio, sensors...) with new energy harvesters compatible with large varieties of use-cases with allow to address this booming market. Thanks to the conjunction of ultra-low power electronic development, 3D technologies & Systems in Package approaches, the integration of autonomous sensors and electronics with ambient energy harvesting will be achievable. The applications are very wide, from environment and industrial sensors to medical portable applications, and the Internet of things may also represent in the future a several billions units market.

Maxwell's demons realized in electronic circuits

NASA Astrophysics Data System (ADS)

Koski, Jonne V.; Pekola, Jukka P.

2016-12-01

We review recent progress in making the former gedanken experiments of Maxwell's demon [1] into real experiments in a lab. In particular, we focus on realizations based on single-electron tunneling in electronic circuits. We first present how stochastic thermodynamics can be investigated in these circuits. Next we review recent experiments on an electron-based Szilard engine. Finally, we report on experiments on single-electron tunneling-based cooling, overviewing the recent realization of a Coulomb gap refrigerator, as well as an autonomous Maxwell's demon.

Very large scale heterogeneous integration (VLSHI) and wafer-level vacuum packaging for infrared bolometer focal plane arrays

NASA Astrophysics Data System (ADS)

Forsberg, Fredrik; Roxhed, Niclas; Fischer, Andreas C.; Samel, Björn; Ericsson, Per; Hoivik, Nils; Lapadatu, Adriana; Bring, Martin; Kittilsland, Gjermund; Stemme, Göran; Niklaus, Frank

2013-09-01

Imaging in the long wavelength infrared (LWIR) range from 8 to 14 μm is an extremely useful tool for non-contact measurement and imaging of temperature in many industrial, automotive and security applications. However, the cost of the infrared (IR) imaging components has to be significantly reduced to make IR imaging a viable technology for many cost-sensitive applications. This paper demonstrates new and improved fabrication and packaging technologies for next-generation IR imaging detectors based on uncooled IR bolometer focal plane arrays. The proposed technologies include very large scale heterogeneous integration for combining high-performance, SiGe quantum-well bolometers with electronic integrated read-out circuits and CMOS compatible wafer-level vacuum packing. The fabrication and characterization of bolometers with a pitch of 25 μm × 25 μm that are arranged on read-out-wafers in arrays with 320 × 240 pixels are presented. The bolometers contain a multi-layer quantum well SiGe thermistor with a temperature coefficient of resistance of -3.0%/K. The proposed CMOS compatible wafer-level vacuum packaging technology uses Cu-Sn solid-liquid interdiffusion (SLID) bonding. The presented technologies are suitable for implementation in cost-efficient fabless business models with the potential to bring about the cost reduction needed to enable low-cost IR imaging products for industrial, security and automotive applications.

Virtual Lab to Develop Achievement in Electronic Circuits for Hearing-Impaired Students

ERIC Educational Resources Information Center

Baladoh, S. M.; Elgamal, A. F.; Abas, H. A.

2017-01-01

This paper aims to report and discuss the use of a virtual lab for developing achievement in electronic circuits for hearing-impaired students. Results from a number of studies have proved that the virtual lab allowed students to build and test a wide variety of electronic circuits. The present study was implemented to investigate the…

Radiation damage in MOS integrated circuits, Part 1

NASA Technical Reports Server (NTRS)

Danchenko, V.

1971-01-01

Complementary and p-channel MOS integrated circuits made by four commercial manufacturers were investigated for sensitivity to radiation environment. The circuits were irradiated with 1.5 MeV electrons. The results are given for electrons and for the Co-60 gamma radiation equivalent. The data are presented in terms of shifts in the threshold potentials and changes in transconductances and leakages. Gate biases of -10V, +10V and zero volts were applied to individual MOS units during irradiation. It was found that, in most of circuits of complementary MOS technologies, noticable changes due to radiation appear first as increased leakage in n-channel MOSFETs somewhat before a total integrated dose 10 to the 12th power electrons/sg cm is reached. The inability of p-channel MOSFETs to turn on sets in at about 10 to the 13th power electrons/sq cm. Of the circuits tested, an RCA A-series circuit was the most radiation resistant sample.

21 CFR 1314.110 - Reports for mail-order sales.

Code of Federal Regulations, 2010 CFR

2010-04-01

... Administration, submit the report in electronic form, either via computer disk or direct electronic data... units (e.g., 100 doses per package); (11) Package type (blister pack, etc.); (12) Number of packages...

21 CFR 1314.110 - Reports for mail-order sales.

Code of Federal Regulations, 2014 CFR

2014-04-01

... Administration, submit the report in electronic form, either via computer disk or direct electronic data... units (e.g., 100 doses per package); (11) Package type (blister pack, etc.); (12) Number of packages...

21 CFR 1314.110 - Reports for mail-order sales.

Code of Federal Regulations, 2013 CFR

2013-04-01

... Administration, submit the report in electronic form, either via computer disk or direct electronic data... units (e.g., 100 doses per package); (11) Package type (blister pack, etc.); (12) Number of packages...

21 CFR 1314.110 - Reports for mail-order sales.

Code of Federal Regulations, 2011 CFR

2011-04-01

... Administration, submit the report in electronic form, either via computer disk or direct electronic data... units (e.g., 100 doses per package); (11) Package type (blister pack, etc.); (12) Number of packages...

21 CFR 1314.110 - Reports for mail-order sales.

Code of Federal Regulations, 2012 CFR

2012-04-01

... Administration, submit the report in electronic form, either via computer disk or direct electronic data... units (e.g., 100 doses per package); (11) Package type (blister pack, etc.); (12) Number of packages...

Printed Electronic Devices in Human Spaceflight

NASA Technical Reports Server (NTRS)

Bacon, John B.

2004-01-01

The space environment requires robust sensing, control, and automation, whether in support of human spaceflight or of robotic exploration. Spaceflight embodies the known extremes of temperature, radiation, shock, vibration, and static loads, and demands high reliability at the lowest possible mass. Because printed electronic circuits fulfill all these requirements, printed circuit technology and the exploration of space have been closely coupled throughout their short histories. In this presentation, we will explore the space (and space launch) environments as drivers of printed circuit design, a brief history of NASA's use of printed electronic circuits, and we will examine future requirements for such circuits in our continued exploration of space.

Vehicle drive module having improved terminal design

DOEpatents

Beihoff, Bruce C.; Radosevich, Lawrence D.; Phillips, Mark G.; Kehl, Dennis L.; Kaishian, Steven C.; Kannenberg, Daniel G.

2006-04-25

A terminal structure for vehicle drive power electronics circuits reduces the need for a DC bus and thereby the incidence of parasitic inductance. The structure is secured to a support that may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. The support may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as by direct contact between the terminal assembly and AC and DC circuit components. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

Power converter having improved terminal structure

DOEpatents

Radosevich, Lawrence D.; Kannenberg, Daniel G.; Phillips, Mark G.; Kaishian, Steven C.

2007-03-06

A terminal structure for power electronics circuits reduces the need for a DC bus and thereby the incidence of parasitic inductance. The structure is secured to a support that may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. The support may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as by direct contact between the terminal assembly and AC and DC circuit components. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

A methodology of SiP testing based on boundary scan

NASA Astrophysics Data System (ADS)

Qin, He; Quan, Haiyang; Han, Yifei; Zhu, Tianrui; Zheng, Tuo

2017-10-01

System in Package (SiP) play an important role in portable, aerospace and military electronic with the microminiaturization, light weight, high density, and high reliability. At present, SiP system test has encountered the problem on system complexity and malfunction location with the system scale exponentially increase. For SiP system, this paper proposed a testing methodology and testing process based on the boundary scan technology. Combining the character of SiP system and referencing the boundary scan theory of PCB circuit and embedded core test, the specific testing methodology and process has been proposed. The hardware requirement of the under test SiP system has been provided, and the hardware platform of the testing has been constructed. The testing methodology has the character of high test efficiency and accurate malfunction location.

Echidna Mark II: one giant leap for 'tilting spine' fibre positioning technology

NASA Astrophysics Data System (ADS)

Gilbert, James; Dalton, Gavin

2016-07-01

The Australian Astronomical Observatory's 'tilting spine' fibre positioning technology has been redeveloped to provide superior performance in a smaller package. The new design offers demonstrated closed-loop positioning errors of <2.8 μm RMS in only five moves ( 10 s excluding metrology overheads) and an improved capacity for open-loop tracking during observations. Tilt-induced throughput losses have been halved by lengthening spines while maintaining excellent accuracy. New low-voltage multilayer piezo actuator technology has reduced a spine's peak drive amplitude from 150V to <10V, simplifying the control electronics design, reducing the system's overall size, and improving modularity. Every spine is now a truly independent unit with a dedicated drive circuit and no restrictions on the timing or direction of fibre motion.

Electronic switches and control circuits: A compilation

NASA Technical Reports Server (NTRS)

1971-01-01

The innovations in this updated series of compilations dealing with electronic technology represents a carefully selected collection of items on electronic switches and control circuits. Most of the items are based on well-known circuit design concepts that have been simplified or refined to meet NASA's demanding requirement for reliability, simplicity, fail-safe characteristics, and the capability of withstanding environmental extremes.

Vision Technology for Automated Inspection of Hybrid Microelectronics Assemblies

DTIC Science & Technology

1988-06-01

circuits are a very efficient packaging technique, with the primary advantages of size, better resistance to environ - 0 ments, and the flexibility to...produced for the military are much more complex and have more stringent performance requirements, particularly in their resistance to environments and...boards, particularly because of the need to protect circuits from a hostile environment such as salt, heat, and moisture. Included among the major U.S

Miniature Housings for Electronics With Standard Interfaces

NASA Technical Reports Server (NTRS)

Howard, David E.; Smith, Dennis A.; Alhorn, Dean C.

2006-01-01

A family of general-purpose miniature housings has been designed to contain diverse sensors, actuators, and drive circuits plus associated digital electronic readout and control circuits. The circuits contained in the housings communicate with the external world via standard RS-485 interfaces.

Hermetic electronic packaging of an implantable brain-machine-interface with transcutaneous optical data communication.

PubMed

Schuettler, Martin; Kohler, Fabian; Ordonez, Juan S; Stieglitz, Thomas

2012-01-01

Future brain-computer-interfaces (BCIs) for severely impaired patients are implanted to electrically contact the brain tissue. Avoiding percutaneous cables requires amplifier and telemetry electronics to be implanted too. We developed a hermetic package that protects the electronic circuitry of a BCI from body moisture while permitting infrared communication through the package wall made from alumina ceramic. The ceramic package is casted in medical grade silicone adhesive, for which we identified MED2-4013 as a promising candidate.

Synthetic Biology: A Unifying View and Review Using Analog Circuits.

PubMed

Teo, Jonathan J Y; Woo, Sung Sik; Sarpeshkar, Rahul

2015-08-01

We review the field of synthetic biology from an analog circuits and analog computation perspective, focusing on circuits that have been built in living cells. This perspective is well suited to pictorially, symbolically, and quantitatively representing the nonlinear, dynamic, and stochastic (noisy) ordinary and partial differential equations that rigorously describe the molecular circuits of synthetic biology. This perspective enables us to construct a canonical analog circuit schematic that helps unify and review the operation of many fundamental circuits that have been built in synthetic biology at the DNA, RNA, protein, and small-molecule levels over nearly two decades. We review 17 circuits in the literature as particular examples of feedforward and feedback analog circuits that arise from special topological cases of the canonical analog circuit schematic. Digital circuit operation of these circuits represents a special case of saturated analog circuit behavior and is automatically incorporated as well. Many issues that have prevented synthetic biology from scaling are naturally represented in analog circuit schematics. Furthermore, the deep similarity between the Boltzmann thermodynamic equations that describe noisy electronic current flow in subthreshold transistors and noisy molecular flux in biochemical reactions has helped map analog circuit motifs in electronics to analog circuit motifs in cells and vice versa via a `cytomorphic' approach. Thus, a body of knowledge in analog electronic circuit design, analysis, simulation, and implementation may also be useful in the robust and efficient design of molecular circuits in synthetic biology, helping it to scale to more complex circuits in the future.

Assessment of SOI Devices and Circuits at Extreme Temperatures

NASA Technical Reports Server (NTRS)

Elbuluk, Malik; Hammoud, Ahmad; Patterson, Richard L.

2007-01-01

Electronics designed for use in future NASA space exploration missions are expected to encounter extreme temperatures and wide thermal swings. Such missions include planetary surface exploration, bases, rovers, landers, orbiters, and satellites. Electronics designed for such applications must, therefore, be able to withstand exposure to extreme temperatures and to perform properly for the duration of mission. The Low Temperature Electronics Program at the NASA Glenn Research Center focuses on research and development of electrical devices, circuits, and systems suitable for applications in deep space exploration missions and aerospace environment. Silicon-On-Insulator (SOI) technology has been under active consideration in the electronics industry for many years due to the advantages that it can provide in integrated circuit (IC) chips and computer processors. Faster switching, less power, radiationtolerance, reduced leakage, and high temp-erature capability are some of the benefits that are offered by using SOI-based devices. A few SOI circuits are available commercially. However, there is a noticeable interest in SOI technology for different applications. Very little data, however, exist on the performance of such circuits under cryogenic temperatures. In this work, the performance of SOI integrated circuits, evaluated under low temperature and thermal cycling, are reported. In particular, three examples of SOI circuits that have been tested for operation at low at temperatures are given. These circuits are SOI operational amplifiers, timers and power MOSFET drivers. The investigations were carried out to establish a baseline on the functionality and to determine suitability of these circuits for use in space exploration missions at cryogenic temperatures. The findings are useful to mission planners and circuit designers so that proper selection of electronic parts can be made, and risk assessment can be established for such circuits for use in space missions.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

University of Illinois

2009-04-21

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A [Champaign, IL; Khang, Dahl-Young [Seoul, KR; Sun, Yugang [Naperville, IL; Menard, Etienne [Durham, NC

2012-06-12

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A.; Khang, Dahl-Young; Sun, Yugang; Menard, Etienne

2014-06-17

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A.; Khang, Dahl-Young; Sun, Yugang; Menard, Etienne

2016-12-06

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A.; Khang, Dahl -Young; Sun, Yugang; Menard, Etienne

2015-08-11

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Localized radio frequency communication using asynchronous transfer mode protocol

DOEpatents

Witzke, Edward L [Edgewood, NM; Robertson, Perry J [Albuquerque, NM; Pierson, Lyndon G [Albuquerque, NM

2007-08-14

A localized wireless communication system for communication between a plurality of circuit boards, and between electronic components on the circuit boards. Transceivers are located on each circuit board and electronic component. The transceivers communicate with one another over spread spectrum radio frequencies. An asynchronous transfer mode protocol controls communication flow with asynchronous transfer mode switches located on the circuit boards.

Electronic control circuits: A compilation

NASA Technical Reports Server (NTRS)

1973-01-01

A compilation of technical R and D information on circuits and modular subassemblies is presented as a part of a technology utilization program. Fundamental design principles and applications are given. Electronic control circuits discussed include: anti-noise circuit; ground protection device for bioinstrumentation; temperature compensation for operational amplifiers; hybrid gatling capacitor; automatic signal range control; integrated clock-switching control; and precision voltage tolerance detector.

Paper-based silver-nanowire electronic circuits with outstanding electrical conductivity and extreme bending stability.

PubMed

Huang, Gui-Wen; Xiao, Hong-Mei; Fu, Shao-Yun

2014-08-07

Here a facile, green and efficient printing-filtration-press (PFP) technique is reported for room-temperature (RT) mass-production of low-cost, environmentally friendly, high performance paper-based electronic circuits. The as-prepared silver nanowires (Ag-NWs) are uniformly deposited at RT on a pre-printed paper substrate to form high quality circuits via vacuum filtration and pressing. The PFP circuit exhibits more excellent electrical property and bending stability compared with other flexible circuits made by existing techniques. Furthermore, practical applications of the PFP circuits are demonstrated.

Book of Knowledge (BOK) for NASA Electronic Packaging Roadmap

NASA Technical Reports Server (NTRS)

Ghaffarian, Reza

2015-01-01

The objective of this document is to update the NASA roadmap on packaging technologies (initially released in 2007) and to present the current trends toward further reducing size and increasing functionality. Due to the breadth of work being performed in the area of microelectronics packaging, this report presents only a number of key packaging technologies detailed in three industry roadmaps for conventional microelectronics and a more recently introduced roadmap for organic and printed electronics applications. The topics for each category were down-selected by reviewing the 2012 reports of the International Technology Roadmap for Semiconductor (ITRS), the 2013 roadmap reports of the International Electronics Manufacturing Initiative (iNEMI), the 2013 roadmap of association connecting electronics industry (IPC), the Organic Printed Electronics Association (OE-A). The report also summarizes the results of numerous articles and websites specifically discussing the trends in microelectronics packaging technologies.

[The development and operation of a package inserts service system for electronic medical records].

PubMed

Yamada, Hidetoshi; Nishimura, Sachiho; Shimamori, Yoshimitsu; Sato, Seiji; Hayase, Yukitoshi

2003-03-01

To promote the appropriate use of pharmaceuticals and to prevent side effects, physicians need package inserts on medicinal drugs as soon as possible. A medicinal drug information service system was established for electronic medical records to speed up and increase the efficiency of package insert communications within a medical institution. Development of this system facilitates access to package inserts by, for example, physicians. The time required to maintain files of package inserts was shortened, and the efficiency of the drug information service increased. As a source of package inserts for this system, package inserts using a standard generalized markup language (SGML) form were used, which are accessible to the public on the homepage of the Organization for Pharmaceutical Safety and Research (OPSR). This study found that a delay occurred in communicating revised package inserts from pharmaceutical companies to the OPSR. Therefore a pharmaceutical department page was set up as part of the homepage of the medical institution for electronic medical records to shorten the delay in the revision of package inserts posted on the medicinal drug information service homepage of the OPSR. The usefulness of this package insert service system for electronic medical records is clear. For more effective use of this system based on the OPSR homepage pharmaceutical companies have been requested to provide quicker updating of package inserts.

Scalability issues in evolutionary synthesis of electronic circuits: lessons learned and challenges ahead

NASA Technical Reports Server (NTRS)

Stoica, A.; Keymeulen, D.; Zebulum, R. S.; Ferguson, M. I.

2003-01-01

This paper describes scalability issues of evolutionary-driven automatic synthesis of electronic circuits. The article begins by reviewing the concepts of circuit evolution and discussing the limitations of this technique when trying to achieve more complex systems.

Electronic circuits

NASA Technical Reports Server (NTRS)

1976-01-01

Twenty-nine circuits and circuit techniques developed for communications and instrumentation technology are described. Topics include pulse-code modulation, phase-locked loops, data coding, data recording, detection circuits, logic circuits, oscillators, and amplifiers.

USSR and Eastern Europe Scientific Abstracts, Electronics and Electrical Engineering, Number 27

DTIC Science & Technology

1977-02-10

input and output conditions. The power section of the circuit is modified to permit triacs and thyristors, respectively, to function. The purpose of the...electronic materials, components, and devices, on circuit theory, pulse techniques, electromagnetic wave propagation, radar, quantum electronic theory...Lasers, Masers, Holography, Quasi-Optical 20 Microelectronics and General Circuit Theory and Information 21 Radars and Radio Wavigati on 22

Deterioration of ZnO/SiO2 diode packages in high humidity

NASA Technical Reports Server (NTRS)

Evans, John; Wagner, Scott

1987-01-01

A case study is reported in which the ZnO/SiO2 glass used to package a power rectifier combined with the design to produce a catastropic corrosion failure of the system. Metallic Zn inclusions, present in the glass, played a critical role in creating a conductive path for corrosion currents. Actual equipment failure was the result of an open circuit trace created by corrosion. It is concluded that the presence of Zn inclusions in the glass of this type of package may result in long-term reliability problems for equipment used in high humidity environments.

JTEC Panel report on electronic manufacturing and packaging in Japan

NASA Technical Reports Server (NTRS)

Kelly, Michael J.; Boulton, William R. (Editor); Kukowski, John; Meieran, Gene; Pecht, Michael; Peeples, John; Tummala, Rao; Dehaemer, Michael J.; Holdridge, Geoff (Editor); Gamota, George

1995-01-01

This report summarizes the status of electronic manufacturing and packaging technology in Japan in comparison to that in the United States, and its impact on competition in electronic manufacturing in general. In addition to electronic manufacturing technologies, the report covers technology and manufacturing infrastructure, electronics manufacturing and assembly, quality assurance and reliability in the Japanese electronics industry, and successful product realization strategies. The panel found that Japan leads the United States in almost every electronics packaging technology. Japan clearly has achieved a strategic advantage in electronics production and process technologies. Panel members believe that Japanese competitors could be leading U.S. firms by as much as a decade in some electronics process technologies.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pease, R.L.; Shaneyfelt, M.; Winokur, P.

The ionizing radiation response of several semiconductor process technologies has been shown to be enhanced by plastic packaging and/or pre-conditioning (burn-in). Potential mechanisms for this effect are discussed and data on bipolar linear circuits are presented.

Reliability of high I/O high density CCGA interconnect electronic packages under extreme thermal environments

NASA Astrophysics Data System (ADS)

Ramesham, Rajeshuni

2012-03-01

Ceramic column grid array (CCGA) packages have been increasing in use based on their advantages such as high interconnect density, very good thermal and electrical performances, compatibility with standard surfacemount packaging assembly processes, and so on. CCGA packages are used in space applications such as in logic and microprocessor functions, telecommunications, payload electronics, and flight avionics. As these packages tend to have less solder joint strain relief than leaded packages or more strain relief over lead-less chip carrier packages, the reliability of CCGA packages is very important for short-term and long-term deep space missions. We have employed high density CCGA 1152 and 1272 daisy chained electronic packages in this preliminary reliability study. Each package is divided into several daisy-chained sections. The physical dimensions of CCGA1152 package is 35 mm x 35 mm with a 34 x 34 array of columns with a 1 mm pitch. The dimension of the CCGA1272 package is 37.5 mm x 37.5 mm with a 36 x 36 array with a 1 mm pitch. The columns are made up of 80% Pb/20%Sn material. CCGA interconnect electronic package printed wiring polyimide boards have been assembled and inspected using non-destructive x-ray imaging techniques. The assembled CCGA boards were subjected to extreme temperature thermal atmospheric cycling to assess their reliability for future deep space missions. The resistance of daisy-chained interconnect sections were monitored continuously during thermal cycling. This paper provides the experimental test results of advanced CCGA packages tested in extreme temperature thermal environments. Standard optical inspection and x-ray non-destructive inspection tools were used to assess the reliability of high density CCGA packages for deep space extreme temperature missions.

Comprehensive photonics-electronics convergent simulation and its application to high-speed electronic circuit integration on a Si/Ge photonic chip

NASA Astrophysics Data System (ADS)

Takeda, Kotaro; Honda, Kentaro; Takeya, Tsutomu; Okazaki, Kota; Hiraki, Tatsurou; Tsuchizawa, Tai; Nishi, Hidetaka; Kou, Rai; Fukuda, Hiroshi; Usui, Mitsuo; Nosaka, Hideyuki; Yamamoto, Tsuyoshi; Yamada, Koji

2015-01-01

We developed a design technique for a photonics-electronics convergence system by using an equivalent circuit of optical devices in an electrical circuit simulator. We used the transfer matrix method to calculate the response of an optical device. This method used physical parameters and dimensions of optical devices as calculation parameters to design a device in the electrical circuit simulator. It also used an intermediate frequency to express the wavelength dependence of optical devices. By using both techniques, we simulated bit error rates and eye diagrams of optical and electrical integrated circuits and calculated influences of device structure change and wavelength shift penalty.

Power converter having improved fluid cooling

DOEpatents

Meyer, Andreas A.; Radosevich, Lawrence D.; Beihoff, Bruce C.; Kehl, Dennis L.; Kannenberg, Daniel G.

2007-03-06

A thermal support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support, which may be controlled in a closed-loop manner. Interfacing between circuits, circuit mounting structure, and the support provide for greatly enhanced cooling. The support may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

47 CFR 32.2211 - Non-digital switching.

Code of Federal Regulations, 2010 CFR

2010-10-01

... switching. (a) This account shall include: (1) Original cost of stored program control analog circuit-switching and associated equipment. (2) Cost of remote analog electronic circuit switches. (3) Original cost of non-electronic circuit-switching equipment such as Step-by-Step, Crossbar, and Other Electro...

47 CFR 32.2211 - Non-digital switching.

Code of Federal Regulations, 2013 CFR

2013-10-01

... switching. (a) This account shall include: (1) Original cost of stored program control analog circuit-switching and associated equipment. (2) Cost of remote analog electronic circuit switches. (3) Original cost of non-electronic circuit-switching equipment such as Step-by-Step, Crossbar, and Other Electro...

47 CFR 32.2211 - Non-digital switching.

Code of Federal Regulations, 2012 CFR

2012-10-01

... switching. (a) This account shall include: (1) Original cost of stored program control analog circuit-switching and associated equipment. (2) Cost of remote analog electronic circuit switches. (3) Original cost of non-electronic circuit-switching equipment such as Step-by-Step, Crossbar, and Other Electro...

47 CFR 32.2211 - Non-digital switching.

Code of Federal Regulations, 2011 CFR

2011-10-01

... switching. (a) This account shall include: (1) Original cost of stored program control analog circuit-switching and associated equipment. (2) Cost of remote analog electronic circuit switches. (3) Original cost of non-electronic circuit-switching equipment such as Step-by-Step, Crossbar, and Other Electro...

47 CFR 32.2211 - Non-digital switching.

Code of Federal Regulations, 2014 CFR

2014-10-01

... switching. (a) This account shall include: (1) Original cost of stored program control analog circuit-switching and associated equipment. (2) Cost of remote analog electronic circuit switches. (3) Original cost of non-electronic circuit-switching equipment such as Step-by-Step, Crossbar, and Other Electro...

Power converter having improved EMI shielding

DOEpatents

Beihoff, Bruce C.; Kehl, Dennis L.; Gettelfinger, Lee A.; Kaishian, Steven C.; Phillips, Mark G.; Radosevich, Lawrence D.

2006-06-13

EMI shielding is provided for power electronics circuits and the like via a direct-mount reference plane support and shielding structure. The thermal support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. The support forms a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

Power converter connection configuration

DOEpatents

Beihoff, Bruce C.; Kehl, Dennis L.; Gettelfinger, Lee A.; Kaishian, Steven C.; Phillips, Mark G.; Radosevich, Lawrence D.

2008-11-11

EMI shielding is provided for power electronics circuits and the like via a direct-mount reference plane support and shielding structure. The thermal support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. The support forms a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

47 CFR 32.2212 - Digital electronic switching.

Code of Federal Regulations, 2012 CFR

2012-10-01

... shall include the original cost of digital electronic switching equipment used to provide circuit... electronic switching equipment used to provide both circuit and packet switching shall be recorded in the... 47 Telecommunication 2 2012-10-01 2012-10-01 false Digital electronic switching. 32.2212 Section...

47 CFR 32.2212 - Digital electronic switching.

Code of Federal Regulations, 2014 CFR

2014-10-01

... shall include the original cost of digital electronic switching equipment used to provide circuit... electronic switching equipment used to provide both circuit and packet switching shall be recorded in the... 47 Telecommunication 2 2014-10-01 2014-10-01 false Digital electronic switching. 32.2212 Section...

47 CFR 32.2212 - Digital electronic switching.

Code of Federal Regulations, 2011 CFR

2011-10-01

... shall include the original cost of digital electronic switching equipment used to provide circuit... electronic switching equipment used to provide both circuit and packet switching shall be recorded in the... 47 Telecommunication 2 2011-10-01 2011-10-01 false Digital electronic switching. 32.2212 Section...

47 CFR 32.2212 - Digital electronic switching.

Code of Federal Regulations, 2010 CFR

2010-10-01

... shall include the original cost of digital electronic switching equipment used to provide circuit... electronic switching equipment used to provide both circuit and packet switching shall be recorded in the... 47 Telecommunication 2 2010-10-01 2010-10-01 false Digital electronic switching. 32.2212 Section...

47 CFR 32.2212 - Digital electronic switching.

Code of Federal Regulations, 2013 CFR

2013-10-01

... shall include the original cost of digital electronic switching equipment used to provide circuit... electronic switching equipment used to provide both circuit and packet switching shall be recorded in the... 47 Telecommunication 2 2013-10-01 2013-10-01 false Digital electronic switching. 32.2212 Section...

Electronic circuits for communications systems: A compilation

NASA Technical Reports Server (NTRS)

1972-01-01

The compilation of electronic circuits for communications systems is divided into thirteen basic categories, each representing an area of circuit design and application. The compilation items are moderately complex and, as such, would appeal to the applications engineer. However, the rationale for the selection criteria was tailored so that the circuits would reflect fundamental design principles and applications, with an additional requirement for simplicity whenever possible.

Packaging Concerns/Techniques for Large Devices

NASA Technical Reports Server (NTRS)

Sampson, Michael J.

2009-01-01

This slide presentation reviews packaging challenges and options for electronic parts. The presentation includes information about non-hermetic packages, space challenges for packaging and complex package variations.

The MSFC complementary metal oxide semiconductor (including multilevel interconnect metallization) process handbook

NASA Technical Reports Server (NTRS)

Bouldin, D. L.; Eastes, R. W.; Feltner, W. R.; Hollis, B. R.; Routh, D. E.

1979-01-01

The fabrication techniques for creation of complementary metal oxide semiconductor integrated circuits at George C. Marshall Space Flight Center are described. Examples of C-MOS integrated circuits manufactured at MSFC are presented with functional descriptions of each. Typical electrical characteristics of both p-channel metal oxide semiconductor and n-channel metal oxide semiconductor discrete devices under given conditions are provided. Procedures design, mask making, packaging, and testing are included.

The NATO III 5 MHz Distribution System

NASA Technical Reports Server (NTRS)

Vulcan, A.; Bloch, M.

1981-01-01

A high performance 5 MHz distribution system is described which has extremely low phase noise and jitter characteristics and provides multiple buffered outputs. The system is completely redundant with automatic switchover and is self-testing. Since the 5 MHz reference signals distributed by the NATO III distribution system are used for up-conversion and multiplicative functions, a high degree of phase stability and isolation between outputs is necessary. Unique circuit design and packaging concepts insure that the isolation between outputs is sufficient to quarantee a phase perturbation of less than 0.0016 deg when other outputs are open circuited, short circuited or terminated in 50 ohms. Circuit design techniques include high isolation cascode amplifiers. Negative feedback stabilizes system gain and minimizes circuit phase noise contributions. Balanced lines, in lieu of single ended coaxial transmission media, minimize pickup.

Pulse transducer with artifact signal attenuator. [heart rate sensors

NASA Technical Reports Server (NTRS)

Cash, W. H., Jr.; Polhemus, J. T. (Inventor)

1980-01-01

An artifact signal attenuator for a pulse rate sensor is described. The circuit for attenuating background noise signals is connected with a pulse rate transducer which has a light source and a detector for light reflected from blood vessels of a living body. The heart signal provided consists of a modulated dc signal voltage indicative of pulse rate. The artifact signal resulting from light reflected from the skin of the body comprises both a constant dc signal voltage and a modulated dc signal voltage. The amplitude of the artifact signal is greater and the frequency less than that of the heart signal. The signal attenuator circuit includes an operational amplifier for canceling the artifact signal from the output signal of the transducer and has the capability of meeting packaging requirements for wrist-watch-size packages.

Electronics Book II.

ERIC Educational Resources Information Center

Johnson, Dennis; And Others

This manual, the second of three curriculum guides for an electronics course, is intended for use in a program combining vocational English as a second language (VESL) with bilingual vocational education. Ten units cover the electrical team, Ohm's law, Watt's law, series resistive circuits, parallel resistive circuits, series parallel circuits,…

An electronic circuit for sensing malfunctions in test instrumentation

NASA Technical Reports Server (NTRS)

Miller, W. M., Jr.

1969-01-01

Monitoring device differentiates between malfunctions occurring in the system undergoing test and malfunctions within the test instrumentation itself. Electronic circuits in the monitor use transistors to commutate silicon controlled rectifiers by removing the drive voltage, display circuits are then used to monitor multiple discrete lines.

Electronic circuit detects left ventricular ejection events in cardiovascular system

NASA Technical Reports Server (NTRS)

Gebben, V. D.; Webb, J. A., Jr.

1972-01-01

Electronic circuit processes arterial blood pressure waveform to produce discrete signals that coincide with beginning and end of left ventricular ejection. Output signals provide timing signals for computers that monitor cardiovascular systems. Circuit operates reliably for heart rates between 50 and 200 beats per minute.

CIRCUS--A digital computer program for transient analysis of electronic circuits

NASA Technical Reports Server (NTRS)

Moore, W. T.; Steinbert, L. L.

1968-01-01

Computer program simulates the time domain response of an electronic circuit to an arbitrary forcing function. CIRCUS uses a charge-control parameter model to represent each semiconductor device. Given the primary photocurrent, the transient behavior of a circuit in a radiation environment is determined.

Compact high voltage solid state switch

DOEpatents

Glidden, Steven C.

2003-09-23

A compact, solid state, high voltage switch capable of high conduction current with a high rate of current risetime (high di/dt) that can be used to replace thyratrons in existing and new applications. The switch has multiple thyristors packaged in a single enclosure. Each thyristor has its own gate drive circuit that circuit obtains its energy from the energy that is being switched in the main circuit. The gate drives are triggered with a low voltage, low current pulse isolated by a small inexpensive transformer. The gate circuits can also be triggered with an optical signal, eliminating the trigger transformer altogether. This approach makes it easier to connect many thyristors in series to obtain the hold off voltages of greater than 80 kV.

Free-world microelectronic manufacturing equipment

NASA Astrophysics Data System (ADS)

Kilby, J. S.; Arnold, W. H.; Booth, W. T.; Cunningham, J. A.; Hutcheson, J. D.; Owen, R. W.; Runyan, W. R.; McKenney, Barbara L.; McGrain, Moira; Taub, Renee G.

1988-12-01

Equipment is examined and evaluated for the manufacture of microelectronic integrated circuit devices and sources for that equipment within the Free World. Equipment suitable for the following are examined: single-crystal silicon slice manufacturing and processing; required lithographic processes; wafer processing; device packaging; and test of digital integrated circuits. Availability of the equipment is also discussed, now and in the near future. Very adequate equipment for most stages of the integrated circuit manufacturing process is available from several sources, in different countries, although the best and most widely used versions of most manufacturing equipment are made in the United States or Japan. There is also an active market in used equipment, suitable for manufacture of capable integrated circuits with performance somewhat short of the present state of the art.

Prolonged 500 C Operation of 100+ Transistor Silicon Carbide Integrated Circuits

NASA Technical Reports Server (NTRS)

Spry, David J.; Neudeck, Philip G.; Lukco, Dorothy; Chen, Liangyu; Krasowski, Michael J.; Prokop, Norman F.; Chang, Carl W.; Beheim, Glenn M.

2017-01-01

This report describes more than 5000 hours of successful 500 C operation of semiconductor integrated circuits (ICs) with more than 100 transistors. Multiple packaged chips with two different 4H-SiC junction field effect transistor (JFET) technology demonstrator circuits have surpassed thousands of hours of oven-testing at 500 C. After 100 hours of 500 C burn-in, the circuits (except for 2 failures) exhibit less than 10% change in output characteristics for the remainder of 500 C testing. We also describe the observation of important differences in IC materials durability when subjected to the first nine constituents of Venus-surface atmosphere at 9.4 MPa and 460 C in comparison to what is observed for Earth-atmosphere oven testing at 500 C.

Prolonged 500 C Operation of 100+ Transistor Silicon Carbide Integrated Circuits

NASA Technical Reports Server (NTRS)

Spry, David J.; Neudeck, Philip G.; Lukco, Dorothy; Chen, Liangyu; Krasowski, Michael J.; Prokop, Norman F.; Chang, Carl W.; Beheim, Glenn M.

2017-01-01

This report describes more than 5000 hours of successful 500 C operation of semiconductor integrated circuits (ICs) with more than 100 transistors. Multiple packaged chips with two different 4H-SiC junction field effect transistor (JFET) technology demonstrator circuits have surpassed thousands of hours of oven-testing at 500 C. After 100 hours of 500 C burn-in, the circuits (except for 2 failures) exhibit less than 10 change in output characteristics for the remainder of 500C testing. We also describe the observation of important differences in IC materials durability when subjected to the first nine constituents of Venus-surface atmosphere at 9.4 MPa and 460C in comparison to what is observed for Earth-atmosphere oven testing at 500 C.

Thermal Management and Packaging Reliability (Text Version) |

Science.gov Websites

Transportation Research | NREL Thermal Management and Packaging Reliability (Text Version ) Thermal Management and Packaging Reliability (Text Version) Learn how NREL's thermal management and ;Boosting Thermal Management & Reliability of Vehicle Power Electronics." Better power electronics

Electronic filters, hearing aids and methods

NASA Technical Reports Server (NTRS)

Engebretson, A. Maynard (Inventor)

1995-01-01

An electronic filter for an electroacoustic system. The system has a microphone for generating an electrical output from external sounds and an electrically driven transducer for emitting sound. Some of the sound emitted by the transducer returns to the microphone means to add a feedback contribution to its electrical output. The electronic filter includes a first circuit for electronic processing of the electrical output of the microphone to produce a first signal. An adaptive filter, interconnected with the first circuit, performs electronic processing of the first signal to produce an adaptive output to the first circuit to substantially offset the feedback contribution in the electrical output of the microphone, and the adaptive filter includes means for adapting only in response to polarities of signals supplied to and from the first circuit. Other electronic filters for hearing aids, public address systems and other electroacoustic systems, as well as such systems and methods of operating them are also disclosed.

Electronic filters, hearing aids and methods

NASA Technical Reports Server (NTRS)

Engebretson, A. Maynard (Inventor); O'Connell, Michael P. (Inventor); Zheng, Baohua (Inventor)

1991-01-01

An electronic filter for an electroacoustic system. The system has a microphone for generating an electrical output from external sounds and an electrically driven transducer for emitting sound. Some of the sound emitted by the transducer returns to the microphone means to add a feedback contribution to its electical output. The electronic filter includes a first circuit for electronic processing of the electrical output of the microphone to produce a filtered signal. An adaptive filter, interconnected with the first circuit, performs electronic processing of the filtered signal to produce an adaptive output to the first circuit to substantially offset the feedback contribution in the electrical output of the microphone, and the adaptive filter includes means for adapting only in response to polarities of signals supplied to and from the first circuit. Other electronic filters for hearing aids, public address systems and other electroacoustic systems, as well as such systems, and methods of operating them are also disclosed.

Controlled buckling structures in semiconductor interconnects and nanomembranes for stretchable electronics

DOEpatents

Rogers, John A; Meitl, Matthew; Sun, Yugang; Ko, Heung Cho; Carlson, Andrew; Choi, Won Mook; Stoykovich, Mark; Jiang, Hanqing; Huang, Yonggang; Nuzzo, Ralph G; Zhu, Zhengtao; Menard, Etienne; Khang, Dahl-Young

2014-05-20

In an aspect, the present invention provides stretchable, and optionally printable, components such as semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed, and related methods of making or tuning such stretchable components. Stretchable semiconductors and electronic circuits preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention are adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Controlled buckling structures in semiconductor interconnects and nanomembranes for stretchable electronics

DOEpatents

Rogers, John A [Champaign, IL; Meitl, Matthew [Raleigh, NC; Sun, Yugang [Naperville, IL; Ko, Heung Cho [Urbana, IL; Carlson, Andrew [Urbana, IL; Choi, Won Mook [Champaign, IL; Stoykovich, Mark [Dover, NH; Jiang, Hanqing [Urbana, IL; Huang, Yonggang [Glencoe, IL; Nuzzo, Ralph G [Champaign, IL; Lee, Keon Jae [Tokyo, JP; Zhu, Zhengtao [Rapid City, SD; Menard, Etienne [Durham, NC; Khang, Dahl-Young [Seoul, KR; Kan, Seong Jun [Daejeon, KR; Ahn, Jong Hyun [Suwon, KR; Kim, Hoon-sik [Champaign, IL

2012-07-10

In an aspect, the present invention provides stretchable, and optionally printable, components such as semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed, and related methods of making or tuning such stretchable components. Stretchable semiconductors and electronic circuits preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention are adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Development of analog watch with minute repeater

NASA Astrophysics Data System (ADS)

Okigami, Tomio; Aoyama, Shigeru; Osa, Takashi; Igarashi, Kiyotaka; Ikegami, Tomomi

A complementary metal oxide semiconductor with large scale integration was developed for an electronic minute repeater. It is equipped with the synthetic struck sound circuit to generate natural struck sound necessary for the minute repeater. This circuit consists of an envelope curve drawing circuit, frequency mixer, polyphonic mixer, and booster circuit made by using analog circuit technology. This large scale integration is a single chip microcomputer with motor drivers and input ports in addition to the synthetic struck sound circuit, and it is possible to make an electronic system of minute repeater at a very low cost in comparison with the conventional type.

Electronic firing systems and methods for firing a device

DOEpatents

Frickey, Steven J [Boise, ID; Svoboda, John M [Idaho Falls, ID

2012-04-24

An electronic firing system comprising a control system, a charging system, an electrical energy storage device, a shock tube firing circuit, a shock tube connector, a blasting cap firing circuit, and a blasting cap connector. The control system controls the charging system, which charges the electrical energy storage device. The control system also controls the shock tube firing circuit and the blasting cap firing circuit. When desired, the control system signals the shock tube firing circuit or blasting cap firing circuit to electrically connect the electrical energy storage device to the shock tube connector or the blasting cap connector respectively.

EHW Approach to Temperature Compensation of Electronics

NASA Technical Reports Server (NTRS)

Stoica, Adrian

2004-01-01

Efforts are under way to apply the concept of evolvable hardware (EHW) to compensate for variations, with temperature, in the operational characteristics of electronic circuits. To maintain the required functionality of a given circuit at a temperature above or below the nominal operating temperature for which the circuit was originally designed, a new circuit would be evolved; moreover, to obtain the required functionality over a very wide temperature range, there would be evolved a number of circuits, each of which would satisfy the performance requirements over a small part of the total temperature range. The basic concepts and some specific implementations of EHW were described in a number of previous NASA Tech Briefs articles, namely, "Reconfigurable Arrays of Transistors for Evolvable Hardware" (NPO-20078), Vol. 25, No. 2 (February 2001), page 36; Evolutionary Automated Synthesis of Electronic Circuits (NPO- 20535), Vol. 26, No. 7 (July 2002), page 37; "Designing Reconfigurable Antennas Through Hardware Evolution" (NPO-20666), Vol. 26, No. 7 (July 2002), page 38; "Morphing in Evolutionary Synthesis of Electronic Circuits" (NPO-20837), Vol. 26, No. 8 (August 2002), page 31; "Mixtrinsic Evolutionary Synthesis of Electronic Circuits" (NPO-20773) Vol. 26, No. 8 (August 2002), page 32; and "Synthesis of Fuzzy-Logic Circuits in Evolvable Hardware" (NPO-21095) Vol. 26, No. 11 (November 2002), page 38. To recapitulate from the cited prior articles: EHW is characterized as evolutionary in a quasi-genetic sense. The essence of EHW is to construct and test a sequence of populations of circuits that function as incrementally better solutions of a given design problem through the selective, repetitive connection and/or disconnection of capacitors, transistors, amplifiers, inverters, and/or other circuit building blocks. The connection and disconnection can be effected by use of field-programmable transistor arrays (FPTAs). The evolution is guided by a search-andoptimization algorithm (in particular, a genetic algorithm) that operates in the space of possible circuits to find a circuit that exhibits an acceptably close approximation of the desired functionality. The evolved circuits can be tested by mathematical modeling (that is, computational simulation) only, tested in real hardware, or tested in combinations of computational simulation and real hardware.

Xyce Parallel Electronic Simulator Users' Guide Version 6.7.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Keiter, Eric R.; Aadithya, Karthik Venkatraman; Mei, Ting

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: Capability to solve extremely large circuit problems by supporting large-scale parallel com- puting platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one tomore » develop new types of analysis without requiring the implementation of analysis-specific device models. Device models that are specifically tailored to meet Sandia's needs, including some radiation- aware devices (for Sandia users only). Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase -- a message passing parallel implementation -- which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows. The information herein is subject to change without notice. Copyright c 2002-2017 Sandia Corporation. All rights reserved. Trademarks Xyce TM Electronic Simulator and Xyce TM are trademarks of Sandia Corporation. Orcad, Orcad Capture, PSpice and Probe are registered trademarks of Cadence Design Systems, Inc. Microsoft, Windows and Windows 7 are registered trademarks of Microsoft Corporation. Medici, DaVinci and Taurus are registered trademarks of Synopsys Corporation. Amtec and TecPlot are trademarks of Amtec Engineering, Inc. All other trademarks are property of their respective owners. Contacts World Wide Web http://xyce.sandia.gov https://info.sandia.gov/xyce (Sandia only) Email xyce@sandia.gov (outside Sandia) xyce-sandia@sandia.gov (Sandia only) Bug Reports (Sandia only) http://joseki-vm.sandia.gov/bugzilla http://morannon.sandia.gov/bugzilla« less

System-on-chip-centric unattended embedded sensors in homeland security and defense applications

NASA Astrophysics Data System (ADS)

Jannson, Tomasz; Forrester, Thomas; Degrood, Kevin; Shih, Min-Yi; Walter, Kevin; Lee, Kang; Gans, Eric; Esterkin, Vladimir

2009-05-01

System-on-chip (SoC) single-die electronic integrated circuit (IC) integration has recently been attracting a great deal of attention, due to its high modularity, universality, and relatively low fabrication cost. The SoC also has low power consumption and it is naturally suited to being a base for integration of embedded sensors. Such sensors can run unattended, and can be either commercial off-the-shelf (COTS) electronic, COTS microelectromechanical systems (MEMS), or optical-COTS or produced in house (i.e., at Physical Optics Corporation, POC). In the version with the simplest electronic packaging, they can be integrated with low-power wireless RF that can communicate with a central processing unit (CPU) integrated in-house and installed on the specific platform of interest. Such a platform can be a human body (for e-clothing), unmanned aerial vehicle (UAV), unmanned ground vehicle (UGV), or many others. In this paper we discuss SoC-centric embedded unattended sensors in Homeland Security and military applications, including specific application scenarios (or CONOPS). In one specific example, we analyze an embedded polarization optical sensor produced in house, including generalized Lambertian light-emitting diode (LED) sources and secondary nonimaging optics (NIO).

Stitching Codeable Circuits: High School Students' Learning About Circuitry and Coding with Electronic Textiles

NASA Astrophysics Data System (ADS)

Litts, Breanne K.; Kafai, Yasmin B.; Lui, Debora A.; Walker, Justice T.; Widman, Sari A.

2017-10-01

Learning about circuitry by connecting a battery, light bulb, and wires is a common activity in many science classrooms. In this paper, we expand students' learning about circuitry with electronic textiles, which use conductive thread instead of wires and sewable LEDs instead of lightbulbs, by integrating programming sensor inputs and light outputs and examining how the two domains interact. We implemented an electronic textiles unit with 23 high school students ages 16-17 years who learned how to craft and code circuits with the LilyPad Arduino, an electronic textile construction kit. Our analyses not only confirm significant increases in students' understanding of functional circuits but also showcase students' ability in designing and remixing program code for controlling circuits. In our discussion, we address opportunities and challenges of introducing codeable circuit design for integrating maker activities that include engineering and computing into classrooms.

Bridge Circuits: One Topic in the Modular Course in Electronics Instrumentation.

ERIC Educational Resources Information Center

Aldridge, Bill G.; Stringer, Gene A.

This learning module is intended to illustrate the functioning and uses of bridge circuits. The discussion and laboratory procedures suggested in the module presume familiarity with basic concepts of electronics such as voltage, current, resistance, capacitance, inductance, phase, and knowledge of such skills as breadboarding circuits from…

Electronic gating circuit and ultraviolet laser excitation permit improved dosimeter sensitivity

NASA Technical Reports Server (NTRS)

Eggenberger, D.; King, D.; Longnecker, A.; Schutt, D.

1968-01-01

Standard dosimeter reader, modified by adding an electronic gating circuit to trigger the intensity level photomultiplier, increases readout sensitivity of photoluminescent dosimeter systems. The gating circuit is controlled by a second photomultiplier which senses a short ultraviolet pulse from a laser used to excite the dosimeter.

Packaging Technology Developed for High-Temperature Silicon Carbide Microsystems

NASA Technical Reports Server (NTRS)

Chen, Liang-Yu; Hunter, Gary W.; Neudeck, Philip G.

2001-01-01

High-temperature electronics and sensors are necessary for harsh-environment space and aeronautical applications, such as sensors and electronics for space missions to the inner solar system, sensors for in situ combustion and emission monitoring, and electronics for combustion control for aeronautical and automotive engines. However, these devices cannot be used until they can be packaged in appropriate forms for specific applications. Suitable packaging technology for operation temperatures up to 500 C and beyond is not commercially available. Thus, the development of a systematic high-temperature packaging technology for SiC-based microsystems is essential for both in situ testing and commercializing high-temperature SiC sensors and electronics. In response to these needs, researchers at Glenn innovatively designed, fabricated, and assembled a new prototype electronic package for high-temperature electronic microsystems using ceramic substrates (aluminum nitride and aluminum oxide) and gold (Au) thick-film metallization. Packaging components include a ceramic packaging frame, thick-film metallization-based interconnection system, and a low electrical resistance SiC die-attachment scheme. Both the materials and fabrication process of the basic packaging components have been tested with an in-house-fabricated SiC semiconductor test chip in an oxidizing environment at temperatures from room temperature to 500 C for more than 1000 hr. These test results set lifetime records for both high-temperature electronic packaging and high-temperature electronic device testing. As required, the thick-film-based interconnection system demonstrated low (2.5 times of the room-temperature resistance of the Au conductor) and stable (decreased 3 percent in 1500 hr of continuous testing) electrical resistance at 500 C in an oxidizing environment. Also as required, the electrical isolation impedance between printed wires that were not electrically joined by a wire bond remained high (greater than 0.4 GW) at 500 C in air. The attached SiC diode demonstrated low (less than 3.8 W/mm2) and relatively consistent dynamic resistance from room temperature to 500 C. These results indicate that the prototype package and the compatible die-attach scheme meet the initial design standards for high-temperature, low-power, and long-term operation. This technology will be further developed and evaluated, especially with more mechanical tests of each packaging element for operation at higher temperatures and longer lifetimes.

An Educational Laboratory for Digital Control and Rapid Prototyping of Power Electronic Circuits

ERIC Educational Resources Information Center

Choi, Sanghun; Saeedifard, M.

2012-01-01

This paper describes a new educational power electronics laboratory that was developed primarily to reinforce experimentally the fundamental concepts presented in a power electronics course. The developed laboratory combines theoretical design, simulation studies, digital control, fabrication, and verification of power-electronic circuits based on…

Compact vehicle drive module having improved thermal control

DOEpatents

Meyer, Andreas A.; Radosevich, Lawrence D.; Beihoff, Bruce C.; Kehl, Dennis L.; Kannenberg, Daniel G.

2006-01-03

An electric vehicle drive includes a thermal support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support, which may be controlled in a closed-loop manner. Interfacing between circuits, circuit mounting structure, and the support provide for greatly enhanced cooling. The support may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

High resolution X-ray CT for advanced electronics packaging

NASA Astrophysics Data System (ADS)

Oppermann, M.; Zerna, T.

2017-02-01

Advanced electronics packaging is a challenge for non-destructive Testing (NDT). More, smaller and mostly hidden interconnects dominate modern electronics components and systems. To solve the demands of customers to get products with a high functionality by low volume, weight and price (e.g. mobile phones, personal medical monitoring systems) often the designers use System-in-Package solutions (SiP). The non-destructive testing of such devices is a big challenge. So our paper will impart fundamentals and applications for non-destructive evaluation of inner structures of electronics packaging for quality assurance and reliability investigations with a focus on X-ray methods, especially on high resolution X-ray computed tomography (CT).

Electronic plants

PubMed Central

Stavrinidou, Eleni; Gabrielsson, Roger; Gomez, Eliot; Crispin, Xavier; Nilsson, Ove; Simon, Daniel T.; Berggren, Magnus

2015-01-01

The roots, stems, leaves, and vascular circuitry of higher plants are responsible for conveying the chemical signals that regulate growth and functions. From a certain perspective, these features are analogous to the contacts, interconnections, devices, and wires of discrete and integrated electronic circuits. Although many attempts have been made to augment plant function with electroactive materials, plants’ “circuitry” has never been directly merged with electronics. We report analog and digital organic electronic circuits and devices manufactured in living plants. The four key components of a circuit have been achieved using the xylem, leaves, veins, and signals of the plant as the template and integral part of the circuit elements and functions. With integrated and distributed electronics in plants, one can envisage a range of applications including precision recording and regulation of physiology, energy harvesting from photosynthesis, and alternatives to genetic modification for plant optimization. PMID:26702448

Electronic Components Subsystems and Equipment: a Compilation

NASA Technical Reports Server (NTRS)

1975-01-01

Developments in electronic components, subsystems, and equipment are summarized. Topics discussed include integrated circuit components and techniques, circuit components and techniques, and cables and connectors.

Vehicle drive module having improved EMI shielding

DOEpatents

Beihoff, Bruce C.; Kehl, Dennis L.; Gettelfinger, Lee A.; Kaishian, Steven C.; Phillips, Mark G.; Radosevich, Lawrence D.

2006-11-28

EMI shielding in an electric vehicle drive is provided for power electronics circuits and the like via a direct-mount reference plane support and shielding structure. The thermal support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. The support forms a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

System and method for interfacing large-area electronics with integrated circuit devices

DOEpatents

Verma, Naveen; Glisic, Branko; Sturm, James; Wagner, Sigurd

2016-07-12

A system and method for interfacing large-area electronics with integrated circuit devices is provided. The system may be implemented in an electronic device including a large area electronic (LAE) device disposed on a substrate. An integrated circuit IC is disposed on the substrate. A non-contact interface is disposed on the substrate and coupled between the LAE device and the IC. The non-contact interface is configured to provide at least one of a data acquisition path or control path between the LAE device and the IC.

Thermal research of infrared sight thermoelectric cooler control circuit under temperature environment

NASA Astrophysics Data System (ADS)

Gao, Youtang; Ding, Huan; Xue, Xiao; Xu, Yuan; Chang, Benkang

2010-10-01

Testing device TST-05B, which is suitable for adaptability test of semiconductor devices, electronic products and other military equipment under the condition of the surrounding air temperature rapidly changing, is used here for temperature shock test.Thermal stability technology of thermoelectric cooler control circuit infrared sight under temperature shock is studied in this paper. Model parameters and geometry is configured for ADI devices (ADN8830), welding material and PCB which are used in system. Thermoelectric cooler control circuit packaged by CSP32 distribution are simulated and analyzed by thermal shock and waveform through engineering finite element analysis software ANSYYS. Because solders of the whole model have much stronger stress along X direction than that of other directions, initial stress constraints along X direction are primarily considered when the partial model of single solder is imposed by thermal load. When absolute thermal loads stresses of diagonal nodes with maximum strains are separated from the whole model, interpolation is processed according to thermal loads circulation. Plastic strains and thermal stresses of nodes in both sides of partial model are obtained. The analysis results indicates that with thermal load circulation, maximum forces of each circulation along X direction are increasingly enlarged and with the accumulation of plastic strains of danger point, at the same time structural deformation and the location of maximum equivalent plastic strain in the solder joints at the first and eighth, the composition will become invalid in the end.

Risk Management of Microelectronics: The NASA Electronic Parts and Packaging (NEPP) Program

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Sampson, Michael J.

2005-01-01

This viewgraph information provides information on how the NASA Electronic Parts and Packaging (NEPP) Program evaluates the reliability of technologies for Electrical, Electronic, and Electromechanical (EEE) parts, and their suitability for spacecraft applications.

Electronic circuit provides automatic level control for liquid nitrogen traps

NASA Technical Reports Server (NTRS)

Turvy, R. R.

1968-01-01

Electronic circuit, based on the principle of increased thermistor resistance corresponding to decreases in temperature provides an automatic level control for liquid nitrogen cold traps. The electronically controlled apparatus is practically service-free, requiring only occasional reliability checks.

Synthetic Plasma Liquid Based Electronic Circuits Realization-A Novel Concept.

PubMed

Pandya, Killol V; Kosta, ShivPrasad

2016-09-01

Biomedical research is contributing significant role in the field of biomedical engineering and applied science. It brings research and innovations to a different level. This study investigated artificial human blood -synthetic plasma liquid as conductive medium. Keeping in mind the conductivity of synthetic plasma, astable multivibrator as well as differential amplifier circuit were demonstrated. The circuits were given normal input voltages at regular temperature and ideal conditions. The result shows desired response which supports the novel concept. For both the circuits, phase shift of 180° achieved by analysing biological electronic circuits.

Micro-Electromechanical Instrument and Systems Development at the Charles Stark Draper Laboratory

NASA Technical Reports Server (NTRS)

Connelly, J. H.; Gilmore, J. P.; Weinberg, M. S.

1995-01-01

Several generations of micromechanical gyros and accelerometers have been developed at Draper. Current design effort centers on tuning-fork gyro design and pendulous accelerometer configurations. Over 200 gyros of different generations have been packaged and tested. These units have successfully performed across a temperature range of -40 to 85 degrees C, and have survived 30,000-g shock tests along all axes. Draper is currently under contract to develop an integrated micro-mechanical inertial sensor assembly (MMISA) and global positioning system (GPS) receiver configuration. The ultimate projections for size, weight, and power for an MMISA, after electronic design of the application specific integrated circuit (ASIC ) is completed, are 2 x 2 x 0.5 cm, 5 gm, and less than 1 W, respectively. This paper describes the fabrication process, the current gyro and accelerometer designs, and system configurations.

Remote control of microcontroller-based infant stimulating system.

PubMed

Burunkaya, M; Güler, I

2000-04-01

In this paper, a remote-controlled and microcontroller-based cradle is designed and constructed. This system is also called Remote Control of Microcontroller-Based Infant Stimulation System or the RECOMBIS System. Cradle is an infant stimulating system that provides relaxation and sleeping for the baby. RECOMBIS system is designed for healthy full-term newborns to provide safe infant care and provide relaxation and sleeping for the baby. A microcontroller-based electronic circuit was designed and implemented for RECOMBIS system. Electromagnets were controlled by 8-bit PIC16F84 microcontroller, which is programmed using MPASM package. The system works by entering preset values from the keyboard, or pulse code modulated radio frequency remote control system. The control of the system and the motion range were tested. The test results showed that the system provided a good performance.

A novel readout integrated circuit for ferroelectric FPA detector

NASA Astrophysics Data System (ADS)

Bai, Piji; Li, Lihua; Ji, Yulong; Zhang, Jia; Li, Min; Liang, Yan; Hu, Yanbo; Li, Songying

2017-11-01

Uncooled infrared detectors haves some advantages such as low cost light weight low power consumption, and superior reliability, compared with cryogenically cooled ones Ferroelectric uncooled focal plane array(FPA) are being developed for its AC response and its high reliability As a key part of the ferroelectric assembly the ROIC determines the performance of the assembly. A top-down design model for uncooled ferroelectric readout integrated circuit(ROIC) has been developed. Based on the optical thermal and electrical properties of the ferroelectric detector the RTIA readout integrated circuit is designed. The noise bandwidth of RTIA readout circuit has been developed and analyzed. A novel high gain amplifier, a high pass filter and a low pass filter circuits are designed on the ROIC. In order to improve the ferroelectric FPA package performance and decrease of package cost a temperature sensor is designed on the ROIC chip At last the novel RTIA ROIC is implemented on 0.6μm 2P3M CMOS silicon techniques. According to the experimental chip test results the temporal root mean square(RMS)noise voltage is about 1.4mV the sensitivity of the on chip temperature sensor is 0.6 mV/K from -40°C to 60°C the linearity performance of the ROIC chip is better than 99% Based on the 320×240 RTIA ROIC, a 320×240 infrared ferroelectric FPA is fabricated and tested. Test results shows that the 320×240 RTIA ROIC meets the demand of infrared ferroelectric FPA.

The Art of Electronics - 2nd Edition

NASA Astrophysics Data System (ADS)

Horowitz, Paul; Hill, Winfield

1989-09-01

This is the thoroughly revised and updated second edition of the hugely successful The Art of Electronics. Widely accepted as the single authoritative text and reference on electronic circuit design, both analog and digital, the original edition sold over 125,000 copies worldwide and was translated into eight languages. The book revolutionized the teaching of electronics by emphasizing the methods actually used by citcuit designers - a combination of some basic laws, rules to thumb, and a large nonmathematical treatment that encourages circuit values and performance. The new Art of Electronics retains the feeling of informality and easy access that helped make the first edition so successful and popular. It is an ideal first textbook on electronics for scientists and engineers and an indispensable reference for anyone, professional or amateur, who works with electronic circuits. The best self-teaching book and reference book in electronics Simply indispensable, packed with essential information for all scientists and engineers who build electronic circuits Totally rewritten chapters on microcomputers and microprocessors The first edition of this book has sold over 100,000 copies in seven years, it has a market in virtually all research centres where electronics is important

Integrated circuit failure analysis by low-energy charge-induced voltage alteration

DOEpatents

Cole, E.I. Jr.

1996-06-04

A scanning electron microscope apparatus and method are described for detecting and imaging open-circuit defects in an integrated circuit (IC). The invention uses a low-energy high-current focused electron beam that is scanned over a device surface of the IC to generate a charge-induced voltage alteration (CIVA) signal at the location of any open-circuit defects. The low-energy CIVA signal may be used to generate an image of the IC showing the location of any open-circuit defects. A low electron beam energy is used to prevent electrical breakdown in any passivation layers in the IC and to minimize radiation damage to the IC. The invention has uses for IC failure analysis, for production-line inspection of ICs, and for qualification of ICs. 5 figs.

Integrated circuit failure analysis by low-energy charge-induced voltage alteration

DOEpatents

Cole, Jr., Edward I.

1996-01-01

A scanning electron microscope apparatus and method are described for detecting and imaging open-circuit defects in an integrated circuit (IC). The invention uses a low-energy high-current focused electron beam that is scanned over a device surface of the IC to generate a charge-induced voltage alteration (CIVA) signal at the location of any open-circuit defects. The low-energy CIVA signal may be used to generate an image of the IC showing the location of any open-circuit defects. A low electron beam energy is used to prevent electrical breakdown in any passivation layers in the IC and to minimize radiation damage to the IC. The invention has uses for IC failure analysis, for production-line inspection of ICs, and for qualification of ICs.

Decontamination of food packaging using electron beam—status and prospects

NASA Astrophysics Data System (ADS)

Mittendorfer, J.; Bierbaumer, H. P.; Gratzl, F.; Kellauer, E.

2002-03-01

In this paper the status of food packaging disinfection decontamination using electron beam at Mediscan GmbH is presented. The first section of the paper describes the activities at the service center, where food packaging materials, e.g. yoghurt cups are decontaminated in their final shipment containers. As important step in the hazard analysis and critical control point of food processing, microbiological uncontaminated food packaging material is of public interest and attracts a lot of attention from packaging material producers and food processors. The dose ranges for different sterility assurance levels are discussed and results from microbiological test are presented. Studies at Mediscan have demonstrated, that an electron beam treatment at a dose of 5-7 kGy is most effective against yeast and mold, which are mainly responsible for spoilage and short shelf-life of a variety of products. The second section is devoted to the field of inline decontamination of food packaging and sterilization of pharmaceutical packaging material and the research currently conducted at Mediscan. The requirements for industrial inline electron beam systems are summarized and design concepts discussed in terms of beam energy, beam current, irradiation topology, product handling and shielding.

INTELSAT V-E(F-5)

NASA Technical Reports Server (NTRS)

1982-01-01

Prelaunch mission plans for the INTELSAT V-5 (F-5) commercial communications satellites are summarized. Voice circuits, television channels, and a Maritime Communications Services package for the Maritime Satellite Organization (INMARSAT) to provide ship/shore/ship communications are described.

1990 MTT-S International Microwave Symposium and Exhibition and Microwave and Millimeter-Wave Monolithic IC Symposium, Dallas, TX, May 7-10, 1990, Proceedings

NASA Astrophysics Data System (ADS)

McQuiddy, David N., Jr.; Sokolov, Vladimir

1990-12-01

The present conference discusses microwave filters, lightwave technology for microwave antennas, planar and quasi-planar guides, mixers and VCOs, cavity filters, discontinuity and coupling effects, control circuits, power dividers and phase shifters, microwave ICs, biological effects and medical applications, CAD and modeling for MMICs, directional couplers, MMIC design trends, microwave packaging and manufacturing, monolithic ICs, and solid-state devices and circuits. Also discussed are microwave and mm-wave superconducting technology, MICs for communication systems, the merging of optical and microwave technologies, microwave power transistors, ferrite devices, network measurements, advanced transmission-line structures, FET devices and circuits, field theory of IC discontinuities, active quasi-optical techniques, phased-array techniques and circuits, nonlinear CAD, sub-mm wave devices, and high power devices.

Self-Patterning of Silica/Epoxy Nanocomposite Underfill by Tailored Hydrophilic-Superhydrophobic Surfaces for 3D Integrated Circuit (IC) Stacking.

PubMed

Tuan, Chia-Chi; James, Nathan Pataki; Lin, Ziyin; Chen, Yun; Liu, Yan; Moon, Kyoung-Sik; Li, Zhuo; Wong, C P

2017-03-15

As microelectronics are trending toward smaller packages and integrated circuit (IC) stacks nowadays, underfill, the polymer composite filled in between the IC chip and the substrate, becomes increasingly important for interconnection reliability. However, traditional underfills cannot meet the requirements for low-profile and fine pitch in high density IC stacking packages. Post-applied underfills have difficulties in flowing into the small gaps between the chip and the substrate, while pre-applied underfills face filler entrapment at bond pads. In this report, we present a self-patterning underfilling technology that uses selective wetting of underfill on Cu bond pads and Si 3 N 4 passivation via surface energy engineering. This novel process, fully compatible with the conventional underfilling process, eliminates the issue of filler entrapment in typical pre-applied underfilling process, enabling high density and fine pitch IC die bonding.

Electro-Microfluidic Packaging

NASA Astrophysics Data System (ADS)

Benavides, G. L.; Galambos, P. C.

2002-06-01

There are many examples of electro-microfluidic products that require cost effective packaging solutions. Industry has responded to a demand for products such as drop ejectors, chemical sensors, and biological sensors. Drop ejectors have consumer applications such as ink jet printing and scientific applications such as patterning self-assembled monolayers or ejecting picoliters of expensive analytes/reagents for chemical analysis. Drop ejectors can be used to perform chemical analysis, combinatorial chemistry, drug manufacture, drug discovery, drug delivery, and DNA sequencing. Chemical and biological micro-sensors can sniff the ambient environment for traces of dangerous materials such as explosives, toxins, or pathogens. Other biological sensors can be used to improve world health by providing timely diagnostics and applying corrective measures to the human body. Electro-microfluidic packaging can easily represent over fifty percent of the product cost and, as with Integrated Circuits (IC), the industry should evolve to standard packaging solutions. Standard packaging schemes will minimize cost and bring products to market sooner.

An electronic circuit that detects left ventricular ejection events by processing the arterial pressure waveform

NASA Technical Reports Server (NTRS)

Gebben, V. D.; Webb, J. A., Jr.

1972-01-01

An electronic circuit for processing arterial blood pressure waveform signals is described. The circuit detects blood pressure as the heart pumps blood through the aortic valve and the pressure distribution caused by aortic valve closure. From these measurements, timing signals for use in measuring the left ventricular ejection time is determined, and signals are provided for computer monitoring of the cardiovascular system. Illustrations are given of the circuit and pressure waveforms.

A Study of Direct Digital Manufactured RF/Microwave Packaging

NASA Astrophysics Data System (ADS)

Stratton, John W. I.

Various facets of direct digital manufactured (DDM) microwave packages are studied. The rippled surface inherent in fused deposition modeling (FDM) fabricated geometries is modeled in Ansoft HFSS, and its effect on the performance of microstrip transmission lines is assessed via simulation and measurement. The thermal response of DDM microstrip transmission lines is analyzed over a range of RF input powers, and linearity is confirmed over that range. Two IC packages are embedded into DDM printed circuit boards, and their performance is analyzed. The first is a low power RF switch, and the second is an RF front end device that includes a low noise amplifier (LNA) and a power amplifier (PA). The RF switch is shown to perform well, as compared to a layout designed for a Rogers 4003C microwave laminate substrate. The LNA performs within datasheet specifications. The power amplifier generates substantial heat, so a thermal management attempt is described. Finally, a capacitively loaded 6dB Wilkinson power divider is designed and fabricated using DDM techniques and materials. Its performance is analyzed and compared to simulation. The device is shown to compare favorably to a similar device fabricated on a Rogers 4003C microwave laminate using traditional printed circuit board techniques.

Modeling from Local to Subsystem Level Effects in Analog and Digital Circuits Due to Space Induced Single Event Transients

NASA Technical Reports Server (NTRS)

Perez, Reinaldo J.

2011-01-01

Single Event Transients in analog and digital electronics from space generated high energetic nuclear particles can disrupt either temporarily and sometimes permanently the functionality and performance of electronics in space vehicles. This work first provides some insights into the modeling of SET in electronic circuits that can be used in SPICE-like simulators. The work is then directed to present methodologies, one of which was developed by this author, for the assessment of SET at different levels of integration in electronics, from the circuit level to the subsystem level.

Compact and low-cost fiber optic thermometer

NASA Astrophysics Data System (ADS)

Sun, Mei H.

1997-06-01

Commercial fiberoptic thermometers have been available for a number of years. The early products were unreliable and high in price. However, the continuing effort in the development of new sensing techniques along with the breakthroughs made in many areas of optoelectronics in recent years have made the production of cost competitive and reliable systems feasible. A fluorescence decay time based system has been demonstrated to successfully meet both cost and performance requirements for various medical applications. A very critical element to the success of this low cost and compact fiberoptic thermometer is the fluorescent sensor material. The very high quantum efficiency, the operating wavelengths, and the temperature sensitivity helped significantly in simplifying the design requirements for the optics and the electronics. The one to eight channel unit contains one to eight modules of a simple optical assembly: an LED light source, a small lens, and a filter are housed in an injection molded plastic container. Both the electronics and the optics reside on a small printed circuit board of approximately 6 inches by 3 inches. This system can be packaged as a stand alone unit or embedded in original manufacturer equipment.

K-Band Phased Array Developed for Low- Earth-Orbit Satellite Communications

NASA Technical Reports Server (NTRS)

Anzic, Godfrey

1999-01-01

Future rapid deployment of low- and medium-Earth-orbit satellite constellations that will offer various narrow- to wide-band wireless communications services will require phased-array antennas that feature wide-angle and superagile electronic steering of one or more antenna beams. Antennas, which employ monolithic microwave integrated circuits (MMIC), are perfectly suited for this application. Under a cooperative agreement, an MMIC-based, K-band phased-array antenna is being developed with 50/50 cost sharing by the NASA Lewis Research Center and Raytheon Systems Company. The transmitting array, which will operate at 19 gigahertz (GHz), is a state-of-the-art design that features dual, independent, electronically steerable beam operation ( 42 ), a stand-alone thermal management, and a high-density tile architecture. This array can transmit 622 megabits per second (Mbps) in each beam from Earth orbit to small Earth terminals. The weight of the total array package is expected to be less than 8 lb. The tile integration technology (flip chip MMIC tile) chosen for this project represents a major advancement in phased-array engineering and holds much promise for reducing manufacturing costs.

Alignment of Boron Nitride Nanofibers in Epoxy Composite Films for Thermal Conductivity and Dielectric Breakdown Strength Improvement.

PubMed

Wang, Zhengdong; Liu, Jingya; Cheng, Yonghong; Chen, Siyu; Yang, Mengmeng; Huang, Jialiang; Wang, Hongkang; Wu, Guanglei; Wu, Hongjing

2018-04-15

Development of polymer-based composites with simultaneously high thermal conductivity and breakdown strength has attracted considerable attention owing to their important applications in both electronic and electric industries. In this work, boron nitride (BN) nanofibers (BNNF) are successfully prepared as fillers, which are used for epoxy composites. In addition, the BNNF in epoxy composites are aligned by using a film casting method. The composites show enhanced thermal conductivity and dielectric breakdown strength. For instance, after doping with BNNF of 2 wt%, the thermal conductivity of composites increased by 36.4% in comparison with that of the epoxy matrix. Meanwhile, the breakdown strength of the composite with 1 wt% BNNF is 122.9 kV/mm, which increased by 6.8% more than that of neat epoxy (115.1 kV/mm). Moreover, the composites have maintained a low dielectric constant and alternating current conductivity among the range of full frequency, and show a higher thermal decomposition temperature and glass-transition temperature. The composites with aligning BNNF have wide application prospects in electronic packaging material and printed circuit boards.

3-dimensional electron microscopic imaging of the zebrafish olfactory bulb and dense reconstruction of neurons.

PubMed

Wanner, Adrian A; Genoud, Christel; Friedrich, Rainer W

2016-11-08

Large-scale reconstructions of neuronal populations are critical for structural analyses of neuronal cell types and circuits. Dense reconstructions of neurons from image data require ultrastructural resolution throughout large volumes, which can be achieved by automated volumetric electron microscopy (EM) techniques. We used serial block face scanning EM (SBEM) and conductive sample embedding to acquire an image stack from an olfactory bulb (OB) of a zebrafish larva at a voxel resolution of 9.25×9.25×25 nm 3 . Skeletons of 1,022 neurons, 98% of all neurons in the OB, were reconstructed by manual tracing and efficient error correction procedures. An ergonomic software package, PyKNOSSOS, was created in Python for data browsing, neuron tracing, synapse annotation, and visualization. The reconstructions allow for detailed analyses of morphology, projections and subcellular features of different neuron types. The high density of reconstructions enables geometrical and topological analyses of the OB circuitry. Image data can be accessed and viewed through the neurodata web services (http://www.neurodata.io). Raw data and reconstructions can be visualized in PyKNOSSOS.

Alignment of Boron Nitride Nanofibers in Epoxy Composite Films for Thermal Conductivity and Dielectric Breakdown Strength Improvement

PubMed Central

Liu, Jingya; Cheng, Yonghong; Chen, Siyu; Yang, Mengmeng; Huang, Jialiang

2018-01-01

Development of polymer-based composites with simultaneously high thermal conductivity and breakdown strength has attracted considerable attention owing to their important applications in both electronic and electric industries. In this work, boron nitride (BN) nanofibers (BNNF) are successfully prepared as fillers, which are used for epoxy composites. In addition, the BNNF in epoxy composites are aligned by using a film casting method. The composites show enhanced thermal conductivity and dielectric breakdown strength. For instance, after doping with BNNF of 2 wt%, the thermal conductivity of composites increased by 36.4% in comparison with that of the epoxy matrix. Meanwhile, the breakdown strength of the composite with 1 wt% BNNF is 122.9 kV/mm, which increased by 6.8% more than that of neat epoxy (115.1 kV/mm). Moreover, the composites have maintained a low dielectric constant and alternating current conductivity among the range of full frequency, and show a higher thermal decomposition temperature and glass-transition temperature. The composites with aligning BNNF have wide application prospects in electronic packaging material and printed circuit boards. PMID:29662038

Solid-state fractional capacitor using MWCNT-epoxy nanocomposite

NASA Astrophysics Data System (ADS)

John, Dina A.; Banerjee, Susanta; Bohannan, Gary W.; Biswas, Karabi

2017-04-01

Here, we propose the fabrication of a solid state fractional capacitor for which constant phase (CP) angles were attained in different frequency zones: 110 Hz-1.1 kHz, 10 kHz-118 kHz, and 230 kHz-20 MHz. The configuration makes use of epoxy resin as the matrix in which multi-walled carbon nanotubes (MWCNTs) are dispersed. Adhesive nature of the epoxy resin is utilized for binding the electrodes, which avoids the extra step for packaging. The fractional capacitive behavior is contributed by the distribution of time constants for the electron to travel from one electrode to the other. The distributive nature of the time constant is ensured by inserting a middle plate which is coated with a porous film of polymethyl-methacrylate in between the two electrodes. The phase angle trend for the configuration is studied in detail, and it is observed that as the % of carbon nanotubes (CNTs) loading increases, the CP angle increases from - 85 ° to - 45 ° in the frequency zones above 100 Hz. The developed device is compact and it can be easily integrated with the electronic circuits.

3-dimensional electron microscopic imaging of the zebrafish olfactory bulb and dense reconstruction of neurons

PubMed Central

Wanner, Adrian A.; Genoud, Christel; Friedrich, Rainer W.

2016-01-01

Large-scale reconstructions of neuronal populations are critical for structural analyses of neuronal cell types and circuits. Dense reconstructions of neurons from image data require ultrastructural resolution throughout large volumes, which can be achieved by automated volumetric electron microscopy (EM) techniques. We used serial block face scanning EM (SBEM) and conductive sample embedding to acquire an image stack from an olfactory bulb (OB) of a zebrafish larva at a voxel resolution of 9.25×9.25×25 nm3. Skeletons of 1,022 neurons, 98% of all neurons in the OB, were reconstructed by manual tracing and efficient error correction procedures. An ergonomic software package, PyKNOSSOS, was created in Python for data browsing, neuron tracing, synapse annotation, and visualization. The reconstructions allow for detailed analyses of morphology, projections and subcellular features of different neuron types. The high density of reconstructions enables geometrical and topological analyses of the OB circuitry. Image data can be accessed and viewed through the neurodata web services (http://www.neurodata.io). Raw data and reconstructions can be visualized in PyKNOSSOS. PMID:27824337

A Wireless, Passive Sensor for Quantifying Packaged Food Quality.

PubMed

Tan, Ee Lim; Ng, Wen Ni; Shao, Ranyuan; Pereles, Brandon D; Ong, Keat Ghee

2007-09-05

This paper describes the fabrication of a wireless, passive sensor based on aninductive-capacitive resonant circuit, and its application for in situ monitoring of thequality of dry, packaged food such as cereals, and fried and baked snacks. The sensor ismade of a planar inductor and capacitor printed on a paper substrate. To monitor foodquality, the sensor is embedded inside the food package by adhering it to the package'sinner wall; its response is remotely detected through a coil connected to a sensor reader. Asfood quality degrades due to increasing humidity inside the package, the paper substrateabsorbs water vapor, changing the capacitor's capacitance and the sensor's resonantfrequency. Therefore, the taste quality of the packaged food can be indirectly determined bymeasuring the change in the sensor's resonant frequency. The novelty of this sensortechnology is its wireless and passive nature, which allows in situ determination of foodquality. In addition, the simple fabrication process and inexpensive sensor material ensure alow sensor cost, thus making this technology economically viable.

Novel Techniques for Millimeter-Wave Packages

NASA Technical Reports Server (NTRS)

Herman, Martin I.; Lee, Karen A.; Kolawa, Elzbieta A.; Lowry, Lynn E.; Tulintseff, Ann N.

1995-01-01

A new millimeter-wave package architecture with supporting electrical, mechanical and material science experiment and analysis is presented. This package is well suited for discrete devices, monolithic microwave integrated circuits (MMIC's) and multichip module (MCM) applications. It has low-loss wide-band RF transitions which are necessary to overcome manufacturing tolerances leading to lower per unit cost Potential applications of this new packaging architecture which go beyond the standard requirements of device protection include integration of antennas, compatibility to photonic networks and direct transitions to waveguide systems. Techniques for electromagnetic analysis, thermal control and hermetic sealing were explored. Three dimensional electromagnetic analysis was performed using a finite difference time-domain (FDTD) algorithm and experimentally verified for millimeter-wave package input and output transitions. New multi-material system concepts (AlN, Cu, and diamond thin films) which allow excellent surface finishes to be achieved with enhanced thermal management have been investigated. A new approach utilizing block copolymer coatings was employed to hermetically seal packages which met MIL STD-883.

Maximum Acceleration Recording Circuit

NASA Technical Reports Server (NTRS)

Bozeman, Richard J., Jr.

1995-01-01

Coarsely digitized maximum levels recorded in blown fuses. Circuit feeds power to accelerometer and makes nonvolatile record of maximum level to which output of accelerometer rises during measurement interval. In comparison with inertia-type single-preset-trip-point mechanical maximum-acceleration-recording devices, circuit weighs less, occupies less space, and records accelerations within narrower bands of uncertainty. In comparison with prior electronic data-acquisition systems designed for same purpose, circuit simpler, less bulky, consumes less power, costs and analysis of data recorded in magnetic or electronic memory devices. Circuit used, for example, to record accelerations to which commodities subjected during transportation on trucks.

Manufacturing Methods and Technology Engineering (MM&TE) Program for the Establishment of Production Techniques for High Density Thick Film Circuits Used in Crystal Oscillators. Volume I.

DTIC Science & Technology

1980-04-01

incorporate the high reliability ceramic-packaged quartz crystal resonator developed at ERADCOM, and utilize beam -leaded devices wherever possible...the form of a truncated cylinder. The rather complex module outline is best accomplished through the use of a precast potting shell filled with a low...crossover connections are achieved by means of thick-film dielectric material. Chip components attached to the metallized substrate complete the circuits

VLSI Design Tools, Reference Manual, Release 2.0.

DTIC Science & Technology

1984-08-01

eder. 2.3 ITACV: Libary ofC readne. far oesumdg a layoit 1-,, tiling. V ~2.4 "QUILT: CeinS"Wbesa-i-M-8euar ray f atwok til 2.5 "TIL: Tockmeleff...8217patterns package was added so that complex and repetitive digital waveforms could be generated far more easily. The recently written program MTP (Multiple...circuit model to estimate timing delays through digital circuits. It also has a mode that allows it to be used as a switch (gate) level simulator

Prolonged 500 C Operation of 6H-SiC JFET Integrated Circuitry

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Spry, David J.; Chen, Liang-Yu; Chang, Carl W.; Beheim, Glenn M.; Okojie, Robert S.; Evans, Laura J.; Meredith, Roger D.; Ferrier, Terry L.; Krasowski, Michael J.;

Kilovolt dc solid state remote power controller development

NASA Technical Reports Server (NTRS)

Mitchell, J. T.

1982-01-01

The experience gained in developing and applying solid state power controller (SSPC) technology at high voltage dc (HVDC) potentials and power levels of up to 25 kilowatts is summarized. The HVDC switching devices, power switching concepts, drive circuits, and very fast acting overcurrent protection circuits were analyzed. A 25A bipolar breadboard with Darlington connected switching transistor was built. Fault testing at 900 volts was included. A bipolar transistor packaged breadboard design was developed. Power MOSFET remote power controller (RPC) was designed.

Electronic Router

NASA Technical Reports Server (NTRS)

Crusan, Jason

2005-01-01

Electronic Router (E-Router) is an application program for routing documents among the cognizant individuals in a government agency or other organization. E-Router supplants a prior 14 NASA Tech Briefs, May 2005 system in which paper documents were routed physically in packages by use of paper slips, packages could be lost, routing times were unacceptably long, tracking of packages was difficult, and there was a need for much photocopying. E-Router enables a user to create a digital package to be routed. Input accepted by E-Router includes the title of the package, the person(s) to whom the package is to be routed, attached files, and comments to reviewers. Electronic mail is used to notify reviewers of needed actions. The creator of the package can, at any time, see the status of the package in the routing structure. At the end of the routing process, E-Router keeps a record of the package and of approvals and/or concurrences of the reviewers. There are commercial programs that perform the general functions of E-Router, but they are more complicated. E-Router is Web-based, easy to use, and does not require the installation or use of client software.

Reliability of High I/O High Density CCGA Interconnect Electronic Packages under Extreme Thermal Environment

NASA Technical Reports Server (NTRS)

Ramesham, Rajeshuni

2012-01-01

This paper provides the experimental test results of advanced CCGA packages tested in extreme temperature thermal environments. Standard optical inspection and x-ray non-destructive inspection tools were used to assess the reliability of high density CCGA packages for deep space extreme temperature missions. Ceramic column grid array (CCGA) packages have been increasing in use based on their advantages such as high interconnect density, very good thermal and electrical performances, compatibility with standard surface-mount packaging assembly processes, and so on. CCGA packages are used in space applications such as in logic and microprocessor functions, telecommunications, payload electronics, and flight avionics. As these packages tend to have less solder joint strain relief than leaded packages or more strain relief over lead-less chip carrier packages, the reliability of CCGA packages is very important for short-term and long-term deep space missions. We have employed high density CCGA 1152 and 1272 daisy chained electronic packages in this preliminary reliability study. Each package is divided into several daisy-chained sections. The physical dimensions of CCGA1152 package is 35 mm x 35 mm with a 34 x 34 array of columns with a 1 mm pitch. The dimension of the CCGA1272 package is 37.5 mm x 37.5 mm with a 36 x 36 array with a 1 mm pitch. The columns are made up of 80% Pb/20%Sn material. CCGA interconnect electronic package printed wiring polyimide boards have been assembled and inspected using non-destructive x-ray imaging techniques. The assembled CCGA boards were subjected to extreme temperature thermal atmospheric cycling to assess their reliability for future deep space missions. The resistance of daisy-chained interconnect sections were monitored continuously during thermal cycling. This paper provides the experimental test results of advanced CCGA packages tested in extreme temperature thermal environments. Standard optical inspection and x-ray non-destructive inspection tools were used to assess the reliability of high density CCGA packages for deep space extreme temperature missions. Keywords: Extreme temperatures, High density CCGA qualification, CCGA reliability, solder joint failures, optical inspection, and x-ray inspection.

Monolithically integrated bacteriorhodopsin/semiconductor opto-electronic integrated circuit for a bio-photoreceiver.

PubMed

Xu, J; Bhattacharya, P; Váró, G

2004-03-15

The light-sensitive protein, bacteriorhodopsin (BR), is monolithically integrated with an InP-based amplifier circuit to realize a novel opto-electronic integrated circuit (OEIC) which performs as a high-speed photoreceiver. The circuit is realized by epitaxial growth of the field-effect transistors, currently used semiconductor device and circuit fabrication techniques, and selective area BR electro-deposition. The integrated photoreceiver has a responsivity of 175 V/W and linear photoresponse, with a dynamic range of 16 dB, with 594 nm photoexcitation. The dynamics of the photochemical cycle of BR has also been modeled and a proposed equivalent circuit simulates the measured BR photoresponse with good agreement.

Packaging films for electronic and space-related hardware

NASA Astrophysics Data System (ADS)

Shon, E. M.; Hamberg, O.

1985-08-01

Flexible packaging films are used to bag and/or wrap precision cleaned electronic or space hardware to protect them from environmental degradation during shipping and storage. Selection of packaging films depends on a knowledge of product requirements and packaging film characteristics. The literature presently available on protective packaging films has been updated to include new materials and to amplify space-related applications. Presently available packaging film materials are compared for their various characteristics: electrostatic discharge (ESD) control, flame retardancy, water vapor transmission rate, particulate shedding, molecular contamination, and transparency. The tradeoff between product requirements and the characteristics of the packaging films available are discussed. Selection considerations are given for the application of specific materials of space hardware-related applications. Applications for intimate, environmental, and electrostatic protective packaging are discussed.

Zipper Connectors for Flexible Electronic Circuits

NASA Technical Reports Server (NTRS)

Barnes, Kevin N.

2003-01-01

Devices that look and function much like conventional zippers on clothing have been proposed as connectors for flexible electronic circuits. Heretofore, flexible electronic circuits have commonly included rigid connectors like those of conventional rigid electronic circuits. The proposed zipper connectors would make it possible to connect and disconnect flexible circuits quickly and easily. Moreover, the flexibility of zipper connectors would make them more (relative to rigid connectors) compatible with flexible circuits, so that the advantages of flexible circuitry could be realized more fully. Like a conventional zipper, a zipper according to the proposal would include teeth anchored on flexible tapes, a slider with a loosely attached clasp, a box at one end of the rows of mating teeth, and stops at the opposite ends. The tapes would be made of a plastic or other dielectric material. On each of the two mating sides of the zipper, metal teeth would alternate with dielectric (plastic) teeth, there being two metal teeth for each plastic one. When the zipper was closed, each metal tooth from one side would be in mechanical and electrical contact with a designated metal tooth from the other side, and these mating metal teeth would be electrically insulated from the next pair of mating metal teeth by an intervening plastic tooth. The metal teeth would be soldered or crimped to copper tabs. Wires or other conductors connected to electronic circuits would be soldered or crimped to the ends of the tabs opposite the teeth.

Radiation-Hardened Electronics for Advanced Communications Systems

NASA Technical Reports Server (NTRS)

Whitaker, Sterling

2015-01-01

Novel approach enables high-speed special-purpose processors Advanced reconfigurable and reprogrammable communication systems will require sub-130-nanometer electronics. Legacy single event upset (SEU) radiation-tolerant circuits are ineffective at speeds greater than 125 megahertz. In Phase I of this project, ICs, LLC, demonstrated new base-level logic circuits that provide SEU immunity for sub-130-nanometer high-speed circuits. In Phase II, the company developed an innovative self-restoring logic (SRL) circuit and a system approach that provides high-speed, SEU-tolerant solutions that are effective for sub-130-nanometer electronics scalable to at least 22-nanometer processes. The SRL system can be used in the design of NASA's next-generation special-purpose processors, especially reconfigurable communication processors.

1st NASA Electronic Parts Packaging (NEPP) Program Electronic Technology Workshop (ETW)

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Sampson, Michael J.

2010-01-01

NEPP supports all of NASA for >20 years - 7 NASA Centers and JPL actively participate The NEPP Program focuses on the reliability aspects of electronic devices - Three prime technical areas: Parts (die), Packaging, and Radiation Alternately, reliability may be viewed as: -

Advanced Electronics Systems 1, Industrial Electronics 3: 9327.03.

ERIC Educational Resources Information Center

Dade County Public Schools, Miami, FL.

The 135 clock-hour course for the 12th year consists of outlines for blocks of instruction on transistor applications to basic circuits, principles of single sideband communications, maintenance practices, preparation for FCC licenses, application of circuits to advanced electronic systems, nonsinusoidal wave shapes, multivibrators, and blocking…

Fault detection monitor circuit provides ''self-heal capability'' in electronic modules - A concept

NASA Technical Reports Server (NTRS)

Kennedy, J. J.

1970-01-01

Self-checking technique detects defective solid state modules used in electronic test and checkout instrumentation. A ten bit register provides failure monitor and indication for 1023 comparator circuits, and the automatic fault-isolation capability permits the electronic subsystems to be repaired by replacing the defective module.

16 CFR 1610.5 - Test apparatus and materials.

Code of Federal Regulations, 2012 CFR

2012-01-01

... electronic circuits, in addition to miscellaneous custom made cams and rods, shock absorbing linkages, and... burn time to 0.1 second. An electronic or mechanical timer can be used to record the burn time, and electro-mechanical devices (i.e., servo-motors, solenoids, micro-switches, and electronic circuits, in...

16 CFR 1610.5 - Test apparatus and materials.

Code of Federal Regulations, 2014 CFR

2014-01-01

... electronic circuits, in addition to miscellaneous custom made cams and rods, shock absorbing linkages, and... burn time to 0.1 second. An electronic or mechanical timer can be used to record the burn time, and electro-mechanical devices (i.e., servo-motors, solenoids, micro-switches, and electronic circuits, in...

16 CFR § 1610.5 - Test apparatus and materials.

Code of Federal Regulations, 2013 CFR

2013-01-01

... electronic circuits, in addition to miscellaneous custom made cams and rods, shock absorbing linkages, and... burn time to 0.1 second. An electronic or mechanical timer can be used to record the burn time, and electro-mechanical devices (i.e., servo-motors, solenoids, micro-switches, and electronic circuits, in...

Processing and characterization of device solder interconnection and module attachment for power electronics modules

NASA Astrophysics Data System (ADS)

Haque, Shatil

This research is focused on the processing of an innovative three-dimensional packaging architecture for power electronics building blocks with soldered device interconnections and subsequent characterization of the module's critical interfaces. A low-cost approach termed metal posts interconnected parallel plate structure (MPIPPS) was developed for packaging high-performance modules of power electronics building blocks (PEBB). The new concept implemented direct bonding of copper posts, not wire bonding of fine aluminum wires, to interconnect power devices as well as joining the different circuit planes together. We have demonstrated the feasibility of this packaging approach by constructing PEBB modules (consisting of Insulated Gate Bipolar Transistors (IGBTs), diodes, and a few gate driver elements and passive components). In the 1st phase of module fabrication with IGBTs with Si3N 4 passivation, we had successfully fabricated packaged devices and modules using the MPIPPS technique. These modules were tested electrically and thermally, and they operated at pulse-switch and high power stages up to 6kW. However, in the 2nd phase of module fabrication with polyimide passivated devices, we experienced significant yield problems due to metallization difficulties of these devices. The under-bump metallurgy scheme for the development of a solderable interface involved sputtering of Ti-Ni-Cu and Cr-Cu, and an electroless deposition of Zn-Ni-Au metallization. The metallization process produced excellent yield in the case of Si3N4 passivated devices. However, under the same metallization schemes, devices with a polyimide passivation exhibited inconsistent electrical contact resistance. We found that organic contaminants such as hydrocarbons remain in the form of thin monolayers on the surface, even in the case of as-received devices from the manufacturer. Moreover, in the case of polyimide passivated devices, plasma cleaning introduced a few carbon constituents on the surface, which was not observed in the case of Si3N4 passivated devices. X-Ray Photoelectron Spectroscopy (XPS) Spectra showed evidence of possible carbon contaminants, such as carbide (˜282.9eV) and graphite (˜284.3eV) on the surface at binding energies below the binding energy of the hydrocarbon peak (C 1s at 285eV). Whereas above the hydrocarbon peak energy level, carbon-nitrogen compounds, single bond carbon compounds (˜285.9eV) and double bond carbon compounds (˜288.5eV) were evident. The majority of the carbon composition on the pad surface was associated with hydrocarbons, which were hydrophobic in nature, thus making the device contact pad less wettable. (Abstract shortened by UMI.)

Educational Support System for Experiments Involving Construction of Sound Processing Circuits

ERIC Educational Resources Information Center

Takemura, Atsushi

2012-01-01

This paper proposes a novel educational support system for technical experiments involving the production of practical electronic circuits for sound processing. To support circuit design and production, each student uses a computer during the experiments, and can learn circuit design, virtual circuit making, and real circuit making. In the…

Virtual Instrument Systems in Reality (VISIR) for Remote Wiring and Measurement of Electronic Circuits on Breadboard

ERIC Educational Resources Information Center

Tawfik, M.; Sancristobal, E.; Martin, S.; Gil, R.; Diaz, G.; Colmenar, A.; Peire, J.; Castro, M.; Nilsson, K.; Zackrisson, J.; Hakansson, L.; Gustavsson, I.

2013-01-01

This paper reports on a state-of-the-art remote laboratory project called Virtual Instrument Systems in Reality (VISIR). VISIR allows wiring and measuring of electronic circuits remotely on a virtual workbench that replicates physical circuit breadboards. The wiring mechanism is developed by means of a relay switching matrix connected to a PCI…

Selective Processing Techniques for Electronics and Opto-Electronic Applications: Quantum-Well Devices and Integrated Optic Circuits

DTIC Science & Technology

1993-02-10

new technology is to have sufficient control of processing to *- describable by an appropriate elecromagnetic model . build useful devices. For example...3. W aveguide Modulators .................................. 7 B. Integrated Optical Device and Circuit Modeling ... ................... .. 10 C...following categories: A. Integrated Optical Devices and Technology B. Integrated Optical Device and Circuit Modeling C. Cryogenic Etching for Low

Circuits Protect Against Incorrect Power Connections

NASA Technical Reports Server (NTRS)

Delombard, Richard

1992-01-01

Simple circuits prevent application of incorrectly polarized or excessive voltages. Connected temporarily or permanently at power-connecting terminals. Devised to protect electrical and electronic equipment installed in spacecraft and subjected to variety of tests in different facilities prior to installation. Basic concept of protective circuits also applied easily to many kinds of electrical and electronic equipment that must be protected against incorrect power connections.

Fixture aids soldering of electronic components on circuit board

NASA Technical Reports Server (NTRS)

Ross, M. H.

1966-01-01

Spring clamp fixture holds small electronic components in a desired position while they are being soldered on a circuit board. The spring clamp is clipped on the edge of the circuit board and an adjustable spring-steel boom holds components against the board. The felt pad at the end of the boom is replaced with different attachments for other holding tasks.

E-learning platform for automated testing of electronic circuits using signature analysis method

NASA Astrophysics Data System (ADS)

Gherghina, Cǎtǎlina; Bacivarov, Angelica; Bacivarov, Ioan C.; Petricǎ, Gabriel

2016-12-01

Dependability of electronic circuits can be ensured only through testing of circuit modules. This is done by generating test vectors and their application to the circuit. Testability should be viewed as a concerted effort to ensure maximum efficiency throughout the product life cycle, from conception and design stage, through production to repairs during products operating. In this paper, is presented the platform developed by authors for training for testability in electronics, in general and in using signature analysis method, in particular. The platform allows highlighting the two approaches in the field namely analog and digital signature of circuits. As a part of this e-learning platform, it has been developed a database for signatures of different electronic components meant to put into the spotlight different techniques implying fault detection, and from this there were also self-repairing techniques of the systems with this kind of components. An approach for realizing self-testing circuits based on MATLAB environment and using signature analysis method is proposed. This paper analyses the benefits of signature analysis method and simulates signature analyzer performance based on the use of pseudo-random sequences, too.

Flexible and low-voltage integrated circuits constructed from high-performance nanocrystal transistors.

PubMed

Kim, David K; Lai, Yuming; Diroll, Benjamin T; Murray, Christopher B; Kagan, Cherie R

2012-01-01

Colloidal semiconductor nanocrystals are emerging as a new class of solution-processable materials for low-cost, flexible, thin-film electronics. Although these colloidal inks have been shown to form single, thin-film field-effect transistors with impressive characteristics, the use of multiple high-performance nanocrystal field-effect transistors in large-area integrated circuits has not been shown. This is needed to understand and demonstrate the applicability of these discrete nanocrystal field-effect transistors for advanced electronic technologies. Here we report solution-deposited nanocrystal integrated circuits, showing nanocrystal integrated circuit inverters, amplifiers and ring oscillators, constructed from high-performance, low-voltage, low-hysteresis CdSe nanocrystal field-effect transistors with electron mobilities of up to 22 cm(2) V(-1) s(-1), current modulation >10(6) and subthreshold swing of 0.28 V dec(-1). We fabricated the nanocrystal field-effect transistors and nanocrystal integrated circuits from colloidal inks on flexible plastic substrates and scaled the devices to operate at low voltages. We demonstrate that colloidal nanocrystal field-effect transistors can be used as building blocks to construct complex integrated circuits, promising a viable material for low-cost, flexible, large-area electronics.

Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications.

PubMed

Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

2016-05-09

Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm(2) V(-1) sec(-1), and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity.

Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications

PubMed Central

Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

2016-01-01

Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm2 V−1 sec−1, and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity. PMID:27157914

Processing and Prolonged 500 C Testing of 4H-SiC JFET Integrated Circuits with Two Levels of Metal Interconnect

NASA Technical Reports Server (NTRS)

Spry, David J.; Neudeck, Philip G.; Chen, Liangyu; Lukco, Dorothy; Chang, Carl W.; Beheim, Glenn M.; Krasowski, Michael J.; Prokop, Norman F.

2015-01-01

Complex integrated circuit (IC) chips rely on more than one level of interconnect metallization for routing of electrical power and signals. This work reports the processing and testing of 4H-SiC junction field effect transistor (JFET) prototype ICs with two levels of metal interconnect capable of prolonged operation at 500 C. Packaged functional circuits including 3-and 11-stage ring oscillators, a 4-bit digital to analog converter, and a 4-bit address decoder and random access memory cell have been demonstrated at 500 C. A 3-stage oscillator functioned for over 3000 hours at 500 C in air ambient.

60-GHz integrated-circuit high data rate quadriphase shift keying exciter and modulator

NASA Technical Reports Server (NTRS)

Grote, A.; Chang, K.

1984-01-01

An integrated-circuit quadriphase shift keying (QPSK) exciter and modulator have demonstrated excellent performance directly modulating a carrier frequency of 60 GHz with an output phase error of less than 3 degrees and maximum amplitude error of 0.5 dB. The circuit consists of a 60-GHz Gunn VCO phase-locked to a low-frequency reference source, a 4th subharmonic mixer, and a QPSK modlator packaged into a small volume of 1.8 x 2.5 x 0.35 in. The use of microstrip has the advantages of small size, light-weight, and low-cost fabrication. The unit has the potential for multigigabit data rate applications.

Microelectronic device package with an integral window

DOEpatents

Peterson, Kenneth A.; Watson, Robert D.

2002-01-01

An apparatus for packaging of microelectronic devices, including an integral window. The microelectronic device can be a semiconductor chip, a CCD chip, a CMOS chip, a VCSEL chip, a laser diode, a MEMS device, or a IMEMS device. The package can include a cofired ceramic frame or body. The package can have an internal stepped structure made of one or more plates, with apertures, which are patterned with metallized conductive circuit traces. The microelectronic device can be flip-chip bonded on the plate to these traces, and oriented so that the light-sensitive side is optically accessible through the window. A cover lid can be attached to the opposite side of the package. The result is a compact, low-profile package, having an integral window that can be hermetically-sealed. The package body can be formed by low-temperature cofired ceramic (LTCC) or high-temperature cofired ceramic (HTCC) multilayer processes with the window being simultaneously joined (e.g. cofired) to the package body during LTCC or HTCC processing. Multiple chips can be located within a single package. The cover lid can include a window. The apparatus is particularly suited for packaging of MEMS devices, since the number of handling steps is greatly reduced, thereby reducing the potential for contamination.

An innovative approach to predict technology evolution for the desoldering of printed circuit boards: A perspective from China and America.

PubMed

Wang, Chen; Zhao, Wu; Wang, Jie; Chen, Ling; Luo, Chun-Jing

2016-06-01

The printed circuit boards basis of electronic equipment have seen a rapid growth in recent years and played a significant role in modern life. Nowadays, the fact that electronic devices upgrade quickly necessitates a proper management of waste printed circuit boards. Non-destructive desoldering of waste printed circuit boards becomes the first and the most crucial step towards recycling electronic components. Owing to the diversity of materials and components, the separation process is difficult, which results in complex and expensive recovery of precious materials and electronic components from waste printed circuit boards. To cope with this problem, we proposed an innovative approach integrating Theory of Inventive Problem Solving (TRIZ) evolution theory and technology maturity mapping system to forecast the evolution trends of desoldering technology of waste printed circuit boards. This approach can be applied to analyse the technology evolution, as well as desoldering technology evolution, then research and development strategy and evolution laws can be recommended. As an example, the maturity of desoldering technology is analysed with a technology maturity mapping system model. What is more, desoldering methods in different stages are analysed and compared. According to the analysis, the technological evolution trends are predicted to be 'the law of energy conductivity' and 'increasing the degree of idealisation'. And the potential technology and evolutionary state of waste printed circuit boards are predicted, offering reference for future waste printed circuit boards recycling. © The Author(s) 2016.

Directly writing resistor, inductor and capacitor to composite functional circuits: a super-simple way for alternative electronics.

PubMed

Gao, Yunxia; Li, Haiyan; Liu, Jing

2013-01-01

The current strategies for making electronic devices are generally time, water, material and energy consuming. Here, the direct writing of composite functional circuits through comprehensive use of GaIn10-based liquid metal inks and matching material is proposed and investigated, which is a rather easy going and cost effective electronics fabrication way compared with the conventional approaches. Owing to its excellent adhesion and electrical properties, the liquid metal ink was demonstrated as a generalist in directly making various basic electronic components such as planar resistor, inductor and capacitor or their combination and thus composing circuits with expected electrical functions. For a precise control of the geometric sizes of the writing, a mask with a designed pattern was employed and demonstrated. Mechanisms for justifying the chemical components of the inks and the magnitudes of the target electronic elements so as to compose various practical circuits were disclosed. Fundamental tests on the electrical components including capacitor and inductor directly written on paper with working time up to 48 h and elevated temperature demonstrated their good stability and potential widespread adaptability especially when used in some high frequency circuits. As the first proof-of-concept experiment, a typical functional oscillating circuit including an integrated chip of 74HC04 with a supply voltage of 5 V, a capacitor of 10 nF and two resistors of 5 kΩ and 1 kΩ respectively was directly composed on paper through integrating specific electrical elements together, which presented an oscillation frequency of 8.8 kHz. The present method significantly extends the roles of the metal ink in recent works serving as only a single electrical conductor or interconnecting wires. It opens the way for directly writing out complex functional circuits or devices on different substrates. Such circuit composition strategy has generalized purpose and can be extended to more areas, even daily pervasive electronics.

Directly Writing Resistor, Inductor and Capacitor to Composite Functional Circuits: A Super-Simple Way for Alternative Electronics

PubMed Central

Gao, Yunxia; Li, Haiyan; Liu, Jing

2013-01-01

Background The current strategies for making electronic devices are generally time, water, material and energy consuming. Here, the direct writing of composite functional circuits through comprehensive use of GaIn10-based liquid metal inks and matching material is proposed and investigated, which is a rather easy going and cost effective electronics fabrication way compared with the conventional approaches. Methods Owing to its excellent adhesion and electrical properties, the liquid metal ink was demonstrated as a generalist in directly making various basic electronic components such as planar resistor, inductor and capacitor or their combination and thus composing circuits with expected electrical functions. For a precise control of the geometric sizes of the writing, a mask with a designed pattern was employed and demonstrated. Mechanisms for justifying the chemical components of the inks and the magnitudes of the target electronic elements so as to compose various practical circuits were disclosed. Results Fundamental tests on the electrical components including capacitor and inductor directly written on paper with working time up to 48 h and elevated temperature demonstrated their good stability and potential widespread adaptability especially when used in some high frequency circuits. As the first proof-of-concept experiment, a typical functional oscillating circuit including an integrated chip of 74HC04 with a supply voltage of 5 V, a capacitor of 10 nF and two resistors of 5 kΩ and 1 kΩ respectively was directly composed on paper through integrating specific electrical elements together, which presented an oscillation frequency of 8.8 kHz. Conclusions The present method significantly extends the roles of the metal ink in recent works serving as only a single electrical conductor or interconnecting wires. It opens the way for directly writing out complex functional circuits or devices on different substrates. Such circuit composition strategy has generalized purpose and can be extended to more areas, even daily pervasive electronics. PMID:23936349

The NASA Electronic Parts and Packaging (NEPP) Program: Insertion of New Electronics Technologies

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Sampson, Michael J.

2007-01-01

This viewgraph presentation gives an overview of NASA Electronic Parts and Packaging (NEPP) Program's new electronics technology trends. The topics include: 1) The Changing World of Radiation Testing of Memories; 2) Even Application-Specific Tests are Costly!; 3) Hypothetical New Technology Part Qualification Cost; 4) Where we are; 5) Approaching FPGAs as a More Than a "Part" for Reliability; 6) FPGAs Beget Novel Radiation Test Setups; 7) Understanding the Complex Radiation Data; 8) Tracking Packaging Complexity and Reliability for FPGAs; 9) Devices Supporting the FPGA Need to be Considered; 10) Summary of the New Electronic Technologies and Insertion into Flight Programs Workshop; and 11) Highlights of Panel Notes and Comments

High performance protection circuit for power electronics applications

NASA Astrophysics Data System (ADS)

Tudoran, Cristian D.; Dǎdârlat, Dorin N.; Toşa, Nicoleta; Mişan, Ioan

2015-12-01

In this paper we present a high performance protection circuit designed for the power electronics applications where the load currents can increase rapidly and exceed the maximum allowed values, like in the case of high frequency induction heating inverters or high frequency plasma generators. The protection circuit is based on a microcontroller and can be adapted for use on single-phase or three-phase power systems. Its versatility comes from the fact that the circuit can communicate with the protected system, having the role of a "sensor" or it can interrupt the power supply for protection, in this case functioning as an external, independent protection circuit.

Electronic Circuit Experiments and SPICE Simulation of Double Covering Bifurcation of 2-Torus Quasi-Periodic Flow in Phase-Locked Loop Circuit

NASA Astrophysics Data System (ADS)

Kamiyama, Kyohei; Endo, Tetsuro; Imai, Isao; Komuro, Motomasa

2016-06-01

Double covering (DC) bifurcation of a 2-torus quasi-periodic flow in a phase-locked loop circuit was experimentally investigated using an electronic circuit and via SPICE simulation; in the circuit, the input radio-frequency signal was frequency modulated by the sum of two asynchronous sinusoidal baseband signals. We observed both DC and period-doubling bifurcations of a discrete map on two Poincaré sections, which were realized by changing the sample timing from one baseband sinusoidal signal to the other. The results confirm the DC bifurcation of the original flow.

Miniaturized ultrasound imaging probes enabled by CMUT arrays with integrated frontend electronic circuits.

PubMed

Khuri-Yakub, B T; Oralkan, Omer; Nikoozadeh, Amin; Wygant, Ira O; Zhuang, Steve; Gencel, Mustafa; Choe, Jung Woo; Stephens, Douglas N; de la Rama, Alan; Chen, Peter; Lin, Feng; Dentinger, Aaron; Wildes, Douglas; Thomenius, Kai; Shivkumar, Kalyanam; Mahajan, Aman; Seo, Chi Hyung; O'Donnell, Matthew; Truong, Uyen; Sahn, David J

2010-01-01

Capacitive micromachined ultrasonic transducer (CMUT) arrays are conveniently integrated with frontend integrated circuits either monolithically or in a hybrid multichip form. This integration helps with reducing the number of active data processing channels for 2D arrays. This approach also preserves the signal integrity for arrays with small elements. Therefore CMUT arrays integrated with electronic circuits are most suitable to implement miniaturized probes required for many intravascular, intracardiac, and endoscopic applications. This paper presents examples of miniaturized CMUT probes utilizing 1D, 2D, and ring arrays with integrated electronics.

Electronics box having internal circuit cards interconnected to external connectors sans motherboard

NASA Technical Reports Server (NTRS)

Hockett, John E. (Inventor)

2005-01-01

An electronics chassis box includes a pair of opposing sidewalls, a pair of opposing end walls, a bottom surface, a top cover, and ring connectors assemblies mounted in selective ones of the walls of the electronic box. Boss members extend from the bottom surface at different heights upon which circuit cards are mounted in spatial relationship to each other. A flex interconnect substantially reduces and generally eliminates the need of a motherboard by interconnecting the circuit cards to one another and to external connectors mounted within the ring connector assemblies.

Electronic Position Sensor for Power Operated Accessory

DOEpatents

Haag, Ronald H.; Chia, Michael I.

2005-05-31

An electronic position sensor for use with a power operated vehicle accessory, such as a power liftgate. The position sensor includes an elongated resistive circuit that is mounted such that it is stationary and extends along the path of a track portion of the power operated accessory. The position sensor further includes a contact nub mounted to a link member that moves within the track portion such that the contact nub is slidingly biased against the elongated circuit. As the link member moves under the force of a motor-driven output gear, the contact nub slides along the surface of the resistive circuit, thereby affecting the overall resistance of the circuit. The position sensor uses the overall resistance to provide an electronic position signal to an ECU, wherein the signal is indicative of the absolute position of the power operated accessory. Accordingly, the electronic position sensor is capable of providing an electronic signal that enables the ECU to track the absolute position of the power operated accessory.

Mouldable all-carbon integrated circuits

NASA Astrophysics Data System (ADS)

Sun, Dong-Ming; Timmermans, Marina Y.; Kaskela, Antti; Nasibulin, Albert G.; Kishimoto, Shigeru; Mizutani, Takashi; Kauppinen, Esko I.; Ohno, Yutaka

2013-08-01

A variety of plastic products, ranging from those for daily necessities to electronics products and medical devices, are produced by moulding techniques. The incorporation of electronic circuits into various plastic products is limited by the brittle nature of silicon wafers. Here we report mouldable integrated circuits for the first time. The devices are composed entirely of carbon-based materials, that is, their active channels and passive elements are all fabricated from stretchable and thermostable assemblies of carbon nanotubes, with plastic polymer dielectric layers and substrates. The all-carbon thin-film transistors exhibit a mobility of 1,027cm2V-1s-1 and an ON/OFF ratio of 105. The devices also exhibit extreme biaxial stretchability of up to 18% when subjected to thermopressure forming. We demonstrate functional integrated circuits that can be moulded into a three-dimensional dome. Such mouldable electronics open new possibilities by allowing for the addition of electronic/plastic-like functionalities to plastic/electronic products, improving their designability.

Mouldable all-carbon integrated circuits.

PubMed

Sun, Dong-Ming; Timmermans, Marina Y; Kaskela, Antti; Nasibulin, Albert G; Kishimoto, Shigeru; Mizutani, Takashi; Kauppinen, Esko I; Ohno, Yutaka

2013-01-01

A variety of plastic products, ranging from those for daily necessities to electronics products and medical devices, are produced by moulding techniques. The incorporation of electronic circuits into various plastic products is limited by the brittle nature of silicon wafers. Here we report mouldable integrated circuits for the first time. The devices are composed entirely of carbon-based materials, that is, their active channels and passive elements are all fabricated from stretchable and thermostable assemblies of carbon nanotubes, with plastic polymer dielectric layers and substrates. The all-carbon thin-film transistors exhibit a mobility of 1,027 cm(2) V(-1) s(-1) and an ON/OFF ratio of 10(5). The devices also exhibit extreme biaxial stretchability of up to 18% when subjected to thermopressure forming. We demonstrate functional integrated circuits that can be moulded into a three-dimensional dome. Such mouldable electronics open new possibilities by allowing for the addition of electronic/plastic-like functionalities to plastic/electronic products, improving their designability.

Hermetic electronics package with dual-sided electrical feedthrough configuration

DOEpatents

Shah, Kedar G.; Pannu, Satinderpall S.

2016-11-22

A hermetic electronics package includes a metal case with opposing first and second open ends, with each end connected to a first feedthrough construction and a second feedthrough construction. Each feedthrough contruction has an electrically insulating substrate and an array of electrically conductive feedthroughs extending therethrough, with the electrically insulating substrates connected to the opposing first and second open ends, respectively, of the metal case so as to form a hermetically sealed enclosure. A set of electronic components are located within the hermetically sealed enclosure and are operably connected to the feedthroughs of the first and second feedthrough constructions so as to electrically communicate outside the package from opposite sides of the package.

Information Business: Applying Infometry (Informational Geometry) in Cognitive Coordination and Genetic Programming for Electronic Information Packaging and Marketing.

ERIC Educational Resources Information Center

Tsai, Bor-sheng

1994-01-01

Describes the use of infometry, or informational geometry, to meet the challenges of information service businesses. Highlights include theoretical models for cognitive coordination and genetic programming; electronic information packaging; marketing electronic information products, including cost-benefit analyses; and recapitalization, including…

21 CFR 1305.21 - Requirements for electronic orders.

Code of Federal Regulations, 2013 CFR

2013-04-01

... 1311 of this chapter. (b) The following data fields must be included on an electronic order for... either the purchaser or the supplier). (8) The quantity in a single package or container. (9) The number of packages or containers of each item ordered. (c) An electronic order may include controlled...

21 CFR 1305.21 - Requirements for electronic orders.

Code of Federal Regulations, 2014 CFR

2014-04-01

... 1311 of this chapter. (b) The following data fields must be included on an electronic order for... either the purchaser or the supplier). (8) The quantity in a single package or container. (9) The number of packages or containers of each item ordered. (c) An electronic order may include controlled...

21 CFR 1305.21 - Requirements for electronic orders.

Code of Federal Regulations, 2012 CFR

2012-04-01

... 1311 of this chapter. (b) The following data fields must be included on an electronic order for... either the purchaser or the supplier). (8) The quantity in a single package or container. (9) The number of packages or containers of each item ordered. (c) An electronic order may include controlled...

Image dissector control and data system electronics, part 1, part 2, and part 3

NASA Technical Reports Server (NTRS)

1975-01-01

The operating and calibration procedures, design details, and maintenance information for the control console and the associated electronics are presented. Detailed circuit connector information is included which describes the destination of each wire leaving each pin of each circuit board. The schematic diagrams of the circuit boards in the system and of the interconnection between boards and consoles are presented.

Analysis and Design of Power Factor Pre-Regulator Based on a Symmetrical Charge Pump Circuit Applied to Electronic Ballast

NASA Astrophysics Data System (ADS)

Lazcano Olea, Miguel; Ramos Astudillo, Reynaldo; Sanhueza Robles, René; Rodriguez Rubke, Leopoldo; Ruiz-Caballero, Domingo Antonio

This paper presents the analysis and design of a power factor pre-regulator based on a symmetrical charge pump circuit applied to electronic ballast. The operation stages of the circuit are analyzed and its main design equations are obtained. Simulation and experimental results are presented in order to show the design methodology feasibility.

High power and ultra-low-noise photodetector for squeezed-light enhanced gravitational wave detectors.

PubMed

Grote, Hartmut; Weinert, Michael; Adhikari, Rana X; Affeldt, Christoph; Kringel, Volker; Leong, Jonathan; Lough, James; Lück, Harald; Schreiber, Emil; Strain, Kenneth A; Vahlbruch, Henning; Wittel, Holger

2016-09-05

Current laser-interferometric gravitational wave detectors employ a self-homodyne readout scheme where a comparatively large light power (5-50 mW) is detected per photosensitive element. For best sensitivity to gravitational waves, signal levels as low as the quantum shot noise have to be measured as accurately as possible. The electronic noise of the detection circuit can produce a relevant limit to this accuracy, in particular when squeezed states of light are used to reduce the quantum noise. We present a new electronic circuit design reducing the electronic noise of the photodetection circuit in the audio band. In the application of this circuit at the gravitational-wave detector GEO 600 the shot-noise to electronic noise ratio was permanently improved by a factor of more than 4 above 1 kHz, while the dynamic range was improved by a factor of 7. The noise equivalent photocurrent of the implemented photodetector and circuit is about 5μA/Hz above 1 kHz with a maximum detectable photocurrent of 20 mA. With the new circuit, the observed squeezing level in GEO 600 increased by 0.2 dB. The new circuit also creates headroom for higher laser power and more squeezing to be observed in the future in GEO 600 and is applicable to other optics experiments.

Visual and x-ray inspection characteristics of eutectic and lead free assemblies

NASA Technical Reports Server (NTRS)

Ghaffarian, R.

2003-01-01

For high reliability applications, visual inspection has been the key technique for most conventional electronic package assemblies. Now, the use of x-ray technique has become an additional inspection requirement for quality control and detection of unique defects due to manufacturing of advanced electronic array packages such as ball grid array (BGAs) and chip scale packages (CSPs).

Technological and organizational diversity and technical advance in the early history of the American semiconductor industry

NASA Astrophysics Data System (ADS)

Cohen, W.; Holbrook, D.; Klepper, S.

1994-06-01

This study examines the early years of the semiconductor industry and focuses on the roles played by different size firms in technologically innovative processes. A large and diverse pool of firms participated in the growth of the industry. Three related technological areas were chosen for in-depth analysis: integrated circuits, materials technology, and device packaging. Large business producing vacuum tubes dominated the early production of semiconductor devices. As the market for new devices grew during the 1950's, new firms were founded and existing firms from other industries, e.g. aircraft builders and instrument makers, began to pursue semiconductor electronics. Small firms began to cater to the emerging industry by supplying materials and equipment. These firms contributed to the development of certain aspects of one thousand firms that were playing some part in the semiconductor industry.

Bennett ion mass spectrometers on the Pioneer Venus Bus and Orbiter

NASA Technical Reports Server (NTRS)

Taylor, H. A., Jr.; Brinton, H. C.; Wagner, T. C. G.; Blackwell, B. H.; Cordier, G. R.

1980-01-01

Identical Bennett radio-frequency ion mass spectrometer instruments on the Pioneer Venus Bus and Orbiter have provided the first in-situ measurements of the detailed composition of the planet's ionosphere. The sensitivity, resolution, and dynamic range are sufficient to provide measurements of the solar-wind-induced bow-shock, the ionopause, and highly structured distributions of up to 16 thermal ion species within the ionosphere. The use of adaptive scan and detection circuits and servo-controlled logic for ion mass and energy analysis permits detection of ion concentrations as low as 5 ions/cu cm and ion flow velocities as large as 9 km/sec for O(+). A variety of commandable modes provides ion sampling rates ranging from 0.1 to 1.6 sec between measurements of a single constituent. A lightweight sensor and electronics housing are features of a compact instrument package.

Experimental investigation on the thermal performance of Si micro-heat pipe with different cross-sections

NASA Astrophysics Data System (ADS)

Hamidnia, Mohammad; Luo, Yi; Wang, Xiaodong; Li, Congming

2017-10-01

Increasing component densities of the integrated circuit (IC) and packaging levels has led to thermal management problems. Si substrates with embedded micro-heat pipes (MHPs) couple good thermal characteristics and cost savings associated with IC batch processing. The thermal performance of MHP is intimately related to the cross-sectional geometry. Different cross-sections are designed in order to enhance the backflow of working fluid. In this experimental study, three different Si MHPs with same hydraulic diameter and various cross-sections are fabricated by micro-fabrication methods and tested under different conditions of fluid charge ratios. The results show that the trapezoidal MHP associated with rectangular artery which is charged with 40% of vapor chamber’s volume has the best thermal performance. This silicon-based MHP is a passive approach for thermal management, which could widen applications in the commercial electronics industry and LED lightings.

Hybrid power systems for autonomous MEMS

NASA Astrophysics Data System (ADS)

Bennett, Daniel M.; Selfridge, Richard H.; Humble, Paul; Harb, John N.

2001-08-01

This paper describes the design of a hybrid power system for use with autonomous MEMS and other microdevices. This hybrid power system includes energy conversion and storage along with an electronic system for managing the collection and distribution of power. It offers flexibility and longevity in a compact package. The hybrid power system couples a silicon solar cell with a microbattery specially designed for MEMS applications. We have designed a control/interface charging circuit to be compatible with a MEMS duty cycle. The design permits short pulses of 'high' power while taking care to avoid excessive charging or discharging of the battery. Charging is carefully controlled to provide a balance between acceptably small charging times and a charging profile that extends battery life. Our report describes the charging of our Ni/Zn microbatteries using solar cells. To date we have demonstrated thousands of charge/discharge cycles of a simulated MEMS duty cycle.

Note: electronic circuit for two-way time transfer via a single coaxial cable with picosecond accuracy and precision.

PubMed

Prochazka, Ivan; Kodet, Jan; Panek, Petr

2012-11-01

We have designed, constructed, and tested the overall performance of the electronic circuit for the two-way time transfer between two timing devices over modest distances with sub-picosecond precision and a systematic error of a few picoseconds. The concept of the electronic circuit enables to carry out time tagging of pulses of interest in parallel to the comparison of the time scales of these timing devices. The key timing parameters of the circuit are: temperature change of the delay is below 100 fs/K, timing stability time deviation better than 8 fs for averaging time from minutes to hours, sub-picosecond time transfer precision, and a few picoseconds time transfer accuracy.

Compact self-powered synchronous energy extraction circuit design with enhanced performance

NASA Astrophysics Data System (ADS)

Liu, Weiqun; Zhao, Caiyou; Badel, Adrien; Formosa, Fabien; Zhu, Qiao; Hu, Guangdi

2018-04-01

Synchronous switching circuit is viewed as an effective solution of enhancing the generator’s performance and providing better adaptability for load variations. A critical issue for these synchronous switching circuits is the self-powered realization. In contrast with other methods, the electronic breaker possesses the advantage of simplicity and reliability. However, beside the energy consumption of the electronic breakers, the parasitic capacitance decreases the available piezoelectric voltage. In this technical note, a new compact design of the self-powered switching circuit using electronic breaker is proposed. The envelope diodes are excluded and only a single envelope capacitor is used. The parasitic capacitance is reduced to half with boosted performance while the components are reduced with cost saved.

Computer programs: Electronic circuit design criteria: A compilation

NASA Technical Reports Server (NTRS)

1973-01-01

A Technology Utilization Program for the dissemination of information on technological developments which have potential utility outside the aerospace community is presented. The 21 items reported herein describe programs that are applicable to electronic circuit design procedures.

Design criteria: data acquisition system for waste tank liquid level gauges and SX Tank Farm thermocouples

DOE Office of Scientific and Technical Information (OSTI.GOV)

Martin, G.E.; Oliver, R.G.

1972-02-17

This design criteria revision (revision 2) will cancel revision 1 and will provide complete functional supervision of the liquid level gauges. A new.counter and an electronic supervisory circuit will be installed in each waste tank liquid level gauge. The electronic supervisory circuit will monitor (via the new counter and a signal from the gauge electronics) cycling of the gauge on a one minute time cycle. This supervisory circuit will fulfill the intent of revision 1 (monitor AC power to the gauge) and, in addition, will supervise all other aspects of the gauge including: the electronics, the drive motor, all sprocketsmore » and chain linkages, and the counter. If a gauge failure should occur, this circuit will remove the +12 volts excitation from the data acquisition system inferface board; and the computer will be programmed to recognize this condition as a gauge failure. (auth)« less

Spiers Memorial Lecture. Molecular mechanics and molecular electronics.

PubMed

Beckman, Robert; Beverly, Kris; Boukai, Akram; Bunimovich, Yuri; Choi, Jang Wook; DeIonno, Erica; Green, Johnny; Johnston-Halperin, Ezekiel; Luo, Yi; Sheriff, Bonnie; Stoddart, Fraser; Heath, James R

2006-01-01

We describe our research into building integrated molecular electronics circuitry for a diverse set of functions, and with a focus on the fundamental scientific issues that surround this project. In particular, we discuss experiments aimed at understanding the function of bistable rotaxane molecular electronic switches by correlating the switching kinetics and ground state thermodynamic properties of those switches in various environments, ranging from the solution phase to a Langmuir monolayer of the switching molecules sandwiched between two electrodes. We discuss various devices, low bit-density memory circuits, and ultra-high density memory circuits that utilize the electrochemical switching characteristics of these molecules in conjunction with novel patterning methods. We also discuss interconnect schemes that are capable of bridging the micrometre to submicrometre length scales of conventional patterning approaches to the near-molecular length scales of the ultra-dense memory circuits. Finally, we discuss some of the challenges associated with fabricated ultra-dense molecular electronic integrated circuits.

Differential Resonant Ring YIG Tuned Oscillator

NASA Technical Reports Server (NTRS)

Parrott, Ronald A.

2010-01-01

A differential SiGe oscillator circuit uses a resonant ring-oscillator topology in order to electronically tune the oscillator over multi-octave bandwidths. The oscillator s tuning is extremely linear, because the oscillator s frequency depends on the magnetic tuning of a YIG sphere, whose resonant frequency is equal to a fundamental constant times the DC magnetic field. This extremely simple circuit topology uses two coupling loops connecting a differential pair of SiGe bipolar transistors into a feedback configuration using a YIG tuned filter creating a closed-loop ring oscillator. SiGe device technology is used for this oscillator in order to keep the transistor s 1/f noise to an absolute minimum in order to achieve minimum RF phase noise. The single-end resonant ring oscillator currently has an advantage in fewer parts, but when the oscillation frequency is greater than 16 GHz, the package s parasitic behavior couples energy to the sphere and causes holes and poor phase noise performance. This is because the coupling to the YIG is extremely low, so that the oscillator operates at near the unloaded Q. With the differential resonant ring oscillator, the oscillation currents are just in the YIG coupling mechanisms. The phase noise is even better, and the physical size can be reduced to permit monolithic microwave integrated circuit oscillators. This invention is a YIG tuned oscillator circuit making use of a differential topology to simultaneously achieve an extremely broadband electronic tuning range and ultra-low phase noise. As a natural result of its differential circuit topology, all reactive elements, such as tuning stubs, which limit tuning bandwidth by contributing excessive open loop phase shift, have been eliminated. The differential oscillator s open-loop phase shift is associated with completely non-dispersive circuit elements such as the physical angle of the coupling loops, a differential loop crossover, and the high-frequency phase shift of the n-p-n transistors. At the input of the oscillator s feedback loop is a pair of differentially connected n-p-n SiGe transistors that provides extremely high gain, and because they are bulk-effect devices, extremely low 1/f noise (leading to ultralow RF phase noise). The 1/f corner frequency for n-p-n SiGe transistors is approximately 500 Hz. The RF energy from the transistor s collector output is connected directly to the top-coupling loop (the excitation loop) of a single-sphere YIG tuned filter. A uniform magnetic field to bias the YIG must be at a right angle to any vector associated with an RF current in a coupling loop in order for the precession to interact with the RF currents.

The factors influencing nonlinear characteristics of the short-circuit current in dye-sensitized solar cells investigated by a numerical model.

PubMed

Shi, Yushuai; Dong, Xiandui

2013-06-24

A numerical model for interpretation of the light-intensity-dependent nonlinear characteristics of the short-circuit current in dye-sensitized solar cells is suggested. The model is based on the continuity equation and includes the influences of the nongeminate recombination between electrons and electron acceptors in the electrolyte and the geminate recombination between electrons and oxidized dye molecules. The influences of the order and rate constant of the nongeminate recombination reaction, the light-absorption coefficient of the dye, the film thickness, the rate constant of geminate recombination, and the regeneration rate constant on the nonlinear characteristics of the short-circuit current are simulated and analyzed. It is proposed that superlinear and sublinear characteristics of the short-circuit current should be attributed to low electron-collection efficiency and low dye-regeneration efficiency, respectively. These results allow a deep understanding of the origin of the nonlinear characteristics of the short-circuit current in solar cells. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Passive and electro-optic polymer photonics and InP electronics integration

NASA Astrophysics Data System (ADS)

Zhang, Z.; Katopodis, V.; Groumas, P.; Konczykowska, A.; Dupuy, J.-.; Beretta, A.; Dede, A.; Miller, E.; Choi, J. H.; Harati, P.; Jorge, F.; Nodjiadjim, V.; Dinu, R.; Cangini, G.; Vannucci, A.; Felipe, D.; Maese-Novo, A.; Keil, N.; Bach, H.-.; Schell, Martin; Avramopoulos, H.; Kouloumentas, Ch.

2015-05-01

Hybrid photonic integration allows individual components to be developed at their best-suited material platforms without sacrificing the overall performance. In the past few years a polymer-enabled hybrid integration platform has been established, comprising 1) EO polymers for constructing low-complexity and low-cost Mach-Zehnder modulators (MZMs) with extremely high modulation bandwidth; 2) InP components for light sources, detectors, and high-speed electronics including MUX drivers and DEMUX circuits; 3) Ceramic (AIN) RF board that links the electronic signals within the package. On this platform, advanced optoelectronic modules have been demonstrated, including serial 100 Gb/s [1] and 2x100 Gb/s [2] optical transmitters, but also 400 Gb/s optoelectronic interfaces for intra-data center networks [3]. To expand the device functionalities to an unprecedented level and at the same time improve the integration compatibility with diversified active / passive photonic components, we have added a passive polymer-based photonic board (polyboard) as the 4th material system. This passive polyboard allows for low-cost fabrication of single-mode waveguide networks, enables fast and convenient integration of various thin-film elements (TFEs) to control the light polarization, and provides efficient thermo-optic elements (TOEs) for wavelength tuning, light amplitude regulation and light-path switching.

Accelerated life-test methods and results for implantable electronic devices with adhesive encapsulation.

PubMed

Huang, Xuechen; Denprasert, Petcharat May; Zhou, Li; Vest, Adriana Nicholson; Kohan, Sam; Loeb, Gerald E

2017-09-01

We have developed and applied new methods to estimate the functional life of miniature, implantable, wireless electronic devices that rely on non-hermetic, adhesive encapsulants such as epoxy. A comb pattern board with a high density of interdigitated electrodes (IDE) could be used to detect incipient failure from water vapor condensation. Inductive coupling of an RF magnetic field was used to provide DC bias and to detect deterioration of an encapsulated comb pattern. Diodes in the implant converted part of the received energy into DC bias on the comb pattern. The capacitance of the comb pattern forms a resonant circuit with the inductor by which the implant receives power. Any moisture affects both the resonant frequency and the Q-factor of the resonance of the circuitry, which was detected wirelessly by its effects on the coupling between two orthogonal RF coils placed around the device. Various defects were introduced into the comb pattern devices to demonstrate sensitivity to failures and to correlate these signals with visual inspection of failures. Optimized encapsulation procedures were validated in accelerated life tests of both comb patterns and a functional neuromuscular stimulator under development. Strong adhesive bonding between epoxy and electronic circuitry proved to be necessary and sufficient to predict 1 year packaging reliability of 99.97% for the neuromuscular stimulator.

Single-mode glass waveguide technology for optical interchip communication on board level

NASA Astrophysics Data System (ADS)

Brusberg, Lars; Neitz, Marcel; Schröder, Henning

2012-01-01

The large bandwidth demand in long-distance telecom networks lead to single-mode fiber interconnects as result of low dispersion, low loss and dense wavelength multiplexing possibilities. In contrast, multi-mode interconnects are suitable for much shorter lengths up to 300 meters and are promising for optical links between racks and on board level. Active optical cables based on multi-mode fiber links are at the market and research in multi-mode waveguide integration on board level is still going on. Compared to multi-mode, a single-mode waveguide has much more integration potential because of core diameters of around 20% of a multi-mode waveguide by a much larger bandwidth. But light coupling in single-mode waveguides is much more challenging because of lower coupling tolerances. Together with the silicon photonics technology, a single-mode waveguide technology on board-level will be the straight forward development goal for chip-to-chip optical interconnects integration. Such a hybrid packaging platform providing 3D optical single-mode links bridges the gap between novel photonic integrated circuits and the glass fiber based long-distance telecom networks. Following we introduce our 3D photonic packaging approach based on thin glass substrates with planar integrated optical single-mode waveguides for fiber-to-chip and chip-to-chip interconnects. This novel packaging approach merges micro-system packaging and glass integrated optics. It consists of a thin glass substrate with planar integrated singlemode waveguide circuits, optical mirrors and lenses providing an integration platform for photonic IC assembly and optical fiber interconnect. Thin glass is commercially available in panel and wafer formats and characterizes excellent optical and high-frequency properties. That makes it perfect for microsystem packaging. The paper presents recent results in single-mode waveguide technology on wafer level and waveguide characterization. Furthermore the integration in a hybrid packaging process and design issues are discussed.

Are Current SEE Test Procedures Adequate for Modern Devices and Electronics Technologies?

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Cohn, Lewis M.; Ladbury, Ray

2008-01-01

Believe it or not, this has been a simplistic look at starting a checklist for SEE testing. Given a memory that has 68 operating modes, when a SEU occurs that changes the mode, just how do you determine what's going on? Laser and microbeam tests can help, but not easily for modern packaged devices. Expanding this approach to other more complex devices such as ADCs or processors as well as analog devices should be considered. The recommendation is to use the existing text standards as the starting point. Just make your own checklist for the device/technology/issues being considered. At HEART 2007, we presented some of the burgeoning challenges associated with single event effect(SEE) testing of modern commercial memories: a) Package, device complexity, test fixture, and data analysis issues were discussed; b) "Complete" SEE Characterization would take 15 years; c) Qualification test costs have a greater than 4 times increase over the last decade. In this talk, we continue to explore the roles of technology with an emphasis on the existing SEE Test Procedures and some of the concerns related to modern devices. The primary objective of the briefing is to provide some overarching guidance concerning the many considerations involved in the formulation of a SEE test plan provided in a " Checklist" format.we note that there is no such thing as a complete check list and that the best approach is to develop a flexible test plan that takes into account the device type and functions, the device technology, circuit and package design, and, of course, test facility and beam characteristics.

Advanced Space Suit PLSS 2.0 Cooling Loop Evaluation and PLSS 2.5 Recommendations

NASA Technical Reports Server (NTRS)

Steele, John; Quinn, Greg; Campbell, Colin; Makinen, Janice; Watts, Carly; Westheimer, David

2016-01-01

From 2012 to 2015 The NASA/JSC AdvSS (Advanced Space Suit) PLSS (Portable Life Support Subsystem) team, with support from UTC Aerospace Systems, performed the build-up, packaging and testing of PLSS 2.0. One aspect of that testing was the evaluation of the long-term health of the water cooling circuit and the interfacing components. Periodic and end-of-test water, residue and hardware analyses provided valuable information on the status of the water cooling circuit, and the approaches that would be necessary to enhance water cooling circuit health in the future. The evaluated data has been consolidated, interpreted and woven into an action plan for the maintenance of water cooling circuit health for the planned FY (fiscal year) 2016 through FY 2018 PLSS 2.5 testing. This paper provides an overview of the PLSS 2.0 water cooling circuit findings and the associated steps to be taken in that regard for the PLSS 2.5.

Advanced Space Suit PLSS 2.0 Cooling Loop Evaluation and PLSS 2.5 Recommendations

NASA Technical Reports Server (NTRS)

Steele, John; Quinn, Greg; Campbell, Colin; Makinen, Janice; Watts, Carly; Westheimer, Dave

2016-01-01

From 2012 to 2015 The NASA/JSC AdvSS (Advanced Space Suit) PLSS (Primary Life Support Subsystem) team, with support from UTC Aerospace Systems, performed the build-up, packaging and testing of PLSS 2.0. A key aspect of that testing was the evaluation of the long-term health of the water cooling circuit and the interfacing components. Intermittent and end-of-test water, residue and hardware analyses provided valuable information on the status of the water cooling circuit, and the approaches that would be necessary to enhance water cooling circuit health in the future. The evaluated data has been consolidated, interpreted and woven into an action plan for the maintenance of water cooling circuit health for the planned FY (fiscal year) 2016 through FY 2018 PLSS 2.5 testing. This paper provides an overview of the PLSS 2.0 water cooling circuit findings and the associated steps to be taken in that regard for the PLSS 2.5 testing.

A Parallel Genetic Algorithm for Automated Electronic Circuit Design

NASA Technical Reports Server (NTRS)

Lohn, Jason D.; Colombano, Silvano P.; Haith, Gary L.; Stassinopoulos, Dimitris; Norvig, Peter (Technical Monitor)

2000-01-01

We describe a parallel genetic algorithm (GA) that automatically generates circuit designs using evolutionary search. A circuit-construction programming language is introduced and we show how evolution can generate practical analog circuit designs. Our system allows circuit size (number of devices), circuit topology, and device values to be evolved. We present experimental results as applied to analog filter and amplifier design tasks.

Simple Electronic Analog of a Josephson Junction.

ERIC Educational Resources Information Center

Henry, R. W.; And Others

1981-01-01

Demonstrates that an electronic Josephson junction analog constructed from three integrated circuits plus an external reference oscillator can exhibit many of the circuit phenomena of a real Josephson junction. Includes computer and other applications of the analog. (Author/SK)

Electronic circuit provides accurate sensing and control of dc voltage

NASA Technical Reports Server (NTRS)

Loftus, W. D.

1966-01-01

Electronic circuit used relay coil to sense and control dc voltage. The control relay is driven by a switching transistor that is biased to cutoff for all input up to slightly less than the threshold level.

Fuse protects circuit from voltage and current overloads

NASA Technical Reports Server (NTRS)

Casey, L. O.

1969-01-01

Low-melting resistor connected in series with the load protects the circuit against current overloads. It protects test subjects and patients being monitored by electronic instrumentation from inadvertant overloads of current, and sensitive electronic equipment against high-voltage damage.

Automatic cross-sectioning and monitoring system locates defects in electronic devices

NASA Technical Reports Server (NTRS)

Jacobs, G.; Slaughter, B.

1971-01-01

System consists of motorized grinding and lapping apparatus, sample holder, and electronic control circuit. Low power microscope examines device to pinpoint location of circuit defect, and monitor displays output signal when defect is located exactly.

Cooled electrical terminal assembly and device incorporating same

DOEpatents

Beihoff, Bruce C.; Radosevich, Lawrence D.; Phillips, Mark G.; Kehl, Dennis L.; Kaishian, Steven C.; Kannenberg, Daniel G.

2006-08-22

A terminal structure provides interfacing with power electronics circuitry and external circuitry. The thermal support may receive one or more power electronic circuits. The support may aid in removing heat from the terminal structure and the circuits through fluid circulating through the support. The support may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.