Radiation-hardened-by-design clocking circuits in 0.13-μm CMOS technology

NASA Astrophysics Data System (ADS)

You, Y.; Huang, D.; Chen, J.; Gong, D.; Liu, T.; Ye, J.

2014-01-01

We present a single-event-hardened phase-locked loop for frequency generation applications and a digital delay-locked loop for DDR2 memory interface applications. The PLL covers a 12.5 MHz to 500 MHz frequency range with an RMS Jitter (RJ) of 4.70-pS. The DLL operates at 267 MHz and has a phase resolution of 60-pS. Designed in 0.13-μm CMOS technology, the PLL and the DLL are hardened against SEE for charge injection of 250 fC. The PLL and the DLL consume 17 mW and 22 mW of power under a 1.5 V power supply, respectively.

A New Built-in Self Test Scheme for Phase-Locked Loops Using Internal Digital Signals

NASA Astrophysics Data System (ADS)

Kim, Youbean; Kim, Kicheol; Kim, Incheol; Kang, Sungho

Testing PLLs (phase-locked loops) is becoming an important issue that affects both time-to-market and production cost of electronic systems. Though a PLL is the most common mixed-signal building block, it is very difficult to test due to internal analog blocks and signals. In this paper, we propose a new PLL BIST (built-in self test) using the distorted frequency detector that uses only internal digital signals. The proposed BIST does not need to load any analog nodes of the PLL. Therefore, it provides an efficient defect-oriented structural test scheme, reduced area overhead, and improved test quality compared with previous approaches.

Steady-state phase error for a phase-locked loop subjected to periodic Doppler inputs

NASA Technical Reports Server (NTRS)

Chen, C.-C.; Win, M. Z.

1991-01-01

The performance of a carrier phase locked loop (PLL) driven by a periodic Doppler input is studied. By expanding the Doppler input into a Fourier series and applying the linearized PLL approximations, it is easy to show that, for periodic frequency disturbances, the resulting steady state phase error is also periodic. Compared to the method of expanding frequency excursion into a power series, the Fourier expansion method can be used to predict the maximum phase error excursion for a periodic Doppler input. For systems with a large Doppler rate fluctuation, such as an optical transponder aboard an Earth orbiting spacecraft, the method can be applied to test whether a lower order tracking loop can provide satisfactory tracking and thereby save the effect of a higher order loop design.

Phase-locked-loop interferometry applied to aspheric testing with a computer-stored compensator.

PubMed

Servin, M; Malacara, D; Rodriguez-Vera, R

1994-05-01

A recently developed technique for continuous-phase determination of interferograms with a digital phase-locked loop (PLL) is applied to the null testing of aspheres. Although this PLL demodulating scheme is also a synchronous or direct interferometric technique, the separate unwrapping process is not explicitly required. The unwrapping and the phase-detection processes are achieved simultaneously within the PLL. The proposed method uses a computer-generated holographic compensator. The holographic compensator does not need to be printed out by any means; it is calculated and used from the computer. This computer-stored compensator is used as the reference signal to phase demodulate a sample interferogram obtained from the asphere being tested. Consequently the demodulated phase contains information about the wave-front departures from the ideal computer-stored aspheric interferogram. Wave-front differences of ~ 1 λ are handled easily by the proposed PLL scheme. The maximum recorded frequency in the template's interferogram as well as in the sampled interferogram are assumed to be below the Nyquist frequency.

Designing Estimator/Predictor Digital Phase-Locked Loops

NASA Technical Reports Server (NTRS)

Statman, J. I.; Hurd, W. J.

1988-01-01

Signal delays in equipment compensated automatically. New approach to design of digital phase-locked loop (DPLL) incorporates concepts from estimation theory and involves decomposition of closed-loop transfer function into estimator and predictor. Estimator provides recursive estimates of phase, frequency, and higher order derivatives of phase with respect to time, while predictor compensates for delay, called "transport lag," caused by PLL equipment and by DPLL computations.

Wide tracking range, auto ranging, low jitter phase lock loop for swept and fixed frequency systems

DOEpatents

Kerner, Thomas M.

2001-01-01

The present invention provides a wide tracking range phase locked loop (PLL) circuit that achieves minimal jitter in a recovered clock signal, regardless of the source of the jitter (i.e. whether it is in the source or the transmission media). The present invention PLL has automatic harmonic lockout detection circuitry via a novel lock and seek control logic in electrical communication with a programmable frequency discriminator and a code balance detector. (The frequency discriminator enables preset of a frequency window of upper and lower frequency limits to derive a programmable range within which signal acquisition is effected. The discriminator works in combination with the code balance detector circuit to minimize the sensitivity of the PLL circuit to random data in the data stream). In addition, the combination of a differential loop integrator with the lock and seek control logic obviates a code preamble and guarantees signal acquisition without harmonic lockup. An adaptive cable equalizer is desirably used in combination with the present invention PLL to recover encoded transmissions containing a clock and/or data. The equalizer automatically adapts to equalize short haul cable lengths of coaxial and twisted pair cables or wires and provides superior jitter performance itself. The combination of the equalizer with the present invention PLL is desirable in that such combination permits the use of short haul wires without significant jitter.

A dynamically reconfigurable multi-functional PLL for SRAM-based FPGA in 65nm CMOS technology

NASA Astrophysics Data System (ADS)

Yang, Mingqian; Chen, Lei; Li, Xuewu; Zhang, Yanlong

2018-04-01

Phase-locked loops (PLL) have been widely utilized in FPGA as an important module for clock management. PLL with dynamic reconfiguration capability is always welcomed in FPGA design as it is able to decrease power consumption and simultaneously improve flexibility. In this paper, a multi-functional PLL with dynamic reconfiguration capability for 65nm SRAM-based FPGA is proposed. Firstly, configurable charge pump and loop filter are utilized to optimize the loop bandwidth. Secondly, the PLL incorporates a VCO with dual control voltages to accelerate the adjustment of oscillation frequency. Thirdly, three configurable dividers are presented for flexible frequency synthesis. Lastly, a configuration block with dynamic reconfiguration function is proposed. Simulation results demonstrate that the proposed multi-functional PLL can output clocks with configurable division ratio, phase shift and duty cycle. The PLL can also be dynamically reconfigured without affecting other parts' running or halting the FPGA device.

High-accuracy resolver-to-digital conversion via phase locked loop based on PID controller

NASA Astrophysics Data System (ADS)

Li, Yaoling; Wu, Zhong

2018-03-01

The problem of resolver-to-digital conversion (RDC) is transformed into the problem of angle tracking control, and a phase locked loop (PLL) method based on PID controller is proposed in this paper. This controller comprises a typical PI controller plus an incomplete differential which can avoid the amplification of higher-frequency noise components by filtering the phase detection error with a low-pass filter. Compared with conventional ones, the proposed PLL method makes the converter a system of type III and thus the conversion accuracy can be improved. Experimental results demonstrate the effectiveness of the proposed method.

Frequency-Domain Channel Estimation and Equalization for Single Carrier Underwater Acoustic Communications

DTIC Science & Technology

2007-01-01

synchronization ; vm(k) white Gaussian noise with average power σ2. If the Doppler shift f m,k is significant, then it causes the received signal ym(k) to be time ...intersymbol interference (ISI) to extend over 20-300 symbols at a data rate of 2-10 kilosymbols per second. Another obstacle is the time -varying Doppler... synchronization that employs a phase-locked loop (PLL) or delay-locked loop (DLL). However, the DFE and PLL/DLL have to interact in a nonlinear fashion

Introduction of a new opto-electrical phase-locked loop in CMOS technology: the PMD-PLL

NASA Astrophysics Data System (ADS)

Ringbeck, Thorsten; Schwarte, Rudolf; Buxbaum, Bernd

1999-12-01

The huge and increasing need of information in the industrial world demands an enormous potential of bandwidth in telecommunication systems. Optical communication provides all participants with the whole spectrum of digital services like videophone, cable TV, video conferencing and online services. Especially fast and low cost opto-electrical receivers are badly needed in order to expand fiber networks to every home (FTTH--fiber to the home or FTTD--fiber to the desk, respectively). This paper proposes a new receiver structure which is designed to receiver optical data which are encoded by code division multiple access techniques (CDMA). For data recovery in such CDMA networks phase locked loops (PLL) are needed, which synchronize the local oscillator with the incoming clock. In optical code division multiple access networks these PLLs could be realized either with an electrical PLL after opto-electrical converting or directly in the optical path with a pure optical PLL.

Phase-locked loops and their application

NASA Technical Reports Server (NTRS)

Lindsey, W. C. (Editor); Simon, M. K.

1978-01-01

A collection of papers is presented on the characteristics and capabilities of phase-locked loops (PLLs), along with some applications of interest. The discussion covers basic theory (linear and nonlinear); acquisition; threshold; stability; frequency demodulation and detection; tracking; cycle slipping and loss of lock; phase-locked oscillators; operation and performance in the presence of noise; AGC, AFC, and APC circuits and systems; digital PLL; and applications and miscellaneous. With the rapid development of IC technology, PLLs are expected to be used widely in consumer electronics.

Digital correlation detector for low-cost Omega navigation

NASA Technical Reports Server (NTRS)

Chamberlin, K. A.

1976-01-01

Techniques to lower the cost of using the Omega global navigation network with phase-locked loops (PLL) were developed. The technique that was accepted as being "optimal" is called the memory-aided phase-locked loop (MAPLL) since it allows operation on all eight Omega time slots with one PLL through the implementation of a random access memory. The receiver front-end and the signals that it transmits to the PLL were first described. A brief statistical analysis of these signals was then made to allow a rough comparison between the front-end presented in this work and a commercially available front-end to be made. The hardware and theory of application of the MAPLL were described, ending with an analysis of data taken with the MAPLL. Some conclusions and recommendations were also given.

A single chip 2 Gbit/s clock recovery subsystem for digital communications

NASA Astrophysics Data System (ADS)

Hickling, Ronald M.

A self-contained clock recovery/data resynchronizer phase locked loop (PLL) for use in microwave and fiber optic digital communications has been fabricated using GaAs integrated circuit technology. The IC contains the analog and digital components for the PLL: an edge-triggered phase detector based on a 1.2 GHz phase/frequency comparator, an op amp for creating the loop filter, and a VCO based on a differential source-coupled pair amplifier.

Laser Metrology Heterodyne Phase-Locked Loop

NASA Technical Reports Server (NTRS)

Loya, Frank; Halverson, Peter

2009-01-01

A method reduces sensitivity to noise in a signal from a laser heterodyne interferometer. The phase-locked loop (PLL) removes glitches that occur in a zero-crossing detector s output [that can happen if the signal-to-noise ratio (SNR) of the heterodyne signal is low] by the use of an internal oscillator that produces a square-wave signal at a frequency that is inherently close to the heterodyne frequency. It also contains phase-locking circuits that lock the phase of the oscillator to the output of the zero-crossing detector. Because the PLL output is an oscillator signal, it is glitch-free. This enables the ability to make accurate phase measurements in spite of low SNR, creates an immunity to phase error caused by shifts in the heterodyne frequency (i.e. if the target moves causing Doppler shift), and maintains a valid phase even when the signal drops out for brief periods of time, such as when the laser is blocked by a stray object.

Hopf bifurcation and chaos in a third-order phase-locked loop

NASA Astrophysics Data System (ADS)

Piqueira, José Roberto C.

2017-01-01

Phase-locked loops (PLLs) are devices able to recover time signals in several engineering applications. The literature regarding their dynamical behavior is vast, specifically considering that the process of synchronization between the input signal, coming from a remote source, and the PLL local oscillation is robust. For high-frequency applications it is usual to increase the PLL order by increasing the order of the internal filter, for guarantying good transient responses; however local parameter variations imply structural instability, thus provoking a Hopf bifurcation and a route to chaos for the phase error. Here, one usual architecture for a third-order PLL is studied and a range of permitted parameters is derived, providing a rule of thumb for designers. Out of this range, a Hopf bifurcation appears and, by increasing parameters, the periodic solution originated by the Hopf bifurcation degenerates into a chaotic attractor, therefore, preventing synchronization.

Phase error statistics of a phase-locked loop synchronized direct detection optical PPM communication system

NASA Technical Reports Server (NTRS)

Natarajan, Suresh; Gardner, C. S.

1987-01-01

Receiver timing synchronization of an optical Pulse-Position Modulation (PPM) communication system can be achieved using a phased-locked loop (PLL), provided the photodetector output is suitably processed. The magnitude of the PLL phase error is a good indicator of the timing error at the receiver decoder. The statistics of the phase error are investigated while varying several key system parameters such as PPM order, signal and background strengths, and PPL bandwidth. A practical optical communication system utilizing a laser diode transmitter and an avalanche photodiode in the receiver is described, and the sampled phase error data are presented. A linear regression analysis is applied to the data to obtain estimates of the relational constants involving the phase error variance and incident signal power.

Response of an all digital phase-locked loop

NASA Technical Reports Server (NTRS)

Garodnick, J.; Greco, J.; Schilling, D. L.

1974-01-01

An all digital phase-locked loop (DPLL) is designed, analyzed, and tested. Three specific configurations are considered, generating first, second, and third order DPLL's; and it is found, using a computer simulation of a noise spike, and verified experimentally, that of these configurations the second-order system is optimum from the standpoint of threshold extension. This substantiates results obtained for analog PLL's.

A novel photonic oscillator

NASA Technical Reports Server (NTRS)

Yao, X. S.; Maleki, L.

1995-01-01

We report a novel oscillator for photonic RF systems. This oscillator is capable of generating high-frequency signals up to 70 GHz in both electrical and optical domains and is a special voltage-controlled oscillator with an optical output port. It can be used to make a phase-locked loop (PLL) and perform all functions that a PLL is capable of for photonic systems. It can be synchronized to a reference source by means of optical injection locking, electrical injection locking, and PLL. It can also be self-phase locked and self-injection locked to generate a high-stability photonic RF reference. Its applications include high-frequency reference regeneration and distribution, high-gain frequency multiplication, comb-frequecy and square-wave generation, carrier recovery, and clock recovery. We anticipate that such photonic voltage-controlled oscillators (VCOs) will be as important to photonic RF systems as electrical VCOs are to electrical RF systems.

A 4 GHz phase locked loop design in 65 nm CMOS for the Jiangmen Underground Neutrino Observatory detector

NASA Astrophysics Data System (ADS)

Parkalian, N.; Robens, M.; Grewing, C.; Christ, V.; Kruth, A.; Liebau, D.; Muralidharan, P.; Nielinger, D.; Roth, C.; Yegin, U.; Zambanini, A.; van Waasen, S.

2018-02-01

This paper presents a 4 GHz phase locked loop (PLL), which is implemented in a 65 nm standard CMOS process to provide low noise and high frequency sampling clocks for readout electronics to be used in the Jiangmen Underground Neutrino Observatory (JUNO) experiment. Based on the application requirements the target of the design is to find the best compromise between power consumption, area and phase noise for a highly reliable topology. The design implements a novel method for the charge pump that suppresses current mismatch when the PLL is locked. This reduces static phase offset at the inputs of the phase-frequency detector (PFD) that otherwise would introduce spurs at the PLL output. In addition, a technique of amplitude regulation for the voltage controlled oscillator (VCO) is presented to provide low noise and reliable operation. The combination of thin and thick oxide varactor transistors ensures optimum tuning range and linearity over process as well as temperature changes for the VCO without additional calibration steps. The current mismatch at the output of the charge pump for the control voltage at about half the 1 V supply voltage is below 0.3% and static phase offset down to 0.25% is reached. The total PLL consumes 18.5 mW power at 1.8 V supply for the VCO and 1 V supply for the other parts.

Fractional-N phase-locked loop for split and direct automatic frequency control in A-GPS

NASA Astrophysics Data System (ADS)

Park, Chester Sungchung; Park, Sungkyung

2018-07-01

A low-power mixed-signal phase-locked loop (PLL) is modelled and designed for the DigRF interface between the RF chip and the modem chip. An assisted-GPS or A-GPS multi-standard system includes the DigRF interface and uses the split automatic frequency control (AFC) technique. The PLL circuitry uses the direct AFC technique and is based on the fractional-N architecture using a digital delta-sigma modulator along with a digital counter, fulfilling simple ultra-high-resolution AFC with robust digital circuitry and its timing. Relative to the output frequency, the measured AFC resolution or accuracy is <5 parts per billion (ppb) or on the order of a Hertz. The cycle-to-cycle rms jitter is <6 ps and the typical settling time is <30 μs. A spur reduction technique is adopted and implemented as well, demonstrating spur reduction without employing dithering. The proposed PLL includes a low-leakage phase-frequency detector, a low-drop-out regulator, power-on-reset circuitry and precharge circuitry. The PLL is implemented in a 90-nm CMOS process technology with 1.2 V single supply. The overall PLL draws about 1.1 mA from the supply.

Phase-locked loop design with fast-digital-calibration charge pump

NASA Astrophysics Data System (ADS)

Wang, San-Fu; Hwang, Tsuen-Shiau; Wang, Jhen-Ji

2016-02-01

A fast-digital-calibration technique is proposed for reducing current mismatch in the charge pump (CP) of a phase-locked loop (PLL). The current mismatch in the CP generates fluctuations, which is transferred to the input of voltage-controlled oscillator (VCO). Therefore, the current mismatch increases the reference spur in the PLL. Improving current match of CP will reduce the reference spur and decrease the static phase offset of PLLs. Moreover, the settling time, ripple and power consumption of the PLL are also improved by the proposed technique. This study evaluated a 2.27-2.88 GHz frequency synthesiser fabricated in TSMC 0.18 μm CMOS 1.8 V process. The tuning range of proposed VCO is about 26%. By using the fast-digital-calibration technique, current mismatch is reduced to lower than 0.97%, and the operation range of the proposed CP is between 0.2 and 1.6 V. The proposed PLL has a total power consumption of 22.57 mW and a settling time of 10 μs or less.

Synthesis and evaluation of phase detectors for active bit synchronizers

NASA Technical Reports Server (NTRS)

Mcbride, A. L.

1974-01-01

Self-synchronizing digital data communication systems usually use active or phase-locked loop (PLL) bit synchronizers. The three main elements of PLL synchronizers are the phase detector, loop filter, and the voltage controlled oscillator. Of these three elements, phase detector synthesis is the main source of difficulty, particularly when the received signals are demodulated square-wave signals. A phase detector synthesis technique is reviewed that provides a physically realizable design for bit synchronizer phase detectors. The development is based upon nonlinear recursive estimation methods. The phase detector portion of the algorithm is isolated and analyzed.

Phase-locked loop based on nanoelectromechanical resonant-body field effect transistor

NASA Astrophysics Data System (ADS)

Bartsch, S. T.; Rusu, A.; Ionescu, A. M.

2012-10-01

We demonstrate the room-temperature operation of a silicon nanoelectromechanical resonant-body field effect transistor (RB-FET) embedded into phase-locked loop (PLL). The very-high frequency resonator uses on-chip electrostatic actuation and transistor-based displacement detection. The heterodyne frequency down-conversion based on resistive FET mixing provides a loop feedback signal with high signal-to-noise ratio. We identify key parameters for PLL operation, and analyze the performance of the RB-FET at the system level. Used as resonant mass detector, the experimental frequency stability in the ppm-range translates into sub atto-gram (10-18 g) sensitivity in high vacuum. The feedback and control system are generic and may be extended to other mechanical resonators with transistor properties, such as graphene membranes and carbon nanotubes.

Phase-Locked Loop for Precisely Timed Acoustic Stimulation during Sleep

PubMed Central

Santostasi, Giovanni; Malkani, Roneil; Riedner, Brady; Bellesi, Michele; Tononi, Giulio; Paller, Ken A.; Zee, Phyllis C.

2016-01-01

Background A Brain-Computer Interface could potentially enhance the various benefits of sleep. New Method We describe a strategy for enhancing slow-wave sleep (SWS) by stimulating the sleeping brain with periodic acoustic stimuli that produce resonance in the form of enhanced slow-wave activity in the electroencephalogram (EEG). The system delivers each acoustic stimulus at a particular phase of an electrophysiological rhythm using a Phase-Locked Loop (PLL). Results The PLL is computationally economical and well suited to follow and predict the temporal behavior of the EEG during slow-wave sleep. Comparison with Existing Methods Acoustic stimulation methods may be able to enhance SWS without the risks inherent in electrical stimulation or pharmacological methods. The PLL method differs from other acoustic stimulation methods that are based on detecting a single slow wave rather than modeling slow-wave activity over an extended period of time. Conclusions By providing real-time estimates of the phase of ongoing EEG oscillations, the PLL can rapidly adjust to physiological changes, thus opening up new possibilities to study brain dynamics during sleep. Future application of these methods hold promise for enhancing sleep quality and associated daytime behavior and improving physiologic function. PMID:26617321

New spatial diversity equalizer based on PLL

NASA Astrophysics Data System (ADS)

Rao, Wei

2011-10-01

A new Spatial Diversity Equalizer (SDE) based on phase-locked loop (PLL) is proposed to overcome the inter-symbol interference (ISI) and phase rotations simultaneously in the digital communication system. The proposed SDE consists of equal gain combining technique based on a famous blind equalization algorithm constant modulus algorithm (CMA) and a PLL. Compared with conventional SDE, the proposed SDE has not only faster convergence rate and lower residual error but also the ability to recover carrier phase rotation. The efficiency of the method is proved by computer simulation.

A 65nm CMOS low-power MedRadio-band integer-N cascaded phase-locked loop for implantable medical systems.

PubMed

Wang, Yi-Xiao; Chen, Wei-Ming; Wu, Chung-Yu

2014-01-01

This paper presents a low-power MedRadio-band integer-N phase-locked Loop (PLL) system which is composed of two charge-pump PLLs cascade connected. The PLL provides the operation clock and local carrier signals for an implantable medical electronic system. In addition, to avoid the off-chip crystal oscillator, the 13.56 MHz Industrial, Scientific and Medical (ISM) band signal from the wireless power transmission system is adopted as the input reference signal for the PLL. Ring-based voltage controlled oscillators (VCOs) with current control units are adopted to reduce chip area and power dissipation. The proposed cascaded PLL system is designed and implemented in TSMC 65-nm CMOS technology. The measured jitter for 216.96 MHz signal is 12.23 ps and the phase noise is -65.9 dBc/Hz at 100 kHz frequency offset under 402.926 MHz carrier frequency. The measured power dissipations are 66 μW in the first PLL and 195 μW in the whole system under 1-V supply voltage. The chip area is 0.1088 mm(2) and no off-chip component is required which is suitable for the integration of the implantable medical electronic system.

An estimator-predictor approach to PLL loop filter design

NASA Technical Reports Server (NTRS)

Statman, Joseph I.; Hurd, William J.

1990-01-01

The design of digital phase locked loops (DPLL) using estimation theory concepts in the selection of a loop filter is presented. The key concept, that the DPLL closed-loop transfer function is decomposed into an estimator and a predictor, is discussed. The estimator provides recursive estimates of phase, frequency, and higher-order derivatives, and the predictor compensates for the transport lag inherent in the loop.

An Adaptive INS-Aided PLL Tracking Method for GNSS Receivers in Harsh Environments.

PubMed

Cong, Li; Li, Xin; Jin, Tian; Yue, Song; Xue, Rui

2016-01-23

As the weak link in global navigation satellite system (GNSS) signal processing, the phase-locked loop (PLL) is easily influenced with frequent cycle slips and loss of lock as a result of higher vehicle dynamics and lower signal-to-noise ratios. With inertial navigation system (INS) aid, PLLs' tracking performance can be improved. However, for harsh environments with high dynamics and signal attenuation, the traditional INS-aided PLL with fixed loop parameters has some limitations to improve the tracking adaptability. In this paper, an adaptive INS-aided PLL capable of adjusting its noise bandwidth and coherent integration time has been proposed. Through theoretical analysis, the relation between INS-aided PLL phase tracking error and carrier to noise density ratio (C/N₀), vehicle dynamics, aiding information update time, noise bandwidth, and coherent integration time has been built. The relation formulae are used to choose the optimal integration time and bandwidth for a given application under the minimum tracking error criterion. Software and hardware simulation results verify the correctness of the theoretical analysis, and demonstrate that the adaptive tracking method can effectively improve the PLL tracking ability and integrated GNSS/INS navigation performance. For harsh environments, the tracking sensitivity is increased by 3 to 5 dB, velocity errors are decreased by 36% to 50% and position errors are decreased by 6% to 24% when compared with other INS-aided PLL methods.

Study of Interpolated Timing Recovery Phase-Locked Loop with Linearly Constrained Adaptive Prefilter for Higher-Density Optical Disc

NASA Astrophysics Data System (ADS)

Kajiwara, Yoshiyuki; Shiraishi, Junya; Kobayashi, Shoei; Yamagami, Tamotsu

2009-03-01

A digital phase-locked loop (PLL) with a linearly constrained adaptive filter (LCAF) has been studied for higher-linear-density optical discs. LCAF has been implemented before an interpolated timing recovery (ITR) PLL unit in order to improve the quality of phase error calculation by using an adaptively equalized partial response (PR) signal. Coefficient update of an asynchronous sampled adaptive FIR filter with a least-mean-square (LMS) algorithm has been constrained by a projection matrix in order to suppress the phase shift of the tap coefficients of the adaptive filter. We have developed projection matrices that are suitable for Blu-ray disc (BD) drive systems by numerical simulation. Results have shown the properties of the projection matrices. Then, we have designed the read channel system of the ITR PLL with an LCAF model on the FPGA board for experiments. Results have shown that the LCAF improves the tilt margins of 30 gigabytes (GB) recordable BD (BD-R) and 33 GB BD read-only memory (BD-ROM) with a sufficient LMS adaptation stability.

Method to suppress DDFS spurious signals in a frequency-hopping synthesizer with DDFS-driven PLL architecture.

PubMed

Kwon, Kun-Sup; Yoon, Won-Sang

2010-01-01

In this paper we propose a method of removing from synthesizer output spurious signals due to quasi-amplitude modulation and superposition effect in a frequency-hopping synthesizer with direct digital frequency synthesizer (DDFS)-driven phase-locked loop (PLL) architecture, which has the advantages of high frequency resolution, fast transition time, and small size. There are spurious signals that depend on normalized frequency of DDFS. They can be dominant if they occur within the PLL loop bandwidth. We suggest that such signals can be eliminated by purposefully creating frequency errors in the developed synthesizer.

Optoelectrical clock recovery with dispersion monitoring for high speed transmission

NASA Astrophysics Data System (ADS)

Wen, He; Liao, Jinxin; Zheng, Xiaoping; Zhang, Hanyi; Guo, Yili

2010-12-01

The proposed clock recovery scheme introduces electrooptical modulation to down convert the clock frequency facilitating succeeding narrow band filtering by a phase locked loop (PLL) with ordinary radio frequency (RF) devices, further, employs a quadrature phase detector in the PLL to provide an indication signal for monitoring residual dispersion. It was demonstrated in a polarization multiplexed 160-Gbit/s optical non-return to zero quadrature phase shift keying (NRZ-QPSK) transmission system.

Analysis of the PLL phase error in presence of simulated ionospheric scintillation events

NASA Astrophysics Data System (ADS)

Forte, B.

2012-01-01

The functioning of standard phase locked loops (PLL), including those used to track radio signals from Global Navigation Satellite Systems (GNSS), is based on a linear approximation which holds in presence of small phase errors. Such an approximation represents a reasonable assumption in most of the propagation channels. However, in presence of a fading channel the phase error may become large, making the linear approximation no longer valid. The PLL is then expected to operate in a non-linear regime. As PLLs are generally designed and expected to operate in their linear regime, whenever the non-linear regime comes into play, they will experience a serious limitation in their capability to track the corresponding signals. The phase error and the performance of a typical PLL embedded into a commercial multiconstellation GNSS receiver were analyzed in presence of simulated ionospheric scintillation. Large phase errors occurred during scintillation-induced signal fluctuations although cycle slips only occurred during the signal re-acquisition after a loss of lock. Losses of lock occurred whenever the signal faded below the minimumC/N0threshold allowed for tracking. The simulations were performed for different signals (GPS L1C/A, GPS L2C, GPS L5 and Galileo L1). L5 and L2C proved to be weaker than L1. It appeared evident that the conditions driving the PLL phase error in the specific case of GPS receivers in presence of scintillation-induced signal perturbations need to be evaluated in terms of the combination of the minimumC/N0 tracking threshold, lock detector thresholds, possible cycle slips in the tracking PLL and accuracy of the observables (i.e. the error propagation onto the observables stage).

SEU/SET Tolerant Phase-Locked Loops

NASA Technical Reports Server (NTRS)

Shuler, Robert L., Jr.

2010-01-01

The phase-locked loop (PLL) is an old and widely used circuit for frequency and phase demodulation, carrier and clock recovery, and frequency synthesis [1]. Its implementations range from discrete components to fully integrated circuits and even to firmware or software. Often the PLL is a highly critical component of a system, as for example when it is used to derive the on-chip clock, but as of this writing no definitive single-event upset (SET)/single-event transient (SET) tolerant PLL circuit has been described. This chapter hopes to rectify that situation, at least in regard to PLLs that are used to generate clocks. Older literature on fault-tolerant PLLs deals with detection of a hard failure, which is recovered by replacement, repair, or manual restart of discrete component systems. Several patents exist along these lines (6349391, 6272647, and 7089442). A newer approach is to harden the parts of a PLL system, to one degree or another, such as by using a voltage-based charge pump or a triple modular redundant (TMR) voted voltage-controlled oscillator (VCO). A more comprehensive approach is to harden by triplication and voting (TMR) all the digital pieces (primarily the divider) of a frequency synthesis PLL, but this still leaves room for errors in the VCO and the loop filter. Instead of hardening or voting pieces of a system, such as a frequency synthesis system (i.e., clock multiplier), we will show how the entire system can be voted. There are two main ways of doing this, each with advantages and drawbacks. We will show how each has advantages in certain areas, depending on the lock acquisition and tracking characteristics of the PLL. Because of this dependency on PLL characteristics, we will briefly revisit the theory of PLLs. But first we will describe the characteristics of voters and their correct application, as some literature does not follow the voting procedure that guarantees elimination of errors. Additionally, we will find that voting clocks is a bit trickier than voting data where an infallible clock is assumed. It is our job here to produce (or recover) that assumed infallible clock!

A hybrid analog-digital phase-locked loop for frequency mode non-contact scanning probe microscopy.

PubMed

Mehta, M M; Chandrasekhar, V

2014-01-01

Non-contact scanning probe microscopy (SPM) has developed into a powerful technique to image many different properties of samples. The conventional method involves monitoring the amplitude, phase, or frequency of a cantilever oscillating at or near its resonant frequency as it is scanned across the surface of a sample. For high Q factor cantilevers, monitoring the resonant frequency is the preferred method in order to obtain reasonable scan times. This can be done by using a phase-locked-loop (PLL). PLLs can be obtained as commercial integrated circuits, but these do not have the frequency resolution required for SPM. To increase the resolution, all-digital PLLs requiring sophisticated digital signal processors or field programmable gate arrays have also been implemented. We describe here a hybrid analog/digital PLL where most of the components are implemented using discrete analog integrated circuits, but the frequency resolution is provided by a direct digital synthesis chip controlled by a simple peripheral interface controller (PIC) microcontroller. The PLL has excellent frequency resolution and noise, and can be controlled and read by a computer via a universal serial bus connection.

A hybrid analog-digital phase-locked loop for frequency mode non-contact scanning probe microscopy

NASA Astrophysics Data System (ADS)

Mehta, M. M.; Chandrasekhar, V.

2014-01-01

Non-contact scanning probe microscopy (SPM) has developed into a powerful technique to image many different properties of samples. The conventional method involves monitoring the amplitude, phase, or frequency of a cantilever oscillating at or near its resonant frequency as it is scanned across the surface of a sample. For high Q factor cantilevers, monitoring the resonant frequency is the preferred method in order to obtain reasonable scan times. This can be done by using a phase-locked-loop (PLL). PLLs can be obtained as commercial integrated circuits, but these do not have the frequency resolution required for SPM. To increase the resolution, all-digital PLLs requiring sophisticated digital signal processors or field programmable gate arrays have also been implemented. We describe here a hybrid analog/digital PLL where most of the components are implemented using discrete analog integrated circuits, but the frequency resolution is provided by a direct digital synthesis chip controlled by a simple peripheral interface controller (PIC) microcontroller. The PLL has excellent frequency resolution and noise, and can be controlled and read by a computer via a universal serial bus connection.

Expandable and reconfigurable instrument node arrays

NASA Technical Reports Server (NTRS)

Hilliard, Lawrence M. (Inventor); Deshpande, Manohar (Inventor)

2012-01-01

An expandable and reconfigurable instrument node includes a feature detection means and a data processing portion in communication with the feature detection means, the data processing portion configured and disposed to process feature information. The instrument node further includes a phase locked loop (PLL) oscillator in communication with the data processing portion, the PLL oscillator configured and disposed to provide PLL information to the processing portion. The instrument node further includes a single tone transceiver and a pulse transceiver in communication with the PLL oscillator, the single tone transceiver configured and disposed to transmit or receive a single tone for phase correction of the PLL oscillator and the pulse transceiver configured and disposed to transmit and receive signals for phase correction of the PLL oscillator. The instrument node further includes a global positioning (GPA) receiver in communication with the processing portion, the GPS receiver configured and disposed to establish a global position of the instrument node.

High-speed clock recovery with phase-locked-loop-based on LiNbO3 modulators

NASA Astrophysics Data System (ADS)

Zhu, Guanghao; Chen, Hongmin; Wang, Qiang; Dutta, Niloy K.

2003-08-01

In this paper, we present a scheme for recovering 10 GHz clock from 40 Gb/s and 80 Gb/s time division multiplexed (TDM) return to zero (RZ) data stream. The proposed clock recovery is successfully demonstrated using an electrical phase locked loop (PLL). The jitter of the recovered clock is estimated to be around 50 fs. The key part in the proposed clock recovery circuit is a LiNbO3 Mach-Zehnder modulator which is shown to be highly effective in optical to electrical down conversion.

Optimal space communications techniques. [using digital and phase locked systems for signal processing

NASA Technical Reports Server (NTRS)

Schilling, D. L.

1974-01-01

Digital multiplication of two waveforms using delta modulation (DM) is discussed. It is shown that while conventional multiplication of two N bit words requires N2 complexity, multiplication using DM requires complexity which increases linearly with N. Bounds on the signal-to-quantization noise ratio (SNR) resulting from this multiplication are determined and compared with the SNR obtained using standard multiplication techniques. The phase locked loop (PLL) system, consisting of a phase detector, voltage controlled oscillator, and a linear loop filter, is discussed in terms of its design and system advantages. Areas requiring further research are identified.

A low jitter PLL clock used for phase change memory

NASA Astrophysics Data System (ADS)

Xiao, Hong; Houpeng, Chen; Zhitang, Song; Daolin, Cai; Xi, Li

2013-02-01

A fully integrated low-jitter, precise frequency CMOS phase-locked loop (PLL) clock for the phase change memory (PCM) drive circuit is presented. The design consists of a dynamic dual-reset phase frequency detector (PFD) with high frequency acquisition, a novel low jitter charge pump, a CMOS ring oscillator based voltage-controlled oscillator (VCO), a 2nd order passive loop filter, and a digital frequency divider. The design is fabricated in 0.35 μm CMOS technology and consumes 20 mW from a supply voltage of 5 V. In terms of the PCM's program operation requirement, the output frequency range is from 1 to 140 MHz. For the 140 MHz output frequency, the circuit features a cycle-to-cycle jitter of 28 ps RMS and 250 ps peak-to-peak.

PLL jitter reduction by utilizing a ferroelectric capacitor as a VCO timing element.

PubMed

Pauls, Greg; Kalkur, Thottam S

2007-06-01

Ferroelectric capacitors have steadily been integrated into semiconductor processes due to their potential as storage elements within memory devices. Polarization reversal within ferroelectric capacitors creates a high nonlinear dielectric constant along with a hysteresis profile. Due to these attributes, a phase-locked loop (PLL), when based on a ferroelectric capacitor, has the advantage of reduced cycle-to-cycle jitter. PLLs based on ferroelectric capacitors represent a new research area for reduction of oscillator jitter.

Polynomial Method for PLL Controller Optimization†

PubMed Central

Wang, Ta-Chung; Lall, Sanjay; Chiou, Tsung-Yu

2011-01-01

The Phase-Locked Loop (PLL) is a key component of modern electronic communication and control systems. PLL is designed to extract signals from transmission channels. It plays an important role in systems where it is required to estimate the phase of a received signal, such as carrier tracking from global positioning system satellites. In order to robustly provide centimeter-level accuracy, it is crucial for the PLL to estimate the instantaneous phase of an incoming signal which is usually buried in random noise or some type of interference. This paper presents an approach that utilizes the recent development in the semi-definite programming and sum-of-squares field. A Lyapunov function will be searched as the certificate of the pull-in range of the PLL system. Moreover, a polynomial design procedure is proposed to further refine the controller parameters for system response away from the equilibrium point. Several simulation results as well as an experiment result are provided to show the effectiveness of this approach. PMID:22163973

GPS/IGS Design Analysis Report. Volume 1

DTIC Science & Technology

1982-11-15

PLL Phase Lock Loop FMPCB Parts, Hateriala, and Processes Control Board PPPL Program Preferred Parts List P14 Pseudo-Rando* Noise PSI Peculiar Support...program preferred ?arts list ( PPPL ). Where ?PPL parts were not obtainable, screening, burn-in, and other tes. were imposed on those parts to assure

A monolithic K-band phase-locked loop for microwave radar application

NASA Astrophysics Data System (ADS)

Zhou, Guangyao; Ma, Shunli; Li, Ning; Ye, Fan; Ren, Junyan

2017-02-01

A monolithic K-band phase-locked loop (PLL) for microwave radar application is proposed and implemented in this paper. By eliminating the tail transistor and using optimized high-Q LC-tank, the proposed voltage-controlled oscillator (VCO) achieves a tuning range of 18.4 to 23.3 GHz and reduced phase noise. Two cascaded current-mode logic (CML) divide-by-two frequency prescalers are implemented to bridge the frequency gap, in which inductor peaking technique is used in the first stage to further boost allowable input frequency. Six-stage TSPC divider chain is used to provide programmable division ratio from 64 to 127, and a second-order passive loop filter with 825 kHz bandwidth is also integrated on-chip to minimize required external components. The proposed PLL needs only approximately 18.2 μs settling time, and achieves a wide tuning range from 18.4 to 23.3 GHz, with a typical output power of ‑0.84 dBm and phase noise of ‑91.92 dBc/Hz @ 1 MHz. The chip is implemented in TSMC 65 nm CMOS process, and occupies an area of 0.56 mm2 without pads under a 1.2 V single voltage supply. Project supported by the National High-Tech Research and Development Program of China (No. 2013AA014101).

Remotely manageable system for stabilizing femtosecond lasers

NASA Astrophysics Data System (ADS)

Cizek, Martin; Hucl, Vaclav; Smid, Radek; Mikel, Bretislav; Lazar, Josef; Cip, Ondrej

2014-05-01

In the field of precise measurement of optical frequencies, laser spectroscopy and interferometric distance surveying the optical frequency synthesizers (femtosecond combs) are used as optical frequency references. They generate thousands of narrow-linewidth coherent optical frequencies at the same time. The spacing of generated components equals to the repetition frequency of femtosecond pulses of the laser. The position of the comb spectrum has a frequency offset that is derived from carrier to envelope frequency difference. The repetition frequency and mentioned frequency offset belong to main controlled parameters of the optical frequency comb. If these frequencies are electronically locked an ultrastable frequency standard (i.e. H-maser, Cs- or Rb- clock), its relative stability is transferred to the optical frequency domain. We present a complete digitally controlled signal processing chain for phase-locked loop (PLL) control of the offset frequency. The setup is able to overcome some dropouts caused by the femtosecond laser non-stabilities (temperature drifts, ripple noise and electricity spikes). It is designed as a two-stage control loop, where controlled offset frequency is permanently monitored by digital signal processing. In case of dropouts of PLL, the frequency-locked loop keeps the controlled frequency in the required limits. The presented work gives the possibility of long-time operation of femtosecond combs which is necessary when the optical frequency stability measurement of ultra-stable lasers is required. The detailed description of the modern solution of the PLL with remote management is presented.

High accuracy digital aging monitor based on PLL-VCO circuit

NASA Astrophysics Data System (ADS)

Yuejun, Zhang; Zhidi, Jiang; Pengjun, Wang; Xuelong, Zhang

2015-01-01

As the manufacturing process is scaled down to the nanoscale, the aging phenomenon significantly affects the reliability and lifetime of integrated circuits. Consequently, the precise measurement of digital CMOS aging is a key aspect of nanoscale aging tolerant circuit design. This paper proposes a high accuracy digital aging monitor using phase-locked loop and voltage-controlled oscillator (PLL-VCO) circuit. The proposed monitor eliminates the circuit self-aging effect for the characteristic of PLL, whose frequency has no relationship with circuit aging phenomenon. The PLL-VCO monitor is implemented in TSMC low power 65 nm CMOS technology, and its area occupies 303.28 × 298.94 μm2. After accelerating aging tests, the experimental results show that PLL-VCO monitor improves accuracy about high temperature by 2.4% and high voltage by 18.7%.

Radiation Tolerant, Low Noise Phase Locked Loops in 65 nm CMOS Technology

NASA Astrophysics Data System (ADS)

Prinzie, Jeffrey; Christiansen, Jorgen; Moreira, Paulo; Steyaert, Michiel; Leroux, Paul

2018-04-01

This work presents an introduction to radiation hardened Phase Locked Loops (PLLs) for nuclear and high-energy physics application. An experimental circuit has been fabricated and irradiated with Xrays up to 600 Mrad. Heavy ions with an LET between 3.2 and 69.2 MeV.cm2/mg were used to verify the SEU cross section of the devices. A Two-photon Absorption (TPA) laser facility has been used to provide detailed results on the SEU sensitivity. The presented circuit employs TMR in the digital logic and an asynchronous phase-frequency detector (PFD) is presented. The PLL has a ringand LC-oscillator to be compared experimentally. The circuit has been fabricated in a 65 nm CMOS technology.

Modeling and Simulation of a DG-Integrated Intelligent Microgrid

DTIC Science & Technology

2010-02-01

17. The I-V curve from the manufacturer for BP-4175 175W PV module...........................32   Fig. 18. Wind turbine model...33   Fig. 19. Electrical outputs of wind turbine... PMSG : Permanent Magnet Synchronous Generator PLL : Phase Lock Loop PV : Photovoltaic PWM : Pulse Width Modulation TOU : Time of Use VTES

Digital Doppler measurement with spacecraft

NASA Technical Reports Server (NTRS)

Kinman, Peter W.; Hinedi, Sami M.; Labelle, Remi C.; Bevan, Roland P.; Del Castillo, Hector M.; Chong, Dwayne C.

1991-01-01

Digital and analog phase-locked loop (PLL) receivers were operated in parallel, each tracking the residual carrier from a spacecraft. The PLL tracked the downlink carrier and measured its instantaneous phase. This information, combined with a knowledge of the uplink carrier and the transponder ratio, permitted the computation of a Doppler observable. In this way, two separate Doppler measurements were obtained for one observation window. The two receivers agreed on the magnitude of the Doppler effect to within 1 mHz. There was less jitter on the data from the digital receiver. This was due to its smaller noise bandwidth. The demonstration and its results are described.

Instantaneous power control of a high speed permanent magnet synchronous generator based on a sliding mode observer and a phase locked loop

NASA Astrophysics Data System (ADS)

Duan, Jiandong; Fan, Shaogui; Wu, Fengjiang; Sun, Li; Wang, Guanglin

2018-06-01

This paper proposes an instantaneous power control method for high speed permanent magnet synchronous generators (PMSG), to realize the decoupled control of active power and reactive power, through vector control based on a sliding mode observer (SMO), and a phase locked loop (PLL). Consequently, the high speed PMSG has a high internal power factor, to ensure efficient operation. Vector control and accurate estimation of the instantaneous power require an accurate estimate of the rotor position. The SMO is able to estimate the back electromotive force (EMF). The rotor position and speed can be obtained using a combination of the PLL technique and the phase compensation method. This method has the advantages of robust operation, and being resistant to noise when estimating the position of the rotor. Using instantaneous power theory, the relationship between the output active power, reactive power, and stator current of the PMSG is deduced, and the power constraint condition is analysed for operation at the unit internal power factor. Finally, the accuracy of the rotor position detection, the instantaneous power detection, and the control methods are verified using simulations and experiments.

A low-noise delta-sigma phase modulator for polar transmitters.

PubMed

Zhou, Bo

2014-01-01

A low-noise phase modulator, using finite-impulse-response (FIR) filtering embedded delta-sigma (ΔΣ) fractional-N phase-locked loop (PLL), is fabricated in 0.18 μ m CMOS for GSM/EDGE polar transmitters. A simplified digital compensation filter with inverse-FIR and -PLL features is proposed to trade off the transmitter noise and linearity. Experimental results show that the presented architecture performs RF phase modulation well with 20 mW power dissipation from 1.6 V supply and achieves the root-mean-square (rms) and peak phase errors of 4° and 8.5°, respectively. The measured and simulated phase noises of -104 dBc/Hz and -120 dBc/Hz at 400-kHz offset from 1.8-GHz carrier frequency are observed, respectively.

Critique of a Hughes shuttle Ku-band data sampler/bit synchronizer

NASA Technical Reports Server (NTRS)

Holmes, J. K.

1980-01-01

An alternative bit synchronizer proposed for shuttle was analyzed in a noise-free environment by considering the basic operation of the loop via timing diagrams and by linearizing the bit synchronizer as an equivalent, continuous, phased-lock loop (PLL). The loop is composed of a high-frequency phase-frequency detector which is capable of detecting both phase and frequency errors and is used to track the clock, and a bit transition detector which attempts to track the transitions of the data bits. It was determined that the basic approach was a good design which, with proper implementation of the accumulator, up/down counter and logic should provide accurate mid-bit sampling with symmetric bits. However, when bit asymmetry occurs, the bit synchronizer can lock up with a large timing error, yet be quasi-stable (timing will not change unless the clock and bit sequence drift). This will result in incorrectly detecting some bits.

Word-Synchronous Optical Sampling of Periodically Repeated OTDM Data Words for True Waveform Visualization

NASA Astrophysics Data System (ADS)

Benkler, Erik; Telle, Harald R.

2007-06-01

An improved phase-locked loop (PLL) for versatile synchronization of a sampling pulse train to an optical data stream is presented. It enables optical sampling of the true waveform of repetitive high bit-rate optical time division multiplexed (OTDM) data words such as pseudorandom bit sequences. Visualization of the true waveform can reveal details, which cause systematic bit errors. Such errors cannot be inferred from eye diagrams and require word-synchronous sampling. The programmable direct-digital-synthesis circuit used in our novel PLL approach allows flexible adaption of virtually any problem-specific synchronization scenario, including those required for waveform sampling, for jitter measurements by slope detection, and for classical eye-diagrams. Phase comparison of the PLL is performed at 10-GHz OTDM base clock rate, leading to a residual synchronization jitter of less than 70 fs.

Small-Signal Dynamic Analysis of LCC-HVDC with STATCOM at the Inverter Busbar

NASA Astrophysics Data System (ADS)

Liu, Dong; Jiang, Wen; Guo, Chunyi; Rehman, Atiq Ur; Zhao, Chengyong

2018-01-01

This paper develops a linearized small-signal dynamic model of a Line-Commutated-Converter based HVDC (LCC-HVDC) system with STATCOM at the inverter busbar, and validates its accuracy by comparing time-domain responses from small-signal model and PSCAD-based simulation results. Considering the potential impact of Phase-Locked-Loop (PLL) parameters on the study system and the close connection of STATCOM and LCC inverter station at AC busbar, this paper investigates the impact of PLL gains and AC voltage control parameters of STATCOM on the system small-signal stability. The studies show that (i) the PLL gain has highly impact on the study system and smaller PLL gains are preferable; (ii) larger values of both the proportional gain and the integral gain of AC voltage controller of STATCOM could result in oscillation/instability of the system.

A closed-loop system for frequency tracking of piezoresistive cantilever sensors

NASA Astrophysics Data System (ADS)

Wasisto, Hutomo Suryo; Zhang, Qing; Merzsch, Stephan; Waag, Andreas; Peiner, Erwin

2013-05-01

A closed loop circuit capable of tracking resonant frequencies for MEMS-based piezoresistive cantilever resonators is developed in this work. The proposed closed-loop system is mainly based on a phase locked loop (PLL) circuit. In order to lock onto the resonant frequency of the resonator, an actuation signal generated from a voltage-controlled oscillator (VCO) is locked to the phase of the input reference signal of the cantilever sensor. In addition to the PLL component, an instrumentation amplifier and an active low pass filter (LPF) are connected to the system for gaining the amplitude and reducing the noise of the cantilever output signals. The LPF can transform a rectangular signal into a sinusoidal signal with voltage amplitudes ranging from 5 to 10 V which are sufficient for a piezoactuator input (i.e., maintaining a large output signal of the cantilever sensor). To demonstrate the functionality of the system, a self-sensing silicon cantilever resonator with a built-in piezoresistive Wheatstone bridge is fabricated and integrated with the circuit. A piezoactuator is utilized for actuating the cantilever into resonance. Implementation of this closed loop system is used to track the resonant frequency of a silicon cantilever-based sensor resonating at 9.4 kHz under a cross-sensitivity test of ambient temperature. The changes of the resonant frequency are interpreted using a frequency counter connected to the system. From the experimental results, the temperature sensitivity and coefficient of the employed sensor are 0.3 Hz/°C and 32.8 ppm/°C, respectively. The frequency stability of the system can reach up to 0.08 Hz. The development of this system will enable real-time nanoparticle monitoring systems and provide a miniaturization of the instrumentation modules for cantilever-based nanoparticle detectors.

Vortex spin-torque oscillator stabilized by phase locked loop using integrated circuits

NASA Astrophysics Data System (ADS)

Kreissig, Martin; Lebrun, R.; Protze, F.; Merazzo-Jaimes, K.; Hem, J.; Vila, L.; Ferreira, R.; Cyrille, M.-C.; Ellinger, F.; Cros, V.; Ebels, U.; Bortolotti, P.

2017-05-01

Spin-torque nano-oscillators (STO) are candidates for the next technological implementation of spintronic devices in commercial electronic systems. For use in microwave applications, improving the noise figures by efficient control of their phase dynamics is a mandatory requirement. In order to achieve this, we developed a compact phase locked loop (PLL) based on custom integrated circuits (ICs) and demonstrate that it represents an efficient way to reduce the phase noise level of a vortex based STO. The advantage of our approach to phase stabilize STOs is that our compact system is highly reconfigurable e.g. in terms of the frequency divider ratio N, RF gain and loop gain. This makes it robust against device to device variations and at the same time compatible with a large range of STOs. Moreover, by taking advantage of the natural highly non-isochronous nature of the STO, the STO frequency can be easily controlled by e.g. changing the divider ratio N.

NASA GSFC Report on CCSDS Recommendations 2.1.8A B Minimum Earth Station Transmitter Frequency Resolution for Spacecraft Receiver Acquisition

NASA Technical Reports Server (NTRS)

Fong, Wai; Lee, Wing

2017-01-01

In Fall 2016, ESA presented paper SLS-RFM 16-10 documenting a possible issue with the frequency lock-in range specification in Recommendation 2.1.8A of typically 267 to 1067 Hz in considerings (b) from considerings (a) for loop bandwidths [2B(sub LO)] in the range of 200 to 800 Hz with a recommendation of 100 Hz step size for frequency sweeping. The paper calculated the lock-in range to be (+/-)266 to (+/-)1064 rad/s or (+/-)42 to (+/-)168 Hz. Also, Recommendation 2.1.8B has the same issue for considering (a) and (b), i.e. for 2B(sub LO) =10 Hz, a lock-in range of 13 Hz was specified and a recommendation of 5 Hz step size for frequency sweeping. ESA also provided test results from the Rosetta and Exomars transponders. The results were somewhat inconsistent since the tests to verify lock-in and pull-in range did not include acquisition time, which is vital to the definition of these performance measures. This paper will address these test results below. However, we first examine the rationale for Recommendation 2.1.8A/B and its consistency with the theory of 2nd order phase lock loop operations. Our approach is to design a digital phase locked loop (DPLL) from phase locked loop (PLL) requirements. All analysis will be performed with a DPLL.

PLL application research of a broadband MEMS phase detector: Theory, measurement and modeling

NASA Astrophysics Data System (ADS)

Han, Juzheng; Liao, Xiaoping

2017-06-01

This paper evaluates the capability of a broadband MEMS phase detector in the application of phase locked loops (PLLs) through the aspect of theory, measurement and modeling. For the first time, it demonstrates how broadband property and optimized structure are realized through cascaded transmission lines and ANSYS simulations. The broadband MEMS phase detector shows potential in PLL application for its dc voltage output and large power handling ability which is important for munition applications. S-parameters of the power combiner in the MEMS phase detector are measured with S11 better than -15 dB and S23 better than -10 dB over the whole X-band. Compared to our previous works, developed phase detection measurements are performed and focused on signals at larger power levels up to 1 W. Cosine tendencies are revealed between the output voltage and the phase difference for both small and large signals. Simulation approach through equivalent circuit modeling is proposed to study the PLL application of the broadband MEMS phase detector. Synchronization and tracking properties are revealed.

A Low-Noise Delta-Sigma Phase Modulator for Polar Transmitters

PubMed Central

Zhou, Bo

2014-01-01

A low-noise phase modulator, using finite-impulse-response (FIR) filtering embedded delta-sigma (ΔΣ) fractional-N phase-locked loop (PLL), is fabricated in 0.18 μm CMOS for GSM/EDGE polar transmitters. A simplified digital compensation filter with inverse-FIR and -PLL features is proposed to trade off the transmitter noise and linearity. Experimental results show that the presented architecture performs RF phase modulation well with 20 mW power dissipation from 1.6 V supply and achieves the root-mean-square (rms) and peak phase errors of 4° and 8.5°, respectively. The measured and simulated phase noises of −104 dBc/Hz and −120 dBc/Hz at 400-kHz offset from 1.8-GHz carrier frequency are observed, respectively. PMID:24719578

Identification of nonlinear modes using phase-locked-loop experimental continuation and normal form

NASA Astrophysics Data System (ADS)

Denis, V.; Jossic, M.; Giraud-Audine, C.; Chomette, B.; Renault, A.; Thomas, O.

2018-06-01

In this article, we address the model identification of nonlinear vibratory systems, with a specific focus on systems modeled with distributed nonlinearities, such as geometrically nonlinear mechanical structures. The proposed strategy theoretically relies on the concept of nonlinear modes of the underlying conservative unforced system and the use of normal forms. Within this framework, it is shown that without internal resonance, a valid reduced order model for a nonlinear mode is a single Duffing oscillator. We then propose an efficient experimental strategy to measure the backbone curve of a particular nonlinear mode and we use it to identify the free parameters of the reduced order model. The experimental part relies on a Phase-Locked Loop (PLL) and enables a robust and automatic measurement of backbone curves as well as forced responses. It is theoretically and experimentally shown that the PLL is able to stabilize the unstable part of Duffing-like frequency responses, thus enabling its robust experimental measurement. Finally, the whole procedure is tested on three experimental systems: a circular plate, a chinese gong and a piezoelectric cantilever beam. It enable to validate the procedure by comparison to available theoretical models as well as to other experimental identification methods.

Phase locking of a 1.5 Terahertz quantum cascade laser and use as a local oscillator in a heterodyne HEB receiver.

PubMed

Rabanus, D; Graf, U U; Philipp, M; Ricken, O; Stutzki, J; Vowinkel, B; Wiedner, M C; Walther, C; Fischer, M; Faist, J

2009-02-02

We demonstrate for the first time the closure of an electronic phase lock loop for a continuous-wave quantum cascade laser (QCL) at 1.5 THz. The QCL is operated in a closed cycle cryo cooler. We achieved a frequency stability of better than 100 Hz, limited by the resolution bandwidth of the spectrum analyser. The PLL electronics make use of the intermediate frequency (IF) obtained from a hot electron bolometer (HEB) which is downconverted to a PLL IF of 125 MHz. The coarse selection of the longitudinal mode and the fine tuning is achieved via the bias voltage of the QCL. Within a QCL cavity mode, the free-running QCL shows frequency fluctuations of about 5 MHz, which the PLL circuit is able to control via the Stark-shift of the QCL gain material. Temperature dependent tuning is shown to be nonlinear, and of the order of -16 MHz/K. Additionally we have used the QCL as local oscillator (LO) to pump an HEB and perform, again for the first time at 1.5 THz, a heterodyne experiment, and obtain a receiver noise temperature of 1741 K.

Noise performance of frequency modulation Kelvin force microscopy

PubMed Central

Deresmes, Dominique; Mélin, Thierry

2014-01-01

Summary Noise performance of a phase-locked loop (PLL) based frequency modulation Kelvin force microscope (FM-KFM) is assessed. Noise propagation is modeled step by step throughout the setup using both exact closed loop noise gains and an approximation known as “noise gain” from operational amplifier (OpAmp) design that offers the advantage of decoupling the noise performance study from considerations of stability and ideal loop response. The bandwidth can be chosen depending on how much noise is acceptable and it is shown that stability is not an issue up to a limit that will be discussed. With thermal and detector noise as the only sources, both approaches yield PLL frequency noise expressions equal to the theoretical value for self-oscillating circuits and in agreement with measurement, demonstrating that the PLL components neither modify nor contribute noise. Kelvin output noise is then investigated by modeling the surrounding bias feedback loop. A design rule is proposed that allows choosing the AC modulation frequency for optimized sharing of the PLL bandwidth between Kelvin and topography loops. A crossover criterion determines as a function of bandwidth, temperature and probe parameters whether thermal or detector noise is the dominating noise source. Probe merit factors for both cases are then established, suggesting how to tackle noise performance by probe design. Typical merit factors of common probe types are compared. This comprehensive study is an encouraging step toward a more integral performance assessment and a remedy against focusing on single aspects and optimizing around randomly chosen key values. PMID:24455457

The charge pump PLL clock generator designed for the 1.56 ns bin size time-to-digital converter pixel array of the Timepix3 readout ASIC

NASA Astrophysics Data System (ADS)

Fu, Y.; Brezina, C.; Desch, K.; Poikela, T.; Llopart, X.; Campbell, M.; Massimiliano, D.; Gromov, V.; Kluit, R.; van Beauzekom, M.; Zappon, F.; Zivkovic, V.

2014-01-01

Timepix3 is a newly developed pixel readout chip which is expected to be operated in a wide range of gaseous and silicon detectors. It is made of 256 × 256 pixels organized in a square pixel-array with 55 μm pitch. Oscillators running at 640 MHz are distributed across the pixel-array and allow for a highly accurate measurement of the arrival time of a hit. This paper concentrates on a low-jitter phase locked loop (PLL) that is located in the chip periphery. This PLL provides a control voltage which regulates the actual frequency of the individual oscillators, allowing for compensation of process, voltage, and temperature variations.

An estimator-predictor approach to PLL loop filter design

NASA Technical Reports Server (NTRS)

Statman, J. I.; Hurd, W. J.

1986-01-01

An approach to the design of digital phase locked loops (DPLLs), using estimation theory concepts in the selection of a loop filter, is presented. The key concept is that the DPLL closed-loop transfer function is decomposed into an estimator and a predictor. The estimator provides recursive estimates of phase, frequency, and higher order derivatives, while the predictor compensates for the transport lag inherent in the loop. This decomposition results in a straightforward loop filter design procedure, enabling use of techniques from optimal and sub-optimal estimation theory. A design example for a particular choice of estimator is presented, followed by analysis of the associated bandwidth, gain margin, and steady state errors caused by unmodeled dynamics. This approach is under consideration for the design of the Deep Space Network (DSN) Advanced Receiver Carrier DPLL.

Illumination-based synchronization of high-speed vision sensors.

PubMed

Hou, Lei; Kagami, Shingo; Hashimoto, Koichi

2010-01-01

To acquire images of dynamic scenes from multiple points of view simultaneously, the acquisition time of vision sensors should be synchronized. This paper describes an illumination-based synchronization method derived from the phase-locked loop (PLL) algorithm. Incident light to a vision sensor from an intensity-modulated illumination source serves as the reference signal for synchronization. Analog and digital computation within the vision sensor forms a PLL to regulate the output signal, which corresponds to the vision frame timing, to be synchronized with the reference. Simulated and experimental results show that a 1,000 Hz frame rate vision sensor was successfully synchronized with 32 μs jitters.

Quadrature demultiplexing using a degenerate vector parametric amplifier.

PubMed

Lorences-Riesgo, Abel; Liu, Lan; Olsson, Samuel L I; Malik, Rohit; Kumpera, Aleš; Lundström, Carl; Radic, Stojan; Karlsson, Magnus; Andrekson, Peter A

2014-12-01

We report on quadrature demultiplexing of a quadrature phase-shift keying (QPSK) signal into two cross-polarized binary phase-shift keying (BPSK) signals with negligible penalty at bit-error rate (BER) equal to 10(-9). The all-optical quadrature demultiplexing is achieved using a degenerate vector parametric amplifier operating in phase-insensitive mode. We also propose and demonstrate the use of a novel and simple phase-locked loop (PLL) scheme based on detecting the envelope of one of the signals after demultiplexing in order to achieve stable quadrature decomposition.

A low power MICS band phase-locked loop for high resolution retinal prosthesis.

PubMed

Yang, Jiawei; Skafidas, Efstratios

2013-08-01

Ultra low power dissipation is essential in retinal prosthesis and many other biomedical implants. Extensive research has been undertaken in designing low power biomedical transceivers, however to date, most effort has been focused on low frequency inductive links. For higher frequency, more robust and more complex applications, such as Medical Implant Communication Service (MICS) band multichannel transceivers, power consumption remains high. This paper explores the design of micro-power data links at 400 MHz for a high resolution retinal prosthesis. By taking advantage of advanced small geometry CMOS technology and precise transistor-level modeling, we successfully utilized subthreshold FET operation, which has been historically limited to low frequency circuits due to the inadequate transistor operating speed in and near weak inversion; we have implemented a low power MICS transceiver. Particularly, a low power, MICS band multichannel phase-locked loop (PLL) that employs a subthreshold voltage controlled oscillator (VCO) and digital synchronous dividers has been implemented on a 65-nm CMOS. A design methodology is presented in detail with the demonstration of EKV model parameters extraction. This PLL provides 600- mVpp quadrature oscillations and exhibits a phase noise of -102 dBc/Hz at 200-kHz offset, while only consuming 430- μW from a 1-V supply. The VCO has a gain (KVCO) of 12 MHz/V and is designed to operate in the near-weak inversion region and consumes 220- μA DC current. The designed PLL has a core area of 0.54 mm(2). It satisfies all specifications of MICS band operation with the advantage of significant reduction in power which is crucial for high resolution retinal prosthesis.

Free-running waveform characterization using a delay-time tunable laser based delay-line-free electro-optic sampling oscilloscope

NASA Astrophysics Data System (ADS)

Lin, Gong-Ru

2002-12-01

We develop a delay-line-free and frequency traceable electro-optic sampling oscilloscope by use of a digital phase-locked loop phase shifter (PLL-PS) controlled delay-time-tunable gain-switched laser diode (GSLD). The home-made voltage-controllable PLL-PS exhibits a linear transfer function with ultra-wide phase shifting range of ±350° and tuning error of <±5%, which benefits the advantages of frequency tracking to free-running signals with suppressed timing-jitter. The maximum delay-time of PLL-PS controlled GSLD is up to 1.95 periods by changing the controlling voltage ( VREF) from -3.5 to 3.5 V, which corresponds to 3.9 ns at repetition frequency of 500 MHz. The tuning responsivity and resolution are about 0.56 ns/V and 0.15˜0.2 ps, respectively. The maximum delay-time switching bandwidth of 100 Hz is determined under the control of a saw-tooth modulated VREF function. The waveform sampling of microwave PECL signals generated from a free-running digital frequency divider is performed with acceptable measuring deviation.

The Ionospheric Scintillation Effects on the BeiDou Signal Receiver

PubMed Central

He, Zhijun; Zhao, Hongbo; Feng, Wenquan

2016-01-01

Irregularities in the Earth’s ionosphere can make the amplitude and phase of radio signals fluctuate rapidly, which is known as ionospheric scintillation. Severe ionospheric scintillation could affect the performance of the Global Navigation Satellite System (GNSS). Currently, the Multiple Phase Screen (MPS) technique is widely used in solving problems caused by weak and strong scintillations. Considering that Southern China is mainly located in the area where moderate and intense scintillation occur frequently, this paper built a model based on the MPS technique and discussed the scintillation impacts on China’s BeiDou navigation system. By using the BeiDou B1I signal, this paper analyzed the scintillation effects on the receiver, which includes the acquisition and tracking process. For acquisition process, this paper focused on the correlation peak and acquisition probability. For the tracking process, this paper focused on the carrier tracking loop and the code tracking loop. Simulation results show that under high scintillation intensity, the phase fluctuation could be −1.13 ± 0.087 rad to 1.40 ± 0.087 rad and the relative amplitude fluctuation could be −10 dB to 8 dB. As the scintillation intensity increased, the average correlation peak would decrease more than 8%, which could thus degrade acquisition performance. On the other hand, when the signal-to-noise ratio (SNR) is comparatively lower, the influence of strong scintillation on the phase locked loop (PLL) is much higher than that of weak scintillation. As the scintillation becomes more intense, PLL variance could consequently results in an error of more than 2.02 cm in carrier-phase based ranging. In addition, the delay locked loop (DLL) simulation results indicated that the pseudo-range error caused by strong scintillation could be more than 4 m and the consequent impact on positioning accuracy could be more than 6 m. PMID:27834867

Development of high precision digital driver of acoustic-optical frequency shifter for ROG

NASA Astrophysics Data System (ADS)

Zhang, Rong; Kong, Mei; Xu, Yameng

2016-10-01

We develop a high precision digital driver of the acoustic-optical frequency shifter (AOFS) based on the parallel direct digital synthesizer (DDS) technology. We use an atomic clock as the phase-locked loop (PLL) reference clock, and the PLL is realized by a dual digital phase-locked loop. A DDS sampling clock up to 320 MHz with a frequency stability as low as 10-12 Hz is obtained. By constructing the RF signal measurement system, it is measured that the frequency output range of the AOFS-driver is 52-58 MHz, the center frequency of the band-pass filter is 55 MHz, the ripple in the band is less than 1 dB@3MHz, the single channel output power is up to 0.3 W, the frequency stability is 1 ppb (1 hour duration), and the frequency-shift precision is 0.1 Hz. The obtained frequency stability has two orders of improvement compared to that of the analog AOFS-drivers. For the designed binary frequency shift keying (2-FSK) and binary phase shift keying (2-PSK) modulation system, the demodulating frequency of the input TTL synchronous level signal is up to 10 kHz. The designed digital-bus coding/decoding system is compatible with many conventional digital bus protocols. It can interface with the ROG signal detecting software through the integrated drive electronics (IDE) and exchange data with the two DDS frequency-shift channels through the signal detecting software.

Clock recovery PLL with gated PFD for NRZ ON-OFF Modulated Signals in a retinal implant system.

PubMed

Brendler, Christian; Aryan, Naser Pour; Rieger, Viola; Rothermel, Albrecht

2013-01-01

A Clock Recovery Phase Locked Loop with Gated Phase Frequency Detector (GPLL) for NRZ ON-OFF Modulated Signals with low data transmission rates for an inductively powered subretinal implant system is presented. Low data transmission rate leads to a long absence of inductive powering in the system when zeros are transmitted. Consequently there is no possibility to extract any clock in these pauses, thus the digital circuitry can not work any more. Compared to a commonly used PLL for clock extraction, no certain amount of data transitions is needed. This is achieved by having two operating modes. In one mode the GPLL tracks the HF input signal. In the other, the GPLL is an adjustable oscillator oscillating at the last used frequency. The proposed GPLL is fabricated and measured using a 350 nm High Voltage CMOS technology.

Direct Adaptive Rejection of Vortex-Induced Disturbances for a Powered SPAR Platform

NASA Technical Reports Server (NTRS)

VanZwieten, Tannen S.; Balas, Mark J.; VanZwieten, James H.; Driscoll, Frederick R.

2009-01-01

The Rapidly Deployable Stable Platform (RDSP) is a novel vessel designed to be a reconfigurable, stable at-sea platform. It consists of a detachable catamaran and spar, performing missions with the spar extending vertically below the catamaran and hoisting it completely out of the water. Multiple thrusters located along the spar allow it to be actively controlled in this configuration. A controller is presented in this work that uses an adaptive feedback algorithm in conjunction with Direct Adaptive Disturbance Rejection (DADR) to mitigate persistent, vortex-induced disturbances. Given the frequency of a disturbance, the nominal DADR scheme adaptively compensates for its unknown amplitude and phase. This algorithm is extended to adapt to a disturbance frequency that is only coarsely known by including a Phase Locked Loop (PLL). The PLL improves the frequency estimate on-line, allowing the modified controller to reduce vortex-induced motions by more than 95% using achievable thrust inputs.

Frequency-Tracking CW Doppler Radar Solving Small-Angle Approximation and Null Point Issues in Non-Contact Vital Signs Monitoring.

PubMed

Mercuri, Marco; Liu, Yao-Hong; Lorato, Ilde; Torfs, Tom; Bourdoux, Andre; Van Hoof, Chris

2017-06-01

A Doppler radar operating as a Phase-Locked-Loop (PLL) in frequency demodulator configuration is presented and discussed. The proposed radar presents a unique architecture, using a single channel mixer, and allows to detect contactless vital signs parameters while solving the null point issue and without requiring the small angle approximation condition. Spectral analysis, simulations, and experimental results are presented and detailed to demonstrate the feasibility and the operational principle of the proposed radar architecture.

An Integrated Programmable Wide-range PLL for Switching Synchronization in Isolated DC-DC Converters

NASA Astrophysics Data System (ADS)

Fard, Miad

In this thesis, two Phase-Locked-Loop (PLL) based synchronization schemes are introduced and applied to a bi-directional Dual-Active-Bridge (DAB) dc-dc converter with an input voltage up to 80 V switching in the range of 250 kHz to 1 MHz. The two schemes synchronize gating signals across an isolated boundary without the need for an isolator per transistor. The Power Transformer Sensing (PTS) method utilizes the DAB power transformer to indirectly sense switching on the secondary side of the boundary, while the Digital Isolator Sensing (DIS) method utilizes a miniature transformer for synchronization and communication at up to 100 MHz. The PLL is implemented on-chip, and is used to control an external DAB power-stage. This work will lead to lower cost, high-frequency isolated dc-dc converters needed for a wide variety of emerging low power applications where isolator cost is relatively high and there is a demand for the reduction of parts.

S-Band POSIX Device Drivers for RTEMS

NASA Technical Reports Server (NTRS)

Lux, James P.; Lang, Minh; Peters, Kenneth J.; Taylor, Gregory H.

2011-01-01

This is a set of POSIX device driver level abstractions in the RTEMS RTOS (Real-Time Executive for Multiprocessor Systems real-time operating system) to SBand radio hardware devices that have been instantiated in an FPGA (field-programmable gate array). These include A/D (analog-to-digital) sample capture, D/A (digital-to-analog) sample playback, PLL (phase-locked-loop) tuning, and PWM (pulse-width-modulation)-controlled gain. This software interfaces to Sband radio hardware in an attached Xilinx Virtex-2 FPGA. It uses plug-and-play device discovery to map memory to device IDs. Instead of interacting with hardware devices directly, using direct-memory mapped access at the application level, this driver provides an application programming interface (API) offering that easily uses standard POSIX function calls. This simplifies application programming, enables portability, and offers an additional level of protection to the hardware. There are three separate device drivers included in this package: sband_device (ADC capture and DAC playback), pll_device (RF front end PLL tuning), and pwm_device (RF front end AGC control).

a Low-Cost Chirped-Pulse Fourier Transform Microwave Spectrometer for Undergraduate Physical Chemistry Lab

NASA Astrophysics Data System (ADS)

Carroll, Brandon; Finneran, Ian; Blake, Geoffrey

2014-06-01

We present the design and construction of a simple and low-cost waveguide chirped pulse Fourier transform microwave (CP-FTMW) spectrometer suitable for gas-phase rotational spectroscopy experiments in undergraduate physical chemistry labs as well as graduate level research. The spectrometer operates with modest bandwidth, using phased locked loop (PLL) microwave sources and a direct digital synthesis (DDS) chirp source, making it an affordable for undergraduate labs. The performance of the instrument is benchmarked by acquiring the pure rotational spectrum of the J = 1 - 0 transition OCS and its isotopologues from 11-12.5 GHz.

Design and performance analysis of generalised integrator-based controller for grid connected PV system

NASA Astrophysics Data System (ADS)

Saxena, Hemant; Singh, Alka; Rai, J. N.

2018-07-01

This article discusses the design and control of a single-phase grid-connected photovoltaic (PV) system. A 5-kW PV system is designed and integrated at the DC link of an H-bridge voltage source converter (VSC). The control of the VSC and switching logic is modelled using a generalised integrator (GI). The use of GI or its variants such as second-order GI have recently evolved for synchronisation and are being used as phase locked loop (PLL) circuits for grid integration. Design of PLL circuits and the use of transformations such as Park's and Clarke's are much easier in three-phase systems. But obtaining in-phase and quadrature components becomes an important and challenging issue in single-phase systems. This article addresses this issue and discusses an altogether different application of GI for the design of compensator based on the extraction of in-phase and quadrature components. GI is frequently used as a PLL; however, in this article, it is not used for synchronisation purposes. A new controller has been designed for a single-phase grid-connected PV system working as a single-phase active compensator. Extensive simulation results are shown for the working of integrated PV system under different atmospheric and operating conditions during daytime as well as night conditions. Experimental results showing the proposed control approach are presented and discussed for the hardware set-up developed in the laboratory.

Research on Robust Control Strategies for VSC-HVDC

NASA Astrophysics Data System (ADS)

Zhu, Kaicheng; Bao, Hai

2018-01-01

In the control system of VSC-HVDC, the phase locked loop provides phase signals to voltage vector control and trigger pulses to generate the required reference phase. The PLL is a typical second-order system. When the system is in unstable state, it will oscillate, make the trigger angle shift, produce harmonic, and make active power and reactive power coupled. Thus, considering the external disturbances introduced by the PLL in VSC-HVDC control system, the parameter perturbations of the controller and the model uncertainties, a H∞ robust controller of mixed sensitivity optimization problem is designed by using the Hinf function provided by the robust control toolbox. Then, compare it with the proportional integral controller through the MATLAB simulation experiment. By contrast, when the H∞ robust controller is added, active and reactive power of the converter station can track the change of reference values more accurately and quickly, and reduce overshoot. When the step change of active and reactive power occurs, mutual influence is reduced and better independent regulation is achieved.

Experimental Evaluation of an Invasive Medical Instrument Based on a Displacement Measurement System.

PubMed

Fotiadis, Dimitris A; Astaras, Alexandros; Bamidis, Panagiotis D; Papathanasiou, Kostas; Kalfas, Anestis

2015-09-01

This paper presents a novel method for tracking the position of a medical instrument's tip. The system is based on phase locking a high frequency signal transmitted from the medical instrument's tip to a reference signal. Displacement measurement is established having the loop open, in order to get a low frequency voltage representing the medical instrument's movement; therefore, positioning is established by means of conventional measuring techniques. The voltage-controlled oscillator stage of the phase-locked loop (PLL), combined to an appropriate antenna, comprises the associated transmitter located inside the medical instrument tip. All the other low frequency PLL components, low noise amplifier and mixer, are located outside the human body, forming the receiver part of the system. The operating details of the proposed system were coded in Verilog-AMS. Simulation results indicate robust medical instrument tracking in 1-D. Experimental evaluation of the proposed position tracking system is also presented. The experiments described in this paper are based on a transmitter moving opposite a stationary receiver performing either constant velocity or uniformly accelerated movement, and also together with two stationary receivers performing constant velocity movement again. This latter setup is implemented in order to demonstrate the prototype's accuracy for planar (2-D) motion measurements. Error analysis and time-domain analysis are presented for system performance characterization. Furthermore, preliminary experimental assessment using a saline solution container to more closely approximate the human body as a radio frequency wave transmission medium has proved the system's capability of operating underneath the skin.

A 0.8-4.2 GHz monolithic all-digital PLL based frequency synthesizer for wireless communications

NASA Astrophysics Data System (ADS)

Yuanxin, Zhao; Yuanpei, Gao; Wei, Li; Ning, Li; Junyan, Ren

2015-01-01

A 0.8-4.2 GHz monolithic all-digital PLL based frequency synthesizer for wireless communications is successfully realized by the 130 nm CMOS process. A series of novel methods are proposed in this paper. Two band DCOs with high frequency resolution are utilized to cover the frequency band of interest, which is as wide as 2.5 to 5 GHz. An overflow counter is proposed to prevent the “pulse-swallowing” phenomenon so as to significantly reduce the locking time. A NTW-clamp digital module is also proposed to prevent the overflow of the loop control word. A modified programmable divider is presented to prevent the failure operation at the boundary. The measurement results show that the output frequency range of this frequency synthesizer is 0.8-4.2 GHz. The locking time achieves a reduction of 84% at 2.68 GHz. The best in-band and out-band phase noise performances have reached -100 dBc/Hz, and -125 dBc/Hz respectively. The lowest reference spur is -58 dBc.

Design of c-band telecontrol transmitter local oscillator for UAV data link

NASA Astrophysics Data System (ADS)

Cao, Hui; Qu, Yu; Song, Zuxun

2018-01-01

A C-band local oscillator of an Unmanned Aerial Vehicle (UAV) data link radio frequency (RF) transmitter unit with high-stability, high-precision and lightweight was designed in this paper. Based on the highly integrated broadband phase-locked loop (PLL) chip HMC834LP6GE, the system performed fractional-N control by internal modules programming to achieve low phase noise and small frequency resolution. The simulation and testing methods were combined to optimize and select the loop filter parameters to ensure the high precision and stability of the frequency synthesis output. The theoretical analysis and engineering prototype measurement results showed that the local oscillator had stable output frequency, accurate frequency step, high spurious suppression and low phase noise, and met the design requirements. The proposed design idea and research method have theoretical guiding significance for engineering practice.

A recursive solution for a fading memory filter derived from Kalman filter theory

NASA Technical Reports Server (NTRS)

Statman, J. I.

1986-01-01

A simple recursive solution for a class of fading memory tracking filters is presented. A fading memory filter provides estimates of filter states based on past measurements, similar to a traditional Kalman filter. Unlike a Kalman filter, an exponentially decaying weight is applied to older measurements, discounting their effect on present state estimates. It is shown that Kalman filters and fading memory filters are closely related solutions to a general least squares estimator problem. Closed form filter transfer functions are derived for a time invariant, steady state, fading memory filter. These can be applied in loop filter implementation of the Deep Space Network (DSN) Advanced Receiver carrier phase locked loop (PLL).

Frequency-Locked Detector Threshold Setting Criteria Based on Mean-Time-To-Lose-Lock (MTLL) for GPS Receivers

PubMed Central

Zhao, Na; Qin, Honglei; Sun, Kewen; Ji, Yuanfa

2017-01-01

Frequency-locked detector (FLD) has been widely utilized in tracking loops of Global Positioning System (GPS) receivers to indicate their locking status. The relation between FLD and lock status has been seldom discussed. The traditional PLL experience is not suitable for FLL. In this paper, the threshold setting criteria for frequency-locked detector in the GPS receiver has been proposed by analyzing statistical characteristic of FLD output. The approximate probability distribution of frequency-locked detector is theoretically derived by using a statistical approach, which reveals the relationship between probabilities of frequency-locked detector and the carrier-to-noise ratio (C/N0) of the received GPS signal. The relationship among mean-time-to-lose-lock (MTLL), detection threshold and lock probability related to C/N0 can be further discovered by utilizing this probability. Therefore, a theoretical basis for threshold setting criteria in frequency locked loops for GPS receivers is provided based on mean-time-to-lose-lock analysis. PMID:29207546

Frequency-Locked Detector Threshold Setting Criteria Based on Mean-Time-To-Lose-Lock (MTLL) for GPS Receivers.

PubMed

Jin, Tian; Yuan, Heliang; Zhao, Na; Qin, Honglei; Sun, Kewen; Ji, Yuanfa

2017-12-04

Frequency-locked detector (FLD) has been widely utilized in tracking loops of Global Positioning System (GPS) receivers to indicate their locking status. The relation between FLD and lock status has been seldom discussed. The traditional PLL experience is not suitable for FLL. In this paper, the threshold setting criteria for frequency-locked detector in the GPS receiver has been proposed by analyzing statistical characteristic of FLD output. The approximate probability distribution of frequency-locked detector is theoretically derived by using a statistical approach, which reveals the relationship between probabilities of frequency-locked detector and the carrier-to-noise ratio ( C / N ₀) of the received GPS signal. The relationship among mean-time-to-lose-lock (MTLL), detection threshold and lock probability related to C / N ₀ can be further discovered by utilizing this probability. Therefore, a theoretical basis for threshold setting criteria in frequency locked loops for GPS receivers is provided based on mean-time-to-lose-lock analysis.

Chip Scale Atomic Resonator Frequency Stabilization System With Ultra-Low Power Consumption for Optoelectronic Oscillators.

PubMed

Zhao, Jianye; Zhang, Yaolin; Lu, Haoyuan; Hou, Dong; Zhang, Shuangyou; Wang, Zhong

2016-07-01

We present a long-term chip scale stabilization scheme for optoelectronic oscillators (OEOs) based on a rubidium coherent population trapping (CPT) atomic resonator. By locking a single mode of an OEO to the (85)Rb 3.035-GHz CPT resonance utilizing an improved phase-locked loop (PLL) with a PID regulator, we achieved a chip scale frequency stabilization system for the OEO. The fractional frequency stability of the stabilized OEO by overlapping Allan deviation reaches 6.2 ×10(-11) (1 s) and  ∼ 1.45 ×10 (-11) (1000 s). This scheme avoids a decrease in the extra phase noise performance induced by the electronic connection between the OEO and the microwave reference in common injection locking schemes. The total physical package of the stabilization system is [Formula: see text] and the total power consumption is 400 mW, which provides a chip scale and portable frequency stabilization approach with ultra-low power consumption for OEOs.

Single-chip fully integrated direct-modulation CMOS RF transmitters for short-range wireless applications.

PubMed

El-Desouki, Munir M; Qasim, Syed Manzoor; BenSaleh, Mohammed; Deen, M Jamal

2013-08-02

Ultra-low power radio frequency (RF) transceivers used in short-range application such as wireless sensor networks (WSNs) require efficient, reliable and fully integrated transmitter architectures with minimal building blocks. This paper presents the design, implementation and performance evaluation of single-chip, fully integrated 2.4 GHz and 433 MHz RF transmitters using direct-modulation power voltage-controlled oscillators (PVCOs) in addition to a 2.0 GHz phase-locked loop (PLL) based transmitter. All three RF transmitters have been fabricated in a standard mixed-signal CMOS 0.18 µm technology. Measurement results of the 2.4 GHz transmitter show an improvement in drain efficiency from 27% to 36%. The 2.4 GHz and 433 MHz transmitters deliver an output power of 8 dBm with a phase noise of -122 dBc/Hz at 1 MHz offset, while drawing 15.4 mA of current and an output power of 6.5 dBm with a phase noise of -120 dBc/Hz at 1 MHz offset, while drawing 20.8 mA of current from 1.5 V power supplies, respectively. The PLL transmitter delivers an output power of 9 mW with a locking range of 128 MHz and consumes 26 mA from 1.8 V power supply. The experimental results demonstrate that the RF transmitters can be efficiently used in low power WSN applications.

Method for digital measurement of phase-frequency characteristics for a fixed-length ultrasonic spectrometer

NASA Astrophysics Data System (ADS)

Astashev, M. E.; Belosludtsev, K. N.; Kharakoz, D. P.

2014-05-01

One of the most accurate methods for measuring the compressibility of liquids is resonance measurement of sound velocity in a fixed-length interferometer. This method combines high sensitivity, accuracy, and small sample volume of the test liquid. The measuring principle is to study the resonance properties of a composite resonator that contains a test liquid sample. Ealier, the phase-locked loop (PLL) scheme was used for this. In this paper, we propose an alternative measurement scheme based on digital analysis of harmonic signals, describe the implementation of this scheme using commercially available data acquisition modules, and give examples of test measurements with accuracy evaluations of the results.

Robust GPS carrier tracking under ionospheric scintillation

NASA Astrophysics Data System (ADS)

Susi, M.; Andreotti, M.; Aquino, M. H.; Dodson, A.

2013-12-01

Small scale irregularities present in the ionosphere can induce fast and unpredictable fluctuations of Radio Frequency (RF) signal phase and amplitude. This phenomenon, known as scintillation, can degrade the performance of a GPS receiver leading to cycle slips, increasing the tracking error and also producing a complete loss of lock. In the most severe scenarios, if the tracking of multiple satellites links is prevented, outages in the GPS service can also occur. In order to render a GPS receiver more robust under scintillation, particular attention should be dedicated to the design of the carrier tracking stage, that is the receiver's part most sensitive to these types of phenomenon. This paper exploits the reconfigurability and flexibility of a GPS software receiver to develop a tracking algorithm that is more robust under ionospheric scintillation. For this purpose, first of all, the scintillation level is monitored in real time. Indeed the carrier phase and the post correlation terms obtained by the PLL (Phase Locked Loop) are used to estimate phi60 and S4 [1], the scintillation indices traditionally used to quantify the level of phase and amplitude scintillations, as well as p and T, the spectral parameters of the fluctuations PSD. The effectiveness of the scintillation parameter computation is confirmed by comparing the values obtained by the software receiver and the ones provided by a commercial scintillation monitoring, i.e. the Septentrio PolarxS receiver [2]. Then the above scintillation parameters and the signal carrier to noise density are exploited to tune the carrier tracking algorithm. In case of very weak signals the FLL (Frequency Locked Loop) scheme is selected in order to maintain the signal lock. Otherwise an adaptive bandwidth Phase Locked Loop (PLL) scheme is adopted. The optimum bandwidth for the specific scintillation scenario is evaluated in real time by exploiting the Conker formula [1] for the tracking jitter estimation. The performance of the proposed tracking scheme is assessed by using both simulated and real data. Real data have been collected in Vietnam by using a USRP (Universal Software Radio Peripheral) N210 front end connected to a rubidium oscillator. Selected events are exploited in order to challenge the algorithm with strong phase and amplitude variations. Moreover, simulated data have been collected by using the prototype of a digital front end developed by Novatel, namely the 'Firehose'. Since the latter includes a TCXO oscillator, the proposed tracking scheme is also opportunely modified to take in account the clock error contribution. References 1. R.S., Conker, M. B. El-Arini, C. J. Hegarty, and T. Hsiao, Modelling the effects of ionospheric scintillation on GPS/satellite-based augmentation system availability. Radio Sci., 38, 1, 1001, doi: 10.1029/2000RS002604, 2003. 2. B. Bougard et al, 'CIGALA: Challenging the Solar Maximum in Brazil with PolaRxS,' ION GNSS, Portland, Sept. 2011.

A 2x2 W-Band Reference Time-Shifted Phase-Locked Transmitter Array in 65nm CMOS Technology

NASA Technical Reports Server (NTRS)

Tang, Adrian; Virbila, Gabriel; Hsiao, Frank; Wu, Hao; Murphy, David; Mehdi, Imran; Siegel, P. H.; Chang, M-C. Frank

2013-01-01

This paper presents a complete 2x2 phased array transmitter system operating at W-band (90-95 GHz) which employs a PLL reference time-shifting approach instead of using traditional mm-wave phase shifters. PLL reference shifting enables a phased array to be distributed over multiple chips without the need for coherent mm-wave signal distribution between chips. The proposed phased array transmitter system consumes 248 mW per array element when implemented in a 65 nm CMOS technology.

Weak and Dynamic GNSS Signal Tracking Strategies for Flight Missions in the Space Service Volume

PubMed Central

Jing, Shuai; Zhan, Xingqun; Liu, Baoyu; Chen, Maolin

2016-01-01

Weak-signal and high-dynamics are of two primary concerns of space navigation using GNSS (Global Navigation Satellite System) in the space service volume (SSV). The paper firstly defines a reference assumption third-order phase-locked loop (PLL) as the baseline of an onboard GNSS receiver, and proves the incompetence of this conventional architecture. Then an adaptive four-state Kalman filter (KF)-based algorithm is introduced to realize the optimization of loop noise bandwidth, which can adaptively regulate its filter gain according to the received signal power and line-of-sight (LOS) dynamics. To overcome the matter of losing lock in weak-signal and high-dynamic environments, an open loop tracking strategy aided by an inertial navigation system (INS) is recommended, and the traditional maximum likelihood estimation (MLE) method is modified in a non-coherent way by reconstructing the likelihood cost function. Furthermore, a typical mission with combined orbital maneuvering and non-maneuvering arcs is taken as a destination object to test the two proposed strategies. Finally, the experiment based on computer simulation identifies the effectiveness of an adaptive four-state KF-based strategy under non-maneuvering conditions and the virtue of INS-assisted methods under maneuvering conditions. PMID:27598164

Weak and Dynamic GNSS Signal Tracking Strategies for Flight Missions in the Space Service Volume.

PubMed

Jing, Shuai; Zhan, Xingqun; Liu, Baoyu; Chen, Maolin

2016-09-02

Weak-signal and high-dynamics are of two primary concerns of space navigation using GNSS (Global Navigation Satellite System) in the space service volume (SSV). The paper firstly defines a reference assumption third-order phase-locked loop (PLL) as the baseline of an onboard GNSS receiver, and proves the incompetence of this conventional architecture. Then an adaptive four-state Kalman filter (KF)-based algorithm is introduced to realize the optimization of loop noise bandwidth, which can adaptively regulate its filter gain according to the received signal power and line-of-sight (LOS) dynamics. To overcome the matter of losing lock in weak-signal and high-dynamic environments, an open loop tracking strategy aided by an inertial navigation system (INS) is recommended, and the traditional maximum likelihood estimation (MLE) method is modified in a non-coherent way by reconstructing the likelihood cost function. Furthermore, a typical mission with combined orbital maneuvering and non-maneuvering arcs is taken as a destination object to test the two proposed strategies. Finally, the experiment based on computer simulation identifies the effectiveness of an adaptive four-state KF-based strategy under non-maneuvering conditions and the virtue of INS-assisted methods under maneuvering conditions.

Phase-lock loop frequency control and the dropout problem

NASA Technical Reports Server (NTRS)

Attwood, S.; Kline, A. J.

1968-01-01

Technique automatically sets the frequency of narrow band phase-lock loops within automatic lock-in-range. It presets a phase-lock loop to a desired center frequency with a closed loop electronic frequency discriminator and holds the phase-lock loop to that center frequency until lock is achieved.

A reconfigurable cryogenic platform for the classical control of quantum processors

NASA Astrophysics Data System (ADS)

Homulle, Harald; Visser, Stefan; Patra, Bishnu; Ferrari, Giorgio; Prati, Enrico; Sebastiano, Fabio; Charbon, Edoardo

2017-04-01

The implementation of a classical control infrastructure for large-scale quantum computers is challenging due to the need for integration and processing time, which is constrained by coherence time. We propose a cryogenic reconfigurable platform as the heart of the control infrastructure implementing the digital error-correction control loop. The platform is implemented on a field-programmable gate array (FPGA) that supports the functionality required by several qubit technologies and that can operate close to the physical qubits over a temperature range from 4 K to 300 K. This work focuses on the extensive characterization of the electronic platform over this temperature range. All major FPGA building blocks (such as look-up tables (LUTs), carry chains (CARRY4), mixed-mode clock manager (MMCM), phase-locked loop (PLL), block random access memory, and IDELAY2 (programmable delay element)) operate correctly and the logic speed is very stable. The logic speed of LUTs and CARRY4 changes less then 5%, whereas the jitter of MMCM and PLL clock managers is reduced by 20%. The stability is finally demonstrated by operating an integrated 1.2 GSa/s analog-to-digital converter (ADC) with a relatively stable performance over temperature. The ADCs effective number of bits drops from 6 to 4.5 bits when operating at 15 K.

A reconfigurable cryogenic platform for the classical control of quantum processors.

PubMed

Homulle, Harald; Visser, Stefan; Patra, Bishnu; Ferrari, Giorgio; Prati, Enrico; Sebastiano, Fabio; Charbon, Edoardo

2017-04-01

The implementation of a classical control infrastructure for large-scale quantum computers is challenging due to the need for integration and processing time, which is constrained by coherence time. We propose a cryogenic reconfigurable platform as the heart of the control infrastructure implementing the digital error-correction control loop. The platform is implemented on a field-programmable gate array (FPGA) that supports the functionality required by several qubit technologies and that can operate close to the physical qubits over a temperature range from 4 K to 300 K. This work focuses on the extensive characterization of the electronic platform over this temperature range. All major FPGA building blocks (such as look-up tables (LUTs), carry chains (CARRY4), mixed-mode clock manager (MMCM), phase-locked loop (PLL), block random access memory, and IDELAY2 (programmable delay element)) operate correctly and the logic speed is very stable. The logic speed of LUTs and CARRY4 changes less then 5%, whereas the jitter of MMCM and PLL clock managers is reduced by 20%. The stability is finally demonstrated by operating an integrated 1.2 GSa/s analog-to-digital converter (ADC) with a relatively stable performance over temperature. The ADCs effective number of bits drops from 6 to 4.5 bits when operating at 15 K.

Modeling and simulation of continuous wave velocity radar based on third-order DPLL

NASA Astrophysics Data System (ADS)

Di, Yan; Zhu, Chen; Hong, Ma

2015-02-01

Second-order digital phase-locked-loop (DPLL) is widely used in traditional Continuous wave (CW) velocity radar with poor performance in high dynamic conditions. Using the third-order DPLL can improve the performance. Firstly, the echo signal model of CW radar is given. Secondly, theoretical derivations of the tracking performance in different velocity conditions are given. Finally, simulation model of CW radar is established based on Simulink tool. Tracking performance of the two kinds of DPLL in different acceleration and jerk conditions is studied by this model. The results show that third-order PLL has better performance in high dynamic conditions. This model provides a platform for further research of CW radar.

Resonant Acoustic Determination of Complex Elastic Moduli

NASA Technical Reports Server (NTRS)

Brown, David A.; Garrett, Steven L.

1991-01-01

A simple, inexpensive, yet accurate method for measuring the dynamic complex modulus of elasticity is described. Using a 'free-free' bar selectively excited in three independent vibrational modes, the shear modulus is obtained by measuring the frequency of the torsional resonant mode and the Young's modulus is determined from measurement of either the longitudinal or flexural mode. The damping properties are obtained by measuring the quality factor (Q) for each mode. The Q is inversely proportional to the loss tangent. The viscoelastic behavior of the sample can be obtained by tracking a particular resonant mode (and thus a particular modulus) using a phase locked loop (PLL) and by changing the temperature of the sample. The change in the damping properties is obtained by measuring the in-phase amplitude of the PLL which is proportional to the Q of the material. The real and imaginary parts or the complex modulus can be obtained continuously as a function of parameters such as temperature, pressure, or humidity. For homogeneous and isotropic samples only two independent moduli are needed in order to characterize the complete set of elastic constants, thus, values can be obtained for the dynamic Poisson's ratio, bulk modulus, Lame constants, etc.

Bandwidth controller for phase-locked-loop

NASA Technical Reports Server (NTRS)

Brockman, Milton H. (Inventor)

1992-01-01

A phase locked loop utilizing digital techniques to control the closed loop bandwidth of the RF carrier phase locked loop in a receiver provides high sensitivity and a wide dynamic range for signal reception. After analog to digital conversion, a digital phase locked loop bandwidth controller provides phase error detection with automatic RF carrier closed loop tracking bandwidth control to accommodate several modes of transmission.

Suppressing Transients In Digital Phase-Locked Loops

NASA Technical Reports Server (NTRS)

Thomas, J. B.

1993-01-01

Loop of arbitrary order starts in steady-state lock. Method for initializing variables of digital phase-locked loop reduces or eliminates transients in phase and frequency typically occurring during acquisition of lock on signal or when changes made in values of loop-filter parameters called "loop constants". Enables direct acquisition by third-order loop without prior acquisition by second-order loop of greater bandwidth, and eliminates those perturbations in phase and frequency lock occurring when loop constants changed by arbitrarily large amounts.

Phase-locked loops. [in analog and digital circuits communication system

NASA Technical Reports Server (NTRS)

Gupta, S. C.

1975-01-01

An attempt to systematically outline the work done in the area of phase-locked loops which are now used in modern communication system design is presented. The analog phase-locked loops are well documented in several books but discrete, analog-digital, and digital phase-locked loop work is scattered. Apart from discussing the various analysis, design, and application aspects of phase-locked loops, a number of references are given in the bibliography.

Acquisition and Tracking Behavior of Phase-Locked Loops

NASA Technical Reports Server (NTRS)

Viterbi, A. J.

1958-01-01

Phase-locked or APC loops have found increasing applications in recent years as tracking filters, synchronizing devices, and narrowband FM discriminators. Considerable work has been performed to determine the noise-squelching properties of the loop when it is operating in or near phase lock and is functioning as a linear coherent detector. However, insufficient consideration has been devoted to the non-linear behavior of the loop when it is out of lock and in the process of pulling in. Experimental evidence has indicated that there is a strong tendency for phase-locked loops to achieve lock under most circumstances. However, the analysis which has appeared in the literature iis limited to the acquisition of a constant frequency reference signal with only one phase-locked loop filter configuration. This work represents an investigation of frequency acquisition properties of phase-locked loops for a variety of reference-signal behavior and loop configurations

A 2.4-GHz Energy-Efficient Transmitter for Wireless Medical Applications.

PubMed

Qi Zhang; Peng Feng; Zhiqing Geng; Xiaozhou Yan; Nanjian Wu

2011-02-01

A 2.4-GHz energy-efficient transmitter (TX) for wireless medical applications is presented in this paper. It consists of four blocks: a phase-locked loop (PLL) synthesizer with a direct frequency presetting technique, a class-B power amplifier, a digital processor, and nonvolatile memory (NVM). The frequency presetting technique can accurately preset the carrier frequency of the voltage-controlled oscillator and reduce the lock-in time of the PLL synthesizer, further increasing the data rate of communication with low power consumption. The digital processor automatically compensates preset frequency variation with process, voltage, and temperature. The NVM stores the presetting signals and calibration data so that the TX can avoid the repetitive calibration process and save the energy in practical applications. The design is implemented in 0.18- μm radio-frequency complementary metal-oxide semiconductor process and the active area is 1.3 mm (2). The TX achieves 0-dBm output power with a maximum data rate of 4 Mb/s/2 Mb/s and dissipates 2.7-mA/5.4-mA current from a 1.8-V power supply for on-off keying/frequency-shift keying modulation, respectively. The corresponding energy efficiency is 1.2 nJ/b·mW and 4.8 nJ/b· mW when normalized to the transmitting power.

Power line interference attenuation in multi-channel sEMG signals: Algorithms and analysis.

PubMed

Soedirdjo, S D H; Ullah, K; Merletti, R

2015-08-01

Electromyogram (EMG) recordings are often corrupted by power line interference (PLI) even though the skin is prepared and well-designed instruments are used. This study focuses on the analysis of some of the recent and classical existing digital signal processing approaches have been used to attenuate, if not eliminate, the power line interference from EMG signals. A comparison of the signal to interference ratio (SIR) of the output signals is presented, for four methods: classical notch filter, spectral interpolation, adaptive noise canceller with phase locked loop (ANC-PLL) and adaptive filter, applied to simulated multichannel monopolar EMG signals with different SIR. The effect of each method on the shape of the EMG signals is also analyzed. The results show that ANC-PLL method gives the best output SIR and lowest shape distortion compared to the other methods. Classical notch filtering is the simplest method but some information might be lost as it removes both the interference and the EMG signals. Thus, it is obvious that notch filter has the lowest performance and it introduces distortion into the resulting signals.

VCO PLL Frequency Synthesizers for Spacecraft Transponders

NASA Technical Reports Server (NTRS)

Smith, Scott; Mysoor, Narayan; Lux, James; Cook, Brian

2007-01-01

Two documents discuss a breadboard version of advanced transponders that, when fully developed, would be installed on future spacecraft to fly in deep space. These transponders will be required to be capable of operation on any deepspace- communications uplink frequency channel between 7,145 and 7,235 MHz, and any downlink frequency channel between 8,400 and 8,500 MHz. The document focuses on the design and operation of frequency synthesizers for the receiver and transmitter. Heretofore, frequency synthesizers in deep-space transponders have been based on dielectric resonator oscillators (DROs), which do not have the wide tuning bandwidth necessary to tune over all channels in the uplink or downlink frequency bands. To satisfy the requirement for tuning bandwidth, the present frequency synthesizers are based on voltage-controlled-oscillator (VCO) phase-locked loops (PLLs) implemented by use of monolithic microwave integrated circuits (MMICs) implemented using inGaP heterojunction bipolar transistor (HBT) technology. MMIC VCO PLL frequency synthesizers similar to the present ones have been used in commercial and military applications but, until now, have exhibited too much phase noise for use in deep-space transponders. The present frequency synthesizers contain advanced MMIC VCOs, which use HBT technology and have lower levels of flicker (1/f) phase noise. When these MMIC VCOs are used with high-speed MMIC frequency dividers, it becomes possible to obtain the required combination of frequency agility and low phase noise.

Phase-locked Optical Signal Recovery

DTIC Science & Technology

2009-01-01

detection . However, implementing an optical phase lock loop ( OPLL ) to generate the synchronised carrier for the homodyne technique requires... Loop (OIPLL) in which a narrow bandwidth optical phase lock loop ( OPLL ) is used to control the free -running frequency of an optically injection...receiver uses an Optical Injection Phase Lock Loop (OIPLL) for carrier recovery,

Phase-locked Optical Signal Recovery

DTIC Science & Technology

2009-01-01

detection . However, implementing an optical phase lock loop ( OPLL ) to generate the synchronised carrier for the homodyne technique requires... Loop (OIPLL) in which a narrow bandwidth optical phase lock loop ( OPLL ) is used to control the free -running frequency of an optically injection...The receiver uses an Optical Injection Phase Lock Loop (OIPLL) for carrier

Grid Integration of Single Stage Solar PV System using Three-level Voltage Source Converter

NASA Astrophysics Data System (ADS)

Hussain, Ikhlaq; Kandpal, Maulik; Singh, Bhim

2016-08-01

This paper presents a single stage solar PV (photovoltaic) grid integrated power generating system using a three level voltage source converter (VSC) operating at low switching frequency of 900 Hz with robust synchronizing phase locked loop (RS-PLL) based control algorithm. To track the maximum power from solar PV array, an incremental conductance algorithm is used and this maximum power is fed to the grid via three-level VSC. The use of single stage system with three level VSC offers the advantage of low switching losses and the operation at high voltages and high power which results in enhancement of power quality in the proposed system. Simulated results validate the design and control algorithm under steady state and dynamic conditions.

Coordinated design of coding and modulation systems

NASA Technical Reports Server (NTRS)

Massey, J. L.

1976-01-01

Work on partial unit memory codes continued; it was shown that for a given virtual state complexity, the maximum free distance over the class of all convolutional codes is achieved within the class of unit memory codes. The effect of phase-lock loop (PLL) tracking error on coding system performance was studied by using the channel cut-off rate as the measure of quality of a modulation system. Optimum modulation signal sets for a non-white Gaussian channel considered an heuristic selection rule based on a water-filling argument. The use of error correcting codes to perform data compression by the technique of syndrome source coding was researched and a weight-and-error-locations scheme was developed that is closely related to LDSC coding.

Phase-locked loops. [analog, hybrid, discrete and digital systems

NASA Technical Reports Server (NTRS)

Gupta, S. C.

1974-01-01

The basic analysis and design procedures are described for the realization of analog phase-locked loops (APLL), hybrid phase-locked loops (HPLL), discrete phase-locked loops, and digital phase-locked loops (DPLL). Basic configurations are diagrammed, and performance curves are given. A discrete communications model is derived and developed. The use of the APLL as an optimum angle demodulator and the Kalman-Bucy approach to APLL design are discussed. The literature in the area of phase-locked loops is reviewed, and an extensive bibliography is given. Although the design of APLLs is fairly well documented, work on discrete, hybrid, and digital PLLs is scattered, and more will have to be done in the future to pinpoint the formal design of DPLLs.

Design of Digital Phase-Locked Loops For Advanced Digital Transponders

NASA Technical Reports Server (NTRS)

Nguyen, Tien M.

1994-01-01

For advanced digital space transponders, the Digital Phased-Locked Loops (DPLLs) can be designed using the available analog loops. DPLLs considered in this paper are derived from the Analog Phase-Locked Loop (APLL) using S-domain mapping techniques.

CMOS Optoelectronic Lock-In Amplifier With Integrated Phototransistor Array.

PubMed

An Hu; Chodavarapu, Vamsy P

2010-10-01

We describe the design and development of an optoelectronic lock-in amplifier (LIA) for optical sensing and spectroscopy applications. The prototype amplifier is fabricated using Taiwan Semiconductor Manufacturing Co. complementary metal-oxide semiconductor 0.35-μm technology and uses a phototransistor array (total active area is 400 μm × 640μm) to convert the incident optical signals into electrical currents. The photocurrents are then converted into voltage signals using a transimpedance amplifier for subsequent convenient signal processing by the LIA circuitry. The LIA is optimized to be operational at 20-kHz modulation frequency but is operational in the frequency range from 13 kHz to 25 kHz. The system is tested with a light-emitting diode (LED) as the light source. The noise and signal distortions are suppressed with filters and a phase-locked loop (PLL) implemented in the LIA. The output dc voltage of the LIA is proportional to the incident optical power. The minimum measured dynamic reserve and sensitivity are 1.31 dB and 34 mV/μW, respectively. The output versus input relationship has shown good linearity. The LIA consumes an average power of 12.79 mW with a 3.3-V dc power supply.

Parallel Digital Phase-Locked Loops

NASA Technical Reports Server (NTRS)

Sadr, Ramin; Shah, Biren N.; Hinedi, Sami M.

1995-01-01

Wide-band microwave receivers of proposed type include digital phase-locked loops in which band-pass filtering and down-conversion of input signals implemented by banks of multirate digital filters operating in parallel. Called "parallel digital phase-locked loops" to distinguish them from other digital phase-locked loops. Systems conceived as cost-effective solution to problem of filtering signals at high sampling rates needed to accommodate wide input frequency bands. Each of M filters process 1/M of spectrum of signal.

Laser Linewidth Requirements for Optical Bpsk and Qpsk Heterodyne Lightwave Systems.

NASA Astrophysics Data System (ADS)

Boukli-Hacene, Mokhtar

In this dissertation, optical Binary Phase-Shift Keying (BPSK) and Quadrature Phase-Shift Keying (QPSK) heterodyne communication receivers are investigated. The main objective of this research work is to analyze the performance of these receivers in the presence of laser phase noise and shot noise. The heterodyne optical BPSK is based on the square law carrier recovery (SLCR) scheme for phase detection. The BPSK heterodyne receiver is analyzed assuming a second order linear phase-locked loop (PLL) subsystem and a small phase error. The noise properties are analyzed and the problem of minimizing the effect of noise is addressed. The performance of the receiver is evaluated in terms of the bit error rate (BER), which leads to the analysis of the BER versus the laser linewidth and the number of photons/bit to achieve good performance. Since we cannot track the pure carrier component in the presence of noise, a non-linear model is used to solve the problem of recovery of the carrier. The non -linear system is analyzed in the presence of a low signal -to-noise ratio (SNR). The non-Gaussian noise model represented by its probability density function (PDF) is used to analyze the performance of the receiver, especially the phase error. In addition the effect of the PLL is analyzed by studying the cycle slippage (cs). Finally, the research effort is expanded from BPSK to QPSK systems. The heterodyne optical QPSK based on the fourth power multiplier scheme (FPMS) in conjunction with linear and non-linear PLL model is investigated. Optimum loop and higher power penalty in the presence of phase noise and shot noise are analyzed. It is shown that the QPSK system yields a high speed and high sensitivity coherent means for transmission of information accompanied by a small degradation in the laser linewidth. Comparative analysis of BPSK and QPSK systems leads us to conclude that in terms of laser linewidth, bit rate, phase error and power penalty, the QPSK system is more sensitive than the BPSK system and suffers less from higher power penalty. The BPSK and QPSK heterodyne receivers used in the uncoded scheme demand a realistic laser linewidth. Since the laser linewidth is the critical measure of the performance of a receiver, a convolutional code applied to QPSK of the system is used to improve the sensitivity of the system. The effect of coding is particularly important as means of relaxing the laser linewidth requirement. The validity and usefulness of the analysis presented in the dissertation is supported by computer simulations.

A class of all digital phase locked loops - Modeling and analysis

NASA Technical Reports Server (NTRS)

Reddy, C. P.; Gupta, S. C.

1973-01-01

An all digital phase locked loop which tracks the phase of the incoming signal once per carrier cycle is proposed. The different elements and their functions, and the phase lock operation are explained in detail. The general digital loop operation is governed by a nonlinear difference equation from which a suitable model is developed. The lock range for the general model is derived. The performance of the digital loop for phase step and frequency step inputs for different levels of quantization without loop filter are studied. The analytical results are checked by simulating the actual system on the digital computer.

Design and analysis of an energy-efficient O-QPSK coherent IR-UWB transceiver with a 0.52° RMS phase-noise fractional synthesizer

NASA Astrophysics Data System (ADS)

Ying, Yutong; Lin, Fujiang; Bai, Xuefei

2018-03-01

This paper explores an energy-efficient pulsed ultra-wideband (UWB) radio-frequency (RF) front-end chip fabricated in 0.18-μm CMOS technology, including a transmitter, receiver, and fractional synthesizer. The transmitter adopts a digital offset quadrature phase-shift keying (O-QPSK) modulator and passive direct-phase multiplexing technology, which are energy- and hardware-efficient, to enhance the data rate for a given spectrum. A passive mixer and a capacitor cross-coupled (CCC) source-follower driving amplifier (DA) are also designed for the transmitter to further reduce the low power consumption. For the receiver, a power-aware low-noise amplifier (LNA) and a quadrature mixer are applied. The LNA adopts a CCC boost common-gate amplifier as the input stage, and its current is reused for the second stage to save power. The mixer uses a shared amplification stage for the following passive IQ mixer. Phase noise suppression of the phase-locked loop (PLL) is achieved by utilizing an even-harmonics-nulled series-coupled quadrature oscillator (QVCO) and an in-band noise-aware charge pump (CP) design. The transceiver achieves a measured data rate of 0.8 Gbps with power consumption of 16 mW and 31.5 mW for the transmitter and the receiver, respectively. The optimized integrated phase noise of the PLL is 0.52° at 4.025 GHz. Project supported by the National Science and Technology Major Project of China (No. 2011ZX03004-002-01).

A Digital Phase Lock Loop for an External Cavity Diode Laser

NASA Astrophysics Data System (ADS)

Wang, Xiao-Long; Tao, Tian-Jiong; Cheng, Bing; Wu, Bin; Xu, Yun-Fei; Wang, Zhao-Ying; Lin, Qiang

2011-08-01

A digital optical phase lock loop (OPLL) is implemented to synchronize the frequency and phase between two external cavity diode lasers (ECDL), generating Raman pulses for atom interferometry. The setup involves all-digital phase detection and a programmable digital proportional-integral-derivative (PID) loop in locking. The lock generates a narrow beat-note linewidth below 1 Hz and low phase-noise of 0.03rad2 between the master and slave ECDLs. The lock proves to be stable and robust, and all the locking parameters can be set and optimized on a computer interface with convenience, making the lock adaptable to various setups of laser systems.

Phase-lock-loop application for fiber optic receiver

NASA Astrophysics Data System (ADS)

Ruggles, Stephen L.; Wills, Robert W.

1991-02-01

Phase-locked loop circuits are frequently employed in communication systems. In recent years, digital phase-locked loop circuits were utilized in optical communications systems. In an optical transceiver system, the digital phase-locked loop circuit is connected to the output of the receiver to extract a clock signal from the received coded data (NRZ, Bi-Phase, or Manchester). The clock signal is then used to reconstruct or recover the original data from the coded data. A theoretical approach to the design of a digital phase-locked loop circuit operation at 1 and 50 MHz is described. Hardware implementation of a breadboard design to function at 1 MHz and a printed-circuit board designed to function at 50 MHz were assembled using emitter coupled logic (ECL) to verify experimentally the theoretical design.

Phase-lock-loop application for fiber optic receiver

NASA Technical Reports Server (NTRS)

Ruggles, Stephen L.; Wills, Robert W.

1991-01-01

Phase-locked loop circuits are frequently employed in communication systems. In recent years, digital phase-locked loop circuits were utilized in optical communications systems. In an optical transceiver system, the digital phase-locked loop circuit is connected to the output of the receiver to extract a clock signal from the received coded data (NRZ, Bi-Phase, or Manchester). The clock signal is then used to reconstruct or recover the original data from the coded data. A theoretical approach to the design of a digital phase-locked loop circuit operation at 1 and 50 MHz is described. Hardware implementation of a breadboard design to function at 1 MHz and a printed-circuit board designed to function at 50 MHz were assembled using emitter coupled logic (ECL) to verify experimentally the theoretical design.

A novel architecture of recovered data comparison for high speed clock and data recovery

NASA Astrophysics Data System (ADS)

Gao, Susan; Li, Fei; Wang, Zhigong; Cui, Hongliang

2005-05-01

A clock and data recovery (CDR) circuit is one of the crucial blocks in high-speed serial link communication systems. The data received in these systems are asynchronous and noisy, requiring that a clock be extracted to allow synchronous operations. Furthermore, the data must be "retimed" so that the jitter accumulated during transmission is removed. This paper presents a novel architecture of CDR, which is very tolerant to long sequences of serial ones or zeros and also robust to occasional long absence of transitions. The design is based on the fact that a basic clock recovery having a clock recovery circuit (CRC) and a data decision circuit separately would generate a high jitter clock when the received non-return-to-zero (NRZ) data with long sequences of ones or zeros. To eliminate this drawback, the proposed architecture incorporates a data circuit decision circuit within the phase-locked loop (PLL) CRC. Other than this, a new phase detector (PD) is also proposed, which was easy to accomplish and robust at high speed. This PD is functional with a random input and automatically turns to disable during both the locked state and long absence of transitions. The voltage-controlled oscillator (VCO) is also designed delicately to suppress the jitter. Due to the high stability, the jitter is highly reduced when the loop is locked. The simulation results of such CDR working at 1.25Gb/s particularly for 1000BASE-X Gigabit Ethernet by using TSMC 0.25μm technology are presented to prove the feasibility of this architecture. One more CDR based on edge detection architecture is also built in the circuit for performance comparisons.

Modeling and Development of INS-Aided PLLs in a GNSS/INS Deeply-Coupled Hardware Prototype for Dynamic Applications

PubMed Central

Zhang, Tisheng; Niu, Xiaoji; Ban, Yalong; Zhang, Hongping; Shi, Chuang; Liu, Jingnan

2015-01-01

A GNSS/INS deeply-coupled system can improve the satellite signals tracking performance by INS aiding tracking loops under dynamics. However, there was no literature available on the complete modeling of the INS branch in the INS-aided tracking loop, which caused the lack of a theoretical tool to guide the selections of inertial sensors, parameter optimization and quantitative analysis of INS-aided PLLs. This paper makes an effort on the INS branch in modeling and parameter optimization of phase-locked loops (PLLs) based on the scalar-based GNSS/INS deeply-coupled system. It establishes the transfer function between all known error sources and the PLL tracking error, which can be used to quantitatively evaluate the candidate inertial measurement unit (IMU) affecting the carrier phase tracking error. Based on that, a steady-state error model is proposed to design INS-aided PLLs and to analyze their tracking performance. Based on the modeling and error analysis, an integrated deeply-coupled hardware prototype is developed, with the optimization of the aiding information. Finally, the performance of the INS-aided PLLs designed based on the proposed steady-state error model is evaluated through the simulation and road tests of the hardware prototype. PMID:25569751

Design of Dual-Mode Local Oscillators Using CMOS Technology for Motion Detection Sensors.

PubMed

Ha, Keum-Won; Lee, Jeong-Yun; Kim, Jeong-Geun; Baek, Donghyun

2018-04-01

Recently, studies have been actively carried out to implement motion detecting sensors by applying radar techniques. Doppler radar or frequency-modulated continuous wave (FMCW) radar are mainly used, but each type has drawbacks. In Doppler radar, no signal is detected when the movement is stopped. Also, FMCW radar cannot function when the detection object is near the sensor. Therefore, by implementing a single continuous wave (CW) radar for operating in dual-mode, the disadvantages in each mode can be compensated for. In this paper, a dual mode local oscillator (LO) is proposed that makes a CW radar operate as a Doppler or FMCW radar. To make the dual-mode LO, a method that controls the division ratio of the phase locked loop (PLL) is used. To support both radar mode easily, the proposed LO is implemented by adding a frequency sweep generator (FSG) block to a fractional-N PLL. The operation mode of the LO is determined by according to whether this block is operating or not. Since most radar sensors are used in conjunction with microcontroller units (MCUs), the proposed architecture is capable of dual-mode operation by changing only the input control code. In addition, all components such as VCO, LDO, and loop filter are integrated into the chip, so complexity and interface issues can be solved when implementing radar sensors. Thus, the proposed dual-mode LO is suitable as a radar sensor.

Design of Dual-Mode Local Oscillators Using CMOS Technology for Motion Detection Sensors

PubMed Central

Lee, Jeong-Yun; Kim, Jeong-Geun

2018-01-01

Recently, studies have been actively carried out to implement motion detecting sensors by applying radar techniques. Doppler radar or frequency-modulated continuous wave (FMCW) radar are mainly used, but each type has drawbacks. In Doppler radar, no signal is detected when the movement is stopped. Also, FMCW radar cannot function when the detection object is near the sensor. Therefore, by implementing a single continuous wave (CW) radar for operating in dual-mode, the disadvantages in each mode can be compensated for. In this paper, a dual mode local oscillator (LO) is proposed that makes a CW radar operate as a Doppler or FMCW radar. To make the dual-mode LO, a method that controls the division ratio of the phase locked loop (PLL) is used. To support both radar mode easily, the proposed LO is implemented by adding a frequency sweep generator (FSG) block to a fractional-N PLL. The operation mode of the LO is determined by according to whether this block is operating or not. Since most radar sensors are used in conjunction with microcontroller units (MCUs), the proposed architecture is capable of dual-mode operation by changing only the input control code. In addition, all components such as VCO, LDO, and loop filter are integrated into the chip, so complexity and interface issues can be solved when implementing radar sensors. Thus, the proposed dual-mode LO is suitable as a radar sensor. PMID:29614777

A class of all digital phase locked loops - Modelling and analysis.

NASA Technical Reports Server (NTRS)

Reddy, C. P.; Gupta, S. C.

1972-01-01

An all digital phase locked loop which tracks the phase of the incoming signal once per carrier cycle is proposed. The different elements and their functions, and the phase lock operation are explained in detail. The general digital loop operation is governed by a non-linear difference equation from which a suitable model is developed. The lock range for the general model is derived. The performance of the digital loop for phase step, and frequency step inputs for different levels of quantization without loop filter, are studied. The analytical results are checked by simulating the actual system on the digital computer.

All-digital phase-lock loops for noise-free signals

NASA Technical Reports Server (NTRS)

Anderson, T. O.

1973-01-01

Bit-synchronizers utilize all-digital phase-lock loops that are referenced to a high frequency digital clock. Phase-lock loop of first design acquires frequency within nominal range and tracks phase; second design is modified for random binary data by addition of simple transition detector; and third design acquires frequency over wide dynamic range.

Optical injection phase-lock loops

NASA Astrophysics Data System (ADS)

Bordonalli, Aldario Chrestani

Locking techniques have been widely applied for frequency synchronisation of semiconductor lasers used in coherent communication and microwave signal generation systems. Two main locking techniques, the optical phase-lock loop (OPLL) and optical injection locking (OIL) are analysed in this thesis. The principal limitations on OPLL performance result from the loop propagation delay, which makes difficult the implementation of high gain and wide bandwidth loops, leading to poor phase noise suppression performance and requiring the linewidths of the semiconductor laser sources to be less than a few megahertz for practical values of loop delay. The OIL phase noise suppression is controlled by the injected power. The principal limitations of the OIL implementation are the finite phase error under locked conditions and the narrow stable locking range the system provides at injected power levels required to reduce the phase noise output of semiconductor lasers significantly. This thesis demonstrates theoretically and experimentally that it is possible to overcome the limitations of OPLL and OIL systems by combining them, to form an optical injection phase-lock loop (OIPLL). The modelling of an OIPLL system is presented and compared with the equivalent OPLL and OIL results. Optical and electrical design of an homodyne OIPLL is detailed. Experimental results are given which verify the theoretical prediction that the OIPLL would keep the phase noise suppression as high as that of the OIL system over a much wider stable locking range, even with wide linewidth lasers and long loop delays. The experimental results for lasers with summed linewidth of 36 MHz and a loop delay of 15 ns showed measured phase error variances as low as 0.006 rad2 (500 MHz bandwidth) for locking bandwidths greater than 26 GHz, compared with the equivalent OPLL phase error variance of around 1 rad2 (500 MHz bandwidth) and the equivalent OIL locking bandwidth of less than 1.2 GHz.

Optimum design of hybrid phase locked loops

NASA Technical Reports Server (NTRS)

Lee, P.; Yan, T.

1981-01-01

The design procedure of phase locked loops is described in which the analog loop filter is replaced by a digital computer. Specific design curves are given for the step and ramp input changes in phase. It is shown that the designed digital filter depends explicitly on the product of the sampling time and the noise bandwidth of the phase locked loop. This technique of optimization can be applied to the design of digital analog loops for other applications.

Asymmetric resonance response analysis of a thermally excited silicon microcantilever for mass-sensitive nanoparticle detection

NASA Astrophysics Data System (ADS)

Bertke, Maik; Hamdana, Gerry; Wu, Wenze; Wasisto, Hutomo Suryo; Peiner, Erwin

2017-06-01

The asymmetric resonance responses of a thermally actuated silicon microcantilever of a portable, cantilever-based nanoparticle detector (Cantor) is analysed. For airborne nanoparticle concentration measurements, the cantilever is excited in its first in-plane bending mode by an integrated p-type heating actuator. The mass-sensitive nanoparticle (NP) detection is based on the resonance frequency (f0) shifting due to the deposition of NPs. A homemade phase-locked loop (PLL) circuit is developed for tracking of f0. For deflection sensing the cantilever contains an integrated piezo-resistive Wheatstone bridge (WB). A new fitting function based on the Fano resonance is proposed for analysing the asymmetric resonance curves including a method for calculating the quality factor Q from the fitting parameters. To obtain a better understanding, we introduce an electrical equivalent circuit diagram (ECD) comprising a series resonant circuit (SRC) for the cantilever resonator and voltage sources for the parasitics, which enables us to simulate the asymmetric resonance response and discuss the possible causes. Furthermore, we compare the frequency response of the on-chip thermal excitation with an external excitation using an in-plane piezo actuator revealing parasitic heating of the WB as the origin of the asymmetry. Moreover, we are able to model the phase component of the sensor output using the ECD. Knowing and understanding the phase response is crucial to the design of the PLL and thus the next generation of Cantor.

Digital second-order phase-locked loop

NASA Technical Reports Server (NTRS)

Holmes, J. K.; Carl, C. C.; Tagnelia, C. R.

1975-01-01

Actual tests with second-order digital phase-locked loop at simulated relative Doppler shift of 1x0.0001 produced phase lock with timing error of 6.5 deg and no appreciable Doppler bias. Loop thus appears to achieve subcarrier synchronization and to remove bias due to Doppler shift in range of interest.

Compensation of PVT Variations in ToF Imagers with In-Pixel TDC

PubMed Central

Vornicu, Ion; Carmona-Galán, Ricardo; Rodríguez-Vázquez, Ángel

2017-01-01

The design of a direct time-of-flight complementary metal-oxide-semiconductor (CMOS) image sensor (dToF-CIS) based on a single-photon avalanche-diode (SPAD) array with an in-pixel time-to-digital converter (TDC) must contemplate system-level aspects that affect its overall performance. This paper provides a detailed analysis of the impact of process parameters, voltage supply, and temperature (PVT) variations on the time bin of the TDC array. Moreover, the design and characterization of a global compensation loop is presented. It is based on a phase locked loop (PLL) that is integrated on-chip. The main building block of the PLL is a voltage-controlled ring-oscillator (VCRO) that is identical to the ones employed for the in-pixel TDCs. The reference voltage that drives the master VCRO is distributed to the voltage control inputs of the slave VCROs such that their multiphase outputs become invariant to PVT changes. These outputs act as time interpolators for the TDCs. Therefore the compensation scheme prevents the time bin of the TDCs from drifting over time due to the aforementioned factors. Moreover, the same scheme is used to program different time resolutions of the direct time-of-flight (ToF) imager aimed at 3D ranging or depth map imaging. Experimental results that validate the analysis are provided as well. The compensation loop proves to be remarkably effective. The spreading of the TDCs time bin is lowered from: (i) 20% down to 2.4% while the temperature ranges from 0 °C to 100 °C; (ii) 27% down to 0.27%, when the voltage supply changes within ±10% of the nominal value; (iii) 5.2 ps to 2 ps standard deviation over 30 sample chips, due to process parameters’ variation. PMID:28486405

Compensation of PVT Variations in ToF Imagers with In-Pixel TDC.

PubMed

Vornicu, Ion; Carmona-Galán, Ricardo; Rodríguez-Vázquez, Ángel

2017-05-09

The design of a direct time-of-flight complementary metal-oxide-semiconductor (CMOS) image sensor (dToF-CIS) based on a single-photon avalanche-diode (SPAD) array with an in-pixel time-to-digital converter (TDC) must contemplate system-level aspects that affect its overall performance. This paper provides a detailed analysis of the impact of process parameters, voltage supply, and temperature (PVT) variations on the time bin of the TDC array. Moreover, the design and characterization of a global compensation loop is presented. It is based on a phase locked loop (PLL) that is integrated on-chip. The main building block of the PLL is a voltage-controlled ring-oscillator (VCRO) that is identical to the ones employed for the in-pixel TDCs. The reference voltage that drives the master VCRO is distributed to the voltage control inputs of the slave VCROs such that their multiphase outputs become invariant to PVT changes. These outputs act as time interpolators for the TDCs. Therefore the compensation scheme prevents the time bin of the TDCs from drifting over time due to the aforementioned factors. Moreover, the same scheme is used to program different time resolutions of the direct time-of-flight (ToF) imager aimed at 3D ranging or depth map imaging. Experimental results that validate the analysis are provided as well. The compensation loop proves to be remarkably effective. The spreading of the TDCs time bin is lowered from: (i) 20% down to 2.4% while the temperature ranges from 0 °C to 100 °C; (ii) 27% down to 0.27%, when the voltage supply changes within ±10% of the nominal value; (iii) 5.2 ps to 2 ps standard deviation over 30 sample chips, due to process parameters' variation.

A power scalable PLL frequency synthesizer for high-speed Δ—Σ ADC

NASA Astrophysics Data System (ADS)

Siyang, Han; Baoyong, Chi; Xinwang, Zhang; Zhihua, Wang

2014-08-01

A 35-130 MHz/300-360 MHz phase-locked loop frequency synthesizer for Δ—Σ analog-to-digital converter (ADC) in 65 nm CMOS is presented. The frequency synthesizer can work in low phase-noise mode (300-360 MHz) or in low-power mode (35-130 MHz) to satisfy the ADC's requirements. To switch between these two modes, a high frequency GHz LC VCO followed by a divided-by-four frequency divider and a low frequency ring VCO followed by a divided-by-two frequency divider are integrated on-chip. The measured results show that the frequency synthesizer achieves a phase-noise of -132 dBc/Hz at 1 MHz offset and an integrated RMS jitter of 1.12 ps with 1.74 mW power consumption from a 1.2 V power supply in low phase-noise mode. In low-power mode, the frequency synthesizer achieves a phase-noise of -112 dBc/Hz at 1 MHz offset and an integrated RMS jitter of 7.23 ps with 0.92 mW power consumption from a 1.2 V power supply.

Analysis of first and second order binary quantized digital phase-locked loops for ideal and white Gaussian noise inputs

NASA Technical Reports Server (NTRS)

Blasche, P. R.

1980-01-01

Specific configurations of first and second order all digital phase locked loops are analyzed for both ideal and additive white gaussian noise inputs. In addition, a design for a hardware digital phase locked loop capable of either first or second order operation is presented along with appropriate experimental data obtained from testing of the hardware loop. All parameters chosen for the analysis and the design of the digital phase locked loop are consistent with an application to an Omega navigation receiver although neither the analysis nor the design are limited to this application.

Automatic NMR field-frequency lock-pulsed phase locked loop approach.

PubMed

Kan, S; Gonord, P; Fan, M; Sauzade, M; Courtieu, J

1978-06-01

A self-contained deuterium frequency-field lock scheme for a high-resolution NMR spectrometer is described. It is based on phase locked loop techniques in which the free induction decay signal behaves as a voltage-controlled oscillator. By pulsing the spins at an offset frequency of a few hundred hertz and using a digital phase-frequency discriminator this method not only eliminates the usual phase, rf power, offset adjustments needed in conventional lock systems but also possesses the automatic pull-in characteristics that dispense with the use of field sweeps to locate the NMR line prior to closure of the lock loop.

Analysis of a first order phase locked loop in the presence of Gaussian noise

NASA Technical Reports Server (NTRS)

Blasche, P. R.

1977-01-01

A first-order digital phase locked loop is analyzed by application of a Markov chain model. Steady state loop error probabilities, phase standard deviation, and mean loop transient times are determined for various input signal to noise ratios. Results for direct loop simulation are presented for comparison.

Advanced Optical Fiber Communications Systems

DTIC Science & Technology

1994-08-31

phase locking . The PZT port has a tuning coefficient of 3.4 MHz/V. The time constants of the optical phase - locked loop ( OPLL ) filter’s pole and zero are... with the PSK receiver optical phase -I-ocked loop ( OPLL ). As we increased nz in our experiments, the larger signal fluctuations made it increasingly... lasers , since a phase - locked loop is 114 I not required for the DPSK receiver (unlike

An Autonomous Satellite Time Synchronization System Using Remotely Disciplined VC-OCXOs.

PubMed

Gu, Xiaobo; Chang, Qing; Glennon, Eamonn P; Xu, Baoda; Dempseter, Andrew G; Wang, Dun; Wu, Jiapeng

2015-07-23

An autonomous remote clock control system is proposed to provide time synchronization and frequency syntonization for satellite to satellite or ground to satellite time transfer, with the system comprising on-board voltage controlled oven controlled crystal oscillators (VC-OCXOs) that are disciplined to a remote master atomic clock or oscillator. The synchronization loop aims to provide autonomous operation over extended periods, be widely applicable to a variety of scenarios and robust. A new architecture comprising the use of frequency division duplex (FDD), synchronous time division (STDD) duplex and code division multiple access (CDMA) with a centralized topology is employed. This new design utilizes dual one-way ranging methods to precisely measure the clock error, adopts least square (LS) methods to predict the clock error and employs a third-order phase lock loop (PLL) to generate the voltage control signal. A general functional model for this system is proposed and the error sources and delays that affect the time synchronization are discussed. Related algorithms for estimating and correcting these errors are also proposed. The performance of the proposed system is simulated and guidance for selecting the clock is provided.

Efficient dynamic coherence transfer relying on offset locking using optical phase-locked loop

NASA Astrophysics Data System (ADS)

Xie, Weilin; Dong, Yi; Bretenaker, Fabien; Shi, Hongxiao; Zhou, Qian; Xia, Zongyang; Qin, Jie; Zhang, Lin; Lin, Xi; Hu, Weisheng

2018-01-01

We design and experimentally demonstrate a highly efficient coherence transfer based on composite optical phaselocked loop comprising multiple feedback servo loops. The heterodyne offset-locking is achieved by conducting an acousto-optic frequency shifter in combination with the current tuning and the temperature controlling of the semiconductor laser. The adaptation of the composite optical phase-locked loop enables the tight coherence transfer from a frequency comb to a semiconductor laser in a fully dynamic manner.

Design of an Embedded CMOS Temperature Sensor for Passive RFID Tag Chips.

PubMed

Deng, Fangming; He, Yigang; Li, Bing; Zhang, Lihua; Wu, Xiang; Fu, Zhihui; Zuo, Lei

2015-05-18

This paper presents an ultra-low embedded power temperature sensor for passive RFID tags. The temperature sensor converts the temperature variation to a PTAT current, which is then transformed into a temperature-controlled frequency. A phase locked loop (PLL)-based sensor interface is employed to directly convert this temperature-controlled frequency into a corresponding digital output without an external reference clock. The fabricated sensor occupies an area of 0.021 mm2 using the TSMC 0.18 1P6M mixed-signal CMOS process. Measurement results of the embedded sensor within the tag system shows a 92 nW power dissipation under 1.0 V supply voltage at room temperature, with a sensing resolution of 0.15 °C/LSB and a sensing accuracy of -0.7/0.6 °C from -30 °C to 70 °C after 1-point calibration at 30 °C.

Sensorless control of ship propulsion interior permanent magnet synchronous motor based on a new sliding mode observer.

PubMed

Ren, Jun-Jie; Liu, Yan-Cheng; Wang, Ning; Liu, Si-Yuan

2015-01-01

This paper proposes a sensorless speed control strategy for ship propulsion interior permanent magnet synchronous motor (IPMSM) based on a new sliding-mode observer (SMO). In the SMO the low-pass filter and the method of arc-tangent calculation of extended electromotive force (EMF) or phase-locked loop (PLL) technique are not used. The calculation of the rotor speed is deduced from the Lyapunov function stability analysis. In order to reduce system chattering, sigmoid functions with switching gains being adaptively updated by fuzzy logic systems are innovatively incorporated into the SMO. Finally, simulation results for a 4.088 MW ship propulsion IPMSM and experimental results from a 7.5 kW IPMSM drive are provided to verify the effectiveness of the proposed SMO method. Copyright © 2014 ISA. Published by Elsevier Ltd. All rights reserved.

Design of an Embedded CMOS Temperature Sensor for Passive RFID Tag Chips

PubMed Central

Deng, Fangming; He, Yigang; Li, Bing; Zhang, Lihua; Wu, Xiang; Fu, Zhihui; Zuo, Lei

2015-01-01

This paper presents an ultra-low embedded power temperature sensor for passive RFID tags. The temperature sensor converts the temperature variation to a PTAT current, which is then transformed into a temperature-controlled frequency. A phase locked loop (PLL)-based sensor interface is employed to directly convert this temperature-controlled frequency into a corresponding digital output without an external reference clock. The fabricated sensor occupies an area of 0.021 mm2 using the TSMC 0.18 1P6M mixed-signal CMOS process. Measurement results of the embedded sensor within the tag system shows a 92 nW power dissipation under 1.0 V supply voltage at room temperature, with a sensing resolution of 0.15 °C/LSB and a sensing accuracy of −0.7/0.6 °C from −30 °C to 70 °C after 1-point calibration at 30 °C. PMID:25993518

Filter for third order phase locked loops

NASA Technical Reports Server (NTRS)

Crow, R. B.; Tausworthe, R. C. (Inventor)

1973-01-01

Filters for third-order phase-locked loops are used in receivers to acquire and track carrier signals, particularly signals subject to high doppler-rate changes in frequency. A loop filter with an open-loop transfer function and set of loop constants, setting the damping factor equal to unity are provided.

Hardware Verification of Laser Noise Cancellation and Gravitational Wave Extraction using Time-Delay Interferometry

NASA Astrophysics Data System (ADS)

Mitryk, Shawn; Mueller, Guido

The Laser Interferometer Space Antenna (LISA) is a space-based modified Michelson interfer-ometer designed to measure gravitational radiation in the frequency range from 30 uHz to 1 Hz. The interferometer measurement system (IMS) utilizes one-way laser phase measurements to cancel the laser phase noise, reconstruct the proof-mass motion, and extract the gravitational wave (GW) induced laser phase modulations in post-processing using a technique called time-delay interferometry (TDI). Unfortunately, there exist few hard-ware verification experiments of the IMS. The University of Florida LISA Interferometry Simulator (UFLIS) is designed to perform hardware-in-the-loop simulations of the LISA interferometry system, modeling the characteris-tics of the LISA mission as accurately as possible. This depends, first, on replicating the laser pre-stabilization by locking the laser phase to an ultra-stable Zerodur cavity length reference using the PDH locking method. Phase measurements of LISA-like photodetector beat-notes are taken using the UF-phasemeter (PM) which can measure the laser BN frequency to within an accuracy of 0.22 uHz. The inter-space craft (SC) laser links including the time-delay due to the 5 Gm light travel time along the LISA arms, the laser Doppler shifts due to differential SC motion, and the GW induced laser phase modulations are simulated electronically using the electronic phase delay (EPD) unit. The EPD unit replicates the laser field propagation between SC by measuring a photodetector beat-note frequency with the UF-phasemeter and storing the information in memory. After the requested delay time, the frequency information is added to a Doppler offset and a GW-like frequency modulation. The signal is then regenerated with the inter-SC laser phase affects applied. Utilizing these components, I will present the first complete TDI simulations performed using the UFLIS. The LISA model is presented along-side the simulation, comparing the generation and measurement of LISA-like signals. Phasemeter measurements are used in post-processing and combined in the linear combinations defined by TDI, thus, canceling the laser phase and phase-lock loop noise to extract the applied GW modulation buried under the noise. Nine order of magnitude common mode laser noise cancellation is achieved at a frequency of 1 mHz and the GW signal is clearly visible after the laser and PLL noise cancellation.

Digital phase-lock loop

NASA Technical Reports Server (NTRS)

Thomas, Jr., Jess B. (Inventor)

1991-01-01

An improved digital phase lock loop incorporates several distinctive features that attain better performance at high loop gain and better phase accuracy. These features include: phase feedback to a number-controlled oscillator in addition to phase rate; analytical tracking of phase (both integer and fractional cycles); an amplitude-insensitive phase extractor; a more accurate method for extracting measured phase; a method for changing loop gain during a track without loss of lock; and a method for avoiding loss of sampled data during computation delay, while maintaining excellent tracking performance. The advantages of using phase and phase-rate feedback are demonstrated by comparing performance with that of rate-only feedback. Extraction of phase by the method of modeling provides accurate phase measurements even when the number-controlled oscillator phase is discontinuously updated.

Investigation of air transportation technology at Ohio University, 1980. [general aviation aircraft and navigation aids

NASA Technical Reports Server (NTRS)

Mcfarland, R. H.

1981-01-01

Specific configurations of first and second order all digital phase locked loops were analyzed for both ideal and additive gaussian noise inputs. In addition, a design for a hardware digital phase locked loop capable of either first or second order operation was evaluated along with appropriate experimental data obtained from testing of the hardware loop. All parameters chosen for the analysis and the design of the digital phase locked loop were consistent with an application to an Omega navigation receiver although neither the analysis nor the design are limited to this application. For all cases tested, the experimental data showed close agreement with the analytical results indicating that the Markov chain model for first and second order digital phase locked loops are valid.

Simplified formula for mean cycle-slip time of phase-locked loops with steady-state phase error.

NASA Technical Reports Server (NTRS)

Tausworthe, R. C.

1972-01-01

Previous work shows that the mean time from lock to a slipped cycle of a phase-locked loop is given by a certain double integral. Accurate numerical evaluation of this formula for the second-order loop is extremely vexing because the difference between exponentially large quantities is involved. The presented article demonstrates a method in which a much-reduced precision program can be used to obtain the mean first-cycle slip time for a loop of arbitrary degree tracking at a specified SNR and steady-state phase error. It also presents a simple approximate formula that is asymptotically tight at higher loop SNR.

Ultra-low noise optical phase-locked loop

NASA Astrophysics Data System (ADS)

Ayotte, Simon; Babin, André; Costin, François

2014-03-01

The relative phase between two fiber lasers is controlled via a high performance optical phase-locked loop (OPLL). Two parameters are of particular importance for the design: the intrinsic phase noise of the laser (i.e. its linewidth) and a high-gain, low-noise electronic locking loop. In this work, one of the lowest phase noise fiber lasers commercially available was selected (i.e. NP Photonics Rock fiber laser module), with sub-kHz linewidth at 1550.12 nm. However, the fast tuning mechanism of such lasers is through stretching its cavity length with a piezoelectric transducer which has a few 10s kHz bandwidth. To further increase the locking loop bandwidth to several MHz, a second tuning mechanism is used by adding a Lithium Niobate phase modulator in the laser signal path. The OPLL is thus divided into two locking loops, a slow loop acting on the laser piezoelectric transducer and a fast loop acting on the phase modulator. The beat signal between the two phase-locked lasers yields a highly pure sine wave with an integrated phase error of 0.0012 rad. This is orders of magnitude lower than similar existing systems such as the Laser Synthesizer used for distribution of photonic local oscillator (LO) for the Atacama Large Millimeter Array radio telescope in Chile. Other applications for ultra-low noise OPLL include coherent power combining, Brillouin sensing, light detection and ranging (LIDAR), fiber optic gyroscopes, phased array antenna and beam steering, generation of LOs for next generation coherent communication systems, coherent analog optical links, terahertz generation and coherent spectroscopy.

Optically phase-locked electronic speckle pattern interferometer

NASA Astrophysics Data System (ADS)

Moran, Steven E.; Law, Robert; Craig, Peter N.; Goldberg, Warren M.

1987-02-01

The design, theory, operation, and characteristics of an optically phase-locked electronic speckle pattern interferometer (OPL-ESPI) are described. The OPL-ESPI system couples an optical phase-locked loop with an ESPI system to generate real-time equal Doppler speckle contours of moving objects from unstable sensor platforms. In addition, the optical phase-locked loop provides the basis for a new ESPI video signal processing technique which incorporates local oscillator phase shifting coupled with video sequential frame subtraction.

Closed-Loop Control of Vortex Formation in Separated Flows

NASA Technical Reports Server (NTRS)

Colonius, Tim; Joe, Won Tae; MacMynowski, Doug; Rowley, Clancy; Taira, Sam; Ahuja, Sunil

2010-01-01

In order to phase lock the flow at the desired shedding cycle, particularly at Phi,best, We designed a feedback compensator. (Even though the open-loop forcing at Wf below Wn can lead to phase-locked limit cycles with a high average lift,) This feedback controller resulted in the phase-locked limit cycles that the open-loop control could not achieve for alpha=30 and 40 Particularly for alpha=40, the feedback was able to stabilize the limit cycle that was not stable with any of the open-loop periodic forcing. This results in stable phase-locked limit cycles for a larger range of forcing frequencies than the open-loop control. Also, it was shown that the feedback achieved the high-lift unsteady flow states that open-loop control could not sustain even after the states have been achieved for a long period of time.

Behaviour of fractional loop delay zero crossing digital phase locked loop (FR-ZCDPLL)

NASA Astrophysics Data System (ADS)

Nasir, Qassim

2018-01-01

This article analyses the performance of the first-order zero crossing digital phase locked loops (FR-ZCDPLL) when fractional loop delay is added to loop. The non-linear dynamics of the loop is presented, analysed and examined through bifurcation behaviour. Numerical simulation of the loop is conducted to proof the mathematical analysis of the loop operation. The results of the loop simulation show that the proposed FR-ZCDPLL has enhanced the performance compared to the conventional zero crossing DPLL in terms of wider lock range, captured range and stable operation region. In addition, extensive experimental simulation was conducted to find the optimum loop parameters for different loop environmental conditions. The addition of the fractional loop delay network in the conventional loop also reduces the phase jitter and its variance especially when the signal-to-noise ratio is low.

Hidden attractors in dynamical models of phase-locked loop circuits: Limitations of simulation in MATLAB and SPICE

NASA Astrophysics Data System (ADS)

Kuznetsov, N. V.; Leonov, G. A.; Yuldashev, M. V.; Yuldashev, R. V.

2017-10-01

During recent years it has been shown that hidden oscillations, whose basin of attraction does not overlap with small neighborhoods of equilibria, may significantly complicate simulation of dynamical models, lead to unreliable results and wrong conclusions, and cause serious damage in drilling systems, aircrafts control systems, electromechanical systems, and other applications. This article provides a survey of various phase-locked loop based circuits (used in satellite navigation systems, optical, and digital communication), where such difficulties take place in MATLAB and SPICE. Considered examples can be used for testing other phase-locked loop based circuits and simulation tools, and motivate the development and application of rigorous analytical methods for the global analysis of phase-locked loop based circuits.

Dynamic tracking down-conversion signal processing method based on reference signal for grating heterodyne interferometer

NASA Astrophysics Data System (ADS)

Wang, Guochao; Yan, Shuhua; Zhou, Weihong; Gu, Chenhui

2012-08-01

Traditional displacement measurement systems by grating, which purely make use of fringe intensity to implement fringe count and subdivision, have rigid demands for signal quality and measurement condition, so they are not easy to realize measurement with nanometer precision. Displacement measurement with the dual-wavelength and single-grating design takes advantage of the single grating diffraction theory and the heterodyne interference theory, solving quite well the contradiction between large range and high precision in grating displacement measurement. To obtain nanometer resolution and nanometer precision, high-power subdivision of interference fringes must be realized accurately. A dynamic tracking down-conversion signal processing method based on the reference signal is proposed. Accordingly, a digital phase measurement module to realize high-power subdivision on field programmable gate array (FPGA) was designed, as well as a dynamic tracking down-conversion module using phase-locked loop (PLL). Experiments validated that a carrier signal after down-conversion can constantly maintain close to 100 kHz, and the phase-measurement resolution and phase precision are more than 0.05 and 0.2 deg, respectively. The displacement resolution and the displacement precision, corresponding to the phase results, are 0.139 and 0.556 nm, respectively.

Digital Phase-Locked Loop With Phase And Frequency Feedback

NASA Technical Reports Server (NTRS)

Thomas, J. Brooks

1991-01-01

Advanced design for digital phase-lock loop (DPLL) allows loop gains higher than those used in other designs. Divided into two major components: counterrotation processor and tracking processor. Notable features include use of both phase and rate-of-change-of-phase feedback instead of frequency feedback alone, normalized sine phase extractor, improved method for extracting measured phase, and improved method for "compressing" output rate.

On the performance of digital phase locked loops in the threshold region

NASA Technical Reports Server (NTRS)

Hurst, G. T.; Gupta, S. C.

1974-01-01

Extended Kalman filter algorithms are used to obtain a digital phase lock loop structure for demodulation of angle modulated signals. It is shown that the error variance equations obtained directly from this structure enable one to predict threshold if one retains higher frequency terms. This is in sharp contrast to the similar analysis of the analog phase lock loop, where the higher frequency terms are filtered out because of the low pass filter in the loop. Results are compared to actual simulation results and threshold region results obtained previously.

Note: Low phase noise programmable phase-locked loop with high temperature stability.

PubMed

Michálek, Vojtěch; Procházka, Ivan

2017-03-01

The design and construction of low jitter programmable phase-locked loop with low temperature coefficient of phase are presented. It has been designed for demanding high precision timing applications, especially as a clock source for event timer with subpicosecond precision. The phase-locked loop itself has a jitter of few hundreds of femtoseconds. It produces square wave with programmable output frequency from 100 MHz to 500 MHz and programmable amplitude of 0.25 V to 1.2 V peak-to-peak, which is locked to 5 MHz or 10 MHz reference frequency common for disciplined oscillators and highly stable clocks such as hydrogen maser. Moreover, it comprises an on-board temperature compensated crystal oscillator for stand-alone usage. The device provides temperature coefficient of the phase lock of 0.9 ps/K near room temperature.

A low jitter all - digital phase - locked loop in 180 nm CMOS technology

NASA Astrophysics Data System (ADS)

Shumkin, O. V.; Butuzov, V. A.; Normanov, D. D.; Ivanov, P. Yu

2016-02-01

An all-digital phase locked loop (ADPLL) was implemented in 180 nm CMOS technology. The proposed ADPLL uses a digitally controlled oscillator to achieve 3 ps resolution. The pure digital phase locked loop is attractive because it is less sensitive to noise and operating conditions than its analog counterpart. The proposed ADPLL can be easily applied to different process as a soft IP block, making it very suitable for system-on-chip applications.

Performance evaluation of digital phase-locked loops for advanced deep space transponders

NASA Technical Reports Server (NTRS)

Nguyen, T. M.; Hinedi, S. M.; Yeh, H.-G.; Kyriacou, C.

1994-01-01

The performances of the digital phase-locked loops (DPLL's) for the advanced deep-space transponders (ADT's) are investigated. DPLL's considered in this article are derived from the analog phase-locked loop, which is currently employed by the NASA standard deep space transponder, using S-domain to Z-domain mapping techniques. Three mappings are used to develop digital approximations of the standard deep space analog phase-locked loop, namely the bilinear transformation (BT), impulse invariant transformation (IIT), and step invariant transformation (SIT) techniques. The performance in terms of the closed loop phase and magnitude responses, carrier tracking jitter, and response of the loop to the phase offset (the difference between in incoming phase and reference phase) is evaluated for each digital approximation. Theoretical results of the carrier tracking jitter for command-on and command-off cases are then validated by computer simulation. Both theoretical and computer simulation results show that at high sampling frequency, the DPLL's approximated by all three transformations have the same tracking jitter. However, at low sampling frequency, the digital approximation using BT outperforms the others. The minimum sampling frequency for adequate tracking performance is determined for each digital approximation of the analog loop. In addition, computer simulation shows that the DPLL developed by BT provides faster response to the phase offset than IIT and SIT.

Climatology of GPS signal loss observed by Swarm satellites

NASA Astrophysics Data System (ADS)

Xiong, Chao; Stolle, Claudia; Park, Jaeheung

2018-04-01

By using 3-year global positioning system (GPS) measurements from December 2013 to November 2016, we provide in this study a detailed survey on the climatology of the GPS signal loss of Swarm onboard receivers. Our results show that the GPS signal losses prefer to occur at both low latitudes between ±5 and ±20° magnetic latitude (MLAT) and high latitudes above 60° MLAT in both hemispheres. These events at all latitudes are observed mainly during equinoxes and December solstice months, while totally absent during June solstice months. At low latitudes the GPS signal losses are caused by the equatorial plasma irregularities shortly after sunset, and at high latitude they are also highly related to the large density gradients associated with ionospheric irregularities. Additionally, the high-latitude events are more often observed in the Southern Hemisphere, occurring mainly at the cusp region and along nightside auroral latitudes. The signal losses mainly happen for those GPS rays with elevation angles less than 20°, and more commonly occur when the line of sight between GPS and Swarm satellites is aligned with the shell structure of plasma irregularities. Our results also confirm that the capability of the Swarm receiver has been improved after the bandwidth of the phase-locked loop (PLL) widened, but the updates cannot radically avoid the interruption in tracking GPS satellites caused by the ionospheric plasma irregularities. Additionally, after the PLL bandwidth increased larger than 0.5 Hz, some unexpected signal losses are observed even at middle latitudes, which are not related to the ionospheric plasma irregularities. Our results suggest that rather than 1.0 Hz, a PLL bandwidth of 0.5 Hz is a more suitable value for the Swarm receiver.

Noise in NC-AFM measurements with significant tip–sample interaction

PubMed Central

Lübbe, Jannis; Temmen, Matthias

2016-01-01

The frequency shift noise in non-contact atomic force microscopy (NC-AFM) imaging and spectroscopy consists of thermal noise and detection system noise with an additional contribution from amplitude noise if there are significant tip–sample interactions. The total noise power spectral density D Δ f(f m) is, however, not just the sum of these noise contributions. Instead its magnitude and spectral characteristics are determined by the strongly non-linear tip–sample interaction, by the coupling between the amplitude and tip–sample distance control loops of the NC-AFM system as well as by the characteristics of the phase locked loop (PLL) detector used for frequency demodulation. Here, we measure D Δ f(f m) for various NC-AFM parameter settings representing realistic measurement conditions and compare experimental data to simulations based on a model of the NC-AFM system that includes the tip–sample interaction. The good agreement between predicted and measured noise spectra confirms that the model covers the relevant noise contributions and interactions. Results yield a general understanding of noise generation and propagation in the NC-AFM and provide a quantitative prediction of noise for given experimental parameters. We derive strategies for noise-optimised imaging and spectroscopy and outline a full optimisation procedure for the instrumentation and control loops. PMID:28144538

Performance Improvement of Receivers Based on Ultra-Tight Integration in GNSS-Challenged Environments

PubMed Central

Qin, Feng; Zhan, Xingqun; Du, Gang

2013-01-01

Ultra-tight integration was first proposed by Abbott in 2003 with the purpose of integrating a global navigation satellite system (GNSS) and an inertial navigation system (INS). This technology can improve the tracking performances of a receiver by reconfiguring the tracking loops in GNSS-challenged environments. In this paper, the models of all error sources known to date in the phase lock loops (PLLs) of a standard receiver and an ultra-tightly integrated GNSS/INS receiver are built, respectively. Based on these models, the tracking performances of the two receivers are compared to verify the improvement due to the ultra-tight integration. Meanwhile, the PLL error distributions of the two receivers are also depicted to analyze the error changes of the tracking loops. These results show that the tracking error is significantly reduced in the ultra-tightly integrated GNSS/INS receiver since the receiver's dynamics are estimated and compensated by an INS. Moreover, the mathematical relationship between the tracking performances of the ultra-tightly integrated GNSS/INS receiver and the quality of the selected inertial measurement unit (IMU) is derived from the error models and proved by the error comparisons of four ultra-tightly integrated GNSS/INS receivers aided by different grade IMUs.

Noise in NC-AFM measurements with significant tip-sample interaction.

PubMed

Lübbe, Jannis; Temmen, Matthias; Rahe, Philipp; Reichling, Michael

2016-01-01

The frequency shift noise in non-contact atomic force microscopy (NC-AFM) imaging and spectroscopy consists of thermal noise and detection system noise with an additional contribution from amplitude noise if there are significant tip-sample interactions. The total noise power spectral density D Δ f ( f m ) is, however, not just the sum of these noise contributions. Instead its magnitude and spectral characteristics are determined by the strongly non-linear tip-sample interaction, by the coupling between the amplitude and tip-sample distance control loops of the NC-AFM system as well as by the characteristics of the phase locked loop (PLL) detector used for frequency demodulation. Here, we measure D Δ f ( f m ) for various NC-AFM parameter settings representing realistic measurement conditions and compare experimental data to simulations based on a model of the NC-AFM system that includes the tip-sample interaction. The good agreement between predicted and measured noise spectra confirms that the model covers the relevant noise contributions and interactions. Results yield a general understanding of noise generation and propagation in the NC-AFM and provide a quantitative prediction of noise for given experimental parameters. We derive strategies for noise-optimised imaging and spectroscopy and outline a full optimisation procedure for the instrumentation and control loops.

Loran digital phase-locked loop and RF front-end system error analysis

NASA Technical Reports Server (NTRS)

Mccall, D. L.

1979-01-01

An analysis of the system performance of the digital phase locked loops (DPLL) and RF front end that are implemented in the MINI-L4 Loran receiver is presented. Three of the four experiments deal with the performance of the digital phase locked loops. The other experiment deals with the RF front end and DPLL system error which arise in the front end due to poor signal to noise ratios. The ability of the DPLLs to track the offsets is studied.

An all-digital phase-locked loop demodulator based on FPGA

NASA Astrophysics Data System (ADS)

Gong, X. F.; Cui, Z. D.

2017-09-01

This paper studied the principle of analogue phase-locked loop demodulation and work process of digital phase-locked loop. It is found that the higher the reference signal frequency is, the smaller the duty ratio of the discriminator output signal is. Carrier detection is achieved by using this relationship. The experimental results indicate that the demodulator based on the principle could realize high-quality transmission of digital signals and could be an effective FM communication mode for studying wireless transmission of digital signals.

Digital phase-locked loop

NASA Technical Reports Server (NTRS)

Cliff, R. A. (Inventor)

1975-01-01

An digital phase-locked loop is provided for deriving a loop output signal from an accumulator output terminal. A phase detecting exclusive OR gate is fed by the loop digital input and output signals. The output of the phase detector is a bi-level digital signal having a duty cycle indicative of the relative phase of the input and output signals. The accumulator is incremented at a first rate in response to a first output level of the phase detector and at a second rate in response to a second output level of the phase detector.

An all digital phase locked loop for synchronization of a sinusoidal signal embedded in white Gaussian noise

NASA Technical Reports Server (NTRS)

Reddy, C. P.; Gupta, S. C.

1973-01-01

An all digital phase locked loop which tracks the phase of the incoming sinusoidal signal once per carrier cycle is proposed. The different elements and their functions and the phase lock operation are explained in detail. The nonlinear difference equations which govern the operation of the digital loop when the incoming signal is embedded in white Gaussian noise are derived, and a suitable model is specified. The performance of the digital loop is considered for the synchronization of a sinusoidal signal. For this, the noise term is suitably modelled which allows specification of the output probabilities for the two level quantizer in the loop at any given phase error. The loop filter considered increases the probability of proper phase correction. The phase error states in modulo two-pi forms a finite state Markov chain which enables the calculation of steady state probabilities, RMS phase error, transient response and mean time for cycle skipping.

A 2.4 GHz ULP reconfigurable asymmetric transceiver for single-chip wireless neural recording IC.

PubMed

Tan, Jun; Liew, Wen-Sin; Heng, Chun-Huat; Lian, Yong

2014-08-01

This paper presents a 2.4 GHz ultra-low-power (ULP) reconfigurable asymmetric transceiver and demonstrates its application in wireless neural recording. Fabricated in 0.13 μm CMOS technology, the transceiver is optimized for sensor-gateway communications within a star-shaped network, and supports both the sensor and gateway operation modes. Binary phase-shift keying (BPSK) modulation with high data rate (DR) of 1 to 8 Mbps is used in the uplink from sensor to gateway, while on-off keying (OOK) modulation with low DR of 100 kbps is adopted in the downlink. A fully integrated Class-E PA with moderate output power has also been proposed and achieves power efficiency of 53%. To minimize area usage, inductor reuse is adopted between PA and LNA, and eliminates the need of lossy T/R switch in the RF signal path. When used as sensor, the transceiver with frequency locked phase-locked loop (PLL) achieves TX (BPSK) power efficiency of 28% @ 0 dBm output power, and RX (OOK) sensitivity of -80 dBm @ 100 kbps while consuming only 780 μW . When configured as gateway, the transceiver achieves sensitivity levels of -92, -84.5, and -77 dBm for 1, 5, and 8 Mbps BPSK, respectively. The transceiver is integrated with an 8-channel neural recording front-end, and neural signals from a rat are captured to verify the system functionality.

Non-linear control of the output stage of a solar microinverter

NASA Astrophysics Data System (ADS)

Lopez-Santos, Oswaldo; Garcia, Germain; Martinez-Salamero, Luis; Avila-Martinez, Juan C.; Seguier, Lionel

2017-01-01

This paper presents a proposal to control the output stage of a two-stage solar microinverter to inject real power into the grid. The input stage of the microinverter is used to extract the maximum available power of a photovoltaic module enforcing a power source behavior in the DC-link to feed the output stage. The work here reported is devoted to control a grid-connected power source inverter with a high power quality level at the grid side ensuring the power balance of the microinverter regulating the voltage of the DC-link. The proposed control is composed of a sinusoidal current reference generator and a cascade type controller composed by a current tracking loop and a voltage regulation loop. The current reference is obtained using a synchronized generator based on phase locked loop (PLL) which gives the shape, the frequency and phase of the current signal. The amplitude of the reference is obtained from a simple controller regulating the DC-link voltage. The tracking of the current reference is accomplished by means of a first-order sliding mode control law. The solution takes advantage of the rapidity and inherent robustness of the sliding mode current controller allowing a robust behavior in the regulation of the DC-link using a simple linear controller. The analytical expression to determine the power quality indicators of the micro-inverter's output is theoretically solved giving expressions relating the converter parameters. The theoretical approach is validated using simulation and experimental results.

Multifrequency zero-jitter delay-locked loop

NASA Astrophysics Data System (ADS)

Efendovich, Avner; Afek, Yachin; Sella, Coby; Bikowsky, Zeev

1994-01-01

The approach of an all-digital phase locked loop is used in this delay-locked loop circuit. This design is designated to a system with two processing units, a master CPU and a slave system chip, that share the same bus. It allows maximum utilization of the bus, as the minimal skew between the clocks of the two components significantly reduces idle periods, and also set-up and hold times. Changes in the operating frequency are possible, without falling out of synchronization. Due to the special lead-lag phase detector, the jitter of the clock is zero, when the loop is locked, under any working conditions.

Costas loop lock detection in the advanced receiver

NASA Technical Reports Server (NTRS)

Mileant, A.; Hinedi, S.

1989-01-01

The advanced receiver currently being developed uses a Costas digital loop to demodulate the subcarrier. Previous analyses of lock detector algorithms for Costas loops have ignored the effects of the inherent correlation between the samples of the phase-error process. Accounting for this correlation is necessary to achieve the desired lock-detection probability for a given false-alarm rate. Both analysis and simulations are used to quantify the effects of phase correlation on lock detection for the square-law and the absolute-value type detectors. Results are obtained which depict the lock-detection probability as a function of loop signal-to-noise ratio for a given false-alarm rate. The mathematical model and computer simulation show that the square-law detector experiences less degradation due to phase jitter than the absolute-value detector and that the degradation in detector signal-to-noise ratio is more pronounced for square-wave than for sine-wave signals.

An Autonomous Satellite Time Synchronization System Using Remotely Disciplined VC-OCXOs

PubMed Central

Gu, Xiaobo; Chang, Qing; Glennon, Eamonn P.; Xu, Baoda; Dempseter, Andrew G.; Wang, Dun; Wu, Jiapeng

2015-01-01

An autonomous remote clock control system is proposed to provide time synchronization and frequency syntonization for satellite to satellite or ground to satellite time transfer, with the system comprising on-board voltage controlled oven controlled crystal oscillators (VC-OCXOs) that are disciplined to a remote master atomic clock or oscillator. The synchronization loop aims to provide autonomous operation over extended periods, be widely applicable to a variety of scenarios and robust. A new architecture comprising the use of frequency division duplex (FDD), synchronous time division (STDD) duplex and code division multiple access (CDMA) with a centralized topology is employed. This new design utilizes dual one-way ranging methods to precisely measure the clock error, adopts least square (LS) methods to predict the clock error and employs a third-order phase lock loop (PLL) to generate the voltage control signal. A general functional model for this system is proposed and the error sources and delays that affect the time synchronization are discussed. Related algorithms for estimating and correcting these errors are also proposed. The performance of the proposed system is simulated and guidance for selecting the clock is provided. PMID:26213929

Stabilization and control of the carrier-envelope phase of high-power femtosecond laser pulses using the direct locking technique.

PubMed

Imran, Tayyab; Lee, Yong S; Nam, Chang H; Hong, Kyung-Han; Yu, Tae J; Sung, Jae H

2007-01-08

We have stabilized and electronically controlled the carrier-envelope phase (CEP) of high-power femtosecond laser pulses, generated in a grating-based chirped-pulse amplification kHz Ti:sapphire laser, using the direct locking technique [Opt. Express 13, 2969 (2005)] combined with a slow feedback loop. An f-2f spectral interferometer has shown the CEP stabilities of 1.2 rad with the direct locking loop applied to the oscillator and of 180 mrad with an additional slow feedback loop, respectively. The electronic CEP modulations that can be easily realized in the direct locking loop are also demonstrated with the amplified pulses.

Femtogram Mass Biosensor Using Self-Sensing Cantilever for Allergy Check

NASA Astrophysics Data System (ADS)

Sone, Hayato; Ikeuchi, Ayumi; Izumi, Takashi; Okano, Haruki; Hosaka, Sumio

2006-03-01

A self-sensing mass biosensor with a femtogram mass sensitivity has been developed using a piezoresistive microcantilever. The mass change due to antigen and antibody adsorption on the cantilever in water was detected by the resonance frequency shift of the cantilever. We constructed a prototype harmonic vibration sensor using a commercial piezoresistive cantilever, Wheatstone bridge circuits, a positive feedback controller, an exciting piezoactuator and a phase-locked loop (PLL) demodulator. As experimental results, a mass sensitivity of about 190 fg/Hz, and a mass resolution of about 500 fg were obtained in water. The mass sensitivity is 100 times higher than that of a quartz crystal oscillation method. We demonstrated that the sensor can detect the reaction between an antibody of immunoglobulin (IgG) and an antigen of egg albumen (OVA). We confirmed that the binding ratio between the antibody and the antigen was about 1 : 2. The detection method is available for allergy check because the measured reaction ratio occurring on the cantilever concurs with the theoretical method.

VCSEL-based optical transceiver module operating at 25 Gb/s and using a single CMOS IC

NASA Astrophysics Data System (ADS)

Afriat, Gil; Horwitz, Lior; Lazar, Dror; Issachar, Assaf; Pogrebinsky, Alexander; Ran, Adee; Shoor, Ehud; Bar, Roi; Saba, Rushdy

2012-01-01

We present here a low cost, small form factor, optical transceiver module composed of a CMOS IC transceiver, 850 nm emission wavelength VCSEL modulated at 25 Gb/s, and an InGaAs/InP PIN Photo Diode (PD). The transceiver IC is fabricated in a standard 28 nm CMOS process and integrates the analog circuits interfacing the VCSEL and PD, namely the VCSEL driver and Transimpedance Amplifier (TIA), as well as all other required transmitter and receiver circuits like Phase Locked Loop (PLL), Post Amplifier and Clock & Data Recovery (CDR). The transceiver module couples into a 62.5/125 um multi-mode (OM1) TX/RX fiber pair via a low cost plastic cover realizing the transmitter and receiver lens systems and demonstrates BER < 10-12 at the 25 Gb/s data rate over a distance of 3 meters. Using a 50/125 um laser optimized multi-mode fiber (OM3), the same performance was achieved over a distance of 30 meters.

Design of a Humidity Sensor Tag for Passive Wireless Applications.

PubMed

Wu, Xiang; Deng, Fangming; Hao, Yong; Fu, Zhihui; Zhang, Lihua

2015-10-07

This paper presents a wireless humidity sensor tag for low-cost and low-power applications. The proposed humidity sensor tag, based on radio frequency identification (RFID) technology, was fabricated in a standard 0.18 μm complementary metal oxide semiconductor (CMOS) process. The top metal layer was deposited to form the interdigitated electrodes, which were then filled with polyimide as the humidity sensing layer. A two-stage rectifier adopts a dynamic bias-voltage generator to boost the effective gate-source voltage of the switches in differential-drive architecture, resulting in a flat power conversion efficiency curve. The capacitive sensor interface, based on phase-locked loop (PLL) theory, employs a simple architecture and can work with 0.5 V supply voltage. The measurement results show that humidity sensor tag achieves excellent linearity, hysteresis and stability performance. The total power-dissipation of the sensor tag is 2.5 μW, resulting in a maximum operating distance of 23 m under 4 W of radiation power of the RFID reader.

Novel Concrete Temperature Monitoring Method Based on an Embedded Passive RFID Sensor Tag.

PubMed

Liu, Yongsheng; Deng, Fangming; He, Yigang; Li, Bing; Liang, Zhen; Zhou, Shuangxi

2017-06-22

This paper firstly introduces the importance of temperature control in concrete measurement, then a passive radio frequency identification (RFID) sensor tag embedded for concrete temperature monitoring is presented. In order to reduce the influences of concrete electromagnetic parameters during the drying process, a T-type antenna is proposed to measure the concrete temperature at the required depth. The proposed RFID sensor tag is based on the EPC generation-2 ultra-high frequency (UHF) communication protocol and operates in passive mode. The temperature sensor can convert the sensor signals to corresponding digital signals without an external reference clock due to the adoption of phase-locked loop (PLL)-based architecture. Laboratory experimentation and on-site testing demonstrate that our sensor tag embedded in concrete can provide reliable communication performance in passive mode. The maximum communicating distance between reader and tag is 7 m at the operating frequency of 915 MHz and the tested results show high consistency with the results tested by a thermocouple.

Design of a Humidity Sensor Tag for Passive Wireless Applications

PubMed Central

Wu, Xiang; Deng, Fangming; Hao, Yong; Fu, Zhihui; Zhang, Lihua

2015-01-01

This paper presents a wireless humidity sensor tag for low-cost and low-power applications. The proposed humidity sensor tag, based on radio frequency identification (RFID) technology, was fabricated in a standard 0.18 μm complementary metal oxide semiconductor (CMOS) process. The top metal layer was deposited to form the interdigitated electrodes, which were then filled with polyimide as the humidity sensing layer. A two-stage rectifier adopts a dynamic bias-voltage generator to boost the effective gate-source voltage of the switches in differential-drive architecture, resulting in a flat power conversion efficiency curve. The capacitive sensor interface, based on phase-locked loop (PLL) theory, employs a simple architecture and can work with 0.5 V supply voltage. The measurement results show that humidity sensor tag achieves excellent linearity, hysteresis and stability performance. The total power-dissipation of the sensor tag is 2.5 μW, resulting in a maximum operating distance of 23 m under 4 W of radiation power of the RFID reader. PMID:26457707

Novel Concrete Temperature Monitoring Method Based on an Embedded Passive RFID Sensor Tag

PubMed Central

Liu, Yongsheng; Deng, Fangming; He, Yigang; Li, Bing; Liang, Zhen; Zhou, Shuangxi

2017-01-01

This paper firstly introduces the importance of temperature control in concrete measurement, then a passive radio frequency identification (RFID) sensor tag embedded for concrete temperature monitoring is presented. In order to reduce the influences of concrete electromagnetic parameters during the drying process, a T-type antenna is proposed to measure the concrete temperature at the required depth. The proposed RFID sensor tag is based on the EPC generation-2 ultra-high frequency (UHF) communication protocol and operates in passive mode. The temperature sensor can convert the sensor signals to corresponding digital signals without an external reference clock due to the adoption of phase-locked loop (PLL)-based architecture. Laboratory experimentation and on-site testing demonstrate that our sensor tag embedded in concrete can provide reliable communication performance in passive mode. The maximum communicating distance between reader and tag is 7 m at the operating frequency of 915 MHz and the tested results show high consistency with the results tested by a thermocouple. PMID:28640188

Highly integrated optical heterodyne phase-locked loop with phase/frequency detection.

PubMed

Lu, Mingzhi; Park, Hyunchul; Bloch, Eli; Sivananthan, Abirami; Bhardwaj, Ashish; Griffith, Zach; Johansson, Leif A; Rodwell, Mark J; Coldren, Larry A

2012-04-23

A highly-integrated optical phase-locked loop with a phase/frequency detector and a single-sideband mixer (SSBM) has been proposed and demonstrated for the first time. A photonic integrated circuit (PIC) has been designed, fabricated and tested, together with an electronic IC (EIC). The PIC integrates a widely-tunable sampled-grating distributed-Bragg-reflector laser, an optical 90 degree hybrid and four high-speed photodetectors on the InGaAsP/InP platform. The EIC adds a single-sideband mixer, and a digital phase/frequency detector, to provide single-sideband heterodyne locking from -9 GHz to 7.5 GHz. The loop bandwith is 400 MHz. © 2012 Optical Society of America

Two AFC Loops For Low CNR And High Dynamics

NASA Technical Reports Server (NTRS)

Hinedi, Sami M.; Aguirre, Sergio

1992-01-01

Two alternative digital automatic-frequency-control (AFC) loops proposed to acquire (or reacquire) and track frequency of received carrier radio signal. Intended for use where carrier-to-noise ratios (CNR's) low and carrier frequency characterized by high Doppler shift and Doppler rate because of high relative speed and acceleration, respectively, between transmitter and receiver. Either AFC loops used in place of phase-locked loop. New loop concepts integrate ideas from classical spectrum-estimation, digital-phase-locked-loop, and Kalman-Filter theories.

All-digital phase-locked loop with 50-cycle lock time suitable for high-performance microprocessors

NASA Astrophysics Data System (ADS)

Dunning, Jim; Garcia, Gerald; Lundberg, Jim; Nuckolls, Ed

1995-04-01

A frequency-synthesizing, all-digital phase-locked loop (ADPLL) is fully integrated with a 0.5 micron CMOS microprocessor. The ADPLL has a 50-cycle phase lock, has a gain mechanism independent of process, voltage, and temperature, and is immune to input jitter. A digitally-controlled oscillator (DCO) forms the core of the ADPLL and operates from 50 to 550 MHz, running at 4x the reference clock frequency. The DCO has 16 b of binarily weighted control and achieves LSB resolution under 500 fs.

Binary phase lock loops for simplified OMEGA receivers

NASA Technical Reports Server (NTRS)

Burhans, R. W.

1974-01-01

A sampled binary phase lock loop is proposed for periodically correcting OMEGA receiver internal clocks. The circuit is particularly simple to implement and provides a means of generating long range 3.4 KHz difference frequency lanes from simultaneous pair measurements.

RFI in hybrid loops - Simulation and experimental results.

NASA Technical Reports Server (NTRS)

Ziemer, R. E.; Nelson, D. R.; Raghavan, H. R.

1972-01-01

A digital simulation of an imperfect second-order hybrid phase-locked loop (HPLL) operating in radio frequency interference (RFI) is described. Its performance is characterized in terms of phase error variance and phase error probability density function (PDF). Monte-Carlo simulation is used to show that the HPLL can be superior to the conventional phase-locked loops in RFI backgrounds when minimum phase error variance is the goodness criterion. Similar experimentally obtained data are given in support of the simulation data.

A simple second-order digital phase-locked loop.

NASA Technical Reports Server (NTRS)

Tegnelia, C. R.

1972-01-01

A simple second-order digital phase-locked loop has been designed for the Viking Orbiter 1975 command system. Excluding analog-to-digital conversion, implementation of the loop requires only an adder/subtractor, two registers, and a correctable counter with control logic. The loop considers only the polarity of phase error and corrects system clocks according to a filtered sequence of this polarity. The loop is insensitive to input gain variation, and therefore offers the advantage of stable performance over long life. Predictable performance is guaranteed by extreme reliability of acquisition, yet in the steady state the loop produces only a slight degradation with respect to analog loop performance.

Digital frequency offset-locked He–Ne laser system with high beat frequency stability, narrow optical linewidth and optical fibre output

NASA Astrophysics Data System (ADS)

Sternkopf, Christian; Manske, Eberhard

2018-06-01

We report on the enhancement of a previously-presented heterodyne laser source on the basis of two phase-locked loop (PLL) frequency coupled internal-mirror He–Ne lasers. Our new system consists of two digitally controlled He–Ne lasers with slightly different wavelengths, and offers high-frequency stability and very narrow optical linewidth. The digitally controlled system has been realized by using a FPGA controller and transconductance amplifiers. The light of both lasers was coupled into separate fibres for heterodyne interferometer applications. To enhance the laser performance we observed the sensitivity of both laser tubes to electromagnetic noise from various laser power supplies and frequency control systems. Furthermore, we describe how the linewidth of a frequency-controlled He–Ne laser can be reduced during precise frequency stabilisation. The digitally controlled laser source reaches a standard beat frequency deviation of less than 20 Hz (with 1 s gate time) and a spectral full width at half maximum (FWHM) of the beat signal less than 3 kHz. The laser source has enough optical output power to serve a fibre-coupled multi axis heterodyne interferometer. The system can be adjusted to output beat frequencies in the range of 0.1 MHz–20 MHz.

Heart-Rate and Breath-Rate Monitor

NASA Technical Reports Server (NTRS)

Cooper, T. G.

1983-01-01

Circuit requiring only four integrated circuits (IC's) measures both heart rate and breath rate. Phase-locked loops lock on heart-rate and respiration-rate input signals. Each loop IC contains two phase comparators. Positive-edge-triggered circuit used in making monitors insensitive to dutycycle variations.

Controlled-Root Approach To Digital Phase-Locked Loops

NASA Technical Reports Server (NTRS)

Stephens, Scott A.; Thomas, J. Brooks

1995-01-01

Performance tailored more flexibly and directly to satisfy design requirements. Controlled-root approach improved method for analysis and design of digital phase-locked loops (DPLLs). Developed rigorously from first principles for fully digital loops, making DPLL theory and design simpler and more straightforward (particularly for third- or fourth-order DPLL) and controlling performance more accurately in case of high gain.

Fringe pattern demodulation with a two-frame digital phase-locked loop algorithm.

PubMed

Gdeisat, Munther A; Burton, David R; Lalor, Michael J

2002-09-10

A novel technique called a two-frame digital phase-locked loop for fringe pattern demodulation is presented. In this scheme, two fringe patterns with different spatial carrier frequencies are grabbed for an object. A digital phase-locked loop algorithm tracks and demodulates the phase difference between both fringe patterns by employing the wrapped phase components of one of the fringe patterns as a reference to demodulate the second fringe pattern. The desired phase information can be extracted from the demodulated phase difference. We tested the algorithm experimentally using real fringe patterns. The technique is shown to be suitable for noncontact measurement of objects with rapid surface variations, and it outperforms the Fourier fringe analysis technique in this aspect. Phase maps produced withthis algorithm are noisy in comparison with phase maps generated with the Fourier fringe analysis technique.

Near optimum digital phase locked loops.

NASA Technical Reports Server (NTRS)

Polk, D. R.; Gupta, S. C.

1972-01-01

Near optimum digital phase locked loops are derived utilizing nonlinear estimation theory. Nonlinear approximations are employed to yield realizable loop structures. Baseband equivalent loop gains are derived which under high signal to noise ratio conditions may be calculated off-line. Additional simplifications are made which permit the application of the Kalman filter algorithms to determine the optimum loop filter. Performance is evaluated by a theoretical analysis and by simulation. Theoretical and simulated results are discussed and a comparison to analog results is made.

2.4-3.2 GHz robust self-injecting injection-locked phase-locked loop

NASA Astrophysics Data System (ADS)

Yang, Jincheng; Zhang, Zhao; Qi, Nan; Liu, Liyuan; Liu, Jian; Wu, Nanjian

2018-04-01

In this paper, we propose a robust self-injecting injection-locked phase-locked loop (SI-ILPLL). It adopts a phase alignment loop (PAL) based on a subsampling phase frequency detector to align the phase between the injected pulse and the voltage-controlled oscillator (VCO) output. With the proposed phase frequency detector, the PAL performs phase alignment and the pulse generator can self-inject pulses into the VCO for injection locking. The subsampling phase detection and self-injection locking techniques can suppress the phase noise of the SI-ILPLL. The SI-ILPLL shows excellent robustness to environmental interference. The SI-ILPLL is implemented in 65 nm CMOS technology. It occupies an active area of 0.7 mm2. The measured root-mean-square (RMS) jitters at 3.2 GHz output without and with injection locking are 216 and 131 fs, respectively. When the supply voltage varies from 1.17 to 1.23 V and the temperature varies from 0 to 80 °C, the maximum jitter variation of all the output frequencies is less than 50 fs. The measured results demonstrate that even when a large interference appears at the supply voltage and unlocks the SI-ILPLL, the SI-ILPLL can self-recover its injection-locked state rapidly after the disturbance disappears, whereas the conventional ILPLL cannot self-recover its locked state after losing it. The power consumption of the SI-ILPLL is 7.4 mW under a 1.2 V supply voltage. The SI-ILPLL achieves a figure of merit (FOM) of -249 dB.

Resonance Frequency Readout Circuit for a 900 MHz SAW Device

PubMed Central

Liu, Heng; Zhang, Chun; Weng, Zhaoyang; Guo, Yanshu; Wang, Zhihua

2017-01-01

A monolithic resonance frequency readout circuit with high resolution and short measurement time is presented for a 900 MHz RF surface acoustic wave (SAW) sensor. The readout circuit is composed of a fractional-N phase-locked loop (PLL) as the stimulus source to the SAW device and a phase-based resonance frequency detecting circuit using successive approximation (SAR). A new resonance frequency searching strategy has been proposed based on the fact that the SAW device phase-frequency response crosses zero monotonically around the resonance frequency. A dedicated instant phase difference detecting circuit is adopted to facilitate the fast SAR operation for resonance frequency searching. The readout circuit has been implemented in 180 nm CMOS technology with a core area of 3.24 mm2. In the experiment, it works with a 900 MHz SAW resonator with a quality factor of Q = 130. Experimental results show that the readout circuit consumes 7 mW power from 1.6 V supply. The frequency resolution is 733 Hz, and the relative accuracy is 0.82 ppm, and it takes 0.48 ms to complete one measurement. Compared to the previous results in the literature, this work has achieved the shortest measurement time with a trade-off between measurement accuracy and measurement time. PMID:28914799

Resonance Frequency Readout Circuit for a 900 MHz SAW Device.

PubMed

Liu, Heng; Zhang, Chun; Weng, Zhaoyang; Guo, Yanshu; Wang, Zhihua

2017-09-15

A monolithic resonance frequency readout circuit with high resolution and short measurement time is presented for a 900 MHz RF surface acoustic wave (SAW) sensor. The readout circuit is composed of a fractional-N phase-locked loop (PLL) as the stimulus source to the SAW device and a phase-based resonance frequency detecting circuit using successive approximation (SAR). A new resonance frequency searching strategy has been proposed based on the fact that the SAW device phase-frequency response crosses zero monotonically around the resonance frequency. A dedicated instant phase difference detecting circuit is adopted to facilitate the fast SAR operation for resonance frequency searching. The readout circuit has been implemented in 180 nm CMOS technology with a core area of 3.24 mm². In the experiment, it works with a 900 MHz SAW resonator with a quality factor of Q = 130. Experimental results show that the readout circuit consumes 7 mW power from 1.6 V supply. The frequency resolution is 733 Hz, and the relative accuracy is 0.82 ppm, and it takes 0.48 ms to complete one measurement. Compared to the previous results in the literature, this work has achieved the shortest measurement time with a trade-off between measurement accuracy and measurement time.

FIR digital filter-based ZCDPLL for carrier recovery

NASA Astrophysics Data System (ADS)

Nasir, Qassim

2016-04-01

The objective of this work is to analyse the performance of the newly proposed two-tap FIR digital filter-based first-order zero-crossing digital phase-locked loop (ZCDPLL) in the absence or presence of additive white Gaussian noise (AWGN). The introduction of the two-tap FIR digital filter widens the lock range of a ZCDPLL and improves the loop's operation in the presence of AWGN. The FIR digital filter tap coefficients affect the loop convergence behaviour and appropriate selection of those gains should be taken into consideration. The new proposed loop has wider locking range and faster acquisition time and reduces the phase error variations in the presence of noise.

Optical phase locked loop for transparent inter-satellite communications.

PubMed

Herzog, F; Kudielka, K; Erni, D; Bächtold, W

2005-05-16

A novel type of optical phase locked loop (OPLL), optimized for homodyne inter-satellite communication, is presented. The loop employs a conventional 180? 3 dB optical hybrid and an AC-coupled balanced front end. No residual carrier transmission is required for phase locking. The loop accepts analog as well as digital data and various modulation formats. The only requirement to the transmitted user signal is a constant envelope. Phase error extraction occurs through applying a small sinusoidal local oscillator (LO) phase disturbance, while measuring its impact on the power of the baseband output signal. First experimental results indicate a receiver sensitivity of 36 photons/bit (-55.7 dBm) for a BER of 10 ;-9, when transmitting a PRBS-31 signal at a data rate of 400 Mbit/s. The system setup employs diode-pumped Nd:YAG lasers at a wavelength of 1.06 mum.

Optical phase locked loop for transparent inter-satellite communications

NASA Astrophysics Data System (ADS)

Herzog, F.; Kudielka, K.; Erni, D.; Bächtold, W.

2005-05-01

A novel type of optical phase locked loop (OPLL), optimized for homodyne inter-satellite communication, is presented. The loop employs a conventional 180◦ 3 dB optical hybrid and an AC-coupled balanced front end. No residual carrier transmission is required for phase locking. The loop accepts analog as well as digital data and various modulation formats. The only requirement to the transmitted user signal is a constant envelope. Phase error extraction occurs through applying a small sinusoidal local oscillator (LO) phase disturbance, while measuring its impact on the power of the baseband output signal. First experimental results indicate a receiver sensitivity of 36 photons/bit (-55.7 dBm) for a BER of 10 ^-9, when transmitting a PRBS-31 signal at a data rate of 400 Mbit/s. The system setup employs diode-pumped Nd:YAG lasers at a wavelength of 1.06 μm.

Phase-locked tracking loops for LORAN-C

NASA Technical Reports Server (NTRS)

Burhans, R. W.

1978-01-01

Portable battery operated LORAN-C receivers were fabricated to evaluate simple envelope detector methods with hybrid analog to digital phase locked loop sensor processors. The receivers are used to evaluate LORAN-C in general aviation applications. Complete circuit details are given for the experimental sensor and readout system.

Torque control for electric motors

NASA Technical Reports Server (NTRS)

Bernard, C. A.

1980-01-01

Method for adjusting electric-motor torque output to accomodate various loads utilizes phase-lock loop to control relay connected to starting circuit. As load is imposed, motor slows down, and phase lock is lost. Phase-lock signal triggers relay to power starting coil and generate additional torque. Once phase lock is recoverd, relay restores starting circuit to its normal operating mode.

Frequency control circuit for all-digital phase-lock loops

NASA Technical Reports Server (NTRS)

Anderson, T. O.

1973-01-01

Phase-lock loop references all its operations to fixed high-frequency service clock operating at highest speed which digital circuits permit. Wide-range control circuit provides linear control of frequency of reference signal. It requires only two counters in combination with control circuit consisting only of flip-flop and gate.

Short Range 10 Gb/s THz Communications. Proof of Concept Phase 2

DTIC Science & Technology

2011-12-01

heterodyned are phase locked to spectral lines selected from the optical frequency comb generator (OFCG) using optical phase locked loops ( OPLLs ) or by...systems by optical heterodyne generation (OHG), in which the outputs of two phase - locked lasers are combined, and detection in a fast photodiode, such... Heterodyning of two CW optical signals, each phase locked to lines in an

Joint Carrier-Phase Synchronization and LDPC Decoding

NASA Technical Reports Server (NTRS)

Simon, Marvin; Valles, Esteban

2009-01-01

A method has been proposed to increase the degree of synchronization of a radio receiver with the phase of a suppressed carrier signal modulated with a binary- phase-shift-keying (BPSK) or quaternary- phase-shift-keying (QPSK) signal representing a low-density parity-check (LDPC) code. This method is an extended version of the method described in Using LDPC Code Constraints to Aid Recovery of Symbol Timing (NPO-43112), NASA Tech Briefs, Vol. 32, No. 10 (October 2008), page 54. Both methods and the receiver architectures in which they would be implemented belong to a class of timing- recovery methods and corresponding receiver architectures characterized as pilotless in that they do not require transmission and reception of pilot signals. The proposed method calls for the use of what is known in the art as soft decision feedback to remove the modulation from a replica of the incoming signal prior to feeding this replica to a phase-locked loop (PLL) or other carrier-tracking stage in the receiver. Soft decision feedback refers to suitably processed versions of intermediate results of iterative computations involved in the LDPC decoding process. Unlike a related prior method in which hard decision feedback (the final sequence of decoded symbols) is used to remove the modulation, the proposed method does not require estimation of the decoder error probability. In a basic digital implementation of the proposed method, the incoming signal (having carrier phase theta theta (sub c) plus noise would first be converted to inphase (I) and quadrature (Q) baseband signals by mixing it with I and Q signals at the carrier frequency [wc/(2 pi)] generated by a local oscillator. The resulting demodulated signals would be processed through one-symbol-period integrate and- dump filters, the outputs of which would be sampled and held, then multiplied by a soft-decision version of the baseband modulated signal. The resulting I and Q products consist of terms proportional to the cosine and sine of the carrier phase cc as well as correlated noise components. These products would be fed as inputs to a digital PLL that would include a number-controlled oscillator (NCO), which provides an estimate of the carrier phase, theta(sub c).

Long-term stable coherent beam combination of independent femtosecond Yb-fiber lasers.

PubMed

Tian, Haochen; Song, Youjian; Meng, Fei; Fang, Zhanjun; Hu, Minglie; Wang, Chingyue

2016-11-15

We demonstrate coherent beam combination between independent femtosecond Yb-fiber lasers by using the active phase locking of relative pulse timing and the carrier envelope phase based on a balanced optical cross-correlator and extracavity acoustic optical frequency shifter, respectively. The broadband quantum noise of femtosecond fiber lasers is suppressed via precise cavity dispersion control, instead of complicated high-bandwidth phase-locked loop design. Because of reduced quantum noise and a simplified phase-locked loop, stable phase locking that lasts for 1 hour has been obtained, as verified via both spectral interferometry and far-field beam interferometry. The approach can be applied to coherent pulse synthesis, as well as to remote frequency comb connection, allowing a practical all-fiber configuration.

A class of optimum digital phase locked loops

NASA Technical Reports Server (NTRS)

Kumar, R.; Hurd, W. J.

1986-01-01

This paper presents a class of optimum digital filters for digital phase locked loops, for the important case in which the maximum update rate of the loop filter and numerically controlled oscillator (NCO) is limited. This case is typical when the loop filter is implemented in a microprocessor. In these situations, pure delay is encountered in the loop transfer function and thus the stability and gain margin of the loop are of crucial interest. The optimum filters designed for such situations are evaluated in terms of their gain margin for stability, dynamic error, and steady-state error performance. For situations involving considerably high phase dynamics an adaptive and programmable implementation is also proposed to obtain an overall optimum strategy.

Demonstration of a low bandwidth 1.06-micron optical phase-locked loop for coherent homodyne communication

NASA Technical Reports Server (NTRS)

Day, T.; Farinas, A. D.; Byer, R. L.

1990-01-01

A type II 1.06-micron optical phase-locked loop (OPLL) for use in a coherent homodyne receiver is discussed. Diode-laser-pumped solid-state lasers are used for both the local oscillator and transmitter, because their phase noise is significantly lower than that of diode lasers. Closed-loop RMS phase noise of less than 12 mrad (0.69 deg) is achieved, and modulation-demodulation in bulk modulators at rates from 20 kHz to 20 MHz with less than 19 deg of modulation depth is demonstrated.

Digital Filters for Digital Phase-locked Loops

NASA Technical Reports Server (NTRS)

Simon, M.; Mileant, A.

1985-01-01

An s/z hybrid model for a general phase locked loop is proposed. The impact of the loop filter on the stability, gain margin, noise equivalent bandwidth, steady state error and time response is investigated. A specific digital filter is selected which maximizes the overall gain margin of the loop. This filter can have any desired number of integrators. Three integrators are sufficient in order to track a phase jerk with zero steady state error at loop update instants. This filter has one zero near z = 1.0 for each integrator. The total number of poles of the filter is equal to the number of integrators plus two.

A low noise and ultra-narrow bandwidth frequency-locked loop based on the beat method.

PubMed

Gao, Wei; Sui, Jianping; Chen, Zhiyong; Yu, Fang; Sheng, Rongwu

2011-06-01

A novel frequency-locked loop (FLL) based on the beat method is proposed in this paper. Compared with other frequency feedback loops, this FLL is a digital loop with simple structure and very low noise. As shown in the experimental results, this FLL can be used to reduce close-in phase noise on atomic frequency standards, through which a composite frequency standard with ultra-low phase noise and low cost can be easily realized.

Modulation format identification aided hitless flexible coherent transceiver.

PubMed

Xiang, Meng; Zhuge, Qunbi; Qiu, Meng; Zhou, Xingyu; Zhang, Fangyuan; Tang, Ming; Liu, Deming; Fu, Songnian; Plant, David V

2016-07-11

We propose a hitless flexible coherent transceiver enabled by a novel modulation format identification (MFI) scheme for dynamic agile optical networks. The modulation format transparent digital signal processing (DSP) is realized by a block-wise decision-directed least-mean-square (DD-LMS) equalizer for channel tracking, and a pilot symbol aided superscalar phase locked loop (PLL) for carrier phase estimation (CPE). For the MFI, the modulation format information is encoded onto the pilot symbols initially used for CPE. Therefore, the proposed MFI method does not require extra overhead. Moreover, it can identify arbitrary modulation formats including multi-dimensional formats, and it enables tracking of the format change for short data blocks. The performance of the proposed hitless flexible coherent transceiver is successfully evaluated with five modulation formats including QPSK, 16QAM, 64QAM, Hybrid QPSK/8QAM and set-partitioning (SP)-512-QAM. We show that the proposed MFI method induces a negligible performance penalty. Moreover, we experimentally demonstrate that such a hitless transceiver can adapt to fast block-by-block modulation format switching. Finally, the performance improvement of the proposed MFI method is experimentally verified with respect to other commonly used MFI methods.

Single-Event Upset Characterization of Common First- and Second-Order All-Digital Phase-Locked Loops

NASA Astrophysics Data System (ADS)

Chen, Y. P.; Massengill, L. W.; Kauppila, J. S.; Bhuva, B. L.; Holman, W. T.; Loveless, T. D.

2017-08-01

The single-event upset (SEU) vulnerability of common first- and second-order all-digital-phase-locked loops (ADPLLs) is investigated through field-programmable gate array-based fault injection experiments. SEUs in the highest order pole of the loop filter and fraction-based phase detectors (PDs) may result in the worst case error response, i.e., limit cycle errors, often requiring system restart. SEUs in integer-based linear PDs may result in loss-of-lock errors, while SEUs in bang-bang PDs only result in temporary-frequency errors. ADPLLs with the same frequency tuning range but fewer bits in the control word exhibit better overall SEU performance.

On the false lock behavior of polarity-type Costas loops with Manchester coded input. [for Space Shuttle Orbiter communication

NASA Technical Reports Server (NTRS)

Simon, M. K.

1977-01-01

A modification of a Costas loop is described, and the false lock behavior of this system is studied. The modified Costas loop hard limits the output of the in-phase channel, replaces the analog multiplier with a chopper-type device, and is equipped with single-pole arm filters in the loop. The false lock behavior associated with the use of Manchester coded data is investigated; the results can be applied to the assessment of the false lock margin on the Ku-band uplink to the Space Shuttle Orbiter through the TURSS.

Design and Implementation of an RTK-Based Vector Phase Locked Loop

PubMed Central

Shafaati, Ahmad; Lin, Tao; Broumandan, Ali; Lachapelle, Gérard

2018-01-01

This paper introduces a novel double-differential vector phase-locked loop (DD-VPLL) for Global Navigation Satellite Systems (GNSS) that leverages carrier phase position solutions as well as base station measurements in the estimation of rover tracking loop parameters. The use of double differencing alleviates the need for estimating receiver clock dynamics and atmospheric delays; therefore, the navigation filter consists of the baseline dynamic states only. It is shown that using vector processing for carrier phase tracking leads to a significant enhancement in the receiver sensitivity compared to using the conventional scalar-based tracking loop (STL) and vector frequency locked loop (VFLL). The sensitivity improvement of 8 to 10 dB compared to STL, and 7 to 8 dB compared to VFLL, is obtained based on the test cases reported in the paper. Also, an increased probability of ambiguity resolution in the proposed method results in better availability for real time kinematic (RTK) applications. PMID:29533994

On the effects of phase jitter on QPSK lock detection

NASA Technical Reports Server (NTRS)

Mileant, A.; Hinedi, S.

1993-01-01

The performance of a QPSK (quadrature phase-shift keying) lock detector is described, taking into account the degradation due to carrier phase jitter. Such an analysis is necessary for accurate performance prediction purposes in scenarios where both the loop SNR is low and the estimation period is short. The derived formulas are applicable to several QPSK loops and are verified using computer simulations.

Phase-locking and coherent power combining of broadband linearly chirped optical waves.

PubMed

Satyan, Naresh; Vasilyev, Arseny; Rakuljic, George; White, Jeffrey O; Yariv, Amnon

2012-11-05

We propose, analyze and demonstrate the optoelectronic phase-locking of optical waves whose frequencies are chirped continuously and rapidly with time. The optical waves are derived from a common optoelectronic swept-frequency laser based on a semiconductor laser in a negative feedback loop, with a precisely linear frequency chirp of 400 GHz in 2 ms. In contrast to monochromatic waves, a differential delay between two linearly chirped optical waves results in a mutual frequency difference, and an acoustooptic frequency shifter is therefore used to phase-lock the two waves. We demonstrate and characterize homodyne and heterodyne optical phase-locked loops with rapidly chirped waves, and show the ability to precisely control the phase of the chirped optical waveform using a digital electronic oscillator. A loop bandwidth of ~ 60 kHz, and a residual phase error variance of < 0.01 rad(2) between the chirped waves is obtained. Further, we demonstrate the simultaneous phase-locking of two optical paths to a common master waveform, and the ability to electronically control the resultant two-element optical phased array. The results of this work enable coherent power combining of high-power fiber amplifiers-where a rapidly chirping seed laser reduces stimulated Brillouin scattering-and electronic beam steering of chirped optical waves.

The digital phase-locked loop as a near-optimum FM demodulator.

NASA Technical Reports Server (NTRS)

Kelly, C. N.; Gupta, S. C.

1972-01-01

This paper presents an approach to the optimum digital demodulation of a continuous-time FM signal using stochastic estimation theory. The primary result is a digital phase-locked loop realization possessing performance characteristics that approach those of the analog counterpart. Some practical considerations are presented and simulation results for a first-order message model are presented.

Strain Insensitive Optical Phase Locked Loop

NASA Technical Reports Server (NTRS)

Egalon, Claudio Oliviera (Inventor); Rogowski, Robert S. (Inventor)

1996-01-01

An apparatus is provided to allow for quasi distributed sensing of strain within a test object. Strain insensitive fiber is used to deliver a light signal to a strain sensitive fiber in an optical phase locked loop sensor configuration. The use of strain insensitive delivery fiber allows for non-integrated measurements of strain without the use of expensive electronics such as those employed in ODTR techniques. The novelty of the present invention lies in the use of strain insensitive multimode fiber. The inventors had previously developed a similar sensor with strain insensitive fiber, however it was restricted to the use of single or few mode fibers. The use of an optical phase locked loop arrangement allows for the use of multimode strain insensitive fiber.

Method of Implementing Digital Phase-Locked Loops

NASA Technical Reports Server (NTRS)

Stephens, Scott A. (Inventor); Thomas, J. Brooks (Inventor)

1997-01-01

In a new formulation for digital phase-locked loops, loop-filter constants are determined from loop roots that can each be selectively placed in the s-plane on the basis of a new set of parameters, each with simple and direct physical meaning in terms of loop noise bandwidth, root-specific decay rate, and root-specific damping. Loops of first to fourth order are treated in the continuous-update approximation (B(sub L)T approaches 0) and in a discrete-update formulation with arbitrary B(sub L)T. Deficiencies of the continuous-update approximation in large-B(sub L)T applications are avoided in the new discrete-update formulation.

Analysis and design of a second-order digital phase-locked loop

NASA Technical Reports Server (NTRS)

Blasche, P. R.

1979-01-01

A specific second-order digital phase-locked loop (DPLL) was modeled as a first-order Markov chain with alternatives. From the matrix of transition probabilities of the Markov chain, the steady-state phase error of the DPLL was determined. In a similar manner the loop's response was calculated for a fading input. Additionally, a hardware DPLL was constructed and tested to provide a comparison to the results obtained from the Markov chain model. In all cases tested, good agreement was found between the theoretical predictions and the experimental data.

Digital phase shifter synchronizes local oscillators

NASA Technical Reports Server (NTRS)

Ali, S. M.

1978-01-01

Digital phase-shifting network is used as synchronous frequency multiplier for applications such as phase-locking two signals that may differ in frequency. Circuit has various phase-shift capability. Possible applications include data-communication systems and hybrid digital/analog phase-locked loops.

Solid State Research

DTIC Science & Technology

1985-08-15

Hz. The high-speed performance is consis- tent with the low stage delay observed in the ring-oscillator measurements , and the low - frequency ...Phase-Locked Loop 41 5-10 Phase-Locked-Loop Output Spectrum . Note that a 10-kHz Measure - ment Bandwidth Is Used. 42 5-11 Phase Error Response to an...the niobium. Reflections of bulk acoustic waves from optically generated holograms in Fe-doped LiNb03 have been observed and measured . Holographic

PLL Based Energy Efficient PV System with Fuzzy Logic Based Power Tracker for Smart Grid Applications.

PubMed

Rohini, G; Jamuna, V

This work aims at improving the dynamic performance of the available photovoltaic (PV) system and maximizing the power obtained from it by the use of cascaded converters with intelligent control techniques. Fuzzy logic based maximum power point technique is embedded on the first conversion stage to obtain the maximum power from the available PV array. The cascading of second converter is needed to maintain the terminal voltage at grid potential. The soft-switching region of three-stage converter is increased with the proposed phase-locked loop based control strategy. The proposed strategy leads to reduction in the ripple content, rating of components, and switching losses. The PV array is mathematically modeled and the system is simulated and the results are analyzed. The performance of the system is compared with the existing maximum power point tracking algorithms. The authors have endeavored to accomplish maximum power and improved reliability for the same insolation of the PV system. Hardware results of the system are also discussed to prove the validity of the simulation results.

PLL Based Energy Efficient PV System with Fuzzy Logic Based Power Tracker for Smart Grid Applications

PubMed Central

Rohini, G.; Jamuna, V.

2016-01-01

This work aims at improving the dynamic performance of the available photovoltaic (PV) system and maximizing the power obtained from it by the use of cascaded converters with intelligent control techniques. Fuzzy logic based maximum power point technique is embedded on the first conversion stage to obtain the maximum power from the available PV array. The cascading of second converter is needed to maintain the terminal voltage at grid potential. The soft-switching region of three-stage converter is increased with the proposed phase-locked loop based control strategy. The proposed strategy leads to reduction in the ripple content, rating of components, and switching losses. The PV array is mathematically modeled and the system is simulated and the results are analyzed. The performance of the system is compared with the existing maximum power point tracking algorithms. The authors have endeavored to accomplish maximum power and improved reliability for the same insolation of the PV system. Hardware results of the system are also discussed to prove the validity of the simulation results. PMID:27294189

Integrated Advanced Microwave Sounding Unit-A (AMSU-A). Performance Verification Report: METSAT Phase Locked Oscillator Assembly, P/N 1334360-1, S/N's F03 and F04

NASA Technical Reports Server (NTRS)

Pines, D.

1998-01-01

Two Flight Model AMSU-A Phase Locked Oscillators (P/N 1348360-1, S/Ns F03 and F04) have been tested per AES Test Procedure AE-26758. The tests included vibration testing, thermal cycle testing, AM/FM Noise testing, and full functional testing. EMI/REO 2 Testing was not performed. (See test data for S/N F01). Both AMSU-A Phase Locked Oscillators satisfactorily passed all performance requirements of the AE-26633 Product specification. During thermal cycling of PLO serial number F03, the oven and data logger momentarily lost power, including a loss of data. The unit did not experience any thermal stress. TAR 003134 describes the corrective action. Prior to testing PLO serial number FO4, power was applied to the unit. (+15v,-15v) the unit did not display the proper phase lock. Upon test equipment check out a connector was found to be defective. TAR 003133 describes the corrective action. After completion of testing of PLO serial number F04 was installed into Receiver Assembly F02. Upon testing F02 Receiver Assembly the unit was found not to phase lock at ambient temperature. Removal of PLO Assembly F04 was required. R2 was the real issue. Solithane was secondary. Troubleshooting revealed excessive solithane on inner PLL Assembly cover inhibiting optimum grounding. Also, R2 was reselected which increased the lock range from -30 C to +60 C. TAR 002737 describes the corrective action.

LOCSET Phase Locking: Operation, Diagnostics, and Applications

NASA Astrophysics Data System (ADS)

Pulford, Benjamin N.

The aim of this dissertation is to discuss the theoretical and experimental work recently done with the Locking of Optical Coherence via Single-detector Electronic-frequency Tagging (LOCSET) phase locking technique developed and employed here are AFRL. The primary objectives of this effort are to detail the fundamental operation of the LOCSET phase locking technique, recognize the conditions in which the LOCSET control electronics optimally operate, demonstrate LOCSET phase locking with higher channel counts than ever before, and extend the LOCSET technique to correct for low order, atmospherically induced, phase aberrations introduced to the output of a tiled array of coherently combinable beams. The experimental work performed for this effort resulted in the coherent combination of 32 low power optical beams operating with unprecedented LOCSET phase error performance of lambda/71 RMS in a local loop beam combination configuration. The LOCSET phase locking technique was also successfully extended, for the first time, into an Object In the Loop (OIL) configuration by utilizing light scattered off of a remote object as the optical return signal for the LOCSET phase control electronics. Said LOCSET-OIL technique is capable of correcting for low order phase aberrations caused by atmospheric turbulence disturbances applied across a tiled array output.

Method of implementing digital phase-locked loops

NASA Technical Reports Server (NTRS)

Stephens, Scott A. (Inventor); Thomas, Jess Brooks, Jr. (Inventor)

1993-01-01

In a new formulation for digital phase-locked loops, loop-filter constants are determined from loop roots that can each be selectively placed in the s-plane on the basis of a new set of parameters, each with simple and direct physical meaning in terms of loop noise bandwidth, root-specific decay rate, or root-specific damping. Loops of first to fourth order are treated in the continuous-update approximation (BLT yields 0) and in a discrete-update formulation with arbitrary BLT. Deficiencies of the continuous-update approximation in large-BLT applications are avoided in the new discrete-update formulation. A new method for direct, transient-free acquisition with third- and fourth-order loops can improve the versatility and reliability of acquisition with such loops.

Real-time fringe pattern demodulation with a second-order digital phase-locked loop.

PubMed

Gdeisat, M A; Burton, D R; Lalor, M J

2000-10-10

The use of a second-order digital phase-locked loop (DPLL) to demodulate fringe patterns is presented. The second-order DPLL has better tracking ability and more noise immunity than the first-order loop. Consequently, the second-order DPLL is capable of demodulating a wider range of fringe patterns than the first-order DPLL. A basic analysis of the first- and the second-order loops is given, and a performance comparison between the first- and the second-order DPLL's in analyzing fringe patterns is presented. The implementation of the second-order loop in real time on a commercial parallel image processing system is described. Fringe patterns are grabbed and processed, and the resultant phase maps are displayed concurrently.

A second-order all-digital phase-locked loop

NASA Technical Reports Server (NTRS)

Holmes, J. K.; Tegnelia, C. R.

1974-01-01

A simple second-order digital phase-locked loop has been designed to synchronize itself to a square-wave subcarrier. Analysis and experimental performance are given for both acquisition behavior and steady-state phase error performance. In addition, the damping factor and the noise bandwidth are derived analytically. Although all the data are given for the square-wave subcarrier case, the results are applicable to arbitrary subcarriers that are odd symmetric about their transition region.

A second-order frequency-aided digital phase-locked loop for Doppler rate tracking

NASA Astrophysics Data System (ADS)

Chie, C. M.

1980-08-01

A second-order digital phase-locked loop (DPLL) has a finite lock range which is a function of the frequency of the incoming signal to be tracked. For this reason, it is not capable of tracking an input with Doppler rate for an indefinite period of time. In this correspondence, an analytical expression for the hold-in time is derived. In addition, an all-digital scheme to alleviate this problem is proposed based on the information obtained from estimating the input signal frequency.

An all digital phase locked loop for FM demodulation.

NASA Technical Reports Server (NTRS)

Greco, J.; Garodnick, J.; Schilling, D. L.

1972-01-01

A phase-locked loop designed with all-digital circuitry which avoids certain problems, and a digital voltage controlled oscillator algorithm are described. The system operates synchronously and performs all required digital calculations within one sampling period, thereby performing as a real-time special-purpose computer. The SNR ratio is computed for frequency offsets and sinusoidal modulation, and experimental results verify the theoretical calculations.

Target-in-the-loop high-power adaptive phase-locked fiber laser array using single-frequency dithering technique

NASA Astrophysics Data System (ADS)

Tao, R.; Ma, Y.; Si, L.; Dong, X.; Zhou, P.; Liu, Z.

2011-11-01

We present a theoretical and experimental study of a target-in-the-loop (TIL) high-power adaptive phase-locked fiber laser array. The system configuration of the TIL adaptive phase-locked fiber laser array is introduced, and the fundamental theory for TIL based on the single-dithering technique is deduced for the first time. Two 10-W-level high-power fiber amplifiers are set up and adaptive phase locking of the two fiber amplifiers is accomplished successfully by implementing a single-dithering algorithm on a signal processor. The experimental results demonstrate that the optical phase noise for each beam channel can be effectively compensated by the TIL adaptive optics system under high-power applications and the fringe contrast on a remotely located extended target is advanced from 12% to 74% for the two 10-W-level fiber amplifiers.

Analog circuit for the measurement of phase difference between two noisy sine-wave signals

NASA Technical Reports Server (NTRS)

Shakkottai, P.; Kwack, E. Y.; Back, L. H.

1989-01-01

A simple circuit was designed to measure the phase difference between two noisy sine waves. It locks over a wide range of frequencies and produces an output proportional to the phase difference of rapidly varying signals. A square wave locked in frequency and phase to the first signal is produced by a phase-locked loop and is amplified by an operational amplifier.

On higher order discrete phase-locked loops.

NASA Technical Reports Server (NTRS)

Gill, G. S.; Gupta, S. C.

1972-01-01

An exact mathematical model is developed for a discrete loop of a general order particularly suitable for digital computation. The deterministic response of the loop to the phase step and the frequency step is investigated. The design of the digital filter for the second-order loop is considered. Use is made of the incremental phase plane to study the phase error behavior of the loop. The model of the noisy loop is derived and the optimization of the loop filter for minimum mean-square error is considered.

Design and Verification of a Digital Controller for a 2-Piece Hemispherical Resonator Gyroscope.

PubMed

Lee, Jungshin; Yun, Sung Wook; Rhim, Jaewook

2016-04-20

A Hemispherical Resonator Gyro (HRG) is the Coriolis Vibratory Gyro (CVG) that measures rotation angle or angular velocity using Coriolis force acting the vibrating mass. A HRG can be used as a rate gyro or integrating gyro without structural modification by simply changing the control scheme. In this paper, differential control algorithms are designed for a 2-piece HRG. To design a precision controller, the electromechanical modelling and signal processing must be pre-performed accurately. Therefore, the equations of motion for the HRG resonator with switched harmonic excitations are derived with the Duhamel Integral method. Electromechanical modeling of the resonator, electric module and charge amplifier is performed by considering the mode shape of a thin hemispherical shell. Further, signal processing and control algorithms are designed. The multi-flexing scheme of sensing, driving cycles and x, y-axis switching cycles is appropriate for high precision and low maneuverability systems. The differential control scheme is easily capable of rejecting the common mode errors of x, y-axis signals and changing the rate integrating mode on basis of these studies. In the rate gyro mode the controller is composed of Phase-Locked Loop (PLL), amplitude, quadrature and rate control loop. All controllers are designed on basis of a digital PI controller. The signal processing and control algorithms are verified through Matlab/Simulink simulations. Finally, a FPGA and DSP board with these algorithms is verified through experiments.

Interferometric Phase-Locking of Two Electronic Oscillators Based on a Cascade Electro-Optic Modulator

NASA Astrophysics Data System (ADS)

Chien, Pie-Yau; Chao, Chen-Hsing

1993-03-01

An optical phase-locked loop system based on a triangular phase-modulated cascade Mach-Zehnder modulator is demonstrated. A reference oscillator of 10 MHz is multiplied such that it can be used to lock a target oscillator of 120 MHz. The phase error of \\varDeltaθe≤2.0× 10-4 rad/Hz1/2 has been implemented in this system.

Improved performance of a digital phase-locked loop combined with a frequency/frequency-rate estimator

NASA Technical Reports Server (NTRS)

Mileant, A.; Simon, M.

1986-01-01

When a digital phase-locked loop with a long loop update time tracks a signal with high Doppler, the demodualtion losses due to frequency mismatch can become very significant. One way of reducing these Doppler-related losses is to compensate for the Doppler effect using some kind of frequency-rate estimator. The performance of the fixed-window least-squares estimator and the Kalman filter is investigated; several Doppler compensating techniques are proposed. It is shown that the variance of the frequency estimator can be made as small as desired, and with this, the Doppler effect can be effectively compensated. The remaining demodulation losses due to phase jitter in the loop can be less than 0.1 dB.

Discriminator aided phase lock acquisition for suppressed carrier signals

NASA Technical Reports Server (NTRS)

Carson, L. M.; Krasin, F. E. (Inventor)

1982-01-01

A discriminator aided technique for acquisition of phase lock to a suppressed carrier signal utilizes a Costas loop which is initially operated open loop and control voltage for its VCXO is derived from a phase detector that compares the VCXO to a reference frequency thus establishing coarse frequency resolution with the received signal. Then the Costas loop is closed with the low-pass filter of the channel having a bandwidth much greater (by a factor of about 10) than in the I channel so that a frequency discriminator effect results to aid carrier resolution. Finally, after carrier acquisition, the Q-channel filter of the Costas loop is switched to a bandwidth substantially equal to that of the I-channel for carrier tracking.

Interferometric phase locking of two electronic oscillators with a cascade electro-optic modulator

NASA Astrophysics Data System (ADS)

Chao, C. H.; Chien, P. Y.; Chang, L. W.; Juang, F. Y.; Hsia, C. H.; Chang, C. C.

1993-01-01

An optical-type electrical phase-locked-loop system based on a cascade electro-optic modulator has been demonstrated. By using this technique, a set of optical-type phase detectors, operating at any harmonic frequencies of two applied phase-modulation signals, has been implemented.

Digital Phase Meter for a Laser Heterodyne Interferometer

NASA Technical Reports Server (NTRS)

Loya, Frank

2008-01-01

The Digital Phase Meter is based on a modified phase-locked loop. When phase alignment between the reference input and the phase-shifted metrological input is achieved, the loop locks and the phase shift of the digital phase shifter equals the phase difference that one seeks to measure. This digital phase meter is being developed for incorporation into a laser heterodyne interferometer in a metrological apparatus, but could also be adapted to other uses. Relative to prior phase meters of similar capability, including digital ones, this digital phase meter is smaller, less complex, and less expensive. The phase meter has been constructed and tested in the form of a field-programmable gate array (FPGA).

Efficient laser noise reduction method via actively stabilized optical delay line.

PubMed

Li, Dawei; Qian, Cheng; Li, Ye; Zhao, Jianye

2017-04-17

We report a fiber laser noise reduction method by locking it to an actively stabilized optical delay line, specifically a fiber-based Mach-Zehnder interferometer with a 10 km optical fiber spool. The fiber spool is used to achieve large arm imbalance. The heterodyne signal of the two arms converts the laser noise from the optical domain to several megahertz, and it is used in laser noise reduction by a phase-locked loop. An additional phase-locked loop is induced in the system to compensate the phase noise due to environmentally induced length fluctuations of the optical fiber spool. A major advantage of this structure is the efficient reduction of out-of-loop frequency noise, particularly at low Fourier frequency. The frequency noise reaches -30 dBc/Hz at 1 Hz, which is reduced by more than 90 dB compared with that of the laser in its free-running state.

Performance improvement of a binary quantized all-digital phase-locked loop with a new aided-acquisition technique

NASA Astrophysics Data System (ADS)

Sandoz, J.-P.; Steenaart, W.

1984-12-01

The nonuniform sampling digital phase-locked loop (DPLL) with sequential loop filter, in which the correction sizes are controlled by the accumulated differences of two additional phase comparators, is graphically analyzed. In the absence of noise and frequency drift, the analysis gives some physical insight into the acquisition and tracking behavior. Taking noise into account, a mathematical model is derived and a random walk technique is applied to evaluate the rms phase error and the mean acquisition time. Experimental results confirm the appropriate simplifying hypotheses used in the numerical analysis. Two related performance measures defined in terms of the rms phase error and the acquisition time for a given SNR are used. These measures provide a common basis for comparing different digital loops and, to a limited extent, also with a first-order linear loop. Finally, the behavior of a modified DPLL under frequency deviation in the presence of Gaussian noise is tested experimentally and by computer simulation.

A fast-locking all-digital delay-locked loop for phase/delay generation in an FPGA

NASA Astrophysics Data System (ADS)

Zhujia, Chen; Haigang, Yang; Fei, Liu; Yu, Wang

2011-10-01

A fast-locking all-digital delay-locked loop (ADDLL) is proposed for the DDR SDRAM controller interface in a field programmable gate array (FPGA). The ADDLL performs a 90° phase-shift so that the data strobe (DQS) can enlarge the data valid window in order to minimize skew. In order to further reduce the locking time and to prevent the harmonic locking problem, a time-to-digital converter (TDC) is proposed. A duty cycle corrector (DCC) is also designed in the ADDLL to adjust the output duty cycle to 50%. The ADDLL, implemented in a commercial 0.13 μm CMOS process, occupies a total of 0.017 mm2 of active area. Measurement results show that the ADDLL has an operating frequency range of 75 to 350 MHz and a total delay resolution of 15 ps. The time interval error (TIE) of the proposed circuit is 60.7 ps.

Precise and long-term stabilization of the carrier-envelope phase of femtosecond laser pulses using an enhanced direct locking technique.

PubMed

Yu, Tae Jun; Hong, Kyung-Han; Choi, Hyun-Gyug; Sung, Jae Hee; Choi, Il Woo; Ko, Do-Kyeong; Lee, Jongmin; Kim, Junwon; Kim, Dong Eon; Nam, Chang Hee

2007-06-25

We demonstrate a long-term operation with reduced phase noise in the carrier-envelope-phase (CEP) stabilization process by employing a double feedback loop and an improved signal detection in the direct locking technique [Opt. Express 13, 2969 (2005)]. A homodyne balanced detection method is employed for efficiently suppressing the dc noise in the f-2f beat signal, which is converted into the CEP noise in the direct locking loop working at around zero carrier-envelope offset frequency (f(ceo)). In order to enhance the long-term stability, we have used the double feedback scheme that modulates both the oscillator pump power for a fast control and the intracavity-prism insertion depth for a slow and high-dynamic-range control. As a result, the in-loop phase jitter is reduced from 50 mrad of the previous result to 29 mrad, corresponding to 13 as in time scale, and the long-term stable operation is achieved for more than 12 hours.

Detection of digital FSK using a phase-locked loop

NASA Technical Reports Server (NTRS)

Lindsey, W. C.; Simon, M. K.

1975-01-01

A theory is presented for the design of a digital FSK receiver which employs a phase-locked loop to set up the desired matched filter as the arriving signal frequency switches. The developed mathematical model makes it possible to establish the error probability performance of systems which employ a class of digital FM modulations. The noise mechanism which accounts for decision errors is modeled on the basis of the Meyr distribution and renewal Markov process theory.

An adaptive narrow band frequency modulation voice communication system

NASA Technical Reports Server (NTRS)

Wishna, S.

1972-01-01

A narrow band frequency modulation communication system is described which provides for the reception of good quality voice at low carrier-to-noise ratios. The high level of performance is obtained by designing a limiter and phase lock loop combination as a demodulator, so that the bandwidth of the phase lock loop decreases as the carrier level decreases. The system was built for the position location and aircraft communication equipment experiment of the ATS 6 program.

Reduced-Order Structure-Preserving Model for Parallel-Connected Three-Phase Grid-Tied Inverters: Preprint

DOE Office of Scientific and Technical Information (OSTI.GOV)

Johnson, Brian B; Purba, Victor; Jafarpour, Saber

Given that next-generation infrastructures will contain large numbers of grid-connected inverters and these interfaces will be satisfying a growing fraction of system load, it is imperative to analyze the impacts of power electronics on such systems. However, since each inverter model has a relatively large number of dynamic states, it would be impractical to execute complex system models where the full dynamics of each inverter are retained. To address this challenge, we derive a reduced-order structure-preserving model for parallel-connected grid-tied three-phase inverters. Here, each inverter in the system is assumed to have a full-bridge topology, LCL filter at the pointmore » of common coupling, and the control architecture for each inverter includes a current controller, a power controller, and a phase-locked loop for grid synchronization. We outline a structure-preserving reduced-order inverter model for the setting where the parallel inverters are each designed such that the filter components and controller gains scale linearly with the power rating. By structure preserving, we mean that the reduced-order three-phase inverter model is also composed of an LCL filter, a power controller, current controller, and PLL. That is, we show that the system of parallel inverters can be modeled exactly as one aggregated inverter unit and this equivalent model has the same number of dynamical states as an individual inverter in the paralleled system. Numerical simulations validate the reduced-order models.« less

Frequency set on systems

NASA Astrophysics Data System (ADS)

Wilby, W. A.; Brett, A. R. H.

Frequency set on techniques used in ECM applications include repeater jammers, frequency memory loops (RF and optical), coherent digital RF memories, and closed loop VCO set on systems. Closed loop frequency set on systems using analog phase and frequency locking are considered to have a number of cost and performance advantages. Their performance is discussed in terms of frequency accuracy, bandwidth, locking time, stability, and simultaneous signals. Some experimental results are presented which show typical locking performance. Future ECM systems might require a response to very short pulses. Acoustooptic and fiber-optic pulse stretching techniques can be used to meet such requirements.

Foundry fabricated photonic integrated circuit optical phase lock loop.

PubMed

Bałakier, Katarzyna; Fice, Martyn J; Ponnampalam, Lalitha; Graham, Chris S; Wonfor, Adrian; Seeds, Alwyn J; Renaud, Cyril C

2017-07-24

This paper describes the first foundry-based InP photonic integrated circuit (PIC) designed to work within a heterodyne optical phase locked loop (OPLL). The PIC and an external electronic circuit were used to phase-lock a single-line semiconductor laser diode to an incoming reference laser, with tuneable frequency offset from 4 GHz to 12 GHz. The PIC contains 33 active and passive components monolithically integrated on a single chip, fully demonstrating the capability of a generic foundry PIC fabrication model. The electronic part of the OPLL consists of commercially available RF components. This semi-packaged system stabilizes the phase and frequency of the integrated laser so that an absolute frequency, high-purity heterodyne signal can be generated when the OPLL is in operation, with phase noise lower than -100 dBc/Hz at 10 kHz offset from the carrier. This is the lowest phase noise level ever demonstrated by monolithically integrated OPLLs.

A digital optical phase-locked loop for diode lasers based on field programmable gate array.

PubMed

Xu, Zhouxiang; Zhang, Xian; Huang, Kaikai; Lu, Xuanhui

2012-09-01

We have designed and implemented a highly digital optical phase-locked loop (OPLL) for diode lasers in atom interferometry. The three parts of controlling circuit in this OPLL, including phase and frequency detector (PFD), loop filter and proportional integral derivative (PID) controller, are implemented in a single field programmable gate array chip. A structure type compatible with the model MAX9382∕MCH12140 is chosen for PFD and pipeline and parallelism technology have been adapted in PID controller. Especially, high speed clock and twisted ring counter have been integrated in the most crucial part, the loop filter. This OPLL has the narrow beat note line width below 1 Hz, residual mean-square phase error of 0.14 rad(2) and transition time of 100 μs under 10 MHz frequency step. A main innovation of this design is the completely digitalization of the whole controlling circuit in OPLL for diode lasers.

A digital optical phase-locked loop for diode lasers based on field programmable gate array

NASA Astrophysics Data System (ADS)

Xu, Zhouxiang; Zhang, Xian; Huang, Kaikai; Lu, Xuanhui

2012-09-01

We have designed and implemented a highly digital optical phase-locked loop (OPLL) for diode lasers in atom interferometry. The three parts of controlling circuit in this OPLL, including phase and frequency detector (PFD), loop filter and proportional integral derivative (PID) controller, are implemented in a single field programmable gate array chip. A structure type compatible with the model MAX9382/MCH12140 is chosen for PFD and pipeline and parallelism technology have been adapted in PID controller. Especially, high speed clock and twisted ring counter have been integrated in the most crucial part, the loop filter. This OPLL has the narrow beat note line width below 1 Hz, residual mean-square phase error of 0.14 rad2 and transition time of 100 μs under 10 MHz frequency step. A main innovation of this design is the completely digitalization of the whole controlling circuit in OPLL for diode lasers.

Radiation pressure excitation of a low temperature atomic force/magnetic force microscope for imaging in 4-300 K temperature range

NASA Astrophysics Data System (ADS)

Ćelik, Ümit; Karcı, Özgür; Uysallı, Yiǧit; Özer, H. Özgür; Oral, Ahmet

2017-01-01

We describe a novel radiation pressure based cantilever excitation method for imaging in dynamic mode atomic force microscopy (AFM) for the first time. Piezo-excitation is the most common method for cantilever excitation, however it may cause spurious resonance peaks. Therefore, the direct excitation of the cantilever plays a crucial role in AFM imaging. A fiber optic interferometer with a 1310 nm laser was used both for the excitation of the cantilever at the resonance and the deflection measurement of the cantilever in a commercial low temperature atomic force microscope/magnetic force microscope (AFM/MFM) from NanoMagnetics Instruments. The laser power was modulated at the cantilever's resonance frequency by a digital Phase Locked Loop (PLL). The laser beam is typically modulated by ˜500 μW, and ˜141.8 nmpp oscillation amplitude is obtained in moderate vacuum levels between 4 and 300 K. We have demonstrated the performance of the radiation pressure excitation in AFM/MFM by imaging atomic steps in graphite, magnetic domains in CoPt multilayers between 4 and 300 K and Abrikosov vortex lattice in BSCCO(2212) single crystal at 4 K for the first time.

Radiation pressure excitation of a low temperature atomic force/magnetic force microscope for imaging in 4-300 K temperature range.

PubMed

Çelik, Ümit; Karcı, Özgür; Uysallı, Yiğit; Özer, H Özgür; Oral, Ahmet

2017-01-01

We describe a novel radiation pressure based cantilever excitation method for imaging in dynamic mode atomic force microscopy (AFM) for the first time. Piezo-excitation is the most common method for cantilever excitation, however it may cause spurious resonance peaks. Therefore, the direct excitation of the cantilever plays a crucial role in AFM imaging. A fiber optic interferometer with a 1310 nm laser was used both for the excitation of the cantilever at the resonance and the deflection measurement of the cantilever in a commercial low temperature atomic force microscope/magnetic force microscope (AFM/MFM) from NanoMagnetics Instruments. The laser power was modulated at the cantilever's resonance frequency by a digital Phase Locked Loop (PLL). The laser beam is typically modulated by ∼500 μW, and ∼141.8 nm pp oscillation amplitude is obtained in moderate vacuum levels between 4 and 300 K. We have demonstrated the performance of the radiation pressure excitation in AFM/MFM by imaging atomic steps in graphite, magnetic domains in CoPt multilayers between 4 and 300 K and Abrikosov vortex lattice in BSCCO(2212) single crystal at 4 K for the first time.

Radiation pressure excitation of Low Temperature Atomic Force & Magnetic Force Microscope (LT-AFM/MFM) for Imaging

NASA Astrophysics Data System (ADS)

Karci, Ozgur; Celik, Umit; Oral, Ahmet; NanoMagnetics Instruments Ltd. Team; Middle East Tech Univ Team

2015-03-01

We describe a novel method for excitation of Atomic Force Microscope (AFM) cantilevers by means of radiation pressure for imaging in an AFM for the first time. Piezo excitation is the most common method for cantilever excitation, but it may cause spurious resonance peaks. A fiber optic interferometer with 1310 nm laser was used both to measure the deflection of cantilever and apply a force to the cantilever in a LT-AFM/MFM from NanoMagnetics Instruments. The laser power was modulated at the cantilever`s resonance frequency by a digital Phase Lock Loop (PLL). The force exerted by the radiation pressure on a perfectly reflecting surface by a laser beam of power P is F = 2P/c. We typically modulate the laser beam by ~ 800 μW and obtain 10nm oscillation amplitude with Q ~ 8,000 at 2.5x10-4 mbar. The cantilever's stiffness can be accurately calibrated by using the radiation pressure. We have demonstrated performance of the radiation pressure excitation in AFM/MFM by imaging a hard disk sample between 4-300K and Abrikosov vortex lattice in BSCCO single crystal at 4K to for the first time.

Asymmetric resonance frequency analysis of in-plane electrothermal silicon cantilevers for nanoparticle sensors

NASA Astrophysics Data System (ADS)

Bertke, Maik; Hamdana, Gerry; Wu, Wenze; Marks, Markus; Suryo Wasisto, Hutomo; Peiner, Erwin

2016-10-01

The asymmetric resonance frequency analysis of silicon cantilevers for a low-cost wearable airborne nanoparticle detector (Cantor) is described in this paper. The cantilevers, which are operated in the fundamental in-plane resonance mode, are used as a mass-sensitive microbalance. They are manufactured out of bulk silicon, containing a full piezoresistive Wheatstone bridge and an integrated thermal heater for reading the measurement output signal and stimulating the in-plane excitation, respectively. To optimize the sensor performance, cantilevers with different cantilever geometries are designed, fabricated and characterized. Besides the resonance frequency, the quality factor (Q) of the resonance curve has a high influence concerning the sensor sensitivity. Because of an asymmetric resonance behaviour, a novel fitting function and method to extract the Q is created, different from that of the simple harmonic oscillator (SHO). For testing the sensor in a long-term frequency analysis, a phase- locked loop (PLL) circuit is employed, yielding a frequency stability of up to 0.753 Hz at an Allan variance of 3.77 × 10-6. This proposed asymmetric resonance frequency analysis method is expected to be further used in the process development of the next-generation Cantor.

Digital phase-locked-loop speed sensor for accuracy improvement in analog speed controls. [feedback control and integrated circuits

NASA Technical Reports Server (NTRS)

Birchenough, A. G.

1975-01-01

A digital speed control that can be combined with a proportional analog controller is described. The stability and transient response of the analog controller were retained and combined with the long-term accuracy of a crystal-controlled integral controller. A relatively simple circuit was developed by using phase-locked-loop techniques and total error storage. The integral digital controller will maintain speed control accuracy equal to that of the crystal reference oscillator.

Resonant Acoustic Measurement of Vapor Phase Transport Phenomenon

NASA Astrophysics Data System (ADS)

Schuhmann, R. J.; Garrett, S. L.; Matson, J. V.

2002-12-01

A major impediment to accurate non steady-state diffusion measurements is the ability to accurately measure and track a rapidly changing gas concentration without disturbing the system. Non-destructive methods that do not interfere with system dynamics have been developed in the past. These methods, however, have tended to be cumbersome or inaccurate at low concentrations. A new experimental approach has been developed to measure gaseous diffusion in free air and through porous materials. The method combines the traditional non steady-state laboratory methodology with resonant acoustic gas analysis. A phase-locked-loop (PLL) resonance frequency tracker is combined with a thermally insulated copper resonator. A piston sealed with a metal bellows excites the fundamental standing wave resonance of the resonator. The PLL maintains a constant phase difference (typically 90§) between the accelerometer mounted on the piston and a microphone near the piston to track the resonance frequency in real time. A capillary or glass bead filled core is fitted into an o-ring sealed opening at the end of the resonator opposite the bellows. The rate at which the tracer gas is replaced by air within the resonator is controlled by the diffusion coefficient of the gas in free air through the capillary (DA) or by the effective diffusion coefficient of the gas through the core (De). The mean molecular weight of the gas mixture in the resonator is directly determined six times each minute from the ratio of the absolute temperature to the square of the fundamental acoustic resonance frequency. Average system stability (temperature divided by frequency squared) is better than 350 ppm. DA values for a 0.3-inch diameter capillary were in excellent agreement with published values. De values for porous media samples (0.5 mm glass beads) of four different lengths (1 through 4 inches) using three different tracer gases (He, CH4, Kr) will be reported. Comments will be offered regarding tracer gas selection and device orientation and their effect on experimental results. [Work supported by the Office of Naval Research.

Phase noise reduction by optical phase-locked loop for a coherent bichromatic laser based on the injection-locking technique.

PubMed

Wu, C F; Yan, X S; Huang, J Q; Zhang, J W; Wang, L J

2018-01-01

We present a coherent bichromatic laser system with low phase noise. An optical injection process is used to generate coherent laser beams with a frequency difference of 9.192 631 77 GHz using an electro-optical modulator. An optical phase-locked loop is then applied to reduce the phase noise. The phase noise of the beat note is -41, -81, -98, -83, and -95 dBrad 2 /Hz at the offset frequencies of 1 Hz, 100 Hz, 1 kHz, 10 kHz, and 1 MHz, respectively. Compared to a system that uses optical injection alone, the phase noise is reduced by up to 20-30 dB in the low-frequency range, and the intermodulation effect on the continuous atomic clock is reduced by an order of magnitude. This configuration can adjust the intensities and polarizations of the laser beams independently and reduce the phase noise caused by environmental disturbances and optical injection, which may be useful for application to atomic coherence experiments.

Phase noise reduction by optical phase-locked loop for a coherent bichromatic laser based on the injection-locking technique

NASA Astrophysics Data System (ADS)

Wu, C. F.; Yan, X. S.; Huang, J. Q.; Zhang, J. W.; Wang, L. J.

2018-01-01

We present a coherent bichromatic laser system with low phase noise. An optical injection process is used to generate coherent laser beams with a frequency difference of 9.192 631 77 GHz using an electro-optical modulator. An optical phase-locked loop is then applied to reduce the phase noise. The phase noise of the beat note is -41, -81, -98, -83, and -95 dBrad2/Hz at the offset frequencies of 1 Hz, 100 Hz, 1 kHz, 10 kHz, and 1 MHz, respectively. Compared to a system that uses optical injection alone, the phase noise is reduced by up to 20-30 dB in the low-frequency range, and the intermodulation effect on the continuous atomic clock is reduced by an order of magnitude. This configuration can adjust the intensities and polarizations of the laser beams independently and reduce the phase noise caused by environmental disturbances and optical injection, which may be useful for application to atomic coherence experiments.

Design and Verification of a Digital Controller for a 2-Piece Hemispherical Resonator Gyroscope

PubMed Central

Lee, Jungshin; Yun, Sung Wook; Rhim, Jaewook

2016-01-01

A Hemispherical Resonator Gyro (HRG) is the Coriolis Vibratory Gyro (CVG) that measures rotation angle or angular velocity using Coriolis force acting the vibrating mass. A HRG can be used as a rate gyro or integrating gyro without structural modification by simply changing the control scheme. In this paper, differential control algorithms are designed for a 2-piece HRG. To design a precision controller, the electromechanical modelling and signal processing must be pre-performed accurately. Therefore, the equations of motion for the HRG resonator with switched harmonic excitations are derived with the Duhamel Integral method. Electromechanical modeling of the resonator, electric module and charge amplifier is performed by considering the mode shape of a thin hemispherical shell. Further, signal processing and control algorithms are designed. The multi-flexing scheme of sensing, driving cycles and x, y-axis switching cycles is appropriate for high precision and low maneuverability systems. The differential control scheme is easily capable of rejecting the common mode errors of x, y-axis signals and changing the rate integrating mode on basis of these studies. In the rate gyro mode the controller is composed of Phase-Locked Loop (PLL), amplitude, quadrature and rate control loop. All controllers are designed on basis of a digital PI controller. The signal processing and control algorithms are verified through Matlab/Simulink simulations. Finally, a FPGA and DSP board with these algorithms is verified through experiments. PMID:27104539

Optical frequency locked loop for long-term stabilization of broad-line DFB laser frequency difference

NASA Astrophysics Data System (ADS)

Lipka, Michał; Parniak, Michał; Wasilewski, Wojciech

2017-09-01

We present an experimental realization of the optical frequency locked loop applied to long-term frequency difference stabilization of broad-line DFB lasers along with a new independent method to characterize relative phase fluctuations of two lasers. The presented design is based on a fast photodiode matched with an integrated phase-frequency detector chip. The locking setup is digitally tunable in real time, insensitive to environmental perturbations and compatible with commercially available laser current control modules. We present a simple model and a quick method to optimize the loop for a given hardware relying exclusively on simple measurements in time domain. Step response of the system as well as phase characteristics closely agree with the theoretical model. Finally, frequency stabilization for offsets within 4-15 GHz working range achieving <0.1 Hz long-term stability of the beat note frequency for 500 s averaging time period is demonstrated. For these measurements we employ an I/Q mixer that allows us to precisely and independently measure the full phase trace of the beat note signal.

Binding modes of phosphotriesterase-like lactonase complexed with δ-nonanoic lactone and paraoxon using molecular dynamics simulations.

PubMed

Guan, Shanshan; Zhao, Li; Jin, Hanyong; Shan, Ning; Han, Weiwei; Wang, Song; Shan, Yaming

2017-02-01

Phosphotriesterase-like lactonases (PLLs) have received much attention because of their physical and chemical properties. They may have widespread applications in various fields. For example, they show potential for quorum-sensing signaling pathways and organophosphorus (OP) detoxification in agricultural science. However, the mechanism by which PLLs hydrolyze, which involves OP compounds and lactones and a variety of distinct catalytic efficiencies, has only rarely been explored. In the present study, molecular dynamics (MD) simulations were performed to characterize and contrast the structural dynamics of DrPLL, a member of the PLL superfamily in Deinococcus radiodurans, bound to two substrates, δ-nonanoic lactone and paraoxon. It has been observed that there is a 16-fold increase in the catalytic efficiency of the two mutant strains of DrPLL (F26G/C72I) vs. the wild-type enzyme toward the hydrolysis of paraoxon, but an explanation for this behavior is currently lacking. The analysis of the molecular trajectories of DrPLL bound to δ-nonanoic lactone indicated that lactone-induced conformational changes take place in loop 8, which is near the active site. Binding to paraoxon may lead to conformational displacement of loop 1 residues, which could lead to the deformation of the active site and so trigger the entry of the paraoxon into the active site. The efficiency of the F26G/C72I mutant was increased by decreasing the displacement of loop 1 residues and increasing the flexibility of loop 8 residues. These results provide a molecular-level explanation for the experimental behavior.

Design of a 2.4-GHz CMOS monolithic fractional-N frequency synthesizer

NASA Astrophysics Data System (ADS)

Shu, Keliu

The wireless communication technology and market have been growing rapidly since a decade ago. The high demand market is a driving need for higher integration in the wireless transceivers. The trend is to achieve low-cost, small form factor and low power consumption. With the ever-reducing feature size, it is becoming feasible to integrate the RF front-end together with the baseband in the low-cost CMOS technology. The frequency synthesizer is a key building block in the RF front-end of the transceivers. It is used as a local oscillator for frequency translation and channel selection. The design of a 2.4-GHz low-power frequency synthesizer in 0.35mum CMOS is a challenging task mainly due to the high-speed prescaler. In this dissertation, a brief review of conventional PLL and frequency synthesizers is provided. Design techniques of a 2.4-GHz monolithic SigmaDelta fractional-N frequency synthesizer are investigated. Novel techniques are proposed to tackle the speed and integration bottlenecks of high-frequency PLL. A low-power and inherently glitch-free phase-switching prescaler and an on-chip loop filter with capacitance multiplier are developed. Compared with the existing and popular dual-path topology, the proposed loop filter reduces circuit complexity and its power consumption and noise are negligible. Furthermore, a third-order three-level digital SigmaDelta modulator topology is employed to reduce the phase noise generated by the modulator. Suitable PFD and charge-pump designs are employed to reduce their nonlinearity effects and thus minimize the folding of the SigmaDelta modulator-shaped phase noise. A prototype of the fractional-N synthesizer together with some standalone building blocks is designed and fabricated in TSMC 0.35mum CMOS through MOSIS. The prototype frequency synthesizer and standalone prescaler and loop filter are characterized. The feasibility and practicality of the proposed prescaler and loop filter are experimentally verified.

A class of optimum digital phase locked loops for the DSN advanced receiver

NASA Technical Reports Server (NTRS)

Hurd, W. J.; Kumar, R.

1985-01-01

A class of optimum digital filters for digital phase locked loop of the deep space network advanced receiver is discussed. The filter minimizes a weighted combination of the variance of the random component of the phase error and the sum square of the deterministic dynamic component of phase error at the output of the numerically controlled oscillator (NCO). By varying the weighting coefficient over a suitable range of values, a wide set of filters are obtained such that, for any specified value of the equivalent loop-noise bandwidth, there corresponds a unique filter in this class. This filter thus has the property of having the best transient response over all possible filters of the same bandwidth and type. The optimum filters are also evaluated in terms of their gain margin for stability and their steady-state error performance.

Computer program CORDET. [computerized simulation of digital phase-lock loop for Omega navigation receiver

NASA Technical Reports Server (NTRS)

Palkovic, R. A.

1974-01-01

A FORTRAN 4 computer program provides convenient simulation of an all-digital phase-lock loop (DPLL). The DPLL forms the heart of the Omega navigation receiver prototype. Through the DPLL, the phase of the 10.2 KHz Omega signal is estimated when the true signal phase is contaminated with noise. This investigation has provided a convenient means of evaluating loop performance in a variety of noise environments, and has proved to be a useful tool for evaluating design changes. The goals of the simulation are to: (1) analyze the circuit on a bit-by-bit level in order to evaluate the overall design; (2) see easily the effects of proposed design changes prior to actual breadboarding; and (3) determine the optimum integration time for the DPLL in an environment typical of general aviation conditions.

Extremely Coherent Microwave Emission from Spin Torque Oscillator Stabilized by Phase Locked Loop

PubMed Central

Tamaru, Shingo; Kubota, Hitoshi; Yakushiji, Kay; Yuasa, Shinji; Fukushima, Akio

2015-01-01

Spin torque oscillator (STO) has been attracting a great deal of attention as a candidate for the next generation microwave signal sources for various modern electronics systems since its advent. However, the phase noise of STOs under free running oscillation is still too large to be used in practical microwave applications, thus an industrially viable means to stabilize its oscillation has been strongly sought. Here we demonstrate implementation of a phase locked loop using a STO as a voltage controlled oscillator (VCO) that generates a 7.344 GHz microwave signal stabilized by a 153 MHz reference signal. Spectrum measurement showed successful phase locking of the microwave signal to the reference signal, characterized by an extremely narrow oscillation peak with a linewidth of less than the measurement limit of 1 Hz. This demonstration should be a major breakthrough toward various practical applications of STOs. PMID:26658880

A method for reducing sampling jitter in digital control systems

NASA Technical Reports Server (NTRS)

Anderson, T. O.; HURBD W. J.; Hurd, W. J.

1969-01-01

Digital phase lock loop system is designed by smoothing the proportional control with a low pass filter. This method does not significantly affect the loop dynamics when the smoothing filter bandwidth is wide compared to loop bandwidth.

Fringe pattern demodulation with a two-dimensional digital phase-locked loop algorithm.

PubMed

Gdeisat, Munther A; Burton, David R; Lalor, Michael J

2002-09-10

A novel technique called a two-dimensional digital phase-locked loop (DPLL) for fringe pattern demodulation is presented. This algorithm is more suitable for demodulation of fringe patterns with varying phase in two directions than the existing DPLL techniques that assume that the phase of the fringe patterns varies only in one direction. The two-dimensional DPLL technique assumes that the phase of a fringe pattern is continuous in both directions and takes advantage of the phase continuity; consequently, the algorithm has better noise performance than the existing DPLL schemes. The two-dimensional DPLL algorithm is also suitable for demodulation of fringe patterns with low sampling rates, and it outperforms the Fourier fringe analysis technique in this aspect.

Heterodyne optical phase-locking of extended-cavity semiconductor lasers at 9 GHz

NASA Astrophysics Data System (ADS)

Santarelli, G.; Clairon, A.; Lea, S. N.; Tino, G. M.

1994-01-01

In order to stimulate atomic velocity-selective Raman transitions on the 852 nm caesium D 2 line in an atomic fountain clock, two extended-cavity diode lasers have been optically phase-locked at a frequency offset of 9.192 GHz. The measured linewidth (fwhm) of the free-running lasers is 50 kHz. The phase-locked loop bandwidth, evaluated by observing the frequency noise spectrum, is 3.7 MHz and the phase error variance is found to be no more than 4 × 10 -3 rad 2.

High resolution angular sensor. [reducing ring laser gyro output quantization using phase locked loops

NASA Technical Reports Server (NTRS)

Gneses, M. I.; Berg, D. S.

1981-01-01

Specifications for the pointing stabilization system of the large space telescope were used in an investigation of the feasibility of reducing ring laser gyro output quantization to the sub-arc-second level by the use of phase locked loops and associated electronics. Systems analysis procedures are discussed and a multioscillator laser gyro model is presented along with data on the oscillator noise. It is shown that a second order closed loop can meet the measurement noise requirements when the loop gain and time constant of the loop filter are appropriately chosen. The preliminary electrical design is discussed from the standpoint of circuit tradeoff considerations. Analog, digital, and hybrid designs are given and their applicability to the high resolution sensor is examined. the electrical design choice of a system configuration is detailed. The design and operation of the various modules is considered and system block diagrams are included. Phase 1 and 2 test results using the multioscillator laser gyro are included.

Spectral Narrowing of a Varactor-Integrated Resonant-Tunneling-Diode Terahertz Oscillator by Phase-Locked Loop

NASA Astrophysics Data System (ADS)

Ogino, Kota; Suzuki, Safumi; Asada, Masahiro

2017-12-01

Spectral narrowing of a resonant-tunneling-diode (RTD) terahertz oscillator, which is useful for various applications of terahertz frequency range, such as an accurate gas spectroscopy, a frequency reference in various communication systems, etc., was achieved with a phase-locked loop system. The oscillator is composed of an RTD, a slot antenna, and a varactor diode for electrical frequency tuning. The output of the RTD oscillating at 610 GHz was down-converted to 400 MHz by a heterodyne detection. The phase noise was transformed to amplitude noise by a balanced mixer and fed back into the varactor diode. The loop filter for a stable operation is discussed. The spectral linewidth of 18.6 MHz in free-running operation was reduced to less than 1 Hz by the feedback.

Receiver design and performance characteristics

NASA Technical Reports Server (NTRS)

Simon, M. K.; Yuen, J. H.

1982-01-01

The basic design, principles of operation, and characteristics of deep space communications receivers are examined. In particular, the basic fundamentals of phase-locked loop and Costas loop receivers used for synchronization, tracking, and demodulation of phase-coherent signals in residual carrier and suppressed carrier systems are addressed.

A digital optical phase-locked loop for diode lasers based on field programmable gate array

DOE Office of Scientific and Technical Information (OSTI.GOV)

Xu Zhouxiang; Zhang Xian; Huang Kaikai

2012-09-15

We have designed and implemented a highly digital optical phase-locked loop (OPLL) for diode lasers in atom interferometry. The three parts of controlling circuit in this OPLL, including phase and frequency detector (PFD), loop filter and proportional integral derivative (PID) controller, are implemented in a single field programmable gate array chip. A structure type compatible with the model MAX9382/MCH12140 is chosen for PFD and pipeline and parallelism technology have been adapted in PID controller. Especially, high speed clock and twisted ring counter have been integrated in the most crucial part, the loop filter. This OPLL has the narrow beat notemore » line width below 1 Hz, residual mean-square phase error of 0.14 rad{sup 2} and transition time of 100 {mu}s under 10 MHz frequency step. A main innovation of this design is the completely digitalization of the whole controlling circuit in OPLL for diode lasers.« less

Reconstructing a missing link in the evolution of a recently diverged phosphotriesterase by active-site loop remodeling.

PubMed

Afriat-Jurnou, Livnat; Jackson, Colin J; Tawfik, Dan S

2012-08-07

Only decades after the introduction of organophosphate pesticides, bacterial phosphotriesterases (PTEs) have evolved to catalyze their degradation with remarkable efficiency. Their closest known relatives, lactonases, with promiscuous phosphotriasterase activity, dubbed PTE-like lactonases (PLLs), share only 30% sequence identity and also differ in the configuration of their active-site loops. PTE was therefore presumed to have evolved from a yet unknown PLL whose primary activity was the hydrolysis of quorum sensing homoserine lactones (HSLs) (Afriat et al. (2006) Biochemistry 45, 13677-13686). However, how PTEs diverged from this presumed PLL remains a mystery. In this study we investigated loop remodeling as a means of reconstructing a homoserine lactonase ancestor that relates to PTE by few mutational steps. Although, in nature, loop remodeling is a common mechanism of divergence of enzymatic functions, reproducing this process in the laboratory is a challenge. Structural and phylogenetic analyses enabled us to remodel one of PTE's active-site loops into a PLL-like configuration. A deletion in loop 7, combined with an adjacent, highly epistatic, point mutation led to the emergence of an HSLase activity that is undetectable in PTE (k(cat)/K(M) values of up to 2 × 10(4)). The appearance of the HSLase activity was accompanied by only a minor decrease in PTE's paraoxonase activity. This specificity change demonstrates the potential role of bifunctional intermediates in the divergence of new enzymatic functions and highlights the critical contribution of loop remodeling to the rapid divergence of new enzyme functions.

Ring magnet firing angle control

DOEpatents

Knott, M.J.; Lewis, L.G.; Rabe, H.H.

1975-10-21

A device is provided for controlling the firing angles of thyratrons (rectifiers) in a ring magnet power supply. A phase lock loop develops a smooth ac signal of frequency equal to and in phase with the frequency of the voltage wave developed by the main generator of the power supply. A counter that counts from zero to a particular number each cycle of the main generator voltage wave is synchronized with the smooth AC signal of the phase lock loop. Gates compare the number in the counter with predetermined desired firing angles for each thyratron and with coincidence the proper thyratron is fired at the predetermined firing angle.

Phase-locking dynamics in optoelectronic oscillator

NASA Astrophysics Data System (ADS)

Banerjee, Abhijit; Sarkar, Jayjeet; Das, NikhilRanjan; Biswas, Baidyanath

2018-05-01

This paper analyzes the phase-locking phenomenon in single-loop optoelectronic microwave oscillators considering weak and strong radio frequency (RF) signal injection. The analyses are made in terms of the lock-range, beat frequency and the spectral components of the unlocked-driven oscillator. The influence of RF injection signal on the frequency pulling of the unlocked-driven optoelectronic oscillator (OEO) is also studied. An approximate expression for the amplitude perturbation of the oscillator is derived and the influence of amplitude perturbation on the phase-locking dynamics is studied. It is shown that the analysis clearly reveals the phase-locking phenomenon and the associated frequency pulling mechanism starting from the fast-beat state through the quasi-locked state to the locked state of the pulled OEO. It is found that the unlocked-driven OEO output signal has a very non-symmetrical sideband distribution about the carrier. The simulation results are also given in partial support to the conclusions of the analysis.

Phase locking of a 2.7 THz quantum cascade laser to a microwave reference.

PubMed

Khosropanah, P; Baryshev, A; Zhang, W; Jellema, W; Hovenier, J N; Gao, J R; Klapwijk, T M; Paveliev, D G; Williams, B S; Kumar, S; Hu, Q; Reno, J L; Klein, B; Hesler, J L

2009-10-01

We demonstrate the phase locking of a 2.7 THz metal-metal waveguide quantum cascade laser (QCL) to an external microwave signal. The reference is the 15th harmonic, generated by a semiconductor superlattice nonlinear device, of a signal at 182 GHz, which itself is generated by a multiplier chain (x12) from a microwave synthesizer at approximately 15 GHz. Both laser and reference radiations are coupled into a bolometer mixer, resulting in a beat signal, which is fed into a phase-lock loop. The spectral analysis of the beat signal confirms that the QCL is phase locked. This result opens the possibility to extend heterodyne interferometers into the far-infrared range.

Common mode frequency instability in internally phase-locked terahertz quantum cascade lasers.

PubMed

Wanke, M C; Grine, A D; Fuller, C T; Nordquist, C D; Cich, M J; Reno, J L; Lee, Mark

2011-11-21

Feedback from a diode mixer integrated into a 2.8 THz quantum cascade laser (QCL) was used to phase lock the difference frequencies (DFs) among the Fabry-Perot (F-P) longitudinal modes of a QCL. Approximately 40% of the DF power was phase locked, consistent with feedback loop bandwidth of 10 kHz and phase noise bandwidth ~0.5 MHz. While the locked DF signal has ≤ 1 Hz linewidth and negligible drift over ~30 min, mixing measurements between two QCLs and between a QCL and molecular gas laser show that the common mode frequency stability is no better than a free-running QCL. © 2011 Optical Society of America

Phase Locking of a 2.7 THz Quantum Cascade Laser to a Microwave Reference

NASA Technical Reports Server (NTRS)

Khosropanah, P.; Baryshev, A.; Zhang, W.; Jellema, W.; Hovenier, J. N.; Gao, J. R.; Klapwijk, T. M.; Paveliev, D. G.; Williams, B. S.; Hu, Q.;

A study of FM threshold extension techniques

NASA Technical Reports Server (NTRS)

Arndt, G. D.; Loch, F. J.

1972-01-01

The characteristics of three postdetection threshold extension techniques are evaluated with respect to the ability of such techniques to improve the performance of a phase lock loop demodulator. These techniques include impulse-noise elimination, signal correlation for the detection of impulse noise, and delta modulation signal processing. Experimental results from signal to noise ratio data and bit error rate data indicate that a 2- to 3-decibel threshold extension is readily achievable by using the various techniques. This threshold improvement is in addition to the threshold extension that is usually achieved through the use of a phase lock loop demodulator.

Optimization of A 2-Micron Laser Frequency Stabilization System for a Double-Pulse CO2 Differential Absorption Lidar

NASA Technical Reports Server (NTRS)

Chen, Songsheng; Yu, Jirong; Bai, Yingsin; Koch, Grady; Petros, Mulugeta; Trieu, Bo; Petzar, Paul; Singh, Upendra N.; Kavaya, Michael J.; Beyon, Jeffrey

2010-01-01

A carbon dioxide (CO2) Differential Absorption Lidar (DIAL) for accurate CO2 concentration measurement requires a frequency locking system to achieve high frequency locking precision and stability. We describe the frequency locking system utilizing Frequency Modulation (FM), Phase Sensitive Detection (PSD), and Proportional Integration Derivative (PID) feedback servo loop, and report the optimization of the sensitivity of the system for the feed back loop based on the characteristics of a variable path-length CO2 gas cell. The CO2 gas cell is characterized with HITRAN database (2004). The method can be applied for any other frequency locking systems referring to gas absorption line.

Quantizing and sampling considerations in digital phased-locked loops

NASA Technical Reports Server (NTRS)

Hurst, G. T.; Gupta, S. C.

1974-01-01

The quantizer problem is first considered. The conditions under which the uniform white sequence model for the quantizer error is valid are established independent of the sampling rate. An equivalent spectral density is defined for the quantizer error resulting in an effective SNR value. This effective SNR may be used to determine quantized performance from infinitely fine quantized results. Attention is given to sampling rate considerations. Sampling rate characteristics of the digital phase-locked loop (DPLL) structure are investigated for the infinitely fine quantized system. The predicted phase error variance equation is examined as a function of the sampling rate. Simulation results are presented and a method is described which enables the minimum required sampling rate to be determined from the predicted phase error variance equations.

A PLL-based resampling technique for vibration analysis in variable-speed wind turbines with PMSG: A bearing fault case

NASA Astrophysics Data System (ADS)

Pezzani, Carlos M.; Bossio, José M.; Castellino, Ariel M.; Bossio, Guillermo R.; De Angelo, Cristian H.

2017-02-01

Condition monitoring in permanent magnet synchronous machines has gained interest due to the increasing use in applications such as electric traction and power generation. Particularly in wind power generation, non-invasive condition monitoring techniques are of great importance. Usually, in such applications the access to the generator is complex and costly, while unexpected breakdowns results in high repair costs. This paper presents a technique which allows using vibration analysis for bearing fault detection in permanent magnet synchronous generators used in wind turbines. Given that in wind power applications the generator rotational speed may vary during normal operation, it is necessary to use special sampling techniques to apply spectral analysis of mechanical vibrations. In this work, a resampling technique based on order tracking without measuring the rotor position is proposed. To synchronize sampling with rotor position, an estimation of the rotor position obtained from the angle of the voltage vector is proposed. This angle is obtained from a phase-locked loop synchronized with the generator voltages. The proposed strategy is validated by laboratory experimental results obtained from a permanent magnet synchronous generator. Results with single point defects in the outer race of a bearing under variable speed and load conditions are presented.

Open-loop digital frequency multiplier

NASA Technical Reports Server (NTRS)

Moore, R. C.

1977-01-01

Monostable multivibrator is implemented by using digital integrated circuits where multiplier constant is too large for conventional phase-locked-loop integrated circuit. A 400 Hz clock is generated by divide-by-N counter from 1 Hz timing reference.

Digital accumulators in phase and frequency tracking loops

NASA Technical Reports Server (NTRS)

Hinedi, Sami; Statman, Joseph I.

1990-01-01

Results on the effects of digital accumulators in phase and frequency tracking loops are presented. Digital accumulators or summers are used extensively in digital signal processing to perform averaging or to reduce processing rates to acceptable levels. For tracking the Doppler of high-dynamic targets at low carrier-to-noise ratios, it is shown through simulation and experiment that digital accumulators can contribute an additional loss in operating threshold. This loss was not considered in any previous study and needs to be accounted for in performance prediction analysis. Simulation and measurement results are used to characterize the loss due to the digital summers for three different tracking loops: a digital phase-locked loop, a cross-product automatic frequency tracking loop, and an extended Kalman filter. The tracking algorithms are compared with respect to their frequency error performance and their ability to maintain lock during severe maneuvers at various carrier-to-noise ratios. It is shown that failure to account for the effect of accumulators can result in an inaccurate performance prediction, the extent of which depends highly on the algorithm used.

Temperature feedback control for long-term carrier-envelope phase locking.

PubMed

Yun, Chenxia; Chen, Shouyuan; Wang, He; Chini, Michael; Chang, Zenghu

2009-09-20

We report a double feedback loop for the improvement of the carrier-envelope phase stabilization of a chirped mirror based femtosecond laser oscillator. By combining the control of the Ti:sapphire crystal temperature and the modulation of the pump power, the carrier envelope offset frequency, fCEO, was locked for close to 20 h, which is much longer than the typical phase stabilization time with only pump power modulation.

Phase-locking of a 2.7-THz Quantum Cascade Laser to a Microwave Reference

NASA Astrophysics Data System (ADS)

Baryshev, A. M.; Khosropanah, P.; Zhang, W.; Jellema, W.; Hovenier, J. N.; Gao, J. R.; Klapwijk, T. M.; Paveliev, D. G.; William, B. S.; Kumar, S.; Hu, Q.; Reno, J. L.; Klein, B.; Hesler, J. L.

2009-04-01

We demonstrate phase-locking of a 2.7-THz metal-metal waveguide quantum cascade laser (QCL) to an external microwave signal. The reference is the 15th harmonic, generated by a semiconductor superlattice nonlinear device, of a signal at 182 GHz, which itself is generated by a multiplier-chain (x2x3x2) from a microwave synthesizer at 15 GHz. Both laser and reference radiations are coupled into a hot electron bolometer mixer, resulting in a beat signal, which is fed into a phase-lock loop. Spectral analysis of the beat signal (see fig. 1) confirms that the QCL is phase locked. This result opens the possibility to extend heterodyne interferometers into the far-infrared range.

The Statistical Loop Analyzer (SLA)

NASA Technical Reports Server (NTRS)

Lindsey, W. C.

1985-01-01

The statistical loop analyzer (SLA) is designed to automatically measure the acquisition, tracking and frequency stability performance characteristics of symbol synchronizers, code synchronizers, carrier tracking loops, and coherent transponders. Automated phase lock and system level tests can also be made using the SLA. Standard baseband, carrier and spread spectrum modulation techniques can be accomodated. Through the SLA's phase error jitter and cycle slip measurements the acquisition and tracking thresholds of the unit under test are determined; any false phase and frequency lock events are statistically analyzed and reported in the SLA output in probabilistic terms. Automated signal drop out tests can be performed in order to trouble shoot algorithms and evaluate the reacquisition statistics of the unit under test. Cycle slip rates and cycle slip probabilities can be measured using the SLA. These measurements, combined with bit error probability measurements, are all that are needed to fully characterize the acquisition and tracking performance of a digital communication system.

False lock performance in polarity-type Costas receivers in the presence of periodic data patterns

NASA Technical Reports Server (NTRS)

Wang, James June-Ming; Lai, Dennis Teng-Tsun; Heng, Veronica Siang-Gek; Godfrey, Robert D.

1987-01-01

The authors address the false-lock performance of receivers which use polarity-type Costas loops for the carrier recovery of unbalanced quadrature phase-shift keyed (QPSK), asynchronous QPSK or binary PSK (BPSK) signals in the presence of periodic data patterns. The potential false-lock frequencies are first identified. Expressions for both true-lock and false-lock components are also derived, thereby allowing numerical evaluation of various key parameters for cases of practical interest.

Geodetic Secor Satellite

DTIC Science & Technology

1974-06-01

retrans- minied modulation signals. A phase-lock loop was used to provide correlation detection, allowing automatic acquisition and phase tracking at...steel strips, 0.5-inch-wide by 0.009-inch-thick, and formed to a 0.75-inch radius. Each antenne -was plated with silver to imprive con- dutivity...Telemetry Requirements k. Phase Detector Output Requirements 1. Primary Power Requirements m. AM Suppression Requirements n. Data Feedback Loop Gain

Analysis of asymmetric resonance response of thermally excited silicon micro-cantilevers for mass-sensitive nanoparticle detection

NASA Astrophysics Data System (ADS)

Bertke, Maik; Hamdana, Gerry; Wu, Wenze; Suryo Wasisto, Hutomo; Uhde, Erik; Peiner, Erwin

2017-06-01

In this paper, the asymmetric resonance frequency (f 0) responses of thermally in-plane excited silicon cantilevers for a pocket-sized, cantilever-based airborne nanoparticle detector (Cantor) are analysed. By measuring the shift of f 0 caused by the deposition of nanoparticles (NPs), the cantilevers are used as a microbalance. The cantilever sensors are low cost manufactured from silicon by bulk-micromachining techniques and contain an integrated p-type heating actuator and a sensing piezoresistive Wheatstone bridge. f 0 is tracked by a homemade phase-locked loop (PPL) for real-time measurements. To optimize the sensor performance, a new cantilever geometry was designed, fabricated and characterized by its frequency responses. The most significant characterisation parameters of our application are f 0 and the quality factor (Q), which have high influences on sensitivity and efficiency of the NP detector. Regarding the asymmetric resonance signal, a novel fitting function based on the Fano resonance replacing the conventionally used function of the simple harmonic oscillator and a method to calculate Q by its fitting parameters were developed for a quantitative evaluation. To obtain a better understanding of the resonance behaviours, we analysed the origin of the asymmetric line shapes. Therefore, we compared the frequency response of the on-chip thermal excitation with an external excitation using an in-plane piezo actuator. In correspondence to the Fano effect, we could reconstruct the measured resonance curves by coupling two signals with constant amplitude and the expected signal of the cantilever, respectively. Moreover, the phase of the measurement signal can be analysed by this method, which is important to understand the locking process of the PLL circuit. Besides the frequency analysis, experimental results and calibration measurements with different particle types are presented. Using the described analysis method, decent results to optimize a next generation of Cantor are expected.

Three-phase Four-leg Inverter LabVIEW FPGA Control Code

DOE Office of Scientific and Technical Information (OSTI.GOV)

In the area of power electronics control, Field Programmable Gate Arrays (FPGAs) have the capability to outperform their Digital Signal Processor (DSP) counterparts due to the FPGA’s ability to implement true parallel processing and therefore facilitate higher switching frequencies, higher control bandwidth, and/or enhanced functionality. National Instruments (NI) has developed two platforms, Compact RIO (cRIO) and Single Board RIO (sbRIO), which combine a real-time processor with an FPGA. The FPGA can be programmed with a subset of the well-known LabVIEW graphical programming language. The use of cRIO and sbRIO for power electronics control has developed over the last few yearsmore » to include control of three-phase inverters. Most three-phase inverter topologies include three switching legs. The addition of a fourth-leg to natively generate the neutral connection allows the inverter to serve single-phase loads in a microgrid or stand-alone power system and to balance the three-phase voltages in the presence of significant load imbalance. However, the control of a four-leg inverter is much more complex. In particular, instead of standard two-dimensional space vector modulation (SVM), the inverter requires three-dimensional space vector modulation (3D-SVM). The candidate software implements complete control algorithms in LabVIEW FPGA for a three-phase four-leg inverter. The software includes feedback control loops, three-dimensional space vector modulation gate-drive algorithms, advanced alarm handling capabilities, contactor control, power measurements, and debugging and tuning tools. The feedback control loops allow inverter operation in AC voltage control, AC current control, or DC bus voltage control modes based on external mode selection by a user or supervisory controller. The software includes the ability to synchronize its AC output to the grid or other voltage-source before connection. The software also includes provisions to allow inverter operation in parallel with other voltage regulating devices on the AC or DC buses. This flexibility allows the Inverter to operate as a stand-alone voltage source, connected to the grid, or in parallel with other controllable voltage sources as part of a microgrid or remote power system. In addition, as the inverter is expected to operate under severe unbalanced conditions, the software includes algorithms to accurately compute real and reactive power for each phase based on definitions provided in the IEEE Standard 1459: IEEE Standard Definitions for the Measurement of Electric Power Quantities Under Sinusoidal, Nonsinusoidal, Balanced, or Unbalanced Conditions. Finally, the software includes code to output analog signals for debugging and for tuning of control loops. The software fits on the Xilinx Virtex V LX110 FPGA embedded in the NI cRIO-9118 FPGA chassis, and with a 40 MHz base clock, supports a modulation update rate of 40 MHz, user-settable switching frequencies and synchronized control loop update rates of tens of kHz, and reference waveform generation, including Phase Lock Loop (PLL), update rate of 100 kHz.« less

An approach to the analysis of performance of quasi-optimum digital phase-locked loops.

NASA Technical Reports Server (NTRS)

Polk, D. R.; Gupta, S. C.

1973-01-01

An approach to the analysis of performance of quasi-optimum digital phase-locked loops (DPLL's) is presented. An expression for the characteristic function of the prior error in the state estimate is derived, and from this expression an infinite dimensional equation for the prior error variance is obtained. The prior error-variance equation is a function of the communication system model and the DPLL gain and is independent of the method used to derive the DPLL gain. Two approximations are discussed for reducing the prior error-variance equation to finite dimension. The effectiveness of one approximation in analyzing DPLL performance is studied.

Electronic Circuit Experiments and SPICE Simulation of Double Covering Bifurcation of 2-Torus Quasi-Periodic Flow in Phase-Locked Loop Circuit

NASA Astrophysics Data System (ADS)

Kamiyama, Kyohei; Endo, Tetsuro; Imai, Isao; Komuro, Motomasa

2016-06-01

Double covering (DC) bifurcation of a 2-torus quasi-periodic flow in a phase-locked loop circuit was experimentally investigated using an electronic circuit and via SPICE simulation; in the circuit, the input radio-frequency signal was frequency modulated by the sum of two asynchronous sinusoidal baseband signals. We observed both DC and period-doubling bifurcations of a discrete map on two Poincaré sections, which were realized by changing the sample timing from one baseband sinusoidal signal to the other. The results confirm the DC bifurcation of the original flow.

Design of a delay-locked-loop-based time-to-digital converter

NASA Astrophysics Data System (ADS)

Zhaoxin, Ma; Xuefei, Bai; Lu, Huang

2013-09-01

A time-to-digital converter (TDC) based on a reset-free and anti-harmonic delay-locked loop (DLL) circuit for wireless positioning systems is discussed and described. The DLL that generates 32-phase clocks and a cycle period detector is employed to avoid “false locking". Driven by multiphase clocks, an encoder detects pulses and outputs the phase of the clock when the pulse arrives. The proposed TDC was implemented in SMIC 0.18 μm CMOS technology, and its core area occupies 0.7 × 0.55 mm2. The reference frequency ranges from 20 to 150 MHz. An LSB resolution of 521 ps can be achieved by using a reference clock of 60 MHz and the DNL is less than ±0.75 LSB. It dissipates 31.5 mW at 1.8 V supply voltage.

Analysis, design, and control of a transcutaneous power regulator for artificial hearts.

PubMed

Qianhong Chen; Siu Chung Wong; Tse, C K; Xinbo Ruan

2009-02-01

Based on a generic transcutaneous transformer model, a remote power supply using a resonant topology for use in artificial hearts is analyzed and designed for easy controllability and high efficiency. The primary and secondary windings of the transcutaneous transformer are positioned outside and inside the human body, respectively. In such a transformer, the alignment and gap may change with external positioning. As a result, the coupling coefficient of the transcutaneous transformer is also varying, and so are the two large leakage inductances and the mutual inductance. Resonant-tank circuits with varying resonant-frequency are formed from the transformer inductors and external capacitors. For a given range of coupling coefficients, an operating frequency corresponding to a particular coupling coefficient can be found, for which the voltage transfer function is insensitive to load. Prior works have used frequency modulation to regulate the output voltage under varying load and transformer coupling. The use of frequency modulation may require a wide control frequency range which may extend well above the load insensitive frequency. In this paper, study of the input-to-output voltage transfer function is carried out, and a control method is proposed to lock the switching frequency at just above the load insensitive frequency for optimized efficiency at heavy loads. Specifically, operation at above resonant of the resonant circuits is maintained under varying coupling-coefficient. Using a digital-phase-lock-loop (PLL), zero-voltage switching is achieved in a full-bridge converter which is also programmed to provide output voltage regulation via pulsewidth modulation (PWM). A prototype transcutaneous power regulator is built and found to to perform excellently with high efficiency and tight regulation under variations of the alignment or gap of the transcutaneous transformer, load and input voltage.

A bibliography of the theory and application of the phase-lock principle

NASA Technical Reports Server (NTRS)

Lindsey, W. C.; Tausworthe, R. C.

1973-01-01

A literature search was conducted in an effort to collect and compile as many references on the phase-locked loop as possible. Although not all inclusive, a comprehensive listing of approximately 800 references covering the past two decades of work reported throughout the world are presented. The compilation is given in two parts: first by categories, and then alphabetically by authors.

Precision and Fast Wavelength Tuning of a Dynamically Phase-Locked Widely-Tunable Laser

NASA Technical Reports Server (NTRS)

Numata, Kenji; Chen, Jeffrey R.; Wu, Stewart T.

2012-01-01

We report a precision and fast wavelength tuning technique demonstrated for a digital-supermode distributed Bragg reflector laser. The laser was dynamically offset-locked to a frequency-stabilized master laser using an optical phase-locked loop, enabling precision fast tuning to and from any frequencies within a 40-GHz tuning range. The offset frequency noise was suppressed to the statically offset-locked level in less than 40 s upon each frequency switch, allowing the laser to retain the absolute frequency stability of the master laser. This technique satisfies stringent requirements for gas sensing lidars and enables other applications that require such well-controlled precision fast tuning.

Influence of poly(L-lysine) on the structure of dipalmitoylphosphatidylglycerol/water dispersions studied by X-ray scattering.

PubMed

Förster, G; Schwieger, C; Faber, F; Weber, T; Blume, A

2007-04-01

The interaction between the negatively charged phospholipid DPPG and positively charged poly(L: -lysine) (PLL) of different lengths was studied by X-ray scattering in the SAXS and WAXS region. As a reference pure DPPG (Na salt) was investigated over a wide temperature range (-30 to 70 degrees C). The phase behavior of DPPG in aqueous and in buffer/salt dispersions showed a metastable subgel phase at low temperatures and a recrystallization upon heating before reaching the liquid-crystalline phase. The presence of additional salt stabilizes the bilayer structure and decreases the recrystallization temperature. Large changes in the SAXS region are not connected with changes in chain packing. In DPPG/PLL samples, the PLL is inserted between adjacent headgroup layers and liberates counterions which give rise to a freezing point depression. In the complex with DPPG PLL form an alpha-helical secondary structure at pH 7 and temperatures below the gel to liquid-crystalline phase transition. This prevents DPPG from recrystallization and strongly increases the stacking order. The lamellar repeat distance is decreased and fixed by the helix conformation of PLL in the gel phase. PLL with n = 14 is too short to form helices and is squeezed out reversibly from the interbilayer space upon cooling by freezing of trapped water. In dispersions with longer PLLs (n > 400) at -20 degrees C a 1D crystallization of PLL alpha-helices in the aqueous layer between the headgroups takes place. A structural model is presented for the lateral periodic complex, which is similar to the known cationic lipid/DNA complex.

Interaction of Poly(l-lysine)/Polysaccharide Complex Nanoparticles with Human Vascular Endothelial Cells.

PubMed

Weber, Dominik; Torger, Bernhard; Richter, Karsten; Nessling, Michelle; Momburg, Frank; Woltmann, Beatrice; Müller, Martin; Schwartz-Albiez, Reinhard

2018-05-23

Angiogenesis plays an important role in both soft and hard tissue regeneration, which can be modulated by therapeutic drugs. If nanoparticles (NP) are used as vectors for drug delivery, they have to encounter endothelial cells (EC) lining the vascular lumen, if applied intravenously. Herein the interaction of unloaded polyelectrolyte complex nanoparticles (PECNP) composed of cationic poly(l-lysine) (PLL) and various anionic polysaccharides with human vascular endothelial cells (HUVEC) was analyzed. In particular PECNP were tested for their cell adhesive properties, their cellular uptake and intracellular localization considering composition and net charge. PECNP may form a platform for both cell coating and drug delivery. PECNP, composed of PLL in combination with the polysaccharides dextran sulfate (DS), cellulose sulfate (CS) or heparin (HEP), either unlabeled or labeled with fluorescein isothiocyanate (FITC) and either with positive or negative net charge were prepared. PECNP were applied to human umbilical cord vein endothelial cells (HUVEC) in both, the volume phase and immobilized phase at model substrates like tissue culture dishes. The attachment of PECNP to the cell surface, their intracellular uptake, and effects on cell proliferation and growth behavior were determined. Immobilized PECNP reduced attachment of HUVEC, most prominently the systems PLL/HEP and PLL/DS. A small percentage of immobilized PECNP was taken up by cells during adhesion. PECNP in the volume phase showed no effect of the net charge sign and only minor effects of the composition on the binding and uptake of PECNP at HUVEC. PECNP were stored in endosomal vesicles in a cumulative manner without apparent further processing. During mitosis, internalized PECNP were almost equally distributed among the dividing cells. Both, in the volume phase and immobilized at the surface, PECNP composed of PLL/HEP and PLL/DS clearly reduced cell proliferation of HUVEC, however without an apparent cytotoxic effect, while PLL/CS composition showed minor impairment. PECNP have an anti-adhesive effect on HUVEC and are taken up by endothelial cells which may negatively influence the proliferation rate of HUVEC. The negative effects were less obvious with the composition PLL/CS. Since uptake and binding for PLL/HEP was more efficient than for PLL/DS, PECNP of PLL/HEP may be used to deliver growth factors to endothelial cells during vascularization of bone reconstitution material, whereas those of PLL/CS may have an advantage for substituting biomimetic bone scaffold material.

Phase noise mitigation of QPSK signal utilizing phase-locked multiplexing of signal harmonics and amplitude saturation.

PubMed

Mohajerin-Ariaei, Amirhossein; Ziyadi, Morteza; Chitgarha, Mohammad Reza; Almaiman, Ahmed; Cao, Yinwen; Shamee, Bishara; Yang, Jeng-Yuan; Akasaka, Youichi; Sekiya, Motoyoshi; Takasaka, Shigehiro; Sugizaki, Ryuichi; Touch, Joseph D; Tur, Moshe; Langrock, Carsten; Fejer, Martin M; Willner, Alan E

2015-07-15

We demonstrate an all-optical phase noise mitigation scheme based on the generation, delay, and coherent summation of higher order signal harmonics. The signal, its third-order harmonic, and their corresponding delayed variant conjugates create a staircase phase-transfer function that quantizes the phase of quadrature-phase-shift-keying (QPSK) signal to mitigate phase noise. The signal and the harmonics are automatically phase-locked multiplexed, avoiding the need for phase-based feedback loop and injection locking to maintain coherency. The residual phase noise converts to amplitude noise in the quantizer stage, which is suppressed by parametric amplification in the saturation regime. Phase noise reduction of ∼40% and OSNR-gain of ∼3  dB at BER 10(-3) are experimentally demonstrated for 20- and 30-Gbaud QPSK input signals.

A digital, constant-frequency pulsed phase-locked-loop instrument for real-time, absolute ultrasonic phase measurements

NASA Astrophysics Data System (ADS)

Haldren, H. A.; Perey, D. F.; Yost, W. T.; Cramer, K. E.; Gupta, M. C.

2018-05-01

A digitally controlled instrument for conducting single-frequency and swept-frequency ultrasonic phase measurements has been developed based on a constant-frequency pulsed phase-locked-loop (CFPPLL) design. This instrument uses a pair of direct digital synthesizers to generate an ultrasonically transceived tone-burst and an internal reference wave for phase comparison. Real-time, constant-frequency phase tracking in an interrogated specimen is possible with a resolution of 0.000 38 rad (0.022°), and swept-frequency phase measurements can be obtained. Using phase measurements, an absolute thickness in borosilicate glass is presented to show the instrument's efficacy, and these results are compared to conventional ultrasonic pulse-echo time-of-flight (ToF) measurements. The newly developed instrument predicted the thickness with a mean error of -0.04 μm and a standard deviation of error of 1.35 μm. Additionally, the CFPPLL instrument shows a lower measured phase error in the absence of changing temperature and couplant thickness than high-resolution cross-correlation ToF measurements at a similar signal-to-noise ratio. By showing higher accuracy and precision than conventional pulse-echo ToF measurements and lower phase errors than cross-correlation ToF measurements, the new digitally controlled CFPPLL instrument provides high-resolution absolute ultrasonic velocity or path-length measurements in solids or liquids, as well as tracking of material property changes with high sensitivity. The ability to obtain absolute phase measurements allows for many new applications than possible with previous ultrasonic pulsed phase-locked loop instruments. In addition to improved resolution, swept-frequency phase measurements add useful capability in measuring properties of layered structures, such as bonded joints, or materials which exhibit non-linear frequency-dependent behavior, such as dispersive media.

Design and Measurement of a Digital Phase Locked BWO for Accurately Extracting the Quality Factors in a Biconcave Resonator System

NASA Astrophysics Data System (ADS)

Gao, Yuanci; Charles, Jones R.; Yu, Guofen; Jyotsna, Dutta M.

2012-03-01

A long loop phase locked backward-wave oscillator (BWO) for a high quality factor resonator system operating at D-band frequencies (130-170GHz) was described, the phase noise of the phased locked BWO was analyzed and measured at typical frequencies. When it used with a high quality factor open resonator for measuring the quality factor of simple harmonic resonators based on the magnitude transfer characteristic, this system has proven to be capable of accurate measuring the quality factor as high as 0.8 million with an uncertainty of less than 1.3% (Lorentzian fitting) at typical frequencies in the range of 130GHz-170GHz.

Fast flux locked loop

DOEpatents

Ganther, Jr., Kenneth R.; Snapp, Lowell D.

2002-09-10

A flux locked loop for providing an electrical feedback signal, the flux locked loop employing radio-frequency components and technology to extend the flux modulation frequency and tracking loop bandwidth. The flux locked loop of the present invention has particularly useful application in read-out electronics for DC SQUID magnetic measurement systems, in which case the electrical signal output by the flux locked loop represents an unknown magnetic flux applied to the DC SQUID.

Spectral estimation of received phase in the presence of amplitude scintillation

NASA Technical Reports Server (NTRS)

Vilnrotter, V. A.; Brown, D. H.; Hurd, W. J.

1988-01-01

A technique is demonstrated for obtaining the spectral parameters of the received carrier phase in the presence of carrier amplitude scintillation, by means of a digital phased locked loop. Since the random amplitude fluctuations generate time-varying loop characteristics, straightforward processing of the phase detector output does not provide accurate results. The method developed here performs a time-varying inverse filtering operation on the corrupted observables, thus recovering the original phase process and enabling accurate estimation of its underlying parameters.

Performance of the all-digital data-transition tracking loop in the advanced receiver

NASA Astrophysics Data System (ADS)

Cheng, U.; Hinedi, S.

1989-11-01

The performance of the all-digital data-transition tracking loop (DTTL) with coherent or noncoherent sampling is described. The effects of few samples per symbol and of noncommensurate sampling rates and symbol rates are addressed and analyzed. Their impacts on the loop phase-error variance and the mean time to lose lock (MTLL) are quantified through computer simulations. The analysis and preliminary simulations indicate that with three to four samples per symbol, the DTTL can track with negligible jitter because of the presence of earth Doppler rate. Furthermore, the MTLL is also expected to be large engough to maintain lock over a Deep Space Network track.

Constant frequency pulsed phase-locked-loop instrument for measurement of ultrasonic velocity

NASA Technical Reports Server (NTRS)

Yost, William T.; Cantrell, John H.; Kushnick, Peter W.

1991-01-01

A new instrument based on a constant-frequency pulsed phase-locked-loop (CFPPLL) concept has been developed to accurately measure the ultrasonic wave velocity in liquids and changes in ultrasonic wave velocity in solids and liquids. An analysis of the system shows that it is immune to many of the frequency-dependent effects that plague other techniques. Measurements of the sound velocity in ultrapure water are used to confirm the analysis. The results are in excellent agreement with values from the literature, and establish that the CFPPLL provides a reliable, accurate way to measure velocities, as well as for monitoring small changes in velocity without the sensitivity to frequency-dependent phase shifts common to other measurement systems. The estimated sensitivity to phase changes is better than a few parts in 10 to the 7th.

Phase-locked loop with controlled phase slippage

DOEpatents

Mestha, Lingappa K.

1994-01-01

A system for synchronizing a first subsystem controlled by a changing frequency sweeping from a first frequency to a second frequency, with a second subsystem operating at a steady state second frequency. Trip plan parameters are calculated in advance to determine the phase relationship between the frequencies of the first subsystem and second subsystem in order to obtain synchronism at the end of the frequency sweep of the first subsystem. During the time in which the frequency of the first subsystem is sweeping from the first frequency to the second frequency, the phase locked system compares the actual phase difference with the trip plan phase difference and incrementally changes the sweep frequency in a manner so that phase lock is achieved when the first subsystem reaches a frequency substantially identical to that of the second subsystem.

Centering a DDR Strobe in the Middle of a Data Packet

NASA Technical Reports Server (NTRS)

Johnson, Michael; Nelson, Dave; Seefeldt, James; Roper, Weston; Passow, Craig

2014-01-01

The Orion CEV Northstar ASIC (application- specific integrated circuit) project required a DDR (double data rate) memory bus driver/receiver (DDR PHY block) to interface with external DDR memory. The DDR interface (JESD79C) is based on a source synchronous strobe (DQS\\) that is sent along with each packet of data (DQ). New data is provided concurrently with each edge of strobe and is sent irregularly. In order to capture this data, the strobe needs to be delayed and used to latch the data into a register. A circuit solves the need for training a DDR PRY block by incorporating a PVT-compensated delay element in the strobe path. This circuit takes an external reference clock signal and uses the regular clock to calibrate a known delay through a data path. The compensated delay DQS signal is then used to capture the DQ data in a normal register. This register structure can be configured as a FIFO (first in first out), in order to transfer data from the DDR domain to the system clock domain. This design is different in that it does not rely upon the need for training the system response, nor does it use a PLL (phase locked loop) or a DLL (delay locked loop) to provide an offset of the strobe signal. The circuit is created using standard ASIC building blocks, plus the PVT (process, voltage, and temperature) compensated delay line. The design uses a globally available system clock as a reference, alleviating the need to operate synchronously with the remote memory. The reference clock conditions the PVT compensated delay line to provide a pre-determined amount of delay to any data signal that passes through this delay line. The delay line is programmed in degrees of offset, so that one could think of the clock period representing 360deg of delay. In an ideal environment, delaying the strobe 1/4 of a clock cycle (90deg) would place the strobe in the middle of the data packet. This delayed strobe can then be used to clock the data into a register, satisfying setup and hold requirements of the system.

High frequency optoelectronic oscillators based on the optical feedback of semiconductor mode-locked laser diodes.

PubMed

Haji, Mohsin; Hou, Lianping; Kelly, Anthony E; Akbar, Jehan; Marsh, John H; Arnold, John M; Ironside, Charles N

2012-01-30

Optical self seeding feedback techniques can be used to improve the noise characteristics of passively mode-locked laser diodes. External cavities such as fiber optic cables can increase the memory of the phase and subsequently improve the timing jitter. In this work, an improved optical feedback architecture is proposed using an optical fiber loop delay as a cavity extension of the mode-locked laser. We investigate the effect of the noise reduction as a function of the loop length and feedback power. The well known composite cavity technique is also implemented for suppressing supermode noise artifacts presented due to harmonic mode locking effects. Using this method, we achieve a record low radio frequency linewidth of 192 Hz for any high frequency (>1 GHz) passively mode-locked laser to date (to the best of the authors' knowledge), making it promising for the development of high frequency optoelectronic oscillators.

Generation of a CW local oscillator signal using a stabilized injection locked semiconductor laser

NASA Astrophysics Data System (ADS)

Pezeshki, Jonah Massih

In high speed-communications, it is desirable to be able to detect small signals while maintaining a low bit-error rate. Conventional receivers for high-speed fiber optic networks are Amplified Direct Detectors (ADDs) that use erbium-doped fiber amplifiers (EDFAs) before the detector to achieve a suitable sensitivity. In principle, a better method for obtaining the maximum possible signal to noise ratio is through the use of homodyne detection. The major difficulty in implementing a homodyne detection system is the generation of a suitable local oscillator signal. This local oscillator signal must be at the same frequency as the received data signal, as well as be phase coherent with it. To accomplish this, a variety of synchronization techniques have been explored, including Optical Phase-Lock Loops (OPLL), Optical Injection Locking (OIL) with both Fabry-Perot and DFB lasers, and an Optical Injection Phase-Lock Loop (OIPLL). For this project I have implemented a method for regenerating a local oscillator from a portion of the received optical signal. This regenerated local oscillator is at the same frequency, and is phase coherent with, the received optical signal. In addition, we show that the injection locking process can be electronically stabilized by using the modulation transfer ratio of the slave laser as a monitor, given either a DFB or Fabry-Perot slave laser. We show that this stabilization technique maintains injection lock (given a locking range of ˜1GHz) for laser drift much greater than what is expected in a typical transmission system. In addition, we explore the quality of the output of the slave laser, and analyze its suitability as a local oscillator signal for a homodyne receiver.

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

NASA Technical Reports Server (NTRS)

Sadr, Ramin; Shah, Biren; Hinedi, Sami

1993-01-01

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

NASA Astrophysics Data System (ADS)

Sadr, Ramin; Shah, Biren; Hinedi, Sami

1993-06-01

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

NASA Astrophysics Data System (ADS)

Sadr, R.; Shah, B.; Hinedi, S.

1992-11-01

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

NASA Technical Reports Server (NTRS)

Sadr, R.; Shah, B.; Hinedi, S.

1992-01-01

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

Analysis and optimisation of the convergence behaviour of the single channel digital tanlock loop

NASA Astrophysics Data System (ADS)

Al-Kharji Al-Ali, Omar; Anani, Nader; Al-Araji, Saleh; Al-Qutayri, Mahmoud

2013-09-01

The mathematical analysis of the convergence behaviour of the first-order single channel digital tanlock loop (SC-DTL) is presented. This article also describes a novel technique that allows controlling the convergence speed of the loop, i.e. the time taken by the phase-error to reach its steady-state value, by using a specialised controller unit. The controller is used to adjust the convergence speed so as to selectively optimise a given performance parameter of the loop. For instance, the controller may be used to speed up the convergence in order to increase the lock range and improve the acquisition speed. However, since increasing the lock range can degrade the noise immunity of the system, in a noisy environment the controller can slow down the convergence speed until locking is achieved. Once the system is in lock, the convergence speed can be increased to improve the acquisition speed. The performance of the SC-DTL system was assessed against similar arctan-based loops and the results demonstrate the success of the controller in optimising the performance of the SC-DTL loop. The results of the system testing using MATLAB/Simulink simulation are presented. A prototype of the proposed system was implemented using a field programmable gate array module and the practical results are in good agreement with those obtained by simulation.

Optically stabilized Erbium fiber frequency comb with hybrid mode-locking and a broad tunable range of repetition rate.

PubMed

Yang, Honglei; Wu, Xuejian; Zhang, Hongyuan; Zhao, Shijie; Yang, Lijun; Wei, Haoyun; Li, Yan

2016-12-01

We present an optically stabilized Erbium fiber frequency comb with a broad repetition rate tuning range based on a hybrid mode-locked oscillator. We lock two comb modes to narrow-linewidth reference lasers in turn to investigate the best performance of control loops. The control bandwidth of fast and slow piezoelectric transducers reaches 70 kHz, while that of pump current modulation with phase-lead compensation is extended to 32 kHz, exceeding laser intrinsic response. Eventually, simultaneous lock of both loops is realized to totally phase-stabilize the comb, which will facilitate precision dual-comb spectroscopy, laser ranging, and timing distribution. In addition, a 1.8-MHz span of the repetition rate is achieved by an automatic optical delay line that is helpful in manufacturing a secondary comb with a similar repetition rate. The oscillator is housed in a homemade temperature-controlled box with an accuracy of ±0.02  K, which not only keeps high signal-to-noise ratio of the beat notes with reference lasers, but also guarantees self-starting at the same mode-locking every time.

Mid-infrared multiheterodyne spectroscopy with phase-locked quantum cascade lasers

NASA Astrophysics Data System (ADS)

Westberg, J.; Sterczewski, L. A.; Wysocki, G.

2017-04-01

Fabry-Pérot (FP) quantum cascade lasers (QCLs) provide purely electronically controlled monolithic sources for broadband mid-infrared (mid-IR) multiheterodyne spectroscopy (MHS), which benefits from the large gain bandwidth of the QCLs without sacrificing the narrowband properties commonly associated with the single mode distributed feedback variant. We demonstrate a FP-QCL based multiheterodyne spectrometer with a short-term noise-equivalent absorption of ˜3 × 10-4/ √{ H z } , a mid-IR spectral coverage of 25 cm-1, and very short acquisition time (10 μs) capability. The broadband potential is demonstrated by measuring the absorption spectra of ammonia and isobutane under atmospheric pressure conditions. The stability of the system is enhanced by a two-stage active frequency inter-locking procedure, where the two QCLs are pre-locked with a slow feedback loop based on an analog frequency discriminator, followed by a high bandwidth optical phase-locked loop. The locking system provides a relative frequency stability in the sub kHz range over seconds of integration time. The strength of the technique lies in the ability to acquire spectral information from all optical modes simultaneously and individually, which bodes for a versatile and cost effective spectrometer for mid-IR chemical gas sensing.

Steady-state probability density function of the phase error for a DPLL with an integrate-and-dump device

NASA Technical Reports Server (NTRS)

Simon, M.; Mileant, A.

1986-01-01

The steady-state behavior of a particular type of digital phase-locked loop (DPLL) with an integrate-and-dump circuit following the phase detector is characterized in terms of the probability density function (pdf) of the phase error in the loop. Although the loop is entirely digital from an implementation standpoint, it operates at two extremely different sampling rates. In particular, the combination of a phase detector and an integrate-and-dump circuit operates at a very high rate whereas the loop update rate is very slow by comparison. Because of this dichotomy, the loop can be analyzed by hybrid analog/digital (s/z domain) techniques. The loop is modeled in such a general fashion that previous analyses of the Real-Time Combiner (RTC), Subcarrier Demodulator Assembly (SDA), and Symbol Synchronization Assembly (SSA) fall out as special cases.

Precision and fast wavelength tuning of a dynamically phase-locked widely-tunable laser.

PubMed

Numata, Kenji; Chen, Jeffrey R; Wu, Stewart T

2012-06-18

We report a precision and fast wavelength tuning technique demonstrated for a digital-supermode distributed Bragg reflector laser. The laser was dynamically offset-locked to a frequency-stabilized master laser using an optical phase-locked loop, enabling precision fast tuning to and from any frequencies within a ~40-GHz tuning range. The offset frequency noise was suppressed to the statically offset-locked level in less than ~40 μs upon each frequency switch, allowing the laser to retain the absolute frequency stability of the master laser. This technique satisfies stringent requirements for gas sensing lidars and enables other applications that require such well-controlled precision fast tuning.

Timing performance of phased-locked loops in optical pulse position modulation communication systems

NASA Technical Reports Server (NTRS)

Lafaw, D. A.; Gardner, C. S.

1984-01-01

An optical digital communication system requires that an accurate clock signal be available at the receiver for proper synchronization with the transmitted signal. Phase synchronization is especially critical in M-ary pulse position modulation (PPM) systems where the optimum decision scheme is an energy detector which compares the energy in each of M time slots to decide which of M possible words was sent. Timing errors cause energy spillover into adjacent time slots (a form of intersymbol interference) so that only a portion of the signal energy may be attributed to the correct time slot. This effect decreases the effective signal, increases the effective noise, and increases the probability of error. A timing subsystem for a satellite-to-satellite optical PPM communication link is simulated. The receiver employs direct photodetection, preprocessing of the detected signal, and a phase-locked loop for timing synchronization. The variance of the relative phase error is examined under varying signal strength conditions as an indication of loop performance, and simulation results are compared to theoretical calculations.

Timing performance of phased-locked loops in optical pulse position modulation communication systems

NASA Astrophysics Data System (ADS)

Lafaw, D. A.; Gardner, C. S.

1984-08-01

An optical digital communication system requires that an accurate clock signal be available at the receiver for proper synchronization with the transmitted signal. Phase synchronization is especially critical in M-ary pulse position modulation (PPM) systems where the optimum decision scheme is an energy detector which compares the energy in each of M time slots to decide which of M possible words was sent. Timing errors cause energy spillover into adjacent time slots (a form of intersymbol interference) so that only a portion of the signal energy may be attributed to the correct time slot. This effect decreases the effective signal, increases the effective noise, and increases the probability of error. A timing subsystem for a satellite-to-satellite optical PPM communication link is simulated. The receiver employs direct photodetection, preprocessing of the detected signal, and a phase-locked loop for timing synchronization. The variance of the relative phase error is examined under varying signal strength conditions as an indication of loop performance, and simulation results are compared to theoretical calculations.

Measurement of high-resolution mechanical contraction of cardiac muscle by induced eddy current.

PubMed

Lee, Young-Jae; Lee, Kang-Hwi; Kang, Seung-Jin; Kim, Kyeung-Nam; Khang, Seonah; Koo, Hye Ran; Gi, Sunok; Lee, Joo Hyeon; Lee, Jeong-Whan

2014-01-01

There are many types of devices which help to manage a personal health conditions such as heartbeat chest belt, pedometer and smart watch. And the most common device has the relationship with heart rate or ECG data. However, users have to attach some electrode or fasten the belt on the bare skin to measure bio-signal information. Therefore, most of people want more convenient and short-ready-time and no-need to attach electrode. In this paper, we proposed the high-resolution measuring system of mechanical activity of cardiac muscle and thereby measure heartbeat. The principle of the proposed measuring method is that the alternating current generate alternating magnetic field around coil. This primary magnetic field induces eddy current which makes magnetic field against primary coil in the nearby objects. To measure high-resolution changes of the induced secondary magnetic fields, we used digital Phase-locked loop(PLL) circuit which provides more high-resolution traces of frequency changes than the previous studies based on digital frequency counter method. As a result of our preliminary experiment, peak-peak intervals of the proposed method showed high correlation with R-R intervals of clinical ECG signals(r=0.9249). Also, from signal traces of the proposed method, we might make a conjecture that the contraction of atrium or ventricle is reflected by changing conductivity of cardiac muscle which is beating ceaselessly.

Gas spectroscopy system with transmitters and receivers in SiGe BiCMOS for 225-273 GHz

NASA Astrophysics Data System (ADS)

Schmalz, Klaus; Rothbart, Nick; Borngräber, Johannes; Yilmaz, Selahattin Berk; Kissinger, Dietmar; Hübers, Heinz-Wilhelm

2017-10-01

This paper updates results of our work on gas spectroscopy based on transmitters (TXs) and receivers (RXs) in IHP's 0.13 μm SiGe BiCMOS technology. The improved performance of our system is shown by the absorption spectra of gaseous methanol in the range 241 - 242 GHz at 1.4 Pa, corresponding to an absorption line width of about 1 MHz. The signal-noise ratio (SNR) for the absorption line of methanol at 241.7 GHz is used as measure. The system includes two fractional-n phase-locked loops (PLLs), which allow frequency ramps for the TX and RX, and a superimposed frequency shift keying modulation (FSK) for the TX. Another option includes reference frequency ramps for the PLLs in integer-n mode, which are realized by a direct digital synthesizer (DDS). An SNR of 1515 is observed for the 241.7 GHz absorption line at 1.4 Pa. We extend our single band TX/RX system with the range 238 - 252 GHz to a multi-band system to cover the range 225 - 273 GHz. It is built by combining corresponding pairs of TXs and RXs of three frequency bands in this range. The multi-band operation allows parallel spectra acquisition for these bands. For the TXs and RXs appropriate frequency ramps are generated by their external fractional-n PLL devices.

Phase-locked loop with controlled phase slippage

DOEpatents

Mestha, L.K.

1994-03-29

A system for synchronizing a first subsystem controlled by a changing frequency sweeping from a first frequency to a second frequency, with a second subsystem operating at a steady state second frequency is described. Trip plan parameters are calculated in advance to determine the phase relationship between the frequencies of the first subsystem and second subsystem in order to obtain synchronism at the end of the frequency sweep of the first subsystem. During the time in which the frequency of the first subsystem is sweeping from the first frequency to the second frequency, the phase locked system compares the actual phase difference with the trip plan phase difference and incrementally changes the sweep frequency in a manner so that phase lock is achieved when the first subsystem reaches a frequency substantially identical to that of the second subsystem. 10 figures.

Voltage-Controlled Oscillator

NASA Technical Reports Server (NTRS)

1995-01-01

Integrated Component Systems, Inc. incorporated information from a NASA Tech Briefs article into a voltage-controlled oscillator it designed for a customer. The company then applied the technology to its series of phase-locked loop synthesizers, which offer superior phase noise performance.

FPGA implementation of self organizing map with digital phase locked loops.

PubMed

Hikawa, Hiroomi

2005-01-01

The self-organizing map (SOM) has found applicability in a wide range of application areas. Recently new SOM hardware with phase modulated pulse signal and digital phase-locked loops (DPLLs) has been proposed (Hikawa, 2005). The system uses the DPLL as a computing element since the operation of the DPLL is very similar to that of SOM's computation. The system also uses square waveform phase to hold the value of the each input vector element. This paper discuss the hardware implementation of the DPLL SOM architecture. For effective hardware implementation, some components are redesigned to reduce the circuit size. The proposed SOM architecture is described in VHDL and implemented on field programmable gate array (FPGA). Its feasibility is verified by experiments. Results show that the proposed SOM implemented on the FPGA has a good quantization capability, and its circuit size very small.

Ultrahigh-speed phaselocked-loop type clock recovery circuit using a travelling-wave laser diode amplifier as a 50 GHz phase detector

NASA Astrophysics Data System (ADS)

Kawanishi, S.; Takara, H.; Saruwatari, M.; Kitoh, T.

1993-09-01

Successful operation of a phase-locked loop is demonstrated using a traveling-wave laser-diode amplifier as a 50 GHz phase detector. Optical gain modulation in the laser diode amplifier and an all-optical clock multiplication technique using a silica-based guided-wave optical circuit are used to achieve the extremely high-speed operation. Also discussed is the possibility of more than 100 GHz operation.

Effect of GNSS receiver carrier phase tracking loops on earthquake monitoring performance

NASA Astrophysics Data System (ADS)

Clare, Adam; Lin, Tao; Lachapelle, Gérard

2017-06-01

This research focuses on the performance of GNSS receiver carrier phase tracking loops for early earthquake monitoring systems. An earthquake was simulated using a hardware simulator and position, velocity and acceleration displacements were obtained to recreate the dynamics of the 2011 Tohoku earthquake. Using a software defined receiver, GSNRx, tracking bandwidths of 5, 10, 15, 20, 30, 40 and 50 Hz along with integration times of 1, 5 and 10 ms were tested. Using the phase lock indicator, an adaptive tracking loop was designed and tested to maximize performance for this application.

Digital second-order phase-locked loop

NASA Technical Reports Server (NTRS)

Holes, J. K.; Carl, C.; Tegnelia, C. R. (Inventor)

1973-01-01

A digital second-order phase-locked loop is disclosed in which a counter driven by a stable clock pulse source is used to generate a reference waveform of the same frequency as an incoming waveform, and to sample the incoming waveform at zero-crossover points. The samples are converted to digital form and accumulated over M cycles, reversing the sign of every second sample. After every M cycles, the accumulated value of samples is hard limited to a value SGN = + or - 1 and multiplied by a value delta sub 1 equal to a number of n sub 1 of fractions of a cycle. An error signal is used to advance or retard the counter according to the sign of the sum by an amount equal to the sum.

All optical coherent receiver for self-homodyne detection of digitally phase modulated optical signals

NASA Astrophysics Data System (ADS)

Kiasaleh, Kamran

1994-02-01

A novel optical phase-locked loop (OPLL) system for the self-homodyne detection of digitally phase modulated optical signals is introduced. A Mach-Zehnder type interferometer is used to self-homodyne binary phase-modulated optical signals with an external phase modulator inserted in the control arm of the interferometer.

Heart Rate Detection During Sleep Using a Flexible RF Resonator and Injection-Locked PLL Sensor.

PubMed

Kim, Sung Woo; Choi, Soo Beom; An, Yong-Jun; Kim, Byung-Hyun; Kim, Deok Won; Yook, Jong-Gwan

2015-11-01

Novel nonintrusive technologies for wrist pulse detection have been developed and proposed as systems for sleep monitoring using three types of radio frequency (RF) sensors. The three types of RF sensors for heart rate measurement on wrist are a flexible RF single resonator, array resonators, and an injection-locked PLL resonator sensor. To verify the performance of the new RF systems, we compared heart rates between presleep time and postsleep onset time. Heart rates of ten subjects were measured using the RF systems during sleep. All three RF devices detected heart rates at 0.2 to 1 mm distance from the skin of the wrist over clothes made of cotton fabric. The wrist pulse signals of a flexible RF single resonator were consistent with the signals obtained by a portable piezoelectric transducer as a reference. Then, we confirmed that the heart rate after sleep onset time significantly decreased compared to before sleep. In conclusion, the RF system can be utilized as a noncontact nonintrusive method for measuring heart rates during sleep.

Photonic generation of phase-stable and wideband chirped microwave signals based on phase-locked dual optical frequency combs.

PubMed

Tong, Yitian; Zhou, Qian; Han, Daming; Li, Baiyu; Xie, Weilin; Liu, Zhangweiyi; Qin, Jie; Wang, Xiaocheng; Dong, Yi; Hu, Weisheng

2016-08-15

A photonics-based scheme is presented for generating wideband and phase-stable chirped microwave signals based on two phase-locked combs with fixed and agile repetition rates. By tuning the difference of the two combs' repetition rates and extracting different order comb tones, a wideband linearly frequency-chirped microwave signal with flexible carrier frequency and chirped range is obtained. Owing to the scheme of dual-heterodyne phase transfer and phase-locked loop, extrinsic phase drift and noise induced by the separated optical paths is detected and suppressed efficiently. Linearly frequency-chirped microwave signals from 5 to 15 GHz and 237 to 247 GHz with 30 ms duration are achieved, respectively, contributing to the time-bandwidth product of 3×10⁸. And less than 1.3×10^-5 linearity errors (RMS) are also obtained.

A Phase-Locked Loop Epilepsy Network Emulator.

PubMed

Watson, P D; Horecka, K M; Cohen, N J; Ratnam, R

2016-10-15

Most seizure forecasting employs statistical learning techniques that lack a representation of the network interactions that give rise to seizures. We present an epilepsy network emulator (ENE) that uses a network of interconnected phase-locked loops (PLLs) to model synchronous, circuit-level oscillations between electrocorticography (ECoG) electrodes. Using ECoG data from a canine-epilepsy model (Davis et al. 2011) and a physiological entropy measure (approximate entropy or ApEn, Pincus 1995), we demonstrate the entropy of the emulator phases increases dramatically during ictal periods across all ECoG recording sites and across all animals in the sample. Further, this increase precedes the observable voltage spikes that characterize seizure activity in the ECoG data. These results suggest that the ENE is sensitive to phase-domain information in the neural circuits measured by ECoG and that an increase in the entropy of this measure coincides with increasing likelihood of seizure activity. Understanding this unpredictable phase-domain electrical activity present in ECoG recordings may provide a target for seizure detection and feedback control.

Electronic circuits

NASA Technical Reports Server (NTRS)

1976-01-01

Twenty-nine circuits and circuit techniques developed for communications and instrumentation technology are described. Topics include pulse-code modulation, phase-locked loops, data coding, data recording, detection circuits, logic circuits, oscillators, and amplifiers.

Efficient carrier-envelope offset frequency stabilization through gain modulation via stimulated emission.

PubMed

Karlen, Lauriane; Buchs, Gilles; Portuondo-Campa, Erwin; Lecomte, Steve

2016-01-15

A novel scheme for intracavity control of the carrier-envelope offset (CEO) frequency of a 100 MHz mode-locked Er:Yb:glass diode-pumped solid-state laser (DPSSL) based on the modulation of the laser gain via stimulated emission of the excited Er(3+) ions is demonstrated. This method allows us to bypass the ytterbium system few-kHz low-pass filter in the f(CEO) stabilization loop and thus to push the phase lock bandwidth up to a limit close to the relaxation oscillations frequency of the erbium system. A phase lock bandwidth above 70 kHz has been achieved with the fully stabilized laser, leading to an integrated phase noise [1 Hz-1 MHz] of 120 mrad.

Constant frequency pulsed phase-locked loop measuring device

NASA Technical Reports Server (NTRS)

Yost, William T. (Inventor); Kushnick, Peter W. (Inventor); Cantrell, John H. (Inventor)

1993-01-01

A measuring apparatus is presented that uses a fixed frequency oscillator to measure small changes in the phase velocity ultrasonic sound when a sample is exposed to environmental changes such as changes in pressure, temperature, etc. The invention automatically balances electrical phase shifts against the acoustical phase shifts in order to obtain an accurate measurement of electrical phase shifts.

All-digital GPS receiver mechanization

NASA Astrophysics Data System (ADS)

Ould, P. C.; van Wechel, R. J.

The paper describes the all-digital baseband correlation processing of GPS signals, which is characterized by (1) a potential for improved antijamming performance, (2) fast acquisition by a digital matched filter, (3) reduction of adjustment, (4) increased system reliability, and (5) provision of a basis for the realization of a high degree of VLSI potential for the development of small economical GPS sets. The basic technical approach consists of a broadband fix-tuned RF converter followed by a digitizer; digital-matched-filter acquisition section; phase- and delay-lock tracking via baseband digital correlation; software acquisition logic and loop filter implementation; and all-digital implementation of the feedback numerical controlled oscillators and code generator. Broadband in-phase and quadrature tracking is performed by an arctangent angle detector followed by a phase-unwrapping algorithm that eliminates false locks induced by sampling and data bit transitions, and yields a wide pull-in frequency range approaching one-fourth of the loop iteration frequency.

Phase-locked-loop-based delay-line-free picosecond electro-optic sampling system

NASA Astrophysics Data System (ADS)

Lin, Gong-Ru; Chang, Yung-Cheng

2003-04-01

A delay-line-free, high-speed electro-optic sampling (EOS) system is proposed by employing a delay-time-controlled ultrafast laser diode as the optical probe. Versatile optoelectronic delay-time controllers (ODTCs) based on modified voltage-controlled phase-locked-loop phase-shifting technologies are designed for the laser. The integration of the ODTC circuit and the pulsed laser diode has replaced the traditional optomechanical delay-line module used in the conventional EOS system. This design essentially prevents sampling distortion from misalignment of the probe beam, and overcomes the difficulty in sampling free-running high-speed transients. The maximum tuning range, error, scanning speed, tuning responsivity, and resolution of the ODTC are 3.9π (700°), <5% deviation, 25-2405 ns/s, 0.557 ps/mV, and ˜1 ps, respectively. Free-running wave forms from the analog, digital, and pulsed microwave signals are sampled and compared with those measured by the commercial apparatus.

Methods and apparatus for broadband frequency comb stabilization

DOEpatents

Cox, Jonathan A; Kaertner, Franz X

2015-03-17

Feedback loops can be used to shift and stabilize the carrier-envelope phase of a frequency comb from a mode-locked fibers laser or other optical source. Compared to other frequency shifting and stabilization techniques, feedback-based techniques provide a wideband closed-loop servo bandwidth without optical filtering, beam pointing errors, or group velocity dispersion. It also enables phase locking to a stable reference, such as a Ti:Sapphire laser, continuous-wave microwave or optical source, or self-referencing interferometer, e.g., to within 200 mrad rms from DC to 5 MHz. In addition, stabilized frequency combs can be coherently combined with other stable signals, including other stabilized frequency combs, to synthesize optical pulse trains with pulse durations of as little as a single optical cycle. Such a coherent combination can be achieved via orthogonal control, using balanced optical cross-correlation for timing stabilization and balanced homodyne detection for phase stabilization.

Free-space laser communication technologies IV; Proceedings of the 4th Conference, Los Angeles, CA, Jan. 23, 24, 1992

NASA Technical Reports Server (NTRS)

Begley, David L. (Editor); Seery, Bernard D. (Editor)

1992-01-01

Papers included in this volume are grouped under topics of receivers; laser transmitters; components; system analysis, performance, and applications; and beam control (pointing, acquisition, and tracking). Papers are presented on an experimental determination of power penalty contributions in an optical Costas-type phase-locked loop receiver, a resonant laser receiver for free-space laser communications, a simple low-loss technique for frequency-locking lasers, direct phase modulation of laser diodes, and a silex beacon. Particular attention is given to experimental results on an optical array antenna for nonmechanical beam steering, a potassium Faraday anomalous dispersion optical filter, a 100-Mbps resonant cavity phase modulator for coherent optical communications, a numerical simulation of a 325-Mbit/s QPPM optical communication system, design options for an optical multiple-access data relay terminal, CCD-based optical tracking loop design trades, and an analysis of a spatial-tracking subsystem for optical communications.

Timing performance of phase-locked loops in optical pulse position modulation communication systems

NASA Astrophysics Data System (ADS)

Lafaw, D. A.

In an optical digital communication system, an accurate clock signal must be available at the receiver to provide proper synchronization with the transmitted signal. Phase synchronization is especially critical in M-ary pulse position modulation (PPM) systems where the optimum decision scheme is an energy detector which compares the energy in each of M time slots to decide which of M possible words was sent. A timing error causes energy spillover into adjacent time slots (a form of intersymbol interference) so that only a portion of the signal energy may be attributed to the correct time slot. This effect decreases the effective signal, increases the effective noise, and increases the probability of error. This report simulates a timing subsystem for a satellite-to-satellite optical PPM communication link. The receiver employs direct photodetection, preprocessing of the optical signal, and a phase-locked loop for timing synchronization. The photodetector output is modeled as a filtered, doubly stochastic Poisson shot noise process. The variance of the relative phase error is examined under varying signal strength conditions as an indication of loop performance, and simulation results are compared to theoretical relations.

Quartz tuning fork-based frequency modulation atomic force spectroscopy and microscopy with all digital phase-locked loop

NASA Astrophysics Data System (ADS)

An, Sangmin; Hong, Mun-heon; Kim, Jongwoo; Kwon, Soyoung; Lee, Kunyoung; Lee, Manhee; Jhe, Wonho

2012-11-01

We present a platform for the quartz tuning fork (QTF)-based, frequency modulation atomic force microscopy (FM-AFM) system for quantitative study of the mechanical or topographical properties of nanoscale materials, such as the nano-sized water bridge formed between the quartz tip (˜100 nm curvature) and the mica substrate. A thermally stable, all digital phase-locked loop is used to detect the small frequency shift of the QTF signal resulting from the nanomaterial-mediated interactions. The proposed and demonstrated novel FM-AFM technique provides high experimental sensitivity in the measurement of the viscoelastic forces associated with the confined nano-water meniscus, short response time, and insensitivity to amplitude noise, which are essential for precision dynamic force spectroscopy and microscopy.

Quartz tuning fork-based frequency modulation atomic force spectroscopy and microscopy with all digital phase-locked loop.

PubMed

An, Sangmin; Hong, Mun-heon; Kim, Jongwoo; Kwon, Soyoung; Lee, Kunyoung; Lee, Manhee; Jhe, Wonho

2012-11-01

We present a platform for the quartz tuning fork (QTF)-based, frequency modulation atomic force microscopy (FM-AFM) system for quantitative study of the mechanical or topographical properties of nanoscale materials, such as the nano-sized water bridge formed between the quartz tip (~100 nm curvature) and the mica substrate. A thermally stable, all digital phase-locked loop is used to detect the small frequency shift of the QTF signal resulting from the nanomaterial-mediated interactions. The proposed and demonstrated novel FM-AFM technique provides high experimental sensitivity in the measurement of the viscoelastic forces associated with the confined nano-water meniscus, short response time, and insensitivity to amplitude noise, which are essential for precision dynamic force spectroscopy and microscopy.

Vector solitons with polarization instability and locked polarization in a fiber laser

NASA Astrophysics Data System (ADS)

Tang, Dingkang; Zhang, Jian-Guo; Liu, Yuanshan

2012-07-01

We investigate the characteristics of vector solitons with and without locked phase velocities of orthogonal polarization components in a specially-designed laser cavity which is formed by a bidirectional fiber loop together with a semiconductor saturable absorber mirror. The characteristics of the two states are compared in the temporal and spectrum domain, respectively. Both of the two states exhibit the characteristic of mode locking while the two orthogonal polarization components are not resolved. However, for the vector soliton with unlocked phase velocities, identical intensity varies after passing through a polarization beam splitter (PBS) outside the laser cavity. Contrary to the polarization rotation locked vector soliton, the intensity does not change periodically. For the polarization-locked vector soliton (PLVS), the identical pulse intensity is still obtained after passing through the PBS and can be observed on the oscilloscope screen after photodetection. A coupler instead of a circulator is integrated in the laser cavity and strong interaction on the polarization resolved spectra of the PLVS is observed. By comparing the two states, we conclude that interaction between the two orthogonal components contributes to the locked phase velocities.

Hidden Attractors in Dynamical Systems. From Hidden Oscillations in Hilbert-Kolmogorov Aizerman, and Kalman Problems to Hidden Chaotic Attractor in Chua Circuits

NASA Astrophysics Data System (ADS)

Leonov, G. A.; Kuznetsov, N. V.

From a computational point of view, in nonlinear dynamical systems, attractors can be regarded as self-excited and hidden attractors. Self-excited attractors can be localized numerically by a standard computational procedure, in which after a transient process a trajectory, starting from a point of unstable manifold in a neighborhood of equilibrium, reaches a state of oscillation, therefore one can easily identify it. In contrast, for a hidden attractor, a basin of attraction does not intersect with small neighborhoods of equilibria. While classical attractors are self-excited, attractors can therefore be obtained numerically by the standard computational procedure. For localization of hidden attractors it is necessary to develop special procedures, since there are no similar transient processes leading to such attractors. At first, the problem of investigating hidden oscillations arose in the second part of Hilbert's 16th problem (1900). The first nontrivial results were obtained in Bautin's works, which were devoted to constructing nested limit cycles in quadratic systems, that showed the necessity of studying hidden oscillations for solving this problem. Later, the problem of analyzing hidden oscillations arose from engineering problems in automatic control. In the 50-60s of the last century, the investigations of widely known Markus-Yamabe's, Aizerman's, and Kalman's conjectures on absolute stability have led to the finding of hidden oscillations in automatic control systems with a unique stable stationary point. In 1961, Gubar revealed a gap in Kapranov's work on phase locked-loops (PLL) and showed the possibility of the existence of hidden oscillations in PLL. At the end of the last century, the difficulties in analyzing hidden oscillations arose in simulations of drilling systems and aircraft's control systems (anti-windup) which caused crashes. Further investigations on hidden oscillations were greatly encouraged by the present authors' discovery, in 2010 (for the first time), of chaotic hidden attractor in Chua's circuit. This survey is dedicated to efficient analytical-numerical methods for the study of hidden oscillations. Here, an attempt is made to reflect the current trends in the synthesis of analytical and numerical methods.

AOTF-based near-infrared imaging spectrometer for rapid identification of camouflaged target

NASA Astrophysics Data System (ADS)

Gao, Zhifan; Zeng, Libo; Wu, Qiongshui

2014-11-01

Acousto-optic tunable filter (AOTF) is a novel device for spectrometer. The electronic tunability qualifies it with the most compelling advantages of higher wavelength scan rate over the conventional spectrometers that are mechanically tuned, and the feature of large angular aperture makes the AOTF particularly suitable in imaging applications. In this research, an AOTF-based near-infrared imaging spectrometer was developed. The spectrometer consists of a TeO2 AOTF module, a near-infrared imaging lens assembly, an AOTF controller, an InGaAs array detector, an image acquisition card, and a PC. A precisely designed optical wedge is placed at the emergent surface of the AOTF to deal with the inherent dispersion of the TeO2 that may degrade the spatial resolution. The direct digital synthesizer (DDS) techniques and the phase locked loop (PLL) techniques are combined for radio frequency (RF) signal synthesis. The PLL is driven by the DDS to take advantage of both their merits of high frequency resolution, high frequency scan rate and strong spurious signals resistance capability. All the functions relating to wavelength scan, image acquisition, processing, storge and display are controlled by the PC. Calibration results indicate that the spectral range is 898~1670 nm, the spectral resolution is 6.8 nm(@1064 nm), the wavelength separation between frames in the spectral image assembly is 1.0 nm, and the processing time of a single image is less than 1 ms if a TV camera with 640×512 detector is incorporated. A prototype device was assembled to test the capability of differentiating samples with similar appearances, and satisfactory results were achieved. By this device, the chemical compositions and the distribution information can be obtained simultaneously. This system has the most advantages of no moving parts, fast wavelength scan and strong vibration resistance. The proposed imaging spectrometer has a significant application prospect in the area of identification of camouflaged target from complex backgrounds. In addition, only the objective lens and its accessories are required to be replaced for its use in microscopic spectral imaging system, which may be popularized to a large number of other possible applications.

Highly sensitive self-complementary DNA nanoswitches triggered by polyelectrolytes

NASA Astrophysics Data System (ADS)

Wu, Jincai; Yu, Feng; Zhang, Zheng; Chen, Yong; Du, Jie; Maruyama, Atsushi

2015-12-01

Dimerization of two homologous strands of genomic DNA/RNA is an essential feature of retroviral replication. Herein we show that a cationic comb-type copolymer (CCC), poly(l-lysine)-graft-dextran, accelerates the dimerization of self-complementary stem-loop DNA, frequently found in functional DNA/RNA molecules, such as aptamers. Furthermore, an anionic polymer poly(sodium vinylsulfonate) (PVS) dissociates CCC from the duplex shortly within a few seconds. Then single stem-loop DNA spontaneously transforms from its dimer. Thus we can easily control the dimer and stem-loop DNA by switching on/off CCC activity. Both polyelectrolytes and DNA concentrations are in the nanomole per liter range. The polyelectrolyte-assisted transconformation and sequences design strategy ensures the reversible state control with rapid response and effective switching under physiologically relevant conditions. A further application of this sensitive assembly is to construct an aptamer-type drug delivery system, bind or release functional molecules responding to its transconformation.Dimerization of two homologous strands of genomic DNA/RNA is an essential feature of retroviral replication. Herein we show that a cationic comb-type copolymer (CCC), poly(l-lysine)-graft-dextran, accelerates the dimerization of self-complementary stem-loop DNA, frequently found in functional DNA/RNA molecules, such as aptamers. Furthermore, an anionic polymer poly(sodium vinylsulfonate) (PVS) dissociates CCC from the duplex shortly within a few seconds. Then single stem-loop DNA spontaneously transforms from its dimer. Thus we can easily control the dimer and stem-loop DNA by switching on/off CCC activity. Both polyelectrolytes and DNA concentrations are in the nanomole per liter range. The polyelectrolyte-assisted transconformation and sequences design strategy ensures the reversible state control with rapid response and effective switching under physiologically relevant conditions. A further application of this sensitive assembly is to construct an aptamer-type drug delivery system, bind or release functional molecules responding to its transconformation. Electronic supplementary information (ESI) available: I. Sequences of DIS25, DIS25-2a and DIS25-3a. II. Structural formula of poly(l-lysine)-graft-dextran (PLL-g-Dex). 1H-NMR spectra of PLL-g-Dex in D2O. III. Gel electrophoretic analysis of dimerization of DIS25 with various N/P ratios. IV. The effect of polyelectrolyte on the fluorescence polarity of TAMRA-labeled duplex. V. UV absorption/Tm profiles of DIS25. VI. Arrhenius plots for spontaneous dissociation of the DIS25 dimer and PLL-g-Dex-assisted dimerization of DIS25.VII. Switching between double stem-loop DIS42 and extended multiplex drived by PLL-g-Dex and PVS. See DOI: 10.1039/c5nr05193b

Optically Phase-Locked Electronic Speckle Pattern Interferometer (OPL-ESPI)

NASA Astrophysics Data System (ADS)

Moran, Steven E.; Law, Robert L.; Craig, Peter N.; Goldberg, Warren M.

1986-10-01

This report describes the design, theory, operation, and characteristics of the OPL-ESPI, which generates real time equal Doppler speckle contours of vibrating objects from unstable sensor platforms with a Doppler resolution of 30 Hz and a maximum tracking range of + or - 5 HMz. The optical phase locked loop compensates for the deleterious effects of ambient background vibration and provides the bases for a new ESPI video signal processing technique, which produces high contrast speckle contours. The OPL-ESPI system has local oscillator phase modulation capability, offering the potential for detection of vibrations with the amplitudes less than lambda/100.

Shot-noise-limited monitoring and phase locking of the motion of a single trapped ion.

PubMed

Bushev, P; Hétet, G; Slodička, L; Rotter, D; Wilson, M A; Schmidt-Kaler, F; Eschner, J; Blatt, R

2013-03-29

We perform a high-resolution real-time readout of the motion of a single trapped and laser-cooled Ba+ ion. By using an interferometric setup, we demonstrate a shot-noise-limited measurement of thermal oscillations with a resolution of 4 times the standard quantum limit. We apply the real-time monitoring for phase control of the ion motion through a feedback loop, suppressing the photon recoil-induced phase diffusion. Because of the spectral narrowing in the phase-locked mode, the coherent ion oscillation is measured with a resolution of about 0.3 times the standard quantum limit.

An injection-locked OEO based frequency doubler independent of electrical doubler phase noise deteriorating rule

NASA Astrophysics Data System (ADS)

Xie, Zhengyang; Zheng, Xiaoping; Li, Shangyuan; Yan, Haozhe; Xiao, Xuedi; Xue, Xiaoxiao

2018-06-01

We propose an injection-locked optoelectronic oscillator (OEO) based wide-band frequency doubler, which is free from phase noise deterioration in electrical doubler, by using a dual-parallel Mach-Zehnder modulator (DPMZM). Through adjusting the optical phase shifts in different arms of the DPMZM, the doubling signal oscillates in the OEO loop while the fundamental signal takes on phase modulation over the light and vanishes at photo-detector (PD) output. By controlling power of fundamental signal the restriction of phase-noise deterioration rule in electrical doubler is totally canceled. Experimental results show that the doubler output has a better phase noise value of, for example, -117 dBc/Hz @ 10 kHz at 6 GHz with an improvement more than 17 dB and 23 dB compared with that of fundamental input and electrical doubler, respectively. Besides, the stability of this doubler output can reach to 1 . 5 × 10-14 at 1000 s averaging time. The frequency range of doubling signal is limited by the bandwidth of electrical amplifier in OEO loop.

Reduction of Phase Ambiguity in an Offset-QPSK Receiver

NASA Technical Reports Server (NTRS)

Berner, Jeff; Kinman, Peter

2004-01-01

Proposed modifications of an offset-quadri-phase-shift keying (offset-QPSK) transmitter and receiver would reduce the amount of signal processing that must be done in the receiver to resolve the QPSK fourfold phase ambiguity. Resolution of the phase ambiguity is necessary in order to synchronize, with the received carrier signal, the signal generated by a local oscillator in a carrier-tracking loop in the receiver. Without resolution of the fourfold phase ambiguity, the loop could lock to any of four possible phase points, only one of which has the proper phase relationship with the carrier. The proposal applies, more specifically, to an offset-QPSK receiver that contains a carrier-tracking loop like that shown in Figure 1. This carrier-tracking loop does not resolve or reduce the phase ambiguity. A carrier-tracking loop of a different design optimized for the reception of offset QPSK could reduce the phase ambiguity from fourfold to twofold, but would be more complex. Alternatively, one could resolve the fourfold phase ambiguity by use of differential coding in the transmitter, at a cost of reduced power efficiency. The proposed modifications would make it possible to reduce the fourfold phase ambiguity to twofold, with no loss in power efficiency and only relatively simple additional signal-processing steps in the transmitter and receiver. The twofold phase ambiguity would then be resolved by use of a unique synchronization word, as is commonly done in binary phase-shift keying (BPSK). Although the mathematical and signal-processing principles underlying the modifications are too complex to explain in detail here, the modifications themselves would be relatively simple and are best described with the help of simple block diagrams (see Figure 2). In the transmitter, one would add a unit that would periodically invert bits going into the QPSK modulator; in the receiver, one would add a unit that would effect different but corresponding inversions of bits coming out of the QPSK demodulator. The net effect of all the inversions would be that depending on which lock point the carrier-tracking loop had selected, all the output bits would be either inverted or non-inverted together; hence, the ambiguity would be reduced from fourfold to twofold, as desired.

Frequency multiplexed flux locked loop architecture providing an array of DC SQUIDS having both shared and unshared components

DOEpatents

Ganther, Jr., Kenneth R.; Snapp, Lowell D.

2002-01-01

Architecture for frequency multiplexing multiple flux locked loops in a system comprising an array of DC SQUID sensors. The architecture involves dividing the traditional flux locked loop into multiple unshared components and a single shared component which, in operation, form a complete flux locked loop relative to each DC SQUID sensor. Each unshared flux locked loop component operates on a different flux modulation frequency. The architecture of the present invention allows a reduction from 2N to N+1 in the number of connections between the cryogenic DC SQUID sensors and their associated room temperature flux locked loops. Furthermore, the 1.times.N architecture of the present invention can be paralleled to form an M.times.N array architecture without increasing the required number of flux modulation frequencies.

Phase-Locked Optical Generation of mmW/THz Signals

DTIC Science & Technology

2009-11-01

22 6.2. TIA (Trans-Impedance Amplifier ...24 6.3. Variable gain Amplifier ...loop architectures. Generate models including detector impulse response, feedback amplifier impulse response and laser current tuning response

Control System Damps Vibrations

NASA Technical Reports Server (NTRS)

Kopf, E. H., Jr.; Brown, T. K.; Marsh, E. L.

1983-01-01

New control system damps vibrations in rotating equipment with help of phase-locked-loop techniques. Vibrational modes are controlled by applying suitable currents to drive motor. Control signals are derived from sensors mounted on equipment.

Stabilization of self-mode-locked quantum dash lasers by symmetric dual-loop optical feedback

NASA Astrophysics Data System (ADS)

Asghar, Haroon; Wei, Wei; Kumar, Pramod; Sooudi, Ehsan; McInerney, John. G.

2018-02-01

We report experimental studies of the influence of symmetric dual-loop optical feedback on the RF linewidth and timing jitter of self-mode-locked two-section quantum dash lasers emitting at 1550 nm. Various feedback schemes were investigated and optimum levels determined for narrowest RF linewidth and low timing jitter, for single-loop and symmetric dual-loop feedback. Two symmetric dual-loop configurations, with balanced and unbalanced feedback ratios, were studied. We demonstrate that unbalanced symmetric dual loop feedback, with the inner cavity resonant and fine delay tuning of the outer loop, gives narrowest RF linewidth and reduced timing jitter over a wide range of delay, unlike single and balanced symmetric dual-loop configurations. This configuration with feedback lengths 80 and 140 m narrows the RF linewidth by 4-67x and 10-100x, respectively, across the widest delay range, compared to free-running. For symmetric dual-loop feedback, the influence of different power split ratios through the feedback loops was determined. Our results show that symmetric dual-loop feedback is markedly more effective than single-loop feedback in reducing RF linewidth and timing jitter, and is much less sensitive to delay phase, making this technique ideal for applications where robustness and alignment tolerance are essential.

A multi-channel low-power system-on-chip for single-unit recording and narrowband wireless transmission of neural signal.

PubMed

Bonfanti, A; Ceravolo, M; Zambra, G; Gusmeroli, R; Spinelli, A S; Lacaita, A L; Angotzi, G N; Baranauskas, G; Fadiga, L

2010-01-01

This paper reports a multi-channel neural recording system-on-chip (SoC) with digital data compression and wireless telemetry. The circuit consists of a 16 amplifiers, an analog time division multiplexer, an 8-bit SAR AD converter, a digital signal processor (DSP) and a wireless narrowband 400-MHz binary FSK transmitter. Even though only 16 amplifiers are present in our current die version, the whole system is designed to work with 64 channels demonstrating the feasibility of a digital processing and narrowband wireless transmission of 64 neural recording channels. A digital data compression, based on the detection of action potentials and storage of correspondent waveforms, allows the use of a 1.25-Mbit/s binary FSK wireless transmission. This moderate bit-rate and a low frequency deviation, Manchester-coded modulation are crucial for exploiting a narrowband wireless link and an efficient embeddable antenna. The chip is realized in a 0.35- εm CMOS process with a power consumption of 105 εW per channel (269 εW per channel with an extended transmission range of 4 m) and an area of 3.1 × 2.7 mm(2). The transmitted signal is captured by a digital TV tuner and demodulated by a wideband phase-locked loop (PLL), and then sent to a PC via an FPGA module. The system has been tested for electrical specifications and its functionality verified in in-vivo neural recording experiments.

Prototype of a gigabit data transmitter in 65 nm CMOS for DEPFET pixel detectors at Belle-II

NASA Astrophysics Data System (ADS)

Kishishita, T.; Krüger, H.; Hemperek, T.; Lemarenko, M.; Koch, M.; Gronewald, M.; Wermes, N.

2013-08-01

This paper describes the recent development of a gigabit data transmitter for the Belle-II pixel detector (PXD). The PXD is an innermost detector currently under development for the upgraded KEK-B factory in Japan. The PXD consists of two layers of DEPFET sensor modules located at 1.8 and 2.2 cm radii. Each module is equipped with three different ASIC types mounted on the detector substrate with a flip-chip technique: (a) SWITCHER for generating steering signals for the DEPFET sensors, (b) DCD for digitizing the signal currents, and (c) DHP for performing data processing and sending the data off the module to the back-end data handling hybrid via ∼ 40 cm Kapton flex and 12-15 m twisted pair (TWP) cables. To meet the requirements of the PXD data transmission, a prototype of the DHP data transmitter has been developed in a 65-nm standard CMOS technology. The transmitter test chip consists of current-mode logic (CML) drivers and a phase-locked loop (PLL) which generates a clock signal for a 1.6 Gbit/s output data stream from an 80 cm reference clock. A programmable pre-emphasis circuit is also implemented in the CML driver to compensate signal losses in the long cable by shaping the transmitted pulse response. The jitter performance was measured as 25 ps (1 σ distribution) by connecting the chip with 38 cm flex and 10 m TWP cables.

Human health monitoring technology

NASA Astrophysics Data System (ADS)

Kim, Byung-Hyun; Yook, Jong-Gwan

2017-05-01

Monitoring vital signs from human body is very important to healthcare and medical diagnosis, because they contain valuable information about arterial occlusions, arrhythmia, atherosclerosis, autonomous nervous system pathologies, stress level, and obstructive sleep apnea. Existing methods, such as electrocardiogram (ECG) sensor and photoplethysmogram (PPG) sensor, requires direct contact to the skin and it can causes skin irritation and the inconvenience of long-term wearing. For reducing the inconvenience in the conventional sensors, microwave and millimeter-wave sensors have been proposed since 1970s using micro-Doppler effect from one's cardiopulmonary activity. The Doppler radar sensor can remotely detect the respiration and heartbeat up to few meters away from the subject, but they have a multiple subject issue and are not suitable for an ambulatory subject. As a compromise, a noncontact proximity vital sign sensor has been recently proposed and developed. The purpose of this paper is to review the noncontact proximity vital sign sensors for detection of respiration, heartbeat rate, and/or wrist pulse. This sensor basically employs near-field perturbation of radio-frequency (RF) planar resonator due to the proximity of the one's chest or radial artery at the wrist. Various sensing systems based on the SAW filter, phase-locked loop (PLL) synthesizer, reflectometer, and interferometer have been proposed. These self-sustained systems can measure the nearfield perturbation and transform it into DC voltage variation. Consequently, they can detect the respiration and heartbeat rate near the chest of subject and pulse from radial artery at the wrist.

Force microscopy experiments with ultrasensitive cantilevers.

PubMed

Rast, S; Gysin, U; Ruff, P; Gerber, Ch; Meyer, E; Lee, D W

2006-04-14

Force microscopy experiments with the pendulum geometry are performed with attonewton sensitivity (Rugar et al 2004 Nature 43 329). Single-crystalline cantilevers with sub-millinewton spring constants were annealed under ultrahigh-vacuum conditions. It is found that annealing with temperatures below 500 °C can improve the quality factor by an order of magnitude. The high force sensitivity of these ultrasoft cantilevers is used to characterize small magnetic and superconductive particles, which are mounted on the end of the cantilever. Their magnetic properties are analysed in magnetic fields as a function of temperature. The transition of a superconducting sample mounted on a cantilever is measured by the detection of frequency shifts. An increase of dissipation is observed below the critical temperature. The magnetic moment of ferromagnetic particles is determined by real time frequency detection with a phase-locked loop (PLL) as a function of the magnetic field. The dissipation between the probing tip and the sample is another important ingredient for ultrasensitive force measurements. It is found that dissipation increases at separations of 30 nm. The origins of this type of dissipation are poorly understood. However, it is predicted theoretically that adsorbates can increase this dissipation channel (Volokitin and Persson 2005 Phys. Rev. Lett. 94 086104). First experiments are performed under ultrahigh vacuum to investigate this type of dissipation. Long-range dissipation is closely related to long-range forces. The distance dependence of the contact potential is found to be an important aspect.

Automatic control of clock duty cycle

NASA Technical Reports Server (NTRS)

Feng, Xiaoxin (Inventor); Roper, Weston (Inventor); Seefeldt, James D. (Inventor)

2010-01-01

In general, this disclosure is directed to a duty cycle correction (DCC) circuit that adjusts a falling edge of a clock signal to achieve a desired duty cycle. In some examples, the DCC circuit may generate a pulse in response to a falling edge of an input clock signal, delay the pulse based on a control voltage, adjust the falling edge of the input clock signal based on the delayed pulse to produce an output clock signal, and adjust the control voltage based on the difference between a duty cycle of the output clock signal and a desired duty cycle. Since the DCC circuit adjusts the falling edge of the clock cycle to achieve a desired duty cycle, the DCC may be incorporated into existing PLL control loops that adjust the rising edge of a clock signal without interfering with the operation of such PLL control loops.

Field-programmable gate array-controlled sweep velocity-locked laser pulse generator

NASA Astrophysics Data System (ADS)

Chen, Zhen; Hefferman, Gerald; Wei, Tao

2017-05-01

A field-programmable gate array (FPGA)-controlled sweep velocity-locked laser pulse generator (SV-LLPG) design based on an all-digital phase-locked loop (ADPLL) is proposed. A distributed feedback laser with modulated injection current was used as a swept-frequency laser source. An open-loop predistortion modulation waveform was calibrated using a feedback iteration method to initially improve frequency sweep linearity. An ADPLL control system was then implemented using an FPGA to lock the output of a Mach-Zehnder interferometer that was directly proportional to laser sweep velocity to an on-board system clock. Using this system, linearly chirped laser pulses with a sweep bandwidth of 111.16 GHz were demonstrated. Further testing evaluating the sensing utility of the system was conducted. In this test, the SV-LLPG served as the swept laser source of an optical frequency-domain reflectometry system used to interrogate a subterahertz range fiber structure (sub-THz-FS) array. A static strain test was then conducted and linear sensor results were observed.

A Phase-Locked Loop Epilepsy Network Emulator

PubMed Central

Watson, P.D.; Horecka, K. M.; Cohen, N.J.; Ratnam, R.

2015-01-01

Most seizure forecasting employs statistical learning techniques that lack a representation of the network interactions that give rise to seizures. We present an epilepsy network emulator (ENE) that uses a network of interconnected phase-locked loops (PLLs) to model synchronous, circuit-level oscillations between electrocorticography (ECoG) electrodes. Using ECoG data from a canine-epilepsy model (Davis et al. 2011) and a physiological entropy measure (approximate entropy or ApEn, Pincus 1995), we demonstrate the entropy of the emulator phases increases dramatically during ictal periods across all ECoG recording sites and across all animals in the sample. Further, this increase precedes the observable voltage spikes that characterize seizure activity in the ECoG data. These results suggest that the ENE is sensitive to phase-domain information in the neural circuits measured by ECoG and that an increase in the entropy of this measure coincides with increasing likelihood of seizure activity. Understanding this unpredictable phase-domain electrical activity present in ECoG recordings may provide a target for seizure detection and feedback control. PMID:26664133

Advanced technology satellite demodulator development

NASA Technical Reports Server (NTRS)

Ames, Stephen A.

1989-01-01

Ford Aerospace has developed a proof-of-concept satellite 8 phase shift keying (PSK) modulation and coding system operating in the Time Division Multiple Access (TDMA) mode at a data range of 200 Mbps using rate 5/6 forward error correction coding. The 80 Msps 8 PSK modem was developed in a mostly digital form and is amenable to an ASIC realization in the next phase of development. The codec was developed as a paper design only. The power efficiency goal was to be within 2 dB of theoretical at a bit error rate (BER) of 5x10(exp 7) while the measured implementation loss was 4.5 dB. The bandwidth efficiency goal was 2 bits/sec/Hz while the realized bandwidth efficiency was 1.8 bits/sec/Hz. The burst format used a preamble of only 40 8 PSK symbol times including 32 symbols of all zeros and an eight symbol unique word. The modem and associated special test equipment (STE) were fabricated mostly on a specially designed stitch-weld board although a few of the highest rate circuits were built on printed circuit cards. All the digital circuits were ECL to support the clock rates of from 80 MHz to 360 MHz. The transmitter and receiver matched filters were square-root Nyquist bandpass filters realized at the 3.37 GHz i.f. The modem operated as a coherent system although no analog phase locked (PLL) loop was employed. Within the budgetary constraints of the program, the approach to the demodulator has been proven and is eligible to proceed to the next phase of development of a satellite demodulator engineering model. This would entail the development of an ASIC version of the digital portion of the demodulator, and MMIC version of the quadrature detector, and SAW Nyquist filters to realize the bandwidth efficiency.

Digital approach to stabilizing optical frequency combs and beat notes of CW lasers

NASA Astrophysics Data System (ADS)

Čížek, Martin; Číp, Ondřej; Å míd, Radek; Hrabina, Jan; Mikel, Břetislav; Lazar, Josef

2013-10-01

In cases when it is necessary to lock optical frequencies generated by an optical frequency comb to a precise radio frequency (RF) standard (GPS-disciplined oscillator, H-maser, etc.) the usual practice is to implement phase and frequency-locked loops. Such system takes the signal generated by the RF standard (usually 10 MHz or 100 MHz) as a reference and stabilizes the repetition and offset frequencies of the comb contained in the RF output of the f-2f interferometer. These control loops are usually built around analog electronic circuits processing the output signals from photo detectors. This results in transferring the stability of the standard from RF to optical frequency domain. The presented work describes a different approach based on digital signal processing and software-defined radio algorithms used for processing the f-2f and beat-note signals. Several applications of digital phase and frequency locks to a RF standard are demonstrated: the repetition (frep) and offset frequency (fceo) of the comb, and the frequency of the beat note between a CW laser source and a single component of the optical frequency comb spectrum.

An automatic tracking system for phase-noise measurement.

PubMed

Yuen, Chung Ming; Tsang, Kim Fung

2005-05-01

A low cost, automatic tracking system for phase noise measurement has been implemented successfully. The tracking system is accomplished by applying a charge pump phase-locked loop as an external reference source to a digital spectrum analyzer. Measurement of a 2.5 GHz, free-running, voltage-controlled oscillator demonstrated the tracking accuracy, thus verifying the feasibility of the system.

Coherent Optical Adaptive Techniques (COAT)

DTIC Science & Technology

1975-01-01

8217 neceeemry and Identity by block number) Laser Phased Array Adaptive Optics Atmospheric-Turbulence and Thermal Blooming Compensation 20...characteristics of an experimental, visible wavelength, eighteen-element, self-adaptive optical phased array. Measurements on a well-characterized...V LOCAL PHASING ■ LOOP OPTICAL DETECTOR’ LOCAL LOCK / ROOF TOP "^/PROPAGATION’ ^ GLINT ■lm FOCAL LENGTH LENS DETECTOR DMWI rh

Apparatus and Method to Enable Precision and Fast Laser Frequency Tuning

NASA Technical Reports Server (NTRS)

Chen, Jeffrey R. (Inventor); Numata, Kenji (Inventor); Wu, Stewart T. (Inventor); Yang, Guangning (Inventor)

2015-01-01

An apparatus and method is provided to enable precision and fast laser frequency tuning. For instance, a fast tunable slave laser may be dynamically offset-locked to a reference laser line using an optical phase-locked loop. The slave laser is heterodyned against a reference laser line to generate a beatnote that is subsequently frequency divided. The phase difference between the divided beatnote and a reference signal may be detected to generate an error signal proportional to the phase difference. The error signal is converted into appropriate feedback signals to phase lock the divided beatnote to the reference signal. The slave laser frequency target may be rapidly changed based on a combination of a dynamically changing frequency of the reference signal, the frequency dividing factor, and an effective polarity of the error signal. Feed-forward signals may be generated to accelerate the slave laser frequency switching through laser tuning ports.

Optical phase-locked loop (OPLL) for free-space laser communications with heterodyne detection

NASA Technical Reports Server (NTRS)

Win, Moe Z.; Chen, Chien-Chung; Scholtz, Robert A.

1991-01-01

Several advantages of coherent free-space optical communications are outlined. Theoretical analysis is formulated for an OPLL disturbed by shot noise, modulation noise, and frequency noise consisting of a white component, a 1/f component, and a 1/f-squared component. Each of the noise components is characterized by its associated power spectral density. It is shown that the effect of modulation depends only on the ratio of loop bandwidth and data rate, and is negligible for an OPLL with loop bandwidth smaller than one fourth the data rate. Total phase error variance as a function of loop bandwidth is displayed for several values of carrier signal to noise ratio. Optimal loop bandwidth is also calculated as a function of carrier signal to noise ratio. An OPLL experiment is performed, where it is shown that the measured phase error variance closely matches the theoretical predictions.

Wide-band doubler and sine wave quadrature generator

NASA Technical Reports Server (NTRS)

Crow, R. B.

1969-01-01

Phase-locked loop with photoresistive control, which provides both sine and cosine outputs for subcarrier demodulation, serves as a telemetry demodulator signal conditioner with a second harmonic signal for synchronization with the locally generated code.

The Block V Receiver fast acquisition algorithm for the Galileo S-band mission

NASA Technical Reports Server (NTRS)

Aung, M.; Hurd, W. J.; Buu, C. M.; Berner, J. B.; Stephens, S. A.; Gevargiz, J. M.

1994-01-01

A fast acquisition algorithm for the Galileo suppressed carrier, subcarrier, and data symbol signals under low data rate, signal-to-noise ratio (SNR) and high carrier phase-noise conditions has been developed. The algorithm employs a two-arm fast Fourier transform (FFT) method utilizing both the in-phase and quadrature-phase channels of the carrier. The use of both channels results in an improved SNR in the FFT acquisition, enabling the use of a shorter FFT period over which the carrier instability is expected to be less significant. The use of a two-arm FFT also enables subcarrier and symbol acquisition before carrier acquisition. With the subcarrier and symbol loops locked first, the carrier can be acquired from an even shorter FFT period. Two-arm tracking loops are employed to lock the subcarrier and symbol loops parameter modification to achieve the final (high) loop SNR in the shortest time possible. The fast acquisition algorithm is implemented in the Block V Receiver (BVR). This article describes the complete algorithm design, the extensive computer simulation work done for verification of the design and the analysis, implementation issues in the BVR, and the acquisition times of the algorithm. In the expected case of the Galileo spacecraft at Jupiter orbit insertion PD/No equals 14.6 dB-Hz, R(sym) equals 16 symbols per sec, and the predicted acquisition time of the algorithm (to attain a 0.2-dB degradation from each loop to the output symbol SNR) is 38 sec.

Compact silicon photonics-based multi laser module for sensing

NASA Astrophysics Data System (ADS)

Ayotte, S.; Costin, F.; Babin, A.; Paré-Olivier, G.; Morin, M.; Filion, B.; Bédard, K.; Chrétien, P.; Bilodeau, G.; Girard-Deschênes, E.; Perron, L.-P.; Davidson, C.-A.; D'Amato, D.; Laplante, M.; Blanchet-Létourneau, J.

2018-02-01

A compact three-laser source for optical sensing is presented. It is based on a low-noise implementation of the Pound Drever-Hall method and comprises high-bandwidth optical phase-locked loops. The outputs from three semiconductor distributed feedback lasers, mounted on thermo-electric coolers (TEC), are coupled with micro-lenses into a silicon photonics (SiP) chip that performs beat note detection and several other functions. The chip comprises phase modulators, variable optical attenuators, multi-mode-interference couplers, variable ratio tap couplers, integrated photodiodes and optical fiber butt-couplers. Electrical connections between a metallized ceramic and the TECs, lasers and SiP chip are achieved by wirebonds. All these components stand within a 35 mm by 35 mm package which is interfaced with 90 electrical pins and two fiber pigtails. One pigtail carries the signals from a master and slave lasers, while another carries that from a second slave laser. The pins are soldered to a printed circuit board featuring a micro-processor that controls and monitors the system to ensure stable operation over fluctuating environmental conditions. This highly adaptable multi-laser source can address various sensing applications requiring the tracking of up to three narrow spectral features with a high bandwidth. It is used to sense a fiber-based ring resonator emulating a resonant fiber optics gyroscope. The master laser is locked to the resonator with a loop bandwidth greater than 1 MHz. The slave lasers are offset frequency locked to the master laser with loop bandwidths greater than 100 MHz. This high performance source is compact, automated, robust, and remains locked for days.

Optical injection locking-based amplification in phase-coherent transfer of optical frequencies.

PubMed

Kim, Joonyoung; Schnatz, Harald; Wu, David S; Marra, Giuseppe; Richardson, David J; Slavík, Radan

2015-09-15

We demonstrate the use of an optical injection phase locked loop (OIPLL) as a regenerative amplifier for optical frequency transfer applications. The optical injection locking provides high gain within a narrow bandwidth (<100  MHz) and is capable of preserving the fractional frequency stability of the incoming carrier to better than 10(-18) at 1000 s. The OIPLL was tested in the field as a mid-span amplifier for the transfer of an ultrastable optical carrier, stabilized to an optical frequency standard, over a 292 km long installed dark fiber link. The transferred frequency at the remote end reached a fractional frequency instability of less than 1×10(-19) at averaging time of 3200 s.

Homodyne Phase-Shift-Keying Systems: Past Challenges and Future Opportunities

NASA Astrophysics Data System (ADS)

Kazovsky, Leonid G.; Kalogerakis, Georgios; Shaw, Wei-Tao

2006-12-01

Homodyne phase-shift-keying systems can achieve the best receiver sensitivity and the longest transmission distance among all optical communication systems. This paper reviews recent research efforts in the field and examines future possibilities that might lead toward potential practical use of these systems. Additionally, phase estimation techniques based on feed-forward phase recovery and digital delay-lock loop approaches are examined, simulated, and compared.

Frequency stabilization of an Er-doped fiber laser with a collinear 2f-to-3f self-referencing interferometer

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hitachi, K., E-mail: hitachi.kenichi@lab.ntt.co.jp; Ishizawa, A.; Mashiko, H.

2015-06-08

We report the stabilization of the carrier-envelope offset (CEO) frequency of an Er-doped fiber laser with a collinear 2f-to-3f self-referencing interferometer. The interferometer is implemented by a dual-pitch periodically poled lithium niobate ridge waveguide with two different quasi-phase matching pitch sizes. We obtain a 52-dB signal-to-noise ratio in the 100-kHz resolution bandwidth of a heterodyne beat signal, which is sufficient for frequency stabilization. We also demonstrate that the collinear geometry is robust against environmental perturbation by comparing in-loop and out-of-loop Allan deviations when the in-loop CEO frequency is stabilized with a phase-locked loop circuit.

Performance Analysis of Digital Tracking Loops for Telemetry Ranging Applications

NASA Astrophysics Data System (ADS)

Vilnrotter, V.; Hamkins, J.; Xie, H.; Ashrafi, S.

2015-08-01

In this article, we analyze mathematical models of digital loops used to track the phase and timing of communications and navigation signals. The limits on the accuracy of phase and timing estimates play a critical role in the accuracy achievable in telemetry ranging applications. We describe in detail a practical algorithm to compute the loop parameters for discrete update (DU) and continuous update (CU) loop formulations, and we show that a simple power-series approximation to the DU model is valid over a large range of time-bandwidth product . Several numerical examples compare the estimation error variance of the DU and CU models to each other and to Cramer-Rao lower bounds. Finally, the results are applied to the problem of ranging, by evaluating the performance of a phase-locked loop designed to track a typical ambiguity-resolving pseudonoise (PN) code received and demodulated at the spacecraft on the uplink part of the two-way ranging link, and a data transition tracking loop (DTTL) on the downlink part.

A comparison of methods for DPLL loop filter design

NASA Technical Reports Server (NTRS)

Aguirre, S.; Hurd, W. J.; Kumar, R.; Statman, J.

1986-01-01

Four design methodologies for loop filters for a class of digital phase-locked loops (DPLLs) are presented. The first design maps an optimum analog filter into the digital domain; the second approach designs a filter that minimizes in discrete time weighted combination of the variance of the phase error due to noise and the sum square of the deterministic phase error component; the third method uses Kalman filter estimation theory to design a filter composed of a least squares fading memory estimator and a predictor. The last design relies on classical theory, including rules for the design of compensators. Linear analysis is used throughout the article to compare different designs, and includes stability, steady state performance and transient behavior of the loops. Design methodology is not critical when the loop update rate can be made high relative to loop bandwidth, as the performance approaches that of continuous time. For low update rates, however, the miminization method is significantly superior to the other methods.

Pulsed phase locked loop strain monitor

NASA Technical Reports Server (NTRS)

Froggatt, Mark E. (Inventor)

1995-01-01

A pulse phase locked loop system according to the present invention is described. A frequency generator such as a voltage controlled oscillator (VCO) generates an output signal and a reference signal having a frequency equal to that of the output signal. A transmitting gate gates the output frequency signal and this gated signal drives a transmitting transducer which transmits an acoustic wave through a material. A sample/hold samples a signal indicative of the transmitted wave which is received by a receiving transducer. Divide-by-n counters control these gating and sampling functions in response to the reference signal of the frequency generator. Specifically, the output signal is gated at a rate of F/h, wherein F is the frequency of the output signal and h is an integer; and the received signal is sampled at a delay of F/n wherein n is an integer.

Analysis and experimental demonstration of conformal adaptive phase-locked fiber array for laser communications and beam projection applications

NASA Astrophysics Data System (ADS)

Liu, Ling

The primary goal of this research is the analysis, development, and experimental demonstration of an adaptive phase-locked fiber array system for free-space optical communications and laser beam projection applications. To our knowledge, the developed adaptive phase-locked system composed of three fiber collimators (subapertures) with tip-tilt wavefront phase control at each subaperture represents the first reported fiber array system that implements both phase-locking control and adaptive wavefront tip-tilt control capabilities. This research has also resulted in the following innovations: (a) The first experimental demonstration of a phase-locked fiber array with tip-tilt wave-front aberration compensation at each fiber collimator; (b) Development and demonstration of the fastest currently reported stochastic parallel gradient descent (SPGD) system capable of operation at 180,000 iterations per second; (c) The first experimental demonstration of a laser communication link based on a phase-locked fiber array; (d) The first successful experimental demonstration of turbulence and jitter-induced phase distortion compensation in a phase-locked fiber array optical system; (e) The first demonstration of laser beam projection onto an extended target with a randomly rough surface using a conformal adaptive fiber array system. Fiber array optical systems, the subject of this study, can overcome some of the draw-backs of conventional monolithic large-aperture transmitter/receiver optical systems that are usually heavy, bulky, and expensive. The primary experimental challenges in the development of the adaptive phased-locked fiber-array included precise (<5 microrad) alignment of the fiber collimators and development of fast (100kHz-class) phase-locking and wavefront tip-tilt control systems. The precise alignment of the fiber collimator array is achieved through a specially developed initial coarse alignment tool based on high precision piezoelectric picomotors and a dynamic fine alignment mechanism implemented with specially designed and manufactured piezoelectric fiber positioners. Phase-locking of the fiber collimators is performed by controlling the phases of the output beams (beamlets) using integrated polarization-maintaining (PM) fiber-coupled LiNbO3 phase shifters. The developed phase-locking controllers are based on either the SPGD algorithm or the multi-dithering technique. Subaperture wavefront phase tip-tilt control is realized using piezoelectric fiber positioners that are controlled using a computer-based SPGD controller. Both coherent (phase-locked) and incoherent beam combining in the fiber array system are analyzed theoretically and experimentally. Two special fiber-based beam-combining testbeds have been built to demonstrate the technical feasibility of phase-locking compensation prior to free-space operation. In addition, the reciprocity of counter-propagating beams in a phase-locked fiber array system has been investigated. Coherent beam combining in a phase-locking system with wavefront phase tip-tilt compensation at each subaperture is successfully demonstrated when laboratory-simulated turbulence and wavefront jitters are present in the propagation path of the beamlets. In addition, coherent beam combining with a non-cooperative extended target in the control loop is successfully demonstrated.

Radio-Frequency and Wideband Modulation Arraying

NASA Technical Reports Server (NTRS)

Brockman, M. H.

1984-01-01

Summing network receives coherent signals from all receivers in array. Method sums narrow-band radio-frequency (RF) carrier powers and wide-band spectrum powers of array of separate antenna/receiver systems designed for phase-locked-loop or suppressed-carrier operation.

A low noise synthesizer for autotuning and performance testing of hydrogen masers

NASA Technical Reports Server (NTRS)

Cloeren, J. M.; Ingold, J. S.

1984-01-01

A low noise synthesizer has been developed for use in hydrogen maser autotuning and performance evaluation. This synthesizer replaces the frequency offset maser normally used for this purpose and allows the user to maintain all masers in the ensemble at the same frequency. The synthesizer design utilizes a quartz oscillator with a BVA resonator. The oscillator has a frequency offset of 5 X 10 to the minus 8 power. The BVA oscillator is phase-locked to a hydrogen maser by means of a high gain, high stability phase-locked loop, employing low noise multipliers as phase error amplifiers. A functional block diagram of the synthesizer and performance data will be presented.

Improving Estimates Of Phase Parameters When Amplitude Fluctuates

NASA Technical Reports Server (NTRS)

Vilnrotter, V. A.; Brown, D. H.; Hurd, W. J.

1989-01-01

Adaptive inverse filter applied to incoming signal and noise. Time-varying inverse-filtering technique developed to improve digital estimate of phase of received carrier signal. Intended for use where received signal fluctuates in amplitude as well as in phase and signal tracked by digital phase-locked loop that keeps its phase error much smaller than 1 radian. Useful in navigation systems, reception of time- and frequency-standard signals, and possibly spread-spectrum communication systems.

Self-organized synchronization of digital phase-locked loops with delayed coupling in theory and experiment

PubMed Central

Wetzel, Lucas; Jörg, David J.; Pollakis, Alexandros; Rave, Wolfgang; Fettweis, Gerhard; Jülicher, Frank

2017-01-01

Self-organized synchronization occurs in a variety of natural and technical systems but has so far only attracted limited attention as an engineering principle. In distributed electronic systems, such as antenna arrays and multi-core processors, a common time reference is key to coordinate signal transmission and processing. Here we show how the self-organized synchronization of mutually coupled digital phase-locked loops (DPLLs) can provide robust clocking in large-scale systems. We develop a nonlinear phase description of individual and coupled DPLLs that takes into account filter impulse responses and delayed signal transmission. Our phase model permits analytical expressions for the collective frequencies of synchronized states, the analysis of stability properties and the time scale of synchronization. In particular, we find that signal filtering introduces stability transitions that are not found in systems without filtering. To test our theoretical predictions, we designed and carried out experiments using networks of off-the-shelf DPLL integrated circuitry. We show that the phase model can quantitatively predict the existence, frequency, and stability of synchronized states. Our results demonstrate that mutually delay-coupled DPLLs can provide robust and self-organized synchronous clocking in electronic systems. PMID:28207779

Phase stabilization for mode locked lasers

DOE Office of Scientific and Technical Information (OSTI.GOV)

Baer, M.T.

A method is described for stabilizing a phase relationship between two mode locked lasers, comprising: driving through a power splitter the mode lockers of both lasers from a single stable radio frequency source; monitoring the phase of pulses from each laser utilizing a fast photodiode output of each laser; feeding the output of the fast photodiodes to a phase detector and comparator; measuring a relative phase difference between the lasers with a phase detector and comparator, producing a voltage output signal or phase error signal representing the phase difference; amplifying and filtering the voltage output signal with an amplifier andmore » loop filter; feeding the resulting output signal to a voltage controlled phase delay between the power splitter and one of the lasers; and delaying the RF drive to the one laser to achieve a desired phase relationship, between the two lasers.« less

Engineering evaluations and studies. Report for IUS studies

NASA Technical Reports Server (NTRS)

1981-01-01

The reviews, investigations, and analyses of the Inertial Upper Stage (IUS) Spacecraft Tracking and Data Network (STDN) transponder are reviewed. Carrier lock detector performance for Tracking and Data Relay Satellite System (TDRSS) dual-mode operation is discussed, as is the problem of predicting instantaneous frequency error in the carrier loop. Coastal loop performance analysis is critiqued and the static tracking phase error induced by thermal noise biases is discussed.

A decision directed detector for the phase incoherent Gaussian channel

NASA Technical Reports Server (NTRS)

Kazakos, D.

1975-01-01

A vector digital signalling scheme is proposed for simultaneous adaptive data transmission and phase estimation. The use of maximum likelihood estimation methods predicts a better performance than the phase-locked loop. The phase estimate is shown to converge to the true value, so that the adaptive nature of the detector effectively achieves phase acquisition and improvement in performance. No separate synchronization interval is required and phase fluctuations can be tracked simultaneously with the transmission of information.

Electrical crosstalk-coupling measurement and analysis for digital closed loop fibre optic gyro

NASA Astrophysics Data System (ADS)

Jin, Jing; Tian, Hai-Ting; Pan, Xiong; Song, Ning-Fang

2010-03-01

The phase modulation and the closed-loop controller can generate electrical crosstalk-coupling in digital closed-loop fibre optic gyro. Four electrical cross-coupling paths are verified by the open-loop testing approach. It is found the variation of ramp amplitude will lead to the alternation of gyro bias. The amplitude and the phase parameters of the electrical crosstalk signal are measured by lock-in amplifier, and the variation of gyro bias is confirmed to be caused by the alternation of phase according to the amplitude of the ramp. A digital closed-loop fibre optic gyro electrical crosstalk-coupling model is built by approximating the electrical cross-coupling paths as a proportion and integration segment. The results of simulation and experiment show that the modulation signal electrical crosstalk-coupling can cause the dead zone of the gyro when a small angular velocity is inputted, and it could also lead to a periodic vibration of the bias error of the gyro when a large angular velocity is inputted.

Optoelectronic frequency discriminated phase tuning technology and its applications

NASA Astrophysics Data System (ADS)

Lin, Gong-Ru; Chang, Yung-Cheng

2000-07-01

By using a phase-tunable optoelectronic phase-locked loop, we are able to continuously change the phase as well as the delay-time of optically distributed microwave clock signals or optical pulse train. The advantages of the proposed technique include such as wide-band operation up to 20GHz, wide-range tuning up to 640 degrees, high tuning resolution of <6x10-2 degree/mV, ultra-low short-term phase fluctuation and drive of 4.7x10-2 degree and 3.4x10- 3 degree/min, good linearity with acceptable deviations, and frequency-independent transferred function with slope of nearly 90 degrees/volt, etc. The novel optoelectronic phase shifter is performed by using a DC-voltage controlled, optoelectronic-mixer-based, frequency-down-converted digital phase-locked-loop. The maximum delay-time is continuously tunable up to 3.9 ns for optical pulses repeated at 500 MHz from a gain-switched laser diode. This corresponds to a delay responsivity of about 0.54 ps/mV. The using of the OEPS as being an optoelectronic delay-time controller for optical pulses is demonstrated with temporal resolution of <0.2 ps. Electro-optic sampling of high-frequency microwave signals by using the in-situ delay-time-tunable pulsed laser as a novel optical probe is primarily reported.

One way Doppler Extractor. Volume 2: Digital VCO technique

NASA Technical Reports Server (NTRS)

Nossen, E. J.; Starner, E. R.

1974-01-01

A feasibility analysis and trade-offs for a one-way Doppler extractor using digital VCO techniques is presented. The method of Doppler measurement involves the use of a digital phase lock loop; once this loop is locked to the incoming signal, the precise frequency and hence the Doppler component can be determined directly from the contents of the digital control register. The only serious error source is due to internally generated noise. Techniques are presented for minimizing this error source and achieving an accuracy of 0.01 Hz in a one second averaging period. A number of digitally controlled oscillators were analyzed from a performance and complexity point of view. The most promising technique uses an arithmetic synthesizer as a digital waveform generator.

Versatile all-digital time interval measuring system

NASA Astrophysics Data System (ADS)

Vyhlidal, David; Cech, Miroslav

2011-06-01

This paper describes a design and performance of a versatile all-digital time interval measuring system. The measurement method is based on an interpolation principle. In this principle the time interval is first roughly digitized by a coarse counter driven by a high stability reference clock and the fractions between the clock periods are measured by two Time-to-Digital Converter chips TDC-GPX manufactured by Acam messelectronic. Control circuits allow programmable customization of the system to satisfy many applications such as laser range finding, event counting, or time-of-flight measurements in various physics experiments. The system has two reference clocks inputs and two independent channels for measuring start and stop events. Only one 40 MHz reference is required for the measurement. The second reference can be, for example, 1 PPS (Pulse per Second) signal from a GPS (Global Positioning System) to time tag events. Time intervals are measured using the highest resolution mode of the TDC-GPX chips. The resolution of each chip is software programmable and is PLL (Phase Locked Loop) stabilized against temperature and voltage variations. The system can achieve a timing resolution better than 15 ps rms with up to 90 kHz repetition rate. The time interval measurement range is from 0 ps up to 1 second. The power consumption of the whole system is 18 W including an embedded computer board and an LCD (Liquid Crystal Display) screen. The embedded computer controls the whole system, collects and evaluates measurement data and with the display provides a user interface. The system is implemented using commercially available components.

An efficient magnetron transmitter for superconducting accelerators

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kazakevich, G.; Lebedev, V.; Yakovlev, V.

A concept of a highly-efficient high-power magnetron transmitter allowing wide-band phase and the mid-frequency power control at the frequency of the locking signal is proposed. The proposal is aimed for powering Superconducting RF (SRF) cavities of intensity-frontier accelerators. The transmitter is intended to operate with phase and amplitude control feedback loops allowing suppression of microphonics and beam loading in the SRF cavities. The concept utilizes injectionlocked magnetrons controlled in phase by the locking signal supplied by a feedback system. The injection-locking signal pre-excites the magnetron and allows its operation below the critical voltage. This realizes control of the magnetron powermore » in a wide range by control of the magnetron current. Pre-excitation of the magnetron by the locking signal provides an output power range up to 10 dB. Experimental studies were carried out with 2.45 GHz, 1 kW, CW magnetrons. They demonstrated stable operation of the magnetrons and power control at a low noise level. In conclusion, an analysis of the kinetics of the drifting charge in the drift approximation substantiates the concept and the experimental results.« less

Optical Frequency Stabilization and Optical Phase Locked Loops: Golden Threads of Precision Measurement

DOE Office of Scientific and Technical Information (OSTI.GOV)

Taubman, Matthew S.

Stabilization of lasers through locking to optical cavities, atomic transitions, and molecular transitions has enabled the field of precision optical measurement since shortly after the invention of the laser. Recent advances in the field have produced an optical clock that is orders of magnitude more stable than those of just a few years prior. Phase locking of one laser to another, or to a frequency offset from another, formed the basis for linking stable lasers across the optical spectrum, such frequency chains exhibiting progressively finer precision through the years. Phase locking between the modes within a femtosecond pulsed laser hasmore » yielded the optical frequency comb, one of the most beautiful and useful instruments of our time. This talk gives an overview of these topics, from early work through to the latest 1E-16 thermal noise-limited precision recently attained for a stable laser, and the ongoing quest for ever finer precision and accuracy. The issues of understanding and measuring line widths and shapes are also studied in some depth, highlighting implications for servo design for sub-Hz line widths.« less

An efficient magnetron transmitter for superconducting accelerators

DOE PAGES

Kazakevich, G.; Lebedev, V.; Yakovlev, V.; ...

2016-09-22

A concept of a highly-efficient high-power magnetron transmitter allowing wide-band phase and the mid-frequency power control at the frequency of the locking signal is proposed. The proposal is aimed for powering Superconducting RF (SRF) cavities of intensity-frontier accelerators. The transmitter is intended to operate with phase and amplitude control feedback loops allowing suppression of microphonics and beam loading in the SRF cavities. The concept utilizes injectionlocked magnetrons controlled in phase by the locking signal supplied by a feedback system. The injection-locking signal pre-excites the magnetron and allows its operation below the critical voltage. This realizes control of the magnetron powermore » in a wide range by control of the magnetron current. Pre-excitation of the magnetron by the locking signal provides an output power range up to 10 dB. Experimental studies were carried out with 2.45 GHz, 1 kW, CW magnetrons. They demonstrated stable operation of the magnetrons and power control at a low noise level. In conclusion, an analysis of the kinetics of the drifting charge in the drift approximation substantiates the concept and the experimental results.« less

Open-loop control of quasiperiodic thermoacoustic oscillations

NASA Astrophysics Data System (ADS)

Guan, Yu; Gupta, Vikrant; Kashinath, Karthik; Li, Larry K. B.

2017-11-01

The open-loop application of periodic acoustic forcing has been shown to be a potentially effective strategy for controlling periodic thermoacoustic oscillations, but its effectiveness on aperiodic thermoacoustic oscillations is less clear. In this experimental study, we apply periodic acoustic forcing to a ducted premixed flame oscillating quasiperiodically at two incommensurate natural frequencies, f1 and f2. We find that (i) above a critical forcing amplitude, the system locks into the forcing by oscillating only at the forcing frequency ff, producing a closed periodic orbit in phase space with no evidence of the original T2 torus attractor; (ii) the critical forcing amplitude required for lock-in decreases as ff approaches either f1 or f2, resulting in characteristic ∨-shaped lock-in boundaries around the two natural modes; and (iii) for a wide range of forcing frequencies, the system's oscillation amplitude can be reduced to less than 20% of that of the unforced system. These findings show that the open-loop application of periodic acoustic forcing can be an effective strategy for controlling aperiodic thermoacoustic oscillations. This work was supported by the Research Grants Council of Hong Kong (Project No. 16235716 and 26202815).

Narrow linewidth comb realized with a mode-locked fiber laser using an intra-cavity waveguide electro-optic modulator for high-speed control.

PubMed

Iwakuni, Kana; Inaba, Hajime; Nakajima, Yoshiaki; Kobayashi, Takumi; Hosaka, Kazumoto; Onae, Atsushi; Hong, Feng-Lei

2012-06-18

We have developed an optical frequency comb using a mode-locked fiber ring laser with an intra-cavity waveguide electro-optic modulator controlling the optical length in the laser cavity. The mode-locking is achieved with a simple ring configuration and a nonlinear polarization rotation mechanism. The beat note between the laser and a reference laser and the carrier envelope offset frequency of the comb were simultaneously phase locked with servo bandwidths of 1.3 MHz and 900 kHz, respectively. We observed an out-of-loop beat between two identical combs, and obtained a coherent δ-function peak with a signal to noise ratio of 70 dB/Hz.

Electronically tunable phase locked loop oscillator

NASA Astrophysics Data System (ADS)

Balasis, M.; Davis, M. R.; Jackson, C. R.

1982-02-01

This report describes the design and development of a low noise, high power, variable oscillator incorporating a high 'Q' electronically tunable resonator as the frequency determining element. The VCO provides improved EMC performance in phase locked synthesizers which are a part of communications equipments. The oscillator combines a low noise VMOS transistor with the selectivity and out-of-band attenuation of a coaxial resonator to provide superior EMC performance. Several oscillator designs were examined and the basis for the final configuration is presented. Oscillator noise is discussed and models for analysis are explained. A brass board model was constructed and tested and the technical results are presented.

Imaging the developing heart: synchronized time-lapse microscopy during developmental changes

NASA Astrophysics Data System (ADS)

Nelson, Carl J.; Buckley, Charlotte; Mullins, John J.; Denvir, Martin A.; Taylor, Jonathan

2018-02-01

How do you use imaging to analyse the development of the heart, which not only changes shape but also undergoes constant, high-speed, quasi-periodic changes? We have integrated ideas from prospective and retrospective optical gating to capture long-term, phase-locked developmental time-lapse videos. In this paper we demonstrate the success of this approach over a key developmental time period: heart looping, where large changes in heart shape prevent previous prospective gating approaches from capturing phase- locked videos. We use the comparison with other approaches to in vivo heart imaging to highlight the importance of collecting the most appropriate data for the biological question.

Self-referenced locking of optical coherence by single-detector electronic-frequency tagging

NASA Astrophysics Data System (ADS)

Shay, T. M.; Benham, Vincent; Spring, Justin; Ward, Benjamin; Ghebremichael, F.; Culpepper, Mark A.; Sanchez, Anthony D.; Baker, J. T.; Pilkington, D.; Berdine, Richard

2006-02-01

We report a novel coherent beam combining technique. This is the first actively phase locked optical fiber array that eliminates the need for a separate reference beam. In addition, only a single photodetector is required. The far-field central spot of the array is imaged onto the photodetector to produce the phase control loop signals. Each leg of the fiber array is phase modulated with a separate RF frequency, thus tagging the optical phase shift for each leg by a separate RF frequency. The optical phase errors for the individual array legs are separated in the electronic domain. In contrast with the previous active phase locking techniques, in our system the reference beam is spatially overlapped with all the RF modulated fiber leg beams onto a single detector. The phase shift between the optical wave in the reference leg and in the RF modulated legs is measured separately in the electronic domain and the phase error signal is feedback to the LiNbO 3 phase modulator for that leg to minimize the phase error for that leg relative to the reference leg. The advantages of this technique are 1) the elimination of the reference beam and beam combination optics and 2) the electronic separation of the phase error signals without any degradation of the phase locking accuracy. We will present the first theoretical model for self-referenced LOCSET and describe experimental results for a 3 x 3 array.

Improved frequency/voltage converters for fast quartz crystal microbalance applications.

PubMed

Torres, R; García, J V; Arnau, A; Perrot, H; Kim, L To Thi; Gabrielli, C

2008-04-01

The monitoring of frequency changes in fast quartz crystal microbalance (QCM) applications is a real challenge in today's instrumentation. In these applications, such as ac electrogravimetry, small frequency shifts, in the order of tens of hertz, around the resonance of the sensor can occur up to a frequency modulation of 1 kHz. These frequency changes have to be monitored very accurately both in magnitude and phase. Phase-locked loop techniques can be used for obtaining a high performance frequency/voltage converter which can provide reliable measurements. Sensitivity higher than 10 mVHz, for a frequency shift resolution of 0.1 Hz, with very low distortion in tracking both the magnitude and phase of the frequency variations around the resonance frequency of the sensor are required specifications. Moreover, the resonance frequency can vary in a broad frequency range from 5 to 10 MHz in typical QCM sensors, which introduces an additional difficulty. A new frequency-voltage conversion system based on a double tuning analog-digital phase-locked loop is proposed. The reported electronic characterization and experimental results obtained with conducting polymers prove its reliability for ac-electrogravimetry measurements and, in general, for fast QCM applications.

Improved frequency/voltage converters for fast quartz crystal microbalance applications

NASA Astrophysics Data System (ADS)

Torres, R.; García, J. V.; Arnau, A.; Perrot, H.; Kim, L. To Thi; Gabrielli, C.

2008-04-01

The monitoring of frequency changes in fast quartz crystal microbalance (QCM) applications is a real challenge in today's instrumentation. In these applications, such as ac electrogravimetry, small frequency shifts, in the order of tens of hertz, around the resonance of the sensor can occur up to a frequency modulation of 1kHz. These frequency changes have to be monitored very accurately both in magnitude and phase. Phase-locked loop techniques can be used for obtaining a high performance frequency/voltage converter which can provide reliable measurements. Sensitivity higher than 10mV/Hz, for a frequency shift resolution of 0.1Hz, with very low distortion in tracking both the magnitude and phase of the frequency variations around the resonance frequency of the sensor are required specifications. Moreover, the resonance frequency can vary in a broad frequency range from 5to10MHz in typical QCM sensors, which introduces an additional difficulty. A new frequency-voltage conversion system based on a double tuning analog-digital phase-locked loop is proposed. The reported electronic characterization and experimental results obtained with conducting polymers prove its reliability for ac-electrogravimetry measurements and, in general, for fast QCM applications.

Wideband and high-gain frequency stabilization of a 100-W injection-locked Nd:YAG laser for second-generation gravitational wave detectors.

PubMed

Ohmae, Noriaki; Moriwaki, Shigenori; Mio, Norikatsu

2010-07-01

Second-generation gravitational wave detectors require a highly stable laser with an output power greater than 100 W to attain their target sensitivity. We have developed a frequency stabilization system for a 100-W injection-locked Nd:YAG (yttrium aluminum garnet) laser. By placing an external wideband electro-optic modulator used as a fast-frequency actuator in the optical path of the slave output, we can circumvent a phase delay in the frequency control loop originating from the pole of an injection-locked slave cavity. Thus, we have developed an electro-optic modulator made of a MgO-doped stoichiometric LiNbO(3) crystal. Using this modulator, we achieve a frequency control bandwidth of 800 kHz and a control gain of 180 dB at 1 kHz. These values satisfy the requirement for a laser frequency control loop in second-generation gravitational wave detectors.

Pulsed Phase Lock Loop Device for Monitoring Intracranial Pressure During Space Flight

NASA Technical Reports Server (NTRS)

Ueno, Toshiaki; Macias, Brandon R.; Yost, William T.; Hargens, Alan R.

2003-01-01

We have developed an ultrasonic device to monitor ICP waveforms non-invasively from cranial diameter oscillations using a NASA-developed pulsed phase lock loop (PPLL) technique. The purpose of this study was to attempt to validate the PPLL device for reliable recordings of ICP waveforms and analysis of ICP dynamics in vivo. METHODS: PPLL outputs were recorded in patients during invasive ICP monitoring at UCSD Medical Center (n=10). RESULTS: An averaged linear regression coefficient between ICP and PPLL waveform data during one cardiac cycle in all patients is 0.88 +/- 0.02 (mean +/- SE). Coherence function analysis indicated that ICP and PPLL waveforms have high correlation in the lst, 2nd, and 3rd harmonic waves associated with a cardiac cycle. CONCLUSIONS: PPLL outputs represent ICP waveforms in both frequency and time domains. PPLL technology enables in vivo evaluation of ICP dynamics non-invasively, and can acquire continuous ICP waveforms during spaceflight because of compactness and non-invasive nature.

Nondestructive ultrasonic measurement of bolt preload using the pulsed-phase locked-loop interferometer

NASA Technical Reports Server (NTRS)

Allison, S. G.; Heyman, J. S.

1985-01-01

Achieving accurate preload in threaded fasteners is an important and often critical problem which is encountered in nearly all sectors of government and industry. Conventional tensioning methods which rely on torque carry with them the disadvantage of requiring constant friction in the fastener in order to accurately correlate torque to preload. Since most of the applied torque typically overcomes friction rather than tensioning the fastener, small variations in friction can cause large variations in preload. An instrument called a pulsed phase locked loop interferometer, which was recently developed at NASA Langley, has found widespread use for measurement of stress as well as material properties. When used to measure bolt preload, this system detects changes in the fastener length and sound velocity which are independent of friction. The system is therefore capable of accurately establishing the correct change in bolt tension. This high resolution instrument has been used for precision measurement of preload in critical fasteners for numerous applications such as the space shuttle landing gear and helicopter main rotors.

Optimal space communications techniques. [all digital phase locked loop for FM demodulation

NASA Technical Reports Server (NTRS)

Schilling, D. L.

1973-01-01

The design, development, and analysis are reported of a digital phase-locked loop (DPLL) for FM demodulation and threshold extension. One of the features of the developed DPLL is its synchronous, real time operation. The sampling frequency is constant and all the required arithmetic and logic operations are performed within one sampling period, generating an output sequence which is converted to analog form and filtered. An equation relating the sampling frequency to the carrier frequency must be satisfied to guarantee proper DPLL operation. The synchronous operation enables a time-shared operation of one DPLL to demodulate several FM signals simultaneously. In order to obtain information about the DPLL performance at low input signal-to-noise ratios, a model of an input noise spike was introduced, and the DPLL equation was solved using a digital computer. The spike model was successful in finding a second order DPLL which yielded a five db threshold extension beyond that of a first order DPLL.

All-digital signal-processing open-loop fiber-optic gyroscope with enlarged dynamic range.

PubMed

Wang, Qin; Yang, Chuanchuan; Wang, Xinyue; Wang, Ziyu

2013-12-15

We propose and realize a new open-loop fiber-optic gyroscope (FOG) with an all-digital signal-processing (DSP) system where an all-digital phase-locked loop is employed for digital demodulation to eliminate the variation of the source intensity and suppress the bias drift. A Sagnac phase-shift tracking method is proposed to enlarge the dynamic range, and, with its aid, a new open-loop FOG, which can achieve a large dynamic range and high sensitivity at the same time, is realized. The experimental results show that compared with the conventional open-loop FOG with the same fiber coil and optical devices, the proposed FOG reduces the bias instability from 0.259 to 0.018 deg/h, and the angle random walk from 0.031 to 0.006 deg/h(1/2), moreover, enlarges the dynamic range to ±360 deg/s, exceeding the maximum dynamic range ±63 deg/s of the conventional open-loop FOG.

Phase ambiguity resolution for offset QPSK modulation systems

NASA Technical Reports Server (NTRS)

Nguyen, Tien M. (Inventor)

1991-01-01

A demodulator for Offset Quaternary Phase Shift Keyed (OQPSK) signals modulated with two words resolves eight possible combinations of phase ambiguity which may produce data error by first processing received I(sub R) and Q(sub R) data in an integrated carrier loop/symbol synchronizer using a digital Costas loop with matched filters for correcting four of eight possible phase lock errors, and then the remaining four using a phase ambiguity resolver which detects the words to not only reverse the received I(sub R) and Q(sub R) data channels, but to also invert (complement) the I(sub R) and/or Q(sub R) data, or to at least complement the I(sub R) and Q(sub R) data for systems using nontransparent codes that do not have rotation direction ambiguity.

Direct phase-locking of a 8.6-μm quantum cascade laser to a mid-IR optical frequency comb: application to precision spectroscopy of N2O.

PubMed

Gambetta, Alessio; Cassinerio, Marco; Coluccelli, Nicola; Fasci, Eugenio; Castrillo, Antonio; Gianfrani, Livio; Gatti, Davide; Marangoni, Marco; Laporta, Paolo; Galzerano, Gianluca

2015-02-01

We developed a high-precision spectroscopic system at 8.6 μm based on direct heterodyne detection and phase-locking of a room-temperature quantum-cascade-laser against an harmonic, 250-MHz mid-IR frequency comb obtained by difference-frequency generation. The ∼30  dB signal-to-noise ratio of the detected beat-note together with the achieved closed-loop locking bandwidth of ∼500  kHz allows for a residual integrated phase noise of 0.78 rad (1 Hz-5 MHz), for an ultimate resolution of ∼21  kHz, limited by the measured linewidth of the mid-IR comb. The system was used to perform absolute measurement of line-center frequencies for the rotational components of the ν2 vibrational band of N2O, with a relative precision of 3×10(-10).

[Study on a wireless energy transmission system for the noninvasive examination micro system inside alimentary tracts].

PubMed

He, Xiu; Yan, Guo-Zheng; Wang, Fu-Min

2008-01-01

A wireless energy transmission system for the MEMS system inside alimentary tracts is reported here in the paper. It consists of an automatic frequency tracking circuit of phase lock loop and phase shift PWM control circuit. Experimental results show that the energy transmission system is capable of automatic frequency-tracking and transmission power-adjusting and has stable received energy.

Doppler extraction with a digital VCO

NASA Technical Reports Server (NTRS)

Starner, E. R.; Nossen, E. J.

1977-01-01

Digitally controlled oscillator in phased-locked loop may be useful for data communications systems, or may be modified to serve as information extraction component of microwave or optical system for collision avoidance or automatic braking. Instrument is frequency-synthesizing device with output specified precisely by digital number programmed into frequency register.

The use of interleaving for reducing radio loss in trellis-coded modulation systems

NASA Technical Reports Server (NTRS)

Divsalar, D.; Simon, M. K.

1989-01-01

It is demonstrated how the use of interleaving/deinterleaving in trellis-coded modulation (TCM) systems can reduce the signal-to-noise ratio loss due to imperfect carrier demodulation references. Both the discrete carrier (phase-locked loop) and suppressed carrier (Costas loop) cases are considered and the differences between the two are clearly demonstrated by numerical results. These results are of great importance for future communication links to the Deep Space Network (DSN), especially from high Earth orbiters, which may be bandwidth limited.

Numerical investigation of multichannel laser beam phase locking in turbulent atmosphere

DOE Office of Scientific and Technical Information (OSTI.GOV)

Volkov, V A; Volkov, M V; Garanin, S G

2015-12-31

The efficiency of coherent multichannel beam combining under focusing through a turbulent medium on a target in the cases of phase conjugation and target irradiation in the feedback loop is investigated numerically in various approximations. The conditions of efficient focusing of multichannel radiation on the target are found. It is shown that the coherent beam combining with target irradiation in the feedback loop, which does not require a reference beam and wavefront measurements, is as good as the phase conjugation approach in the efficiency of focusing. It is found that the main effect of focusing is provided by properly chosenmore » phase shifts in the channels, whereas taking into account local wavefront tip tilts weakly affects the result. (control of laser radiation parameters)« less

The performance of a sampled data delay lock loop implemented with a Kalman loop filter

NASA Astrophysics Data System (ADS)

Eilts, H. S.

1980-01-01

The purpose of this study is to evaluate the steady-state and transient (lock-up) performance of a tracking loop implemented with a Kalman filter. Steady-state performance criteria are errors due to measurement noise (jitter) and Doppler errors due to motion of the tracking loop. Trade-offs exist between the two criteria such that increasing performance with respect to either one will cause performance decrease with respect to the other. It is shown that by carefully selecting filter parameters reasonable performance can be obtained for both criteria simultaneously. It is also shown that lock-up performance for the loop is acceptable when these parameters are used.

Frequency stabilization for multilocation optical FDM networks

NASA Astrophysics Data System (ADS)

Jiang, Quan; Kavehrad, Mohsen

1993-04-01

In a multi-location optical FDM network, the frequency of each user's transmitter can be offset-locked, through a Fabry-Perot, to an absolute frequency standard which is distributed to the users. To lock the local Fabry-Perot to the frequency standard, the standard has to be frequency-dithered by a sinusoidal signal and the sinusoidal reference has to be transmitted to the user location since the lock-in amplifier in the stabilization system requires the reference for synchronous detection. We proposed two solutions to avoid transmitting the reference. One uses an extraction circuit to obtain the sinusoidal signal from the incoming signal. A nonlinear circuit following the photodiode produces a strong second-order harmonic of the sinusoidal signal and a phase-locked loop is locked to it. The sinusoidal reference is obtained by a divide- by-2 circuit. The phase ambiguity (0 degree(s) or 180 degree(s)) is resolved by using a selection- circuit and an initial scan. The other method uses a pseudo-random sequence instead of a sinusoidal signal to dither the frequency standard and a surface-acoustic-wave (SAW) matched-filter instead of a lock-in amplifier to obtain the frequency error. The matched-filter serves as a correlator and does not require the dither reference.

Digital processing of RF signals from optical frequency combs

NASA Astrophysics Data System (ADS)

Cizek, Martin; Smid, Radek; Buchta, Zdeněk.; Mikel, Břetislav; Lazar, Josef; Cip, Ondřej

2013-01-01

The presented work is focused on digital processing of beat note signals from a femtosecond optical frequency comb. The levels of mixing products of single spectral components of the comb with CW laser sources are usually very low compared to products of mixing all the comb components together. RF counters are more likely to measure the frequency of the strongest spectral component rather than a weak beat note. Proposed experimental digital signal processing system solves this problem by analyzing the whole spectrum of the output RF signal and using software defined radio (SDR) algorithms. Our efforts concentrate in two main areas: Firstly, using digital servo-loop techniques for locking free running continuous laser sources on single components of the fs comb spectrum. Secondly, we are experimenting with digital signal processing of the RF beat note spectrum produced by f-2f 1 technique used for assessing the offset and repetition frequencies of the comb, resulting in digital servo-loop stabilization of the fs comb. Software capable of computing and analyzing the beat-note RF spectrums using FFT and peak detection was developed. A SDR algorithm performing phase demodulation on the f- 2f signal is used as a regulation error signal source for a digital phase-locked loop stabilizing the offset frequency of the fs comb.

Digital processing of signals from femtosecond combs

NASA Astrophysics Data System (ADS)

Čížek, Martin; Šmíd, Radek; Buchta, Zdeněk.; Mikel, Břetislav; Lazar, Josef; Číp, Ondrej

2012-01-01

The presented work is focused on digital processing of beat note signals from a femtosecond optical frequency comb. The levels of mixing products of single spectral components of the comb with CW laser sources are usually very low compared to products of mixing all the comb components together. RF counters are more likely to measure the frequency of the strongest spectral component rather than a weak beat note. Proposed experimental digital signal processing system solves this problem by analyzing the whole spectrum of the output RF signal and using software defined radio (SDR) algorithms. Our efforts concentrate in two main areas: Firstly, we are experimenting with digital signal processing of the RF beat note spectrum produced by f-2f 1 technique and with fully digital servo-loop stabilization of the fs comb. Secondly, we are using digital servo-loop techniques for locking free running continuous laser sources on single components of the fs comb spectrum. Software capable of computing and analyzing the beat-note RF spectrums using FFT and peak detection was developed. A SDR algorithm performing phase demodulation on the f- 2f signal is used as a regulation error signal source for a digital phase-locked loop stabilizing the offset and repetition frequencies of the fs comb.

miRNA oligonucleotide and sponge for miRNA-21 inhibition mediated by PEI-PLL in breast cancer therapy.

PubMed

Gao, Shiqian; Tian, Huayu; Guo, Ye; Li, Yuce; Guo, Zhaopei; Zhu, Xiaojuan; Chen, Xuesi

2015-10-01

MicroRNA-21 (miR-21) inhibition is a promising biological strategy for breast cancer therapy. However its application is limited by the lack of efficient miRNA inhibitor delivery systems. As a cationic polymer transfection material for nucleic acids, the poly (l-lysine)-modified polyethylenimine (PEI-PLL) copolymer combines the high transfection efficiency of polyethylenimine (PEI) and the good biodegradability of polyllysine (PLL). In this work, PEI-PLL was successfully synthesized and confirmed to transfect plasmid and oligonucleotide more effectively than PEI in MCF-7 cells (human breast cancer cells). In this regard, two kinds of miR-21 inhibitors, miR-21 sponge plasmid DNA (Sponge) and anti-miR-21 oligonucleotide (AMO), were transported into MCF-7 cells by PEI-PLL respectively. The miR-21 expression and the cellular physiology were determined post transfection. Compared with the negative control, PEI-PLL/Sponge or PEI-PLL/AMO groups exhibited lower miR-21 expression and cell viability. The anti-tumor mechanism of PEI-PLL/miR-21 inhibitors was further studied by cell cycle and western blot analyses. The results indicated that the miR-21 inhibition could induce the cell cycle arrest in G1 phase, upregulate the expression of Programmed Cell Death Protein 4 (PDCD4) and thus active the caspase-3 apoptosis pathway. Interestingly, the PEI-PLL/Sponge and PEI-PLL/AMO also sensitized the MCF-7 cells to anti-tumor drugs, doxorubicin (DOX) and cisplatin (CDDP). These results demonstrated that PEI-PLL/Sponge and PEI-PLL/AMO complexes would be two novel and promising gene delivery systems for breast cancer gene therapy based on miR-21 inhibition. This work was a combination of the high transfection efficiency of polyethylenimine (PEI), the good biodegradability of polyllysine (PLL) and the breast cancer-killing effect of miR-21 inhibitors. The poly (l-lysine)-modified polyethylenimine (PEI-PLL) copolymer was employed as the vector of miR-21 sponge plasmid DNA (Sponge) or anti-miR-21 oligonucleotide (AMO). PEI-PLL showed more transfection efficiency and lower cytotoxicity in human breast cancer cells than PEI. Moreover, the breast cancer cells exhibited significantly lower miR-21 expression and cell viability post transfection with sponge or AMO. Interestingly, the PEI-PLL/miR-21 inhibitor complexes also sensitized the cancer cells to anti-cancer chemotherapy drugs, doxorubicin (DOX) and cisplatin (CDDP). This synergistic effect provides a good application prospect of co-delivery miR-21 inhibitors and chemical drugs in breast cancer therapy. Copyright © 2015 Acta Materialia Inc. Published by Elsevier Ltd. All rights reserved.

A microprocessor based portable bolt tension monitor

NASA Technical Reports Server (NTRS)

Perey, D. F.

1991-01-01

A bolt tension monitor (BTM) which uses ultrasonics and a pulsed phase locked loop circuit to measure load-induced acoustic phase shifts which are independent of friction is described. The BTM makes it possible to measure the load in a bolt that was tightened at some time in the past. This capability to recertify a load after-the-fact will help to insure the integrity of a bolted joint.

Low-cost, digital lock-in module with external reference for coating glass transmission/reflection spectrophotometer

NASA Astrophysics Data System (ADS)

Alonso, R.; Villuendas, F.; Borja, J.; Barragán, L. A.; Salinas, I.

2003-05-01

A versatile, low-cost, digital signal processor (DSP) based lock-in module with external reference is described. This module is used to implement an industrial spectrophotometer for measuring spectral transmission and reflection of automotive and architectonic coating glasses over the ultraviolet, visible and near-infrared wavelength range. The light beams are modulated with an optical chopper. A digital phase-locked loop (DPLL) is used to lock the lock-in to the chop frequency. The lock-in rejects the ambient radiation and permits the spectrophotometer to work in the presence of ambient light. The algorithm that implements the dual lock-in and the DPLL in the DSP56002 evaluation module from Motorola is described. The use of a DSP allows implementation of the lock-in and DPLL by software, which gives flexibility and programmability to the system. Lock-in module cost, under 300 euro, is an important parameter taking into account that two modules are used in the system. Besides, the algorithms implemented in this DSP can be directly implemented in the latest DSP generations. The DPLL performance and the spectrophotometer are characterized. Capture and lock DPLL ranges have been measured and checked to be greater than the chop frequency drifts. The lock-in measured frequency response shows that the lock-in performs as theoretically predicted.

A 1024×768-12μm Digital ROIC for uncooled microbolometer FPAs

NASA Astrophysics Data System (ADS)

Eminoglu, Selim

2017-02-01

This paper reports the development of a new digital microbolometer Readout Integrated Circuit (D-ROIC), called MT10212BD. It has a format of 1024 × 768 (XGA) and a pixel pitch of 12μm. MT10212BD is Mikro Tasarim's second 12μm pitch microbolometer ROIC, which is developed specifically for surface micro machined microbolometer detector arrays with small pixel pitch using high-TCR pixel materials, such as VOx and a Si. MT10212BD has an alldigital system on-chip architecture, which generates programmable timing and biasing, and performs 14-bit analog to digital conversion (ADC). The signal processing chain in the ROIC is composed of pixel bias circuitry, integrator based programmable gain amplifier followed by column parallel ADC circuitry. MT10212BD has a serial programming interface that can be used to configure the programmable ROIC features and to load the Non-Uniformity-Correction (NUC) date to the ROIC. MT10212BD has a total of 8 high-speed serial digital video outputs, which can be programmed to operate in the 2, 4, and 8-output modes and can support frames rates above 60 fps. The high-speed serial digital outputs supports data rates as high as 400 Mega-bits/s, when operated at 50 MHz system clock frequency. There is an on-chip phase-locked-loop (PLL) based timing circuitry to generate the high speed clocks used in the ROIC. The ROIC is designed to support pixel resistance values ranging from 30KΩ to 90kΩ, with a nominal value of 60KΩ. The ROIC has a globally programmable gain in the column readout, which can be adjusted based on the detector resistance value.

A closed-loop phase-locked interferometer for wide bandwidth position sensing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fleming, Andrew J., E-mail: Andrew.Fleming@Newcastle.edu.au; Routley, Ben S., E-mail: Ben.Routley@Newcastle.edu.au

This article describes a position sensitive interferometer with closed-loop control of the reference mirror. A calibrated nanopositioner is used to lock the interferometer phase to the most sensitive point in the interferogram. In this configuration, large low-frequency movements of the sensor mirror can be detected from the control signal applied to the nanopositioner and high-frequency short-range signals can be measured directly from the photodiode. It is demonstrated that these two signals are complementary and can be summed to find the total displacement. The resulting interferometer has a number of desirable characteristics: it is optically simple, does not require polarization ormore » modulation to detect the direction of motion, does not require fringe-counting or interpolation electronics, and has a bandwidth equal to that of the photodiode. Experimental results demonstrate the frequency response analysis of a high-speed positioning stage. The proposed instrument is ideal for measuring the frequency response of nanopositioners, electro-optical components, MEMs devices, ultrasonic devices, and sensors such as surface acoustic wave detectors.« less

Word timing recovery in direct detection optical PPM communication systems with avalanche photodiodes using a phase lock loop

NASA Technical Reports Server (NTRS)

Sun, Xiaoli; Davidson, Frederic M.

1990-01-01

A technique for word timing recovery in a direct-detection optical PPM communication system is described. It tracks on back-to-back pulse pairs in the received random PPM data sequences with the use of a phase locked loop. The experimental system consisted of an 833-nm AlGaAs laser diode transmitter and a silicon avalanche photodiode photodetector, and it used Q = 4 PPM signaling at source data rate 25 Mb/s. The mathematical model developed to describe system performance is shown to be in good agreement with the experimental measurements. Use of this recovered PPM word clock with a slot clock recovery system caused no measurable penalty in receiver sensitivity. The completely self-synchronized receiver was capable of acquiring and maintaining both slot and word synchronizations for input optical signal levels as low as 20 average detected photons per information bit. The receiver achieved a bit error probability of 10 to the -6th at less than 60 average detected photons per information bit.

Low cost omega navigation receiver

NASA Technical Reports Server (NTRS)

Lilley, R. W.

1974-01-01

The development of a low cost Omega navigation receiver is discussed. Emphasis is placed on the completion and testing of a modular, multipurpose Omega receiver which utilizes a digital memory-aided, phase-locked loop to provide phase measurement data to a variety of applications interfaces. The functional units contained in the prototype device are described. The receiver is capable of receiving and storing phase measurements for up to eight Omega signals and computes two switch-selectable lines of position, displaying this navigation data in chart-recorded form.

Design of a delayed XOR phase detector for an optical phase-locked loop toward high-speed coherent laser communication.

PubMed

Liu, Yang; Tong, Shoufeng; Chang, Shuai; Song, Yansong; Dong, Yan; Zhao, Xin; An, Zhe; Yu, Fuwan

2018-05-10

Optical phase-locked loops are an effective detection method in high-speed and long-distance laser communication. Although this method can detect weak signal light and maintain a small bit error rate, it is difficult to perform because identifying the phase difference between the signal light and the local oscillator accurately has always been a technical challenge. Thus, a series of studies is conducted to address this issue. First, a delayed exclusive or gate (XOR) phase detector with multi-level loop compound control is proposed. Then, a 50 ps delay line and relative signal-to-noise ratio control at 15 dB are produced through theoretical derivation and simulation. Thereafter, a phase discrimination module is designed on a 15  cm×5  cm printed circuit board board. Finally, the experiment platform is built for verification. Experimental results show that the phase discrimination range is -1.1 to 1.1 GHz, and the gain is 0.82 mV/MHz. Three times the standard deviation, that is, 0.064 V, is observed between the test and theoretical values. The accuracy of phase detection is better than 0.07 V, which meets the design standards. A coherent carrier recovery test system is established. The delayed XOR gate has good performance in this system. When the communication rate is 5 Gbps, the system realizes a bit error rate of 1.55×10 -8 when the optical power of the signal is -40.4  dBm. When the communication rate is increased to 10 Gbps, the detection sensitivity drops to -39.5  dBm and still shows good performance in high-speed communications. This work provides a reference for future high-speed coherent homodyne detection in space. Ideas for the next phase of this study are presented at the end of this paper.

A New Interferometer for Monitoring Atmospheric Phase Fluctuations

NASA Technical Reports Server (NTRS)

Lay, Oliver

2000-01-01

Water vapor in the Earth's troposphere introduces an extra electrical path in the propagation of radio signals through the atmosphere. The distribution of water vapor is irregular and distorts the wavefronts of incoming radio waves, limiting the angular resolution that can be achieved with ground-based telescopes. The level of fluctuations depends both on the location of the site ,and on the prevailing atmospheric conditions. The ability to measure the fluctuations is therefore important when choosing a site for a new instrument, and for scheduling observations of existing telescopes. Existing phase monitors are radio interferometers that monitor monochromatic beacon tones from geostationary communications satellites at a frequency of about 12 GHz. They have a classical heterodyne design based on two satellite receiving antennas; each has a front-end for amplifying and down-converting the incoming signals using a local oscillator that is phase-locked to a common reference frequency. In addition to multiple phase-locked loops these instruments require expensive phase-stable cabling to reduce the effects of thermal drift. The new system uses two consumer 18" digital satellite TV dishes to monitor satellite TV broadcast signals over a bandwidth of 500 MHz (12.2 to 12.7 GHz). The novel design eliminates the need for phase-locked loops and thermally stable components, and uses a pair of Gilbert Cell multipliers to perform the broadband correlation. A phase monitor has been been built and deployed at the site of the Berkeley-Illinois-Maryland Association Millimeter Array in Northern California, and has been operating successfully since June 1998, measuring the difference in electrical path length for parallel lines of sight to the satellite separated by a baseline of 100 m. With a hardware cost of approximately $4000, it is much cheaper than previous instruments, and the low power requirements and high reliability make the system suitable for site testing in remote locations.

Excitation power quantities in phase resonance testing of nonlinear systems with phase-locked-loop excitation

NASA Astrophysics Data System (ADS)

Peter, Simon; Leine, Remco I.

2017-11-01

Phase resonance testing is one method for the experimental extraction of nonlinear normal modes. This paper proposes a novel method for nonlinear phase resonance testing. Firstly, the issue of appropriate excitation is approached on the basis of excitation power considerations. Therefore, power quantities known from nonlinear systems theory in electrical engineering are transferred to nonlinear structural dynamics applications. A new power-based nonlinear mode indicator function is derived, which is generally applicable, reliable and easy to implement in experiments. Secondly, the tuning of the excitation phase is automated by the use of a Phase-Locked-Loop controller. This method provides a very user-friendly and fast way for obtaining the backbone curve. Furthermore, the method allows to exploit specific advantages of phase control such as the robustness for lightly damped systems and the stabilization of unstable branches of the frequency response. The reduced tuning time for the excitation makes the commonly used free-decay measurements for the extraction of backbone curves unnecessary. Instead, steady-state measurements for every point of the curve are obtained. In conjunction with the new mode indicator function, the correlation of every measured point with the associated nonlinear normal mode of the underlying conservative system can be evaluated. Moreover, it is shown that the analysis of the excitation power helps to locate sources of inaccuracies in the force appropriation process. The method is illustrated by a numerical example and its functionality in experiments is demonstrated on a benchmark beam structure.

Frequency Stabilization of DFB Laser Diodes at 1572 nm for Spaceborne Lidar Measurements of CO2

NASA Technical Reports Server (NTRS)

Numata, Kenji; Chen, Jeffrey R.; Wu, Stewart T.; Abshire, James B.; Krainak, Michael A.

2010-01-01

We report a fiber-based, pulsed laser seeder system that rapidly switches among 6 wavelengths across atmospheric carbon dioxide (CO2) absorption line near 1572.3 nm for measurements of global CO2 mixing ratios to 1-ppmv precision. One master DFB laser diode has been frequency-locked to the CO2 line center using a frequency modulation technique, suppressing its peak-to-peak frequency drifts to 0.3 MHz at 0.8 sec averaging time over 72 hours. Four online DFB laser diodes have been offset-locked to the master laser using phase locked loops, with virtually the same sub-MHz absolute accuracy. The 6 lasers were externally modulated and then combined to produce the measurement pulse train.

Enantiomeric separations of chiral pharmaceuticals using chirally modified tetrahexahedral Au nanoparticles

NASA Astrophysics Data System (ADS)

Shukla, N.; Yang, D.; Gellman, A. J.

2016-06-01

Tetrahexahedral (THH, 24-sided) Au nanoparticles modified with D- or L-cysteine (Cys) have been used as enantioselective separators of the chiral pharmaceutical propranolol (PLL) in solution phase. Polarimetry has been used to measure the rotation of linearly polarized light by solutions containing mixtures of PLL and Cys/THH-Au NPs with varying enantiomeric excesses of each. Polarimetry yields clear evidence of enantiospecific adsorption of PLL onto the Cys/THH-Au NPs. This extends prior work using propylene oxide as a test chiral probe, by using the crystalline THH Au NPs with well-defined facets to separate a real pharmaceutical. This work suggests that chiral nanoparticles, coupled with a density separation method such as centrifugation, could be used for enantiomeric purification of real pharmaceuticals. A simple robust model developed earlier has also been used to extract the enantiospecific equilibrium constants for R- and S-PLL adsorption onto the D- and L-Cys/THH-Au NPs.

Analog phase lock between two lasers at LISA power levels

NASA Astrophysics Data System (ADS)

Diekmann, Christian; Steier, Frank; Sheard, Benjamin; Heinzel, Gerhard; Danzmann, Karsten

2009-03-01

This paper presents the implementation of an analog optical phase-locked-loop with an offset frequency of about 20MHz between two lasers, where the detected light powers were of the order of 31 pW and 200 μW. The goal of this setup was the design and characterization of a photodiode transimpedance amplifier for application in LISA. By application of a transimpedance amplifier designed to have low noise and low power consumption, the phase noise between the two lasers was a factor of two above the shot noise limit down to 60mHz. The achievable phase sensitivity depends ultimately on the available power of the highly attenuated master laser and on the input current noise of the transimpedance amplifier of the photodetector. The limiting noise source below 60mHz was the analog phase measurement system that was used in this experiment. A digital phase measurement system that is currently under development at the AEI will be used in the near future. Its application should improve the sensitivity.

Neural Networks For Demodulation Of Phase-Modulated Signals

NASA Technical Reports Server (NTRS)

Altes, Richard A.

1995-01-01

Hopfield neural networks proposed for demodulating quadrature phase-shift-keyed (QPSK) signals carrying digital information. Networks solve nonlinear integral equations prior demodulation circuits cannot solve. Consists of set of N operational amplifiers connected in parallel, with weighted feedback from output terminal of each amplifier to input terminals of other amplifiers. Used to solve signal processing problems. Implemented as analog very-large-scale integrated circuit that achieves rapid convergence. Alternatively, implemented as digital simulation of such circuit. Also used to improve phase estimation performance over that of phase-locked loop.

Hybrid Analog/Digital Receiver

NASA Technical Reports Server (NTRS)

Brown, D. H.; Hurd, W. J.

1989-01-01

Advanced hybrid analog/digital receiver processes intermediate-frequency (IF) signals carrying digital data in form of phase modulation. Uses IF sampling and digital phase-locked loops to track carrier and subcarrier signals and to synchronize data symbols. Consists of three modules: IF assembly, signal-processing assembly, and test-signal assembly. Intended for use in Deep Space Network, but presumably basic design modified for such terrestrial uses as communications or laboratory instrumentation where signals weak and/or noise strong.

Commutated automatic gain control system

NASA Technical Reports Server (NTRS)

Yost, S. R.

1982-01-01

A commutated automatic gain control (AGC) system was designed and built for a prototype Loran C receiver. The receiver uses a microcomputer to control a memory aided phase-locked loop (MAPLL). The microcomputer also controls the input/output, latitude/longitude conversion, and the recently added AGC system. The circuit designed for the AGC is described, and bench and flight test results are presented. The AGC circuit described actually samples starting at a point 40 microseconds after a zero crossing determined by the software lock pulse ultimately generated by a 30 microsecond delay and add network in the receiver front end envelope detector.

Beat note stabilization of a 10-60 GHz dual-polarization microlaser through optical down conversion.

PubMed

Rolland, A; Brunel, M; Loas, G; Frein, L; Vallet, M; Alouini, M

2011-02-28

Down-conversion of a high-frequency beat note to an intermediate frequency is realized by a Mach-Zehnder intensity modulator. Optically-carried microwave signals in the 10-60 GHz range are synthesized by using a two-frequency solid-state microchip laser as a voltage-controlled oscillator inside a digital phase-locked loop. We report an in-loop relative frequency stability better than 2.5×10⁻¹¹. The principle is applicable to beat notes in the millimeter-wave range.

Improvements in deep-space tracking by use of third-order loops.

NASA Technical Reports Server (NTRS)

Tausworth, R. C.; Crow, R. B.

1972-01-01

Third-order phase-locked receivers have not yet found wide application in deep-space communications systems because the second-order systems now used have performed adequately on past spacecraft missions. However, a survey of the doppler profiles for future missions shows that an unaided second-order loop may be unable to perform within reasonable error bounds. This article discusses the characteristics of a simple third-order extension to present second-order systems that not only extends doppler-tracking capability, but widens the pull-in range and decreases pull-in time as well.

Injection Locking Techniques for Spectrum Analysis

NASA Astrophysics Data System (ADS)

Gathma, Timothy D.; Buckwalter, James F.

2011-04-01

Wideband spectrum analysis supports future communication systems that reconfigure and adapt to the capacity of the spectral environment. While test equipment manufacturers offer wideband spectrum analyzers with excellent sensitivity and resolution, these spectrum analyzers typically cannot offer acceptable size, weight, and power (SWAP). CMOS integrated circuits offer the potential to fully integrate spectrum analysis capability with analog front-end circuitry and digital signal processing on a single chip. Unfortunately, CMOS lacks high-Q passives and wideband resonator tunability that is necessary for heterodyne implementations of spectrum analyzers. As an alternative to the heterodyne receiver architectures, two nonlinear methods for performing wideband, low-power spectrum analysis are presented. The first method involves injecting the spectrum of interest into an array of injection-locked oscillators. The second method employs the closed loop dynamics of both injection locking and phase locking to independently estimate the injected frequency and power.

Clock recovery for high-speed optical communication

NASA Astrophysics Data System (ADS)

Pedrotti, Kenneth D.

1996-01-01

This paper reviews recent results for clock recovery circuits operating at speeds in excess of 1 Gbit/sec or realized as multichannel arrays. The emphasis is on synchronous optical network (SONET) type systems, their requirements, and the effect of the clock recovery circuits on system performance. Clock recovery approaches include filter based, phase-locked-loops, and all-optical methods.

Multiplexing Readout of TES Microcalorimeters Based on Analog Baseband Feedback

DOE Office of Scientific and Technical Information (OSTI.GOV)

Takei, Y.; Yamasaki, N.Y; Mitsuda, K.

2009-12-16

A TES microcalorimeter array is a promising spectrometer with excellent energy resolution and a moderate imaging capability. To realize a large format array in space, multiplexing the TES signals at the low tempersture stage is mandatory. We are developing frequency division multiplexing (FDM) based on baseband feedback technique. In FDM, each TES is AC-biased with a different carrier frequency. Signals from several pixels are summed and then read out by one SQUID. The maximum number of multiplexed pixels are limited by the frequency band in which the SQUID can be operated in a flux-locked loop, which is {approx}1 MHz withmore » standard flux-locked loop circuit. In the baseband feedback, the signal ({approx}10 kHz band) from the TES is once demodulated. Then a reconstructed copy of the modulated signal with an appropriate phase is fed back to the SQUID input coil to maintain an approximately constant magnetic flux. This can be implemented even for large cable delays and automatically suppresses the carrier. We developed a prototype electronics for the baseband feedback based on an analog phase sensitive detector (PSD) and a multiplier. Combined with Seiko 80-SSA SQUID amp, open-loop gain of 8 has been obtained for 10 kHz baseband signal at 5 MHz carrier frequency, with a moderate noise contribution of 27pA/{radical}(Hz) at input.« less

Spatiotemporal dynamics of a digital phase-locked loop based coupled map lattice system

DOE Office of Scientific and Technical Information (OSTI.GOV)

Banerjee, Tanmoy, E-mail: tbanerjee@phys.buruniv.ac.in; Paul, Bishwajit; Sarkar, B. C.

2014-03-15

We explore the spatiotemporal dynamics of a coupled map lattice (CML) system, which is realized with a one dimensional array of locally coupled digital phase-locked loops (DPLLs). DPLL is a nonlinear feedback-controlled system widely used as an important building block of electronic communication systems. We derive the phase-error equation of the spatially extended system of coupled DPLLs, which resembles a form of the equation of a CML system. We carry out stability analysis for the synchronized homogeneous solutions using the circulant matrix formalism. It is shown through extensive numerical simulations that with the variation of nonlinearity parameter and coupling strengthmore » the system shows transitions among several generic features of spatiotemporal dynamics, viz., synchronized fixed point solution, frozen random pattern, pattern selection, spatiotemporal intermittency, and fully developed spatiotemporal chaos. We quantify the spatiotemporal dynamics using quantitative measures like average quadratic deviation and spatial correlation function. We emphasize that instead of using an idealized model of CML, which is usually employed to observe the spatiotemporal behaviors, we consider a real world physical system and establish the existence of spatiotemporal chaos and other patterns in this system. We also discuss the importance of the present study in engineering application like removal of clock-skew in parallel processors.« less

Spatiotemporal dynamics of a digital phase-locked loop based coupled map lattice system.

PubMed

Banerjee, Tanmoy; Paul, Bishwajit; Sarkar, B C

2014-03-01

We explore the spatiotemporal dynamics of a coupled map lattice (CML) system, which is realized with a one dimensional array of locally coupled digital phase-locked loops (DPLLs). DPLL is a nonlinear feedback-controlled system widely used as an important building block of electronic communication systems. We derive the phase-error equation of the spatially extended system of coupled DPLLs, which resembles a form of the equation of a CML system. We carry out stability analysis for the synchronized homogeneous solutions using the circulant matrix formalism. It is shown through extensive numerical simulations that with the variation of nonlinearity parameter and coupling strength the system shows transitions among several generic features of spatiotemporal dynamics, viz., synchronized fixed point solution, frozen random pattern, pattern selection, spatiotemporal intermittency, and fully developed spatiotemporal chaos. We quantify the spatiotemporal dynamics using quantitative measures like average quadratic deviation and spatial correlation function. We emphasize that instead of using an idealized model of CML, which is usually employed to observe the spatiotemporal behaviors, we consider a real world physical system and establish the existence of spatiotemporal chaos and other patterns in this system. We also discuss the importance of the present study in engineering application like removal of clock-skew in parallel processors.

Spatiotemporal dynamics of a digital phase-locked loop based coupled map lattice system

NASA Astrophysics Data System (ADS)

Banerjee, Tanmoy; Paul, Bishwajit; Sarkar, B. C.

2014-03-01

We explore the spatiotemporal dynamics of a coupled map lattice (CML) system, which is realized with a one dimensional array of locally coupled digital phase-locked loops (DPLLs). DPLL is a nonlinear feedback-controlled system widely used as an important building block of electronic communication systems. We derive the phase-error equation of the spatially extended system of coupled DPLLs, which resembles a form of the equation of a CML system. We carry out stability analysis for the synchronized homogeneous solutions using the circulant matrix formalism. It is shown through extensive numerical simulations that with the variation of nonlinearity parameter and coupling strength the system shows transitions among several generic features of spatiotemporal dynamics, viz., synchronized fixed point solution, frozen random pattern, pattern selection, spatiotemporal intermittency, and fully developed spatiotemporal chaos. We quantify the spatiotemporal dynamics using quantitative measures like average quadratic deviation and spatial correlation function. We emphasize that instead of using an idealized model of CML, which is usually employed to observe the spatiotemporal behaviors, we consider a real world physical system and establish the existence of spatiotemporal chaos and other patterns in this system. We also discuss the importance of the present study in engineering application like removal of clock-skew in parallel processors.

High-speed electromechanical chutter for imaging spectrographs

NASA Technical Reports Server (NTRS)

Nguyen, Quang-Viet (Inventor)

2005-01-01

The present invention presents a high-speed electromechanical shutter which has at least two rotary beam choppers that are synchronized using a phase-locked loop electronic control to reduce the duty cycle. These choppers have blade means that can comprise discs or drums, each having about 60 (+/- 15) slots which are from about 0.3 to about 0.8 mm wide and about 5 to about 20 nun long (radially) which are evenly distributed through out 360 deg, and a third rotary chopper which is optically aligned has a small number of slots, such as for example, 1 to 10 slots which are about 1 to about 2 mm wide and about 5 to about 20 mm long (radially). Further the blade means include phase slots that allow the blade means to be phase locked using a closed loop control circuit. In addition, in a preferred embodiment, the system also has a leaf shutter. Thus the invention preferably achieves a gate width of less than about 100 microseconds, using motors that operate at 3000 to 10,OOO rpm, and with a phase jitter of less than about 1.5 microseconds, and further using an aperture with more than about 75% optical transmission with a clear aperture of about 0.8 -10 nun. The system can be synchronized to external sources at 0 6 kHz lasers, data acquisition systems, and cameras.

High-speed electromechanical shutter for imaging spectrographs

NASA Technical Reports Server (NTRS)

Nguyen, Quang-Viet (Inventor)

2005-01-01

The present invention presents a high-speed electromechanical shutter which has at least two rotary beam choppers that are synchronized using a phase-locked loop electronic control to reduce the duty cycle. These choppers have blade means that can comprise discs or drums, each having about 60 (+/-15) slots which are from about 0.3 to about 0.8 mm wide and about 5 to about 20 mm long (radially) which are evenly distributed through out 360?, and a third rotary chopper which is optically aligned has a small number of slots, such as for example, 1 to 10 slots which are about 1 to about 2 mm wide and about 5 to about 20 mm long (radially). Further the blade means include phase slots that allow the blade means to be phase locked using a closed loop control circuit. In addition, in a preferred embodiment, the system also has a leaf shutter. Thus the invention preferably achieves a gate width of less than about 100 microseconds, using motors that operate at 3000 to 10,000 rpm, and with a phase jitter of less than about 1.5 microseconds, and further using an aperture with more than about 75% optical transmission with a clear aperture of about 0.8 mm?10 mm. The system can be synchronized to external sources at 0 6 kHz lasers, data acquisition systems, and cameras.

NOVEL TECHNIQUE OF POWER CONTROL IN MAGNETRON TRANSMITTERS FOR INTENSE ACCELERATORS

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kazakevich, G.; Johnson, R.; Neubauer, M.

A novel concept of a high-power magnetron transmitter allowing dynamic phase and power control at the frequency of locking signal is proposed. The transmitter compensating parasitic phase and amplitude modulations inherent in Superconducting RF (SRF) cavities within closed feedback loops is intended for powering of the intensity-frontier superconducting accelerators. The con- cept uses magnetrons driven by a sufficient resonant (in- jection-locking) signal and fed by the voltage which can be below the threshold of self-excitation. This provides an extended range of power control in a single magnetron at highest efficiency minimizing the cost of RF power unit and the operationmore » cost. Proof-of-principle of the proposed concept demonstrated in pulsed and CW regimes with 2.45 GHz, 1kW magnetrons is discussed here. A conceptual scheme of the high-power transmitter allowing the dynamic wide-band phase and y power controls is presented and discussed.« less

High-pulse energy-stabilized passively mode-locked external cavity inverse bow-tie 980nm laser diode for space applications

NASA Astrophysics Data System (ADS)

Krakowski, M.; Resneau, P.; Garcia, M.; Vinet, E.; Robert, Y.; Lecomte, M.; Parillaud, O.; Gerard, B.; Kundermann, S.; Torcheboeuf, N.; Boiko, D. L.

2018-02-01

We report on multi-section inverse bow-tie laser producing mode-locked pulses of 90 pJ energy and 6.5 ps width (895 fs after compression) at 1.3 GHz pulse repetition frequency (PRF) and consuming 2.9 W of electric power. The laser operates in an 80 mm long external cavity. By translation of the output coupling mirror, the PRF was continuously tuned over 37 MHz range without additional adjustments. Active stabilization with a phase lock loop actuating on the driving current has allowed us to reach the PRF relative stability at a 2·10-10 level on 10 s intervals, as required by the European Space Agency (ESA) for inter-satellite long distance measurements.

Optimized tracking of RF carriers with phase noise, including Pioneer 10 results

NASA Technical Reports Server (NTRS)

Vilnrotter, V. A.; Hurd, W. J.; Brown, D. H.

1987-01-01

The ability to track very weak signals from distant spacecraft is limited by the phase instabilities of the received signal and of the local oscillator employed by the receiver. These instabilities ultimately limit the minimum loop bandwidth that can be used in a phase-coherent receiver, and hence limit the ratio of received carrier power to noise spectral density which can be tracked phase coherently. A method is presented for near real time estimation of the received carrier phase and additive noise spectrum, and optimization of the phase locked loop bandwidth. The method was used with the breadboard Deep Space Network (DSN) Advanced Receiver to optimize tracking of very weak signals from the Pioneer 10 spacecraft, which is now more distant that the edge of the solar system. Tracking with bandwidths of 0.1 Hz to 1.0 Hz reduces tracking signal threshold and increases carrier loop signal to noise ratio (SNR) by 5 dB to 15 dB compared to the 3 Hz bandwidth of the receivers now used operationally in the DSN. This will enable the DSN to track Pioneer 10 until its power sources fails near the end of the century.

Frequency domain phase noise analysis of dual injection-locked optoelectronic oscillators.

PubMed

Jahanbakht, Sajad

2016-10-01

Dual injection-locked optoelectronic oscillators (DIL-OEOs) have been introduced as a means to achieve very low-noise microwave oscillations while avoiding the large spurious peaks that occur in the phase noise of the conventional single-loop OEOs. In these systems, two OEOs are inter-injection locked to each other. The OEO with the longer optical fiber delay line is called the master OEO, and the other is called the slave OEO. Here, a frequency domain approach for simulating the phase noise spectrum of each of the OEOs in a DIL-OEO system and based on the conversion matrix approach is presented. The validity of the new approach is verified by comparing its results with previously published data in the literature. In the new approach, first, in each of the master or slave OEOs, the power spectral densities (PSDs) of two white and 1/f noise sources are optimized such that the resulting simulated phase noise of any of the master or slave OEOs in the free-running state matches the measured phase noise of that OEO. After that, the proposed approach is able to simulate the phase noise PSD of both OEOs at the injection-locked state. Because of the short run-time requirements, especially compared to previously proposed time domain approaches, the new approach is suitable for optimizing the power injection ratios (PIRs), and potentially other circuit parameters, in order to achieve good performance regarding the phase noise in each of the OEOs. Through various numerical simulations, the optimum PIRs for achieving good phase noise performance are presented and discussed; they are in agreement with the previously published results. This further verifies the applicability of the new approach. Moreover, some other interesting results regarding the spur levels are also presented.

Programmable Oscillator

NASA Technical Reports Server (NTRS)

Quirk, Kevin J.; Patawaran, Ferze D.; Nguyen, Danh H.; Lee, Clement G.; Nguyen, Huy

2011-01-01

A programmable oscillator is a frequency synthesizer with an output phase that tracks an arbitrary function. An offset, phase-locked loop circuit is used in combination with an error control feedback loop to precisely control the output phase of the oscillator. To down-convert the received signal, several stages of mixing may be employed with the compensation for the time-base distortion of the carrier occurring at any one of those stages. In the Goldstone Solar System Radar (GSSR), the compensation occurs in the mixing from an intermediate frequency (IF), whose value is dependent on the station and band, to a common IF used in the final stage of down-conversion to baseband. The programmable oscillator (PO) is used in the final stage of down-conversion to generate the IF, along with a time-varying phase component that matches the time-base distortion of the carrier, thus removing it from the final down-converted signal.

Phase correlation of laser waves with arbitrary frequency spacing.

PubMed

Huss, A F; Lammegger, R; Neureiter, C; Korsunsky, E A; Windholz, L

2004-11-26

The theoretically predicted correlation of laser phase fluctuations in Lambda-type interaction schemes is experimentally demonstrated. We show that the mechanism of correlation in a Lambda scheme is restricted to high-frequency noise components, whereas in a double-Lambda scheme, due to the laser phase locking in a closed-loop interaction, it extends to all noise frequencies. In this case the correlation is weakly sensitive to coherence losses. Thus the double-Lambda scheme can be used to correlate electromagnetic fields with carrier frequency differences beyond the GHz regime.

Novel All Digital Ring Cavity Locking Servo

NASA Astrophysics Data System (ADS)

Baker, J.; Gallant, D.; Lucero, A.; Miller, H.; Stohs, J.

We plan to use this servo in the new 50W 589-nm sodium guidestar laser to be installed in the AMOS facility in July 2010. Though the basic design is unchanged from the successful Hillman/Denman design, numerous improvements are being implemented in order to bring the device even further out of the lab and into the field. The basic building block of the Hillman/Denman design are two low noise master oscillators that are injected into higher power slave oscillators that are locked to the frequencies of the master oscillator cavities. In the previous system a traditional analog Pound-Drever-Hall (PDH) loop was employed to provide the frequency locking. Analog servos work well, in general, but robust locking for a complex set of multiply-interconnected PDH servos in the guidestar source challenges existing analog approaches. One of the significant changes demonstrated thus far is the implementation of an all-digital servo using only COTS components and a fast CISC processing architecture for orchestrating the basic PDH loops active within system. Compared to the traditionally used analog servo loops, an all-digital servo is a not only an orders-of-magnitude simpler servo loop to implement but the control loop can be modified by merely changing the computer code. Field conditions are often different from laboratory conditions, requiring subtle algorithm changes, and physical accessibility in the field is generally limited and difficult. Remotely implemented, trimmer-less and solderless servo upgrades are a much welcomed improvement in the field installed guidestar system. Also, OEM replacement of usual benchtop components saves considerable space and weight as well in the locking system. We will report on the details of the servo system and recent experimental results locking a master-slave laser oscillator system using the all-digital Pound-Drever-Hall loop.

Experimental demonstration of an optical phased array antenna for laser space communications.

PubMed

Neubert, W M; Kudielka, K H; Leeb, W R; Scholtz, A L

1994-06-20

The feasibility of an optical phased array antenna applicable for spaceborne laser communications was experimentally demonstrated. Heterodyne optical phase-locked loops provide for a defined phase relationship between the collimated output beams of three single-mode fibers. In the far field the beams interfere with a measured efficiency of 99%. The main lobe of the interference pattern can be moved by phase shifting the subaperture output beams. The setup permitted agile beam steering within an angular range of 1 mr and a response time of 0.7 ms. We propose an operational optical phased array antenna fed by seven lasers, featuring high transmit power and redundance.

Novel multireceiver communication systems configurations based on optimal estimation theory

NASA Technical Reports Server (NTRS)

Kumar, Rajendra

1992-01-01

A novel multireceiver configuration for carrier arraying and/or signal arraying is presented. The proposed configuration is obtained by formulating the carrier and/or signal arraying problem as an optimal estimation problem, and it consists of two stages. The first stage optimally estimates various phase processes received at different receivers with coupled phase-locked loops wherein the individual loops acquire and track their respective receivers' phase processes but are aided by each other in an optimal manner via LF error signals. The proposed configuration results in the minimization of the the effective radio loss at the combiner output, and thus maximization of energy per bit to noise power spectral density ratio is achieved. A novel adaptive algorithm for the estimator of the signal model parameters when these are not known a priori is also presented.

Analytic Determination of Interference Thresholds for Microwave Landing System Equipment and TACAN/DME Equipment

DTIC Science & Technology

1980-08-01

terminals for the PD channel, in dB, at function level tD /U]lL pea^,, desired-to-average undesired signal power at the phase-locked loop for successful...listed belows MS Receiver Reparation Distance (nmI) estimated Altitude Uetwen Desired & Undesired MS (Kilo feet) Grcnd Nquipment 2.1 42 10 142 20) 1q3

Characterization of the Nonlinear Elastic Properties of Graphite/Epoxy Composites Using Ultrasound

NASA Technical Reports Server (NTRS)

Prosser, William H.; Green, Robert E., Jr.

1990-01-01

The normalized change in ultrasonic "natural" velocity as a function of stress and temperature was measured in a unidirectional laminate of T300/5208 graphite/epoxy composite using a pulsed phase locked loop ultrasonic interferometer. These measurements were used together with the linear (second order) elastic moduli to calculate some of the nonlinear (third order) moduli of this material.

Demodulation of messages received with low signal to noise ratio

NASA Astrophysics Data System (ADS)

Marguinaud, A.; Quignon, T.; Romann, B.

The implementation of this all-digital demodulator is derived from maximum likelihood considerations applied to an analytical representation of the received signal. Traditional adapted filters and phase lock loops are replaced by minimum variance estimators and hypothesis tests. These statistical tests become very simple when working on phase signal. These methods, combined with rigorous control data representation allow significant computation savings as compared to conventional realizations. Nominal operation has been verified down to energetic signal over noise of -3 dB upon a QPSK demodulator.

A Fixed-Point Phase Lock Loop in a Software Defined Radio

DTIC Science & Technology

2002-09-01

code from a simulation model. This feature will allow easy implementation on an FPGA as C can be easily converted to VHDL , the language required...this is equivalent to the MATLAB code implementation in Appendix A. The PD takes the input signal 40 and multiplies it by the in-phase and...stop to 60 mph in 3.1 seconds (the fastest production car ever built is the Porsche Carrera twin turbo which was tested at 0-60 mph in 3.1 seconds

Integrated source and channel encoded digital communication system design study. [for space shuttles

NASA Technical Reports Server (NTRS)

Huth, G. K.

1976-01-01

The results of several studies Space Shuttle communication system are summarized. These tasks can be divided into the following categories: (1) phase multiplexing for two- and three-channel data transmission, (2) effects of phase noise on the performance of coherent communication links, (3) analysis of command system performance, (4) error correcting code tradeoffs, (5) signal detection and angular search procedure for the shuttle Ku-band communication system, and (6) false lock performance of Costas loop receivers.

Asymmetric dual-loop feedback to suppress spurious tones and reduce timing jitter in self-mode-locked quantum-dash lasers emitting at 155 μm

NASA Astrophysics Data System (ADS)

Asghar, Haroon; McInerney, John G.

2017-09-01

We demonstrate an asymmetric dual-loop feedback scheme to suppress external cavity side-modes induced in self-mode-locked quantum-dash lasers with conventional single and dual-loop feedback. In this letter, we achieved optimal suppression of spurious tones by optimizing the length of second delay time. We observed that asymmetric dual-loop feedback, with large (~8x) disparity in cavity lengths, eliminates all external-cavity side-modes and produces flat RF spectra close to the main peak with low timing jitter compared to single-loop feedback. Significant reduction in RF linewidth and reduced timing jitter was also observed as a function of increased second feedback delay time. The experimental results based on this feedback configuration validate predictions of recently published numerical simulations. This interesting asymmetric dual-loop feedback scheme provides simplest, efficient and cost effective stabilization of side-band free optoelectronic oscillators based on mode-locked lasers.

DC superconducting quantum interference device usable in nuclear quadrupole resonance and zero field nuclear magnetic spectrometers

DOEpatents

Fan, N.Q.; Clarke, J.

1993-10-19

A spectrometer for measuring the nuclear quadrupole resonance spectra or the zero-field nuclear magnetic resonance spectra generated by a sample is disclosed. The spectrometer uses an amplifier having a dc SQUID operating in a flux-locked loop for generating an amplified output as a function of the intensity of the signal generated by the sample. The flux-locked loop circuit includes an integrator. The amplifier also includes means for preventing the integrator from being driven into saturation. As a result, the time for the flux-locked loop to recover from the excitation pulses generated by the spectrometer is reduced. 7 figures.

DC superconducting quantum interference device usable in nuclear quadrupole resonance and zero field nuclear magnetic spectrometers

DOEpatents

Fan, Non Q.; Clarke, John

1993-01-01

A spectrometer for measuring the nuclear quadrupole resonance spectra or the zero-field nuclear magnetic resonance spectra generated by a sample is disclosed. The spectrometer uses an amplifier having a dc SQUID operating in a flux-locked loop for generating an amplified output as a function of the intensity of the signal generated by the sample. The flux-locked loop circuit includes an integrator. The amplifier also includes means for preventing the integrator from being driven into saturation. As a result, the time for the flux-locked loop to recover from the excitation pulses generated by the spectrometer is reduced.

Digital receiver study and implementation

NASA Technical Reports Server (NTRS)

Fogle, D. A.; Lee, G. M.; Massey, J. C.

1972-01-01

Computer software was developed which makes it possible to use any general purpose computer with A/D conversion capability as a PSK receiver for low data rate telemetry processing. Carrier tracking, bit synchronization, and matched filter detection are all performed digitally. To aid in the implementation of optimum computer processors, a study of general digital processing techniques was performed which emphasized various techniques for digitizing general analog systems. In particular, the phase-locked loop was extensively analyzed as a typical non-linear communication element. Bayesian estimation techniques for PSK demodulation were studied. A hardware implementation of the digital Costas loop was developed.

Performance Analysis of Digital Los Link, Manila Embassy - Santa Rita, Philippines.

DTIC Science & Technology

1981-12-01

Rate = 26 Mbs 17 17 • I, 102 99 PEETANT. HEIGHT AT SNART 505 103 99.99 RECEIVE EN ANTENN HEIGHT AT NL MAS MLMTR w I ,H IHT9 .9 the ratio of the...PF3DB COSGAM 0003031 loop 4O ?SP’ = ’,2 4.?D3F = ’,E12., 000001 C 000001 Dl = Dl /29;) . 0 01 D-7 = 𔃼 52q0.00000 ?STC OSIC* 18. ?1000001 FEE FEE_...and Level II, QPR, transmission and receiving can be accomplished with this model. Design parameters for filters, data rates, phase lock loops (PPL

Ultimate linewidth reduction of a semiconductor laser frequency-stabilized to a Fabry-Pérot interferometer.

PubMed

Bahoura, Messaoud; Clairon, André

2003-11-01

We report a theoretical dynamical analysis on effect of semiconductor laser phase noise on the achievable linewidth when locked to a Fabry-Pérot cavity fringe using a modulation-demodulation frequency stabilization technique such as the commonly used Pound-Drever-Hall frequency locking scheme. We show that, in the optical domain, the modulation-demodulation operation produces, in the presence of semiconductor laser phase noise, two kinds of excess noise, which could be much above the shot noise limit, namely, conversion noise (PM-to-AM) and intermodulation noise. We show that, in typical stabilization conditions, the ultimate semiconductor laser linewidth reduction can be severely limited by the intermodulation excess noise. The modulation-demodulation operation produces the undesirable nonlinear intermodulation effect through which the phase noise spectral components of the semiconductor laser, in the vicinity of even multiples of the modulation frequency, are downconverted into the bandpass of the frequency control loop. This adds a spurious signal, at the modulation frequency, to the error signal and limits the performance of the locked semiconductor laser. This effect, reported initially in the microwave domain using the quasistatic approximation, can be considerably reduced by a convenient choice of the modulation frequency.

New kind of injection-locked oscillator and its corresponding long-term stability control.

PubMed

Hong, Jun; Liu, An; Wang, Xiao-hu; Yao, Sheng-xing; Li, Zu-ling

2015-09-20

A new type of opto-electronic hybrid oscillator is proposed for the first time, to the best of our knowledge, and verified by experiments in this paper. Typical electronic oscillator-dielectric resonator oscillator as the first injection source is used to injection lock the first long-fiber loop-based opto-electronic oscillator (OEO); then its output is used to injection lock the second long-fiber opto-electronic oscillator. Using this method, low-phase noise output signal can be obtained. Experiments show that single side-band (SSB) phase noise of a 9.5 GHz oscillation signal at 10 kHz offset frequency decreases from -123 to -135  dBc/Hz after the first injection, then, through the second injection, the SSB phase noise drops down to -146  dBc/Hz. In order to solve the long-term stability problem of the above oscillator, a new stability-control circuit also is designed and verified by experiments. Experiments show that the Allan deviation decreases from 9.0×10(-11) to 2.2×10(-12) during 1 s after the long-term stability-control circuit being used.

Stepwise Loop Insertion Strategy for Active Site Remodeling to Generate Novel Enzyme Functions.

PubMed

Hoque, Md Anarul; Zhang, Yong; Chen, Liuqing; Yang, Guangyu; Khatun, Mst Afroza; Chen, Haifeng; Hao, Liu; Feng, Yan

2017-05-19

The remodeling of active sites to generate novel biocatalysts is an attractive and challenging task. We developed a stepwise loop insertion strategy (StLois), in which randomized residue pairs are inserted into active site loops. The phosphotriesterase-like lactonase from Geobacillus kaustophilus (GkaP-PLL) was used to investigate StLois's potential for changing enzyme function. By inserting six residues into active site loop 7, the best variant ML7-B6 demonstrated a 16-fold further increase in catalytic efficiency toward ethyl-paraoxon compared with its initial template, that is a 609-fold higher, >10 7 fold substrate specificity shift relative to that of wild-type lactonase. The remodeled variants displayed 760-fold greater organophosphate hydrolysis activity toward the organophosphates parathion, diazinon, and chlorpyrifos. Structure and docking computations support the source of notably inverted enzyme specificity. Considering the fundamental importance of active site loops, the strategy has potential for the rapid generation of novel enzyme functions by loop remodeling.

Sample-Clock Phase-Control Feedback

NASA Technical Reports Server (NTRS)

Quirk, Kevin J.; Gin, Jonathan W.; Nguyen, Danh H.; Nguyen, Huy

2012-01-01

To demodulate a communication signal, a receiver must recover and synchronize to the symbol timing of a received waveform. In a system that utilizes digital sampling, the fidelity of synchronization is limited by the time between the symbol boundary and closest sample time location. To reduce this error, one typically uses a sample clock in excess of the symbol rate in order to provide multiple samples per symbol, thereby lowering the error limit to a fraction of a symbol time. For systems with a large modulation bandwidth, the required sample clock rate is prohibitive due to current technological barriers and processing complexity. With precise control of the phase of the sample clock, one can sample the received signal at times arbitrarily close to the symbol boundary, thus obviating the need, from a synchronization perspective, for multiple samples per symbol. Sample-clock phase-control feedback was developed for use in the demodulation of an optical communication signal, where multi-GHz modulation bandwidths would require prohibitively large sample clock frequencies for rates in excess of the symbol rate. A custom mixedsignal (RF/digital) offset phase-locked loop circuit was developed to control the phase of the 6.4-GHz clock that samples the photon-counting detector output. The offset phase-locked loop is driven by a feedback mechanism that continuously corrects for variation in the symbol time due to motion between the transmitter and receiver as well as oscillator instability. This innovation will allow significant improvements in receiver throughput; for example, the throughput of a pulse-position modulation (PPM) with 16 slots can increase from 188 Mb/s to 1.5 Gb/s.

Reduced-Order Structure-Preserving Model for Parallel-Connected Three-Phase Grid-Tied Inverters

DOE Office of Scientific and Technical Information (OSTI.GOV)

Johnson, Brian B; Purba, Victor; Jafarpour, Saber

Next-generation power networks will contain large numbers of grid-connected inverters satisfying a significant fraction of system load. Since each inverter model has a relatively large number of dynamic states, it is impractical to analyze complex system models where the full dynamics of each inverter are retained. To address this challenge, we derive a reduced-order structure-preserving model for parallel-connected grid-tied three-phase inverters. Here, each inverter in the system is assumed to have a full-bridge topology, LCL filter at the point of common coupling, and the control architecture for each inverter includes a current controller, a power controller, and a phase-locked loopmore » for grid synchronization. We outline a structure-preserving reduced-order inverter model with lumped parameters for the setting where the parallel inverters are each designed such that the filter components and controller gains scale linearly with the power rating. By structure preserving, we mean that the reduced-order three-phase inverter model is also composed of an LCL filter, a power controller, current controller, and PLL. We show that the system of parallel inverters can be modeled exactly as one aggregated inverter unit and this equivalent model has the same number of dynamical states as any individual inverter in the system. Numerical simulations validate the reduced-order model.« less

Electro-optic resonant phase modulator

NASA Technical Reports Server (NTRS)

Chen, Chien-Chung (Inventor); Hemmati, Hamid (Inventor); Robinson, Deborah L. (Inventor)

1992-01-01

An electro-optic resonant cavity is used to achieve phase modulation with lower driving voltages. Laser damage thresholds are inherently higher than with previously used integrated optics due to the utilization of bulk optics. Phase modulation is achieved at higher speeds with lower driving voltages than previously obtained with non-resonant electro-optic phase modulators. The instant scheme uses a data locking dither approach as opposed to the conventional sinusoidal locking schemes. In accordance with a disclosed embodiment, a resonant cavity modulator has been designed to operate at a data rate in excess of 100 megabits per sec. By carefully choosing the cavity finesse and its dimension, it is possible to control the pulse switching time to within 4 nano-sec. and to limit the required switching voltage to within 10 V. This cavity locking scheme can be applied by using only the random data sequence, and without the need of dithering of the cavity. Compared to waveguide modulators, the resonant cavity has a comparable modulating voltage requirement. Because of its bulk geometry, the resonant cavity modulator has the potential of accommodating higher throughput power. Mode matching into the bulk device is easier and typically can be achieved with higher efficiency. An additional control loop is incorporated into the modulator to maintain the cavity on resonance.

Tracking performance and cycle slipping in the all-digital symbol synchronizer loop of the block 5 receiver

NASA Astrophysics Data System (ADS)

Aung, M.

1992-11-01

Computer simulated noise performance of the symbol synchronizer loop (SSL) in the Block 5 receiver is compared with the theoretical noise performance. Good agreement is seen at the higher loop SNR's (SNR(sub L)'s), with gradual degradation as the SNR(sub L) is decreased. For the different cases simulated, cycle slipping is observed (within the simulation time of 10(exp 4) seconds) at SNR(sub L)'s below different thresholds, ranging from 6 to 8.5 dB, comparable to that of a classical phase-locked loop. An important point, however, is that to achieve the desired loop SNR above the seemingly low threshold to avoid cycle slipping, a large data-to-loop-noise power ratio, P(sub D)/(N(sub 0)B(sub L)), is necessary (at least 13 dB larger than the desired SNR(sub L) in the optimum case and larger otherwise). This is due to the large squaring loss (greater than or equal to 13 dB) inherent in the SSL. For the special case of symbol rates approximately equaling the loop update rate, a more accurate equivalent model accounting for an extra loop update period delay (characteristic of the SSL phase detector design) is derived. This model results in a more accurate estimation of the noise-equivalent bandwidth of the loop.

Tracking performance and cycle slipping in the all-digital symbol synchronizer loop of the block 5 receiver

NASA Technical Reports Server (NTRS)

Aung, M.

1992-01-01

Computer simulated noise performance of the symbol synchronizer loop (SSL) in the Block 5 receiver is compared with the theoretical noise performance. Good agreement is seen at the higher loop SNR's (SNR(sub L)'s), with gradual degradation as the SNR(sub L) is decreased. For the different cases simulated, cycle slipping is observed (within the simulation time of 10(exp 4) seconds) at SNR(sub L)'s below different thresholds, ranging from 6 to 8.5 dB, comparable to that of a classical phase-locked loop. An important point, however, is that to achieve the desired loop SNR above the seemingly low threshold to avoid cycle slipping, a large data-to-loop-noise power ratio, P(sub D)/(N(sub 0)B(sub L)), is necessary (at least 13 dB larger than the desired SNR(sub L) in the optimum case and larger otherwise). This is due to the large squaring loss (greater than or equal to 13 dB) inherent in the SSL. For the special case of symbol rates approximately equaling the loop update rate, a more accurate equivalent model accounting for an extra loop update period delay (characteristic of the SSL phase detector design) is derived. This model results in a more accurate estimation of the noise-equivalent bandwidth of the loop.

Frequency offset locking of AlGaAs semiconductor lasers

NASA Astrophysics Data System (ADS)

Kuboki, Katsuhiko; Ohtsu, Motoichi

1987-04-01

Frequency offset locking is proposed as a technique for tracking and sweeping of a semiconductor laser frequency to improve temporal coherence in semiconductor lasers. Experiments were carried out in which a frequency stabilized laser (of residual frequency fluctuation value of 140 Hz at the integration time between 100 ms and 100 s) was used as a master laser, using a digital phase comparator of a large dynamic range (2 pi x 10 to the 11th rad) in the feedback loop to reduce the phase fluctuations of the beat signal between the master laser and the slave laser. As a result, residual frequency fluctuations of the beat signal were as low as 11 Hz at the integration time of 100 s (i.e., the residual frequency fluctuations of the slave laser were almost equal to those of the master laser).

Ring-shaped active mode-locked tunable laser using quantum-dot semiconductor optical amplifier

NASA Astrophysics Data System (ADS)

Zhang, Mingxiao; Wang, Yongjun; Liu, Xinyu

2018-03-01

In this paper, a lot of simulations has been done for ring-shaped active mode-locked lasers with quantum-dot semiconductor optical amplifier (QD-SOA). Based on the simulation model of QD-SOA, we discussed about the influence towards mode-locked waveform frequency and pulse caused by QD-SOA maximum mode peak gain, active layer loss coefficient, bias current, incident light pulse, fiber nonlinear coefficient. In the meantime, we also take the tunable performance of the laser into consideration. Results showed QD-SOA a better performance than original semiconductor optical amplifier (SOA) in recovery time, line width, and nonlinear coefficients, which makes it possible to output a locked-mode impulse that has a higher impulse power, narrower impulse width as well as the phase is more easily controlled. After a lot of simulations, this laser can realize a 20GHz better locked-mode output pulse after 200 loops, where the power is above 17.5mW, impulse width is less than 2.7ps, moreover, the tunable wavelength range is between 1540nm-1580nm.

Tanlock loop noise reduction using an optimised phase detector

NASA Astrophysics Data System (ADS)

Al-kharji Al-Ali, Omar; Anani, Nader; Al-Qutayri, Mahmoud; Al-Araji, Saleh

2013-06-01

This article proposes a time-delay digital tanlock loop (TDTL), which uses a new phase detector (PD) design that is optimised for noise reduction making it amenable for applications that require wide lock range without sacrificing the level of noise immunity. The proposed system uses an improved phase detector design which uses two phase detectors; one PD is used to optimise the noise immunity whilst the other is used to control the acquisition time of the TDTL system. Using the modified phase detector it is possible to reduce the second- and higher-order harmonics by at least 50% compared with the conventional TDTL system. The proposed system was simulated and tested using MATLAB/Simulink using frequency step inputs and inputs corrupted with varying levels of harmonic distortion. A hardware prototype of the system was implemented using a field programmable gate array (FPGA). The practical and simulation results indicate considerable improvement in the noise performance of the proposed system over the conventional TDTL architecture.

Investigation of homodyne demodulation of RZ-BPSK signal based on an optical Costas loop

NASA Astrophysics Data System (ADS)

Zhou, Haijun; Zhu, Zunzhen; Xie, Weilin; Dong, Yi

2018-01-01

We demonstrate the coherent detection of 10 Gb/s return-to-zero (RZ) binary phase-shift keying (BPSK) signal based on a homodyne Costas optical phase-locked loop (OPLL). It demonstrates time misalignment tolerance of +/- 10% of the transmitted RZ-BPSK signal, i.e. -20 to +20 ps between the pulse carver and the phase modulator for 5 Gb/s RZ-BPSK signal, -10 to +10 ps or 10 Gb/s RZ-BPSK signal. Besides, the Costas coherent receiver shows a 2.5 dB sensitivity improvement over conventional 5 Gb/s NRZ-BPSK and a 1.4 dB over 10 Gb/s NRZ-BPSK only at the cost of slightly higher residual phase error. Those merits of sufficient tolerance to misalignment, higher receiver sensitivity, and low residual phase error of RZ-BPSK modulation are beneficial to be applied in free space optical (FSO) communication to achieve higher link budget, longer transmission distance.

Binary processing and display concepts for low-cost Omega receivers. [airborne systems simulation

NASA Technical Reports Server (NTRS)

Lilley, R. W.

1974-01-01

A description is given of concepts related to plans for developing a low-cost, all-digital Omega receiver capable of offering to the small-aircraft pilot a reliable and accurate navigation aid. The receiver base considered includes a receiver front-end module, a receiver control module, a memory-aided phase-locked loop module, a housekeeping timer module, and a synthesizer module.

Initial flight test of a Loran-C receiver/data collection system

NASA Technical Reports Server (NTRS)

Fischer, J. P.; Nickum, J. D.

1978-01-01

Development of a low cost Loran C receiver for general aviation use is discussed. The preparation and procedure of a flight test conducted with a receiver design which utilizes a phase locked loop oscillator to track the Loran C signals is described. It is indicated that such a receiver is a viable alternative for future work in developing a low cost Loran-C navigator.

Gigahertz frequency comb from a diode-pumped solid-state laser.

PubMed

Klenner, Alexander; Schilt, Stéphane; Südmeyer, Thomas; Keller, Ursula

2014-12-15

We present the first stabilization of the frequency comb offset from a diode-pumped gigahertz solid-state laser oscillator. No additional external amplification and/or compression of the output pulses is required. The laser is reliably modelocked using a SESAM and is based on a diode-pumped Yb:CALGO gain crystal. It generates 1.7-W average output power and pulse durations as short as 64 fs at a pulse repetition rate of 1 GHz. We generate an octave-spanning supercontinuum in a highly nonlinear fiber and use the standard f-to-2f carrier-envelope offset (CEO) frequency f_CEO detection method. As a pump source, we use a reliable and cost-efficient commercial diode laser. Its multi-spatial-mode beam profile leads to a relatively broad frequency comb offset beat signal, which nevertheless can be phase-locked by feedback to its current. Using improved electronics, we reached a feedback-loop-bandwidth of up to 300 kHz. A combination of digital and analog electronics is used to achieve a tight phase-lock of f_CEO to an external microwave reference with a low in-loop residual integrated phase-noise of 744 mrad in an integration bandwidth of [1 Hz, 5 MHz]. An analysis of the laser noise and response functions is presented which gives detailed insights into the CEO stabilization of this frequency comb.

A synchronization technique for the on-board master clock of a regenerative TDMA satellite communications system

NASA Astrophysics Data System (ADS)

Pattini, F.; Porzio Giusto, P.

The design criteria and performance of the master clock (MCK) generator and the unique word (UW) detector are examined. A narrow band phase lock loop is used for the onboard MCK generator and it is implemented with an all-digital scheme that employs a D-type flip flop as the phase detector. The performance of the MCK generator is analyzed with a computer program which considers phase offset of the digital phase comparator. The characteristics and capabilities of the UW detector which provides strobe signals for the MCK generator and synchronization signals for the onboard switching matrix are described.

Improved polar display technique of the phase angle of optical interference

NASA Astrophysics Data System (ADS)

Umeda, N.; Shirai, H.; Takasaki, H.

1984-02-01

A technique which displays the fractional order of optical interference by the azimuthal angle of radial arm has been improved by using a digital electronic circuit such as phase-locked loop and D flip-flop. The phase quadrature reference signals of this system are derived by reforming a reference signal and shifting it by a quarter wavelength referring to its waveform. As the result the orthogonal phase relation of the two signals is not affected by the frequency of the signal. This system has been proven to operate properly over the frequency range of 200-600 kHz without readjusting the electric system.

Synchronization algorithm for three-phase voltages of an inverter and a grid

NASA Astrophysics Data System (ADS)

Nos, O. V.

2017-07-01

This paper presents the results of designing a joint phase-locked loop for adjusting the phase shifts (speed) and Euclidean norm of three-phase voltages of an inverter to the same grid parameters. The design can be used, in particular, to match the potentials of two parallel-connected power sources for the fundamental harmonic at the moments of switching the stator windings of an induction AC motor from a converter to a centralized power-supply system and back. Technical implementation of the developed synchronization algorithm will significantly reduce the inductance of the current-balancing reactor and exclude emergency operation modes in the electric motor power circuit.

Domain Hierarchy and closed Loops (DHcL): a server for exploring hierarchy of protein domain structure

PubMed Central

Koczyk, Grzegorz; Berezovsky, Igor N.

2008-01-01

Domain hierarchy and closed loops (DHcL) (http://sitron.bccs.uib.no/dhcl/) is a web server that delineates energy hierarchy of protein domain structure and detects domains at different levels of this hierarchy. The server also identifies closed loops and van der Waals locks, which constitute a structural basis for the protein domain hierarchy. The DHcL can be a useful tool for an express analysis of protein structures and their alternative domain decompositions. The user submits a PDB identifier(s) or uploads a 3D protein structure in a PDB format. The results of the analysis are the location of domains at different levels of hierarchy, closed loops, van der Waals locks and their interactive visualization. The server maintains a regularly updated database of domains, closed loop and van der Waals locks for all X-ray structures in PDB. DHcL server is available at: http://sitron.bccs.uib.no/dhcl. PMID:18502776

Noncoherent pseudonoise code tracking performance of spread spectrum receivers

NASA Technical Reports Server (NTRS)

Simon, M. K.

1977-01-01

The optimum design and performance of two noncoherent PN tracking loop configurations, namely, the delay-locked loop and tau-dither loop, are described. In particular, the bandlimiting effects of the bandpass arm filters are considered by demonstrating that for a fixed data rate and data signal-to-noise ratio, there exists an optimum filter bandwidth in the sense of minimizing the loop's tracking jitter. Both the linear and nonlinear loop analyses are presented, and the region of validity of the former relative to the latter is indicated. In addition, numerical results are given for several filter types. For example, assuming ideal bandpass arm filters, it is shown that the tau-dither loop requires approximately 1 dB more signal-to-noise ratio than the delay-locked loop for equal rms tracking jitters.

Noise reduction and control in mode-locked semiconductor diode lasers for use in next-generation all-optical analog-to-digital converters

NASA Astrophysics Data System (ADS)

DePriest, Christopher M.; Abeles, Joseph H.; Braun, Alan; Delfyett, Peter J., Jr.

2000-07-01

External-cavity, actively-modelocked semiconductor diode lasers (SDLs) have proven to be attractive candidates for forming the backbone of next-generation analog-to-digital converters (ADCs), which are currently being developed to sample signals at repetition rates exceeding several GHz with up to 12 bits of digital resolution. Modelocked SDLs are capable of producing waveform-sampling pulse trains with very low temporal jitter (phase noise) and very small fluctuations in pulse height (amplitude noise)--two basic conditions that must be met in order for high-speed ADCs to achieve projected design goals. Single-wavelength modelocked operation (at nominal repetition frequencies of 400 MHz) has produced pulse trains with very low amplitude noise (approximately 0.08%), and the implementation of a phase- locked-loop has been effective in reducing the system's low- frequency phase noise (RMS timing jitter for offset frequencies between 10 Hz and 10 kHz has been reduced from 240 fs to 27 fs).

Ultrastable laser array at 633 nm for real-time dimensional metrology

NASA Astrophysics Data System (ADS)

Lawall, John; Pedulla, J. Marc; Le Coq, Yann

2001-07-01

We describe a laser system for very-high-accuracy dimensional metrology. A sealed-cavity helium-neon laser is offset locked to an iodine-stabilized laser in order to realize a secondary standard with higher power and less phase noise. Synchronous averaging is employed to remove the effect of the frequency modulation present on the iodine-stabilized laser. Additional lasers are offset locked to the secondary standard for use in interferometry. All servo loops are implemented digitally. The offset-locked lasers have intrinsic linewidths of the order of 2.5 kHz and exhibit a rms deviation from the iodine-stabilized laser below 18 kHz. The amplitude noise is at the shot-noise limit for frequencies above 700 kHz. We describe and evaluate the system in detail, and include a discussion of the noise associated with various types of power supplies.

Flexible stator control on the Galileo spacecraft

NASA Technical Reports Server (NTRS)

Kopf, E. H.; Brown, T. K.; Marsh, E. L.

1979-01-01

Galileo is a dual-spin spacecraft designed to deliver a probe to Jupiter and then orbit the planet. The stator, or despun section, contains four flexible modes below 10 Hz and the despun actuator is separated from the inertial sensors by this flexibility. Control loop separation by bandwidth proved unacceptable due to performance requirements. To obtain the desired performance, a control scheme was devised which consists of three parts. First, flexibility damping and control notch filtering are accomplished by phase locked loop techniques. Second, slewing maneuvers are produced by torque profiles which are nonexcitatory to the structure. Finally, a low bandwidth perturbation controller is supplied to remove spacecraft disturbances.

Video-signal improvement using comb filtering techniques.

NASA Technical Reports Server (NTRS)

Arndt, G. D.; Stuber, F. M.; Panneton, R. J.

1973-01-01

Significant improvement in the signal-to-noise performance of television signals has been obtained through the application of comb filtering techniques. This improvement is achieved by removing the inherent redundancy in the television signal through linear prediction and by utilizing the unique noise-rejection characteristics of the receiver comb filter. Theoretical and experimental results describe the signal-to-noise ratio and picture-quality improvement obtained through the use of baseband comb filters and the implementation of a comb network as the loop filter in a phase-lock-loop demodulator. Attention is given to the fact that noise becomes correlated when processed by the receiver comb filter.

Fully stabilized mid-infrared frequency comb for high-precision molecular spectroscopy.

PubMed

Vainio, Markku; Karhu, Juho

2017-02-20

A fully stabilized mid-infrared optical frequency comb spanning from 2.9 to 3.4 µm is described in this article. The comb is based on half-harmonic generation in a femtosecond optical parametric oscillator, which transfers the high phase coherence of a fully stabilized near-infrared Er-doped fiber laser comb to the mid-infrared region. The method is simple, as no phase-locked loops or reference lasers are needed. Precise locking of optical frequencies of the mid-infrared comb to the pump comb is experimentally verified at sub-20 mHz level, which corresponds to a fractional statistical uncertainty of 2 × 10^-16 at the center frequency of the mid-infrared comb. The fully stabilized mid-infrared comb is an ideal tool for high-precision molecular spectroscopy, as well as for optical frequency metrology in the mid-infrared region, which is difficult to access with other stabilized frequency comb techniques.

The Performance of A Sampled Data Delay Lock Loop Implemented with a Kalman Loop Filter.

DTIC Science & Technology

1980-01-01

que for analysis is computer simulation. Other techniques include state variable techniques and z-transform methods. Since the Kalman filter is linear...LOGIC NOT SHOWN Figure 2. Block diagram of the sampled data delay lock loop (SDDLL) Es A/ A 3/A/ Figure 3. Sampled error voltage ( Es ) as a function of...from a sum of two components. The first component is the previous filtered es - timate advanced one step forward by the state transition matrix. The 8

Modified nonlinear amplifying loop mirror for mode-locked fibre oscillators with record-high energy and high-average-power pulsed output

NASA Astrophysics Data System (ADS)

Kobtsev, Sergey; Ivanenko, Alexey; Smirnov, Sergey; Kokhanovsky, Alexey

2018-02-01

The present work proposes and studies approaches for development of new modified non-linear amplifying loop mirror (NALM) allowing flexible and dynamic control of their non-linear properties within a relatively broad range of radiation powers. Using two independently pumped active media in the loop reflector constitutes one of the most promising approaches to development of better NALM with nonlinear properties controllable independently of the intra-cavity radiation power. This work reports on experimental and theoretical studies of the proposed redesigned NALM allowing both a higher level of energy parameters of output generated by mode-locked fibre oscillators and new possibilities of switching among different mode-locked regimes.

Analysis of an all-digital maximum likelihood carrier phase and clock timing synchronizer for eight phase-shift keying modulation

NASA Astrophysics Data System (ADS)

Degaudenzi, Riccardo; Vanghi, Vieri

1994-02-01

In all-digital Trellis-Coded 8PSK (TC-8PSK) demodulator well suited for VLSI implementation, including maximum likelihood estimation decision-directed (MLE-DD) carrier phase and clock timing recovery, is introduced and analyzed. By simply removing the trellis decoder the demodulator can efficiently cope with uncoded 8PSK signals. The proposed MLE-DD synchronization algorithm requires one sample for the phase and two samples per symbol for the timing loop. The joint phase and timing discriminator characteristics are analytically derived and numerical results checked by means of computer simulations. An approximated expression for steady-state carrier phase and clock timing mean square error has been derived and successfully checked with simulation findings. Synchronizer deviation from the Cramer Rao bound is also discussed. Mean acquisition time for the digital synchronizer has also been computed and checked, using the Monte Carlo simulation technique. Finally, TC-8PSK digital demodulator performance in terms of bit error rate and mean time to lose lock, including digital interpolators and synchronization loops, is presented.

Integrated Photonic Comb Generation: Applications in Coherent Communication and Sensing

NASA Astrophysics Data System (ADS)

Parker, John S.

Integrated photonics combines many optical components including lasers, modulators, waveguides, and detectors in close proximity via homogeneous (monolithic) or heterogeneous (using multiple materials) integration. This improves stability for interferometers and lasers, reduces the occurrence of unwanted reflections, and it avoids coupling losses between different components as they are on the same chip. Thus, less power is needed to compensate for these added losses, and less heat needs to be removed due to these power savings. In addition, integration allows the many components that comprise a system to be fabricated together, thereby reducing the cost per system and allowing rapid scaling in production throughput. Integrated optical combs have many applications including: metrology, THz frequency generation, arbitrary waveform generation, optical clocks, photonic analog-to-digital converters, sensing (imaging), spectroscopy, and data communication. A comb is a set of optical sources evenly spaced in frequency. Several methods of comb generation including mode-locking and optical parametric oscillation produce phase-matched optical outputs with a fixed phase relationship between the frequency lines. When the absolute frequency of a single comb line is stabilized along with the frequency spacing between comb lines, absolute phase and frequency precision can be achieved over the entire comb bandwidth. This functionality provides tremendous benefits to many applications such as coherent communication and optical sensing. The goals for this work were achieving a broad comb bandwidth and noise reduction, i.e., frequency and phase stability. Integrated mode-locked lasers on the InGaAsP/InP material platform were chosen, as they could be monolithically integrated with the wide range of highly functional and versatile photonic integrated circuits (PICs) previously demonstrated on this platform at UCSB. Gain flattening filters were implemented to increase the comb bandwidths to 2.5 THz. Active mode-locking with an RF source was used to precisely set the frequency spacing between comb lines with better than 10 Hz accuracy. An integrated optical phase-locked loop (OPLL) for the comb was designed, built, and tested. The OPLL fixed a single comb line to a stable single linewidth laser, demonstrating a ˜430 Hz FWHM optical linewidth on the locked comb line and 20º RMS phase deviation between the comb and optical reference. The free-running linewidth is 50--100 MHz, demonstrating over 50 dB improvement in optical linewidth via locking. An integrated tunable laser (SG-DBR) with an OPLL was phase-locked to a comb source with a fixed offset frequency, thus showing the potential for using a comb with SG-DBRs as a compact frequency synthesizer.