SiO2/AlON stacked gate dielectrics for AlGaN/GaN MOS heterojunction field-effect transistors

NASA Astrophysics Data System (ADS)

Watanabe, Kenta; Terashima, Daiki; Nozaki, Mikito; Yamada, Takahiro; Nakazawa, Satoshi; Ishida, Masahiro; Anda, Yoshiharu; Ueda, Tetsuzo; Yoshigoe, Akitaka; Hosoi, Takuji; Shimura, Takayoshi; Watanabe, Heiji

2018-06-01

Stacked gate dielectrics consisting of wide bandgap SiO2 insulators and thin aluminum oxynitride (AlON) interlayers were systematically investigated in order to improve the performance and reliability of AlGaN/GaN metal–oxide–semiconductor (MOS) devices. A significantly reduced gate leakage current compared with that in a single AlON layer was achieved with these structures, while maintaining the superior thermal stability and electrical properties of the oxynitride/AlGaN interface. Consequently, distinct advantages in terms of the reliability of the gate dielectrics, such as an improved immunity against electron injection and an increased dielectric breakdown field, were demonstrated for AlGaN/GaN MOS capacitors with optimized stacked structures having a 3.3-nm-thick AlON interlayer.

Combining a multi deposition multi annealing technique with a scavenging (Ti) to improve the high-k/metal gate stack performance for a gate-last process

NASA Astrophysics Data System (ADS)

ShuXiang, Zhang; Hong, Yang; Bo, Tang; Zhaoyun, Tang; Yefeng, Xu; Jing, Xu; Jiang, Yan

2014-10-01

ALD HfO2 films fabricated by a novel multi deposition multi annealing (MDMA) technique are investigated, we have included samples both with and without a Ti scavenging layer. As compared to the reference gate stack treated by conventional one-time deposition and annealing (D&A), devices receiving MDMA show a significant reduction in leakage current. Meanwhile, EOT growth is effectively controlled by the Ti scavenging layer. This improvement strongly correlates with the cycle number of D&A (while keeping the total annealing time and total dielectrics thickness the same). Transmission electron microscope and energy-dispersive X-ray spectroscopy analysis suggests that oxygen incorporation into both the high-k film and the interfacial layer is likely to be responsible for the improvement of the device. This novel MDMA is promising for the development of gate stack technology in a gate last integration scheme.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lu, Cimang, E-mail: cimang@adam.t.u-tokyo.ac.jp; Lee, Choong Hyun; Nishimura, Tomonori

We investigated yttrium scandate (YScO{sub 3}) as an alternative high-permittivity (k) dielectric thin film for Ge gate stack formation. Significant enhancement of k-value is reported in YScO{sub 3} comparing to both of its binary compounds, Y{sub 2}O{sub 3} and Sc{sub 2}O{sub 3}, without any cost of interface properties. It suggests a feasible approach to a design of promising high-k dielectrics for Ge gate stack, namely, the formation of high-k ternary oxide out of two medium-k binary oxides. Aggressive scaling of equivalent oxide thickness (EOT) with promising interface properties is presented by using YScO{sub 3} as high-k dielectric and yttrium-doped GeO{submore » 2} (Y-GeO{sub 2}) as interfacial layer, for a demonstration of high-k gate stack on Ge. In addition, we demonstrate Ge n-MOSFET performance showing the peak electron mobility over 1000 cm{sup 2}/V s in sub-nm EOT region by YScO{sub 3}/Y-GeO{sub 2}/Ge gate stack.« less

Quantum Dot Gate Three-State and Nonvolatile Memory Field-Effect Transistors Using a ZnS/ZnMgS/ZnS Heteroepitaxial Stack as a Tunnel Insulator on Silicon-on-Insulator Substrates

NASA Astrophysics Data System (ADS)

Suarez, Ernesto; Chan, Pik-Yiu; Lingalugari, Murali; Ayers, John E.; Heller, Evan; Jain, Faquir

2013-11-01

This paper describes the use of II-VI lattice-matched gate insulators in quantum dot gate three-state and flash nonvolatile memory structures. Using silicon-on-insulator wafers we have fabricated GeO x -cladded Ge quantum dot (QD) floating gate nonvolatile memory field-effect transistor devices using ZnS-Zn0.95Mg0.05S-ZnS tunneling layers. The II-VI heteroepitaxial stack is nearly lattice-matched and is grown using metalorganic chemical vapor deposition on a silicon channel. This stack reduces the interface state density, improving threshold voltage variation, particularly in sub-22-nm devices. Simulations using self-consistent solutions of the Poisson and Schrödinger equations show the transfer of charge to the QD layers in three-state as well as nonvolatile memory cells.

Surface and Interface Chemistry for Gate Stacks on Silicon

NASA Astrophysics Data System (ADS)

Frank, M. M.; Chabal, Y. J.

This chapter addresses the fundamental silicon surface science associated with the continued progress of nanoelectronics along the path prescribed by Moore's law. Focus is on hydrogen passivation layers and on ultrathin oxide films encountered during silicon cleaning and gate stack formation in the fabrication of metal-oxide-semiconductor field-effect transistors (MOSFETs). Three main topics are addressed. (i) First, the current practices and understanding of silicon cleaning in aqueous solutions are reviewed, including oxidizing chemistries and cleans leading to a hydrogen passivation layer. The dependence of the final surface termination and morphology/roughness on reactant choice and pH and the influence of impurities such as dissolved oxygen or metal ions are discussed. (ii) Next, the stability of hydrogen-terminated silicon in oxidizing liquid and gas phase environments is considered. In particular, the remarkable stability of hydrogen-terminated silicon surface in pure water vapor is discussed in the context of atomic layer deposition (ALD) of high-permittivity (high-k) gate dielectrics where water is often used as an oxygen precursor. Evidence is also provided for co-operative action between oxygen and water vapor that accelerates surface oxidation in humid air. (iii) Finally, the fabrication of hafnium-, zirconium- and aluminum-based high-k gate stacks is described, focusing on the continued importance of the silicon/silicon oxide interface. This includes a review of silicon surface preparation by wet or gas phase processing and its impact on high-k nucleation during ALD growth, and the consideration of gate stack capacitance and carrier mobility. In conclusion, two issues are highlighted: the impact of oxygen vacancies on the electrical characteristics of high-k MOS devices, and the way alloyed metal ions (such as Al in Hf-based gate stacks) in contact with the interfacial silicon oxide layer can be used to control flatband and threshold voltages.

A comparative study on top-gated and bottom-gated multilayer MoS2 transistors with gate stacked dielectric of Al2O3/HfO2.

PubMed

Zou, Xiao; Xu, Jingping; Huang, Hao; Zhu, Ziqang; Wang, Hongjiu; Li, Borui; Liao, Lei; Fang, Guojia

2018-06-15

Top-gated and bottom-gated transistors with multilayer MoS 2 channel fully encapsulated by stacked Al 2 O 3 /HfO 2 (9 nm/6 nm) were fabricated and comparatively studied. Excellent electrical properties are demonstrated for the TG transistors with high on-off current ratio of 10 8 , high field-effect mobility of 10 2 cm 2 V -1 s -1 , and low subthreshold swing of 93 mV dec -1 . Also, enhanced reliability has been achieved for the TG transistors with threshold voltage shift of 10 -3 -10 -2 V MV -1 cm -1 after 6 MV cm -1 gate-biased stressing. All improvement for the TG device can be ascribed to the formed device structure and dielectric environment. Degradation of the performance for the BG transistors should be attributed to reduced gate capacitance density and deteriorated interface properties related to vdW gap with a thickness about 0.4 nm. So, the TG transistor with MoS 2 channel fully encapsulated by stacked Al 2 O 3 /HfO 2 is a promising way to fabricate high-performance ML MoS 2 field-effect transistors for practical electron device applications.

A comparative study on top-gated and bottom-gated multilayer MoS2 transistors with gate stacked dielectric of Al2O3/HfO2

NASA Astrophysics Data System (ADS)

Zou, Xiao; Xu, Jingping; Huang, Hao; Zhu, Ziqang; Wang, Hongjiu; Li, Borui; Liao, Lei; Fang, Guojia

2018-06-01

Top-gated and bottom-gated transistors with multilayer MoS2 channel fully encapsulated by stacked Al2O3/HfO2 (9 nm/6 nm) were fabricated and comparatively studied. Excellent electrical properties are demonstrated for the TG transistors with high on–off current ratio of 108, high field-effect mobility of 102 cm2 V‑1 s‑1, and low subthreshold swing of 93 mV dec–1. Also, enhanced reliability has been achieved for the TG transistors with threshold voltage shift of 10‑3–10‑2 V MV–1 cm–1 after 6 MV cm‑1 gate-biased stressing. All improvement for the TG device can be ascribed to the formed device structure and dielectric environment. Degradation of the performance for the BG transistors should be attributed to reduced gate capacitance density and deteriorated interface properties related to vdW gap with a thickness about 0.4 nm. So, the TG transistor with MoS2 channel fully encapsulated by stacked Al2O3/HfO2 is a promising way to fabricate high-performance ML MoS2 field-effect transistors for practical electron device applications.

Effects of HfO2/Al2O3 gate stacks on electrical performance of planar In x Ga1- x As tunneling field-effect transistors

NASA Astrophysics Data System (ADS)

Ahn, Dae-Hwan; Yoon, Sang-Hee; Takenaka, Mitsuru; Takagi, Shinichi

2017-08-01

We study the impact of gate stacks on the electrical characteristics of Zn-diffused source In x Ga1- x As tunneling field-effect transistors (TFETs) with Al2O3 or HfO2/Al2O3 gate insulators. Ta and W gate electrodes are compared in terms of the interface trap density (D it) of InGaAs MOS interfaces. It is found that D it is lower at the W/HfO2/Al2O3 InGaAs MOS interface than at the Ta/HfO2/Al2O3 interface. The In0.53Ga0.47As TFET with a W/HfO2 (2.7 nm)/Al2O3 (0.3 nm) gate stack of 1.4-nm-thick capacitance equivalent thickness (CET) has a steep minimum subthreshold swing (SS) of 57 mV/dec, which is attributed to the thin CET and low D it. Also, the In0.53Ga0.47As (2.6 nm)/In0.67Ga0.33As (3.2 nm)/In0.53Ga0.47As (96.5 nm) quantum-well (QW) TFET supplemented with this 1.4-nm-thick CET gate stack exhibits a steeper minimum SS of 54 mV/dec and a higher on-current (I on) than those of the In0.53Ga0.47As TFET.

Fabrication of arrayed Si nanowire-based nano-floating gate memory devices on flexible plastics.

PubMed

Yoon, Changjoon; Jeon, Youngin; Yun, Junggwon; Kim, Sangsig

2012-01-01

Arrayed Si nanowire (NW)-based nano-floating gate memory (NFGM) devices with Pt nanoparticles (NPs) embedded in Al2O3 gate layers are successfully constructed on flexible plastics by top-down approaches. Ten arrayed Si NW-based NFGM devices are positioned on the first level. Cross-linked poly-4-vinylphenol (PVP) layers are spin-coated on them as isolation layers between the first and second level, and another ten devices are stacked on the cross-linked PVP isolation layers. The electrical characteristics of the representative Si NW-based NFGM devices on the first and second levels exhibit threshold voltage shifts, indicating the trapping and detrapping of electrons in their NPs nodes. They have an average threshold voltage shift of 2.5 V with good retention times of more than 5 x 10(4) s. Moreover, most of the devices successfully retain their electrical characteristics after about one thousand bending cycles. These well-arrayed and stacked Si NW-based NFGM devices demonstrate the potential of nanowire-based devices for large-scale integration.

Interfacial Cation-Defect Charge Dipoles in Stacked TiO2/Al2O3 Gate Dielectrics.

PubMed

Zhang, Liangliang; Janotti, Anderson; Meng, Andrew C; Tang, Kechao; Van de Walle, Chris G; McIntyre, Paul C

2018-02-14

Layered atomic-layer-deposited and forming-gas-annealed TiO 2 /Al 2 O 3 dielectric stacks, with the Al 2 O 3 layer interposed between the TiO 2 and a p-type germanium substrate, are found to exhibit a significant interface charge dipole that causes a ∼-0.2 V shift of the flat-band voltage and suppresses the leakage current density for gate injection of electrons. These effects can be eliminated by the formation of a trilayer dielectric stack, consistent with the cancellation of one TiO 2 /Al 2 O 3 interface dipole by the addition of another dipole of opposite sign. Density functional theory calculations indicate that the observed interface-dependent properties of TiO 2 /Al 2 O 3 dielectric stacks are consistent in sign and magnitude with the predicted behavior of Al Ti and Ti Al point-defect dipoles produced by local intermixing of the Al 2 O 3 /TiO 2 layers across the interface. Evidence for such intermixing is found in both electrical and physical characterization of the gate stacks.

Enhanced Performance of Gate-First p-Channel Metal-Insulator-Semiconductor Field-Effect Transistors with Polycrystalline Silicon/TiN/HfSiON Stacks Fabricated by Physical Vapor Deposition Based In situ Method

NASA Astrophysics Data System (ADS)

Kitano, Naomu; Horie, Shinya; Arimura, Hiroaki; Kawahara, Takaaki; Sakashita, Shinsuke; Nishida, Yukio; Yugami, Jiro; Minami, Takashi; Kosuda, Motomu; Hosoi, Takuji; Shimura, Takayoshi; Watanabe, Heiji

2007-12-01

We demonstrated the use of an in situ metal/high-k fabrication method for improving the performance of metal-insulator-semiconductor field-effect transistors (MISFETs). Gate-first pMISFETs with polycrystalline silicon (poly-Si)/TiN/HfSiON stacks were fabricated by techniques based on low-damage physical vapor deposition, in which high-quality HfSiON dielectrics were formed by the interface reaction between an ultrathin metal-Hf layer (0.5 nm thick) and a SiO2 underlayer, and TiN electrodes were continuously deposited on the gate dielectrics without exposure to air. Gate-first pMISFETs with high carrier mobility and a low threshold voltage (Vth) were realized by reducing the carbon impurity in the gate stacks and improving the Vth stability against thermal treatment. As a result, we obtained superior current drivability (Ion = 350 μA/μm at Ioff = 200 pA/μm), which corresponds to a 13% improvement over that of conventional chemical vapor deposition-based metal/high-k devices.

Ferroelectric HfZrOx-based MoS2 negative capacitance transistor with ITO capping layers for steep-slope device application

NASA Astrophysics Data System (ADS)

Xu, Jing; Jiang, Shu-Ye; Zhang, Min; Zhu, Hao; Chen, Lin; Sun, Qing-Qing; Zhang, David Wei

2018-03-01

A negative capacitance field-effect transistor (NCFET) built with hafnium-based oxide is one of the most promising candidates for low power-density devices due to the extremely steep subthreshold swing (SS) and high on-state current induced by incorporating the ferroelectric material in the gate stack. Here, we demonstrated a two-dimensional (2D) back-gate NCFET with the integration of ferroelectric HfZrOx in the gate stack and few-layer MoS2 as the channel. Instead of using the conventional TiN capping metal to form ferroelectricity in HfZrOx, the NCFET was fabricated on a thickness-optimized Al2O3/indium tin oxide (ITO)/HfZrOx/ITO/SiO2/Si stack, in which the two ITO layers sandwiching the HfZrOx film acted as the control back gate and ferroelectric gate, respectively. The thickness of each layer in the stack was engineered for distinguishable optical identification of the exfoliated 2D flakes on the surface. The NCFET exhibited small off-state current and steep switching behavior with minimum SS as low as 47 mV/dec. Such a steep-slope transistor is compatible with the standard CMOS fabrication process and is very attractive for 2D logic and sensor applications and future energy-efficient nanoelectronic devices with scaling power supply.

Multibands tunneling in AAA-stacked trilayer graphene

NASA Astrophysics Data System (ADS)

Redouani, Ilham; Jellal, Ahmed; Bahaoui, Abdelhadi; Bahlouli, Hocine

2018-04-01

We study the electronic transport through np and npn junctions for AAA-stacked trilayer graphene. Two kinds of gates are considered where the first is a single gate and the second is a double gate. After obtaining the solutions for the energy spectrum, we use the transfer matrix method to determine the three transmission probabilities for each individual cone τ = 0 , ± 1 . We show that the quasiparticles in AAA-stacked trilayer graphene are not only chiral but also labeled by an additional cone index τ. The obtained bands are composed of three Dirac cones that depend on the chirality indexes. We show that there is perfect transmission for normal or near normal incidence, which is a manifestation of the Klein tunneling effect. We analyze also the corresponding total conductance, which is defined as the sum of the conductance channels in each individual cone. Our results are numerically discussed and compared with those obtained for ABA- and ABC-stacked trilayer graphene.

Enhancement of thermal stability and water resistance in yttrium-doped GeO{sub 2}/Ge gate stack

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lu, Cimang, E-mail: cimang@adam.t.u-tokyo.ac.jp; Hyun Lee, Choong; Zhang, Wenfeng

2014-03-03

We have systematically investigated the material and electrical properties of yttrium-doped GeO{sub 2} (Y-GeO{sub 2}) on Germanium (Ge). A significant improvement of both thermal stability and water resistance were demonstrated by Y-GeO{sub 2}/Ge stack, compared to that of pure GeO{sub 2}/Ge stack. The excellent electrical properties of Y-GeO{sub 2}/Ge stacks with low D{sub it} were presented as well as enhancement of dielectric constant in Y-GeO{sub 2} layer, which is beneficial for further equivalent oxide thickness scaling of Ge gate stack. The improvement of thermal stability and water resistance are discussed both in terms of the Gibbs free energy lowering andmore » network modification of Y-GeO{sub 2}.« less

Crystalline ZrTiO{sub 4} gated p-metal–oxide–semiconductor field effect transistors with sub-nm equivalent oxide thickness featuring good electrical characteristics and reliability

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wu, Chao-Yi; Hsieh, Ching-Heng; Lee, Ching-Wei

2015-02-02

ZrTiO{sub 4} crystallized in orthorhombic (o-) phase was stacked with an amorphous Yb{sub 2}O{sub 3} interfacial layer as the gate dielectric for Si-based p-MOSFETs. With thermal annealing after gate electrode, the gate stack with equivalent oxide thickness (EOT) of 0.82 nm achieves high dielectric quality by showing a low interface trap density (D{sub it}) of 2.75 × 10{sup 11 }cm{sup −2}eV{sup −1} near the midgap and low oxide traps. Crystallization of ZrTiO{sub 4} and post metal annealing are also proven to introduce very limited amount of metal induced gap states or interfacial dipole. The p-MOSFETs exhibit good sub-threshold swing of 75 mV/dec which is ascribedmore » to the low D{sub it} value and small EOT. Owing to the Y{sub 2}O{sub 3} interfacial layer and smooth interface with Si substrate that, respectively, suppress phonon and surface roughness scattering, the p-MOSFETs also display high hole mobility of 49 cm{sup 2}/V-s at 1 MV/cm. In addition, I{sub on}/I{sub off} ratio larger than 10{sup 6} is also observed. From the reliability evaluation by negative bias temperature instability test, after stressing with an electric field of −10 MV/cm at 85 °C for 1000 s, satisfactory threshold voltage shift of 12 mV and sub-threshold swing degradation of 3% were obtained. With these promising characteristics, the Yb{sub 2}O{sub 3}/o-ZrTiO{sub 4} gate stack holds the great potential for next-generation electronics.« less

Positive Bias Instability of Bottom-Gate Zinc Oxide Thin-Film Transistors with a SiOx/SiNx-Stacked Gate Insulator

NASA Astrophysics Data System (ADS)

Furuta, Mamoru; Kamada, Yudai; Hiramatsu, Takahiro; Li, Chaoyang; Kimura, Mutsumi; Fujita, Shizuo; Hirao, Takashi

2011-03-01

The positive bias instabilities of the zinc oxide thin-film transistors (ZnO TFTs) with a SiOx/SiNx-stacked gate insulator have been investigated. The film quality of a gate insulator of SiOx, which forms an interface with the ZnO channel, was varied by changing the gas mixture ratio of SiH4/N2O/N2 during plasma-enhanced chemical vapor deposition. The positive bias stress endurance of ZnO TFT strongly depended on the deposition condition of the SiOx gate insulator. From the relaxations of the transfer curve shift after imposition of positive bias stress, transfer curves could not be recovered completely without any thermal annealing. A charge trapping in a gate insulator rather than that in bulk ZnO and its interface with a gate insulator is a dominant instability mechanism of ZnO TFTs under positive bias stress.

SEGR in SiO$${}_2$$ –Si$$_3$$ N$$_4$$ Stacks

DOE Office of Scientific and Technical Information (OSTI.GOV)

Javanainen, Arto; Ferlet-Cavrois, Veronique; Bosser, Alexandre

2014-04-17

This work presents experimental SEGR data for MOS-devices, where the gate dielectrics are are made of stacked SiO 2–Si 3N 4 structures. Also a semi-empirical model for predicting the critical gate voltage in these structures under heavy-ion exposure is proposed. Then statistical interrelationship between SEGR cross-section data and simulated energy deposition probabilities in thin dielectric layers is discussed.

Evaluation of border traps and interface traps in HfO2/MoS2 gate stacks by capacitance–voltage analysis

NASA Astrophysics Data System (ADS)

Zhao, Peng; Khosravi, Ava; Azcatl, Angelica; Bolshakov, Pavel; Mirabelli, Gioele; Caruso, Enrico; Hinkle, Christopher L.; Hurley, Paul K.; Wallace, Robert M.; Young, Chadwin D.

2018-07-01

Border traps and interface traps in HfO2/few-layer MoS2 top-gate stacks are investigated by C–V characterization. Frequency dependent C–V data shows dispersion in both the depletion and accumulation regions for the MoS2 devices. The border trap density is extracted with a distributed model, and interface traps are analyzed using the high-low frequency and multi-frequency methods. The physical origins of interface traps appear to be caused by impurities/defects in the MoS2 layers, performing as band tail states, while the border traps are associated with the dielectric, likely a consequence of the low-temperature deposition. This work provides a method of using multiple C–V measurements and analysis techniques to analyze the behavior of high-k/TMD gate stacks and deconvolute border traps from interface traps.

Novel conformal organic antireflective coatings for advanced I-line lithography

NASA Astrophysics Data System (ADS)

Deshpande, Shreeram V.; Nowak, Kelly A.; Fowler, Shelly; Williams, Paul; Arjona, Mikko

2001-08-01

Flash memory chips are playing a critical role in semiconductor devices due to increased popularity of hand held electronic communication devices such as cell phones and PDAs (personal Digital Assistants). Flash memory offers two primary advantages in semiconductor devices. First, it offers flexibility of in-circuit programming capability to reduce the loss from programming errors and to significantly reduce commercialization time to market for new devices. Second, flash memory has a double density memory capability through stacked gate structures which increases the memory capability and thus saves significantly on chip real estate. However, due to stacked gate structures the requirements for manufacturing of flash memory devices are significantly different from traditional memory devices. Stacked gate structures also offer unique challenges to lithographic patterning materials such as Bottom Anti-Reflective Coating (BARC) compositions used to achieve CD control and to minimize standing wave effect in photolithography. To be applicable in flash memory manufacturing a BARC should form a conformal coating on high topography of stacked gate features as well as provide the normal anti-reflection properties for CD control. In this paper we report on a new highly conformal advanced i-line BARC for use in design and manufacture of flash memory devices. Conformal BARCs being significantly thinner in trenches than the planarizing BARCs offer the advantage of reducing BARC overetch and thus minimizing resist thickness loss.

Effect of Thermal Budget on the Electrical Characterization of Atomic Layer Deposited HfSiO/TiN Gate Stack MOSCAP Structure

PubMed Central

Khan, Z. N.; Ahmed, S.; Ali, M.

2016-01-01

Metal Oxide Semiconductor (MOS) capacitors (MOSCAP) have been instrumental in making CMOS nano-electronics realized for back-to-back technology nodes. High-k gate stacks including the desirable metal gate processing and its integration into CMOS technology remain an active research area projecting the solution to address the requirements of technology roadmaps. Screening, selection and deposition of high-k gate dielectrics, post-deposition thermal processing, choice of metal gate structure and its post-metal deposition annealing are important parameters to optimize the process and possibly address the energy efficiency of CMOS electronics at nano scales. Atomic layer deposition technique is used throughout this work because of its known deposition kinetics resulting in excellent electrical properties and conformal structure of the device. The dynamics of annealing greatly influence the electrical properties of the gate stack and consequently the reliability of the process as well as manufacturable device. Again, the choice of the annealing technique (migration of thermal flux into the layer), time-temperature cycle and sequence are key parameters influencing the device’s output characteristics. This work presents a careful selection of annealing process parameters to provide sufficient thermal budget to Si MOSCAP with atomic layer deposited HfSiO high-k gate dielectric and TiN gate metal. The post-process annealing temperatures in the range of 600°C -1000°C with rapid dwell time provide a better trade-off between the desirable performance of Capacitance-Voltage hysteresis and the leakage current. The defect dynamics is thought to be responsible for the evolution of electrical characteristics in this Si MOSCAP structure specifically designed to tune the trade-off at low frequency for device application. PMID:27571412

XPS-XRF hybrid metrology enabling FDSOI process

NASA Astrophysics Data System (ADS)

Hossain, Mainul; Subramanian, Ganesh; Triyoso, Dina; Wahl, Jeremy; Mcardle, Timothy; Vaid, Alok; Bello, A. F.; Lee, Wei Ti; Klare, Mark; Kwan, Michael; Pois, Heath; Wang, Ying; Larson, Tom

2016-03-01

Planar fully-depleted silicon-on-insulator (FDSOI) technology potentially offers comparable transistor performance as FinFETs. pFET FDOSI devices are based on a silicon germanium (cSiGe) layer on top of a buried oxide (BOX). Ndoped interfacial layer (IL), high-k (HfO2) layer and the metal gate stacks are then successively built on top of the SiGe layer. In-line metrology is critical in precisely monitoring the thickness and composition of the gate stack and associated underlying layers in order to achieve desired process control. However, any single in-line metrology technique is insufficient to obtain the thickness of IL, high-k, cSiGe layers in addition to Ge% and N-dose in one single measurement. A hybrid approach is therefore needed that combines the capabilities of more than one measurement technique to extract multiple parameters in a given film stack. This paper will discuss the approaches, challenges, and results associated with the first-in-industry implementation of XPS-XRF hybrid metrology for simultaneous detection of high-k thickness, IL thickness, N-dose, cSiGe thickness and %Ge, all in one signal measurement on a FDSOI substrate in a manufacturing fab. Strong correlation to electrical data for one or more of these measured parameters will also be presented, establishing the reliability of this technique.

High-performance III-V MOSFET with nano-stacked high-k gate dielectric and 3D fin-shaped structure.

PubMed

Chen, Szu-Hung; Liao, Wen-Shiang; Yang, Hsin-Chia; Wang, Shea-Jue; Liaw, Yue-Gie; Wang, Hao; Gu, Haoshuang; Wang, Mu-Chun

2012-08-01

A three-dimensional (3D) fin-shaped field-effect transistor structure based on III-V metal-oxide-semiconductor field-effect transistor (MOSFET) fabrication has been demonstrated using a submicron GaAs fin as the high-mobility channel. The fin-shaped channel has a thickness-to-width ratio (TFin/WFin) equal to 1. The nano-stacked high-k Al2O3 dielectric was adopted as a gate insulator in forming a metal-oxide-semiconductor structure to suppress gate leakage. The 3D III-V MOSFET exhibits outstanding gate controllability and shows a high Ion/Ioff ratio > 105 and a low subthreshold swing of 80 mV/decade. Compared to a conventional Schottky gate metal-semiconductor field-effect transistor or planar III-V MOSFETs, the III-V MOSFET in this work exhibits a significant performance improvement and is promising for future development of high-performance n-channel devices based on III-V materials.

High-performance III-V MOSFET with nano-stacked high-k gate dielectric and 3D fin-shaped structure

PubMed Central

2012-01-01

A three-dimensional (3D) fin-shaped field-effect transistor structure based on III-V metal-oxide-semiconductor field-effect transistor (MOSFET) fabrication has been demonstrated using a submicron GaAs fin as the high-mobility channel. The fin-shaped channel has a thickness-to-width ratio (TFin/WFin) equal to 1. The nano-stacked high-k Al2O3 dielectric was adopted as a gate insulator in forming a metal-oxide-semiconductor structure to suppress gate leakage. The 3D III-V MOSFET exhibits outstanding gate controllability and shows a high Ion/Ioff ratio > 105 and a low subthreshold swing of 80 mV/decade. Compared to a conventional Schottky gate metal–semiconductor field-effect transistor or planar III-V MOSFETs, the III-V MOSFET in this work exhibits a significant performance improvement and is promising for future development of high-performance n-channel devices based on III-V materials. PMID:22853458

Effect of Al gate on the electrical behaviour of Al-doped Ta2O5 stacks

NASA Astrophysics Data System (ADS)

Skeparovski, A.; Novkovski, N.; Atanassova, E.; Paskaleva, A.; Lazarov, V. K.

2011-06-01

The electrical behaviour of Al-doped Ta2O5 films on nitrided silicon and implemented in Al-gated MIS capacitors has been studied. The dopant was introduced into the Ta2O5 through its surface by deposing a thin Al layer on the top of Ta2O5 followed by an annealing process. The HRTEM images reveal that the initial double-layer structure of the stacks composed of doped Ta2O5 and interfacial SiON layer undergoes changes during the formation of the Al gate and transforms into a three-layer structure with an additional layer between the Al electrode and the doped Ta2O5. This layer, being a result of reaction between the Al gate and the Al-doped Ta2O5, affects the overall electrical properties of the stacks. Strong charge trapping/detrapping processes have been established in the vicinity of the doped Ta2O5/SiON interface resulting in a large C-V hysteresis effect. The charge trapping also influences the current conduction in the layers keeping the current density level rather low even at high electric fields (J < 10-6 A cm-2 at 7 MV cm-1). By employing a three-layer model of the stack, the permittivity of both, the Al-doped Ta2O5 and the additional layer, has been estimated and the corresponding conduction mechanisms identified.

Structural and thermodynamic consideration of metal oxide doped GeO{sub 2} for gate stack formation on germanium

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lu, Cimang, E-mail: cimang@adam.t.u-tokyo.ac.jp; Lee, Choong Hyun; Zhang, Wenfeng

2014-11-07

A systematic investigation was carried out on the material and electrical properties of metal oxide doped germanium dioxide (M-GeO{sub 2}) on Ge. We propose two criteria on the selection of desirable M-GeO{sub 2} for gate stack formation on Ge. First, metal oxides with larger cation radii show stronger ability in modifying GeO{sub 2} network, benefiting the thermal stability and water resistance in M-GeO{sub 2}/Ge stacks. Second, metal oxides with a positive Gibbs free energy for germanidation are required for good interface properties of M-GeO{sub 2}/Ge stacks in terms of preventing the Ge-M metallic bond formation. Aggressive equivalent oxide thickness scalingmore » to 0.5 nm is also demonstrated based on these understandings.« less

Logical qubit fusion

NASA Astrophysics Data System (ADS)

Moussa, Jonathan; Ryan-Anderson, Ciaran

The canonical modern plan for universal quantum computation is a Clifford+T gate set implemented in a topological error-correcting code. This plan has the basic disparity that logical Clifford gates are natural for codes in two spatial dimensions while logical T gates are natural in three. Recent progress has reduced this disparity by proposing logical T gates in two dimensions with doubled, stacked, or gauge color codes, but these proposals lack an error threshold. An alternative universal gate set is Clifford+F, where a fusion (F) gate converts two logical qubits into a logical qudit. We show that logical F gates can be constructed by identifying compatible pairs of qubit and qudit codes that stabilize the same logical subspace, much like the original Bravyi-Kitaev construction of magic state distillation. The simplest example of high-distance compatible codes results in a proposal that is very similar to the stacked color code with the key improvement of retaining an error threshold. Sandia National Labs is a multi-program laboratory managed and operated by Sandia Corp, a wholly owned subsidiary of Lockheed Martin Corp, for the U.S. Department of Energy's National Nuclear Security Administration under contract DE-AC04-94AL85000.

Fringing field effects in negative capacitance field-effect transistors with a ferroelectric gate insulator

NASA Astrophysics Data System (ADS)

Hattori, Junichi; Fukuda, Koichi; Ikegami, Tsutomu; Ota, Hiroyuki; Migita, Shinji; Asai, Hidehiro; Toriumi, Akira

2018-04-01

We study the effects of fringing electric fields on the behavior of negative-capacitance (NC) field-effect transistors (FETs) with a silicon-on-insulator body and a gate stack consisting of an oxide film, an internal metal film, a ferroelectric film, and a gate electrode using our own device simulator that can properly handle the complicated relationship between the polarization and the electric field in ferroelectric materials. The behaviors of such NC FETs and the corresponding metal-oxide-semiconductor (MOS) FETs are simulated and compared with each other to evaluate the effects of the NC of the ferroelectric film. Then, the fringing field effects are evaluated by comparing the NC effects in NC FETs with and without gate spacers. The fringing field between the gate stack, especially the internal metal film, and the source/drain region induces more charges at the interface of the film with the ferroelectric film. Accordingly, the function of the NC to modulate the gate voltage and the resulting function to improve the subthreshold swing are enhanced. We also investigate the relationships of these fringing field effects to the drain voltage and four design parameters of NC FETs, i.e., gate length, gate spacer permittivity, internal metal film thickness, and oxide film thickness.

Comparison of work function variation between FinFET and 3D stacked nanowire FET devices for 6-T SRAM reliability

NASA Astrophysics Data System (ADS)

Ko, Kyul; Son, Dokyun; Kang, Myounggon; Shin, Hyungcheol

2018-02-01

In this work, work-function variation (WFV) on 5 nm node gate-all-around (GAA) silicon 3D stacked nanowire FET (NWFET) and FinFET devices are studied for 6-T SRAM cells through 3D technology computer-aided design (TCAD) simulation. The NWFET devices have strong immunity for the unprecedented short channel effects (SCEs) compared with the FinFET devices owing to increased gate controllability. However, due to the narrow gate area, the single NWFET is more vulnerable to WFV effects than FinFET devices. Our results show that the WFV effects on single NWFETs are larger than the FinFETs by 45-55%. In the case of standard SRAM bit cells (high density: 111 bit cell), the variation of read stability (read static noise margin) on single NWFETs are larger than the FinFETs by 65-75%. Therefore, to improve the performance and having immunity to WFV effects, it is important to analyze the degree of variability in 3D stacked device architectures without area penalty. Moreover, we investigated the WFV effects for an accurate guideline with regard to grain size (GS) and channel area of 3D stacked NWFET in 6-T SRAM bit cells.

Effect of Al-diffusion-induced positive flatband voltage shift on the electrical characteristics of Al-incorporated high-k metal-oxide-semiconductor field-effective transistor

NASA Astrophysics Data System (ADS)

Wang, Wenwu; Akiyama, Koji; Mizubayashi, Wataru; Nabatame, Toshihide; Ota, Hiroyuki; Toriumi, Akira

2009-03-01

We systematically studied what effect Al diffusion from high-k dielectrics had on the flatband voltage (Vfb) of Al-incorporated high-k gate stacks. An anomalous positive shift fin Vfb with the decreasing equivalent oxide thickness (EOT) of high-k gate stacks is reported. As the SiO2 interfacial layer is aggressively thinned in Al-incorporated HfxAl1-xOy gate stacks with a metal-gate electrode, the Vfb first lies on the well known linear Vfb-EOT plot and deviates toward the positive-voltage direction (Vfb roll-up), followed by shifting toward negative voltage (Vfb roll-off). We demonstrated that the Vfb roll-up behavior remarkably decreases the threshold voltage (Vth) of p-type metal-oxide-semiconductor field-effect transistors (p-MOSFETs), and does not cause severe degradation in the characteristics of hole mobility. The Vfb roll-up behavior, which is independent of gate materials but strongly dependent on high-k dielectrics, was ascribed to variations in fixed charges near the SiO2/Si interface, which are caused by Al diffusion from HfxAl1-xOy through SiO2 to the SiO2/Si interface. These results indicate that anomalous positive shift in Vfb, i.e., Vfb roll-up, should be taken into consideration in quantitatively adjusting Vfb in thin EOT regions and that it could be used to further tune Vth in p-MOSFETs.

Floquet high Chern insulators in periodically driven chirally stacked multilayer graphene

NASA Astrophysics Data System (ADS)

Li, Si; Liu, Cheng-Cheng; Yao, Yugui

2018-03-01

Chirally stacked N-layer graphene is a semimetal with ±p N band-touching at two nonequivalent corners in its Brillioun zone. We predict that an off-resonant circularly polarized light (CPL) drives chirally stacked N-layer graphene into a Floquet Chern insulators (FCIs), aka quantum anomalous Hall insulators, with tunable high Chern number C F = ±N and large gaps. A topological phase transition between such a FCI and a valley Hall (VH) insulator with high valley Chern number C v = ±N induced by a voltage gate can be engineered by the parameters of the CPL and voltage gate. We propose a topological domain wall between the FCI and VH phases, along which perfectly valley-polarized N-channel edge states propagate unidirectionally without backscattering.

Physical and electrical characterizations of AlGaN/GaN MOS gate stacks with AlGaN surface oxidation treatment

NASA Astrophysics Data System (ADS)

Yamada, Takahiro; Watanabe, Kenta; Nozaki, Mikito; Shih, Hong-An; Nakazawa, Satoshi; Anda, Yoshiharu; Ueda, Tetsuzo; Yoshigoe, Akitaka; Hosoi, Takuji; Shimura, Takayoshi; Watanabe, Heiji

2018-06-01

The impacts of inserting ultrathin oxides into insulator/AlGaN interfaces on their electrical properties were investigated to develop advanced AlGaN/GaN metal–oxide–semiconductor (MOS) gate stacks. For this purpose, the initial thermal oxidation of AlGaN surfaces in oxygen ambient was systematically studied by synchrotron radiation X-ray photoelectron spectroscopy (SR-XPS) and atomic force microscopy (AFM). Our physical characterizations revealed that, when compared with GaN surfaces, aluminum addition promotes the initial oxidation of AlGaN surfaces at temperatures of around 400 °C, followed by smaller grain growth above 850 °C. Electrical measurements of AlGaN/GaN MOS capacitors also showed that, although excessive oxidation treatment of AlGaN surfaces over around 700 °C has an adverse effect, interface passivation with the initial oxidation of the AlGaN surfaces at temperatures ranging from 400 to 500 °C was proven to be beneficial for fabricating high-quality AlGaN/GaN MOS gate stacks.

Direct Interaction between the Voltage Sensors Produces Cooperative Sustained Deactivation in Voltage-gated H+ Channel Dimers*

PubMed Central

Okuda, Hiroko; Yonezawa, Yasushige; Takano, Yu; Okamura, Yasushi; Fujiwara, Yuichiro

2016-01-01

The voltage-gated H+ channel (Hv) is a voltage sensor domain-like protein consisting of four transmembrane segments (S1–S4). The native Hv structure is a homodimer, with the two channel subunits functioning cooperatively. Here we show that the two voltage sensor S4 helices within the dimer directly cooperate via a π-stacking interaction between Trp residues at the middle of each segment. Scanning mutagenesis showed that Trp situated around the original position provides the slow gating kinetics characteristic of the dimer's cooperativity. Analyses of the Trp mutation on the dimeric and monomeric channel backgrounds and analyses with tandem channel constructs suggested that the two Trp residues within the dimer are functionally coupled during Hv deactivation but are less so during activation. Molecular dynamics simulation also showed direct π-stacking of the two Trp residues. These results provide new insight into the cooperative function of voltage-gated channels, where adjacent voltage sensor helices make direct physical contact and work as a single unit according to the gating process. PMID:26755722

Enhanced stability of thin film transistors with double-stacked amorphous IWO/IWO:N channel layer

NASA Astrophysics Data System (ADS)

Lin, Dong; Pi, Shubin; Yang, Jianwen; Tiwari, Nidhi; Ren, Jinhua; Zhang, Qun; Liu, Po-Tsun; Shieh, Han-Ping

2018-06-01

In this work, bottom-gate top-contact thin film transistors with double-stacked amorphous IWO/IWO:N channel layer were fabricated. Herein, amorphous IWO and N-doped IWO were deposited as front and back channel layers, respectively, by radio-frequency magnetron sputtering. The electrical characteristics of the bi-layer-channel thin film transistors (TFTs) were examined and compared with those of single-layer-channel (i.e., amorphous IWO or IWO:N) TFTs. It was demonstrated to exhibit a high mobility of 27.2 cm2 V‑1 s‑1 and an on/off current ratio of 107. Compared to the single peers, bi-layer a-IWO/IWO:N TFTs showed smaller hysteresis and higher stability under negative bias stress and negative bias temperature stress. The enhanced performance could be attributed to its unique double-stacked channel configuration, which successfully combined the merits of the TFTs with IWO and IWO:N channels. The underlying IWO thin film provided percolation paths for electron transport, meanwhile, the top IWO:N layer reduced the bulk trap densities. In addition, the IWO channel/gate insulator interface had reduced defects, and IWO:N back channel surface was insensitive to the ambient atmosphere. Overall, the proposed bi-layer a-IWO/IWO:N TFTs show potential for practical applications due to its possibly long-term serviceability.

Sub-60 mV/decade switching in 2D negative capacitance field-effect transistors with integrated ferroelectric polymer

NASA Astrophysics Data System (ADS)

McGuire, Felicia A.; Cheng, Zhihui; Price, Katherine; Franklin, Aaron D.

2016-08-01

There is a rising interest in employing the negative capacitance (NC) effect to achieve sub-60 mV/decade (below the thermal limit) switching in field-effect transistors (FETs). The NC effect, which is an effectual amplification of the applied gate potential, is realized by incorporating a ferroelectric material in series with a dielectric in the gate stack of a FET. One of the leading challenges to such NC-FETs is the variable substrate capacitance exhibited in 3D semiconductor channels (bulk, Fin, or nanowire) that minimizes the extent of sub-60 mV/decade switching. In this work, we demonstrate 2D NC-FETs that combine the NC effect with 2D MoS2 channels to extend the steep switching behavior. Using the ferroelectric polymer, poly(vinylidene difluoride-trifluoroethylene) (P(VDF-TrFE)), these 2D NC-FETs are fabricated by modification of top-gated 2D FETs through the integrated addition of P(VDF-TrFE) into the gate stack. The impact of including an interfacial metal between the ferroelectric and dielectric is studied and shown to be critical. These 2D NC-FETs exhibit a decrease in subthreshold swing from 113 mV/decade down to 11.7 mV/decade at room temperature with sub-60 mV/decade switching occurring over more than 4 decades of current. The P(VDF-TrFE) proves to be an unstable option for a device technology, yet the superb switching behavior observed herein opens the way for further exploration of nanomaterials for extremely low-voltage NC-FETs.

Transparently wrap-gated semiconductor nanowire arrays for studies of gate-controlled photoluminescence

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nylund, Gustav; Storm, Kristian; Torstensson, Henrik

2013-12-04

We present a technique to measure gate-controlled photoluminescence (PL) on arrays of semiconductor nanowire (NW) capacitors using a transparent film of Indium-Tin-Oxide (ITO) wrapping around the nanowires as the gate electrode. By tuning the wrap-gate voltage, it is possible to increase the PL peak intensity of an array of undoped InP NWs by more than an order of magnitude. The fine structure of the PL spectrum reveals three subpeaks whose relative peak intensities change with gate voltage. We interpret this as gate-controlled state-filling of luminescing quantum dot segments formed by zincblende stacking faults in the mainly wurtzite NW crystal structure.

Body Doping Profile of Select Device to Minimize Program Disturbance in Three-Dimensional Stack NAND Flash Memory

NASA Astrophysics Data System (ADS)

Choe, Byeong-In; Park, Byung-Gook; Lee, Jong-Ho

2013-06-01

The program disturbance characteristic in the three-dimensional (3D) stack NAND flash was analyzed for the first time in terms of string select line (SSL) threshold voltage (Vth) and p-type body doping profile. From the edge word line (W/L) program disturbance, we can observe the boosted channel potential loss as a function of SSL Vth and body doping profile for SSL device. According to simulation work, a high Vth of the SSL device is required to suppress channel leakage during programming. When the body doping of the SSL device is high in the channel, there is a large band bending near the gate edge of the SSL adjacent to the edge W/L cell of boosted cell strings, which generates significantly electron-hole pairs. The generated electrons decreases the boosted channel potential, resulting in increase of program disturbance of the inhibit strings. Through optimization of the body doping profile of the SSL device, both channel leakage and the program disturbance are successfully suppressed for a highly reliable 3D stack NAND flash memory cell operation.

Parsing recursive sentences with a connectionist model including a neural stack and synaptic gating.

PubMed

Fedor, Anna; Ittzés, Péter; Szathmáry, Eörs

2011-02-21

It is supposed that humans are genetically predisposed to be able to recognize sequences of context-free grammars with centre-embedded recursion while other primates are restricted to the recognition of finite state grammars with tail-recursion. Our aim was to construct a minimalist neural network that is able to parse artificial sentences of both grammars in an efficient way without using the biologically unrealistic backpropagation algorithm. The core of this network is a neural stack-like memory where the push and pop operations are regulated by synaptic gating on the connections between the layers of the stack. The network correctly categorizes novel sentences of both grammars after training. We suggest that the introduction of the neural stack memory will turn out to be substantial for any biological 'hierarchical processor' and the minimalist design of the model suggests a quest for similar, realistic neural architectures. Copyright © 2010 Elsevier Ltd. All rights reserved.

Control of interfacial properties of Pr-oxide/Ge gate stack structure by introduction of nitrogen

NASA Astrophysics Data System (ADS)

Kato, Kimihiko; Kondo, Hiroki; Sakashita, Mitsuo; Nakatsuka, Osamu; Zaima, Shigeaki

2011-06-01

We have demonstrated the control of interfacial properties of Pr-oxide/Ge gate stack structure by the introduction of nitrogen. From C- V characteristics of Al/Pr-oxide/Ge 3N 4/Ge MOS capacitors, the interface state density decreases without the change of the accumulation capacitance after annealing. The TEM and TED measurements reveal that the crystallization of Pr-oxide is enhanced with annealing and the columnar structure of cubic-Pr 2O 3 is formed after annealing. From the depth profiles measured using XPS with Ar sputtering for the Pr-oxide/Ge 3N 4/Ge stack structure, the increase in the Ge component is not observed in a Pr-oxide film and near the interface between a Pr-oxide film and a Ge substrate. In addition, the N component segregates near the interface region, amorphous Pr-oxynitride (PrON) is formed at the interface. As a result, Pr-oxide/PrON/Ge stacked structure without the Ge-oxynitride interlayer is formed.

Impact of Lateral Straggle on the Analog/RF Performance of Asymmetric Gate Stack Double Gate MOSFET

NASA Astrophysics Data System (ADS)

Sivaram, Gollamudi Sai; Chakraborty, Shramana; Das, Rahul; Dasgupta, Arpan; Kundu, Atanu; Sarkar, Chandan K.

2016-09-01

This paper presents a systematic comparative study of Analog and RF performances of an underlapped double gate (U-DG) NMOSFET with Gate Stack (GS) for varying straggle lengths. Asymmetric underlap devices (A-U-DG) have been proposed as one of the remedies for reducing Short Channel Effects (SCE's) with the underlap being present towards the source for sub 20 nm devices. However, the Source to Drain (S/D) implant lateral diffusion leads to a variation in the effective underlap length. This paper investigates the impact of variation of straggle length on the Analog and RF parameters of the device. The RF performance is analyzed by considering the intrinsic capacitances (Cgd, Cgs), intrinsic resistances (Rgd, Rgs), transport delay (τm), inductance (Lsd), cutoff frequency (fT), and the maximum frequency of oscillations (fmax). The circuit performance of the devices are also studied. It is seen that the Analog and RF performances of the devices are improved by optimizing the S/D lateral straggle.

Gate-tunable diode-like current rectification and ambipolar transport in multilayer van der Waals ReSe2/WS2 p-n heterojunctions.

PubMed

Wang, Cong; Yang, Shengxue; Xiong, Wenqi; Xia, Congxin; Cai, Hui; Chen, Bin; Wang, Xiaoting; Zhang, Xinzheng; Wei, Zhongming; Tongay, Sefaattin; Li, Jingbo; Liu, Qian

2016-10-12

Vertically stacked van der Waals (vdW) heterojunctions of two-dimensional (2D) transition metal dichalcogenides (TMDs) have attracted a great deal of attention due to their fascinating properties. In this work, we report two important gate-tunable phenomena in new artificial vdW p-n heterojunctions created by vertically stacking p-type multilayer ReSe 2 and n-type multilayer WS 2 : (1) well-defined strong gate-tunable diode-like current rectification across the p-n interface is observed, and the tunability of the electronic processes is attributed to the tunneling-assisted interlayer recombination induced by majority carriers across the vdW interface; (2) the distinct ambipolar behavior under gate voltage modulation both at forward and reverse bias voltages is found in the vdW ReSe 2 /WS 2 heterojunction transistors and a corresponding transport model is proposed for the tunable polarity behaviors. The findings may provide some new opportunities for building nanoscale electronic and optoelectronic devices.

Titanium-tungsten nanocrystals embedded in a SiO(2)/Al(2)O(3) gate dielectric stack for low-voltage operation in non-volatile memory.

PubMed

Yang, Shiqian; Wang, Qin; Zhang, Manhong; Long, Shibing; Liu, Jing; Liu, Ming

2010-06-18

Titanium-tungsten nanocrystals (NCs) were fabricated by a self-assembly rapid thermal annealing (RTA) process. Well isolated Ti(0.46)W(0.54) NCs were embedded in the gate dielectric stack of SiO(2)/Al(2)O(3). A metal-oxide-semiconductor (MOS) capacitor was fabricated to investigate its application in a non-volatile memory (NVM) device. It demonstrated a large memory window of 6.2 V in terms of flat-band voltage (V(FB)) shift under a dual-directional sweeping gate voltage of - 10 to 10 V. A 1.1 V V(FB) shift under a low dual-directional sweeping gate voltage of - 4 to 4 V was also observed. The retention characteristic of this MOS capacitor was demonstrated by a 0.5 V memory window after 10(4) s of elapsed time at room temperature. The endurance characteristic was demonstrated by a program/erase cycling test.

Stacking stability of MoS2 bilayer: An ab initio study

NASA Astrophysics Data System (ADS)

Tao, Peng; Guo, Huai-Hong; Yang, Teng; Zhang, Zhi-Dong

2014-10-01

The study of the stacking stability of bilayer MoS2 is essential since a bilayer has exhibited advantages over single layer MoS2 in many aspects for nanoelectronic applications. We explored the relative stability, optimal sliding path between different stacking orders of bilayer MoS2, and (especially) the effect of inter-layer stress, by combining first-principles density functional total energy calculations and the climbing-image nudge-elastic-band (CI-NEB) method. Among five typical stacking orders, which can be categorized into two kinds (I: AA, AB and II: AA', AB', A'B), we found that stacking orders with Mo and S superposing from both layers, such as AA' and AB, is more stable than the others. With smaller computational efforts than potential energy profile searching, we can study the effect of inter-layer stress on the stacking stability. Under isobaric condition, the sliding barrier increases by a few eV/(ucGPa) from AA' to AB', compared to 0.1 eV/(ucGPa) from AB to [AB]. Moreover, we found that interlayer compressive stress can help enhance the transport properties of AA'. This study can help understand why inter-layer stress by dielectric gating materials can be an effective means to improving MoS2 on nanoelectronic applications.

Topological Quantum Phase Transitions in Two-Dimensional Hexagonal Lattice Bilayers

NASA Astrophysics Data System (ADS)

Zhai, Xuechao; Jin, Guojun

2013-09-01

Since the successful fabrication of graphene, two-dimensional hexagonal lattice structures have become a research hotspot in condensed matter physics. In this short review, we theoretically focus on discussing the possible realization of a topological insulator (TI) phase in systems of graphene bilayer (GBL) and boron nitride bilayer (BNBL), whose band structures can be experimentally modulated by an interlayer bias voltage. Under the bias, a band gap can be opened in AB-stacked GBL but is still closed in AA-stacked GBL and significantly reduced in AA- or AB-stacked BNBL. In the presence of spin-orbit couplings (SOCs), further demonstrations indicate whether the topological quantum phase transition can be realized strongly depends on the stacking orders and symmetries of structures. It is observed that a bulk band gap can be first closed and then reopened when the Rashba SOC increases for gated AB-stacked GBL or when the intrinsic SOC increases for gated AA-stacked BNBL. This gives a distinct signal for a topological quantum phase transition, which is further characterized by a jump of the ℤ2 topological invariant. At fixed SOCs, the TI phase can be well switched by the interlayer bias and the phase boundaries are precisely determined. For AA-stacked GBL and AB-stacked BNBL, no strong TI phase exists, regardless of the strength of the intrinsic or Rashba SOCs. At last, a brief overview is given on other two-dimensional hexagonal materials including silicene and molybdenum disulfide bilayers.

Investigation of Gate-Stacked In-Ga-Zn-O TFTs with Ga-Zn-O Source/Drain Electrodes by Atmospheric Pressure Plasma-Enhanced Chemical Vapor Deposition.

PubMed

Wu, Chien-Hung; Chang, Kow-Ming; Chen, Yi-Ming; Huang, Bo-Wen; Zhang, Yu-Xin; Wang, Shui-Jinn; Hsu, Jui-Mei

2018-03-01

Atmospheric pressure plasma-enhanced chemical vapor deposition (AP-PECVD) was employed for the fabrication of indium gallium zinc oxide thin-film transistors (IGZO TFTs) with high transparent gallium zinc oxide (GZO) source/drain electrodes. The influence of post-deposition annealing (PDA) temperature on GZO source/drain and device performance was studied. Device with a 300 °C annealing demonstrated excellent electrical characteristics with on/off current ratio of 2.13 × 108, saturation mobility of 10 cm2/V-s, and low subthreshold swing of 0.2 V/dec. The gate stacked LaAlO3/ZrO2 of AP-IGZO TFTs with highly transparent and conductive AP-GZO source/drain electrode show excellent gate control ability at a low operating voltage.

Insights into thermal diffusion of germanium and oxygen atoms in HfO{sub 2}/GeO{sub 2}/Ge gate stacks and their suppressed reaction with atomically thin AlO{sub x} interlayers

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ogawa, Shingo, E-mail: Shingo-Ogawa@trc.toray.co.jp; Graduate School of Engineering, Osaka University, 2-1 Yamadaoka, Suita, Osaka 565-0871; Asahara, Ryohei

2015-12-21

The thermal diffusion of germanium and oxygen atoms in HfO{sub 2}/GeO{sub 2}/Ge gate stacks was comprehensively evaluated by x-ray photoelectron spectroscopy and secondary ion mass spectrometry combined with an isotopic labeling technique. It was found that {sup 18}O-tracers composing the GeO{sub 2} underlayers diffuse within the HfO{sub 2} overlayers based on Fick's law with the low activation energy of about 0.5 eV. Although out-diffusion of the germanium atoms through HfO{sub 2} also proceeded at the low temperatures of around 200 °C, the diffusing germanium atoms preferentially segregated on the HfO{sub 2} surfaces, and the reaction was further enhanced at high temperatures withmore » the assistance of GeO desorption. A technique to insert atomically thin AlO{sub x} interlayers between the HfO{sub 2} and GeO{sub 2} layers was proven to effectively suppress both of these independent germanium and oxygen intermixing reactions in the gate stacks.« less

van der Waals Heterostructures with High Accuracy Rotational Alignment.

PubMed

Kim, Kyounghwan; Yankowitz, Matthew; Fallahazad, Babak; Kang, Sangwoo; Movva, Hema C P; Huang, Shengqiang; Larentis, Stefano; Corbet, Chris M; Taniguchi, Takashi; Watanabe, Kenji; Banerjee, Sanjay K; LeRoy, Brian J; Tutuc, Emanuel

2016-03-09

We describe the realization of van der Waals (vdW) heterostructures with accurate rotational alignment of individual layer crystal axes. We illustrate the approach by demonstrating a Bernal-stacked bilayer graphene formed using successive transfers of monolayer graphene flakes. The Raman spectra of this artificial bilayer graphene possess a wide 2D band, which is best fit by four Lorentzians, consistent with Bernal stacking. Scanning tunneling microscopy reveals no moiré pattern on the artificial bilayer graphene, and tunneling spectroscopy as a function of gate voltage reveals a constant density of states, also in agreement with Bernal stacking. In addition, electron transport probed in dual-gated samples reveals a band gap opening as a function of transverse electric field. To illustrate the applicability of this technique to realize vdW heterostructuctures in which the functionality is critically dependent on rotational alignment, we demonstrate resonant tunneling double bilayer graphene heterostructures separated by hexagonal boron-nitride dielectric.

Resonant tunneling through discrete quantum states in stacked atomic-layered MoS2.

PubMed

Nguyen, Linh-Nam; Lan, Yann-Wen; Chen, Jyun-Hong; Chang, Tay-Rong; Zhong, Yuan-Liang; Jeng, Horng-Tay; Li, Lain-Jong; Chen, Chii-Dong

2014-05-14

Two-dimensional crystals can be assembled into three-dimensional stacks with atomic layer precision, which have already shown plenty of fascinating physical phenomena and been used for prototype vertical-field-effect-transistors.1,2 In this work, interlayer electron tunneling in stacked high-quality crystalline MoS2 films were investigated. A trilayered MoS2 film was sandwiched between top and bottom electrodes with an adjacent bottom gate, and the discrete energy levels in each layer could be tuned by bias and gate voltages. When the discrete energy levels aligned, a resonant tunneling peak appeared in the current-voltage characteristics. The peak position shifts linearly with perpendicular magnetic field, indicating formation of Landau levels. From this linear dependence, the effective mass and Fermi velocity are determined and are confirmed by electronic structure calculations. These fundamental parameters are useful for exploitation of its unique properties.

AlN and Al oxy-nitride gate dielectrics for reliable gate stacks on Ge and InGaAs channels

DOE Office of Scientific and Technical Information (OSTI.GOV)

Guo, Y.; Li, H.; Robertson, J.

2016-05-28

AlN and Al oxy-nitride dielectric layers are proposed instead of Al{sub 2}O{sub 3} as a component of the gate dielectric stacks on higher mobility channels in metal oxide field effect transistors to improve their positive bias stress instability reliability. It is calculated that the gap states of nitrogen vacancies in AlN lie further away in energy from the semiconductor band gap than those of oxygen vacancies in Al{sub 2}O{sub 3}, and thus AlN might be less susceptible to charge trapping and have a better reliability performance. The unfavourable defect energy level distribution in amorphous Al{sub 2}O{sub 3} is attributed tomore » its larger coordination disorder compared to the more symmetrically bonded AlN. Al oxy-nitride is also predicted to have less tendency for charge trapping.« less

First-principles studies of electric field effects on the electronic structure of trilayer graphene

NASA Astrophysics Data System (ADS)

Wang, Yun-Peng; Li, Xiang-Guo; Fry, James N.; Cheng, Hai-Ping

2016-10-01

A gate electric field is a powerful way to manipulate the physical properties of nanojunctions made of two-dimensional crystals. To simulate field effects on the electronic structure of trilayer graphene, we used density functional theory in combination with the effective screening medium method, which enables us to understand the field-dependent layer-layer interactions and the fundamental physics underlying band gap variations and the resulting band modifications. Two different graphene stacking orders, Bernal (or ABC) and rhombohedral (or ABA), were considered. In addition to confirming the experimentally observed band gap opening in ABC-stacked and the band overlap in ABA-stacked trilayer systems, our results reveal rich physics in these fascinating systems, where layer-layer couplings are present but some characteristics features of single-layer graphene are partially preserved. For ABC stacking, the electric-field-induced band gap size can be tuned by charge doping, while for ABA band the tunable quantity is the band overlap. Our calculations show that the electronic structures of the two stacking orders respond very differently to charge doping. We find that in the ABA stacking hole doping can reopen a band gap in the band-overlapping region, a phenomenon distinctly different from electron doping. The physical origins of the observed behaviors were fully analyzed, and we conclude that the dual-gate configuration greatly enhances the tunability of the trilayer systems.

Threshold voltage control in TmSiO/HfO2 high-k/metal gate MOSFETs

NASA Astrophysics Data System (ADS)

Dentoni Litta, E.; Hellström, P.-E.; Östling, M.

2015-06-01

High-k interfacial layers have been proposed as a way to extend the scalability of Hf-based high-k/metal gate CMOS technology, which is currently limited by strong degradations in threshold voltage control, channel mobility and device reliability when the chemical oxide (SiOx) interfacial layer is scaled below 0.4 nm. We have previously demonstrated that thulium silicate (TmSiO) is a promising candidate as a high-k interfacial layer, providing competitive advantages in terms of EOT scalability and channel mobility. In this work, the effect of the TmSiO interfacial layer on threshold voltage control is evaluated, showing that the TmSiO/HfO2 dielectric stack is compatible with threshold voltage control techniques commonly used with SiOx/HfO2 stacks. Specifically, we show that the flatband voltage can be set in the range -1 V to +0.5 V by the choice of gate metal and that the effective workfunction of the stack is properly controlled by the metal workfunction in a gate-last process flow. Compatibility with a gate-first approach is also demonstrated, showing that integration of La2O3 and Al2O3 capping layers can induce a flatband voltage shift of at least 150 mV. Finally, the effect of the annealing conditions on flatband voltage is investigated, finding that the duration of the final forming gas anneal can be used as a further process knob to tune the threshold voltage. The evaluation performed on MOS capacitors is confirmed by the fabrication of TmSiO/HfO2/TiN MOSFETs achieving near-symmetric threshold voltages at sub-nm EOT.

Atomic layer deposition of insulating nitride interfacial layers for germanium metal oxide semiconductor field effect transistors with high-κ oxide/tungsten nitride gate stacks

NASA Astrophysics Data System (ADS)

Kim, Kyoung H.; Gordon, Roy G.; Ritenour, Andrew; Antoniadis, Dimitri A.

2007-05-01

Atomic layer deposition (ALD) was used to deposit passivating interfacial nitride layers between Ge and high-κ oxides. High-κ oxides on Ge surfaces passivated by ultrathin (1-2nm) ALD Hf3N4 or AlN layers exhibited well-behaved C-V characteristics with an equivalent oxide thickness as low as 0.8nm, no significant flatband voltage shifts, and midgap density of interface states values of 2×1012cm-1eV-1. Functional n-channel and p-channel Ge field effect transistors with nitride interlayer/high-κ oxide/metal gate stacks are demonstrated.

Reconfigurable and non-volatile vertical magnetic logic gates

DOE Office of Scientific and Technical Information (OSTI.GOV)

Butler, J., E-mail: jbutl001@ucr.edu; Lee, B.; Shachar, M.

2014-04-28

In this paper, we discuss the concept and prototype fabrication of reconfigurable and non-volatile vertical magnetic logic gates. These gates consist of two input layers and a RESET layer. The RESET layer allows the structure to be used as either an AND or an OR gate, depending on its magnetization state. To prove this concept, the gates were fabricated using a multi-layered patterned magnetic media, in which three magnetic layers are stacked and exchange-decoupled via non-magnetic interlayers. We demonstrate the functionality of these logic gates by conducting atomic force microscopy and magnetic force microscopy (MFM) analysis of the multi-layered patternedmore » magnetic media. The logic gates operation mechanism and fabrication feasibility are both validated by the MFM imaging results.« less

Voltage tunable plasmon propagation in dual gated bilayer graphene

NASA Astrophysics Data System (ADS)

Farzaneh, Seyed M.; Rakheja, Shaloo

2017-10-01

In this paper, we theoretically investigate plasmon propagation characteristics in AB and AA stacked bilayer graphene (BLG) in the presence of energy asymmetry due to an electrostatic field oriented perpendicularly to the plane of the graphene sheet. We first derive the optical conductivity of BLG using the Kubo formalism incorporating energy asymmetry and finite electron scattering. All results are obtained for room temperature (300 K) operation. By solving Maxwell's equations in a dual gate device setup, we obtain the wavevector of propagating plasmon modes in the transverse electric (TE) and transverse magnetic (TM) directions at terahertz frequencies. The plasmon wavevector allows us to compare the compression factor, propagation length, and the mode confinement of TE and TM plasmon modes in bilayer and monolayer graphene sheets and also to study the impact of material parameters on plasmon characteristics. Our results show that the energy asymmetry can be harnessed to increase the propagation length of TM plasmons in BLG. AA stacked BLG shows a larger increase in the propagation length than AB stacked BLG; conversely, it is very insensitive to the Fermi level variations. Additionally, the dual gate structure allows independent modulation of the energy asymmetry and the Fermi level in BLG, which is advantageous for reconfiguring plasmon characteristics post device fabrication.

Improvement of Ion/Ioff for h-BN encapsulated bilayer graphene by graphite local back gate electrode

NASA Astrophysics Data System (ADS)

Uwanno, Teerayut; Taniguchi, Takashi; Watanabe, Kenji; Nagashio, Kosuke

The critical issue for bilayer graphene (BLG) devices is low Ion/Ioff even at the band gap of 0.3eV. Band gap in BLG can be formed by creating potential difference between the two layers of BLG. This can be done by applying external electric field perpendicularly to BLG to induce different carrier densities in the two layers. Due to such origin, the spatial uniformity of band gap in the channel is quite sensitive to charge inhomogeneity in BLG. In order to apply electric field of 3V/nm to open the maximum band gap of 0.3eV, high- k gate stack has been utilized so far. However, oxide dielectrics usually have large charge inhomogeneity causing in-plane potential fluctuation in BLG channel. Due to surface flatness and small charge inhomogeneity, h-BN has been used as dielectrics to achieve high quality graphene devices, however, Ion/Iofffor BLG/ h-BN heterostuctures has not been reported yet. In this study, we used graphite as local back gate electrode to BLG encapsulated with h-BN. This resulted in much higher Ion/Ioff, indicating the importance of screening of charge inhomogeneity from SiO2 substrate surface by local graphite back gate electrode. This research was partly supported by JSPS Core-to-Core Program, A. Advanced Research Networks.

Final Technical Report

DOE Office of Scientific and Technical Information (OSTI.GOV)

Stoessel, Chris

2013-11-13

This project developed a new high-performance R-10/high SHGC window design, reviewed market positioning and evaluated manufacturing solutions required for broad market adoption. The project objectives were accomplished by: identifying viable technical solutions based on modeling of modern and potential coating stacks and IGU designs; development of new coating material sets for HM thin film stacks, as well as improved HM IGU designs to accept multiple layers of HM films; matching promising new coating designs with new HM IGU designs to demonstrate performance gains; and, in cooperation with a window manufacturer, assess the potential for high-volume manufacturing and cost efficiency ofmore » a HM-based R-10 window with improved solar heat gain characteristics. A broad view of available materials and design options was applied to achieve the desired improvements. Gated engineering methodologies were employed to guide the development process from concept generation to a window demonstration. The project determined that a slightly de-rated window performance allows formulation of a path to achieve the desired cost reductions to support end consumer adoption.« less

Interface band alignment in high-k gate stacks

NASA Astrophysics Data System (ADS)

Eric, Bersch; Hartlieb, P.

2005-03-01

In order to successfully implement alternate high-K dielectric materials into MOS structures, the interface properties of MOS gate stacks must be better understood. Dipoles that may form at the metal/dielectric and dielectric/semiconductor interfaces make the band offsets difficult to predict. We have measured the conduction and valence band densities of states for a variety MOS stacks using in situ using inverse photoemission (IPE) and photoemission spectroscopy (PES), respectively. Results obtained from clean and metallized (with Ru or Al) HfO2/Si, SiO2/Si and mixed silicate films will be presented. IPE indicates a shift of the conduction band minimum (CBM) to higher energy (i.e. away from EF) with increasing SiO2. The effect of metallization on the location of band edges depends upon the metal species. The addition of N to the dielectrics shifts the CBM in a way that is thickness dependent. Possible mechanisms for these observed effects will be discussed.

Development of highly reliable static random access memory for 40-nm embedded split gate-MONOS flash memory

NASA Astrophysics Data System (ADS)

Okamoto, Shin-ichi; Maekawa, Kei-ichi; Kawashima, Yoshiyuki; Shiba, Kazutoshi; Sugiyama, Hideki; Inoue, Masao; Nishida, Akio

2015-04-01

High quality static random access memory (SRAM) for 40-nm embedded MONOS flash memory with split gate (SG-MONOS) was developed. Marginal failure, which results in threshold voltage/drain current tailing and outliers of SRAM transistors, occurs when using a conventional SRAM structure. These phenomena can be explained by not only gate depletion but also partial depletion and percolation path formation in the MOS channel. A stacked poly-Si gate structure can suppress these phenomena and achieve high quality SRAM without any defects in the 6σ level and with high affinity to the 40-nm SG-MONOS process was developed.

Reconfigurable ultra-thin film GDNMOS device for ESD protection in 28 nm FD-SOI technology

NASA Astrophysics Data System (ADS)

Athanasiou, Sotirios; Legrand, Charles-Alexandre; Cristoloveanu, Sorin; Galy, Philippe

2017-02-01

We propose a novel ESD protection device (GDNMOS: Gated Diode merged NMOS) fabricated with 28 nm UTBB FD-SOI high-k metal gate technology. By modifying the combination of the diode and transistor gate stacks, the robustness of the device is optimized, achieving a maximum breakdown voltage (VBR) of 4.9 V. In addition, modifications of the gate length modulate the trigger voltage (Vt1) with a minimum value of 3.5 V. Variable electrostatic doping (gate-induced) in diode and transistor body enables reconfigurable operation. A lower doping of the base enhances the bipolar gain, leading to thyristor behavior. This innovative architecture demonstrates excellent capability for high-voltage protection while maintaining a latch-up free behavior.

Leakage current conduction in metal gate junctionless nanowire transistors

NASA Astrophysics Data System (ADS)

Oproglidis, T. A.; Karatsori, T. A.; Barraud, S.; Ghibaudo, G.; Dimitriadis, C. A.

2017-05-01

In this paper, the experimental off-state drain leakage current behavior is systematically explored in n- and p-channel junctionless nanowire transistors with HfSiON/TiN/p+-polysilicon gate stack. The analysis of the drain leakage current is based on experimental data of the gate leakage current. It has been shown that the off-state drain leakage current in n-channel devices is negligible, whereas in p-channel devices it is significant and dramatically increases with drain voltage. The overall results indicate that the off-state drain leakage current in p-channel devices is mainly due to trap-assisted Fowler-Nordheim tunneling of electrons through the gate oxide of electrons from the metal gate to the silicon layer near the drain region.

Single-electron-occupation metal-oxide-semiconductor quantum dots formed from efficient poly-silicon gate layout

DOE Office of Scientific and Technical Information (OSTI.GOV)

Carroll, Malcolm S.; rochette, sophie; Rudolph, Martin

We introduce a silicon metal-oxide-semiconductor quantum dot structure that achieves dot-reservoir tunnel coupling control without a dedicated barrier gate. The elementary structure consists of two accumulation gates separated spatially by a gap, one gate accumulating a reservoir and the other a quantum dot. Control of the tunnel rate between the dot and the reservoir across the gap is demonstrated in the single electron regime by varying the reservoir accumulation gate voltage while compensating with the dot accumulation gate voltage. The method is then applied to a quantum dot connected in series to source and drain reservoirs, enabling transport down tomore » the single electron regime. Finally, tuning of the valley splitting with the dot accumulation gate voltage is observed. This split accumulation gate structure creates silicon quantum dots of similar characteristics to other realizations but with less electrodes, in a single gate stack subtractive fabrication process that is fully compatible with silicon foundry manufacturing.« less

USPIO-enhanced 3D-cine self-gated cardiac MRI based on a stack-of-stars golden angle short echo time sequence: Application on mice with acute myocardial infarction.

PubMed

Trotier, Aurélien J; Castets, Charles R; Lefrançois, William; Ribot, Emeline J; Franconi, Jean-Michel; Thiaudière, Eric; Miraux, Sylvain

2016-08-01

To develop and assess a 3D-cine self-gated method for cardiac imaging of murine models. A 3D stack-of-stars (SOS) short echo time (STE) sequence with a navigator echo was performed at 7T on healthy mice (n = 4) and mice with acute myocardial infarction (MI) (n = 4) injected with ultrasmall superparamagnetic iron oxide (USPIO) nanoparticles. In all, 402 spokes were acquired per stack with the incremental or the golden angle method using an angle increment of (360/402)° or 222.48°, respectively. A cylindrical k-space was filled and repeated with a maximum number of repetitions (NR) of 10. 3D cine cardiac images at 156 μm resolution were reconstructed retrospectively and compared for the two methods in terms of contrast-to-noise ratio (CNR). The golden angle images were also reconstructed with NR = 10, 6, and 3, to assess cardiac functional parameters (ejection fraction, EF) on both animal models. The combination of 3D SOS-STE and USPIO injection allowed us to optimize the identification of cardiac peaks on navigator signal and generate high CNR between blood and myocardium (15.3 ± 1.0). The golden angle method resulted in a more homogeneous distribution of the spokes inside a stack (P < 0.05), enabling reducing the acquisition time to 15 minutes. EF was significantly different between healthy and MI mice (P < 0.05). The method proposed here showed that 3D-cine images could be obtained without electrocardiogram or respiratory gating in mice. It allows precise measurement of cardiac functional parameters even on MI mice. J. Magn. Reson. Imaging 2016;44:355-365. © 2016 Wiley Periodicals, Inc.

Four-dimensional layer-stacking carbon-ion beam dose distribution by use of a lung numeric phantom.

PubMed

Mori, Shinichiro; Kumagai, Motoki; Miki, Kentaro

2015-07-01

To extend layer-stacking irradiation to accommodate intrafractional organ motion, we evaluated the carbon-ion layer-stacking dose distribution using a numeric lung phantom. We designed several types of range compensators. The planning target volume was calculated from the respective respiratory phases for consideration of intrafractional beam range variation. The accumulated dose distribution was calculated by registering of the dose distributions at respective phases to that at the reference phase. We evaluated the dose distribution based on the following six parameters: motion displacement, direction, gating window, respiratory cycle, range-shifter change time, and prescribed dose. All parameters affected the dose conformation to the moving target. By shortening of the gating window, dose metrics for superior-inferior (SI) and anterior-posterior (AP) motions were decreased from a D95 of 94 %, Dmax of 108 %, and homogeneity index (HI) of 23 % at T00-T90, to a D95 of 93 %, Dmax of 102 %, and HI of 20 % at T40-T60. In contrast, all dose metrics except the HI were independent of respiratory cycle. All dose metrics in SI motion were almost the same in respective motion displacement, with a D95 of 94 %, Dmax of 108 %, Dmin of 89 %, and HI of 23 % for the ungated phase, and D95 of 93 %, Dmax of 102 %, Dmin of 85 %, and HI of 20 % for the gated phase. The dose conformation to a moving target was improved by the gating strategy and by an increase in the prescribed dose. A combination of these approaches is a practical means of adding them to existing treatment protocols without modifications.

Continuous adjustment of threshold voltage in carbon nanotube field-effect transistors through gate engineering

NASA Astrophysics Data System (ADS)

Zhong, Donglai; Zhao, Chenyi; Liu, Lijun; Zhang, Zhiyong; Peng, Lian-Mao

2018-04-01

In this letter, we report a gate engineering method to adjust threshold voltage of carbon nanotube (CNT) based field-effect transistors (FETs) continuously in a wide range, which makes the application of CNT FETs especially in digital integrated circuits (ICs) easier. Top-gated FETs are fabricated using solution-processed CNT network films with stacking Pd and Sc films as gate electrodes. By decreasing the thickness of the lower layer metal (Pd) from 20 nm to zero, the effective work function of the gate decreases, thus tuning the threshold voltage (Vt) of CNT FETs from -1.0 V to 0.2 V. The continuous adjustment of threshold voltage through gate engineering lays a solid foundation for multi-threshold technology in CNT based ICs, which then can simultaneously provide high performance and low power circuit modules on one chip.

TiN/Al2O3/ZnO gate stack engineering for top-gate thin film transistors by combination of post oxidation and annealing

NASA Astrophysics Data System (ADS)

Kato, Kimihiko; Matsui, Hiroaki; Tabata, Hitoshi; Takenaka, Mitsuru; Takagi, Shinichi

2018-04-01

Control of fabrication processes for a gate stack structure with a ZnO thin channel layer and an Al2O3 gate insulator has been examined for enhancing the performance of a top-gate ZnO thin film transistor (TFT). The Al2O3/ZnO interface and the ZnO layer are defective just after the Al2O3 layer formation by atomic layer deposition. Post treatments such as plasma oxidation, annealing after the Al2O3 deposition, and gate metal formation (PMA) are promising to improve the interfacial and channel layer qualities drastically. Post-plasma oxidation effectively reduces the interfacial defect density and eliminates Fermi level pinning at the Al2O3/ZnO interface, which is essential for improving the cut-off of the drain current of TFTs. A thermal effect of post-Al2O3 deposition annealing at 350 °C can improve the crystalline quality of the ZnO layer, enhancing the mobility. On the other hand, impacts of post-Al2O3 deposition annealing and PMA need to be optimized because the annealing can also accompany the increase in the shallow-level defect density and the resulting electron concentration, in addition to the reduction in the deep-level defect density. The development of the interfacial control technique has realized the excellent TFT performance with a large ON/OFF ratio, steep subthreshold characteristics, and high field-effect mobility.

Tunneling-injection in vertical quasi-2D heterojunctions enabled efficient and adjustable optoelectronic conversion

PubMed Central

Tan, Wei-Chun; Chiang, Chia-Wei; Hofmann, Mario; Chen, Yang-Fang

2016-01-01

The advent of 2D materials integration has enabled novel heterojunctions where carrier transport proceeds thrsough different ultrathin layers. We here demonstrate the potential of such heterojunctions on a graphene/dielectric/semiconductor vertical stack that combines several enabling features for optoelectronic devices. Efficient and stable light emission was achieved through carrier tunneling from the graphene injector into prominent states of a luminescent material. Graphene’s unique properties enable fine control of the band alignment in the heterojunction. This advantage was used to produce vertical tunneling-injection light-emitting transistors (VtiLET) where gating allows adjustment of the light emission intensity independent of applied bias. This device was shown to simultaneously act as a light detecting transistor with a linear and gate tunable sensitivity. The presented development of an electronically controllable multifunctional light emitter, light detector and transistor open up a new route for future optoelectronics. PMID:27507171

Tunneling-injection in vertical quasi-2D heterojunctions enabled efficient and adjustable optoelectronic conversion

NASA Astrophysics Data System (ADS)

Tan, Wei-Chun; Chiang, Chia-Wei; Hofmann, Mario; Chen, Yang-Fang

2016-08-01

The advent of 2D materials integration has enabled novel heterojunctions where carrier transport proceeds thrsough different ultrathin layers. We here demonstrate the potential of such heterojunctions on a graphene/dielectric/semiconductor vertical stack that combines several enabling features for optoelectronic devices. Efficient and stable light emission was achieved through carrier tunneling from the graphene injector into prominent states of a luminescent material. Graphene’s unique properties enable fine control of the band alignment in the heterojunction. This advantage was used to produce vertical tunneling-injection light-emitting transistors (VtiLET) where gating allows adjustment of the light emission intensity independent of applied bias. This device was shown to simultaneously act as a light detecting transistor with a linear and gate tunable sensitivity. The presented development of an electronically controllable multifunctional light emitter, light detector and transistor open up a new route for future optoelectronics.

Complex oxide thin films for microelectronics

NASA Astrophysics Data System (ADS)

Suvorova, Natalya

The rapid scaling of the device dimensions, namely in metal oxide semiconductor field effect transistor (MOSFET), is reaching its fundamental limit which includes the increase in allowable leakage current due to direct tunneling with decrease of physical thickness of SiO2 gate dielectric. The significantly higher relative dielectric constant (in the range 9--25) of the gate dielectric beyond the 3.9 value of silicon dioxide will allow increasing the physical thickness. Among the choices for the high dielectric constant (K) materials for future generation MOSFET application, barium strontium titanate (BST) and strontium titanate (STO) possess one of the highest attainable K values making them the promising candidates for alternative gate oxide. However, the gate stack engineering does not imply the simple replacement of the SiO2 with the new dielectric. Several requirements should be met for successful integration of a new material. The major one is a production of high level of interface states (Dit) compared to that of SiO 2 on Si. An insertion of a thin SiO2 layer prior the growth of high-K thin film is a simple solution that helps to limit reaction with Si substrate and attains a high quality interface. However, the combination of two thin films reduces the overall K of the dielectric stack. An optimization of the SiO2 underlayer in order to maintain the interface quality yet minimize the effect on K is the focus of this work. The results from our study are presented with emphasis on the key process parameters that improve the dielectric film stack. For in-situ growth characterization of BST and STO films sputter deposited on thermally oxidized Si substrates spectroscopic ellipsometry in combination with time of flight ion scattering and recoil spectrometry have been employed. Studies of material properties have been complemented with analytical electron microscopy. To evaluate the interface quality the electrical characterization has been employed using capacitance-voltage and conductance-voltage measurements. Special attention was given to the extraction of static dielectric constant of BST and STO from the multiple film stack. The K value was found to be sensitive to the input parameters such as dielectric constant and thickness of interface layers.

III-V/Ge MOS device technologies for low power integrated systems

NASA Astrophysics Data System (ADS)

Takagi, S.; Noguchi, M.; Kim, M.; Kim, S.-H.; Chang, C.-Y.; Yokoyama, M.; Nishi, K.; Zhang, R.; Ke, M.; Takenaka, M.

2016-11-01

CMOS utilizing high mobility III-V/Ge channels on Si substrates is expected to be one of the promising devices for high performance and low power integrated systems in the future technology nodes, because of the enhanced carrier transport properties. In addition, Tunneling-FETs (TFETs) using Ge/III-V materials are regarded as one of the most important steep slope devices for the ultra-low power applications. In this paper, we address the device and process technologies of Ge/III-V MOSFETs and TFETs on the Si CMOS platform. The channel formation, source/drain (S/D) formation and gate stack engineering are introduced for satisfying the device requirements. The plasma post oxidation to form GeOx interfacial layers is a key gate stack technology for Ge CMOS. Also, direct wafer bonding of ultrathin body quantum well III-V-OI channels, combined with Tri-gate structures, realizes high performance III-V n-MOSFETs on Si. We also demonstrate planar-type InGaAs and Ge/strained SOI TFETs. The defect-less p+-n source junction formation with steep impurity profiles is a key for high performance TFET operation.

Analysis of high-k spacer on symmetric underlap DG-MOSFET with Gate Stack architecture

NASA Astrophysics Data System (ADS)

Das, Rahul; Chakraborty, Shramana; Dasgupta, Arpan; Dutta, Arka; Kundu, Atanu; Sarkar, Chandan K.

2016-09-01

This paper shows the systematic study of underlap double gate (U-DG) NMOSFETs with Gate Stack (GS) under the influence of high-k spacers. In highly scaled devices, underlap is used at the Source and Drain side so as to reduce the short channel effects (SCE's), however, it significantly reduces the on current due to the increased channel resistance. To overcome these drawbacks, the use of high-k spacers is projected as one of the remedies. In this paper, the analog performance of the devices is studied on the basis of parameters like transconductance (gm), transconductance generation factor (gm/Id) and intrinsic gain (gmro). The RF performance is analyzed on the merits of intrinsic capacitance (Cgd, Cgs), resistance (Rgd, Rgs), transport delay (τm), inductance (Lsd), cutoff frequency (fT), and the maximum frequency of oscillation (fmax). The circuit performance of the devices are studied by implementing the device as the driver MOSFET in a Single Stage Common Source Amplifier. The Gain Bandwidth Product (GBW) has been analyzed from the frequency response of the circuit.

Fabrication of Ta2O5/GeNx gate insulator stack for Ge metal-insulator-semiconductor structures by electron-cyclotron-resonance plasma nitridation and sputtering deposition techniques

NASA Astrophysics Data System (ADS)

Otani, Yohei; Itayama, Yasuhiro; Tanaka, Takuo; Fukuda, Yukio; Toyota, Hiroshi; Ono, Toshiro; Mitsui, Minoru; Nakagawa, Kiyokazu

2007-04-01

The authors have fabricated germanium (Ge) metal-insulator-semiconductor (MIS) structures with a 7-nm-thick tantalum pentaoxide (Ta2O5)/2-nm-thick germanium nitride (GeNx) gate insulator stack by electron-cyclotron-resonance plasma nitridation and sputtering deposition. They found that pure GeNx ultrathin layers can be formed by the direct plasma nitridation of the Ge surface without substrate heating. X-ray photoelectron spectroscopy revealed no oxidation of the GeNx layer after the Ta2O5 sputtering deposition. The fabricated MIS capacitor with a capacitance equivalent thickness of 4.3nm showed excellent leakage current characteristics. The interface trap density obtained by the modified conductance method was 4×1011cm-2eV-1 at the midgap.

The effect of Al segregation on Schottky barrier height and effective work function in TiAl/TiN/HfO2 gate stacks

NASA Astrophysics Data System (ADS)

Kim, Geun-Myeong; Oh, Young Jun; Chang, K. J.

2016-07-01

We perform first-principles density functional calculations to investigate the effects of Al incorporation on the p-type Schottky barrier height ≤ft({φ\\text{p}}\\right) and the effective work function for various high-k/metal gate stacks, such as TiN/HfO2 with interface Al impurities, Ti1-x Al x N/HfO2, and TiAl/TiN/HfO2. When Al atoms substitute for the interface Ti atoms at TiN/HfO2 interface, interface dipole fields become stronger, leading to the increase of {φ\\text{p}} and thereby the n-type shift of effective work function. In Ti1-x Al x N/HfO2 interface, {φ\\text{p}} linearly increases with the Al content, attributed to the presence of interface Al atoms. On the other hand, in TiAl/TiN/HfO2 interface, where Al is assumed not to segregate from TiAl to TiN, {φ\\text{p}} is nearly independent of the thickness of TiAl. Our results indicate that Al impurities at the metal/dielectric interface play an important role in controlling the effective work function, and provide a clue to understanding the n-type shift of the effective work function observed in TiAl/TiN/HfO2 gate stacks fabricated by using thegate-last process.

Radiation-Tolerant Intelligent Memory Stack - RTIMS

NASA Technical Reports Server (NTRS)

Ng, Tak-kwong; Herath, Jeffrey A.

2011-01-01

This innovation provides reconfigurable circuitry and 2-Gb of error-corrected or 1-Gb of triple-redundant digital memory in a small package. RTIMS uses circuit stacking of heterogeneous components and radiation shielding technologies. A reprogrammable field-programmable gate array (FPGA), six synchronous dynamic random access memories, linear regulator, and the radiation mitigation circuits are stacked into a module of 42.7 42.7 13 mm. Triple module redundancy, current limiting, configuration scrubbing, and single- event function interrupt detection are employed to mitigate radiation effects. The novel self-scrubbing and single event functional interrupt (SEFI) detection allows a relatively soft FPGA to become radiation tolerant without external scrubbing and monitoring hardware

Method for disclosing invisible physical properties in metal-ferroelectric-insulator-semiconductor gate stacks

NASA Astrophysics Data System (ADS)

Sakai, Shigeki; Zhang, Wei; Takahashi, Mitsue

2017-04-01

In metal-ferroelectric-insulator-semiconductor gate stacks of ferroelectric-gate field effect transistors (FeFETs), it is impossible to directly obtain curves of polarization versus electric field (P f-E f) in the ferroelectric layer. The P f-E f behavior is not simple, i.e. the P f-E f curves are hysteretic and nonlinear, and the hysteresis curve width depends on the electric field scan amplitude. Unless the P f-E f relation is known, the field E f strength cannot be solved when the voltage is applied between the gate meal and the semiconductor substrate, and thus P f-E f cannot be obtained after all. In this paper, the method for disclosing the relationships among the polarization peak-to-peak amplitude (2P mm_av), the electric field peak-to-peak amplitude (2E mm_av), and the memory window (E w) in units of the electric field is presented. To get P mm_av versus E mm_av, FeFETs with different ferroelectric-layer thicknesses should be prepared. Knowing such essential physical parameters is helpful and in many cases enough to quantitatively understand the behavior of FeFETs. The method is applied to three groups. The first one consists of SrBi2Ta2O9-based FeFETs. The second and third ones consist of Ca x Sr1-x Bi2Ta2O9-based FeFETs made by two kinds of annealing. The method can clearly differentiate the characters of the three groups. By applying the method, ferroelectric relationships among P mm_av, E mm_av, and E w are well classified in the three groups according to the difference of the material kinds and the annealing conditions. The method also evaluates equivalent oxide thickness (EOT) of a dual layer of a deposited high-k insulator and a thermally-grown SiO2-like interfacial layer (IL). The IL thickness calculated by the method is consistent with cross-sectional image of the FeFETs observed by a transmission electron microscope. The method successfully discloses individual characteristics of the ferroelectric and the insulator layers hidden in the gate stack of a FeFET.

Control of Ga-oxide interlayer growth and Ga diffusion in SiO2/GaN stacks for high-quality GaN-based metal-oxide-semiconductor devices with improved gate dielectric reliability

NASA Astrophysics Data System (ADS)

Yamada, Takahiro; Watanabe, Kenta; Nozaki, Mikito; Yamada, Hisashi; Takahashi, Tokio; Shimizu, Mitsuaki; Yoshigoe, Akitaka; Hosoi, Takuji; Shimura, Takayoshi; Watanabe, Heiji

2018-01-01

A simple and feasible method for fabricating high-quality and highly reliable GaN-based metal-oxide-semiconductor (MOS) devices was developed. The direct chemical vapor deposition of SiO2 films on GaN substrates forming Ga-oxide interlayers was carried out to fabricate SiO2/GaO x /GaN stacked structures. Although well-behaved hysteresis-free GaN-MOS capacitors with extremely low interface state densities below 1010 cm-2 eV-1 were obtained by postdeposition annealing, Ga diffusion into overlying SiO2 layers severely degraded the dielectric breakdown characteristics. However, this problem was found to be solved by rapid thermal processing, leading to the superior performance of the GaN-MOS devices in terms of interface quality, insulating property, and gate dielectric reliability.

Electrical and ferroelectric properties of RF sputtered PZT/SBN on silicon for non-volatile memory applications

NASA Astrophysics Data System (ADS)

Singh, Prashant; Jha, Rajesh Kumar; Singh, Rajat Kumar; Singh, B. R.

2018-02-01

We report the integration of multilayer ferroelectric film deposited by RF magnetron sputtering and explore the electrical characteristics for its application as the gate of ferroelectric field effect transistor for non-volatile memories. PZT (Pb[Zr0.35Ti0.65]O3) and SBN (SrBi2Nb2O9) ferroelectric materials were selected for the stack fabrication due to their large polarization and fatigue free properties respectively. Electrical characterization has been carried out to obtain memory window, leakage current density, PUND and endurance characteristics. Fabricated multilayer ferroelectric film capacitor structure shows large memory window of 17.73 V and leakage current density of the order 10-6 A cm-2 for the voltage sweep of -30 to +30 V. This multilayer gate stack of PZT/SBN shows promising endurance property with no degradation in the remnant polarization for the read/write iteration cycles upto 108.

Al{sub 2}O{sub 3}/GeO{sub x} gate stack on germanium substrate fabricated by in situ cycling ozone oxidation method

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yang, Xu; Zeng, Zhen-Hua; Microwave Device and IC Department, Institute of Microelectronics of Chinese Academy of Sciences, Beijing 100029

2014-09-01

Al{sub 2}O{sub 3}/GeO{sub x}/Ge gate stack fabricated by an in situ cycling ozone oxidation (COO) method in the atomic layer deposition (ALD) system at low temperature is systematically investigated. Excellent electrical characteristics such as minimum interface trap density as low as 1.9 × 10{sup 11 }cm{sup −2 }eV{sup −1} have been obtained by COO treatment. The impact of COO treatment against the band alignment of Al{sub 2}O{sub 3} with respect to Ge is studied by x-ray photoelectron spectroscopy (XPS) and spectroscopic ellipsometry (SE). Based on both XPS and SE studies, the origin of gate leakage in the ALD-Al{sub 2}O{sub 3} is attributed to themore » sub-gap states, which may be correlated to the OH-related groups in Al{sub 2}O{sub 3} network. It is demonstrated that the COO method is effective in repairing the OH-related defects in high-k dielectrics as well as forming superior high-k/Ge interface for high performance Ge MOS devices.« less

Performance investigation of InAs based dual electrode tunnel FET on the analog/RF platform

NASA Astrophysics Data System (ADS)

Anand, Sunny; Sarin, R. K.

2016-09-01

In this paper for the first time, InAs based doping-less Tunnel FET is proposed and investigated. This paper also demonstrates and discusses the impact of gate stacking (SiO2 + HfO2) with equivalent oxide thickness EOT = 0.8 for analog/RF performance. The charge plasma technique is used to form source/drain region on an intrinsic InAs body by selecting proper work function of metal electrode. The paper compares different combinations of gate stacking (SiO2 and HfO2) on the basis of different analog and RF parameters such as transconductance (gm), transconductance to drive current ratio (gm/ID), output conductance (gd), intrinsic gain (AV), total gate capacitance (Cgg) and unity-gain cutoff frequency (fT). The proposed device produces an ON state current of ION ∼6 mA along with ION/IOFF ∼1012, point subthreshold slope (SS ∼ 1.9 mV/dec), average subthreshold slope (AV-SS ∼ 14.2 mV/dec) and cut-off frequency in Terahertz. The focus of this work is to eliminate the fabrication issues and providing the enhanced performance compared to doped device.

Investigation of Microcavitation-Induced Effects using in Vitro Models for Traumatic Brain Injury

DTIC Science & Technology

2016-08-25

four MOSFET switches (IXFB38N I OOQ2) stacking in series . The designing details of such stacking circuit can be found in [25] . In brief, the gate... time of the mechanical vibration of the piezotransducer. The on- time in this study was limited to ~2 s. B. Microbubble chamber design Rev. Sci...60 s. This long collapse time may be favored for biological studies where the observation of time evolution is of essence. We purposely designed the

Impact of gate work-function on memory characteristics in Al2O3/HfOx/Al2O3/graphene charge-trap memory devices

NASA Astrophysics Data System (ADS)

Lee, Sejoon; Song, Emil B.; Kim, Sungmin; Seo, David H.; Seo, Sunae; Won Kang, Tae; Wang, Kang L.

2012-01-01

Graphene-based non-volatile memory devices composed of a single-layer graphene channel and an Al2O3/HfOx/Al2O3 charge-storage layer exhibit memory functionality. The impact of the gate material's work-function (Φ) on the memory characteristics is investigated using different types of metals [Ti (ΦTi = 4.3 eV) and Ni (ΦNi = 5.2 eV)]. The ambipolar carrier conduction of graphene results in an enlargement of memory window (ΔVM), which is ˜4.5 V for the Ti-gate device and ˜9.1 V for the Ni-gate device. The increase in ΔVM is attributed to the change in the flat-band condition and the suppression of electron back-injection within the gate stack.

Remote interfacial dipole scattering and electron mobility degradation in Ge field-effect transistors with GeO x /Al2O3 gate dielectrics

NASA Astrophysics Data System (ADS)

Wang, Xiaolei; Xiang, Jinjuan; Wang, Shengkai; Wang, Wenwu; Zhao, Chao; Ye, Tianchun; Xiong, Yuhua; Zhang, Jing

2016-06-01

Remote Coulomb scattering (RCS) on electron mobility degradation is investigated experimentally in Ge-based metal-oxide-semiconductor field-effect-transistors (MOSFETs) with GeO x /Al2O3 gate stacks. It is found that the mobility increases with greater GeO x thickness (7.8-20.8 Å). The physical origin of this mobility dependence on GeO x thickness is explored. The following factors are excluded: Coulomb scattering due to interfacial traps at GeO x /Ge, phonon scattering, and surface roughness scattering. Therefore, the RCS from charges in gate stacks is studied. The charge distributions in GeO x /Al2O3 gate stacks are evaluated experimentally. The bulk charges in Al2O3 and GeO x are found to be negligible. The density of the interfacial charge is  +3.2  ×  1012 cm-2 at the GeO x /Ge interface and  -2.3  ×  1012 cm-2 at the Al2O3/GeO x interface. The electric dipole at the Al2O3/GeO x interface is found to be  +0.15 V, which corresponds to an areal charge density of 1.9  ×  1013 cm-2. The origin of this mobility dependence on GeO x thickness is attributed to the RCS due to the electric dipole at the Al2O3/GeO x interface. This remote dipole scattering is found to play a significant role in mobility degradation. The discovery of this new scattering mechanism indicates that the engineering of the Al2O3/GeO x interface is key for mobility enhancement and device performance improvement. These results are helpful for understanding and engineering Ge mobility enhancement.

Phosphorus oxide gate dielectric for black phosphorus field effect transistors

NASA Astrophysics Data System (ADS)

Dickerson, W.; Tayari, V.; Fakih, I.; Korinek, A.; Caporali, M.; Serrano-Ruiz, M.; Peruzzini, M.; Heun, S.; Botton, G. A.; Szkopek, T.

2018-04-01

The environmental stability of the layered semiconductor black phosphorus (bP) remains a challenge. Passivation of the bP surface with phosphorus oxide, POx, grown by a reactive ion etch with oxygen plasma is known to improve photoluminescence efficiency of exfoliated bP flakes. We apply phosphorus oxide passivation in the fabrication of bP field effect transistors using a gate stack consisting of a POx layer grown by reactive ion etching followed by atomic layer deposition of Al2O3. We observe room temperature top-gate mobilities of 115 cm2 V-1 s-1 in ambient conditions, which we attribute to the low defect density of the bP/POx interface.

Germanium MOS capacitors grown on Silicon using low temperature RF-PECVD

NASA Astrophysics Data System (ADS)

Dushaq, Ghada; Rasras, Mahmoud; Nayfeh, Ammar

2017-10-01

In this paper, Ge metal-oxide-semiconductor capacitors (MOSCAPs) are fabricated on Si using a low temperature two-step deposition technique by radio frequency plasma enhanced chemical vapor deposition. The MOSCAP gate stack consists of atomic layer deposition of Al2O3 as the gate oxide and a Ti/Al metal gate electrode. The electrical characteristics of 9 nm Al2O3/i-Ge/Si MOSCAPs exhibit an n-type (p-channel) behavior and normal high frequency C-V responses. In addition to CV measurements, the gate leakage versus the applied voltage is measured and discussed. Moreover, the electrical behavior is discussed in terms of the material and interface quality. The Ge/high-k interface trap density versus the surface potential is extracted using the most commonly used methods in detemining the interface traps based on the capacitance-voltage (C-V) curves. The discussion included the Dit calculation from the conductance method, the high-low frequency (Castagné-Vapaille) method, and the Terman (high-frequency) method. Furthermore, the origins of the discrepancies in the interface trap densities determined from the different methods are discussed. The study of the post annealed Ge layers at different temperatures in H2 and N2 gas ambient revealed an improved electrical and transport properties of the films treated at T  <  600 °C. Also, samples annealed at  <550 °C show the lowest threading dislocation density of ~1  ×  106 cm-2. The low temperature processing of Ge/Si demonstrates a great potential for p-channel transistor applications in a monolithically integrated CMOS platform.

FPGA-Based Optical Cavity Phase Stabilization for Coherent Pulse Stacking

DOE PAGES

Xu, Yilun; Wilcox, Russell; Byrd, John; ...

2017-11-20

Coherent pulse stacking (CPS) is a new time-domain coherent addition technique that stacks several optical pulses into a single output pulse, enabling high pulse energy from fiber lasers. We develop a robust, scalable, and distributed digital control system with firmware and software integration for algorithms, to support the CPS application. We model CPS as a digital filter in the Z domain and implement a pulse-pattern-based cavity phase detection algorithm on an field-programmable gate array (FPGA). A two-stage (2+1 cavities) 15-pulse stacking system achieves an 11.0 peak-power enhancement factor. Each optical cavity is fed back at 1.5kHz, and stabilized at anmore » individually-prescribed round-trip phase with 0.7deg and 2.1deg rms phase errors for Stages 1 and 2, respectively. Optical cavity phase control with nanometer accuracy ensures 1.2% intensity stability of the stacked pulse over 12 h. The FPGA-based feedback control system can be scaled to large numbers of optical cavities.« less

FPGA-Based Optical Cavity Phase Stabilization for Coherent Pulse Stacking

DOE Office of Scientific and Technical Information (OSTI.GOV)

Xu, Yilun; Wilcox, Russell; Byrd, John

Coherent pulse stacking (CPS) is a new time-domain coherent addition technique that stacks several optical pulses into a single output pulse, enabling high pulse energy from fiber lasers. We develop a robust, scalable, and distributed digital control system with firmware and software integration for algorithms, to support the CPS application. We model CPS as a digital filter in the Z domain and implement a pulse-pattern-based cavity phase detection algorithm on an field-programmable gate array (FPGA). A two-stage (2+1 cavities) 15-pulse stacking system achieves an 11.0 peak-power enhancement factor. Each optical cavity is fed back at 1.5kHz, and stabilized at anmore » individually-prescribed round-trip phase with 0.7deg and 2.1deg rms phase errors for Stages 1 and 2, respectively. Optical cavity phase control with nanometer accuracy ensures 1.2% intensity stability of the stacked pulse over 12 h. The FPGA-based feedback control system can be scaled to large numbers of optical cavities.« less

Nanowire systems: technology and design

PubMed Central

Gaillardon, Pierre-Emmanuel; Amarù, Luca Gaetano; Bobba, Shashikanth; De Marchi, Michele; Sacchetto, Davide; De Micheli, Giovanni

2014-01-01

Nanosystems are large-scale integrated systems exploiting nanoelectronic devices. In this study, we consider double independent gate, vertically stacked nanowire field effect transistors (FETs) with gate-all-around structures and typical diameter of 20 nm. These devices, which we have successfully fabricated and evaluated, control the ambipolar behaviour of the nanostructure by selectively enabling one type of carriers. These transistors work as switches with electrically programmable polarity and thus realize an exclusive or operation. The intrinsic higher expressive power of these FETs, when compared with standard complementary metal oxide semiconductor technology, enables us to realize more efficient logic gates, which we organize as tiles to realize nanowire systems by regular arrays. This article surveys both the technology for double independent gate FETs as well as physical and logic design tools to realize digital systems with this fabrication technology. PMID:24567471

Radiation Tolerant Intelligent Memory Stack (RTIMS)

NASA Technical Reports Server (NTRS)

Ng, Tak-kwong; Herath, Jeffrey A.

2006-01-01

The Radiation Tolerant Intelligent Memory Stack (RTIMS), suitable for both geostationary and low earth orbit missions, has been developed. The memory module is fully functional and undergoing environmental and radiation characterization. A self-contained flight-like module is expected to be completed in 2006. RTIMS provides reconfigurable circuitry and 2 gigabits of error corrected or 1 gigabit of triple redundant digital memory in a small package. RTIMS utilizes circuit stacking of heterogeneous components and radiation shielding technologies. A reprogrammable field programmable gate array (FPGA), six synchronous dynamic random access memories, linear regulator, and the radiation mitigation circuitries are stacked into a module of 42.7mm x 42.7mm x 13.00mm. Triple module redundancy, current limiting, configuration scrubbing, and single event function interrupt detection are employed to mitigate radiation effects. The mitigation techniques significantly simplify system design. RTIMS is well suited for deployment in real-time data processing, reconfigurable computing, and memory intensive applications.

First-principles study on leakage current caused by oxygen vacancies at HfO2/SiO2/Si interface

NASA Astrophysics Data System (ADS)

Takagi, Kensuke; Ono, Tomoya

2018-06-01

The relationship between the position of oxygen vacancies in HfO2/SiO2/Si gate stacks and the leakage current is studied by first-principles electronic-structure and electron-conduction calculations. We find that the increase in the leakage current due to the creation of oxygen vacancies in the HfO2 layer is much larger than that in the SiO2 interlayer. According to previous first-principles total energy calculations, the formation energy of oxygen vacancies is smaller in the SiO2 interlayer than that in the HfO2 layer under the same conditions. Therefore, oxygen vacancies will be attracted from the SiO2 interlayer to minimize the energy, thermodynamically justifying the scavenging technique. Thus, the scavenging process efficiently improves the dielectric constant of HfO2-based gate stacks without increasing the number of oxygen vacancies, which cause the dielectric breakdown.

Improvement in top-gate MoS2 transistor performance due to high quality backside Al2O3 layer

NASA Astrophysics Data System (ADS)

Bolshakov, Pavel; Zhao, Peng; Azcatl, Angelica; Hurley, Paul K.; Wallace, Robert M.; Young, Chadwin D.

2017-07-01

A high quality Al2O3 layer is developed to achieve high performance in top-gate MoS2 transistors. Compared with top-gate MoS2 field effect transistors on a SiO2 layer, the intrinsic mobility and subthreshold slope were greatly improved in high-k backside layer devices. A forming gas anneal is found to enhance device performance due to a reduction in the charge trap density of the backside dielectric. The major improvements in device performance are ascribed to the forming gas anneal and the high-k dielectric screening effect of the backside Al2O3 layer. Top-gate devices built upon these stacks exhibit a near-ideal subthreshold slope of ˜69 mV/dec and a high Y-Function extracted intrinsic carrier mobility (μo) of 145 cm2/V.s, indicating a positive influence on top-gate device performance even without any backside bias.

Investigation of gate-diode degradation in normally-off p-GaN/AlGaN/GaN high-electron-mobility transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ťapajna, M., E-mail: milan.tapajna@savba.sk; Kuzmík, J.; Hilt, O.

2015-11-09

Gate diode conduction mechanisms were analyzed in normally-off p-GaN/AlGaN/GaN high-electron mobility transistors grown on Si wafers before and after forward bias stresses. Electrical characterization of the gate diodes indicates forward current to be limited by channel electrons injected through the AlGaN/p-GaN triangular barrier promoted by traps. On the other hand, reverse current was found to be consistent with carrier generation-recombination processes in the AlGaN layer. Soft breakdown observed after ∼10{sup 5 }s during forward bias stress at gate voltage of 7 V was attributed to formation of conductive channel in p-GaN/AlGaN gate stack via trap generation and percolation mechanism, likely due tomore » coexistence of high electric field and high forward current density. Possible enhancement of localized conductive channels originating from spatial inhomogeneities is proposed to be responsible for the degradation.« less

Synergistic High Charge-Storage Capacity for Multi-level Flexible Organic Flash Memory

NASA Astrophysics Data System (ADS)

Kang, Minji; Khim, Dongyoon; Park, Won-Tae; Kim, Jihong; Kim, Juhwan; Noh, Yong-Young; Baeg, Kang-Jun; Kim, Dong-Yu

2015-07-01

Electret and organic floating-gate memories are next-generation flash storage mediums for printed organic complementary circuits. While each flash memory can be easily fabricated using solution processes on flexible plastic substrates, promising their potential for on-chip memory organization is limited by unreliable bit operation and high write loads. We here report that new architecture could improve the overall performance of organic memory, and especially meet high storage for multi-level operation. Our concept depends on synergistic effect of electrical characterization in combination with a polymer electret (poly(2-vinyl naphthalene) (PVN)) and metal nanoparticles (Copper). It is distinguished from mostly organic nano-floating-gate memories by using the electret dielectric instead of general tunneling dielectric for additional charge storage. The uniform stacking of organic layers including various dielectrics and poly(3-hexylthiophene) (P3HT) as an organic semiconductor, followed by thin-film coating using orthogonal solvents, greatly improve device precision despite easy and fast manufacture. Poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] as high-k blocking dielectric also allows reduction of programming voltage. The reported synergistic organic memory devices represent low power consumption, high cycle endurance, high thermal stability and suitable retention time, compared to electret and organic nano-floating-gate memory devices.

Synergistic High Charge-Storage Capacity for Multi-level Flexible Organic Flash Memory.

PubMed

Kang, Minji; Khim, Dongyoon; Park, Won-Tae; Kim, Jihong; Kim, Juhwan; Noh, Yong-Young; Baeg, Kang-Jun; Kim, Dong-Yu

2015-07-23

Electret and organic floating-gate memories are next-generation flash storage mediums for printed organic complementary circuits. While each flash memory can be easily fabricated using solution processes on flexible plastic substrates, promising their potential for on-chip memory organization is limited by unreliable bit operation and high write loads. We here report that new architecture could improve the overall performance of organic memory, and especially meet high storage for multi-level operation. Our concept depends on synergistic effect of electrical characterization in combination with a polymer electret (poly(2-vinyl naphthalene) (PVN)) and metal nanoparticles (Copper). It is distinguished from mostly organic nano-floating-gate memories by using the electret dielectric instead of general tunneling dielectric for additional charge storage. The uniform stacking of organic layers including various dielectrics and poly(3-hexylthiophene) (P3HT) as an organic semiconductor, followed by thin-film coating using orthogonal solvents, greatly improve device precision despite easy and fast manufacture. Poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] as high-k blocking dielectric also allows reduction of programming voltage. The reported synergistic organic memory devices represent low power consumption, high cycle endurance, high thermal stability and suitable retention time, compared to electret and organic nano-floating-gate memory devices.

Nonvolatile Memories Using Quantum Dot (QD) Floating Gates Assembled on II-VI Tunnel Insulators

NASA Astrophysics Data System (ADS)

Suarez, E.; Gogna, M.; Al-Amoody, F.; Karmakar, S.; Ayers, J.; Heller, E.; Jain, F.

2010-07-01

This paper presents preliminary data on quantum dot gate nonvolatile memories using nearly lattice-matched ZnS/Zn0.95Mg0.05S/ZnS tunnel insulators. The GeO x -cladded Ge and SiO x -cladded Si quantum dots (QDs) are self-assembled site-specifically on the II-VI insulator grown epitaxially over the Si channel (formed between the source and drain region). The pseudomorphic II-VI stack serves both as a tunnel insulator and a high- κ dielectric. The effect of Mg incorporation in ZnMgS is also investigated. For the control gate insulator, we have used Si3N4 and SiO2 layers grown by plasma- enhanced chemical vapor deposition.

Combinatorial study of Ni-Ti-Pt ternary metal gate electrodes on HfO{sub 2} for the advanced gate stack

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chang, K.-S.; Green, M. L.; Suehle, J.

2006-10-02

The authors have fabricated combinatorial Ni-Ti-Pt ternary metal gate thin film libraries on HfO{sub 2} using magnetron co-sputtering to investigate flatband voltage shift ({delta}V{sub fb}), work function ({phi}{sub m}), and leakage current density (J{sub L}) variations. A more negative {delta}V{sub fb} is observed close to the Ti-rich corner than at the Ni- and Pt-rich corners, implying smaller {phi}{sub m} near the Ti-rich corners and higher {phi}{sub m} near the Ni- and Pt-rich corners. In addition, measured J{sub L} values can be explained consistently with the observed {phi}{sub m} variations. Combinatorial methodologies prove to be useful in surveying the large compositionalmore » space of ternary alloy metal gate electrode systems.« less

Gate-Controlled BP-WSe2 Heterojunction Diode for Logic Rectifiers and Logic Optoelectronics.

PubMed

Li, Dong; Wang, Biao; Chen, Mingyuan; Zhou, Jun; Zhang, Zengxing

2017-06-01

p-n junctions play an important role in modern semiconductor electronics and optoelectronics, and field-effect transistors are often used for logic circuits. Here, gate-controlled logic rectifiers and logic optoelectronic devices based on stacked black phosphorus (BP) and tungsten diselenide (WSe 2 ) heterojunctions are reported. The gate-tunable ambipolar charge carriers in BP and WSe 2 enable a flexible, dynamic, and wide modulation on the heterojunctions as isotype (p-p and n-n) and anisotype (p-n) diodes, which exhibit disparate rectifying and photovoltaic properties. Based on such characteristics, it is demonstrated that BP-WSe 2 heterojunction diodes can be developed for high-performance logic rectifiers and logic optoelectronic devices. Logic optoelectronic devices can convert a light signal to an electric one by applied gate voltages. This work should be helpful to expand the applications of 2D crystals. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Comparative studies of Ge and Si p-channel metal-oxide-semiconductor field-effect-transistors with HfSiON dielectric and TaN metal gate

NASA Astrophysics Data System (ADS)

Hu, Ai-Bin; Xu, Qiu-Xia

2010-05-01

Ge and Si p-channel metal-oxide-semiconductor field-effect-transistors (p-MOSFETs) with hafnium silicon oxynitride (HfSiON) gate dielectric and tantalum nitride (TaN) metal gate are fabricated. Self-isolated ring-type transistor structures with two masks are employed. W/TaN metal stacks are used as gate electrode and shadow masks of source/drain implantation separately. Capacitance-voltage curve hysteresis of Ge metal-oxide-semiconductor (MOS) capacitors may be caused by charge trapping centres in GeO2 (1 < x < 2). Effective hole mobilities of Ge and Si transistors are extracted by using a channel conductance method. The peak hole mobilities of Si and Ge transistors are 33.4 cm2/(V · s) and 81.0 cm2/(V · s), respectively. Ge transistor has a hole mobility 2.4 times higher than that of Si control sample.

Two-dimensional GaSe/MoSe2 misfit bilayer heterojunctions by van der Waals epitaxy.

PubMed

Li, Xufan; Lin, Ming-Wei; Lin, Junhao; Huang, Bing; Puretzky, Alexander A; Ma, Cheng; Wang, Kai; Zhou, Wu; Pantelides, Sokrates T; Chi, Miaofang; Kravchenko, Ivan; Fowlkes, Jason; Rouleau, Christopher M; Geohegan, David B; Xiao, Kai

2016-04-01

Two-dimensional (2D) heterostructures hold the promise for future atomically thin electronics and optoelectronics because of their diverse functionalities. Although heterostructures consisting of different 2D materials with well-matched lattices and novel physical properties have been successfully fabricated via van der Waals (vdW) epitaxy, constructing heterostructures from layered semiconductors with large lattice misfits remains challenging. We report the growth of 2D GaSe/MoSe2 heterostructures with a large lattice misfit using two-step chemical vapor deposition (CVD). Both vertically stacked and lateral heterostructures are demonstrated. The vertically stacked GaSe/MoSe2 heterostructures exhibit vdW epitaxy with well-aligned lattice orientation between the two layers, forming a periodic superlattice. However, the lateral heterostructures exhibit no lateral epitaxial alignment at the interface between GaSe and MoSe2 crystalline domains. Instead of a direct lateral connection at the boundary region where the same lattice orientation is observed between GaSe and MoSe2 monolayer domains in lateral GaSe/MoSe2 heterostructures, GaSe monolayers are found to overgrow MoSe2 during CVD, forming a stripe of vertically stacked vdW heterostructures at the crystal interface. Such vertically stacked vdW GaSe/MoSe2 heterostructures are shown to form p-n junctions with effective transport and separation of photogenerated charge carriers between layers, resulting in a gate-tunable photovoltaic response. These GaSe/MoSe2 vdW heterostructures should have applications as gate-tunable field-effect transistors, photodetectors, and solar cells.

Two-dimensional GaSe/MoSe2 misfit bilayer heterojunctions by van der Waals epitaxy

PubMed Central

Li, Xufan; Lin, Ming-Wei; Lin, Junhao; Huang, Bing; Puretzky, Alexander A.; Ma, Cheng; Wang, Kai; Zhou, Wu; Pantelides, Sokrates T.; Chi, Miaofang; Kravchenko, Ivan; Fowlkes, Jason; Rouleau, Christopher M.; Geohegan, David B.; Xiao, Kai

2016-01-01

Two-dimensional (2D) heterostructures hold the promise for future atomically thin electronics and optoelectronics because of their diverse functionalities. Although heterostructures consisting of different 2D materials with well-matched lattices and novel physical properties have been successfully fabricated via van der Waals (vdW) epitaxy, constructing heterostructures from layered semiconductors with large lattice misfits remains challenging. We report the growth of 2D GaSe/MoSe2 heterostructures with a large lattice misfit using two-step chemical vapor deposition (CVD). Both vertically stacked and lateral heterostructures are demonstrated. The vertically stacked GaSe/MoSe2 heterostructures exhibit vdW epitaxy with well-aligned lattice orientation between the two layers, forming a periodic superlattice. However, the lateral heterostructures exhibit no lateral epitaxial alignment at the interface between GaSe and MoSe2 crystalline domains. Instead of a direct lateral connection at the boundary region where the same lattice orientation is observed between GaSe and MoSe2 monolayer domains in lateral GaSe/MoSe2 heterostructures, GaSe monolayers are found to overgrow MoSe2 during CVD, forming a stripe of vertically stacked vdW heterostructures at the crystal interface. Such vertically stacked vdW GaSe/MoSe2 heterostructures are shown to form p-n junctions with effective transport and separation of photogenerated charge carriers between layers, resulting in a gate-tunable photovoltaic response. These GaSe/MoSe2 vdW heterostructures should have applications as gate-tunable field-effect transistors, photodetectors, and solar cells. PMID:27152356

FET charge sensor and voltage probe

NASA Technical Reports Server (NTRS)

Robinson, P. A., Jr. (Inventor)

1986-01-01

A MOSFET structure having a biased gate covered with an insulator is described. The insulator is of such a thickness as to render the structure capable of giving a measure of accumulated charge. The structure is also capable of being used in a stacked structure as a particle spectrometer.

Nickel hydrogen cell design: A designer's aspect

NASA Technical Reports Server (NTRS)

Rehm, Raymond

1992-01-01

Information is given to give insight into the methodology of nickel hydrogen cell design and the decipherment of the battery cell reference guide that was distributed to many of Gates Energy Products' customers. Cell design, stacking design, charge capacity, and dynamic response are discussed in general terms.

Impact of La{sub 2}O{sub 3} interfacial layers on InGaAs metal-oxide-semiconductor interface properties in Al{sub 2}O{sub 3}/La{sub 2}O{sub 3}/InGaAs gate stacks deposited by atomic-layer-deposition

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chang, C.-Y., E-mail: cychang@mosfet.t.u-tokyo.ac.jp; Takenaka, M.; Takagi, S.

We examine the electrical properties of atomic layer deposition (ALD) La{sub 2}O{sub 3}/InGaAs and Al{sub 2}O{sub 3}/La{sub 2}O{sub 3}/InGaAs metal-oxide-semiconductor (MOS) capacitors. It is found that the thick ALD La{sub 2}O{sub 3}/InGaAs interface provides low interface state density (D{sub it}) with the minimum value of ∼3 × 10{sup 11} cm{sup −2} eV{sup −1}, which is attributable to the excellent La{sub 2}O{sub 3} passivation effect for InGaAs surfaces. It is observed, on the other hand, that there are a large amount of slow traps and border traps in La{sub 2}O{sub 3}. In order to simultaneously satisfy low D{sub it} and small hysteresis, the effectivenessmore » of Al{sub 2}O{sub 3}/La{sub 2}O{sub 3}/InGaAs gate stacks with ultrathin La{sub 2}O{sub 3} interfacial layers is in addition evaluated. The reduction of the La{sub 2}O{sub 3} thickness to 0.4 nm in Al{sub 2}O{sub 3}/La{sub 2}O{sub 3}/InGaAs gate stacks leads to the decrease in hysteresis. On the other hand, D{sub it} of the Al{sub 2}O{sub 3}/La{sub 2}O{sub 3}/InGaAs interfaces becomes higher than that of the La{sub 2}O{sub 3}/InGaAs ones, attributable to the diffusion of Al{sub 2}O{sub 3} through La{sub 2}O{sub 3} into InGaAs and resulting modification of the La{sub 2}O{sub 3}/InGaAs interface structure. As a result of the effective passivation effect of La{sub 2}O{sub 3} on InGaAs, however, the Al{sub 2}O{sub 3}/10 cycle (0.4 nm) La{sub 2}O{sub 3}/InGaAs gate stacks can realize still lower D{sub it} with maintaining small hysteresis and low leakage current than the conventional Al{sub 2}O{sub 3}/InGaAs MOS interfaces.« less

Temperature-Dependent and Gate-Tunable Rectification in a Black Phosphorus/WS2 van der Waals Heterojunction Diode.

PubMed

Dastgeer, Ghulam; Khan, Muhammad Farooq; Nazir, Ghazanfar; Afzal, Amir Muhammad; Aftab, Sikandar; Naqvi, Bilal Abbas; Cha, Janghwan; Min, Kyung-Ah; Jamil, Yasir; Jung, Jongwan; Hong, Suklyun; Eom, Jonghwa

2018-04-18

Heterostructures comprising two-dimensional (2D) semiconductors fabricated by individual stacking exhibit interesting characteristics owing to their 2D nature and atomically sharp interface. As an emerging 2D material, black phosphorus (BP) nanosheets have drawn much attention because of their small band gap semiconductor characteristics along with high mobility. Stacking structures composed of p-type BP and n-type transition metal dichalcogenides can produce an atomically sharp interface with van der Waals interaction which leads to p-n diode functionality. In this study, for the first time, we fabricated a heterojunction p-n diode composed of BP and WS 2 . The rectification effects are examined for monolayer, bilayer, trilayer, and multilayer WS 2 flakes in our BP/WS 2 van der Waals heterojunction diodes and also verified by density function theory calculations. We report superior functionalities as compared to other van der Waals heterojunction, such as efficient gate-dependent static rectification of 2.6 × 10 4 , temperature dependence, thickness dependence of rectification, and ideality factor of the device. The temperature dependence of Zener breakdown voltage and avalanche breakdown voltage were analyzed in the same device. Additionally, superior optoelectronic characteristics such as photoresponsivity of 500 mA/W and external quantum efficiency of 103% are achieved in the BP/WS 2 van der Waals p-n diode, which is unprecedented for BP/transition metal dichalcogenides heterostructures. The BP/WS 2 van der Waals p-n diodes have a profound potential to fabricate rectifiers, solar cells, and photovoltaic diodes in 2D semiconductor electronics and optoelectronics.

Gate-controlled topological conducting channels in bilayer graphene

NASA Astrophysics Data System (ADS)

Li, Jing; Wang, Ke; McFaul, Kenton J.; Zern, Zachary; Ren, Yafei; Watanabe, Kenji; Taniguchi, Takashi; Qiao, Zhenhua; Zhu, Jun

2016-12-01

The existence of inequivalent valleys K and K‧ in the momentum space of 2D hexagonal lattices provides a new electronic degree of freedom, the manipulation of which can potentially lead to new types of electronics, analogous to the role played by electron spin. In materials with broken inversion symmetry, such as an electrically gated bilayer graphene (BLG), the momentum-space Berry curvature Ω carries opposite sign in the K and K‧ valleys. A sign reversal of Ω along an internal boundary of the sheet gives rise to counterpropagating 1D conducting modes encoded with opposite-valley indices. These metallic states are topologically protected against backscattering in the absence of valley-mixing scattering, and thus can carry current ballistically. In BLG, the reversal of Ω can occur at the domain wall of AB- and BA-stacked domains, or at the line junction of two oppositely gated regions. The latter approach can provide a scalable platform to implement valleytronic operations, such as valves and waveguides, but it is technically challenging to realize. Here, we fabricate a dual-split-gate structure in BLG and present evidence of the predicted metallic states in electrical transport. The metallic states possess a mean free path (MFP) of up to a few hundred nanometres in the absence of a magnetic field. The application of a perpendicular magnetic field suppresses the backscattering significantly and enables a junction 400 nm in length to exhibit conductance close to the ballistic limit of 4e2/h at 8 T. Our experiment paves the way to the realization of gate-controlled ballistic valley transport and the development of valleytronic applications in atomically thin materials.

Development of a repetitive compact torus injector

NASA Astrophysics Data System (ADS)

Onchi, Takumi; McColl, David; Dreval, Mykola; Rohollahi, Akbar; Xiao, Chijin; Hirose, Akira; Zushi, Hideki

2013-10-01

A system for Repetitive Compact Torus Injection (RCTI) has been developed at the University of Saskatchewan. CTI is a promising fuelling technology to directly fuel the core region of tokamak reactors. In addition to fuelling, CTI has also the potential for (a) optimization of density profile and thus bootstrap current and (b) momentum injection. For steady-state reactor operation, RCTI is necessary. The approach to RCTI is to charge a storage capacitor bank with a large capacitance and quickly charge the CT capacitor bank through a stack of integrated-gate bipolar transistors (IGBTs). When the CT bank is fully charged, the IGBT stack will be turned off to isolate banks, and CT formation/acceleration sequence will start. After formation of each CT, the fast bank will be replenished and a new CT will be formed and accelerated. Circuits for the formation and the acceleration in University of Saskatchewan CT Injector (USCTI) have been modified. Three CT shots at 10 Hz or eight shots at 1.7 Hz have been achieved. This work has been sponsored by the CRC and NSERC, Canada.

Evaluation of the Telecommunications Protocol Processing Subsystem Using Reconfigurable Interoperable Gate Array

NASA Technical Reports Server (NTRS)

Pang, Jackson; Liddicoat, Albert; Ralston, Jesse; Pingree, Paula

2006-01-01

The current implementation of the Telecommunications Protocol Processing Subsystem Using Reconfigurable Interoperable Gate Arrays (TRIGA) is equipped with CFDP protocol and CCSDS Telemetry and Telecommand framing schemes to replace the CPU intensive software counterpart implementation for reliable deep space communication. We present the hardware/software co-design methodology used to accomplish high data rate throughput. The hardware CFDP protocol stack implementation is then compared against the two recent flight implementations. The results from our experiments show that TRIGA offers more than 3 orders of magnitude throughput improvement with less than one-tenth of the power consumption.

Role of oxygen vacancies in HfO2-based gate stack breakdown

NASA Astrophysics Data System (ADS)

Wu, X.; Migas, D. B.; Li, X.; Bosman, M.; Raghavan, N.; Borisenko, V. E.; Pey, K. L.

2010-04-01

We study the influence of multiple oxygen vacancy traps in the percolated dielectric on the postbreakdown random telegraph noise (RTN) digital fluctuations in HfO2-based metal-oxide-semiconductor transistors. Our electrical characterization results indicate that these digital fluctuations are triggered only beyond a certain gate stress voltage. First-principles calculations suggest the oxygen vacancies to be responsible for the formation of a subband in the forbidden band gap region, which affects the triggering voltage (VTRIG) for the RTN fluctuations and leads to a shrinkage of the HfO2 band gap.

High-performance SEGISFET pH Sensor using the structure of double-gate a-IGZO TFTs with engineered gate oxides

NASA Astrophysics Data System (ADS)

Pyo, Ju-Young; Cho, Won-Ju

2017-03-01

In this paper, we propose a high-performance separative extended gate ion-sensitive field-effect transistor (SEGISFET) that consists of a tin dioxide (SnO2) SEG sensing part and a double-gate structure amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor (TFT) with tantalum pentoxide/silicon dioxide (Ta2O5/SiO2)-engineered top-gate oxide. To increase sensitivity, we maximized the capacitive coupling ratio by applying high-k dielectric at the top-gate oxide layer. As an engineered top-gate oxide, a stack of 25 nm-thick Ta2O5 and 10 nm-thick SiO2 layers was found to simultaneously satisfy a small equivalent oxide thickness (˜17.14 nm), a low leakage current, and a stable interfacial property. The threshold-voltage instability, which is a fundamental issue in a-IGZO TFTs, was improved by low-temperature post-deposition annealing (˜87 °C) using microwave irradiation. The double-gate structure a-IGZO TFTs with engineered top-gate oxide exhibited high mobility, small subthreshold swing, high drive current, and larger on/off current ratio. The a-IGZO SEGISFETs with a dual-gate sensing mode showed a pH sensitivity of 649.04 mV pH-1, which is far beyond the Nernst limit. The non-ideal behavior of ISFETs, hysteresis, and drift effect also improved. These results show that the double-gate structure a-IGZO TFTs with engineered top-gate oxide can be a good candidate for cheap and disposable SEGISFET sensors.

Investigation on interfacial and electrical properties of Ge MOS capacitor with different NH3-plasma treatment procedure

NASA Astrophysics Data System (ADS)

Liu, Xiaoyu; Xu, Jingping; Liu, Lu; Cheng, Zhixiang; Huang, Yong; Gong, Jingkang

2017-08-01

The effects of different NH3-plasma treatment procedures on interfacial and electrical properties of Ge MOS capacitors with stacked gate dielectric of HfTiON/TaON were investigated. The NH3-plasma treatment was performed at different steps during fabrication of the stacked gate dielectric, i.e. before or after interlayer (TaON) deposition, or after deposition of high-k dielectric (HfTiON). It was found that the excellent interface quality with an interface-state density of 4.79 × 1011 eV-1 cm-2 and low gate leakage current (3.43 × 10-5 A/cm2 at {V}{{g}}=1 {{V}}) could be achieved for the sample with NH3-plasma treatment directly on the Ge surface before TaON deposition. The involved mechanisms are attributed to the fact that the NH3-plasma can directly react with the Ge surface to form more Ge-N bonds, i.e. more GeO x Ny, which effectively blocks the inter-diffusion of elements and suppresses the formation of unstable GeO x interfacial layer, and also passivates oxygen vacancies and dangling bonds near/at the interface due to more N incorporation and decomposed H atoms from the NH3-plasma. Project supported by the National Natural Science Foundation of China (Nos. 61176100, 61274112).

Accurate characterization and understanding of interface trap density trends between atomic layer deposited dielectrics and AlGaN/GaN with bonding constraint theory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ramanan, Narayanan; Lee, Bongmook; Misra, Veena, E-mail: vmisra@ncsu.edu

2015-06-15

Many dielectrics have been proposed for the gate stack or passivation of AlGaN/GaN based metal oxide semiconductor heterojunction field effect transistors, to reduce gate leakage and current collapse, both for power and RF applications. Atomic Layer Deposition (ALD) is preferred for dielectric deposition as it provides uniform, conformal, and high quality films with precise monolayer control of film thickness. Identification of the optimum ALD dielectric for the gate stack or passivation requires a critical investigation of traps created at the dielectric/AlGaN interface. In this work, a pulsed-IV traps characterization method has been used for accurate characterization of interface traps withmore » a variety of ALD dielectrics. High-k dielectrics (HfO{sub 2}, HfAlO, and Al{sub 2}O{sub 3}) are found to host a high density of interface traps with AlGaN. In contrast, ALD SiO{sub 2} shows the lowest interface trap density (<2 × 10{sup 12 }cm{sup −2}) after annealing above 600 °C in N{sub 2} for 60 s. The trend in observed trap densities is subsequently explained with bonding constraint theory, which predicts a high density of interface traps due to a higher coordination state and bond strain in high-k dielectrics.« less

Two-dimensional GaSe/MoSe 2 misfit bilayer heterojunctions by van der Waals epitaxy

DOE Office of Scientific and Technical Information (OSTI.GOV)

Li, Xufan; Lin, Ming-Wei; Lin, Junhao

Two-dimensional (2D) heterostructures hold the promise for future atomically-thin electronics and optoelectronics due to their diverse functionalities. While heterostructures consisting of different transition metal dichacolgenide monolayers with well-matched lattices and novel physical properties have been successfully fabricated via van der Waals (vdW) or edge epitaxy, constructing heterostructures from monolayers of layered semiconductors with large lattice misfits still remains challenging. Here, we report the growth of monolayer GaSe/MoSe 2 heterostructures with large lattice misfit by two-step chemical vapor deposition (CVD). Both vertically stacked and lateral heterostructures are demonstrated. The vertically stacked GaSe/MoSe 2 heterostructures exhibit vdW epitaxy with well-aligned lattice orientationmore » between the two layers, forming an incommensurate vdW heterostructure. However, the lateral heterostructures exhibit no lateral epitaxial alignment at the interface between GaSe and MoSe 2 crystalline domains. Instead of a direct lateral connection at the boundary region where the same lattice orientation is observed between GaSe and MoSe 2 monolayer domains in lateral GaSe/MoSe 2 heterostructures, GaSe monolayers are found to overgrow MoSe 2 during CVD, forming a stripe of vertically stacked vdW heterostructure at the crystal interface. Such vertically-stacked vdW GaSe/MoSe 2 heterostructures are shown to form p-n junctions with effective transport and separation of photo-generated charge carriers between layers, resulting in a gate-tunable photovoltaic response. In conclusion, these GaSe/MoSe 2 vdW heterostructures should have applications as gate-tunable field-effect transistors, photodetectors, and solar cells.« less

Two-dimensional GaSe/MoSe 2 misfit bilayer heterojunctions by van der Waals epitaxy

DOE PAGES

Li, Xufan; Lin, Ming-Wei; Lin, Junhao; ...

2016-04-01

Two-dimensional (2D) heterostructures hold the promise for future atomically-thin electronics and optoelectronics due to their diverse functionalities. While heterostructures consisting of different transition metal dichacolgenide monolayers with well-matched lattices and novel physical properties have been successfully fabricated via van der Waals (vdW) or edge epitaxy, constructing heterostructures from monolayers of layered semiconductors with large lattice misfits still remains challenging. Here, we report the growth of monolayer GaSe/MoSe 2 heterostructures with large lattice misfit by two-step chemical vapor deposition (CVD). Both vertically stacked and lateral heterostructures are demonstrated. The vertically stacked GaSe/MoSe 2 heterostructures exhibit vdW epitaxy with well-aligned lattice orientationmore » between the two layers, forming an incommensurate vdW heterostructure. However, the lateral heterostructures exhibit no lateral epitaxial alignment at the interface between GaSe and MoSe 2 crystalline domains. Instead of a direct lateral connection at the boundary region where the same lattice orientation is observed between GaSe and MoSe 2 monolayer domains in lateral GaSe/MoSe 2 heterostructures, GaSe monolayers are found to overgrow MoSe 2 during CVD, forming a stripe of vertically stacked vdW heterostructure at the crystal interface. Such vertically-stacked vdW GaSe/MoSe 2 heterostructures are shown to form p-n junctions with effective transport and separation of photo-generated charge carriers between layers, resulting in a gate-tunable photovoltaic response. In conclusion, these GaSe/MoSe 2 vdW heterostructures should have applications as gate-tunable field-effect transistors, photodetectors, and solar cells.« less

A mixed solution-processed gate dielectric for zinc-tin oxide thin-film transistor and its MIS capacitance

NASA Astrophysics Data System (ADS)

Kim, Hunho; Kwack, Young-Jin; Yun, Eui-Jung; Choi, Woon-Seop

2016-09-01

Solution-processed gate dielectrics were fabricated with the combined ZrO2 and Al2O3 (ZAO) in the form of mixed and stacked types for oxide thin film transistors (TFTs). ZAO thin films prepared with double coatings for solid gate dielectrics were characterized by analytical tools. For the first time, the capacitance of the oxide semiconductor was extracted from the capacitance-voltage properties of the zinc-tin oxide (ZTO) TFTs with the combined ZAO dielectrics by using the proposed metal-insulator-semiconductor (MIS) structure model. The capacitance evolution of the semiconductor from the TFT model structure described well the threshold voltage shift observed in the ZTO TFT with the ZAO (1:2) gate dielectric. The electrical properties of the ZTO TFT with a ZAO (1:2) gate dielectric showed low voltage driving with a field effect mobility of 37.01 cm2/Vs, a threshold voltage of 2.00 V, an on-to-off current ratio of 1.46 × 105, and a subthreshold slope of 0.10 V/dec.

A mixed solution-processed gate dielectric for zinc-tin oxide thin-film transistor and its MIS capacitance

PubMed Central

Kim, Hunho; Kwack, Young-Jin; Yun, Eui-Jung; Choi, Woon-Seop

2016-01-01

Solution-processed gate dielectrics were fabricated with the combined ZrO2 and Al2O3 (ZAO) in the form of mixed and stacked types for oxide thin film transistors (TFTs). ZAO thin films prepared with double coatings for solid gate dielectrics were characterized by analytical tools. For the first time, the capacitance of the oxide semiconductor was extracted from the capacitance-voltage properties of the zinc-tin oxide (ZTO) TFTs with the combined ZAO dielectrics by using the proposed metal-insulator-semiconductor (MIS) structure model. The capacitance evolution of the semiconductor from the TFT model structure described well the threshold voltage shift observed in the ZTO TFT with the ZAO (1:2) gate dielectric. The electrical properties of the ZTO TFT with a ZAO (1:2) gate dielectric showed low voltage driving with a field effect mobility of 37.01 cm2/Vs, a threshold voltage of 2.00 V, an on-to-off current ratio of 1.46 × 105, and a subthreshold slope of 0.10 V/dec. PMID:27641430

GaN HEMTs with p-GaN gate: field- and time-dependent degradation

NASA Astrophysics Data System (ADS)

Meneghesso, G.; Meneghini, M.; Rossetto, I.; Canato, E.; Bartholomeus, J.; De Santi, C.; Trivellin, N.; Zanoni, E.

2017-02-01

GaN-HEMTs with p-GaN gate have recently demonstrated to be excellent normally-off devices for application in power conversion systems, thanks to the high and robust threshold voltage (VTH>1 V), the high breakdown voltage, and the low dynamic Ron increase. For this reason, studying the stability and reliability of these devices under high stress conditions is of high importance. This paper reports on our most recent results on the field- and time-dependent degradation of GaN-HEMTs with p-GaN gate submitted to stress with positive gate bias. Based on combined step-stress experiments, constant voltage stress and electroluminescence testing we demonstrated that: (i) when submitted to high/positive gate stress, the transistors may show a negative threshold voltage shift, that is ascribed to the injection of holes from the gate metal towards the p-GaN/AlGaN interface; (ii) in a step-stress experiment, the analyzed commercial devices fail at gate voltages higher than 9-10 V, due to the extremely high electric field over the p-GaN/AlGaN stack; (iii) constant voltage stress tests indicate that the failure is also time-dependent and Weibull distributed. The several processes that can explain the time-dependent failure are discussed in the following.

Stacking with stochastic cooling

NASA Astrophysics Data System (ADS)

Caspers, Fritz; Möhl, Dieter

2004-10-01

Accumulation of large stacks of antiprotons or ions with the aid of stochastic cooling is more delicate than cooling a constant intensity beam. Basically the difficulty stems from the fact that the optimized gain and the cooling rate are inversely proportional to the number of particles 'seen' by the cooling system. Therefore, to maintain fast stacking, the newly injected batch has to be strongly 'protected' from the Schottky noise of the stack. Vice versa the stack has to be efficiently 'shielded' against the high gain cooling system for the injected beam. In the antiproton accumulators with stacking ratios up to 105 the problem is solved by radial separation of the injection and the stack orbits in a region of large dispersion. An array of several tapered cooling systems with a matched gain profile provides a continuous particle flux towards the high-density stack core. Shielding of the different systems from each other is obtained both through the spatial separation and via the revolution frequencies (filters). In the 'old AA', where the antiproton collection and stacking was done in one single ring, the injected beam was further shielded during cooling by means of a movable shutter. The complexity of these systems is very high. For more modest stacking ratios, one might use azimuthal rather than radial separation of stack and injected beam. Schematically half of the circumference would be used to accept and cool new beam and the remainder to house the stack. Fast gating is then required between the high gain cooling of the injected beam and the low gain stack cooling. RF-gymnastics are used to merge the pre-cooled batch with the stack, to re-create free space for the next injection, and to capture the new batch. This scheme is less demanding for the storage ring lattice, but at the expense of some reduction in stacking rate. The talk reviews the 'radial' separation schemes and also gives some considerations to the 'azimuthal' schemes.

Gate bias stress stability under light irradiation for indium zinc oxide thin-film transistors based on anodic aluminium oxide gate dielectrics

NASA Astrophysics Data System (ADS)

Li, Min; Lan, Linfeng; Xu, Miao; Wang, Lei; Xu, Hua; Luo, Dongxiang; Zou, Jianhua; Tao, Hong; Yao, Rihui; Peng, Junbiao

2011-11-01

Thin-film transistors (TFTs) using indium zinc oxide as the active layer and anodic aluminium oxide (Al2O3) as the gate dielectric layer were fabricated. The device showed an electron mobility of as high as 10.1 cm2 V-1 s-1, an on/off current ratio of as high as ~108, and a turn-on voltage (Von) of only -0.5 V. Furthermore, this kind of TFTs was very stable under positive bias illumination stress. However, when the device experienced negative bias illumination stress, the threshold voltage shifted to the positive direction. It was found that the instability under negative bias illumination stress (NBIS) was due to the electrons from the Al gate trapping into the Al2O3 dielectric when exposed to the illuminated light. Using a stacked structure of Al2O3/SiO2 dielectrics, the device became more stable under NBIS.

Comparative Study of HfTa-based gate-dielectric Ge metal-oxide-semiconductor capacitors with and without AlON interlayer

NASA Astrophysics Data System (ADS)

Xu, J. P.; Zhang, X. F.; Li, C. X.; Chan, C. L.; Lai, P. T.

2010-04-01

The electrical properties and high-field reliability of HfTa-based gate-dielectric metal-oxide-semiconductor (MOS) devices with and without AlON interlayer on Ge substrate are investigated. Experimental results show that the MOS capacitor with HfTaON/AlON stack gate dielectric exhibits low interface-state/oxide-charge densities, low gate leakage, small capacitance equivalent thickness (˜1.1 nm), and high dielectric constant (˜20). All of these should be attributed to the blocking role of the ultrathin AlON interlayer against interdiffusions of Ge, Hf, and Ta and penetration of O into the Ge substrate, with the latter effectively suppressing the unintentional formation of unstable poor-quality low- k GeO x and giving a superior AlON/Ge interface. Moreover, incorporation of N into both the interlayer and high- k dielectric further improves the device reliability under high-field stress through the formation of strong N-related bonds.

Reliability investigation of high-k/metal gate in nMOSFETs by three-dimensional kinetic Monte-Carlo simulation with multiple trap interactions

NASA Astrophysics Data System (ADS)

Li, Yun; Jiang, Hai; Lun, Zhiyuan; Wang, Yijiao; Huang, Peng; Hao, Hao; Du, Gang; Zhang, Xing; Liu, Xiaoyan

2016-04-01

Degradation behaviors in the high-k/metal gate stacks of nMOSFETs are investigated by three-dimensional (3D) kinetic Monte-Carlo (KMC) simulation with multiple trap coupling. Novel microscopic mechanisms are simultaneously considered in a compound system: (1) trapping/detrapping from/to substrate/gate; (2) trapping/detrapping to other traps; (3) trap generation and recombination. Interacting traps can contribute to random telegraph noise (RTN), bias temperature instability (BTI), and trap-assisted tunneling (TAT). Simulation results show that trap interaction induces higher probability and greater complexity in trapping/detrapping processes and greatly affects the characteristics of RTN and BTI. Different types of trap distribution cause largely different behaviors of RTN, BTI, and TAT. TAT currents caused by multiple trap coupling are sensitive to the gate voltage. Moreover, trap generation and recombination have great effects on the degradation of HfO2-based nMOSFETs under a large stress.

Characterization and metrology implications of the 1997 NTRS

NASA Astrophysics Data System (ADS)

Class, W.; Wortman, J. J.

1998-11-01

In the Front-end (transistor forming) area of silicon CMOS device processing, several NTRS difficult challenges have been identified including; scaled and alternate gate dielectric materials, new DRAM dielectric materials, alternate gate materials, elevated contact structures, engineered channels, and large-area cost-effective silicon substrates. This paper deals with some of the characterization and metrology challenges facing the industry if it is to meet the projected needs identified in the NTRS. In the areas of gate and DRAM dielectric, scaling requires that existing material layers be thinned to maximize capacitance. For the current gate dielectric, SiO2 and its nitrided derivatives, direct tunneling will limit scaling to approximately 1.5nm for logic applications before power losses become unacceptable. Low power logic and memory applications may limit scaling to the 2.0-2.2nm range. Beyond these limits, dielectric materials having higher dielectric constant, will permit continued capacitance increases while allowing for the use of thicker dielectric layers, where tunneling may be minimized. In the near term silicon nitride is a promising SiO2 substitute material while in the longer term "high-k" materials such as tantalum pentoxide and barium strontium titanate (BST) will be required. For these latter materials, it is likely that a multilayer dielectric stack will be needed, consisting of an ultra-thin (1-2 atom layer) interfacial SiO2 layer and a high-k overlayer. Silicon wafer surface preparation control, as well as the control of composition, crystal structure, and thickness for such stacks pose significant characterization and metrology challenges. In addition to the need for new gate dielectric materials, new gate materials will be required to overcome the limitations of the current doped polysilicon gate materials. Such a change has broad ramifications on device electrical performance and manufacturing process robustness which again implies a broad range of new characterization and metrology requirements. Finally, the doped structure of the MOS transistor must scale to very small lateral and depth dimensions, and thermal budgets must be reduced to permit the retention of very abrupt highly doped drain and channel engineered structures. Eventually, the NTRS forecasts the need for an elevated contact structure. Here, there are significant challenges associated with three-dimensional dopant profiling, measurement of dopant activity in ultra-shallow device regions, as well as point defect metrology and characterization.

Temperature dependence of trapping effects in metal gates/Al2O3/InGaAs stacks

NASA Astrophysics Data System (ADS)

Palumbo, F.; Pazos, S.; Aguirre, F.; Winter, R.; Krylov, I.; Eizenberg, M.

2017-06-01

The influence of the temperature on Metal Gate/Al2O3/n-InGaAs stacks has been studied by means of capacitance-voltage (C-V) hysteresis and flat band voltage as function of both negative and positive stress fields. It was found that the de-trapping effect decreases at low-temperature, indicating that the de-trapping of trapped electrons from oxide traps may be performed via Al2O3/InGaAs interface defects. The dependence of the C-V hysteresis on the stress field at different temperatures in our InGaAs stacks can be explained in terms of the defect spatial distribution. An oxide defect distribution can be found very close to the metal gate/Al2O3 interface. On the other side, the Al2O3/InGaAs interface presents defects distributed from the interface into the bulk of the oxide, showing the influence of InGaAs on Al2O3 in terms of the spatial defect distribution. At the present, he is a research staff of the National Council of Science and Technology (CONICET), working in the National Commission of Atomic Energy (CNEA) in Buenos Aires, Argentina, well embedded within international research collaboration. Since 2008, he is Professor at the National Technological University (UTN) in Buenos Aires, Argentina. Dr. Palumbo has received research fellowships from: Marie Curie Fellowship within the 7th European Community Framework Programme, Abdus Salam International Centre for Theoretical Physics (ICTP) Italy, National Council of Science and Technology (CONICET) Argentina, and Consiglio Nazionale delle Ricerche (CNR) Italy. He is also a frequent scientific visitor of academic institutions as IMM-CNR-Italy, Minatec Grenoble-France, the Autonomous University of Barcelona-Spain, and the Israel Institute of Technology-Technion. He has authored and co-authored more than 50 papers in international conferences and journals.

Effect of Pr Valence State on Interfacial Structure and Electrical Properties of Pr Oxide/PrON/Ge Gate Stack Structure

NASA Astrophysics Data System (ADS)

Kato, Kimihiko; Sakashita, Mitsuo; Takeuchi, Wakana; Kondo, Hiroki; Nakatsuka, Osamu; Zaima, Shigeaki

2011-04-01

In this study, we investigated the valence state and chemical bonding state of Pr in a Pr oxide/PrON/Ge structure. We clarified the relationship between the valence state of Pr and the Pr oxide/Ge interfacial reaction using Pr oxide/Ge and Pr oxide/PrON/Ge samples. We found the formation of three Pr oxide phases in Pr oxide films; hexagonal Pr2O3 (h-Pr2O3) (Pr3+), cubic Pr2O3 (c-Pr2O3) (Pr3+), and c-PrO2 (Pr4+). We also investigated the effect of a nitride interlayer on the interfacial reaction in Pr oxide/Ge gate stacks. In a sample with a nitride interlayer (Pr oxide/PrON/Ge), metallic Pr-Pr bonds are also formed in the c-Pr2O3 film. After annealing in H2 ambient, the diffusion of Ge into Pr oxide is not observed in this sample. Pr-Pr bonds probably prevent the interfacial reaction and Ge oxide formation, considering that the oxygen chemical potential of this film is lower than that of a GeO2/Ge system. On the other hand, the rapid thermal oxidation (RTO) treatment terminates the O vacancies and defects in c-Pr2O3. As a result, c-PrO2 with tetravalent Pr is formed in the Pr oxide/PrON/Ge sample with RTO. In this sample, the leakage current density is effectively decreased in comparison with the sample without RTO. Hydrogen termination works effectively in Pr oxide/PrON/Ge samples with and without RTO, and we can achieve an interface state density of as low as 4 ×1011 eV-1·cm-2.

All-printed thin-film transistors from networks of liquid-exfoliated nanosheets

NASA Astrophysics Data System (ADS)

Kelly, Adam G.; Hallam, Toby; Backes, Claudia; Harvey, Andrew; Esmaeily, Amir Sajad; Godwin, Ian; Coelho, João; Nicolosi, Valeria; Lauth, Jannika; Kulkarni, Aditya; Kinge, Sachin; Siebbeles, Laurens D. A.; Duesberg, Georg S.; Coleman, Jonathan N.

2017-04-01

All-printed transistors consisting of interconnected networks of various types of two-dimensional nanosheets are an important goal in nanoscience. Using electrolytic gating, we demonstrate all-printed, vertically stacked transistors with graphene source, drain, and gate electrodes, a transition metal dichalcogenide channel, and a boron nitride (BN) separator, all formed from nanosheet networks. The BN network contains an ionic liquid within its porous interior that allows electrolytic gating in a solid-like structure. Nanosheet network channels display on:off ratios of up to 600, transconductances exceeding 5 millisiemens, and mobilities of >0.1 square centimeters per volt per second. Unusually, the on-currents scaled with network thickness and volumetric capacitance. In contrast to other devices with comparable mobility, large capacitances, while hindering switching speeds, allow these devices to carry higher currents at relatively low drive voltages.

Interfacial, Electrical, and Band Alignment Characteristics of HfO2/Ge Stacks with In Situ-Formed SiO2 Interlayer by Plasma-Enhanced Atomic Layer Deposition

NASA Astrophysics Data System (ADS)

Cao, Yan-Qiang; Wu, Bing; Wu, Di; Li, Ai-Dong

2017-05-01

In situ-formed SiO2 was introduced into HfO2 gate dielectrics on Ge substrate as interlayer by plasma-enhanced atomic layer deposition (PEALD). The interfacial, electrical, and band alignment characteristics of the HfO2/SiO2 high-k gate dielectric stacks on Ge have been well investigated. It has been demonstrated that Si-O-Ge interlayer is formed on Ge surface during the in situ PEALD SiO2 deposition process. This interlayer shows fantastic thermal stability during annealing without obvious Hf-silicates formation. In addition, it can also suppress the GeO2 degradation. The electrical measurements show that capacitance equivalent thickness of 1.53 nm and a leakage current density of 2.1 × 10-3 A/cm2 at gate bias of Vfb + 1 V was obtained for the annealed sample. The conduction (valence) band offsets at the HfO2/SiO2/Ge interface with and without PDA are found to be 2.24 (2.69) and 2.48 (2.45) eV, respectively. These results indicate that in situ PEALD SiO2 may be a promising interfacial control layer for the realization of high-quality Ge-based transistor devices. Moreover, it can be demonstrated that PEALD is a much more powerful technology for ultrathin interfacial control layer deposition than MOCVD.

Interfacial, Electrical, and Band Alignment Characteristics of HfO2/Ge Stacks with In Situ-Formed SiO2 Interlayer by Plasma-Enhanced Atomic Layer Deposition.

PubMed

Cao, Yan-Qiang; Wu, Bing; Wu, Di; Li, Ai-Dong

2017-12-01

In situ-formed SiO 2 was introduced into HfO 2 gate dielectrics on Ge substrate as interlayer by plasma-enhanced atomic layer deposition (PEALD). The interfacial, electrical, and band alignment characteristics of the HfO 2 /SiO 2 high-k gate dielectric stacks on Ge have been well investigated. It has been demonstrated that Si-O-Ge interlayer is formed on Ge surface during the in situ PEALD SiO 2 deposition process. This interlayer shows fantastic thermal stability during annealing without obvious Hf-silicates formation. In addition, it can also suppress the GeO 2 degradation. The electrical measurements show that capacitance equivalent thickness of 1.53 nm and a leakage current density of 2.1 × 10 -3 A/cm 2 at gate bias of V fb  + 1 V was obtained for the annealed sample. The conduction (valence) band offsets at the HfO 2 /SiO 2 /Ge interface with and without PDA are found to be 2.24 (2.69) and 2.48 (2.45) eV, respectively. These results indicate that in situ PEALD SiO 2 may be a promising interfacial control layer for the realization of high-quality Ge-based transistor devices. Moreover, it can be demonstrated that PEALD is a much more powerful technology for ultrathin interfacial control layer deposition than MOCVD.

MoS2 Negative-Capacitance Field-Effect Transistors with Subthreshold Swing below the Physics Limit.

PubMed

Liu, Xingqiang; Liang, Renrong; Gao, Guoyun; Pan, Caofeng; Jiang, Chunsheng; Xu, Qian; Luo, Jun; Zou, Xuming; Yang, Zhenyu; Liao, Lei; Wang, Zhong Lin

2018-05-21

The Boltzmann distribution of electrons induced fundamental barrier prevents subthreshold swing (SS) from less than 60 mV dec -1 at room temperature, leading to high energy consumption of MOSFETs. Herein, it is demonstrated that an aggressive introduction of the negative capacitance (NC) effect of ferroelectrics can decisively break the fundamental limit governed by the "Boltzmann tyranny". Such MoS 2 negative-capacitance field-effect transistors (NC-FETs) with self-aligned top-gated geometry demonstrated here pull down the SS value to 42.5 mV dec -1 , and simultaneously achieve superior performance of a transconductance of 45.5 μS μm and an on/off ratio of 4 × 10 6 with channel length less than 100 nm. Furthermore, the inserted HfO 2 layer not only realizes a stable NC gate stack structure, but also prevents the ferroelectric P(VDF-TrFE) from fatigue with robust stability. Notably, the fabricated MoS 2 NC-FETs are distinctly different from traditional MOSFETs. The on-state current increases as the temperature decreases even down to 20 K, and the SS values exhibit nonlinear dependence with temperature due to the implementation of the ferroelectric gate stack. The NC-FETs enable fundamental applications through overcoming the Boltzmann limit in nanoelectronics and open up an avenue to low-power transistors needed for many exciting long-endurance portable consumer products. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

A novel nanoscaled Schottky barrier based transmission gate and its digital circuit applications

NASA Astrophysics Data System (ADS)

Kumar, Sunil; Loan, Sajad A.; Alamoud, Abdulrahman M.

2017-04-01

In this work we propose and simulate a compact nanoscaled transmission gate (TG) employing a single Schottky barrier based transistor in the transmission path and a single transistor based Sajad-Sunil-Schottky (SSS) device as an inverter. Therefore, just two transistors are employed to realize a complete transmission gate which normally consumes four transistors in the conventional technology. The transistors used to realize the transmission path and the SSS inverter in the proposed TG are the double gate Schottky barrier devices, employing stacks of two metal silicides, platinum silicide (PtSi) and erbium silicide (ErSi). It has been observed that the realization of the TG gate by the proposed technology has resulted into a compact structure, with reduced component count, junctions, interconnections and regions in comparison to the conventional technology. The further focus of this work is on the application part of the proposed technology. So for the first time, the proposed technology has been used to realize various combinational circuits, like a two input AND gate, a 2:1 multiplexer and a two input XOR circuits. It has been observed that the transistor count has got reduced by half in a TG, two input AND gate, 2:1 multiplexer and in a two input XOR gate. Therefore, a significant reduction in transistor count and area requirement can be achieved by using the proposed technology. The proposed technology can be also used to perform the compact realization of other combinational and sequential circuitry in future.

Low-voltage high-speed programming gate-all-around floating gate memory cell with tunnel barrier engineering

NASA Astrophysics Data System (ADS)

Hamzah, Afiq; Ezaila Alias, N.; Ismail, Razali

2018-06-01

The aim of this study is to investigate the memory performances of gate-all-around floating gate (GAA-FG) memory cell implementing engineered tunnel barrier concept of variable oxide thickness (VARIOT) of low-k/high-k for several high-k (i.e., Si3N4, Al2O3, HfO2, and ZrO2) with low-k SiO2 using three-dimensional (3D) simulator Silvaco ATLAS. The simulation work is conducted by initially determining the optimized thickness of low-k/high-k barrier-stacked and extracting their Fowler–Nordheim (FN) coefficients. Based on the optimized parameters the device performances of GAA-FG for fast program operation and data retention are assessed using benchmark set by 6 and 8 nm SiO2 tunnel layer respectively. The programming speed has been improved and wide memory window with 30% increment from conventional SiO2 has been obtained using SiO2/Al2O3 tunnel layer due to its thin low-k dielectric thickness. Furthermore, given its high band edges only 1% of charge-loss is expected after 10 years of ‑3.6/3.6 V gate stress.

Reducing respiratory motion artifacts in positron emission tomography through retrospective stacking

DOE Office of Scientific and Technical Information (OSTI.GOV)

Thorndyke, Brian; Schreibmann, Eduard; Koong, Albert

Respiratory motion artifacts in positron emission tomography (PET) imaging can alter lesion intensity profiles, and result in substantially reduced activity and contrast-to-noise ratios (CNRs). We propose a corrective algorithm, coined 'retrospective stacking' (RS), to restore image quality without requiring additional scan time. Retrospective stacking uses b-spline deformable image registration to combine amplitude-binned PET data along the entire respiratory cycle into a single respiratory end point. We applied the method to a phantom model consisting of a small, hot vial oscillating within a warm background, as well as to {sup 18}FDG-PET images of a pancreatic and a liver patient. Comparisons weremore » made using cross-section visualizations, activity profiles, and CNRs within the region of interest. Retrospective stacking was found to properly restore the lesion location and intensity profile in all cases. In addition, RS provided CNR improvements up to three-fold over gated images, and up to five-fold over ungated data. These phantom and patient studies demonstrate that RS can correct for lesion motion and deformation, while substantially improving tumor visibility and background noise.« less

Edge states in gated bilayer-monolayer graphene ribbons and bilayer domain walls

NASA Astrophysics Data System (ADS)

Mirzakhani, M.; Zarenia, M.; Peeters, F. M.

2018-05-01

Using the effective continuum model, the electron energy spectrum of gated bilayer graphene with a step-like region of decoupled graphene layers at the edge of the sample is studied. Different types of coupled-decoupled interfaces are considered, i.e., zigzag (ZZ) and armchair junctions, which result in significant different propagating states. Two non-valley-polarized conducting edge states are observed for ZZ type, which are mainly located around the ZZ-ended graphene layers. Additionally, we investigated both BA-BA and BA-AB domain walls in the gated bilayer graphene within the continuum approximation. Unlike the BA-BA domain wall, which exhibits gapped insulating behaviour, the domain walls surrounded by different stackings of bilayer regions feature valley-polarized edge states. Our findings are consistent with other theoretical calculations, such as from the tight-binding model and first-principles calculations, and agree with experimental observations.

Gate-tunable rectification inversion and photovoltaic detection in graphene/WSe{sub 2} heterostructures

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gao, Anyuan; Liu, Erfu; Long, Mingsheng

2016-05-30

We studied electrical transport properties including gate-tunable rectification inversion and polarity inversion, in atomically thin graphene/WSe{sub 2} heterojunctions. Such engrossing characteristics are attributed to the gate tunable mismatch of Fermi levels of graphene and WSe{sub 2}. Also, such atomically thin heterostructure shows excellent performances on photodetection. The responsivity of 66.2 mA W{sup −1} (without bias voltage) and 350 A W{sup −1} (with 1 V bias voltage) can be reached. What is more, the devices show great external quantum efficiency of 800%, high detectivity of 10{sup 13} cm Hz{sup 1/2}/W, and fast response time of 30 μs. Our study reveals that vertical stacking of 2D materials has great potentialmore » for multifunctional electronic and optoelectronic device applications in the future.« less

Effect of high-pressure H{sub 2}O treatment on elimination of interfacial GeO{sub X} layer between ZrO{sub 2} and Ge stack

DOE Office of Scientific and Technical Information (OSTI.GOV)

Huang, Chen-Shuo; Liu, Po-Tsun

2011-08-22

This investigation demonstrates the effect of high-pressure H{sub 2}O treatment on the elimination of the interfacial germanium suboxide (GeO{sub X}) layer between ZrO{sub 2} and Ge. The formation of GeO{sub X} interlayer increases the gate-leakage current and worsen the controllability of the gate during deposition or thermal cycles. X-ray photoelectron spectroscopy and high-resolution transmission electron microscopy reveal that high-pressure H{sub 2}O treatment eliminates the interfacial GeO{sub X} layer. The physical mechanism involves the oxidation of non-oxidized Zr with H{sub 2}O and the reduction of GeO{sub X} by H{sub 2}. Treatment with H{sub 2}O reduces the gate-leakage current of a ZrO{submore » 2}/Ge capacitor by a factor of 1000.« less

Electrical characterization of 4H-SiC metal-oxide-semiconductor structure with Al2O3 stacking layers as dielectric

NASA Astrophysics Data System (ADS)

Chang, P. K.; Hwu, J. G.

2018-02-01

Interface defects and oxide bulk traps conventionally play important roles in the electrical performance of SiC MOS device. Introducing the Al2O3 stack grown by repeated anodization of Al films can notably lower the leakage current in comparison to the SiO2 structure, and enhance the minority carrier response at low frequency when the number of Al2O3 layers increase. In addition, the interface quality is not deteriorated by the stacking of Al2O3 layers because the stacked Al2O3 structure grown by anodization possesses good uniformity. In this work, the capacitance equivalent thickness (CET) of stacking Al2O3 will be up to 19.5 nm and the oxidation process can be carried out at room temperature. For the Al2O3 gate stack with CET 19.5 nm on n-SiC substrate, the leakage current at 2 V is 2.76 × 10-10 A/cm2, the interface trap density at the flatband voltage is 3.01 × 1011 eV-1 cm-2, and the effective breakdown field is 11.8 MV/cm. Frequency dispersion and breakdown characteristics may thus be improved as a result of the reduction in trap density. The Al2O3 stacking layers are capable of maintaining the leakage current as low as possible even after constant voltage stress test, which will further ameliorate reliability characteristics.

Carbon-Nanotube-Confined Vertical Heterostructures with Asymmetric Contacts.

PubMed

Zhang, Jin; Zhang, Kenan; Xia, Bingyu; Wei, Yang; Li, Dongqi; Zhang, Ke; Zhang, Zhixing; Wu, Yang; Liu, Peng; Duan, Xidong; Xu, Yong; Duan, Wenhui; Fan, Shoushan; Jiang, Kaili

2017-10-01

Van der Waals (vdW) heterostructures have received intense attention for their efficient stacking methodology with 2D nanomaterials in vertical dimension. However, it is still a challenge to scale down the lateral size of vdW heterostructures to the nanometer and make proper contacts to achieve optimized performances. Here, a carbon-nanotube-confined vertical heterostructure (CCVH) is employed to address this challenge, in which 2D semiconductors are asymmetrically sandwiched by an individual metallic single-walled carbon nanotube (SWCNT) and a metal electrode. By using WSe 2 and MoS 2 , the CCVH can be made into p-type and n-type field effect transistors with high on/off ratios even when the channel length is 3.3 nm. A complementary inverter was further built with them, indicating their potential in logic circuits with a high integration level. Furthermore, the Fermi level of SWCNTs can be efficiently modulated by the gate voltage, making it competent for both electron and hole injection in the CCVHs. This unique property is shown by the transition of WSe 2 CCVH from unipolar to bipolar, and the transition of WSe 2 /MoS 2 from p-n junction to n-n junction under proper source-drain biases and gate voltages. Therefore, the CCVH, as a member of 1D/2D mixed heterostructures, shows great potentials in future nanoelectronics and nano-optoelectronics. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Fixed interface charges between AlGaN barrier and gate stack composed of in situ grown SiN and Al{sub 2}O{sub 3} in AlGaN/GaN high electron mobility transistors with normally off capability

DOE Office of Scientific and Technical Information (OSTI.GOV)

Capriotti, M., E-mail: mattia.capriotti@tuwien.ac.at; Alexewicz, A.; Fleury, C.

2014-03-17

Using a generalized extraction method, the fixed charge density N{sub int} at the interface between in situ deposited SiN and 5 nm thick AlGaN barrier is evaluated by measurements of threshold voltage V{sub th} of an AlGaN/GaN metal insulator semiconductor high electron mobility transistor as a function of SiN thickness. The thickness of the originally deposited 50 nm thick SiN layer is reduced by dry etching. The extracted N{sub int} is in the order of the AlGaN polarization charge density. The total removal of the in situ SiN cap leads to a complete depletion of the channel region resulting in V{sub th} = +1 V.more » Fabrication of a gate stack with Al{sub 2}O{sub 3} as a second cap layer, deposited on top of the in situ SiN, is not introducing additional fixed charges at the SiN/Al{sub 2}O{sub 3} interface.« less

High-responsivity graphene/InAs nanowire heterojunction near-infrared photodetectors with distinct photocurrent on/off ratios.

PubMed

Miao, Jinshui; Hu, Weida; Guo, Nan; Lu, Zhenyu; Liu, Xingqiang; Liao, Lei; Chen, Pingping; Jiang, Tao; Wu, Shiwei; Ho, Johnny C; Wang, Lin; Chen, Xiaoshuang; Lu, Wei

2015-02-25

Graphene is a promising candidate material for high-speed and ultra-broadband photodetectors. However, graphene-based photodetectors suffer from low photoreponsivity and I(light)/I(dark) ratios due to their negligible-gap nature and small optical absorption. Here, a new type of graphene/InAs nanowire (NW) vertically stacked heterojunction infrared photodetector is reported, with a large photoresponsivity of 0.5 AW(-1) and I(light)/I(dark) ratio of 5 × 10(2), while the photoresponsivity and I(light)/I(dark) ratio of graphene infrared photodetectors are 0.1 mAW(-1) and 1, respectively. The Fermi level (E(F)) of graphene can be widely tuned by the gate voltage owing to its 2D nature. As a result, the back-gated bias can modulate the Schottky barrier (SB) height at the interface between graphene and InAs NWs. Simulations further demonstrate the rectification behavior of graphene/InAs NW heterojunctions and the tunable SB controls charge transport across the vertically stacked heterostructure. The results address key challenges for graphene-based infrared detectors, and are promising for the development of graphene electronic and optoelectronic applications. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Nanometer-scale oxide thin film transistor with potential for high-density image sensor applications.

PubMed

Jeon, Sanghun; Park, Sungho; Song, Ihun; Hur, Ji-Hyun; Park, Jaechul; Kim, Hojung; Kim, Sunil; Kim, Sangwook; Yin, Huaxiang; Chung, U-In; Lee, Eunha; Kim, Changjung

2011-01-01

The integration of electronically active oxide components onto silicon circuits represents an innovative approach to improving the functionality of novel devices. Like most semiconductor devices, complementary-metal-oxide-semiconductor image sensors (CISs) have physical limitations when progressively scaled down to extremely small dimensions. In this paper, we propose a novel hybrid CIS architecture that is based on the combination of nanometer-scale amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) and a conventional Si photo diode (PD). With this approach, we aim to overcome the loss of quantum efficiency and image quality due to the continuous miniaturization of PDs. Specifically, the a-IGZO TFT with 180 nm gate length is probed to exhibit remarkable performance including low 1/f noise and high output gain, despite fabrication temperatures as low as 200 °C. In particular, excellent device performance is achieved using a double-layer gate dielectric (Al₂O₃/SiO₂) combined with a trapezoidal active region formed by a tailored etching process. A self-aligned top gate structure is adopted to ensure low parasitic capacitance. Lastly, three-dimensional (3D) process simulation tools are employed to optimize the four-pixel CIS structure. The results demonstrate how our stacked hybrid device could be the starting point for new device strategies in image sensor architectures. Furthermore, we expect the proposed approach to be applicable to a wide range of micro- and nanoelectronic devices and systems.

Physical understanding of trends in current collapse with atomic layer deposited dielectrics in AlGaN/GaN MOS heterojunction FETs

NASA Astrophysics Data System (ADS)

Ramanan, Narayanan; Lee, Bongmook; Misra, Veena

2016-03-01

Many passivation dielectrics are pursued for suppressing current collapse due to trapping/detrapping of access-region surface traps in AlGaN/GaN based metal oxide semiconductor heterojuction field effect transistors (MOS-HFETs). The suppression of current collapse can potentially be achieved either by reducing the interaction of surface traps with the gate via surface leakage current reduction, or by eliminating surface traps that can interact with the gate. But, the latter is undesirable since a high density of surface donor traps is required to sustain a high 2D electron gas density at the AlGaN/GaN heterointerface and provide a low ON-resistance. This presents a practical trade-off wherein a passivation dielectric with the optimal surface trap characteristics and minimal surface leakage is to be chosen. In this work, we compare MOS-HFETs fabricated with popular ALD gate/passivation dielectrics like SiO2, Al2O3, HfO2 and HfAlO along with an additional thick plasma-enhanced chemical vapor deposition SiO2 passivation. It is found that after annealing in N2 at 700 °C, the stack containing ALD HfAlO provides a combination of low surface leakage and a high density of shallow donor traps. Physics-based TCAD simulations confirm that this combination of properties helps quick de-trapping and minimal current collapse along with a low ON resistance.

Thin film transistors for flexible electronics: contacts, dielectrics and semiconductors.

PubMed

Quevedo-Lopez, M A; Wondmagegn, W T; Alshareef, H N; Ramirez-Bon, R; Gnade, B E

2011-06-01

The development of low temperature, thin film transistor processes that have enabled flexible displays also present opportunities for flexible electronics and flexible integrated systems. Of particular interest are possible applications in flexible sensor systems for unattended ground sensors, smart medical bandages, electronic ID tags for geo-location, conformal antennas, radiation detectors, etc. In this paper, we review the impact of gate dielectrics, contacts and semiconductor materials on thin film transistors for flexible electronics applications. We present our recent results to fully integrate hybrid complementary metal oxide semiconductors comprising inorganic and organic-based materials. In particular, we demonstrate novel gate dielectric stacks and semiconducting materials. The impact of source and drain contacts on device performance is also discussed.

Gate insulator effects on the electrical performance of ZnO thin film transistor on a polyethersulphone substrate.

PubMed

Lee, Jae-Kyu; Choi, Duck-Kyun

2012-07-01

Low temperature processing for fabrication of transistor backplane is a cost effective solution while fabrication on a flexible substrate offers a new opportunity in display business. Combination of both merits is evaluated in this investigation. In this study, the ZnO thin film transistor on a flexible Polyethersulphone (PES) substrate is fabricated using RF magnetron sputtering. Since the selection and design of compatible gate insulator is another important issue to improve the electrical properties of ZnO TFT, we have evaluated three gate insulator candidates; SiO2, SiNx and SiO2/SiNx. The SiO2 passivation on both sides of PES substrate prior to the deposition of ZnO layer was effective to enhance the mechanical and thermal stability. Among the fabricated devices, ZnO TFT employing SiNx/SiO2 stacked gate exhibited the best performance. The device parameters of interest are extracted and the on/off current ratio, field effect mobility, threshold voltage and subthreshold swing are 10(7), 22 cm2/Vs, 1.7 V and 0.4 V/decade, respectively.

Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

PubMed Central

Long, Rathnait D.; McIntyre, Paul C.

2012-01-01

The literature on polar Gallium Nitride (GaN) surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS) devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

Highly efficient gate-tunable photocurrent generation in vertical heterostructures of layered materials

PubMed Central

Yu, Woo Jong; Liu, Yuan; Zhou, Hailong; Yin, Anxiang; Li, Zheng; Huang, Yu

2014-01-01

Layered materials of graphene and MoS2, for example, have recently emerged as an exciting material system for future electronics and optoelectronics. Vertical integration of layered materials can enable the design of novel electronic and photonic devices. Here, we report highly efficient photocurrent generation from vertical heterostructures of layered materials. We show that vertically stacked graphene–MoS2–graphene and graphene–MoS2–metal junctions can be created with a broad junction area for efficient photon harvesting. The weak electrostatic screening effect of graphene allows the integration of single or dual gates under and/or above the vertical heterostructure to tune the band slope and photocurrent generation. We demonstrate that the amplitude and polarity of the photocurrent in the gated vertical heterostructures can be readily modulated by the electric field of an external gate to achieve a maximum external quantum efficiency of 55% and internal quantum efficiency up to 85%. Our study establishes a method to control photocarrier generation, separation and transport processes using an external electric field. PMID:24162001

Floating-Gate Manipulated Graphene-Black Phosphorus Heterojunction for Nonvolatile Ambipolar Schottky Junction Memories, Memory Inverter Circuits, and Logic Rectifiers.

PubMed

Li, Dong; Chen, Mingyuan; Zong, Qijun; Zhang, Zengxing

2017-10-11

The Schottky junction is an important unit in electronics and optoelectronics. However, its properties greatly degrade with device miniaturization. The fast development of circuits has fueled a rapid growth in the study of two-dimensional (2D) crystals, which may lead to breakthroughs in the semiconductor industry. Here we report a floating-gate manipulated nonvolatile ambipolar Schottky junction memory from stacked all-2D layers of graphene-BP/h-BN/graphene (BP, black phosphorus; h-BN, hexagonal boron nitride) in a designed floating-gate field-effect Schottky barrier transistor configuration. By manipulating the voltage pulse applied to the control gate, the device exhibits ambipolar characteristics and can be tuned to act as graphene-p-BP or graphene-n-BP junctions with reverse rectification behavior. Moreover, the junction exhibits good storability properties of more than 10 years and is also programmable. On the basis of these characteristics, we further demonstrate the application of the device to dual-mode nonvolatile Schottky junction memories, memory inverter circuits, and logic rectifiers.

Dual-Gated MoTe2/MoS2 van der Waals Heterojunction p-n Diode

NASA Astrophysics Data System (ADS)

Rai, Amritesh; Movva, Hema C. P.; Kang, Sangwoo; Larentis, Stefano; Roy, Anupam; Tutuc, Emanuel; Banerjee, Sanjay K.

2D materials are promising for future electronic and optoelectronic applications. In this regard, it is important to realize p-n diodes, the most fundamental building block of all modern semiconductor devices, based on these 2D materials. While it is challenging to achieve homojunction diodes in 2D semiconductors due to lack of reliable selective doping techniques, it is relatively easier to achieve diode-like behavior in van der Waals (vdW) heterostructures comprising different 2D semiconductors. Here, we demonstrate dual-gated vdW heterojunction p-n diodes based on p-type MoTe2 and n-type MoS2, with hBN as the top and bottom gate dielectric. The heterostructure stack is assembled using a polymer-based `dry-transfer' technique. Pt contact is used for hole injection in MoTe2, whereas Ag is used for electron injection in MoS2. The dual-gates allow for independent electrostatic tuning of the carriers in MoTe2 and MoS2. Room temperature interlayer current-voltage characteristics reveal a strong gate-tunable rectification behavior. At low temperatures, the diode turn-on voltage increases, whereas the reverse saturation current decreases, in accordance with conventional p-n diode behavior. Dual-Gated MoTe2/MoS2 van der Waals Heterojunction p-n Diode.

Possible Dynamically Gated Conductance along Heme Wires in Bacterial Multiheme Cytochromes

DOE Office of Scientific and Technical Information (OSTI.GOV)

Smith, Dayle MA; Rosso, Kevin M.

2014-07-24

The staggered cross decaheme configuration of electron transfer co-factors in the outer-membrane cytochrome MtrF may serve as a prototype for conformationally-gated multi-heme electron transport. Derived from the bacterium Shewanella oneidensis, the staggered cross configuration reveals intersecting c-type octaheme and tetraheme “wires” containing thermodynamic “hills” and “valleys”, suggesting that the protein structure may include a dynamical mechanism for conductance and pathway switching depending on enzymatic functional need. Recent molecular simulations have established the pair-wise electronic couplings, redox potentials, and reorganization energies to predict the maximum conductance along the various heme wire pathways by sequential hopping of a single electron (PNAS (2014)more » 11,611-616). Here, we expand this information with classical molecular and statistical mechanics calculations of large-amplitude protein dynamics in MtrF, to address its potential to modulate pathway conductance, including assessment of the effect of the total charge state. Explicit solvent molecular dynamics simulations of fully oxidized and fully reduced MtrF employing ten independent 50-ns simulations at 300 K and 1 atm showed that reduced MtrF is more expanded and explores more conformational space than oxidized MtrF, and that heme reduction leads to increased heme solvent exposure. The slowest mode of collective decaheme motion is 90% similar between the oxidized and reduced states, and consists primarily of inter-heme separation with minor rotational contributions. The frequency of this motion is 1.7×107 s 1 for fully-oxidized and fully-reduced MtrF, respectively, slower than the downhill electron transfer rates between stacked heme pairs at the octaheme termini and faster than the electron transfer rates between parallel hemes in the tetraheme chain. This implies that MtrF uses slow conformational fluctuations to modulate electron flow along the octaheme pathway, apparently for the purpose of increasing the residence time of electrons on lowest potential hemes 4 and 9. This apparent gating mechanism should increase the success rate of electron transfer from MtrF to low potential environmental acceptors via these two solvent-exposed hemes.« less

Pronounced Photovoltaic Response from Multilayered Transition-Metal Dichalcogenides PN-Junctions.

PubMed

Memaran, Shahriar; Pradhan, Nihar R; Lu, Zhengguang; Rhodes, Daniel; Ludwig, Jonathan; Zhou, Qiong; Ogunsolu, Omotola; Ajayan, Pulickel M; Smirnov, Dmitry; Fernández-Domínguez, Antonio I; García-Vidal, Francisco J; Balicas, Luis

2015-11-11

Transition metal dichalcogenides (TMDs) are layered semiconductors with indirect band gaps comparable to Si. These compounds can be grown in large area, while their gap(s) can be tuned by changing their chemical composition or by applying a gate voltage. The experimental evidence collected so far points toward a strong interaction with light, which contrasts with the small photovoltaic efficiencies η ≤ 1% extracted from bulk crystals or exfoliated monolayers. Here, we evaluate the potential of these compounds by studying the photovoltaic response of electrostatically generated PN-junctions composed of approximately 10 atomic layers of MoSe2 stacked onto the dielectric h-BN. In addition to ideal diode-like response, we find that these junctions can yield, under AM-1.5 illumination, photovoltaic efficiencies η exceeding 14%, with fill factors of ~70%. Given the available strategies for increasing η such as gap tuning, improving the quality of the electrical contacts, or the fabrication of tandem cells, our study suggests a remarkable potential for photovoltaic applications based on TMDs.

Solid-state Marx based two-switch voltage modulator for the On-Line Isotope Mass Separator accelerator at the European Organization for Nuclear Research

NASA Astrophysics Data System (ADS)

Redondo, L. M.; Silva, J. Fernando; Canacsinh, H.; Ferrão, N.; Mendes, C.; Soares, R.; Schipper, J.; Fowler, A.

2010-07-01

A new circuit topology is proposed to replace the actual pulse transformer and thyratron based resonant modulator that supplies the 60 kV target potential for the ion acceleration of the On-Line Isotope Mass Separator accelerator, the stability of which is critical for the mass resolution downstream separator, at the European Organization for Nuclear Research. The improved modulator uses two solid-state switches working together, each one based on the Marx generator concept, operating as series and parallel switches, reducing the stress on the series stacked semiconductors, and also as auxiliary pulse generator in order to fulfill the target requirements. Preliminary results of a 10 kV prototype, using 1200 V insulated gate bipolar transistors and capacitors in the solid-state Marx circuits, ten stages each, with an electrical equivalent circuit of the target, are presented, demonstrating both the improved voltage stability and pulse flexibility potential wanted for this new modulator.

Gate-dependent asymmetric transport characteristics in pentacene barristors with graphene electrodes.

PubMed

Hwang, Wang-Taek; Min, Misook; Jeong, Hyunhak; Kim, Dongku; Jang, Jingon; Yoo, Daekyung; Jang, Yeonsik; Kim, Jun-Woo; Yoon, Jiyoung; Chung, Seungjun; Yi, Gyu-Chul; Lee, Hyoyoung; Wang, Gunuk; Lee, Takhee

2016-11-25

We investigated the electrical characteristics and the charge transport mechanism of pentacene vertical hetero-structures with graphene electrodes. The devices are composed of vertical stacks of silicon, silicon dioxide, graphene, pentacene, and gold. These vertical heterojunctions exhibited distinct transport characteristics depending on the applied bias direction, which originates from different electrode contacts (graphene and gold contacts) to the pentacene layer. These asymmetric contacts cause a current rectification and current modulation induced by the gate field-dependent bias direction. We observed a change in the charge injection barrier during variable-temperature current-voltage characterization, and we also observed that two distinct charge transport channels (thermionic emission and Poole-Frenkel effect) worked in the junctions, which was dependent on the bias magnitude.

Reduced electron back-injection in Al2O3/AlOx/Al2O3/graphene charge-trap memory devices

NASA Astrophysics Data System (ADS)

Lee, Sejoon; Song, Emil B.; Min Kim, Sung; Lee, Youngmin; Seo, David H.; Seo, Sunae; Wang, Kang L.

2012-12-01

A graphene charge-trap memory is devised using a single-layer graphene channel with an Al2O3/AlOx/Al2O3 oxide stack, where the ion-bombarded AlOx layer is intentionally added to create an abundance of charge-trap sites. The low dielectric constant of AlOx compared to Al2O3 reduces the potential drop in the control oxide Al2O3 and suppresses the electron back-injection from the gate to the charge-storage layer, allowing the memory window of the device to be further extended. This shows that the usage of a lower dielectric constant in the charge-storage layer compared to that of the control oxide layer improves the memory performance for graphene charge-trap memories.

The Performance Improvement of N2 Plasma Treatment on ZrO2 Gate Dielectric Thin-Film Transistors with Atmospheric Pressure Plasma-Enhanced Chemical Vapor Deposition IGZO Channel.

PubMed

Wu, Chien-Hung; Huang, Bo-Wen; Chang, Kow-Ming; Wang, Shui-Jinn; Lin, Jian-Hong; Hsu, Jui-Mei

2016-06-01

The aim of this paper is to illustrate the N2 plasma treatment for high-κ ZrO2 gate dielectric stack (30 nm) with indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs). Experimental results reveal that a suitable incorporation of nitrogen atoms could enhance the device performance by eliminating the oxygen vacancies and provide an amorphous surface with better surface roughness. With N2 plasma treated ZrO2 gate, IGZO channel is fabricated by atmospheric pressure plasma-enhanced chemical vapor deposition (AP-PECVD) technique. The best performance of the AP-PECVD IGZO TFTs are obtained with 20 W-90 sec N2 plasma treatment with field-effect mobility (μ(FET)) of 22.5 cm2/V-s, subthreshold swing (SS) of 155 mV/dec, and on/off current ratio (I(on)/I(off)) of 1.49 x 10(7).

Improved interfacial and electrical properties of GaAs metal-oxide-semiconductor capacitors with HfTiON as gate dielectric and TaON as passivation interlayer

NASA Astrophysics Data System (ADS)

Wang, L. S.; Xu, J. P.; Zhu, S. Y.; Huang, Y.; Lai, P. T.

2013-08-01

The interfacial and electrical properties of sputtered HfTiON on sulfur-passivated GaAs with or without TaON as interfacial passivation layer (IPL) are investigated. Experimental results show that the GaAs metal-oxide-semiconductor capacitor with HfTiON/TaON stacked gate dielectric annealed at 600 °C exhibits low interface-state density (1.0 × 1012 cm-2 eV-1), small gate leakage current (7.3 × 10-5 A cm-2 at Vg = Vfb + 1 V), small capacitance equivalent thickness (1.65 nm), and large equivalent dielectric constant (26.2). The involved mechanisms lie in the fact that the TaON IPL can effectively block the diffusions of Hf, Ti, and O towards GaAs surface and suppress the formation of interfacial As-As bonds, Ga-/As-oxides, thus unpinning the Femi level at the TaON/GaAs interface and improving the interface quality and electrical properties of the device.

Passivation of oxide traps and interface states in GaAs metal-oxide-semiconductor capacitor by LaTaON passivation layer and fluorine incorporation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, L. N.; Choi, H. W.; Lai, P. T., E-mail: laip@eee.hku.hk

2015-11-23

GaAs metal-oxide-semiconductor capacitor with TaYON/LaTaON gate-oxide stack and fluorine-plasma treatment is fabricated and compared with its counterparts without the LaTaON passivation interlayer or the fluorine treatment. Experimental results show that the sample exhibits better characteristics: low interface-state density (8 × 10{sup 11 }cm{sup −2}/eV), small flatband voltage (0.69 V), good capacitance-voltage behavior, small frequency dispersion, and small gate leakage current (6.35 × 10{sup −6} A/cm{sup 2} at V{sub fb} + 1 V). These should be attributed to the suppressed growth of unstable Ga and As oxides on the GaAs surface during gate-oxide annealing by the LaTaON interlayer and fluorine incorporation, and the passivating effects of fluorine atoms on the acceptor-likemore » interface and near-interface traps.« less

First-principles simulations of Graphene/Transition-metal-Dichalcogenides/Graphene Field-Effect Transistor

NASA Astrophysics Data System (ADS)

Li, Xiangguo; Wang, Yun-Peng; Zhang, X.-G.; Cheng, Hai-Ping

A prototype field-effect transistor (FET) with fascinating properties can be made by assembling graphene and two-dimensional insulating crystals into three-dimensional stacks with atomic layer precision. Transition metal dichalcogenides (TMDCs) such as WS2, MoS2 are good candidates for the atomically thin barrier between two layers of graphene in the vertical FET due to their sizable bandgaps. We investigate the electronic properties of the Graphene/TMDCs/Graphene sandwich structure using first-principles method. We find that the effective tunnel barrier height of the TMDC layers in contact with the graphene electrodes has a layer dependence and can be modulated by a gate voltage. Consequently a very high ON/OFF ratio can be achieved with appropriate number of TMDC layers and a suitable range of the gate voltage. The spin-orbit coupling in TMDC layers is also layer dependent but unaffected by the gate voltage. These properties can be important in future nanoelectronic device designs. DOE/BES-DE-FG02-02ER45995; NERSC.

Gate- and Light-Tunable pn Heterojunction Microwire Arrays Fabricated via Evaporative Assembly.

PubMed

Park, Jae Hoon; Kim, Jong Su; Choi, Young Jin; Lee, Wi Hyoung; Lee, Dong Yun; Cho, Jeong Ho

2017-02-01

One-dimensional (1D) nano/microwires have attracted considerable attention as versatile building blocks for use in diverse electronic, optoelectronic, and magnetic device applications. The large-area assembly of nano/microwires at desired positions presents a significant challenge for developing high-density electronic devices. Here, we demonstrated the fabrication of cross-stacked pn heterojunction diode arrays by integrating well-aligned inorganic and organic microwires fabricated via evaporative assembly. We utilized solution-processed n-type inorganic indium-gallium-zinc-oxide (IGZO) microwires and p-type organic 6,13-bis(triisopropylsilylethynyl)pentacene (TIPS-PEN) microwires. The formation of organic TIPS-PEN semiconductor microwire and their electrical properties were optimized by controlling both the amounts of added insulating polymer and the widths of the microwires. The resulting cross-stacked IGZO/TIPS-PEN microwire pn heterojunction devices exhibited rectifying behavior with a forward-to-reverse bias current ratio exceeding 10 2 . The ultrathin nature of the underlying n-type IGZO microwires yielded gate tunability in the charge transport behaviors, ranging from insulating to rectifying. The rectifying behaviors of the heterojunction devices could be modulated by controlling the optical power of the irradiated light. The fabrication of semiconducting microwires through evaporative assembly provides a facile and reliable approach to patterning or positioning 1D microwires for the fabrication of future flexible large-area electronics.

Steep-slope hysteresis-free negative capacitance MoS2 transistors

NASA Astrophysics Data System (ADS)

Si, Mengwei; Su, Chun-Jung; Jiang, Chunsheng; Conrad, Nathan J.; Zhou, Hong; Maize, Kerry D.; Qiu, Gang; Wu, Chien-Ting; Shakouri, Ali; Alam, Muhammad A.; Ye, Peide D.

2018-01-01

The so-called Boltzmann tyranny defines the fundamental thermionic limit of the subthreshold slope of a metal-oxide-semiconductor field-effect transistor (MOSFET) at 60 mV dec-1 at room temperature and therefore precludes lowering of the supply voltage and overall power consumption1,2. Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this fundamental barrier3. Meanwhile, two-dimensional semiconductors such as atomically thin transition-metal dichalcogenides, due to their low dielectric constant and ease of integration into a junctionless transistor topology, offer enhanced electrostatic control of the channel4-12. Here, we combine these two advantages and demonstrate a molybdenum disulfide (MoS2) two-dimensional steep-slope transistor with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack. This device exhibits excellent performance in both on and off states, with a maximum drain current of 510 μA μm-1 and a sub-thermionic subthreshold slope, and is essentially hysteresis-free. Negative differential resistance was observed at room temperature in the MoS2 negative-capacitance FETs as the result of negative capacitance due to the negative drain-induced barrier lowering. A high on-current-induced self-heating effect was also observed and studied.

Three-Dimensional, Inkjet-Printed Organic Transistors and Integrated Circuits with 100% Yield, High Uniformity, and Long-Term Stability.

PubMed

Kwon, Jimin; Takeda, Yasunori; Fukuda, Kenjiro; Cho, Kilwon; Tokito, Shizuo; Jung, Sungjune

2016-11-22

In this paper, we demonstrate three-dimensional (3D) integrated circuits (ICs) based on a 3D complementary organic field-effect transistor (3D-COFET). The transistor-on-transistor structure was achieved by vertically stacking a p-type OFET over an n-type OFET with a shared gate joining the two transistors, effectively halving the footprint of printed transistors. All the functional layers including organic semiconductors, source/drain/gate electrodes, and interconnection paths were fully inkjet-printed except a parylene dielectric which was deposited by chemical vapor deposition. An array of printed 3D-COFETs and their inverter logic gates comprising over 100 transistors showed 100% yield, and the uniformity and long-term stability of the device were also investigated. A full-adder circuit, the most basic computing unit, has been successfully demonstrated using nine NAND gates based on the 3D structure. The present study fulfills the essential requirements for the fabrication of organic printed complex ICs (increased transistor density, 100% yield, high uniformity, and long-term stability), and the findings can be applied to realize more complex digital/analogue ICs and intelligent devices.

Synaptic transistor with a reversible and analog conductance modulation using a Pt/HfOx/n-IGZO memcapacitor

NASA Astrophysics Data System (ADS)

Yang, Paul; Kim, Hyung Jun; Zheng, Hong; Beom, Geon Won; Park, Jong-Sung; Kang, Chi Jung; Yoon, Tae-Sik

2017-06-01

A synaptic transistor emulating the biological synaptic motion is demonstrated using the memcapacitance characteristics in a Pt/HfOx/n-indium-gallium-zinc-oxide (IGZO) memcapacitor. First, the metal-oxide-semiconductor (MOS) capacitor with Pt/HfOx/n-IGZO structure exhibits analog, polarity-dependent, and reversible memcapacitance in capacitance-voltage (C-V), capacitance-time (C-t), and voltage-pulse measurements. When a positive voltage is applied repeatedly to the Pt electrode, the accumulation capacitance increases gradually and sequentially. The depletion capacitance also increases consequently. The capacitances are restored by repeatedly applying a negative voltage, confirming the reversible memcapacitance. The analog and reversible memcapacitance emulates the potentiation and depression synaptic motions. The synaptic thin-film transistor (TFT) with this memcapacitor also shows the synaptic motion with gradually increasing drain current by repeatedly applying the positive gate and drain voltages and reversibly decreasing one by applying the negative voltages, representing synaptic weight modulation. The reversible and analog conductance change in the transistor at both the voltage sweep and pulse operations is obtained through the memcapacitance and threshold voltage shift at the same time. These results demonstrate the synaptic transistor operations with a MOS memcapacitor gate stack consisting of Pt/HfOx/n-IGZO.

Synaptic transistor with a reversible and analog conductance modulation using a Pt/HfOx/n-IGZO memcapacitor.

PubMed

Yang, Paul; Jun Kim, Hyung; Zheng, Hong; Won Beom, Geon; Park, Jong-Sung; Jung Kang, Chi; Yoon, Tae-Sik

2017-06-02

A synaptic transistor emulating the biological synaptic motion is demonstrated using the memcapacitance characteristics in a Pt/HfOx/n-indium-gallium-zinc-oxide (IGZO) memcapacitor. First, the metal-oxide-semiconductor (MOS) capacitor with Pt/HfOx/n-IGZO structure exhibits analog, polarity-dependent, and reversible memcapacitance in capacitance-voltage (C-V), capacitance-time (C-t), and voltage-pulse measurements. When a positive voltage is applied repeatedly to the Pt electrode, the accumulation capacitance increases gradually and sequentially. The depletion capacitance also increases consequently. The capacitances are restored by repeatedly applying a negative voltage, confirming the reversible memcapacitance. The analog and reversible memcapacitance emulates the potentiation and depression synaptic motions. The synaptic thin-film transistor (TFT) with this memcapacitor also shows the synaptic motion with gradually increasing drain current by repeatedly applying the positive gate and drain voltages and reversibly decreasing one by applying the negative voltages, representing synaptic weight modulation. The reversible and analog conductance change in the transistor at both the voltage sweep and pulse operations is obtained through the memcapacitance and threshold voltage shift at the same time. These results demonstrate the synaptic transistor operations with a MOS memcapacitor gate stack consisting of Pt/HfOx/n-IGZO.

Fabrication of InGaZnO Nonvolatile Memory Devices at Low Temperature of 150 degrees C for Applications in Flexible Memory Displays and Transparency Coating on Plastic Substrates.

PubMed

Hanh, Nguyen Hong; Jang, Kyungsoo; Yi, Junsin

2016-05-01

We directly deposited amorphous InGaZnO (a-IGZO) nonvolatile memory (NVM) devices with oxynitride-oxide-dioxide (OOO) stack structures on plastic substrate by a DC pulsed magnetron sputtering and inductively coupled plasma chemical vapor deposition (ICPCVD) system, using a low-temperature of 150 degrees C. The fabricated bottom gate a-IGZO NVM devices have a wide memory window with a low operating voltage during programming and erasing, due to an effective control of the gate dielectrics. In addition, after ten years, the memory device retains a memory window of over 73%, with a programming duration of only 1 ms. Moreover, the a-IGZO films show high optical transmittance of over 85%, and good uniformity with a root mean square (RMS) roughness of 0.26 nm. This film is a promising candidate to achieve flexible displays and transparency on plastic substrates because of the possibility of low-temperature deposition, and the high transparent properties of a-IGZO films. These results demonstrate that the a-IGZO NVM devices obtained at low-temperature have a suitable programming and erasing efficiency for data storage under low-voltage conditions, in combination with excellent charge retention characteristics, and thus show great potential application in flexible memory displays.

Model-based tomographic reconstruction

DOEpatents

Chambers, David H; Lehman, Sean K; Goodman, Dennis M

2012-06-26

A model-based approach to estimating wall positions for a building is developed and tested using simulated data. It borrows two techniques from geophysical inversion problems, layer stripping and stacking, and combines them with a model-based estimation algorithm that minimizes the mean-square error between the predicted signal and the data. The technique is designed to process multiple looks from an ultra wideband radar array. The processed signal is time-gated and each section processed to detect the presence of a wall and estimate its position, thickness, and material parameters. The floor plan of a building is determined by moving the array around the outside of the building. In this paper we describe how the stacking and layer stripping algorithms are combined and show the results from a simple numerical example of three parallel walls.

Fuel cell system including a unit for electrical isolation of a fuel cell stack from a manifold assembly and method therefor

DOEpatents

Kelley; Dana A. , Farooque; Mohammad , Davis; Keith

2007-10-02

A fuel cell system with improved electrical isolation having a fuel cell stack with a positive potential end and a negative potential, a manifold for use in coupling gases to and from a face of the fuel cell stack, an electrical isolating assembly for electrically isolating the manifold from the stack, and a unit for adjusting an electrical potential of the manifold such as to impede the flow of electrolyte from the stack across the isolating assembly.

Metallorganic chemical vapor deposition and atomic layer deposition approaches for the growth of hafnium-based thin films from dialkylamide precursors for advanced CMOS gate stack applications

NASA Astrophysics Data System (ADS)

Consiglio, Steven P.

To continue the rapid progress of the semiconductor industry as described by Moore's Law, the feasibility of new material systems for front end of the line (FEOL) process technologies needs to be investigated, since the currently employed polysilicon/SiO2-based transistor system is reaching its fundamental scaling limits. Revolutionary breakthroughs in complementary-metal-oxide-semiconductor (CMOS) technology were recently announced by Intel Corporation and International Business Machines Corporation (IBM), with both organizations revealing significant progress in the implementation of hafnium-based high-k dielectrics along with metal gates. This announcement was heralded by Gordon Moore as "...the biggest change in transistor technology since the introduction of polysilicon gate MOS transistors in the late 1960s." Accordingly, the study described herein focuses on the growth of Hf-based dielectrics and Hf-based metal gates using chemical vapor-based deposition methods, specifically metallorganic chemical vapor deposition (MOCVD) and atomic layer deposition (ALD). A family of Hf source complexes that has received much attention recently due to their desirable properties for implementation in wafer scale manufacturing is the Hf dialkylamide precursors. These precursors are room temperature liquids and possess sufficient volatility and desirable decomposition characteristics for both MOCVD and ALD processing. Another benefit of using these sources is the existence of chemically compatible Si dialkylamide sources as co-precursors for use in Hf silicate growth. The first part of this study investigates properties of MOCVD-deposited HfO2 and HfSixOy using dimethylamido Hf and Si precursor sources using a customized MOCVD reactor. The second part of this study involves a study of wet and dry surface pre-treatments for ALD growth of HfO2 using tetrakis(ethylmethylamido)hafnium in a wafer scale manufacturing environment. The third part of this study is an investigation of the properties of conductive HfN grown via plasma-assisted atomic layer deposition (PA-ALD) using tetrakis(ethylmethylamido)hafnium on a modified commercially available wafer processing tool. Key properties of these materials for use as gate stack replacement materials are addressed and future directions for further characterization and novel material investigations are proposed.

Three-dimensional self-gated cardiac MR imaging for the evaluation of myocardial infarction in mouse model on a 3T clinical MR system.

PubMed

Zhang, Xiaoyong; Qiu, Bensheng; Wei, Zijun; Yan, Fei; Shi, Caiyun; Su, Shi; Liu, Xin; Ji, Jim X; Xie, Guoxi

2017-01-01

To develop and assess a three-dimensional (3D) self-gated technique for the evaluation of myocardial infarction (MI) in mouse model without the use of external electrocardiogram (ECG) trigger and respiratory motion sensor on a 3T clinical MR system. A 3D T1-weighted GRE sequence with stack-of-stars sampling trajectories was developed and performed on six mice with MIs that were injected with a gadolinium-based contrast agent at a 3T clinical MR system. Respiratory and cardiac self-gating signals were derived from the Cartesian mapping of the k-space center along the partition encoding direction by bandpass filtering in image domain. The data were then realigned according to the predetermined self-gating signals for the following image reconstruction. In order to accelerate the data acquisition, image reconstruction was based on compressed sensing (CS) theory by exploiting temporal sparsity of the reconstructed images. In addition, images were also reconstructed from the same realigned data by conventional regridding method for demonstrating the advantageous of the proposed reconstruction method. Furthermore, the accuracy of detecting MI by the proposed method was assessed using histological analysis as the standard reference. Linear regression and Bland-Altman analysis were used to assess the agreement between the proposed method and the histological analysis. Compared to the conventional regridding method, the proposed CS method reconstructed images with much less streaking artifact, as well as a better contrast-to-noise ratio (CNR) between the blood and myocardium (4.1 ± 2.1 vs. 2.9 ± 1.1, p = 0.031). Linear regression and Bland-Altman analysis demonstrated that excellent correlation was obtained between infarct sizes derived from the proposed method and histology analysis. A 3D T1-weighted self-gating technique for mouse cardiac imaging was developed, which has potential for accurately evaluating MIs in mice at 3T clinical MR system without the use of external ECG trigger and respiratory motion sensor.

Image intensification; Proceedings of the Meeting, Los Angeles, CA, Jan. 17, 18, 1989

NASA Astrophysics Data System (ADS)

Csorba, Illes P.

Various papers on image intensification are presented. Individual topics discussed include: status of high-speed optical detector technologies, super second generation imge intensifier, gated image intensifiers and applications, resistive-anode position-sensing photomultiplier tube operational modeling, undersea imaging and target detection with gated image intensifier tubes, image intensifier modules for use with commercially available solid state cameras, specifying the components of an intensified solid state television camera, superconducting IR focal plane arrays, one-inch TV camera tube with very high resolution capacity, CCD-Digicon detector system performance parameters, high-resolution X-ray imaging device, high-output technology microchannel plate, preconditioning of microchannel plate stacks, recent advances in small-pore microchannel plate technology, performance of long-life curved channel microchannel plates, low-noise microchannel plates, development of a quartz envelope heater.

Understanding and Controlling the Electronic Properties of Graphene Using Scanning Probe Microscopy

DTIC Science & Technology

2014-07-21

Dirac point in gated bilayer graphene, Applied Physics Letters, (12 2009): 243502. doi : 10.1063/1.3275755 Brian J. LeRoy, Adam T. Roberts, Rolf...of soliton motion and stacking in trilayer graphene, Nature Materials , (04 2014): 0. doi : 10.1038/nmat3965 Matthew Yankowitz, Joel I-Jan Wang...of bilayer graphene via quasiparticle scattering, APL Materials , (09 2014): 92503. doi : Matthew Yankowitz, Fenglin Wang, Chun Ning Lau, Brian J

40 CFR 75.72 - Determination of NOX mass emissions for common stack and multiple stack configurations.

Code of Federal Regulations, 2012 CFR

2012-07-01

... the affected units as the difference between NOX mass emissions measured in the common stack and NOX... emissions using the maximum potential NOX emission rate, the maximum potential flow rate, and either the maximum potential CO2 concentration or the minimum potential O2 concentration (as applicable). The maximum...

Germanium Based Field-Effect Transistors: Challenges and Opportunities

PubMed Central

Goley, Patrick S.; Hudait, Mantu K.

2014-01-01

The performance of strained silicon (Si) as the channel material for today’s metal-oxide-semiconductor field-effect transistors may be reaching a plateau. New channel materials with high carrier mobility are being investigated as alternatives and have the potential to unlock an era of ultra-low-power and high-speed microelectronic devices. Chief among these new materials is germanium (Ge). This work reviews the two major remaining challenges that Ge based devices must overcome if they are to replace Si as the channel material, namely, heterogeneous integration of Ge on Si substrates, and developing a suitable gate stack. Next, Ge is compared to compound III-V materials in terms of p-channel device performance to review how it became the first choice for PMOS devices. Different Ge device architectures, including surface channel and quantum well configurations, are reviewed. Finally, state-of-the-art Ge device results and future prospects are also discussed. PMID:28788569

The Development of III-V Semiconductor MOSFETs for Future CMOS Applications

NASA Astrophysics Data System (ADS)

Greene, Andrew M.

Alternative channel materials with superior transport properties over conventional strained silicon are required for supply voltage scaling in low power complementary metal-oxide-semiconductor (CMOS) integrated circuits. Group III-V compound semiconductor systems offer a potential solution due to their high carrier mobility, low carrier effective mass and large injection velocity. The enhancement in transistor drive current at a lower overdrive voltage allows for the scaling of supply voltage while maintaining high switching performance. This thesis focuses on overcoming several material and processing challenges associated with III-V semiconductor development including a low thermal processing budget, high interface trap state density (Dit), low resistance source/drain contacts and growth on lattice mismatched substrates. Non-planar In0.53Ga0.47As FinFETs were developed using both "gate-first" and "gate-last" fabrication methods for n-channel MOSFETs. Electron beam lithography and anisotropic plasma etching processes were optimized to create highly scaled fins with near vertical sidewalls. Plasma damage was removed using a wet etch process and improvements in gate efficiency were characterized on MOS capacitor structures. A two-step, selective removal of the pre-grown n+ contact layer was developed for "gate-last" recess etching. The final In0.53Ga 0.47As FinFET devices demonstrated an ION = 70 mA/mm, I ON/IOFF ratio = 15,700 and sub-threshold swing = 210 mV/dec. Bulk GaSb and strained In0.36Ga0.64Sb quantum well (QW) heterostructures were developed for p-channel MOSFETs. Dit was reduced to 2 - 3 x 1012 cm-2eV-1 using an InAs surface layer, (NH4)2S passivation and atomic layer deposition (ALD) of Al2O3. A self-aligned "gate-first" In0.36Ga0.64Sb MOSFET fabrication process was invented using a "T-shaped" electron beam resist patterning stack and intermetallic source/drain contacts. Ni contacts annealed at 300°C demonstrated an ION = 166 mA/mm, ION/IOFF ratio = 1,500 and sub-threshold swing = 340 mV/dec. Split C-V measurements were used to extract an effective channel mobility of muh* = 300 cm2/Vs at Ns = 2 x 1012 cm -2. "Gate-last" MOSFETs grown with an epitaxial p + contact layer were fabricated using selective gate-recess etching techniques. A parasitic "n-channel" limited ION/I OFF ratio and sub-threshold swing, most likely due to effects from the InAs surface layer.

Characterizing Radio Emission From Extensive Air Showers with the SLAC-T510 Experiment, with Applications to ANITA

NASA Astrophysics Data System (ADS)

McGuire, Felicia Ann

Essential to metal-oxide-semiconductor field-effect transistor (MOSFET) scaling is the reduction of the supply voltage to mitigate the power consumption and corresponding heat dissipation. Conventional dielectric materials are subject to the thermal limit imposed by the Boltzmann factor in the subthreshold swing, which places an absolute minimum on the supply voltage required to modulate the current. Furthermore, as technology approaches the 5 nm node, electrostatic control of a silicon channel becomes exceedingly difficult, regardless of the gating technique. This notion of "the end of silicon scaling" has rapidly increased research into more scalable channel materials as well as new methods of transistor operation. Among the many promising options are two-dimensional (2D) FETs and negative capacitance (NC) FETs. 2D-FETs make use of atomically thin semiconducting channels that have enabled demonstrated scalability beyond what silicon can offer. NC-FETs demonstrate an effective negative capacitance arising from the integration of a ferroelectric into the transistor gate stack, allowing sub-60 mV/dec switching. While both of these devices provide significant advantages, neither can accomplish the ultimate goal of a FET that is both low-voltage and scalable. However, an appropriate fusion of the 2D-FET and NC-FET into a 2D NC-FET has the potential of enabling a steep-switching device that is dimensionally scalable beyond the 5 nm technology node. In this work, the motivation for and operation of 2D NC-FETs is presented. Experimental realization of 2D NC-FETs using 2D transition metal dichalcogenide molybdenum disulfide (MoS2) as the channel is shown with two different ferroelectric materials: 1) a solution-processed, polymeric poly(vinylidene difluoride trifluoroethylene) ferroelectric and 2) an atomic layer deposition (ALD) grown hafnium zirconium oxide (HfZrO2) ferroelectric. Each ferroelectric was integrated into the gate stack of a 2D-FET having either a top-gate (polymeric ferroelectric) or bottom-gate (HfZrO2 ferroelectric) configuration. HfZrO 2 devices with metallic interfacial layers (between ferroelectric and dielectric) and thinner ferroelectric layers were found to reduce both the hysteresis and the threshold voltage. Detailed characterization of the devices was performed and, most significantly, the 2D NC-FETs with HfZrO2 reproducibly yielded subthreshold swings well below the thermal limit with over more than four orders of magnitude in drain current modulation. HfZrO 2 devices without metallic interfacial layers were utilized to explore the impact of ferroelectric thickness, dielectric thickness, and dielectric composition on device performance. The impact of an interfacial metallic layer on the device operation was investigated in devices with HfZrO2 and shown to be crucial at enabling sub-60 mV/dec switching and large internal voltage gains. The significance of dielectric material choice on device performance was explored and found to be a critical factor in 2D NC-FET transistor operation. These successful results pave the way for future integration of this new device structure into existing technology markets.

Aerosol jet printed p- and n-type electrolyte-gated transistors with a variety of electrode materials: exploring practical routes to printed electronics.

PubMed

Hong, Kihyon; Kim, Se Hyun; Mahajan, Ankit; Frisbie, C Daniel

2014-11-12

Printing electrically functional liquid inks is a promising approach for achieving low-cost, large-area, additive manufacturing of flexible electronic circuits. To print thin-film transistors, a basic building block of thin-film electronics, it is important to have several options for printable electrode materials that exhibit high conductivity, high stability, and low-cost. Here we report completely aerosol jet printed (AJP) p- and n-type electrolyte-gated transistors (EGTs) using a variety of different electrode materials including highly conductive metal nanoparticles (Ag), conducting polymers (polystyrenesulfonate doped poly(3,4-ethylendedioxythiophene, PEDOT:PSS), transparent conducting oxides (indium tin oxide), and carbon-based materials (reduced graphene oxide). Using these source-drain electrode materials and a PEDOT:PSS/ion gel gate stack, we demonstrated all-printed p- and n-type EGTs in combination with poly(3-hexythiophene) and ZnO semiconductors. All transistor components (including electrodes, semiconductors, and gate insulators) were printed by AJP. Both kinds of devices showed typical p- and n-type transistor characteristics, and exhibited both low-threshold voltages (<2 V) and high hole and electron mobilities. Our assessment suggests Ag electrodes may be the best option in terms of overall performance for both types of EGTs.

Nonvolatile memory thin-film transistors using biodegradable chicken albumen gate insulator and oxide semiconductor channel on eco-friendly paper substrate.

PubMed

Kim, So-Jung; Jeon, Da-Bin; Park, Jung-Ho; Ryu, Min-Ki; Yang, Jong-Heon; Hwang, Chi-Sun; Kim, Gi-Heon; Yoon, Sung-Min

2015-03-04

Nonvolatile memory thin-film transistors (TFTs) fabricated on paper substrates were proposed as one of the eco-friendly electronic devices. The gate stack was composed of chicken albumen gate insulator and In-Ga-Zn-O semiconducting channel layers. All the fabrication processes were performed below 120 °C. To improve the process compatibility of the synthethic paper substrate, an Al2O3 thin film was introduced as adhesion and barrier layers by atomic layer deposition. The dielectric properties of biomaterial albumen gate insulator were also enhanced by the preparation of Al2O3 capping layer. The nonvolatile bistabilities were realized by the switching phenomena of residual polarization within the albumen thin film. The fabricated device exhibited a counterclockwise hysteresis with a memory window of 11.8 V, high on/off ratio of approximately 1.1 × 10(6), and high saturation mobility (μsat) of 11.5 cm(2)/(V s). Furthermore, these device characteristics were not markedly degraded even after the delamination and under the bending situration. When the curvature radius was set as 5.3 cm, the ION/IOFF ratio and μsat were obtained to be 5.9 × 10(6) and 7.9 cm(2)/(V s), respectively.

Determination of well flat band condition in thin film FDSOI transistors using C-V measurement for accurate parameter extraction

NASA Astrophysics Data System (ADS)

Mohamad, B.; Leroux, C.; Reimbold, G.; Ghibaudo, G.

2018-01-01

For advanced gate stacks, effective work function (WFeff) and equivalent oxide thickness (EOT) are fundamental parameters for technology optimization. On FDSOI transistors, and contrary to the bulk technologies, while EOT can still be extracted at strong inversion from the typical gate-to-channel capacitance (Cgc), it is no longer the case for WFeff due to the disappearance of an observable flat band condition on capacitance characteristics. In this work, a new experimental method, the Cbg(VBG) characteristic, is proposed in order to extract the well flat band condition (VFB, W). This characteristic enables an accurate and direct evaluation of WFeff. Moreover, using the previous extraction of the gate oxide (tfox), and buried oxide (tbox) from typical capacitance characteristics (Cgc and Cbc), it allows the extraction of the channel thickness (tch). Furthermore, the measurement of the well flat band condition on Cbg(VBG) characteristics for two different Si and SiGe channel also proves the existence of a dipole at the SiGe/SiO2 interface.

Downscaling ferroelectric field effect transistors by using ferroelectric Si-doped HfO2

NASA Astrophysics Data System (ADS)

Martin, Dominik; Yurchuk, Ekaterina; Müller, Stefan; Müller, Johannes; Paul, Jan; Sundquist, Jonas; Slesazeck, Stefan; Schlösser, Till; van Bentum, Ralf; Trentzsch, Martin; Schröder, Uwe; Mikolajick, Thomas

2013-10-01

Throughout the 22 nm technology node HfO2 is established as a reliable gate dielectric in contemporary complementary metal oxide semiconductor (CMOS) technology. The working principle of ferroelectric field effect transistors FeFET has also been demonstrated for some time for dielectric materials like Pb[ZrxTi1-x]O3 and SrBi2Ta2O9. However, integrating these into contemporary downscaled CMOS technology nodes is not trivial due to the necessity of an extremely thick gate stack. Recent developments have shown HfO2 to have ferroelectric properties, given the proper doping. Moreover, these doped HfO2 thin films only require layer thicknesses similar to the ones already in use in CMOS technology. This work will show how the incorporation of Si induces ferroelectricity in HfO2 based capacitor structures and finally demonstrate non-volatile storage in nFeFETs down to a gate length of 100 nm. A memory window of 0.41 V can be retained after 20,000 switching cycles. Retention can be extrapolated to 10 years.

Single-fabrication-step Ge nanosphere/SiO2/SiGe heterostructures: a key enabler for realizing Ge MOS devices

NASA Astrophysics Data System (ADS)

Liao, P. H.; Peng, K. P.; Lin, H. C.; George, T.; Li, P. W.

2018-05-01

We report channel and strain engineering of self-organized, gate-stacking heterostructures comprising Ge-nanosphere gate/SiO2/SiGe-channels. An exquisitely-controlled dynamic balance between the concentrations of oxygen, Si, and Ge interstitials was effectively exploited to simultaneously create these heterostructures in a single oxidation step. Process-controlled tunability of the channel length (5–95 nm diameters for the Ge-nanospheres), gate oxide thickness (2.5–4.8 nm), as well as crystal orientation, chemical composition and strain engineering of the SiGe-channel was achieved. Single-crystalline (100) Si1‑x Ge x shells with Ge content as high as x = 0.85 and with a compressive strain of 3%, as well as (110) Si1‑x Ge x shells with Ge content of x = 0.35 and corresponding compressive strain of 1.5% were achieved. For each crystal orientation, our high Ge-content, highly-stressed SiGe shells feature a high degree of crystallinity and thus, provide a core ‘building block’ required for the fabrication of Ge-based MOS devices.

Non-Volatile High Speed & Low Power Charge Trapping Devices

NASA Astrophysics Data System (ADS)

Kim, Moon Kyung; Tiwari, Sandip

2007-06-01

We report the operational characteristics of ultra-small-scaled SONOS (below 50 nm gate width and length) and SiO2/SiO2 structural devices with 0.5 um gate width and length where trapping occurs in a very narrow region. The experimental work summarizes the memory characteristics of retention time, endurance cycles, and speed in SONOS and SiO2/SiO2 structures. Silicon nitride has many defects to hold electrons as charge storage media in SONOS memory. Defects are also incorporated during growth and deposition in device processing. Our experiments show that the interface between two oxides, one grown and one deposited, provides a remarkable media for electron storage with a smaller gate stack and thus lower operating voltage. The exponential dependence of the time on the voltage is reflected in the characteristic energy. It is ˜0.44 eV for the write process and ˜0.47 eV for the erase process in SiO2/SiO2 structural device which is somewhat more efficient than those of SONOS structure memory.

Single-fabrication-step Ge nanosphere/SiO2/SiGe heterostructures: a key enabler for realizing Ge MOS devices.

PubMed

Liao, P H; Peng, K P; Lin, H C; George, T; Li, P W

2018-05-18

We report channel and strain engineering of self-organized, gate-stacking heterostructures comprising Ge-nanosphere gate/SiO 2 /SiGe-channels. An exquisitely-controlled dynamic balance between the concentrations of oxygen, Si, and Ge interstitials was effectively exploited to simultaneously create these heterostructures in a single oxidation step. Process-controlled tunability of the channel length (5-95 nm diameters for the Ge-nanospheres), gate oxide thickness (2.5-4.8 nm), as well as crystal orientation, chemical composition and strain engineering of the SiGe-channel was achieved. Single-crystalline (100) Si 1-x Ge x shells with Ge content as high as x = 0.85 and with a compressive strain of 3%, as well as (110) Si 1-x Ge x shells with Ge content of x = 0.35 and corresponding compressive strain of 1.5% were achieved. For each crystal orientation, our high Ge-content, highly-stressed SiGe shells feature a high degree of crystallinity and thus, provide a core 'building block' required for the fabrication of Ge-based MOS devices.

Nanocharacterization Challenges in a Changing Microelectronics Landscape

NASA Astrophysics Data System (ADS)

Brilloüt, Michel

2011-11-01

As the microelectronics industry enters the "nano"-era new challenges emerge. Traditional scaling of the MOS transistor faces major obstacles in fulfilling "Moore's law". New features like strain and new materials (e.g. high k—metal gate stack) are introduced in order to sustain performance increases. For a better electrostatic control, devices will use the third dimension, e.g., in gate-all-around nanowire structures. Due to the escalating cost and complexity of sub-28 nm technologies fewer industrial players can afford the development and production of advanced CMOS processes and many companies acknowledge the fact that the value in products can also be obtained in using more diversified non-digital technologies (the so-called "More-than-Moore" domain). This evolving landscape brings new requirements—discussed in this paper—in terms of physical characterization of technologies and devices.

Device and circuit analysis of a sub 20 nm double gate MOSFET with gate stack using a look-up-table-based approach

NASA Astrophysics Data System (ADS)

Chakraborty, S.; Dasgupta, A.; Das, R.; Kar, M.; Kundu, A.; Sarkar, C. K.

2017-12-01

In this paper, we explore the possibility of mapping devices designed in TCAD environment to its modeled version developed in cadence virtuoso environment using a look-up table (LUT) approach. Circuit simulation of newly designed devices in TCAD environment is a very slow and tedious process involving complex scripting. Hence, the LUT based modeling approach has been proposed as a faster and easier alternative in cadence environment. The LUTs are prepared by extracting data from the device characteristics obtained from device simulation in TCAD. A comparative study is shown between the TCAD simulation and the LUT-based alternative to showcase the accuracy of modeled devices. Finally the look-up table approach is used to evaluate the performance of circuits implemented using 14 nm nMOSFET.

Enhancement of field effect mobility of poly(3-hexylthiophene) thin film transistors by soft-lithographical nanopatterning on the gate-dielectric surface

NASA Astrophysics Data System (ADS)

Park, Jeong-Ho; Kang, Seok-Ju; Park, Jeong-Woo; Lim, Bogyu; Kim, Dong-Yu

2007-11-01

The submicroscaled octadecyltrichlorosilane (OTS) line patterns on gate-dielectric surfaces were introduced into the fabrication of organic field effect transistors (OFETs). These spin-cast regioregular poly(3-hexylthiophene) films on soft-lithographically patterned SiO2 surfaces yielded a higher hole mobility (˜0.072cm2/Vs ) than those of unpatterned (˜0.015cm2/Vs) and untreated (˜5×10-3cm2/Vs) OFETs. The effect of mobility enhancement as a function of the patterned line pitch was investigated in structural and geometric characteristics. The resulting improved mobility is likely attributed to the formation of efficient π-π stacking as a result of guide-assisted, local self-organization-involved molecular interactions between the poly(3-hexylthiophene) polymer and the geometrical OTS patterns.

Schottky barrier SOI-MOSFETs with high-k La2O3/ZrO2 gate dielectrics

PubMed Central

Henkel, C.; Abermann, S.; Bethge, O.; Pozzovivo, G.; Klang, P.; Stöger-Pollach, M.; Bertagnolli, E.

2011-01-01

Schottky barrier SOI-MOSFETs incorporating a La2O3/ZrO2 high-k dielectric stack deposited by atomic layer deposition are investigated. As the La precursor tris(N,N′-diisopropylformamidinato) lanthanum is used. As a mid-gap metal gate electrode TiN capped with W is applied. Processing parameters are optimized to issue a minimal overall thermal budget and an improved device performance. As a result, the overall thermal load was kept as low as 350, 400 or 500 °C. Excellent drive current properties, low interface trap densities of 1.9 × 1011 eV−1 cm−2, a low subthreshold slope of 70-80 mV/decade, and an ION/IOFF current ratio greater than 2 × 106 are obtained. PMID:21461054

Demonstration of large field effect in topological insulator films via a high-κ back gate

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, C. Y.; Lin, H. Y.; Yang, S. R.

2016-05-16

The spintronics applications long anticipated for topological insulators (TIs) has been hampered due to the presence of high density intrinsic defects in the bulk states. In this work we demonstrate the back-gating effect on TIs by integrating Bi{sub 2}Se{sub 3} films 6–10 quintuple layer (QL) thick with amorphous high-κ oxides of Al{sub 2}O{sub 3} and Y{sub 2}O{sub 3}. Large gating effect of tuning the Fermi level E{sub F} to very close to the band gap was observed, with an applied bias of an order of magnitude smaller than those of the SiO{sub 2} back gate, and the modulation of filmmore » resistance can reach as high as 1200%. The dependence of the gating effect on the TI film thickness was investigated, and ΔN{sub 2D}/ΔV{sub g} varies with TI film thickness as ∼t{sup −0.75}. To enhance the gating effect, a Y{sub 2}O{sub 3} layer thickness 4 nm was inserted into Al{sub 2}O{sub 3} gate stack to increase the total κ value to 13.2. A 1.4 times stronger gating effect is observed, and the increment of induced carrier numbers is in good agreement with additional charges accumulated in the higher κ oxides. Moreover, we have reduced the intrinsic carrier concentration in the TI film by doping Te to Bi{sub 2}Se{sub 3} to form Bi{sub 2}Te{sub x}Se{sub 1−x}. The observation of a mixed state of ambipolar field that both electrons and holes are present indicates that we have tuned the E{sub F} very close to the Dirac Point. These results have demonstrated that our capability of gating TIs with high-κ back gate to pave the way to spin devices of tunable E{sub F} for dissipationless spintronics based on well-established semiconductor technology.« less

Improved Gate Dielectric Deposition and Enhanced Electrical Stability for Single-Layer MoS2 MOSFET with an AlN Interfacial Layer.

PubMed

Qian, Qingkai; Li, Baikui; Hua, Mengyuan; Zhang, Zhaofu; Lan, Feifei; Xu, Yongkuan; Yan, Ruyue; Chen, Kevin J

2016-06-09

Transistors based on MoS2 and other TMDs have been widely studied. The dangling-bond free surface of MoS2 has made the deposition of high-quality high-k dielectrics on MoS2 a challenge. The resulted transistors often suffer from the threshold voltage instability induced by the high density traps near MoS2/dielectric interface or inside the gate dielectric, which is detrimental for the practical applications of MoS2 metal-oxide-semiconductor field-effect transistor (MOSFET). In this work, by using AlN deposited by plasma enhanced atomic layer deposition (PEALD) as an interfacial layer, top-gate dielectrics as thin as 6 nm for single-layer MoS2 transistors are demonstrated. The AlN interfacial layer not only promotes the conformal deposition of high-quality Al2O3 on the dangling-bond free MoS2, but also greatly enhances the electrical stability of the MoS2 transistors. Very small hysteresis (ΔVth) is observed even at large gate biases and high temperatures. The transistor also exhibits a low level of flicker noise, which clearly originates from the Hooge mobility fluctuation instead of the carrier number fluctuation. The observed superior electrical stability of MoS2 transistor is attributed to the low border trap density of the AlN interfacial layer, as well as the small gate leakage and high dielectric strength of AlN/Al2O3 dielectric stack.

Hysteresis in voltage-gated channels.

PubMed

Villalba-Galea, Carlos A

2017-03-04

Ion channels constitute a superfamily of membrane proteins found in all living creatures. Their activity allows fast translocation of ions across the plasma membrane down the ion's transmembrane electrochemical gradient, resulting in a difference in electrical potential across the plasma membrane, known as the membrane potential. A group within this superfamily, namely voltage-gated channels, displays activity that is sensitive to the membrane potential. The activity of voltage-gated channels is controlled by the membrane potential, while the membrane potential is changed by these channels' activity. This interplay produces variations in the membrane potential that have evolved into electrical signals in many organisms. These signals are essential for numerous biological processes, including neuronal activity, insulin release, muscle contraction, fertilization and many others. In recent years, the activity of the voltage-gated channels has been observed not to follow a simple relationship with the membrane potential. Instead, it has been shown that the activity of voltage-gated channel displays hysteresis. In fact, a growing number of evidence have demonstrated that the voltage dependence of channel activity is dynamically modulated by activity itself. In spite of the great impact that this property can have on electrical signaling, hysteresis in voltage-gated channels is often overlooked. Addressing this issue, this review provides examples of voltage-gated ion channels displaying hysteretic behavior. Further, this review will discuss how Dynamic Voltage Dependence in voltage-gated channels can have a physiological role in electrical signaling. Furthermore, this review will elaborate on the current thoughts on the mechanism underlying hysteresis in voltage-gated channels.

Memristive behavior in a junctionless flash memory cell

DOE Office of Scientific and Technical Information (OSTI.GOV)

Orak, Ikram; Department of Physics, Faculty of Science and Art, Bingöl University, 12000 Bingöl; Ürel, Mustafa

2015-06-08

We report charge storage based memristive operation of a junctionless thin film flash memory cell when it is operated as a two terminal device by grounding the gate. Unlike memristors based on nanoionics, the presented device mode, which we refer to as the flashristor mode, potentially allows greater control over the memristive properties, allowing rational design. The mode is demonstrated using a depletion type n-channel ZnO transistor grown by atomic layer deposition (ALD), with HfO{sub 2} as the tunnel dielectric, Al{sub 2}O{sub 3} as the control dielectric, and non-stoichiometric silicon nitride as the charge storage layer. The device exhibits themore » pinched hysteresis of a memristor and in the unoptimized device, R{sub off}/R{sub on} ratios of about 3 are presented with low operating voltages below 5 V. A simplified model predicts R{sub off}/R{sub on} ratios can be improved significantly by adjusting the native threshold voltage of the devices. The repeatability of the resistive switching is excellent and devices exhibit 10{sup 6 }s retention time, which can, in principle, be improved by engineering the gate stack and storage layer properties. The flashristor mode can find use in analog information processing applications, such as neuromorphic computing, where well-behaving and highly repeatable memristive properties are desirable.« less

Applications of High Throughput (Combinatorial) Methodologies to Electronic, Magnetic, Optical, and Energy-Related Materials

DTIC Science & Technology

2013-06-17

of the films without having to fabricate capacitors. In addition, the use of X - ray diffraction (XRD) analysis enabled Chikyow et al.40 to identify an...effects of Al doping and annealing on the thermal stabil- ity of the Y2O3/Si gate stack were studied by X - ray photoemission spectroscopy (XPS) and X - ray ...the major diffraction features in the phase distribution. For a given structural phase, the X - ray peak intensity allows one to track the compositional

Potential means of cost reduction in grade crossing automatic gate systems. volume II : improved gate arm concepts for railroad/highway grade crossings gate systems

DOT National Transportation Integrated Search

1977-02-28

This report, Volume II of a two-volume study, examines the potential for reduction of the cost of installing and maintaining automatic gates at railroad-highway grade crossings. It includes a review of current practices, equipment, and standards; con...

Effect of stacking fault energy on mechanism of plastic deformation in nanotwinned FCC metals

DOE Office of Scientific and Technical Information (OSTI.GOV)

Borovikov, Valery; Mendelev, Mikhail I.; King, Alexander H.

Starting from a semi-empirical potential designed for Cu, we have developed a series of potentials that provide essentially constant values of all significant (calculated) materials properties except for the intrinsic stacking fault energy, which varies over a range that encompasses the lowest and highest values observed in nature. In addition, these potentials were employed in molecular dynamics (MD) simulations to investigate how stacking fault energy affects the mechanical behavior of nanotwinned face-centered cubic (FCC) materials. The results indicate that properties such as yield strength and microstructural stability do not vary systematically with stacking fault energy, but rather fall into twomore » distinct regimes corresponding to 'low' and 'high' stacking fault energies.« less

Effect of stacking fault energy on mechanism of plastic deformation in nanotwinned FCC metals

DOE PAGES

Borovikov, Valery; Mendelev, Mikhail I.; King, Alexander H.; ...

2015-05-15

Starting from a semi-empirical potential designed for Cu, we have developed a series of potentials that provide essentially constant values of all significant (calculated) materials properties except for the intrinsic stacking fault energy, which varies over a range that encompasses the lowest and highest values observed in nature. In addition, these potentials were employed in molecular dynamics (MD) simulations to investigate how stacking fault energy affects the mechanical behavior of nanotwinned face-centered cubic (FCC) materials. The results indicate that properties such as yield strength and microstructural stability do not vary systematically with stacking fault energy, but rather fall into twomore » distinct regimes corresponding to 'low' and 'high' stacking fault energies.« less

Nanowire FET Based Neural Element for Robotic Tactile Sensing Skin

PubMed Central

Taube Navaraj, William; García Núñez, Carlos; Shakthivel, Dhayalan; Vinciguerra, Vincenzo; Labeau, Fabrice; Gregory, Duncan H.; Dahiya, Ravinder

2017-01-01

This paper presents novel Neural Nanowire Field Effect Transistors (υ-NWFETs) based hardware-implementable neural network (HNN) approach for tactile data processing in electronic skin (e-skin). The viability of Si nanowires (NWs) as the active material for υ-NWFETs in HNN is explored through modeling and demonstrated by fabricating the first device. Using υ-NWFETs to realize HNNs is an interesting approach as by printing NWs on large area flexible substrates it will be possible to develop a bendable tactile skin with distributed neural elements (for local data processing, as in biological skin) in the backplane. The modeling and simulation of υ-NWFET based devices show that the overlapping areas between individual gates and the floating gate determines the initial synaptic weights of the neural network - thus validating the working of υ-NWFETs as the building block for HNN. The simulation has been further extended to υ-NWFET based circuits and neuronal computation system and this has been validated by interfacing it with a transparent tactile skin prototype (comprising of 6 × 6 ITO based capacitive tactile sensors array) integrated on the palm of a 3D printed robotic hand. In this regard, a tactile data coding system is presented to detect touch gesture and the direction of touch. Following these simulation studies, a four-gated υ-NWFET is fabricated with Pt/Ti metal stack for gates, source and drain, Ni floating gate, and Al2O3 high-k dielectric layer. The current-voltage characteristics of fabricated υ-NWFET devices confirm the dependence of turn-off voltages on the (synaptic) weight of each gate. The presented υ-NWFET approach is promising for a neuro-robotic tactile sensory system with distributed computing as well as numerous futuristic applications such as prosthetics, and electroceuticals. PMID:28979183

Hysteresis in voltage-gated channels

PubMed Central

2017-01-01

ABSTRACT Ion channels constitute a superfamily of membrane proteins found in all living creatures. Their activity allows fast translocation of ions across the plasma membrane down the ion's transmembrane electrochemical gradient, resulting in a difference in electrical potential across the plasma membrane, known as the membrane potential. A group within this superfamily, namely voltage-gated channels, displays activity that is sensitive to the membrane potential. The activity of voltage-gated channels is controlled by the membrane potential, while the membrane potential is changed by these channels' activity. This interplay produces variations in the membrane potential that have evolved into electrical signals in many organisms. These signals are essential for numerous biological processes, including neuronal activity, insulin release, muscle contraction, fertilization and many others. In recent years, the activity of the voltage-gated channels has been observed not to follow a simple relationship with the membrane potential. Instead, it has been shown that the activity of voltage-gated channel displays hysteresis. In fact, a growing number of evidence have demonstrated that the voltage dependence of channel activity is dynamically modulated by activity itself. In spite of the great impact that this property can have on electrical signaling, hysteresis in voltage-gated channels is often overlooked. Addressing this issue, this review provides examples of voltage-gated ion channels displaying hysteretic behavior. Further, this review will discuss how Dynamic Voltage Dependence in voltage-gated channels can have a physiological role in electrical signaling. Furthermore, this review will elaborate on the current thoughts on the mechanism underlying hysteresis in voltage-gated channels. PMID:27689426

Tunneling Plasmonics in Bilayer Graphene.

PubMed

Fei, Z; Iwinski, E G; Ni, G X; Zhang, L M; Bao, W; Rodin, A S; Lee, Y; Wagner, M; Liu, M K; Dai, S; Goldflam, M D; Thiemens, M; Keilmann, F; Lau, C N; Castro-Neto, A H; Fogler, M M; Basov, D N

2015-08-12

We report experimental signatures of plasmonic effects due to electron tunneling between adjacent graphene layers. At subnanometer separation, such layers can form either a strongly coupled bilayer graphene with a Bernal stacking or a weakly coupled double-layer graphene with a random stacking order. Effects due to interlayer tunneling dominate in the former case but are negligible in the latter. We found through infrared nanoimaging that bilayer graphene supports plasmons with a higher degree of confinement compared to single- and double-layer graphene, a direct consequence of interlayer tunneling. Moreover, we were able to shut off plasmons in bilayer graphene through gating within a wide voltage range. Theoretical modeling indicates that such a plasmon-off region is directly linked to a gapped insulating state of bilayer graphene, yet another implication of interlayer tunneling. Our work uncovers essential plasmonic properties in bilayer graphene and suggests a possibility to achieve novel plasmonic functionalities in graphene few-layers.

Barrier inhomogeneities at vertically stacked graphene-based heterostructures.

PubMed

Lin, Yen-Fu; Li, Wenwu; Li, Song-Lin; Xu, Yong; Aparecido-Ferreira, Alex; Komatsu, Katsuyoshi; Sun, Huabin; Nakaharai, Shu; Tsukagoshi, Kazuhito

2014-01-21

The integration of graphene and other atomically flat, two-dimensional materials has attracted much interest and been materialized very recently. An in-depth understanding of transport mechanisms in such heterostructures is essential. In this study, vertically stacked graphene-based heterostructure transistors were manufactured to elucidate the mechanism of electron injection at the interface. The temperature dependence of the electrical characteristics was investigated from 300 to 90 K. In a careful analysis of current-voltage characteristics, an unusual decrease in the effective Schottky barrier height and increase in the ideality factor were observed with decreasing temperature. A model of thermionic emission with a Gaussian distribution of barriers was able to precisely interpret the conduction mechanism. Furthermore, mapping of the effective Schottky barrier height is unmasked as a function of temperature and gate voltage. The results offer significant insight for the development of future layer-integration technology based on graphene-based heterostructures.

Effects of Negative-Bias-Temperature-Instability on Low-Frequency Noise in SiGe $${p}$$ MOSFETs

DOE PAGES

Duan, Guo Xing; Hachtel, Jordan A.; Zhang, En Xia; ...

2016-09-20

In this paper, we have measured the low-frequency 1/f noise of Si 0.55Ge 0.45 pMOSFETs with a Si capping layer and SiO 2/HfO 2/TiN gate stack as a function of frequency, gate voltage, and temperature (100-440 K). The magnitude of the excess drain voltage noise power spectral density (Svd) is unaffected by negative-bias-temperature stress (NBTS) for temperatures below ~250 K, but increases significantly at higher temperatures. The noise is described well by the Dutta-Horn model before and after NBTS. The noise at higher measuring temperatures is attributed primarily to oxygen-vacancy and hydrogen-related defects in the SiO 2 and HfO 2more » layers. Finally, at lower measuring temperatures, the noise also appears to be affected strongly by hydrogen-dopant interactions in the SiGe layer of the device.« less

Terahertz time-gated spectral imaging for content extraction through layered structures

PubMed Central

Redo-Sanchez, Albert; Heshmat, Barmak; Aghasi, Alireza; Naqvi, Salman; Zhang, Mingjie; Romberg, Justin; Raskar, Ramesh

2016-01-01

Spatial resolution, spectral contrast and occlusion are three major bottlenecks for non-invasive inspection of complex samples with current imaging technologies. We exploit the sub-picosecond time resolution along with spectral resolution provided by terahertz time-domain spectroscopy to computationally extract occluding content from layers whose thicknesses are wavelength comparable. The method uses the statistics of the reflected terahertz electric field at subwavelength gaps to lock into each layer position and then uses a time-gated spectral kurtosis to tune to highest spectral contrast of the content on that specific layer. To demonstrate, occluding textual content was successfully extracted from a packed stack of paper pages down to nine pages without human supervision. The method provides over an order of magnitude enhancement in the signal contrast and can impact inspection of structural defects in wooden objects, plastic components, composites, drugs and especially cultural artefacts with subwavelength or wavelength comparable layers. PMID:27610926

Mixing Of Mode Symmetries In Top Gated Bilayer And Multilayer Graphene Field Effect Devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chakraborty, Biswanath; Das, Anindya; Sood, A. K.

2011-07-15

We report Raman study to investigate the influence of stacking on the inversion symmetry breaking in top gated bi- and multi-layer ({approx}10 layers) graphene field effect transistors. The G phonon mode splits into a low frequency (G{sub low}) and a high frequency (G{sub high}) mode in bi- and multi-layer graphene and the two modes show different dependence on doping. The mode splitting is explained in terms of mixing of zone-center in-plane optical phonons representing in-phase and out-of-phase inter-layer atomic motions. Unlike in bilayer graphene, there is no transfer of intensity from G{sub low} to G{sub high} in multilayer graphene. Amore » comparison is made for the bilayer graphene data with the recent theory of Gava et al. [Phys. Rev. B 80, 155422 (2009)].« less

Experimental evidence for the correlation between the weak inversion hump and near midgap states in dielectric/InGaAs interfaces

NASA Astrophysics Data System (ADS)

Krylov, Igor; Kornblum, Lior; Gavrilov, Arkady; Ritter, Dan; Eizenberg, Moshe

2012-04-01

Temperature dependent capacitance-voltage (C-V) and conductance-voltage (G-V) measurements were performed to obtain activation energies (EA) for weak inversion C-V humps and parallel conductance peaks in Al2O3/InGaAs and Si3N4/InGaAs gate stacks. Values of 0.48 eV (slightly more than half of the band gap of the studied In0.53Ga0.47As) were obtained for EA of both phenomena for both gate dielectrics studied. This indicates an universal InGaAs behavior and shows that both phenomena are due to generation-recombination of minority carriers through near midgap located interface states. The C-V hump correlates with the interface states density (Dit) and can be used as a characterization tool for dielectric/InGaAs systems.

Implementation of atomic layer deposition-based AlON gate dielectrics in AlGaN/GaN MOS structure and its physical and electrical properties

NASA Astrophysics Data System (ADS)

Nozaki, Mikito; Watanabe, Kenta; Yamada, Takahiro; Shih, Hong-An; Nakazawa, Satoshi; Anda, Yoshiharu; Ueda, Tetsuzo; Yoshigoe, Akitaka; Hosoi, Takuji; Shimura, Takayoshi; Watanabe, Heiji

2018-06-01

Alumina incorporating nitrogen (aluminum oxynitride; AlON) for immunity against charge injection was grown on a AlGaN/GaN substrate through the repeated atomic layer deposition (ALD) of AlN layers and in situ oxidation in ozone (O3) ambient under optimized conditions. The nitrogen distribution was uniform in the depth direction, the composition was controllable over a wide range (0.5–32%), and the thickness could be precisely controlled. Physical analysis based on synchrotron radiation X-ray photoelectron spectroscopy (SR-XPS) revealed that harmful intermixing at the insulator/AlGaN interface causing Ga out-diffusion in the gate stack was effectively suppressed by this method. AlON/AlGaN/GaN MOS capacitors were fabricated, and they had excellent electrical properties and immunity against electrical stressing as a result of the improved interface stability.

Fuel Cell Auxiliary Power Study Volume 1: RASER Task Order 5

NASA Technical Reports Server (NTRS)

Mak, Audie; Meier, John

2007-01-01

This study evaluated the feasibility of a hybrid solid oxide fuel cell (SOFC) auxiliary power unit (APU) and the impact in a 90-passenger More-Electric Regional Jet application. The study established realistic hybrid SOFC APU system weight and system efficiencies, and evaluated the impact on the aircraft total weight, fuel burn, and emissions from the main engine and the APU during cruise, landing and take-off (LTO) cycle, and at the gate. Although the SOFC APU may be heavier than the current conventional APU, its weight disadvantage can be offset by fuel savings in the higher SOFC APU system efficiencies against the main engine bleed and extraction during cruise. The higher SOFC APU system efficiency compared to the conventional APU on the ground can also provide considerable fuel saving and emissions reduction, particularly at the gate, but is limited by the fuel cell stack thermal fatigue characteristic.

Organic transistors making use of room temperature ionic liquids as gating medium

NASA Astrophysics Data System (ADS)

Hoyos, Jonathan Javier Sayago

The ability to couple ionic and electronic transport in organic transistors, based on pi conjugated organic materials for the transistor channel, can be particularly interesting to achieve low voltage transistor operation, i.e. below 1 V. The operation voltage in typical organic transistors based on conventional dielectrics (200 nm thick SiO2) is commonly higher than 10 V. Electrolyte-gated (EG) transistors, i.e. employing an electrolyte as the gating medium, permit current modulations of several orders of magnitude at relatively low gate voltages thanks to the exceptionally high capacitance at the electrolyte/transistor channel interface, in turn due to the low thickness (ca. 3 nm) of the electrical double layers forming at the electrolyte/semiconductor interface. Electrolytes based on room temperature ionic liquids (RTILs) are promising in EG transistor applications for their high electrochemical stability and good ionic conductivity. The main motivation behind this work is to achieve low voltage operation in organic transistors by making use of RTILs as gating medium. First we demonstrate the importance of the gate electrode material in the EG transistor performance. The use of high surface area carbon gate electrodes limits undesirable electrochemical processes and renders unnecessary the presence of a reference electrode to monitor the channel potential. This was demonstrated using activated carbon as gate electrode, the electronic conducting polymer MEH-PPV, poly[2-methoxy-5-(2'-ethylhexyloxy)-1,4-phenylene vinylene] channel material, and the ionic liquid [EMIM][TFSI] (1-ethyl-3-methylimidazolium bis(trifluoromethylsulfonyl)imide), as gating medium. Using high surface area gate electrodes resulted in sub-1 V operation and charge carrier mobilities of (1.0 +/- 0.5) x 10-2 cm2V -1s-1. A challenge in the field of EG transistors is to decrease their response time, a consequence of the slow ion redistribution in the transistor channel upon application of electric biases. We systematically investigated EG transistors employing RTILs belonging to the same family, i.e. based on a common anion and different cations. The transistor characteristics showed a limited cation influence in establishing the p-type doping of the conducting polymer. Interestingly, we observed that the transistor response time depends on at least two processes: the redistribution of ions from the electrolyte into the transistor channel, affecting the gate-source current (I gs); and the redistribution of charges in the transistor channel, affecting the drain-source current (Ids), as a function of time. The two processes have different rates, with the latter being the slowest. Incorporating propylene carbonate in the electrolyte proved to be an effective solution to increase the ionic conductivity, to lower the viscosity and, consequently, to reduce the transistor response time. Finally, we were able to demonstrate a multifunctional device integrating the transistor logic function with that of energy storage in a supercapacitor: the TransCap. The polymer/electrolyte/carbon vertical stacking of the EG transistor features the cell configuration of a hybrid supercapacitor. Supercapacitors are high specific power systems that, for their ability to store/deliver charge within short times may outperform batteries in applications having high power demand. When the TransCap is ON (open transistor channel), the polymer and the carbon gate electrodes store charge (Q) at a given Vgs, hence the stored energy equals Q˙V gs. When the TransCap is switched OFF, the channel and the gate are discharged and the energy can be delivered back to power other electronic components. EG transistors, making use of activated carbon as gate electrode and different RTILs as well as RTIL solvent mixtures as electrolyte gating medium, are interesting towards low voltage printable electronics. The high capacitance at the interface between the electrolyte and the transistor channel enables energy storage within the EG transistor architecture.

Gate-tunable carbon nanotube-MoS2 heterojunction p-n diode.

PubMed

Jariwala, Deep; Sangwan, Vinod K; Wu, Chung-Chiang; Prabhumirashi, Pradyumna L; Geier, Michael L; Marks, Tobin J; Lauhon, Lincoln J; Hersam, Mark C

2013-11-05

The p-n junction diode and field-effect transistor are the two most ubiquitous building blocks of modern electronics and optoelectronics. In recent years, the emergence of reduced dimensionality materials has suggested that these components can be scaled down to atomic thicknesses. Although high-performance field-effect devices have been achieved from monolayered materials and their heterostructures, a p-n heterojunction diode derived from ultrathin materials is notably absent and constrains the fabrication of complex electronic and optoelectronic circuits. Here we demonstrate a gate-tunable p-n heterojunction diode using semiconducting single-walled carbon nanotubes (SWCNTs) and single-layer molybdenum disulfide as p-type and n-type semiconductors, respectively. The vertical stacking of these two direct band gap semiconductors forms a heterojunction with electrical characteristics that can be tuned with an applied gate bias to achieve a wide range of charge transport behavior ranging from insulating to rectifying with forward-to-reverse bias current ratios exceeding 10(4). This heterojunction diode also responds strongly to optical irradiation with an external quantum efficiency of 25% and fast photoresponse <15 μs. Because SWCNTs have a diverse range of electrical properties as a function of chirality and an increasing number of atomically thin 2D nanomaterials are being isolated, the gate-tunable p-n heterojunction concept presented here should be widely generalizable to realize diverse ultrathin, high-performance electronics and optoelectronics.

Gate-tunable carbon nanotube–MoS2 heterojunction p-n diode

PubMed Central

Jariwala, Deep; Sangwan, Vinod K.; Wu, Chung-Chiang; Prabhumirashi, Pradyumna L.; Geier, Michael L.; Marks, Tobin J.; Lauhon, Lincoln J.; Hersam, Mark C.

2013-01-01

The p-n junction diode and field-effect transistor are the two most ubiquitous building blocks of modern electronics and optoelectronics. In recent years, the emergence of reduced dimensionality materials has suggested that these components can be scaled down to atomic thicknesses. Although high-performance field-effect devices have been achieved from monolayered materials and their heterostructures, a p-n heterojunction diode derived from ultrathin materials is notably absent and constrains the fabrication of complex electronic and optoelectronic circuits. Here we demonstrate a gate-tunable p-n heterojunction diode using semiconducting single-walled carbon nanotubes (SWCNTs) and single-layer molybdenum disulfide as p-type and n-type semiconductors, respectively. The vertical stacking of these two direct band gap semiconductors forms a heterojunction with electrical characteristics that can be tuned with an applied gate bias to achieve a wide range of charge transport behavior ranging from insulating to rectifying with forward-to-reverse bias current ratios exceeding 104. This heterojunction diode also responds strongly to optical irradiation with an external quantum efficiency of 25% and fast photoresponse <15 μs. Because SWCNTs have a diverse range of electrical properties as a function of chirality and an increasing number of atomically thin 2D nanomaterials are being isolated, the gate-tunable p-n heterojunction concept presented here should be widely generalizable to realize diverse ultrathin, high-performance electronics and optoelectronics. PMID:24145425

Influence of gate width on gate-channel carrier mobility in AlGaN/GaN heterostructure field-effect transistors

NASA Astrophysics Data System (ADS)

Yang, Ming; Ji, Qizheng; Gao, Zhiliang; Zhang, Shufeng; Lin, Zhaojun; Yuan, Yafei; Song, Bo; Mei, Gaofeng; Lu, Ziwei; He, Jihao

2017-11-01

For the fabricated AlGaN/GaN heterostructure field-effect transistors (HFETs) with different gate widths, the gate-channel carrier mobility is experimentally obtained from the measured current-voltage and capacitance-voltage curves. Under each gate voltage, the mobility gets lower with gate width increasing. Analysis shows that the phenomenon results from the polarization Coulomb field (PCF) scattering, which originates from the irregularly distributed polarization charges at the AlGaN/GaN interface. The device with a larger gate width is with a larger PCF scattering potential and a stronger PCF scattering intensity. As a function of gate width, PCF scattering potential shows a same trend with the mobility variation. And the theoretically calculated mobility values fits well with the experimentally obtained values. Varying gate widths will be a new perspective for the improvement of device characteristics by modulating the gate-channel carrier mobility.

Asymmetrical field emitter

DOEpatents

Fleming, J.G.; Smith, B.K.

1995-10-10

A method is disclosed for providing a field emitter with an asymmetrical emitter structure having a very sharp tip in close proximity to its gate. One preferred embodiment of the present invention includes an asymmetrical emitter and a gate. The emitter having a tip and a side is coupled to a substrate. The gate is connected to a step in the substrate. The step has a top surface and a side wall that is substantially parallel to the side of the emitter. The tip of the emitter is in close proximity to the gate. The emitter is at an emitter potential, and the gate is at a gate potential such that with the two potentials at appropriate values, electrons are emitted from the emitter. In one embodiment, the gate is separated from the emitter by an oxide layer, and the emitter is etched anisotropically to form its tip and its asymmetrical structure. 17 figs.

Relationship between effective mobility and border traps associated with charge trapping in In0.7Ga0.3As MOSFETs with various high-κ stacks

NASA Astrophysics Data System (ADS)

Kwon, Hyuk-Min; Kim, Dae-Hyun; Kim, Tae-Woo

2018-03-01

The effective mobility and reliability characteristics of In0.7Ga0.3As quantum-well (QW) MOSFETs with various high-κ gate stacks and HEMTs with a Schottky gate under bias temperature instability (BTI) stress were investigated. The effective mobilities (μeff) of HEMTs, single-layer Al2O3, bilayer Al2O3 (0.6 nm)/HfO2 (2.0 nm), and Al2O3 (0.6 nm)/HfO2 (3.0 nm) were ˜9000, ˜6158, ˜4789, and ˜4447 cm2 V-1 s-1 at N inv = 1.5 × 1012/cm2, respectively. The maximum effective mobility of In0.7Ga0.3As channel MOSFETs was compared with that of In0.7Ga0.3As/In0.48Al0.52As HEMTs, which are interface and border trap-free FETs. The results showed that the effective channel mobility was sensitive to traps in high-κ dielectrics related to interface trap density and border traps in the oxide. The ΔV T degradation of the bilayer Al2O3/HfO2 under BTI stress was greater than that of a single Al2O3 layer because the HfO2 layer had a high density of oxygen vacancies which were related to border traps.

Impact of post metal annealing on gate work function engineering for advanced MOS applications

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kumar, S. Sachin, E-mail: ssachikl995@yahoo.in; Prasad, Amitesh; Sinha, Amrita

2016-05-06

Ultra thin HfO{sub 2} high-k gate dielectric has been deposited directly on strained Si{sub 0.81}Ge{sub 0.19} by Atomic Layer Deposition (ALD) technique. The influence of different types of metal gate electrodes (Al, Au, Pt) on electrical characteristics of Metal-Oxide-Semiconductor capacitors has been studied. Our results show that the electrical characteristics of MOS device are highly dependent on the gate electrodes used. The dependency of electrical characteristics on post metal annealing was studied in detail. The measured flat band (V{sub fb}) and hysteresis (ΔV{sub fb}) from high frequency C-V characteristics were used to study the pre-existing traps in the dielectric. Impactmore » of PMA on interface state density (D{sub it}), border trap density (N{sub bt}) and oxide trap density (Q{sub f/q}) of high-k gate stack were also examined for all the devices. The N{sub bt} and frequency dispersion significantly reduces to ~2.77x1010 cm{sup −2} and ~11.34 % respectively in case of Al electrode with a Dit value of ~4x10{sup 12} eV{sup −1}cm{sup −2} after PMA (350°C) in N{sub 2}, suggesting an improvement in device performance while Pt electrode shows a much less value of ΔVfb (~0.02 V) and Dit (~3.44x10{sup 12} eV{sup −1}cm{sup −2}) after PMA.« less

Improved Gate Dielectric Deposition and Enhanced Electrical Stability for Single-Layer MoS2 MOSFET with an AlN Interfacial Layer

PubMed Central

Qian, Qingkai; Li, Baikui; Hua, Mengyuan; Zhang, Zhaofu; Lan, Feifei; Xu, Yongkuan; Yan, Ruyue; Chen, Kevin J.

2016-01-01

Transistors based on MoS2 and other TMDs have been widely studied. The dangling-bond free surface of MoS2 has made the deposition of high-quality high-k dielectrics on MoS2 a challenge. The resulted transistors often suffer from the threshold voltage instability induced by the high density traps near MoS2/dielectric interface or inside the gate dielectric, which is detrimental for the practical applications of MoS2 metal-oxide-semiconductor field-effect transistor (MOSFET). In this work, by using AlN deposited by plasma enhanced atomic layer deposition (PEALD) as an interfacial layer, top-gate dielectrics as thin as 6 nm for single-layer MoS2 transistors are demonstrated. The AlN interfacial layer not only promotes the conformal deposition of high-quality Al2O3 on the dangling-bond free MoS2, but also greatly enhances the electrical stability of the MoS2 transistors. Very small hysteresis (ΔVth) is observed even at large gate biases and high temperatures. The transistor also exhibits a low level of flicker noise, which clearly originates from the Hooge mobility fluctuation instead of the carrier number fluctuation. The observed superior electrical stability of MoS2 transistor is attributed to the low border trap density of the AlN interfacial layer, as well as the small gate leakage and high dielectric strength of AlN/Al2O3 dielectric stack. PMID:27279454

Development and testing of a contamination potential mapping system for a portion of the General Separations Area, Savannah River Site, South Carolina

USGS Publications Warehouse

Rine, J.M.; Berg, R.C.; Shafer, J.M.; Covington, E.R.; Reed, J.K.; Bennett, C.B.; Trudnak, J.E.

1998-01-01

A methodology was developed to evaluate and map the contamination potential or aquifer sensitivity of the upper groundwater flow system of a portion of the General Separations Area (GSA) at the Department of Energy's Savannah River Site (SRS) in South Carolina. A Geographic Information System (GIS) was used to integrate diverse subsurface geologic data, soils data, and hydrology utilizing a stack-unit mapping approach to construct mapping layers. This is the first time that such an approach has been used to delineate the hydrogeology of a coastal plain environment. Unit surface elevation maps were constructed for the tops of six Tertiary units derived from over 200 boring logs. Thickness or isopach maps were created for five hydrogeologic units by differencing top and basal surface elevations. The geologic stack-unit map was created by stacking the five isopach maps and adding codes for each stack-unit polygon. Stacked-units were rated according to their hydrogeologic properties and ranked using a logarithmic approach (utility theory) to establish a contamination potential index. Colors were assigned to help display relative importance of stacked-units in preventing or promoting transport of contaminants. The sensitivity assessment included the effects of surface soils on contaminants which are particularly important for evaluating potential effects from surface spills. Hydrogeologic/hydrologic factors did not exhibit sufficient spatial variation to warrant incorporation into contamination potential assessment. Development of this contamination potential mapping system provides a useful tool for site planners, environmental scientists, and regulatory agencies.A methodology was developed to evaluate and map the contamination potential or aquifer sensitivity of the upper groundwater flow system of a portion of the General Separations Area (GSA) at the Department of Energy's Savannah River Site (SRS) in South Carolina. A Geographic Information System (GIS) was used to integrate diverse subsurface geologic data, soils data, and hydrology utilizing a stack-unit mapping approach to construct mapping layers. This is the first time that such an approach has been used to delineate the hydrogeology of a coastal plain environment. Unit surface elevation maps were constructed for the tops of six Tertiary units derived from over 200 boring logs. Thickness or isopach maps were created for five hydrogeologic units by differencing top and basal surface elevations. The geologic stack-unit map was created by stacking the five isopach maps and adding codes for each stack-unit polygon. Stacked-units were rated according to their hydrogeologic properties and ranked using a logarithmic approach (utility theory) to establish a contamination potential index. Colors were assigned to help display relative importance of stacked-units in preventing or promoting transport of contaminants. The sensitivity assessment included the effects of surface soils on contaminants which are particularly important for evaluating potential effects from surface spills. Hydrogeologic/hydrologic factors did not exhibit sufficient spatial variation to warrant incorporation into contamination potential assessment. Development of this contamination potential mapping system provides a useful tool for site planners, environmental scientists, and regulatory agencies.

Resonant tunnelling and negative differential conductance in graphene transistors

PubMed Central

Britnell, L.; Gorbachev, R. V.; Geim, A. K.; Ponomarenko, L. A.; Mishchenko, A.; Greenaway, M. T.; Fromhold, T. M.; Novoselov, K. S.; Eaves, L.

2013-01-01

The chemical stability of graphene and other free-standing two-dimensional crystals means that they can be stacked in different combinations to produce a new class of functional materials, designed for specific device applications. Here we report resonant tunnelling of Dirac fermions through a boron nitride barrier, a few atomic layers thick, sandwiched between two graphene electrodes. The resonance occurs when the electronic spectra of the two electrodes are aligned. The resulting negative differential conductance in the device characteristics persists up to room temperature and is gate voltage-tuneable due to graphene’s unique Dirac-like spectrum. Although conventional resonant tunnelling devices comprising a quantum well sandwiched between two tunnel barriers are tens of nanometres thick, the tunnelling carriers in our devices cross only a few atomic layers, offering the prospect of ultra-fast transit times. This feature, combined with the multi-valued form of the device characteristics, has potential for applications in high-frequency and logic devices. PMID:23653206

An all-carbon vdW heterojunction composed of penta-graphene and graphene: Tuning the Schottky barrier by electrostatic gating or nitrogen doping

NASA Astrophysics Data System (ADS)

Guo, Yaguang; Wang, Fancy Qian; Wang, Qian

2017-08-01

The non-zero band gap together with other unique properties endows penta-graphene with potential for device applications. Here, we study the performance of penta-graphene as the channel material contacting with graphene to form a van der Waals heterostructure. Based on first-principles calculations, we show that the intrinsic properties of penta-graphene are preserved in the heterojunction, which is different from the conventional contact with metal surfaces. The stacked system forms an n-type Schottky barrier (Φe) at the vertical interface, while a negative band bending occurs at the lateral interface in a current-in-plane model. From the device point of view, we further demonstrate that a low-Φe or an Ohmic contact can be realized by applying an external electric field or doping graphene with nitrogen atoms. This allows the control of the Schottky barrier height, which is essential in fabricating penta-graphene-based nanotransistors.

Analysis of e-beam impact on the resist stack in e-beam lithography process

NASA Astrophysics Data System (ADS)

Indykeiwicz, K.; Paszkiewicz, B.

2013-07-01

Paper presents research on the sub-micron gate, AlGaN /GaN HEMT type transistors, fabrication by e-beam lithography and lift-off technique. The impact of the electron beam on the resists layer and the substrate was analyzed by MC method in Casino v3.2 software. The influence of technological process parameters on the metal structures resolution and quality for paths 100 nm, 300 nm and 500 nm wide and 20 μm long was studied. Qualitative simulation correspondences to the conducted experiments were obtained.

Review of Stack CSP Technologies

NASA Technical Reports Server (NTRS)

Ghaffarian, R.

1999-01-01

CSP is an emerging technology with significant potential growth in stacking. Many of the stacking techniques for conventional packages could be implemented for CSP once materials, process, and system development for finer features are developed.

Gate-Sensing the Potential Landscape of a GaAs Two-Dimensional Electron Gas

NASA Astrophysics Data System (ADS)

Croot, Xanthe; Mahoney, Alice; Pauka, Sebastian; Colless, James; Reilly, David; Watson, John; Fallahi, Saeed; Gardner, Geoff; Manfra, Michael; Lu, Hong; Gossard, Arthur

In situ dispersive gate sensors hold potential as a means of enabling the scalable readout of quantum dot arrays. Sensitive to quantum capacitance, dispersive sensors have been used to detect inter- and intra-dot transitions in GaAs double quantum dots, and can distinguish the spin states of singlet triplet qubits. In addition, the gate-sensing technique is likely of value in probing the physics of Majorana zero modes in nanowire devices. Beyond the readout signatures associated with charge and spin configurations of qubits, gate-sensing is sensitive to trapped charge in the potential landscape. Here, we report gate-sensing signals arising from tunnelling of electrons between puddles of trapped charge in a GaAs 2DEG. We examine these signals in a family of different devices with varying mobilities, and as a function of temperature and bias. Implications for qubit readout using the gate-sensing technique are discussed.

Theoretical determination of one-electron redox potentials for DNA bases, base pairs, and stacks.

PubMed

Paukku, Y; Hill, G

2011-05-12

Electron affinities, ionization potentials, and redox potentials for DNA bases, base pairs, and N-methylated derivatives are computed at the DFT/M06-2X/6-31++G(d,p) level of theory. Redox properties of a guanine-guanine stack model are explored as well. Reduction and oxidation potentials are in good agreement with the experimental ones. Electron affinities of base pairs were found to be negative. Methylation of canonical bases affects the ionization potentials the most. Base pair formation and base stacking lower ionization potentials by 0.3 eV. Pairing of guanine with the 5-methylcytosine does not seem to influence the redox properties of this base pair much.

Current-voltage characteristics influenced by the nanochannel diameter and surface charge density in a fluidic field-effect-transistor.

PubMed

Singh, Kunwar Pal; Guo, Chunlei

2017-06-21

The nanochannel diameter and surface charge density have a significant impact on current-voltage characteristics in a nanofluidic transistor. We have simulated the effect of the channel diameter and surface charge density on current-voltage characteristics of a fluidic nanochannel with positive surface charge on its walls and a gate electrode on its surface. Anion depletion/enrichment leads to a decrease/increase in ion current with gate potential. The ion current tends to increase linearly with gate potential for narrow channels at high surface charge densities and narrow channels are more effective to control the ion current at high surface charge densities. The current-voltage characteristics are highly nonlinear for wide channels at low surface charge densities and they show different regions of current change with gate potential. The ion current decreases with gate potential after attaining a peak value for wide channels at low values of surface charge densities. At low surface charge densities, the ion current can be controlled by a narrow range of gate potentials for wide channels. The current change with source drain voltage shows ohmic, limiting and overlimiting regions.

Properties of slow traps of ALD Al{sub 2}O{sub 3}/GeO{sub x}/Ge nMOSFETs with plasma post oxidation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ke, M., E-mail: kiramn@mosfet.t.u-tokyo.ac.jp; Yu, X.; Chang, C.

2016-07-18

The realization of Ge gate stacks with a small amount of slow trap density as well as thin equivalent oxide thickness and low interface state density (D{sub it}) is a crucial issue for Ge CMOS. In this study, we examine the properties of slow traps, particularly the location of slow traps, of Al{sub 2}O{sub 3}/GeO{sub x}/n-Ge and HfO{sub 2}/Al{sub 2}O{sub 3}/GeO{sub x}/n-Ge MOS interfaces with changing the process and structural parameters, formed by atomic layer deposition (ALD) of Al{sub 2}O{sub 3} and HfO{sub 2}/Al{sub 2}O{sub 3} combined with plasma post oxidation. It is found that the slow traps can locatemore » in the GeO{sub x} interfacial layer, not in the ALD Al{sub 2}O{sub 3} layer. Furthermore, we study the time dependence of channel currents in the Ge n-MOSFETs with 5-nm-thick Al{sub 2}O{sub 3}/GeO{sub x}/Ge gate stacks, with changing the thickness of GeO{sub x}, in order to further clarify the position of slow traps. The time dependence of the current drift and the effective time constant of slow traps do not change among the MOSFETs with the different thickness GeO{sub x}, demonstrating that the slow traps mainly exist near the interfaces between Ge and GeO{sub x}.« less

Potential means of cost reduction in grade crossing automatic gate systems. volume I : overview and low cost railroad/highway grade crossing gate systems

DOT National Transportation Integrated Search

1977-02-28

This report, Volume I of a two-volume study, examines the potential for reduction of the cost of installing and maintaining automatic gates at railroad-highway grade crossings. It comprises a general overview; a review of current practices, equipment...

Design considerations and emerging challenges for nanotube-, nanowire-, and negative capacitor-field effect transistors

NASA Astrophysics Data System (ADS)

Wahab, Md. Abdul

As the era of classical planar metal-oxide-semiconductor field-effect transistors (MOSFETs) comes to an end, the semiconductor industry is beginning to adopt 3D device architectures, such as FinFETs, starting at the 22 nm technology node. Since physical limits such as short channel effect (SCE) and self-heating may dominate, it may be difficult to scale Si FinFET below 10 nm. In this regard, transistors with different materials, geometries, or operating principles may help. For example, gate has excellent electrostatic control over 2D thin film channel with planar geometry, and 1D nanowire (NW) channel with gate-all-around (GAA) geometry to reduce SCE. High carrier mobility of single wall carbon nanotube (SWNT) or III-V channels may reduce VDD to reduce power consumption. Therefore, as channel of transistor, 2D thin film of array SWNTs and 1D III-V multi NWs are promising for sub 10 nm technology nodes. In this thesis, we analyze the potential of these transistors from process, performance, and reliability perspectives. For SWNT FETs, we discuss a set of challenges (such as how to (i) characterize diameter distribution, (ii) remove metallic (m)-SWNTs, and (iii) avoid electrostatic cross-talk among the neighboring SWNTs), and demonstrate solution strategies both theoretically and experimentally. Regarding self-heating in these new class of devices (SWNT FET and GAA NW FET including state-of-the-art FinFET), higher thermal resistance from poor thermal conducting oxides results significant temperature rise, and reduces the IC life-time. For GAA NW FETs, we discuss accurate self-heating evaluation with good spatial, temporal, and thermal resolutions. The introduction of negative capacitor (NC), as gate dielectric stack of transistor, allows sub 60 mV/dec operation to reduce power consumption significantly. Taken together, our work provides a comprehensive perspective regarding the challenges and opportunities of sub 10 nm technology nodes.

Power-Law Dynamics of Membrane Conductances Increase Spiking Diversity in a Hodgkin-Huxley Model.

PubMed

Teka, Wondimu; Stockton, David; Santamaria, Fidel

2016-03-01

We studied the effects of non-Markovian power-law voltage dependent conductances on the generation of action potentials and spiking patterns in a Hodgkin-Huxley model. To implement slow-adapting power-law dynamics of the gating variables of the potassium, n, and sodium, m and h, conductances we used fractional derivatives of order η≤1. The fractional derivatives were used to solve the kinetic equations of each gate. We systematically classified the properties of each gate as a function of η. We then tested if the full model could generate action potentials with the different power-law behaving gates. Finally, we studied the patterns of action potential that emerged in each case. Our results show the model produces a wide range of action potential shapes and spiking patterns in response to constant current stimulation as a function of η. In comparison with the classical model, the action potential shapes for power-law behaving potassium conductance (n gate) showed a longer peak and shallow hyperpolarization; for power-law activation of the sodium conductance (m gate), the action potentials had a sharp rise time; and for power-law inactivation of the sodium conductance (h gate) the spikes had wider peak that for low values of η replicated pituitary- and cardiac-type action potentials. With all physiological parameters fixed a wide range of spiking patterns emerged as a function of the value of the constant input current and η, such as square wave bursting, mixed mode oscillations, and pseudo-plateau potentials. Our analyses show that the intrinsic memory trace of the fractional derivative provides a negative feedback mechanism between the voltage trace and the activity of the power-law behaving gate variable. As a consequence, power-law behaving conductances result in an increase in the number of spiking patterns a neuron can generate and, we propose, expand the computational capacity of the neuron.

Effect of forming gas annealing on the degradation properties of Ge-based MOS stacks

NASA Astrophysics Data System (ADS)

Aguirre, F.; Pazos, S.; Palumbo, F. R. M.; Fadida, S.; Winter, R.; Eizenberg, M.

2018-04-01

The influence of forming gas annealing on the degradation at a constant stress voltage of multi-layered germanium-based Metal-Oxide-Semiconductor capacitors (p-Ge/GeOx/Al2O3/High-K/Metal Gate) has been analyzed in terms of the C-V hysteresis and flat band voltage as a function of both negative and positive stress fields. Significant differences were found for the case of negative voltage stress between the annealed and non-annealed samples, independently of the stressing time. It was found that the hole trapping effect decreases in the case of the forming gas annealed samples, indicating strong passivation of defects with energies close to the valence band existing in the oxide-semiconductor interface during the forming gas annealing. Finally, a comparison between the degradation dynamics of Germanium and III-V (n-InGaAs) MOS stacks is presented to summarize the main challenges in the integration of reliable Ge-III-V hybrid devices.

Investigation of multilayer WS2 flakes as charge trapping stack layers in non-volatile memories

NASA Astrophysics Data System (ADS)

Wang, Hong; Ren, Deliang; Lu, Chao; Yan, Xiaobing

2018-06-01

In this study, the non-volatile flash memory devices utilize tungsten sulfide flakes as the charge trapping stack layers were fabricated. The sandwiched structure of Pd/ZHO/WS2/ZHO/WS2/SiO2/Si manifests a memory window of 2.26 V and a high density of trapped charges 4.88 × 1012/cm2 under a ±5 V gate sweeping voltage. Moreover, the data retention results of as-fabricated non-volatile memories demonstrate that the high and low capacitance states are enhanced by 3.81% and 3.11%, respectively, after a measurement duration of 1.20 × 104 s. These remarkable achievements are probably attributed to the defects and band gap of WS2 flakes. Besides, the proposed memory fabrication is not only compatible with CMOS manufacturing processes but also gets rid of the high-temperature annealing process. Overall, this proposed non-volatile memory is highly attractive for low voltage, long data retention applications.

Electrical characterization of vertically stacked p-FET SOI nanowires

NASA Astrophysics Data System (ADS)

Cardoso Paz, Bruna; Cassé, Mikaël; Barraud, Sylvain; Reimbold, Gilles; Vinet, Maud; Faynot, Olivier; Antonio Pavanello, Marcelo

2018-03-01

This work presents the performance and transport characteristics of vertically stacked p-type MOSFET SOI nanowires (NWs) with inner spacers and epitaxial growth of SiGe raised source/drain. The conventional procedure to extract the effective oxide thickness (EOT) and Shift and Ratio Method (S&R) have been adapted and validated through tridimensional numerical simulations. Electrical characterization is performed for NWs with [1 1 0]- and [1 0 0]-oriented channels, as a function of both fin width (WFIN) and channel length (L). Results show a good electrostatic control and reduced short channel effects (SCE) down to 15 nm gate length, for both orientations. Effective mobility is found around two times higher for [1 1 0]- in comparison to [1 0 0]-oriented NWs due to higher holes mobility contribution in (1 1 0) plan. Improvements obtained on ION/IOFF by reducing WFIN are mainly due to subthreshold slope decrease, once small and none mobility increase is obtained for [1 1 0]- and [1 0 0]-oriented NWs, respectively.

Enhancement of minority carrier injection in ambipolar carbon nanotube transistors using double-gate structures

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kim, Bongjun; Liang, Kelly; Dodabalapur, Ananth, E-mail: ananth.dodabalapur@engr.utexas.edu

We show that double-gate ambipolar thin-film transistors can be operated to enhance minority carrier injection. The two gate potentials need to be significantly different for enhanced injection to be observed. This enhancement is highly beneficial in devices such as light-emitting transistors where balanced electron and hole injections lead to optimal performance. With ambipolar single-walled carbon nanotube semiconductors, we demonstrate that higher ambipolar currents are attained at lower source-drain voltages, which is desired for portable electronic applications, by employing double-gate structures. In addition, when the two gates are held at the same potential, the expected advantages of the double-gate transistors suchmore » as enhanced on-current are also observed.« less

Two-dimensional non-volatile programmable p-n junctions

NASA Astrophysics Data System (ADS)

Li, Dong; Chen, Mingyuan; Sun, Zhengzong; Yu, Peng; Liu, Zheng; Ajayan, Pulickel M.; Zhang, Zengxing

2017-09-01

Semiconductor p-n junctions are the elementary building blocks of most electronic and optoelectronic devices. The need for their miniaturization has fuelled the rapid growth of interest in two-dimensional (2D) materials. However, the performance of a p-n junction considerably degrades as its thickness approaches a few nanometres and traditional technologies, such as doping and implantation, become invalid at the nanoscale. Here we report stable non-volatile programmable p-n junctions fabricated from the vertically stacked all-2D semiconductor/insulator/metal layers (WSe2/hexagonal boron nitride/graphene) in a semifloating gate field-effect transistor configuration. The junction exhibits a good rectifying behaviour with a rectification ratio of 104 and photovoltaic properties with a power conversion efficiency up to 4.1% under a 6.8 nW light. Based on the non-volatile programmable properties controlled by gate voltages, the 2D p-n junctions have been exploited for various electronic and optoelectronic applications, such as memories, photovoltaics, logic rectifiers and logic optoelectronic circuits.

High Voltage, Solid-State Switch for Fusion Science Applications

NASA Astrophysics Data System (ADS)

Ziemba, Timothy; Prager, James; Miller, Kenneth E.; Slobodov, Ilia

2017-10-01

Eagle Harbor Technologies, Inc. is developing a series stack of solid-state switches to produce a single high voltage switch that can be operated at over 35 kV. During the Phase I program, EHT developed two high voltage switch modules: one with isolated power gate drive and a second with inductively coupled gate drive. These switches were tested at 15 kV and up to 300 A at switching frequencies up to 500 kHz for 10 ms bursts. Robust switching was demonstrated for both IGBTs and SiC MOSFETs. During the Phase II program, EHT will develop a higher voltage switch (>35 kV) that will be suitable for high pulsed and average power applications. EHT will work with LTX to utilize these switches to design, build, and test a pulsed magnetron driver that will be delivered to LTX before the completion of the program. EHT will present data from the Phase I program as well as preliminary results from the start of the Phase II program. With support of DOE SBIR.

Two-dimensional non-volatile programmable p-n junctions.

PubMed

Li, Dong; Chen, Mingyuan; Sun, Zhengzong; Yu, Peng; Liu, Zheng; Ajayan, Pulickel M; Zhang, Zengxing

2017-09-01

Semiconductor p-n junctions are the elementary building blocks of most electronic and optoelectronic devices. The need for their miniaturization has fuelled the rapid growth of interest in two-dimensional (2D) materials. However, the performance of a p-n junction considerably degrades as its thickness approaches a few nanometres and traditional technologies, such as doping and implantation, become invalid at the nanoscale. Here we report stable non-volatile programmable p-n junctions fabricated from the vertically stacked all-2D semiconductor/insulator/metal layers (WSe 2 /hexagonal boron nitride/graphene) in a semifloating gate field-effect transistor configuration. The junction exhibits a good rectifying behaviour with a rectification ratio of 10 4 and photovoltaic properties with a power conversion efficiency up to 4.1% under a 6.8 nW light. Based on the non-volatile programmable properties controlled by gate voltages, the 2D p-n junctions have been exploited for various electronic and optoelectronic applications, such as memories, photovoltaics, logic rectifiers and logic optoelectronic circuits.

Neutral beam and ICP etching of HKMG MOS capacitors: Observations and a plasma-induced damage model

NASA Astrophysics Data System (ADS)

Kuo, Tai-Chen; Shih, Tzu-Lang; Su, Yin-Hsien; Lee, Wen-Hsi; Current, Michael Ira; Samukawa, Seiji

2018-04-01

In this study, TiN/HfO2/Si metal-oxide-semiconductor (MOS) capacitors were etched by a neutral beam etching technique under two contrasting conditions. The configurations of neutral beam etching technique were specially designed to demonstrate a "damage-free" condition or to approximate "reactive-ion-etching-like" conditions to verify the effect of plasma-induced damage on electrical characteristics of MOS capacitors. The results show that by neutral beam etching (NBE), the interface state density (Dit) and the oxide trapped charge (Qot) were lower than routine plasma etching. Furthermore, the decrease in capacitor size does not lead to an increase in leakage current density, indicating less plasma induced side-wall damage. We present a plasma-induced gate stack damage model which we demonstrate by using these two different etching configurations. These results show that NBE is effective in preventing plasma-induced damage at the high-k/Si interface and on the high-k oxide sidewall and thus improve the electrical performance of the gate structure.

Enhanced ground bounce noise reduction in a low-leakage CMOS multiplier

NASA Astrophysics Data System (ADS)

Verma, Bipin Kumar; Akashe, Shyam; Sharma, Sanjay

2015-09-01

In this paper, various parameters are used to reduce leakage power, leakage current and noise margin of circuits to enhance their performance. A multiplier is proposed with low-leakage current and low ground bounce noise for the microprocessor, digital signal processors (DSP) and graphics engines. The ground bounce noise problem appears when a conventional power-gating circuit transits from sleep-to-active mode. This paper discusses a reduction in leakage current in the stacking power-gating technique by three modes - sleep, active and sleep-to-active. The simulation results are performed on a 4 × 4 carry-save multiplier for leakage current, active power, leakage power and ground bounce noise, and comparison made for different nanoscales. Ground bounce noise is limited to 90%. The leakage current of the circuit is decimated up to 80% and the active power is reduced to 31%. We performed simulations using cadence virtuoso 180 and 45 nm at room temperature at various supply voltages.

Retooling Laser Speckle Contrast Analysis Algorithm to Enhance Non-Invasive High Resolution Laser Speckle Functional Imaging of Cutaneous Microcirculation

NASA Astrophysics Data System (ADS)

Gnyawali, Surya C.; Blum, Kevin; Pal, Durba; Ghatak, Subhadip; Khanna, Savita; Roy, Sashwati; Sen, Chandan K.

2017-01-01

Cutaneous microvasculopathy complicates wound healing. Functional assessment of gated individual dermal microvessels is therefore of outstanding interest. Functional performance of laser speckle contrast imaging (LSCI) systems is compromised by motion artefacts. To address such weakness, post-processing of stacked images is reported. We report the first post-processing of binary raw data from a high-resolution LSCI camera. Sharp images of low-flowing microvessels were enabled by introducing inverse variance in conjunction with speckle contrast in Matlab-based program code. Extended moving window averaging enhanced signal-to-noise ratio. Functional quantitative study of blood flow kinetics was performed on single gated microvessels using a free hand tool. Based on detection of flow in low-flow microvessels, a new sharp contrast image was derived. Thus, this work presents the first distinct image with quantitative microperfusion data from gated human foot microvasculature. This versatile platform is applicable to study a wide range of tissue systems including fine vascular network in murine brain without craniotomy as well as that in the murine dorsal skin. Importantly, the algorithm reported herein is hardware agnostic and is capable of post-processing binary raw data from any camera source to improve the sensitivity of functional flow data above and beyond standard limits of the optical system.

Retooling Laser Speckle Contrast Analysis Algorithm to Enhance Non-Invasive High Resolution Laser Speckle Functional Imaging of Cutaneous Microcirculation

PubMed Central

Gnyawali, Surya C.; Blum, Kevin; Pal, Durba; Ghatak, Subhadip; Khanna, Savita; Roy, Sashwati; Sen, Chandan K.

2017-01-01

Cutaneous microvasculopathy complicates wound healing. Functional assessment of gated individual dermal microvessels is therefore of outstanding interest. Functional performance of laser speckle contrast imaging (LSCI) systems is compromised by motion artefacts. To address such weakness, post-processing of stacked images is reported. We report the first post-processing of binary raw data from a high-resolution LSCI camera. Sharp images of low-flowing microvessels were enabled by introducing inverse variance in conjunction with speckle contrast in Matlab-based program code. Extended moving window averaging enhanced signal-to-noise ratio. Functional quantitative study of blood flow kinetics was performed on single gated microvessels using a free hand tool. Based on detection of flow in low-flow microvessels, a new sharp contrast image was derived. Thus, this work presents the first distinct image with quantitative microperfusion data from gated human foot microvasculature. This versatile platform is applicable to study a wide range of tissue systems including fine vascular network in murine brain without craniotomy as well as that in the murine dorsal skin. Importantly, the algorithm reported herein is hardware agnostic and is capable of post-processing binary raw data from any camera source to improve the sensitivity of functional flow data above and beyond standard limits of the optical system. PMID:28106129

Vertical bloch line memory

NASA Technical Reports Server (NTRS)

Katti, Romney R. (Inventor); Stadler, Henry L. (Inventor); Wu, Jiin-chuan (Inventor)

1995-01-01

A new read gate design for the vertical Bloch line (VBL) memory is disclosed which offers larger operating margin than the existing read gate designs. In the existing read gate designs, a current is applied to all the stripes. The stripes that contain a VBL pair are chopped, while the stripes that do not contain a VBL pair are not chopped. The information is then detected by inspecting the presence or absence of the bubble. The margin of the chopping current amplitude is very small, and sometimes non-existent. A new method of reading Vertical Bloch Line memory is also disclosed. Instead of using the wall chirality to separate the two binary states, the spatial deflection of the stripe head is used. Also disclosed herein is a compact memory which uses vertical Bloch line (VBL) memory technology for providing data storage. A three-dimensional arrangement in the form of stacks of VBL memory layers is used to achieve high volumetric storage density. High data transfer rate is achieved by operating all the layers in parallel. Using Hall effect sensing, and optical sensing via the Faraday effect to access the data from within the three-dimensional packages, an even higher data transfer rate can be achieved due to parallel operation within each layer.

Flow-gated radial phase-contrast imaging in the presence of weak flow.

PubMed

Peng, Hsu-Hsia; Huang, Teng-Yi; Wang, Fu-Nien; Chung, Hsiao-Wen

2013-01-01

To implement a flow-gating method to acquire phase-contrast (PC) images of carotid arteries without use of an electrocardiography (ECG) signal to synchronize the acquisition of imaging data with pulsatile arterial flow. The flow-gating method was realized through radial scanning and sophisticated post-processing methods including downsampling, complex difference, and correlation analysis to improve the evaluation of flow-gating times in radial phase-contrast scans. Quantitatively comparable results (R = 0.92-0.96, n = 9) of flow-related parameters, including mean velocity, mean flow rate, and flow volume, with conventional ECG-gated imaging demonstrated that the proposed method is highly feasible. The radial flow-gating PC imaging method is applicable in carotid arteries. The proposed flow-gating method can potentially avoid the setting up of ECG-related equipment for brain imaging. This technique has potential use in patients with arrhythmia or weak ECG signals.

Dual-gate polysilicon nanoribbon biosensors enable high sensitivity detection of proteins.

PubMed

Zeimpekis, I; Sun, K; Hu, C; Ditshego, N M J; Thomas, O; de Planque, M R R; Chong, H M H; Morgan, H; Ashburn, P

2016-04-22

We demonstrate the advantages of dual-gate polysilicon nanoribbon biosensors with a comprehensive evaluation of different measurement schemes for pH and protein sensing. In particular, we compare the detection of voltage and current changes when top- and bottom-gate bias is applied. Measurements of pH show that a large voltage shift of 491 mV pH(-1) is obtained in the subthreshold region when the top-gate is kept at a fixed potential and the bottom-gate is varied (voltage sweep). This is an improvement of 16 times over the 30 mV pH(-1) measured using a top-gate sweep with the bottom-gate at a fixed potential. A similar large voltage shift of 175 mV is obtained when the protein avidin is sensed using a bottom-gate sweep. This is an improvement of 20 times compared with the 8.8 mV achieved from a top-gate sweep. Current measurements using bottom-gate sweeps do not deliver the same signal amplification as when using bottom-gate sweeps to measure voltage shifts. Thus, for detecting a small signal change on protein binding, it is advantageous to employ a double-gate transistor and to measure a voltage shift using a bottom-gate sweep. For top-gate sweeps, the use of a dual-gate transistor enables the current sensitivity to be enhanced by applying a negative bias to the bottom-gate to reduce the carrier concentration in the nanoribbon. For pH measurements, the current sensitivity increases from 65% to 149% and for avidin sensing it increases from 1.4% to 2.5%.

Dual-gate polysilicon nanoribbon biosensors enable high sensitivity detection of proteins

NASA Astrophysics Data System (ADS)

Zeimpekis, I.; Sun, K.; Hu, C.; Ditshego, N. M. J.; Thomas, O.; de Planque, M. R. R.; Chong, H. M. H.; Morgan, H.; Ashburn, P.

2016-04-01

We demonstrate the advantages of dual-gate polysilicon nanoribbon biosensors with a comprehensive evaluation of different measurement schemes for pH and protein sensing. In particular, we compare the detection of voltage and current changes when top- and bottom-gate bias is applied. Measurements of pH show that a large voltage shift of 491 mV pH-1 is obtained in the subthreshold region when the top-gate is kept at a fixed potential and the bottom-gate is varied (voltage sweep). This is an improvement of 16 times over the 30 mV pH-1 measured using a top-gate sweep with the bottom-gate at a fixed potential. A similar large voltage shift of 175 mV is obtained when the protein avidin is sensed using a bottom-gate sweep. This is an improvement of 20 times compared with the 8.8 mV achieved from a top-gate sweep. Current measurements using bottom-gate sweeps do not deliver the same signal amplification as when using bottom-gate sweeps to measure voltage shifts. Thus, for detecting a small signal change on protein binding, it is advantageous to employ a double-gate transistor and to measure a voltage shift using a bottom-gate sweep. For top-gate sweeps, the use of a dual-gate transistor enables the current sensitivity to be enhanced by applying a negative bias to the bottom-gate to reduce the carrier concentration in the nanoribbon. For pH measurements, the current sensitivity increases from 65% to 149% and for avidin sensing it increases from 1.4% to 2.5%.

CONTEXTUAL AERIAL VIEW OF "EXCLUSION" MTR AREA WITH IDAHO CHEMICAL ...

Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

CONTEXTUAL AERIAL VIEW OF "EXCLUSION" MTR AREA WITH IDAHO CHEMICAL PROCESSING PLANT IN BACKGROUND AT CENTER TOP OF VIEW. CAMERA FACING EAST. EXCLUSION GATE HOUSE AT LEFT OF VIEW. BEYOND MTR BUILDING AND ITS WING, THE PROCESS WATER BUILDING AND WORKING RESERVOIR ARE LEFT-MOST. FAN HOUSE AND STACK ARE TO ITS RIGHT. PLUG STORAGE BUILDING IS RIGHT-MOST STRUCTURE. NOTE FAN LOFT ABOVE MTR BUILDING'S ONE-STORY WING. THIS WAS LATER CONVERTED FOR OFFICES. INL NEGATIVE NO. 3610. Unknown Photographer, 10/30/1951 - Idaho National Engineering Laboratory, Test Reactor Area, Materials & Engineering Test Reactors, Scoville, Butte County, ID

Near-field heat transfer between graphene/hBN multilayers

NASA Astrophysics Data System (ADS)

Zhao, Bo; Guizal, Brahim; Zhang, Zhuomin M.; Fan, Shanhui; Antezza, Mauro

2017-06-01

We study the radiative heat transfer between multilayer structures made by a periodic repetition of a graphene sheet and a hexagonal boron nitride (hBN) slab. Surface plasmons in a monolayer graphene can couple with hyperbolic phonon polaritons in a single hBN film to form hybrid polaritons that can assist photon tunneling. For periodic multilayer graphene/hBN structures, the stacked metallic/dielectric array can give rise to a further effective hyperbolic behavior, in addition to the intrinsic natural hyperbolic behavior of hBN. The effective hyperbolicity can enable more hyperbolic polaritons that enhance the photon tunneling and hence the near-field heat transfer. However, the hybrid polaritons on the surface, i.e., surface plasmon-phonon polaritons, dominate the near-field heat transfer between multilayer structures when the topmost layer is graphene. The effective hyperbolic regions can be well predicted by the effective medium theory (EMT), thought EMT fails to capture the hybrid surface polaritons and results in a heat transfer rate much lower compared to the exact calculation. The chemical potential of the graphene sheets can be tuned through electrical gating and results in an additional modulation of the heat transfer. We found that the near-field heat transfer between multilayer structures does not increase monotonously with the number of layers in the stack, which provides a way to control the heat transfer rate by the number of graphene layers in the multilayer structure. The results may benefit the applications of near-field energy harvesting and radiative cooling based on hybrid polaritons in two-dimensional materials.

Polycyclic aromatic hydrocarbon (PAH)-containing soils from coal gangue stacking areas contribute to epithelial to mesenchymal transition (EMT) modulation on cancer cell metastasis.

PubMed

Yun, Yang; Gao, Rui; Yue, Huifeng; Liu, Xiaofang; Li, Guangke; Sang, Nan

2017-02-15

The total accumulative stockpiles of gangue in China comprise 4.5billion metric tons, and approximately 659million tons of additional gangue are generated per year. Considering the stacking characteristics are highly heterogeneous, the potential cancer risks from the presence of polycyclic aromatic hydrocarbons (PAHs) remain elusive. This study aimed to determine whether PAH-containing soil around coal gangue stacking areas poses a potential cancer risk and contributes to cancer cell metastasis. The results indicate that eighteen PAHs, primarily originated from coal gangue, exhibited distance variations from the coal gangues to the downstream villages, and the abandoned colliery posed increased potential carcinogenic risks for humans as a result of long-term stacking of coal gangue. Furthermore, soil samples stimulated HepG2 cell migration and invasion in a PAH-dependent manner, and the action was involved in PPARγ-mediated epithelial to mesenchymal transition (EMT) modulation. These findings highlight the potential cancer risk of PAH-containing soil samples around coal gangue stacking areas, and identify important biomarkers underlying the risk and targets preventing the outcomes in polluted areas. Copyright © 2016 Elsevier B.V. All rights reserved.

Two stage bioethanol refining with multi litre stacked microbial fuel cell and microbial electrolysis cell.

PubMed

Sugnaux, Marc; Happe, Manuel; Cachelin, Christian Pierre; Gloriod, Olivier; Huguenin, Gérald; Blatter, Maxime; Fischer, Fabian

2016-12-01

Ethanol, electricity, hydrogen and methane were produced in a two stage bioethanol refinery setup based on a 10L microbial fuel cell (MFC) and a 33L microbial electrolysis cell (MEC). The MFC was a triple stack for ethanol and electricity co-generation. The stack configuration produced more ethanol with faster glucose consumption the higher the stack potential. Under electrolytic conditions ethanol productivity outperformed standard conditions and reached 96.3% of the theoretically best case. At lower external loads currents and working potentials oscillated in a self-synchronized manner over all three MFC units in the stack. In the second refining stage, fermentation waste was converted into methane, using the scale up MEC stack. The bioelectric methanisation reached 91% efficiency at room temperature with an applied voltage of 1.5V using nickel cathodes. The two stage bioethanol refining process employing bioelectrochemical reactors produces more energy vectors than is possible with today's ethanol distilleries. Copyright © 2016 Elsevier Ltd. All rights reserved.

Characterizations of and Radiation Effects in Several Emerging CMOS Technologies

NASA Astrophysics Data System (ADS)

Shufeng Ren

As the conventional scaling of Si based CMOS is approaching its limit at 7 nm technology node, many perceive that the adoption of novel materials and/or device structures are inevitable to keep Moore's law going. High mobility channel materials such as III-V compound semiconductors or Ge are considered promising to replace Si in order to achieve high performance as well as low power consumption. However, interface and oxide traps have become a major obstacle for high-mobility semiconductors (such as Ge, GaAs, InGaAs, GaSb, etc) to replace Si CMOS technology. Therefore novel high-k dielectrics, such as epitaxially grown crystalline oxides, have been explored to be incorporated onto the high mobility channel materials. Moreover, to enable continued scaling, extremely scaled devices structures such as nanowire gate-all-around structure are needed in the near future. Moreover, as the CMOS industry moves into the 7 nm node and beyond, novel lithography techniques such as EUV are believed to be adopted soon, which can bring radiation damage to CMOS devices and circuit during the fabrication process. Therefore radiation hardening technology in future generations of CMOS devices has again become an interesting research topic to deal with the possible process-induced damage as well as damage caused by operating in radiation harsh environment such as outer space, nuclear plant, etc. In this thesis, the electrical properties of a few selected emerging novel CMOS devices are investigated, which include InGaAs based extremely scaled ultra-thin body nanowire gate-all-around MOSFETs, GOI (Ge On Insulator) CMOS with recessed channel and source/drain, GaAs MOSFETs with crystalline La based gate stack, and crystalline SrTiO3, are investigated to extend our understanding of their electrical characteristics, underlying physical mechanisms, and material properties. Furthermore, the radiation responses of these aforementioned novel devices are thoroughly investigated, with a focus on the total ionizing dose (TID) effect, to understand the associated physical mechanisms, and to help to inspire ideas to improve radiation immunity of these novel devices. The experimental methods used in this thesis research include the measurements of C-V, I-V characteristics, where novel gate stack and interface characterization techniques are employed, such as AC Gm method, 1/f low frequency noise method, inelastic electron tunneling spectroscopy (IETS) for chemical bonding and defects detection, and carrier transport modeling. Sentaurus TCAD simulations are also carried out to obtain more physical insight in the complex, extremely scaled, device structures.

Effect of Split Gate Size on the Electrostatic Potential and 0.7 Anomaly within Quantum Wires on a Modulation-Doped GaAs /AlGaAs Heterostructure

NASA Astrophysics Data System (ADS)

Smith, L. W.; Al-Taie, H.; Lesage, A. A. J.; Thomas, K. J.; Sfigakis, F.; See, P.; Griffiths, J. P.; Farrer, I.; Jones, G. A. C.; Ritchie, D. A.; Kelly, M. J.; Smith, C. G.

2016-04-01

We study 95 split gates of different size on a single chip using a multiplexing technique. Each split gate defines a one-dimensional channel on a modulation-doped GaAs /AlGaAs heterostructure, through which the conductance is quantized. The yield of devices showing good quantization decreases rapidly as the length of the split gates increases. However, for the subset of devices showing good quantization, there is no correlation between the electrostatic length of the one-dimensional channel (estimated using a saddle-point model) and the gate length. The variation in electrostatic length and the one-dimensional subband spacing for devices of the same gate length exceeds the variation in the average values between devices of different lengths. There is a clear correlation between the curvature of the potential barrier in the transport direction and the strength of the "0.7 anomaly": the conductance value of the 0.7 anomaly reduces as the barrier curvature becomes shallower. These results highlight the key role of the electrostatic environment in one-dimensional systems. Even in devices with clean conductance plateaus, random fluctuations in the background potential are crucial in determining the potential landscape in the active device area such that nominally identical gate structures have different characteristics.

Short protection device for stack of electrolytic cells

DOEpatents

Katz, Murray; Schroll, Craig R.

1985-10-22

Electrical short protection is provided in an electrolytic cell stack by the combination of a thin, nonporous ceramic shield and a noble metal foil disposed on opposite sides of the sealing medium in a gas manifold gasket. The thin ceramic shield, such as alumina, is placed between the porous gasket and the cell stack face at the margins of the negative end plate to the most negative cells to impede ion current flow. The noble metal foil, for instance gold, is electrically coupled to the negative potential of the stack to collect positive ions at a harmless location away from the stack face. Consequently, corrosion products from the stack structure deposit on the foil rather than on the stack face to eliminate electrical shorting of cells at the negative end of the stack.

Characterization of shallow trench isolation CMP process and its application

NASA Astrophysics Data System (ADS)

Li, Helen; Zhang, ChunLei; Liu, JinBing; Liu, ZhengFang; Chen, Kuang Han; Gbondo-Tugbawa, Tamba; Ding, Hua; Li, Flora; Lee, Brian; Gower-Hall, Aaron; Chiu, Yang-Chih

2016-03-01

Chemical mechanical polishing (CMP) has been a critical enabling technology in shallow trench isolation (STI), which is used in current integrated circuit fabrication process to accomplish device isolation. Excessive dishing and erosion in STI CMP processes, however, create device yield concerns. This paper proposes characterization and modeling techniques to address a variety of concerns in STI CMP. In the past, majority of CMP publications have been addressed on interconnect layers in backend- of-line (BEOL) process. However, the number of CMP steps in front-end-of-line (FEOL) has been increasing in more advanced process techniques like 3D-FinFET and replacement metal gate, as a results incoming topography induced by FEOL CMP steps can no longer be ignored as the topography accumulates and stacks up across multiple CMP steps and eventually propagating to BEOL layers. In this paper, we first discuss how to characterize and model STI CMP process. Once STI CMP model is developed, it can be used for screening design and detect possible manufacturing weak spots. We also work with process engineering team to establish hotspot criteria in terms of oxide dishing and nitride loss. As process technologies move from planar transistor to 3D transistor like FinFet and multi-gate, it is important to accurately predict topography in FEOL CMP processes. These incoming topographies when stacked up can have huge impact in BEOL copper processes, where copper pooling becomes catastrophic yield loss. A calibration methodology to characterize STI CMP step is developed as shown in Figure 1; moreover, this STI CMP model is validated from silicon data collected from product chips not used in calibration stage. Additionally, wafer experimental setup and metrology plan are instrumental to an accurate model with high predictive power. After a model is generated, spec limits and threshold to establish hotspots criteria can be defined. Such definition requires working closely with foundry process engineering and integration team and reviewing past failure analysis (FA) to come up a reasonable metrics. Conventionally, a potential STI weak point can be found when nitride residues remains in the active region after nitride strip. Another source of STI hotspots occurs when nitride erosion is too much, and active region can suffer severe damage.

Synergistic Potentiation of Cystic Fibrosis Transmembrane Conductance Regulator Gating by Two Chemically Distinct Potentiators, Ivacaftor (VX-770) and 5-Nitro-2-(3-Phenylpropylamino) Benzoate.

PubMed

Lin, Wen-Ying; Sohma, Yoshiro; Hwang, Tzyh-Chang

2016-09-01

Cystic fibrosis (CF) is caused by loss-of-function mutations of the cystic fibrosis transmembrane conductance regulator (CFTR) gene encoding a phosphorylation-activated but ATP-gated chloride channel. Previous studies suggested that VX-770 [ivacaftor, N-(2,4-di-tert-butyl-5-hydroxyphenyl)-4-oxo-1,4-dihydroquinoline-3-carboxamide], a CFTR potentiator now used in clinics, increases the open probability of CFTR by shifting the gating conformational changes to favor the open channel configuration. Recently the chloride channel blocker and CFTR potentiator 5-nitro-2-(3-phenylpropylamino) benzoate (NPPB) has been reported to enhance CFTR activity by a mechanism that exploits the ATP hydrolysis-driven, nonequilibrium gating mechanism unique to CFTR. Surprisingly however, NPPB increased the activity of nonhydrolytic G551D-CFTR, the third most common disease-associated mutation. Here, we further investigated the mechanism of NPPB's effects on CFTR gating by assessing its interaction with well-studied VX-770. Interestingly, once G551D-CFTR was maximally potentiated by VX-770, NPPB further increased its activity. However, quantitative analysis of this drug-drug interaction suggests that this pharmacologic synergism is not due to independent actions of NPPB and VX-770 on CFTR gating; instead, our data support a dependent mechanism involving two distinct binding sites. This latter idea is further supported by the observation that the locked-open time of a hydrolysis-deficient mutant K1250A was shortened by NPPB but prolonged by VX-770. In addition, the effectiveness of NPPB, but not of VX-770, was greatly diminished in a mutant whose second nucleotide-binding domain was completely removed. Interpreting these results under the framework of current understanding of CFTR gating not only reveals insights into the mechanism of action for different CFTR potentiators but also brings us one step forward to a more complete schematic for CFTR gating. Copyright © 2016 by The American Society for Pharmacology and Experimental Therapeutics.

Synergistic Potentiation of Cystic Fibrosis Transmembrane Conductance Regulator Gating by Two Chemically Distinct Potentiators, Ivacaftor (VX-770) and 5-Nitro-2-(3-Phenylpropylamino) Benzoate

PubMed Central

Lin, Wen-Ying; Sohma, Yoshiro

2016-01-01

Cystic fibrosis (CF) is caused by loss-of-function mutations of the cystic fibrosis transmembrane conductance regulator (CFTR) gene encoding a phosphorylation-activated but ATP-gated chloride channel. Previous studies suggested that VX-770 [ivacaftor, N-(2,4-di-tert-butyl-5-hydroxyphenyl)-4-oxo-1,4-dihydroquinoline-3-carboxamide], a CFTR potentiator now used in clinics, increases the open probability of CFTR by shifting the gating conformational changes to favor the open channel configuration. Recently the chloride channel blocker and CFTR potentiator 5-nitro-2-(3-phenylpropylamino) benzoate (NPPB) has been reported to enhance CFTR activity by a mechanism that exploits the ATP hydrolysis-driven, nonequilibrium gating mechanism unique to CFTR. Surprisingly however, NPPB increased the activity of nonhydrolytic G551D-CFTR, the third most common disease-associated mutation. Here, we further investigated the mechanism of NPPB’s effects on CFTR gating by assessing its interaction with well-studied VX-770. Interestingly, once G551D-CFTR was maximally potentiated by VX-770, NPPB further increased its activity. However, quantitative analysis of this drug–drug interaction suggests that this pharmacologic synergism is not due to independent actions of NPPB and VX-770 on CFTR gating; instead, our data support a dependent mechanism involving two distinct binding sites. This latter idea is further supported by the observation that the locked-open time of a hydrolysis-deficient mutant K1250A was shortened by NPPB but prolonged by VX-770. In addition, the effectiveness of NPPB, but not of VX-770, was greatly diminished in a mutant whose second nucleotide-binding domain was completely removed. Interpreting these results under the framework of current understanding of CFTR gating not only reveals insights into the mechanism of action for different CFTR potentiators but also brings us one step forward to a more complete schematic for CFTR gating. PMID:27413118

Auditory inhibitory gating in medial prefrontal cortex: Single unit and local field potential analysis.

PubMed

Mears, R P; Klein, A C; Cromwell, H C

2006-08-11

Medial prefrontal cortex is a crucial region involved in inhibitory processes. Damage to the medial prefrontal cortex can lead to loss of normal inhibitory control over motor, sensory, emotional and cognitive functions. The goal of the present study was to examine the basic properties of inhibitory gating in this brain region in rats. Inhibitory gating has recently been proposed as a neurophysiological assay for sensory filters in higher brain regions that potentially enable or disable information throughput. This perspective has important clinical relevance due to the findings that gating is dramatically impaired in individuals with emotional and cognitive impairments (i.e. schizophrenia). We used the standard inhibitory gating two-tone paradigm with a 500 ms interval between tones and a 10 s interval between tone pairs. We recorded both single unit and local field potentials from chronic microwire arrays implanted in the medial prefrontal cortex. We investigated short-term (within session) and long-term (between session) variability of auditory gating and additionally examined how altering the interval between the tones influenced the potency of the inhibition. The local field potentials displayed greater variability with a reduction in the amplitudes of the tone responses over both the short and long-term time windows. The decrease across sessions was most intense for the second tone response (test tone) leading to a more robust gating (lower T/C ratio). Surprisingly, single unit responses of different varieties retained similar levels of auditory responsiveness and inhibition in both the short and long-term analysis. Neural inhibition decreased monotonically related to the increase in intertone interval. This change in gating was most consistent in the local field potentials. Subsets of single unit responses did not show the lack of inhibition even for the longer intertone intervals tested (4 s interval). These findings support the idea that the medial prefrontal cortex is an important site where early inhibitory functions reside and potentially mediate psychological processes.

Creating and Probing Graphene Electron Optics with Local Scanning Probes

NASA Astrophysics Data System (ADS)

Stroscio, Joseph

Ballistic propagation and the light-like dispersion of graphene charge carriers make graphene an attractive platform for optics-inspired graphene electronics where gate tunable potentials can control electron refraction and transmission. In analogy to optical wave propagation in lenses, mirrors and metamaterials, gate potentials can be used to create a negative index of refraction for Veselago lensing and Fabry-Pérot interferometers. In circular geometries, gate potentials can induce whispering gallery modes (WGM), similar to optical and acoustic whispering galleries albeit on a much smaller length scale. Klein scattering of Dirac carriers plays a central role in determining the coherent propagation of electron waves in these resonators. In this talk, I examine the probing of electron resonators in graphene confined by linear and circular gate potentials with the scanning tunneling microscope (STM). The tip in the STM tunnel junction serves both as a tunable local gate potential, and as a probe of the graphene states through tunneling spectroscopy. A combination of a back gate potential, Vg, and tip potential, Vb, creates and controls a circular pn junction that confines the WGM graphene states. The resonances are observed in two separate channels in the tunneling spectroscopy experiment: first, by directly tunneling into the state at the bias energy eVb, and, second, by tunneling from the resonance at the Fermi level as the state is gated by the tip potential. The second channel produces a fan-like set of WGM peaks, reminiscent of the fringes seen in planar geometries by transport measurements. The WGM resonances split in a small applied magnetic field, with a large energy splitting approaching the WGM spacing at 0.5 T. These results agree well with recent theory on Klein scattering in graphene electron resonators. This work is done in collaboration with Y. Zhao, J. Wyrick, F.D. Natterer, J. F. Rodriquez-Nieva, C. Lewandoswski, K. Watanabe, T. Taniguchi, N. B. Zhitenev, and L. S. Levitov.

Design consideration of δ-doping channels for high-performance n + - GaAs / p + -InGaP/n-GaAs camel-gate field effect transistors

NASA Astrophysics Data System (ADS)

Tsai, Jung-Hui; Chen, Jeng-Shyan; Chu, Yu-Jui

2005-01-01

The influence of δ-doping channels on the performance of n +-GaAs/p +-InGaP/n-GaAs camel-gate field effect transistors is investigated by theoretical analysis and experimental results. The depleted pn junction of the camel gate and the existence of considerable conduction band discontinuity at the InGaP/GaAs heterojunction enhance the potential barrier height and the forward gate voltage. As the concentration-thickness products of the n-GaAs layer and δ-doping layer are fixed, the higher δ-doping device exhibits a higher potential barrier height, a larger drain current, and a broader gate voltage swing, whereas the transconductance is somewhat lower. For a n +=5.5×10 12 cm -2δ-doping device, the experimental result exhibits a maximum transconductance of 240 mS/mm and a gate voltage swing of 3.5 V. Consequently, the studied devices provide a good potential for large signal and linear circuit applications.

A new DG nanoscale TFET based on MOSFETs by using source gate electrode: 2D simulation and an analytical potential model

NASA Astrophysics Data System (ADS)

Ramezani, Zeinab; Orouji, Ali A.

2017-08-01

This paper suggests and investigates a double-gate (DG) MOSFET, which emulates tunnel field effect transistors (M-TFET). We have combined this novel concept into a double-gate MOSFET, which behaves as a tunneling field effect transistor by work function engineering. In the proposed structure, in addition to the main gate, we utilize another gate over the source region with zero applied voltage and a proper work function to convert the source region from N+ to P+. We check the impact obtained by varying the source gate work function and source doping on the device parameters. The simulation results of the M-TFET indicate that it is a suitable case for a switching performance. Also, we present a two-dimensional analytic potential model of the proposed structure by solving the Poisson's equation in x and y directions and by derivatives from the potential profile; thus, the electric field is achieved. To validate our present model, we use the SILVACO ATLAS device simulator. The analytical results have been compared with it.

Highly Efficient Gating of Electrically Actuated Nanochannels for Pulsatile Drug Delivery Stemming from a Reversible Wettability Switch.

PubMed

Zhang, Qianqian; Kang, Jianxin; Xie, Zhiqiang; Diao, Xungang; Liu, Zhaoyue; Zhai, Jin

2018-01-01

Many ion channels in the cell membrane are believed to function as gates that control the water and ion flow through the transitions between an inherent hydrophobic state and a stimuli-induced hydration state. The construction of nanofluidic gating systems with high gating efficiency and reversibility is inspired by this hydrophobic gating behavior. A kind of electrically actuated nanochannel is developed by integrating a polypyrrole (PPy) micro/nanoporous film doped with perfluorooctanesulfonate ions onto an anodic aluminum oxide nanoporous membrane. Stemming from the reversible wettability switch of the doped PPy film in response to the applied redox potentials, the nanochannels exhibit highly efficient and reversible gating behaviors. The optimized gating ratio is over 10 5 , which is an ultrahigh value when compared with that of the existing reversibly gated nanochannels with comparable pore diameters. Furthermore, the gating behavior of the electrically actuated nanochannels shows excellent repeatability and stability. Based on this highly efficient and reversible gating function, the electrically actuated nanochannels are further applied for drug delivery, which achieves the pulsatile release of two water-soluble drug models. The electrically actuated nanochannels may find potential applications in accurate and on-demand drug therapy. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Phosphorus and nitrogen losses from poultry litter stacks and leaching through soils

USDA-ARS?s Scientific Manuscript database

The practice of stacking poultry litter in fields prior to spreading provides important logistical benefits to farmers but is controversial due to its potential to serve as a source of nutrients to leachate and runoff. We evaluated nutrient fate under stacked poultry litter to assess differences in ...

A Rout to Protect Quantum Gates constructed via quantum walks from Noises.

PubMed

Du, Yi-Mu; Lu, Li-Hua; Li, You-Quan

2018-05-08

The continuous-time quantum walk on a one-dimensional graph of odd number of sites with an on-site potential at the center is studied. We show that such a quantum-walk system can construct an X-gate of a single qubit as well as a control gate for two qubits, when the potential is much larger than the hopping strength. We investigate the decoherence effect and find that the coherence time can be enhanced by either increasing the number of sites on the graph or the ratio of the potential to the hopping strength, which is expected to motivate the design of the quantum gate with long coherence time. We also suggest several experimental proposals to realize such a system.

Development of III-V p-MOSFETs with high-kappa gate stack for future CMOS applications

NASA Astrophysics Data System (ADS)

Nagaiah, Padmaja

As the semiconductor industry approaches the limits of traditional silicon CMOS scaling, non-silicon materials and new device architectures are gradually being introduced to improve Si integrated circuit performance and continue transistor scaling. Recently, the replacement of SiO2 with a high-k material (HfO2) as gate dielectric has essentially removed one of the biggest advantages of Si as channel material. As a result, alternate high mobility materials are being considered to replace Si in the channel to achieve higher drive currents and switching speeds. III-V materials in particular have become of great interest as channel materials, owing to their superior electron transport properties. However, there are several critical challenges that need to be addressed before III-V based CMOS can replace Si CMOS technology. Some of these challenges include development of a high quality, thermally stable gate dielectric/III-V interface, and improvement in III-V p-channel hole mobility to complement the n-channel mobility, low source/drain resistance and integration onto Si substrate. In this thesis, we would be addressing the first two issues i.e. the development high performance III-V p-channels and obtaining high quality III-V/high-k interface. We start with using the device architecture of the already established InGaAs n-channels as a baseline to understand the effect of remote scattering from the high-k oxide and oxide/semiconductor interface on channel transport properties such as electron mobility and channel electron concentration. Temperature dependent Hall electron mobility measurements were performed to separate various scattering induced mobility limiting factors. Dependence of channel mobility on proximity of the channel to the oxide interface, oxide thickness, annealing conditions are discussed. The results from this work will be used in the design of the p-channel MOSFETs. Following this, InxGa1-xAs (x>0.53) is chosen as channel material for developing p-channel MOSFETs. Band engineering, strain induced valence band splitting and quantum confinement is used to improve channel hole mobility. Experimental results on the Hall hole mobility is presented for InxGa1-xAs channels with varying In content, thickness of the quantum well and temperature. Then, high mobility InxGa 1-xAs heterostructure thus obtained are integrated with in-situ deposited high-k gate oxide required for high performance p-MOSFET and discuss the challenges associated with the gated structure and draw conclusions on this material system. Antimonide based channel materials such as GaSb and InxGa 1-xSb are explored for III-V based p-MOSFETs in last two chapters. Options for Sb based strained QW channels to obtain maximum hole mobility by varying the strain, channel and barrier material, thickness of the layers etc. is discussed followed by the growth of these Sb channels on GaAs and InP substrates using molecular beam epitaxy. The physical properties of the structures such as the heterostructure quality, alloy content and surface roughness are examined via TEM, XRD and AFM. Following this, electrical measurement results on Hall hole mobility is presented. The effect of strain, alloy content, temperature and thickness on channel mobility and concentration is reported. Development of GaSb n- and p-MOS capacitor structures with in-situ deposited HfO2 gate oxide dielectric using in-situ deposited amorphous Si (a-Si) interface passivation layer (IPL) to improve the interface quality of high-k oxide and (In)GaSb surface is presented. In-situ deposited gate oxides such as Al2O3 and combination oxide of Al 2O3 and HfO2 with and without the a-Si IPL are also explored as alternate gate dielectrics. Subsequently, MOS capacitor structures using buried InGaSb QWs are demonstrated. Development of an inversion type bulk GaSb with implanted source-drain contacts and in-situ deposited gate oxide HfO2 gate oxide is discussed. The merits of biaxial compressive strain is demonstrated on strained surface and buried channel In0.36 Ga0.64Sb QW MOSFETs with thin top barrier and in-situ deposited a-Si IPL and high-k HfO2 as well as combination Al 2O3+HfO2 gate stacks and ex-situ atomic layer deposited (ALD) combination gate oxide and with thin 2 nm InAs surface passivation layer is presented. Finally, summary of the salient results from the different chapters is provided with recommendations for future research.

From hopping to ballistic transport in graphene-based electronic devices

NASA Astrophysics Data System (ADS)

Taychatanapat, Thiti

This thesis describes electronic transport experiments in graphene from the hopping to the ballistic regime. The first experiment studies dual-gated bilayer graphene devices. By applying an electric field with these dual gates, we can open a band gap in bilayer graphene and observe an increase in resistance of over six orders of magnitude as well as a strongly non-linear behavior in the transport characteristics. A temperature-dependence study of resistance at large electric field at the charge neutrality point shows the change in the transport mechanism from a hopping dominated regime at low temperature to a diffusive regime at high temperature. The second experiment examines electronic properties of Bernal-stacked trilayer graphene. Due to the low mobility of trilayer graphene on SiO 2substrates, we employ hexagonal boron nitride as a local substrate to improve its mobility. This led us to observe a quantum Hall effect with multiple Landau level crossings, proving the coexistence of massless and massive Dirac fermions in Bernal-stacked trilayer graphene. From the position of these crossing points in magnetic field and electron density, we can deduce the band parameters used to model its band structure. At high magnetic field, we observe broken symmetry states via Landau level splittings as well as crossings among these broken-symmetry states. In the third experiment, we investigate transverse magnetic focusing (TMF) in mono-, bi-, and tri-layer graphene. The ability to tune density allows us to electronically modify focal points and investigate TMF continuously from hole to electron regimes. This also allows us to observe the change in band structure of trilayer graphene as a function of applied electric field. Finally, we also observe TMF at room temperature in monolayer graphene which unambiguously proves the existence of ballistic transport at room temperature.

Electrically programmable-erasable In-Ga-Zn-O thin-film transistor memory with atomic-layer-deposited Al{sub 2}O{sub 3}/Pt nanocrystals/Al{sub 2}O{sub 3} gate stack

DOE Office of Scientific and Technical Information (OSTI.GOV)

Qian, Shi-Bing; Zhang, Wen-Peng; Liu, Wen-Jun

Amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistor (TFT) memory is very promising for transparent and flexible system-on-panel displays; however, electrical erasability has always been a severe challenge for this memory. In this article, we demonstrated successfully an electrically programmable-erasable memory with atomic-layer-deposited Al{sub 2}O{sub 3}/Pt nanocrystals/Al{sub 2}O{sub 3} gate stack under a maximal processing temperature of 300 {sup o}C. As the programming voltage was enhanced from 14 to 19 V for a constant pulse of 0.2 ms, the threshold voltage shift increased significantly from 0.89 to 4.67 V. When the programmed device was subjected to an appropriate pulse under negative gatemore » bias, it could return to the original state with a superior erasing efficiency. The above phenomena could be attributed to Fowler-Nordheim tunnelling of electrons from the IGZO channel to the Pt nanocrystals during programming, and inverse tunnelling of the trapped electrons during erasing. In terms of 0.2-ms programming at 16 V and 350-ms erasing at −17 V, a large memory window of 3.03 V was achieved successfully. Furthermore, the memory exhibited stable repeated programming/erasing (P/E) characteristics and good data retention, i.e., for 2-ms programming at 14 V and 250-ms erasing at −14 V, a memory window of 2.08 V was still maintained after 10{sup 3} P/E cycles, and a memory window of 1.1 V was retained after 10{sup 5} s retention time.« less

Wavy Architecture Thin-Film Transistor for Ultrahigh Resolution Flexible Displays.

PubMed

Hanna, Amir Nabil; Kutbee, Arwa Talal; Subedi, Ram Chandra; Ooi, Boon; Hussain, Muhammad Mustafa

2018-01-01

A novel wavy-shaped thin-film-transistor (TFT) architecture, capable of achieving 70% higher drive current per unit chip area when compared with planar conventional TFT architectures, is reported for flexible display application. The transistor, due to its atypical architecture, does not alter the turn-on voltage or the OFF current values, leading to higher performance without compromising static power consumption. The concept behind this architecture is expanding the transistor's width vertically through grooved trenches in a structural layer deposited on a flexible substrate. Operation of zinc oxide (ZnO)-based TFTs is shown down to a bending radius of 5 mm with no degradation in the electrical performance or cracks in the gate stack. Finally, flexible low-power LEDs driven by the respective currents of the novel wavy, and conventional coplanar architectures are demonstrated, where the novel architecture is able to drive the LED at 2 × the output power, 3 versus 1.5 mW, which demonstrates the potential use for ultrahigh resolution displays in an area efficient manner. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Tunable graphene-based mid-infrared plasmonic multispectral and narrow band-stop filter

NASA Astrophysics Data System (ADS)

Wang, Xianjun; Meng, Hongyun; Liu, Shuai; Deng, Shuying; Jiao, Tao; Wei, Zhongchao; Wang, Faqiang; Tan, Chunhua; Huang, Xuguang

2018-04-01

In this paper, we numerically investigate the band-stop properties of single- or few-layers doped graphene ribbon arrays operating in the mid-infrared region by finite-difference time-domain method (FDTD). A perfect band-stop filter with extinction ratio (ER) ∼17 dB, 3 dB bandwidth ∼200 nm and the resonance notch located at 6.64 μm can be achieved. And desired working regions can be obtained by tuning the Fermi level (E f ) of the graphene ribbons and the geometrical parameters of the structure. Besides, by tuning the Fermi level of odd or even graphene ribbons with terminal gate voltage, we can achieve a dual-circuit switch with four states combinations of on-to-off. Furthermore, the multiple filter notches can be achieved by stacking few-layers structure, and the filter dips can be dynamically tuned to achieve the tunability and selective characteristics by tuning the Fermi-level of the graphene ribbons in the system. We believe that our proposal has the potential applications in selective filters and active plasmonic switching in the mid-infrared region.

Operation mode switchable charge-trap memory based on few-layer MoS2

NASA Astrophysics Data System (ADS)

Hou, Xiang; Yan, Xiao; Liu, Chunsen; Ding, Shijin; Zhang, David Wei; Zhou, Peng

2018-03-01

Ultrathin layered two-dimensional (2D) semiconductors like MoS2 and WSe2 have received a lot of attention because of their excellent electrical properties and potential applications in electronic devices. We demonstrate a charge-trap memory with two different tunable operation modes based on a few-layer MoS2 channel and an Al2O3/HfO2/Al2O3 charge storage stack. Our device shows excellent memory properties under the traditional three-terminal operation mode. More importantly, unlike conventional charge-trap devices, this device can also realize the memory performance with just two terminals (drain and source) because of the unique atomic crystal electrical characteristics. Under the two-terminal operation mode, the erase/program current ratio can reach up to 104 with a stable retention property. Our study indicates that the conventional charge-trap memory cell can also realize the memory performance without the gate terminal based on novel two dimensional materials, which is meaningful for low power consumption and high integration density applications.

Multi-board kernel communication using socket programming for embedded applications

NASA Astrophysics Data System (ADS)

Mishra, Ashish; Girdhar, Neha; Krishnia, Nikita

2016-03-01

It is often seen in large application projects, there is a need to communicate between two different processors or two different kernels. The aim of this paper is to communicate between two different kernels and use efficient method to do so. The TCP/IP protocol is implemented to communicate between two boards via the Ethernet port and use lwIP (lightweight IP) stack, which is a smaller independent implementation of the TCP/IP stack suitable for use in embedded systems. While retaining TCP/IP functionality, lwIP stack reduces the use of memory and even size of the code. In this process of communication we made Raspberry pi as an active client and Field programmable gate array(FPGA) board as a passive server and they are allowed to communicate via Ethernet. Three applications based on TCP/IP client-server network communication have been implemented. The Echo server application is used to communicate between two different kernels of two different boards. Socket programming is used as it is independent of platform and programming language used. TCP transmit and receive throughput test applications are used to measure maximum throughput of the transmission of data. These applications are based on communication to an open source tool called iperf. It is used to measure the throughput transmission rate by sending or receiving some constant piece of data to the client or server according to the test application.

Interlayer interactions in graphites.

PubMed

Chen, Xiaobin; Tian, Fuyang; Persson, Clas; Duan, Wenhui; Chen, Nan-xian

2013-11-06

Based on ab initio calculations of both the ABC- and AB-stacked graphites, interlayer potentials (i.e., graphene-graphene interaction) are obtained as a function of the interlayer spacing using a modified Möbius inversion method, and are used to calculate basic physical properties of graphite. Excellent consistency is observed between the calculated and experimental phonon dispersions of AB-stacked graphite, showing the validity of the interlayer potentials. More importantly, layer-related properties for nonideal structures (e.g., the exfoliation energy, cleave energy, stacking fault energy, surface energy, etc.) can be easily predicted from the interlayer potentials, which promise to be extremely efficient and helpful in studying van der Waals structures.

Terahertz amplification in RTD-gated HEMTs with a grating-gate wave coupling topology

NASA Astrophysics Data System (ADS)

Condori Quispe, Hugo O.; Encomendero-Risco, Jimy J.; Xing, Huili Grace; Sensale-Rodriguez, Berardi

2016-08-01

We theoretically analyze the operation of a terahertz amplifier consisting of a resonant-tunneling-diode gated high-electron-mobility transistor (RTD-gated HEMT) in a grating-gate topology. In these devices, the key element enabling substantial power gain is the efficient coupling of terahertz waves into and out of plasmons in the RTD-gated HEMT channel, i.e., the gain medium, via the grating-gate itself, part of the active device, rather than by an external antenna structure as discussed in previous works, therefore potentially enabling terahertz amplification with associated power gains >40 dB.

Terahertz amplification in RTD-gated HEMTs with a grating-gate wave coupling topology

DOE Office of Scientific and Technical Information (OSTI.GOV)

Condori Quispe, Hugo O.; Sensale-Rodriguez, Berardi; Encomendero-Risco, Jimy J.

2016-08-08

We theoretically analyze the operation of a terahertz amplifier consisting of a resonant-tunneling-diode gated high-electron-mobility transistor (RTD-gated HEMT) in a grating-gate topology. In these devices, the key element enabling substantial power gain is the efficient coupling of terahertz waves into and out of plasmons in the RTD-gated HEMT channel, i.e., the gain medium, via the grating-gate itself, part of the active device, rather than by an external antenna structure as discussed in previous works, therefore potentially enabling terahertz amplification with associated power gains >40 dB.

Chiral tunneling modulated by a time-periodic potential on the surface states of a topological insulator

PubMed Central

Li, Yuan; Jalil, Mansoor B. A.; Tan, S. G.; Zhao, W.; Bai, R.; Zhou, G. H.

2014-01-01

Time-periodic perturbation can be used to modify the transport properties of the surface states of topological insulators, specifically their chiral tunneling property. Using the scattering matrix method, we study the tunneling transmission of the surface states of a topological insulator under the influence of a time-dependent potential and finite gate bias voltage. It is found that perfect transmission is obtained for electrons which are injected normally into the time-periodic potential region in the absence of any bias voltage. However, this signature of Klein tunneling is destroyed when a bias voltage is applied, with the transmission probability of normally incident electrons decreasing with increasing gate bias voltage. Likewise, the overall conductance of the system decreases significantly when a gate bias voltage is applied. The characteristic left-handed helicity of the transmitted spin polarization is also broken by the finite gate bias voltage. In addition, the time-dependent potential modifies the large-angle transmission profile, which exhibits an oscillatory or resonance-like behavior. Finally, time-dependent transport modes (with oscillating potential in the THz frequency) can result in enhanced overall conductance, irrespective of the presence or absence of the gate bias voltage. PMID:24713634

Resonant tunneling of 1-dimensional electrons across an array of 3-dimensionally confined potential wells

NASA Astrophysics Data System (ADS)

Allee, D. R.; Chou, S. Y.; Harris, J. S.; Pease, R. F. W.

A lateral resonant tunneling field effect transistor has been fabricated with a gate electrode in the form of a railway such that the two rails form a lateral double barrier potential at the GaAs/AlGaAs interface. The ties confine the electrons in the third dimension forming an array of potential boxes or three dimensionally confined potential wells. The width of the ties and rails is 50nm; the spacings between the ties and between the two rails are 230nm and 150nm respectively. The ties are 750nm long and extend beyond the the two rails forming one dimensional wires on either side. Conductance oscillations are observed in the drain current at 4.2K as the gate voltage is scanned. Comparison with devices with a solid gate, and with a monorail gate with ties fabricated on the same wafer suggest that these conductance oscillations are electron resonant tunneling from one dimensional wires through the quasi-bound states of the three dimensionally confined potential wells. Comparison with a device with a two rail gate without ties (previously published) indicates that additional confinement due to the ties enhances the strength of the conductance oscillations.

Impact of gate engineering in enhancement mode n++GaN/InAlN/AlN/GaN HEMTs

NASA Astrophysics Data System (ADS)

Adak, Sarosij; Swain, Sanjit Kumar; Rahaman, Hafizur; Sarkar, Chandan Kumar

2016-12-01

This paper illustrate the effect of gate material engineering on the performance of enhancement mode n++GaN/InAlN/AlN/GaN high electron mobility transistors (HEMTs). A comparative analysis of key device parameters is discussed for the Triple Material Gate (TMG), Dual Material Gate (DMG) and the Single Material Gate (SMG) structure HEMTs by considering the same device dimensions. The simulation results shows that an significant improvement is noticed in the key analysis parameters such as drain current (Id), transconductance (gm), cut off frequency (fT), RF current gain, maximum cut off frequency (fmax) and RF power gain of the gate material engineered devices with respect to SMG normally off n++GaN/InAlN/AlN/GaN HEMTs. This improvement is due to the existence of the perceivable step in the surface potential along the channel which successfully screens the drain potential variation in the source side of the channel for the gate engineering devices. The analysis suggested that the proposed TMG and DMG engineered structure enhancement mode n++GaN/InAlN/AlN/GaN HEMTs can be considered as a potential device for future high speed, microwave and digital application.

Gate control of spin-polarized conductance in alloyed transitional metal nanocontacts

NASA Astrophysics Data System (ADS)

Sivkov, Ilia N.; Brovko, Oleg O.; Rungger, Ivan; Stepanyuk, Valeri S.

2017-03-01

To date, endeavors in nanoscale spintronics are dominated by the use of single-electron or single-spin transistors having at their heart a semiconductor, metallic, or molecular quantum dot whose localized states are non-spin-degenerate and can be controlled by an external bias applied via a gate electrode. Adjusting the bias of the gate one can realign those states with respect to the chemical potentials of the leads and thus tailor the spin-polarized transmission properties of the device. Here we show that similar functionality can be achieved in a purely metallic junction comprised of a metallic magnetic chain attached to metallic paramagnetic leads and biased by a gate electrode. Our ab initio calculations of electron transport through mixed Pt-Fe (Fe-Pd and Fe-Rh) atomic chains suspended between Pt (Pd and Rh) electrodes show that spin-polarized confined states of the chain can be shifted by the gate bias causing a change in the relative contributions of majority and minority channels to the nanocontact's conductance. As a result, we observe strong dependence of conductance spin polarization on the applied gate potential. In some cases the spin polarization of conductance can even be reversed in sign upon gate potential application, which is a remarkable and promising trait for spintronic applications.

Implications of a 20-Hz Booster cycle-rate for Slip-stacking

DOE Office of Scientific and Technical Information (OSTI.GOV)

Eldred, Jeffrey; Zwaska, Robert

2014-06-10

We examine the potential impacts to slip-stacking from a change of the Booster cycle-rate from 15- to 20-Hz. We find that changing the Booster cycle-rate to 20-Hz would greatly increase the slip-stacking bucket area, while potentially requiring greater usage of the Recycler momentum aperture and additional power dissipation in the RF cavities. In particular, the losses from RF interference can be reduced by a factor of 4-10 (depending on Booster beam longitudinal parameters). We discuss the aspect ratio and beam emittance requirements for efficient slip-stacking in both cycle-rate cases. Using a different injection scheme can eliminate the need for greatermore » momentum aperture in the Recycler.« less

Remote Sensing and Quantization of Analog Sensors

NASA Technical Reports Server (NTRS)

Strauss, Karl F.

2011-01-01

This method enables sensing and quantization of analog strain gauges. By manufacturing a piezoelectric sensor stack in parallel (physical) with a piezoelectric actuator stack, the capacitance of the sensor stack varies in exact proportion to the exertion applied by the actuator stack. This, in turn, varies the output frequency of the local sensor oscillator. The output, F(sub out), is fed to a phase detector, which is driven by a stable reference, F(sub ref). The output of the phase detector is a square waveform, D(sub out), whose duty cycle, t(sub W), varies in exact proportion according to whether F(sub out) is higher or lower than F(sub ref). In this design, should F(sub out) be precisely equal to F(sub ref), then the waveform has an exact 50/50 duty cycle. The waveform, D(sub out), is of generally very low frequency suitable for safe transmission over long distances without corruption. The active portion of the waveform, t(sub W), gates a remotely located counter, which is driven by a stable oscillator (source) of such frequency as to give sufficient digitization of t(sub W) to the resolution required by the application. The advantage to this scheme is that it negates the most-common, present method of sending either very low level signals (viz. direct output from the sensors) across great distances (anything over one-half meter) or the need to transmit widely varying higher frequencies over significant distances thereby eliminating interference [both in terms of beat frequency generation and in-situ EMI (electromagnetic interference)] caused by ineffective shielding. It also results in a significant reduction in shielding mass.

Alternans promotion in cardiac electrophysiology models by delay differential equations.

PubMed

Gomes, Johnny M; Dos Santos, Rodrigo Weber; Cherry, Elizabeth M

2017-09-01

Cardiac electrical alternans is a state of alternation between long and short action potentials and is frequently associated with harmful cardiac conditions. Different dynamic mechanisms can give rise to alternans; however, many cardiac models based on ordinary differential equations are not able to reproduce this phenomenon. A previous study showed that alternans can be induced by the introduction of delay differential equations (DDEs) in the formulations of the ion channel gating variables of a canine myocyte model. The present work demonstrates that this technique is not model-specific by successfully promoting alternans using DDEs for five cardiac electrophysiology models that describe different types of myocytes, with varying degrees of complexity. By analyzing results across the different models, we observe two potential requirements for alternans promotion via DDEs for ionic gates: (i) the gate must have a significant influence on the action potential duration and (ii) a delay must significantly impair the gate's recovery between consecutive action potentials.

Co-flow planar SOFC fuel cell stack

DOEpatents

Chung, Brandon W.; Pham, Ai Quoc; Glass, Robert S.

2004-11-30

A co-flow planar solid oxide fuel cell stack with an integral, internal manifold and a casing/holder to separately seal the cell. This construction improves sealing and gas flow, and provides for easy manifolding of cell stacks. In addition, the stack construction has the potential for an improved durability and operation with an additional increase in cell efficiency. The co-flow arrangement can be effectively utilized in other electrochemical systems requiring gas-proof separation of gases.

Stacking Fault Enriching the Electronic and Transport Properties of Few-Layer Phosphorenes and Black Phosphorus.

PubMed

Lei, Shuangying; Wang, Han; Huang, Lan; Sun, Yi-Yang; Zhang, Shengbai

2016-02-10

Interface engineering is critical for enriching the electronic and transport properties of two-dimensional materials. Here, we identify a new stacking, named Aδ, in few-layer phosphorenes (FLPs) and black phosphorus (BP) based on first-principles calculation. With its low formation energy, the Aδ stacking could exist in FLPs and BP as a stacking fault. The presence of the Aδ stacking fault induces a direct to indirect transition of the band gap in FLPs. It also affects the carrier mobilities by significantly increasing the carrier effective masses. More importantly, the Aδ stacking enables the fabrication of a whole spectrum of lateral junctions with all the type-I, II, and III alignments simply through the manipulation of the van der Waals stacking without resorting to any chemical modification. This is achieved by the widely tunable electron affinity and ionization potential of FLPs and BP with the Aδ stacking.

Room temperature 1040fps, 1 megapixel photon-counting image sensor with 1.1um pixel pitch

NASA Astrophysics Data System (ADS)

Masoodian, S.; Ma, J.; Starkey, D.; Wang, T. J.; Yamashita, Y.; Fossum, E. R.

2017-05-01

A 1Mjot single-bit quanta image sensor (QIS) implemented in a stacked backside-illuminated (BSI) process is presented. This is the first work to report a megapixel photon-counting CMOS-type image sensor to the best of our knowledge. A QIS with 1.1μm pitch tapered-pump-gate jots is implemented with cluster-parallel readout, where each cluster of jots is associated with its own dedicated readout electronics stacked under the cluster. Power dissipation is reduced with this cluster readout because of the reduced column bus parasitic capacitance, which is important for the development of 1Gjot arrays. The QIS functions at 1040fps with binary readout and dissipates only 17.6mW, including I/O pads. The readout signal chain uses a fully differential charge-transfer amplifier (CTA) gain stage before a 1b-ADC to achieve an energy/bit FOM of 16.1pJ/b and 6.9pJ/b for the whole sensor and gain stage+ADC, respectively. Analog outputs with on-chip gain are implemented for pixel characterization purposes.

Optical technologies for TSV inspection

NASA Astrophysics Data System (ADS)

Aiyer, Arun A.; Maltsev, Nikolai; Ryu, Jae

2014-04-01

In this paper, Frontier Semiconductor will introduce a new technology that is referred to as Virtual Interface Technology (VIT™). VIT™ is a Fourier domain technique that utilizes temporal phase shear of the measurement beam. The unique configuration of the sensor enables measurement of wafer and bonded stack thicknesses ranging from a few microns to millimeters with measurement repeatability ~ nm and resolution of approximately 0.1% of nominal thickness or depth. We will present data on high aspect ratio via measurements (depth, top critical dimension, bottom critical dimension, via bottom profile and side wall angle), bonded wafer stack thickness, and Cu bump measurements. A complimentary tool developed at FSM is a high resolution μRaman spectrometer to measure stress-change in Si lattice induced by Through Silicon Via (TSV) processes. These measurements are important to determine Keep-Out-Zone in the areas where devices are built so that the engineered gate strain is not altered by TSV processing induced strain. Applications include via post-etch; via post fill, and bottom Cu nail stress measurements. The capabilities of and measurement results from both tools are discussed below.

Investigation of defect-induced abnormal body current in fin field-effect-transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, Kuan-Ju; Tsai, Jyun-Yu; Lu, Ying-Hsin

2015-08-24

This letter investigates the mechanism of abnormal body current at the linear region in n-channel high-k/metal gate stack fin field effect transistors. Unlike body current, which is generated by impact ionization at high drain voltages, abnormal body current was found to increase with decreasing drain voltages. Notably, the unusual body leakage only occurs in three-dimensional structure devices. Based on measurements under different operation conditions, the abnormal body current can be attributed to fin surface defect-induced leakage current, and the mechanism is electron tunneling to the fin via the defects, resulting in holes left at the body terminal.

KSC-08pd2542

NASA Image and Video Library

2008-09-04

CAPE CANAVERAL, Fla. – Space shuttle Atlantis passes through the gate and approaches the top of Launch Pad 39A after rolling from the Vehicle Assembly Building at NASA's Kennedy Space Center. The shuttle stack, with solid rocket boosters and external fuel tank attached to Atlantis, rest on the mobile launcher platform. Movement is provided by the crawler-transporter underneath. First motion occurred at 9:19 a.m. EDT. The Sept. 2 rollout date was postponed due to Tropical Storm Hanna’s shift to a northern track. Atlantis is scheduled to launch on the STS-125 mission to service NASA’s Hubble Space Telescope. Launch is targeted for Oct. 8. Photo credit: NASA/Kim Shiflett

High output lamp with high brightness

DOEpatents

Kirkpatrick, Douglas A.; Bass, Gary K.; Copsey, Jesse F.; Garber, Jr., William E.; Kwong, Vincent H.; Levin, Izrail; MacLennan, Donald A.; Roy, Robert J.; Steiner, Paul E.; Tsai, Peter; Turner, Brian P.

2002-01-01

An ultra bright, low wattage inductively coupled electrodeless aperture lamp is powered by a solid state RF source in the range of several tens to several hundreds of watts at various frequencies in the range of 400 to 900 MHz. Numerous novel lamp circuits and components are disclosed including a wedding ring shaped coil having one axial and one radial lead, a high accuracy capacitor stack, a high thermal conductivity aperture cup and various other aperture bulb configurations, a coaxial capacitor arrangement, and an integrated coil and capacitor assembly. Numerous novel RF circuits are also disclosed including a high power oscillator circuit with reduced complexity resonant pole configuration, parallel RF power FET transistors with soft gate switching, a continuously variable frequency tuning circuit, a six port directional coupler, an impedance switching RF source, and an RF source with controlled frequency-load characteristics. Numerous novel RF control methods are disclosed including controlled adjustment of the operating frequency to find a resonant frequency and reduce reflected RF power, controlled switching of an impedance switched lamp system, active power control and active gate bias control.

Analytical model of surface potential profiles and transfer characteristics for hetero stacked tunnel field-effect transistors

NASA Astrophysics Data System (ADS)

Xu, Hui Fang; Sun, Wen; Han, Xin Feng

2018-06-01

An analytical model of surface potential profiles and transfer characteristics for hetero stacked tunnel field-effect transistors (HS-TFETs) is presented for the first time, where hetero stacked materials are composed of two different bandgaps. The bandgap of the underlying layer is smaller than that of the upper layer. Under different device parameters (upper layer thickness, underlying layer thickness, and hetero stacked materials) and temperature, the validity of the model is demonstrated by the agreement of its results with the simulation results. Moreover, the results show that the HS-TFETs can obtain predominant performance with relatively slow changes of subthreshold swing (SS) over a wide drain current range, steep average subthreshold swing, high on-state current, and large on–off state current ratio.

Light-induced negative differential resistance in gate-controlled graphene-silicon photodiode

NASA Astrophysics Data System (ADS)

Liu, Wei; Guo, Hongwei; Li, Wei; Wan, Xia; Bodepudi, Srikrishna Chanakya; Shehzad, Khurram; Xu, Yang

2018-05-01

In this letter, we investigated light-induced negative differential resistance (L-NDR) effects in a hybrid photodiode formed by a graphene-silicon (GS) junction and a neighboring graphene-oxide-Si (GOS) capacitor. We observed two distinct L-NDR effects originating from the gate-dependent surface recombination and the potential-well-induced confinement of photo-carriers in the GOS region. We verified this by studying the gate-controlled GS diode, which can distinguish the photocurrent from the GS region with that from the GOS region (gate). A large peak-to-valley ratio of up to 12.1 has been obtained for the L-NDR due to gate-dependent surface recombination. Such strong L-NDR effect provides an opportunity to further engineer the optoelectronic properties of GS junctions along with exploring its potential applications in photodetectors, photo-memories, and position sensitive devices.

Effect of vacancy defects on generalized stacking fault energy of fcc metals.

PubMed

Asadi, Ebrahim; Zaeem, Mohsen Asle; Moitra, Amitava; Tschopp, Mark A

2014-03-19

Molecular dynamics (MD) and density functional theory (DFT) studies were performed to investigate the influence of vacancy defects on generalized stacking fault (GSF) energy of fcc metals. MEAM and EAM potentials were used for MD simulations, and DFT calculations were performed to test the accuracy of different common parameter sets for MEAM and EAM potentials in predicting GSF with different fractions of vacancy defects. Vacancy defects were placed at the stacking fault plane or at nearby atomic layers. The effect of vacancy defects at the stacking fault plane and the plane directly underneath of it was dominant compared to the effect of vacancies at other adjacent planes. The effects of vacancy fraction, the distance between vacancies, and lateral relaxation of atoms on the GSF curves with vacancy defects were investigated. A very similar variation of normalized SFEs with respect to vacancy fractions were observed for Ni and Cu. MEAM potentials qualitatively captured the effect of vacancies on GSF.

Topologically protected gates for quantum computation with non-Abelian anyons in the Pfaffian quantum Hall state

NASA Astrophysics Data System (ADS)

Georgiev, Lachezar S.

2006-12-01

We extend the topological quantum computation scheme using the Pfaffian quantum Hall state, which has been recently proposed by Das Sarma , in a way that might potentially allow for the topologically protected construction of a universal set of quantum gates. We construct, for the first time, a topologically protected controlled-NOT gate, which is entirely based on quasihole braidings of Pfaffian qubits. All single-qubit gates, except for the π/8 gate, are also explicitly implemented by quasihole braidings. Instead of the π/8 gate we try to construct a topologically protected Toffoli gate, in terms of the controlled-phase gate and CNOT or by a braid-group-based controlled-controlled- Z precursor. We also give a topologically protected realization of the Bravyi-Kitaev two-qubit gate g3 .

Radiation hardening of MOS devices by boron. [for stabilizing gate threshold potential of field effect device

NASA Technical Reports Server (NTRS)

Danchenko, V. (Inventor)

1974-01-01

A technique is described for radiation hardening of MOS devices and specifically for stabilizing the gate threshold potential at room temperature of a radiation subjected MOS field-effect device with a semiconductor substrate, an insulating layer of oxide on the substrate, and a gate electrode disposed on the insulating layer. The boron is introduced within a layer of the oxide of about 100 A-300 A thickness immediately adjacent the semiconductor-insulator interface. The concentration of boron in the oxide layer is preferably maintained on the order of 10 to the 18th power atoms/cu cm. The technique serves to reduce and substantially annihilate radiation induced positive gate charge accumulations.

Voltage-Gated Sodium Channels: Evolutionary History and Distinctive Sequence Features.

PubMed

Kasimova, M A; Granata, D; Carnevale, V

2016-01-01

Voltage-gated sodium channels (Nav) are responsible for the rising phase of the action potential. Their role in electrical signal transmission is so relevant that their emergence is believed to be one of the crucial factors enabling development of nervous system. The presence of voltage-gated sodium-selective channels in bacteria (BacNav) has raised questions concerning the evolutionary history of the ones in animals. Here we review some of the milestones in the field of Nav phylogenetic analysis and discuss some of the most important sequence features that distinguish these channels from voltage-gated potassium channels and transient receptor potential channels. Copyright © 2016 Elsevier Inc. All rights reserved.

Quantum confinement effects in lithographic sub-5 nm Silicon nanowire fets and integration of si nanograting fet biosensors

NASA Astrophysics Data System (ADS)

Trivedi, Krutarth B.

In recent years, widespread accessibility to reliable nanofabrication techniques such as high resolution electron beam lithography as well as development of innovative techniques such as nanoimprint lithography and chemically grown nano-materials like carbon nanotubes and graphene have spurred a boom in many fields of research involving nanoscale features and devices. The breadth of fields in which nanoscale features represent a new paradigm is staggering. Scaling down device dimensions to nanoscale enables non-classical quantum behavior and allows for interaction with similarly sized natural materials, like proteins and DNA, as never before, affording an unprecedented level of performance and control and fostering a seemingly boundless array of unique applications. Much of the research effort has been directed toward understanding such interactions to leverage the potential of nanoscale devices to enhance electronic and medical technology. In keeping with the spirit of application based research, my graduate research career has spanned the development of nanoimprint techniques and devices for novel applications, demonstration and study of sub-5 nm Si nanowire FETs exhibiting tangible performance enhancement over conventional MOSFETs, and development of an integrated Si nanograting FET based biosensor and related framework. The following dissertation details my work in fabrication of sub-5 nm Si nanowire FETs and characterization of quantum confinement effects in charge transport of FETs with 2D and 1D channel geometry, fabrication and characterization of schottky contact Si nanograting FET sensors, integration of miniaturized Si nanograting FET biosensors into Chip-in-Strip(c) packaging, development of an automated microfluidic sensing system, and investigation of electrochemical considerations in the Si nanograting FET biosensor gate stack followed by development of a novel patent-pending strategy for a lithographically patterned on-chip gate electrode.

The effect of split gate dimensions on the electrostatic potential and 0.7 anomaly within one-dimensional quantum wires on a modulation doped GaAs/AlGaAs heterostructure

NASA Astrophysics Data System (ADS)

Smith, L. W.; Al-Taie, H.; Lesage, A. A. J.; Thomas, K. J.; Sfigakis, F.; See, P.; Griffiths, J. P.; Farrer, I.; Jones, G. A. C.; Ritchie, D. A.; Kelly, M. J.; Smith, C. G.

We use a multiplexing scheme to measure the conductance properties of 95 split gates of 7 different gate dimensions fabricated on a GaAs/AlGaAs chip, in a single cool down. The number of devices for which conductance is accurately quantized reduces as the gate length increases. However, even the devices for which conductance is accurately quantized in units of 2e2 / h show no correlation between the length of electrostatic potential barrier in the channel and the gate length, using a saddle point model to estimate the barrier length. Further, the strength of coupling between the gates and the 1D channel does not increase with gate length beyond 0.7 μm. The background electrostatic profile appears as significant as the gate dimension in determining device behavior. We find a clear correlation between the curvature of the electrostatic barrier along the channel and the strength of the ``0.7 anomaly'' which identifies the electrostatic length of the channel as the principal factor governing the conductance of the 0.7 anomaly. Present address: Wisconsin Institute for Quantum Information, University of Wisconsin-Madison, Madison, WI.

A review of polymer electrolyte membrane fuel cell stack testing

NASA Astrophysics Data System (ADS)

Miller, M.; Bazylak, A.

This paper presents an overview of polymer electrolyte membrane fuel cell (PEMFC) stack testing. Stack testing is critical for evaluating and demonstrating the viability and durability required for commercial applications. Single cell performance cannot be employed alone to fully derive the expected performance of PEMFC stacks, due to the non-uniformity in potential, temperature, and reactant and product flow distributions observed in stacks. In this paper, we provide a comprehensive review of the state-of-the art in PEMFC testing. We discuss the main topics of investigation, including single cell vs. stack-level performance, cell voltage uniformity, influence of operating conditions, durability and degradation, dynamic operation, and stack demonstrations. We also present opportunities for future work, including the need to verify the impact of stack size and cell voltage uniformity on performance, determine operating conditions for achieving a balance between electrical efficiency and flooding/dry-out, meet lifetime requirements through endurance testing, and develop a stronger understanding of degradation.

Studies on the π-π stacking features of imidazole units present in a series of 5-amino-1-alkylimidazole-4-carboxamides

NASA Astrophysics Data System (ADS)

Ray, Sibdas; Das, Aniruddha

2015-06-01

Reaction of 2-ethoxymethyleneamino-2-cyanoacetamide with primary alkyl amines in acetonitrile solvent affords 1-substituted-5-aminoimidazole-4-carboxamides. Single crystal X-ray diffraction studies of these imidazole compounds show that there are both anti-parallel and syn-parallel π-π stackings between two imidazole units in parallel-displaced (PD) conformations and the distance between two π-π stacked imidazole units depends mainly on the anti/ syn-parallel nature and to some extent on the alkyl group attached to N-1 of imidazole; molecules with anti-parallel PD-stacking arrangements of the imidazole units have got vertical π-π stacking distance short enough to impart stabilization whereas the imidazole unit having syn-parallel stacking arrangement have got much larger π-π stacking distances. DFT studies on a pair of anti-parallel imidazole units of such an AICA lead to curves for 'π-π stacking stabilization energy vs. π-π stacking distance' which have got similarity with the 'Morse potential energy diagram for a diatomic molecule' and this affords to find out a minimum π-π stacking distance corresponding to the maximum stacking stabilization energy between the pair of imidazole units. On the other hand, a DFT calculation based curve for 'π-π stacking stabilization energy vs. π-π stacking distance' of a pair of syn-parallel imidazole units is shown to have an exponential nature.

A shared synapse architecture for efficient FPGA implementation of autoencoders.

PubMed

Suzuki, Akihiro; Morie, Takashi; Tamukoh, Hakaru

2018-01-01

This paper proposes a shared synapse architecture for autoencoders (AEs), and implements an AE with the proposed architecture as a digital circuit on a field-programmable gate array (FPGA). In the proposed architecture, the values of the synapse weights are shared between the synapses of an input and a hidden layer, and between the synapses of a hidden and an output layer. This architecture utilizes less of the limited resources of an FPGA than an architecture which does not share the synapse weights, and reduces the amount of synapse modules used by half. For the proposed circuit to be implemented into various types of AEs, it utilizes three kinds of parameters; one to change the number of layers' units, one to change the bit width of an internal value, and a learning rate. By altering a network configuration using these parameters, the proposed architecture can be used to construct a stacked AE. The proposed circuits are logically synthesized, and the number of their resources is determined. Our experimental results show that single and stacked AE circuits utilizing the proposed shared synapse architecture operate as regular AEs and as regular stacked AEs. The scalability of the proposed circuit and the relationship between the bit widths and the learning results are also determined. The clock cycles of the proposed circuits are formulated, and this formula is used to estimate the theoretical performance of the circuit when the circuit is used to construct arbitrary networks.

A shared synapse architecture for efficient FPGA implementation of autoencoders

PubMed Central

Morie, Takashi; Tamukoh, Hakaru

2018-01-01

This paper proposes a shared synapse architecture for autoencoders (AEs), and implements an AE with the proposed architecture as a digital circuit on a field-programmable gate array (FPGA). In the proposed architecture, the values of the synapse weights are shared between the synapses of an input and a hidden layer, and between the synapses of a hidden and an output layer. This architecture utilizes less of the limited resources of an FPGA than an architecture which does not share the synapse weights, and reduces the amount of synapse modules used by half. For the proposed circuit to be implemented into various types of AEs, it utilizes three kinds of parameters; one to change the number of layers’ units, one to change the bit width of an internal value, and a learning rate. By altering a network configuration using these parameters, the proposed architecture can be used to construct a stacked AE. The proposed circuits are logically synthesized, and the number of their resources is determined. Our experimental results show that single and stacked AE circuits utilizing the proposed shared synapse architecture operate as regular AEs and as regular stacked AEs. The scalability of the proposed circuit and the relationship between the bit widths and the learning results are also determined. The clock cycles of the proposed circuits are formulated, and this formula is used to estimate the theoretical performance of the circuit when the circuit is used to construct arbitrary networks. PMID:29543909

Pado, a fluorescent protein with proton channel activity can optically monitor membrane potential, intracellular pH, and map gap junctions.

PubMed

Kang, Bok Eum; Baker, Bradley J

2016-04-04

An in silico search strategy was developed to identify potential voltage-sensing domains (VSD) for the development of genetically encoded voltage indicators (GEVIs). Using a conserved charge distribution in the S2 α-helix, a single in silico search yielded most voltage-sensing proteins including voltage-gated potassium channels, voltage-gated calcium channels, voltage-gated sodium channels, voltage-gated proton channels, and voltage-sensing phosphatases from organisms ranging from mammals to bacteria and plants. A GEVI utilizing the VSD from a voltage-gated proton channel identified from that search was able to optically report changes in membrane potential. In addition this sensor was capable of manipulating the internal pH while simultaneously reporting that change optically since it maintains the voltage-gated proton channel activity of the VSD. Biophysical characterization of this GEVI, Pado, demonstrated that the voltage-dependent signal was distinct from the pH-dependent signal and was dependent on the movement of the S4 α-helix. Further investigation into the mechanism of the voltage-dependent optical signal revealed that inhibiting the dimerization of the fluorescent protein greatly reduced the optical signal. Dimerization of the FP thereby enabled the movement of the S4 α-helix to mediate a fluorescent response.

Pado, a fluorescent protein with proton channel activity can optically monitor membrane potential, intracellular pH, and map gap junctions

PubMed Central

Kang, Bok Eum; Baker, Bradley J.

2016-01-01

An in silico search strategy was developed to identify potential voltage-sensing domains (VSD) for the development of genetically encoded voltage indicators (GEVIs). Using a conserved charge distribution in the S2 α-helix, a single in silico search yielded most voltage-sensing proteins including voltage-gated potassium channels, voltage-gated calcium channels, voltage-gated sodium channels, voltage-gated proton channels, and voltage-sensing phosphatases from organisms ranging from mammals to bacteria and plants. A GEVI utilizing the VSD from a voltage-gated proton channel identified from that search was able to optically report changes in membrane potential. In addition this sensor was capable of manipulating the internal pH while simultaneously reporting that change optically since it maintains the voltage-gated proton channel activity of the VSD. Biophysical characterization of this GEVI, Pado, demonstrated that the voltage-dependent signal was distinct from the pH-dependent signal and was dependent on the movement of the S4 α-helix. Further investigation into the mechanism of the voltage-dependent optical signal revealed that inhibiting the dimerization of the fluorescent protein greatly reduced the optical signal. Dimerization of the FP thereby enabled the movement of the S4 α-helix to mediate a fluorescent response. PMID:27040905

Trapped-ion quantum logic gates based on oscillating magnetic fields.

PubMed

Ospelkaus, C; Langer, C E; Amini, J M; Brown, K R; Leibfried, D; Wineland, D J

2008-08-29

Oscillating magnetic fields and field gradients can be used to implement single-qubit rotations and entangling multiqubit quantum gates for trapped-ion quantum information processing (QIP). With fields generated by currents in microfabricated surface-electrode traps, it should be possible to achieve gate speeds that are comparable to those of optically induced gates for realistic distances between the ion crystal and the electrode surface. Magnetic-field-mediated gates have the potential to significantly reduce the overhead in laser-beam control and motional-state initialization compared to current QIP experiments with trapped ions and will eliminate spontaneous scattering, a fundamental source of decoherence in laser-mediated gates.

Evidence of a visual-to-auditory cross-modal sensory gating phenomenon as reflected by the human P50 event-related brain potential modulation.

PubMed

Lebib, Riadh; Papo, David; de Bode, Stella; Baudonnière, Pierre Marie

2003-05-08

We investigated the existence of a cross-modal sensory gating reflected by the modulation of an early electrophysiological index, the P50 component. We analyzed event-related brain potentials elicited by audiovisual speech stimuli manipulated along two dimensions: congruency and discriminability. The results showed that the P50 was attenuated when visual and auditory speech information were redundant (i.e. congruent), in comparison with this same event-related potential component elicited with discrepant audiovisual dubbing. When hard to discriminate, however, bimodal incongruent speech stimuli elicited a similar pattern of P50 attenuation. We concluded to the existence of a visual-to-auditory cross-modal sensory gating phenomenon. These results corroborate previous findings revealing a very early audiovisual interaction during speech perception. Finally, we postulated that the sensory gating system included a cross-modal dimension.

Gatemon Benchmarking and Two-Qubit Operation

NASA Astrophysics Data System (ADS)

Casparis, Lucas; Larsen, Thorvald; Olsen, Michael; Petersson, Karl; Kuemmeth, Ferdinand; Krogstrup, Peter; Nygard, Jesper; Marcus, Charles

Recent experiments have demonstrated superconducting transmon qubits with semiconductor nanowire Josephson junctions. These hybrid gatemon qubits utilize field effect tunability singular to semiconductors to allow complete qubit control using gate voltages, potentially a technological advantage over conventional flux-controlled transmons. Here, we present experiments with a two-qubit gatemon circuit. We characterize qubit coherence and stability and use randomized benchmarking to demonstrate single-qubit gate errors of ~0.5 % for all gates, including voltage-controlled Z rotations. We show coherent capacitive coupling between two gatemons and coherent SWAP operations. Finally, we perform a two-qubit controlled-phase gate with an estimated fidelity of ~91 %, demonstrating the potential of gatemon qubits for building scalable quantum processors. We acknowledge financial support from Microsoft Project Q and the Danish National Research Foundation.

Tight-binding study of stacking fault energies and the Rice criterion of ductility in the fcc metals

NASA Astrophysics Data System (ADS)

Mehl, Michael J.; Papaconstantopoulos, Dimitrios A.; Kioussis, Nicholas; Herbranson, M.

2000-02-01

We have used the Naval Research Laboratory (NRL) tight-binding (TB) method to calculate the generalized stacking fault energy and the Rice ductility criterion in the fcc metals Al, Cu, Rh, Pd, Ag, Ir, Pt, Au, and Pb. The method works well for all classes of metals, i.e., simple metals, noble metals, and transition metals. We compared our results with full potential linear-muffin-tin orbital and embedded atom method (EAM) calculations, as well as experiment, and found good agreement. This is impressive, since the NRL-TB approach only fits to first-principles full-potential linearized augmented plane-wave equations of state and band structures for cubic systems. Comparable accuracy with EAM potentials can be achieved only by fitting to the stacking fault energy.

Impute DC link (IDCL) cell based power converters and control thereof

DOEpatents

Divan, Deepakraj M.; Prasai, Anish; Hernendez, Jorge; Moghe, Rohit; Iyer, Amrit; Kandula, Rajendra Prasad

2016-04-26

Power flow controllers based on Imputed DC Link (IDCL) cells are provided. The IDCL cell is a self-contained power electronic building block (PEBB). The IDCL cell may be stacked in series and parallel to achieve power flow control at higher voltage and current levels. Each IDCL cell may comprise a gate drive, a voltage sharing module, and a thermal management component in order to facilitate easy integration of the cell into a variety of applications. By providing direct AC conversion, the IDCL cell based AC/AC converters reduce device count, eliminate the use of electrolytic capacitors that have life and reliability issues, and improve system efficiency compared with similarly rated back-to-back inverter system.

Digital MOS integrated circuits

NASA Astrophysics Data System (ADS)

Elmasry, M. I.

MOS in digital circuit design is considered along with aspects of digital VLSI, taking into account a comparison of MOSFET logic circuits, 1-micrometer MOSFET VLSI technology, a generalized guide for MOSFET miniaturization, processing technologies, novel circuit structures for VLSI, and questions of circuit and system design for VLSI. MOS memory cells and circuits are discussed, giving attention to a survey of high-density dynamic RAM cell concepts, one-device cells for dynamic random-access memories, variable resistance polysilicon for high density CMOS Ram, high performance MOS EPROMs using a stacked-gate cell, and the optimization of the latching pulse for dynamic flip-flop sensors. Programmable logic arrays are considered along with digital signal processors, microprocessors, static RAMs, and dynamic RAMs.

Generation of tunable double Fano resonances by plasmon hybridization in graphene–metal metamaterial

NASA Astrophysics Data System (ADS)

Yan, Zhendong; Qian, Lina; Zhan, Peng; Wang, Zhenlin

2018-07-01

We proposed the excitation of double Fano resonances by the destructive interference between the narrow electric symmetric/antisymmetric resonant modes formed by plasmon hybridization and a broad magnetic dipole resonance in a novel hybrid metamaterial composed of periodically patterned stacked graphene–ribbon pairs and gold split-ring resonators. The double Fano transparency windows in this hybrid metamaterial can be actively controlled by tuning the Fermi energy of graphene through the use of electric gating and its electronic mobility. Our designed dual Fano resonances exhibit a large group index associated with the resonance response in the transparency windows, suggesting promising applications in nanophotonics, such as a slow light device.

Strong electron-hole exchange in coherently coupled quantum dots.

PubMed

Fält, Stefan; Atatüre, Mete; Türeci, Hakan E; Zhao, Yong; Badolato, Antonio; Imamoglu, Atac

2008-03-14

We have investigated few-body states in vertically stacked quantum dots. Because of a small interdot tunneling rate, the coupling in our system is in a previously unexplored regime where electron-hole exchange plays a prominent role. By tuning the gate bias, we are able to turn this coupling off and study a complementary regime where total electron spin is a good quantum number. The use of differential transmission allows us to obtain unambiguous signatures of the interplay between electron and hole-spin interactions. Small tunnel coupling also enables us to demonstrate all-optical charge sensing, where a conditional exciton energy shift in one dot identifies the charging state of the coupled partner.

Two dimensional analytical model for a reconfigurable field effect transistor

NASA Astrophysics Data System (ADS)

Ranjith, R.; Jayachandran, Remya; Suja, K. J.; Komaragiri, Rama S.

2018-02-01

This paper presents two-dimensional potential and current models for a reconfigurable field effect transistor (RFET). Two potential models which describe subthreshold and above-threshold channel potentials are developed by solving two-dimensional (2D) Poisson's equation. In the first potential model, 2D Poisson's equation is solved by considering constant/zero charge density in the channel region of the device to get the subthreshold potential characteristics. In the second model, accumulation charge density is considered to get above-threshold potential characteristics of the device. The proposed models are applicable for the device having lightly doped or intrinsic channel. While obtaining the mathematical model, whole body area is divided into two regions: gated region and un-gated region. The analytical models are compared with technology computer-aided design (TCAD) simulation results and are in complete agreement for different lengths of the gated regions as well as at various supply voltage levels.

Electro-optical graphene plasmonic logic gates.

PubMed

Ooi, Kelvin J A; Chu, Hong Son; Bai, Ping; Ang, Lay Kee

2014-03-15

The versatile control of graphene's plasmonic modes via an external gate-voltage inspires us to design efficient electro-optical graphene plasmonic logic gates at the midinfrared wavelengths. We show that these devices are superior to the conventional optical logic gates because the former possess cut-off states and interferometric effects. Moreover, the designed six basic logic gates (i.e., NOR/AND, NAND/OR, XNOR/XOR) achieved not only ultracompact size lengths of less than λ/28 with respect to the operating wavelength of 10 μm, but also a minimum extinction ratio as high as 15 dB. These graphene plasmonic logic gates are potential building blocks for future nanoscale midinfrared photonic integrated circuits.

Differential relationships of impulsivity or antisocial symptoms on P50, N100, or P200 auditory sensory gating in controls and antisocial personality disorder

PubMed Central

Lijffijt, Marijn; Cox, Blake; Acas, Michelle D.; Lane, Scott D.; Moeller, F. Gerard; Swann, Alan C.

2013-01-01

Limited information is available on the relationship between antisocial personality disorder (ASPD) and early filtering, or gating, of information, even though this could contribute to the repeatedly reported impairment in ASPD of higher-order information processing. In order to investigate early filtering in ASPD, we compared electrophysiological measures of auditory sensory gating assessed by the paired-click paradigm in males with ASPD (n = 37) to healthy controls (n = 28). Stimulus encoding was measured by P50, N100, and P200 auditory evoked potentials; auditory sensory gating (ASG) was measured by a reduction in amplitude of evoked potentials following click repetition. Effects were studied of co-existing past alcohol or drug use disorders, ASPD symptom counts, and trait impulsivity. Controls and ASPD did not differ in P50, N100, or P200 amplitude or ASG. Past alcohol or drug use disorders had no effect. In controls, impulsivity related to improved P50 and P200 gating. In ASPD, P50 or N100 gating was impaired with more symptoms or increased impulsivity, respectively, suggesting impaired early filtering of irrelevant information. In controls the relationship between P50 and P200 gating and impulsivity was reversed, suggesting better gating with higher impulsivity scores. This could reflect different roles of ASG in behavioral regulation in controls versus ASPD. PMID:22464943

Forced Ion Migration for Chalcogenide Phase Change Memory Device

NASA Technical Reports Server (NTRS)

Campbell, Kristy A (Inventor)

2013-01-01

Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge2Se3/SnTe, and Ge2Se3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.

Forced ion migration for chalcogenide phase change memory device

NASA Technical Reports Server (NTRS)

Campbell, Kristy A. (Inventor)

2011-01-01

Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase change memories. The devices tested included GeTe/SnTe, Ge.sub.2Se.sub.3/SnTe, and Ge.sub.2Se.sub.3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more that two data states.

Forced ion migration for chalcogenide phase change memory device

NASA Technical Reports Server (NTRS)

Campbell, Kristy A. (Inventor)

2012-01-01

Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge.sub.2Se.sub.3/SnTe, and Ge.sub.2Se.sub.3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.

Excitatory Post-Synaptic Potential Mimicked in Indium-Zinc-Oxide Synaptic Transistors Gated by Methyl Cellulose Solid Electrolyte

PubMed Central

Guo, Liqiang; Wen, Juan; Ding, Jianning; Wan, Changjin; Cheng, Guanggui

2016-01-01

The excitatory postsynaptic potential (EPSP) of biological synapses is mimicked in indium-zinc-oxide synaptic transistors gated by methyl cellulose solid electrolyte. These synaptic transistors show excellent electrical performance at an operating voltage of 0.8 V, Ion/off ratio of 2.5 × 106, and mobility of 38.4 cm2/Vs. After this device is connected to a resistance of 4 MΩ in series, it exhibits excellent characteristics as an inverter. A threshold potential of 0.3 V is achieved by changing the gate pulse amplitude, width, or number, which is analogous to biological EPSP. PMID:27924838

Ferroelectric memory based on molybdenum disulfide and ferroelectric hafnium oxide

NASA Astrophysics Data System (ADS)

Yap, Wui Chung; Jiang, Hao; Xia, Qiangfei; Zhu, Wenjuan

Recently, ferroelectric hafnium oxide (HfO2) was discovered as a new type of ferroelectric material with the advantages of high coercive field, excellent scalability (down to 2.5 nm), and good compatibility with CMOS processing. In this work, we demonstrate, for the first time, 2D ferroelectric memories with molybdenum disulfide (MoS2) as the channel material and aluminum doped HfO2 as the ferroelectric gate dielectric. A 16 nm thick layer of HfO2, doped with 5.26% aluminum, was deposited via atomic layer deposition (ALD), then subjected to rapid thermal annealing (RTA) at 1000 °C, and the polarization-voltage characteristics of the resulting metal-ferroelectric-metal (MFM) capacitors were measured, showing a remnant polarization of 0.6 μC/cm2. Ferroelectric memories with embedded ferroelectric hafnium oxide stacks and monolayer MoS2 were fabricated. The transfer characteristics after program and erase pulses revealed a clear ferroelectric memory window. In addition, endurance (up to 10,000 cycles) of the devices were tested and effects associated with ferroelectric materials, such as the wake-up effect and polarization fatigue, were observed. This research can potentially lead to advances of 2D materials in low-power logic and memory applications.

Toward real-time virtual biopsy of oral lesions using confocal laser endomicroscopy interfaced with embedded computing.

PubMed

Thong, Patricia S P; Tandjung, Stephanus S; Movania, Muhammad Mobeen; Chiew, Wei-Ming; Olivo, Malini; Bhuvaneswari, Ramaswamy; Seah, Hock-Soon; Lin, Feng; Qian, Kemao; Soo, Khee-Chee

2012-05-01

Oral lesions are conventionally diagnosed using white light endoscopy and histopathology. This can pose a challenge because the lesions may be difficult to visualise under white light illumination. Confocal laser endomicroscopy can be used for confocal fluorescence imaging of surface and subsurface cellular and tissue structures. To move toward real-time "virtual" biopsy of oral lesions, we interfaced an embedded computing system to a confocal laser endomicroscope to achieve a prototype three-dimensional (3-D) fluorescence imaging system. A field-programmable gated array computing platform was programmed to enable synchronization of cross-sectional image grabbing and Z-depth scanning, automate the acquisition of confocal image stacks and perform volume rendering. Fluorescence imaging of the human and murine oral cavities was carried out using the fluorescent dyes fluorescein sodium and hypericin. Volume rendering of cellular and tissue structures from the oral cavity demonstrate the potential of the system for 3-D fluorescence visualization of the oral cavity in real-time. We aim toward achieving a real-time virtual biopsy technique that can complement current diagnostic techniques and aid in targeted biopsy for better clinical outcomes.

Study of Direct-Contact HfO2/Si Interfaces

PubMed Central

Miyata, Noriyuki

2012-01-01

Controlling monolayer Si oxide at the HfO2/Si interface is a challenging issue in scaling the equivalent oxide thickness of HfO2/Si gate stack structures. A concept that the author proposes to control the Si oxide interface by using ultra-high vacuum electron-beam HfO2 deposition is described in this review paper, which enables the so-called direct-contact HfO2/Si structures to be prepared. The electrical characteristics of the HfO2/Si metal-oxide-semiconductor capacitors are reviewed, which suggest a sufficiently low interface state density for the operation of metal-oxide-semiconductor field-effect-transistors (MOSFETs) but reveal the formation of an unexpected strong interface dipole. Kelvin probe measurements of the HfO2/Si structures provide obvious evidence for the formation of dipoles at the HfO2/Si interfaces. The author proposes that one-monolayer Si-O bonds at the HfO2/Si interface naturally lead to a large potential difference, mainly due to the large dielectric constant of the HfO2. Dipole scattering is demonstrated to not be a major concern in the channel mobility of MOSFETs. PMID:28817060

Model of biological quantum logic in DNA.

PubMed

Mihelic, F Matthew

2013-08-02

The DNA molecule has properties that allow it to act as a quantum logic processor. It has been demonstrated that there is coherent conduction of electrons longitudinally along the DNA molecule through pi stacking interactions of the aromatic nucleotide bases, and it has also been demonstrated that electrons moving longitudinally along the DNA molecule are subject to a very efficient electron spin filtering effect as the helicity of the DNA molecule interacts with the spin of the electron. This means that, in DNA, electrons are coherently conducted along a very efficient spin filter. Coherent electron spin is held in a logically and thermodynamically reversible chiral symmetry between the C2-endo and C3-endo enantiomers of the deoxyribose moiety in each nucleotide, which enables each nucleotide to function as a quantum gate. The symmetry break that provides for quantum decision in the system is determined by the spin direction of an electron that has an orbital angular momentum that is sufficient to overcome the energy barrier of the double well potential separating the C2-endo and C3-endo enantiomers, and that enantiomeric energy barrier is appropriate to the Landauer limit of the energy necessary to randomize one bit of information.

A universal steady state I-V relationship for membrane current

NASA Technical Reports Server (NTRS)

Chernyak, Y. B.; Cohen, R. J. (Principal Investigator)

1995-01-01

A purely electrical mechanism for the gating of membrane ionic channel gives rise to a simple I-V relationship for membrane current. Our approach is based on the known presence of gating charge, which is an established property of the membrane channel gating. The gating charge is systematically treated as a polarization of the channel protein which varies with the external electric field and modifies the effective potential through which the ions migrate in the channel. Two polarization effects have been considered: 1) the up or down shift of the whole potential function, and 2) the change in the effective electric field inside the channel which is due to familiar effect of the effective reduction of the electric field inside a dielectric body because of the presence of surface charges on its surface. Both effects are linear in the channel polarization. The ionic current is described by a steady state solution of the Nernst-Planck equation with the potential directly controlled by the gating charge system. The solution describes reasonably well the steady state and peak-current I-V relationships for different channels, and when applied adiabatically, explains the time lag between the gating charge current and the rise of the ionic current. The approach developed can be useful as an effective way to model the ionic currents in axons, cardiac cells and other excitable tissues.

Voltage-gated sodium channel expression and action potential generation in differentiated NG108-15 cells.

PubMed

Liu, Jinxu; Tu, Huiyin; Zhang, Dongze; Zheng, Hong; Li, Yu-Long

2012-10-25

The generation of action potential is required for stimulus-evoked neurotransmitter release in most neurons. Although various voltage-gated ion channels are involved in action potential production, the initiation of the action potential is mainly mediated by voltage-gated Na+ channels. In the present study, differentiation-induced changes of mRNA and protein expression of Na+ channels, Na+ currents, and cell membrane excitability were investigated in NG108-15 cells. Whole-cell patch-clamp results showed that differentiation (9 days) didn't change cell membrane excitability, compared to undifferentiated state. But differentiation (21 days) induced the action potential generation in 45.5% of NG108-15 cells (25/55 cells). In 9-day-differentiated cells, Na+ currents were mildly increased, which was also found in 21-day differentiated cells without action potential. In 21-day differentiated cells with action potential, Na+ currents were significantly enhanced. Western blot data showed that the expression of Na+ channels was increased with differentiated-time dependent manner. Single-cell real-time PCR data demonstrated that the expression of Na+ channel mRNA was increased by 21 days of differentiation in NG108-15 cells. More importantly, the mRNA level of Na+ channels in cells with action potential was higher than that in cells without action potential. Differentiation induces expression of voltage-gated Na+ channels and action potential generation in NG108-15 cells. A high level of the Na+ channel density is required for differentiation-triggered action potential generation.

Performance of air-cathode stacked microbial fuel cells systems for wastewater treatment and electricity production.

PubMed

Estrada-Arriaga, Edson Baltazar; Guillen-Alonso, Yvonne; Morales-Morales, Cornelio; García-Sánchez, Liliana; Bahena-Bahena, Erick Obed; Guadarrama-Pérez, Oscar; Loyola-Morales, Félix

2017-07-01

Two different air-cathode stacked microbial fuel cell (MFC) configurations were evaluated under continuous flow during the treatment of municipal wastewater and electricity production at a hydraulic retention time (HRT) of 3, 1, and 0.5 d. Stacked MFC 1 was formed by 20 individual air-cathode MFC units. The second stacked MFC (stacked MFC 2) consisted of 40 air-cathode MFC units placed in a shared reactor. The maximum voltages produced at closed circuit (1,000 Ω) were 170 mV for stacked MFC 1 and 94 mV for stacked MFC 2. Different power densities in each MFC unit were obtained due to a potential drop phenomenon and to a change in chemical oxygen demand (COD) concentrations inside reactors. The maximum power densities from individual MFC units were up to 1,107 mW/m 2 for stacked MFC 1 and up to 472 mW/m 2 for stacked MFC 2. The maximum power densities in stacked MFC 1 and MFC 2 connected in series were 79 mW/m 2 and 4 mW/m 2 , respectively. Electricity generation and COD removal efficiencies were reduced when the HRT was decreased. High removal efficiencies of 84% of COD, 47% of total nitrogen, and 30% of total phosphorus were obtained during municipal wastewater treatment.

LONG-TERM PERFORMANCE OF SOLID OXIDE STACKS WITH ELECTRODE-SUPPORTED CELLS OPERATING IN THE STEAM ELECTROLYSIS MODE

DOE Office of Scientific and Technical Information (OSTI.GOV)

J. E. O'Brien; R. C. O'Brien; X. Zhang

2011-11-01

Performance characterization and durability testing have been completed on two five-cell high-temperature electrolysis stacks constructed with advanced cell and stack technologies. The solid oxide cells incorporate a negative-electrode-supported multi-layer design with nickel-zirconia cermet negative electrodes, thin-film yttria-stabilized zirconia electrolytes, and multi-layer lanthanum ferrite-based positive electrodes. The per-cell active area is 100 cm2. The stack is internally manifolded with compliant mica-glass seals. Treated metallic interconnects with integral flow channels separate the cells. Stack compression is accomplished by means of a custom spring-loaded test fixture. Initial stack performance characterization was determined through a series of DC potential sweeps in both fuel cellmore » and electrolysis modes of operation. Results of these sweeps indicated very good initial performance, with area-specific resistance values less than 0.5 ?.cm2. Long-term durability testing was performed with A test duration of 1000 hours. Overall performance degradation was less than 10% over the 1000-hour period. Final stack performance characterization was again determined by a series of DC potential sweeps at the same flow conditions as the initial sweeps in both electrolysis and fuel cell modes of operation. A final sweep in the fuel cell mode indicated a power density of 0.356 W/cm2, with average per-cell voltage of 0.71 V at a current of 50 A.« less

Studies on complex π-π and T-stacking features of imidazole and phenyl/p-halophenyl units in series of 5-amino-1-(phenyl/p-halophenyl)imidazole-4-carboxamides and their carbonitrile derivatives: Role of halogens in tuning of conformation

NASA Astrophysics Data System (ADS)

Das, Aniruddha

2017-11-01

5-amino-1-(phenyl/p-halophenyl)imidazole-4-carboxamides (N-phenyl AICA) (2a-e) and 5-amino-1-(phenyl/p-halophenyl)imidazole-4-carbonitriles (N-phenyl AICN) (3a-e) had been synthesized. X-ray crystallographic studies of 2a-e and 3a-e had been performed to identify any distinct change in stacking patterns in their crystal lattice. Single crystal X-ray diffraction studies of 2a-e revealed π-π stack formations with both imidazole and phenyl/p-halophenyl units in anti and syn parallel-displaced (PD)-type dispositions. No π-π stacking of imidazole occurred when the halogen substituent is bromo or iodo; π-π stacking in these cases occurred involving phenyl rings only. The presence of an additional T-stacking had been observed in crystal lattices of 3a-e. Vertical π-π stacking distances in anti-parallel PD-type arrangements as well as T-stacking distances had shown stacking distances short enough to impart stabilization whereas syn-parallel stacking arrangements had got much larger π-π stacking distances to belie any syn-parallel stacking stabilization. DFT studies had been pursued for quantifying the π-π stacking and T-stacking stabilization. The plotted curves for anti-parallel and T-stacked moieties had similarities to the 'Morse potential energy curve for diatomic molecule'. The minima of the curves corresponded to the most stable stacking distances and related energy values indicated stacking stabilization. Similar DFT studies on syn-parallel systems of 2b corresponded to no π-π stacking stabilization at all. Halogen-halogen interactions had also been observed to stabilize the compounds 2d, 2e and 3d. Nano-structural behaviour of the series of compounds 2a-e and 3a-e were thoroughly investigated.

Intelligent Gate Drive for Fast Switching and Crosstalk Suppression of SiC Devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhang, Zheyu; Dix, Jeffery; Wang, Fei Fred

This study presents an intelligent gate drive for silicon carbide (SiC) devices to fully utilize their potential of high switching-speed capability in a phase-leg configuration. Based on the SiC device's intrinsic properties, a gate assist circuit consisting of two auxiliary transistors with two diodes is introduced to actively control gate voltages and gate loop impedances of both devices in a phase-leg configuration during different switching transients. Compared to conventional gate drives, the proposed circuit has the capability of accelerating the switching speed of the phase-leg power devices and suppressing the crosstalk to below device limits. Based on Wolfspeed 1200-V SiCmore » MOSFETs, the test results demonstrate the effectiveness of this intelligent gate drive under varying operating conditions. More importantly, the proposed intelligent gate assist circuitry is embedded into a gate drive integrated circuit, offering a simple, compact, and reliable solution for end-users to maximize benefits of SiC devices in actual power electronics applications.« less

Intelligent Gate Drive for Fast Switching and Crosstalk Suppression of SiC Devices

DOE PAGES

Zhang, Zheyu; Dix, Jeffery; Wang, Fei Fred; ...

2017-01-19

This study presents an intelligent gate drive for silicon carbide (SiC) devices to fully utilize their potential of high switching-speed capability in a phase-leg configuration. Based on the SiC device's intrinsic properties, a gate assist circuit consisting of two auxiliary transistors with two diodes is introduced to actively control gate voltages and gate loop impedances of both devices in a phase-leg configuration during different switching transients. Compared to conventional gate drives, the proposed circuit has the capability of accelerating the switching speed of the phase-leg power devices and suppressing the crosstalk to below device limits. Based on Wolfspeed 1200-V SiCmore » MOSFETs, the test results demonstrate the effectiveness of this intelligent gate drive under varying operating conditions. More importantly, the proposed intelligent gate assist circuitry is embedded into a gate drive integrated circuit, offering a simple, compact, and reliable solution for end-users to maximize benefits of SiC devices in actual power electronics applications.« less

Eliminating Overerase Behavior by Designing Energy Band in High-Speed Charge-Trap Memory Based on WSe2.

PubMed

Liu, Chunsen; Yan, Xiao; Wang, Jianlu; Ding, Shijin; Zhou, Peng; Zhang, David Wei

2017-05-01

Atomic crystal charge trap memory, as a new concept of nonvolatile memory, possesses an atomic level flatness interface, which makes them promising candidates for replacing conventional FLASH memory in the future. Here, a 2D material WSe 2 and a 3D Al 2 O 3 /HfO 2 /Al 2 O 3 charge-trap stack are combined to form a charge-trap memory device with a separation of control gate and memory stack. In this device, the charges are erased/written by built-in electric field, which significantly enhances the write speed to 1 µs. More importantly, owing to the elaborate design of the energy band structure, the memory only captures electrons with a large electron memory window over 20 V and trap selectivity about 13, both of them are the state-of-the-art values ever reported in FLASH memory based on 2D materials. Therefore, it is demonstrated that high-performance charge trap memory based on WSe 2 without the fatal overerase issue in conventional FLASH memory can be realized to practical application. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ahn, Cheol Hyoun; Hee Kim, So; Gu Yun, Myeong

In this study, we proposed the artificially designed channel structure in oxide thin-film transistors (TFTs) called a “step-composition gradient channel.” We demonstrated Al step-composition gradient Al-Zn-O (AZO) channel structures consisting of three AZO layers with different Al contents. The effects of stacking sequence in the step-composition gradient channel on performance and electrical stability of bottom-gate TFT devices were investigated with two channels of inverse stacking order (ascending/descending step-composition). The TFT with ascending step-composition channel structure (5 → 10 → 14 at. % Al composition) showed relatively negative threshold voltage (−3.7 V) and good instability characteristics with a reduced threshold voltage shift (Δmore » 1.4 V), which was related to the alignment of the conduction band off-set within the channel layer depending on the Al contents. Finally, the reduced Al composition in the initial layer of ascending step-composition channel resulted in the best field effect mobility of 4.5 cm{sup 2}/V s. We presented a unique active layer of the “step-composition gradient channel” in the oxide TFTs and explained the mechanism of adequate channel design.« less

Realization of the three-qubit quantum controlled gate based on matching Hermitian generators

NASA Astrophysics Data System (ADS)

Gautam, Kumar; Rawat, Tarun Kumar; Parthasarathy, Harish; Sharma, Navneet; Upadhyaya, Varun

2017-05-01

This paper deals with the design of quantum unitary gate by matching the Hermitian generators. A given complicated quantum controlled gate is approximated by perturbing a simple quantum system with a small time-varying potential. The basic idea is to evaluate the generator H_φ of the perturbed system approximately using first-order perturbation theory in the interaction picture. H_φ depends on a modulating signal φ(t){:} 0≤t≤T which modulates a known potential V. The generator H_φ of the given gate U_g is evaluated using H_g=ι log U_g. The optimal modulating signal φ(t) is chosen so that \\Vert H_g - H_φ \\Vert is a minimum. The simple quantum system chosen for our simulation is harmonic oscillator with charge perturbed by an electric field that is a constant in space but time varying and is controlled externally. This is used to approximate the controlled unitary gate obtained by perturbing the oscillator with an anharmonic term proportional to q^3. Simulations results show significantly small noise-to-signal ratio. Finally, we discuss how the proposed method is particularly suitable for designing some commonly used unitary gates. Another example was chosen to illustrate this method of gate design is the ion-trap model.

Light-effect transistor (LET) with multiple independent gating controls for optical logic gates and optical amplification

NASA Astrophysics Data System (ADS)

Marmon, Jason; Rai, Satish; Wang, Kai; Zhou, Weilie; Zhang, Yong

The pathway for CMOS technology beyond the 5-nm technology node remains unclear for both physical and technological reasons. A new transistor paradigm is required. A LET (Marmon et. al., Front. Phys. 2016, 4, No. 8) offers electronic-optical hybridization at the component level, and is capable of continuing Moore's law to the quantum scale. A LET overcomes a FET's fabrication complexity, e.g., physical gate and doping, by employing optical gating and photoconductivity, while multiple independent, optical gates readily realize unique functionalities. We report LET device characteristics and novel digital and analog applications, such as optical logic gates and optical amplification. Prototype CdSe-nanowire-based LETs, incorporating an M-S-M structure, show output and transfer characteristics resembling advanced FETs, e.g., on/off ratios up to 106 with a source-drain voltage of 1.43V, gate-power of 260nW, and a subthreshold swing of 0.3nW/decade (excluding losses). A LET has potential for high-switching (THz) speeds and extremely low-switching energies (aJ) in the ballistic transport region. Our work offers new electronic-optical integration strategies for high speed and low energy computing approaches, which could potentially be extended to other materials and devices.

Electrostatic potential profiles of molecular conductors

NASA Astrophysics Data System (ADS)

Liang, G. C.; Ghosh, A. W.; Paulsson, M.; Datta, S.

2004-03-01

The electrostatic potential across a short ballistic molecular conductor depends sensitively on the geometry of its environment, and can affect its conduction significantly by influencing its energy levels and wave functions. We illustrate some of the issues involved by evaluating the potential profiles for a conducting gold wire and an aromatic phenyl dithiol molecule in various geometries. The potential profile is obtained by solving Poisson’s equation with boundary conditions set by the contact electrochemical potentials and coupling the result self-consistently with a nonequilibrium Green’s function formulation of transport. The overall shape of the potential profile (ramp versus flat) depends on the feasibility of transverse screening of electric fields. Accordingly, the screening is better for a thick wire, a multiwalled nanotube, or a close-packed self-assembled monolayer, in comparison to a thin wire, a single-walled nanotube, or an isolated molecular conductor. The electrostatic potential further governs the alignment or misalignment of intramolecular levels, which can strongly influence the molecular current voltage (I V) characteristic. An external gate voltage can modify the overall potential profile, changing the I V characteristic from a resonant conducting to a saturating one. The degree of saturation and gate modulation depends on the availability of metal-induced-gap states and on the electrostatic gate control parameter set by the ratio of the gate oxide thickness to the channel length.

Electromechanical transducer for acoustic telemetry system

DOEpatents

Drumheller, D.S.

1993-06-22

An improved electromechanical transducer is provided for use in an acoustic telemetry system. The transducer of this invention comprises a stack of ferroelectric ceramic disks interleaved with a plurality of spaced electrodes which are used to electrically pole the ceramic disks. The ceramic stack is housed in a metal tubular drill collar segment. The electrodes are preferably alternatively connected to ground potential and driving potential. This alternating connection of electrodes to ground and driving potential subjects each disk to an equal electric field; and the direction of the field alternates to match the alternating direction of polarization of the ceramic disks. Preferably, a thin metal foil is sandwiched between electrodes to facilitate the electrical connection. Alternatively, a thicker metal spacer plate is selectively used in place of the metal foil in order to promote thermal cooling of the ceramic stack.

Electromechanical transducer for acoustic telemetry system

DOEpatents

Drumheller, Douglas S.

1993-01-01

An improved electromechanical transducer is provided for use in an acoustic telemetry system. The transducer of this invention comprises a stack of ferroelectric ceramic disks interleaved with a plurality of spaced electrodes which are used to electrically pole the ceramic disks. The ceramic stack is housed in a metal tubular drill collar segment. The electrodes are preferably alternatively connected to ground potential and driving potential. This alternating connection of electrodes to ground and driving potential subjects each disk to an equal electric field; and the direction of the field alternates to match the alternating direction of polarization of the ceramic disks. Preferably, a thin metal foil is sandwiched between electrodes to facilitate the electrical connection. Alternatively, a thicker metal spacer plate is selectively used in place of the metal foil in order to promote thermal cooling of the ceramic stack.

Development of 4D mathematical observer models for the task-based evaluation of gated myocardial perfusion SPECT

NASA Astrophysics Data System (ADS)

Lee, Taek-Soo; Frey, Eric C.; Tsui, Benjamin M. W.

2015-04-01

This paper presents two 4D mathematical observer models for the detection of motion defects in 4D gated medical images. Their performance was compared with results from human observers in detecting a regional motion abnormality in simulated 4D gated myocardial perfusion (MP) SPECT images. The first 4D mathematical observer model extends the conventional channelized Hotelling observer (CHO) based on a set of 2D spatial channels and the second is a proposed model that uses a set of 4D space-time channels. Simulated projection data were generated using the 4D NURBS-based cardiac-torso (NCAT) phantom with 16 gates/cardiac cycle. The activity distribution modelled uptake of 99mTc MIBI with normal perfusion and a regional wall motion defect. An analytical projector was used in the simulation and the filtered backprojection (FBP) algorithm was used in image reconstruction followed by spatial and temporal low-pass filtering with various cut-off frequencies. Then, we extracted 2D image slices from each time frame and reorganized them into a set of cine images. For the first model, we applied 2D spatial channels to the cine images and generated a set of feature vectors that were stacked for the images from different slices of the heart. The process was repeated for each of the 1,024 noise realizations, and CHO and receiver operating characteristics (ROC) analysis methodologies were applied to the ensemble of the feature vectors to compute areas under the ROC curves (AUCs). For the second model, a set of 4D space-time channels was developed and applied to the sets of cine images to produce space-time feature vectors to which the CHO methodology was applied. The AUC values of the second model showed better agreement (Spearman’s rank correlation (SRC) coefficient = 0.8) to human observer results than those from the first model (SRC coefficient = 0.4). The agreement with human observers indicates the proposed 4D mathematical observer model provides a good predictor of the performance of human observers in detecting regional motion defects in 4D gated MP SPECT images. The result supports the use of the observer model in the optimization and evaluation of 4D image reconstruction and compensation methods for improving the detection of motion abnormalities in 4D gated MP SPECT images.

Reversible logic gates based on enzyme-biocatalyzed reactions and realized in flow cells: a modular approach.

PubMed

Fratto, Brian E; Katz, Evgeny

2015-05-18

Reversible logic gates, such as the double Feynman gate, Toffoli gate and Peres gate, with 3-input/3-output channels are realized using reactions biocatalyzed with enzymes and performed in flow systems. The flow devices are constructed using a modular approach, where each flow cell is modified with one enzyme that biocatalyzes one chemical reaction. The multi-step processes mimicking the reversible logic gates are organized by combining the biocatalytic cells in different networks. This work emphasizes logical but not physical reversibility of the constructed systems. Their advantages and disadvantages are discussed and potential use in biosensing systems, rather than in computing devices, is suggested. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Apparatus for sensing patterns of electrical field variations across a surface

DOE Office of Scientific and Technical Information (OSTI.GOV)

Warren, William L.; Devine, Roderick A. B.

An array of nonvolatile field effect transistors used to sense electric potential variations. The transistors owe their nonvolatility to the movement of protons within the oxide layer that occurs only in response to an externally applied electric potential between the gate on one side of the oxide and the source/drain on the other side. The position of the protons within the oxide layer either creates or destroys a conducting channel in the adjacent source/channel/drain layer below it, the current in the channel being measured as the state of the nonvolatile memory. The protons can also be moved by potentials createdmore » by other instrumentalities, such as charges on fingerprints or styluses above the gates, pressure on a piezoelectric layer above the gates, light shining upon a photoconductive layer above the gates. The invention allows sensing of fingerprints, handwriting, and optical images, which are converted into digitized images thereof in a nonvolatile format.« less

An LOD with improved breakdown voltage in full-frame CCD devices

NASA Astrophysics Data System (ADS)

Banghart, Edmund K.; Stevens, Eric G.; Doan, Hung Q.; Shepherd, John P.; Meisenzahl, Eric J.

2005-02-01

In full-frame image sensors, lateral overflow drain (LOD) structures are typically formed along the vertical CCD shift registers to provide a means for preventing charge blooming in the imager pixels. In a conventional LOD structure, the n-type LOD implant is made through the thin gate dielectric stack in the device active area and adjacent to the thick field oxidation that isolates the vertical CCD columns of the imager. In this paper, a novel LOD structure is described in which the n-type LOD impurities are placed directly under the field oxidation and are, therefore, electrically isolated from the gate electrodes. By reducing the electrical fields that cause breakdown at the silicon surface, this new structure permits a larger amount of n-type impurities to be implanted for the purpose of increasing the LOD conductivity. As a consequence of the improved conductance, the LOD width can be significantly reduced, enabling the design of higher resolution imaging arrays without sacrificing charge capacity in the pixels. Numerical simulations with MEDICI of the LOD leakage current are presented that identify the breakdown mechanism, while three-dimensional solutions to Poisson's equation are used to determine the charge capacity as a function of pixel dimension.

Solubility- and temperature-driven thin film structures of polymeric thiophene derivatives for high performance OFET applications

NASA Astrophysics Data System (ADS)

LeFevre, Scott W.; Bao, Zhenan; Ryu, Chang Y.; Siegel, Richard W.; Yang, Hoichang

2007-09-01

It has been shown that high charge mobility in solution-processible organic semiconductor-based field effect transistors is due in part to a highly parallel π-π stacking plane orientation of the semiconductors with respect to gate-dielectric. Fast solvent evaporation methods, generally, exacerbate kinetically random crystal orientations in the films deposited, specifically, from good solvents. We have investigated solubility-driven thin film structures of thiophene derivative polymers via spin- and drop-casting with volatile solvents of a low boiling point. Among volatile solvents examined, marginal solvents, which have temperature-dependent solubility for the semiconductors (e.g. methylene chloride for regioregular poly(3-alkylthiophene)s), can be used to direct the favorable crystal orientation regardless of solvent drying time, when the temperature of gate-dielectrics is held to relatively cooler than the warm solution. Grazing-incidence X-ray diffraction and atomic force microscopy strongly support that significant control of crystal orientation and mesoscale morphology using a "cold" substrate holds true for both drop and spin casting. The effects of physiochemical post-modificaiton on film crystal structures and morphologies of poly(9,9-dioctylfluorene-co-bithiophene) have also been investigated.

Gap state analysis in electric-field-induced band gap for bilayer graphene.

PubMed

Kanayama, Kaoru; Nagashio, Kosuke

2015-10-29

The origin of the low current on/off ratio at room temperature in dual-gated bilayer graphene field-effect transistors is considered to be the variable range hopping in gap states. However, the quantitative estimation of gap states has not been conducted. Here, we report the systematic estimation of the energy gap by both quantum capacitance and transport measurements and the density of states for gap states by the conductance method. An energy gap of ~ 250 meV is obtained at the maximum displacement field of ~ 3.1 V/nm, where the current on/off ratio of ~ 3 × 10(3) is demonstrated at 20 K. The density of states for the gap states are in the range from the latter half of 10(12) to 10(13) eV(-1) cm(-2). Although the large amount of gap states at the interface of high-k oxide/bilayer graphene limits the current on/off ratio at present, our results suggest that the reduction of gap states below ~ 10(11) eV(-1) cm(-2) by continual improvement of the gate stack makes bilayer graphene a promising candidate for future nanoelectronic device applications.

Superconductivity in two-dimensional NbSe2 field effect transistors

NASA Astrophysics Data System (ADS)

El-Bana, Mohammed S.; Wolverson, Daniel; Russo, Saverio; Balakrishnan, Geetha; Mck Paul, Don; Bending, Simon J.

2013-12-01

We describe investigations of superconductivity in few molecular layer NbSe2 field effect transistors. While devices fabricated from NbSe2 flakes less than eight molecular layers thick did not conduct, thicker flakes were superconducting with an onset Tc that was only slightly depressed from the bulk value for 2H-NbSe2 (7.2 K). The resistance typically showed a small, sharp high temperature transition followed by one or more broader transitions which usually ended in a wide tail to zero resistance at low temperatures. We speculate that these multiple resistive transitions are related to disorder in the layer stacking. The behavior of several flakes has been characterized as a function of temperature, applied field and back-gate voltage. We find that the conductance in the normal state and transition temperature depend weakly on the gate voltage, with both conductivity and Tc decreasing as the electron concentration is increased. The application of a perpendicular magnetic field allows the evolution of different resistive transitions to be tracked and values of the zero temperature upper critical field, Hc2(0), and coherence length, ξ(0), to be independently estimated. Our results are analyzed in terms of available theories for these phenomena.

Feasibility of free-breathing dynamic contrast-enhanced MRI of gastric cancer using a golden-angle radial stack-of-stars VIBE sequence: comparison with the conventional contrast-enhanced breath-hold 3D VIBE sequence.

PubMed

Li, Huan-Huan; Zhu, Hui; Yue, Lei; Fu, Yi; Grimm, Robert; Stemmer, Alto; Fu, Cai-Xia; Peng, Wei-Jun

2018-05-01

To investigate the feasibility and diagnostic value of free-breathing, radial, stack-of-stars three-dimensional (3D) gradient echo (GRE) sequence ("golden angle") on dynamic contrast-enhanced (DCE) MRI of gastric cancer. Forty-three gastric cancer patients were divided into cooperative and uncooperative groups. Respiratory fluctuation was observed using an abdominal respiratory gating sensor. Those who breath-held for more than 15 s were placed in the cooperative group and the remainder in the uncooperative group. The 3-T MRI scanning protocol included 3D GRE and conventional breath-hold VIBE (volume-interpolated breath-hold examination) sequences, comparing images quantitatively and qualitatively. DCE-MRI parameters from VIBE images of normal gastric wall and malignant lesions were compared. For uncooperative patients, 3D GRE scored higher qualitatively, and had higher SNRs (signal-to-noise ratios) and CNRs (contrast-to-noise ratios) than conventional VIBE quantitatively. Though 3D GRE images scored lower in qualitative parameters compared with conventional VIBE for cooperative patients, it provided images with fewer artefacts. DCE parameters differed significantly between normal gastric wall and lesions, with higher Ve (extracellular volume) and lower Kep (reflux constant) in gastric cancer. The free-breathing, golden-angle, radial stack-of-stars 3D GRE technique is feasible for DCE-MRI of gastric cancer. Dynamic enhanced images can be used for quantitative analysis of this malignancy. • Golden-angle radial stack-of-stars VIBE aids gastric cancer MRI diagnosis. • The 3D GRE technique is suitable for patients unable to suspend respiration. • Method scored higher in the qualitative evaluation for uncooperative patients. • The technique produced images with fewer artefacts than conventional VIBE sequence. • Dynamic enhanced images can be used for quantitative analysis of gastric cancer.

Density-functional theory molecular dynamics simulations of a-HfO2/Ge(100)(2 × 1) and a-ZrO2/Ge(100)(2 × 1) interface passivation.

PubMed

Chagarov, E A; Porter, L; Kummel, A C

2016-02-28

The structural properties of a-HfO2/Ge(2 × 1)-(001) and a-ZrO2/Ge(2 × 1)-(001) interfaces were investigated with and without a GeOx interface interlayer using density-functional theory (DFT) molecular dynamics (MD) simulations. Realistic a-HfO2 and a-ZrO2 samples were generated using a hybrid classical-DFT MD "melt-and-quench" approach and tested against experimental properties. The oxide/Ge stacks were annealed at 700 K, cooled to 0 K, and relaxed providing the system with enough freedom to form realistic interfaces. For each high-K/Ge stack type, two systems with single and double interfaces were investigated. All stacks were free of midgap states; however, stacks with a GeO(x) interlayer had band-edge states which decreased the band gaps by 0%-30%. These band-edge states were mainly produced by under-coordinated Ge atoms in GeO(x) layer or its vicinity due to deformation, intermixing, and bond-breaking. The DFT-MD simulations show that electronically passive interfaces can be formed either directly between high-K dielectrics and Ge or with a monolayer of GeO2 if the processing does not create or properly passivate under-coordinated Ge atoms and Ge's with significantly distorted bonding angles. Comparison to the charge states of the interfacial atoms from DFT to experimental x-ray photoelectron spectroscopy results shows that while most studies of gate oxide on Ge(001) have a GeO(x) interfacial layer, it is possible to form an oxide/Ge interface without a GeO(x) interfacial layer. Comparison to experiments is consistent with the dangling bonds in the suboxide being responsible for midgap state formation.

3D gate-all-around bandgap-engineered SONOS flash memory in vertical silicon pillar with metal gate

NASA Astrophysics Data System (ADS)

Oh, Jae-Sub; Yang, Seong-Dong; Lee, Sang-Youl; Kim, Young-Su; Kang, Min-Ho; Lim, Sung-Kyu; Lee, Hi-Deok; Lee, Ga-Won

2013-08-01

In this paper, a gate-all-around bandgap-engineered silicon-oxide-nitride-oxide-silicon device with a vertical silicon pillar structure and a Ti metal gate are demonstrated for a potential solution to overcome the scaling-down of flash memory device. The devices were fabricated using CMOS-compatible technology and exhibited well-behaved memory characteristics in terms of the program/erase window, retention, and endurance properties. Moreover, the integration of the Ti metal gate demonstrated a significant improvement in the erase characteristics due to the efficient suppression of the electron back tunneling through the blocking oxide.

Three-terminal graphene single-electron transistor fabricated using feedback-controlled electroburning

DOE Office of Scientific and Technical Information (OSTI.GOV)

Puczkarski, Paweł; Gehring, Pascal, E-mail: pascal.gehring@materials.ox.ac.uk; Lau, Chit S.

2015-09-28

We report room-temperature Coulomb blockade in a single layer graphene three-terminal single-electron transistor fabricated using feedback-controlled electroburning. The small separation between the side gate electrode and the graphene quantum dot results in a gate coupling up to 3 times larger compared to the value found for the back gate electrode. This allows for an effective tuning between the conductive and Coulomb blocked state using a small side gate voltage of about 1 V. The technique can potentially be used in the future to fabricate all-graphene based room temperature single-electron transistors or three terminal single molecule transistors with enhanced gate coupling.

Flexible and re-configurable optical three-input XOR logic gate of phase-modulated signals with multicast functionality for potential application in optical physical-layer network coding.

PubMed

Lu, Guo-Wei; Qin, Jun; Wang, Hongxiang; Ji, XuYuefeng; Sharif, Gazi Mohammad; Yamaguchi, Shigeru

2016-02-08

Optical logic gate, especially exclusive-or (XOR) gate, plays important role in accomplishing photonic computing and various network functionalities in future optical networks. On the other hand, optical multicast is another indispensable functionality to efficiently deliver information in optical networks. In this paper, for the first time, we propose and experimentally demonstrate a flexible optical three-input XOR gate scheme for multiple input phase-modulated signals with a 1-to-2 multicast functionality for each XOR operation using four-wave mixing (FWM) effect in single piece of highly-nonlinear fiber (HNLF). Through FWM in HNLF, all of the possible XOR operations among input signals could be simultaneously realized by sharing a single piece of HNLF. By selecting the obtained XOR components using a followed wavelength selective component, the number of XOR gates and the participant light in XOR operations could be flexibly configured. The re-configurability of the proposed XOR gate and the function integration of the optical logic gate and multicast in single device offer the flexibility in network design and improve the network efficiency. We experimentally demonstrate flexible 3-input XOR gate for four 10-Gbaud binary phase-shift keying signals with a multicast scale of 2. Error-free operations for the obtained XOR results are achieved. Potential application of the integrated XOR and multicast function in network coding is also discussed.

Voltage-sensing domain mode shift is coupled to the activation gate by the N-terminal tail of hERG channels.

PubMed

Tan, Peter S; Perry, Matthew D; Ng, Chai Ann; Vandenberg, Jamie I; Hill, Adam P

2012-09-01

Human ether-a-go-go-related gene (hERG) potassium channels exhibit unique gating kinetics characterized by unusually slow activation and deactivation. The N terminus of the channel, which contains an amphipathic helix and an unstructured tail, has been shown to be involved in regulation of this slow deactivation. However, the mechanism of how this occurs and the connection between voltage-sensing domain (VSD) return and closing of the gate are unclear. To examine this relationship, we have used voltage-clamp fluorometry to simultaneously measure VSD motion and gate closure in N-terminally truncated constructs. We report that mode shifting of the hERG VSD results in a corresponding shift in the voltage-dependent equilibrium of channel closing and that at negative potentials, coupling of the mode-shifted VSD to the gate defines the rate of channel closure. Deletion of the first 25 aa from the N terminus of hERG does not alter mode shifting of the VSD but uncouples the shift from closure of the cytoplasmic gate. Based on these observations, we propose the N-terminal tail as an adaptor that couples voltage sensor return to gate closure to define slow deactivation gating in hERG channels. Furthermore, because the mode shift occurs on a time scale relevant to the cardiac action potential, we suggest a physiological role for this phenomenon in maximizing current flow through hERG channels during repolarization.

EDUCATION: Gates Gives Cambridge a Rival to Rhodes.

PubMed

Cohen, J

2000-10-20

Thanks to a new $210 million trust announced on 11 October by the Bill & Melinda Gates Foundation, Cambridge University is launching a new high-visibility scholars' program, which each year will fund at least 225 students from outside the United Kingdom. The university will select Gates Cambridge Scholars based on merit, not need, focusing on academic ability and leadership potential.

Stack Flow Rate Changes and the ANSI/N13.1-1999 Qualification Criteria: Application to the Hanford Canister Storage Building Stack

DOE Office of Scientific and Technical Information (OSTI.GOV)

Flaherty, Julia E.; Glissmeyer, John A.

2016-02-29

The Canister Storage Building (CSB), located in the 200-East Area of the Hanford Site, is a 42,000 square foot facility used to store spent nuclear fuel from past activities at the Hanford Site. Because the facility has the potential to emit radionuclides into the environment, its ventilation exhaust stack has been equipped with an air monitoring system. Subpart H of the National Emissions Standards for Hazardous Air Pollutants requires that a sampling probe be located in the exhaust stack in accordance with criteria established by the American National Standards Institute/Health Physics Society Standard N13.1-1999, Sampling and Monitoring Releases of Airbornemore » Radioactive Substances from the Stack and Ducts of Nuclear Facilities.« less

Dynamic electrical reconfiguration for improved capacitor charging in microbial fuel cell stacks

NASA Astrophysics Data System (ADS)

Papaharalabos, George; Greenman, John; Stinchcombe, Andrew; Horsfield, Ian; Melhuish, Chris; Ieropoulos, Ioannis

2014-12-01

A microbial fuel cell (MFC) is a bioelectrochemical device that uses anaerobic bacteria to convert chemical energy locked in biomass into small amounts of electricity. One viable way of increasing energy extraction is by stacking multiple MFC units and exploiting the available electrical configurations for increasing the current or stepping up the voltage. The present study illustrates how a real-time electrical reconfiguration of MFCs in a stack, halves the time required to charge a capacitor (load) and achieves 35% higher current generation compared to a fixed electrical configuration. This is accomplished by progressively switching in-parallel elements to in-series units in the stack, thus maintaining an optimum potential difference between the stack and the capacitor, which in turn allows for a higher energy transfer.

Effect of top gate potential on bias-stress for dual gate amorphous indium-gallium-zinc-oxide thin film transistor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chun, Minkyu; Um, Jae Gwang; Park, Min Sang

We report the abnormal behavior of the threshold voltage (V{sub TH}) shift under positive bias Temperature stress (PBTS) and negative bias temperature stress (NBTS) at top/bottom gate in dual gate amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs). It is found that the PBTS at top gate shows negative transfer shift and NBTS shows positive transfer shift for both top and bottom gate sweep. The shift of bottom/top gate sweep is dominated by top gate bias (V{sub TG}), while bottom gate bias (V{sub BG}) is less effect than V{sub TG}. The X-ray photoelectron spectroscopy (XPS) depth profile provides the evidence of Inmore » metal diffusion to the top SiO{sub 2}/a-IGZO and also the existence of large amount of In{sup +} under positive top gate bias around top interfaces, thus negative transfer shift is observed. On the other hand, the formation of OH{sup −} at top interfaces under the stress of negative top gate bias shows negative transfer shift. The domination of V{sub TG} both on bottom/top gate sweep after PBTS/NBTS is obviously occurred due to thin active layer.« less

π-π stacking tackled with density functional theory

PubMed Central

Swart, Marcel; van der Wijst, Tushar; Fonseca Guerra, Célia

2007-01-01

Through comparison with ab initio reference data, we have evaluated the performance of various density functionals for describing π-π interactions as a function of the geometry between two stacked benzenes or benzene analogs, between two stacked DNA bases, and between two stacked Watson–Crick pairs. Our main purpose is to find a robust and computationally efficient density functional to be used specifically and only for describing π-π stacking interactions in DNA and other biological molecules in the framework of our recently developed QM/QM approach "QUILD". In line with previous studies, most standard density functionals recover, at best, only part of the favorable stacking interactions. An exception is the new KT1 functional, which correctly yields bound π-stacked structures. Surprisingly, a similarly good performance is achieved with the computationally very robust and efficient local density approximation (LDA). Furthermore, we show that classical electrostatic interactions determine the shape and depth of the π-π stacking potential energy surface. Figure Additivity approximation for the π-π interaction between two stacked Watson–Crick base pairs in terms of pairwise interactions between individual bases Electronic supplementary material The online version of this article (doi:10.1007/s00894-007-0239-y) contains supplementary material, which is available to authorized users. PMID:17874150

Current transport mechanisms in mercury cadmium telluride diode

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gopal, Vishnu, E-mail: vishnu-46@yahoo.com, E-mail: wdhu@mail.sitp.ac.cn; Li, Qing; He, Jiale

This paper reports the results of modelling of the current-voltage characteristics (I-V) of a planar mid-wave Mercury Cadmium Telluride photodiode in a gate controlled diode experiment. It is reported that the diode exhibits nearly ideal I-V characteristics under the optimum surface potential leading to the minimal surface leakage current. Deviations from the optimum surface potential lead to non ideal I–V characteristics, indicating a strong relationship between the ideality factor of the diode with its surface leakage current. Diode's I–V characteristics have been modelled over a range of gate voltages from −9 V to −2 V. This range of gate voltages includes accumulation,more » flat band, and depletion and inversion conditions below the gate structure of the diode. It is shown that the I–V characteristics of the diode can be very well described by (i) thermal diffusion current, (ii) ohmic shunt current, (iii) photo-current due to background illumination, and (iv) excess current that grows by the process of avalanche multiplication in the gate voltage range from −3 V to −5 V that corresponds to the optimum surface potential. Outside the optimum gate voltage range, the origin of the excess current of the diode is associated with its high surface leakage currents. It is reported that the ohmic shunt current model applies to small surface leakage currents. The higher surface leakage currents exhibit a nonlinear shunt behaviour. It is also shown that the observed zero-bias dynamic resistance of the diode over the entire gate voltage range is the sum of ohmic shunt resistance and estimated zero-bias dynamic resistance of the diode from its thermal saturation current.« less

Development of paper-gate transistor toward direct detection from microbiological fluids

NASA Astrophysics Data System (ADS)

Kajisa, Taira; Sakata, Toshiya

2017-04-01

In this study, a paper-gate transistor was developed to detect glucose using an extended-gate field-effect transistor (FET). A filter paper was used as an extended gate electrode, in which Au nanoparticles (AuNPs) modified with phenylboronic acids (PBAs) were included. PBA-AuNPs play an important role as a support to not only be entrapped in cellulose fibrils but also bind to the targeted glucose in a paper. The surface properties of PBA-AuNPs were investigated to elucidate the electrical properties of the paper-gate electrode using an absorption spectrum and a zeta potential analysis. Moreover, the paper-gate electrode enabled us to detect glucose at the micromolar level on the basis of the principle of FET devices. A platform based on the paper-gate transistor is suitable for a highly sensitive system to detect glucose in trace samples such as tears, sweat, and saliva in the future.

Cognitive mechanisms associated with auditory sensory gating

PubMed Central

Jones, L.A.; Hills, P.J.; Dick, K.M.; Jones, S.P.; Bright, P.

2016-01-01

Sensory gating is a neurophysiological measure of inhibition that is characterised by a reduction in the P50 event-related potential to a repeated identical stimulus. The objective of this work was to determine the cognitive mechanisms that relate to the neurological phenomenon of auditory sensory gating. Sixty participants underwent a battery of 10 cognitive tasks, including qualitatively different measures of attentional inhibition, working memory, and fluid intelligence. Participants additionally completed a paired-stimulus paradigm as a measure of auditory sensory gating. A correlational analysis revealed that several tasks correlated significantly with sensory gating. However once fluid intelligence and working memory were accounted for, only a measure of latent inhibition and accuracy scores on the continuous performance task showed significant sensitivity to sensory gating. We conclude that sensory gating reflects the identification of goal-irrelevant information at the encoding (input) stage and the subsequent ability to selectively attend to goal-relevant information based on that previous identification. PMID:26716891

High-frequency electromechanical resonators based on thin GaTe

NASA Astrophysics Data System (ADS)

Chitara, Basant; Ya'akobovitz, Assaf

2017-10-01

Gallium telluride (GaTe) is a layered material, which exhibits a direct bandgap (˜1.65 eV) regardless of its thickness and therefore holds great potential for integration as a core element in stretchable optomechanical and optoelectronic devices. Here, we characterize and demonstrate the elastic properties and electromechanical resonators of suspended thin GaTe nanodrums. We used atomic force microscopy to extract the Young’s modulus of GaTe (average value ˜39 GPa) and to predict the resonance frequencies of suspended GaTe nanodrums of various geometries. Electromechanical resonators fabricated from suspended GaTe revealed fundamental resonance frequencies in the range of 10-25 MHz, which closely match predicted values. Therefore, this study paves the way for creating a new generation of GaTe based nanoelectromechanical devices with a direct bandgap vibrating element, which can serve as optomechanical sensors and actuators.

Modeling and Simulating Airport Surface Operations with Gate Conflicts

NASA Technical Reports Server (NTRS)

Zelinski, Shannon; Windhorst, Robert

2017-01-01

The Surface Operations Simulator and Scheduler (SOSS) is a fast-time simulation platform used to develop and test future surface scheduling concepts such as NASA's Air Traffic Demonstration 2 of time-based surface metering at Charlotte Douglass International Airport (CLT). Challenges associated with CLT surface operations have driven much of SOSS development. Recently, SOSS functionality for modeling harsdstand operations was developed to address gate conflicts, which occur when an arrival and departure wish to occupy the same gate at the same time. Because surface metering concepts such as ATD2 have the potential to increase gates conflicts as departures are held at their gates, it is important to study the interaction between surface metering and gate conflict management. Several approaches to managing gate conflicts with and without the use of hardstands were simulated and their effects on surface operations and scheduler performance compared.

Modeling and Simulating Airport Surface Operations with Gate Conflicts

NASA Technical Reports Server (NTRS)

Zelinski, Shannon; Windhorst, Robert

2017-01-01

The Surface Operations Simulator and Scheduler (SOSS) is a fast-time simulation platform used to develop and test future surface scheduling concepts such as NASAs Air Traffic Demonstration 2 of time-based surface metering at Charlotte Douglas International Airport (CLT). Challenges associated with CLT surface operations have driven much of SOSS development. Recently, SOSS functionality for modeling hardstand operations was developed to address gate conflicts, which occur when an arrival and departure wish to occupy the same gate at the same time. Because surface metering concepts such as ATD2 have the potential to increase gates conflicts as departure are held at their gates, it is important to study the interaction between surface metering and gate conflict management. Several approaches to managing gate conflicts with and without the use of hardstands were simulated and their effects on surface operations and scheduler performance compared.

The potential radiological impact from a Brazilian phosphate facility.

PubMed

Glória dos Reis, Rócio; da Costa Lauria, Dejanira

2014-10-01

In the semiarid region of Brazil, a facility for the production of phosphoric acid for fertilizer is in the last stages of the planning phase. The raw feedstock of Santa Quiteria has a very high level of uranium associated with the phosphate in form of apatite. The reaction by which phosphoric acid is produced generates phosphogypsum (PG) as a by-product. The ratio of phosphogypsum to phosphoric acid is approximately 5 to 1. After all of the phosphate has been extracted and processed, it is expected that some 37 million tons of phosphogypsum will be produced, containing 13 Bq/g of (226)Ra and 11 Bq/g of (210)Pb. To assess the potential impact of this PG stack on the surrounding inhabitants, a generic impact assessment was performed using a modeling approach. We estimated the amount and shape of the residue stack and used computational codes for assessing the radiological impact in a prospective risk assessment. A hypothetical farmer scenario was used to calculate two potential doses, one near the site boundary and another directly over the stack piles after the project is shut down. Using a conservative approach, the potential public dose was estimated to be 2.8 mSv/y. This study identified the rainfall erosion index, dissolution rate of PG, radionuclide distribution coefficients and fish consumption rate as parameters where improved information could enhance the quality of the dose assessment. The disposal and shape of the stack is of major concern, since the PG erosion might be the main pathway for the environmental contamination; therefore, studies should be carried out to determine a suitable shape and disposal of the stack. Furthermore, containment barriers should be evaluated for their potential to reduce or avoid environmental contamination by runoff. In addition, the onsite public dose underscores the importance of a planning for remediation of the area after the plant is shut down to assure that neither the public nor the environmental health will be affected by the presence of the PG stack. Copyright © 2014 Elsevier Ltd. All rights reserved.

GATE: software for the analysis and visualization of high-dimensional time series expression data.

PubMed

MacArthur, Ben D; Lachmann, Alexander; Lemischka, Ihor R; Ma'ayan, Avi

2010-01-01

We present Grid Analysis of Time series Expression (GATE), an integrated computational software platform for the analysis and visualization of high-dimensional biomolecular time series. GATE uses a correlation-based clustering algorithm to arrange molecular time series on a two-dimensional hexagonal array and dynamically colors individual hexagons according to the expression level of the molecular component to which they are assigned, to create animated movies of systems-level molecular regulatory dynamics. In order to infer potential regulatory control mechanisms from patterns of correlation, GATE also allows interactive interroga-tion of movies against a wide variety of prior knowledge datasets. GATE movies can be paused and are interactive, allowing users to reconstruct networks and perform functional enrichment analyses. Movies created with GATE can be saved in Flash format and can be inserted directly into PDF manuscript files as interactive figures. GATE is available for download and is free for academic use from http://amp.pharm.mssm.edu/maayan-lab/gate.htm

ON states as resource units for universal quantum computation with photonic architectures

NASA Astrophysics Data System (ADS)

Sabapathy, Krishna Kumar; Weedbrook, Christian

2018-06-01

Universal quantum computation using photonic systems requires gates the Hamiltonians of which are of order greater than quadratic in the quadrature operators. We first review previous proposals to implement such gates, where specific non-Gaussian states are used as resources in conjunction with entangling gates such as the continuous-variable versions of controlled-phase and controlled-not gates. We then propose ON states which are superpositions of the vacuum and the N th Fock state, for use as non-Gaussian resource states. We show that ON states can be used to implement the cubic and higher-order quadrature phase gates to first order in gate strength. There are several advantages to this method such as reduced number of superpositions in the resource state preparation and greater control over the final gate. We also introduce useful figures of merit to characterize gate performance. Utilizing a supply of on-demand resource states one can potentially scale up implementation to greater accuracy, by repeated application of the basic circuit.

Hybrid Toffoli gate on photons and quantum spins

PubMed Central

Luo, Ming-Xing; Ma, Song-Ya; Chen, Xiu-Bo; Wang, Xiaojun

2015-01-01

Quantum computation offers potential advantages in solving a number of interesting and difficult problems. Several controlled logic gates, the elemental building blocks of quantum computer, have been realized with various physical systems. A general technique was recently proposed that significantly reduces the realization complexity of multiple-control logic gates by harnessing multi-level information carriers. We present implementations of a key quantum circuit: the three-qubit Toffoli gate. By exploring the optical selection rules of one-sided optical microcavities, a Toffoli gate may be realized on all combinations of photon and quantum spins in the QD-cavity. The three general controlled-NOT gates are involved using an auxiliary photon with two degrees of freedom. Our results show that photons and quantum spins may be used alternatively in quantum information processing. PMID:26568078

Hybrid Toffoli gate on photons and quantum spins.

PubMed

Luo, Ming-Xing; Ma, Song-Ya; Chen, Xiu-Bo; Wang, Xiaojun

2015-11-16

Quantum computation offers potential advantages in solving a number of interesting and difficult problems. Several controlled logic gates, the elemental building blocks of quantum computer, have been realized with various physical systems. A general technique was recently proposed that significantly reduces the realization complexity of multiple-control logic gates by harnessing multi-level information carriers. We present implementations of a key quantum circuit: the three-qubit Toffoli gate. By exploring the optical selection rules of one-sided optical microcavities, a Toffoli gate may be realized on all combinations of photon and quantum spins in the QD-cavity. The three general controlled-NOT gates are involved using an auxiliary photon with two degrees of freedom. Our results show that photons and quantum spins may be used alternatively in quantum information processing.

Resonantly driven CNOT gate for electron spins

NASA Astrophysics Data System (ADS)

Zajac, D. M.; Sigillito, A. J.; Russ, M.; Borjans, F.; Taylor, J. M.; Burkard, G.; Petta, J. R.

2018-01-01

To build a universal quantum computer—the kind that can handle any computational task you throw at it—an essential early step is to demonstrate the so-called CNOT gate, which acts on two qubits. Zajac et al. built an efficient CNOT gate by using electron spin qubits in silicon quantum dots, an implementation that is especially appealing because of its compatibility with existing semiconductor-based electronics (see the Perspective by Schreiber and Bluhm). To showcase the potential, the authors used the gate to create an entangled quantum state called the Bell state.

P50 Sensory Gating and Attentional Performance

PubMed Central

Wan, Li; Friedman, Bruce H.; Boutros, Nash N.; Crawford, Helen J.

2008-01-01

Sensory gating refers to the preattentional filtering of irrelevant sensory stimuli. This process may be impaired in schizotypy, which is a trait also associated with cigarette smoking. This association may in part stem from the positive effects of smoking on sensory gating and attention. The relationship among sensory gating, smoking, schizotypy and attention was examined in 39 undergraduates. Sensory gating was indexed by the P50 suppression paradigm, and attention was measured by the Attention Network Test (ANT) and a Stroop task. Results showed sensory gating to be positively correlated with performances on ANT and Stroop reflected in better alerting, less conflict between stimuli, faster reaction time, and greater accuracy. Smokers showed a pattern of a greater number of significant correlations between sensory gating and attention in comparison to non-smokers, although the relationship between sensory gating and attention was not affected by schizotypy. The majority of significant correlations were found in the region surrounding Cz. These findings are discussed relative to the potential modifying influence of smoking and schizotypy on sensory gating and attention. PMID:18036692

A robust gene-stacking method utilizing yeast assembly for plant synthetic biology

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shih, Patrick M.; Vuu, Khanh; Mansoori, Nasim

The advent and growth of synthetic biology has demonstrated its potential as a promising avenue of research to address many societal needs. But, plant synthetic biology efforts have been hampered by a dearth of DNA part libraries, versatile transformation vectors and efficient assembly strategies. We describe a versatile system (named jStack) utilizing yeast homologous recombination to efficiently assemble DNA into plant transformation vectors. We also demonstrate how this method can facilitate pathway engineering of molecules of pharmaceutical interest, production of potential biofuels and shuffling of disease-resistance traits between crop species. Our approach provides a powerful alternative to conventional strategies formore » stacking genes and traits to address many impending environmental and agricultural challenges.« less

A robust gene-stacking method utilizing yeast assembly for plant synthetic biology

DOE PAGES

Shih, Patrick M.; Vuu, Khanh; Mansoori, Nasim; ...

2016-10-26

The advent and growth of synthetic biology has demonstrated its potential as a promising avenue of research to address many societal needs. But, plant synthetic biology efforts have been hampered by a dearth of DNA part libraries, versatile transformation vectors and efficient assembly strategies. We describe a versatile system (named jStack) utilizing yeast homologous recombination to efficiently assemble DNA into plant transformation vectors. We also demonstrate how this method can facilitate pathway engineering of molecules of pharmaceutical interest, production of potential biofuels and shuffling of disease-resistance traits between crop species. Our approach provides a powerful alternative to conventional strategies formore » stacking genes and traits to address many impending environmental and agricultural challenges.« less

Mutation of I696 and W697 in the TRP box of vanilloid receptor subtype I modulates allosteric channel activation.

PubMed

Gregorio-Teruel, Lucia; Valente, Pierluigi; González-Ros, José Manuel; Fernández-Ballester, Gregorio; Ferrer-Montiel, Antonio

2014-03-01

The transient receptor potential vanilloid receptor subtype I (TRPV1) channel acts as a polymodal sensory receptor gated by chemical and physical stimuli. Like other TRP channels, TRPV1 contains in its C terminus a short, conserved domain called the TRP box, which is necessary for channel gating. Substitution of two TRP box residues-I696 and W697-with Ala markedly affects TRPV1's response to all activating stimuli, which indicates that these two residues play a crucial role in channel gating. We systematically replaced I696 and W697 with 18 native l-amino acids (excluding cysteine) and evaluated the effect on voltage- and capsaicin-dependent gating. Mutation of I696 decreased channel activation by either voltage or capsaicin; furthermore, gating was only observed with substitution of hydrophobic amino acids. Substitution of W697 with any of the 18 amino acids abolished gating in response to depolarization alone, shifting the threshold to unreachable voltages, but not capsaicin-mediated gating. Moreover, vanilloid-activated responses of W697X mutants showed voltage-dependent gating along with a strong voltage-independent component. Analysis of the data using an allosteric model of activation indicates that mutation of I696 and W697 primarily affects the allosteric coupling constants of the ligand and voltage sensors to the channel pore. Together, our findings substantiate the notion that inter- and/or intrasubunit interactions at the level of the TRP box are critical for efficient coupling of stimulus sensing and gate opening. Perturbation of these interactions markedly reduces the efficacy and potency of the activating stimuli. Furthermore, our results identify these interactions as potential sites for pharmacological intervention.

Molecular basis of the interaction between gating modifier spider toxins and the voltage sensor of voltage-gated ion channels

NASA Astrophysics Data System (ADS)

Lau, Carus H. Y.; King, Glenn F.; Mobli, Mehdi

2016-09-01

Voltage-sensor domains (VSDs) are modular transmembrane domains of voltage-gated ion channels that respond to changes in membrane potential by undergoing conformational changes that are coupled to gating of the ion-conducting pore. Most spider-venom peptides function as gating modifiers by binding to the VSDs of voltage-gated channels and trapping them in a closed or open state. To understand the molecular basis underlying this mode of action, we used nuclear magnetic resonance to delineate the atomic details of the interaction between the VSD of the voltage-gated potassium channel KvAP and the spider-venom peptide VSTx1. Our data reveal that the toxin interacts with residues in an aqueous cleft formed between the extracellular S1-S2 and S3-S4 loops of the VSD whilst maintaining lipid interactions in the gaps formed between the S1-S4 and S2-S3 helices. The resulting network of interactions increases the energetic barrier to the conformational changes required for channel gating, and we propose that this is the mechanism by which gating modifier toxins inhibit voltage-gated ion channels.

TEM studies of III-V MOSFETs for ultimate CMOS

NASA Astrophysics Data System (ADS)

Longo, Paolo

Over the past half-century electronic industry has enormously grown changing the way people live their lives. Such growth has been driven by the miniaturisation and development of the transistors which are the main components in an integrated circuit (IC) commonly referred as a chip. Until today electronic industry has been based on the use of Si and its native oxide SiO2 in transistors. However, the performance limit of conventional Si based transistors is rapidly being approached and alternatives will soon be required. One of the proposed alternatives is GaAs. n-type GaAs has a mobility 5 times higher than Si. This makes it a suitable candidate for MOSFETs devices. So far, GaAs has not been used for practical MOSFETs because of the difficulties of making a good dielectric oxide layer in terms of leakage current and unpinned Fermi Level. Using processes pioneered by Passlack et al, dielectric gate stacks consisting of a template layer of amorphous Ga2O3 followed by amorphous GdGaO have been grown on GaAs substrates. Careful deposition of Ga2O3 can leave the Fermi Level unpinned. The introduction of Gd is important in order to decrease the leakage of current. The electrical properties of the Ga2O3/Gd[x]Ga[0.4-x]O[0.6] dielectric stack are related to the Gd concentration and the quality of the GaAs/Ga2O3 interface. Over the past years in a unique partnership several research groups from the Physics and the Electronic and Electrical engineering Department have collaboratively worked for the realisation and development of such new generation of GaAs based transistors using the technology described above. The properties of such devices depend on structures at the nanoscale which is only few atoms across. Thus the characterization using the transmission electron microscope (TEM) becomes essential. In this project TEM has been used to study several MBE grown III-V semiconductor nanostructures. In particular most of the thesis is focussed on the chemical characterisation of the GaAs/Ga2O3/GGO dielectric gate stack, mainly using electron energy loss spectroscopy (EELS) and high-resolution scanning Transmission electron microscopy (STEM) imaging. As said above the quality of such interfaces affects the properties of the whole device. Hence the results presented herein represent an important feedback for the realisation of world performance GaAs devices.

Action potentials drive body wall muscle contractions in Caenorhabditis elegans

PubMed Central

Gao, Shangbang; Zhen, Mei

2011-01-01

The sinusoidal locomotion exhibited by Caenorhabditis elegans predicts a tight regulation of contractions and relaxations of its body wall muscles. Vertebrate skeletal muscle contractions are driven by voltage-gated sodium channel–dependent action potentials. How coordinated motor outputs are regulated in C. elegans, which does not have voltage-gated sodium channels, remains unknown. Here, we show that C. elegans body wall muscles fire all-or-none, calcium-dependent action potentials that are driven by the L-type voltage-gated calcium and Kv1 voltage-dependent potassium channels. We further demonstrate that the excitatory and inhibitory motoneuron activities regulate the frequency of action potentials to coordinate muscle contraction and relaxation, respectively. This study provides direct evidence for the dual-modulatory model of the C. elegans motor circuit; moreover, it reveals a mode of motor control in which muscle cells integrate graded inputs of the nervous system and respond with all-or-none electrical signals. PMID:21248227

Electrostatic modulation of periodic potentials in a two-dimensional electron gas: From antidot lattice to quantum dot lattice

DOE Office of Scientific and Technical Information (OSTI.GOV)

Goswami, Srijit; Aamir, Mohammed Ali; Shamim, Saquib

2013-12-04

We use a dual gated device structure to introduce a gate-tuneable periodic potential in a GaAs/AlGaAs two dimensional electron gas (2DEG). Using only a suitable choice of gate voltages we can controllably alter the potential landscape of the bare 2DEG, inducing either a periodic array of antidots or quantum dots. Antidots are artificial scattering centers, and therefore allow for a study of electron dynamics. In particular, we show that the thermovoltage of an antidot lattice is particularly sensitive to the relative positions of the Fermi level and the antidot potential. A quantum dot lattice, on the other hand, provides themore » opportunity to study correlated electron physics. We find that its current-voltage characteristics display a voltage threshold, as well as a power law scaling, indicative of collective Coulomb blockade in a disordered background.« less

LaAlO{sub 3}/Si capacitors: Comparison of different molecular beam deposition conditions and their impact on electrical properties

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pelloquin, Sylvain; Baboux, Nicolas; Albertini, David

2013-01-21

A study of the structural and electrical properties of amorphous LaAlO{sub 3} (LAO)/Si thin films fabricated by molecular beam deposition (MBD) is presented. Two substrate preparation procedures have been explored namely a high temperature substrate preparation technique-leading to a step and terraces surface morphology-and a chemical HF-based surface cleaning. The LAO deposition conditions were improved by introducing atomic plasma-prepared oxygen instead of classical molecular O{sub 2} in the chamber. An Au/Ni stack was used as the top electrode for its electrical characteristics. The physico-chemical properties (surface topography, thickness homogeneity, LAO/Si interface quality) and electrical performance (capacitance and current versus voltagemore » and TunA current topography) of the samples were systematically evaluated. Deposition conditions (substrate temperature of 550 Degree-Sign C, oxygen partial pressure settled at 10{sup -6} Torr, and 550 W of power applied to the O{sub 2} plasma) and post-depositions treatments were investigated to optimize the dielectric constant ({kappa}) and leakage currents density (J{sub Gate} at Double-Vertical-Line V{sub Gate} Double-Vertical-Line = Double-Vertical-Line V{sub FB}- 1 Double-Vertical-Line ). In the best reproducible conditions, we obtained a LAO/Si layer with a dielectric constant of 16, an equivalent oxide thickness of 8.7 A, and J{sub Gate} Almost-Equal-To 10{sup -2}A/cm{sup 2}. This confirms the importance of LaAlO{sub 3} as an alternative high-{kappa} for ITRS sub-22 nm technology node.« less

Multifunctional Hybrid Multilayer Gate Dielectrics with Tunable Surface Energy for Ultralow-Power Organic and Amorphous Oxide Thin-Film Transistors.

PubMed

Byun, Hye-Ran; You, Eun-Ah; Ha, Young-Geun

2017-03-01

For large-area, printable, and flexible electronic applications using advanced semiconductors, novel dielectric materials with excellent capacitance, insulating property, thermal stability, and mechanical flexibility need to be developed to achieve high-performance, ultralow-voltage operation of thin-film transistors (TFTs). In this work, we first report on the facile fabrication of multifunctional hybrid multilayer gate dielectrics with tunable surface energy via a low-temperature solution-process to produce ultralow-voltage organic and amorphous oxide TFTs. The hybrid multilayer dielectric materials are constructed by iteratively stacking bifunctional phosphonic acid-based self-assembled monolayers combined with ultrathin high-k oxide layers. The nanoscopic thickness-controllable hybrid dielectrics exhibit the superior capacitance (up to 970 nF/cm 2 ), insulating property (leakage current densities <10 -7 A/cm 2 ), and thermal stability (up to 300 °C) as well as smooth surfaces (root-mean-square roughness <0.35 nm). In addition, the surface energy of the hybrid multilayer dielectrics are easily changed by switching between mono- and bifunctional phosphonic acid-based self-assembled monolayers for compatible fabrication with both organic and amorphous oxide semiconductors. Consequently, the hybrid multilayer dielectrics integrated into TFTs reveal their excellent dielectric functions to achieve high-performance, ultralow-voltage operation (< ± 2 V) for both organic and amorphous oxide TFTs. Because of the easily tunable surface energy, the multifunctional hybrid multilayer dielectrics can also be adapted for various organic and inorganic semiconductors, and metal gates in other device configurations, thus allowing diverse advanced electronic applications including ultralow-power and large-area electronic devices.

Hafnium silicate and hafnium silicon oxynitride gate dielectrics for strained Si_xGe_1-x: Interface stability

NASA Astrophysics Data System (ADS)

Addepalli, Swarna; Sivasubramani, Prasanna; El-Bouanani, Mohamed; Kim, Moon; Gnade, Bruce; Wallace, Robert

2003-03-01

Strained Si_xGe_1-x layers have gained considerable attention due to hole mobility enhancement, and ease of integration with Si-based CMOS technology. The deposition of stable high-κ dielectrics [1] such as hafnium silicate and hafnium silicon oxynitride in direct contact with SiGe would simultaneously improve the capacitance of the gate stack and lower the leakage current for high performance SiGe devices. However, the oxidation of the Si_xGe_1-x substrate either during dielectric deposition or post-deposition processing would degrade device performance due to the thermodynamic instability of germanium oxide [2,3]. Results from XPS, HR-TEM, and C-V, and I-V analyses after various annealing treatments will be presented for hafnium silicate and hafnium silicon oxynitride films deposited on strained Si_xGe_1-x(100), and correlated with dielectric-Si_xGe_1-x(100) interface stability. Implications to the introduction of these oxides as viable gate dielectric candidates for SiGe-based CMOS technology will be discussed. This work is supported by DARPA through SPAWAR Grant No. N66001-00-1-8928, and the Texas Advanced Technology Program. References: [1] G. D. Wilk, R. M. Wallace and J. M. Anthony, Journal of Applied Physics, 89, 5243 (2001) [2] W. S. Liu, J .S. Chen, M.-A. Nicolet, V. Arbet-Engels, K. L. Wang, Journal of Applied Physics, 72, 4444 (1992), and, Applied Physics Letters, 62, 3321 (1993) [3] W. S. Liu, M. -A. Nicolet, H. -H. Park, B. -H. Koak, J. -W. Lee, Journal of Applied Physics, 78, 2631 (1995)

A novel approach to model the transient behavior of solid-oxide fuel cell stacks

NASA Astrophysics Data System (ADS)

Menon, Vikram; Janardhanan, Vinod M.; Tischer, Steffen; Deutschmann, Olaf

2012-09-01

This paper presents a novel approach to model the transient behavior of solid-oxide fuel cell (SOFC) stacks in two and three dimensions. A hierarchical model is developed by decoupling the temperature of the solid phase from the fluid phase. The solution of the temperature field is considered as an elliptic problem, while each channel within the stack is modeled as a marching problem. This paper presents the numerical model and cluster algorithm for coupling between the solid phase and fluid phase. For demonstration purposes, results are presented for a stack operated on pre-reformed hydrocarbon fuel. Transient response to load changes is studied by introducing step changes in cell potential and current. Furthermore, the effect of boundary conditions and stack materials on response time and internal temperature distribution is investigated.

Improving pH sensitivity by field-induced charge regulation in flexible biopolymer electrolyte gated oxide transistors

NASA Astrophysics Data System (ADS)

Liu, Ning; Gan, Lu; Liu, Yu; Gui, Weijun; Li, Wei; Zhang, Xiaohang

2017-10-01

Electrical manipulation of charged ions in electrolyte-gated transistors is crucial for enhancing the electric-double-layer (EDL) gating effect, thereby improving their sensing abilities. Here, indium-zinc-oxide (IZO) based thin-film-transistors (TFTs) are fabricated on flexible plastic substrate. Acid doped chitosan-based biopolymer electrolyte is used as the gate dielectric, exhibiting an extremely high EDL capacitance. By regulating the dynamic EDL charging process with special gate potential profiles, the EDL gating effect of the chitosan-gated TFT is enhanced, and then resulting in higher pH sensitivities. An extremely high sensitivity of ∼57.8 mV/pH close to Nernst limit is achieved when the gate bias of the TFT sensor sweeps at a rate of 10 mV/s. Additionally, an enhanced sensitivity of 2630% in terms of current variation with pH range from 11 to 3 is realized when the device is operated in the ion depletion mode with a negative gate bias of -0.7 V. Robust ionic modulation is demonstrated in such chitosan-gated sensors. Efficiently driving the charged ions in the chitosan-gated IZO-TFT provides a new route for ultrasensitive, low voltage, and low-cost biochemical sensing technologies.

Serial DNA relay in DNA logic gates by electrical fusion and mechanical splitting of droplets

PubMed Central

Kawano, Ryuji; Takinoue, Masahiro; Osaki, Toshihisa; Kamiya, Koki; Miki, Norihisa

2017-01-01

DNA logic circuits utilizing DNA hybridization and/or enzymatic reactions have drawn increasing attention for their potential applications in the diagnosis and treatment of cellular diseases. The compartmentalization of such a system into a microdroplet considerably helps to precisely regulate local interactions and reactions between molecules. In this study, we introduced a relay approach for enabling the transfer of DNA from one droplet to another to implement multi-step sequential logic operations. We proposed electrical fusion and mechanical splitting of droplets to facilitate the DNA flow at the inputs, logic operation, output, and serial connection between two logic gates. We developed Negative-OR operations integrated by a serial connection of the OR gate and NOT gate incorporated in a series of droplets. The four types of input defined by the presence/absence of DNA in the input droplet pair were correctly reflected in the readout at the Negative-OR gate. The proposed approach potentially allows for serial and parallel logic operations that could be used for complex diagnostic applications. PMID:28700641

ClC-7 is a slowly voltage-gated 2Cl−/1H+-exchanger and requires Ostm1 for transport activity

PubMed Central

Leisle, Lilia; Ludwig, Carmen F; Wagner, Florian A; Jentsch, Thomas J; Stauber, Tobias

2011-01-01

Mutations in the ClC-7/Ostm1 ion transporter lead to osteopetrosis and lysosomal storage disease. Its lysosomal localization hitherto precluded detailed functional characterization. Using a mutated ClC-7 that reaches the plasma membrane, we now show that both the aminoterminus and transmembrane span of the Ostm1 β-subunit are required for ClC-7 Cl−/H+-exchange, whereas the Ostm1 transmembrane domain suffices for its ClC-7-dependent trafficking to lysosomes. ClC-7/Ostm1 currents were strongly outwardly rectifying owing to slow gating of ion exchange, which itself displays an intrinsically almost linear voltage dependence. Reversal potentials of tail currents revealed a 2Cl−/1H+-exchange stoichiometry. Several disease-causing CLCN7 mutations accelerated gating. Such mutations cluster to the second cytosolic cystathionine-β-synthase domain and potential contact sites at the transmembrane segment. Our work suggests that gating underlies the rectification of all endosomal/lysosomal CLCs and extends the concept of voltage gating beyond channels to ion exchangers. PMID:21527911

Structural basis for the inhibition of voltage-dependent K+ channel by gating modifier toxin

PubMed Central

Ozawa, Shin-ichiro; Kimura, Tomomi; Nozaki, Tomohiro; Harada, Hitomi; Shimada, Ichio; Osawa, Masanori

2015-01-01

Voltage-dependent K+ (Kv) channels play crucial roles in nerve and muscle action potentials. Voltage-sensing domains (VSDs) of Kv channels sense changes in the transmembrane potential, regulating the K+-permeability across the membrane. Gating modifier toxins, which have been used for the functional analyses of Kv channels, inhibit Kv channels by binding to VSD. However, the structural basis for the inhibition remains elusive. Here, fluorescence and NMR analyses of the interaction between VSD derived from KvAP channel and its gating modifier toxin, VSTx1, indicate that VSTx1 recognizes VSD under depolarized condition. We identified the VSD-binding residues of VSTx1 and their proximal residues of VSD by the cross-saturation (CS) and amino acid selective CS experiments, which enabled to build a docking model of the complex. These results provide structural basis for the specific binding and inhibition of Kv channels by gating modifier toxins. PMID:26382304

Energy-loss return gate via liquid dielectric polarization.

PubMed

Kim, Taehun; Yong, Hyungseok; Kim, Banseok; Kim, Dongseob; Choi, Dukhyun; Park, Yong Tae; Lee, Sangmin

2018-04-12

There has been much research on renewable energy-harvesting techniques. However, owing to increasing energy demands, significant energy-related issues remain to be solved. Efforts aimed at reducing the amount of energy loss in electric/electronic systems are essential for reducing energy consumption and protecting the environment. Here, we design an energy-loss return gate system that reduces energy loss from electric/electronic systems by utilizing the polarization of liquid dielectrics. The use of a liquid dielectric material in the energy-loss return gate generates electrostatic potential energy while reducing the dielectric loss of the electric/electronic system. Hence, an energy-loss return gate can make breakthrough impacts possible by amplifying energy-harvesting efficiency, lowering the power consumption of electronics, and storing the returned energy. Our study indicates the potential for enhancing energy-harvesting technologies for electric/electronics systems, while increasing the widespread development of these systems.

Bacterial voltage-gated sodium channels (BacNaVs) from the soil, sea, and salt lakes enlighten molecular mechanisms of electrical signaling and pharmacology in the brain and heart

PubMed Central

Payandeh, Jian; Minor, Daniel L.

2014-01-01

Voltage-gated sodium channels (NaVs) provide the initial electrical signal that drives action potential generation in many excitable cells of the brain, heart, and nervous system. For more than 60 years, functional studies of NaVs have occupied a central place in physiological and biophysical investigation of the molecular basis of excitability. Recently, structural studies of members of a large family of bacterial voltage-gated sodium channels (BacNaVs) prevalent in soil, marine, and salt lake environments that bear many of the core features of eukaryotic NaVs have reframed ideas for voltage-gated channel function, ion selectivity, and pharmacology. Here, we analyze the recent advances, unanswered questions, and potential of BacNaVs as templates for drug development efforts. PMID:25158094

Photocontrol of Voltage-Gated Ion Channel Activity by Azobenzene Trimethylammonium Bromide in Neonatal Rat Cardiomyocytes

PubMed Central

Frolova, Sheyda R.; Gaiko, Olga; Tsvelaya, Valeriya A.; Pimenov, Oleg Y.; Agladze, Konstantin I.

2016-01-01

The ability of azobenzene trimethylammonium bromide (azoTAB) to sensitize cardiac tissue excitability to light was recently reported. The dark, thermally relaxed trans- isomer of azoTAB suppressed spontaneous activity and excitation propagation speed, whereas the cis- isomer had no detectable effect on the electrical properties of cardiomyocyte monolayers. As the membrane potential of cardiac cells is mainly controlled by activity of voltage-gated ion channels, this study examined whether the sensitization effect of azoTAB was exerted primarily via the modulation of voltage-gated ion channel activity. The effects of trans- and cis- isomers of azoTAB on voltage-dependent sodium (INav), calcium (ICav), and potassium (IKv) currents in isolated neonatal rat cardiomyocytes were investigated using the whole-cell patch-clamp technique. The experiments showed that azoTAB modulated ion currents, causing suppression of sodium (Na+) and calcium (Ca2+) currents and potentiation of net potassium (K+) currents. This finding confirms that azoTAB-effect on cardiac tissue excitability do indeed result from modulation of voltage-gated ion channels responsible for action potential. PMID:27015602

Dielectric collapse at the LaAlO 3/SrTiO 3 (001) heterointerface under applied electric field

DOE Office of Scientific and Technical Information (OSTI.GOV)

Minohara, M.; Hikita, Y.; Bell, C.

The fascinating interfacial transport properties at the LaAlO 3/SrTiO 3 heterointerface have led to intense investigations of this oxide system. Exploiting the large dielectric constant of SrTiO 3 at low temperatures, tunability in the interfacial conductivity over a wide range has been demonstrated using a back-gate device geometry. In order to understand the effect of back-gating, it is crucial to assess the interface band structure and its evolution with external bias. In this study, we report measurements of the gate-bias dependent interface band alignment, especially the confining potential profile, at the conducting LaAlO 3/SrTiO 3 (001) heterointerface using soft andmore » hard x-ray photoemission spectroscopy in conjunction with detailed model simulations. Depth-profiling analysis incorporating the electric field dependent dielectric constant in SrTiO 3 reveals that a significant potential drop on the SrTiO 3 side of the interface occurs within ~2 nm of the interface under negative gate-bias. These results demonstrate gate control of the collapse of the dielectric permittivity at the interface, and explain the dramatic loss of electron mobility with back-gate depletion.« less

Using Ultrathin Parylene Films as an Organic Gate Insulator in Nanowire Field-Effect Transistors.

PubMed

Gluschke, J G; Seidl, J; Lyttleton, R W; Carrad, D J; Cochrane, J W; Lehmann, S; Samuelson, L; Micolich, A P

2018-06-27

We report the development of nanowire field-effect transistors featuring an ultrathin parylene film as a polymer gate insulator. The room temperature, gas-phase deposition of parylene is an attractive alternative to oxide insulators prepared at high temperatures using atomic layer deposition. We discuss our custom-built parylene deposition system, which is designed for reliable and controlled deposition of <100 nm thick parylene films on III-V nanowires standing vertically on a growth substrate or horizontally on a device substrate. The former case gives conformally coated nanowires, which we used to produce functional Ω-gate and gate-all-around structures. These give subthreshold swings as low as 140 mV/dec and on/off ratios exceeding 10 3 at room temperature. For the gate-all-around structure, we developed a novel fabrication strategy that overcomes some of the limitations with previous lateral wrap-gate nanowire transistors. Finally, we show that parylene can be deposited over chemically treated nanowire surfaces, a feature generally not possible with oxides produced by atomic layer deposition due to the surface "self-cleaning" effect. Our results highlight the potential for parylene as an alternative ultrathin insulator in nanoscale electronic devices more broadly, with potential applications extending into nanobioelectronics due to parylene's well-established biocompatible properties.

Dielectric collapse at the LaAlO 3/SrTiO 3 (001) heterointerface under applied electric field

DOE PAGES

Minohara, M.; Hikita, Y.; Bell, C.; ...

2017-08-25

The fascinating interfacial transport properties at the LaAlO 3/SrTiO 3 heterointerface have led to intense investigations of this oxide system. Exploiting the large dielectric constant of SrTiO 3 at low temperatures, tunability in the interfacial conductivity over a wide range has been demonstrated using a back-gate device geometry. In order to understand the effect of back-gating, it is crucial to assess the interface band structure and its evolution with external bias. In this study, we report measurements of the gate-bias dependent interface band alignment, especially the confining potential profile, at the conducting LaAlO 3/SrTiO 3 (001) heterointerface using soft andmore » hard x-ray photoemission spectroscopy in conjunction with detailed model simulations. Depth-profiling analysis incorporating the electric field dependent dielectric constant in SrTiO 3 reveals that a significant potential drop on the SrTiO 3 side of the interface occurs within ~2 nm of the interface under negative gate-bias. These results demonstrate gate control of the collapse of the dielectric permittivity at the interface, and explain the dramatic loss of electron mobility with back-gate depletion.« less

A magnetoelectric flux gate: new approach for weak DC magnetic field detection.

PubMed

Chu, Zhaoqiang; Shi, Huaduo; PourhosseiniAsl, Mohammad Javad; Wu, Jingen; Shi, Weiliang; Gao, Xiangyu; Yuan, Xiaoting; Dong, Shuxiang

2017-08-17

The magnetic flux gate sensors based on Faraday's Law of Induction are widely used for DC or extremely low frequency magnetic field detection. Recently, as the fast development of multiferroics and magnetoelectric (ME) composite materials, a new technology based on ME coupling effect is emerging for potential devices application. Here, we report a magnetoelectric flux gate sensor (MEFGS) for weak DC magnetic field detection for the first time, which works on a similar magnetic flux gate principle, but based on ME coupling effect. The proposed MEFGS has a shuttle-shaped configuration made of amorphous FeBSi alloy (Metglas) serving as both magnetic and magnetostrictive cores for producing a closed-loop high-frequency magnetic flux and also a longitudinal vibration, and one pair of embedded piezoelectric PMN-PT fibers ([011]-oriented Pb(Mg,Nb)O 3 -PbTiO 3 single crystal) serving as ME flux gate in a differential mode for detecting magnetic anomaly. In this way, the relative change in output signal of the MEFGS under an applied DC magnetic anomaly of 1 nT was greatly enhanced by a factor of 4 to 5 in comparison with the previous reports. The proposed ME flux gate shows a great potential for magnetic anomaly detections, such as magnetic navigation, magnetic based medical diagnosis, etc.

Measurement of slow-moving along-track displacement from an efficient multiple-aperture SAR interferometry (MAI) stacking

USGS Publications Warehouse

Jo, Min-Jeong; Jung, Hyung-Sup; Won, Joong-Sun; Poland, Michael; Miklius, Asta; Lu, Zhong

2015-01-01

Multiple-aperture SAR interferometry (MAI) has demonstrated outstanding measurement accuracy of along-track displacement when compared to pixel-offset-tracking methods; however, measuring slow-moving (cm/year) surface displacement remains a challenge. Stacking of multi-temporal observations is a potential approach to reducing noise and increasing measurement accuracy, but it is difficult to achieve a significant improvement by applying traditional stacking methods to multi-temporal MAI interferograms. This paper proposes an efficient MAI stacking method, where multi-temporal forward- and backward-looking residual interferograms are individually stacked before the MAI interferogram is generated. We tested the performance of this method using ENVISAT data from Kīlauea Volcano, Hawai‘i, where displacement on the order of several centimeters per year is common. By comparing results from the proposed stacking methods with displacements from GPS data, we documented measurement accuracies of about 1.03 and 1.07 cm/year for the descending and ascending tracks, respectively—an improvement of about a factor of two when compared with that from the conventional stacking approach. Three-dimensional surface-displacement maps can be constructed by combining stacked InSAR and MAI observations, which will contribute to a better understanding of a variety of geological phenomena.

Low electron mobility of field-effect transistor determined by modulated magnetoresistance

NASA Astrophysics Data System (ADS)

Tauk, R.; Łusakowski, J.; Knap, W.; Tiberj, A.; Bougrioua, Z.; Azize, M.; Lorenzini, P.; Sakowicz, M.; Karpierz, K.; Fenouillet-Beranger, C.; Cassé, M.; Gallon, C.; Boeuf, F.; Skotnicki, T.

2007-11-01

Room temperature magnetotransport experiments were carried out on field-effect transistors in magnetic fields up to 10 T. It is shown that measurements of the transistor magnetoresistance and its first derivative with respect to the gate voltage allow the derivation of the electron mobility in the gated part of the transistor channel, while the access/contact resistances and the transistor gate length need not be known. We demonstrate the potential of this method using GaN and Si field-effect transistors and discuss its importance for mobility measurements in transistors with nanometer gate length.

A common pathway for charge transport through voltage-sensing domains.

PubMed

Chanda, Baron; Bezanilla, Francisco

2008-02-07

Voltage-gated ion channels derive their voltage sensitivity from the movement of specific charged residues in response to a change in transmembrane potential. Several studies on mechanisms of voltage sensing in ion channels support the idea that these gating charges move through a well-defined permeation pathway. This gating pathway in a voltage-gated ion channel can also be mutated to transport free cations, including protons. The recent discovery of proton channels with sequence homology to the voltage-sensing domains suggests that evolution has perhaps exploited the same gating pathway to generate a bona fide voltage-dependent proton transporter. Here we will discuss implications of these findings on the mechanisms underlying charge (and ion) transport by voltage-sensing domains.

Interaction potential for indium phosphide: a molecular dynamics and first-principles study of the elastic constants, generalized stacking fault and surface energies.

PubMed

Branicio, Paulo Sergio; Rino, José Pedro; Gan, Chee Kwan; Tsuzuki, Hélio

2009-03-04

Indium phosphide is investigated using molecular dynamics (MD) simulations and density-functional theory calculations. MD simulations use a proposed effective interaction potential for InP fitted to a selected experimental dataset of properties. The potential consists of two- and three-body terms that represent atomic-size effects, charge-charge, charge-dipole and dipole-dipole interactions as well as covalent bond bending and stretching. Predictions are made for the elastic constants as a function of density and temperature, the generalized stacking fault energy and the low-index surface energies.

Poly(methyl methacrylate) as a self-assembled gate dielectric for graphene field-effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sanne, A.; Movva, H. C. P.; Kang, S.

We investigate poly(methyl methacrylate) (PMMA) as a low thermal budget organic gate dielectric for graphene field effect-transistors (GFETs) based on a simple process flow. We show that high temperature baking steps above the glass transition temperature (∼130 °C) can leave a self-assembled, thin PMMA film on graphene, where we get a gate dielectric almost for “free” without additional atomic layer deposition type steps. Electrical characterization of GFETs with PMMA as a gate dielectric yields a dielectric constant of k = 3.0. GFETs with thinner PMMA dielectrics have a lower dielectric constant due to decreased polarization arising from neutralization of dipoles and charged carriersmore » as baking temperatures increase. The leakage through PMMA gate dielectric increases with decreasing dielectric thickness and increasing electric field. Unlike conventional high-k gate dielectrics, such low-k organic gate dielectrics are potentially attractive for devices such as the proposed Bilayer pseudoSpin Field-Effect Transistor or flexible high speed graphene electronics.« less

Voltage-dependent gating of KCNH potassium channels lacking a covalent link between voltage-sensing and pore domains

PubMed Central

Lörinczi, Éva; Gómez-Posada, Juan Camilo; de la Peña, Pilar; Tomczak, Adam P.; Fernández-Trillo, Jorge; Leipscher, Ulrike; Stühmer, Walter; Barros, Francisco; Pardo, Luis A.

2015-01-01

Voltage-gated channels open paths for ion permeation upon changes in membrane potential, but how voltage changes are coupled to gating is not entirely understood. Two modules can be recognized in voltage-gated potassium channels, one responsible for voltage sensing (transmembrane segments S1 to S4), the other for permeation (S5 and S6). It is generally assumed that the conversion of a conformational change in the voltage sensor into channel gating occurs through the intracellular S4–S5 linker that provides physical continuity between the two regions. Using the pathophysiologically relevant KCNH family, we show that truncated proteins interrupted at, or lacking the S4–S5 linker produce voltage-gated channels in a heterologous model that recapitulate both the voltage-sensing and permeation properties of the complete protein. These observations indicate that voltage sensing by the S4 segment is transduced to the channel gate in the absence of physical continuity between the modules. PMID:25818916

Microscopic origin of gating current fluctuations in a potassium channel voltage sensor.

PubMed

Freites, J Alfredo; Schow, Eric V; White, Stephen H; Tobias, Douglas J

2012-06-06

Voltage-dependent ion channels open and close in response to changes in membrane electrical potential due to the motion of their voltage-sensing domains (VSDs). VSD charge displacements within the membrane electric field are observed in electrophysiology experiments as gating currents preceding ionic conduction. The elementary charge motions that give rise to the gating current cannot be observed directly, but appear as discrete current pulses that generate fluctuations in gating current measurements. Here we report direct observation of gating-charge displacements in an atomistic molecular dynamics simulation of the isolated VSD from the KvAP channel in a hydrated lipid bilayer on the timescale (10-μs) expected for elementary gating charge transitions. The results reveal that gating-charge displacements are associated with the water-catalyzed rearrangement of salt bridges between the S4 arginines and a set of conserved acidic side chains on the S1-S3 transmembrane segments in the hydrated interior of the VSD. Copyright © 2012 Biophysical Society. Published by Elsevier Inc. All rights reserved.

Voltage-dependent gating of KCNH potassium channels lacking a covalent link between voltage-sensing and pore domains.

PubMed

Lörinczi, Éva; Gómez-Posada, Juan Camilo; de la Peña, Pilar; Tomczak, Adam P; Fernández-Trillo, Jorge; Leipscher, Ulrike; Stühmer, Walter; Barros, Francisco; Pardo, Luis A

2015-03-30

Voltage-gated channels open paths for ion permeation upon changes in membrane potential, but how voltage changes are coupled to gating is not entirely understood. Two modules can be recognized in voltage-gated potassium channels, one responsible for voltage sensing (transmembrane segments S1 to S4), the other for permeation (S5 and S6). It is generally assumed that the conversion of a conformational change in the voltage sensor into channel gating occurs through the intracellular S4-S5 linker that provides physical continuity between the two regions. Using the pathophysiologically relevant KCNH family, we show that truncated proteins interrupted at, or lacking the S4-S5 linker produce voltage-gated channels in a heterologous model that recapitulate both the voltage-sensing and permeation properties of the complete protein. These observations indicate that voltage sensing by the S4 segment is transduced to the channel gate in the absence of physical continuity between the modules.

Voltage-dependent gating of KCNH potassium channels lacking a covalent link between voltage-sensing and pore domains

NASA Astrophysics Data System (ADS)

Lörinczi, Éva; Gómez-Posada, Juan Camilo; de La Peña, Pilar; Tomczak, Adam P.; Fernández-Trillo, Jorge; Leipscher, Ulrike; Stühmer, Walter; Barros, Francisco; Pardo, Luis A.

2015-03-01

Voltage-gated channels open paths for ion permeation upon changes in membrane potential, but how voltage changes are coupled to gating is not entirely understood. Two modules can be recognized in voltage-gated potassium channels, one responsible for voltage sensing (transmembrane segments S1 to S4), the other for permeation (S5 and S6). It is generally assumed that the conversion of a conformational change in the voltage sensor into channel gating occurs through the intracellular S4-S5 linker that provides physical continuity between the two regions. Using the pathophysiologically relevant KCNH family, we show that truncated proteins interrupted at, or lacking the S4-S5 linker produce voltage-gated channels in a heterologous model that recapitulate both the voltage-sensing and permeation properties of the complete protein. These observations indicate that voltage sensing by the S4 segment is transduced to the channel gate in the absence of physical continuity between the modules.

A two dimensional analytical modeling of surface potential in triple metal gate (TMG) fully-depleted Recessed-Source/Drain (Re-S/D) SOI MOSFET

NASA Astrophysics Data System (ADS)

Priya, Anjali; Mishra, Ram Awadh

2016-04-01

In this paper, analytical modeling of surface potential is proposed for new Triple Metal Gate (TMG) fully depleted Recessed-Source/Dain Silicon On Insulator (SOI) Metal Oxide Semiconductor Field Effect Transistor (MOSFET). The metal with the highest work function is arranged near the source region and the lowest one near the drain. Since Recessed-Source/Drain SOI MOSFET has higher drain current as compared to conventional SOI MOSFET due to large source and drain region. The surface potential model developed by 2D Poisson's equation is verified by comparison to the simulation result of 2-dimensional ATLAS simulator. The model is compared with DMG and SMG devices and analysed for different device parameters. The ratio of metal gate length is varied to optimize the result.

Skyrmion-based multi-channel racetrack

NASA Astrophysics Data System (ADS)

Song, Chengkun; Jin, Chendong; Wang, Jinshuai; Xia, Haiyan; Wang, Jianbo; Liu, Qingfang

2017-11-01

Magnetic skyrmions are promising for the application of racetrack memories, logic gates, and other nano-devices, owing to their topologically protected stability, small size, and low driving current. In this work, we propose a skyrmion-based multi-channel racetrack memory where the skyrmion moves in the selected channel by applying voltage-controlled magnetic anisotropy gates. It is demonstrated numerically that a current-dependent skyrmion Hall effect can be restrained by the additional potential of the voltage-controlled region, and the skyrmion velocity and moving channel in the racetrack can be operated by tuning the voltage-controlled magnetic anisotropy, gate position, and current density. Our results offer a potential application of racetrack memory based on skyrmions.

Energy Impacts of Wide Band Gap Semiconductors in U.S. Light-Duty Electric Vehicle Fleet.

PubMed

Warren, Joshua A; Riddle, Matthew E; Graziano, Diane J; Das, Sujit; Upadhyayula, Venkata K K; Masanet, Eric; Cresko, Joe

2015-09-01

Silicon carbide and gallium nitride, two leading wide band gap semiconductors with significant potential in electric vehicle power electronics, are examined from a life cycle energy perspective and compared with incumbent silicon in U.S. light-duty electric vehicle fleet. Cradle-to-gate, silicon carbide is estimated to require more than twice the energy as silicon. However, the magnitude of vehicle use phase fuel savings potential is comparatively several orders of magnitude higher than the marginal increase in cradle-to-gate energy. Gallium nitride cradle-to-gate energy requirements are estimated to be similar to silicon, with use phase savings potential similar to or exceeding that of silicon carbide. Potential energy reductions in the United States vehicle fleet are examined through several scenarios that consider the market adoption potential of electric vehicles themselves, as well as the market adoption potential of wide band gap semiconductors in electric vehicles. For the 2015-2050 time frame, cumulative energy savings associated with the deployment of wide band gap semiconductors are estimated to range from 2-20 billion GJ depending on market adoption dynamics.

Spin selective filtering of polariton condensate flow

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gao, T.; Department of Materials Science and Technology, University of Crete, 71003 Heraklion, Crete; Antón, C.

2015-07-06

Spin-selective spatial filtering of propagating polariton condensates, using a controllable spin-dependent gating barrier, in a one-dimensional semiconductor microcavity ridge waveguide is reported. A nonresonant laser beam provides the source of propagating polaritons, while a second circularly polarized weak beam imprints a spin dependent potential barrier, which gates the polariton flow and generates polariton spin currents. A complete spin-based control over the blocked and transmitted polaritons is obtained by varying the gate polarization.

Life Sciences Laboratory 2 Fan Exhaust Mixing Study

DOE Office of Scientific and Technical Information (OSTI.GOV)

Flaherty, Julia E.; Antonio, Ernest J.

An SF 6 tracer release was performed in the LSL-II ventilation stack over the weekend of March 5, 2016. The primary purpose of this study was to experimentally determine the gaseous concentration of material from a fume hood to the fan outlet, as well as at typical worker locations, to gain an understanding of potential worker exposures impacts. Five different fan operating configurations were utilized to ensure that the full spectrum of historical operating configurations was addressed. Some summary points from this study include: •Relatively high concentrations were observed within the stack area. –Between 50 and 100% of the exhaustmore » concentration may be observed within the stack. •Background concentrations were observed outside the stack area. –Workers outside the stack itself, but on the roof, are unlikely to be impacted by the exhaust. •Elevated concentrations on the order of 25% of the exhaust concentrations were observed within the Penthouse. •Transport time from a laboratory fume hood to the exhaust fan is within one to two minutes. •Penthouse concentrations climb from background levels to steady state over 15+ minutes. •Wind speed and wind direction did not play a significant role in the test outcomes. –A slight bias in the concentration distribution may be discernable based on wind speed and direction. •When both fans are operating, material from fume hoods on the east side preferentially flow through the east fan, while material from fume hoods on the west side preferentially flow through the west fan. This effectively doubles the concentration at that fan. This mixing study will inform other study components to develop a more complete picture of the worker potential exposure from LSL-II Rooftop activities. Estimating the mean concentration in the stack from chemical inventories and fume hood emissions for both current and historical laboratory activities is a separate effort. These estimates of mean ventilation concentrations will utilize this mixing study to estimate the potential exposure to workers working in and around the LSL-II stack.« less

Evaluation of a motion artifacts removal approach on breath-hold cine-magnetic resonance images of hypertrophic cardiomyopathy subjects

NASA Astrophysics Data System (ADS)

Betancur, Julián.; Simon, Antoine; Schnell, Frédéric; Donal, Erwan; Hernández, Alfredo; Garreau, Mireille

2013-11-01

The acquisition of ECG-gated cine magnetic resonance images of the heart is routinely performed in apnea in order to suppress the motion artifacts caused by breathing. However, many factors including the 2D nature of the acquisition and the use of di erent beats to acquire the multiple-view cine images, cause this kind of artifacts to appear. This paper presents the qualitative evaluation of a method aiming to remove motion artifacts in multipleview cine images acquired on patients with hypertrophic cardiomyopathy diagnosis. The approach uses iconic registration to reduce for in-plane artifacts in long-axis-view image stacks and in-plane and out-of-plane motion artifacts in sort-axis-view image stack. Four similarity measures were evaluated: the normalized correlation, the normalized mutual information, the sum of absolute voxel di erences and the Slomka metric proposed by Slomka et al. The qualitative evaluation assessed the misalignment of di erent anatomical structures of the left ventricle as follows: the misalignment of the interventricular septum and the lateral wall for short-axis-view acquisitions and the misalignment between the short-axis-view image and long-axis-view images. Results showed the correction using the normalized correlation as the most appropriated with an 80% of success.

Light-erasable embedded charge-trapping memory based on MoS2 for system-on-panel applications

NASA Astrophysics Data System (ADS)

He, Long-Fei; Zhu, Hao; Xu, Jing; Liu, Hao; Nie, Xin-Ran; Chen, Lin; Sun, Qing-Qing; Xia, Yang; Wei Zhang, David

2017-11-01

The continuous scaling and challenges in device integrations in modern portable electronic products have aroused many scientific interests, and a great deal of effort has been made in seeking solutions towards a more microminiaturized package assembled with smaller and more powerful components. In this study, an embedded light-erasable charge-trapping memory with a high-k dielectric stack (Al2O3/HfO2/Al2O3) and an atomically thin MoS2 channel has been fabricated and fully characterized. The memory exhibits a sufficient memory window, fast programming and erasing (P/E) speed, and high On/Off current ratio up to 107. Less than 25% memory window degradation is observed after projected 10-year retention, and the device functions perfectly after 8000 P/E operation cycles. Furthermore, the programmed device can be fully erased by incident light without electrical assistance. Such excellent memory performance originates from the intrinsic properties of two-dimensional (2D) MoS2 and the engineered back-gate dielectric stack. Our integration of 2D semiconductors in the infrastructure of light-erasable charge-trapping memory is very promising for future system-on-panel applications like storage of metadata and flexible imaging arrays.

Effects of H2 High-pressure Annealing on HfO2/Al2O3/In0.53Ga0.47As Capacitors: Chemical Composition and Electrical Characteristics.

PubMed

Choi, Sungho; An, Youngseo; Lee, Changmin; Song, Jeongkeun; Nguyen, Manh-Cuong; Byun, Young-Chul; Choi, Rino; McIntyre, Paul C; Kim, Hyoungsub

2017-08-29

We studied the impact of H 2 pressure during post-metallization annealing on the chemical composition of a HfO 2 /Al 2 O 3 gate stack on a HCl wet-cleaned In 0.53 Ga 0.47 As substrate by comparing the forming gas annealing (at atmospheric pressure with a H 2 partial pressure of 0.04 bar) and H 2 high-pressure annealing (H 2 -HPA at 30 bar) methods. In addition, the effectiveness of H 2 -HPA on the passivation of the interface states was compared for both p- and n-type In 0.53 Ga 0.47 As substrates. The decomposition of the interface oxide and the subsequent out-diffusion of In and Ga atoms toward the high-k film became more significant with increasing H 2 pressure. Moreover, the increase in the H 2 pressure significantly improved the capacitance‒voltage characteristics, and its effect was more pronounced on the p-type In 0.53 Ga 0.47 As substrate. However, the H 2 -HPA induced an increase in the leakage current, probably because of the out-diffusion and incorporation of In/Ga atoms within the high-k stack.

Highly sensitive graphene biosensor by monomolecular self-assembly of receptors on graphene surface

NASA Astrophysics Data System (ADS)

Kim, Ji Eun; No, Young Hyun; Kim, Joo Nam; Shin, Yong Seon; Kang, Won Tae; Kim, Young Rae; Kim, Kun Nyun; Kim, Yong Ho; Yu, Woo Jong

2017-05-01

Graphene has attracted a great deal of interest for applications in bio-sensing devices because of its ultra-thin structure, which enables strong electrostatic coupling with target molecules, and its excellent electrical mobility promising for ultra-fast sensing speeds. However, thickly stacked receptors on the graphene's surface interrupts electrostatic coupling between graphene and charged biomolecules, which can reduce the sensitivity of graphene biosensors. Here, we report a highly sensitive graphene biosensor by the monomolecular self-assembly of designed peptide protein receptors. The graphene channel was non-covalently functionalized using peptide protein receptors via the π-π interaction along the graphene's Bravais lattice, allowing ultra-thin monomolecular self-assembly through the graphene lattice. In thickness dependent characterization, a graphene sensor with a monomolecular receptor (thickness less than 3 nm) showed five times higher sensitivity and three times higher voltage shifts than graphene sensors with thick receptor stacks (thicknesses greater than 20 nm), which is attributed to excellent gate coupling between graphene and streptavidin via an ultrathin receptor insulator. In addition to having a fast-inherent response time (less than 0.6 s) based on fast binding speed between biotin and streptavidin, our graphene biosensor is a promising platform for highly sensitive real-time monitoring of biomolecules with high spatiotemporal resolution.

Structural Effects of Gating Poly(3-hexylthiophene) through an Ionic Liquid

DOE PAGES

Guardado, Jesus O.; Salleo, Alberto

2017-07-17

Ionic liquids are increasingly employed as dielectrics to generate high charge densities and enable low-voltage operation with organic semiconductors. But, effects on structure and morphology of the active material are not fully known, particularly for permeable semiconductors such as conjugated polymers, in which ions from the ionic liquid can enter and electrochemically dope the semicrystalline film. In order to understand when ions enter, where they go, and how they affect the film, thin films of the archetypal semiconducting polymer, poly(3-hexylthiophene), are electrochemically doped with 1-ethyl-3-methylimidazolium bis(trifluoromethylsulfonyl)imide, the archetypal ionic liquid. High-resolution, ex situ X-ray diffraction measurements and complete pole figuresmore » reveal changes with applied voltage, cycling, and frequency in lattice spacing, crystallite orientation, and crystallinity in the bulk and at the buried interface. Dopant ions penetrate the film and enter the crystallites at sufficiently high voltages and low frequencies. Upon infiltrating crystallites, ions permanently expand lamellar stacking and contract pi-stacking. Cycling amplifies these effects, but higher frequencies mitigate the expansion of bulk crystallites as ions are hindered from entering crystallites. Furthermore, this mechanistic understanding of the structural effects of ion penetration will help develop models of the frequency and voltage impedance response of electrochemically doped conjugated polymers and advance electronic applications.« less

Structural Effects of Gating Poly(3-hexylthiophene) through an Ionic Liquid

DOE Office of Scientific and Technical Information (OSTI.GOV)

Guardado, Jesus O.; Salleo, Alberto

Ionic liquids are increasingly employed as dielectrics to generate high charge densities and enable low-voltage operation with organic semiconductors. But, effects on structure and morphology of the active material are not fully known, particularly for permeable semiconductors such as conjugated polymers, in which ions from the ionic liquid can enter and electrochemically dope the semicrystalline film. In order to understand when ions enter, where they go, and how they affect the film, thin films of the archetypal semiconducting polymer, poly(3-hexylthiophene), are electrochemically doped with 1-ethyl-3-methylimidazolium bis(trifluoromethylsulfonyl)imide, the archetypal ionic liquid. High-resolution, ex situ X-ray diffraction measurements and complete pole figuresmore » reveal changes with applied voltage, cycling, and frequency in lattice spacing, crystallite orientation, and crystallinity in the bulk and at the buried interface. Dopant ions penetrate the film and enter the crystallites at sufficiently high voltages and low frequencies. Upon infiltrating crystallites, ions permanently expand lamellar stacking and contract pi-stacking. Cycling amplifies these effects, but higher frequencies mitigate the expansion of bulk crystallites as ions are hindered from entering crystallites. Furthermore, this mechanistic understanding of the structural effects of ion penetration will help develop models of the frequency and voltage impedance response of electrochemically doped conjugated polymers and advance electronic applications.« less

Three-Dimensional Flexible Complementary Metal-Oxide-Semiconductor Logic Circuits Based On Two-Layer Stacks of Single-Walled Carbon Nanotube Networks.

PubMed

Zhao, Yudan; Li, Qunqing; Xiao, Xiaoyang; Li, Guanhong; Jin, Yuanhao; Jiang, Kaili; Wang, Jiaping; Fan, Shoushan

2016-02-23

We have proposed and fabricated stable and repeatable, flexible, single-walled carbon nanotube (SWCNT) thin film transistor (TFT) complementary metal-oxide-semiconductor (CMOS) integrated circuits based on a three-dimensional (3D) structure. Two layers of SWCNT-TFT devices were stacked, where one layer served as n-type devices and the other one served as p-type devices. On the basis of this method, it is able to save at least half of the area required to construct an inverter and make large-scale and high-density integrated CMOS circuits easier to design and manufacture. The 3D flexible CMOS inverter gain can be as high as 40, and the total noise margin is more than 95%. Moreover, the input and output voltage of the inverter are exactly matched for cascading. 3D flexible CMOS NOR, NAND logic gates, and 15-stage ring oscillators were fabricated on PI substrates with high performance as well. Stable electrical properties of these circuits can be obtained with bending radii as small as 3.16 mm, which shows that such a 3D structure is a reliable architecture and suitable for carbon nanotube electrical applications in complex flexible and wearable electronic devices.

Electronic Properties of Suspended Few-Layer Graphene Membranes

NASA Astrophysics Data System (ADS)

Myhro, Kevin Scott

Graphene, the two-dimensional (2D) honeycomb lattice of sp2-hybrized carbon atoms, has emerged as a "wonder" material with unique properties, such as its linear energy dispersion with massless Dirac fermions, so-called half-integer quantum Hall (QH) effect, unparalleled tensile strength, and high optical transparency and thermal conductivity. Its few-layer counterparts have similar mechanical but remarkably different electrical properties, including layer- and stacking-dependent band structures, massive charge carriers, and energy gaps that may arise from single particle effect as well as electronic interactions. This dissertation reports my six year study of dual-gated suspended few-layer graphene (FLG) field effect transistor (FET) devices. In particular, we focus on their electronic transport properties at low temperature as a function of out-of-plane electric field E⊥ and interlayer potential U⊥, charge carrier density n, temperature T, and out-of-plane (B ⊥) and parallel (B∥) magnetic fields. A number of broken symmetry states in the absence and presence of external fields are observed in rhombohedral-stacked bilayer- (BLG), trilayer- (r-TLG), and tetralayer graphene (r-4LG). We also study the morphological deformation of suspended graphene membranes under electrostatic and thermal manipulation, which is relevant for analyzing low temperature transport data. In particular, in BLG, r-TLG and r-4LG, we observe intrinsic insulating states in the absence of external fields, with energy gaps of 2, 40, and 80 meV, respectively. We attribute this increasing gap size with number of layers N to enhanced electronic-interactions near the charge neutrality point, due to the layer-dependent energy dispersions kN in r-FLG, which give rise to increasingly diverging density of states and interaction strength with increasing N, at least up to four layers. Our observations of the spontaneous insulating state in r-FLG are consistent with a layer antiferromagnetic state with broken time reversal symmetry, where the top and bottom layers are oppositely spin polarized.

Universal core model for multiple-gate field-effect transistors with short channel and quantum mechanical effects

NASA Astrophysics Data System (ADS)

Shin, Yong Hyeon; Bae, Min Soo; Park, Chuntaek; Park, Joung Won; Park, Hyunwoo; Lee, Yong Ju; Yun, Ilgu

2018-06-01

A universal core model for multiple-gate (MG) field-effect transistors (FETs) with short channel effects (SCEs) and quantum mechanical effects (QMEs) is proposed. By using a Young’s approximation based solution for one-dimensional Poisson’s equations the total inversion charge density (Q inv ) in the channel is modeled for double-gate (DG) and surrounding-gate SG (SG) FETs, following which a universal charge model is derived based on the similarity of the solutions, including for quadruple-gate (QG) FETs. For triple-gate (TG) FETs, the average of DG and QG FETs are used. A SCEs model is also proposed considering the potential difference between the channel’s surface and center. Finally, a QMEs model for MG FETs is developed using the quantum correction compact model. The proposed universal core model is validated on commercially available three-dimensional ATLAS numerical simulations.

Activity of Palythoa caribaeorum Venom on Voltage-Gated Ion Channels in Mammalian Superior Cervical Ganglion Neurons.

PubMed

Lazcano-Pérez, Fernando; Castro, Héctor; Arenas, Isabel; García, David E; González-Muñoz, Ricardo; Arreguín-Espinosa, Roberto

2016-05-05

The Zoanthids are an order of cnidarians whose venoms and toxins have been poorly studied. Palythoa caribaeorum is a zoanthid commonly found around the Mexican coastline. In this study, we tested the activity of P. caribaeorum venom on voltage-gated sodium channel (NaV1.7), voltage-gated calcium channel (CaV2.2), the A-type transient outward (IA) and delayed rectifier (IDR) currents of KV channels of the superior cervical ganglion (SCG) neurons of the rat. These results showed that the venom reversibly delays the inactivation process of voltage-gated sodium channels and inhibits voltage-gated calcium and potassium channels in this mammalian model. The compounds responsible for these effects seem to be low molecular weight peptides. Together, these results provide evidence for the potential use of zoanthids as a novel source of cnidarian toxins active on voltage-gated ion channels.

Activity of Palythoa caribaeorum Venom on Voltage-Gated Ion Channels in Mammalian Superior Cervical Ganglion Neurons

PubMed Central

Lazcano-Pérez, Fernando; Castro, Héctor; Arenas, Isabel; García, David E.; González-Muñoz, Ricardo; Arreguín-Espinosa, Roberto

2016-01-01

The Zoanthids are an order of cnidarians whose venoms and toxins have been poorly studied. Palythoa caribaeorum is a zoanthid commonly found around the Mexican coastline. In this study, we tested the activity of P. caribaeorum venom on voltage-gated sodium channel (NaV1.7), voltage-gated calcium channel (CaV2.2), the A-type transient outward (IA) and delayed rectifier (IDR) currents of KV channels of the superior cervical ganglion (SCG) neurons of the rat. These results showed that the venom reversibly delays the inactivation process of voltage-gated sodium channels and inhibits voltage-gated calcium and potassium channels in this mammalian model. The compounds responsible for these effects seem to be low molecular weight peptides. Together, these results provide evidence for the potential use of zoanthids as a novel source of cnidarian toxins active on voltage-gated ion channels. PMID:27164140

A study of nitrogen behavior in the formation of Ta/TaN and Ti/TaN alloyed metal electrodes on SiO2 and HfO2 dielectrics

NASA Astrophysics Data System (ADS)

Gassilloud, R.; Maunoury, C.; Leroux, C.; Piallat, F.; Saidi, B.; Martin, F.; Maitrejean, S.

2014-04-01

We studied Ta, TaN, and sub-stoichiometric TaNx electrodes (obtained by nitrogen redistribution in Ta/TaN or Ti/TaN bilayers) deposited on thermal SiO2 and HfO2/IL (0.8 nm SiO2 IL, i.e., interlayer) stacks. Effective work-functions (WF) were extracted on MOS capacitor structures on SiO2 bevelled insulator of 4.2 eV for pure Ta, 4.6 eV for TaN, and 4.3 eV for sub-stoichiometric TaNx. This intermediate WF value is explained by TaN nitrogen redistribution with reactive Ta or Ti elements shifting the gate work-function toward the Si conduction band. The same electrodes deposited on an HfO2/IL dielectric showed different behavior: First, the Ta/HfO2/IL stack shows a +200 meV WF increase (towards the Si valence band) compared to the SiO2 dielectric stack. This increase is explained by the well-known HfO2/IL dipole formation. Second, in contrast to electrodes deposited on SiO2, sub-stoichiometric TaNx/HfO2 is found to have a lower WF (4.3 eV), than pure Ta on HfO2 (4.4 eV). This inversion in work-function behavior measured on SiO2 vs. HfO2 is explained by the nitrogen redistribution in Ta/TaN bilayer together with diffusion of nitrogen through the HfO2 layer, leading to Si-N formation which prevents dipole formation at the HfO2/IL interface.

Air-Cooled Stack Freeze Tolerance Freeze Failure Modes and Freeze Tolerance Strategies for GenDriveTM Material Handling Application Systems and Stacks Final Scientific Report

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hancock, David, W.

2012-02-14

Air-cooled stack technology offers the potential for a simpler system architecture (versus liquid-cooled) for applications below 4 kilowatts. The combined cooling and cathode air allows for a reduction in part count and hence a lower cost solution. However, efficient heat rejection challenges escalate as power and ambient temperature increase. For applications in ambient temperatures below freezing, the air-cooled approach has additional challenges associated with not overcooling the fuel cell stack. The focus of this project was freeze tolerance while maintaining all other stack and system requirements. Through this project, Plug Power advanced the state of the art in technology formore » air-cooled PEM fuel cell stacks and related GenDrive material handling application fuel cell systems. This was accomplished through a collaborative work plan to improve freeze tolerance and mitigate freeze-thaw effect failure modes within innovative material handling equipment fuel cell systems designed for use in freezer forklift applications. Freeze tolerance remains an area where additional research and understanding can help fuel cells to become commercially viable. This project evaluated both stack level and system level solutions to improve fuel cell stack freeze tolerance. At this time, the most cost effective solutions are at the system level. The freeze mitigation strategies developed over the course of this project could be used to drive fuel cell commercialization. The fuel cell system studied in this project was Plug Power's commercially available GenDrive platform providing battery replacement for equipment in the material handling industry. The fuel cell stacks were Ballard's commercially available FCvelocity 9SSL (9SSL) liquid-cooled PEM fuel cell stack and FCvelocity 1020ACS (Mk1020) air-cooled PEM fuel cell stack.« less

Synergistic Anion-(π) n-π Catalysis on π-Stacked Foldamers.

PubMed

Bornhof, Anna-Bea; Bauzá, Antonio; Aster, Alexander; Pupier, Marion; Frontera, Antonio; Vauthey, Eric; Sakai, Naomi; Matile, Stefan

2018-04-11

In this report, we demonstrate that synergistic effects between π-π stacking and anion-π interactions in π-stacked foldamers provide access to unprecedented catalytic activity. To elaborate on anion-(π) n -π catalysis, we have designed, synthesized and evaluated a series of novel covalent oligomers with up to four face-to-face stacked naphthalenediimides (NDIs). NMR analysis including DOSY confirms folding into π stacks, cyclic voltammetry, steady-state and transient absorption spectroscopy the electronic communication within the π stacks. Catalytic activity, assessed by chemoselective catalysis of the intrinsically disfavored but biologically relevant addition reaction of malonate half thioesters to enolate acceptors, increases linearly with the length of the stacks to reach values that are otherwise beyond reach. This linear increase violates the sublinear power laws of oligomer chemistry. The comparison of catalytic activity with ratiometric changes in absorption and decreasing energy of the LUMO thus results in superlinearity, that is synergistic amplification of anion-π catalysis by remote control over the entire stack. In computational models, increasing length of the π-stacked foldamers correlates sublinearly with changes in surface potentials, chloride binding energies, and the distances between chloride and π surface and within the π stack. Computational evidence is presented that the selective acceleration of disfavored but relevant enolate chemistry by anion-π catalysis indeed originates from the discrimination of planar and bent tautomers with delocalized and localized charges, respectively, on π-acidic surfaces. Computed binding energies of keto and enol intermediates of the addition reaction as well as their difference increase with increasing length of the π stack and thus reflect experimental trends correctly. These results demonstrate that anion-(π) n -π interactions exist and matter, ready for use as a unique new tool in catalysis and beyond.

The Importance of Electron Correlation on Stacking Interaction of Adenine-Thymine Base-Pair Step in B-DNA: A Quantum Monte Carlo Study.

PubMed

Hongo, Kenta; Cuong, Nguyen Thanh; Maezono, Ryo

2013-02-12

We report fixed-node diffusion Monte Carlo (DMC) calculations of stacking interaction energy between two adenine(A)-thymine(T) base pairs in B-DNA (AA:TT), for which reference data are available, obtained from a complete basis set estimate of CCSD(T) (coupled-cluster with singles, doubles, and perturbative triples). We consider four sets of nodal surfaces obtained from self-consistent field calculations and examine how the different nodal surfaces affect the DMC potential energy curves of the AA:TT molecule and the resulting stacking energies. We find that the DMC potential energy curves using the different nodes look similar to each other as a whole. We also benchmark the performance of various quantum chemistry methods, including Hartree-Fock (HF) theory, second-order Møller-Plesset perturbation theory (MP2), and density functional theory (DFT). The DMC and recently developed DFT results of the stacking energy reasonably agree with the reference, while the HF, MP2, and conventional DFT methods give unsatisfactory results.

Fuel Cell Thermal Management Through Conductive Cooling Plates

NASA Technical Reports Server (NTRS)

Colozza, Anthony J.; Burke, Kenneth A.

2008-01-01

An analysis was performed to evaluate the concept of utilizing conductive cooling plates to remove heat from a fuel cell stack, as opposed to a conventional internal cooling loop. The potential advantages of this type of cooling system are reduced stack complexity and weight and increased reliability through the reduction of the number of internal fluid seals. The conductive cooling plates would extract heat from the stack transferring it to an external coolant loop. The analysis was performed to determine the required thickness of these plates. The analysis was based on an energy balance between the thermal energy produced within the stack and the heat removal from the cooling plates. To accomplish the energy balance, the heat flow into and along the plates to the cooling fluid was modeled. Results were generated for various numbers of cells being cooled by a single cooling plate. The results provided cooling plate thickness, mass, and operating temperature of the plates. It was determined that utilizing high-conductivity pyrolitic graphite cooling plates can provide a specific cooling capacity (W/kg) equivalent to or potentially greater than a conventional internal cooling loop system.

Lanthanide-based oxides and silicates for high-kappa gate dielectric applications

NASA Astrophysics Data System (ADS)

Jur, Jesse Stephen

The ability to improve performance of the high-end metal oxide semiconductor field effect transistor (MOSFET) is highly reliant on the dimensional scaling of such a device. In scaling, a decrease in dielectric thickness results in high current leakage between the electrode and the substrate by way of direct tunneling through the gate dielectric. Observation of a high leakage current when the standard gate dielectric, SiO2, is decreased below a thickness of 1.5 nm requires engineering of a replacement dielectric that is much more scalable. This high-kappa dielectric allows for a physically thicker oxide, reducing leakage current. Integration of select lanthanide-based oxides and silicates, in particular lanthanum oxide and silicate, into MOS gate stack devices is examined. The quality of the high-kappa dielectrics is monitored electrically to determine properties such as equivalent oxide thickness, leakage current density and defect densities. In addition, analytical characterization of the dielectric and the gate stack is provided to examine the materialistic significance to the change of the electrical properties of the devices. In this work, lanthanum oxide films have been deposited by thermal evaporation on to a pre-grown chemical oxide layer on silicon. It is observed that the SiO2 interfacial layer can be consumed by a low-temperature reaction with lanthanum oxide to produce a high-quality silicate. This is opposed to depositing lanthanum oxide directly on silicon, which can possibly favor silicide formation. The importance of oxygen regulation in the surrounding environment of the La2O3-SiO2 reaction-anneal is observed. By controlling the oxygen available during the reaction, SiO2 growth can be limited to achieve high stoichiometric ratios of La2O 3 to SiO2. As a result, MOS devices with an equivalent oxide thickness (EOT) of 5 A and a leakage current density of 5.0 A/cm 2 are attained. This data equals the best value achieved in this field and is a substantial improvement over SiO(N) dielectrics, allowing for increased device scaling. High-temperature processing, consistent with the source/drain activation anneal in MOSFET processing, is performed on lanthanum-silicate based MOS devices with Ta or TaN gate electrodes and a W metal capping layer. The thermal limit of Ta is observed to be less than 800°C, resulting in a phase transformation that can result in uncontrolled shifting of the MOS device flat-band voltage. TaN is observed to be more thermally stable (up to 1000°C) and results in an increase in the capacitance density suggesting that it impedes oxygen reaction with silicon to produce SiO2. It is later observed that a W metal capping layer can serve as a high-oxygen source, which results in an increased interfacial SiO2 formation. By limiting the oxygen content in the W capping layer and by utilizing a thermally stable TaN gate electrode, control over the electrical properties of the MOS device is acquired. To determine the stability of amorphous lanthanum-silicate in contact with investigated by means of back-side secondary ion mass spectroscopy profiling. The results are the first reported data showing that the lanthanum incorporated in the silica matrix doe not diffuse into the silicon substrate after high temperature processing. The decrease in the device effective work function (φM,eff ) observed in these samples is examined in detail. First, as a La 2O3 capping layer on HfSiO(N), the shift yields ideal-φ M,eff values for nMOSFET deices (4.0 eV) that were previously inaccessible. Other lanthanide oxides (Dy, Ho and Yb) used as capping layers show similar effects. It is also shown that tuning of φM,eff can be realized by controlling the extent of lanthanide-silicate formation. This research, conducted in conjunction with SEMATECH and the SRC, represents a significant technological advancement in realizing 45 and sub-45 nm MOSFET device nodes.

Electrical Generation for More-Electric Aircraft Using Solid Oxide Fuel Cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Whyatt, Greg A.; Chick, Lawrence A.

This report examines the potential for Solid-Oxide Fuel Cells (SOFC) to provide electrical generation on-board commercial aircraft. Unlike a turbine-based auxiliary power unit (APU) a solid oxide fuel cell power unit (SOFCPU) would be more efficient than using the main engine generators to generate electricity and would operate continuously during flight. The focus of this study is on more-electric aircraft which minimize bleed air extraction from the engines and instead use electrical power obtained from generators driven by the main engines to satisfy all major loads. The increased electrical generation increases the potential fuel savings obtainable through more efficient electricalmore » generation using a SOFCPU. However, the weight added to the aircraft by the SOFCPU impacts the main engine fuel consumption which reduces the potential fuel savings. To investigate these relationships the Boeing 787­8 was used as a case study. The potential performance of the SOFCPU was determined by coupling flowsheet modeling using ChemCAD software with a stack performance algorithm. For a given stack operating condition (cell voltage, anode utilization, stack pressure, target cell exit temperature), ChemCAD software was used to determine the cathode air rate to provide stack thermal balance, the heat exchanger duties, the gross power output for a given fuel rate, the parasitic power for the anode recycle blower and net power obtained from (or required by) the compressor/expander. The SOFC is based on the Gen4 Delphi planar SOFC with assumed modifications to tailor it to this application. The size of the stack needed to satisfy the specified condition was assessed using an empirically-based algorithm. The algorithm predicts stack power density based on the pressure, inlet temperature, cell voltage and anode and cathode inlet flows and compositions. The algorithm was developed by enhancing a model for a well-established material set operating at atmospheric pressure to reflect the effect of elevated pressure and to represent the expected enhancement obtained using a promising cell material set which has been tested in button cells but not yet used to produce full-scale stacks. The predictions for the effect of pressure on stack performance were based on literature. As part of this study, additional data were obtained on button cells at elevated pressure to confirm the validity of the predictions. The impact of adding weight to the 787-8 fuel consumption was determined as a function of flight distance using a PianoX model. A conceptual design for a SOFC power system for the Boeing 787 is developed and the weight estimated. The results indicate that the power density of the stacks must increase by at least a factor of 2 to begin saving fuel on the 787 aircraft. However, the conceptual design of the power system may still be useful for other applications which are less weight sensitive.« less

A revised classification and terminology for stacked and amalgamated turbidites in environments dominated by (hemi)pelagic sedimentation

NASA Astrophysics Data System (ADS)

Van Daele, Maarten; Meyer, Inka; Moernaut, Jasper; De Decker, Steven; Verschuren, Dirk; De Batist, Marc

2017-07-01

Stacked or amalgamated turbidites provide an opportunity to infer the synchronous triggering of multiple slope failures, which is a criterion often used to attribute these slope failures to earthquake shaking; and such turbidites are thus a proxy for reconstructing long-term earthquake recurrence. However, other processes, such as erosion, reflecting turbidity currents and seiching, may produce similar amalgamated/stacked deposits. Here we study two turbidites from Lake Challa, a crater lake on the lower slopes of Kilimanjaro (Kenya/Tanzania). The occurrence in Lake Challa of both single slope failures and basin-wide landslide events, all accompanied by distal turbidites, provides an excellent opportunity to assess the characteristics and significance of amalgamated/stacked turbidites in an enclosed lake basin with diatomaceous sediments, reflecting hemipelagic sedimentation in offshore areas. We also compare the characteristics of amalgamated/stacked turbidites in basins other than Lake Challa to discuss potential causes of different amalgamation patterns (stacked or multi-pulsed character). The low density and elongated shape of diatom frustules increases grain-to-grain interaction and thereby damps turbulence, resulting in faster bed aggradation and a stacked character of the amalgamated turbidites. Finally, as currently both synchronously and non-synchronously triggered turbidites are in literature referred to as ;stacked turbidite;, we propose a revised terminology that differentiates an ;amalgamated turbidite; from a ;turbidite stack;. In sedimentary environments that are dominated by (hemi)pelagic sedimentation, and where turbidity currents are anomalous events, an ;amalgamated turbidite; can often be shown to be the result of synchronous triggering, while a ;turbidite stack; must always result from a succession of discrete events.

Action potentials and ion conductances in wild-type and CALHM1-knockout type II taste cells

PubMed Central

Saung, Wint Thu; Foskett, J. Kevin

2017-01-01

Taste bud type II cells fire action potentials in response to tastants, triggering nonvesicular ATP release to gustatory neurons via voltage-gated CALHM1-associated ion channels. Whereas CALHM1 regulates mouse cortical neuron excitability, its roles in regulating type II cell excitability are unknown. In this study, we compared membrane conductances and action potentials in single identified TRPM5-GFP-expressing circumvallate papillae type II cells acutely isolated from wild-type (WT) and Calhm1 knockout (KO) mice. The activation kinetics of large voltage-gated outward currents were accelerated in cells from Calhm1 KO mice, and their associated nonselective tail currents, previously shown to be highly correlated with ATP release, were completely absent in Calhm1 KO cells, suggesting that CALHM1 contributes to all of these currents. Calhm1 deletion did not significantly alter resting membrane potential or input resistance, the amplitudes and kinetics of Na+ currents either estimated from action potentials or recorded from steady-state voltage pulses, or action potential threshold, overshoot peak, afterhyperpolarization, and firing frequency. However, Calhm1 deletion reduced the half-widths of action potentials and accelerated the deactivation kinetics of transient outward currents, suggesting that the CALHM1-associated conductance becomes activated during the repolarization phase of action potentials. NEW & NOTEWORTHY CALHM1 is an essential ion channel component of the ATP neurotransmitter release mechanism in type II taste bud cells. Its contribution to type II cell resting membrane properties and excitability is unknown. Nonselective voltage-gated currents, previously associated with ATP release, were absent in cells lacking CALHM1. Calhm1 deletion was without effects on resting membrane properties or voltage-gated Na+ and K+ channels but contributed modestly to the kinetics of action potentials. PMID:28202574

Action potentials and ion conductances in wild-type and CALHM1-knockout type II taste cells.

PubMed

Ma, Zhongming; Saung, Wint Thu; Foskett, J Kevin

2017-05-01

Taste bud type II cells fire action potentials in response to tastants, triggering nonvesicular ATP release to gustatory neurons via voltage-gated CALHM1-associated ion channels. Whereas CALHM1 regulates mouse cortical neuron excitability, its roles in regulating type II cell excitability are unknown. In this study, we compared membrane conductances and action potentials in single identified TRPM5-GFP-expressing circumvallate papillae type II cells acutely isolated from wild-type (WT) and Calhm1 knockout (KO) mice. The activation kinetics of large voltage-gated outward currents were accelerated in cells from Calhm1 KO mice, and their associated nonselective tail currents, previously shown to be highly correlated with ATP release, were completely absent in Calhm1 KO cells, suggesting that CALHM1 contributes to all of these currents. Calhm1 deletion did not significantly alter resting membrane potential or input resistance, the amplitudes and kinetics of Na + currents either estimated from action potentials or recorded from steady-state voltage pulses, or action potential threshold, overshoot peak, afterhyperpolarization, and firing frequency. However, Calhm1 deletion reduced the half-widths of action potentials and accelerated the deactivation kinetics of transient outward currents, suggesting that the CALHM1-associated conductance becomes activated during the repolarization phase of action potentials. NEW & NOTEWORTHY CALHM1 is an essential ion channel component of the ATP neurotransmitter release mechanism in type II taste bud cells. Its contribution to type II cell resting membrane properties and excitability is unknown. Nonselective voltage-gated currents, previously associated with ATP release, were absent in cells lacking CALHM1. Calhm1 deletion was without effects on resting membrane properties or voltage-gated Na + and K + channels but contributed modestly to the kinetics of action potentials. Copyright © 2017 the American Physiological Society.

Voltage gating by molecular subunits of Na+ and K+ ion channels: higher-dimensional cubic kinetics, rate constants, and temperature

PubMed Central

2015-01-01

The structural similarity between the primary molecules of voltage-gated Na and K channels (alpha subunits) and activation gating in the Hodgkin-Huxley model is brought into full agreement by increasing the model's sodium kinetics to fourth order (m3 → m4). Both structures then virtually imply activation gating by four independent subprocesses acting in parallel. The kinetics coalesce in four-dimensional (4D) cubic diagrams (16 states, 32 reversible transitions) that show the structure to be highly failure resistant against significant partial loss of gating function. Rate constants, as fitted in phase plot data of retinal ganglion cell excitation, reflect the molecular nature of the gating transitions. Additional dimensions (6D cubic diagrams) accommodate kinetically coupled sodium inactivation and gating processes associated with beta subunits. The gating transitions of coupled sodium inactivation appear to be thermodynamically irreversible; response to dielectric surface charges (capacitive displacement) provides a potential energy source for those transitions and yields highly energy-efficient excitation. A comparison of temperature responses of the squid giant axon (apparently Arrhenius) and mammalian channel gating yields kinetic Q10 = 2.2 for alpha unit gating, whose transitions are rate-limiting at mammalian temperatures; beta unit kinetic Q10 = 14 reproduces the observed non-Arrhenius deviation of mammalian gating at low temperatures; the Q10 of sodium inactivation gating matches the rate-limiting component of activation gating at all temperatures. The model kinetics reproduce the physiologically large frequency range for repetitive firing in ganglion cells and the physiologically observed strong temperature dependence of recovery from inactivation. PMID:25867741

4D numerical observer for lesion detection in respiratory-gated PET

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lorsakul, Auranuch; Li, Quanzheng; Ouyang, Jinsong

2014-10-15

Purpose: Respiratory-gated positron emission tomography (PET)/computed tomography protocols reduce lesion smearing and improve lesion detection through a synchronized acquisition of emission data. However, an objective assessment of image quality of the improvement gained from respiratory-gated PET is mainly limited to a three-dimensional (3D) approach. This work proposes a 4D numerical observer that incorporates both spatial and temporal informations for detection tasks in pulmonary oncology. Methods: The authors propose a 4D numerical observer constructed with a 3D channelized Hotelling observer for the spatial domain followed by a Hotelling observer for the temporal domain. Realistic {sup 18}F-fluorodeoxyglucose activity distributions were simulated usingmore » a 4D extended cardiac torso anthropomorphic phantom including 12 spherical lesions at different anatomical locations (lower, upper, anterior, and posterior) within the lungs. Simulated data based on Monte Carlo simulation were obtained using GEANT4 application for tomographic emission (GATE). Fifty noise realizations of six respiratory-gated PET frames were simulated by GATE using a model of the Siemens Biograph mMR scanner geometry. PET sinograms of the thorax background and pulmonary lesions that were simulated separately were merged to generate different conditions of the lesions to the background (e.g., lesion contrast and motion). A conventional ordered subset expectation maximization (OSEM) reconstruction (5 iterations and 6 subsets) was used to obtain: (1) gated, (2) nongated, and (3) motion-corrected image volumes (a total of 3200 subimage volumes: 2400 gated, 400 nongated, and 400 motion-corrected). Lesion-detection signal-to-noise ratios (SNRs) were measured in different lesion-to-background contrast levels (3.5, 8.0, 9.0, and 20.0), lesion diameters (10.0, 13.0, and 16.0 mm), and respiratory motion displacements (17.6–31.3 mm). The proposed 4D numerical observer applied on multiple-gated images was compared to the conventional 3D approach applied on the nongated and motion-corrected images. Results: On average, the proposed 4D numerical observer improved the detection SNR by 48.6% (p < 0.005), whereas the 3D methods on motion-corrected images improved by 31.0% (p < 0.005) as compared to the nongated method. For all different conditions of the lesions, the relative SNR measurement (Gain = SNR{sub Observed}/SNR{sub Nongated}) of the 4D method was significantly higher than one from the motion-corrected 3D method by 13.8% (p < 0.02), where Gain{sub 4D} was 1.49 ± 0.21 and Gain{sub 3D} was 1.31 ± 0.15. For the lesion with the highest amplitude of motion, the 4D numerical observer yielded the highest observer-performance improvement (176%). For the lesion undergoing the smallest motion amplitude, the 4D method provided superior lesion detectability compared with the 3D method, which provided a detection SNR close to the nongated method. The investigation on a structure of the 4D numerical observer showed that a Laguerre–Gaussian channel matrix with a volumetric 3D function yielded higher lesion-detection performance than one with a 2D-stack-channelized function, whereas a different kind of channels that have the ability to mimic the human visual system, i.e., difference-of-Gaussian, showed similar performance in detecting uniform and spherical lesions. The investigation of the detection performance when increasing noise levels yielded decreasing detection SNR by 27.6% and 41.5% for the nongated and gated methods, respectively. The investigation of lesion contrast and diameter showed that the proposed 4D observer preserved the linearity property of an optimal-linear observer while the motion was present. Furthermore, the investigation of the iteration and subset numbers of the OSEM algorithm demonstrated that these parameters had impact on the lesion detectability and the selection of the optimal parameters could provide the maximum lesion-detection performance. The proposed 4D numerical observer outperformed the other observers for the lesion-detection task in various lesion conditions and motions. Conclusions: The 4D numerical observer shows substantial improvement in lesion detectability over the 3D observer method. The proposed 4D approach could potentially provide a more reliable objective assessment of the impact of respiratory-gated PET improvement for lesion-detection tasks. On the other hand, the 4D approach may be used as an upper bound to investigate the performance of the motion correction method. In future work, the authors will validate the proposed 4D approach on clinical data for detection tasks in pulmonary oncology.« less

ZnO-based multiple channel and multiple gate FinMOSFETs

NASA Astrophysics Data System (ADS)

Lee, Ching-Ting; Huang, Hung-Lin; Tseng, Chun-Yen; Lee, Hsin-Ying

2016-02-01

In recent years, zinc oxide (ZnO)-based metal-oxide-semiconductor field-effect transistors (MOSFETs) have attracted much attention, because ZnO-based semiconductors possess several advantages, including large exciton binding energy, nontoxicity, biocompatibility, low material cost, and wide direct bandgap. Moreover, the ZnO-based MOSFET is one of most potential devices, due to the applications in microwave power amplifiers, logic circuits, large scale integrated circuits, and logic swing. In this study, to enhance the performances of the ZnO-based MOSFETs, the ZnObased multiple channel and multiple gate structured FinMOSFETs were fabricated using the simple laser interference photolithography method and the self-aligned photolithography method. The multiple channel structure possessed the additional sidewall depletion width control ability to improve the channel controllability, because the multiple channel sidewall portions were surrounded by the gate electrode. Furthermore, the multiple gate structure had a shorter distance between source and gate and a shorter gate length between two gates to enhance the gate operating performances. Besides, the shorter distance between source and gate could enhance the electron velocity in the channel fin structure of the multiple gate structure. In this work, ninety one channels and four gates were used in the FinMOSFETs. Consequently, the drain-source saturation current (IDSS) and maximum transconductance (gm) of the ZnO-based multiple channel and multiple gate structured FinFETs operated at a drain-source voltage (VDS) of 10 V and a gate-source voltage (VGS) of 0 V were respectively improved from 11.5 mA/mm to 13.7 mA/mm and from 4.1 mS/mm to 6.9 mS/mm in comparison with that of the conventional ZnO-based single channel and single gate MOSFETs.

Extraction and Use of Noise Models from Production-Mode Transient Electromagnetic Data

NASA Astrophysics Data System (ADS)

Rasmussen, S.; Nyboe, N. S.; Larsen, J. J.

2016-12-01

In the interpretation of data acquired using the Transient Electromagnetic Method (TEM), noise in the measurements from external sources, such as the power grid, spherics and radio transmitters and from internal sources in the TEM system itself is unavoidable. This noise lowers the data quality, and it is therefore desirable to know the noise conditions.Typically, the noise spectrum is measured one or more times during a survey with the transmitter turned off, i.e. with no TEM signal present.In production-mode, when the pulses of alternating signs are continually transmitted, the TEM signal contributes powerful, narrow spikes to the spectrum at the odd harmonics of the waveform repetition rate.In between these TEM-spikes, the noise spectrum is preserved. Using a simple interpolation method and an appropriate spectral estimation method, we show how to recover an estimate of the clean noise spectrum from short intervals of production-mode data.The resulting estimate can be used for in-field tailoring the data acquisition strategy to the present conditions, specifically gating scheme, stacking scheme and repetition rate, such that less noise enters the measurements.Another application is in the interpretation phase, where the noise level for each gate can be computed and used as input to the inversion code.

Effect of atomic-arrangement matching on La{sub 2}O{sub 3}/Ge heterostructures for epitaxial high-k-gate-stacks

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kanashima, T., E-mail: kanashima@ee.es.osaka-u.ac.jp; Zenitaka, M.; Kajihara, Y.

2015-12-14

We demonstrate a high-quality La{sub 2}O{sub 3} layer on germanium (Ge) as an epitaxial high-k-gate-insulator, where there is an atomic-arrangement matching condition between La{sub 2}O{sub 3}(001) and Ge(111). Structural analyses reveal that (001)-oriented La{sub 2}O{sub 3} layers were grown epitaxially only when we used Ge(111) despite low growth temperatures less than 300 °C. The permittivity (k) of the La{sub 2}O{sub 3} layer is roughly estimated to be ∼19 from capacitance-voltage (C-V) analyses in Au/La{sub 2}O{sub 3}/Ge structures after post-metallization-annealing treatments, although the C-V curve indicates the presence of carrier traps near the interface. By using X-ray photoelectron spectroscopy analyses, we findmore » that only Ge–O–La bonds are formed at the interface, and the thickness of the equivalent interfacial Ge oxide layer is much smaller than that of GeO{sub 2} monolayer. We discuss a model of the interfacial structure between La{sub 2}O{sub 3} and Ge(111) and comment on the C-V characteristics.« less

The influence of atmosphere on the performance of pure-phase WZ and ZB InAs nanowire transistors

NASA Astrophysics Data System (ADS)

Ullah, A. R.; Joyce, H. J.; Tan, H. H.; Jagadish, C.; Micolich, A. P.

2017-11-01

We compare the characteristics of phase-pure MOCVD grown ZB and WZ InAs nanowire transistors in several atmospheres: air, dry pure N2 and O2, and N2 bubbled through liquid H2O and alcohols to identify whether phase-related structural/surface differences affect their response. Both WZ and ZB give poor gate characteristics in dry state. Adsorption of polar species reduces off-current by 2-3 orders of magnitude, increases on-off ratio and significantly reduces sub-threshold slope. The key difference is the greater sensitivity of WZ to low adsorbate level. We attribute this to facet structure and its influence on the separation between conduction electrons and surface adsorption sites. We highlight the important role adsorbed species play in nanowire device characterisation. WZ is commonly thought superior to ZB in InAs nanowire transistors. We show this is an artefact of the moderate humidity found in ambient laboratory conditions: WZ and ZB perform equally poorly in the dry gas limit yet equally well in the wet gas limit. We also highlight the vital role density-lowering disorder has in improving gate characteristics, be it stacking faults in mixed-phase WZ or surface adsorbates in pure-phase nanowires.

Time-dependent dielectric breakdown in pure and lightly Al-doped Ta2O5 stacks

NASA Astrophysics Data System (ADS)

Atanassova, E.; Stojadinović, N.; Spassov, D.; Manić, I.; Paskaleva, A.

2013-05-01

The time-dependent dielectric breakdown (TDDB) characteristics of 7 nm pure and lightly Al-doped Ta2O5 (equivalent oxide thickness of 2.2 and 1.5 nm, respectively) with W gate electrodes in MOS capacitor configuration are studied using gate injection and constant voltage stress. The effect of both the process-induced defects and the dopant on the breakdown distribution, and on the extracted Weibull slope values, are discussed. The pre-existing traps which provoke weak spots dictate early breakdowns. Their effect is compounded of both the stress-induced new traps generation (percolation model is valid) and the inevitable lower-k interface layer in the region with long time-to-breakdown. The domination of one of these competitive effects defines the mechanism of degradation: the trapping at pre-existing traps appears to dominate in Ta2O5; Al doping reduces defects in Ta2O5, the generation of new traps prevails over the charge trapping in the doped samples, and the mechanism of breakdown is more adequate to the percolation concept. The doping of high-k Ta2O5 even with small amount (5 at.%) may serve as an engineering solution for improving its TDDB characteristics and reliability.

Scaling and application of commercial, feature-rich, modular mixed-signal technology platforms for large format ROICs

NASA Astrophysics Data System (ADS)

Kar-Roy, Arjun; Racanelli, Marco; Howard, David; Miyagi, Glenn; Bowler, Mark; Jordan, Scott; Zhang, Tao; Krieger, William

2010-04-01

Today's modular, mixed-signal CMOS process platforms are excellent choices for manufacturing of highly integrated, large-format read out integrated circuits (ROICs). Platform features, that can be used for both cooled and un-cooled ROIC applications, can include (1) quality passives such as 4fFμm2 stacked MIM capacitors for linearity and higher density capacitance per pixel, 1kOhm high-value poly-silicon resistors, 2.8μm thick metals for efficient power distribution and reduced I-R drop; (2) analog active devices such as low noise single gate 3.3V, and 1.8V/3.3V or 1.8V/5V dual gate configurations, 40V LDMOS FETs, and NPN and PNP devices, deep n-well for substrate isolation for analog blocks and digital logic; (3) tools to assist the circuit designer such as models for cryogenic temperatures, CAD assistance for metal density uniformity determination, statistical, X-sigma and PCM-based models for corner validation and to simulate design sensitivity, and (4) sub-field stitching for large die. The TowerJazz platform of technology for 0.50μm, 0.25μm and 0.18μm CMOS nodes, with features as described above, is described in detail in this paper.

Growth and Implementation of Carbon-Doped AlGaN Layers for Enhancement-Mode HEMTs on 200 mm Si Substrates

NASA Astrophysics Data System (ADS)

Su, Jie; Posthuma, Niels; Wellekens, Dirk; Saripalli, Yoga N.; Decoutere, Stefaan; Arif, Ronald; Papasouliotis, George D.

2016-12-01

We are reporting the growth of AlGaN based enhancement-mode high electron mobility transistors (HEMTs) on 200 mm silicon (111) substrates using a single wafer metalorganic chemical vapor deposition reactor. It is found that TMAl pre-dosing conditions are critical in controlling the structural quality, surface morphology, and wafer bow of the HEMT stack. Optimal structural quality and pit-free surface are demonstrated for AlGaN HEMTs with pre-dosing temperature at 750°C. Intrinsically, carbon-doped AlGaN, is used as the current blocking layer in the HEMT structures. The lateral buffer breakdown and device breakdown characteristics, reach 400 V at a leakage current of 1 μA/mm measured at 150°C. The fabricated HEMT devices, with a Mg doped p-GaN gate layer, are operating in enhancement mode reaching a positive threshold voltage of 2-2.5 V, a low on-resistance of 10.5 Ω mm with a high drain saturation current of 0.35 A/mm, and a low forward bias gate leakage current of 0.5 × 10-6 A/mm ( V gs = 7 V). Tight distribution of device parameters across the 200 mm wafers and over repeat process runs is observed.

All-optical universal logic gates on nonlinear multimode interference coupler using tunable input intensity

NASA Astrophysics Data System (ADS)

Tajaldini, Mehdi; Jafri, Mohd Zubir Mat

2015-04-01

The theory of Nonlinear Modal Propagation Analysis Method (NMPA) have shown significant features of nonlinear multimode interference (MMI) coupler with compact dimension and when launched near the threshold of nonlinearity. Moreover, NMPA have the potential to allow studying the nonlinear MMI based the modal interference to explorer the phenomenon that what happen due to the natural of multimode region. Proposal of all-optical switch based NMPA has approved its capability to achieving the all-optical gates. All-optical gates have attracted increasing attention due to their practical utility in all-optical signal processing networks and systems. Nonlinear multimode interference devices could apply as universal all-optical gates due to significant features that NMPA introduce them. In this Paper, we present a novel Ultra-compact MMI coupler based on NMPA method in low intensity compared to last reports either as a novel design method and potential application for optical NAND, NOR as universal gates on single structure for Boolean logic signal processing devices and optimize their application via studding the contrast ratio between ON and OFF as a function of output width. We have applied NMPA for several applications so that the miniaturization in low nonlinear intensities is their main purpose.

Structural basis for potentiation by alcohols and anaesthetics in a ligand-gated ion channel

PubMed Central

Sauguet, Ludovic; Howard, Rebecca J.; Malherbe, Laurie; Lee, Ui S.; Corringer, Pierre-Jean; Harris, R. Adron; Delarue, Marc

2014-01-01

Ethanol alters nerve signalling by interacting with proteins in the central nervous system, particularly pentameric ligand-gated ion channels. A recent series of mutagenesis experiments on Gloeobacter violaceus ligand-gated ion channel, a prokaryotic member of this family, identified a single-site variant that is potentiated by pharmacologically relevant concentrations of ethanol. Here we determine crystal structures of the ethanol-sensitized variant in the absence and presence of ethanol and related modulators, which bind in a transmembrane cavity between channel subunits and may stabilize the open form of the channel. Structural and mutagenesis studies defined overlapping mechanisms of potentiation by alcohols and anaesthetics via the inter-subunit cavity. Furthermore, homology modelling show this cavity to be conserved in human ethanol-sensitive glycine and GABA(A) receptors, and to involve residues previously shown to influence alcohol and anaesthetic action on these proteins. These results suggest a common structural basis for ethanol potentiation of an important class of targets for neurological actions of ethanol. PMID:23591864

Two-dimensional analytical model for dual-material control-gate tunnel FETs

NASA Astrophysics Data System (ADS)

Xu, Hui Fang; Dai, Yue Hua; Gui Guan, Bang; Zhang, Yong Feng

2016-09-01

An analytical model for a dual-material control-gate (DMCG) tunnel field effect transistor (TFET) is presented for the first time in this paper, and the influence of the mobile charges on the potential profile is taken into account. On the basis of the potential profile, the lateral electric field is derived and the expression for the drain current is obtained by integrating the band-to-band tunneling (BTBT) generation rate applicable to low-bandgap and high-bandgap materials over the tunneling region. The model also predicts the impacts of the control-gate work function on the potential and drain current. The advantage of this work is that it not only offers physical insight into device physics but also provides the basic designing guideline for DMCG TFETs, enabling the designer to optimize the device in terms of the on-state current, the on-off current ratio, and suppressed ambipolar behavior. Very good agreements for both the potential and drain current are observed between the model calculations and the simulated results.

Dynamic Observation of Brain-Like Learning in a Ferroelectric Synapse Device

NASA Astrophysics Data System (ADS)

Nishitani, Yu; Kaneko, Yukihiro; Ueda, Michihito; Fujii, Eiji; Tsujimura, Ayumu

2013-04-01

A brain-like learning function was implemented in an electronic synapse device using a ferroelectric-gate field effect transistor (FeFET). The FeFET was a bottom-gate type FET with a ZnO channel and a ferroelectric Pb(Zr,Ti)O3 (PZT) gate insulator. The synaptic weight, which is represented by the channel conductance of the FeFET, is updated by applying a gate voltage through a change in the ferroelectric polarization in the PZT. A learning function based on the symmetric spike-timing dependent synaptic plasticity was implemented in the synapse device using the multilevel weight update by applying a pulse gate voltage. The dynamic weighting and learning behavior in the synapse device was observed as a change in the membrane potential in a spiking neuron circuit.

A DNA logic gate based on strand displacement reaction and rolling circle amplification, responding to multiple low-abundance DNA fragment input signals, and its application in detecting miRNAs.

PubMed

Chen, Yuqi; Song, Yanyan; Wu, Fan; Liu, Wenting; Fu, Boshi; Feng, Bingkun; Zhou, Xiang

2015-04-25

A conveniently amplified DNA AND logic gate platform was designed for the highly sensitive detection of low-abundance DNA fragment inputs based on strand displacement reaction and rolling circle amplification strategy. Compared with others, this system can detect miRNAs in biological samples. The success of this strategy demonstrates the potential of DNA logic gates in disease diagnosis.

Computational Model of the Insect Pheromone Transduction Cascade

PubMed Central

Gu, Yuqiao; Lucas, Philippe; Rospars, Jean-Pierre

2009-01-01

A biophysical model of receptor potential generation in the male moth olfactory receptor neuron is presented. It takes into account all pre-effector processes—the translocation of pheromone molecules from air to sensillum lymph, their deactivation and interaction with the receptors, and the G-protein and effector enzyme activation—and focuses on the main post-effector processes. These processes involve the production and degradation of second messengers (IP3 and DAG), the opening and closing of a series of ionic channels (IP3-gated Ca2+ channel, DAG-gated cationic channel, Ca2+-gated Cl− channel, and Ca2+- and voltage-gated K+ channel), and Ca2+ extrusion mechanisms. The whole network is regulated by modulators (protein kinase C and Ca2+-calmodulin) that exert feedback inhibition on the effector and channels. The evolution in time of these linked chemical species and currents and the resulting membrane potentials in response to single pulse stimulation of various intensities were simulated. The unknown parameter values were fitted by comparison to the amplitude and temporal characteristics (rising and falling times) of the experimentally measured receptor potential at various pheromone doses. The model obtained captures the main features of the dose–response curves: the wide dynamic range of six decades with the same amplitudes as the experimental data, the short rising time, and the long falling time. It also reproduces the second messenger kinetics. It suggests that the two main types of depolarizing ionic channels play different roles at low and high pheromone concentrations; the DAG-gated cationic channel plays the major role for depolarization at low concentrations, and the Ca2+-gated Cl− channel plays the major role for depolarization at middle and high concentrations. Several testable predictions are proposed, and future developments are discussed. PMID:19300479

Graphene field effect transistor without an energy gap.

PubMed

Jang, Min Seok; Kim, Hyungjun; Son, Young-Woo; Atwater, Harry A; Goddard, William A

2013-05-28

Graphene is a room temperature ballistic electron conductor and also a very good thermal conductor. Thus, it has been regarded as an ideal material for postsilicon electronic applications. A major complication is that the relativistic massless electrons in pristine graphene exhibit unimpeded Klein tunneling penetration through gate potential barriers. Thus, previous efforts to realize a field effect transistor for logic applications have assumed that introduction of a band gap in graphene is a prerequisite. Unfortunately, extrinsic treatments designed to open a band gap seriously degrade device quality, yielding very low mobility and uncontrolled on/off current ratios. To solve this dilemma, we propose a gating mechanism that leads to a hundredfold enhancement in on/off transmittance ratio for normally incident electrons without any band gap engineering. Thus, our saw-shaped geometry gate potential (in place of the conventional bar-shaped geometry) leads to switching to an off state while retaining the ultrahigh electron mobility in the on state. In particular, we report that an on/off transmittance ratio of 130 is achievable for a sawtooth gate with a gate length of 80 nm. Our switching mechanism demonstrates that intrinsic graphene can be used in designing logic devices without serious alteration of the conventional field effect transistor architecture. This suggests a new variable for the optimization of the graphene-based device--geometry of the gate electrode.

Photo-electronic current transport in back-gated graphene transistor

NASA Astrophysics Data System (ADS)

Srivastava, Ashok; Chen, Xinlu; Pradhan, Aswini K.

2017-04-01

In this work, we have studied photo-electronic current transport in a back-gated graphene field-effect transistor. Under the light illumination, band bending at the metal/graphene interface develops a built-in potential which generates photonic current at varying back-gate biases. A typical MOSFET type back-gated transistor structure uses a monolayer graphene as the channel layer formed over the silicon dioxide/silicon substrate. It is shown that the photo-electronic current consists of current contributions from photovoltaic, photo-thermoelectric and photo-bolometric effects. A maximum external responsivity close to 0.0009A/W is achieved at 30μW laser power source and 633nm wavelength.

Reprogrammable Logic Gate and Logic Circuit Based on Multistimuli-Responsive Raspberry-like Micromotors.

PubMed

Zhang, Lina; Zhang, Hui; Liu, Mei; Dong, Bin

2016-06-22

In this paper, we report a polymer-based raspberry-like micromotor. Interestingly, the resulting micromotor exhibits multistimuli-responsive motion behavior. Its on-off-on motion can be regulated by the application of stimuli such as H2O2, near-infrared light, NH3, or their combinations. Because of the versatility in motion control, the current micromotor has great potential in the application field of logic gate and logic circuit. With use of different stimuli as the inputs and the micromotor motion as the output, reprogrammable OR and INHIBIT logic gates or logic circuit consisting of OR, NOT, and AND logic gates can be achieved.

A type of all-optical logic gate based on graphene surface plasmon polaritons

NASA Astrophysics Data System (ADS)

Wu, Xiaoting; Tian, Jinping; Yang, Rongcao

2017-11-01

In this paper, a novel type of all-optical logic device based on graphene surface plasmon polaritons (GSP) is proposed. By utilizing linear interference between the GSP waves propagating in the different channels, this new structure can realize six different basic logic gates including OR, XOR, NOT, AND, NOR, and NAND. The state of ;ON/OFF; of each input channel can be well controlled by tuning the optical conductivity of graphene sheets, which can be further controlled by changing the external gate voltage. This type of logic gate is compact in geometrical sizes and is a potential block in the integration of nanophotonic devices.

Using KrF ELA to Improve Gate-Stacked LaAlO₃/ZrO₂ Indium Gallium Zinc Oxide Thin-Film Transistors with Novel Atmospheric Pressure Plasma-Enhanced Chemical Vapor Deposition Technique.

PubMed

Wu, Chien-Hung; Chang, Kow-Ming; Chen, Yi-Ming; Huang, Bo-Wen; Zhang, Yu-Xin; Wang, Shui-Jinn

2018-03-01

Atmospheric pressure plasma-enhanced chemical vapor deposition (AP-PECVD) technique and KrF excimer laser annealing (ELA) were employed for the fabrication of indium gallium zinc oxide thin-film transistors (IGZO-TFTs). Device with a 150 mJ/cm2 laser annealing densities demonstrated excellent electrical characteristics with improved on/off current ratio of 4.7×107, high channel mobility of 10 cm2/V-s, and low subthreshold swing of 0.15 V/dec. The improvements are attributed to the adjustment of oxygen vacancies in the IGZO channel to an appropriate range of around 28.3% and the reduction of traps at the high-k/IGZO interface.

Vertically integrated logic circuits constructed using ZnO-nanowire-based field-effect transistors on plastic substrates.

PubMed

Kang, Jeongmin; Moon, Taeho; Jeon, Youngin; Kim, Hoyoung; Kim, Sangsig

2013-05-01

ZnO-nanowire-based logic circuits were constructed by the vertical integration of multilayered field-effect transistors (FETs) on plastic substrates. ZnO nanowires with an average diameter of -100 nm were synthesized by thermal chemical vapor deposition for use as the channel material in FETs. The ZnO-based FETs exhibited a high I(ON)/I(OFF) of > 10(6), with the characteristic of n-type depletion modes. For vertically integrated logic circuits, three multilayer FETs were sequentially prepared. The stacked FETs were connected in series via electrodes, and C-PVPs were used for the layer-isolation material. The NOT and NAND gates exhibited large logic-swing values of -93%. These results demonstrate the feasibility of three dimensional flexible logic circuits.

Improved memory characteristics by NH3-nitrided GdO as charge storage layer for nonvolatile memory applications

NASA Astrophysics Data System (ADS)

Liu, L.; Xu, J. P.; Ji, F.; Chen, J. X.; Lai, P. T.

2012-07-01

Charge-trapping memory capacitor with nitrided gadolinium oxide (GdO) as charge storage layer (CSL) is fabricated, and the influence of post-deposition annealing in NH3 on its memory characteristics is investigated. Transmission electron microscopy, x-ray photoelectron spectroscopy, and x-ray diffraction are used to analyze the cross-section and interface quality, composition, and crystallinity of the stack gate dielectric, respectively. It is found that nitrogen incorporation can improve the memory window and achieve a good trade-off among the memory properties due to NH3-annealing-induced reasonable distribution profile of a large quantity of deep-level bulk traps created in the nitrided GdO film and reduction of shallow traps near the CSL/SiO2 interface.

Photovoltaic Effect in an Electrically Tunable van der Waals Heterojunction

PubMed Central

2014-01-01

Semiconductor heterostructures form the cornerstone of many electronic and optoelectronic devices and are traditionally fabricated using epitaxial growth techniques. More recently, heterostructures have also been obtained by vertical stacking of two-dimensional crystals, such as graphene and related two-dimensional materials. These layered designer materials are held together by van der Waals forces and contain atomically sharp interfaces. Here, we report on a type-II van der Waals heterojunction made of molybdenum disulfide and tungsten diselenide monolayers. The junction is electrically tunable, and under appropriate gate bias an atomically thin diode is realized. Upon optical illumination, charge transfer occurs across the planar interface and the device exhibits a photovoltaic effect. Advances in large-scale production of two-dimensional crystals could thus lead to a new photovoltaic solar technology. PMID:25057817

Consequences of converting graded to action potentials upon neural information coding and energy efficiency.

PubMed

Sengupta, Biswa; Laughlin, Simon Barry; Niven, Jeremy Edward

2014-01-01

Information is encoded in neural circuits using both graded and action potentials, converting between them within single neurons and successive processing layers. This conversion is accompanied by information loss and a drop in energy efficiency. We investigate the biophysical causes of this loss of information and efficiency by comparing spiking neuron models, containing stochastic voltage-gated Na(+) and K(+) channels, with generator potential and graded potential models lacking voltage-gated Na(+) channels. We identify three causes of information loss in the generator potential that are the by-product of action potential generation: (1) the voltage-gated Na(+) channels necessary for action potential generation increase intrinsic noise and (2) introduce non-linearities, and (3) the finite duration of the action potential creates a 'footprint' in the generator potential that obscures incoming signals. These three processes reduce information rates by ∼50% in generator potentials, to ∼3 times that of spike trains. Both generator potentials and graded potentials consume almost an order of magnitude less energy per second than spike trains. Because of the lower information rates of generator potentials they are substantially less energy efficient than graded potentials. However, both are an order of magnitude more efficient than spike trains due to the higher energy costs and low information content of spikes, emphasizing that there is a two-fold cost of converting analogue to digital; information loss and cost inflation.

Consequences of Converting Graded to Action Potentials upon Neural Information Coding and Energy Efficiency

PubMed Central

Sengupta, Biswa; Laughlin, Simon Barry; Niven, Jeremy Edward

2014-01-01

Information is encoded in neural circuits using both graded and action potentials, converting between them within single neurons and successive processing layers. This conversion is accompanied by information loss and a drop in energy efficiency. We investigate the biophysical causes of this loss of information and efficiency by comparing spiking neuron models, containing stochastic voltage-gated Na+ and K+ channels, with generator potential and graded potential models lacking voltage-gated Na+ channels. We identify three causes of information loss in the generator potential that are the by-product of action potential generation: (1) the voltage-gated Na+ channels necessary for action potential generation increase intrinsic noise and (2) introduce non-linearities, and (3) the finite duration of the action potential creates a ‘footprint’ in the generator potential that obscures incoming signals. These three processes reduce information rates by ∼50% in generator potentials, to ∼3 times that of spike trains. Both generator potentials and graded potentials consume almost an order of magnitude less energy per second than spike trains. Because of the lower information rates of generator potentials they are substantially less energy efficient than graded potentials. However, both are an order of magnitude more efficient than spike trains due to the higher energy costs and low information content of spikes, emphasizing that there is a two-fold cost of converting analogue to digital; information loss and cost inflation. PMID:24465197

Observation of electric potential in organic thin-film transistor by bias-applied hard X-ray photoemission spectroscopy

NASA Astrophysics Data System (ADS)

Watanabe, Takeshi; Tada, Keisuke; Yasuno, Satoshi; Oji, Hiroshi; Yoshimoto, Noriyuki; Hirosawa, Ichiro

2016-03-01

The effect of gate voltage on electric potential in a pentacene (PEN) layer was studied by hard X-ray photoelectron spectroscopy under a bias voltage. It was observed that applying a negative gate voltage substantially increases the width of a C 1s peak. This suggested that injected and accumulated carriers in an organic thin film transistor channel modified the potential depth profile in PEN. It was also observed that the C 1s kinetic energy tends to increase monotonically with threshold voltage.

Initial Plasma Testing of the Ion Proportional Surface Emission Cathode

DTIC Science & Technology

2008-07-15

REPRINT 3. DATES COVERED (From - To) 4. TITLE AND SUBTITLE Initial Plasma Testing of the Ion Proportional Surface Emission Cathode 5a. CONTRACT NUMBER...substrate and an adjacent metal cathode element. The substrate potential is held positive of the cathode with gate elements. In plasma , the gate is...eliminated due to ambient ion flux which maintains the substrate potential near plasma ground. Prototype devices have been tested using a laboratory plasma

Memory in a fractional-order cardiomyocyte model alters properties of alternans and spontaneous activity

NASA Astrophysics Data System (ADS)

Comlekoglu, T.; Weinberg, S. H.

2017-09-01

Cardiac memory is the dependence of electrical activity on the prior history of one or more system state variables, including transmembrane potential (Vm), ionic current gating, and ion concentrations. While prior work has represented memory either phenomenologically or with biophysical detail, in this study, we consider an intermediate approach of a minimal three-variable cardiomyocyte model, modified with fractional-order dynamics, i.e., a differential equation of order between 0 and 1, to account for history-dependence. Memory is represented via both capacitive memory, due to fractional-order Vm dynamics, that arises due to non-ideal behavior of membrane capacitance; and ionic current gating memory, due to fractional-order gating variable dynamics, that arises due to gating history-dependence. We perform simulations for varying Vm and gating variable fractional-orders and pacing cycle length and measure action potential duration (APD) and incidence of alternans, loss of capture, and spontaneous activity. In the absence of ionic current gating memory, we find that capacitive memory, i.e., decreased Vm fractional-order, typically shortens APD, suppresses alternans, and decreases the minimum cycle length (MCL) for loss of capture. However, in the presence of ionic current gating memory, capacitive memory can prolong APD, promote alternans, and increase MCL. Further, we find that reduced Vm fractional order (typically less than 0.75) can drive phase 4 depolarizations that promote spontaneous activity. Collectively, our results demonstrate that memory reproduced by a fractional-order model can play a role in alternans formation and pacemaking, and in general, can greatly increase the range of electrophysiological characteristics exhibited by a minimal model.

Optimal control of universal quantum gates in a double quantum dot

NASA Astrophysics Data System (ADS)

Castelano, Leonardo K.; de Lima, Emanuel F.; Madureira, Justino R.; Degani, Marcos H.; Maialle, Marcelo Z.

2018-06-01

We theoretically investigate electron spin operations driven by applied electric fields in a semiconductor double quantum dot (DQD) formed in a nanowire with longitudinal potential modulated by local gating. We develop a model that describes the process of loading and unloading the DQD taking into account the overlap between the electron wave function and the leads. Such a model considers the spatial occupation and the spin Pauli blockade in a time-dependent fashion due to the highly mixed states driven by the external electric field. Moreover, we present a road map based on the quantum optimal control theory (QOCT) to find a specific electric field that performs two-qubit quantum gates on a faster timescale and with higher possible fidelity. By employing the QOCT, we demonstrate the possibility of performing within high efficiency a universal set of quantum gates {cnot, H, and T } , where cnot is the controlled-not gate, H is the Hadamard gate, and T is the π /8 gate, even in the presence of the loading/unloading process and charge noise effects. Furthermore, by varying the intensity of the applied magnetic field B , the optimized fidelity of the gates oscillates with a period inversely proportional to the gate operation time tf. This behavior can be useful to attain higher fidelity for fast gate operations (>1 GHz) by appropriately choosing B and tf to produce a maximum of the oscillation.

Performance and Design Considerations of a Novel Dual-Material Gate Carbon Nanotube Field-Effect Transistors: Nonequilibrium Green's Function Approach

NASA Astrophysics Data System (ADS)

Arefinia, Zahra; Orouji, Ali A.

2009-02-01

The concept of dual-material gate (DMG) is applied to the carbon nanotube field-effect transistor (CNTFET) with doped source and drain extensions, and the features exhibited by the resulting new structure, i.e., the DMG-CNTFET structure, have been examined for the first time by developing a two-dimensional (2D) full quantum simulation. The simulations have been done by the self-consistent solution of 2D Poisson-Schrödinger equations, within the nonequilibrium Green's function (NEGF) formalism. The results show DMG-CNTFET decreases significantly leakage current and drain conductance and increases on-off current ratio and voltage gain as compared to the single material gate counterparts CNTFET. It is seen that short channel effects in this structure are suppressed because of the perceivable step in the surface potential profile, which screens the drain potential. Moreover, these unique features can be controlled by engineering the workfunction and length of the gate metals. Therefore, this work provides an incentive for further experimental exploration.

Highly sensitive MoTe2 chemical sensor with fast recovery rate through gate biasing

NASA Astrophysics Data System (ADS)

Feng, Zhihong; Xie, Yuan; Chen, Jiancui; Yu, Yuanyuan; Zheng, Shijun; Zhang, Rui; Li, Quanning; Chen, Xuejiao; Sun, Chongling; Zhang, Hao; Pang, Wei; Liu, Jing; Zhang, Daihua

2017-06-01

The unique properties of two dimensional (2D) materials make them promising candidates for chemical and biological sensing applications. However, most 2D nanomaterial sensors suffer very long recovery time due to slow molecular desorption at room temperature. Here, we report a highly sensitive molybdenum ditelluride (MoTe2) gas sensor for NO2 and NH3 detection with greatly enhanced recovery rate. The effects of gate bias on sensing performance have been systematically studied. It is found that the recovery kinetics can be effectively adjusted by biasing the sensor to different gate voltages. Under the optimum biasing potential, the MoTe2 sensor can achieve more than 90% recovery after each sensing cycle well within 10 min at room temperature. The results demonstrate the potential of MoTe2 as a promising candidate for high-performance chemical sensors. The idea of exploiting gate bias to adjust molecular desorption kinetics can be readily applied to much wider sensing platforms based on 2D nanomaterials.

Distribution and function of voltage-gated sodium channels in the nervous system.

PubMed

Wang, Jun; Ou, Shao-Wu; Wang, Yun-Jie

2017-11-02

Voltage-gated sodium channels (VGSCs) are the basic ion channels for neuronal excitability, which are crucial for the resting potential and the generation and propagation of action potentials in neurons. To date, at least nine distinct sodium channel isoforms have been detected in the nervous system. Recent studies have identified that voltage-gated sodium channels not only play an essential role in the normal electrophysiological activities of neurons but also have a close relationship with neurological diseases. In this study, the latest research findings regarding the structure, type, distribution, and function of VGSCs in the nervous system and their relationship to neurological diseases, such as epilepsy, neuropathic pain, brain tumors, neural trauma, and multiple sclerosis, are reviewed in detail.

Three-input gate logic circuits on chemically assembled single-electron transistors with organic and inorganic hybrid passivation layers

PubMed Central

Majima, Yutaka; Hackenberger, Guillaume; Azuma, Yasuo; Kano, Shinya; Matsuzaki, Kosuke; Susaki, Tomofumi; Sakamoto, Masanori; Teranishi, Toshiharu

2017-01-01

Abstract Single-electron transistors (SETs) are sub-10-nm scale electronic devices based on conductive Coulomb islands sandwiched between double-barrier tunneling barriers. Chemically assembled SETs with alkanethiol-protected Au nanoparticles show highly stable Coulomb diamonds and two-input logic operations. The combination of bottom-up and top-down processes used to form the passivation layer is vital for realizing multi-gate chemically assembled SET circuits, as this combination enables us to connect conventional complementary metal oxide semiconductor (CMOS) technologies via planar processes. Here, three-input gate exclusive-OR (XOR) logic operations are demonstrated in passivated chemically assembled SETs. The passivation layer is a hybrid bilayer of self-assembled monolayers (SAMs) and pulsed laser deposited (PLD) aluminum oxide (AlOx), and top-gate electrodes were prepared on the hybrid passivation layers. Top and two-side-gated SETs showed clear Coulomb oscillation and diamonds for each of the three available gates, and three-input gate XOR logic operation was clearly demonstrated. These results show the potential of chemically assembled SETs to work as logic devices with multi-gate inputs using organic and inorganic hybrid passivation layers. PMID:28634499

Three-input gate logic circuits on chemically assembled single-electron transistors with organic and inorganic hybrid passivation layers.

PubMed

Majima, Yutaka; Hackenberger, Guillaume; Azuma, Yasuo; Kano, Shinya; Matsuzaki, Kosuke; Susaki, Tomofumi; Sakamoto, Masanori; Teranishi, Toshiharu

2017-01-01

Single-electron transistors (SETs) are sub-10-nm scale electronic devices based on conductive Coulomb islands sandwiched between double-barrier tunneling barriers. Chemically assembled SETs with alkanethiol-protected Au nanoparticles show highly stable Coulomb diamonds and two-input logic operations. The combination of bottom-up and top-down processes used to form the passivation layer is vital for realizing multi-gate chemically assembled SET circuits, as this combination enables us to connect conventional complementary metal oxide semiconductor (CMOS) technologies via planar processes. Here, three-input gate exclusive-OR (XOR) logic operations are demonstrated in passivated chemically assembled SETs. The passivation layer is a hybrid bilayer of self-assembled monolayers (SAMs) and pulsed laser deposited (PLD) aluminum oxide (AlO[Formula: see text]), and top-gate electrodes were prepared on the hybrid passivation layers. Top and two-side-gated SETs showed clear Coulomb oscillation and diamonds for each of the three available gates, and three-input gate XOR logic operation was clearly demonstrated. These results show the potential of chemically assembled SETs to work as logic devices with multi-gate inputs using organic and inorganic hybrid passivation layers.

Stacking interactions and DNA intercalation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Li, Dr. Shen; Cooper, Valentino R; Thonhauser, Prof. Timo

2009-01-01

The relationship between stacking interactions and the intercalation of proflavine and ellipticine within DNA is investigated using a nonempirical van der Waals density functional for the correlation energy. Our results, employing a binary stack model, highlight fundamental, qualitative differences between base-pair base-pair interactions and that of the stacked intercalator base pair system. Most notable result is the paucity of torque which so distinctively defines the Twist of DNA. Surprisingly, this model, when combined with a constraint on the twist of the surrounding base-pair steps to match the observed unwinding of the sugar-phosphate backbone, was sufficient for explaining the experimentally observedmore » proflavine intercalator configuration. Our extensive mapping of the potential energy surface of base-pair intercalator interactions can provide valuable information for future nonempirical studies of DNA intercalation dynamics.« less

Voltage gating by molecular subunits of Na+ and K+ ion channels: higher-dimensional cubic kinetics, rate constants, and temperature.

PubMed

Fohlmeister, Jürgen F

2015-06-01

The structural similarity between the primary molecules of voltage-gated Na and K channels (alpha subunits) and activation gating in the Hodgkin-Huxley model is brought into full agreement by increasing the model's sodium kinetics to fourth order (m(3) → m(4)). Both structures then virtually imply activation gating by four independent subprocesses acting in parallel. The kinetics coalesce in four-dimensional (4D) cubic diagrams (16 states, 32 reversible transitions) that show the structure to be highly failure resistant against significant partial loss of gating function. Rate constants, as fitted in phase plot data of retinal ganglion cell excitation, reflect the molecular nature of the gating transitions. Additional dimensions (6D cubic diagrams) accommodate kinetically coupled sodium inactivation and gating processes associated with beta subunits. The gating transitions of coupled sodium inactivation appear to be thermodynamically irreversible; response to dielectric surface charges (capacitive displacement) provides a potential energy source for those transitions and yields highly energy-efficient excitation. A comparison of temperature responses of the squid giant axon (apparently Arrhenius) and mammalian channel gating yields kinetic Q10 = 2.2 for alpha unit gating, whose transitions are rate-limiting at mammalian temperatures; beta unit kinetic Q10 = 14 reproduces the observed non-Arrhenius deviation of mammalian gating at low temperatures; the Q10 of sodium inactivation gating matches the rate-limiting component of activation gating at all temperatures. The model kinetics reproduce the physiologically large frequency range for repetitive firing in ganglion cells and the physiologically observed strong temperature dependence of recovery from inactivation. Copyright © 2015 the American Physiological Society.

78 FR 40132 - Wave Energy Converter Prize Administration Webinar

Federal Register 2010, 2011, 2012, 2013, 2014

2013-07-03

... any potential FOA to seek input from the public regarding possible approaches to structuring a prize... encourages commenters to provide alternative strategies and approaches for the prize administration. A multi stage-gate challenge structure requires competitors to pass through a series of stage gates based on...

Methodology for Analysis, Modeling and Simulation of Airport Gate-waiting Delays

NASA Astrophysics Data System (ADS)

Wang, Jianfeng

This dissertation presents methodologies to estimate gate-waiting delays from historical data, to identify gate-waiting-delay functional causes in major U.S. airports, and to evaluate the impact of gate operation disruptions and mitigation strategies on gate-waiting delay. Airport gates are a resource of congestion in the air transportation system. When an arriving flight cannot pull into its gate, the delay it experiences is called gate-waiting delay. Some possible reasons for gate-waiting delay are: the gate is occupied, gate staff or equipment is unavailable, the weather prevents the use of the gate (e.g. lightning), or the airline has a preferred gate assignment. Gate-waiting delays potentially stay with the aircraft throughout the day (unless they are absorbed), adding costs to passengers and the airlines. As the volume of flights increases, ensuring that airport gates do not become a choke point of the system is critical. The first part of the dissertation presents a methodology for estimating gate-waiting delays based on historical, publicly available sources. Analysis of gate-waiting delays at major U.S. airports in the summer of 2007 identifies the following. (i) Gate-waiting delay is not a significant problem on majority of days; however, the worst delay days (e.g. 4% of the days at LGA) are extreme outliers. (ii) The Atlanta International Airport (ATL), the John F. Kennedy International Airport (JFK), the Dallas/Fort Worth International Airport (DFW) and the Philadelphia International Airport (PHL) experience the highest gate-waiting delays among major U.S. airports. (iii) There is a significant gate-waiting-delay difference between airlines due to a disproportional gate allocation. (iv) Gate-waiting delay is sensitive to time of a day and schedule peaks. According to basic principles of queueing theory, gate-waiting delay can be attributed to over-scheduling, higher-than-scheduled arrival rate, longer-than-scheduled gate-occupancy time, and reduced gate availability. Analysis of the worst days at six major airports in the summer of 2007 indicates that major gate-waiting delays are primarily due to operational disruptions---specifically, extended gate occupancy time, reduced gate availability and higher-than-scheduled arrival rate (usually due to arrival delay). Major gate-waiting delays are not a result of over-scheduling. The second part of this dissertation presents a simulation model to evaluate the impact of gate operational disruptions and gate-waiting-delay mitigation strategies, including building new gates, implementing common gates, using overnight off-gate parking and adopting self-docking gates. Simulation results show the following effects of disruptions: (i) The impact of arrival delay in a time window (e.g. 7 pm to 9 pm) on gate-waiting delay is bounded. (ii) The impact of longer-than-scheduled gate-occupancy times in a time window on gate-waiting delay can be unbounded and gate-waiting delay can increase linearly as the disruption level increases. (iii) Small reductions in gate availability have a small impact on gate-waiting delay due to slack gate capacity, while larger reductions have a non-linear impact as slack gate capacity is used up. Simulation results show the following effects of mitigation strategies: (i) Implementing common gates is an effective mitigation strategy, especially for airports with a flight schedule not dominated by one carrier, such as LGA. (ii) The overnight off-gate rule is effective in mitigating gate-waiting delay for flights stranded overnight following departure cancellations. This is especially true at airports where the gate utilization is at maximum overnight, such as LGA and DFW. The overnight off-gate rule can also be very effective to mitigate gate-waiting delay due to operational disruptions in evenings. (iii) Self-docking gates are effective in mitigating gate-waiting delay due to reduced gate availability.

Molecular basis for zinc potentiation at strychnine-sensitive glycine receptors.

PubMed

Miller, Paul S; Da Silva, Helena M A; Smart, Trevor G

2005-11-11

The divalent cation Zn(2+) is a potent potentiator at the strychnine-sensitive glycine receptor (GlyR). This occurs at nanomolar concentrations, which are the predicted endogenous levels of extracellular neuronal Zn(2+). Using structural modeling and functional mutagenesis, we have identified the molecular basis for the elusive Zn(2+) potentiation site on GlyRs and account for the differential sensitivity of GlyR alpha(1) and GlyR alpha(2) to Zn(2+) potentiation. In addition, juxtaposed to this Zn(2+) site, which is located externally on the N-terminal domain of the alpha subunit, another residue was identified in the nearby Cys loop, a region that is critical for receptor gating in all Cys loop ligand-gated ion channels. This residue acted as a key control element in the allosteric transduction pathway for Zn(2+) potentiation, enabling either potentiation or overt inhibition of receptor activation depending upon the moiety resident at this location. Overall, we propose that Zn(2+) binds to a site on the extracellular outer face of the GlyR alpha subunit and exerts its positive allosteric effect via an interaction with the Cys loop to increase the efficacy of glycine receptor gating.

Energy Impacts of Wide Band Gap Semiconductors in U.S. Light-Duty Electric Vehicle Fleet

DOE Office of Scientific and Technical Information (OSTI.GOV)

Warren, Joshua A.; Riddle, Matthew E.; Graziano, Diane J.

2015-08-12

Silicon carbide and gallium nitride, two leading wide band gap semiconductors with significant potential in electric vehicle power electronics, are examined from a life cycle energy perspective and compared with incumbent silicon in U.S. light-duty electric vehicle fleet. Cradle-to-gate, silicon carbide is estimated to require more than twice the energy as silicon. However, the magnitude of vehicle use phase fuel savings potential is comparatively several orders of magnitude higher than the marginal increase in cradle-to-gate energy. Gallium nitride cradle-to-gate energy requirements are estimated to be similar to silicon, with use phase savings potential similar to or exceeding that of siliconmore » carbide. Potential energy reductions in the United States vehicle fleet are examined through several scenarios that consider the market adoption potential of electric vehicles themselves, as well as the market adoption potential of wide band gap semiconductors in electric vehicles. For the 2015–2050 time frame, cumulative energy savings associated with the deployment of wide band gap semiconductors are estimated to range from 2–20 billion GJ depending on market adoption dynamics.« less

Influence of asymmetric attenuation of single and paired dendritic inputs on summation of synaptic potentials and initiation of action potentials.

PubMed

Fortier, Pierre A; Bray, Chelsea

2013-04-16

Previous studies revealed mechanisms of dendritic inputs leading to action potential initiation at the axon initial segment and backpropagation into the dendritic tree. This interest has recently expanded toward the communication between different parts of the dendritic tree which could preprocess information before reaching the soma. This study tested for effects of asymmetric voltage attenuation between different sites in the dendritic tree on summation of synaptic inputs and action potential initiation using the NEURON simulation environment. Passive responses due to the electrical equivalent circuit of the three-dimensional neuron architecture with leak channels were examined first, followed by the responses after adding voltage-gated channels and finally synaptic noise. Asymmetric attenuation of voltage, which is a function of asymmetric input resistance, was seen between all pairs of dendritic sites but the transfer voltages (voltage recorded at the opposite site from stimulation among a pair of dendritic sites) were equal and also summed linearly with local voltage responses during simultaneous stimulation of both sites. In neurons with voltage-gated channels, we reproduced the observations where a brief stimulus to the proximal ascending dendritic branch of a pyramidal cell triggers a local action potential but a long stimulus triggers a somal action potential. Combined stimulation of a pair of sites in this proximal dendrite did not alter this pattern. The attraction of the action potential onset toward the soma with a long stimulus in the absence of noise was due to the higher density of voltage-gated sodium channels at the axon initial segment. This attraction was, however, negligible at the most remote distal dendritic sites and was replaced by an effect due to high input resistance. Action potential onset occurred at the dendritic site of higher input resistance among a pair of remote dendritic sites, irrespective of which of these two sites received the synaptic input. Exploration of the parameter space showed how the gradient of voltage-gated channel densities and input resistances along a dendrite could draw the action potential onset away from the stimulation site. The attraction of action potential onset toward the higher density of voltage-gated channels in the soma during stimulation of the proximal dendrite was, however, reduced after the addition of synaptic noise. Copyright © 2012 IBRO. Published by Elsevier Ltd. All rights reserved.

A Probe for Measuring Spacecraft Surface Potentials Using a Direct-Gate Field Effect Transistor.

DTIC Science & Technology

1983-09-30

SURFACE POTENTIALS USING A DIRECT-GATE FIELD EFFECT TRANSISTOR Mark N. Horenstein Anton Havretic Trustees of Boston University 881 Commonwealth Avenue...1933 Transistor 6. PERFORMING ORG. REPORT NUMBER 7. AUTHOR(s) S. CONTRACT OR GRANT NUMBER(&) ’_5 Mark N. Horenstein Anton Mavretic F19628-82-K-00 34...at AFGL. These tests can be considered the bench mark tests for device performance, with all elements of the monitoring system optimized to eliminate

Mechanical gating of a mechanochemical reaction cascade

NASA Astrophysics Data System (ADS)

Wang, Junpeng; Kouznetsova, Tatiana B.; Boulatov, Roman; Craig, Stephen L.

2016-11-01

Covalent polymer mechanochemistry offers promising opportunities for the control and engineering of reactivity. To date, covalent mechanochemistry has largely been limited to individual reactions, but it also presents potential for intricate reaction systems and feedback loops. Here we report a molecular architecture, in which a cyclobutane mechanophore functions as a gate to regulate the activation of a second mechanophore, dichlorocyclopropane, resulting in a mechanochemical cascade reaction. Single-molecule force spectroscopy, pulsed ultrasonication experiments and DFT-level calculations support gating and indicate that extra force of >0.5 nN needs to be applied to a polymer of gated gDCC than of free gDCC for the mechanochemical isomerization gDCC to proceed at equal rate. The gating concept provides a mechanism by which to regulate stress-responsive behaviours, such as load-strengthening and mechanochromism, in future materials designs.

Gates Foundation donates $25 million for AIDS vaccine.

PubMed

1999-05-07

The International AIDS Vaccine Initiative (IAVI) received a $25 million five-year grant from Bill and Melinda Gates through the William H. Gates Foundation. This is the largest gift seen in the AIDS epidemic, and will allow IAVI to more than double vaccine development efforts. IAVI is currently developing two potential vaccines, hopes to study three others, and is working with the business community to insure that a successful vaccine is affordable in developing countries. With 16,000 new infections occurring daily, a vaccine is seen as the most effective way to stop the epidemic. The William H. Gates Foundation had donated $1.5 million to IAVI and $100 million for programs to speed the delivery of vaccines to children in poor countries. Internet addresses are included for both IAVI and the William H. Gates Foundation.

Voltage-Gated Potassium Channels: A Structural Examination of Selectivity and Gating

PubMed Central

Kim, Dorothy M.; Nimigean, Crina M.

2016-01-01

Voltage-gated potassium channels play a fundamental role in the generation and propagation of the action potential. The discovery of these channels began with predictions made by early pioneers, and has culminated in their extensive functional and structural characterization by electrophysiological, spectroscopic, and crystallographic studies. With the aid of a variety of crystal structures of these channels, a highly detailed picture emerges of how the voltage-sensing domain reports changes in the membrane electric field and couples this to conformational changes in the activation gate. In addition, high-resolution structural and functional studies of K+ channel pores, such as KcsA and MthK, offer a comprehensive picture on how selectivity is achieved in K+ channels. Here, we illustrate the remarkable features of voltage-gated potassium channels and explain the mechanisms used by these machines with experimental data. PMID:27141052

Implementing quantum gates through scattering between a static and a flying qubit

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cordourier-Maruri, G.; Coss, R. de; Ciccarello, F.

2010-11-15

We investigate whether a two-qubit quantum gate can be implemented in a scattering process involving a flying and a static qubit. To this end, we focus on a paradigmatic setup made out of a mobile particle and a quantum impurity, whose respective spin degrees of freedom couple to each other during a one-dimensional scattering process. Once a condition for the occurrence of quantum gates is derived in terms of spin-dependent transmission coefficients, we show that this can be actually fulfilled through the insertion of an additional narrow potential barrier. An interesting observation is that under resonance conditions this procedure enablesmore » a gate only for isotropic Heisenberg (exchange) interactions and fails for an XY interaction. We show the existence of parameter regimes for which gates able to establish a maximum amount of entanglement can be implemented. The gates are found to be robust to variations of the optimal parameters.« less

Tuning the allosteric regulation of artificial muscarinic and dopaminergic ligand-gated potassium channels by protein engineering of G protein-coupled receptors

PubMed Central

Moreau, Christophe J.; Revilloud, Jean; Caro, Lydia N.; Dupuis, Julien P.; Trouchet, Amandine; Estrada-Mondragón, Argel; Nieścierowicz, Katarzyna; Sapay, Nicolas; Crouzy, Serge; Vivaudou, Michel

2017-01-01

Ligand-gated ion channels enable intercellular transmission of action potential through synapses by transducing biochemical messengers into electrical signal. We designed artificial ligand-gated ion channels by coupling G protein-coupled receptors to the Kir6.2 potassium channel. These artificial channels called ion channel-coupled receptors offer complementary properties to natural channels by extending the repertoire of ligands to those recognized by the fused receptors, by generating more sustained signals and by conferring potassium selectivity. The first artificial channels based on the muscarinic M2 and the dopaminergic D2L receptors were opened and closed by acetylcholine and dopamine, respectively. We find here that this opposite regulation of the gating is linked to the length of the receptor C-termini, and that C-terminus engineering can precisely control the extent and direction of ligand gating. These findings establish the design rules to produce customized ligand-gated channels for synthetic biology applications. PMID:28145461

A localized interaction surface for voltage-sensing domains on the pore domain of a K+ channel.

PubMed

Li-Smerin, Y; Hackos, D H; Swartz, K J

2000-02-01

Voltage-gated K+ channels contain a central pore domain and four surrounding voltage-sensing domains. How and where changes in the structure of the voltage-sensing domains couple to the pore domain so as to gate ion conduction is not understood. The crystal structure of KcsA, a bacterial K+ channel homologous to the pore domain of voltage-gated K+ channels, provides a starting point for addressing this question. Guided by this structure, we used tryptophan-scanning mutagenesis on the transmembrane shell of the pore domain in the Shaker voltage-gated K+ channel to localize potential protein-protein and protein-lipid interfaces. Some mutants cause only minor changes in gating and when mapped onto the KcsA structure cluster away from the interface between pore domain subunits. In contrast, mutants producing large changes in gating tend to cluster near this interface. These results imply that voltage-sensing domains interact with localized regions near the interface between adjacent pore domain subunits.

High-Dimensional Single-Photon Quantum Gates: Concepts and Experiments.

PubMed

Babazadeh, Amin; Erhard, Manuel; Wang, Feiran; Malik, Mehul; Nouroozi, Rahman; Krenn, Mario; Zeilinger, Anton

2017-11-03

Transformations on quantum states form a basic building block of every quantum information system. From photonic polarization to two-level atoms, complete sets of quantum gates for a variety of qubit systems are well known. For multilevel quantum systems beyond qubits, the situation is more challenging. The orbital angular momentum modes of photons comprise one such high-dimensional system for which generation and measurement techniques are well studied. However, arbitrary transformations for such quantum states are not known. Here we experimentally demonstrate a four-dimensional generalization of the Pauli X gate and all of its integer powers on single photons carrying orbital angular momentum. Together with the well-known Z gate, this forms the first complete set of high-dimensional quantum gates implemented experimentally. The concept of the X gate is based on independent access to quantum states with different parities and can thus be generalized to other photonic degrees of freedom and potentially also to other quantum systems.

Tunable Electron and Hole Injection Enabled by Atomically Thin Tunneling Layer for Improved Contact Resistance and Dual Channel Transport in MoS2/WSe2 van der Waals Heterostructure.

PubMed

Khan, Muhammad Atif; Rathi, Servin; Lee, Changhee; Lim, Dongsuk; Kim, Yunseob; Yun, Sun Jin; Youn, Doo Hyeb; Kim, Gil-Ho

2018-06-25

Two-dimensional (2D) materials based heterostructures provide a unique platform where interaction between stacked 2D layers can enhance the electrical and opto-electrical properties as well as give rise to interesting new phenomena. Here, operation of a van der Waals heterostructure device comprising of vertically stacked bi-layer MoS 2 and few layered WSe 2 has been demonstrated in which atomically thin MoS 2 layer has been employed as a tunneling layer to the underlying WSe 2 layer. In this way, simultaneous contacts to both MoS 2 and WSe 2 2D layers have been established by forming direct MS (metal semiconductor) to MoS 2 and tunneling based MIS (metal insulator semiconductor) contacts to WSe 2 , respectively. The use of MoS 2 as a dielectric tunneling layer results in improved contact resistance (80 kΩ-µm) for WSe 2 contact, which is attributed to reduction in effective Schottky barrier height and is also confirmed from the temperature dependent measurement. Further, this unique contact engineering and type II band alignment between MoS 2 and WSe 2 enables a selective and independent carrier transport across the respective layers. This contact engineered dual channel heterostructure exhibits an excellent gate control and both channel current and carrier types can be modulated by the vertical electric field of the gate electrode, which is also reflected in on/off ratio of 10 4 for both electrons (MoS 2 ) and holes (WSe 2 ) channels. Moreover, the charge transfer at the heterointerface is studied quantitatively from the shift in the threshold voltage of the pristine MoS 2 and heterostructure device, which agrees with the carrier recombination induced optical quenching as observed in the Raman spectra of the pristine and heterostructure layers. This observation of dual channel ambipolar transport enabled by the hybrid tunneling contacts and strong interlayer coupling can be utilized for high performance opto-electrical devices and applications.

Self-Assembling Molecular Logic Gates Based on DNA Crossover Tiles.

PubMed

Campbell, Eleanor A; Peterson, Evan; Kolpashchikov, Dmitry M

2017-07-05

DNA-based computational hardware has attracted ever-growing attention due to its potential to be useful in the analysis of complex mixtures of biological markers. Here we report the design of self-assembling logic gates that recognize DNA inputs and assemble into crossover tiles when the output signal is high; the crossover structures disassemble to form separate DNA stands when the output is low. The output signal can be conveniently detected by fluorescence using a molecular beacon probe as a reporter. AND, NOT, and OR logic gates were designed. We demonstrate that the gates can connect to each other to produce other logic functions. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

A 2D analytical cylindrical gate tunnel FET (CG-TFET) model: impact of shortest tunneling distance

NASA Astrophysics Data System (ADS)

Dash, S.; Mishra, G. P.

2015-09-01

A 2D analytical tunnel field-effect transistor (FET) potential model with cylindrical gate (CG-TFET) based on the solution of Laplace’s equation is proposed. The band-to-band tunneling (BTBT) current is derived by the help of lateral electric field and the shortest tunneling distance. However, the analysis is extended to obtain the subthreshold swing (SS) and transfer characteristics of the device. The dependency of drain current, SS and transconductance on gate voltage and shortest tunneling distance is discussed. Also, the effect of scaling the gate oxide thickness and the cylindrical body diameter on the electrical parameters of the device is analyzed.

Direct probing of electron and hole trapping into nano-floating-gate in organic field-effect transistor nonvolatile memories

NASA Astrophysics Data System (ADS)

Cui, Ze-Qun; Wang, Shun; Chen, Jian-Mei; Gao, Xu; Dong, Bin; Chi, Li-Feng; Wang, Sui-Dong

2015-03-01

Electron and hole trapping into the nano-floating-gate of a pentacene-based organic field-effect transistor nonvolatile memory is directly probed by Kelvin probe force microscopy. The probing is straightforward and non-destructive. The measured surface potential change can quantitatively profile the charge trapping, and the surface characterization results are in good accord with the corresponding device behavior. Both electrons and holes can be trapped into the nano-floating-gate, with a preference of electron trapping than hole trapping. The trapped charge quantity has an approximately linear relation with the programming/erasing gate bias, indicating that the charge trapping in the device is a field-controlled process.

Irradiation of MOS-FET devices to provide desired logic functions

NASA Technical Reports Server (NTRS)

Danchenko, V.; Schaefer, D. H.

1972-01-01

Gamma, X-ray, electron, or other radiation is used to shift threshold potentials of MOS devices on logic circuits. Before irradiation MOS gates to be shifted are biased positive and other gates are grounded to substrate. Threshold lasts 10 years. Thermal annealing brings circuit back to original configuration.

Contribution of Sialic Acid to the Voltage Dependence of Sodium Channel Gating

PubMed Central

Bennett, Eric; Urcan, Mary S.; Tinkle, Sally S.; Koszowski, Adam G.; Levinson, Simon R.

1997-01-01

A potential role for sialic acid in the voltage-dependent gating of rat skeletal muscle sodium channels (rSkM1) was investigated using Chinese hamster ovary (CHO) cells stably transfected with rSkM1. Changes in the voltage dependence of channel gating were observed after enzymatic (neuraminidase) removal of sialic acid from cells expressing rSkM1 and through the expression of rSkM1 in a sialylation-deficient cell line (lec2). The steady-state half-activation voltages (Va) of channels under each condition of reduced sialylation were ∼10 mV more depolarized than control channels. The voltage dependence of the time constants of channel activation and inactivation were also shifted in the same direction and by a similar magnitude. In addition, recombinant deletion of likely glycosylation sites from the rSkM1 sequence resulted in mutant channels that gated at voltages up to 10 mV more positive than wild-type channels. Thus three independent means of reducing channel sialylation show very similar effects on the voltage dependence of channel gating. Finally, steady-state activation voltages for channels subjected to reduced sialylation conditions were much less sensitive to the effects of external calcium than those measured under control conditions, indicating that sialic acid directly contributes to the negative surface potential. These results are consistent with an electrostatic mechanism by which external, negatively charged sialic acid residues on rSkM1 alter the electric field sensed by channel gating elements. PMID:9089440

Gating of human ClC-2 chloride channels and regulation by carboxy-terminal domains

PubMed Central

Garcia-Olivares, Jennie; Alekov, Alexi; Boroumand, Mohammad Reza; Begemann, Birgit; Hidalgo, Patricia; Fahlke, Christoph

2008-01-01

Eukaryotic ClC channels are dimeric proteins with each subunit forming an individual protopore. Single protopores are gated by a fast gate, whereas the slow gate is assumed to control both protopores through a cooperative movement of the two carboxy-terminal domains. We here study the role of the carboxy-terminal domain in modulating fast and slow gating of human ClC-2 channels, a ubiquitously expressed ClC-type chloride channel involved in transepithelial solute transport and in neuronal chloride homeostasis. Partial truncation of the carboxy-terminus abolishes function of ClC-2 by locking the channel in a closed position. However, unlike other isoforms, its complete removal preserves function of ClC-2. ClC-2 channels without the carboxy-terminus exhibit fast and slow gates that activate and deactivate significantly faster than in WT channels. In contrast to the prevalent view, a single carboxy-terminus suffices for normal slow gating, whereas both domains regulate fast gating of individual protopores. Our findings demonstrate that the carboxy-terminus is not strictly required for slow gating and that the cooperative gating resides in other regions of the channel protein. ClC-2 is expressed in neurons and believed to open at negative potentials and increased internal chloride concentrations after intense synaptic activity. We propose that the function of the ClC-2 carboxy-terminus is to slow down the time course of channel activation in order to stabilize neuronal excitability PMID:18801843

Gating of human ClC-2 chloride channels and regulation by carboxy-terminal domains.

PubMed

Garcia-Olivares, Jennie; Alekov, Alexi; Boroumand, Mohammad Reza; Begemann, Birgit; Hidalgo, Patricia; Fahlke, Christoph

2008-11-15

Eukaryotic ClC channels are dimeric proteins with each subunit forming an individual protopore. Single protopores are gated by a fast gate, whereas the slow gate is assumed to control both protopores through a cooperative movement of the two carboxy-terminal domains. We here study the role of the carboxy-terminal domain in modulating fast and slow gating of human ClC-2 channels, a ubiquitously expressed ClC-type chloride channel involved in transepithelial solute transport and in neuronal chloride homeostasis. Partial truncation of the carboxy-terminus abolishes function of ClC-2 by locking the channel in a closed position. However, unlike other isoforms, its complete removal preserves function of ClC-2. ClC-2 channels without the carboxy-terminus exhibit fast and slow gates that activate and deactivate significantly faster than in WT channels. In contrast to the prevalent view, a single carboxy-terminus suffices for normal slow gating, whereas both domains regulate fast gating of individual protopores. Our findings demonstrate that the carboxy-terminus is not strictly required for slow gating and that the cooperative gating resides in other regions of the channel protein. ClC-2 is expressed in neurons and believed to open at negative potentials and increased internal chloride concentrations after intense synaptic activity. We propose that the function of the ClC-2 carboxy-terminus is to slow down the time course of channel activation in order to stabilize neuronal excitability.

Diminished auditory sensory gating during active auditory verbal hallucinations.

PubMed

Thoma, Robert J; Meier, Andrew; Houck, Jon; Clark, Vincent P; Lewine, Jeffrey D; Turner, Jessica; Calhoun, Vince; Stephen, Julia

2017-10-01

Auditory sensory gating, assessed in a paired-click paradigm, indicates the extent to which incoming stimuli are filtered, or "gated", in auditory cortex. Gating is typically computed as the ratio of the peak amplitude of the event related potential (ERP) to a second click (S2) divided by the peak amplitude of the ERP to a first click (S1). Higher gating ratios are purportedly indicative of incomplete suppression of S2 and considered to represent sensory processing dysfunction. In schizophrenia, hallucination severity is positively correlated with gating ratios, and it was hypothesized that a failure of sensory control processes early in auditory sensation (gating) may represent a larger system failure within the auditory data stream; resulting in auditory verbal hallucinations (AVH). EEG data were collected while patients (N=12) with treatment-resistant AVH pressed a button to indicate the beginning (AVH-on) and end (AVH-off) of each AVH during a paired click protocol. For each participant, separate gating ratios were computed for the P50, N100, and P200 components for each of the AVH-off and AVH-on states. AVH trait severity was assessed using the Psychotic Symptoms Rating Scales AVH Total score (PSYRATS). The results of a mixed model ANOVA revealed an overall effect for AVH state, such that gating ratios were significantly higher during the AVH-on state than during AVH-off for all three components. PSYRATS score was significantly and negatively correlated with N100 gating ratio only in the AVH-off state. These findings link onset of AVH with a failure of an empirically-defined auditory inhibition system, auditory sensory gating, and pave the way for a sensory gating model of AVH. Copyright © 2017 Elsevier B.V. All rights reserved.

Effects of doping and bias voltage on the screening in AAA-stacked trilayer graphene

NASA Astrophysics Data System (ADS)

Mohammadi, Yawar; Moradian, Rostam; Shirzadi Tabar, Farzad

2014-09-01

We calculate the static polarization of AAA-stacked trilayer graphene (TLG) and study its screening properties within the random phase approximation (RPA) in all undoped, doped and biased regimes. We find that the static polarization of undoped AAA-stacked TLG is a combination of the doped and undoped single-layer graphene static polarization. This leads to an enhancement of the dielectric background constant along a Thomas-Fermi screening with the Thomas-Fermi wave vector which is independent of carrier concentrations and a 1/r3 power law decay for the long-distance behavior of the screened Coulomb potential. We show that effects of a bias voltage can be taken into account by a renormalization of the interlayer hopping energy to a new bias-voltage-dependent value, indicating screening properties of AAA-stacked TLG can be tuned electrically. We also find that screening properties of doped AAA-stacked TLG, when μ exceeds √{2}γ, are similar to that of doped SLG only depending on doping. While for μ<√{2}γ, its screening properties are combination of SLG and AA-stacked bilayer graphene screening properties and they are determined by doping and the interlayer hopping energy.

The X3LYP extended density functional accurately describes H-bonding but fails completely for stacking.

PubMed

Cerný, Jirí; Hobza, Pavel

2005-04-21

The performance of the recently introduced X3LYP density functional which was claimed to significantly improve the accuracy for H-bonded and van der Waals complexes was tested for extended H-bonded and stacked complexes (nucleic acid base pairs and amino acid pairs). In the case of planar H-bonded complexes (guanine...cytosine, adenine...thymine) the DFT results nicely agree with accurate correlated ab initio results. For the stacked pairs (uracil dimer, cytosine dimer, adenine...thymine and guanine...cytosine) the DFT fails completely and it was even not able to localize any minimum at the stacked subspace of the potential energy surface. The geometry optimization of all these stacked clusters leads systematically to the planar H-bonded pairs. The amino acid pairs were investigated in the crystal geometry. DFT again strongly underestimates the accurate correlated ab initio stabilization energies and usually it was not able to describe the stabilization of a pair. The X3LYP functional thus behaves similarly to other current functionals. Stacking of nucleic acid bases as well as interaction of amino acids was described satisfactorily by using the tight-binding DFT method, which explicitly covers the London dispersion energy.

Taxonomy of multi-focal nematode image stacks by a CNN based image fusion approach.

PubMed

Liu, Min; Wang, Xueping; Zhang, Hongzhong

2018-03-01

In the biomedical field, digital multi-focal images are very important for documentation and communication of specimen data, because the morphological information for a transparent specimen can be captured in form of a stack of high-quality images. Given biomedical image stacks containing multi-focal images, how to efficiently extract effective features from all layers to classify the image stacks is still an open question. We present to use a deep convolutional neural network (CNN) image fusion based multilinear approach for the taxonomy of multi-focal image stacks. A deep CNN based image fusion technique is used to combine relevant information of multi-focal images within a given image stack into a single image, which is more informative and complete than any single image in the given stack. Besides, multi-focal images within a stack are fused along 3 orthogonal directions, and multiple features extracted from the fused images along different directions are combined by canonical correlation analysis (CCA). Because multi-focal image stacks represent the effect of different factors - texture, shape, different instances within the same class and different classes of objects, we embed the deep CNN based image fusion method within a multilinear framework to propose an image fusion based multilinear classifier. The experimental results on nematode multi-focal image stacks demonstrated that the deep CNN image fusion based multilinear classifier can reach a higher classification rate (95.7%) than that by the previous multilinear based approach (88.7%), even we only use the texture feature instead of the combination of texture and shape features as in the previous work. The proposed deep CNN image fusion based multilinear approach shows great potential in building an automated nematode taxonomy system for nematologists. It is effective to classify multi-focal image stacks. Copyright © 2018 Elsevier B.V. All rights reserved.

Visual offline sample stacking via moving neutralization boundary electrophoresis for analysis of heavy metal ion.

PubMed

Fan, Yinping; Li, Shan; Fan, Liuyin; Cao, Chengxi

2012-06-15

In this paper, a moving neutralization boundary (MNB) electrophoresis is developed as a novel model of visual offline sample stacking for the trace analysis of heavy metal ions (HMIs). In the stacking system, the cathodic-direction motion MNB is designed with 1.95-2.8mM HCl+98 mM KCl in phase alfa and 4.0mM NaOH+96 mM KCl in phase beta. If a little of HMI is present in phase alfa, the metal ion electrically migrates towards the MNB and react with hydroxyl ion, producing precipitation and moving precipitation boundary (MPB). The alkaline precipitation is neutralized by hydrogen ion, leading to a moving eluting boundary (MEB), release of HMI from its precipitation, circle of HMI from the MEB to the MPB, and highly efficient visual stacking. As a proof of concept, a set of metal ions (Cu(II), Co(II), Mn(II), Pb(II) and Cr(III)) were chosen as the model HMIs and capillary electrophoresis (CE) was selected as an analytical tool for the experiments demonstrating the feasibility of MNB-based stacking. As shown in this paper, (i) the visual stacking model was manifested by the experiments; (ii) there was a controllable stacking of HMI in the MNB system; (iii) the offline stacking could achieve higher than 123 fold preconcentration; and (iv) the five HMIs were simultaneously stacked via the developed stacking technique for the trace analyses with the limits of detection (LOD): 3.67×10(-3) (Cu(II)), 1.67×10(-3) (Co(II), 4.17×10(-3) (Mn(II)), 4.6×10(-4) (Pb(II)) and 8.40×10(-4)mM (Cr(III)). Even the off-line stacking was demonstrated for the use of CE-based HMI analysis, it has potential applications in atomic absorption spectroscopy (AAS), inductively coupled plasma-mass spectrometry (ICP-MS) and ion chromatography (IC) etc. Copyright © 2012 Elsevier B.V. All rights reserved.

Molecular Targets for Antiepileptic Drug Development

PubMed Central

Meldrum, Brian S.; Rogawski, Michael A.

2007-01-01

Summary This review considers how recent advances in the physiology of ion channels and other potential molecular targets, in conjunction with new information on the genetics of idiopathic epilepsies, can be applied to the search for improved antiepileptic drugs (AEDs). Marketed AEDs predominantly target voltage-gated cation channels (the α subunits of voltage-gated Na+ channels and also T-type voltage-gated Ca2+ channels) or influence GABA-mediated inhibition. Recently, α2–δ voltage-gated Ca2+ channel subunits and the SV2A synaptic vesicle protein have been recognized as likely targets. Genetic studies of familial idiopathic epilepsies have identified numerous genes associated with diverse epilepsy syndromes, including genes encoding Na+ channels and GABAA receptors, which are known AED targets. A strategy based on genes associated with epilepsy in animal models and humans suggests other potential AED targets, including various voltage-gated Ca2+ channel subunits and auxiliary proteins, A- or M-type voltage-gated K+ channels, and ionotropic glutamate receptors. Recent progress in ion channel research brought about by molecular cloning of the channel subunit proteins and studies in epilepsy models suggest additional targets, including G-protein-coupled receptors, such as GABAB and metabotropic glutamate receptors; hyperpolarization-activated cyclic nucleotide-gated cation (HCN) channel subunits, responsible for hyperpolarization-activated current Ih; connexins, which make up gap junctions; and neurotransmitter transporters, particularly plasma membrane and vesicular transporters for GABA and glutamate. New information from the structural characterization of ion channels, along with better understanding of ion channel function, may allow for more selective targeting. For example, Na+ channels underlying persistent Na+ currents or GABAA receptor isoforms responsible for tonic (extrasynaptic) currents represent attractive targets. The growing understanding of the pathophysiology of epilepsy and the structural and functional characterization of the molecular targets provide many opportunities to create improved epilepsy therapies. PMID:17199015

Differential effect of brief electrical stimulation on voltage-gated potassium channels

PubMed Central

Al Abed, Amr; Buskila, Yossi; Dokos, Socrates; Lovell, Nigel H.; Morley, John W.

2017-01-01

Electrical stimulation of neuronal tissue is a promising strategy to treat a variety of neurological disorders. The mechanism of neuronal activation by external electrical stimulation is governed by voltage-gated ion channels. This stimulus, typically brief in nature, leads to membrane potential depolarization, which increases ion flow across the membrane by increasing the open probability of these voltage-gated channels. In spiking neurons, it is activation of voltage-gated sodium channels (NaV channels) that leads to action potential generation. However, several other types of voltage-gated channels are expressed that also respond to electrical stimulation. In this study, we examine the response of voltage-gated potassium channels (KV channels) to brief electrical stimulation by whole cell patch-clamp electrophysiology and computational modeling. We show that nonspiking amacrine neurons of the retina exhibit a large variety of responses to stimulation, driven by different KV-channel subtypes. Computational modeling reveals substantial differences in the response of specific KV-channel subtypes that is dependent on channel kinetics. This suggests that the expression levels of different KV-channel subtypes in retinal neurons are a crucial predictor of the response that can be obtained. These data expand our knowledge of the mechanisms of neuronal activation and suggest that KV-channel expression is an important determinant of the sensitivity of neurons to electrical stimulation. NEW & NOTEWORTHY This paper describes the response of various voltage-gated potassium channels (KV channels) to brief electrical stimulation, such as is applied during prosthetic electrical stimulation. We show that the pattern of response greatly varies between KV channel subtypes depending on activation and inactivation kinetics of each channel. Our data suggest that problems encountered when artificially stimulating neurons such as cessation in firing at high frequencies, or “fading,” may be attributed to KV-channel activation. PMID:28202576

The separate and combined effects of monoamine oxidase inhibition and nicotine on P50 sensory gating.

PubMed

Smith, Dylan M; Fisher, Derek; Blier, Pierre; Illivitsky, Vadim; Knott, Verner

2015-06-01

The cognitive effects of nicotine in humans remain a topic of great interest, due to the continued prevalence of cigarette smoking in society as well as the hypothesis that cognitively impaired populations such as schizophrenia patients use nicotine as a means of self-medicating against deficits of sensory gating. However, chronic smoking can predispose individuals to robust monoamine oxidase (MAO) inhibition, and thus far, the effect of MAO inhibition on human sensory gating is unknown. In this study, we investigated the effects of both nicotine (6-mg gum) and pharmacologically induced MAO-A inhibition via moclobemide (75 mg) on P50 event-related potential-indexed sensory gating in a sample of 24 healthy non-smoking males. Ratio score (rP50) measured gating revealed significant improvement in auditory stimulus suppression after combined nicotine and MAO-A inhibition compared to placebo and to the nicotine-alone condition. This nicotine + MAO-A inhibition-induced efficient gating was consistent regardless of participants' baseline (placebo) gating efficiency, despite the observation that nicotine in the absence of MAO-A inhibition exhibited a detrimental effect on gating in participants with high baseline suppression ratios. Nicotine and monoamine oxidase-inhibiting agents in tobacco smoke appear to exert a synergistic effect on sensory gating, which may contribute to the elevated dependence rates seen in populations with cognitive deficits such as schizophrenia.

Temperature-sensitive gating of TRPV1 channel as probed by atomistic simulations of its trans- and juxtamembrane domains

NASA Astrophysics Data System (ADS)

Chugunov, Anton O.; Volynsky, Pavel E.; Krylov, Nikolay A.; Nolde, Dmitry E.; Efremov, Roman G.

2016-09-01

Heat-activated transient receptor potential channel TRPV1 is one of the most studied eukaryotic proteins involved in temperature sensation. Upon heating, it exhibits rapid reversible pore gating, which depolarizes neurons and generates action potentials. Underlying molecular details of such effects in the pore region of TRPV1 is of a crucial importance to control temperature responses of the organism. Despite the spatial structure of the channel in both open (O) and closed (C) states is known, microscopic nature of channel gating and mechanism of thermal sensitivity are still poorly understood. In this work, we used unrestrained atomistic molecular dynamics simulations of TRPV1 (without N- and C-terminal cytoplasmic domains) embedded into explicit lipid bilayer in its O- and C-states. We found that the pore domain with its neighboring loops undergoes large temperature-dependent conformational transitions in an asymmetric way, when fragments of only one monomer move with large amplitude, freeing the pore upon heating. Such an asymmetrical gating looks rather biologically relevant because it is faster and more reliable than traditionally proposed “iris-like” symmetric scheme of channel opening. Analysis of structural, dynamic, and hydrophobic organization of the pore domain revealed entropy growth upon TRPV1 gating, which is in line with current concepts of thermal sensitivity.

From Toxins Targeting Ligand Gated Ion Channels to Therapeutic Molecules

PubMed Central

Nasiripourdori, Adak; Taly, Valérie; Grutter, Thomas; Taly, Antoine

2011-01-01

Ligand-gated ion channels (LGIC) play a central role in inter-cellular communication. This key function has two consequences: (i) these receptor channels are major targets for drug discovery because of their potential involvement in numerous human brain diseases; (ii) they are often found to be the target of plant and animal toxins. Together this makes toxin/receptor interactions important to drug discovery projects. Therefore, toxins acting on LGIC are presented and their current/potential therapeutic uses highlighted. PMID:22069709

Model simulations of potential contribution of the proposed Huangpu Gate to flood control in the Lake Taihu basin of China

NASA Astrophysics Data System (ADS)

Zhang, Hanghui; Liu, Shuguang; Ye, Jianchun; Yeh, Pat J.-F.

2017-10-01

The Lake Taihu basin (36 895 km2), one of the most developed regions in China located in the hinterland of the Yangtze River Delta, has experienced increasing flood risk. The largest flood in history occurred in 1999 with a return period estimate of 200 years, considerably larger than the current capacity of the flood defense with a design return period of 50 years. Due to its flat saucer-like terrain, the capacity of the flood control system in this basin depends on flood control infrastructures and peripheral tidal conditions. The Huangpu River, an important river of the basin connecting Lake Taihu upstream and Yangtze River estuaries downstream, drains two-fifths of the entire basin. Since the water level in the Huangpu River is significantly affected by the high tide conditions in estuaries, constructing an estuary gate is considered an effective solution for flood mitigation. The main objective of this paper is to assess the potential contributions of the proposed Huangpu Gate to the flood control capacity of the basin. To achieve this goal, five different scenarios of flooding conditions and the associated gate operations are considered by using numerical model simulations. Results of quantitative analyses show that the Huangpu Gate is effective for evacuating floodwaters. It can help to reduce both peak values and duration of high water levels in Lake Taihu to benefit surrounding areas along the Taipu Canal and the Huangpu River. The contribution of the gate to the flood control capacity is closely associated with its operation modes and duration. For the maximum potential contribution of the gate, the net outflow at the proposed site is increased by 52 %. The daily peak level is decreased by a maximum of 0.12 m in Lake Taihu, by maxima of 0.26-0.37 and 0.46-0.60 m in the Taipu Canal and the Huangpu River, respectively, and by 0.05-0.39 m in the surrounding areas depending on the local topography. It is concluded that the proposed Huangpu Gate can reduce flood risk in the Lake Taihu basin, especially in those low-lying surrounding areas along the Taipu Canal and the Huangpu River significantly, which is of great benefit to the flood management in the basin and the Yangtze River Delta.

Direct Evidence of Conformational Changes Associated with Voltage Gating in a Voltage Sensor Protein by Time-Resolved X-ray/Neutron Interferometry

PubMed Central

2015-01-01

The voltage sensor domain (VSD) of voltage-gated cation (e.g., Na+, K+) channels central to neurological signal transmission can function as a distinct module. When linked to an otherwise voltage-insensitive, ion-selective membrane pore, the VSD imparts voltage sensitivity to the channel. Proteins homologous with the VSD have recently been found to function themselves as voltage-gated proton channels or to impart voltage sensitivity to enzymes. Determining the conformational changes associated with voltage gating in the VSD itself in the absence of a pore domain thereby gains importance. We report the direct measurement of changes in the scattering-length density (SLD) profile of the VSD protein, vectorially oriented within a reconstituted phospholipid bilayer membrane, as a function of the transmembrane electric potential by time-resolved X-ray and neutron interferometry. The changes in the experimental SLD profiles for both polarizing and depolarizing potentials with respect to zero potential were found to extend over the entire length of the isolated VSD’s profile structure. The characteristics of the changes observed were in qualitative agreement with molecular dynamics simulations of a related membrane system, suggesting an initial interpretation of these changes in terms of the VSD’s atomic-level 3-D structure. PMID:24697545

Synthesizing Biomolecule-based Boolean Logic Gates

PubMed Central

Miyamoto, Takafumi; Razavi, Shiva; DeRose, Robert; Inoue, Takanari

2012-01-01

One fascinating recent avenue of study in the field of synthetic biology is the creation of biomolecule-based computers. The main components of a computing device consist of an arithmetic logic unit, the control unit, memory, and the input and output devices. Boolean logic gates are at the core of the operational machinery of these parts, hence to make biocomputers a reality, biomolecular logic gates become a necessity. Indeed, with the advent of more sophisticated biological tools, both nucleic acid- and protein-based logic systems have been generated. These devices function in the context of either test tubes or living cells and yield highly specific outputs given a set of inputs. In this review, we discuss various types of biomolecular logic gates that have been synthesized, with particular emphasis on recent developments that promise increased complexity of logic gate circuitry, improved computational speed, and potential clinical applications. PMID:23526588

Free energy dissipation of the spontaneous gating of a single voltage-gated potassium channel.

PubMed

Wang, Jia-Zeng; Wang, Rui-Zhen

2018-02-01

Potassium channels mainly contribute to the resting potential and re-polarizations, with the potassium electrochemical gradient being maintained by the pump Na + /K + -ATPase. In this paper, we construct a stochastic model mimicking the kinetics of a potassium channel, which integrates temporal evolving of the membrane voltage and the spontaneous gating of the channel. Its stationary probability density functions (PDFs) are found to be singular at the boundaries, which result from the fact that the evolving rates of voltage are greater than the gating rates of the channel. We apply PDFs to calculate the power dissipations of the potassium current, the leakage, and the gating currents. On a physical perspective, the essential role of the system is the K + -battery charging the leakage (L-)battery. A part of power will inevitably be dissipated among the process. So, the efficiency of energy transference is calculated.

Mechanism of activation at the selectivity filter of the KcsA K+ channel

PubMed Central

Heer, Florian T; Posson, David J; Wojtas-Niziurski, Wojciech

2017-01-01

Potassium channels are opened by ligands and/or membrane potential. In voltage-gated K+ channels and the prokaryotic KcsA channel, conduction is believed to result from opening of an intracellular constriction that prevents ion entry into the pore. On the other hand, numerous ligand-gated K+ channels lack such gate, suggesting that they may be activated by a change within the selectivity filter, a narrow region at the extracellular side of the pore. Using molecular dynamics simulations and electrophysiology measurements, we show that ligand-induced conformational changes in the KcsA channel removes steric restraints at the selectivity filter, thus resulting in structural fluctuations, reduced K+ affinity, and increased ion permeation. Such activation of the selectivity filter may be a universal gating mechanism within K+ channels. The occlusion of the pore at the level of the intracellular gate appears to be secondary. PMID:28994652

Scaling Trapped Ion Quantum Computers Using Fast Gates and Microtraps

NASA Astrophysics Data System (ADS)

Ratcliffe, Alexander K.; Taylor, Richard L.; Hope, Joseph J.; Carvalho, André R. R.

2018-06-01

Most attempts to produce a scalable quantum information processing platform based on ion traps have focused on the shuttling of ions in segmented traps. We show that an architecture based on an array of microtraps with fast gates will outperform architectures based on ion shuttling. This system requires higher power lasers but does not require the manipulation of potentials or shuttling of ions. This improves optical access, reduces the complexity of the trap, and reduces the number of conductive surfaces close to the ions. The use of fast gates also removes limitations on the gate time. Error rates of 10-5 are shown to be possible with 250 mW laser power and a trap separation of 100 μ m . The performance of the gates is shown to be robust to the limitations in the laser repetition rate and the presence of many ions in the trap array.