Integrated all-optical programmable logic array based on semiconductor optical amplifiers.
Dong, Wenchan; Huang, Zhuyang; Hou, Jie; Santos, Rui; Zhang, Xinliang
2018-05-01
The all-optical programmable logic array (PLA) is one of the most important optical complex logic devices that can implement combinational logic functions. In this Letter, we propose and experimentally demonstrate an integrated all-optical PLA at the operation speed of 40 Gb/s. The PLA mainly consists of a delay interferometer (DI) and semiconductor optical amplifiers (SOAs) of different lengths. The DI is used to pre-code the input signals and improve the reconfigurability of the scheme. The longer SOAs are nonlinear media for generating canonical logic units (CLUs) using four-wave mixing. The shorter SOAs are used to select the appropriate CLUs by changing the working states; then reconfigurable logic functions can be output directly. The results show that all the CLUs are realized successfully, and the optical signal-to-noise ratios are above 22 dB. The exclusive NOR gate and exclusive OR gate are experimentally demonstrated based on output CLUs.
Field-programmable logic devices with optical input-output.
Szymanski, T H; Saint-Laurent, M; Tyan, V; Au, A; Supmonchai, B
2000-02-10
A field-programmable logic device (FPLD) with optical I/O is described. FPLD's with optical I/O can have their functionality specified in the field by means of downloading a control-bit stream and can be used in a wide range of applications, such as optical signal processing, optical image processing, and optical interconnects. Our device implements six state-of-the-art dynamically programmable logic arrays (PLA's) on a 2 mm x 2 mm die. The devices were fabricated through the Lucent Technologies-Advanced Research Projects Agency-Consortium for Optical and Optoelectronic Technologies in Computing (Lucent/ARPA/COOP) workshop by use of 0.5-microm complementary metal-oxide semiconductor-self-electro-optic device technology and were delivered in 1998. All devices are fully functional: The electronic data paths have been verified at 200 MHz, and optical tests are pending. The device has been programmed to implement a two-stage optical switching network with six 4 x 4 crossbar switches, which can realize more than 190 x 10(6) unique programmable input-output permutations. The same device scaled to a 2 cm x 2 cm substrate could support as many as 4000 optical I/O and 1 Tbit/s of optical I/O bandwidth and offer fully programmable digital functionality with approximately 110,000 programmable logic gates. The proposed optoelectronic FPLD is also ideally suited to realizing dense, statically reconfigurable crossbar switches. We describe an attractive application area for such devices: a rearrangeable three-stage optical switch for a wide-area-network backbone, switching 1000 traffic streams at the OC-48 data rate and supporting several terabits of traffic.
All optical programmable logic array (PLA)
NASA Astrophysics Data System (ADS)
Hiluf, Dawit
2018-03-01
A programmable logic array (PLA) is an integrated circuit (IC) logic device that can be reconfigured to implement various kinds of combinational logic circuits. The device has a number of AND and OR gates which are linked together to give output or further combined with more gates or logic circuits. This work presents the realization of PLAs via the physics of a three level system interacting with light. A programmable logic array is designed such that a number of different logical functions can be combined as a sum-of-product or product-of-sum form. We present an all optical PLAs with the aid of laser light and observables of quantum systems, where encoded information can be considered as memory chip. The dynamics of the physical system is investigated using Lie algebra approach.
Optical reversible programmable Boolean logic unit.
Chattopadhyay, Tanay
2012-07-20
Computing with reversibility is the only way to avoid dissipation of energy associated with bit erase. So, a reversible microprocessor is required for future computing. In this paper, a design of a simple all-optical reversible programmable processor is proposed using a polarizing beam splitter, liquid crystal-phase spatial light modulators, a half-wave plate, and plane mirrors. This circuit can perform 16 logical operations according to three programming inputs. Also, inputs can be easily recovered from the outputs. It is named the "reversible programmable Boolean logic unit (RPBLU)." The logic unit is the basic building block of many complex computational operations. Hence the design is important in sense. Two orthogonally polarized lights are defined here as two logical states, respectively.
Optical programmable Boolean logic unit.
Chattopadhyay, Tanay
2011-11-10
Logic units are the building blocks of many important computational operations likes arithmetic, multiplexer-demultiplexer, radix conversion, parity checker cum generator, etc. Multifunctional logic operation is very much essential in this respect. Here a programmable Boolean logic unit is proposed that can perform 16 Boolean logical operations from a single optical input according to the programming input without changing the circuit design. This circuit has two outputs. One output is complementary to the other. Hence no loss of data can occur. The circuit is basically designed by a 2×2 polarization independent optical cross bar switch. Performance of the proposed circuit has been achieved by doing numerical simulations. The binary logical states (0,1) are represented by the absence of light (null) and presence of light, respectively.
Expanded all-optical programmable logic array based on multi-input/output canonical logic units.
Lei, Lei; Dong, Jianji; Zou, Bingrong; Wu, Zhao; Dong, Wenchan; Zhang, Xinliang
2014-04-21
We present an expanded all-optical programmable logic array (O-PLA) using multi-input and multi-output canonical logic units (CLUs) generation. Based on four-wave mixing (FWM) in highly nonlinear fiber (HNLF), two-input and three-input CLUs are simultaneously achieved in five different channels with an operation speed of 40 Gb/s. Clear temporal waveforms and wide open eye diagrams are successfully observed. The effectiveness of the scheme is validated by extinction ratio and optical signal-to-noise ratio measurements. The computing capacity, defined as the total amount of logic functions achieved by the O-PLA, is discussed in detail. For a three-input O-PLA, the computing capacity of the expanded CLUs-PLA is more than two times as large as that of the standard CLUs-PLA, and this multiple will increase to more than three and a half as the idlers are individually independent.
Optical triple-in digital logic using nonlinear optical four-wave mixing
NASA Astrophysics Data System (ADS)
Widjaja, Joewono; Tomita, Yasuo
1995-08-01
A new programmable optical processor is proposed for implementing triple-in combinatorial digital logic that uses four-wave mixing. Binary-coded decimal-to-octal decoding is experimentally demonstrated by use of a photorefractive BaTiO 3 crystal. The result confirms the feasibility of the proposed system.
Optically Programmable Field Programmable Gate Arrays (FPGA) Systems
2004-01-01
VCSEL requires placing the array far enough as to overlap the entire footprint of the signal beam in order to record the hologram. Therefore, these...hologram that self-focuses, due to phase -conjugation, on the array of detectors in the chip. VC A 10 m m 10 mm 18mm 16mm SEL RRAY OPTICAL MEMORY LOGIC...the VCSEL array , the chip and the optical material, and the requirements they have to meet for their use in the OPGA system. Section
NASA Astrophysics Data System (ADS)
Okamoto, Satoru; Sato, Takehiro; Yamanaka, Naoaki
2017-01-01
In this paper, flexible and highly reliable metro and access integrated networks with network virtualization and software defined networking technologies will be presented. Logical optical line terminal (L-OLT) technologies and active optical distribution networks (ODNs) are the key to introduce flexibility and high reliability into the metro and access integrated networks. In the Elastic Lambda Aggregation Network (EλAN) project which was started in 2012, a concept of the programmable optical line terminal (P-OLT) has been proposed. A role of the P-OLT is providing multiple network services that have different protocols and quality of service requirements by single OLT box. Accommodated services will be Internet access, mobile front-haul/back-haul, data-center access, and leased line. L-OLTs are configured within the P-OLT box to support the functions required for each network service. Multiple P-OLTs and programmable optical network units (P-ONUs) are connected by the active ODN. Optical access paths which have flexible capacity are set on the ODN to provide network services from L-OLT to logical ONUs (L-ONUs). The L-OLT to L-ONU path on the active ODN provides a logical connection. Therefore, introducing virtualization technologies becomes possible. One example is moving an L-OLT from one P-OLT to another P-OLT like a virtual machine. This movement is called L-OLT migration. The L-OLT migration provides flexible and reliable network functions such as energy saving by aggregating L-OLTs to a limited number of P-OLTs, and network wide optical access path restoration. Other L-OLT virtualization technologies and experimental results will be also discussed in the paper.
Optically programmable encoder based on light propagation in two-dimensional regular nanoplates.
Li, Ya; Zhao, Fangyin; Guo, Shuai; Zhang, Yongyou; Niu, Chunhui; Zeng, Ruosheng; Zou, Bingsuo; Zhang, Wensheng; Ding, Kang; Bukhtiar, Arfan; Liu, Ruibin
2017-04-07
We design an efficient optically controlled microdevice based on CdSe nanoplates. Two-dimensional CdSe nanoplates exhibit lighting patterns around the edges and can be realized as a new type of optically controlled programmable encoder. The light source is used to excite the nanoplates and control the logical position under vertical pumping mode by the objective lens. At each excitation point in the nanoplates, the preferred light-propagation routes are along the normal direction and perpendicular to the edges, which then emit out from the edges to form a localized lighting section. The intensity distribution around the edges of different nanoplates demonstrates that the lighting part with a small scale is much stronger, defined as '1', than the dark section, defined as '0', along the edge. These '0' and '1' are the basic logic elements needed to compose logically functional devices. The observed propagation rules are consistent with theoretical simulations, meaning that the guided-light route in two-dimensional semiconductor nanoplates is regular and predictable. The same situation was also observed in regular CdS nanoplates. Basic theoretical analysis and experiments prove that the guided light and exit position follow rules mainly originating from the shape rather than material itself.
Programmable logic controller optical fibre sensor interface module
NASA Astrophysics Data System (ADS)
Allwood, Gary; Wild, Graham; Hinckley, Steven
2011-12-01
Most automated industrial processes use Distributed Control Systems (DCSs) or Programmable Logic Controllers (PLCs) for automated control. PLCs tend to be more common as they have much of the functionality of DCSs, although they are generally cheaper to install and maintain. PLCs in conjunction with a human machine interface form the basis of Supervisory Control And Data Acquisition (SCADA) systems, combined with communication infrastructure and Remote Terminal Units (RTUs). RTU's basically convert different sensor measurands in to digital data that is sent back to the PLC or supervisory system. Optical fibre sensors are becoming more common in industrial processes because of their many advantageous properties. Being small, lightweight, highly sensitive, and immune to electromagnetic interference, means they are an ideal solution for a variety of diverse sensing applications. Here, we have developed a PLC Optical Fibre Sensor Interface Module (OFSIM), in which an optical fibre is connected directly to the OFSIM located next to the PLC. The embedded fibre Bragg grating sensors, are highly sensitive and can detect a number of different measurands such as temperature, pressure and strain without the need for a power supply.
NASA Astrophysics Data System (ADS)
Feng, M.; Holonyak, N.; Wang, C. Y.
2017-09-01
Optical bistable devices are fundamental to digital photonics as building blocks of switches, logic gates, and memories in future computer systems. Here, we demonstrate both optical and electrical bistability and capability for switching in a single transistor operated at room temperature. The electro-optical hysteresis is explained by the interaction of electron-hole (e-h) generation and recombination dynamics with the cavity photon modulation in different switching paths. The switch-UP and switch-DOWN threshold voltages are determined by the rate difference of photon generation at the base quantum-well and the photon absorption via intra-cavity photon-assisted tunneling controlled by the collector voltage. Thus, the transistor laser electro-optical bistable switching is programmable with base current and collector voltage, and the basis for high speed optical logic processors.
KM3NeT Digital Optical Module electronics
NASA Astrophysics Data System (ADS)
Real, Diego
2016-04-01
The KM3NeT collaboration is currently building of a neutrino telescope with a volume of several cubic kilometres at the bottom of the Mediterranean Sea. The telescope consists of a matrix of Digital Optical Modules that will detect the Cherenkov light originated by the interaction of the neutrinos in the proximity of the detector. This contribution describes the main components of the read-out electronics of the Digital Optical Module: the Power Board, which delivers all the power supply required by the Digital Optical Molule electronics; the Central Logic Board, the main core of the read-out system, hosting 31 Time to Digital Converters with 1 ns resolution and the White Rabbit protocol embedded in the Central Logic Board Field Programmable Gate Array; the Octopus boards, that transfer the Low Voltage Digital Signals from the PMT bases to the Central Logic Board and finally the PMT bases, in charge of converting the analogue signal produced in the 31 3" PMTs into a Low Voltage Digital Signal.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Nishimura, Takahiro, E-mail: t-nishimura@ist.osaka-u.ac.jp; Fujii, Ryo; Ogura, Yusuke
Molecular logic circuits represent a promising technology for observation and manipulation of biological systems at the molecular level. However, the implementation of molecular logic circuits for temporal and programmable operation remains challenging. In this paper, we demonstrate an optically controllable logic circuit that uses fluorescence resonance energy transfer (FRET) for signaling. The FRET-based signaling process is modulated by both molecular and optical inputs. Based on the distance dependence of FRET, the FRET pathways required to execute molecular logic operations are formed on a DNA nanostructure as a circuit based on its molecular inputs. In addition, the FRET pathways on themore » DNA nanostructure are controlled optically, using photoswitching fluorescent molecules to instruct the execution of the desired operation and the related timings. The behavior of the circuit can thus be controlled using external optical signals. As an example, a molecular logic circuit capable of executing two different logic operations was studied. The circuit contains functional DNAs and a DNA scaffold to construct two FRET routes for executing Input 1 AND Input 2 and Input 1 AND NOT Input 3 operations on molecular inputs. The circuit produced the correct outputs with all possible combinations of the inputs by following the light signals. Moreover, the operation execution timings were controlled based on light irradiation and the circuit responded to time-dependent inputs. The experimental results demonstrate that the circuit changes the output for the required operations following the input of temporal light signals.« less
Light-Gated Memristor with Integrated Logic and Memory Functions.
Tan, Hongwei; Liu, Gang; Yang, Huali; Yi, Xiaohui; Pan, Liang; Shang, Jie; Long, Shibing; Liu, Ming; Wu, Yihong; Li, Run-Wei
2017-11-28
Memristive devices are able to store and process information, which offers several key advantages over the transistor-based architectures. However, most of the two-terminal memristive devices have fixed functions once made and cannot be reconfigured for other situations. Here, we propose and demonstrate a memristive device "memlogic" (memory logic) as a nonvolatile switch of logic operations integrated with memory function in a single light-gated memristor. Based on nonvolatile light-modulated memristive switching behavior, a single memlogic cell is able to achieve optical and electrical mixed basic Boolean logic of reconfigurable "AND", "OR", and "NOT" operations. Furthermore, the single memlogic cell is also capable of functioning as an optical adder and digital-to-analog converter. All the memlogic outputs are memristive for in situ data storage due to the nonvolatile resistive switching and persistent photoconductivity effects. Thus, as a memdevice, the memlogic has potential for not only simplifying the programmable logic circuits but also building memristive multifunctional optoelectronics.
NASA Astrophysics Data System (ADS)
Krasilenko, Vladimir G.; Nikolsky, Alexander I.; Lazarev, Alexander A.; Lazareva, Maria V.
2010-05-01
In the paper we show that the biologically motivated conception of time-pulse encoding usage gives a set of advantages (single methodological basis, universality, tuning simplicity, learning and programming et al) at creation and design of sensor systems with parallel input-output and processing for 2D structures hybrid and next generations neuro-fuzzy neurocomputers. We show design principles of programmable relational optoelectronic time-pulse encoded processors on the base of continuous logic, order logic and temporal waves processes. We consider a structure that execute analog signal extraction, analog and time-pulse coded variables sorting. We offer optoelectronic realization of such base relational order logic element, that consists of time-pulse coded photoconverters (pulse-width and pulse-phase modulators) with direct and complementary outputs, sorting network on logical elements and programmable commutation blocks. We make technical parameters estimations of devices and processors on such base elements by simulation and experimental research: optical input signals power 0.2 - 20 uW, processing time 1 - 10 us, supply voltage 1 - 3 V, consumption power 10 - 100 uW, extended functional possibilities, learning possibilities. We discuss some aspects of possible rules and principles of learning and programmable tuning on required function, relational operation and realization of hardware blocks for modifications of such processors. We show that it is possible to create sorting machines, neural networks and hybrid data-processing systems with untraditional numerical systems and pictures operands on the basis of such quasiuniversal hardware simple blocks with flexible programmable tuning.
Graphene-ferroelectric metadevices for nonvolatile memory and reconfigurable logic-gate operations.
Kim, Woo Young; Kim, Hyeon-Don; Kim, Teun-Teun; Park, Hyun-Sung; Lee, Kanghee; Choi, Hyun Joo; Lee, Seung Hoon; Son, Jaehyeon; Park, Namkyoo; Min, Bumki
2016-01-27
Memory metamaterials are artificial media that sustain transformed electromagnetic properties without persistent external stimuli. Previous memory metamaterials were realized with phase-change materials, such as vanadium dioxide or chalcogenide glasses, which exhibit memory behaviour with respect to electrically/optically induced thermal stimuli. However, they require a thermally isolated environment for longer retention or strong optical pump for phase-change. Here we demonstrate electrically programmable nonvolatile memory metadevices realised by the hybridization of graphene, a ferroelectric and meta-atoms/meta-molecules, and extend the concept further to establish reconfigurable logic-gate metadevices. For a memory metadevice having a single electrical input, amplitude, phase and even the polarization multi-states were clearly distinguishable with a retention time of over 10 years at room temperature. Furthermore, logic-gate functionalities were demonstrated with reconfigurable logic-gate metadevices having two electrical inputs, with each connected to separate ferroelectric layers that act as the multi-level controller for the doping level of the sandwiched graphene layer.
Graphene-ferroelectric metadevices for nonvolatile memory and reconfigurable logic-gate operations
NASA Astrophysics Data System (ADS)
Kim, Woo Young; Kim, Hyeon-Don; Kim, Teun-Teun; Park, Hyun-Sung; Lee, Kanghee; Choi, Hyun Joo; Lee, Seung Hoon; Son, Jaehyeon; Park, Namkyoo; Min, Bumki
2016-01-01
Memory metamaterials are artificial media that sustain transformed electromagnetic properties without persistent external stimuli. Previous memory metamaterials were realized with phase-change materials, such as vanadium dioxide or chalcogenide glasses, which exhibit memory behaviour with respect to electrically/optically induced thermal stimuli. However, they require a thermally isolated environment for longer retention or strong optical pump for phase-change. Here we demonstrate electrically programmable nonvolatile memory metadevices realised by the hybridization of graphene, a ferroelectric and meta-atoms/meta-molecules, and extend the concept further to establish reconfigurable logic-gate metadevices. For a memory metadevice having a single electrical input, amplitude, phase and even the polarization multi-states were clearly distinguishable with a retention time of over 10 years at room temperature. Furthermore, logic-gate functionalities were demonstrated with reconfigurable logic-gate metadevices having two electrical inputs, with each connected to separate ferroelectric layers that act as the multi-level controller for the doping level of the sandwiched graphene layer.
Complete all-optical processing polarization-based binary logic gates and optical processors.
Zaghloul, Y A; Zaghloul, A R M
2006-10-16
We present a complete all-optical-processing polarization-based binary-logic system, by which any logic gate or processor can be implemented. Following the new polarization-based logic presented in [Opt. Express 14, 7253 (2006)], we develop a new parallel processing technique that allows for the creation of all-optical-processing gates that produce a unique output either logic 1 or 0 only once in a truth table, and those that do not. This representation allows for the implementation of simple unforced OR, AND, XOR, XNOR, inverter, and more importantly NAND and NOR gates that can be used independently to represent any Boolean expression or function. In addition, the concept of a generalized gate is presented which opens the door for reconfigurable optical processors and programmable optical logic gates. Furthermore, the new design is completely compatible with the old one presented in [Opt. Express 14, 7253 (2006)], and with current semiconductor based devices. The gates can be cascaded, where the information is always on the laser beam. The polarization of the beam, and not its intensity, carries the information. The new methodology allows for the creation of multiple-input-multiple-output processors that implement, by itself, any Boolean function, such as specialized or non-specialized microprocessors. Three all-optical architectures are presented: orthoparallel optical logic architecture for all known and unknown binary gates, singlebranch architecture for only XOR and XNOR gates, and the railroad (RR) architecture for polarization optical processors (POP). All the control inputs are applied simultaneously leading to a single time lag which leads to a very-fast and glitch-immune POP. A simple and easy-to-follow step-by-step algorithm is provided for the POP, and design reduction methodologies are briefly discussed. The algorithm lends itself systematically to software programming and computer-assisted design. As examples, designs of all binary gates, multiple-input gates, and sequential and non-sequential Boolean expressions are presented and discussed. The operation of each design is simply understood by a bullet train traveling at the speed of light on a railroad system preconditioned by the crossover states predetermined by the control inputs. The presented designs allow for optical processing of the information eliminating the need to convert it, back and forth, to an electronic signal for processing purposes. All gates with a truth table, including for example Fredkin, Toffoli, testable reversible logic, and threshold logic gates, can be designed and implemented using the railroad architecture. That includes any future gates not known today. Those designs and the quantum gates are not discussed in this paper.
ERIC Educational Resources Information Center
Zhu, Yi; Weng, T.; Cheng, Chung-Kuan
2009-01-01
Incorporating programmable logic devices (PLD) in digital design courses has become increasingly popular. The advantages of using PLDs, such as complex programmable logic devices (CPLDs) and field programmable gate arrays (FPGA), have been discussed before. However, previous studies have focused on the experiences from the point of view of the…
NASA Astrophysics Data System (ADS)
Krasilenko, Vladimir G.; Bardachenko, Vitaliy F.; Nikolsky, Alexander I.; Lazarev, Alexander A.
2007-04-01
In the paper we show that the biologically motivated conception of the use of time-pulse encoding gives the row of advantages (single methodological basis, universality, simplicity of tuning, training and programming et al) at creation and designing of sensor systems with parallel input-output and processing, 2D-structures of hybrid and neuro-fuzzy neurocomputers of next generations. We show principles of construction of programmable relational optoelectronic time-pulse coded processors, continuous logic, order logic and temporal waves processes, that lie in basis of the creation. We consider structure that executes extraction of analog signal of the set grade (order), sorting of analog and time-pulse coded variables. We offer optoelectronic realization of such base relational elements of order logic, which consists of time-pulse coded phototransformers (pulse-width and pulse-phase modulators) with direct and complementary outputs, sorting network on logical elements and programmable commutations blocks. We make estimations of basic technical parameters of such base devices and processors on their basis by simulation and experimental research: power of optical input signals - 0.200-20 μW, processing time - microseconds, supply voltage - 1.5-10 V, consumption power - hundreds of microwatts per element, extended functional possibilities, training possibilities. We discuss some aspects of possible rules and principles of training and programmable tuning on the required function, relational operation and realization of hardware blocks for modifications of such processors. We show as on the basis of such quasiuniversal hardware simple block and flexible programmable tuning it is possible to create sorting machines, neural networks and hybrid data-processing systems with the untraditional numerical systems and pictures operands.
1986-06-30
features of computer aided design systems and statistical quality control procedures that are generic to chip sets and processes. RADIATION HARDNESS -The...System PSP Programmable Signal Processor SSI Small Scale Integration ." TOW Tube Launched, Optically Tracked, Wire Guided TTL Transistor Transitor Logic
Programmable Logic Controllers.
ERIC Educational Resources Information Center
Insolia, Gerard; Anderson, Kathleen
This document contains a 40-hour course in programmable logic controllers (PLC), developed for a business-industry technology resource center for firms in eastern Pennsylvania by Northampton Community College. The 10 units of the course cover the following: (1) introduction to programmable logic controllers; (2) DOS primer; (3) prerequisite…
Programmable Logic Controllers. Teacher Edition.
ERIC Educational Resources Information Center
Rauh, Bob; Kaltwasser, Stan
These materials were developed for a seven-unit secondary or postsecondary education course on programmable logic controllers (PLCs) that treats most of the skills needed to work effectively with PLCs as programming skills. The seven units of the course cover the following topics: fundamentals of programmable logic controllers; contracts, timers,…
General purpose programmable accelerator board
Robertson, Perry J.; Witzke, Edward L.
2001-01-01
A general purpose accelerator board and acceleration method comprising use of: one or more programmable logic devices; a plurality of memory blocks; bus interface for communicating data between the memory blocks and devices external to the board; and dynamic programming capabilities for providing logic to the programmable logic device to be executed on data in the memory blocks.
Software Safety Assurance of Programmable Logic
NASA Technical Reports Server (NTRS)
Berens, Kalynnda
2002-01-01
Programmable Logic (PLC, FPGA, ASIC) devices are hybrids - hardware devices that are designed and programmed like software. As such, they fall in an assurance gray area. Programmable Logic is usually tested and verified as hardware, and the software aspects are ignored, potentially leading to safety or mission success concerns. The objective of this proposal is to first determine where and how Programmable Logic (PL) is used within NASA and document the current methods of assurance. Once that is known, raise awareness of the PL software aspects within the NASA engineering community and provide guidance for the use and assurance of PL form a software perspective.
Programmable pulse generator based on programmable logic and direct digital synthesis.
Suchenek, M; Starecki, T
2012-12-01
The paper presents a new approach of pulse generation which results in both wide range tunability and high accuracy of the output pulses. The concept is based on the use of programmable logic and direct digital synthesis. The programmable logic works as a set of programmable counters, while direct digital synthesis (DDS) as the clock source. Use of DDS as the clock source results in stability of the output pulses comparable to the stability of crystal oscillators and quasi-continuous tuning of the output frequency.
Active optical control system design of the SONG-China Telescope
NASA Astrophysics Data System (ADS)
Ye, Yu; Kou, Songfeng; Niu, Dongsheng; Li, Cheng; Wang, Guomin
2012-09-01
The standard SONG node structure of control system is presented. The active optical control system of the project is a distributed system, and a host computer and a slave intelligent controller are included. The host control computer collects the information from wave front sensor and sends commands to the slave computer to realize a closed loop model. For intelligent controller, a programmable logic controller (PLC) system is used. This system combines with industrial personal computer (IPC) and PLC to make up a control system with powerful and reliable.
Implementing neural nets with programmable logic
NASA Technical Reports Server (NTRS)
Vidal, Jacques J.
1988-01-01
Networks of Boolean programmable logic modules are presented as one purely digital class of artificial neural nets. The approach contrasts with the continuous analog framework usually suggested. Programmable logic networks are capable of handling many neural-net applications. They avoid some of the limitations of threshold logic networks and present distinct opportunities. The network nodes are called dynamically programmable logic modules. They can be implemented with digitally controlled demultiplexers. Each node performs a Boolean function of its inputs which can be dynamically assigned. The overall network is therefore a combinational circuit and its outputs are Boolean global functions of the network's input variables. The approach offers definite advantages for VLSI implementation, namely, a regular architecture with limited connectivity, simplicity of the control machinery, natural modularity, and the support of a mature technology.
Relay Protection and Automation Systems Based on Programmable Logic Integrated Circuits
DOE Office of Scientific and Technical Information (OSTI.GOV)
Lashin, A. V., E-mail: LashinAV@lhp.ru; Kozyrev, A. V.
One of the most promising forms of developing the apparatus part of relay protection and automation devices is considered. The advantages of choosing programmable logic integrated circuits to obtain adaptive technological algorithms in power system protection and control systems are pointed out. The technical difficulties in the problems which today stand in the way of using relay protection and automation systems are indicated and a new technology for solving these problems is presented. Particular attention is devoted to the possibility of reconfiguring the logic of these devices, using programmable logic integrated circuits.
Design of a Ferroelectric Programmable Logic Gate Array
NASA Technical Reports Server (NTRS)
MacLeod, Todd C.; Ho, Fat Duen
2003-01-01
A programmable logic gate array has been designed utilizing ferroelectric field effect transistors. The design has only a small number of gates, but this could be scaled up to a more useful size. Using FFET's in a logic array gives several advantages. First, it allows real-time programmability to the array to give high speed reconfiguration. It also allows the array to be configured nearly an unlimited number of times, unlike a FLASH FPGA. Finally, the Ferroelectric Programmable Logic Gate Array (FPLGA) can be implemented using a smaller number of transistors because of the inherent logic characteristics of an FFET. The device was only designed and modeled using Spice models of the circuit, including the FFET. The actual device was not produced. The design consists of a small array of NAND and NOR logic gates. Other gates could easily be produced. They are linked by FFET's that control the logic flow. Timing and logic tables have been produced showing the array can produce a variety of logic combinations at a real time usable speed. This device could be a prototype for a device that could be put into imbedded systems that need the high speed of hardware implementation of logic and the complexity to need to change the logic algorithm. Because of the non-volatile nature of the FFET, it would also be useful in situations that needed to program a logic array once and use it repeatedly after the power has been shut off.
Majority logic gate for 3D magnetic computing.
Eichwald, Irina; Breitkreutz, Stephan; Ziemys, Grazvydas; Csaba, György; Porod, Wolfgang; Becherer, Markus
2014-08-22
For decades now, microelectronic circuits have been exclusively built from transistors. An alternative way is to use nano-scaled magnets for the realization of digital circuits. This technology, known as nanomagnetic logic (NML), may offer significant improvements in terms of power consumption and integration densities. Further advantages of NML are: non-volatility, radiation hardness, and operation at room temperature. Recent research focuses on the three-dimensional (3D) integration of nanomagnets. Here we show, for the first time, a 3D programmable magnetic logic gate. Its computing operation is based on physically field-interacting nanometer-scaled magnets arranged in a 3D manner. The magnets possess a bistable magnetization state representing the Boolean logic states '0' and '1.' Magneto-optical and magnetic force microscopy measurements prove the correct operation of the gate over many computing cycles. Furthermore, micromagnetic simulations confirm the correct functionality of the gate even for a size in the nanometer-domain. The presented device demonstrates the potential of NML for three-dimensional digital computing, enabling the highest integration densities.
Programmable hardware for reconfigurable computing systems
NASA Astrophysics Data System (ADS)
Smith, Stephen
1996-10-01
In 1945 the work of J. von Neumann and H. Goldstein created the principal architecture for electronic computation that has now lasted fifty years. Nevertheless alternative architectures have been created that have computational capability, for special tasks, far beyond that feasible with von Neumann machines. The emergence of high capacity programmable logic devices has made the realization of these architectures practical. The original ENIAC and EDVAC machines were conceived to solve special mathematical problems that were far from today's concept of 'killer applications.' In a similar vein programmable hardware computation is being used today to solve unique mathematical problems. Our programmable hardware activity is focused on the research and development of novel computational systems based upon the reconfigurability of our programmable logic devices. We explore our programmable logic architectures and their implications for programmable hardware. One programmable hardware board implementation is detailed.
Method and apparatus for optical encoding with compressible imaging
NASA Technical Reports Server (NTRS)
Leviton, Douglas B. (Inventor)
2006-01-01
The present invention presents an optical encoder with increased conversion rates. Improvement in the conversion rate is a result of combining changes in the pattern recognition encoder's scale pattern with an image sensor readout technique which takes full advantage of those changes, and lends itself to operation by modern, high-speed, ultra-compact microprocessors and digital signal processors (DSP) or field programmable gate array (FPGA) logic elements which can process encoder scale images at the highest speeds. Through these improvements, all three components of conversion time (reciprocal conversion rate)--namely exposure time, image readout time, and image processing time--are minimized.
Field-Free Programmable Spin Logics via Chirality-Reversible Spin-Orbit Torque Switching.
Wang, Xiao; Wan, Caihua; Kong, Wenjie; Zhang, Xuan; Xing, Yaowen; Fang, Chi; Tao, Bingshan; Yang, Wenlong; Huang, Li; Wu, Hao; Irfan, Muhammad; Han, Xiufeng
2018-06-21
Spin-orbit torque (SOT)-induced magnetization switching exhibits chirality (clockwise or counterclockwise), which offers the prospect of programmable spin-logic devices integrating nonvolatile spintronic memory cells with logic functions. Chirality is usually fixed by an applied or effective magnetic field in reported studies. Herein, utilizing an in-plane magnetic layer that is also switchable by SOT, the chirality of a perpendicular magnetic layer that is exchange-coupled with the in-plane layer can be reversed in a purely electrical way. In a single Hall bar device designed from this multilayer structure, three logic gates including AND, NAND, and NOT are reconfigured, which opens a gateway toward practical programmable spin-logic devices. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Teaching Discrete and Programmable Logic Design Techniques Using a Single Laboratory Board
ERIC Educational Resources Information Center
Debiec, P.; Byczuk, M.
2011-01-01
Programmable logic devices (PLDs) are used at many universities in introductory digital logic laboratories, where kits containing a single high-capacity PLD replace "standard" sets containing breadboards, wires, and small- or medium-scale integration (SSI/MSI) chips. From the pedagogical point of view, two problems arise in these…
Photon-triggered nanowire transistors
NASA Astrophysics Data System (ADS)
Kim, Jungkil; Lee, Hoo-Cheol; Kim, Kyoung-Ho; Hwang, Min-Soo; Park, Jin-Sung; Lee, Jung Min; So, Jae-Pil; Choi, Jae-Hyuck; Kwon, Soon-Hong; Barrelet, Carl J.; Park, Hong-Gyu
2017-10-01
Photon-triggered electronic circuits have been a long-standing goal of photonics. Recent demonstrations include either all-optical transistors in which photons control other photons or phototransistors with the gate response tuned or enhanced by photons. However, only a few studies report on devices in which electronic currents are optically switched and amplified without an electrical gate. Here we show photon-triggered nanowire (NW) transistors, photon-triggered NW logic gates and a single NW photodetection system. NWs are synthesized with long crystalline silicon (CSi) segments connected by short porous silicon (PSi) segments. In a fabricated device, the electrical contacts on both ends of the NW are connected to a single PSi segment in the middle. Exposing the PSi segment to light triggers a current in the NW with a high on/off ratio of >8 × 106. A device that contains two PSi segments along the NW can be triggered using two independent optical input signals. Using localized pump lasers, we demonstrate photon-triggered logic gates including AND, OR and NAND gates. A photon-triggered NW transistor of diameter 25 nm with a single 100 nm PSi segment requires less than 300 pW of power. Furthermore, we take advantage of the high photosensitivity and fabricate a submicrometre-resolution photodetection system. Photon-triggered transistors offer a new venue towards multifunctional device applications such as programmable logic elements and ultrasensitive photodetectors.
Photon-triggered nanowire transistors.
Kim, Jungkil; Lee, Hoo-Cheol; Kim, Kyoung-Ho; Hwang, Min-Soo; Park, Jin-Sung; Lee, Jung Min; So, Jae-Pil; Choi, Jae-Hyuck; Kwon, Soon-Hong; Barrelet, Carl J; Park, Hong-Gyu
2017-10-01
Photon-triggered electronic circuits have been a long-standing goal of photonics. Recent demonstrations include either all-optical transistors in which photons control other photons or phototransistors with the gate response tuned or enhanced by photons. However, only a few studies report on devices in which electronic currents are optically switched and amplified without an electrical gate. Here we show photon-triggered nanowire (NW) transistors, photon-triggered NW logic gates and a single NW photodetection system. NWs are synthesized with long crystalline silicon (CSi) segments connected by short porous silicon (PSi) segments. In a fabricated device, the electrical contacts on both ends of the NW are connected to a single PSi segment in the middle. Exposing the PSi segment to light triggers a current in the NW with a high on/off ratio of >8 × 10 6 . A device that contains two PSi segments along the NW can be triggered using two independent optical input signals. Using localized pump lasers, we demonstrate photon-triggered logic gates including AND, OR and NAND gates. A photon-triggered NW transistor of diameter 25 nm with a single 100 nm PSi segment requires less than 300 pW of power. Furthermore, we take advantage of the high photosensitivity and fabricate a submicrometre-resolution photodetection system. Photon-triggered transistors offer a new venue towards multifunctional device applications such as programmable logic elements and ultrasensitive photodetectors.
Reconfigurable Optical Directed-Logic Circuits
2015-11-20
AFRL-AFOSR-VA-TR-2016-0053 Reconfigurable Optical Directed-Logic Circuits Jacob Robinson WILLIAM MARSH RICE UNIV HOUSTON TX Final Report 11/20/2015...2015 Reconfigurable Optical Directed-Logic Circuits FA9550-12-1-0261 FA9550-12-1-0261 Robinson, Jacob Rice University 6100 Main Street Houston...Optical Directed-Logic Circuits Jacob T. Robinson and Qianfan Xu Rice University 1. Motivation for Directed-Logic Circuits Directed-logic is
Enhanced Control for Local Helicity Injection on the Pegasus ST
NASA Astrophysics Data System (ADS)
Pierren, C.; Bongard, M. W.; Fonck, R. J.; Lewicki, B. T.; Perry, J. M.
2017-10-01
Local helicity injection (LHI) experiments on Pegasus rely upon programmable control of a 250 MVA modular power supply system that drives the electromagnets and helicity injection systems. Precise control of the central solenoid is critical to experimental campaigns that test the LHI Taylor relaxation limit and the coupling efficiency of LHI-produced plasmas to Ohmic current drive. Enhancement and expansion of the present control system is underway using field programmable gate array (FPGA) technology for digital logic and control, coupled to new 10 MHz optical-to-digital transceivers for semiconductor level device communication. The system accepts optical command signals from existing analog feedback controllers, transmits them to multiple devices in parallel H-bridges, and aggregates their status signals for fault detection. Present device-level multiplexing/de-multiplexing and protection logic is extended to include bridge-level protections with the FPGA. An input command filter protects against erroneous and/or spurious noise generated commands that could otherwise cause device failures. Fault registration and response times with the FPGA system are 25 ns. Initial system testing indicates an increased immunity to power supply induced noise, enabling plasma operations at higher working capacitor bank voltage. This can increase the applied helicity injection drive voltage, enable longer pulse lengths and improve Ohmic loop voltage control. Work supported by US DOE Grant DE-FG02-96ER54375.
Federal Register 2010, 2011, 2012, 2013, 2014
2012-06-05
... Operations Management Tricon Programmable Logic Controller (PLC), Version 10, and the CS Innovations, LLC... process protection system that is based on the Invensys Operations Management Tricon Programmable Logic...
pH-programmable DNA logic arrays powered by modular DNAzyme libraries.
Elbaz, Johann; Wang, Fuan; Remacle, Francoise; Willner, Itamar
2012-12-12
Nature performs complex information processing circuits, such the programmed transformations of versatile stem cells into targeted functional cells. Man-made molecular circuits are, however, unable to mimic such sophisticated biomachineries. To reach these goals, it is essential to construct programmable modular components that can be triggered by environmental stimuli to perform different logic circuits. We report on the unprecedented design of artificial pH-programmable DNA logic arrays, constructed by modular libraries of Mg(2+)- and UO(2)(2+)-dependent DNAzyme subunits and their substrates. By the appropriate modular design of the DNA computation units, pH-programmable logic arrays of various complexities are realized, and the arrays can be erased, reused, and/or reprogrammed. Such systems may be implemented in the near future for nanomedical applications by pH-controlled regulation of cellular functions or may be used to control biotransformations stimulated by bacteria.
Industrial Control System Process-Oriented Intrusion Detection (iPoid) Algorithm
2016-08-01
inspection rules using an intrusion-detection system (IDS) sensor, a simulated Programmable Logic Controller (PLC), and a Modbus client operating...operating system PLC Programmable Logic Controller SCADA supervisory control and data acquisition SIGHUP signal hangup SPAN Switched Port Analyzer
NASA Astrophysics Data System (ADS)
Maimistov, Andrei I.
1995-10-01
An analysis is made of the fundamental concepts of conservative logic. It is shown that the existing optical soliton switches can be converted into logic gates which act as conservative logic elements. A logic device of this type, based on a nonlinear fibre-optic directional coupler, is considered. Polarised solitons are used in this coupler. This use of solitons leads in a natural way to the desirability of developing conservative triple-valued logic.
Bistable metamaterial for switching and cascading elastic vibrations
Foehr, André; Daraio, Chiara
2017-01-01
The realization of acoustic devices analogous to electronic systems, like diodes, transistors, and logic elements, suggests the potential use of elastic vibrations (i.e., phonons) in information processing, for example, in advanced computational systems, smart actuators, and programmable materials. Previous experimental realizations of acoustic diodes and mechanical switches have used nonlinearities to break transmission symmetry. However, existing solutions require operation at different frequencies or involve signal conversion in the electronic or optical domains. Here, we show an experimental realization of a phononic transistor-like device using geometric nonlinearities to switch and amplify elastic vibrations, via magnetic coupling, operating at a single frequency. By cascading this device in a tunable mechanical circuit board, we realize the complete set of mechanical logic elements and interconnect selected ones to execute simple calculations. PMID:28416663
NASA Astrophysics Data System (ADS)
Ghosh, Amal K.; Bhattacharya, Animesh; Raul, Moumita; Basuray, Amitabha
2012-07-01
Arithmetic logic unit (ALU) is the most important unit in any computing system. Optical computing is becoming popular day-by-day because of its ultrahigh processing speed and huge data handling capability. Obviously for the fast processing we need the optical TALU compatible with the multivalued logic. In this regard we are communicating the trinary arithmetic and logic unit (TALU) in modified trinary number (MTN) system, which is suitable for the optical computation and other applications in multivalued logic system. Here the savart plate and spatial light modulator (SLM) based optoelectronic circuits have been used to exploit the optical tree architecture (OTA) in optical interconnection network.
Programmable Logic Application Notes
NASA Technical Reports Server (NTRS)
Katz, Richard
2000-01-01
This column will be provided each quarter as a source for reliability, radiation results, NASA capabilities, and other information on programmable logic devices and related applications. This quarter will start a series of notes concentrating on analysis techniques with this issues section discussing worst-case analysis requirements.
High-performance reconfigurable coincidence counting unit based on a field programmable gate array.
Park, Byung Kwon; Kim, Yong-Su; Kwon, Osung; Han, Sang-Wook; Moon, Sung
2015-05-20
We present a high-performance reconfigurable coincidence counting unit (CCU) using a low-end field programmable gate array (FPGA) and peripheral circuits. Because of the flexibility guaranteed by the FPGA program, we can easily change system parameters, such as internal input delays, coincidence configurations, and the coincidence time window. In spite of a low-cost implementation, the proposed CCU architecture outperforms previous ones in many aspects: it has 8 logic inputs and 4 coincidence outputs that can measure up to eight-fold coincidences. The minimum coincidence time window and the maximum input frequency are 0.47 ns and 163 MHz, respectively. The CCU will be useful in various experimental research areas, including the field of quantum optics and quantum information.
Kalinin, Stanislav; Kühnemuth, Ralf; Vardanyan, Hayk; Seidel, Claus A M
2012-09-01
We present a fast hardware photon correlator implemented in a field-programmable gate array (FPGA) combined with a compact confocal fluorescence setup. The correlator has two independent units with a time resolution of 4 ns while utilizing less than 15% of a low-end FPGA. The device directly accepts transistor-transistor logic (TTL) signals from two photon counting detectors and calculates two auto- or cross-correlation curves in real time. Test measurements demonstrate that the performance of our correlator is comparable with the current generation of commercial devices. The sensitivity of the optical setup is identical or even superior to current commercial devices. The FPGA design and the optical setup both allow for a straightforward extension to multi-color applications. This inexpensive and compact solution with a very good performance can serve as a versatile platform for uses in education, applied sciences, and basic research.
NASA Astrophysics Data System (ADS)
Kalinin, Stanislav; Kühnemuth, Ralf; Vardanyan, Hayk; Seidel, Claus A. M.
2012-09-01
We present a fast hardware photon correlator implemented in a field-programmable gate array (FPGA) combined with a compact confocal fluorescence setup. The correlator has two independent units with a time resolution of 4 ns while utilizing less than 15% of a low-end FPGA. The device directly accepts transistor-transistor logic (TTL) signals from two photon counting detectors and calculates two auto- or cross-correlation curves in real time. Test measurements demonstrate that the performance of our correlator is comparable with the current generation of commercial devices. The sensitivity of the optical setup is identical or even superior to current commercial devices. The FPGA design and the optical setup both allow for a straightforward extension to multi-color applications. This inexpensive and compact solution with a very good performance can serve as a versatile platform for uses in education, applied sciences, and basic research.
Cascaded all-optical operations in a hybrid integrated 80-Gb/s logic circuit.
LeGrange, J D; Dinu, M; Sochor, T; Bollond, P; Kasper, A; Cabot, S; Johnson, G S; Kang, I; Grant, A; Kay, J; Jaques, J
2014-06-02
We demonstrate logic functionalities in a high-speed all-optical logic circuit based on differential Mach-Zehnder interferometers with semiconductor optical amplifiers as the nonlinear optical elements. The circuit, implemented by hybrid integration of the semiconductor optical amplifiers on a planar lightwave circuit platform fabricated in silica glass, can be flexibly configured to realize a variety of Boolean logic gates. We present both simulations and experimental demonstrations of cascaded all-optical operations for 80-Gb/s on-off keyed data.
Optically intraconnected computer employing dynamically reconfigurable holographic optical element
NASA Technical Reports Server (NTRS)
Bergman, Larry A. (Inventor)
1992-01-01
An optically intraconnected computer and a reconfigurable holographic optical element employed therein. The basic computer comprises a memory for holding a sequence of instructions to be executed; logic for accessing the instructions in sequence; logic for determining for each the instruction the function to be performed and the effective address thereof; a plurality of individual elements on a common support substrate optimized to perform certain logical sequences employed in executing the instructions; and, element selection logic connected to the logic determining the function to be performed for each the instruction for determining the class of each function and for causing the instruction to be executed by those the elements which perform those associated the logical sequences affecting the instruction execution in an optimum manner. In the optically intraconnected version, the element selection logic is adapted for transmitting and switching signals to the elements optically.
Programmable resistive-switch nanowire transistor logic circuits.
Shim, Wooyoung; Yao, Jun; Lieber, Charles M
2014-09-10
Programmable logic arrays (PLA) constitute a promising architecture for developing increasingly complex and functional circuits through nanocomputers from nanoscale building blocks. Here we report a novel one-dimensional PLA element that incorporates resistive switch gate structures on a semiconductor nanowire and show that multiple elements can be integrated to realize functional PLAs. In our PLA element, the gate coupling to the nanowire transistor can be modulated by the memory state of the resistive switch to yield programmable active (transistor) or inactive (resistor) states within a well-defined logic window. Multiple PLA nanowire elements were integrated and programmed to yield a working 2-to-4 demultiplexer with long-term retention. The well-defined, controllable logic window and long-term retention of our new one-dimensional PLA element provide a promising route for building increasingly complex circuits with nanoscale building blocks.
Novel all-optical logic gate using an add/drop filter and intensity switch.
Threepak, T; Mitatha, S; Yupapin, P P
2011-12-01
A novel design of all-optical logic device is proposed. An all-optical logic device system composes of an optical intensity switch and add/drop filter. The intensity switch is formed to switch signal by using the relationship between refraction angle and signal intensity. In operation, two input signals are coupled into one with some coupling loss and attenuation, in which the combination of add/drop with intensity switch produces the optical logic gate. The advantage is that the proposed device can operate the high speed logic function. Moreover, it uses low power consumption. Furthermore, by using the extremely small component, this design can be put into a single chip. Finally, we have successfully produced the all-optical logic gate that can generate the accurate AND and NOT operation results.
Programmable Logic Application Notes
NASA Technical Reports Server (NTRS)
Katz, Richard; Day, John H. (Technical Monitor)
2001-01-01
This report will be provided each quarter as a source for reliability, radiation results, NASA capabilities, and other information on programmable logic devices and related applications. This quarter will continue a series of notes concentrating on analysis techniques with this issue's section discussing the use of Root-Sum-Square calculations for digital delays.
Introducing Programmable Logic to Undergraduate Engineering Students in a Digital Electronics Course
ERIC Educational Resources Information Center
Todorovich, E.; Marone, J. A.; Vazquez, M.
2012-01-01
Due to significant technological advances and industry requirements, many universities have introduced programmable logic and hardware description languages into undergraduate engineering curricula. This has led to a number of logistical and didactical challenges, in particular for computer science students. In this paper, the integration of some…
Programming Programmable Logic Controller. High-Technology Training Module.
ERIC Educational Resources Information Center
Lipsky, Kevin
This training module on programming programmable logic controllers (PLC) is part of the memory structure and programming unit used in a packaging systems equipment control course. In the course, students assemble, install, maintain, and repair industrial machinery used in industry. The module contains description, objectives, content outline,…
Integrated all-optical logic discriminators based on plasmonic bandgap engineering
Lu, Cuicui; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang
2013-01-01
Optical computing uses photons as information carriers, opening up the possibility for ultrahigh-speed and ultrawide-band information processing. Integrated all-optical logic devices are indispensible core components of optical computing systems. However, up to now, little experimental progress has been made in nanoscale all-optical logic discriminators, which have the function of discriminating and encoding incident light signals according to wavelength. Here, we report a strategy to realize a nanoscale all-optical logic discriminator based on plasmonic bandgap engineering in a planar plasmonic microstructure. Light signals falling within different operating wavelength ranges are differentiated and endowed with different logic state encodings. Compared with values previously reported, the operating bandwidth is enlarged by one order of magnitude. Also the SPP light source is integrated with the logic device while retaining its ultracompact size. This opens up a way to construct on-chip all-optical information processors and artificial intelligence systems. PMID:24071647
Programmable Logic Application Notes
NASA Technical Reports Server (NTRS)
Katz, Richard
1998-01-01
This column will be provided each quarter as a source for reliability, radiation results, NASA capabilities, and other information on programmable logic devices and related applications. This quarter's column will include some announcements and some recent radiation test results and evaluations of interest. Specifically, the following topics will be covered: the Military and Aerospace Applications of Programmable Devices and Technologies Conference to be held at GSFC in September, 1998, proton test results, and some total dose results.
Universal programmable logic gate and routing method
NASA Technical Reports Server (NTRS)
Vatan, Farrokh (Inventor); Akarvardar, Kerem (Inventor); Mojarradi, Mohammad M. (Inventor); Fijany, Amir (Inventor); Cristoloveanu, Sorin (Inventor); Kolawa, Elzbieta (Inventor); Blalock, Benjamin (Inventor); Chen, Suheng (Inventor); Toomarian, Nikzad (Inventor)
2009-01-01
An universal and programmable logic gate based on G.sup.4-FET technology is disclosed, leading to the design of more efficient logic circuits. A new full adder design based on the G.sup.4-FET is also presented. The G.sup.4-FET can also function as a unique router device offering coplanar crossing of signal paths that are isolated and perpendicular to one another. This has the potential of overcoming major limitations in VLSI design where complex interconnection schemes have become increasingly problematic.
Sign-And-Magnitude Up/Down Counter
NASA Technical Reports Server (NTRS)
Cole, Steven W.
1991-01-01
Magnitude-and-sign counter includes conventional up/down counter for magnitude part and special additional circuitry for sign part. Negative numbers indicated more directly. Counter implemented by programming erasable programmable logic device (EPLD) or programmable logic array (PLA). Used in place of conventional up/down counter to provide sign and magnitude values directly to other circuits.
Simple online recognition of optical data strings based on conservative optical logic
NASA Astrophysics Data System (ADS)
Caulfield, H. John; Shamir, Joseph; Zavalin, Andrey I.; Silberman, Enrique; Qian, Lei; Vikram, Chandra S.
2006-06-01
Optical packet switching relies on the ability of a system to recognize header information on an optical signal. Unless the headers are very short with large Hamming distances, optical correlation fails and optical logic becomes attractive because it can handle long headers with Hamming distances as low as 1. Unfortunately, the only optical logic gates fast enough to keep up with current communication speeds involve semiconductor optical amplifiers and do not lend themselves to the incorporation of large numbers of elements for header recognition and would consume a lot of power as well. The ideal system would operate at any bandwidth with no power consumption. We describe how to design and build such a system by using passive optical logic. This too leads to practical problems that we discuss. We show theoretically various ways to use optical interferometric logic for reliable recognition of long data streams such as headers in optical communication. In addition, we demonstrate one particularly simple experimental approach using interferometric coinc gates.
Programmable nanowire circuits for nanoprocessors.
Yan, Hao; Choe, Hwan Sung; Nam, SungWoo; Hu, Yongjie; Das, Shamik; Klemic, James F; Ellenbogen, James C; Lieber, Charles M
2011-02-10
A nanoprocessor constructed from intrinsically nanometre-scale building blocks is an essential component for controlling memory, nanosensors and other functions proposed for nanosystems assembled from the bottom up. Important steps towards this goal over the past fifteen years include the realization of simple logic gates with individually assembled semiconductor nanowires and carbon nanotubes, but with only 16 devices or fewer and a single function for each circuit. Recently, logic circuits also have been demonstrated that use two or three elements of a one-dimensional memristor array, although such passive devices without gain are difficult to cascade. These circuits fall short of the requirements for a scalable, multifunctional nanoprocessor owing to challenges in materials, assembly and architecture on the nanoscale. Here we describe the design, fabrication and use of programmable and scalable logic tiles for nanoprocessors that surmount these hurdles. The tiles were built from programmable, non-volatile nanowire transistor arrays. Ge/Si core/shell nanowires coupled to designed dielectric shells yielded single-nanowire, non-volatile field-effect transistors (FETs) with uniform, programmable threshold voltages and the capability to drive cascaded elements. We developed an architecture to integrate the programmable nanowire FETs and define a logic tile consisting of two interconnected arrays with 496 functional configurable FET nodes in an area of ∼960 μm(2). The logic tile was programmed and operated first as a full adder with a maximal voltage gain of ten and input-output voltage matching. Then we showed that the same logic tile can be reprogrammed and used to demonstrate full-subtractor, multiplexer, demultiplexer and clocked D-latch functions. These results represent a significant advance in the complexity and functionality of nanoelectronic circuits built from the bottom up with a tiled architecture that could be cascaded to realize fully integrated nanoprocessors with computing, memory and addressing capabilities.
Kneale, Dylan; Thomas, James; Harris, Katherine
2015-01-01
Logic models are becoming an increasingly common feature of systematic reviews, as is the use of programme theory more generally in systematic reviewing. Logic models offer a framework to help reviewers to 'think' conceptually at various points during the review, and can be a useful tool in defining study inclusion and exclusion criteria, guiding the search strategy, identifying relevant outcomes, identifying mediating and moderating factors, and communicating review findings. In this paper we critique the use of logic models in systematic reviews and protocols drawn from two databases representing reviews of health interventions and international development interventions. Programme theory featured only in a minority of the reviews and protocols included. Despite drawing from different disciplinary traditions, reviews and protocols from both sources shared several limitations in their use of logic models and theories of change, and these were used almost unanimously to solely depict pictorially the way in which the intervention worked. Logic models and theories of change were consequently rarely used to communicate the findings of the review. Logic models have the potential to be an aid integral throughout the systematic reviewing process. The absence of good practice around their use and development may be one reason for the apparent limited utility of logic models in many existing systematic reviews. These concerns are addressed in the second half of this paper, where we offer a set of principles in the use of logic models and an example of how we constructed a logic model for a review of school-based asthma interventions.
Design and implementation of an optical Gaussian noise generator
NASA Astrophysics Data System (ADS)
Za~O, Leonardo; Loss, Gustavo; Coelho, Rosângela
2009-08-01
A design of a fast and accurate optical Gaussian noise generator is proposed and demonstrated. The noise sample generation is based on the Box-Muller algorithm. The functions implementation was performed on a high-speed Altera Stratix EP1S25 field-programmable gate array (FPGA) development kit. It enabled the generation of 150 million 16-bit noise samples per second. The Gaussian noise generator required only 7.4% of the FPGA logic elements, 1.2% of the RAM memory, 0.04% of the ROM memory, and a laser source. The optical pulses were generated by a laser source externally modulated by the data bit samples using the frequency-shift keying technique. The accuracy of the noise samples was evaluated for different sequences size and confidence intervals. The noise sample pattern was validated by the Bhattacharyya distance (Bd) and the autocorrelation function. The results showed that the proposed design of the optical Gaussian noise generator is very promising to evaluate the performance of optical communications channels with very low bit-error-rate values.
Improving excellence in scoliosis rehabilitation: a controlled study of matched pairs.
Weiss, H-R; Klein, R
2006-01-01
Physiotherapy programmes so far mainly address the lateral deformity of scoliosis, a few aim at the correction of rotation and only very few address the sagittal profile. Meanwhile, there is evidence that correction forces applied in the sagittal plane are also able to correct the scoliotic deformity in the coronal and frontal planes. So it should be possible to improve excellence in scoliosis rehabilitation by the implementation of exercises to correct the sagittal deformity in scoliosis patients. An exercise programme (physio-logic exercises) aiming at a physiologic sagittal profile was developed to add to the programme applied at the centre or to replace certain exercises or exercising positions. To test the hypothesis that physio-logic exercises improve the outcome of Scoliosis Intensive Rehabilitation (SIR), the following study design was chosen: Prospective controlled trial of pairs of patients with idiopathic scoliosis matched by sex, age, Cobb angle and curve pattern. There were 18 patients in the treatment group (SIR + physio-logic exercises) and 18 patients in the control group (SIR only), all in matched pairs. Average Cobb angle in the treatment group was 34.5 degrees (SD 7.8) Cobb angle in the control group was 31.6 degrees (SD 5.8). Age in the treatment group was at average 15.3 years (SD 1.1) and in the control group 14.7 years (SD 1.3). Thirteen of the 18 patients in either group had a brace. Outcome parameter: average lateral deviation (mm), average surface rotation ( degrees ) and maximum Kyphosis angle ( degrees ) as evaluated with the help of surface topography (Formetric-system). Lateral deviation (mm) decreased significantly after the performance of the physio-logic programme and highly significantly in the physio-logic ADL posture; however, it was not significant after completion of the whole rehabilitation programme (2.3 vs 0.3 mm in the controls). Surface rotation improved at average 1.2 degrees in the treatment group and 0.8 degrees in the controls while Kyphosis angle did not improve in both groups. The physio-logic programme has to be regarded as a useful 'add on' to Scoliosis Rehabilitation with regards to the lateral deviation of the scoliotic trunk. A longitudinal controlled study is necessary to evaluate the long-term effect of the the physio-logic programme also with the help of X-rays.
Chip-integrated ultrawide-band all-optical logic comparator in plasmonic circuits
Lu, Cuicui; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang
2014-01-01
Optical computing opens up the possibility for the realization of ultrahigh-speed and ultrawide-band information processing. Integrated all-optical logic comparator is one of the indispensable core components of optical computing systems. Unfortunately, up to now, no any nanoscale all-optical logic comparator suitable for on-chip integration applications has been realized experimentally. Here, we report a subtle and effective technical solution to circumvent the obstacles of inherent Ohmic losses of metal and limited propagation length of SPPs. A nanoscale all-optical logic comparator suitable for on-chip integration applications is realized in plasmonic circuits directly. The incident single-bit (or dual-bit) logic signals can be compared and the comparison results are endowed with different logic encodings. An ultrabroad operating wavelength range from 700 to 1000 nm, and an ultrahigh output logic-state contrast-ratio of more than 25 dB are realized experimentally. No high power requirement is needed. Though nanoscale SPP light source and the logic comparator device are integrated into the same plasmonic chip, an ultrasmall feature size is maintained. This work not only paves a way for the realization of complex logic device such as adders and multiplier, but also opens up the possibility for realizing quantum solid chips based on plasmonic circuits. PMID:24463956
Chip-integrated ultrawide-band all-optical logic comparator in plasmonic circuits.
Lu, Cuicui; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang
2014-01-27
Optical computing opens up the possibility for the realization of ultrahigh-speed and ultrawide-band information processing. Integrated all-optical logic comparator is one of the indispensable core components of optical computing systems. Unfortunately, up to now, no any nanoscale all-optical logic comparator suitable for on-chip integration applications has been realized experimentally. Here, we report a subtle and effective technical solution to circumvent the obstacles of inherent Ohmic losses of metal and limited propagation length of SPPs. A nanoscale all-optical logic comparator suitable for on-chip integration applications is realized in plasmonic circuits directly. The incident single-bit (or dual-bit) logic signals can be compared and the comparison results are endowed with different logic encodings. An ultrabroad operating wavelength range from 700 to 1000 nm, and an ultrahigh output logic-state contrast-ratio of more than 25 dB are realized experimentally. No high power requirement is needed. Though nanoscale SPP light source and the logic comparator device are integrated into the same plasmonic chip, an ultrasmall feature size is maintained. This work not only paves a way for the realization of complex logic device such as adders and multiplier, but also opens up the possibility for realizing quantum solid chips based on plasmonic circuits.
2016-05-01
A9 CPU and 15 W for the i7 CPU. A method of accelerating this computation is by using a customized hardware unit called a field- programmable gate...implementation of custom logic to accelerate com- putational workloads. This FPGA fabric, in addition to the standard programmable logic, contains 220...chip; field- programmable gate array Daniel Gebhardt U U U U 18 (619) 553-2786 INITIAL DISTRIBUTION 84300 Library (2) 85300 Archive/Stock (1
2016-05-01
A9 CPU and 15 W for the i7 CPU. A method of accelerating this computation is by using a customized hardware unit called a field- programmable gate...implementation of custom logic to accelerate com- putational workloads. This FPGA fabric, in addition to the standard programmable logic, contains 220...chip; field- programmable gate array Daniel Gebhardt U U U U 18 (619) 553-2786 INITIAL DISTRIBUTION 84300 Library (2) 85300 Archive/Stock (1
A Project-Based Learning Approach to Programmable Logic Design and Computer Architecture
ERIC Educational Resources Information Center
Kellett, C. M.
2012-01-01
This paper describes a course in programmable logic design and computer architecture as it is taught at the University of Newcastle, Australia. The course is designed around a major design project and has two supplemental assessment tasks that are also described. The context of the Computer Engineering degree program within which the course is…
"Modeling" Youth Work: Logic Models, Neoliberalism, and Community Praxis
ERIC Educational Resources Information Center
Carpenter, Sara
2016-01-01
This paper examines the use of logic models in the development of community initiatives within the AmeriCorps program. AmeriCorps is the civilian national service programme in the U.S., operating as a grants programme to local governments and not-for-profit organisations and providing low-cost labour to address pressing issues of social…
NASA Astrophysics Data System (ADS)
Nakamura, Kazuyuki; Sasao, Tsutomu; Matsuura, Munehiro; Tanaka, Katsumasa; Yoshizumi, Kenichi; Nakahara, Hiroki; Iguchi, Yukihiro
2006-04-01
A large-scale memory-technology-based programmable logic device (PLD) using a look-up table (LUT) cascade is developed in the 0.35-μm standard complementary metal oxide semiconductor (CMOS) logic process. Eight 64 K-bit synchronous SRAMs are connected to form an LUT cascade with a few additional circuits. The features of the LUT cascade include: 1) a flexible cascade connection structure, 2) multi phase pseudo asynchronous operations with synchronous static random access memory (SRAM) cores, and 3) LUT-bypass redundancy. This chip operates at 33 MHz in 8-LUT cascades at 122 mW. Benchmark results show that it achieves a comparable performance to field programmable gate array (FPGAs).
Programmable Logic Application Notes
NASA Technical Reports Server (NTRS)
Katz, Richard
2000-01-01
This column will be provided each quarter as a source for reliability, radiation results, NASA capabilities, and other information on programmable logic devices and related applications. This quarter will continue a series of notes concentrating on analysis techniques with this issue's section discussing: Digital Timing Analysis Tools and Techniques. Articles in this issue include: SX and SX-A Series Devices Power Sequencing; JTAG and SXISX-AISX-S Series Devices; Analysis Techniques (i.e., notes on digital timing analysis tools and techniques); Status of the Radiation Hard reconfigurable Field Programmable Gate Array Program, Input Transition Times; Apollo Guidance Computer Logic Study; RT54SX32S Prototype Data Sets; A54SX32A - 0.22 micron/UMC Test Results; Ramtron FM1608 FRAM; and Analysis of VHDL Code and Synthesizer Output.
Reconfigurable electro-optical directed-logic circuit using carrier-depletion micro-ring resonators.
Qiu, Ciyuan; Gao, Weilu; Soref, Richard; Robinson, Jacob T; Xu, Qianfan
2014-12-15
Here we demonstrate a reconfigurable electro-optical directed-logic circuit based on a regular array of integrated optical switches. Each 1×1 optical switch consists of a micro-ring resonator with an embedded lateral p-n junction and a micro-heater. We achieve high-speed on-off switching by applying electrical logic signals to the p-n junction. We can configure the operation mode of each switch by thermal tuning the resonance wavelength. The result is an integrated optical circuit that can be reconfigured to perform any combinational logic operation. As a proof-of-principle, we fabricated a multi-spectral directed-logic circuit based on a fourfold array of switches and showed that this circuit can be reconfigured to perform arbitrary two-input logic functions with speeds up to 3 GB/s.
Logic operations based on magnetic-vortex-state networks.
Jung, Hyunsung; Choi, Youn-Seok; Lee, Ki-Suk; Han, Dong-Soo; Yu, Young-Sang; Im, Mi-Young; Fischer, Peter; Kim, Sang-Koog
2012-05-22
Logic operations based on coupled magnetic vortices were experimentally demonstrated. We utilized a simple chain structure consisting of three physically separated but dipolar-coupled vortex-state Permalloy disks as well as two electrodes for application of the logical inputs. We directly monitored the vortex gyrations in the middle disk, as the logical output, by time-resolved full-field soft X-ray microscopy measurements. By manipulating the relative polarization configurations of both end disks, two different logic operations are programmable: the XOR operation for the parallel polarization and the OR operation for the antiparallel polarization. This work paves the way for new-type programmable logic gates based on the coupled vortex-gyration dynamics achievable in vortex-state networks. The advantages are as follows: a low-power input signal by means of resonant vortex excitation, low-energy dissipation during signal transportation by selection of low-damping materials, and a simple patterned-array structure.
EEE Links, Volume 9, No. 1, January 2003 Focus on Plastic Parts
NASA Technical Reports Server (NTRS)
2003-01-01
The January 2003 issue of Electronic, Electromechanical, Electric (EEE) Links is presented. The Programmable Logic Application Notes column has been reinstated in this newsletter. Written by Rich Katz of NASA's Office of Logic Design (OLD), the application notes offer technical tips intended to prevent flight design errors and enhance research, development, and use of programmable logic and elements for space flight applications. An archive of these notes columns from previous issues of EEE Links is available at http://www.klabs.org/richcontent/eeelink s/EEE Links.htm.
De-Regil, Luz Maria; Peña-Rosas, Juan Pablo; Flores-Ayala, Rafael; del Socorro Jefferds, Maria Elena
2015-01-01
Objective Nutrition interventions are critical to achieve the Millennium Development Goals; among them, micronutrient interventions are considered cost-effective and programmatically feasible to scale up, but there are limited tools to communicate the programme components and their relationships. The WHO/CDC (Centers for Disease Control and Prevention) logic model for micronutrient interventions in public health programmes is a useful resource for planning, implementation, monitoring and evaluation of these interventions, which depicts the programme theory and expected relationships between inputs and expected Millennium Development Goals. Design The model was developed by applying principles of programme evaluation, public health nutrition theory and programmatic expertise. The multifaceted and iterative structure validation included feedback from potential users and adaptation by national stakeholders involved in public health programmes' design and implementation. Results In addition to the inputs, main activity domains identified as essential for programme development, implementation and performance include: (i) policy; (ii) products and supply; (iii) delivery systems; (iv) quality control; and (v) behaviour change communication. Outputs encompass the access to and coverage of interventions. Outcomes include knowledge and appropriate use of the intervention, as well as effects on micronutrient intake, nutritional status and health of target populations, for ultimate achievement of the Millennium Development Goals. Conclusions The WHO/CDC logic model simplifies the process of developing a logic model by providing a tool that has identified high-priority areas and concepts that apply to virtually all public health micronutrient interventions. Countries can adapt it to their context in order to support programme design, implementation, monitoring and evaluation for the successful scale-up of nutrition interventions in public health. PMID:23507463
Compact sub-nanosecond pulse seed source with diode laser driven by a high-speed circuit
NASA Astrophysics Data System (ADS)
Wang, Xiaoqian; Wang, Bo; Wang, Junhua; Cheng, Wenyong
2018-06-01
A compact sub-nanosecond pulse seed source with 1550 nm diode laser (DL) was obtained by employing a high-speed circuit. The circuit mainly consisted of a short pulse generator and a short pulse driver. The short pulse generator, making up of a complex programmable logic device (CPLD), a level translator, two programmable delay chips and an AND gate chip, output a triggering signal to control metal-oxide-semiconductor field-effect transistor (MOSFET) switch of the short pulse driver. The MOSFET switch with fast rising time and falling time both shorter than 1 ns drove the DL to emit short optical pulses. Performances of the pulse seed source were tested. The results showed that continuously adjustable repetition frequency ranging from 500 kHz to 100 MHz and pulse duration in the range of 538 ps to 10 ns were obtained, respectively. 537 μW output was obtained at the highest repetition frequency of 100 MHz with the shortest pulse duration of 538 ps. These seed pulses were injected into an fiber amplifier, and no optical pulse distortions were found.
Kneale, Dylan; Thomas, James; Harris, Katherine
2015-01-01
Background Logic models are becoming an increasingly common feature of systematic reviews, as is the use of programme theory more generally in systematic reviewing. Logic models offer a framework to help reviewers to ‘think’ conceptually at various points during the review, and can be a useful tool in defining study inclusion and exclusion criteria, guiding the search strategy, identifying relevant outcomes, identifying mediating and moderating factors, and communicating review findings. Methods and Findings In this paper we critique the use of logic models in systematic reviews and protocols drawn from two databases representing reviews of health interventions and international development interventions. Programme theory featured only in a minority of the reviews and protocols included. Despite drawing from different disciplinary traditions, reviews and protocols from both sources shared several limitations in their use of logic models and theories of change, and these were used almost unanimously to solely depict pictorially the way in which the intervention worked. Logic models and theories of change were consequently rarely used to communicate the findings of the review. Conclusions Logic models have the potential to be an aid integral throughout the systematic reviewing process. The absence of good practice around their use and development may be one reason for the apparent limited utility of logic models in many existing systematic reviews. These concerns are addressed in the second half of this paper, where we offer a set of principles in the use of logic models and an example of how we constructed a logic model for a review of school-based asthma interventions. PMID:26575182
Efficient Multiplexer FPGA Block Structures Based on G4FETs
NASA Technical Reports Server (NTRS)
Vatan, Farrokh; Fijany, Amir
2009-01-01
Generic structures have been conceived for multiplexer blocks to be implemented in field-programmable gate arrays (FPGAs) based on four-gate field-effect transistors (G(sup 4)FETs). This concept is a contribution to the continuing development of digital logic circuits based on G4FETs and serves as a further demonstration that logic circuits based on G(sup 4)FETs could be more efficient (in the sense that they could contain fewer transistors), relative to functionally equivalent logic circuits based on conventional transistors. Results in this line of development at earlier stages were summarized in two previous NASA Tech Briefs articles: "G(sup 4)FETs as Universal and Programmable Logic Gates" (NPO-41698), Vol. 31, No. 7 (July 2007), page 44, and "Efficient G4FET-Based Logic Circuits" (NPO-44407), Vol. 32, No. 1 ( January 2008), page 38 . As described in the first-mentioned previous article, a G4FET can be made to function as a three-input NOT-majority gate, which has been shown to be a universal and programmable logic gate. The universality and programmability could be exploited to design logic circuits containing fewer components than are required for conventional transistor-based circuits performing the same logic functions. The second-mentioned previous article reported results of a comparative study of NOT-majority-gate (G(sup 4)FET)-based logic-circuit designs and equivalent NOR- and NAND-gate-based designs utilizing conventional transistors. [NOT gates (inverters) were also included, as needed, in both the G(sup 4)FET- and the NOR- and NAND-based designs.] In most of the cases studied, fewer logic gates (and, hence, fewer transistors), were required in the G(sup 4)FET-based designs. There are two popular categories of FPGA block structures or architectures: one based on multiplexers, the other based on lookup tables. In standard multiplexer- based architectures, the basic building block is a tree-like configuration of multiplexers, with possibly a few additional logic gates such as ANDs or ORs. Interconnections are realized by means of programmable switches that may connect the input terminals of a block to output terminals of other blocks, may bridge together some of the inputs, or may connect some of the input terminals to signal sources representing constant logical levels 0 or 1. The left part of the figure depicts a four-to-one G(sup 4)FET-based multiplexer tree; the right part of the figure depicts a functionally equivalent four-to-one multiplexer based on conventional transistors. The G(sup 4)FET version would contains 54 transistors; the conventional version contains 70 transistors.
FPGA implementation of bit controller in double-tick architecture
NASA Astrophysics Data System (ADS)
Kobylecki, Michał; Kania, Dariusz
2017-11-01
This paper presents a comparison of the two original architectures of programmable bit controllers built on FPGAs. Programmable Logic Controllers (which include, among other things programmable bit controllers) built on FPGAs provide a efficient alternative to the controllers based on microprocessors which are expensive and often too slow. The presented and compared methods allow for the efficient implementation of any bit control algorithm written in Ladder Diagram language into the programmable logic system in accordance with IEC61131-3. In both cases, we have compared the effect of the applied architecture on the performance of executing the same bit control program in relation to its own size.
Interferometric architectures based All-Optical logic design methods and their implementations
NASA Astrophysics Data System (ADS)
Singh, Karamdeep; Kaur, Gurmeet
2015-06-01
All-Optical Signal Processing is an emerging technology which can avoid costly Optical-electronic-optical (O-E-O) conversions which are usually compulsory in traditional Electronic Signal Processing systems, thus greatly enhancing operating bit rate with some added advantages such as electro-magnetic interference immunity and low power consumption etc. In order to implement complex signal processing tasks All-Optical logic gates are required as backbone elements. This review describes the advances in the field of All-Optical logic design methods based on interferometric architectures such as Mach-Zehnder Interferometer (MZI), Sagnac Interferometers and Ultrafast Non-Linear Interferometer (UNI). All-Optical logic implementations for realization of arithmetic and signal processing applications based on each interferometric arrangement are also presented in a categorized manner.
NASA Astrophysics Data System (ADS)
Harvey, E.; Pochet, M.; Schmidt, J.; Locke, T.; Naderi, N.; Usechak, N. G.
2013-03-01
This work investigates the implementation of all-optical logic gates based on optical injection locking (OIL). All-optical inverting, NOR, and NAND gates are experimentally demonstrated using two distributed feedback (DFB) lasers, a multi-mode Fabry-Perot laser diode, and an optical band-pass filter. The DFB lasers are externally modulated to represent logic inputs into the cavity of the multi-mode Fabry-Perot slave laser. The input DFB (master) lasers' wavelengths are aligned with the longitudinal modes of the Fabry-Perot slave laser and their optical power is used to modulate the injection conditions in the Fabry-Perot slave laser. The optical band-pass filter is used to select a Fabry- Perot mode that is either suppressed or transmitted given the logic state of the injecting master laser signals. When the input signal(s) is (are) in the on state, injection locking, and thus the suppression of the non-injected Fabry-Perot modes, is induced, yielding a dynamic system that can be used to implement photonic logic functions. Additionally, all-optical photonic processing is achieved using the cavity-mode shift produced in the injected slave laser under external optical injection. The inverting logic case can also be used as a wavelength converter — a key component in advanced wavelength-division multiplexing networks. As a result of this experimental investigation, a more comprehensive understanding of the locking parameters involved in injecting multiple lasers into a multi-mode cavity and the logic transition time is achieved. The performance of optical logic computations and wavelength conversion has the potential for ultrafast operation, limited primarily by the photon decay rate in the slave laser.
Versatile logic devices based on programmable DNA-regulated silver-nanocluster signal transducers.
Huang, Zhenzhen; Tao, Yu; Pu, Fang; Ren, Jinsong; Qu, Xiaogang
2012-05-21
A DNA-encoding strategy is reported for the programmable regulation of the fluorescence properties of silver nanoclusters (AgNCs). By taking advantage of the DNA-encoding strategy, aqueous AgNCs were used as signal transducers to convert DNA inputs into fluorescence outputs for the construction of various DNA-based logic gates (AND, OR, INHIBIT, XOR, NOR, XNOR, NAND, and a sequential logic gate). Moreover, a biomolecular keypad that was capable of constructing crossword puzzles was also fabricated. These AgNC-based logic systems showed several advantages, including a simple transducer-introduction strategy, universal design, and biocompatible operation. In addition, this proof of concept opens the door to a new generation of signal transducer materials and provides a general route to versatile biomolecular logic devices for practical applications. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Provably secure time distribution for the electric grid
DOE Office of Scientific and Technical Information (OSTI.GOV)
Smith IV, Amos M; Evans, Philip G; Williams, Brian P
We demonstrate a quantum time distribution (QTD) method that combines the precision of optical timing techniques with the integrity of quantum key distribution (QKD). Critical infrastructure is dependent on microprocessor- and programmable logic-based monitoring and control systems. The distribution of timing information across the electric grid is accomplished by GPS signals which are known to be vulnerable to spoofing. We demonstrate a method for synchronizing remote clocks based on the arrival time of photons in a modifed QKD system. This has the advantage that the signal can be veried by examining the quantum states of the photons similar to QKD.
Programmable logic construction kits for hyper-real-time neuronal modeling.
Guerrero-Rivera, Ruben; Morrison, Abigail; Diesmann, Markus; Pearce, Tim C
2006-11-01
Programmable logic designs are presented that achieve exact integration of leaky integrate-and-fire soma and dynamical synapse neuronal models and incorporate spike-time dependent plasticity and axonal delays. Highly accurate numerical performance has been achieved by modifying simpler forward-Euler-based circuitry requiring minimal circuit allocation, which, as we show, behaves equivalently to exact integration. These designs have been implemented and simulated at the behavioral and physical device levels, demonstrating close agreement with both numerical and analytical results. By exploiting finely grained parallelism and single clock cycle numerical iteration, these designs achieve simulation speeds at least five orders of magnitude faster than the nervous system, termed here hyper-real-time operation, when deployed on commercially available field-programmable gate array (FPGA) devices. Taken together, our designs form a programmable logic construction kit of commonly used neuronal model elements that supports the building of large and complex architectures of spiking neuron networks for real-time neuromorphic implementation, neurophysiological interfacing, or efficient parameter space investigations.
NASA Astrophysics Data System (ADS)
Ghosh, B.; Hazra, S.; Haldar, N.; Roy, D.; Patra, S. N.; Swarnakar, J.; Sarkar, P. P.; Mukhopadhyay, S.
2018-03-01
Since last few decades optics has already proved its strong potentiality for conducting parallel logic, arithmetic and algebraic operations due to its super-fast speed in communication and computation. So many different logical and sequential operations using all optical frequency encoding technique have been proposed by several authors. Here, we have keened out all optical dibit representation technique, which has the advantages of high speed operation as well as reducing the bit error problem. Exploiting this phenomenon, we have proposed all optical frequency encoded dibit based XOR and XNOR logic gates using the optical switches like add/drop multiplexer (ADM) and reflected semiconductor optical amplifier (RSOA). Also the operations of these gates have been verified through proper simulation using MATLAB (R2008a).
Compact universal logic gates realized using quantization of current in nanodevices.
Zhang, Wancheng; Wu, Nan-Jian; Yang, Fuhua
2007-12-12
This paper proposes novel universal logic gates using the current quantization characteristics of nanodevices. In nanodevices like the electron waveguide (EW) and single-electron (SE) turnstile, the channel current is a staircase quantized function of its control voltage. We use this unique characteristic to compactly realize Boolean functions. First we present the concept of the periodic-threshold threshold logic gate (PTTG), and we build a compact PTTG using EW and SE turnstiles. We show that an arbitrary three-input Boolean function can be realized with a single PTTG, and an arbitrary four-input Boolean function can be realized by using two PTTGs. We then use one PTTG to build a universal programmable two-input logic gate which can be used to realize all two-input Boolean functions. We also build a programmable three-input logic gate by using one PTTG. Compared with linear threshold logic gates, with the PTTG one can build digital circuits more compactly. The proposed PTTGs are promising for future smart nanoscale digital system use.
Field programmable gate arrays: Evaluation report for space-flight application
NASA Technical Reports Server (NTRS)
Sandoe, Mike; Davarpanah, Mike; Soliman, Kamal; Suszko, Steven; Mackey, Susan
1992-01-01
Field Programmable Gate Arrays commonly called FPGA's are the newer generation of field programmable devices and offer more flexibility in the logic modules they incorporate and in how they are interconnected. The flexibility, the number of logic building blocks available, and the high gate densities achievable are why users find FPGA's attractive. These attributes are important in reducing product development costs and shortening the development cycle. The aerospace community is interested in incorporating this new generation of field programmable technology in space applications. To this end, a consortium was formed to evaluate the quality, reliability, and radiation performance of FPGA's. This report presents the test results on FPGA parts provided by ACTEL Corporation.
Coupling Photonics and Coherent Spintronics for Low-Loss Flexible Optical Logic
2015-12-02
AFRL-AFOSR-VA-TR-2016-0055 Coupling photonics and coherent spintronics for low-loss flexible optical logic Jesse Berezovsky CASE WESTERN RESERVE UNIV...2012 - 14/06/2015 4. TITLE AND SUBTITLE Coupling photonics and coherent spintronics for low-loss flexible optical logic 5a. CONTRACT NUMBER 5b...into devices, ranging from macroscopic optical cavities, to arrays of microlens cavities, to quantum dot-impregnated integrated polymer waveguides
High speed all optical logic gates based on quantum dot semiconductor optical amplifiers.
Ma, Shaozhen; Chen, Zhe; Sun, Hongzhi; Dutta, Niloy K
2010-03-29
A scheme to realize all-optical Boolean logic functions AND, XOR and NOT using semiconductor optical amplifiers with quantum-dot active layers is studied. nonlinear dynamics including carrier heating and spectral hole-burning are taken into account together with the rate equations scheme. Results show with QD excited state and wetting layer serving as dual-reservoir of carriers, as well as the ultra fast carrier relaxation of the QD device, this scheme is suitable for high speed Boolean logic operations. Logic operation can be carried out up to speed of 250 Gb/s.
Photorefractive optical fuzzy-logic processor based on grating degeneracy
NASA Astrophysics Data System (ADS)
Wu, Weishu; Yang, Changxi; Campbell, Scott; Yeh, Pochi
1995-04-01
A novel optical fuzzy-logic processor using light-induced gratings in photorefractive crystals is proposed and demonstrated. By exploiting grating degeneracy, one can easily implement parallel fuzzy-logic functions in disjunctive normal form.
DOT National Transportation Integrated Search
2000-02-01
A Fuzzy Logic Ramp Metering Algorithm was implemented on 126 ramps in the greater Seattle area. This report documents the implementation of the Fuzzy Logic Ramp Metering Algorithm at the Northwest District of the Washington State Department of Transp...
Wang, Feifan; Gong, Zibo; Hu, Xiaoyong; Yang, Xiaoyu; Yang, Hong; Gong, Qihuang
2016-01-01
The nanoscale chip-integrated all-optical logic parity checker is an essential core component for optical computing systems and ultrahigh-speed ultrawide-band information processing chips. Unfortunately, little experimental progress has been made in development of these devices to date because of material bottleneck limitations and a lack of effective realization mechanisms. Here, we report a simple and efficient strategy for direct realization of nanoscale chip-integrated all-optical logic parity checkers in integrated plasmonic circuits in the optical communication range. The proposed parity checker consists of two-level cascaded exclusive-OR (XOR) logic gates that are realized based on the linear interference of surface plasmon polaritons propagating in the plasmonic waveguides. The parity of the number of logic 1s in the incident four-bit logic signals is determined, and the output signal is given the logic state 0 for even parity (and 1 for odd parity). Compared with previous reports, the overall device feature size is reduced by more than two orders of magnitude, while ultralow energy consumption is maintained. This work raises the possibility of realization of large-scale integrated information processing chips based on integrated plasmonic circuits, and also provides a way to overcome the intrinsic limitations of serious surface plasmon polariton losses for on-chip integration applications. PMID:27073154
Wang, Feifan; Gong, Zibo; Hu, Xiaoyong; Yang, Xiaoyu; Yang, Hong; Gong, Qihuang
2016-04-13
The nanoscale chip-integrated all-optical logic parity checker is an essential core component for optical computing systems and ultrahigh-speed ultrawide-band information processing chips. Unfortunately, little experimental progress has been made in development of these devices to date because of material bottleneck limitations and a lack of effective realization mechanisms. Here, we report a simple and efficient strategy for direct realization of nanoscale chip-integrated all-optical logic parity checkers in integrated plasmonic circuits in the optical communication range. The proposed parity checker consists of two-level cascaded exclusive-OR (XOR) logic gates that are realized based on the linear interference of surface plasmon polaritons propagating in the plasmonic waveguides. The parity of the number of logic 1s in the incident four-bit logic signals is determined, and the output signal is given the logic state 0 for even parity (and 1 for odd parity). Compared with previous reports, the overall device feature size is reduced by more than two orders of magnitude, while ultralow energy consumption is maintained. This work raises the possibility of realization of large-scale integrated information processing chips based on integrated plasmonic circuits, and also provides a way to overcome the intrinsic limitations of serious surface plasmon polariton losses for on-chip integration applications.
NASA Technical Reports Server (NTRS)
Baumann, Eric; Merolla, Anthony
1988-01-01
User controls number of clock pulses to prevent burnout. New digital programmable pulser circuit in three formats; freely running, counted, and single pulse. Operates at frequencies up to 5 MHz, with no special consideration given to layout of components or to terminations. Pulser based on sequential circuit with four states and binary counter with appropriate decoding logic. Number of programmable pulses increased beyond 127 by addition of another counter and decoding logic. For very large pulse counts and/or very high frequencies, use synchronous counters to avoid errors caused by propagation delays. Invaluable tool for initial verification or diagnosis of digital or digitally controlled circuity.
Programmable bioelectronics in a stimuli-encoded 3D graphene interface
NASA Astrophysics Data System (ADS)
Parlak, Onur; Beyazit, Selim; Tse-Sum-Bui, Bernadette; Haupt, Karsten; Turner, Anthony P. F.; Tiwari, Ashutosh
2016-05-01
The ability to program and mimic the dynamic microenvironment of living organisms is a crucial step towards the engineering of advanced bioelectronics. Here, we report for the first time a design for programmable bioelectronics, with `built-in' switchable and tunable bio-catalytic performance that responds simultaneously to appropriate stimuli. The designed bio-electrodes comprise light and temperature responsive compartments, which allow the building of Boolean logic gates (i.e. ``OR'' and ``AND'') based on enzymatic communications to deliver logic operations.The ability to program and mimic the dynamic microenvironment of living organisms is a crucial step towards the engineering of advanced bioelectronics. Here, we report for the first time a design for programmable bioelectronics, with `built-in' switchable and tunable bio-catalytic performance that responds simultaneously to appropriate stimuli. The designed bio-electrodes comprise light and temperature responsive compartments, which allow the building of Boolean logic gates (i.e. ``OR'' and ``AND'') based on enzymatic communications to deliver logic operations. Electronic supplementary information (ESI) available. See DOI: 10.1039/c6nr02355j
NASA Astrophysics Data System (ADS)
Cominelli, Alessandro; Acconcia, Giulia; Ghioni, Massimo; Rech, Ivan
2018-03-01
Time-correlated single-photon counting (TCSPC) is a powerful optical technique, which permits recording fast luminous signals with picosecond precision. Unfortunately, given its repetitive nature, TCSPC is recognized as a relatively slow technique, especially when a large time-resolved image has to be recorded. In recent years, there has been a fast trend toward the development of TCPSC imagers. Unfortunately, present systems still suffer from a trade-off between number of channels and performance. Even worse, the overall measurement speed is still limited well below the saturation of the transfer bandwidth toward the external processor. We present a routing algorithm that enables a smart connection between a 32×32 detector array and five shared high-performance converters able to provide an overall conversion rate up to 10 Gbit/s. The proposed solution exploits a fully digital logic circuit distributed in a tree structure to limit the number and length of interconnections, which is a major issue in densely integrated circuits. The behavior of the logic has been validated by means of a field-programmable gate array, while a fully integrated prototype has been designed in 180-nm technology and analyzed by means of postlayout simulations.
Applied Digital Logic Exercises Using FPGAs
NASA Astrophysics Data System (ADS)
Wick, Kurt
2017-09-01
Applied Digital Logic Exercises Using FPGAs is appropriate for anyone interested in digital logic who needs to learn how to implement it through detailed exercises with state-of-the-art digital design tools and components. The book exposes readers to combinational and sequential digital logic concepts and implements them with hands-on exercises using the Verilog Hardware Description Language (HDL) and a Field Programmable Gate Arrays (FGPA) teaching board.
Testability Design Rating System: Testability Handbook. Volume 1
1992-02-01
4-10 4.7.5 Summary of False BIT Alarms (FBA) ............................. 4-10 4.7.6 Smart BIT Technique...Circuit Board PGA Pin Grid Array PLA Programmable Logic Array PLD Programmable Logic Device PN Pseudo-Random Number PREDICT Probabilistic Estimation of...11 4.7.6 Smart BIT ( reference: RADC-TR-85-198). " Smart " BIT is a term given to BIT circuitry in a system LRU which includes dedicated processor/memory
System and method for programmable bank selection for banked memory subsystems
Blumrich, Matthias A.; Chen, Dong; Gara, Alan G.; Giampapa, Mark E.; Hoenicke, Dirk; Ohmacht, Martin; Salapura, Valentina; Sugavanam, Krishnan
2010-09-07
A programmable memory system and method for enabling one or more processor devices access to shared memory in a computing environment, the shared memory including one or more memory storage structures having addressable locations for storing data. The system comprises: one or more first logic devices associated with a respective one or more processor devices, each first logic device for receiving physical memory address signals and programmable for generating a respective memory storage structure select signal upon receipt of pre-determined address bit values at selected physical memory address bit locations; and, a second logic device responsive to each of the respective select signal for generating an address signal used for selecting a memory storage structure for processor access. The system thus enables each processor device of a computing environment memory storage access distributed across the one or more memory storage structures.
An Undergraduate Survey Course on Asynchronous Sequential Logic, Ladder Logic, and Fuzzy Logic
ERIC Educational Resources Information Center
Foster, D. L.
2012-01-01
For a basic foundation in computer engineering, universities traditionally teach synchronous sequential circuit design, using discrete gates or field programmable gate arrays, and a microcomputers course that includes basic I/O processing. These courses, though critical, expose students to only a small subset of tools. At co-op schools like…
NASA Astrophysics Data System (ADS)
Li, Guoqiang; Qian, Feng
2001-11-01
We present, for the first time to our knowledge, a generalized lookahead logic algorithm for number conversion from signed-digit to complement representation. By properly encoding the signed-digits, all the operations are performed by binary logic, and unified logical expressions can be obtained for conversion from modified-signed- digit (MSD) to 2's complement, trinary signed-digit (TSD) to 3's complement, and quarternary signed-digit (QSD) to 4's complement. For optical implementation, a parallel logical array module using an electron-trapping device is employed and experimental results are shown. This optical module is suitable for implementing complex logic functions in the form of the sum of the product. The algorithm and architecture are compatible with a general-purpose optoelectronic computing system.
NASA Astrophysics Data System (ADS)
Jacobs, J. L.
1993-04-01
Erasable programmable logic devices (EPLD's) were investigated to determine their advantages and/or disadvantages in Test Equipment Engineering applications. It was found that EPLD's performed as well as or better than identical circuits using standard transistor transistor logic (TTL). The chip count in these circuits was reduced, saving printed circuit board space and shortening fabrication and prove-in time. Troubleshooting circuits of EPLD's was also easier with 10 to 100 times fewer wires needed. The reduced number of integrated circuits (IC's) contributed to faster system speeds and an overall lower power consumption. In some cases changes to the circuit became software changes using EPLD's instead of hardware changes for standard logic. Using EPLD's was fairly easy; however, as with any new technology, a learning curve must be overcome before EPLD's can be used efficiently. The many benefits of EPLD's outweighed this initial inconvenience.
Nanoelectronic programmable synapses based on phase change materials for brain-inspired computing.
Kuzum, Duygu; Jeyasingh, Rakesh G D; Lee, Byoungil; Wong, H-S Philip
2012-05-09
Brain-inspired computing is an emerging field, which aims to extend the capabilities of information technology beyond digital logic. A compact nanoscale device, emulating biological synapses, is needed as the building block for brain-like computational systems. Here, we report a new nanoscale electronic synapse based on technologically mature phase change materials employed in optical data storage and nonvolatile memory applications. We utilize continuous resistance transitions in phase change materials to mimic the analog nature of biological synapses, enabling the implementation of a synaptic learning rule. We demonstrate different forms of spike-timing-dependent plasticity using the same nanoscale synapse with picojoule level energy consumption.
G(sup 4)FET Implementations of Some Logic Circuits
NASA Technical Reports Server (NTRS)
Mojarradi, Mohammad; Akarvardar, Kerem; Cristoleveanu, Sorin; Gentil, Paul; Blalock, Benjamin; Chen, Suhan
2009-01-01
Some logic circuits have been built and demonstrated to work substantially as intended, all as part of a continuing effort to exploit the high degrees of design flexibility and functionality of the electronic devices known as G(sup 4)FETs and described below. These logic circuits are intended to serve as prototypes of more complex advanced programmable-logicdevice-type integrated circuits, including field-programmable gate arrays (FPGAs). In comparison with prior FPGAs, these advanced FPGAs could be much more efficient because the functionality of G(sup 4)FETs is such that fewer discrete components are needed to perform a given logic function in G(sup 4)FET circuitry than are needed perform the same logic function in conventional transistor-based circuitry. The underlying concept of using G(sup 4)FETs as building blocks of programmable logic circuitry was also described, from a different perspective, in G(sup 4)FETs as Universal and Programmable Logic Gates (NPO-41698), NASA Tech Briefs, Vol. 31, No. 7 (July 2007), page 44. A G(sup 4)FET can be characterized as an accumulation-mode silicon-on-insulator (SOI) metal oxide/semiconductor field-effect transistor (MOSFET) featuring two junction field-effect transistor (JFET) gates. The structure of a G(sup 4)FET (see Figure 1) is the same as that of a p-channel inversion-mode SOI MOSFET with two body contacts on each side of the channel. The top gate (G1), the substrate emulating a back gate (G2), and the junction gates (JG1 and JG2) can be biased independently of each other and, hence, each can be used to independently control some aspects of the conduction characteristics of the transistor. The independence of the actions of the four gates is what affords the enhanced functionality and design flexibility of G(sup 4)FETs. The present G(sup 4)FET logic circuits include an adjustable-threshold inverter, a real-time-reconfigurable logic gate, and a dynamic random-access memory (DRAM) cell (see Figure 2). The configuration of the adjustable-threshold inverter is similar to that of an ordinary complementary metal oxide semiconductor (CMOS) inverter except that an NMOSFET (a MOSFET having an n-doped channel and a p-doped Si substrate) is replaced by an n-channel G(sup 4)FET
NASA Astrophysics Data System (ADS)
Zhang, Xiang; Dutta, Niloy K.
2018-01-01
We investigate all-optical logic operation in quantum-dot semiconductor optical amplifier (QD-SOA) based Mach-Zehnder interferometer considering the effects of two-photon absorption (TPA). TPA occurs during the propagation of sub-picosecond pulses in QD-SOA, which leads to a change in carrier recovery dynamics in quantum-dots. We utilize a rate equation model to take into account carrier refill through TPA and nonlinear dynamics including carrier heating and spectral hole burning in the QD-SOA. The simulation results show the TPA-induced pumping in the QD-SOA can reduce the pattern effect and increase the output quality of the all-optical logic operation. With TPA, this scheme is suitable for high-speed Boolean logic operation at 320 Gb/s.
Electro-optical graphene plasmonic logic gates.
Ooi, Kelvin J A; Chu, Hong Son; Bai, Ping; Ang, Lay Kee
2014-03-15
The versatile control of graphene's plasmonic modes via an external gate-voltage inspires us to design efficient electro-optical graphene plasmonic logic gates at the midinfrared wavelengths. We show that these devices are superior to the conventional optical logic gates because the former possess cut-off states and interferometric effects. Moreover, the designed six basic logic gates (i.e., NOR/AND, NAND/OR, XNOR/XOR) achieved not only ultracompact size lengths of less than λ/28 with respect to the operating wavelength of 10 μm, but also a minimum extinction ratio as high as 15 dB. These graphene plasmonic logic gates are potential building blocks for future nanoscale midinfrared photonic integrated circuits.
NASA Astrophysics Data System (ADS)
Ostrowsky, D. B.; Sriram, S.
Aspects of waveguide technology are explored, taking into account waveguide fabrication techniques in GaAs/GaAlAs, the design and fabrication of AlGaAs/GaAs phase couplers for optical integrated circuit applications, ion implanted GaAs integrated optics fabrication technology, a direct writing electron beam lithography based process for the realization of optoelectronic integrated circuits, and advances in the development of semiconductor integrated optical circuits for telecommunications. Other subjects examined are related to optical signal processing, optical switching, and questions of optical bistability and logic. Attention is given to acousto-optic techniques in integrated optics, acousto-optic Bragg diffraction in proton exchanged waveguides, optical threshold logic architectures for hybrid binary/residue processors, integrated optical modulation and switching, all-optic logic devices for waveguide optics, optoelectronic switching, high-speed photodetector switching, and a mechanical optical switch.
Aptamer-Binding Directed DNA Origami Pattern for Logic Gates.
Yang, Jing; Jiang, Shuoxing; Liu, Xiangrong; Pan, Linqiang; Zhang, Cheng
2016-12-14
In this study, an aptamer-substrate strategy is introduced to control programmable DNA origami pattern. Combined with DNA aptamer-substrate binding and DNAzyme-cutting, small DNA tiles were specifically controlled to fill into the predesigned DNA origami frame. Here, a set of DNA logic gates (OR, YES, and AND) are performed in response to the stimuli of adenosine triphosphate (ATP) and cocaine. The experimental results are confirmed by AFM imaging and time-dependent fluorescence changes, demonstrating that the geometric patterns are regulated in a controllable and programmable manner. Our approach provides a new platform for engineering programmable origami nanopatterns and constructing complex DNA nanodevices.
Implementing a Microcontroller Watchdog with a Field-Programmable Gate Array (FPGA)
NASA Technical Reports Server (NTRS)
Straka, Bartholomew
2013-01-01
Reliability is crucial to safety. Redundancy of important system components greatly enhances reliability and hence safety. Field-Programmable Gate Arrays (FPGAs) are useful for monitoring systems and handling the logic necessary to keep them running with minimal interruption when individual components fail. A complete microcontroller watchdog with logic for failure handling can be implemented in a hardware description language (HDL.). HDL-based designs are vendor-independent and can be used on many FPGAs with low overhead.
Programmable Logic Controllers for Research on the Cyber Security of Industrial Power Plants
2017-02-12
group . 15. SUBJECT TERMS Industrial control systems, cyber security 16. SECURITY CLASSIFICATION OF: 17. LIMITATION OF a. REPORT b. ABSTRACT c. THIS...currently valid OMB control number. PLEASE DO NOT RETURN YOUR FORM TO THE ABOVE ADDRESS. 1. REPORT DATE (00-MM-YYYY) ,2. REPORT TYPE 3. DATES COVERED...From- To) 12/02/2017 Final 15 August 2015 - 12 February 2017 4. TITLE AND SUBTITLE Sa. CONTRACT NUMBER Programmable Logic Controllers for Research
NASA Technical Reports Server (NTRS)
2005-01-01
Thin-Film Resistance Heat-Flux Sensors Circuit Indicates that Voice-Recording Disks are Nearly Full Optical Sensing of Combustion Instabilities in Gas Turbines Topics include: Crane-Load Contact Sensor; Hexagonal and Pentagonal Fractal Multiband Antennas; Multifunctional Logic Gate Controlled by Temperature; Multifunctional Logic Gate Controlled by Supply Voltage; Power Divider for Waveforms Rich in Harmonics; SCB Quantum Computers Using iSWAP and 1-Qubit Rotations; CSAM Metrology Software Tool; Update on Rover Sequencing and Visualization Program; Selecting Data from a Star Catalog; Rotating Desk for Collaboration by Two Computer Programmers; Variable-Pressure Washer; Magnetically Attached Multifunction Maintenance Rover; Improvements in Fabrication of Sand/Binder Cores for Casting; Solid Freeform Fabrication of Composite-Material Objects; Efficient Computational Model of Hysteresis; Gauges for Highly Precise Metrology of a Compound Mirror; Improved Electrolytic Hydrogen Peroxide Generator; High-Power Fiber Lasers Using Photonic Band Gap Materials; Ontology-Driven Information Integration; Quantifying Traversability of Terrain for a Mobile Robot; More About Arc-Welding Process for Making Carbon Nanotubes; Controlling Laser Spot Size in Outer Space; or Software-Reconfigurable Processors for Spacecraft.
46 CFR 62.25-25 - Programmable systems and devices.
Code of Federal Regulations, 2014 CFR
2014-10-01
... 46 Shipping 2 2014-10-01 2014-10-01 false Programmable systems and devices. 62.25-25 Section 62.25... AUTOMATION General Requirements for All Automated Vital Systems § 62.25-25 Programmable systems and devices. (a) Programmable control or alarm system logic must not be altered after Design Verification testing...
1988-06-27
de olf nessse end Id e ;-tl Sb ieeI smleo) ,Optical Artificial Intellegence ; Optical inference engines; Optical logic; Optical informationprocessing...common. They arise in areas such as expert systems and other artificial intelligence systems. In recent years, the computer science language PROLOG has...cal processors should in principle be well suited for : I artificial intelligence applications. In recent years, symbolic logic processing. , the
Ma, Shen; Ye, Han; Yu, Zhong-Yuan; Zhang, Wen; Peng, Yi-Wei; Cheng, Xiang; Liu, Yu-Min
2016-01-11
We propose a new scheme based on quantum dot-bimodal cavity coupling system to realize all-optical switch and logic gates in low-photon-number regime. Suppression of mode transmission due to the destructive interference effect is theoretically demonstrated by driving the cavity with two orthogonally polarized pulsed lasers at certain pulse delay. The transmitted mode can be selected by designing laser pulse sequence. The optical switch with high on-off ratio emerges when considering one driving laser as the control. Moreover, the AND/OR logic gates based on photon polarization are achieved by cascading the coupling system. Both proposed optical switch and logic gates work well in ultra-low energy magnitude. Our work may enable various applications of all-optical computing and quantum information processing.
Ma, Shen; Ye, Han; Yu, Zhong-Yuan; Zhang, Wen; Peng, Yi-Wei; Cheng, Xiang; Liu, Yu-Min
2016-01-01
We propose a new scheme based on quantum dot-bimodal cavity coupling system to realize all-optical switch and logic gates in low-photon-number regime. Suppression of mode transmission due to the destructive interference effect is theoretically demonstrated by driving the cavity with two orthogonally polarized pulsed lasers at certain pulse delay. The transmitted mode can be selected by designing laser pulse sequence. The optical switch with high on-off ratio emerges when considering one driving laser as the control. Moreover, the AND/OR logic gates based on photon polarization are achieved by cascading the coupling system. Both proposed optical switch and logic gates work well in ultra-low energy magnitude. Our work may enable various applications of all-optical computing and quantum information processing. PMID:26750557
A novel productivity-driven logic element for field-programmable devices
NASA Astrophysics Data System (ADS)
Marconi, Thomas; Bertels, Koen; Gaydadjiev, Georgi
2014-06-01
Although various techniques have been proposed for power reduction in field-programmable devices (FPDs), they are still all based on conventional logic elements (LEs). In the conventional LE, the output of the combinational logic (e.g. the look-up table (LUT) in many field-programmable gate arrays (FPGAs)) is connected to the input of the storage element; while the D flip-flop (DFF) is always clocked even when not necessary. Such unnecessary transitions waste power. To address this problem, we propose a novel productivity-driven LE with reduced number of transitions. The differences between our LE and the conventional LE are in the FFs-type used and the internal LE organisation. In our LEs, DFFs have been replaced by T flip-flops with the T input permanently connected to logic value 1. Instead of connecting the output of the combinational logic to the FF input, we use it as the FF clock. The proposed LE has been validated via Simulation Program with Integrated Circuit Emphasis (SPICE) simulations for a 45-nm Complementary Metal-Oxide-Semiconductor (CMOS) technology as well as via a real Computer-Aided Design (CAD) tools on a real FPGA using the standard Microelectronic Center of North Carolina (MCNC) benchmark circuits. The experimental results show that FPDs using our proposal not only have 48% lower total power but also run 17% faster than conventional FPDs on average.
NASA Astrophysics Data System (ADS)
Kotb, Amer; Zoiros, Kyriakos E.
2016-08-01
The concept of soliton provides a line in research in telecommunications systems. In the present study, a soliton all-optical logic AND gate with semiconductor optical amplifier (SOA)-assisted Mach-Zehnder interferometer has been numerically simulated and investigated. The dependence of the output quality factor (Q-factor) on the soliton characteristics and SOA parameters has been examined and assessed. The obtained results demonstrate that the soliton AND gate is capable of operating at a data rate of 80 Gb/s with logical correctness and high-output Q-factor.
Studies in optical parallel processing. [All optical and electro-optic approaches
NASA Technical Reports Server (NTRS)
Lee, S. H.
1978-01-01
Threshold and A/D devices for converting a gray scale image into a binary one were investigated for all-optical and opto-electronic approaches to parallel processing. Integrated optical logic circuits (IOC) and optical parallel logic devices (OPA) were studied as an approach to processing optical binary signals. In the IOC logic scheme, a single row of an optical image is coupled into the IOC substrate at a time through an array of optical fibers. Parallel processing is carried out out, on each image element of these rows, in the IOC substrate and the resulting output exits via a second array of optical fibers. The OPAL system for parallel processing which uses a Fabry-Perot interferometer for image thresholding and analog-to-digital conversion, achieves a higher degree of parallel processing than is possible with IOC.
Programmable bioelectronics in a stimuli-encoded 3D graphene interface.
Parlak, Onur; Beyazit, Selim; Tse-Sum-Bui, Bernadette; Haupt, Karsten; Turner, Anthony P F; Tiwari, Ashutosh
2016-05-21
The ability to program and mimic the dynamic microenvironment of living organisms is a crucial step towards the engineering of advanced bioelectronics. Here, we report for the first time a design for programmable bioelectronics, with 'built-in' switchable and tunable bio-catalytic performance that responds simultaneously to appropriate stimuli. The designed bio-electrodes comprise light and temperature responsive compartments, which allow the building of Boolean logic gates (i.e."OR" and "AND") based on enzymatic communications to deliver logic operations.
Starting Circuit For Erasable Programmable Logic Device
NASA Technical Reports Server (NTRS)
Cole, Steven W.
1990-01-01
Voltage regulator bypassed to supply starting current. Starting or "pullup" circuit supplies large inrush of current required by erasable programmable logic device (EPLD) while being turned on. Operates only during such intervals of high demand for current and has little effect any other time. Performs needed bypass, acting as current-dependent shunt connecting battery or other source of power more nearly directly to EPLD. Input capacitor of regulator removed when starting circuit installed, reducing probability of damage to transistor in event of short circuit in or across load.
Flexible programmable logic module
Robertson, Perry J.; Hutchinson, Robert L.; Pierson, Lyndon G.
2001-01-01
The circuit module of this invention is a VME board containing a plurality of programmable logic devices (PLDs), a controlled impedance clock tree, and interconnecting buses. The PLDs are arranged to permit systolic processing of a problem by offering wide data buses and a plurality of processing nodes. The board contains a clock reference and clock distribution tree that can drive each of the PLDs with two critically timed clock references. External clock references can be used to drive additional circuit modules all operating from the same synchronous clock reference.
Molecular implementation of simple logic programs.
Ran, Tom; Kaplan, Shai; Shapiro, Ehud
2009-10-01
Autonomous programmable computing devices made of biomolecules could interact with a biological environment and be used in future biological and medical applications. Biomolecular implementations of finite automata and logic gates have already been developed. Here, we report an autonomous programmable molecular system based on the manipulation of DNA strands that is capable of performing simple logical deductions. Using molecular representations of facts such as Man(Socrates) and rules such as Mortal(X) <-- Man(X) (Every Man is Mortal), the system can answer molecular queries such as Mortal(Socrates)? (Is Socrates Mortal?) and Mortal(X)? (Who is Mortal?). This biomolecular computing system compares favourably with previous approaches in terms of expressive power, performance and precision. A compiler translates facts, rules and queries into their molecular representations and subsequently operates a robotic system that assembles the logical deductions and delivers the result. This prototype is the first simple programming language with a molecular-scale implementation.
Pradhan, Rajib
2014-06-10
This work proposes a scheme of all-optical XNOR/NOT logic gates based on a reflective vertical cavity semiconductor (quantum wells, QWs) saturable absorber (VCSSA). In a semiconductor Fabry-Perot cavity operated with a low-intensity resonance wavelength, both intensity-dependent saturating phase-shift and thermal phase-shift occur, which are considered in the proposed logic operations. The VCSSA-based logics are possible using the saturable behavior of reflectivity under the typical operating conditions. The low-intensity saturable reflectivity is reported for all-optical logic operations where all possible nonlinear phase-shifts are ignored. Here, saturable absorption (SA) and the nonlinear phase-shift-based all-optical XNOR/NOT gates and one-bit memory or LATCH are proposed under new operating conditions. All operations are demonstrated for a VCSSA based on InGaAs/InP QWs. These types of SA-based logic devices can be comfortably used for a signal bit rate of about 10 GHz corresponding to the carrier recovery time of the semiconductor material.
NASA Astrophysics Data System (ADS)
Arestova, M. L.; Bykovskii, A. Yu
1995-10-01
An architecture is proposed for a specialised optoelectronic multivalued logic processor based on the Allen—Givone algebra. The processor is intended for multiparametric processing of data arriving from a large number of sensors or for tackling spectral analysis tasks. The processor architecture makes it possible to obtain an approximate general estimate of the state of an object being diagnosed on a p-level scale. Optoelectronic systems are proposed for MAXIMUM, MINIMUM, and LITERAL logic gates, based on optical-frequency encoding of logic levels. Corresponding logic gates form a complete set of logic functions in the Allen—Givone algebra.
Optical NOR logic gate design on square lattice photonic crystal platform
DOE Office of Scientific and Technical Information (OSTI.GOV)
D’souza, Nirmala Maria, E-mail: nirmala@cukerala.ac.in; Mathew, Vincent, E-mail: vincent@cukerala.ac.in
We numerically demonstrate a new configuration of all-optical NOR logic gate with square lattice photonic crystal (PhC) waveguide using finite difference time domain (FDTD) method. The logic operations are based on interference effect of optical waves. We have determined the operating frequency range by calculating the band structure for a perfectly periodic PhC using plane wave expansion (PWE) method. Response time of this logic gate is 1.98 ps and it can be operated with speed about 513 GB/s. The proposed device consists of four linear waveguides and a square ring resonator waveguides on PhC platform.
A type of all-optical logic gate based on graphene surface plasmon polaritons
NASA Astrophysics Data System (ADS)
Wu, Xiaoting; Tian, Jinping; Yang, Rongcao
2017-11-01
In this paper, a novel type of all-optical logic device based on graphene surface plasmon polaritons (GSP) is proposed. By utilizing linear interference between the GSP waves propagating in the different channels, this new structure can realize six different basic logic gates including OR, XOR, NOT, AND, NOR, and NAND. The state of ;ON/OFF; of each input channel can be well controlled by tuning the optical conductivity of graphene sheets, which can be further controlled by changing the external gate voltage. This type of logic gate is compact in geometrical sizes and is a potential block in the integration of nanophotonic devices.
Wang, Cheng-Yu; Chen, Chun-Wei; Jau, Hung-Chang; Li, Cheng-Chang; Cheng, Chiao-Yu; Wang, Chun-Ta; Leng, Shi-Ee; Khoo, Iam-Choon; Lin, Tsung-Hsien
2016-01-01
In this paper, we show that anisotropic photosensitive nematic liquid crystals (PNLC) made by incorporating anisotropic absorbing dyes are promising candidates for constructing all-optical elements by virtue of the extraordinarily large optical nonlinearity of the nematic host. In particular, we have demonstrated several room-temperature ‘prototype’ PNLC-based all-optical devices such as optical diode, optical transistor and all primary logic gate operations (OR, AND, NOT) based on such optical transistor. Owing to the anisotropic absorption property and the optical activity of the twist alignment nematic cell, spatially non-reciprocal transmission response can be obtained within a sizeable optical isolation region of ~210 mW. Exploiting the same mechanisms, a tri-terminal configuration as an all-optical analogue of a bipolar junction transistor is fabricated. Its ability to be switched by an optical field enables us to realize an all-optical transistor and demonstrate cascadability, signal fan-out, logic restoration, and various logical gate operations such as OR, AND and NOT. Due to the possibility of synthesizing anisotropic dyes and wide ranging choice of liquid crystals nonlinear optical mechanisms, these all-optical operations can be optimized to have much lower thresholds and faster response speeds. The demonstrated capabilities of these devices have shown great potential in all-optical control system and photonic integrated circuits. PMID:27491391
NASA Astrophysics Data System (ADS)
Wang, Cheng-Yu; Chen, Chun-Wei; Jau, Hung-Chang; Li, Cheng-Chang; Cheng, Chiao-Yu; Wang, Chun-Ta; Leng, Shi-Ee; Khoo, Iam-Choon; Lin, Tsung-Hsien
2016-08-01
In this paper, we show that anisotropic photosensitive nematic liquid crystals (PNLC) made by incorporating anisotropic absorbing dyes are promising candidates for constructing all-optical elements by virtue of the extraordinarily large optical nonlinearity of the nematic host. In particular, we have demonstrated several room-temperature ‘prototype’ PNLC-based all-optical devices such as optical diode, optical transistor and all primary logic gate operations (OR, AND, NOT) based on such optical transistor. Owing to the anisotropic absorption property and the optical activity of the twist alignment nematic cell, spatially non-reciprocal transmission response can be obtained within a sizeable optical isolation region of ~210 mW. Exploiting the same mechanisms, a tri-terminal configuration as an all-optical analogue of a bipolar junction transistor is fabricated. Its ability to be switched by an optical field enables us to realize an all-optical transistor and demonstrate cascadability, signal fan-out, logic restoration, and various logical gate operations such as OR, AND and NOT. Due to the possibility of synthesizing anisotropic dyes and wide ranging choice of liquid crystals nonlinear optical mechanisms, these all-optical operations can be optimized to have much lower thresholds and faster response speeds. The demonstrated capabilities of these devices have shown great potential in all-optical control system and photonic integrated circuits.
Wang, Cheng-Yu; Chen, Chun-Wei; Jau, Hung-Chang; Li, Cheng-Chang; Cheng, Chiao-Yu; Wang, Chun-Ta; Leng, Shi-Ee; Khoo, Iam-Choon; Lin, Tsung-Hsien
2016-08-05
In this paper, we show that anisotropic photosensitive nematic liquid crystals (PNLC) made by incorporating anisotropic absorbing dyes are promising candidates for constructing all-optical elements by virtue of the extraordinarily large optical nonlinearity of the nematic host. In particular, we have demonstrated several room-temperature 'prototype' PNLC-based all-optical devices such as optical diode, optical transistor and all primary logic gate operations (OR, AND, NOT) based on such optical transistor. Owing to the anisotropic absorption property and the optical activity of the twist alignment nematic cell, spatially non-reciprocal transmission response can be obtained within a sizeable optical isolation region of ~210 mW. Exploiting the same mechanisms, a tri-terminal configuration as an all-optical analogue of a bipolar junction transistor is fabricated. Its ability to be switched by an optical field enables us to realize an all-optical transistor and demonstrate cascadability, signal fan-out, logic restoration, and various logical gate operations such as OR, AND and NOT. Due to the possibility of synthesizing anisotropic dyes and wide ranging choice of liquid crystals nonlinear optical mechanisms, these all-optical operations can be optimized to have much lower thresholds and faster response speeds. The demonstrated capabilities of these devices have shown great potential in all-optical control system and photonic integrated circuits.
Feasible logic Bell-state analysis with linear optics
Zhou, Lan; Sheng, Yu-Bo
2016-01-01
We describe a feasible logic Bell-state analysis protocol by employing the logic entanglement to be the robust concatenated Greenberger-Horne-Zeilinger (C-GHZ) state. This protocol only uses polarization beam splitters and half-wave plates, which are available in current experimental technology. We can conveniently identify two of the logic Bell states. This protocol can be easily generalized to the arbitrary C-GHZ state analysis. We can also distinguish two N-logic-qubit C-GHZ states. As the previous theory and experiment both showed that the C-GHZ state has the robustness feature, this logic Bell-state analysis and C-GHZ state analysis may be essential for linear-optical quantum computation protocols whose building blocks are logic-qubit entangled state. PMID:26877208
Feasible logic Bell-state analysis with linear optics.
Zhou, Lan; Sheng, Yu-Bo
2016-02-15
We describe a feasible logic Bell-state analysis protocol by employing the logic entanglement to be the robust concatenated Greenberger-Horne-Zeilinger (C-GHZ) state. This protocol only uses polarization beam splitters and half-wave plates, which are available in current experimental technology. We can conveniently identify two of the logic Bell states. This protocol can be easily generalized to the arbitrary C-GHZ state analysis. We can also distinguish two N-logic-qubit C-GHZ states. As the previous theory and experiment both showed that the C-GHZ state has the robustness feature, this logic Bell-state analysis and C-GHZ state analysis may be essential for linear-optical quantum computation protocols whose building blocks are logic-qubit entangled state.
NASA Technical Reports Server (NTRS)
Athale, R. A.; Lee, S. H.
1978-01-01
The paper describes the fabrication and operation of an optical parallel logic (OPAL) device which performs Boolean algebraic operations on binary images. Several logic operations on two input binary images were demonstrated using an 8 x 8 device with a CdS photoconductor and a twisted nematic liquid crystal. Two such OPAL devices can be interconnected to form a half-adder circuit which is one of the essential components of a CPU in a digital signal processor.
Nonlinear interferometry approach to photonic sequential logic
NASA Astrophysics Data System (ADS)
Mabuchi, Hideo
2011-10-01
Motivated by rapidly advancing capabilities for extensive nanoscale patterning of optical materials, I propose an approach to implementing photonic sequential logic that exploits circuit-scale phase coherence for efficient realizations of fundamental components such as a NAND-gate-with-fanout and a bistable latch. Kerr-nonlinear optical resonators are utilized in combination with interference effects to drive the binary logic. Quantum-optical input-output models are characterized numerically using design parameters that yield attojoule-scale energy separation between the latch states.
NASA Astrophysics Data System (ADS)
Konishi, Tsuyoshi; Tanida, Jun; Ichioka, Yoshiki
1995-06-01
A novel technique, the visual-area coding technique (VACT), for the optical implementation of fuzzy logic with the capability of visualization of the results is presented. This technique is based on the microfont method and is considered to be an instance of digitized analog optical computing. Huge amounts of data can be processed in fuzzy logic with the VACT. In addition, real-time visualization of the processed result can be accomplished.
III-V Semiconductor Optical Micro-Ring Resonators
NASA Astrophysics Data System (ADS)
Grover, Rohit; Absil, Philippe P.; Ibrahim, Tarek A.; Ho, Ping-Tong
2004-05-01
We describe the theory of optical ring resonators, and our work on GaAs-AlGaAs and GaInAsP-InP optical micro-ring resonators. These devices are promising building blocks for future all-optical signal processing and photonic logic circuits. Their versatility allows the fabrication of ultra-compact multiplexers/demultiplexers, optical channel dropping filters, lasers, amplifiers, and logic gates (to name a few), which will enable large-scale monolithic integration for optics.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Tang, Jason D.; Schroeppel, Richard Crabtree; Robertson, Perry J.
With the build-out of large transport networks utilizing optical technologies, more and more capacity is being made available. Innovations in Dense Wave Division Multiplexing (DWDM) and the elimination of optical-electrical-optical conversions have brought on advances in communication speeds as we move into 10 Gigabit Ethernet and above. Of course, there is a need to encrypt data on these optical links as the data traverses public and private network backbones. Unfortunately, as the communications infrastructure becomes increasingly optical, advances in encryption (done electronically) have failed to keep up. This project examines the use of optical logic for implementing encryption in themore » photonic domain to achieve the requisite encryption rates. This paper documents the innovations and advances of work first detailed in 'Photonic Encryption using All Optical Logic,' [1]. A discussion of underlying concepts can be found in SAND2003-4474. In order to realize photonic encryption designs, technology developed for electrical logic circuits must be translated to the photonic regime. This paper examines S-SEED devices and how discrete logic elements can be interconnected and cascaded to form an optical circuit. Because there is no known software that can model these devices at a circuit level, the functionality of S-SEED devices in an optical circuit was modeled in PSpice. PSpice allows modeling of the macro characteristics of the devices in context of a logic element as opposed to device level computational modeling. By representing light intensity as voltage, 'black box' models are generated that accurately represent the intensity response and logic levels in both technologies. By modeling the behavior at the systems level, one can incorporate systems design tools and a simulation environment to aid in the overall functional design. Each black box model takes certain parameters (reflectance, intensity, input response), and models the optical ripple and time delay characteristics. These 'black box' models are interconnected and cascaded in an encrypting/scrambling algorithm based on a study of candidate encryption algorithms. Demonstration circuits show how these logic elements can be used to form NAND, NOR, and XOR functions. This paper also presents functional analysis of a serial, low gate count demonstration algorithm suitable for scrambling/encryption using S-SEED devices.« less
Implementation of trinary logic in a polarization encoded optical shadow-casting scheme.
Rizvi, R A; Zaheer, K; Zubairy, M S
1991-03-10
The design of various multioutput trinary combinational logic units by a polarization encoded optical shadow-casting (POSC) technique is presented. The POSC modified algorithm is employed to design and implement these logic elements in a trinary number system with separate and simultaneous generation of outputs. A detailed solution of the POSC logic equations for a fixed source plane and a fixed decoding mask is given to obtain input pixel coding for a trinary half-adder, full adder, and subtractor.
Graphical approach for multiple values logic minimization
NASA Astrophysics Data System (ADS)
Awwal, Abdul Ahad S.; Iftekharuddin, Khan M.
1999-03-01
Multiple valued logic (MVL) is sought for designing high complexity, highly compact, parallel digital circuits. However, the practical realization of an MVL-based system is dependent on optimization of cost, which directly affects the optical setup. We propose a minimization technique for MVL logic optimization based on graphical visualization, such as a Karnaugh map. The proposed method is utilized to solve signed-digit binary and trinary logic minimization problems. The usefulness of the minimization technique is demonstrated for the optical implementation of MVL circuits.
Electrically reconfigurable logic array
NASA Technical Reports Server (NTRS)
Agarwal, R. K.
1982-01-01
To compose the complicated systems using algorithmically specialized logic circuits or processors, one solution is to perform relational computations such as union, division and intersection directly on hardware. These relations can be pipelined efficiently on a network of processors having an array configuration. These processors can be designed and implemented with a few simple cells. In order to determine the state-of-the-art in Electrically Reconfigurable Logic Array (ERLA), a survey of the available programmable logic array (PLA) and the logic circuit elements used in such arrays was conducted. Based on this survey some recommendations are made for ERLA devices.
Nonvolatile infrared memory in MoS2/PbS van der Waals heterostructures
Wen, Yao; Cai, Kaiming; Cheng, Ruiqing; Yin, Lei; Zhang, Yu; Li, Jie; Wang, Zhenxing; Wang, Feng; Wang, Fengmei; Shifa, Tofik Ahmed; Jiang, Chao; Yang, Hyunsoo
2018-01-01
Optoelectronic devices for information storage and processing are at the heart of optical communication technology due to their significant applications in optical recording and computing. The infrared radiations of 850, 1310, and 1550 nm with low energy dissipation in optical fibers are typical optical communication wavebands. However, optoelectronic devices that could convert and store the infrared data into electrical signals, thereby enabling optical data communications, have not yet been realized. We report an infrared memory device using MoS2/PbS van der Waals heterostructures, in which the infrared pulse intrigues a persistent resistance state that hardly relaxes within our experimental time scales (more than 104 s). The device fully retrieves the memory state even after powering off for 3 hours, indicating its potential for nonvolatile storage devices. Furthermore, the device presents a reconfigurable switch of 2000 stable cycles. Supported by a theoretical model with quantitative analysis, we propose that the optical memory and the electrical erasing phenomenon, respectively, originate from the localization of infrared-induced holes in PbS and gate voltage pulse-enhanced tunneling of electrons from MoS2 to PbS. The demonstrated MoS2 heterostructure–based memory devices open up an exciting field for optoelectronic infrared memory and programmable logic devices. PMID:29770356
Nonvolatile infrared memory in MoS2/PbS van der Waals heterostructures.
Wang, Qisheng; Wen, Yao; Cai, Kaiming; Cheng, Ruiqing; Yin, Lei; Zhang, Yu; Li, Jie; Wang, Zhenxing; Wang, Feng; Wang, Fengmei; Shifa, Tofik Ahmed; Jiang, Chao; Yang, Hyunsoo; He, Jun
2018-04-01
Optoelectronic devices for information storage and processing are at the heart of optical communication technology due to their significant applications in optical recording and computing. The infrared radiations of 850, 1310, and 1550 nm with low energy dissipation in optical fibers are typical optical communication wavebands. However, optoelectronic devices that could convert and store the infrared data into electrical signals, thereby enabling optical data communications, have not yet been realized. We report an infrared memory device using MoS 2 /PbS van der Waals heterostructures, in which the infrared pulse intrigues a persistent resistance state that hardly relaxes within our experimental time scales (more than 10 4 s). The device fully retrieves the memory state even after powering off for 3 hours, indicating its potential for nonvolatile storage devices. Furthermore, the device presents a reconfigurable switch of 2000 stable cycles. Supported by a theoretical model with quantitative analysis, we propose that the optical memory and the electrical erasing phenomenon, respectively, originate from the localization of infrared-induced holes in PbS and gate voltage pulse-enhanced tunneling of electrons from MoS 2 to PbS. The demonstrated MoS 2 heterostructure-based memory devices open up an exciting field for optoelectronic infrared memory and programmable logic devices.
G4-FETs as Universal and Programmable Logic Gates
NASA Technical Reports Server (NTRS)
Johnson, Travis; Fijany, Amir; Mojarradi, Mohammad; Vatan, Farrokh; Toomarian, Nikzad; Kolawa, Elizabeth; Cristoloveanu, Sorin; Blalock, Benjamin
2007-01-01
An analysis of a patented generic silicon- on-insulator (SOI) electronic device called a G4-FET has revealed that the device could be designed to function as a universal and programmable logic gate. The universality and programmability could be exploited to design logic circuits containing fewer discrete components than are required for conventional transistor-based circuits performing the same logic functions. A G4-FET is a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G4-FET can also be regarded as a single transistor having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of the SOI substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. With proper choice of the specific dimensions for the gates, channels, and ancillary features of the generic G4-FET, the device could be made to function as a three-input, one-output logic gate. As illustrated by the truth table in the top part of the figure, the behavior of this logic gate would be the inverse (the NOT) of that of a majority gate. In other words, the device would function as a NOT-majority gate. By simply adding an inverter, one could obtain a majority gate. In contrast, to construct a majority gate in conventional complementary metal oxide/semiconductor (CMOS) circuitry, one would need four three-input AND gates and a four-input OR gate, altogether containing 32 transistors.
You, Mingxu; Zhu, Guizhi; Chen, Tao; Donovan, Michael J; Tan, Weihong
2015-01-21
The specific inventory of molecules on diseased cell surfaces (e.g., cancer cells) provides clinicians an opportunity for accurate diagnosis and intervention. With the discovery of panels of cancer markers, carrying out analyses of multiple cell-surface markers is conceivable. As a trial to accomplish this, we have recently designed a DNA-based device that is capable of performing autonomous logic-based analysis of two or three cancer cell-surface markers. Combining the specific target-recognition properties of DNA aptamers with toehold-mediated strand displacement reactions, multicellular marker-based cancer analysis can be realized based on modular AND, OR, and NOT Boolean logic gates. Specifically, we report here a general approach for assembling these modular logic gates to execute programmable and higher-order profiling of multiple coexisting cell-surface markers, including several found on cancer cells, with the capacity to report a diagnostic signal and/or deliver targeted photodynamic therapy. The success of this strategy demonstrates the potential of DNA nanotechnology in facilitating targeted disease diagnosis and effective therapy.
NASA Astrophysics Data System (ADS)
Oztekin, Halit; Temurtas, Feyzullah; Gulbag, Ali
The Arithmetic and Logic Unit (ALU) design is one of the important topics in Computer Architecture and Organization course in Computer and Electrical Engineering departments. There are ALU designs that have non-modular nature to be used as an educational tool. As the programmable logic technology has developed rapidly, it is feasible that ALU design based on Field Programmable Gate Array (FPGA) is implemented in this course. In this paper, we have adopted the modular approach to ALU design based on FPGA. All the modules in the ALU design are realized using schematic structure on Altera's Cyclone II Development board. Under this model, the ALU content is divided into four distinct modules. These are arithmetic unit except for multiplication and division operations, logic unit, multiplication unit and division unit. User can easily design any size of ALU unit since this approach has the modular nature. Then, this approach was applied to microcomputer architecture design named BZK.SAU.FPGA10.0 instead of the current ALU unit.
FAST TRACK COMMUNICATION: Reversible arithmetic logic unit for quantum arithmetic
NASA Astrophysics Data System (ADS)
Kirkedal Thomsen, Michael; Glück, Robert; Axelsen, Holger Bock
2010-09-01
This communication presents the complete design of a reversible arithmetic logic unit (ALU) that can be part of a programmable reversible computing device such as a quantum computer. The presented ALU is garbage free and uses reversible updates to combine the standard reversible arithmetic and logical operations in one unit. Combined with a suitable control unit, the ALU permits the construction of an r-Turing complete computing device. The garbage-free ALU developed in this communication requires only 6n elementary reversible gates for five basic arithmetic-logical operations on two n-bit operands and does not use ancillae. This remarkable low resource consumption was achieved by generalizing the V-shape design first introduced for quantum ripple-carry adders and nesting multiple V-shapes in a novel integrated design. This communication shows that the realization of an efficient reversible ALU for a programmable computing device is possible and that the V-shape design is a very versatile approach to the design of quantum networks.
Optical implementation of (3, 3, 2) regular rectangular CC-Banyan optical network
NASA Astrophysics Data System (ADS)
Yang, Junbo; Su, Xianyu
2007-07-01
CC-Banyan network plays an important role in the optical interconnection network. Based on previous reports of (2, 2, 3) the CC-Banyan network, another rectangular-Banyan network, i.e. (3, 3, 2) rectangular CC-Banyan network, has been discussed. First, according to its construction principle, the topological graph and the routing rule of (3, 3, 2) rectangular CC-Banyan network have been proposed. Then, the optically experimental setup of (3, 3, 2) rectangular CC-Banyan network has been designed and achieved. Each stage of node switch consists of phase spatial light modulator (PSLM) and polarizing beam-splitter (PBS), and fiber has been used to perform connection between adjacent stages. PBS features that s-component (perpendicular to the incident plane) of the incident light beam is reflected, and p-component (parallel to the incident plane) passes through it. According to switching logic, under the control of external electrical signals, PSLM functions to control routing paths of the signal beams, i.e. the polarization of each optical signal is rotated or not rotated 90° by a programmable PSLM. Finally, the discussion and analysis show that the experimental setup designed here can realize many functions such as optical signal switch and permutation. It has advantages of large number of input/output-ports, compact in structure, and low energy loss. Hence, the experimental setup can be used in optical communication and optical information processing.
Huang, Wei Tao; Luo, Hong Qun; Li, Nian Bing
2014-05-06
The most serious, and yet unsolved, problem of constructing molecular computing devices consists in connecting all of these molecular events into a usable device. This report demonstrates the use of Boolean logic tree for analyzing the chemical event network based on graphene, organic dye, thrombin aptamer, and Fenton reaction, organizing and connecting these basic chemical events. And this chemical event network can be utilized to implement fluorescent combinatorial logic (including basic logic gates and complex integrated logic circuits) and fuzzy logic computing. On the basis of the Boolean logic tree analysis and logic computing, these basic chemical events can be considered as programmable "words" and chemical interactions as "syntax" logic rules to construct molecular search engine for performing intelligent molecular search query. Our approach is helpful in developing the advanced logic program based on molecules for application in biosensing, nanotechnology, and drug delivery.
NASA Astrophysics Data System (ADS)
Qian, Feng; Li, Guoqiang
2001-12-01
In this paper a generalized look-ahead logic algorithm for number conversion from signed-digit to its complement representation is developed. By properly encoding the signed digits, all the operations are performed by binary logic, and unified logical expressions can be obtained for conversion from modified-signed-digit (MSD) to 2's complement, trinary signed-digit (TSD) to 3's complement, and quaternary signed-digit (QSD) to 4's complement. For optical implementation, a parallel logical array module using electron-trapping device is employed, which is suitable for realizing complex logic functions in the form of sum-of-product. The proposed algorithm and architecture are compatible with a general-purpose optoelectronic computing system.
Motivation for DOC III: 64-bit digital optical computer
NASA Astrophysics Data System (ADS)
Guilfoyle, Peter S.
1991-09-01
This paper suggests a new class of digital logic. OptiComp has focused on a digital optical logic family in order to capitalize on the inherent benefits of optical computing, which include (1) high FAN-IN and FAN-OUT, (2) low power consumption, (3) high noise margin, (4) high algorithmic efficiency using 'smart' interconnects, (5) free space leverage of GIBP (gate interconnect bandwidth product). Other well-known secondary advantages of optical logic include (but are not limited to) zero capacitive loading of signals at a detector, zero cross-talk between signals, zero signal dispersion, minimal clock skew (a few picoseconds or less in an imaging system). The primary focus of this paper is to demonstrate how each of the five advantages can be used to leverage other logic family performance such as GaAs; the secondary attributes will be discussed only in the context of introducing the DOC III architecture.
Motivation for DOC III: 64-bit digital optical computer
NASA Astrophysics Data System (ADS)
Guilfoyle, Peter S.
1991-09-01
The objective of this paper is to motivate a new class of digital logic. OptiComp has focused on a digital optical logic family in order to capitalize on the inherent benefits of optical computing, which include: (1) high FAN-IN and FAN-OUT, (2) low power consumption, (3) high noise margin, (4) high algorithmic efficiency using 'smart' interconnects, (5) free space leverage of GIBP (gate interconnect bandwidth product). Other well-known secondary advantages of optical logic include (but are not limited to): zero capacitive loading of signals at a detector, zero cross-talk between signals, zero signal dispersion, and minimal clock skew (a few picoseconds or less in an imaging system). The primary focus of this paper is on demonstrating how each of the five advantages can be used to leverage other logic family performance such as GaAs; the secondary attributes will be discussed only in the context of introducing the DOC III architecture.
Reconfigurable all-optical NOT, XOR, and NOR logic gates based on two dimensional photonic crystals
NASA Astrophysics Data System (ADS)
Parandin, Fariborz; Malmir, M. Reza; Naseri, Mosayeb; Zahedi, Abdulhamid
2018-01-01
Photonic crystals can be considered as one of the most important basis for designing optical devices. In this research, using two-dimensional photonic crystals with triangular lattices, ultra-compact logic gates are designed and simulated. The intended structure has the capability to be used as three logical gates (NOT, XOR, and NOR). The designed structures not only have characteristics of small dimensions which make them suitable for integrated optical circuits, but also exhibit very low power transfer delay which makes it possible to design high speed gates. On comparison with the previous works, our simulations show that at a wavelength of 1.55 μm , the gates indicate a time delay of about 0.1 ps and the contrast ratio for the XOR gate is about 30 dB, i.e., the proposed structures are more applicable in designing low error optical logic gates.
NASA Astrophysics Data System (ADS)
Wang, Xingfu; Zhang, Yong; Chen, Xinman; He, Miao; Liu, Chao; Yin, Yian; Zou, Xianshao; Li, Shuti
2014-09-01
Nonpolar a-axial GaN nanowire (NW) was first used to construct the MSM (metal-semiconductor-metal) symmetrical Schottky contact device for application as visible-blind ultraviolet (UV) detector. Without any surface or composition modifications, the fabricated device demonstrated a superior performance through a combination of its high sensitivity (up to 104 A W-1) and EQE value (up to 105), as well as ultrafast (<26 ms) response speed, which indicates that a balance between the photocurrent gain and the response speed has been achieved. Based on its excellent photoresponse performance, an optical logic AND gate and OR gate have been demonstrated for performing photo-electronic coupled logic devices by further integrating the fabricated GaN NW detectors, which logically convert optical signals to electrical signals in real time. These results indicate the possibility of using a nonpolar a-axial GaN NW not only as a high performance UV detector, but also as a stable optical logic device, both in light-wave communications and for future memory storage.Nonpolar a-axial GaN nanowire (NW) was first used to construct the MSM (metal-semiconductor-metal) symmetrical Schottky contact device for application as visible-blind ultraviolet (UV) detector. Without any surface or composition modifications, the fabricated device demonstrated a superior performance through a combination of its high sensitivity (up to 104 A W-1) and EQE value (up to 105), as well as ultrafast (<26 ms) response speed, which indicates that a balance between the photocurrent gain and the response speed has been achieved. Based on its excellent photoresponse performance, an optical logic AND gate and OR gate have been demonstrated for performing photo-electronic coupled logic devices by further integrating the fabricated GaN NW detectors, which logically convert optical signals to electrical signals in real time. These results indicate the possibility of using a nonpolar a-axial GaN NW not only as a high performance UV detector, but also as a stable optical logic device, both in light-wave communications and for future memory storage. Electronic supplementary information (ESI) available: Details of the EDS and SAED data, supplementary results of the UV detector, and the discussion of the transport properties of the MSM Schottky contact devices. See DOI: 10.1039/c4nr03581j
MIRIADS: miniature infrared imaging applications development system description and operation
NASA Astrophysics Data System (ADS)
Baxter, Christopher R.; Massie, Mark A.; McCarley, Paul L.; Couture, Michael E.
2001-10-01
A cooperative effort between the U.S. Air Force Research Laboratory, Nova Research, Inc., the Raytheon Infrared Operations (RIO) and Optics 1, Inc. has successfully produced a miniature infrared camera system that offers significant real-time signal and image processing capabilities by virtue of its modular design. This paper will present an operational overview of the system as well as results from initial testing of the 'Modular Infrared Imaging Applications Development System' (MIRIADS) configured as a missile early-warning detection system. The MIRIADS device can operate virtually any infrared focal plane array (FPA) that currently exists. Programmable on-board logic applies user-defined processing functions to the real-time digital image data for a variety of functions. Daughterboards may be plugged onto the system to expand the digital and analog processing capabilities of the system. A unique full hemispherical infrared fisheye optical system designed and produced by Optics 1, Inc. is utilized by the MIRIADS in a missile warning application to demonstrate the flexibility of the overall system to be applied to a variety of current and future AFRL missions.
Flight dynamics analysis and simulation of heavy lift airships. Volume 5: Programmer's manual
NASA Technical Reports Server (NTRS)
Ringland, R. F.; Tischler, M. B.; Jex, H. R.; Emmen, R. D.; Ashkenas, I. L.
1982-01-01
The Programmer's Manual contains explanations of the logic embodied in the various program modules, a dictionary of program variables, a subroutine listing, subroutine/common block/cross reference listing, and a calling/called subroutine cross reference listing.
NASA Technical Reports Server (NTRS)
Ng, Tak-kwong (Inventor); Herath, Jeffrey A. (Inventor)
2010-01-01
An integrated system mitigates the effects of a single event upset (SEU) on a reprogrammable field programmable gate array (RFPGA). The system includes (i) a RFPGA having an internal configuration memory, and (ii) a memory for storing a configuration associated with the RFPGA. Logic circuitry programmed into the RFPGA and coupled to the memory reloads a portion of the configuration from the memory into the RFPGA's internal configuration memory at predetermined times. Additional SEU mitigation can be provided by logic circuitry on the RFPGA that monitors and maintains synchronized operation of the RFPGA's digital clock managers.
All optical logic for optical pattern recognition and networking applications
NASA Astrophysics Data System (ADS)
Khoury, Jed
2017-05-01
In this paper, we propose architectures for the implementation 16 Boolean optical gates from two inputs using externally pumped phase- conjugate Michelson interferometer. Depending on the gate to be implemented, some require single stage interferometer and others require two stages interferometer. The proposed optical gates can be used in several applications in optical networks including, but not limited to, all-optical packet routers switching, and all-optical error detection. The optical logic gates can also be used in recognition of noiseless rotation and scale invariant objects such as finger prints for home land security applications.
NASA Astrophysics Data System (ADS)
Horowitz, Paul; Hill, Winfield
2015-04-01
1. Foundations; 2. Bipolar transistors; 3. Field effect transistors; 4. Operational amplifiers; 5. Precision circuits; 6. Filters; 7. Oscillators and timers; 8. Low noise techniques and transimpedance; 9. Power regulation; 10. Digital electronics; 11. Programmable logic devices; 12. Logical interfacing; 13. Digital meets analog; 14. Computers, controllers, and data links; 15. Microcontrollers.
A String Search Marketing Application Using Visual Programming
ERIC Educational Resources Information Center
Chin, Jerry M.; Chin, Mary H.; Van Landuyt, Cathryn
2013-01-01
This paper demonstrates the use of programing software that provides the student programmer visual cues to construct the code to a student programming assignment. This method does not disregard or minimize the syntax or required logical constructs. The student can concentrate more on the logic and less on the language itself.
NASA Astrophysics Data System (ADS)
Ghosh, Amal K.; Basuray, Amitabha
2008-11-01
The memory devices in multi-valued logic are of most significance in modern research. This paper deals with the implementation of basic memory devices in multi-valued logic using Savart plate and spatial light modulator (SLM) based optoelectronic circuits. Photons are used here as the carrier to speed up the operations. Optical tree architecture (OTA) has been also utilized in the optical interconnection network. We have exploited the advantages of Savart plates, SLMs and OTA and proposed the SLM based high speed JK, D-type and T-type flip-flops in a trinary system.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Blansett, Ethan L.; Schroeppel, Richard Crabtree; Tang, Jason D.
With the build-out of large transport networks utilizing optical technologies, more and more capacity is being made available. Innovations in Dense Wave Division Multiplexing (DWDM) and the elimination of optical-electrical-optical conversions have brought on advances in communication speeds as we move into 10 Gigabit Ethernet and above. Of course, there is a need to encrypt data on these optical links as the data traverses public and private network backbones. Unfortunately, as the communications infrastructure becomes increasingly optical, advances in encryption (done electronically) have failed to keep up. This project examines the use of optical logic for implementing encryption in themore » photonic domain to achieve the requisite encryption rates. In order to realize photonic encryption designs, technology developed for electrical logic circuits must be translated to the photonic regime. This paper examines two classes of all optical logic (SEED, gain competition) and how each discrete logic element can be interconnected and cascaded to form an optical circuit. Because there is no known software that can model these devices at a circuit level, the functionality of the SEED and gain competition devices in an optical circuit were modeled in PSpice. PSpice allows modeling of the macro characteristics of the devices in context of a logic element as opposed to device level computational modeling. By representing light intensity as voltage, 'black box' models are generated that accurately represent the intensity response and logic levels in both technologies. By modeling the behavior at the systems level, one can incorporate systems design tools and a simulation environment to aid in the overall functional design. Each black box model of the SEED or gain competition device takes certain parameters (reflectance, intensity, input response), and models the optical ripple and time delay characteristics. These 'black box' models are interconnected and cascaded in an encrypting/scrambling algorithm based on a study of candidate encryption algorithms. We found that a low gate count, cascadable encryption algorithm is most feasible given device and processing constraints. The modeling and simulation of optical designs using these components is proceeding in parallel with efforts to perfect the physical devices and their interconnect. We have applied these techniques to the development of a 'toy' algorithm that may pave the way for more robust optical algorithms. These design/modeling/simulation techniques are now ready to be applied to larger optical designs in advance of our ability to implement such systems in hardware.« less
2017-03-01
Implementation of a Loosely-Coupled Lockstep Approach in the Xilinx Zynq-7000 All Programmable SoC™ for High Consequence Applications Ryan D...sandia.gov Abstract: For high consequence applications requiring information assurance, the architecture of the Xilinx Zynq- 7000 All Programmable ...transaction checker residing in the Programmable Logic portion of the Zynq device will be discussed along with implementation results and latency
Miniaturization of the atmospheric laser communication APT system
NASA Astrophysics Data System (ADS)
Sun, Wei; Ai, Yong; Yang, Jinling; Huang, Haibo
2003-09-01
The paper presents a scheme of the miniaturization of APT system and the design of the system based on the investigation of status in quo. It deals with the infrared image of the other terminal's beacon from the Charge Coupled Device (CCD) by the Complex Programmable Logic Device (CPLD). The result of the transaction is delivered to Single Chip Microcomputer (SCM), which controls the micro-servomotor. Subsequently, the precision drive system drives the optical system that uses only one light axis for signal beam and beacon to finish the acquisition, pointing, and tracking of the communication terminals. The anlayses of the APT system's error indicate that the tracking error limits in 70uRad with the weight of the system lighter than 8-kilogram.
NASA Astrophysics Data System (ADS)
Lasher, Mark E.; Henderson, Thomas B.; Drake, Barry L.; Bocker, Richard P.
1986-09-01
The modified signed-digit (MSD) number representation offers full parallel, carry-free addition. A MSD adder has been described by the authors. This paper describes how the adder can be used in a tree structure to implement an optical multiply algorithm. Three different optical schemes, involving position, polarization, and intensity encoding, are proposed for realizing the trinary logic system. When configured in the generic multiplier architecture, these schemes yield the combinatorial logic necessary to carry out the multiplication algorithm. The optical systems are essentially three dimensional arrangements composed of modular units. Of course, this modularity is important for design considerations, while the parallelism and noninterfering communication channels of optical systems are important from the standpoint of reduced complexity. The authors have also designed electronic hardware to demonstrate and model the combinatorial logic required to carry out the algorithm. The electronic and proposed optical systems will be compared in terms of complexity and speed.
NASA Technical Reports Server (NTRS)
Rickard, D. A.; Bodenheimer, R. E.
1976-01-01
Digital computer components which perform two dimensional array logic operations (Tse logic) on binary data arrays are described. The properties of Golay transforms which make them useful in image processing are reviewed, and several architectures for Golay transform processors are presented with emphasis on the skeletonizing algorithm. Conventional logic control units developed for the Golay transform processors are described. One is a unique microprogrammable control unit that uses a microprocessor to control the Tse computer. The remaining control units are based on programmable logic arrays. Performance criteria are established and utilized to compare the various Golay transform machines developed. A critique of Tse logic is presented, and recommendations for additional research are included.
Linear and passive silicon diodes, isolators, and logic gates
NASA Astrophysics Data System (ADS)
Li, Zhi-Yuan
2013-12-01
Silicon photonic integrated devices and circuits have offered a promising means to revolutionalize information processing and computing technologies. One important reason is that these devices are compatible with conventional complementary metal oxide semiconductor (CMOS) processing technology that overwhelms current microelectronics industry. Yet, the dream to build optical computers has yet to come without the breakthrough of several key elements including optical diodes, isolators, and logic gates with low power, high signal contrast, and large bandwidth. Photonic crystal has a great power to mold the flow of light in micrometer/nanometer scale and is a promising platform for optical integration. In this paper we present our recent efforts of design, fabrication, and characterization of ultracompact, linear, passive on-chip optical diodes, isolators and logic gates based on silicon two-dimensional photonic crystal slabs. Both simulation and experiment results show high performance of these novel designed devices. These linear and passive silicon devices have the unique properties of small fingerprint, low power request, large bandwidth, fast response speed, easy for fabrication, and being compatible with COMS technology. Further improving their performance would open up a road towards photonic logics and optical computing and help to construct nanophotonic on-chip processor architectures for future optical computers.
NASA Astrophysics Data System (ADS)
Xiao, Huifu; Li, Dezhao; Liu, Zilong; Han, Xu; Chen, Wenping; Zhao, Ting; Tian, Yonghui; Yang, Jianhong
2018-03-01
In this paper, we propose and experimentally demonstrate an integrated optical device that can implement the logical function of priority encoding from a 4-bit electrical signal to a 2-bit optical signal. For the proof of concept, the thermo-optic modulation scheme is adopted to tune each micro-ring resonator (MRR). A monochromatic light with the working wavelength is coupled into the input port of the device through a lensed fiber, and the four input electrical logic signals regarded as pending encode signals are applied to the micro-heaters above four MRRs to control the working states of the optical switches. The encoding results are directed to the output ports in the form of light. At last, the logical function of priority encoding with an operation speed of 10 Kbps is demonstrated successfully.
NASA Astrophysics Data System (ADS)
Ding, Shulin; Wang, Guo Ping
2015-09-01
Classical nonlinear or quantum all-optical transistors are dependent on the value of input signal intensity or need extra co-propagating beams. In this paper, we present a kind of all-optical transistors constructed with parity-time (PT)-symmetric Y-junctions, which perform independently on the value of signal intensity in an unsaturated gain case and can also work after introducing saturated gain. Further, we show that control signal can switch the device from amplification of peaks in time to transformation of peaks to amplified troughs. By using these PT-symmetric Y-junctions with currently available materials and technologies, we can implement interesting logic functions such as NOT and XOR (exclusive OR) gates, implying potential applications of such structures in designing optical logic gates, optical switches, and signal transformations or amplifications.
Program to Optimize Simulated Trajectories (POST). Volume 3: Programmer's manual
NASA Technical Reports Server (NTRS)
Brauer, G. L.; Cornick, D. E.; Habeger, A. R.; Petersen, F. M.; Stevenson, R.
1975-01-01
Information pertinent to the programmer and relating to the program to optimize simulated trajectories (POST) is presented. Topics discussed include: program structure and logic, subroutine listings and flow charts, and internal FORTRAN symbols. The POST core requirements are summarized along with program macrologic.
Rapid and highly integrated FPGA-based Shack-Hartmann wavefront sensor for adaptive optics system
NASA Astrophysics Data System (ADS)
Chen, Yi-Pin; Chang, Chia-Yuan; Chen, Shean-Jen
2018-02-01
In this study, a field programmable gate array (FPGA)-based Shack-Hartmann wavefront sensor (SHWS) programmed on LabVIEW can be highly integrated into customized applications such as adaptive optics system (AOS) for performing real-time wavefront measurement. Further, a Camera Link frame grabber embedded with FPGA is adopted to enhance the sensor speed reacting to variation considering its advantage of the highest data transmission bandwidth. Instead of waiting for a frame image to be captured by the FPGA, the Shack-Hartmann algorithm are implemented in parallel processing blocks design and let the image data transmission synchronize with the wavefront reconstruction. On the other hand, we design a mechanism to control the deformable mirror in the same FPGA and verify the Shack-Hartmann sensor speed by controlling the frequency of the deformable mirror dynamic surface deformation. Currently, this FPGAbead SHWS design can achieve a 266 Hz cyclic speed limited by the camera frame rate as well as leaves 40% logic slices for additionally flexible design.
A DNAzyme-mediated logic gate for programming molecular capture and release on DNA origami.
Li, Feiran; Chen, Haorong; Pan, Jing; Cha, Tae-Gon; Medintz, Igor L; Choi, Jong Hyun
2016-06-28
Here we design a DNA origami-based site-specific molecular capture and release platform operated by a DNAzyme-mediated logic gate process. We show the programmability and versatility of this platform with small molecules, proteins, and nanoparticles, which may also be controlled by external light signals.
Nonvolatile reconfigurable sequential logic in a HfO2 resistive random access memory array.
Zhou, Ya-Xiong; Li, Yi; Su, Yu-Ting; Wang, Zhuo-Rui; Shih, Ling-Yi; Chang, Ting-Chang; Chang, Kuan-Chang; Long, Shi-Bing; Sze, Simon M; Miao, Xiang-Shui
2017-05-25
Resistive random access memory (RRAM) based reconfigurable logic provides a temporal programmable dimension to realize Boolean logic functions and is regarded as a promising route to build non-von Neumann computing architecture. In this work, a reconfigurable operation method is proposed to perform nonvolatile sequential logic in a HfO 2 -based RRAM array. Eight kinds of Boolean logic functions can be implemented within the same hardware fabrics. During the logic computing processes, the RRAM devices in an array are flexibly configured in a bipolar or complementary structure. The validity was demonstrated by experimentally implemented NAND and XOR logic functions and a theoretically designed 1-bit full adder. With the trade-off between temporal and spatial computing complexity, our method makes better use of limited computing resources, thus provides an attractive scheme for the construction of logic-in-memory systems.
Programmable and Multiparameter DNA-Based Logic Platform For Cancer Recognition and Targeted Therapy
2014-01-01
The specific inventory of molecules on diseased cell surfaces (e.g., cancer cells) provides clinicians an opportunity for accurate diagnosis and intervention. With the discovery of panels of cancer markers, carrying out analyses of multiple cell-surface markers is conceivable. As a trial to accomplish this, we have recently designed a DNA-based device that is capable of performing autonomous logic-based analysis of two or three cancer cell-surface markers. Combining the specific target-recognition properties of DNA aptamers with toehold-mediated strand displacement reactions, multicellular marker-based cancer analysis can be realized based on modular AND, OR, and NOT Boolean logic gates. Specifically, we report here a general approach for assembling these modular logic gates to execute programmable and higher-order profiling of multiple coexisting cell-surface markers, including several found on cancer cells, with the capacity to report a diagnostic signal and/or deliver targeted photodynamic therapy. The success of this strategy demonstrates the potential of DNA nanotechnology in facilitating targeted disease diagnosis and effective therapy. PMID:25361164
Programmable Regulation of DNA Conjugation to Gold Nanoparticles via Strand Displacement.
Zhang, Cheng; Wu, Ranfeng; Li, Yifan; Zhang, Qiang; Yang, Jing
2017-10-31
Methods for conjugating DNA to gold nanoparticles (AuNPs) have recently attracted considerable attention. The ability to control such conjugation in a programmable way is of great interest. Here, we have developed a logic-based method for manipulating the conjugation of thiolated DNA species to AuNPs via cascading DNA strand displacement. Using this method, several logic-based operation systems are established and up to three kinds of DNA signals are introduced at the same time. In addition, a more sensitive catalytic logic-based operation is also achieved based on an entropy-driven process. In the experiment, all of the DNA/AuNPs conjugation results are verified by agrose gel. This strategy promises great potential for automatically conjugating DNA stands onto label-free gold nanoparticles and can be extended to constructing DNA/nanoparticle devices for applications in diagnostics, biosensing, and molecular robotics.
Assurance of Complex Electronics. What Path Do We Take?
NASA Technical Reports Server (NTRS)
Plastow, Richard A.
2007-01-01
Many of the methods used to develop software bare a close resemblance to Complex Electronics (CE) development. CE are now programmed to perform tasks that were previously handled in software, such as communication protocols. For instance, Field Programmable Gate Arrays (FPGAs) can have over a million logic gates while system-on-chip (SOC) devices can combine a microprocessor, input and output channels, and sometimes an FPGA for programmability. With this increased intricacy, the possibility of "software-like" bugs such as incorrect design, logic, and unexpected interactions within the logic is great. Since CE devices are obscuring the hardware/software boundary, we propose that mature software methodologies may be utilized with slight modifications to develop these devices. By using standardized S/W Engineering methods such as checklists, missing requirements and "bugs" can be detected earlier in the development cycle, thus creating a development process for CE that will be easily maintained and configurable based on the device used.
Spatial Soliton Interactions for Photonic Switching. Part I
2000-03-07
technique , a fully vectorial, first-order nonlinear wave equation that consistently includes terms two -orders beyond the slowly-varying amplitude , slowly...by using two tunable mode-locked Er-doped fiber lasers ," in Conference on Optical Fiber Communications, OSA Technical Digest Series, vol. 4, 1994...instead, based on optical logic gates. In addition, optical logic could be used for contention resolution, real-time encryption /decryption, and other
Digital Architecture for a Trace Gas Sensor Platform
NASA Technical Reports Server (NTRS)
Gonzales, Paula; Casias, Miguel; Vakhtin, Andrei; Pilgrim, Jeffrey
2012-01-01
A digital architecture has been implemented for a trace gas sensor platform, as a companion to standard analog control electronics, which accommodates optical absorption whose fractional absorbance equivalent would result in excess error if assumed to be linear. In cases where the absorption (1-transmission) is not equivalent to the fractional absorbance within a few percent error, it is necessary to accommodate the actual measured absorption while reporting the measured concentration of a target analyte with reasonable accuracy. This requires incorporation of programmable intelligence into the sensor platform so that flexible interpretation of the acquired data may be accomplished. Several different digital component architectures were tested and implemented. Commercial off-the-shelf digital electronics including data acquisition cards (DAQs), complex programmable logic devices (CPLDs), field-programmable gate arrays (FPGAs), and microcontrollers have been used to achieve the desired outcome. The most completely integrated architecture achieved during the project used the CPLD along with a microcontroller. The CPLD provides the initial digital demodulation of the raw sensor signal, and then communicates over a parallel communications interface with a microcontroller. The microcontroller analyzes the digital signal from the CPLD, and applies a non-linear correction obtained through extensive data analysis at the various relevant EVA operating pressures. The microcontroller then presents the quantitatively accurate carbon dioxide partial pressure regardless of optical density. This technique could extend the linear dynamic range of typical absorption spectrometers, particularly those whose low end noise equivalent absorbance is below one-part-in-100,000. In the EVA application, it allows introduction of a path-length-enhancing architecture whose optical interference effects are well understood and quantified without sacrificing the dynamic range that allows quantitative detection at the higher carbon dioxide partial pressures. The digital components are compact and allow reasonably complete integration with separately developed analog control electronics without sacrificing size, mass, or power draw.
All-optical XOR logic gate using intersubband transition in III-V quantum well materials.
Feng, Jijun; Akimoto, Ryoichi; Gozu, Shin-ichiro; Mozume, Teruo
2014-06-02
A monolithically integrated all-optical exclusive-OR (XOR) logic gate is experimentally demonstrated based on a Michelson interferometer (MI) gating device in InGaAs/AlAsSb coupled double quantum wells (CDQWs). The MI arms can convert the pump data with return-to-zero ON-OFF keying (RZ OOK) to binary phase-shift keying (BPSK) format, then two BPSK signals can interfere with each other for realizing a desired logical operation. All-optical format conversion from the RZ OOK to BPSK is based on the cross-phase modulation to the transverse electric (TE) probe wave, which is caused by the intersubband transition excited by the transverse magnetic (TM) pump light. Bit error rate measurements show that error free operation for both BPSK format conversion and XOR logical operation can be achieved.
The Central Logic Board for the KM3NeT detector: Design and production
NASA Astrophysics Data System (ADS)
Musico, P.; KM3NeT Collaboration
2016-07-01
The KM3NeT deep sea neutrino observatory will include a very large number of multi-Photomultiplier (PMT) optical modules (DOM) to detect the Cherenkov light generated by secondary particles produced in neutrino interactions. The Central Logic Board (CLB) has been developed to acquire timing and amplitude information from the PMT signals, implementing time-to-digital conversion (TDC) with time over threshold (TOT) technique. The board is also used to configure all the DOM subsystems, to assist in the DOM position and orientation, calibration and to monitor temperature and humidity in the DOM itself. All the collected data are transmitted to shore using a wide-bandwidth optical network. Moreover, through the optical network, all the DOMs are kept synchronized in time within 1 ns precision using the White Rabbit (WR) Precision Time Protocol (PTP) over an Ethernet connection. A large Field Programmable Gate Array (FPGA) has been adopted to implement all the specifications witht the requested performances. The CLB will be also used in the base container of the detection unit (DU) to set-up and monitor all the requested functionalities: in this scenario a dedicated firmware and software will be deployed on board. The design has been started in early 2013 and several prototypes have been developed. After deep test carried on in different EU laboratories, the final mass production batch of 600 boards has been ordered and built: all the CLB are now ready for integration in the DOMs and base containers. The first two KM3NeT DU will be deployed in summer 2015 and all other units are in advanced stage of integration.
Design and implementation of projects with Xilinx Zynq FPGA: a practical case
NASA Astrophysics Data System (ADS)
Travaglini, R.; D'Antone, I.; Meneghini, S.; Rignanese, L.; Zuffa, M.
The main advantage when using FPGAs with embedded processors is the availability of additional several high-performance resources in the same physical device. Moreover, the FPGA programmability allows for connect custom peripherals. Xilinx have designed a programmable device named Zynq-7000 (simply called Zynq in the following), which integrates programmable logic (identical to the other Xilinx "serie 7" devices) with a System on Chip (SOC) based on two embedded ARM processors. Since both parts are deeply connected, the designers benefit from performance of hardware SOC and flexibility of programmability as well. In this paper a design developed by the Electronic Design Department at the Bologna Division of INFN will be presented as a practical case of project based on Zynq device. It is developed by using a commercial board called ZedBoard hosting a FMC mezzanine with a 12-bit 500 MS/s ADC. The Zynq FPGA on the ZedBoard receives digital outputs from the ADC and send them to the acquisition PC, after proper formatting, through a Gigabit Ethernet link. The major focus of the paper will be about the methodology to develop a Zynq-based design with the Xilinx Vivado software, enlightening how to configure the SOC and connect it with the programmable logic. Firmware design techniques will be presented: in particular both VHDL and IP core based strategies will be discussed. Further, the procedure to develop software for the embedded processor will be presented. Finally, some debugging tools, like the embedded Logic Analyzer, will be shown. Advantages and disadvantages with respect to adopting FPGA without embedded processors will be discussed.
Programmable Logic Application Notes
NASA Technical Reports Server (NTRS)
Katz, Richard
1999-01-01
This column will be provided each quarter as a source for reliability, radiation results, NASA capabilities, and other information on programmable logic devices and related applications. This quarter the focus is on some experimental data on low voltage drop out regulators to support mixed 5 and 3.3 volt systems. A discussion of the Small Explorer WIRE spacecraft will also be given. Lastly, we show take a first look at robust state machines in Hardware Description Languages (VHDL) and their use in critical systems. If you have information that you would like to submit or an area you would like discussed or researched, please give me a call or e-mail.
Shi, Wenying; Fu, Yi; Li, Zhixiong; Wei, Min
2015-01-14
Multiple and configurable fluorescence logic gates were fabricated via self-assembly of layered double hydroxides and various chromophores. These logic gates were operated by observation of different emissions with the same excitation wavelength, which achieve YES, NOT, AND, INH and INHIBIT logic operations, respectively.
NASA Technical Reports Server (NTRS)
Heinmiller, J. P.
1971-01-01
This document is the programmer's guide for the GNAT computer program developed under MSC/TRW Task 705-2, Apollo cryogenic storage system analysis, subtask 2, is reported. Detailed logic flow charts and compiled program listings are provided for all program elements.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Ding, Shulin; Wang, Guo Ping, E-mail: gpwang@szu.edu.cn; College of Electronic Science and Technology, Shenzhen University, Shenzhen 518060
Classical nonlinear or quantum all-optical transistors are dependent on the value of input signal intensity or need extra co-propagating beams. In this paper, we present a kind of all-optical transistors constructed with parity-time (PT)-symmetric Y-junctions, which perform independently on the value of signal intensity in an unsaturated gain case and can also work after introducing saturated gain. Further, we show that control signal can switch the device from amplification of peaks in time to transformation of peaks to amplified troughs. By using these PT-symmetric Y-junctions with currently available materials and technologies, we can implement interesting logic functions such as NOTmore » and XOR (exclusive OR) gates, implying potential applications of such structures in designing optical logic gates, optical switches, and signal transformations or amplifications.« less
Optical Generation of Fuzzy-Based Rules
NASA Astrophysics Data System (ADS)
Gur, Eran; Mendlovic, David; Zalevsky, Zeev
2002-08-01
In the last third of the 20th century, fuzzy logic has risen from a mathematical concept to an applicable approach in soft computing. Today, fuzzy logic is used in control systems for various applications, such as washing machines, train-brake systems, automobile automatic gear, and so forth. The approach of optical implementation of fuzzy inferencing was given by the authors in previous papers, giving an extra emphasis to applications with two dominant inputs. In this paper the authors introduce a real-time optical rule generator for the dual-input fuzzy-inference engine. The paper briefly goes over the dual-input optical implementation of fuzzy-logic inferencing. Then, the concept of constructing a set of rules from given data is discussed. Next, the authors show ways to implement this procedure optically. The discussion is accompanied by an example that illustrates the transformation from raw data into fuzzy set rules.
Design of transient light signal simulator based on FPGA
NASA Astrophysics Data System (ADS)
Kang, Jing; Chen, Rong-li; Wang, Hong
2014-11-01
A design scheme of transient light signal simulator based on Field Programmable gate Array (FPGA) was proposed in this paper. Based on the characteristics of transient light signals and measured feature points of optical intensity signals, a fitted curve was created in MATLAB. And then the wave data was stored in a programmed memory chip AT29C1024 by using SUPERPRO programmer. The control logic was realized inside one EP3C16 FPGA chip. Data readout, data stream cache and a constant current buck regulator for powering high-brightness LEDs were all controlled by FPGA. A 12-Bit multiplying CMOS digital-to-analog converter (DAC) DAC7545 and an amplifier OPA277 were used to convert digital signals to voltage signals. A voltage-controlled current source constituted by a NPN transistor and an operational amplifier controlled LED array diming to achieve simulation of transient light signal. LM3405A, 1A Constant Current Buck Regulator for Powering LEDs, was used to simulate strong background signal in space. Experimental results showed that the scheme as a transient light signal simulator can satisfy the requests of the design stably.
NASA Technical Reports Server (NTRS)
Dick, J. W.; Benda, B. J.
1975-01-01
User and programmer oriented documentation for the flexible body option of the Takeoff and Landing Analysis (TOLA) computer program are provided. The user information provides sufficient knowledge of the development and use of the option to enable the engineering user to successfully operate the modified program and understand the results. The programmer's information describes the option structure and logic enabling a programmer to make major revisions to this part of the TOLA computer program.
Programme Costing - A Logical Step Toward Improved Management.
ERIC Educational Resources Information Center
McDougall, Ronald N.
The analysis of costs of university activities from a functional or program point of view, rather than an organizational unit basis, is not only an imperative for the planning and management of universities, but also a logical method of examing the costs of university operations. A task force of the Committee of Finance Officers-Universities of…
An iLab for Teaching Advanced Logic Concepts with Hardware Descriptive Languages
ERIC Educational Resources Information Center
Ayodele, Kayode P.; Inyang, Isaac A.; Kehinde, Lawrence O.
2015-01-01
One of the more interesting approaches to teaching advanced logic concepts is the use of online laboratory frameworks to provide student access to remote field-programmable devices. There is as yet, however, no conclusive evidence of the effectiveness of such an approach. This paper presents the Advanced Digital Lab, a remote laboratory based on…
R-189 (C-620) air compressor control logic software documentation. Revision 1
DOE Office of Scientific and Technical Information (OSTI.GOV)
Walter, K.E.
1995-06-08
This relates to FFTF plant air compressors. Purpose of this document is to provide an updated Computer Software Description for the software to be used on R-189 (C-620-C) air compressor programmable controllers. Logic software design changes were required to allow automatic starting of a compressor that had not been previously started.
Use of LOGIC to support lidar operations
NASA Astrophysics Data System (ADS)
Davis-Lunde, Kimberley; Jugan, Laurie A.; Shoemaker, J. Todd
1999-10-01
The Naval Oceanographic Office (NAVOCEANO) and Planning Systems INcorporated are developing the Littoral Optics Geospatial Integrated Capability (LOGIC). LOGIC supports NAVOCEANO's directive to assess the impact of the environment on Fleet systems in areas of operational interest. LOGIC is based in the Geographic Information System (GIS) ARC/INFO and offers a method to view and manipulate optics and ancillary data to support emerging Fleet lidar systems. LOGIC serves as a processing (as required) and quality-checking mechanism for data entering NAVOCEANO's Data Warehouse and handles both remotely sensed and in-water data. LOGIC provides a link between these data and the GIS-based Graphical User Interface, allowing the user to select data manipulation routines and/or system support products. The results of individual modules are displayed via the GIS to provide such products as lidar system performance, laser penetration depth, and asset vulnerability from a lidar threat. LOGIC is being developed for integration into other NAVOCEANO programs, most notably for Comprehensive Environmental Assessment System, an established tool supporting sonar-based systems. The prototype for LOGIC was developed for the Yellow Sea, focusing on a diver visibility support product.
NASA Astrophysics Data System (ADS)
Zhang, X.; Wan, C. H.; Yuan, Z. H.; Fang, C.; Kong, W. J.; Wu, H.; Zhang, Q. T.; Tao, B. S.; Han, X. F.
2017-04-01
Confronting with the gigantic volume of data produced every day, raising integration density by reducing the size of devices becomes harder and harder to meet the ever-increasing demand for high-performance computers. One feasible path is to actualize more logic functions in one cell. In this respect, we experimentally demonstrate a prototype spin-orbit torque based spin logic cell integrated with five frequently used logic functions (AND, OR, NOT, NAND and NOR). The cell can be easily programmed and reprogrammed to perform desired function. Furthermore, the information stored in cells is symmetry-protected, making it possible to expand into logic gate array where the cell can be manipulated one by one without changing the information of other undesired cells. This work provides a prospective example of multi-functional spin logic cell with reprogrammability and nonvolatility, which will advance the application of spin logic devices.
Implementation of a three-qubit refined Deutsch Jozsa algorithm using SFG quantum logic gates
NASA Astrophysics Data System (ADS)
DelDuce, A.; Savory, S.; Bayvel, P.
2006-05-01
In this paper we present a quantum logic circuit which can be used for the experimental demonstration of a three-qubit solid state quantum computer based on a recent proposal of optically driven quantum logic gates. In these gates, the entanglement of randomly placed electron spin qubits is manipulated by optical excitation of control electrons. The circuit we describe solves the Deutsch problem with an improved algorithm called the refined Deutsch-Jozsa algorithm. We show that it is possible to select optical pulses that solve the Deutsch problem correctly, and do so without losing quantum information to the control electrons, even though the gate parameters vary substantially from one gate to another.
Memristor-CMOS hybrid integrated circuits for reconfigurable logic.
Xia, Qiangfei; Robinett, Warren; Cumbie, Michael W; Banerjee, Neel; Cardinali, Thomas J; Yang, J Joshua; Wu, Wei; Li, Xuema; Tong, William M; Strukov, Dmitri B; Snider, Gregory S; Medeiros-Ribeiro, Gilberto; Williams, R Stanley
2009-10-01
Hybrid reconfigurable logic circuits were fabricated by integrating memristor-based crossbars onto a foundry-built CMOS (complementary metal-oxide-semiconductor) platform using nanoimprint lithography, as well as materials and processes that were compatible with the CMOS. Titanium dioxide thin-film memristors served as the configuration bits and switches in a data routing network and were connected to gate-level CMOS components that acted as logic elements, in a manner similar to a field programmable gate array. We analyzed the chips using a purpose-built testing system, and demonstrated the ability to configure individual devices, use them to wire up various logic gates and a flip-flop, and then reconfigure devices.
Peptide Logic Circuits Based on Chemoenzymatic Ligation for Programmable Cell Apoptosis.
Li, Yong; Sun, Sujuan; Fan, Lin; Hu, Shanfang; Huang, Yan; Zhang, Ke; Nie, Zhou; Yao, Shouzhou
2017-11-20
A novel and versatile peptide-based bio-logic system capable of regulating cell function is developed using sortase A (SrtA), a peptide ligation enzyme, as a generic processor. By modular peptide design, we demonstrate that mammalian cells apoptosis can be programmed by peptide-based logic operations, including binary and combination gates (AND, INHIBIT, OR, and AND-INHIBIT), and a complex sequential logic circuit (multi-input keypad lock). Moreover, a proof-of-concept peptide regulatory circuit was developed to analyze the expression profile of cell-secreted protein biomarkers and trigger cancer-cell-specific apoptosis. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.
Scalable digital hardware for a trapped ion quantum computer
NASA Astrophysics Data System (ADS)
Mount, Emily; Gaultney, Daniel; Vrijsen, Geert; Adams, Michael; Baek, So-Young; Hudek, Kai; Isabella, Louis; Crain, Stephen; van Rynbach, Andre; Maunz, Peter; Kim, Jungsang
2016-12-01
Many of the challenges of scaling quantum computer hardware lie at the interface between the qubits and the classical control signals used to manipulate them. Modular ion trap quantum computer architectures address scalability by constructing individual quantum processors interconnected via a network of quantum communication channels. Successful operation of such quantum hardware requires a fully programmable classical control system capable of frequency stabilizing the continuous wave lasers necessary for loading, cooling, initialization, and detection of the ion qubits, stabilizing the optical frequency combs used to drive logic gate operations on the ion qubits, providing a large number of analog voltage sources to drive the trap electrodes, and a scheme for maintaining phase coherence among all the controllers that manipulate the qubits. In this work, we describe scalable solutions to these hardware development challenges.
Adaptive packet switch with an optical core (demonstrator)
NASA Astrophysics Data System (ADS)
Abdo, Ahmad; Bishtein, Vadim; Clark, Stewart A.; Dicorato, Pino; Lu, David T.; Paredes, Sofia A.; Taebi, Sareh; Hall, Trevor J.
2004-11-01
A three-stage opto-electronic packet switch architecture is described consisting of a reconfigurable optical centre stage surrounded by two electronic buffering stages partitioned into sectors to ease memory contention. A Flexible Bandwidth Provision (FBP) algorithm, implemented on a soft-core processor, is used to change the configuration of the input sectors and optical centre stage to set up internal paths that will provide variable bandwidth to serve the traffic. The switch is modeled by a bipartite graph built from a service matrix, which is a function of the arriving traffic. The bipartite graph is decomposed by solving an edge-colouring problem and the resulting permutations are used to configure the switch. Simulation results show that this architecture exhibits a dramatic reduction of complexity and increased potential for scalability, at the price of only a modest spatial speed-up k, 1
Slime mould processors, logic gates and sensors.
Adamatzky, A
2015-07-28
A heterotic, or hybrid, computation implies that two or more substrates of different physical nature are merged into a single device with indistinguishable parts. These hybrid devices then undertake coherent acts on programmable and sensible processing of information. We study the potential of heterotic computers using slime mould acting under the guidance of chemical, mechanical and optical stimuli. Plasmodium of acellular slime mould Physarum polycephalum is a gigantic single cell visible to the unaided eye. The cell shows a rich spectrum of behavioural morphological patterns in response to changing environmental conditions. Given data represented by chemical or physical stimuli, we can employ and modify the behaviour of the slime mould to make it solve a range of computing and sensing tasks. We overview results of laboratory experimental studies on prototyping of the slime mould morphological processors for approximation of Voronoi diagrams, planar shapes and solving mazes, and discuss logic gates implemented via collision of active growing zones and tactile responses of P. polycephalum. We also overview a range of electronic components--memristor, chemical, tactile and colour sensors-made of the slime mould. © 2015 The Author(s) Published by the Royal Society. All rights reserved.
Optical logic gates based on electro-optic modulation with Sagnac interferometer.
Li, Qiliang; Zhu, Mengyun; Li, Dongqiang; Zhang, Zhen; Wei, Yizhen; Hu, Miao; Zhou, Xuefang; Tang, Xianghong
2014-07-20
In this work, we present a new structure to realize optical logic operation in a Sagnac interferometer with electro-optical modulation. In the scheme, we divide two counterpropagation signals in a Sagnac loop to two different arms with the electro-optical crystal by using two circulators. Lithium niobate materials whose electro-optical coefficient can be as large as 32.2×10(-12) m/V make up the arms of the waveguides. Using the transfer matrix of the fiber coupler, we analyze the propagation of signals in this system and obtain the transmission characteristic curves and the extinction ratio. The results indicate that this optical switching has a high extinction ratio of about 60 dB and an ultrafast response time of 2.036 ns. In addition, the results reveal that the change of the dephasing between the two input signals and the modification of the modulation voltage added to the electro-optical crystal leads to the change of the extinction ratio. We also conclude that, in cases of the dephasing of two initial input signals Δφ=0, we can obtain the various logical operations, such as the logical operations D=A¯·B, D=A·B¯, C=A+B, and D=A⊕B in ports C and D of the system by adjusting the modulation voltage. When Δφ≠0, we obtain the arithmetic operations D=A+B, C=A⊕B, D=A·B¯, and C=A¯·B in ports C and D. This study is significant for the design of all optical networks by adjusting the modulation voltage.
Vawter, G Allen [Corrales, NM
2010-08-31
An optical data latch is formed on a substrate from a pair of optical logic gates in a cross-coupled arrangement in which optical waveguides are used to couple an output of each gate to an photodetector input of the other gate. This provides an optical bi-stability which can be used to store a bit of optical information in the latch. Each optical logic gate, which can be an optical NOT gate (i.e. an optical inverter) or an optical NOR gate, includes a waveguide photodetector electrically connected in series with a waveguide electroabsorption modulator. The optical data latch can be formed on a III-V compound semiconductor substrate (e.g. an InP or GaAs substrate) from III-V compound semiconductor layers. A number of optical data latches can be cascaded to form a clocked optical data shift register.
Orbach, Ron; Willner, Bilha; Willner, Itamar
2015-03-11
This feature article addresses the implementation of catalytic nucleic acids as functional units for the construction of logic gates and computing circuits, and discusses the future applications of these systems. The assembly of computational modules composed of DNAzymes has led to the operation of a universal set of logic gates, to field programmable logic gates and computing circuits, to the development of multiplexers/demultiplexers, and to full-adder systems. Also, DNAzyme cascades operating as logic gates and computing circuits were demonstrated. DNAzyme logic systems find important practical applications. These include the use of DNAzyme-based systems for sensing and multiplexed analyses, for the development of controlled release and drug delivery systems, for regulating intracellular biosynthetic pathways, and for the programmed synthesis and operation of cascades.
Optimized 4-bit Quantum Reversible Arithmetic Logic Unit
NASA Astrophysics Data System (ADS)
Ayyoub, Slimani; Achour, Benslama
2017-08-01
Reversible logic has received a great attention in the recent years due to its ability to reduce the power dissipation. The main purposes of designing reversible logic are to decrease quantum cost, depth of the circuits and the number of garbage outputs. The arithmetic logic unit (ALU) is an important part of central processing unit (CPU) as the execution unit. This paper presents a complete design of a new reversible arithmetic logic unit (ALU) that can be part of a programmable reversible computing device such as a quantum computer. The proposed ALU based on a reversible low power control unit and small performance parameters full adder named double Peres gates. The presented ALU can produce the largest number (28) of arithmetic and logic functions and have the smallest number of quantum cost and delay compared with existing designs.
Motivation for DOC III: 64-bit digital optical computer
NASA Astrophysics Data System (ADS)
Guilfoyle, Peter S.
1991-09-01
OptiComp has focused on a digital optical logic family in order to capitalize on the inherent benefits of optical computing, which include (1) high FAN-IN and FAN-OUT, (2) low power consumption, (3) high noise margin, (4) high algorithmic efficiency using 'smart' interconnects, and (5) free-space leverage of gate interconnect bandwidth product. Other well-known secondary advantages of optical logic include zero capacitive loading of signals at a detector, zero cross-talk between signals, zero signal dispersion, and minimal clock skew (a few picoseconds or less in an imaging system). The primary focus of this paper is to demonstrate how each of the five advantages can be used to leverage other logic family performance such as GaAs; the secondary attributes are discussed only in the context of introducing the DOC III architecture.
FPGA-based multiprocessor system for injection molding control.
Muñoz-Barron, Benigno; Morales-Velazquez, Luis; Romero-Troncoso, Rene J; Rodriguez-Donate, Carlos; Trejo-Hernandez, Miguel; Benitez-Rangel, Juan P; Osornio-Rios, Roque A
2012-10-18
The plastic industry is a very important manufacturing sector and injection molding is a widely used forming method in that industry. The contribution of this work is the development of a strategy to retrofit control of an injection molding machine based on an embedded system microprocessors sensor network on a field programmable gate array (FPGA) device. Six types of embedded processors are included in the system: a smart-sensor processor, a micro fuzzy logic controller, a programmable logic controller, a system manager, an IO processor and a communication processor. Temperature, pressure and position are controlled by the proposed system and experimentation results show its feasibility and robustness. As validation of the present work, a particular sample was successfully injected.
Raising a Programmer: Teaching Saudi Children How to Code
ERIC Educational Resources Information Center
Meccawy, Maram
2017-01-01
Teaching computer coding to children from a young age provides with them a competitive advantage for the future in a continually changing workplace. Programming strengthens logical and critical thinking as well as problem-solving skills, which lead to creative solutions for today's problems. The Little Programmer is an application for mobile…
Multiprog Virtual Laboratory Applied to PLC Programming Learning
ERIC Educational Resources Information Center
Shyr, Wen-Jye
2010-01-01
This study develops a Multiprog virtual laboratory for a mechatronics education designed to teach how to programme a programmable logic controller (PLC). The study was carried out with 34 students in the Department of Industry Education and Technology at National Changhua University of Education in Taiwan. In total, 17 students were assigned to…
Slime mould foraging behaviour as optically coupled logical operations
NASA Astrophysics Data System (ADS)
Mayne, R.; Adamatzky, A.
2015-04-01
Physarum polycephalum is a macroscopic plasmodial slime mould whose apparently 'intelligent' behaviour patterns may be interpreted as computation. We employ plasmodial phototactic responses to construct laboratory prototypes of NOT and NAND logical gates with electrical inputs/outputs and optical coupling in which the slime mould plays dual roles of computing device and electrical conductor. Slime mould logical gates are fault tolerant and resettable. The results presented here demonstrate the malleability and resilience of biological systems and highlight how the innate behaviour patterns of living substrates may be used to implement useful computation.
Zero-Energy Optical Logic: Can It Be Practical?
NASA Astrophysics Data System (ADS)
Caulfield, H. John
The thermodynamic “permission” to build a device that can evaluate a sequence of logic operations that operate at zero energy has existed for about 40 years. That is, physics allows it in principle. Conceptual solutions have been explored ever since then. A great number of important concepts were developed in so doing. Over the last four years, my colleagues and I have explored the possibility of a constructive proof. And we finally succeeded. Somewhat unexpectedly, we found such a proof and found that lossless logic systems could actually be built. And, as we had anticipated, it can only be implemented by optics. That raises a new question: Might an optical zero-energy logic system actually be good enough to displace electronic versions in some cases? In this paper, I do not even try to answer that question, but I do lay out some problems now blocking practical applications and show some promising approaches to solving them. The problems addressed are speed, size, and error rate. The anticipated speed problem simply vanishes, as it was an inference from the implicit assumption that the logic would be electronic. But the other two problems are real and must be addressed if energy-free logic is to have any significant applications. Initial steps in solving the size and error rate are addressed in more detail.
NASA Astrophysics Data System (ADS)
Vijayajayanthi, M.; Kanna, T.; Murali, K.; Lakshmanan, M.
2018-06-01
The energy-sharing collision of bright optical solitons in the Manakov system, governing pulse propagation in high birefringent fiber, is employed theoretically to realize optical logic gates. In particular, we successfully construct (theoretically) the universal NOR gate and the OR gate from the energy-sharing collisions of just four bright solitons which can be well described by the exact bright four-soliton solution of the Manakov system. This construction procedure has important merits such as realizing the two input gates with a minimal number of soliton collisions and possibilities of multistate logic. The recent experiments on Manakov solitons suggest the possibility of implementation of this theoretical construction of such gates and ultimately an all-optical computer.
Filling the Assurance Gap on Complex Electronics
NASA Technical Reports Server (NTRS)
Plastow, Richard A.
2007-01-01
Many of the methods used to develop software bare a close resemblance to Complex Electronics (CE) development. CE are now programmed to perform tasks that were previously handled by software, such as communication protocols. For example, the James Webb Space Telescope will use Field Programmable Gate Arrays (FPGAs), which can have over a million logic gates, to send telemetry. System-on-chip (SoC) devices, another type of complex electronics, can combine a microprocessor, input and output channels, and sometimes an FPGA for programmability. With this increased intricacy, the possibility of software-like bugs such as incorrect design, logic, and unexpected interactions within the logic is great. Since CE devices are obscuring the hardware/software boundary, mature software methodologies have been proposed, with slight modifications, to develop these devices. By using standardized S/W Engineering methods such as checklists, missing requirements and bugs can be detected earlier in the development cycle, thus creating a development process for CE that can be easily maintained and configurable based on the device used.
Software Process Assurance for Complex Electronics
NASA Technical Reports Server (NTRS)
Plastow, Richard A.
2007-01-01
Complex Electronics (CE) now perform tasks that were previously handled in software, such as communication protocols. Many methods used to develop software bare a close resemblance to CE development. Field Programmable Gate Arrays (FPGAs) can have over a million logic gates while system-on-chip (SOC) devices can combine a microprocessor, input and output channels, and sometimes an FPGA for programmability. With this increased intricacy, the possibility of software-like bugs such as incorrect design, logic, and unexpected interactions within the logic is great. With CE devices obscuring the hardware/software boundary, we propose that mature software methodologies may be utilized with slight modifications in the development of these devices. Software Process Assurance for Complex Electronics (SPACE) is a research project that used standardized S/W Assurance/Engineering practices to provide an assurance framework for development activities. Tools such as checklists, best practices and techniques were used to detect missing requirements and bugs earlier in the development cycle creating a development process for CE that was more easily maintained, consistent and configurable based on the device used.
Electro-optical logic gates based on graphene-silicon waveguides
NASA Astrophysics Data System (ADS)
Chen, Weiwei; Yang, Longzhi; Wang, Pengjun; Zhang, Yawei; Zhou, Liqiang; Yang, Tianjun; Wang, Yang; Yang, Jianyi
2016-08-01
In this paper, designs of electro-optical AND/NAND, OR/ NOR, XOR/XNOR logic gates based on cascaded silicon graphene switches and regular 2×1 multimode interference combiners are presented. Each switch consists of a Mach-Zehnder interferometer in which silicon slot waveguides embedded with graphene flakes are designed for phase shifters. High-speed switching function is achieved by applying an electrical signal to tune the Fermi levels of graphene flakes causing the variation of modal effective index. Calculation results show the crosstalk in the proposed optical switch is lower than -22.9 dB within a bandwidth from 1510 nm to 1600 nm. The designed six electro-optical logic gates with the operation speed of 10 Gbit/s have a minimum extinction ratio of 35.6 dB and a maximum insertion loss of 0.21 dB for transverse electric modes at 1.55 μm.
Logic Design Pathology and Space Flight Electronics
NASA Technical Reports Server (NTRS)
Katz, Richard; Barto, Rod L.; Erickson, K.
1997-01-01
Logic design errors have been observed in space flight missions and the final stages of ground test. The technologies used by designers and their design/analysis methodologies will be analyzed. This will give insight to the root causes of the failures. These technologies include discrete integrated circuit based systems, systems based on field and mask programmable logic, and the use computer aided engineering (CAE) systems. State-of-the-art (SOTA) design tools and methodologies will be analyzed with respect to high-reliability spacecraft design and potential pitfalls are discussed. Case studies of faults from large expensive programs to "smaller, faster, cheaper" missions will be used to explore the fundamental reasons for logic design problems.
Optical Computers and Space Technology
NASA Technical Reports Server (NTRS)
Abdeldayem, Hossin A.; Frazier, Donald O.; Penn, Benjamin; Paley, Mark S.; Witherow, William K.; Banks, Curtis; Hicks, Rosilen; Shields, Angela
1995-01-01
The rapidly increasing demand for greater speed and efficiency on the information superhighway requires significant improvements over conventional electronic logic circuits. Optical interconnections and optical integrated circuits are strong candidates to provide the way out of the extreme limitations imposed on the growth of speed and complexity of nowadays computations by the conventional electronic logic circuits. The new optical technology has increased the demand for high quality optical materials. NASA's recent involvement in processing optical materials in space has demonstrated that a new and unique class of high quality optical materials are processible in a microgravity environment. Microgravity processing can induce improved orders in these materials and could have a significant impact on the development of optical computers. We will discuss NASA's role in processing these materials and report on some of the associated nonlinear optical properties which are quite useful for optical computers technology.
NASA Astrophysics Data System (ADS)
Wang, Yongjun; Liu, Xinyu; Tian, Qinghua; Wang, Lina; Xin, Xiangjun
2018-03-01
Basic configurations of various all-optical clocked flip-flops (FFs) and optical random access memory (RAM) based on the nonlinear polarization rotation (NPR) effect of low-polarization-dependent semiconductor optical amplifiers (SOA) are proposed. As the constituent elements, all-optical logic gates and all-optical SR latches are constructed by taking advantage of the SOA's NPR switch. Different all-optical FFs (AOFFs), including SR-, D-, T-, and JK-types as well as an optical RAM cell were obtained by the combination of the proposed all-optical SR latches and logic gates. The effectiveness of the proposed schemes were verified by simulation results and demonstrated by a D-FF and 1-bit RAM cell experimental system. The proposed all-optical clocked FFs and RAM cell are significant to all-optical signal processing.
Logic gates based all-optical binary half adder using triple core photonic crystal fiber
NASA Astrophysics Data System (ADS)
Uthayakumar, T.; Vasantha Jayakantha Raja, R.
2018-06-01
This study presents the implementation of an all-optical binary logic half adder by employing a triple core photonic crystal fiber (TPCF). The noteworthy feature of the present investigation is that an identical set of TPCF schemes, which demonstrated all-optical logic functions in our previous report, has revealed the ability to demonstrate the successful half adder operation. The control signal (CS) power defining the extinction ratios of the output ports for the considered symmetric planar and triangular TPCFs is evaluated through a numerical algorithm. Through suitable CS power and input combinations, the logic outputs are generated from extinction ratios to demonstrate the half adder operation. The results obtained display the significant influence of the input conditions on the delivery of half adder operation for different TPCF schemes considered. Furthermore, chloroform filled TPCF structures demonstrated the efficient low power half adder operation with a significant figure of merit, compared to that of the silica counterpart.
Interface For Dual-Channel MIL-STD-1553 Data Bus
NASA Technical Reports Server (NTRS)
Davies, Bryan L.; Heaps, Timothy L.
1992-01-01
Digital electronic subsystem made of commercially available programmable logic arrays and discrete logic devices serves as interface between microprocessor and dual-channel MIL-STD-1553 data bus. Subsystem consumes only 800 mW of power. Provides flexibility in that it is controllable via firmware. Includes only two reading-and-writing ports: one for status and control signals, other for transmission and reception of data.
Design and Implementation of an MC68020-Based Educational Computer Board
1989-12-01
device and the other for a Macintosh personal computer. A stored program can be installed in 8K bytes Programmable Read Only Memory (PROM) to initialize...MHz. It includes four * Static Random Access Memory (SRAM) chips which provide a storage of 32K bytes. Two Programmable Array Logic (PAL) chips...device and the other for a Macintosh personal computer. A stored program can be installed in 8K bytes Programmable Read Only Memory (PROM) to
Optics outreach in Irish context
NASA Astrophysics Data System (ADS)
McHugh, Emer; Smith, Arlene
2009-06-01
The Applied Optics Group, National University of Ireland Galway is a research centre involved in programmes that cover a wide variety of topics in applied optics and imaging science, including smart optics, adaptive optics, optical scattering and propagation, and engineering optics. The Group have also developed significant outreach programmes both in Primary and Post-Primary schools. It is recognised that there is a need for innovation in Science Education in Ireland and we are committed to working extensively with schools. The main aim of these outreach programmes is to increase awareness and interest in science with students and enhance the communication skills of the researchers working in the Group. The education outreach team works closely with the relevant teachers in both Primary and Post-Primary schools to design and develop learning initiatives to match the needs of the target group of students. The learning programmes are usually delivered in the participating schools during normal class time by a team of Applied Optics specialists. We are involved in running these programmes in both Primary and Post-Primary schools where the programmes are tailored to the curriculum and concentrating on optics and light. The students may also visit the Groups research centre where presentations and laboratory tours are arranged.
Remote Control Laboratory Using EJS Applets and TwinCAT Programmable Logic Controllers
ERIC Educational Resources Information Center
Besada-Portas, E.; Lopez-Orozco, J. A.; de la Torre, L.; de la Cruz, J. M.
2013-01-01
This paper presents a new methodology to develop remote laboratories for systems engineering and automation control courses, based on the combined use of TwinCAT, a laboratory Java server application, and Easy Java Simulations (EJS). The TwinCAT system is used to close the control loop for the selected plants by means of programmable logic…
Toward Automating Web Protocol Configuration for a Programmable Logic Controller Emulator
2014-06-19
Security Risks for Industrial Control Systems ,” VDE 2004 Congress, Berlin, Germany, October 2004, pp. 1-7. [Cis12] Cisco, NetFlow Configuration Guide...Date 29 May 2014 Date AFIT-ENG-T-14-J-4 Abstract Industrial Control Systems (ICS) remain vulnerable through attack vectors that exist within programmable...5 2.2 Industrial Control Systems
Reconfigurable logic via gate controlled domain wall trajectory in magnetic network structure
Murapaka, C.; Sethi, P.; Goolaup, S.; Lew, W. S.
2016-01-01
An all-magnetic logic scheme has the advantages of being non-volatile and energy efficient over the conventional transistor based logic devices. In this work, we present a reconfigurable magnetic logic device which is capable of performing all basic logic operations in a single device. The device exploits the deterministic trajectory of domain wall (DW) in ferromagnetic asymmetric branch structure for obtaining different output combinations. The programmability of the device is achieved by using a current-controlled magnetic gate, which generates a local Oersted field. The field generated at the magnetic gate influences the trajectory of the DW within the structure by exploiting its inherent transverse charge distribution. DW transformation from vortex to transverse configuration close to the output branch plays a pivotal role in governing the DW chirality and hence the output. By simply switching the current direction through the magnetic gate, two universal logic gate functionalities can be obtained in this device. Using magnetic force microscopy imaging and magnetoresistance measurements, all basic logic functionalities are demonstrated. PMID:26839036
Chip-set for quality of service support in passive optical networks
NASA Astrophysics Data System (ADS)
Ringoot, Edwin; Hoebeke, Rudy; Slabbinck, B. Hans; Verhaert, Michel
1998-10-01
In this paper the design of a chip-set for QoS provisioning in ATM-based Passive Optical Networks is discussed. The implementation of a general-purpose switch chip on the Optical Network Unit is presented, with focus on the design of the cell scheduling and buffer management logic. The cell scheduling logic supports `colored' grants, priority jumping and weighted round-robin scheduling. The switch chip offers powerful buffer management capabilities enabling the efficient support of GFR and UBR services. Multicast forwarding is also supported. In addition, the architecture of a MAC controller chip developed for a SuperPON access network is introduced. In particular, the permit scheduling logic and its implementation on the Optical Line Termination will be discussed. The chip-set enables the efficient support of services with different service requirements on the SuperPON. The permit scheduling logic built into the MAC controller chip in combination with the cell scheduling and buffer management capabilities of the switch chip can be used by network operators to offer guaranteed service performance to delay sensitive services, and to efficiently and fairly distribute any spare capacity to delay insensitive services.
FPGA-Based Multiprocessor System for Injection Molding Control
Muñoz-Barron, Benigno; Morales-Velazquez, Luis; Romero-Troncoso, Rene J.; Rodriguez-Donate, Carlos; Trejo-Hernandez, Miguel; Benitez-Rangel, Juan P.; Osornio-Rios, Roque A.
2012-01-01
The plastic industry is a very important manufacturing sector and injection molding is a widely used forming method in that industry. The contribution of this work is the development of a strategy to retrofit control of an injection molding machine based on an embedded system microprocessors sensor network on a field programmable gate array (FPGA) device. Six types of embedded processors are included in the system: a smart-sensor processor, a micro fuzzy logic controller, a programmable logic controller, a system manager, an IO processor and a communication processor. Temperature, pressure and position are controlled by the proposed system and experimentation results show its feasibility and robustness. As validation of the present work, a particular sample was successfully injected. PMID:23202036
Optical programmable metamaterials
NASA Astrophysics Data System (ADS)
Gong, Cheng; Zhang, Nan; Dai, Zijie; Liu, Weiwei
2018-02-01
We suggest and demonstrate the concept of optical programmable metamaterials which can configure the device's electromagnetic parameters by the programmable optical stimuli. In such metamaterials, the optical stimuli produced by a FPGA controlled light emitting diode array can switch or combine the resonance modes which are coupled in. As an example, an optical programmable metamaterial terahertz absorber is proposed. Each cell of the absorber integrates four meta-rings (asymmetric 1/4 rings) with photo-resistors connecting the critical gaps. The principle and design of the metamaterials are illustrated and the simulation results demonstrate the functionalities for programming the metamaterial absorber to change its bandwidth and resonance frequency.
Optically programmable electron spin memory using semiconductor quantum dots.
Kroutvar, Miro; Ducommun, Yann; Heiss, Dominik; Bichler, Max; Schuh, Dieter; Abstreiter, Gerhard; Finley, Jonathan J
2004-11-04
The spin of a single electron subject to a static magnetic field provides a natural two-level system that is suitable for use as a quantum bit, the fundamental logical unit in a quantum computer. Semiconductor quantum dots fabricated by strain driven self-assembly are particularly attractive for the realization of spin quantum bits, as they can be controllably positioned, electronically coupled and embedded into active devices. It has been predicted that the atomic-like electronic structure of such quantum dots suppresses coupling of the spin to the solid-state quantum dot environment, thus protecting the 'spin' quantum information against decoherence. Here we demonstrate a single electron spin memory device in which the electron spin can be programmed by frequency selective optical excitation. We use the device to prepare single electron spins in semiconductor quantum dots with a well defined orientation, and directly measure the intrinsic spin flip time and its dependence on magnetic field. A very long spin lifetime is obtained, with a lower limit of about 20 milliseconds at a magnetic field of 4 tesla and at 1 kelvin.
Method and Apparatus for Simultaneous Processing of Multiple Functions
NASA Technical Reports Server (NTRS)
Stoica, Adrian (Inventor); Andrei, Radu (Inventor)
2017-01-01
Electronic logic gates that operate using N logic state levels, where N is greater than 2, and methods of operating such gates. The electronic logic gates operate according to truth tables. At least two input signals each having a logic state that can range over more than two logic states are provided to the logic gates. The logic gates each provide an output signal that can have one of N logic states. Examples of gates described include NAND/NAND gates having two inputs A and B and NAND/NAND gates having three inputs A, B, and C, where A, B and C can take any of four logic states. Systems using such gates are described, and their operation illustrated. Optical logic gates that operate using N logic state levels are also described.
Method and Apparatus for Simultaneous Processing of Multiple Functions
NASA Technical Reports Server (NTRS)
Stoica, Adrian (Inventor); Andrei, Radu (Inventor); Zhu, David (Inventor); Mojarradi, Mohammad Mehdi (Inventor); Vo, Tuan A. (Inventor)
2015-01-01
Electronic logic gates that operate using N logic state levels, where N is greater than 2, and methods of operating such gates. The electronic logic gates operate according to truth tables. At least two input signals each having a logic state that can range over more than two logic states are provided to the logic gates. The logic gates each provide an output signal that can have one of N logic states. Examples of gates described include NAND/NAND gates having two inputs A and B and NAND/NAND gates having three inputs A, B, and C, where A, B and C can take any of four logic states. Systems using such gates are described, and their operation illustrated. Optical logic gates that operate using N logic state levels are also described.
The new MSFC Solar vector magnetograph. Center director's discretionary fund
NASA Technical Reports Server (NTRS)
Hagyard, M. J.; West, E. A.; Cumings, N. P.
1984-01-01
The unique MSFC solar vector magnetograph allows measurements of all three components of the Sun's photospheric magnetic field over a wide field-of-view with spatial resolution determined by a 2.7 x 2.7 arc second pixel size. This system underwent extensive modifications to improve its sensitivity and temporal response. The modifications included replacing an SEC vidicon detector with a solid-state CCD camera; replacing the original digital logic circuitry with an electronic controller and a computer to provide complete, programmable control over the entire operation of the magnetograph; and installing a new polarimeter which consists of a single electro-optical modulator coupled with interchangeable waveplates mounted on a rotating assembly. The system is described and results of calibrations and tests are presented. Initial observations of solar magnetic fields with the new magnetograph are presented.
Modified-Signed-Digit Optical Computing Using Fan-Out
NASA Technical Reports Server (NTRS)
Liu, Hua-Kuang; Zhou, Shaomin; Yeh, Pochi
1996-01-01
Experimental optical computing system containing optical fan-out elements implements modified signed-digit (MSD) arithmetic and logic. In comparison with previous optical implementations of MSD arithmetic, this one characterized by larger throughput, greater flexibility, and simpler optics.
Two-dimensional non-volatile programmable p-n junctions
NASA Astrophysics Data System (ADS)
Li, Dong; Chen, Mingyuan; Sun, Zhengzong; Yu, Peng; Liu, Zheng; Ajayan, Pulickel M.; Zhang, Zengxing
2017-09-01
Semiconductor p-n junctions are the elementary building blocks of most electronic and optoelectronic devices. The need for their miniaturization has fuelled the rapid growth of interest in two-dimensional (2D) materials. However, the performance of a p-n junction considerably degrades as its thickness approaches a few nanometres and traditional technologies, such as doping and implantation, become invalid at the nanoscale. Here we report stable non-volatile programmable p-n junctions fabricated from the vertically stacked all-2D semiconductor/insulator/metal layers (WSe2/hexagonal boron nitride/graphene) in a semifloating gate field-effect transistor configuration. The junction exhibits a good rectifying behaviour with a rectification ratio of 104 and photovoltaic properties with a power conversion efficiency up to 4.1% under a 6.8 nW light. Based on the non-volatile programmable properties controlled by gate voltages, the 2D p-n junctions have been exploited for various electronic and optoelectronic applications, such as memories, photovoltaics, logic rectifiers and logic optoelectronic circuits.
Rodríguez, Manuel; Magdaleno, Eduardo; Pérez, Fernando; García, Cristhian
2017-03-28
Non-equispaced Fast Fourier transform (NFFT) is a very important algorithm in several technological and scientific areas such as synthetic aperture radar, computational photography, medical imaging, telecommunications, seismic analysis and so on. However, its computation complexity is high. In this paper, we describe an efficient NFFT implementation with a hardware coprocessor using an All-Programmable System-on-Chip (APSoC). This is a hybrid device that employs an Advanced RISC Machine (ARM) as Processing System with Programmable Logic for high-performance digital signal processing through parallelism and pipeline techniques. The algorithm has been coded in C language with pragma directives to optimize the architecture of the system. We have used the very novel Software Develop System-on-Chip (SDSoC) evelopment tool that simplifies the interface and partitioning between hardware and software. This provides shorter development cycles and iterative improvements by exploring several architectures of the global system. The computational results shows that hardware acceleration significantly outperformed the software based implementation.
Designed cell consortia as fragrance-programmable analog-to-digital converters.
Müller, Marius; Ausländer, Simon; Spinnler, Andrea; Ausländer, David; Sikorski, Julian; Folcher, Marc; Fussenegger, Martin
2017-03-01
Synthetic biology advances the rational engineering of mammalian cells to achieve cell-based therapy goals. Synthetic gene networks have nearly reached the complexity of digital electronic circuits and enable single cells to perform programmable arithmetic calculations or to provide dynamic remote control of transgenes through electromagnetic waves. We designed a synthetic multilayered gaseous-fragrance-programmable analog-to-digital converter (ADC) allowing for remote control of digital gene expression with 2-bit AND-, OR- and NOR-gate logic in synchronized cell consortia. The ADC consists of multiple sampling-and-quantization modules sensing analog gaseous fragrance inputs; a gas-to-liquid transducer converting fragrance intensity into diffusible cell-to-cell signaling compounds; a digitization unit with a genetic amplifier circuit to improve the signal-to-noise ratio; and recombinase-based digital expression switches enabling 2-bit processing of logic gates. Synthetic ADCs that can remotely control cellular activities with digital precision may enable the development of novel biosensors and may provide bioelectronic interfaces synchronizing analog metabolic pathways with digital electronics.
Rodríguez, Manuel; Magdaleno, Eduardo; Pérez, Fernando; García, Cristhian
2017-01-01
Non-equispaced Fast Fourier transform (NFFT) is a very important algorithm in several technological and scientific areas such as synthetic aperture radar, computational photography, medical imaging, telecommunications, seismic analysis and so on. However, its computation complexity is high. In this paper, we describe an efficient NFFT implementation with a hardware coprocessor using an All-Programmable System-on-Chip (APSoC). This is a hybrid device that employs an Advanced RISC Machine (ARM) as Processing System with Programmable Logic for high-performance digital signal processing through parallelism and pipeline techniques. The algorithm has been coded in C language with pragma directives to optimize the architecture of the system. We have used the very novel Software Develop System-on-Chip (SDSoC) evelopment tool that simplifies the interface and partitioning between hardware and software. This provides shorter development cycles and iterative improvements by exploring several architectures of the global system. The computational results shows that hardware acceleration significantly outperformed the software based implementation. PMID:28350358
Two-dimensional non-volatile programmable p-n junctions.
Li, Dong; Chen, Mingyuan; Sun, Zhengzong; Yu, Peng; Liu, Zheng; Ajayan, Pulickel M; Zhang, Zengxing
2017-09-01
Semiconductor p-n junctions are the elementary building blocks of most electronic and optoelectronic devices. The need for their miniaturization has fuelled the rapid growth of interest in two-dimensional (2D) materials. However, the performance of a p-n junction considerably degrades as its thickness approaches a few nanometres and traditional technologies, such as doping and implantation, become invalid at the nanoscale. Here we report stable non-volatile programmable p-n junctions fabricated from the vertically stacked all-2D semiconductor/insulator/metal layers (WSe 2 /hexagonal boron nitride/graphene) in a semifloating gate field-effect transistor configuration. The junction exhibits a good rectifying behaviour with a rectification ratio of 10 4 and photovoltaic properties with a power conversion efficiency up to 4.1% under a 6.8 nW light. Based on the non-volatile programmable properties controlled by gate voltages, the 2D p-n junctions have been exploited for various electronic and optoelectronic applications, such as memories, photovoltaics, logic rectifiers and logic optoelectronic circuits.
Catalytic molecular logic devices by DNAzyme displacement.
Brown, Carl W; Lakin, Matthew R; Stefanovic, Darko; Graves, Steven W
2014-05-05
Chemical reactions catalyzed by DNAzymes offer a route to programmable modification of biomolecules for therapeutic purposes. To this end, we have developed a new type of catalytic DNA-based logic gates in which DNAzyme catalysis is controlled via toehold-mediated strand displacement reactions. We refer to these as DNAzyme displacement gates. The use of toeholds to guide input binding provides a favorable pathway for input recognition, and the innate catalytic activity of DNAzymes allows amplification of nanomolar input concentrations. We demonstrate detection of arbitrary input sequences by rational introduction of mismatched bases into inhibitor strands. Furthermore, we illustrate the applicability of DNAzyme displacement to compute logic functions involving multiple logic gates. This work will enable sophisticated logical control of a range of biochemical modifications, with applications in pathogen detection and autonomous theranostics. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Programmable full-adder computations in communicating three-dimensional cell cultures.
Ausländer, David; Ausländer, Simon; Pierrat, Xavier; Hellmann, Leon; Rachid, Leila; Fussenegger, Martin
2018-01-01
Synthetic biologists have advanced the design of trigger-inducible gene switches and their assembly into input-programmable circuits that enable engineered human cells to perform arithmetic calculations reminiscent of electronic circuits. By designing a versatile plug-and-play molecular-computation platform, we have engineered nine different cell populations with genetic programs, each of which encodes a defined computational instruction. When assembled into 3D cultures, these engineered cell consortia execute programmable multicellular full-adder logics in response to three trigger compounds.
A Survey of Memristive Threshold Logic Circuits.
Maan, Akshay Kumar; Jayadevi, Deepthi Anirudhan; James, Alex Pappachen
2017-08-01
In this paper, we review different memristive threshold logic (MTL) circuits that are inspired from the synaptic action of the flow of neurotransmitters in the biological brain. The brainlike generalization ability and the area minimization of these threshold logic circuits aim toward crossing Moore's law boundaries at device, circuits, and systems levels. Fast switching memory, signal processing, control systems, programmable logic, image processing, reconfigurable computing, and pattern recognition are identified as some of the potential applications of MTL systems. The physical realization of nanoscale devices with memristive behavior from materials, such as TiO 2 , ferroelectrics, silicon, and polymers, has accelerated research effort in these application areas, inspiring the scientific community to pursue the design of high-speed, low-cost, low-power, and high-density neuromorphic architectures.
All-spin logic operations: Memory device and reconfigurable computing
NASA Astrophysics Data System (ADS)
Patra, Moumita; Maiti, Santanu K.
2018-02-01
Exploiting spin degree of freedom of electron a new proposal is given to characterize spin-based logical operations using a quantum interferometer that can be utilized as a programmable spin logic device (PSLD). The ON and OFF states of both inputs and outputs are described by spin state only, circumventing spin-to-charge conversion at every stage as often used in conventional devices with the inclusion of extra hardware that can eventually diminish the efficiency. All possible logic functions can be engineered from a single device without redesigning the circuit which certainly offers the opportunities of designing new generation spintronic devices. Moreover, we also discuss the utilization of the present model as a memory device and suitable computing operations with proposed experimental setups.
OpenFlow Extensions for Programmable Quantum Networks
2017-06-19
Extensions for Programmable Quantum Networks by Venkat Dasari, Nikolai Snow, and Billy Geerhart Computational and Information Sciences Directorate...distribution is unlimited. 1 1. Introduction Quantum networks and quantum computing have been receiving a surge of interest recently.1–3 However, there has...communicate using entangled particles and perform calculations using quantum logic gates. Additionally, quantum computing uses a quantum bit (qubit
Design and FPGA implementation for MAC layer of Ethernet PON
NASA Astrophysics Data System (ADS)
Zhu, Zengxi; Lin, Rujian; Chen, Jian; Ye, Jiajun; Chen, Xinqiao
2004-04-01
Ethernet passive optical network (EPON), which represents the convergence of low-cost, high-bandwidth and supporting multiple services, appears to be one of the best candidates for the next-generation access network. The work of standardizing EPON as a solution for access network is still underway in the IEEE802.3ah Ethernet in the first mile (EFM) task force. The final release is expected in 2004. Up to now, there has been no standard application specific integrated circuit (ASIC) chip available which fulfills the functions of media access control (MAC) layer of EPON. The MAC layer in EPON system has many functions, such as point-to-point emulation (P2PE), Ethernet MAC functionality, multi-point control protocol (MPCP), network operation, administration and maintenance (OAM) and link security. To implement those functions mentioned above, an embedded real-time operating system (RTOS) and a flexible programmable logic device (PLD) with an embedded processor are used. The software and hardware functions in MAC layer are realized through programming embedded microprocessor and field programmable gate array(FPGA). Finally, some experimental results are given in this paper. The method stated here can provide a valuable reference for developing EPON MAC layer ASIC.
NASA Astrophysics Data System (ADS)
Crause, Lisa A.; Carter, Dave; Daniels, Alroy; Evans, Geoff; Fourie, Piet; Gilbank, David; Hendricks, Malcolm; Koorts, Willie; Lategan, Deon; Loubser, Egan; Mouries, Sharon; O'Connor, James E.; O'Donoghue, Darragh E.; Potter, Stephen; Sass, Craig; Sickafoose, Amanda A.; Stoffels, John; Swanevelder, Pieter; Titus, Keegan; van Gend, Carel; Visser, Martin; Worters, Hannah L.
2016-08-01
SpUpNIC (Spectrograph Upgrade: Newly Improved Cassegrain) is the extensively upgraded Cassegrain Spectrograph on the South African Astronomical Observatory's 74-inch (1.9-m) telescope. The inverse-Cassegrain collimator mirrors and woefully inefficient Maksutov-Cassegrain camera optics have been replaced, along with the CCD and SDSU controller. All moving mechanisms are now governed by a programmable logic controller, allowing remote configuration of the instrument via an intuitive new graphical user interface. The new collimator produces a larger beam to match the optically faster Folded-Schmidt camera design and nine surface-relief diffraction gratings offer various wavelength ranges and resolutions across the optical domain. The new camera optics (a fused silica Schmidt plate, a slotted fold flat and a spherically figured primary mirror, both Zerodur, and a fused silica field-flattener lens forming the cryostat window) reduce the camera's central obscuration to increase the instrument throughput. The physically larger and more sensitive CCD extends the available wavelength range; weak arc lines are now detectable down to 325 nm and the red end extends beyond one micron. A rear-of-slit viewing camera has streamlined the observing process by enabling accurate target placement on the slit and facilitating telescope focus optimisation. An interactive quick-look data reduction tool further enhances the user-friendliness of SpUpNI
Rapidly reconfigurable all-optical universal logic gate
Goddard, Lynford L.; Bond, Tiziana C.; Kallman, Jeffrey S.
2010-09-07
A new reconfigurable cascadable all-optical on-chip device is presented. The gate operates by combining the Vernier effect with a novel effect, the gain-index lever, to help shift the dominant lasing mode from a mode where the laser light is output at one facet to a mode where it is output at the other facet. Since the laser remains above threshold, the speed of the gate for logic operations as well as for reprogramming the function of the gate is primarily limited to the small signal optical modulation speed of the laser, which can be on the order of up to about tens of GHz. The gate can be rapidly and repeatedly reprogrammed to perform any of the basic digital logic operations by using an appropriate analog optical or electrical signal at the gate selection port. Other all-optical functionality includes wavelength conversion, signal duplication, threshold switching, analog to digital conversion, digital to analog conversion, signal routing, and environment sensing. Since each gate can perform different operations, the functionality of such a cascaded circuit grows exponentially.
Optical polarization based logic functions (XOR or XNOR) with nonlinear Gallium nitride nanoslab.
Bovino, F A; Larciprete, M C; Giardina, M; Belardini, A; Centini, M; Sibilia, C; Bertolotti, M; Passaseo, A; Tasco, V
2009-10-26
We present a scheme of XOR/XNOR logic gate, based on non phase-matched noncollinear second harmonic generation from a medium of suitable crystalline symmetry, Gallium nitride. The polarization of the noncollinear generated beam is a function of the polarization of both pump beams, thus we experimentally investigated all possible polarization combinations, evidencing that only some of them are allowed and that the nonlinear interaction of optical signals behaves as a polarization based XOR. The experimental results show the peculiarity of the nonlinear optical response associated with noncollinear excitation, and are explained using the expression for the effective second order optical nonlinearity in noncollinear scheme.
Programmable logic controller performance enhancement by field programmable gate array based design.
Patel, Dhruv; Bhatt, Jignesh; Trivedi, Sanjay
2015-01-01
PLC, the core element of modern automation systems, due to serial execution, exhibits limitations like slow speed and poor scan time. Improved PLC design using FPGA has been proposed based on parallel execution mechanism for enhancement of performance and flexibility. Modelsim as simulation platform and VHDL used to translate, integrate and implement the logic circuit in FPGA. Xilinx's Spartan kit for implementation-testing and VB has been used for GUI development. Salient merits of the design include cost-effectiveness, miniaturization, user-friendliness, simplicity, along with lower power consumption, smaller scan time and higher speed. Various functionalities and applications like typical PLC and industrial alarm annunciator have been developed and successfully tested. Results of simulation, design and implementation have been reported. Copyright © 2014 ISA. Published by Elsevier Ltd. All rights reserved.
Failure detection in high-performance clusters and computers using chaotic map computations
Rao, Nageswara S.
2015-09-01
A programmable media includes a processing unit capable of independent operation in a machine that is capable of executing 10.sup.18 floating point operations per second. The processing unit is in communication with a memory element and an interconnect that couples computing nodes. The programmable media includes a logical unit configured to execute arithmetic functions, comparative functions, and/or logical functions. The processing unit is configured to detect computing component failures, memory element failures and/or interconnect failures by executing programming threads that generate one or more chaotic map trajectories. The central processing unit or graphical processing unit is configured to detect a computing component failure, memory element failure and/or an interconnect failure through an automated comparison of signal trajectories generated by the chaotic maps.
Software Process Assurance for Complex Electronics (SPACE)
NASA Technical Reports Server (NTRS)
Plastow, Richard A.
2007-01-01
Complex Electronics (CE) are now programmed to perform tasks that were previously handled in software, such as communication protocols. Many of the methods used to develop software bare a close resemblance to CE development. For instance, Field Programmable Gate Arrays (FPGAs) can have over a million logic gates while system-on-chip (SOC) devices can combine a microprocessor, input and output channels, and sometimes an FPGA for programmability. With this increased intricacy, the possibility of software-like bugs such as incorrect design, logic, and unexpected interactions within the logic is great. Since CE devices are obscuring the hardware/software boundary, we propose that mature software methodologies may be utilized with slight modifications in the development of these devices. Software Process Assurance for Complex Electronics (SPACE) is a research project that looks at using standardized S/W Assurance/Engineering practices to provide an assurance framework for development activities. Tools such as checklists, best practices and techniques can be used to detect missing requirements and bugs earlier in the development cycle creating a development process for CE that will be more easily maintained, consistent and configurable based on the device used.
Programmable computing with a single magnetoresistive element
NASA Astrophysics Data System (ADS)
Ney, A.; Pampuch, C.; Koch, R.; Ploog, K. H.
2003-10-01
The development of transistor-based integrated circuits for modern computing is a story of great success. However, the proved concept for enhancing computational power by continuous miniaturization is approaching its fundamental limits. Alternative approaches consider logic elements that are reconfigurable at run-time to overcome the rigid architecture of the present hardware systems. Implementation of parallel algorithms on such `chameleon' processors has the potential to yield a dramatic increase of computational speed, competitive with that of supercomputers. Owing to their functional flexibility, `chameleon' processors can be readily optimized with respect to any computer application. In conventional microprocessors, information must be transferred to a memory to prevent it from getting lost, because electrically processed information is volatile. Therefore the computational performance can be improved if the logic gate is additionally capable of storing the output. Here we describe a simple hardware concept for a programmable logic element that is based on a single magnetic random access memory (MRAM) cell. It combines the inherent advantage of a non-volatile output with flexible functionality which can be selected at run-time to operate as an AND, OR, NAND or NOR gate.
Non-volatile logic gates based on planar Hall effect in magnetic films with two in-plane easy axes.
Lee, Sangyeop; Bac, Seul-Ki; Choi, Seonghoon; Lee, Hakjoon; Yoo, Taehee; Lee, Sanghoon; Liu, Xinyu; Dobrowolska, M; Furdyna, Jacek K
2017-04-25
We discuss the use of planar Hall effect (PHE) in a ferromagnetic GaMnAs film with two in-plane easy axes as a means for achieving novel logic functionalities. We show that the switching of magnetization between the easy axes in a GaMnAs film depends strongly on the magnitude of the current flowing through the film due to thermal effects that modify its magnetic anisotropy. Planar Hall resistance in a GaMnAs film with two in-plane easy axes shows well-defined maxima and minima that can serve as two binary logic states. By choosing appropriate magnitudes of the input current for the GaMnAs Hall device, magnetic logic functions can then be achieved. Specifically, non-volatile logic functionalities such as AND, OR, NAND, and NOR gates can be obtained in such a device by selecting appropriate initial conditions. These results, involving a simple PHE device, hold promise for realizing programmable logic elements in magnetic electronics.
Simultaneous G-Quadruplex DNA Logic.
Bader, Antoine; Cockroft, Scott L
2018-04-03
A fundamental principle of digital computer operation is Boolean logic, where inputs and outputs are described by binary integer voltages. Similarly, inputs and outputs may be processed on the molecular level as exemplified by synthetic circuits that exploit the programmability of DNA base-pairing. Unlike modern computers, which execute large numbers of logic gates in parallel, most implementations of molecular logic have been limited to single computing tasks, or sensing applications. This work reports three G-quadruplex-based logic gates that operate simultaneously in a single reaction vessel. The gates respond to unique Boolean DNA inputs by undergoing topological conversion from duplex to G-quadruplex states that were resolved using a thioflavin T dye and gel electrophoresis. The modular, addressable, and label-free approach could be incorporated into DNA-based sensors, or used for resolving and debugging parallel processes in DNA computing applications. © 2018 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.
FPGA-based gating and logic for multichannel single photon counting
DOE Office of Scientific and Technical Information (OSTI.GOV)
Pooser, Raphael C; Earl, Dennis Duncan; Evans, Philip G
2012-01-01
We present results characterizing multichannel InGaAs single photon detectors utilizing gated passive quenching circuits (GPQC), self-differencing techniques, and field programmable gate array (FPGA)-based logic for both diode gating and coincidence counting. Utilizing FPGAs for the diode gating frontend and the logic counting backend has the advantage of low cost compared to custom built logic circuits and current off-the-shelf detector technology. Further, FPGA logic counters have been shown to work well in quantum key distribution (QKD) test beds. Our setup combines multiple independent detector channels in a reconfigurable manner via an FPGA backend and post processing in order to perform coincidencemore » measurements between any two or more detector channels simultaneously. Using this method, states from a multi-photon polarization entangled source are detected and characterized via coincidence counting on the FPGA. Photons detection events are also processed by the quantum information toolkit for application testing (QITKAT)« less
On the structural logic of curriculum system for the optical instrument major
NASA Astrophysics Data System (ADS)
Yan, Yufeng; Yan, Juncen; Li, Yang; Shi, Lixia
2017-08-01
The theories of optical instrument are the Interdisciplinary of Optical Engineering and Instrument Science and Technology. The undergraduates should study the knowledge about the optics, precision machine and electronics. The courses such as Theory of Machine, Engineering Optics, even include some courses about Accuracy Analysis of Instrument are offered in the college. There are a lot of correlatives among these courses. This paper focuses on the structural logic of these courses. The order of these courses is researched, The aims of all the courses are clear completely to avoid the same topics to be taught twice in different courses. Therefore, the undergraduates would get the main line of the knowledge, and the professors would teach efficiently.
Experimental investigation of a four-qubit linear-optical quantum logic circuit
NASA Astrophysics Data System (ADS)
Stárek, R.; Mičuda, M.; Miková, M.; Straka, I.; Dušek, M.; Ježek, M.; Fiurášek, J.
2016-09-01
We experimentally demonstrate and characterize a four-qubit linear-optical quantum logic circuit. Our robust and versatile scheme exploits encoding of two qubits into polarization and path degrees of single photons and involves two crossed inherently stable interferometers. This approach allows us to design a complex quantum logic circuit that combines a genuine four-qubit C3Z gate and several two-qubit and single-qubit gates. The C3Z gate introduces a sign flip if and only if all four qubits are in the computational state |1>. We verify high-fidelity performance of this central four-qubit gate using Hofmann bounds on quantum gate fidelity and Monte Carlo fidelity sampling. We also experimentally demonstrate that the quantum logic circuit can generate genuine multipartite entanglement and we certify the entanglement with the use of suitably tailored entanglement witnesses.
Experimental investigation of a four-qubit linear-optical quantum logic circuit.
Stárek, R; Mičuda, M; Miková, M; Straka, I; Dušek, M; Ježek, M; Fiurášek, J
2016-09-20
We experimentally demonstrate and characterize a four-qubit linear-optical quantum logic circuit. Our robust and versatile scheme exploits encoding of two qubits into polarization and path degrees of single photons and involves two crossed inherently stable interferometers. This approach allows us to design a complex quantum logic circuit that combines a genuine four-qubit C(3)Z gate and several two-qubit and single-qubit gates. The C(3)Z gate introduces a sign flip if and only if all four qubits are in the computational state |1〉. We verify high-fidelity performance of this central four-qubit gate using Hofmann bounds on quantum gate fidelity and Monte Carlo fidelity sampling. We also experimentally demonstrate that the quantum logic circuit can generate genuine multipartite entanglement and we certify the entanglement with the use of suitably tailored entanglement witnesses.
46 CFR 62.20-1 - Plans for approval.
Code of Federal Regulations, 2014 CFR
2014-10-01
... console, panel, and enclosure layouts. (3) Schematic or logic diagrams including functional relationships... programmable features. (6) A description of built-in test features and diagnostics. (7) Design Verification and...
Gao, Jinting; Liu, Yaqing; Lin, Xiaodong; Deng, Jiankang; Yin, Jinjin; Wang, Shuo
2017-10-25
Wiring a series of simple logic gates to process complex data is significantly important and a large challenge for untraditional molecular computing systems. The programmable property of DNA endows its powerful application in molecular computing. In our investigation, it was found that DNA exhibits excellent peroxidase-like activity in a colorimetric system of TMB/H 2 O 2 /Hemin (TMB, 3,3', 5,5'-Tetramethylbenzidine) in the presence of K + and Cu 2+ , which is significantly inhibited by the addition of an antioxidant. According to the modulated catalytic activity of this DNA-based catalyst, three cascade logic gates including AND-OR-INH (INHIBIT), AND-INH and OR-INH were successfully constructed. Interestingly, by only modulating the concentration of Cu 2+ , a majority logic gate with a single-vote veto function was realized following the same threshold value as that of the cascade logic gates. The strategy is quite straightforward and versatile and provides an instructive method for constructing multiple logic gates on a simple platform to implement complex molecular computing.
Graphene-based aptamer logic gates and their application to multiplex detection.
Wang, Li; Zhu, Jinbo; Han, Lei; Jin, Lihua; Zhu, Chengzhou; Wang, Erkang; Dong, Shaojun
2012-08-28
In this work, a GO/aptamer system was constructed to create multiplex logic operations and enable sensing of multiplex targets. 6-Carboxyfluorescein (FAM)-labeled adenosine triphosphate binding aptamer (ABA) and FAM-labeled thrombin binding aptamer (TBA) were first adsorbed onto graphene oxide (GO) to form a GO/aptamer complex, leading to the quenching of the fluorescence of FAM. We demonstrated that the unique GO/aptamer interaction and the specific aptamer-target recognition in the target/GO/aptamer system were programmable and could be utilized to regulate the fluorescence of FAM via OR and INHIBIT logic gates. The fluorescence changed according to different input combinations, and the integration of OR and INHIBIT logic gates provided an interesting approach for logic sensing applications where multiple target molecules were present. High-throughput fluorescence imagings that enabled the simultaneous processing of many samples by using the combinatorial logic gates were realized. The developed logic gates may find applications in further development of DNA circuits and advanced sensors for the identification of multiple targets in complex chemical environments.
Fuzz Testing of Industrial Network Protocols in Programmable Logic Controllers
2017-12-01
PLCs) are vital components in these cyber-physical systems. The industrial network protocols used to communicate between nodes in a control network...AB/RA) MicroLogix 1100 PLC through its implementation of EtherNet/IP, Common Industrial Protocol (CIP), and Programmable Controller Communication ...Commands (PCCC) communication protocols. This research also examines whether cross-generational vulnerabilities exist in the more advanced AB/RA
Nonlinear dynamics based digital logic and circuits.
Kia, Behnam; Lindner, John F; Ditto, William L
2015-01-01
We discuss the role and importance of dynamics in the brain and biological neural networks and argue that dynamics is one of the main missing elements in conventional Boolean logic and circuits. We summarize a simple dynamics based computing method, and categorize different techniques that we have introduced to realize logic, functionality, and programmability. We discuss the role and importance of coupled dynamics in networks of biological excitable cells, and then review our simple coupled dynamics based method for computing. In this paper, for the first time, we show how dynamics can be used and programmed to implement computation in any given base, including but not limited to base two.
Extended Logic Intelligent Processing System for a Sensor Fusion Processor Hardware
NASA Technical Reports Server (NTRS)
Stoica, Adrian; Thomas, Tyson; Li, Wei-Te; Daud, Taher; Fabunmi, James
2000-01-01
The paper presents the hardware implementation and initial tests from a low-power, highspeed reconfigurable sensor fusion processor. The Extended Logic Intelligent Processing System (ELIPS) is described, which combines rule-based systems, fuzzy logic, and neural networks to achieve parallel fusion of sensor signals in compact low power VLSI. The development of the ELIPS concept is being done to demonstrate the interceptor functionality which particularly underlines the high speed and low power requirements. The hardware programmability allows the processor to reconfigure into different machines, taking the most efficient hardware implementation during each phase of information processing. Processing speeds of microseconds have been demonstrated using our test hardware.
NASA Astrophysics Data System (ADS)
Yang, Junbo; Yang, Jiankun; Li, Xiujian; Chang, Shengli; Su, Xianyu; Ping, Xu
2011-04-01
The clos network is one of the earliest multistage interconnection networks. Recently, it has been widely studied in parallel optical information processing systems, and there have been many efforts to develop this network. In this paper, a smart and compact Clos network, including Clos(2,3,2) and Clos(2,4,2), is proposed by using polarizing beam-splitters (PBS), phase spatial light modulators (PSLM), and mirrors. PBS features that are s-component (perpendicular to the incident plane) of the incident light beam is reflected, and the p-component (parallel to the incident plane) passes through it. According to switching logic, under control of external electrical signals, PSLM functions to control routing paths of the signal beams, i.e., the polarization of each optical signal is rotated or not rotated 90° by a programmable PSLM. This new type of configuration grants the features of less optical components, compact in structure, efficient in performance, and insensitive to polarization of signal beam. In addition, the straight, the exchange, and the broadcast functions of the basic switch element are implemented bidirectionally in free-space. Furthermore, the new optical experimental module of 2×3 and 2×4 optical switch is also presented by a cascading polarization-independent bidirectional 2×2 optical switch. Simultaneously, the routing state-table of 2×3 and 2×4 optical switch to perform all permutation output and nonblocking switch for the input signal beam, is achieved. Since the proposed optical setup consists of only optical polarization elements, it is compact in structure, and possesses a low energy loss, a high signal-to-ratio, and an available large number of optical channels. Finally, the discussions and the experimental results show that the Clos network proposed here should be helpful in the design of large-scale network matrix, and may be used in optical communication and optical information processing.
Electrically-programmable diffraction grating
Ricco, Antonio J.; Butler, Michael A.; Sinclair, Michael B.; Senturia, Stephen D.
1998-01-01
An electrically-programmable diffraction grating. The programmable grating includes a substrate having a plurality of electrodes formed thereon and a moveable grating element above each of the electrodes. The grating elements are electrostatically programmable to form a diffraction grating for diffracting an incident beam of light as it is reflected from the upper surfaces of the grating elements. The programmable diffraction grating, formed by a micromachining process, has applications for optical information processing (e.g. optical correlators and computers), for multiplexing and demultiplexing a plurality of light beams of different wavelengths (e.g. for optical fiber communications), and for forming spectrometers (e.g. correlation and scanning spectrometers).
Current Radiation Issues for Programmable Elements and Devices
NASA Technical Reports Server (NTRS)
Katz, R.; Wang, J. J.; Koga, R.; LaBel, A.; McCollum, J.; Brown, R.; Reed, R. A.; Cronquist, B.; Crain, S.; Scott, T.;
1998-01-01
State of the an programmable devices are utilizing advanced processing technologies, non-standard circuit structures, and unique electrical elements in commercial-off-the-shelf (COTS)-based, high-performance devices. This paper will discuss that the above factors, coupled with the systems application environment, have a strong interplay that affect the radiation hardness of programmable devices and have resultant system impacts in (1) reliability of the unprogrammed, biased antifuse for heavy ions (rupture), (2) logic upset manifesting itself as clock upset, and (3) configuration upset. General radiation characteristics of advanced technologies are examined and manufacturers' modifications to their COTS-based and their impact on future programmable devices will be analyzed.
Enzyme-Based Logic Gates and Networks with Output Signals Analyzed by Various Methods.
Katz, Evgeny
2017-07-05
The paper overviews various methods that are used for the analysis of output signals generated by enzyme-based logic systems. The considered methods include optical techniques (optical absorbance, fluorescence spectroscopy, surface plasmon resonance), electrochemical techniques (cyclic voltammetry, potentiometry, impedance spectroscopy, conductivity measurements, use of field effect transistor devices, pH measurements), and various mechanoelectronic methods (using atomic force microscope, quartz crystal microbalance). Although each of the methods is well known for various bioanalytical applications, their use in combination with the biomolecular logic systems is rather new and sometimes not trivial. Many of the discussed methods have been combined with the use of signal-responsive materials to transduce and amplify biomolecular signals generated by the logic operations. Interfacing of biocomputing logic systems with electronics and "smart" signal-responsive materials allows logic operations be extended to actuation functions; for example, stimulating molecular release and switchable features of bioelectronic devices, such as biofuel cells. The purpose of this review article is to emphasize the broad variability of the bioanalytical systems applied for signal transduction in biocomputing processes. All bioanalytical systems discussed in the article are exemplified with specific logic gates and multi-gate networks realized with enzyme-based biocatalytic cascades. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.
An optical deoxyribonucleic acid-based half-subtractor.
Yang, Chia-Ning; Chen, Yi-Li; Lin, Hung-Yin; Hsu, Chun-Yu
2013-10-09
This study introduces an optical DNA-based logic circuit that mimics a half-subtractor. The system contains an Au-surface immobilized molecular-beacon molecule that serves as a dual-gate molecule and outputs two series of fluorescence signals following Boolean INH and XOR patterns after interacting with one or two single-stranded DNA molecules as input. To the best of our knowledge, the system reported herein is rather concise compared to other molecular logic gate systems.
Multichannel optical sensing device
Selkowitz, S.E.
1985-08-16
A multichannel optical sensing device is disclosed, for measuring the outdoor sky luminance or illuminance or the luminance or illuminance distribution in a room, comprising a plurality of light receptors, an optical shutter matrix including a plurality of liquid crystal optical shutter elements operable by electrical control signals between light transmitting and light stopping conditions, fiber optical elements connected between the receptors and the shutter elements, a microprocessor based programmable control unit for selectively supplying control signals to the optical shutter elements in a programmable sequence, a photodetector including an optical integrating spherical chamber having an input port for receiving the light from the shutter matrix and at least one detector element in the spherical chamber for producing output signals corresponding to the light, and output units for utilizing the output signals including a storage unit having a control connection to the microprocessor based programmable control unit for storing the output signals under the sequence control of the programmable control unit.
Multichannel optical sensing device
Selkowitz, Stephen E.
1990-01-01
A multichannel optical sensing device is disclosed, for measuring the outr sky luminance or illuminance or the luminance or illuminance distribution in a room, comprising a plurality of light receptors, an optical shutter matrix including a plurality of liquid crystal optical shutter elements operable by electrical control signals between light transmitting and light stopping conditions, fiber optic elements connected between the receptors and the shutter elements, a microprocessor based programmable control unit for selectively supplying control signals to the optical shutter elements in a programmable sequence, a photodetector including an optical integrating spherical chamber having an input port for receiving the light from the shutter matrix and at least one detector element in the spherical chamber for producing output signals corresponding to the light, and output units for utilizing the output signals including a storage unit having a control connection to the microprocessor based programmable control unit for storing the output signals under the sequence control of the programmable control unit.
High efficiency coherent optical memory with warm rubidium vapour
Hosseini, M.; Sparkes, B.M.; Campbell, G.; Lam, P.K.; Buchler, B.C.
2011-01-01
By harnessing aspects of quantum mechanics, communication and information processing could be radically transformed. Promising forms of quantum information technology include optical quantum cryptographic systems and computing using photons for quantum logic operations. As with current information processing systems, some form of memory will be required. Quantum repeaters, which are required for long distance quantum key distribution, require quantum optical memory as do deterministic logic gates for optical quantum computing. Here, we present results from a coherent optical memory based on warm rubidium vapour and show 87% efficient recall of light pulses, the highest efficiency measured to date for any coherent optical memory suitable for quantum information applications. We also show storage and recall of up to 20 pulses from our system. These results show that simple warm atomic vapour systems have clear potential as a platform for quantum memory. PMID:21285952
High efficiency coherent optical memory with warm rubidium vapour.
Hosseini, M; Sparkes, B M; Campbell, G; Lam, P K; Buchler, B C
2011-02-01
By harnessing aspects of quantum mechanics, communication and information processing could be radically transformed. Promising forms of quantum information technology include optical quantum cryptographic systems and computing using photons for quantum logic operations. As with current information processing systems, some form of memory will be required. Quantum repeaters, which are required for long distance quantum key distribution, require quantum optical memory as do deterministic logic gates for optical quantum computing. Here, we present results from a coherent optical memory based on warm rubidium vapour and show 87% efficient recall of light pulses, the highest efficiency measured to date for any coherent optical memory suitable for quantum information applications. We also show storage and recall of up to 20 pulses from our system. These results show that simple warm atomic vapour systems have clear potential as a platform for quantum memory.
A Microwave Thermostatic Reactor for Processing Liquid Materials Based on a Heat-Exchanger.
Zhou, Yongqiang; Zhang, Chun; Xie, Tian; Hong, Tao; Zhu, Huacheng; Yang, Yang; Liu, Changjun; Huang, Kama
2017-10-08
Microwaves have been widely used in the treatment of different materials. However, the existing adjustable power thermostatic reactors cannot be used to analyze materials characteristics under microwave effects. In this paper, a microwave thermostatic chemical reactor for processing liquid materials is proposed, by controlling the velocity of coolant based on PLC (programmable logic controller) in different liquid under different constant electric field intensity. A nonpolar coolant (Polydimethylsiloxane), which is completely microwave transparent, is employed to cool the liquid materials. Experiments are performed to measure the liquid temperature using optical fibers, the results show that the precision of temperature control is at the range of ±0.5 °C. Compared with the adjustable power thermostatic control system, the effect of electric field changes on material properties are avoided and it also can be used to detect the properties of liquid materials and special microwave effects.
A Microwave Thermostatic Reactor for Processing Liquid Materials Based on a Heat-Exchanger
Zhou, Yongqiang; Zhang, Chun; Xie, Tian; Hong, Tao; Yang, Yang; Liu, Changjun; Huang, Kama
2017-01-01
Microwaves have been widely used in the treatment of different materials. However, the existing adjustable power thermostatic reactors cannot be used to analyze materials characteristics under microwave effects. In this paper, a microwave thermostatic chemical reactor for processing liquid materials is proposed, by controlling the velocity of coolant based on PLC (programmable logic controller) in different liquid under different constant electric field intensity. A nonpolar coolant (Polydimethylsiloxane), which is completely microwave transparent, is employed to cool the liquid materials. Experiments are performed to measure the liquid temperature using optical fibers, the results show that the precision of temperature control is at the range of ±0.5 °C. Compared with the adjustable power thermostatic control system, the effect of electric field changes on material properties are avoided and it also can be used to detect the properties of liquid materials and special microwave effects. PMID:28991195
Wei, Hong; Li, Zhipeng; Tian, Xiaorui; Wang, Zhuoxian; Cong, Fengzi; Liu, Ning; Zhang, Shunping; Nordlander, Peter; Halas, Naomi J; Xu, Hongxing
2011-02-09
We show that the local electric field distribution of propagating plasmons along silver nanowires can be imaged by coating the nanowires with a layer of quantum dots, held off the surface of the nanowire by a nanoscale dielectric spacer layer. In simple networks of silver nanowires with two optical inputs, control of the optical polarization and phase of the input fields directs the guided waves to a specific nanowire output. The QD-luminescent images of these structures reveal that a complete family of phase-dependent, interferometric logic functions can be performed on these simple networks. These results show the potential for plasmonic waveguides to support compact interferometric logic operations.
Automated ILA design for synchronous sequential circuits
NASA Technical Reports Server (NTRS)
Liu, M. N.; Liu, K. Z.; Maki, G. K.; Whitaker, S. R.
1991-01-01
An iterative logic array (ILA) architecture for synchronous sequential circuits is presented. This technique utilizes linear algebra to produce the design equations. The ILA realization of synchronous sequential logic can be fully automated with a computer program. A programmable design procedure is proposed to fullfill the design task and layout generation. A software algorithm in the C language has been developed and tested to generate 1 micron CMOS layouts using the Hewlett-Packard FUNGEN module generator shell.
A tristate optical logic system
NASA Astrophysics Data System (ADS)
Basuray, A.; Mukhopadhyay, S.; Kumar Ghosh, Hirak; Datta, A. K.
1991-09-01
A method is described to represent data in a tristate logic system which are subsequently replaced by Modified Trinary Numbers (MTN). This system is advantagegeous in parallel processing as carry and borrow free operations in arithmatic computation is possible. The logical operations are also modified according to the three states available. A possible practical application of the same using polarized light is also suggested.
Detecting Payload Attacks on Programmable Logic Controllers (PLCs)
DOE Office of Scientific and Technical Information (OSTI.GOV)
Yang, Huan
Programmable logic controllers (PLCs) play critical roles in industrial control systems (ICS). Providing hardware peripherals and firmware support for control programs (i.e., a PLC’s “payload”) written in languages such as ladder logic, PLCs directly receive sensor readings and control ICS physical processes. An attacker with access to PLC development software (e.g., by compromising an engineering workstation) can modify the payload program and cause severe physical damages to the ICS. To protect critical ICS infrastructure, we propose to model runtime behaviors of legitimate PLC payload program and use runtime behavior monitoring in PLC firmware to detect payload attacks. By monitoring themore » I/O access patterns, network access patterns, as well as payload program timing characteristics, our proposed firmware-level detection mechanism can detect abnormal runtime behaviors of malicious PLC payload. Using our proof-of-concept implementation, we evaluate the memory and execution time overhead of implementing our proposed method and find that it is feasible to incorporate our method into existing PLC firmware. In addition, our evaluation results show that a wide variety of payload attacks can be effectively detected by our proposed approach. The proposed firmware-level payload attack detection scheme complements existing bumpin- the-wire solutions (e.g., external temporal-logic-based model checkers) in that it can detect payload attacks that violate realtime requirements of ICS operations and does not require any additional apparatus.« less
A molecular-sized optical logic circuit for digital modulation of a fluorescence signal
NASA Astrophysics Data System (ADS)
Nishimura, Takahiro; Tsuchida, Karin; Ogura, Yusuke; Tanida, Jun
2018-03-01
Fluorescence measurement allows simultaneous detection of multiple molecular species by using spectrally distinct fluorescence probes. However, due to the broad spectra of fluorescence emission, the multiplicity of fluorescence measurement is generally limited. To overcome this limitation, we propose a method to digitally modulate fluorescence output signals with a molecular-sized optical logic circuit by using optical control of fluorescence resonance energy transfer (FRET). The circuit receives a set of optical inputs represented with different light wavelengths, and then it switches high and low fluorescence intensity from a reporting molecule according to the result of the logic operation. By using combinational optical inputs in readout of fluorescence signals, the number of biomolecular species that can be identified is increased. To implement the FRET-based circuits, we designed two types of basic elements, YES and NOT switches. An YES switch produces a high-level output intensity when receiving a designated light wavelength input and a low-level intensity without the light irradiation. A NOT switch operates inversely to the YES switch. In experiments, we investigated the operation of the YES and NOT switches that receive a 532-nm light input and modulate the fluorescence intensity of Alexa Fluor 488. The experimental result demonstrates that the switches can modulate fluorescence signals according to the optical input.
Multi-port, optically addressed RAM
NASA Technical Reports Server (NTRS)
Johnston, Alan R. (Inventor); Nixon, Robert H. (Inventor); Bergman, Larry A. (Inventor); Esener, Sadik (Inventor)
1989-01-01
A random access memory addressing system utilizing optical links between memory and the read/write logic circuits comprises addressing circuits including a plurality of light signal sources, a plurality of optical gates including optical detectors associated with the memory cells, and a holographic optical element adapted to reflect and direct the light signals to the desired memory cell locations. More particularly, it is a multi-port, binary computer memory for interfacing with a plurality of computers. There are a plurality of storage cells for containing bits of binary information, the storage cells being disposed at the intersections of a plurality of row conductors and a plurality of column conductors. There is interfacing logic for receiving information from the computers directing access to ones of the storage cells. There are first light sources associated with the interfacing logic for transmitting a first light beam with the access information modulated thereon. First light detectors are associated with the storage cells for receiving the first light beam, for generating an electrical signal containing the access information, and for conducting the electrical signal to the one of the storage cells to which it is directed. There are holographic optical elements for reflecting the first light beam from the first light sources to the first light detectors.
Experimental investigation of a four-qubit linear-optical quantum logic circuit
Stárek, R.; Mičuda, M.; Miková, M.; Straka, I.; Dušek, M.; Ježek, M.; Fiurášek, J.
2016-01-01
We experimentally demonstrate and characterize a four-qubit linear-optical quantum logic circuit. Our robust and versatile scheme exploits encoding of two qubits into polarization and path degrees of single photons and involves two crossed inherently stable interferometers. This approach allows us to design a complex quantum logic circuit that combines a genuine four-qubit C3Z gate and several two-qubit and single-qubit gates. The C3Z gate introduces a sign flip if and only if all four qubits are in the computational state |1〉. We verify high-fidelity performance of this central four-qubit gate using Hofmann bounds on quantum gate fidelity and Monte Carlo fidelity sampling. We also experimentally demonstrate that the quantum logic circuit can generate genuine multipartite entanglement and we certify the entanglement with the use of suitably tailored entanglement witnesses. PMID:27647176
Nanowire nanocomputer as a finite-state machine.
Yao, Jun; Yan, Hao; Das, Shamik; Klemic, James F; Ellenbogen, James C; Lieber, Charles M
2014-02-18
Implementation of complex computer circuits assembled from the bottom up and integrated on the nanometer scale has long been a goal of electronics research. It requires a design and fabrication strategy that can address individual nanometer-scale electronic devices, while enabling large-scale assembly of those devices into highly organized, integrated computational circuits. We describe how such a strategy has led to the design, construction, and demonstration of a nanoelectronic finite-state machine. The system was fabricated using a design-oriented approach enabled by a deterministic, bottom-up assembly process that does not require individual nanowire registration. This methodology allowed construction of the nanoelectronic finite-state machine through modular design using a multitile architecture. Each tile/module consists of two interconnected crossbar nanowire arrays, with each cross-point consisting of a programmable nanowire transistor node. The nanoelectronic finite-state machine integrates 180 programmable nanowire transistor nodes in three tiles or six total crossbar arrays, and incorporates both sequential and arithmetic logic, with extensive intertile and intratile communication that exhibits rigorous input/output matching. Our system realizes the complete 2-bit logic flow and clocked control over state registration that are required for a finite-state machine or computer. The programmable multitile circuit was also reprogrammed to a functionally distinct 2-bit full adder with 32-set matched and complete logic output. These steps forward and the ability of our unique design-oriented deterministic methodology to yield more extensive multitile systems suggest that proposed general-purpose nanocomputers can be realized in the near future.
Nanowire nanocomputer as a finite-state machine
Yao, Jun; Yan, Hao; Das, Shamik; Klemic, James F.; Ellenbogen, James C.; Lieber, Charles M.
2014-01-01
Implementation of complex computer circuits assembled from the bottom up and integrated on the nanometer scale has long been a goal of electronics research. It requires a design and fabrication strategy that can address individual nanometer-scale electronic devices, while enabling large-scale assembly of those devices into highly organized, integrated computational circuits. We describe how such a strategy has led to the design, construction, and demonstration of a nanoelectronic finite-state machine. The system was fabricated using a design-oriented approach enabled by a deterministic, bottom–up assembly process that does not require individual nanowire registration. This methodology allowed construction of the nanoelectronic finite-state machine through modular design using a multitile architecture. Each tile/module consists of two interconnected crossbar nanowire arrays, with each cross-point consisting of a programmable nanowire transistor node. The nanoelectronic finite-state machine integrates 180 programmable nanowire transistor nodes in three tiles or six total crossbar arrays, and incorporates both sequential and arithmetic logic, with extensive intertile and intratile communication that exhibits rigorous input/output matching. Our system realizes the complete 2-bit logic flow and clocked control over state registration that are required for a finite-state machine or computer. The programmable multitile circuit was also reprogrammed to a functionally distinct 2-bit full adder with 32-set matched and complete logic output. These steps forward and the ability of our unique design-oriented deterministic methodology to yield more extensive multitile systems suggest that proposed general-purpose nanocomputers can be realized in the near future. PMID:24469812
2005-12-01
Upsets in SRAM FPGAs,” Military and Aerospace Applications of Programmable Logic Devices, September 2002. 8. Wakerly , John F,. “Microcomputer...change. The goal of the Configurable Fault Tolerant Processor (CFTP) Project is to explore, develop and demonstrate the applicability of using off-the...develop and demonstrate the applicability of using commercial-of-the-shelf (COTS) Field Programmable Gate Arrays (FPGA) in the design of
Selected area growth integrated wavelength converter based on PD-EAM optical logic gate
NASA Astrophysics Data System (ADS)
Bin, Niu; Jifang, Qiu; Daibing, Zhou; Can, Zhang; Song, Liang; Dan, Lu; Lingjuan, Zhao; Jian, Wu; Wei, Wang
2014-09-01
A selected area growth wavelength converter based on a PD-EAM optical logic gate for WDM application is presented, integrating an EML transmitter and a SOA-PD receiver. The design, fabrication, and DC characters were analyzed. A 2 Gb/s NRZ signal based on the C-band wavelength converted to 1555 nm with the highest extinction ratio of 7 dB was achieved and wavelength converted eye diagrams with eyes opened were presented.
Electrically-programmable diffraction grating
Ricco, A.J.; Butler, M.A.; Sinclair, M.B.; Senturia, S.D.
1998-05-26
An electrically-programmable diffraction grating is disclosed. The programmable grating includes a substrate having a plurality of electrodes formed thereon and a moveable grating element above each of the electrodes. The grating elements are electrostatically programmable to form a diffraction grating for diffracting an incident beam of light as it is reflected from the upper surfaces of the grating elements. The programmable diffraction grating, formed by a micromachining process, has applications for optical information processing (e.g. optical correlators and computers), for multiplexing and demultiplexing a plurality of light beams of different wavelengths (e.g. for optical fiber communications), and for forming spectrometers (e.g. correlation and scanning spectrometers). 14 figs.
Lu, Guo-Wei; Qin, Jun; Wang, Hongxiang; Ji, XuYuefeng; Sharif, Gazi Mohammad; Yamaguchi, Shigeru
2016-02-08
Optical logic gate, especially exclusive-or (XOR) gate, plays important role in accomplishing photonic computing and various network functionalities in future optical networks. On the other hand, optical multicast is another indispensable functionality to efficiently deliver information in optical networks. In this paper, for the first time, we propose and experimentally demonstrate a flexible optical three-input XOR gate scheme for multiple input phase-modulated signals with a 1-to-2 multicast functionality for each XOR operation using four-wave mixing (FWM) effect in single piece of highly-nonlinear fiber (HNLF). Through FWM in HNLF, all of the possible XOR operations among input signals could be simultaneously realized by sharing a single piece of HNLF. By selecting the obtained XOR components using a followed wavelength selective component, the number of XOR gates and the participant light in XOR operations could be flexibly configured. The re-configurability of the proposed XOR gate and the function integration of the optical logic gate and multicast in single device offer the flexibility in network design and improve the network efficiency. We experimentally demonstrate flexible 3-input XOR gate for four 10-Gbaud binary phase-shift keying signals with a multicast scale of 2. Error-free operations for the obtained XOR results are achieved. Potential application of the integrated XOR and multicast function in network coding is also discussed.
Nanopore Logic Operation with DNA to RNA Transcription in a Droplet System.
Ohara, Masayuki; Takinoue, Masahiro; Kawano, Ryuji
2017-07-21
This paper describes an AND logic operation with amplification and transcription from DNA to RNA, using T7 RNA polymerase. All four operations, (0 0) to (1 1), with an enzyme reaction can be performed simultaneously, using four-droplet devices that are directly connected to a patch-clamp amplifier. The output RNA molecule is detected using a biological nanopore with single-molecule translocation. Channel current recordings can be obtained using the enzyme solution. The integration of DNA logic gates into electrochemical devices is necessary to obtain output information in a human-recognizable form. Our method will be useful for rapid and confined DNA computing applications, including the development of programmable diagnostic devices.
NASA Astrophysics Data System (ADS)
Zheng, Bowen; Xu, Jun
2017-11-01
Mechanical information processing and control has attracted great attention in recent years. A challenging pursuit is to achieve broad functioning frequency ranges, especially at low-frequency domain. Here, we propose a design of mechanical logic switches based on DNA-inspired chiral acoustic metamaterials, which are capable of having ultrabroad band gaps at low-frequency domain. Logic operations can be easily performed by applying constraints at different locations and the functioning frequency ranges are able to be low, broad and tunable. This work may have an impact on the development of mechanical information processing, programmable materials, stress wave manipulation, as well as the isolation of noise and harmful vibration.
Programmable single-cell mammalian biocomputers.
Ausländer, Simon; Ausländer, David; Müller, Marius; Wieland, Markus; Fussenegger, Martin
2012-07-05
Synthetic biology has advanced the design of standardized control devices that program cellular functions and metabolic activities in living organisms. Rational interconnection of these synthetic switches resulted in increasingly complex designer networks that execute input-triggered genetic instructions with precision, robustness and computational logic reminiscent of electronic circuits. Using trigger-controlled transcription factors, which independently control gene expression, and RNA-binding proteins that inhibit the translation of transcripts harbouring specific RNA target motifs, we have designed a set of synthetic transcription–translation control devices that could be rewired in a plug-and-play manner. Here we show that these combinatorial circuits integrated a two-molecule input and performed digital computations with NOT, AND, NAND and N-IMPLY expression logic in single mammalian cells. Functional interconnection of two N-IMPLY variants resulted in bitwise intracellular XOR operations, and a combinatorial arrangement of three logic gates enabled independent cells to perform programmable half-subtractor and half-adder calculations. Individual mammalian cells capable of executing basic molecular arithmetic functions isolated or coordinated to metabolic activities in a predictable, precise and robust manner may provide new treatment strategies and bio-electronic interfaces in future gene-based and cell-based therapies.
Programmable Potentials: Approximate N-body potentials from coarse-level logic.
Thakur, Gunjan S; Mohr, Ryan; Mezić, Igor
2016-09-27
This paper gives a systematic method for constructing an N-body potential, approximating the true potential, that accurately captures meso-scale behavior of the chemical or biological system using pairwise potentials coming from experimental data or ab initio methods. The meso-scale behavior is translated into logic rules for the dynamics. Each pairwise potential has an associated logic function that is constructed using the logic rules, a class of elementary logic functions, and AND, OR, and NOT gates. The effect of each logic function is to turn its associated potential on and off. The N-body potential is constructed as linear combination of the pairwise potentials, where the "coefficients" of the potentials are smoothed versions of the associated logic functions. These potentials allow a potentially low-dimensional description of complex processes while still accurately capturing the relevant physics at the meso-scale. We present the proposed formalism to construct coarse-grained potential models for three examples: an inhibitor molecular system, bond breaking in chemical reactions, and DNA transcription from biology. The method can potentially be used in reverse for design of molecular processes by specifying properties of molecules that can carry them out.
Programmable Potentials: Approximate N-body potentials from coarse-level logic
NASA Astrophysics Data System (ADS)
Thakur, Gunjan S.; Mohr, Ryan; Mezić, Igor
2016-09-01
This paper gives a systematic method for constructing an N-body potential, approximating the true potential, that accurately captures meso-scale behavior of the chemical or biological system using pairwise potentials coming from experimental data or ab initio methods. The meso-scale behavior is translated into logic rules for the dynamics. Each pairwise potential has an associated logic function that is constructed using the logic rules, a class of elementary logic functions, and AND, OR, and NOT gates. The effect of each logic function is to turn its associated potential on and off. The N-body potential is constructed as linear combination of the pairwise potentials, where the “coefficients” of the potentials are smoothed versions of the associated logic functions. These potentials allow a potentially low-dimensional description of complex processes while still accurately capturing the relevant physics at the meso-scale. We present the proposed formalism to construct coarse-grained potential models for three examples: an inhibitor molecular system, bond breaking in chemical reactions, and DNA transcription from biology. The method can potentially be used in reverse for design of molecular processes by specifying properties of molecules that can carry them out.
Programmable Potentials: Approximate N-body potentials from coarse-level logic
Thakur, Gunjan S.; Mohr, Ryan; Mezić, Igor
2016-01-01
This paper gives a systematic method for constructing an N-body potential, approximating the true potential, that accurately captures meso-scale behavior of the chemical or biological system using pairwise potentials coming from experimental data or ab initio methods. The meso-scale behavior is translated into logic rules for the dynamics. Each pairwise potential has an associated logic function that is constructed using the logic rules, a class of elementary logic functions, and AND, OR, and NOT gates. The effect of each logic function is to turn its associated potential on and off. The N-body potential is constructed as linear combination of the pairwise potentials, where the “coefficients” of the potentials are smoothed versions of the associated logic functions. These potentials allow a potentially low-dimensional description of complex processes while still accurately capturing the relevant physics at the meso-scale. We present the proposed formalism to construct coarse-grained potential models for three examples: an inhibitor molecular system, bond breaking in chemical reactions, and DNA transcription from biology. The method can potentially be used in reverse for design of molecular processes by specifying properties of molecules that can carry them out. PMID:27671683
Programmable diffractive lens for ophthalmic application
NASA Astrophysics Data System (ADS)
Millán, María S.; Pérez-Cabré, Elisabet; Romero, Lenny A.; Ramírez, Natalia
2014-06-01
Pixelated liquid crystal displays have been widely used as spatial light modulators to implement programmable diffractive optical elements, particularly diffractive lenses. Many different applications of such components have been developed in information optics and optical processors that take advantage of their properties of great flexibility, easy and fast refreshment, and multiplexing capability in comparison with equivalent conventional refractive lenses. We explore the application of programmable diffractive lenses displayed on the pixelated screen of a liquid crystal on silicon spatial light modulator to ophthalmic optics. In particular, we consider the use of programmable diffractive lenses for the visual compensation of refractive errors (myopia, hypermetropia, astigmatism) and presbyopia. The principles of compensation are described and sketched using geometrical optics and paraxial ray tracing. For the proof of concept, a series of experiments with artificial eye in optical bench are conducted. We analyze the compensation precision in terms of optical power and compare the results with those obtained by means of conventional ophthalmic lenses. Practical considerations oriented to feasible applications are provided.
Ophthalmic compensation of visual ametropia based on a programmable diffractive lens
NASA Astrophysics Data System (ADS)
Millán, Maria S.; Pérez-Cabré, Elisabet; Romero, Lenny A.; Ramírez, Natalia
2013-11-01
Pixelated liquid crystal displays have been widely used as spatial light modulators to implement programmable diffractive optical elements (DOEs), particularly diffractive lenses. Many different applications of such components have been developed in information optics and optical processors that take advantage of their properties of great flexibility, easy and fast refreshment, and multiplexing capability in comparison with equivalent conventional refractive lenses. In this paper, we explore the application of programmable diffractive lenses displayed on the pixelated screen of a liquid crystal on silicon spatial light modulator (LCoS-SLM) to ophthalmic optics. In particular, we consider the use of programmable diffractive lenses for the visual compensation of some refractive errors (myopia, hyperopia). The theoretical principles of compensation are described and sketched using geometrical optics and paraxial ray tracing. A series of experiments with artificial eye in optical bench are conducted to analyze the compensation accuracy in terms of optical power and to compare the results with those obtained by means of conventional ophthalmic lenses. Practical considerations oriented to feasible applications are provided.
Design of optical axis jitter control system for multi beam lasers based on FPGA
NASA Astrophysics Data System (ADS)
Ou, Long; Li, Guohui; Xie, Chuanlin; Zhou, Zhiqiang
2018-02-01
A design of optical axis closed-loop control system for multi beam lasers coherent combining based on FPGA was introduced. The system uses piezoelectric ceramics Fast Steering Mirrors (FSM) as actuator, the Fairfield spot detection of multi beam lasers by the high speed CMOS camera for optical detecting, a control system based on FPGA for real-time optical axis jitter suppression. The algorithm for optical axis centroid detecting and PID of anti-Integral saturation were realized by FPGA. Optimize the structure of logic circuit by reuse resource and pipeline, as a result of reducing logic resource but reduced the delay time, and the closed-loop bandwidth increases to 100Hz. The jitter of laser less than 40Hz was reduced 40dB. The cost of the system is low but it works stably.
Interlocked DNA nanostructures controlled by a reversible logic circuit.
Li, Tao; Lohmann, Finn; Famulok, Michael
2014-09-17
DNA nanostructures constitute attractive devices for logic computing and nanomechanics. An emerging interest is to integrate these two fields and devise intelligent DNA nanorobots. Here we report a reversible logic circuit built on the programmable assembly of a double-stranded (ds) DNA [3]pseudocatenane that serves as a rigid scaffold to position two separate branched-out head-motifs, a bimolecular i-motif and a G-quadruplex. The G-quadruplex only forms when preceded by the assembly of the i-motif. The formation of the latter, in turn, requires acidic pH and unhindered mobility of the head-motif containing dsDNA nanorings with respect to the central ring to which they are interlocked, triggered by release oligodeoxynucleotides. We employ these features to convert the structural changes into Boolean operations with fluorescence labelling. The nanostructure behaves as a reversible logic circuit consisting of tandem YES and AND gates. Such reversible logic circuits integrated into functional nanodevices may guide future intelligent DNA nanorobots to manipulate cascade reactions in biological systems.
Interlocked DNA nanostructures controlled by a reversible logic circuit
Li, Tao; Lohmann, Finn; Famulok, Michael
2014-01-01
DNA nanostructures constitute attractive devices for logic computing and nanomechanics. An emerging interest is to integrate these two fields and devise intelligent DNA nanorobots. Here we report a reversible logic circuit built on the programmable assembly of a double-stranded (ds) DNA [3]pseudocatenane that serves as a rigid scaffold to position two separate branched-out head-motifs, a bimolecular i-motif and a G-quadruplex. The G-quadruplex only forms when preceded by the assembly of the i-motif. The formation of the latter, in turn, requires acidic pH and unhindered mobility of the head-motif containing dsDNA nanorings with respect to the central ring to which they are interlocked, triggered by release oligodeoxynucleotides. We employ these features to convert the structural changes into Boolean operations with fluorescence labelling. The nanostructure behaves as a reversible logic circuit consisting of tandem YES and AND gates. Such reversible logic circuits integrated into functional nanodevices may guide future intelligent DNA nanorobots to manipulate cascade reactions in biological systems. PMID:25229207
The fabrication of a programmable via using phase-change material in CMOS-compatible technology.
Chen, Kuan-Neng; Krusin-Elbaum, Lia
2010-04-02
We demonstrate an energy-efficient programmable via concept using indirectly heated phase-change material. This via structure has maximum phase-change volume to achieve a minimum on resistance for high performance logic applications. Process development and material investigations for this device structure are reported. The device concept is successfully demonstrated in a standard CMOS-compatible technology capable of multiple cycles between on/off states for reconfigurable applications.
NASA Technical Reports Server (NTRS)
Haley, D. C.; Almand, B. J.; Thomas, M. M.; Krauze, L. D.; Gremban, K. D.; Sanborn, J. C.; Kelly, J. H.; Depkovich, T. M.; Wolfe, W. J.; Nguyen, T.
1986-01-01
The purpose of the Robotic Simulation (ROBSIM) program is to provide a broad range of computer capabilities to assist in the design, verification, simulation, and study of robotic systems. ROBSIM is programmed in FORTRAM 77 and implemented on a VAX 11/750 computer using the VMS operating system. The programmer's guide describes the ROBSIM implementation and program logic flow, and the functions and structures of the different subroutines. With the manual and the in-code documentation, an experienced programmer can incorporate additional routines and modify existing ones to add desired capabilities.
Strategic Control Algorithm Development : Volume 4A. Computer Program Report.
DOT National Transportation Integrated Search
1974-08-01
A description of the strategic algorithm evaluation model is presented, both at the user and programmer levels. The model representation of an airport configuration, environmental considerations, the strategic control algorithm logic, and the airplan...
Strategic Control Algorithm Development : Volume 4B. Computer Program Report (Concluded)
DOT National Transportation Integrated Search
1974-08-01
A description of the strategic algorithm evaluation model is presented, both at the user and programmer levels. The model representation of an airport configuration, environmental considerations, the strategic control algorithm logic, and the airplan...
Improving immunization of programmable logic controllers using weighted median filters.
Paredes, José L; Díaz, Dhionel
2005-04-01
This paper addresses the problem of improving immunization of programmable logic controllers (PLC's) to electromagnetic interference with impulsive characteristics. A filtering structure, based on weighted median filters, that does not require additional hardware and can be implemented in legacy PLC's is proposed. The filtering operation is implemented in the binary domain and removes the impulsive noise presented in the discrete input adding thus robustness to PLC's. By modifying the sampling clock structure, two variants of the filter are obtained. Both structures exploit the cyclic nature of the PLC to form an N-sample observation window of the discrete input, hence a status change on it is determined by the filter output taking into account all the N samples avoiding thus that a single impulse affects the PLC functionality. A comparative study, based on a statistical analysis, of the different filters' performances is presented.
Valencia-Palomo, G; Rossiter, J A
2011-01-01
This paper makes two key contributions. First, it tackles the issue of the availability of constrained predictive control for low-level control loops. Hence, it describes how the constrained control algorithm is embedded in an industrial programmable logic controller (PLC) using the IEC 61131-3 programming standard. Second, there is a definition and implementation of a novel auto-tuned predictive controller; the key novelty is that the modelling is based on relatively crude but pragmatic plant information. Laboratory experiment tests were carried out in two bench-scale laboratory systems to prove the effectiveness of the combined algorithm and hardware solution. For completeness, the results are compared with a commercial proportional-integral-derivative (PID) controller (also embedded in the PLC) using the most up to date auto-tuning rules. Copyright © 2010 ISA. Published by Elsevier Ltd. All rights reserved.
NASA Astrophysics Data System (ADS)
Yu, Haijun; Li, Guofu; Duo, Liping; Jin, Yuqi; Wang, Jian; Sang, Fengting; Kang, Yuanfu; Li, Liucheng; Wang, Yuanhu; Tang, Shukai; Yu, Hongliang
2015-02-01
A user-friendly data acquisition and control system (DACS) for a pulsed chemical oxygen -iodine laser (PCOIL) has been developed. It is implemented by an industrial control computer,a PLC, and a distributed input/output (I/O) module, as well as the valve and transmitter. The system is capable of handling 200 analogue/digital channels for performing various operations such as on-line acquisition, display, safety measures and control of various valves. These operations are controlled either by control switches configured on a PC while not running or by a pre-determined sequence or timings during the run. The system is capable of real-time acquisition and on-line estimation of important diagnostic parameters for optimization of a PCOIL. The DACS system has been programmed using software programmable logic controller (PLC). Using this DACS, more than 200 runs were given performed successfully.
An acceleration framework for synthetic aperture radar algorithms
NASA Astrophysics Data System (ADS)
Kim, Youngsoo; Gloster, Clay S.; Alexander, Winser E.
2017-04-01
Algorithms for radar signal processing, such as Synthetic Aperture Radar (SAR) are computationally intensive and require considerable execution time on a general purpose processor. Reconfigurable logic can be used to off-load the primary computational kernel onto a custom computing machine in order to reduce execution time by an order of magnitude as compared to kernel execution on a general purpose processor. Specifically, Field Programmable Gate Arrays (FPGAs) can be used to accelerate these kernels using hardware-based custom logic implementations. In this paper, we demonstrate a framework for algorithm acceleration. We used SAR as a case study to illustrate the potential for algorithm acceleration offered by FPGAs. Initially, we profiled the SAR algorithm and implemented a homomorphic filter using a hardware implementation of the natural logarithm. Experimental results show a linear speedup by adding reasonably small processing elements in Field Programmable Gate Array (FPGA) as opposed to using a software implementation running on a typical general purpose processor.
The need for theory evaluation in global citizenship programmes: The case of the GCSA programme.
Goodier, Sarah; Field, Carren; Goodman, Suki
2018-02-01
Many education programmes lack a documented programme theory. This is a problem for programme planners and evaluators as the ability to measure programme success is grounded in the plausibility of the programme's underlying causal logic. Where the programme theory has not been documented, conducting a theory evaluation offers a foundational evaluation step as it gives an indication of whether the theory behind a programme is sound. This paper presents a case of a theory evaluation of a Global Citizenship programme at a top-ranking university in South Africa, subsequently called the GCSA Programme. This evaluation highlights the need for documented programme theory in global citizenship-type programmes for future programme development. An articulated programme theory produced for the GCSA Programme, analysed against the available social science literature, indicated it is comparable to other such programmes in terms of its overarching framework. What the research found is that most other global citizenship programmes do not have an articulated programme theory. These programmes also do not explicitly link their specific activities to their intended outcomes, making demonstrating impact impossible. In conclusion, we argue that taking a theory-based approach can strengthen and enable outcome evaluations in global citizenship programmes. Copyright © 2017. Published by Elsevier Ltd.
Pu, Fang; Ren, Jinsong; Qu, Xiaogang
2014-06-25
Molecular logic gates in response to chemical, biological, or optical input signals at a molecular level have received much interest over the past decade. Herein, we construct "plug and play" logic systems based on the fluorescence switching of guest molecules confined in coordination polymer nanoparticles generated from nucleotide and lanthanide ions. In the system, the addition of new modules directly enables new logic functions. PASS 0, YES, PASS 1, NOT, IMP, OR, and AND gates are successfully constructed in sequence. Moreover, different logic gates (AND, INH, and IMP) can be constructed using different guest molecules and the same input combinations. The work will be beneficial to the future logic design and expand the applications of coordination polymers.
The evolvability of programmable hardware.
Raman, Karthik; Wagner, Andreas
2011-02-06
In biological systems, individual phenotypes are typically adopted by multiple genotypes. Examples include protein structure phenotypes, where each structure can be adopted by a myriad individual amino acid sequence genotypes. These genotypes form vast connected 'neutral networks' in genotype space. The size of such neutral networks endows biological systems not only with robustness to genetic change, but also with the ability to evolve a vast number of novel phenotypes that occur near any one neutral network. Whether technological systems can be designed to have similar properties is poorly understood. Here we ask this question for a class of programmable electronic circuits that compute digital logic functions. The functional flexibility of such circuits is important in many applications, including applications of evolutionary principles to circuit design. The functions they compute are at the heart of all digital computation. We explore a vast space of 10(45) logic circuits ('genotypes') and 10(19) logic functions ('phenotypes'). We demonstrate that circuits that compute the same logic function are connected in large neutral networks that span circuit space. Their robustness or fault-tolerance varies very widely. The vicinity of each neutral network contains circuits with a broad range of novel functions. Two circuits computing different functions can usually be converted into one another via few changes in their architecture. These observations show that properties important for the evolvability of biological systems exist in a commercially important class of electronic circuitry. They also point to generic ways to generate fault-tolerant, adaptable and evolvable electronic circuitry.
The evolvability of programmable hardware
Raman, Karthik; Wagner, Andreas
2011-01-01
In biological systems, individual phenotypes are typically adopted by multiple genotypes. Examples include protein structure phenotypes, where each structure can be adopted by a myriad individual amino acid sequence genotypes. These genotypes form vast connected ‘neutral networks’ in genotype space. The size of such neutral networks endows biological systems not only with robustness to genetic change, but also with the ability to evolve a vast number of novel phenotypes that occur near any one neutral network. Whether technological systems can be designed to have similar properties is poorly understood. Here we ask this question for a class of programmable electronic circuits that compute digital logic functions. The functional flexibility of such circuits is important in many applications, including applications of evolutionary principles to circuit design. The functions they compute are at the heart of all digital computation. We explore a vast space of 1045 logic circuits (‘genotypes’) and 1019 logic functions (‘phenotypes’). We demonstrate that circuits that compute the same logic function are connected in large neutral networks that span circuit space. Their robustness or fault-tolerance varies very widely. The vicinity of each neutral network contains circuits with a broad range of novel functions. Two circuits computing different functions can usually be converted into one another via few changes in their architecture. These observations show that properties important for the evolvability of biological systems exist in a commercially important class of electronic circuitry. They also point to generic ways to generate fault-tolerant, adaptable and evolvable electronic circuitry. PMID:20534598
NASA Astrophysics Data System (ADS)
Marmon, Jason; Rai, Satish; Wang, Kai; Zhou, Weilie; Zhang, Yong
2016-03-01
Modern electronics are developing electronic-optical integrated circuits, while their electronic backbone, e.g. field-effect transistors (FETs), remains the same. However, further FET down scaling is facing physical and technical challenges. A light-effect transistor (LET) offers electronic-optical hybridization at the component level, which can continue Moore’s law to quantum region without requiring a FET’s fabrication complexity, e.g. physical gate and doping, by employing optical gating and photoconductivity. Multiple independent gates are therefore readily realized to achieve unique functionalities without increasing chip space. Here we report LET device characteristics and novel digital and analog applications, such as optical logic gates and optical amplification. Prototype CdSe-nanowire-based LETs show output and transfer characteristics resembling advanced FETs, e.g. on/off ratios up to ~1.0x106 with a source-drain voltage of ~1.43 V, gate-power of ~260 nW, and subthreshold swing of ~0.3 nW/decade (excluding losses). Our work offers new electronic-optical integration strategies and electronic and optical computing approaches.
NASA Astrophysics Data System (ADS)
Liu, Tianqi; Yang, Zhenlei; Guo, Jinlong; Du, Guanghua; Tong, Teng; Wang, Xiaohui; Su, Hong; Liu, Wenjing; Liu, Jiande; Wang, Bin; Ye, Bing; Liu, Jie
2017-08-01
The heavy-ion imaging of single event upset (SEU) in a flash-based field programmable gate array (FPGA) device was carried out for the first time at Heavy Ion Research Facility in Lanzhou (HIRFL). The three shift register chains with separated input and output configurations in device under test (DUT) were used to identify the corresponding logical area rapidly once an upset occurred. The logic units in DUT were partly configured in order to distinguish the registers in SEU images. Based on the above settings, the partial architecture of shift register chains in DUT was imaged by employing the microbeam of 86Kr ion with energy of 25 MeV/u in air. The results showed that the physical distribution of registers in DUT had a high consistency with its logical arrangement by comparing SEU image with logic configuration in scanned area.
Single board system for fuzzy inference
NASA Technical Reports Server (NTRS)
Symon, James R.; Watanabe, Hiroyuki
1991-01-01
The very large scale integration (VLSI) implementation of a fuzzy logic inference mechanism allows the use of rule-based control and decision making in demanding real-time applications. Researchers designed a full custom VLSI inference engine. The chip was fabricated using CMOS technology. The chip consists of 688,000 transistors of which 476,000 are used for RAM memory. The fuzzy logic inference engine board system incorporates the custom designed integrated circuit into a standard VMEbus environment. The Fuzzy Logic system uses Transistor-Transistor Logic (TTL) parts to provide the interface between the Fuzzy chip and a standard, double height VMEbus backplane, allowing the chip to perform application process control through the VMEbus host. High level C language functions hide details of the hardware system interface from the applications level programmer. The first version of the board was installed on a robot at Oak Ridge National Laboratory in January of 1990.
78 FR 13747 - Safety Advisory 2013-01; Passing Stop Signals Protecting Movable Bridges
Federal Register 2010, 2011, 2012, 2013, 2014
2013-02-28
... 82 freight cars, including 51 hazardous materials tank cars, derailed seven cars while crossing a... bridge to close using the key pad on the locomotive radio. Through the use of a programmable logic...
The Integration of DCS I/O to an Existing PLC
NASA Technical Reports Server (NTRS)
Sadhukhan, Debashis; Mihevic, John
2013-01-01
At the NASA Glenn Research Center (GRC), Existing Programmable Logic Controller (PLC) I/O was replaced with Distributed Control System (DCS) I/O, while keeping the existing PLC sequence Logic. The reason for integration of the PLC logic and DCS I/O, along with the evaluation of the resulting system is the subject of this paper. The pros and cons of the old system and new upgrade are described, including operator workstation screen update times. Detail of the physical layout and the communication between the PLC, the DCS I/O and the operator workstations are illustrated. The complex characteristics of a central process control system and the plan to remove the PLC processors in future upgrades is also discussed.
Programming Cell Adhesion for On-Chip Sequential Boolean Logic Functions.
Qu, Xiangmeng; Wang, Shaopeng; Ge, Zhilei; Wang, Jianbang; Yao, Guangbao; Li, Jiang; Zuo, Xiaolei; Shi, Jiye; Song, Shiping; Wang, Lihua; Li, Li; Pei, Hao; Fan, Chunhai
2017-08-02
Programmable remodelling of cell surfaces enables high-precision regulation of cell behavior. In this work, we developed in vitro constructed DNA-based chemical reaction networks (CRNs) to program on-chip cell adhesion. We found that the RGD-functionalized DNA CRNs are entirely noninvasive when interfaced with the fluidic mosaic membrane of living cells. DNA toehold with different lengths could tunably alter the release kinetics of cells, which shows rapid release in minutes with the use of a 6-base toehold. We further demonstrated the realization of Boolean logic functions by using DNA strand displacement reactions, which include multi-input and sequential cell logic gates (AND, OR, XOR, and AND-OR). This study provides a highly generic tool for self-organization of biological systems.
Excitonic AND Logic Gates on DNA Brick Nanobreadboards.
Cannon, Brittany L; Kellis, Donald L; Davis, Paul H; Lee, Jeunghoon; Kuang, Wan; Hughes, William L; Graugnard, Elton; Yurke, Bernard; Knowlton, William B
2015-03-18
A promising application of DNA self-assembly is the fabrication of chromophore-based excitonic devices. DNA brick assembly is a compelling method for creating programmable nanobreadboards on which chromophores may be rapidly and easily repositioned to prototype new excitonic devices, optimize device operation, and induce reversible switching. Using DNA nanobreadboards, we have demonstrated each of these functions through the construction and operation of two different excitonic AND logic gates. The modularity and high chromophore density achievable via this brick-based approach provide a viable path toward developing information processing and storage systems.
Excitonic AND Logic Gates on DNA Brick Nanobreadboards
2015-01-01
A promising application of DNA self-assembly is the fabrication of chromophore-based excitonic devices. DNA brick assembly is a compelling method for creating programmable nanobreadboards on which chromophores may be rapidly and easily repositioned to prototype new excitonic devices, optimize device operation, and induce reversible switching. Using DNA nanobreadboards, we have demonstrated each of these functions through the construction and operation of two different excitonic AND logic gates. The modularity and high chromophore density achievable via this brick-based approach provide a viable path toward developing information processing and storage systems. PMID:25839049
Instantaneous relationship between solar inertial and local vertical local horizontal attitudes
NASA Technical Reports Server (NTRS)
Vickery, S. A.
1977-01-01
The instantaneous relationship between the Solar Inertial (SI) and Local Vertical Local Horizontal (LVLH) coordinate systems is derived. A method is presented for computation of the LVLH to SI rotational transformation matrix as a function of an input LVLH attitude and the corresponding look angles to the sun. Logic is provided for conversion between LVLH and SI attitudes expressed in terms of a pitch, yaw, roll Euler sequence. Documentation is included for a program which implements the logic on the Hewlett-Packard 97 programmable calculator.
Devaraju, Naga Sai Gopi K; Unger, Marc A
2012-11-21
Advances in microfluidics now allow an unprecedented level of parallelization and integration of biochemical reactions. However, one challenge still faced by the field has been the complexity and cost of the control hardware: one external pressure signal has been required for each independently actuated set of valves on chip. Using a simple post-modification to the multilayer soft lithography fabrication process, we present a new implementation of digital fluidic logic fully analogous to electronic logic with significant performance advances over the previous implementations. We demonstrate a novel normally closed static gain valve capable of modulating pressure signals in a fashion analogous to an electronic transistor. We utilize these valves to build complex fluidic logic circuits capable of arbitrary control of flows by processing binary input signals (pressure (1) and atmosphere (0)). We demonstrate logic gates and devices including NOT, NAND and NOR gates, bi-stable flip-flops, gated flip-flops (latches), oscillators, self-driven peristaltic pumps, delay flip-flops, and a 12-bit shift register built using static gain valves. This fluidic logic shows cascade-ability, feedback, programmability, bi-stability, and autonomous control capability. This implementation of fluidic logic yields significantly smaller devices, higher clock rates, simple designs, easy fabrication, and integration into MSL microfluidics.
Information Retrieval Research and ESPRIT.
ERIC Educational Resources Information Center
Smeaton, Alan F.
1987-01-01
Describes the European Strategic Programme of Research and Development in Information Technology (ESPRIT), and its five programs: advanced microelectronics, software technology, advanced information processing, office systems, and computer integrated manufacturing. The emphasis on logic programming and ESPRIT as the European response to the…
Leerlooijer, Joanne N; Ruiter, Robert A C; Reinders, Jo; Darwisyah, Wati; Kok, Gerjo; Bartholomew, L Kay
2011-06-01
Evidence-based health promotion programmes, including HIV/AIDS prevention and sexuality education programmes, are often transferred to other cultures, priority groups and implementation settings. Challenges in this process include the identification of retaining core elements that relate to the programme's effectiveness while making changes that enhances acceptance in the new context and for the new priority group. This paper describes the use of a systematic approach to programme adaptation using a case study as an example. Intervention Mapping, a protocol for the development of evidence-based behaviour change interventions, was used to adapt the comprehensive school-based sexuality education programme 'The World Starts With Me'. The programme was developed for a priority population in Uganda and adapted to a programme for Indonesian secondary school students. The approach helped to systematically address the complexity and challenges of programme adaptation and to find a balance between preservation of essential programme elements (i.e. logic models) that may be crucial to the programme's effectiveness, including key objectives and theoretical behaviour change methods, and the adaptation of the programme to be acceptable to the new priority group and the programme implementers.
Parallel image logical operations using cross correlation
NASA Technical Reports Server (NTRS)
Strong, J. P., III
1972-01-01
Methods are presented for counting areas in an image in a parallel manner using noncoherent optical techniques. The techniques presented include the Levialdi algorithm for counting, optical techniques for binary operations, and cross-correlation.
Guz, Nataliia; Halámek, Jan; Rusling, James F.; Katz, Evgeny
2014-01-01
The biocatalytic cascade based on enzyme-catalyzed reactions activated by several biomolecular input signals and producing output signal after each reaction step was developed as an example of a logically reversible information processing system. The model system was designed to mimic the operation of concatenated AND logic gates with optically readable output signals generated at each step of the logic operation. Implications include concurrent bioanalyses and data interpretation for medical diagnostics. PMID:24748446
Large conditional single-photon cross-phase modulation
NASA Astrophysics Data System (ADS)
Beck, Kristin; Hosseini, Mahdi; Duan, Yiheng; Vuletic, Vladan
2016-05-01
Deterministic optical quantum logic requires a nonlinear quantum process that alters the phase of a quantum optical state by π through interaction with only one photon. Here, we demonstrate a large conditional cross-phase modulation between a signal field, stored inside an atomic quantum memory, and a control photon that traverses a high-finesse optical cavity containing the atomic memory. This approach avoids fundamental limitations associated with multimode effects for traveling optical photons. We measure a conditional cross-phase shift of up to π / 3 between the retrieved signal and control photons, and confirm deterministic entanglement between the signal and control modes by extracting a positive concurrence. With a moderate improvement in cavity finesse, our system can reach a coherent phase shift of p at low loss, enabling deterministic and universal photonic quantum logic. Preprint: arXiv:1512.02166 [quant-ph
Ultrafast all-optical arithmetic logic based on hydrogenated amorphous silicon microring resonators
NASA Astrophysics Data System (ADS)
Gostimirovic, Dusan; Ye, Winnie N.
2016-03-01
For decades, the semiconductor industry has been steadily shrinking transistor sizes to fit more performance into a single silicon-based integrated chip. This technology has become the driving force for advances in education, transportation, and health, among others. However, transistor sizes are quickly approaching their physical limits (channel lengths are now only a few silicon atoms in length), and Moore's law will likely soon be brought to a stand-still despite many unique attempts to keep it going (FinFETs, high-k dielectrics, etc.). This technology must then be pushed further by exploring (almost) entirely new methodologies. Given the explosive growth of optical-based long-haul telecommunications, we look to apply the use of high-speed optics as a substitute to the digital model; where slow, lossy, and noisy metal interconnections act as a major bottleneck to performance. We combine the (nonlinear) optical Kerr effect with a single add-drop microring resonator to perform the fundamental AND-XOR logical operations of a half adder, by all-optical means. This process is also applied to subtraction, higher-order addition, and the realization of an all-optical arithmetic logic unit (ALU). The rings use hydrogenated amorphous silicon as a material with superior nonlinear properties to crystalline silicon, while still maintaining CMOS-compatibility and the many benefits that come with it (low cost, ease of fabrication, etc.). Our method allows for multi-gigabit-per-second data rates while maintaining simplicity and spatial minimalism in design for high-capacity manufacturing potential.
Magnetic-field-controlled reconfigurable semiconductor logic.
Joo, Sungjung; Kim, Taeyueb; Shin, Sang Hoon; Lim, Ju Young; Hong, Jinki; Song, Jin Dong; Chang, Joonyeon; Lee, Hyun-Woo; Rhie, Kungwon; Han, Suk Hee; Shin, Kyung-Ho; Johnson, Mark
2013-02-07
Logic devices based on magnetism show promise for increasing computational efficiency while decreasing consumed power. They offer zero quiescent power and yet combine novel functions such as programmable logic operation and non-volatile built-in memory. However, practical efforts to adapt a magnetic device to logic suffer from a low signal-to-noise ratio and other performance attributes that are not adequate for logic gates. Rather than exploiting magnetoresistive effects that result from spin-dependent transport of carriers, we have approached the development of a magnetic logic device in a different way: we use the phenomenon of large magnetoresistance found in non-magnetic semiconductors in high electric fields. Here we report a device showing a strong diode characteristic that is highly sensitive to both the sign and the magnitude of an external magnetic field, offering a reversible change between two different characteristic states by the application of a magnetic field. This feature results from magnetic control of carrier generation and recombination in an InSb p-n bilayer channel. Simple circuits combining such elementary devices are fabricated and tested, and Boolean logic functions including AND, OR, NAND and NOR are performed. They are programmed dynamically by external electric or magnetic signals, demonstrating magnetic-field-controlled semiconductor reconfigurable logic at room temperature. This magnetic technology permits a new kind of spintronic device, characterized as a current switch rather than a voltage switch, and provides a simple and compact platform for non-volatile reconfigurable logic devices.
An autonomous molecular computer for logical control of gene expression.
Benenson, Yaakov; Gil, Binyamin; Ben-Dor, Uri; Adar, Rivka; Shapiro, Ehud
2004-05-27
Early biomolecular computer research focused on laboratory-scale, human-operated computers for complex computational problems. Recently, simple molecular-scale autonomous programmable computers were demonstrated allowing both input and output information to be in molecular form. Such computers, using biological molecules as input data and biologically active molecules as outputs, could produce a system for 'logical' control of biological processes. Here we describe an autonomous biomolecular computer that, at least in vitro, logically analyses the levels of messenger RNA species, and in response produces a molecule capable of affecting levels of gene expression. The computer operates at a concentration of close to a trillion computers per microlitre and consists of three programmable modules: a computation module, that is, a stochastic molecular automaton; an input module, by which specific mRNA levels or point mutations regulate software molecule concentrations, and hence automaton transition probabilities; and an output module, capable of controlled release of a short single-stranded DNA molecule. This approach might be applied in vivo to biochemical sensing, genetic engineering and even medical diagnosis and treatment. As a proof of principle we programmed the computer to identify and analyse mRNA of disease-related genes associated with models of small-cell lung cancer and prostate cancer, and to produce a single-stranded DNA molecule modelled after an anticancer drug.
Throughput and latency programmable optical transceiver by using DSP and FEC control.
Tanimura, Takahito; Hoshida, Takeshi; Kato, Tomoyuki; Watanabe, Shigeki; Suzuki, Makoto; Morikawa, Hiroyuki
2017-05-15
We propose and experimentally demonstrate a proof-of-concept of a programmable optical transceiver that enables simultaneous optimization of multiple programmable parameters (modulation format, symbol rate, power allocation, and FEC) for satisfying throughput, signal quality, and latency requirements. The proposed optical transceiver also accommodates multiple sub-channels that can transport different optical signals with different requirements. Multi-degree-of-freedom of the parameters often leads to difficulty in finding the optimum combination among the parameters due to an explosion of the number of combinations. The proposed optical transceiver reduces the number of combinations and finds feasible sets of programmable parameters by using constraints of the parameters combined with a precise analytical model. For precise BER prediction with the specified set of parameters, we model the sub-channel BER as a function of OSNR, modulation formats, symbol rates, and power difference between sub-channels. Next, we formulate simple constraints of the parameters and combine the constraints with the analytical model to seek feasible sets of programmable parameters. Finally, we experimentally demonstrate the end-to-end operation of the proposed optical transceiver with offline manner including low-density parity-check (LDPC) FEC encoding and decoding under a specific use case with latency-sensitive application and 40-km transmission.
Optical simulation of quantum algorithms using programmable liquid-crystal displays
DOE Office of Scientific and Technical Information (OSTI.GOV)
Puentes, Graciana; La Mela, Cecilia; Ledesma, Silvia
2004-04-01
We present a scheme to perform an all optical simulation of quantum algorithms and maps. The main components are lenses to efficiently implement the Fourier transform and programmable liquid-crystal displays to introduce space dependent phase changes on a classical optical beam. We show how to simulate Deutsch-Jozsa and Grover's quantum algorithms using essentially the same optical array programmed in two different ways.
Electromechanical Componentry. High-Technology Training Module.
ERIC Educational Resources Information Center
Lindemann, Don
This training module on electromechanical components contains 10 units for a two-year vocational program packaging system equipment control course at Wisconsin Indianhead Technical College. This module describes the functions of electromechanical devices essential for understanding input/output devices for Programmable Logic Control (PLC)…
Reconfigurable dynamic all-optical chaotic logic operations in an optically injected VCSEL
NASA Astrophysics Data System (ADS)
Zhong, Dong-Zhou; Xu, Ge-Liang; Luo, Wei; Xiao, Zhen-Zhen
2017-12-01
Not Available Project supported by the National Natural Science Foundation of China (Grant No. 61475120) and the Innovative Projects in Guangdong Colleges and Universities, China (Grant No. 2015KTSCX146).
Artificial neural networks using complex numbers and phase encoded weights.
Michel, Howard E; Awwal, Abdul Ahad S
2010-04-01
The model of a simple perceptron using phase-encoded inputs and complex-valued weights is proposed. The aggregation function, activation function, and learning rule for the proposed neuron are derived and applied to Boolean logic functions and simple computer vision tasks. The complex-valued neuron (CVN) is shown to be superior to traditional perceptrons. An improvement of 135% over the theoretical maximum of 104 linearly separable problems (of three variables) solvable by conventional perceptrons is achieved without additional logic, neuron stages, or higher order terms such as those required in polynomial logic gates. The application of CVN in distortion invariant character recognition and image segmentation is demonstrated. Implementation details are discussed, and the CVN is shown to be very attractive for optical implementation since optical computations are naturally complex. The cost of the CVN is less in all cases than the traditional neuron when implemented optically. Therefore, all the benefits of the CVN can be obtained without additional cost. However, on those implementations dependent on standard serial computers, CVN will be more cost effective only in those applications where its increased power can offset the requirement for additional neurons.
A three-sided rearrangeable switching network for a binary fat tree
NASA Astrophysics Data System (ADS)
Yen, Mao-Hsu; Yu, Chu; Shin, Haw-Yun; Chen, Sao-Jie
2011-06-01
A binary fat tree needs an internal node to interconnect the left-children, right-children and parent terminals to each other. In this article, we first propose a three-stage, 3-sided rearrangeable switching network for the implementation of a binary fat tree. The main component of this 3-sided switching network (3SSN) consists of a polygonal switch block (PSB) interconnected by crossbars. With the same size and the same number of switches as our 3SSN, a three-stage, 3-sided clique-based switching network is shown to be not rearrangeable. Also, the effects of the rearrangeable structure and the number of terminals on the network switch-efficiency are explored and a proper set of parameters has been determined to minimise the number of switches. We derive that a rearrangeable 3-sided switching network with switches proportional to N 3/2 is most suitable to interconnect N terminals. Moreover, we propose a new Polygonal Field Programmable Gate Array (PFPGA) that consists of logic blocks interconnected by our 3SSN, such that the logic blocks in this PFPGA can be grouped into clusters to implement different logic functions. Since the programmable switches usually have high resistance and capacitance and occupy a large area, we have to consider the effect of the 3SSN structure and the granularity of its cluster logic blocks on the switch efficiency of PFPGA. Experiments on benchmark circuits show that the switch and speed performances are significantly improved. Based on the experimental results, we can determine the parameters of PFPGA for the VLSI implementation.
Logical enzyme triggered (LET) layer-by-layer nanocapsules for drug delivery system
NASA Astrophysics Data System (ADS)
Kelley, Marie-Michelle
Breast cancer is the second leading cause of morbidity and mortality among women in the United States. Early detection and treatment methods have resulted in 100% 5-year survival rates for stage 0-I breast cancer. Unfortunately, the 5-year survival rate of metastatic breast cancer (stage IV) is reduced fivefold. The most challenging issues of metastatic breast cancer treatment are the ability to selectively target the adenoma and adenocarcinoma cells both in their location of origin and as they metastasize following initial treatment. Multilayer/Layer-by-Layer (LbL) nanocapsules have garnered vast interest as anticancer drug delivery systems due to their ability to be easily modified, their capacity to encapsulate a wide range of chemicals and proteins, and their improved pharmacokinetics. Multilayer nanocapsule formation requires the layering of opposing charged polyelectrolytic polymers over a removable core nanoparticle. Our goal is to have a programmable nanocapsules degrade only after receiving and validating specific breast cancer biomarkers. The overall objective is to fabricate a novel programmable LbL nanocapsule with a specific logical system that will enhance functions pertinent to drug delivery systems. Our central hypothesis is that LbL technology coupled with extracellular matrix (ECM) protein substrates will result in a logical enzyme triggered LbL nanocapsule drug delivery system. This platform represents a novel approach toward a logically regulated nano-encapsulated cancer therapy that can selectively follow and deliver chemotherapeutics to cancer cells. The rationale for this project is to overcome a crucial limitation of existing drug delivery systems where chemotherapeutic can be erroneously delivered to non-carcinogenic cells.
An IO block array in a radiation-hardened SOI SRAM-based FPGA
NASA Astrophysics Data System (ADS)
Yan, Zhao; Lihua, Wu; Xiaowei, Han; Yan, Li; Qianli, Zhang; Liang, Chen; Guoquan, Zhang; Jianzhong, Li; Bo, Yang; Jiantou, Gao; Jian, Wang; Ming, Li; Guizhai, Liu; Feng, Zhang; Xufeng, Guo; Kai, Zhao; Chen, Stanley L.; Fang, Yu; Zhongli, Liu
2012-01-01
We present an input/output block (IOB) array used in the radiation-hardened SRAM-based field-programmable gate array (FPGA) VS1000, which is designed and fabricated with a 0.5 μm partially depleted silicon-on-insulator (SOI) logic process at the CETC 58th Institute. Corresponding with the characteristics of the FPGA, each IOB includes a local routing pool and two IO cells composed of a signal path circuit, configurable input/output buffers and an ESD protection network. A boundary-scan path circuit can be used between the programmable buffers and the input/output circuit or as a transparent circuit when the IOB is applied in different modes. Programmable IO buffers can be used at TTL/CMOS standard levels. The local routing pool enhances the flexibility and routability of the connection between the IOB array and the core logic. Radiation-hardened designs, including A-type and H-type body-tied transistors and special D-type registers, improve the anti-radiation performance. The ESD protection network, which provides a high-impulse discharge path on a pad, prevents the breakdown of the core logic caused by the immense current. These design strategies facilitate the design of FPGAs with different capacities or architectures to form a series of FPGAs. The functionality and performance of the IOB array is proved after a functional test. The radiation test indicates that the proposed VS1000 chip with an IOB array has a total dose tolerance of 100 krad(Si), a dose survivability rate of 1.5 × 1011 rad(Si)/s, and a neutron fluence immunity of 1 × 1014 n/cm2.
Summary of Proton Test on the Quick Logic QL3025 at Indiana University
NASA Technical Reports Server (NTRS)
Katz, Richard
1998-01-01
This issue of the Programmable Logic Application Notes is a compilation of topics: (1) Proton irradiation tests were performed on the Quick Logic QL3025 at the Indian University Cyclotron facility. The devices, tests, and results are discussed; (2) The functional failure of EEPROM's in heavy ion environment is presented; (3) the Act 1 architecture is summarized; (4) Antifuse hardness and hardness testing is updated; the single even upset (SEU) response of hardwired flip-flops is also presented; (4) Total dose results of the ACT 2 and ACT 3 circuits is presented in a chart; (5) Recent sub-micron devices testing of total dose is presented in a chart along with brief discussion; and (6) a reference to the WWW site for more articles of interest.
Video image processor on the Spacelab 2 Solar Optical Universal Polarimeter /SL2 SOUP/
NASA Technical Reports Server (NTRS)
Lindgren, R. W.; Tarbell, T. D.
1981-01-01
The SOUP instrument is designed to obtain diffraction-limited digital images of the sun with high photometric accuracy. The Video Processor originated from the requirement to provide onboard real-time image processing, both to reduce the telemetry rate and to provide meaningful video displays of scientific data to the payload crew. This original concept has evolved into a versatile digital processing system with a multitude of other uses in the SOUP program. The central element in the Video Processor design is a 16-bit central processing unit based on 2900 family bipolar bit-slice devices. All arithmetic, logical and I/O operations are under control of microprograms, stored in programmable read-only memory and initiated by commands from the LSI-11. Several functions of the Video Processor are described, including interface to the High Rate Multiplexer downlink, cosmetic and scientific data processing, scan conversion for crew displays, focus and exposure testing, and use as ground support equipment.
The UTMOST - rebirth of the Molonglo Radio Telescope
NASA Astrophysics Data System (ADS)
Green, Anne J.; Flynn, Chris
2015-08-01
The Molongo Radio Telescope, a large cylindrical paraboloid interferometer located near Canberra in Australia, has been redeveloped with a digital receiver system and optic fibre transmission network leading to a hybrid signal processor incorporating a GPU supercomputer and programmable-logic chip based filterbanks. Data rates up to 22 Gbytes/sec will be processed in real-time. The new configuration is 10 times more efficient than the previous system with substantially increased sensitivity and bandwidth (centred on 843 MHz) and a field of view of about 8 square degrees. The mechanical infrastructure has been retained; hence the angular resolution remains at 43 arcsec. The key science goals of the new instrument include increasing the Fast Radio Burst discovery rate by an order of magnitude or more over our long term rate with the Parkes Telescope, pulsar timing and commensal imaging of diffuse radio sources. Novel methods of RFI excision have been demonstrated. The talk will present the elements of the new system and some recent science results.
Infrared Semiconductor Metamaterials
2016-09-01
Approved for public release. 13. SUPPLEMENTARY NOTES 14. ABSTRACT The central objective of this program is to create a new class of programmable ...this program is to create a new class of programmable infrared optic that can steer or focus beams and is reconfigurable at electronic time...element of a programmable infrared optic that can steer or focus beams and is reconfigurable at electronic time-scales. B. Major
NASA Astrophysics Data System (ADS)
Saldan, Yosyp R.; Pavlov, Sergii V.; Vovkotrub, Dina V.; Saldan, Yulia Y.; Vassilenko, Valentina B.; Mazur, Nadia I.; Nikolaichuk, Daria V.; Wójcik, Waldemar; Romaniuk, Ryszard; Suleimenov, Batyrbek; Bainazarov, Ulan
2017-08-01
Process of eye tomogram obtaining by means of optical coherent tomography is studied. Stages of idiopathic macula holes formation in the process of eye grounds diagnostics are considered. Main stages of retina pathology progression are determined: Fuzzy logic units for obtaining reliable conclusions regarding the result of diagnosis are developed. By the results of theoretical and practical research system and technique of retinal macular region of the eye state analysis is developed ; application of the system, based on fuzzy logic device, improves the efficiency of eye retina complex.
NASA Technical Reports Server (NTRS)
2007-01-01
Topics covered include: Miniature Intelligent Sensor Module; "Smart" Sensor Module; Portable Apparatus for Electrochemical Sensing of Ethylene; Increasing Linear Dynamic Range of a CMOS Image Sensor; Flight Qualified Micro Sun Sensor; Norbornene-Based Polymer Electrolytes for Lithium Cells; Making Single-Source Precursors of Ternary Semiconductors; Water-Free Proton-Conducting Membranes for Fuel Cells; Mo/Ti Diffusion Bonding for Making Thermoelectric Devices; Photodetectors on Coronagraph Mask for Pointing Control; High-Energy-Density, Low-Temperature Li/CFx Primary Cells; G4-FETs as Universal and Programmable Logic Gates; Fabrication of Buried Nanochannels From Nanowire Patterns; Diamond Smoothing Tools; Infrared Imaging System for Studying Brain Function; Rarefying Spectra of Whispering-Gallery-Mode Resonators; Large-Area Permanent-Magnet ECR Plasma Source; Slot-Antenna/Permanent-Magnet Device for Generating Plasma; Fiber-Optic Strain Gauge With High Resolution And Update Rate; Broadband Achromatic Telecentric Lens; Temperature-Corrected Model of Turbulence in Hot Jet Flows; Enhanced Elliptic Grid Generation; Automated Knowledge Discovery From Simulators; Electro-Optical Modulator Bias Control Using Bipolar Pulses; Generative Representations for Automated Design of Robots; Mars-Approach Navigation Using In Situ Orbiters; Efficient Optimization of Low-Thrust Spacecraft Trajectories; Cylindrical Asymmetrical Capacitors for Use in Outer Space; Protecting Against Faults in JPL Spacecraft; Algorithm Optimally Allocates Actuation of a Spacecraft; and Radar Interferometer for Topographic Mapping of Glaciers and Ice Sheets.
A programmable CCD driver circuit for multiphase CCD operation
NASA Technical Reports Server (NTRS)
Ewin, Audrey J.; Reed, Kenneth V.
1989-01-01
A programmable CCD (charge-coupled device) driver circuit was designed to drive CCDs in multiphased modes. The purpose of the drive electronics is to operate developmental CCD imaging arrays for NASA's tiltable moderate resolution imaging spectrometer (MODIS-T). Five objectives for the driver were considered during its design: (1) the circuit drives CCD electrode voltages between 0 V and +30 V to produce reasonable potential wells, (2) the driving sequence is started with one input signal, (3) the driving sequence is started with one input signal, (4) the circuit allows programming of frame sequences required by arrays of any size, (5) it produces interfacing signals for the CCD and the DTF (detector test facility). Simulation of the driver verified its function with the master clock running up to 10 MHz. This suggests a maximum rate of 400,000 pixels/s. Timing and packaging parameters were verified. The design uses 54 TTL (transistor-transistor logic) chips. Two versions of hardware were fabricated: wirewrap and printed circuit board. Both were verified functionally with a logic analyzer.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Palomar, J.; Wyman, R.
This document provides recommendations to guide reviewers in the application of Programmable Logic Controllers (PLCS) to the control, monitoring and protection of nuclear reactors. The first topics addressed are system-level design issues, specifically including safety. The document then discusses concerns about the PLC manufacturing organization and the protection system engineering organization. Supplementing this document are two appendices. Appendix A summarizes PLC characteristics. Specifically addressed are those characteristics that make the PLC more suitable for emergency shutdown systems than other electrical/electronic-based systems, as well as characteristics that improve reliability of a system. Also covered are PLC characteristics that may create anmore » unsafe operating environment. Appendix B provides an overview of the use of programmable logic controllers in emergency shutdown systems. The intent is to familiarize the reader with the design, development, test, and maintenance phases of applying a PLC to an ESD system. Each phase is described in detail and information pertinent to the application of a PLC is pointed out.« less
NASA Astrophysics Data System (ADS)
Wang, Tai-Min; Chien, Wei-Yu; Hsu, Chia-Ling; Lin, Chrong Jung; King, Ya-Chin
2018-04-01
In this paper, we present a new differential p-channel multiple-time programmable (MTP) memory cell that is fully compatible with advanced 16 nm CMOS fin field-effect transistors (FinFET) logic processes. This differential MTP cell stores complementary data in floating gates coupled by a slot contact structure, which make different read currents possible on a single cell. In nanoscale CMOS FinFET logic processes, the gate dielectric layer becomes too thin to retain charges inside floating gates for nonvolatile data storage. By using a differential architecture, the sensing window of the cell can be extended and maintained by an advanced blanket boost scheme. The charge retention problem in floating gate cells can be improved by periodic restoring lost charges when significant read window narrowing occurs. In addition to high programming efficiency, this p-channel MTP cells also exhibit good cycling endurance as well as disturbance immunity. The blanket boost scheme can remedy the charge loss problem under thin gate dielectrics.
Détermination assistée par ordinateur de la structure des molécules organiques
NASA Astrophysics Data System (ADS)
Nuzillard, J.-M.
1998-02-01
Nuclear Magnetic Resonance spectroscopy offers the unique possibility of accessing proximity relationships between atoms by means of chemical shift correlation experiments. Structure determination of small molecules has become thus much simpler. Computer programs can use directly correlation information for structure analysis. The use and operation mechanism of such a program, LSD (Logic for Structure Determination) are presented. The example compound is gibberellic acid, a natural product. La spectroscopie de Résonance Magnétique Nucléaire offre un moyen unique de déterminer des relations de proximité entre atomes par le biais des expériences de corrélation. L'analyse structurale de petites molécules organiques s'en trouve extrêmement facilitée. Des programmes informatiques peuvent utiliser directement les informations de corrélation pour déduire des structures. Le fonctionnement et l'usage d'un tel programme, LSD (Logic for Structure Determination), sont détaillés sur un exemple, l'acide gibberellique.
Demonstration of an optical directed half-subtracter using integrated silicon photonic circuits.
Liu, Zilong; Zhao, Yongpeng; Xiao, Huifu; Deng, Lin; Meng, Yinghao; Guo, Xiaonan; Liu, Guipeng; Tian, Yonghui; Yang, Jianhong
2018-04-01
An integrated silicon photonic circuit consisting of two silicon microring resonators (MRRs) is proposed and experimentally demonstrated for the purpose of half-subtraction operation. The thermo-optic modulation scheme is employed to modulate the MRRs due to its relatively simple fabrication process. The high and low levels of the electrical pulse signal are utilized to define logic 1 and 0 in the electrical domain, respectively, and the high and low levels of the optical power represent logic 1 and 0 in the optical domain, respectively. Two electrical pulse sequences regarded as the operands are applied to the corresponding micro-heaters fabricated on the top of the MRRs to achieve their dynamic modulations. The final operation results of bit-wise borrow and difference are obtained at their corresponding output ports in the form of light. At last, the subtraction operation of two bits with the operation speed of 10 kbps is demonstrated successfully.
Large conditional single-photon cross-phase modulation
Hosseini, Mahdi; Duan, Yiheng; Vuletić, Vladan
2016-01-01
Deterministic optical quantum logic requires a nonlinear quantum process that alters the phase of a quantum optical state by π through interaction with only one photon. Here, we demonstrate a large conditional cross-phase modulation between a signal field, stored inside an atomic quantum memory, and a control photon that traverses a high-finesse optical cavity containing the atomic memory. This approach avoids fundamental limitations associated with multimode effects for traveling optical photons. We measure a conditional cross-phase shift of π/6 (and up to π/3 by postselection on photons that remain in the system longer than average) between the retrieved signal and control photons, and confirm deterministic entanglement between the signal and control modes by extracting a positive concurrence. By upgrading to a state-of-the-art cavity, our system can reach a coherent phase shift of π at low loss, enabling deterministic and universal photonic quantum logic. PMID:27519798
NONLINEAR AND FIBER OPTICS: Propagation of femtosecond solitons in a fiber-optic loop
NASA Astrophysics Data System (ADS)
Zakhidov, É. A.; Mirtadzhiev, F. M.; Khaĭdarov, D. V.; Kuznetsov, A. V.; Okhotnikov, A. G.
1991-03-01
An investigation was made of the propagation of fundamental femtosecond soliton pulses in a fiber-optic loop, which is an element with promising applications in logic operations. It is shown that such a loop can filter off the nonsoliton component effectively. The conditions for high-contrast self-switching of fundamental solitons in a fiber-optic loop are identified.
Mertaniemi, Henrikki; Forchheimer, Robert; Ikkala, Olli; Ras, Robin H A
2012-11-08
When water droplets impact each other while traveling on a superhydrophobic surface, we demonstrate that they are able to rebound like billiard balls. We present elementary Boolean logic operations and a flip-flop memory based on these rebounding water droplet collisions. Furthermore, bouncing or coalescence can be easily controlled by process parameters. Thus by the controlled coalescence of reactive droplets, here using the quenching of fluorescent metal nanoclusters as a model reaction, we also demonstrate an elementary operation for programmable chemistry. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Light-driven OR and XOR programmable chemical logic gates.
Szaciłowski, Konrad; Macyk, Wojciech; Stochel, Grazyna
2006-04-12
Photoelectrodes made of nanocrystalline titanium dioxide modified with various pentacyanoferrates exhibit unique photoelectrochemical properties; photocurrent direction can be switched from anodic to cathodic and vice versa upon changes in photoelectrode potential and incident light wavelength (PhotoElectrochemical Photocurrent Switching, PEPS effect). At certain potentials, anodic photocurrent generated upon UV irradiation has the same intensity as the cathodic photocurrent generated upon visible irradiation. Under these conditions, simultaneous irradiation with UV and visible light results in compensation of anodic and cathodic photocurrents, and zero net photocurrent is observed. This process can be used for construction of unique light-driven chemical logic gates.
NASA Astrophysics Data System (ADS)
Popa, L.; Popa, V.
2017-08-01
The article is focused on modeling an automated industrial robotic arm operated electro-pneumatically and to simulate the robotic arm operation. It is used the graphic language FBD (Function Block Diagram) to program the robotic arm on Zelio Logic automation. The innovative modeling and simulation procedures are considered specific problems regarding the development of a new type of technical products in the field of robotics. Thus, were identified new applications of a Programmable Logic Controller (PLC) as a specialized computer performing control functions with a variety of high levels of complexit.
Wang, Mingwu; Lu, Ake Tzu-Hui; Varma, Rohit; Schuman, Joel S; Greenfield, David S; Huang, David
2014-03-01
To improve the diagnosis of glaucoma by combining time-domain optical coherence tomography (TD-OCT) measurements of the optic disc, circumpapillary retinal nerve fiber layer (RNFL), and macular retinal thickness. Ninety-six age-matched normal and 96 perimetric glaucoma participants were included in this observational, cross-sectional study. Or-logic, support vector machine, relevance vector machine, and linear discrimination function were used to analyze the performances of combined TD-OCT diagnostic variables. The area under the receiver-operating curve (AROC) was used to evaluate the diagnostic accuracy and to compare the diagnostic performance of single and combined anatomic variables. The best RNFL thickness variables were the inferior (AROC=0.900), overall (AROC=0.892), and superior quadrants (AROC=0.850). The best optic disc variables were horizontal integrated rim width (AROC=0.909), vertical integrated rim area (AROC=0.908), and cup/disc vertical ratio (AROC=0.890). All macular retinal thickness variables had AROCs of 0.829 or less. Combining the top 3 RNFL and optic disc variables in optimizing glaucoma diagnosis, support vector machine had the highest AROC, 0.954, followed by or-logic (AROC=0.946), linear discrimination function (AROC=0.946), and relevance vector machine (AROC=0.943). All combination diagnostic variables had significantly larger AROCs than any single diagnostic variable. There are no significant differences among the combination diagnostic indices. With TD-OCT, RNFL and optic disc variables had better diagnostic accuracy than macular retinal variables. Combining top RNFL and optic disc variables significantly improved diagnostic performance. Clinically, or-logic classification was the most practical analytical tool with sufficient accuracy to diagnose early glaucoma.
High-speed all-optical logic inverter based on stimulated Raman scattering in silicon nanocrystal.
Sen, Mrinal; Das, Mukul K
2015-11-01
In this paper, we propose a new device architecture for an all-optical logic inverter (NOT gate), which is cascadable with a similar device. The inverter is based on stimulated Raman scattering in silicon nanocrystal waveguides, which are embedded in a silicon photonic crystal structure. The Raman response function of silicon nanocrystal is evaluated to explore the transfer characteristic of the inverter. A maximum product criterion for the noise margin is taken to analyze the cascadability of the inverter. The time domain response of the inverter, which explores successful inversion operation at 100 Gb/s, is analyzed. Propagation delay of the inverter is on the order of 5 ps, which is less than the delay in most of the electronic logic families as of today. Overall dimension of the device is around 755 μm ×15 μm, which ensures integration compatibility with the matured silicon industry.
NASA Astrophysics Data System (ADS)
Nugamesh Mutter, Kussay; Mat Jafri, Mohd Zubir; Abdul Aziz, Azlan
2010-05-01
Many researches are conducted to improve Hopfield Neural Network (HNN) performance especially for speed and memory capacity in different approaches. However, there is still a significant scope of developing HNN using Optical Logic Gates. We propose here a new model of HNN based on all-optical XNOR logic gates for real time color image recognition. Firstly, we improved HNN toward optimum learning and converging operations. We considered each unipolar image as a set of small blocks of 3-pixels as vectors for HNN. This enables to save large number of images in the net with best reaching into global minima, and because there are only eight fixed states of weights so that only single iteration performed to construct a vector with stable state at minimum energy. HNN is useless in dealing with data not in bipolar representation. Therefore, HNN failed to work with color images. In RGB bands each represents different values of brightness, for d-bit RGB image it is simply consists of d-layers of unipolar. Each layer is as a single unipolar image for HNN. In addition, the weight matrices with stability of unity at the diagonal perform clear converging in comparison with no self-connecting architecture. Synchronously, each matrix-matrix multiplication operation would run optically in the second part, since we propose an array of all-optical XOR gates, which uses Mach-Zehnder Interferometer (MZI) for neurons setup and a controlling system to distribute timely signals with inverting to achieve XNOR function. The primary operation and simulation of the proposal HNN is demonstrated.
Zhang, Li; Wang, Zhong-Xia; Liang, Ru-Ping; Qiu, Jian-Ding
2013-07-16
Utilizing the principles of metal-ion-mediated base pairs (C-Ag-C and T-Hg-T), the pH-sensitive conformational transition of C-rich DNA strand, and the ligand-exchange process triggered by DL-dithiothreitol (DTT), a system of colorimetric logic gates (YES, AND, INHIBIT, and XOR) can be rationally constructed based on the aggregation of the DNA-modified Au NPs. The proposed logic operation system is simple, which consists of only T-/C-rich DNA-modified Au NPs, and it is unnecessary to exquisitely design and alter the DNA sequence for different multiple molecular logic operations. The nonnatural base pairing combined with unique optical properties of Au NPs promises great potential in multiplexed ion sensing, molecular-scale computers, and other computational logic devices.
Radio Frequency Based Programmable Logic Controller Anomaly Detection
2013-09-01
include wireless radios, IEEE 802.15 Blue- tooth devices, cellular phones, and IEEE 802.11 WiFi networking devices. While wireless communication...MacKenzie, H. Shamoon Malware and SCADA Security What are the Im- pacts? . Technical Report, Tofino Security, Sep 2012. 61. Mateti,P. Hacking Techniques
Advanced Geometric Optics on a Programmable Pocket Calculator.
ERIC Educational Resources Information Center
Nussbaum, Allen
1979-01-01
Presents a ray-tracing procedure based on some ideas of Herzberger and the matrix approach to geometrical optics. This method, which can be implemented on a programmable pocket calculator, applies to any conic surface, including paraboloids, spheres, and planes. (Author/GA)
Programmable DNA switches and their applications.
Harroun, Scott G; Prévost-Tremblay, Carl; Lauzon, Dominic; Desrosiers, Arnaud; Wang, Xiaomeng; Pedro, Liliana; Vallée-Bélisle, Alexis
2018-03-08
DNA switches are ideally suited for numerous nanotechnological applications, and increasing efforts are being directed toward their engineering. In this review, we discuss how to engineer these switches starting from the selection of a specific DNA-based recognition element, to its adaptation and optimisation into a switch, with applications ranging from sensing to drug delivery, smart materials, molecular transporters, logic gates and others. We provide many examples showcasing their high programmability and recent advances towards their real life applications. We conclude with a short perspective on this exciting emerging field.
ANOPP programmer's reference manual for the executive System. [aircraft noise prediction program
NASA Technical Reports Server (NTRS)
Gillian, R. E.; Brown, C. G.; Bartlett, R. W.; Baucom, P. H.
1977-01-01
Documentation for the Aircraft Noise Prediction Program as of release level 01/00/00 is presented in a manual designed for programmers having a need for understanding the internal design and logical concepts of the executive system software. Emphasis is placed on providing sufficient information to modify the system for enhancements or error correction. The ANOPP executive system includes software related to operating system interface, executive control, and data base management for the Aircraft Noise Prediction Program. It is written in Fortran IV for use on CDC Cyber series of computers.
Recognizing and engineering digital-like logic gates and switches in gene regulatory networks.
Bradley, Robert W; Buck, Martin; Wang, Baojun
2016-10-01
A central aim of synthetic biology is to build organisms that can perform useful activities in response to specified conditions. The digital computing paradigm which has proved so successful in electrical engineering is being mapped to synthetic biological systems to allow them to make such decisions. However, stochastic molecular processes have graded input-output functions, thus, bioengineers must select those with desirable characteristics and refine their transfer functions to build logic gates with digital-like switching behaviour. Recent efforts in genome mining and the development of programmable RNA-based switches, especially CRISPRi, have greatly increased the number of parts available to synthetic biologists. Improvements to the digital characteristics of these parts are required to enable robust predictable design of deeply layered logic circuits. Copyright © 2016 The Author(s). Published by Elsevier Ltd.. All rights reserved.
Nanoeletromechanical switch and logic circuits formed therefrom
Nordquist, Christopher D [Albuquerque, NM; Czaplewski, David A [Albuquerque, NM
2010-05-18
A nanoelectromechanical (NEM) switch is formed on a substrate with a source electrode containing a suspended electrically-conductive beam which is anchored to the substrate at each end. This beam, which can be formed of ruthenium, bows laterally in response to a voltage applied between a pair of gate electrodes and the source electrode to form an electrical connection between the source electrode and a drain electrode located near a midpoint of the beam. Another pair of gate electrodes and another drain electrode can be located on an opposite side of the beam to allow for switching in an opposite direction. The NEM switch can be used to form digital logic circuits including NAND gates, NOR gates, programmable logic gates, and SRAM and DRAM memory cells which can be used in place of conventional CMOS circuits, or in combination therewith.
Cybernetic systems based on inductive logic
NASA Astrophysics Data System (ADS)
Fry, Robert L.
2001-05-01
Recent work in the area of inductive logic suggests that cybernetics might be quantified and reduced to engineering practice. If so, then there are considerable implications for engineering, science, and other fields. This paper attempts to capture the essential ideas of cybernetics cast in the light of inductive logic. The described inductive logic extends conventional logic by adding a conjugate logical domain of questions to the logical domain of assertions intrinsic to Boolean Algebra with which most are familiar. This was first posited and developed by Richard Cox. Interestingly enough, these two logical domains, one of questions and the other of assertions, only exist relative to one another with each possessing natural measures of entropy and probability, respectively. Examples are given that highlight the utility of cybernetic approaches to neuroscience, algorithm design, system engineering, and the design and understanding of defensive and offensive systems. For example, the application of cybernetic approaches to defense systems suggests that these systems possess a wavefunction which like quantum mechanics, collapses when we ``look'' through the eyes of the system sensors such as radars and optical sensors. .
Transistor Laser Optical NOR Gate for High Speed Optical Logic Processors
2017-03-20
proposes an optical bistable latch can be built with two universal photonic NOR gate circuits, which are implemented by the three-port tunneling ... Tunneling Junction Transistor Laser (TJ-TL); Optical NOR Gate. Introduction To fulfill the future national security and intelligence needs in this...two-terminal diode lasers. Three-Port Transistor Laser – an Integration of Quantum-Wells into Heterojunction Bipolar Transistor Different than
Transformations of software design and code may lead to reduced errors
NASA Technical Reports Server (NTRS)
Connelly, E. M.
1983-01-01
The capability of programmers and non-programmers to specify problem solutions by developing example-solutions and also for the programmers by writing computer programs was investigated; each method of specification was accomplished at various levels of problem complexity. The level of difficulty of each problem was reflected by the number of steps needed by the user to develop a solution. Machine processing of the user inputs permitted inferences to be developed about the algorithms required to solve a particular problem. The interactive feedback of processing results led users to a more precise definition of the desired solution. Two participant groups (programmers and bookkeepers/accountants) working with three levels of problem complexity and three levels of processor complexity were used. The experimental task employed required specification of a logic for solution of a Navy task force problem.
Surface-confined assemblies and polymers for molecular logic.
de Ruiter, Graham; van der Boom, Milko E
2011-08-16
Stimuli responsive materials are capable of mimicking the operation characteristics of logic gates such as AND, OR, NOR, and even flip-flops. Since the development of molecular sensors and the introduction of the first AND gate in solution by de Silva in 1993, Molecular (Boolean) Logic and Computing (MBLC) has become increasingly popular. In this Account, we present recent research activities that focus on MBLC with electrochromic polymers and metal polypyridyl complexes on a solid support. Metal polypyridyl complexes act as useful sensors to a variety of analytes in solution (i.e., H(2)O, Fe(2+/3+), Cr(6+), NO(+)) and in the gas phase (NO(x) in air). This information transfer, whether the analyte is present, is based on the reversible redox chemistry of the metal complexes, which are stable up to 200 °C in air. The concurrent changes in the optical properties are nondestructive and fast. In such a setup, the input is directly related to the output and, therefore, can be represented by one-input logic gates. These input-output relationships are extendable for mimicking the diverse functions of essential molecular logic gates and circuits within a set of Boolean algebraic operations. Such a molecular approach towards Boolean logic has yielded a series of proof-of-concept devices: logic gates, multiplexers, half-adders, and flip-flop logic circuits. MBLC is a versatile and, potentially, a parallel approach to silicon circuits: assemblies of these molecular gates can perform a wide variety of logic tasks through reconfiguration of their inputs. Although these developments do not require a semiconductor blueprint, similar guidelines such as signal propagation, gate-to-gate communication, propagation delay, and combinatorial and sequential logic will play a critical role in allowing this field to mature. For instance, gate-to-gate communication by chemical wiring of the gates with metal ions as electron carriers results in the integration of stand-alone systems: the output of one gate is used as the input for another gate. Using the same setup, we were able to display both combinatorial and sequential logic. We have demonstrated MBLC by coupling electrochemical inputs with optical readout, which resulted in various logic architectures built on a redox-active, functionalized surface. Electrochemically operated sequential logic systems such as flip-flops, multivalued logic, and multistate memory could enhance computational power without increasing spatial requirements. Applying multivalued digits in data storage could exponentially increase memory capacity. Furthermore, we evaluate the pros and cons of MBLC and identify targets for future research in this Account. © 2011 American Chemical Society
NASA Technical Reports Server (NTRS)
Sinacori, J. B.
1980-01-01
A conceptual design of a visual system for a rotorcraft flight simulator is presented. Also, drive logic elements for a coupled motion base for such a simulator are given. The design is the result of an assessment of many potential arrangements of electro-optical elements and is a concept considered feasible for the application. The motion drive elements represent an example logic for a coupled motion base and is essentially an appeal to the designers of such logic to combine their washout and braking functions.
NASA Astrophysics Data System (ADS)
Tajaldini, Mehdi; Jafri, Mohd Zubir Mat
2015-04-01
The theory of Nonlinear Modal Propagation Analysis Method (NMPA) have shown significant features of nonlinear multimode interference (MMI) coupler with compact dimension and when launched near the threshold of nonlinearity. Moreover, NMPA have the potential to allow studying the nonlinear MMI based the modal interference to explorer the phenomenon that what happen due to the natural of multimode region. Proposal of all-optical switch based NMPA has approved its capability to achieving the all-optical gates. All-optical gates have attracted increasing attention due to their practical utility in all-optical signal processing networks and systems. Nonlinear multimode interference devices could apply as universal all-optical gates due to significant features that NMPA introduce them. In this Paper, we present a novel Ultra-compact MMI coupler based on NMPA method in low intensity compared to last reports either as a novel design method and potential application for optical NAND, NOR as universal gates on single structure for Boolean logic signal processing devices and optimize their application via studding the contrast ratio between ON and OFF as a function of output width. We have applied NMPA for several applications so that the miniaturization in low nonlinear intensities is their main purpose.
NASA Astrophysics Data System (ADS)
Yang, Bin; Zhang, Xiao-Bing; Kang, Li-Ping; Huang, Zhi-Mei; Shen, Guo-Li; Yu, Ru-Qin; Tan, Weihong
2014-07-01
DNA strand displacement cascades have been engineered to construct various fascinating DNA circuits. However, biological applications are limited by the insufficient cellular internalization of naked DNA structures, as well as the separated multicomponent feature. In this work, these problems are addressed by the development of a novel DNA nanodevice, termed intelligent layered nanoflare, which integrates DNA computing at the nanoscale, via the self-assembly of DNA flares on a single gold nanoparticle. As a ``lab-on-a-nanoparticle'', the intelligent layered nanoflare could be engineered to perform a variety of Boolean logic gate operations, including three basic logic gates, one three-input AND gate, and two complex logic operations, in a digital non-leaky way. In addition, the layered nanoflare can serve as a programmable strategy to sequentially tune the size of nanoparticles, as well as a new fingerprint spectrum technique for intelligent multiplex biosensing. More importantly, the nanoflare developed here can also act as a single entity for intracellular DNA logic gate delivery, without the need of commercial transfection agents or other auxiliary carriers. By incorporating DNA circuits on nanoparticles, the presented layered nanoflare will broaden the applications of DNA circuits in biological systems, and facilitate the development of DNA nanotechnology.DNA strand displacement cascades have been engineered to construct various fascinating DNA circuits. However, biological applications are limited by the insufficient cellular internalization of naked DNA structures, as well as the separated multicomponent feature. In this work, these problems are addressed by the development of a novel DNA nanodevice, termed intelligent layered nanoflare, which integrates DNA computing at the nanoscale, via the self-assembly of DNA flares on a single gold nanoparticle. As a ``lab-on-a-nanoparticle'', the intelligent layered nanoflare could be engineered to perform a variety of Boolean logic gate operations, including three basic logic gates, one three-input AND gate, and two complex logic operations, in a digital non-leaky way. In addition, the layered nanoflare can serve as a programmable strategy to sequentially tune the size of nanoparticles, as well as a new fingerprint spectrum technique for intelligent multiplex biosensing. More importantly, the nanoflare developed here can also act as a single entity for intracellular DNA logic gate delivery, without the need of commercial transfection agents or other auxiliary carriers. By incorporating DNA circuits on nanoparticles, the presented layered nanoflare will broaden the applications of DNA circuits in biological systems, and facilitate the development of DNA nanotechnology. Electronic supplementary information (ESI) available: Additional figures (Table S1, Fig. S1-S5). See DOI: 10.1039/c4nr01676a
Research on NC motion controller based on SOPC technology
NASA Astrophysics Data System (ADS)
Jiang, Tingbiao; Meng, Biao
2006-11-01
With the rapid development of the digitization and informationization, the application of numerical control technology in the manufacturing industry becomes more and more important. However, the conventional numerical control system usually has some shortcomings such as the poor in system openness, character of real-time, cutability and reconfiguration. In order to solve these problems, this paper investigates the development prospect and advantage of the application in numerical control area with system-on-a-Programmable-Chip (SOPC) technology, and puts forward to a research program approach to the NC controller based on SOPC technology. Utilizing the characteristic of SOPC technology, we integrate high density logic device FPGA, memory SRAM, and embedded processor ARM into a single programmable logic device. We also combine the 32-bit RISC processor with high computing capability of the complicated algorithm with the FPGA device with strong motivable reconfiguration logic control ability. With these steps, we can greatly resolve the defect described in above existing numerical control systems. For the concrete implementation method, we use FPGA chip embedded with ARM hard nuclear processor to construct the control core of the motion controller. We also design the peripheral circuit of the controller according to the requirements of actual control functions, transplant real-time operating system into ARM, design the driver of the peripheral assisted chip, develop the application program to control and configuration of FPGA, design IP core of logic algorithm for various NC motion control to configured it into FPGA. The whole control system uses the concept of modular and structured design to develop hardware and software system. Thus the NC motion controller with the advantage of easily tailoring, highly opening, reconfigurable, and expandable can be implemented.
Heuristics for Scientific Experimentation: A Developmental Study.
ERIC Educational Resources Information Center
Klahr, David; And Others
1993-01-01
Studied developmental differences in the search constraint heuristics used in scientific reasoning using 12 undergraduates, 20 community college students, 17 fifth to seventh graders (grade 6), and 15 third graders taught to use a programmable robot. Adults use domain-general skills that go beyond the logic of confirmation and disconfirmation.…
2010-03-01
allows the programmer to use the English language in an expressive manor while still maintaining the logical structure of a programming language ( Pressman ...and Choudhury Tanzeem. 2000. Face Recognition for Smart Environments, IEEE Computer, pp. 50–55. Pressman , Roger. 2010. Software Engineering A
[The improved design of table operating box of digital subtraction angiography device].
Qi, Xianying; Zhang, Minghai; Han, Fengtan; Tang, Feng; He, Lemin
2009-12-01
In this paper are analyzed the disadvantages of CGO-3000 digital subtraction angiography table Operating Box. The authors put forward a communication control scheme between single-chip microcomputer(SCM) and programmable logic controller(PLC). The details of hardware and software of communication are given.
Electromechanical Devices and Controllers. Electronics Module 10. Instructor's Guide.
ERIC Educational Resources Information Center
Carter, Ed
This module is the tenth of 10 modules in the competency-based electronics series. Introductory materials include a listing of competencies addressed in the module, a parts/equipment list, and a cross-reference table of instructional materials. Six instructional units cover: electromechanical control devices; programmable logic controllers (PLC);…
The Programmable Calculator in the Classroom.
ERIC Educational Resources Information Center
Stolarz, Theodore J.
The uses of programable calculators in the mathematics classroom are presented. A discussion of the "microelectronics revolution" that has brought programable calculators into our society is also included. Pointed out is that the logical or mental processes used to program the programable calculator are identical to those used to program…
Towards Quantifying Programmable Logic Controller Resilience Against Intentional Exploits
2012-03-22
may improve the SCADA system’s resilience against DoS and man-in-the-middle ( MITM ) attacks. DoS attacks may be mitigated by using the redundant...paths available on the network links. MITM attacks may be mitigated by the data integrity checks associated with the middleware. Figure 4 illustrates
Three In-Course Assessment Reforms to Improve Higher Education Learning Outcomes
ERIC Educational Resources Information Center
Sadler, D. Royce
2016-01-01
A current international concern is that, for too large a proportion of graduates, their higher order cognitive and practical capabilities are below acceptable levels. The constituent courses of academic programmes are the most logical sites for developing these capabilities. Contributing to patchy attainment are deficiencies in three particular…
Ultraviolet acousto-optic programmable dispersive filter laser pulse shaping in KDP.
Coudreau, Sebastien; Kaplan, Daniel; Tournois, Pierre
2006-06-15
An acousto-optic programmable dispersive filter pulse shaper has been designed using KDP material for operation in the 200-500 nm wavelength range. With an acousto-optic interaction length of 72 mm, a spectral resolution of 0.15 nm has been measured to be consistent with theoretical predictions. Theory and experiments indicate that diffraction efficiencies up to 50% are expected in practical experimental conditions.
NASA Astrophysics Data System (ADS)
Marmon, Jason; Rai, Satish; Wang, Kai; Zhou, Weilie; Zhang, Yong
The pathway for CMOS technology beyond the 5-nm technology node remains unclear for both physical and technological reasons. A new transistor paradigm is required. A LET (Marmon et. al., Front. Phys. 2016, 4, No. 8) offers electronic-optical hybridization at the component level, and is capable of continuing Moore's law to the quantum scale. A LET overcomes a FET's fabrication complexity, e.g., physical gate and doping, by employing optical gating and photoconductivity, while multiple independent, optical gates readily realize unique functionalities. We report LET device characteristics and novel digital and analog applications, such as optical logic gates and optical amplification. Prototype CdSe-nanowire-based LETs, incorporating an M-S-M structure, show output and transfer characteristics resembling advanced FETs, e.g., on/off ratios up to 106 with a source-drain voltage of 1.43V, gate-power of 260nW, and a subthreshold swing of 0.3nW/decade (excluding losses). A LET has potential for high-switching (THz) speeds and extremely low-switching energies (aJ) in the ballistic transport region. Our work offers new electronic-optical integration strategies for high speed and low energy computing approaches, which could potentially be extended to other materials and devices.
Jefferds, Maria Elena D; Flores-Ayala, Rafael
2015-12-01
Lack of monitoring capacity is a key barrier for nutrition interventions and limits programme management, decision making and programme effectiveness in many low-income and middle-income countries. A 2011 global assessment reported lack of monitoring capacity was the top barrier for home fortification interventions, such as micronutrient powders or lipid-based nutrient supplements. A Manual for Developing and Implementing Monitoring Systems for Home Fortification Interventions was recently disseminated. It is comprehensive and describes monitoring concepts and frameworks and includes monitoring tools and worksheets. The monitoring manual describes the steps of developing and implementing a monitoring system for home fortification interventions, including identifying and engaging stakeholders; developing a programme description including logic model and logical framework; refining the purpose of the monitoring system, identifying users and their monitoring needs; describing the design of the monitoring system; developing indicators; describing the core components of a comprehensive monitoring plan; and considering factors related to stage of programme development, sustainability and scale up. A fictional home fortification example is used throughout the monitoring manual to illustrate these steps. The monitoring manual is a useful tool to support the development and implementation of home fortification intervention monitoring systems. In the context of systematic capacity gaps to design, implement and monitor nutrition interventions in many low-income and middle-income countries, the dissemination of new tools, such as monitoring manuals may have limited impact without additional attention to strengthening other individual, organisational and systems levels capacities. Published 2014. This article is a U.S. Government work and is in the public domain in the USA.
Ge, Lei; Wang, Wenxiao; Sun, Ximei; Hou, Ting; Li, Feng
2016-10-04
Herein, a novel universal and label-free homogeneous electrochemical platform is demonstrated, on which a complete set of DNA-based two-input Boolean logic gates (OR, NAND, AND, NOR, INHIBIT, IMPLICATION, XOR, and XNOR) is constructed by simply and rationally deploying the designed DNA polymerization/nicking machines without complicated sequence modulation. Single-stranded DNA is employed as the proof-of-concept target/input to initiate or prevent the DNA polymerization/nicking cyclic reactions on these DNA machines to synthesize numerous intact G-quadruplex sequences or binary G-quadruplex subunits as the output. The generated output strands then self-assemble into G-quadruplexes that render remarkable decrease to the diffusion current response of methylene blue and, thus, provide the amplified homogeneous electrochemical readout signal not only for the logic gate operations but also for the ultrasensitive detection of the target/input. This system represents the first example of homogeneous electrochemical logic operation. Importantly, the proposed homogeneous electrochemical logic gates possess the input/output homogeneity and share a constant output threshold value. Moreover, the modular design of DNA polymerization/nicking machines enables the adaptation of these homogeneous electrochemical logic gates to various input and output sequences. The results of this study demonstrate the versatility and universality of the label-free homogeneous electrochemical platform in the design of biomolecular logic gates and provide a potential platform for the further development of large-scale DNA-based biocomputing circuits and advanced biosensors for multiple molecular targets.
Megahertz-resolution programmable microwave shaper.
Li, Jilong; Dai, Yitang; Yin, Feifei; Li, Wei; Li, Ming; Chen, Hongwei; Xu, Kun
2018-04-15
A novel microwave shaper is proposed and demonstrated, of which the microwave spectral transfer function could be fully programmable with high resolution. We achieve this by bandwidth-compressed mapping a programmable optical wave-shaper, which has a lower frequency resolution of tens of gigahertz, to a microwave one with resolution of tens of megahertz. This is based on a novel technology of "bandwidth scaling," which employs bandwidth-stretched electronic-to-optical conversion and bandwidth-compressed optical-to-electronic conversion. We demonstrate the high resolution and full reconfigurability experimentally. Furthermore, we show the group delay variation could be greatly enlarged after mapping; this is then verified by the experiment with an enlargement of 194 times. The resolution improvement and group delay magnification significantly distinguish our proposal from previous optics-to-microwave spectrum mapping.
NASA Technical Reports Server (NTRS)
Metcalfe, A. G.; Bodenheimer, R. E.
1976-01-01
A parallel algorithm for counting the number of logic-l elements in a binary array or image developed during preliminary investigation of the Tse concept is described. The counting algorithm is implemented using a basic combinational structure. Modifications which improve the efficiency of the basic structure are also presented. A programmable Tse computer structure is proposed, along with a hardware control unit, Tse instruction set, and software program for execution of the counting algorithm. Finally, a comparison is made between the different structures in terms of their more important characteristics.
Sequence invariant state machines
NASA Technical Reports Server (NTRS)
Whitaker, S.; Manjunath, S.
1990-01-01
A synthesis method and new VLSI architecture are introduced to realize sequential circuits that have the ability to implement any state machine having N states and m inputs, regardless of the actual sequence specified in the flow table. A design method is proposed that utilizes BTS logic to implement regular and dense circuits. A given state sequence can be programmed with power supply connections or dynamically reallocated if stored in a register. Arbitrary flow table sequences can be modified or programmed to dynamically alter the function of the machine. This allows VLSI controllers to be designed with the programmability of a general purpose processor but with the compact size and performance of dedicated logic.
Sequence-invariant state machines
NASA Technical Reports Server (NTRS)
Whitaker, Sterling R.; Manjunath, Shamanna K.; Maki, Gary K.
1991-01-01
A synthesis method and an MOS VLSI architecture are presented to realize sequential circuits that have the ability to implement any state machine having N states and m inputs, regardless of the actual sequence specified in the flow table. The design method utilizes binary tree structured (BTS) logic to implement regular and dense circuits. The desired state sequence can be hardwired with power supply connections or can be dynamically reallocated if stored in a register. This allows programmable VLSI controllers to be designed with a compact size and performance approaching that of dedicated logic. Results of ICV implementations are reported and an example sequence-invariant state machine is contrasted with implementations based on traditional methods.
NASA Astrophysics Data System (ADS)
Kotb, Amer
2015-05-01
The performance of an all-optical NOR gate is numerically simulated and investigated. The NOR Boolean function is realized by using a semiconductor optical amplifier (SOA) incorporated in Mach-Zehnder interferometer (MZI) arms and exploiting the nonlinear effect of two-photon absorption (TPA). If the input pulse intensities is adjusting to be high enough, the TPA-induced phase change can be larger than the regular gain-induced phase change and hence support ultrafast operation in the dual rail switching mode. The numerical study is carried out by taking into account the effect of the amplified spontaneous emission (ASE). The dependence of the output quality factor ( Q-factor) on critical data signals and SOAs parameters is examined and assessed. The obtained results confirm that the NOR gate implemented with the proposed scheme is capable of operating at a data rate of 250 Gb/s with logical correctness and high output Q-factor.
[National health resources for highly specialised medicine].
Bratlid, Dag; Rasmussen, Knut
2005-11-03
In order to monitor quality and efficiency in the use of health resources for highly specialised medicine, a National Professional Council has since 1990 advised the Norwegian health authorities on the establishing and localisation of such services. A comprehensive review of both the quality, economy and the geographical distribution of patients in each specialised service has been carried out. 33 defined national programmes were centralised to one hospital only and distributed among seven university hospitals. Eight multiregional programmes were centralised to two hospitals only and included four university hospitals. In 2001, a total of 2711 new patients were treated in these programmes. The system seems to have secured a sufficient patient flow to each programme so as to maintain quality. However, a geographically skewed distribution of patients was noted, particularly in some of the national programmes. In a small country like Norway, with 4.5 million inhabitants, a centralised monitoring of highly specialised medicine seems both rational and successful. By the same logic, however, international cooperation should probably be sought for the smallest patient groups.
Logic Gate Operation by DNA Translocation through Biological Nanopores.
Yasuga, Hiroki; Kawano, Ryuji; Takinoue, Masahiro; Tsuji, Yutaro; Osaki, Toshihisa; Kamiya, Koki; Miki, Norihisa; Takeuchi, Shoji
2016-01-01
Logical operations using biological molecules, such as DNA computing or programmable diagnosis using DNA, have recently received attention. Challenges remain with respect to the development of such systems, including label-free output detection and the rapidity of operation. Here, we propose integration of biological nanopores with DNA molecules for development of a logical operating system. We configured outputs "1" and "0" as single-stranded DNA (ssDNA) that is or is not translocated through a nanopore; unlabeled DNA was detected electrically. A negative-AND (NAND) operation was successfully conducted within approximately 10 min, which is rapid compared with previous studies using unlabeled DNA. In addition, this operation was executed in a four-droplet network. DNA molecules and associated information were transferred among droplets via biological nanopores. This system would facilitate linking of molecules and electronic interfaces. Thus, it could be applied to molecular robotics, genetic engineering, and even medical diagnosis and treatment.
Bi, Sai; Chen, Min; Jia, Xiaoqiang; Dong, Ying; Wang, Zonghua
2015-07-06
A hyper-branched hybridization chain reaction (HB-HCR) is presented herein, which consists of only six species that can metastably coexist until the introduction of an initiator DNA to trigger a cascade of hybridization events, leading to the self-sustained assembly of hyper-branched and nicked double-stranded DNA structures. The system can readily achieve ultrasensitive detection of target DNA. Moreover, the HB-HCR principle is successfully applied to construct three-input concatenated logic circuits with excellent specificity and extended to design a security-mimicking keypad lock system. Significantly, the HB-HCR-based keypad lock can alarm immediately if the "password" is incorrect. Overall, the proposed HB-HCR with high amplification efficiency is simple, homogeneous, fast, robust, and low-cost, and holds great promise in the development of biosensing, in the programmable assembly of DNA architectures, and in molecular logic operations. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Logical NAND and NOR Operations Using Algorithmic Self-assembly of DNA Molecules
NASA Astrophysics Data System (ADS)
Wang, Yanfeng; Cui, Guangzhao; Zhang, Xuncai; Zheng, Yan
DNA self-assembly is the most advanced and versatile system that has been experimentally demonstrated for programmable construction of patterned systems on the molecular scale. It has been demonstrated that the simple binary arithmetic and logical operations can be computed by the process of self assembly of DNA tiles. Here we report a one-dimensional algorithmic self-assembly of DNA triple-crossover molecules that can be used to execute five steps of a logical NAND and NOR operations on a string of binary bits. To achieve this, abstract tiles were translated into DNA tiles based on triple-crossover motifs. Serving as input for the computation, long single stranded DNA molecules were used to nucleate growth of tiles into algorithmic crystals. Our method shows that engineered DNA self-assembly can be treated as a bottom-up design techniques, and can be capable of designing DNA computer organization and architecture.
Three challenges to the complementarity of the logic and the pragmatics of science.
Uebel, Thomas
2015-10-01
The bipartite metatheory thesis attributes to Rudolf Carnap, Philipp Frank and Otto Neurath a conception of the nature of post-metaphysical philosophy of science that sees the purely formal-logical analyses of the logic of science as complemented by empirical inquiries into the psychology, sociology and history of science. Three challenges to this thesis are considered in this paper: that Carnap did not share this conception of the nature of philosophy of science even on a programmatic level, that Carnap's detailed analysis of the language of science is incompatible with one developed by Neurath for the pursuit of empirical studies of science, and, finally, that Neurath himself was confused about the programme of which the bipartite metatheory thesis makes him a representative. I argue that all three challenges can be met and refuted. Copyright © 2015 Elsevier Ltd. All rights reserved.
Logic Gate Operation by DNA Translocation through Biological Nanopores
Takinoue, Masahiro; Tsuji, Yutaro; Osaki, Toshihisa; Kamiya, Koki; Miki, Norihisa; Takeuchi, Shoji
2016-01-01
Logical operations using biological molecules, such as DNA computing or programmable diagnosis using DNA, have recently received attention. Challenges remain with respect to the development of such systems, including label-free output detection and the rapidity of operation. Here, we propose integration of biological nanopores with DNA molecules for development of a logical operating system. We configured outputs “1” and “0” as single-stranded DNA (ssDNA) that is or is not translocated through a nanopore; unlabeled DNA was detected electrically. A negative-AND (NAND) operation was successfully conducted within approximately 10 min, which is rapid compared with previous studies using unlabeled DNA. In addition, this operation was executed in a four-droplet network. DNA molecules and associated information were transferred among droplets via biological nanopores. This system would facilitate linking of molecules and electronic interfaces. Thus, it could be applied to molecular robotics, genetic engineering, and even medical diagnosis and treatment. PMID:26890568
Test Capability Enhancements to the NASA Langley 8-Foot High Temperature Tunnel
NASA Technical Reports Server (NTRS)
Harvin, S. F.; Cabell, K. F.; Gallimore, S. D.; Mekkes, G. L.
2006-01-01
The NASA Langley 8-Foot High Temperature Tunnel produces true enthalpy environments simulating flight from Mach 4 to Mach 7, primarily for airbreathing propulsion and aerothermal/thermo-structural testing. Flow conditions are achieved through a methane-air heater and nozzles producing aerodynamic Mach numbers of 4, 5 or 7 and have exit diameters of 8 feet or 4.5 feet. The 12-ft long free-jet test section, housed inside a 26-ft vacuum sphere, accommodates large test articles. Recently, the facility underwent significant upgrades to support hydrocarbon fueled scramjet engine testing and to expand flight simulation capability. The upgrades were required to meet engine system development and flight clearance verification requirements originally defined by the joint NASA-Air Force X-43C Hypersonic Flight Demonstrator Project and now the Air Force X-51A Program. Enhancements to the 8-Ft. HTT were made in four areas: 1) hydrocarbon fuel delivery; 2) flight simulation capability; 3) controls and communication; and 4) data acquisition/processing. The upgrades include the addition of systems to supply ethylene and liquid JP-7 to test articles; a Mach 5 nozzle with dynamic pressure simulation capability up to 3200 psf, the addition of a real-time model angle-of-attack system; a new programmable logic controller sub-system to improve process controls and communication with model controls; the addition of MIL-STD-1553B and high speed data acquisition systems and a classified data processing environment. These additions represent a significant increase to the already unique test capability and flexibility of the facility, and complement the existing array of test support hardware such as a model injection system, radiant heaters, six-component force measurement system, and optical flow field visualization hardware. The new systems support complex test programs that require sophisticated test sequences and precise management of process fluids. Furthermore, the new systems, such as the real-time angle of attack system and the new programmable logic controller enhance the test efficiency of the facility. The motivation for the upgrades and the expanded capabilities is described here.
Halámek, Jan; Zhou, Jian; Halámková, Lenka; Bocharova, Vera; Privman, Vladimir; Wang, Joseph; Katz, Evgeny
2011-11-15
Biomolecular logic systems processing biochemical input signals and producing "digital" outputs in the form of YES/NO were developed for analysis of physiological conditions characteristic of liver injury, soft tissue injury, and abdominal trauma. Injury biomarkers were used as input signals for activating the logic systems. Their normal physiological concentrations were defined as logic-0 level, while their pathologically elevated concentrations were defined as logic-1 values. Since the input concentrations applied as logic 0 and 1 values were not sufficiently different, the output signals being at low and high values (0, 1 outputs) were separated with a short gap making their discrimination difficult. Coupled enzymatic reactions functioning as a biomolecular signal processing system with a built-in filter property were developed. The filter process involves a partial back-conversion of the optical-output-signal-yielding product, but only at its low concentrations, thus allowing the proper discrimination between 0 and 1 output values.
A Remote Laboratory Platform for Electrical Drive Control Using Programmable Logic Controllers
ERIC Educational Resources Information Center
Ferrater-Simon, C.; Molas-Balada, L.; Gomis-Bellmunt, O.; Lorenzo-Martinez, N.; Bayo-Puxan, O.; Villafafila-Robles, R.
2009-01-01
Many teaching institutions worldwide are working on distance learning applications. In this field, remote laboratories are enabling intensive use of university facilities, while aiding the work of professors and students. The present paper introduces a platform designed to be used in industrial automation practical work. The platform is…
2007-08-01
with a Design Specification de- scribed by Scilab [26], a MATLAB-like software applica- tion, and ends up with HDL code. The Design Specifica- tion...Conf. on Field Programmable Logic and Applications (FPL’05), Tampere, Finland, pp. 118–123, Aug. 2005. [26] Scilab 3.0, INRIA-ENPC, France, http
USDA-ARS?s Scientific Manuscript database
Control of dissolved gases, especially oxygen is an essential component of recirculating aquaculture systems. The use of pure oxygen in a recirculating aquaculture system creates supersaturated concentrations of dissolved oxygen and can reduce fish production costs by supporting greater fish and fee...
A self-timed multipurpose delay sensor for Field Programmable Gate Arrays (FPGAs).
Osuna, Carlos Gómez; Ituero, Pablo; López-Vallejo, Marisa
2013-12-20
This paper presents a novel self-timed multi-purpose sensor especially conceived for Field Programmable Gate Arrays (FPGAs). The aim of the sensor is to measure performance variations during the life-cycle of the device, such as process variability, critical path timing and temperature variations. The proposed topology, through the use of both combinational and sequential FPGA elements, amplifies the time of a signal traversing a delay chain to produce a pulse whose width is the sensor's measurement. The sensor is fully self-timed, avoiding the need for clock distribution networks and eliminating the limitations imposed by the system clock. One single off- or on-chip time-to-digital converter is able to perform digitization of several sensors in a single operation. These features allow for a simplified approach for designers wanting to intertwine a multi-purpose sensor network with their application logic. Employed as a temperature sensor, it has been measured to have an error of ±0.67 °C, over the range of 20-100 °C, employing 20 logic elements with a 2-point calibration.
A Self-Timed Multipurpose Delay Sensor for Field Programmable Gate Arrays (FPGAs)
Osuna, Carlos Gómez; Ituero, Pablo; López-Vallejo, Marisa
2014-01-01
This paper presents a novel self-timed multi-purpose sensor especially conceived for Field Programmable Gate Arrays (FPGAs). The aim of the sensor is to measure performance variations during the life-cycle of the device, such as process variability, critical path timing and temperature variations. The proposed topology, through the use of both combinational and sequential FPGA elements, amplifies the time of a signal traversing a delay chain to produce a pulse whose width is the sensor's measurement. The sensor is fully self-timed, avoiding the need for clock distribution networks and eliminating the limitations imposed by the system clock. One single off- or on-chip time-to-digital converter is able to perform digitization of several sensors in a single operation. These features allow for a simplified approach for designers wanting to intertwine a multi-purpose sensor network with their application logic. Employed as a temperature sensor, it has been measured to have an error of ±0.67 °C, over the range of 20–100 °C, employing 20 logic elements with a 2-point calibration. PMID:24361927
A distributed control system for the lower-hybrid current drive system on the Tokamak de Varennes
NASA Astrophysics Data System (ADS)
Bagdoo, J.; Guay, J. M.; Chaudron, G.-A.; Decoste, R.; Demers, Y.; Hubbard, A.
1990-08-01
An rf current drive system with an output power of 1 MW at 3.7 GHz is under development for the Tokamak de Varennes. The control system is based on an Ethernet local-area network of programmable logic controllers as front end, personal computers as consoles, and CAMAC-based DSP processors. The DSP processors ensure the PID control of the phase and rf power of each klystron, and the fast protection of high-power rf hardware, all within a 40 μs loop. Slower control and protection, event sequencing and the run-time database are provided by the programmable logic controllers, which communicate, via the LAN, with the consoles. The latter run a commercial process-control console software. The LAN protocol respects the first four layers of the ISO/OSI 802.3 standard. Synchronization with the tokamak control system is provided by commercially available CAMAC timing modules which trigger shot-related events and reference waveform generators. A detailed description of each subsystem and a performance evaluation of the system will be presented.
Quantum Communication without Alignment using Multiple-Qubit Single-Photon States
NASA Astrophysics Data System (ADS)
Aolita, L.; Walborn, S. P.
2007-03-01
We propose a scheme for encoding logical qubits in a subspace protected against collective rotations around the propagation axis using the polarization and transverse spatial degrees of freedom of single photons. This encoding allows for quantum key distribution without the need of a shared reference frame. We present methods to generate entangled states of two logical qubits using present day down-conversion sources and linear optics, and show that the application of these entangled logical states to quantum information schemes allows for alignment-free tests of Bell’s inequalities, quantum dense coding, and quantum teleportation.
Trinary Associative Memory Would Recognize Machine Parts
NASA Technical Reports Server (NTRS)
Liu, Hua-Kuang; Awwal, Abdul Ahad S.; Karim, Mohammad A.
1991-01-01
Trinary associative memory combines merits and overcomes major deficiencies of unipolar and bipolar logics by combining them in three-valued logic that reverts to unipolar or bipolar binary selectively, as needed to perform specific tasks. Advantage of associative memory: one obtains access to all parts of it simultaneously on basis of content, rather than address, of data. Consequently, used to exploit fully parallelism and speed of optical computing.
NASA Astrophysics Data System (ADS)
Rahman, Husna Abdul; Harun, Sulaiman Wadi; Arof, Hamzah; Irawati, Ninik; Musirin, Ismail; Ibrahim, Fatimah; Ahmad, Harith
2014-05-01
An enhanced dental cavity diameter measurement mechanism using an intensity-modulated fiber optic displacement sensor (FODS) scanning and imaging system, fuzzy logic as well as a single-layer perceptron (SLP) neural network, is presented. The SLP network was employed for the classification of the reflected signals, which were obtained from the surfaces of teeth samples and captured using FODS. Two features were used for the classification of the reflected signals with one of them being the output of a fuzzy logic. The test results showed that the combined fuzzy logic and SLP network methodology contributed to a 100% classification accuracy of the network. The high-classification accuracy significantly demonstrates the suitability of the proposed features and classification using SLP networks for classifying the reflected signals from teeth surfaces, enabling the sensor to accurately measure small diameters of tooth cavity of up to 0.6 mm. The method remains simple enough to allow its easy integration in existing dental restoration support systems.
Rahman, Husna Abdul; Harun, Sulaiman Wadi; Arof, Hamzah; Irawati, Ninik; Musirin, Ismail; Ibrahim, Fatimah; Ahmad, Harith
2014-05-01
An enhanced dental cavity diameter measurement mechanism using an intensity-modulated fiber optic displacement sensor (FODS) scanning and imaging system, fuzzy logic as well as a single-layer perceptron (SLP) neural network, is presented. The SLP network was employed for the classification of the reflected signals, which were obtained from the surfaces of teeth samples and captured using FODS. Two features were used for the classification of the reflected signals with one of them being the output of a fuzzy logic. The test results showed that the combined fuzzy logic and SLP network methodology contributed to a 100% classification accuracy of the network. The high-classification accuracy significantly demonstrates the suitability of the proposed features and classification using SLP networks for classifying the reflected signals from teeth surfaces, enabling the sensor to accurately measure small diameters of tooth cavity of up to 0.6 mm. The method remains simple enough to allow its easy integration in existing dental restoration support systems.
Qin, Jun; Lu, Guo-Wei; Sakamoto, Takahide; Akahane, Kouichi; Yamamoto, Naokatsu; Wang, Danshi; Wang, Cheng; Wang, Hongxiang; Zhang, Min; Kawanishi, Tetsuya; Ji, Yuefeng
2014-12-01
In this paper, we experimentally demonstrate simultaneous multichannel wavelength multicasting (MWM) and exclusive-OR logic gate multicasting (XOR-LGM) for three 10Gbps non-return-to-zero differential phase-shift-keying (NRZ-DPSK) signals in quantum-dot semiconductor optical amplifier (QD-SOA) by exploiting the four-wave mixing (FWM) process. No additional pump is needed in the scheme. Through the interaction of the input three 10Gbps DPSK signal lights in QD-SOA, each channel is successfully multicasted to three wavelengths (1-to-3 for each), totally 3-to-9 MWM, and at the same time, three-output XOR-LGM is obtained at three different wavelengths. All the new generated channels are with a power penalty less than 1.2dB at a BER of 10(-9). Degenerate and non-degenerate FWM components are fully used in the experiment for data and logic multicasting.
Photonic Programmable Tele-Cloning Network.
Li, Wei; Chen, Ming-Cheng
2016-06-29
The concept of quantum teleportation allows an unknown quantum states to be broadcasted and processed in a distributed quantum network. The quantum information injected into the network can be diluted to distant multi-copies by quantum cloning and processed by arbitrary quantum logic gates which were programed in advance in the network quantum state. A quantum network combines simultaneously these fundamental quantum functions could lead to new intriguing applications. Here we propose a photonic programmable telecloning network based on a four-photon interferometer. The photonic network serves as quantum gate, quantum cloning and quantum teleportation and features experimental advantage of high brightness by photon recycling.
NASA Technical Reports Server (NTRS)
Haley, D. C.; Almand, B. J.; Thomas, M. M.; Krauze, L. D.; Gremban, K. D.; Sanborn, J. C.; Kelly, J. H.; Depkovich, T. M.
1984-01-01
The purpose of the Robotics Simulation (ROBSIM) program is to provide a broad range of computer capabilities to assist in the design, verification, simulation, and study of robotic systems. ROBSIM is programmed in FORTRAN 77 and implemented on a VAX 11/750 computer using the VMS operating system. This programmer's guide describes the ROBSIM implementation and program logic flow, and the functions and structures of the different subroutines. With this manual and the in-code documentation, and experienced programmer can incorporate additional routines and modify existing ones to add desired capabilities.
Multiprog virtual laboratory applied to PLC programming learning
NASA Astrophysics Data System (ADS)
Shyr, Wen-Jye
2010-10-01
This study develops a Multiprog virtual laboratory for a mechatronics education designed to teach how to programme a programmable logic controller (PLC). The study was carried out with 34 students in the Department of Industry Education and Technology at National Changhua University of Education in Taiwan. In total, 17 students were assigned to each group, experimental and control. Two laboratory exercises were designed to provide students with experience in PLC programming. The results show that the experiments supported by Multiprog virtual laboratory user-friendly control interfaces generate positive meaningful results in regard to students' knowledge and understanding of the material.
Voltage-programmable liquid optical interface
NASA Astrophysics Data System (ADS)
Brown, C. V.; Wells, G. G.; Newton, M. I.; McHale, G.
2009-07-01
Recently, there has been intense interest in photonic devices based on microfluidics, including displays and refractive tunable microlenses and optical beamsteerers that work using the principle of electrowetting. Here, we report a novel approach to optical devices in which static wrinkles are produced at the surface of a thin film of oil as a result of dielectrophoretic forces. We have demonstrated this voltage-programmable surface wrinkling effect in periodic devices with pitch lengths of between 20 and 240 µm and with response times of less than 40 µs. By a careful choice of oils, it is possible to optimize either for high-amplitude sinusoidal wrinkles at micrometre-scale pitches or more complex non-sinusoidal profiles with higher Fourier components at longer pitches. This opens up the possibility of developing rapidly responsive voltage-programmable, polarization-insensitive transmission and reflection diffraction devices and arbitrary surface profile optical devices.
NASA Astrophysics Data System (ADS)
Peterson, Gary; Abeytunge, Sanjeewa; Eastman, Zachary; Rajadhyaksha, Milind
2012-02-01
Reflectance confocal microscopy with a line scanning approach potentially offers a smaller, simpler and less expensive approach than traditional methods of point scanning for imaging in living tissues. With one moving mechanical element (galvanometric scanner), a linear array detector and off-the-shelf optics, we designed a compact (102x102x76mm) line scanning confocal reflectance microscope (LSCRM) for imaging human tissues in vivo in a clinical setting. Custom-designed electronics, based on field programmable gate array (FPGA) logic has been developed. With 405 nm illumination and a custom objective lens of numerical aperture 0.5, lateral resolution was measured to be 0.8 um (calculated 0.64 um). The calculated optical sectioning is 3.2 um. Preliminary imaging shows nuclear and cellular detail in human skin and oral epithelium in vivo. Blood flow is also visualized in the deeper connective tissue (lamina propria) in oral mucosa. Since a line is confocal only in one dimension (parallel) but not in the other, the detection is more sensitive to multiply scattered out of focus background noise than in the traditional point scanning configuration. Based on the results of our translational studies thus far, a simpler, smaller and lower-cost approach based on a LSCRM appears to be promising for clinical imaging.
NASA Astrophysics Data System (ADS)
Rankin, Drew J.; Jiang, Jin
2011-04-01
Verification and validation (V&V) of safety control system quality and performance is required prior to installing control system hardware within nuclear power plants (NPPs). Thus, the objective of the hardware-in-the-loop (HIL) platform introduced in this paper is to verify the functionality of these safety control systems. The developed platform provides a flexible simulated testing environment which enables synchronized coupling between the real and simulated world. Within the platform, National Instruments (NI) data acquisition (DAQ) hardware provides an interface between a programmable electronic system under test (SUT) and a simulation computer. Further, NI LabVIEW resides on this remote DAQ workstation for signal conversion and routing between Ethernet and standard industrial signals as well as for user interface. The platform is applied to the testing of a simplified implementation of Canadian Deuterium Uranium (CANDU) shutdown system no. 1 (SDS1) which monitors only the steam generator level of the simulated NPP. CANDU NPP simulation is performed on a Darlington NPP desktop training simulator provided by Ontario Power Generation (OPG). Simplified SDS1 logic is implemented on an Invensys Tricon v9 programmable logic controller (PLC) to test the performance of both the safety controller and the implemented logic. Prior to HIL simulation, platform availability of over 95% is achieved for the configuration used during the V&V of the PLC. Comparison of HIL simulation results to benchmark simulations shows good operational performance of the PLC following a postulated initiating event (PIE).
Modernization of B-2 Data, Video, and Control Systems Infrastructure
NASA Technical Reports Server (NTRS)
Cmar, Mark D.; Maloney, Christian T.; Butala, Vishal D.
2012-01-01
The National Aeronautics and Space Administration (NASA) Glenn Research Center (GRC) Plum Brook Station (PBS) Spacecraft Propulsion Research Facility, commonly referred to as B-2, is NASA s third largest thermal-vacuum facility with propellant systems capability. B-2 has completed a modernization effort of its facility legacy data, video and control systems infrastructure to accommodate modern integrated testing and Information Technology (IT) Security requirements. Integrated systems tests have been conducted to demonstrate the new data, video and control systems functionality and capability. Discrete analog signal conditioners have been replaced by new programmable, signal processing hardware that is integrated with the data system. This integration supports automated calibration and verification of the analog subsystem. Modern measurement systems analysis (MSA) tools are being developed to help verify system health and measurement integrity. Legacy hard wired digital data systems have been replaced by distributed Fibre Channel (FC) network connected digitizers where high speed sampling rates have increased to 256,000 samples per second. Several analog video cameras have been replaced by digital image and storage systems. Hard-wired analog control systems have been replaced by Programmable Logic Controllers (PLC), fiber optic networks (FON) infrastructure and human machine interface (HMI) operator screens. New modern IT Security procedures and schemes have been employed to control data access and process control flows. Due to the nature of testing possible at B-2, flexibility and configurability of systems has been central to the architecture during modernization.
Modernization of B-2 Data, Video, and Control Systems Infrastructure
NASA Technical Reports Server (NTRS)
Cmar, Mark D.; Maloney, Christian T.; Butala, Vishal D.
2012-01-01
The National Aeronautics and Space Administration (NASA) Glenn Research Center (GRC) Plum Brook Station (PBS) Spacecraft Propulsion Research Facility, commonly referred to as B-2, is NASA's third largest thermal-vacuum facility with propellant systems capability. B-2 has completed a modernization effort of its facility legacy data, video and control systems infrastructure to accommodate modern integrated testing and Information Technology (IT) Security requirements. Integrated systems tests have been conducted to demonstrate the new data, video and control systems functionality and capability. Discrete analog signal conditioners have been replaced by new programmable, signal processing hardware that is integrated with the data system. This integration supports automated calibration and verification of the analog subsystem. Modern measurement systems analysis (MSA) tools are being developed to help verify system health and measurement integrity. Legacy hard wired digital data systems have been replaced by distributed Fibre Channel (FC) network connected digitizers where high speed sampling rates have increased to 256,000 samples per second. Several analog video cameras have been replaced by digital image and storage systems. Hard-wired analog control systems have been replaced by Programmable Logic Controllers (PLC), fiber optic networks (FON) infrastructure and human machine interface (HMI) operator screens. New modern IT Security procedures and schemes have been employed to control data access and process control flows. Due to the nature of testing possible at B-2, flexibility and configurability of systems has been central to the architecture during modernization.
Yang, Bin; Zhang, Xiao-Bing; Kang, Li-Ping; Huang, Zhi-Mei; Shen, Guo-Li; Yu, Ru-Qin; Tan, Weihong
2014-08-07
DNA strand displacement cascades have been engineered to construct various fascinating DNA circuits. However, biological applications are limited by the insufficient cellular internalization of naked DNA structures, as well as the separated multicomponent feature. In this work, these problems are addressed by the development of a novel DNA nanodevice, termed intelligent layered nanoflare, which integrates DNA computing at the nanoscale, via the self-assembly of DNA flares on a single gold nanoparticle. As a "lab-on-a-nanoparticle", the intelligent layered nanoflare could be engineered to perform a variety of Boolean logic gate operations, including three basic logic gates, one three-input AND gate, and two complex logic operations, in a digital non-leaky way. In addition, the layered nanoflare can serve as a programmable strategy to sequentially tune the size of nanoparticles, as well as a new fingerprint spectrum technique for intelligent multiplex biosensing. More importantly, the nanoflare developed here can also act as a single entity for intracellular DNA logic gate delivery, without the need of commercial transfection agents or other auxiliary carriers. By incorporating DNA circuits on nanoparticles, the presented layered nanoflare will broaden the applications of DNA circuits in biological systems, and facilitate the development of DNA nanotechnology.
Fast quantum logic gates with trapped-ion qubits
NASA Astrophysics Data System (ADS)
Schäfer, V. M.; Ballance, C. J.; Thirumalai, K.; Stephenson, L. J.; Ballance, T. G.; Steane, A. M.; Lucas, D. M.
2018-03-01
Quantum bits (qubits) based on individual trapped atomic ions are a promising technology for building a quantum computer. The elementary operations necessary to do so have been achieved with the required precision for some error-correction schemes. However, the essential two-qubit logic gate that is used to generate quantum entanglement has hitherto always been performed in an adiabatic regime (in which the gate is slow compared with the characteristic motional frequencies of the ions in the trap), resulting in logic speeds of the order of 10 kilohertz. There have been numerous proposals of methods for performing gates faster than this natural ‘speed limit’ of the trap. Here we implement one such method, which uses amplitude-shaped laser pulses to drive the motion of the ions along trajectories designed so that the gate operation is insensitive to the optical phase of the pulses. This enables fast (megahertz-rate) quantum logic that is robust to fluctuations in the optical phase, which would otherwise be an important source of experimental error. We demonstrate entanglement generation for gate times as short as 480 nanoseconds—less than a single oscillation period of an ion in the trap and eight orders of magnitude shorter than the memory coherence time measured in similar calcium-43 hyperfine qubits. The power of the method is most evident at intermediate timescales, at which it yields a gate error more than ten times lower than can be attained using conventional techniques; for example, we achieve a 1.6-microsecond-duration gate with a fidelity of 99.8 per cent. Faster and higher-fidelity gates are possible at the cost of greater laser intensity. The method requires only a single amplitude-shaped pulse and one pair of beams derived from a continuous-wave laser. It offers the prospect of combining the unrivalled coherence properties, operation fidelities and optical connectivity of trapped-ion qubits with the submicrosecond logic speeds that are usually associated with solid-state devices.
Fast quantum logic gates with trapped-ion qubits.
Schäfer, V M; Ballance, C J; Thirumalai, K; Stephenson, L J; Ballance, T G; Steane, A M; Lucas, D M
2018-02-28
Quantum bits (qubits) based on individual trapped atomic ions are a promising technology for building a quantum computer. The elementary operations necessary to do so have been achieved with the required precision for some error-correction schemes. However, the essential two-qubit logic gate that is used to generate quantum entanglement has hitherto always been performed in an adiabatic regime (in which the gate is slow compared with the characteristic motional frequencies of the ions in the trap), resulting in logic speeds of the order of 10 kilohertz. There have been numerous proposals of methods for performing gates faster than this natural 'speed limit' of the trap. Here we implement one such method, which uses amplitude-shaped laser pulses to drive the motion of the ions along trajectories designed so that the gate operation is insensitive to the optical phase of the pulses. This enables fast (megahertz-rate) quantum logic that is robust to fluctuations in the optical phase, which would otherwise be an important source of experimental error. We demonstrate entanglement generation for gate times as short as 480 nanoseconds-less than a single oscillation period of an ion in the trap and eight orders of magnitude shorter than the memory coherence time measured in similar calcium-43 hyperfine qubits. The power of the method is most evident at intermediate timescales, at which it yields a gate error more than ten times lower than can be attained using conventional techniques; for example, we achieve a 1.6-microsecond-duration gate with a fidelity of 99.8 per cent. Faster and higher-fidelity gates are possible at the cost of greater laser intensity. The method requires only a single amplitude-shaped pulse and one pair of beams derived from a continuous-wave laser. It offers the prospect of combining the unrivalled coherence properties, operation fidelities and optical connectivity of trapped-ion qubits with the submicrosecond logic speeds that are usually associated with solid-state devices.
NASA Astrophysics Data System (ADS)
Liu, Xiang; Beckwitt, Kale; Wise, Frank
2000-05-01
We demonstrate theoretically and experimentally that spatiotemporal solitons can be generated through noncollinear second-harmonic generation. The resulting Y geometry could be used to implement an optical AND gate with ultrafast, high-contrast operation but without sensitivity to the phases of the input pulses.
Tse computers. [ultrahigh speed optical processing for two dimensional binary image
NASA Technical Reports Server (NTRS)
Schaefer, D. H.; Strong, J. P., III
1977-01-01
An ultra-high-speed computer that utilizes binary images as its basic computational entity is being developed. The basic logic components perform thousands of operations simultaneously. Technologies of the fiber optics, display, thin film, and semiconductor industries are being utilized in the building of the hardware.
NASA Astrophysics Data System (ADS)
Wang, Jinhong; Guan, Liang; Chapman, J.; Zhou, Bing; Zhu, Junjie
2017-11-01
We present a programmable time alignment scheme used in an ASIC for the ATLAS forward muon trigger development. The scheme utilizes regenerated clocks with programmable phases to compensate for the timing offsets introduced by different detector trace lengths. Each ASIC used in the design has 104 input channels with delay compensation circuitry providing steps of ∼3 ns and a full range of 25 ns for each channel. Detailed implementation of the scheme including majority logic to suppress single-event effects is presented. The scheme is flexible and fully synthesizable. The approach is adaptable to other applications with similar phase shifting requirements. In addition, the design is resource efficient and is suitable for cost-effective digital implementation with a large number of channels.
Krishnamurthy, Subramanian; Wang, Y; Tu, Y; Tseng, S; Shahriar, M S
2013-10-21
We demonstrate an optically controlled polarizer at ~1323 nm using a ladder transition in a Rb vapor cell. The lower leg of the 5S(1/2),F = 1->5P(1/2),F = 1,2->6S(1/2),F = 1,2 transitions is excited by a Ti:Sapphire laser locked to a saturated absorption signal, representing the control beam. A tunable fiber laser at ~1323 nm is used to excite the upper leg of the transitions, representing the signal beam. When the control beam is linearly polarized, it produces an excitation of the intermediate level with a particular orientation of the angular momentum. Under ideal conditions, this orientation is transparent to the signal beam if it has the same polarization as the control beam and is absorbed when it is polarized orthogonally. We also present numerical simulations of the system using a comprehensive model which incorporates all the relevant Zeeman sub-levels in the system, and identify means to improve the performance of the polarizer. A novel algorithm to compute the evolution of large scale quantum system enabled us to perform this computation, which may have been considered too cumbersome to carry out previously. We describe how such a polarizer may serve as a key component for high-speed Stokesmetric imaging. We also show how such a polarizer, combined with an optically controlled waveplate, recently demonstrated by us, can be used to realize a high speed optical logic gate by making use of the Quantum Zeno Effect. Finally, we describe how such a logic gate can be realized at an ultra-low power level using a tapered nanofiber embedded in a vapor cell.
DNA "nano-claw": logic-based autonomous cancer targeting and therapy.
You, Mingxu; Peng, Lu; Shao, Na; Zhang, Liqin; Qiu, Liping; Cui, Cheng; Tan, Weihong
2014-01-29
Cell types, both healthy and diseased, can be classified by inventories of their cell-surface markers. Programmable analysis of multiple markers would enable clinicians to develop a comprehensive disease profile, leading to more accurate diagnosis and intervention. As a first step to accomplish this, we have designed a DNA-based device, called "Nano-Claw". Combining the special structure-switching properties of DNA aptamers with toehold-mediated strand displacement reactions, this claw is capable of performing autonomous logic-based analysis of multiple cancer cell-surface markers and, in response, producing a diagnostic signal and/or targeted photodynamic therapy. We anticipate that this design can be widely applied in facilitating basic biomedical research, accurate disease diagnosis, and effective therapy.
Bevan, Gwyn; Brown, Lawrence D
2014-07-01
This article considers how the 'accidental logics' of political settlements for the English National Health Service (NHS) and the Medicare and Medicaid programmes in the United States have resulted in different institutional arrangements and different implicit social contracts for rationing, which we define to be the denial of health care that is beneficial but is deemed to be too costly. This article argues that rationing is designed into the English NHS and designed out of US Medicare; and compares rationing for the elderly in the United States and in England for acute care, care at the end of life, and chronic care.
Institutional patterns in the Austrian space sector
NASA Astrophysics Data System (ADS)
Wong, Annie; Burg, Elco van; Giannopapa, Christina
2018-01-01
This paper employs the institutional logics perspective to understand how space policies and regulations influences entrepreneurship and innovation. We conducted interviews with entrepreneurs, ESA policy makers and governmental representatives in Austria and identified six prevailing institutional practices: geographical return, the SME-initiatives, the national support pattern, the size pattern, the consortium pattern and the experience pattern. Together, these patterns make up the semi-governmental logic of the space sector. We find that space actors adhere to these patterns to earn legitimacy, which is a condition for support and access to resources. This study adds to our understanding in the consequences of policies and contributes to the design of new space policies and programmes.
Hybrid CMOS/Molecular Integrated Circuits
NASA Astrophysics Data System (ADS)
Stan, M. R.; Rose, G. S.; Ziegler, M. M.
CMOS silicon technologies are likely to run out of steam in the next 10-15 years despite revolutionary advances in the past few decades. Molecular and other nanoscale technologies show significant promise but it is unlikely that they will completely replace CMOS, at least in the near term. This chapter explores opportunities for using CMOS and nanotechnology to enhance and complement each other in hybrid circuits. As an example of such a hybrid CMOS/nano system, a nanoscale programmable logic array (PLA) based on majority logic is described along with its supplemental CMOS circuitry. It is believed that such systems will be able to sustain the historical advances in the semiconductor industry while addressing manufacturability, yield, power, cost, and performance challenges.
Digital MOS integrated circuits
NASA Astrophysics Data System (ADS)
Elmasry, M. I.
MOS in digital circuit design is considered along with aspects of digital VLSI, taking into account a comparison of MOSFET logic circuits, 1-micrometer MOSFET VLSI technology, a generalized guide for MOSFET miniaturization, processing technologies, novel circuit structures for VLSI, and questions of circuit and system design for VLSI. MOS memory cells and circuits are discussed, giving attention to a survey of high-density dynamic RAM cell concepts, one-device cells for dynamic random-access memories, variable resistance polysilicon for high density CMOS Ram, high performance MOS EPROMs using a stacked-gate cell, and the optimization of the latching pulse for dynamic flip-flop sensors. Programmable logic arrays are considered along with digital signal processors, microprocessors, static RAMs, and dynamic RAMs.
Design on the x-ray oral digital image display card
NASA Astrophysics Data System (ADS)
Wang, Liping; Gu, Guohua; Chen, Qian
2009-10-01
According to the main characteristics of X-ray imaging, the X-ray display card is successfully designed and debugged using the basic principle of correlated double sampling (CDS) and combined with embedded computer technology. CCD sensor drive circuit and the corresponding procedures have been designed. Filtering and sampling hold circuit have been designed. The data exchange with PC104 bus has been implemented. Using complex programmable logic device as a device to provide gating and timing logic, the functions which counting, reading CPU control instructions, corresponding exposure and controlling sample-and-hold have been completed. According to the image effect and noise analysis, the circuit components have been adjusted. And high-quality images have been obtained.
ERIC Educational Resources Information Center
School Science Review, 1989
1989-01-01
Twenty-two activities are presented. Topics include: acid rain, microcomputers, fish farming, school-industry research projects, enzymes, equilibrium, assessment, science equipment, logic, Archimedes principle, electronics, optics, and statistics. (CW)
2006-12-01
Specifi- cation described by Scilab [19], a MATLAB-like software, into HDL code. The Design Specification consists of a func- tion f (x), a domain over x...In- ter. Conf. on Field Programmable Logic and Applications (FPL’05), pp.118–123, Tampere, Finland, Aug. 2005. [19] Scilab 3.0, INRIA-ENPC, France
ERIC Educational Resources Information Center
Sérandour, Guillaume; Illanes, Alfredo; Maturana, Jorge; Cádiz, Janet
2016-01-01
Assessment is a notorious source of preoccupation for faculty and university governing bodies, especially when an institution initiates curricular reforms which shift the programme learning outcomes for knowledge to competencies. One obstacle to acceptance arises from a culture of quantitative assessment (often represented by a single mark), which…
USDA-ARS?s Scientific Manuscript database
In intensive recirculating aquaculture systems the use of supplemental oxygen, specifically pure liquid oxygen, increases the mass of fish that can be supported and eliminates oxygen as a major limiting factor to a system’s carrying capacity. The use of pure oxygen in a recirculating aquaculture sys...
ERIC Educational Resources Information Center
Tucker, James D.
This training module on the troubleshooting of an electromechanical system, The Westinghouse Programmable Logic Controller (PLC) controlling a pneumatic robot, is used for a troubleshooting unit in an electromechanical systems/robotics and automation systems course. In this unit, students locate and repair a defect in a PLC-operated machine. The…
Advanced Ground Systems Maintenance Cryogenics Test Lab Control System Upgrade Project
NASA Technical Reports Server (NTRS)
Harp, Janice Leshay
2014-01-01
This project will outfit the Simulated Propellant Loading System (SPLS) at KSC's Cryogenics Test Laboratory with a new programmable logic control system. The control system upgrade enables the Advanced Ground Systems Maintenace Element Integration Team and other users of the SPLS to conduct testing in a controls environment similar to that used at the launch pad.
An universal read-out controller
NASA Astrophysics Data System (ADS)
Manz, S.; Abel, N.; Gebelein, J.; Kebschull, U.
2010-11-01
Since 2007 we design and develop a ROC (read-out controller) for FAIR's data-acquisition. While our first implementation solely focused on the nXYTER, today we are also designing and implementing readout logic for the GET4 which is supposed to be part of the ToF detector. Furthermore, we fully support both Ethernet and Optical transport as two transparent solutions. The usage of a strict modularization of the Read Out Controller enables us to provide an Universal ROC where front-end specific logic and transport logic can be combined in a very flexible way. Fault tolerance techniques are only required for some of those modules and hence are only implemented there.
Optically-programmable nonlinear photonic component for dielectric-loaded plasmonic circuitry.
Krasavin, Alexey V; Randhawa, Sukanya; Bouillard, Jean-Sebastien; Renger, Jan; Quidant, Romain; Zayats, Anatoly V
2011-12-05
We demonstrate both experimentally and numerically a compact and efficient, optically tuneable plasmonic component utilizing a surface plasmon polariton ring resonator with nonlinearity based on trans-cis isomerization in a polymer material. We observe more than 3-fold change between high and low transmission states of the device at milliwatt control powers (∼100 W/cm2 by intensity), with the performance limited by switching speed of the material. Such plasmonic components can be employed in optically programmable and reconfigurable integrated photonic circuitry.
Reconfigurable lattice mesh designs for programmable photonic processors.
Pérez, Daniel; Gasulla, Ivana; Capmany, José; Soref, Richard A
2016-05-30
We propose and analyse two novel mesh design geometries for the implementation of tunable optical cores in programmable photonic processors. These geometries are the hexagonal and the triangular lattice. They are compared here to a previously proposed square mesh topology in terms of a series of figures of merit that account for metrics that are relevant to on-chip integration of the mesh. We find that that the hexagonal mesh is the most suitable option of the three considered for the implementation of the reconfigurable optical core in the programmable processor.
2014-06-28
constructed from inexpensive semiconductor lasers could lead to the development of novel neuro-inspired optical computing devices (threshold detectors ...optical computing devices (threshold detectors , logic gates, signal recognition, etc.). Other topics of research included the analysis of extreme events in...Extreme events is nowadays a highly active field of research. Rogue waves, earthquakes of high magnitude and financial crises are all rare and
Transformation of Personal Computers and Mobile Phones into Genetic Diagnostic Systems
2014-08-31
a Gel Logic System using UV transillumination and a 535 nm optical filter ( Kodak ). The positive control PCR was performed by taking an aliquot of the...described in the section above. Samples were excited by a UV transilluminator ( Kodak ). For imaging, a 520 ± 10 nm bandpass filter (Edmund Optics) was
Heralded creation of photonic qudits from parametric down-conversion using linear optics
NASA Astrophysics Data System (ADS)
Yoshikawa, Jun-ichi; Bergmann, Marcel; van Loock, Peter; Fuwa, Maria; Okada, Masanori; Takase, Kan; Toyama, Takeshi; Makino, Kenzo; Takeda, Shuntaro; Furusawa, Akira
2018-05-01
We propose an experimental scheme to generate, in a heralded fashion, arbitrary quantum superpositions of two-mode optical states with a fixed total photon number n based on weakly squeezed two-mode squeezed state resources (obtained via weak parametric down-conversion), linear optics, and photon detection. Arbitrary d -level (qudit) states can be created this way where d =n +1 . Furthermore, we experimentally demonstrate our scheme for n =2 . The resulting qutrit states are characterized via optical homodyne tomography. We also discuss possible extensions to more than two modes concluding that, in general, our approach ceases to work in this case. For illustration and with regards to possible applications, we explicitly calculate a few examples such as NOON states and logical qubit states for quantum error correction. In particular, our approach enables one to construct bosonic qubit error-correction codes against amplitude damping (photon loss) with a typical suppression of √{n }-1 losses and spanned by two logical codewords that each correspond to an n -photon superposition for two bosonic modes.
2011-01-01
Background Information on the costs of implementing programmes designed to provide support of orphans and vulnerable children (OVC) in sub-Saharan Africa and elsewhere is increasingly being requested by donors for programme evaluation purposes. To date, little information exists to document the costs and structure of costs of OVC programmes as actually implemented "on the ground" by local non-governmental organizations (NGOs). This analysis provides a practical, six-step approach that NGOs can incorporate into routine operations to evaluate their costs of implementing their OVC programmes annually. This approach is applied to the Community-Based Care for Orphans and Vulnerable Children (CBCO) Program implemented by BIDII (a Kenyan NGO) in Eastern Province of Kenya. Methods and results The costing methodology involves the following six steps: accessing and organizing the NGO's annual financial report into logical sub-categories; reorganizing the sub-categories into input cost categories to create a financial cost profile; estimating the annual equivalent payment for programme equipment; documenting donations to the NGO for programme implementation; including a portion of NGO organizational costs not attributed to specific programmes; and including the results of Steps 3-5 into an expanded cost profile. Detailed results are provided for the CBCO programme. Conclusions This paper shows through a concrete example how NGOs implementing OVC programmes (and other public health programmes) can organize themselves for data collection and documentation prospectively during the implementation of their OVC programmes so that costing analyses become routine practice to inform programme implementation rather than a painful and flawed retrospective activity. Such information is required if the costs and outcomes achieved by OVC programmes will ever be clearly documented and compared across OVC programmes and other types of programmes (prevention, treatment, etc.). PMID:22182588
Larson, Bruce A; Wambua, Nancy
2011-12-19
Information on the costs of implementing programmes designed to provide support of orphans and vulnerable children (OVC) in sub-Saharan Africa and elsewhere is increasingly being requested by donors for programme evaluation purposes. To date, little information exists to document the costs and structure of costs of OVC programmes as actually implemented "on the ground" by local non-governmental organizations (NGOs). This analysis provides a practical, six-step approach that NGOs can incorporate into routine operations to evaluate their costs of implementing their OVC programmes annually. This approach is applied to the Community-Based Care for Orphans and Vulnerable Children (CBCO) Program implemented by BIDII (a Kenyan NGO) in Eastern Province of Kenya. The costing methodology involves the following six steps: accessing and organizing the NGO's annual financial report into logical sub-categories; reorganizing the sub-categories into input cost categories to create a financial cost profile; estimating the annual equivalent payment for programme equipment; documenting donations to the NGO for programme implementation; including a portion of NGO organizational costs not attributed to specific programmes; and including the results of Steps 3-5 into an expanded cost profile. Detailed results are provided for the CBCO programme. This paper shows through a concrete example how NGOs implementing OVC programmes (and other public health programmes) can organize themselves for data collection and documentation prospectively during the implementation of their OVC programmes so that costing analyses become routine practice to inform programme implementation rather than a painful and flawed retrospective activity. Such information is required if the costs and outcomes achieved by OVC programmes will ever be clearly documented and compared across OVC programmes and other types of programmes (prevention, treatment, etc.).
Analysis of Nonlinear Periodic and Aperiodic Media: Application to Optical Logic Gates
NASA Astrophysics Data System (ADS)
Yu, Yisheng
This dissertation is about the analysis of nonlinear periodic and aperiodic media and their application to the design of intensity controlled all optical logic gates: AND, OR, and NOT. A coupled nonlinear differential equation that characterizes the electromagnetic wave propagation in a nonlinear periodic (and aperiodic) medium has been derived from the first principle. The equations are general enough that it reflects the effect of transverse modal fields and can be used to analyze both co-propagating and counter propagating waves. A numerical technique based on the finite differences method and absorbing boundary condition has been developed to solve the coupled differential equations here. The numerical method is simple and accurate. Unlike the method based on characteristics that has been reported in the literature, this method does not involve integration and step sizes of time and space coordinates are decoupled. The decoupling provides independent choice for time and space step sizes. The concept of "gap soliton" has also been re-examined. The dissertation consists of four manuscripts. Manuscript I reports on the design of all optical logic gates: AND, OR, and NOT based on the bistability property of nonlinear periodic and aperiodic waveguiding structures. The functioning of the logic gates has been shown by analysis. The numerical technique that has been developed to solve the nonlinear differential equations are addressed in manuscript II. The effect of transverse modal fields on the bistable property of nonlinear periodic medium is reported in manuscript III. The concept of "gap soliton" that are generated in a nonlinear periodic medium has been re-examined. The details on the finding of the re-examination are discussed in manuscript IV.
Using Pipelined XNOR Logic to Reduce SEU Risks in State Machines
NASA Technical Reports Server (NTRS)
Le, Martin; Zheng, Xin; Katanyoutant, Sunant
2008-01-01
Single-event upsets (SEUs) pose great threats to avionic systems state machine control logic, which are frequently used to control sequence of events and to qualify protocols. The risks of SEUs manifest in two ways: (a) the state machine s state information is changed, causing the state machine to unexpectedly transition to another state; (b) due to the asynchronous nature of SEU, the state machine's state registers become metastable, consequently causing any combinational logic associated with the metastable registers to malfunction temporarily. Effect (a) can be mitigated with methods such as triplemodular redundancy (TMR). However, effect (b) cannot be eliminated and can degrade the effectiveness of any mitigation method of effect (a). Although there is no way to completely eliminate the risk of SEU-induced errors, the risk can be made very small by use of a combination of very fast state-machine logic and error-detection logic. Therefore, one goal of two main elements of the present method is to design the fastest state-machine logic circuitry by basing it on the fastest generic state-machine design, which is that of a one-hot state machine. The other of the two main design elements is to design fast error-detection logic circuitry and to optimize it for implementation in a field-programmable gate array (FPGA) architecture: In the resulting design, the one-hot state machine is fitted with a multiple-input XNOR gate for detection of illegal states. The XNOR gate is implemented with lookup tables and with pipelines for high speed. In this method, the task of designing all the logic must be performed manually because no currently available logic synthesis software tool can produce optimal solutions of design problems of this type. However, some assistance is provided by a script, written for this purpose in the Python language (an object-oriented interpretive computer language) to automatically generate hardware description language (HDL) code from state-transition rules.
Efficient G(sup 4)FET-Based Logic Circuits
NASA Technical Reports Server (NTRS)
Vatan, Farrokh
2008-01-01
A total of 81 optimal logic circuits based on four-gate field-effect transistors (G(sup 4)4FETs) have been designed to implement all Boolean functions of up to three variables. The purpose of this development was to lend credence to the expectation that logic circuits based on G(sup 4)FETs could be more efficient (in the sense that they could contain fewer transistors), relative to functionally equivalent logic circuits based on conventional transistors. A G(sup 4)FET a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G(sup 4)FET can also be regarded as a single device having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of a silicon-on-insulator substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. One such option is to design a G(sup 4)FET to function as a three-input NOT-majority gate, which has been shown to be a universal and programmable logic gate. Optimal NOT-majority-gate, G(sup 4)FET-based logic-circuit designs were obtained in a comparative study that also included formulation of functionally equivalent logic circuits based on NOR and NAND gates implemented by use of conventional transistors. In the study, the problem of finding the optimal design for each logic function and each transistor type was solved as an integer-programming optimization problem. Considering all 81 non-equivalent Boolean functions included in the study, it was found that in 63% of the cases, fewer logic gates (and, hence, fewer transistors) would be needed in the G(sup 4)FET-based implementations.
Pruttivarasin, Thaned; Katori, Hidetoshi
2015-11-01
We present a compact field-programmable gate array (FPGA) based pulse sequencer and radio-frequency (RF) generator suitable for experiments with cold trapped ions and atoms. The unit is capable of outputting a pulse sequence with at least 32 transistor-transistor logic (TTL) channels with a timing resolution of 40 ns and contains a built-in 100 MHz frequency counter for counting electrical pulses from a photo-multiplier tube. There are 16 independent direct-digital-synthesizers RF sources with fast (rise-time of ∼60 ns) amplitude switching and sub-mHz frequency tuning from 0 to 800 MHz.
Gich, Jordi; Freixenet, Jordi; Garcia, Rafael; Vilanova, Joan Carles; Genís, David; Silva, Yolanda; Montalban, Xavier; Ramió-Torrentà, Lluís
2015-09-01
Cognitive rehabilitation is often delayed in multiple sclerosis (MS). To develop a free and specific cognitive rehabilitation programme for MS patients to be used from early stages that does not interfere with daily living activities. MS-line!, cognitive rehabilitation materials consisting of written, manipulative and computer-based materials with difficulty levels developed by a multidisciplinary team. Mathematical, problem-solving and word-based exercises were designed. Physical materials included spatial, coordination and reasoning games. Computer-based material included logic and reasoning, working memory and processing speed games. Cognitive rehabilitation exercises that are specific for MS patients have been successfully developed. © The Author(s), 2014.
Photonic Programmable Tele-Cloning Network
Li, Wei; Chen, Ming-Cheng
2016-01-01
The concept of quantum teleportation allows an unknown quantum states to be broadcasted and processed in a distributed quantum network. The quantum information injected into the network can be diluted to distant multi-copies by quantum cloning and processed by arbitrary quantum logic gates which were programed in advance in the network quantum state. A quantum network combines simultaneously these fundamental quantum functions could lead to new intriguing applications. Here we propose a photonic programmable telecloning network based on a four-photon interferometer. The photonic network serves as quantum gate, quantum cloning and quantum teleportation and features experimental advantage of high brightness by photon recycling. PMID:27353838
DOE Office of Scientific and Technical Information (OSTI.GOV)
Pruttivarasin, Thaned, E-mail: thaned.pruttivarasin@riken.jp; Katori, Hidetoshi; Innovative Space-Time Project, ERATO, JST, Bunkyo-ku, Tokyo 113-8656
We present a compact field-programmable gate array (FPGA) based pulse sequencer and radio-frequency (RF) generator suitable for experiments with cold trapped ions and atoms. The unit is capable of outputting a pulse sequence with at least 32 transistor-transistor logic (TTL) channels with a timing resolution of 40 ns and contains a built-in 100 MHz frequency counter for counting electrical pulses from a photo-multiplier tube. There are 16 independent direct-digital-synthesizers RF sources with fast (rise-time of ∼60 ns) amplitude switching and sub-mHz frequency tuning from 0 to 800 MHz.
Memristor-based programmable logic array (PLA) and analysis as Memristive networks.
Lee, Kwan-Hee; Lee, Sang-Jin; Kim, Seok-Man; Cho, Kyoungrok
2013-05-01
A Memristor theorized by Chua in 1971 has the potential to dramatically influence the way electronic circuits are designed. It is a two terminal device whose resistance state is based on the history of charge flow brought about as the result of the voltage being applied across its terminals and hence can be thought of as a special case of a reconfigurable resistor. Nanoscale devices using dense and regular fabrics such as Memristor cross-bar is promising new architecture for System-on-Chip (SoC) implementations in terms of not only the integration density that the technology can offer but also both improved performance and reduced power dissipation. Memristor has the capacity to switch between high and low resistance states in a cross-bar circuit configuration. The cross-bars are formed from an array of vertical conductive nano-wires cross a second array of horizontal conductive wires. Memristors are realized at the intersection of the two wires in the array through appropriate processing technology such that any particular wire in the vertical array can be connected to a wire in the horizontal array by switching the resistance of a particular intersection to a low state while other cross-points remain in a high resistance state. However the approach introduces a number of challenges. The lack of voltage gain prevents logic being cascaded and voltage level degradation affects robustness of the operation. Moreover the cross-bars introduce sneak current paths when two or more cross points are connected through the switched Memristor. In this paper, we propose Memristor-based programmable logic array (PLA) architecture and develop an analytical model to analyze the logic level on the memristive networks. The proposed PLA architecture has 12 inputs maximum and can be cascaded for more input variables with R(off)/R(on) ratio in the range from 55 to 160 of Memristors.
Development of Algorithms for Control of Humidity in Plant Growth Chambers
NASA Technical Reports Server (NTRS)
Costello, Thomas A.
2003-01-01
Algorithms were developed to control humidity in plant growth chambers used for research on bioregenerative life support at Kennedy Space Center. The algorithms used the computed water vapor pressure (based on measured air temperature and relative humidity) as the process variable, with time-proportioned outputs to operate the humidifier and de-humidifier. Algorithms were based upon proportional-integral-differential (PID) and Fuzzy Logic schemes and were implemented using I/O Control software (OPTO-22) to define and download the control logic to an autonomous programmable logic controller (PLC, ultimate ethernet brain and assorted input-output modules, OPTO-22), which performed the monitoring and control logic processing, as well the physical control of the devices that effected the targeted environment in the chamber. During limited testing, the PLC's successfully implemented the intended control schemes and attained a control resolution for humidity of less than 1%. The algorithms have potential to be used not only with autonomous PLC's but could also be implemented within network-based supervisory control programs. This report documents unique control features that were implemented within the OPTO-22 framework and makes recommendations regarding future uses of the hardware and software for biological research by NASA.
Auto-programmable impulse neural circuits
NASA Technical Reports Server (NTRS)
Watula, D.; Meador, J.
1990-01-01
Impulse neural networks use pulse trains to communicate neuron activation levels. Impulse neural circuits emulate natural neurons at a more detailed level than that typically employed by contemporary neural network implementation methods. An impulse neural circuit which realizes short term memory dynamics is presented. The operation of that circuit is then characterized in terms of pulse frequency modulated signals. Both fixed and programmable synapse circuits for realizing long term memory are also described. The implementation of a simple and useful unsupervised learning law is then presented. The implementation of a differential Hebbian learning rule for a specific mean-frequency signal interpretation is shown to have a straightforward implementation using digital combinational logic with a variation of a previously developed programmable synapse circuit. This circuit is expected to be exploited for simple and straightforward implementation of future auto-adaptive neural circuits.
Zhang, Haijiang; Wen, Pengyue; Esener, Sadik
2007-07-01
We report, for the first time to our knowledge, the operation of a cascadable, low-optical-switching-power(~10 microW) small-area (~100 microm(2)) high-speed (80 ps fall time) all-optical inverter. This inverter employs cross-gain modulation, polarization gain anisotropy, and highly nonlinear gain characteristics of an electrically pumped vertical-cavity semiconductor optical amplifier (VCSOA). The measured transfer characteristics of such an optical inverter resemble those of standard electronic metal-oxide semiconductor field-effect transistor-based inverters exhibiting high noise margin and high extinction ratio (~9.3 dB), making VCSOAs an ideal building block for all-optical logic and memory.
Ikeda, Masato; Tanida, Tatsuya; Yoshii, Tatsuyuki; Kurotani, Kazuya; Onogi, Shoji; Urayama, Kenji; Hamachi, Itaru
2014-06-01
Soft materials that exhibit stimuli-responsive behaviour under aqueous conditions (such as supramolecular hydrogels composed of self-assembled nanofibres) have many potential biological applications. However, designing a macroscopic response to structurally complex biochemical stimuli in these materials still remains a challenge. Here we show that redox-responsive peptide-based hydrogels have the ability to encapsulate enzymes and still retain their activities. Moreover, cooperative coupling of enzymatic reactions with the gel response enables us to construct unique stimuli-responsive soft materials capable of sensing a variety of disease-related biomarkers. The programmable gel-sol response (even to biological samples) is visible to the naked eye. Furthermore, we built Boolean logic gates (OR and AND) into the hydrogel-enzyme hybrid materials, which were able to sense simultaneously plural specific biochemicals and execute a controlled drug release in accordance with the logic operation. The intelligent soft materials that we have developed may prove valuable in future medical diagnostics or treatments.
Engineered modular biomaterial logic gates for environmentally triggered therapeutic delivery
NASA Astrophysics Data System (ADS)
Badeau, Barry A.; Comerford, Michael P.; Arakawa, Christopher K.; Shadish, Jared A.; Deforest, Cole A.
2018-03-01
The successful transport of drug- and cell-based therapeutics to diseased sites represents a major barrier in the development of clinical therapies. Targeted delivery can be mediated through degradable biomaterial vehicles that utilize disease biomarkers to trigger payload release. Here, we report a modular chemical framework for imparting hydrogels with precise degradative responsiveness by using multiple environmental cues to trigger reactions that operate user-programmable Boolean logic. By specifying the molecular architecture and connectivity of orthogonal stimuli-labile moieties within material cross-linkers, we show selective control over gel dissolution and therapeutic delivery. To illustrate the versatility of this methodology, we synthesized 17 distinct stimuli-responsive materials that collectively yielded all possible YES/OR/AND logic outputs from input combinations involving enzyme, reductant and light. Using these hydrogels we demonstrate the first sequential and environmentally stimulated release of multiple cell lines in well-defined combinations from a material. We expect these platforms will find utility in several diverse fields including drug delivery, diagnostics and regenerative medicine.
NASA Astrophysics Data System (ADS)
Ikeda, Masato; Tanida, Tatsuya; Yoshii, Tatsuyuki; Kurotani, Kazuya; Onogi, Shoji; Urayama, Kenji; Hamachi, Itaru
2014-06-01
Soft materials that exhibit stimuli-responsive behaviour under aqueous conditions (such as supramolecular hydrogels composed of self-assembled nanofibres) have many potential biological applications. However, designing a macroscopic response to structurally complex biochemical stimuli in these materials still remains a challenge. Here we show that redox-responsive peptide-based hydrogels have the ability to encapsulate enzymes and still retain their activities. Moreover, cooperative coupling of enzymatic reactions with the gel response enables us to construct unique stimuli-responsive soft materials capable of sensing a variety of disease-related biomarkers. The programmable gel-sol response (even to biological samples) is visible to the naked eye. Furthermore, we built Boolean logic gates (OR and AND) into the hydrogel-enzyme hybrid materials, which were able to sense simultaneously plural specific biochemicals and execute a controlled drug release in accordance with the logic operation. The intelligent soft materials that we have developed may prove valuable in future medical diagnostics or treatments.
Engineered modular biomaterial logic gates for environmentally triggered therapeutic delivery.
Badeau, Barry A; Comerford, Michael P; Arakawa, Christopher K; Shadish, Jared A; DeForest, Cole A
2018-03-01
The successful transport of drug- and cell-based therapeutics to diseased sites represents a major barrier in the development of clinical therapies. Targeted delivery can be mediated through degradable biomaterial vehicles that utilize disease biomarkers to trigger payload release. Here, we report a modular chemical framework for imparting hydrogels with precise degradative responsiveness by using multiple environmental cues to trigger reactions that operate user-programmable Boolean logic. By specifying the molecular architecture and connectivity of orthogonal stimuli-labile moieties within material cross-linkers, we show selective control over gel dissolution and therapeutic delivery. To illustrate the versatility of this methodology, we synthesized 17 distinct stimuli-responsive materials that collectively yielded all possible YES/OR/AND logic outputs from input combinations involving enzyme, reductant and light. Using these hydrogels we demonstrate the first sequential and environmentally stimulated release of multiple cell lines in well-defined combinations from a material. We expect these platforms will find utility in several diverse fields including drug delivery, diagnostics and regenerative medicine.
Bidirectional automatic release of reserve for low voltage network made with low capacity PLCs
NASA Astrophysics Data System (ADS)
Popa, I.; Popa, G. N.; Diniş, C. M.; Deaconu, S. I.
2018-01-01
The article presents the design of a bidirectional automatic release of reserve made on two types low capacity programmable logic controllers: PS-3 from Klöckner-Moeller and Zelio from Schneider. It analyses the electronic timing circuits that can be used for making the bidirectional automatic release of reserve: time-on delay circuit and time-off delay circuit (two types). In the paper are present the sequences code for timing performed on the PS-3 PLC, the logical functions for the bidirectional automatic release of reserve, the classical control electrical diagram (with contacts, relays, and time relays), the electronic control diagram (with logical gates and timing circuits), the code (in IL language) made for the PS-3 PLC, and the code (in FBD language) made for Zelio PLC. A comparative analysis will be carried out on the use of the two types of PLC and will be present the advantages of using PLCs.
Hussain, Mahmood Irtiza; Petrasiunas, Matthew Joseph; Bentley, Christopher D B; Taylor, Richard L; Carvalho, André R R; Hope, Joseph J; Streed, Erik W; Lobino, Mirko; Kielpinski, David
2016-07-25
Trapped ions are one of the most promising approaches for the realization of a universal quantum computer. Faster quantum logic gates could dramatically improve the performance of trapped-ion quantum computers, and require the development of suitable high repetition rate pulsed lasers. Here we report on a robust frequency upconverted fiber laser based source, able to deliver 2.5 ps ultraviolet (UV) pulses at a stabilized repetition rate of 300.00000 MHz with an average power of 190 mW. The laser wavelength is resonant with the strong transition in Ytterbium (Yb+) at 369.53 nm and its repetition rate can be scaled up using high harmonic mode locking. We show that our source can produce arbitrary pulse patterns using a programmable pulse pattern generator and fast modulating components. Finally, simulations demonstrate that our laser is capable of performing resonant, temperature-insensitive, two-qubit quantum logic gates on trapped Yb+ ions faster than the trap period and with fidelity above 99%.
Eye vision system using programmable micro-optics and micro-electronics
NASA Astrophysics Data System (ADS)
Riza, Nabeel A.; Amin, M. Junaid; Riza, Mehdi N.
2014-02-01
Proposed is a novel eye vision system that combines the use of advanced micro-optic and microelectronic technologies that includes programmable micro-optic devices, pico-projectors, Radio Frequency (RF) and optical wireless communication and control links, energy harvesting and storage devices and remote wireless energy transfer capabilities. This portable light weight system can measure eye refractive powers, optimize light conditions for the eye under test, conduct color-blindness tests, and implement eye strain relief and eye muscle exercises via time sequenced imaging. Described is the basic design of the proposed system and its first stage system experimental results for vision spherical lens refractive error correction.
NASA Technical Reports Server (NTRS)
Bains, R. W.; Herwig, H. A.; Luedeman, J. K.; Torina, E. M.
1974-01-01
The Shuttle Electric Power System (SEPS) computer program is considered in terms of the program manual, programmer guide, and program utilization. The main objective is to provide the information necessary to interpret and use the routines comprising the SEPS program. Subroutine descriptions including the name, purpose, method, variable definitions, and logic flow are presented.
ERIC Educational Resources Information Center
Fear, William J.
2007-01-01
This paper argues that the formulation of policy, at whatever level, to whatever scale or scope, is any different to the myriad of processes involved in strategic planning within and between organisations, and the attendant decision making processes that abound in such an environment (Hage, 1980; Hickson, 1987; Thompson, 1967; Weick, 1976). Those…
Firmware Counterfeiting and Modification Attacks on Programmable Logic Controllers
2013-03-01
86 5.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Appendix A: ControlLogix Firmware Operation Flowcharts ...direct analysis of firmware on the device. 87 Appendix A: ControlLogix Firmware Operation Flowcharts Figure A.1: Overview of ControlLogix L61 operation...105 [43] Oshana, Rob. “Introduction to JTAG”. Embedded, October 29, 2002. URL http://www.embedded.com/electronics-blogs/ beginner -s-corner/4024466
Automatic Configuration of Programmable Logic Controller Emulators
2015-03-01
25 11 Example tree generated using UPGMA [Edw13] . . . . . . . . . . . . . . . . . . . . 33 12 Example sequence alignment for two... UPGMA Unweighted Pair Group Method with Arithmetic Mean URL uniform resource locator VM virtual machine XML Extensible Markup Language xx List of...appearance in the ses- sion, and then they are clustered again using Unweighted Pair Group Method with Arithmetic Mean ( UPGMA ) with a distance matrix based
ERIC Educational Resources Information Center
Leung, Maggi W. H.; Waters, Johanna L.
2013-01-01
The fundamental logic of transnational education programmes is a one-to-one transfer of institutional capital across space and an unimportance of place. This article interrogates these presumptions and argues that space and place play an important role in transnational education. Drawing on research that examines the experiences of students and…
Control Systems of Rubber Dryer Machinery Components Using Programmable Logic Control (PLC)
NASA Astrophysics Data System (ADS)
Hendra; Yulianto, A. S.; Indriani, A.; Hernadewita; Hermiyetti
2018-02-01
Application of programmable logic control (PLC) is widely used on the control systems in the many field engineering such as automotive, aviation, food processing and other industries [1-2]. PLC is simply program to control many automatic activity, easy to use, flexible and others. PLC using the ladder program to solve and regulated the control system component. In previous research, PLC was used for control system of rotary dryer machine. In this paper PLC are used for control system of motion component in the rubber dryer machinery. Component of rubber dryer machine is motors, gearbox, sprocket, heater, drying chamber and bearing. Principle working of rubber dryer machinery is wet rubber moving into the drying chamber by sprocket. Sprocket is driven by motors that conducted by PLC to moving and set of wet rubber on the drying chamber. Drying system uses greenhouse effect by making hanger dryer design in the form of line path. In this paper focused on motion control system motors and sensors drying rubber using PLC. The results show that control system of rubber dryer machinery can work in accordance control input and the time required to dry the rubber.
Project-Based Learning in Programmable Logic Controller
NASA Astrophysics Data System (ADS)
Seke, F. R.; Sumilat, J. M.; Kembuan, D. R. E.; Kewas, J. C.; Muchtar, H.; Ibrahim, N.
2018-02-01
Project-based learning is a learning method that uses project activities as the core of learning and requires student creativity in completing the project. The aims of this study is to investigate the influence of project-based learning methods on students with a high level of creativity in learning the Programmable Logic Controller (PLC). This study used experimental methods with experimental class and control class consisting of 24 students, with 12 students of high creativity and 12 students of low creativity. The application of project-based learning methods into the PLC courses combined with the level of student creativity enables the students to be directly involved in the work of the PLC project which gives them experience in utilizing PLCs for the benefit of the industry. Therefore, it’s concluded that project-based learning method is one of the superior learning methods to apply on highly creative students to PLC courses. This method can be used as an effort to improve student learning outcomes and student creativity as well as to educate prospective teachers to become reliable educators in theory and practice which will be tasked to create qualified human resources candidates in order to meet future industry needs.
McKnight, Jacob; Holt, Douglas B
2014-01-01
Expanded Programme on Immunisation (EPI) vaccination rates remain well below herd immunity in regions of many countries despite huge international resources devoted to both financing and access. We draw upon service marketing theory, organisational sociology, development anthropology and cultural consumer research to conduct an ethnographic study of vaccination delivery in Jimma Zone, Ethiopia - one such region. We find that Western public health sector policies are dominated by an administrative logic. Critical failures in delivery are produced by a system that obfuscates the on-the-ground problems that mothers face in trying to vaccinate their children, while instead prioritising administrative processes. Our ethnographic analysis of 83 mothers who had not vaccinated their children reveals key barriers to vaccination from a 'customer' perspective. While mothers value vaccination, it is a 'low involvement' good compared to the acute daily needs of a subsistence life. The costs imposed by poor service - such as uncaring staff with class hostilities, unpredictable and missed schedules and long waits - are too much and so they forego the service. Our service design framework illuminates specific service problems from the mother's perspective and points towards simple service innovations that could improve vaccination rates in regions that have poor uptake.
NASA Astrophysics Data System (ADS)
Carrillo-Delgado, C.; García-Gil, C. I.; Trejo-Valdez, M.; Torres-Torres, C.; García-Merino, J. A.; Martínez-Gutiérrez, H.; Khomenko, A. V.; Torres-Martínez, R.
2016-01-01
Measurements of the third-order nonlinear optical properties exhibited by a ZnO thin solid film deposited on a SnO2 substrate are presented. The samples were prepared by a spray pyrolysis processing route. Scanning electron microscopy analysis and UV-Vis spectroscopy studies were carried out. The picosecond response at 1064 nm was explored by the z-scan technique. A large optical Kerr effect with two-photon absorption was obtained. The inhibition of the nonlinear optical absorption together with a noticeable enhancement in the optical Kerr effect in the sample was achieved by the incorporation of Au nanoparticles into the ZnO film. Additionally, a two-wave mixing configuration at 532 nm was performed and an optical Kerr effect was identified as the main cause of the nanosecond third-order optical nonlinearity. The relaxation time of the photothermal response of the sample was estimated to be about 1 s when the sample was excited by nanosecond single-shots. The rotation of the sample during the nanosecond two-wave mixing experiments was analyzed. It was stated that a non-monotonic relation between rotating frequency and pulse repetition rate governs the thermal contribution to the nonlinear refractive index exhibited by a rotating film. Potential applications for switching photothermal interactions in rotating samples can be contemplated. A rotary logic system dependent on Kerr transmittance in a two-wave mixing experiment was proposed.
Yu, Ruomeng; Wu, Wenzhuo; Pan, Caofeng; Wang, Zhaona; Ding, Yong; Wang, Zhong Lin
2015-02-04
Using polarization charges created at the metal-cadmium sulfide interface under strain to gate/modulate electrical transport and optoelectronic processes of charge carriers, the piezo-phototronic effect is applied to process mechanical and optical stimuli into electronic controlling signals. The cascade nanowire networks are demonstrated for achieving logic gates, binary computations, and gated D latches to store information carried by these stimuli. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
NASA Technical Reports Server (NTRS)
Shay, Thomas M. (Inventor); Poliakov, Evgeni Y. (Inventor); Hazzard, David A. (Inventor)
2001-01-01
An apparatus and method wherein polarization rotation in alkali vapors or other mediums is used for all-optical switching and digital logic and where the rate of operation is proportional to the amplitude of the pump field. High rates of speed are accomplished by Rabi flopping of the atomic states using a continuously operating monochromatic atomic beam as the pump.
Datta, Asit K; Munshi, Soumika
2002-03-10
Based on the negabinary number representation, parallel one-step arithmetic operations (that is, addition and subtraction), logical operations, and matrix-vector multiplication on data have been optically implemented, by use of a two-dimensional spatial-encoding technique. For addition and subtraction, one of the operands in decimal form is converted into the unsigned negabinary form, whereas the other decimal number is represented in the signed negabinary form. The result of operation is obtained in the mixed negabinary form and is converted back into decimal. Matrix-vector multiplication for unsigned negabinary numbers is achieved through the convolution technique. Both of the operands for logical operation are converted to their signed negabinary forms. All operations are implemented by use of a unique optical architecture. The use of a single liquid-crystal-display panel to spatially encode the input data, operational kernels, and decoding masks have simplified the architecture as well as reduced the cost and complexity.
Rivas, David; Muñoz-Matutano, Guillermo; Canet-Ferrer, Josep; García-Calzada, Raúl; Trevisi, Giovanna; Seravalli, Luca; Frigeri, Paola; Martínez-Pastor, Juan P
2014-02-12
In this work, we propose the use of the Hanbury-Brown and Twiss interferometric technique and a switchable two-color excitation method for evaluating the exciton and noncorrelated electron-hole dynamics associated with single photon emission from indium arsenide (InAs) self-assembled quantum dots (QDs). Using a microstate master equation model we demonstrate that our single QDs are described by nonlinear exciton dynamics. The simultaneous detection of two-color, single photon emission from InAs QDs using these nonlinear dynamics was used to design a NOT AND logic transference function. This computational functionality combines the advantages of working with light/photons as input/output device parameters (all-optical system) and that of a nanodevice (QD size of ∼ 20 nm) while also providing high optical sensitivity (ultralow optical power operational requirements). These system features represent an important and interesting step toward the development of new prototypes for the incoming quantum information technologies.
DNA-Based Dynamic Reaction Networks.
Fu, Ting; Lyu, Yifan; Liu, Hui; Peng, Ruizi; Zhang, Xiaobing; Ye, Mao; Tan, Weihong
2018-05-21
Deriving from logical and mechanical interactions between DNA strands and complexes, DNA-based artificial reaction networks (RNs) are attractive for their high programmability, as well as cascading and fan-out ability, which are similar to the basic principles of electronic logic gates. Arising from the dream of creating novel computing mechanisms, researchers have placed high hopes on the development of DNA-based dynamic RNs and have strived to establish the basic theories and operative strategies of these networks. This review starts by looking back on the evolution of DNA dynamic RNs; in particular' the most significant applications in biochemistry occurring in recent years. Finally, we discuss the perspectives of DNA dynamic RNs and give a possible direction for the development of DNA circuits. Copyright © 2018. Published by Elsevier Ltd.
Fuzzy logic based on-line fault detection and classification in transmission line.
Adhikari, Shuma; Sinha, Nidul; Dorendrajit, Thingam
2016-01-01
This study presents fuzzy logic based online fault detection and classification of transmission line using Programmable Automation and Control technology based National Instrument Compact Reconfigurable i/o (CRIO) devices. The LabVIEW software combined with CRIO can perform real time data acquisition of transmission line. When fault occurs in the system current waveforms are distorted due to transients and their pattern changes according to the type of fault in the system. The three phase alternating current, zero sequence and positive sequence current data generated by LabVIEW through CRIO-9067 are processed directly for relaying. The result shows that proposed technique is capable of right tripping action and classification of type of fault at high speed therefore can be employed in practical application.
Chen, Lichan; Zeng, Xiaoting; Dandapat, Anirban; Chi, Yuwu; Kim, Donghwan
2015-09-01
Proteases and nucleases are enzymes heavily involved in many important biological processes, such as cancer initiation, progression, and metastasis; hence, they are indicative of potential diagnostic biomarkers. Here, we demonstrate a new label free and sensitive electrochemiluminescent (ECL) sensing strategy for protease and nuclease assays that utilize target-triggered desorption of programmable polyelectrolyte films assembled on graphite-like carbon nitride (g-C3N4) film to regulate the diffusion flux of a coreactant. Furthermore, we have built Boolean logic gates OR and AND into the polyelectrolyte films, capable of simultaneously sensing proteases and nucleases in a complicated system by breaking it into simple functions. The developed intelligent permeability controlled enzyme sensor may prove valuable in future medical diagnostics.
NASA Astrophysics Data System (ADS)
Wang, Meng; Deng, Ming; Luo, Xianhu; Zhao, Qingxian; Chen, Kai; Jing, Jianen
2018-02-01
The marine controlled source electromagnetic (CSEM) method has been recognized as an effective exploration method of shallow hydrocarbons around the world. We developed our own underwater marine CSEM transmitter that consisted of many functional modules with various response times. We previously adopted a centralized software-control technology to design the transmitter circuit topological structure. That structure probably generated a control disorder or malfunction. These undesirable conditions could lead to repeated recovery and deployment of the transmitter, which not only consumed time but also affected data continuity and establishment of stable and continuous CSEM field. We developed an instrument design concept named ‘control technology of hardware parallelism’. In this design, a noteworthy innovation of our new technology is to solve the above-mentioned problems at the physical and fundamental levels. We used several self-contained control-units to simultaneously accomplish the predetermined functions of the transmitter. The new solution relies on two technologies: multi-core embedded technology and multi-channel parallel optical-fiber data transmission technology. The first technology depends on many independent microcontrollers. Every microcontroller is only used to achieve a customized function. The second one relies on several multiple optical-fiber transmission channels realized by a complex programmable logic device and two optical-fiber conversion devices, which are used to establish a communication link between the shipboard monitoring and control-unit and underwater transmitter. We have conducted some marine experiments to verify the reliability and stability of the new method. In particular, the new technology used in the transmitter system could help us obtain more useful measured data in a limited time, improve real-time efficiency, and support the establishment of a stable CSEM field.
Optical control of resonant light transmission for an atom-cavity system
NASA Astrophysics Data System (ADS)
Sharma, Arijit; Ray, Tridib; Sawant, Rahul V.; Sheikholeslami, G.; Rangwala, S. A.; Budker, D.
2015-04-01
We demonstrate the manipulation of transmitted light through an optical Fabry-Pérot cavity, built around a spectroscopy cell containing enriched rubidium vapor. Light resonant with the 87RbD2 (F =2 ,F =1 ) ↔F' manifold is controlled by the transverse intersection of the cavity mode by another resonant light beam. The cavity transmission can be suppressed or enhanced depending on the coupling of atomic states due to the intersecting beams. The extreme manifestation of the cavity-mode control is the precipitous destruction (negative logic switching) or buildup (positive logic switching) of the transmitted light intensity on intersection of the transverse control beam with the cavity mode. Both the steady-state and transient responses are experimentally investigated. The mechanism behind the change in cavity transmission is discussed in brief.
Hybrid Toffoli gate on photons and quantum spins
Luo, Ming-Xing; Ma, Song-Ya; Chen, Xiu-Bo; Wang, Xiaojun
2015-01-01
Quantum computation offers potential advantages in solving a number of interesting and difficult problems. Several controlled logic gates, the elemental building blocks of quantum computer, have been realized with various physical systems. A general technique was recently proposed that significantly reduces the realization complexity of multiple-control logic gates by harnessing multi-level information carriers. We present implementations of a key quantum circuit: the three-qubit Toffoli gate. By exploring the optical selection rules of one-sided optical microcavities, a Toffoli gate may be realized on all combinations of photon and quantum spins in the QD-cavity. The three general controlled-NOT gates are involved using an auxiliary photon with two degrees of freedom. Our results show that photons and quantum spins may be used alternatively in quantum information processing. PMID:26568078
Hybrid Toffoli gate on photons and quantum spins.
Luo, Ming-Xing; Ma, Song-Ya; Chen, Xiu-Bo; Wang, Xiaojun
2015-11-16
Quantum computation offers potential advantages in solving a number of interesting and difficult problems. Several controlled logic gates, the elemental building blocks of quantum computer, have been realized with various physical systems. A general technique was recently proposed that significantly reduces the realization complexity of multiple-control logic gates by harnessing multi-level information carriers. We present implementations of a key quantum circuit: the three-qubit Toffoli gate. By exploring the optical selection rules of one-sided optical microcavities, a Toffoli gate may be realized on all combinations of photon and quantum spins in the QD-cavity. The three general controlled-NOT gates are involved using an auxiliary photon with two degrees of freedom. Our results show that photons and quantum spins may be used alternatively in quantum information processing.
The Need for Optical Means as an Alternative for Electronic Computing
NASA Technical Reports Server (NTRS)
Adbeldayem, Hossin; Frazier, Donald; Witherow, William; Paley, Steve; Penn, Benjamin; Bank, Curtis; Whitaker, Ann F. (Technical Monitor)
2001-01-01
An increasing demand for faster computers is rapidly growing to encounter the fast growing rate of Internet, space communication, and robotic industry. Unfortunately, the Very Large Scale Integration technology is approaching its fundamental limits beyond which the device will be unreliable. Optical interconnections and optical integrated circuits are strongly believed to provide the way out of the extreme limitations imposed on the growth of speed and complexity of nowadays computations by conventional electronics. This paper demonstrates two ultra-fast, all-optical logic gates and a high-density storage medium, which are essential components in building the future optical computer.
Topics in linear optical quantum computation
NASA Astrophysics Data System (ADS)
Glancy, Scott Charles
This thesis covers several topics in optical quantum computation. A quantum computer is a computational device which is able to manipulate information by performing unitary operations on some physical system whose state can be described as a vector (or mixture of vectors) in a Hilbert space. The basic unit of information, called the qubit, is considered to be a system with two orthogonal states, which are assigned logical values of 0 and 1. Photons make excellent candidates to serve as qubits. They have little interactions with the environment. Many operations can be performed using very simple linear optical devices such as beam splitters and phase shifters. Photons can easily be processed through circuit-like networks. Operations can be performed in very short times. Photons are ideally suited for the long-distance communication of quantum information. The great difficulty in constructing an optical quantum computer is that photons naturally interact weakly with one another. This thesis first gives a brief review of two early approaches to optical quantum computation. It will describe how any discrete unitary operation can be performed using a single photon and a network of beam splitters, and how the Kerr effect can be used to construct a two photon logic gate. Second, this work provides a thorough introduction to the linear optical quantum computer developed by Knill, Laflamme, and Milburn. It then presents this author's results on the reliability of this scheme when implemented using imperfect photon detectors. This author finds that quantum computers of this sort cannot be built using current technology. Third, this dissertation describes a method for constructing a linear optical quantum computer using nearly orthogonal coherent states of light as the qubits. It shows how a universal set of logic operations can be performed, including calculations of the fidelity with which these operations may be accomplished. It discusses methods for reducing and correcting errors and recovering from failed operations. Lastly it describes an analysis of the long distance transmission of the coherent state qubits and shows how transmission errors can be corrected.
Issen, Laurel; Woodcock, Thomas; McNicholas, Christopher; Lennox, Laura; Reed, Julie E
2018-04-09
Despite criticisms that many quality improvement (QI) initiatives fail due to incomplete programme theory, there is no defined way to evaluate how programme theory has been articulated. The objective of this research was to develop, and assess the usability and reliability of scoring criteria to evaluate programme theory diagrams. Criteria development was informed by published literature and QI experts. Inter-rater reliability was tested between two evaluators. About 63 programme theory diagrams (42 driver diagrams and 21 action-effect diagrams) were reviewed to establish whether the criteria could support comparative analysis of different approaches to constructing diagrams. Components of the scoring criteria include: assessment of overall aim, logical overview, clarity of components, cause-effect relationships, evidence and measurement. Independent reviewers had 78% inter-rater reliability. Scoring enabled direct comparison of different approaches to developing programme theory; action-effect diagrams were found to have had a statistically significant but moderate improvement in programme theory quality over driver diagrams; no significant differences were observed based on the setting in which driver diagrams were developed. The scoring criteria summarise the necessary components of programme theory that are thought to contribute to successful QI projects. The viability of the scoring criteria for practical application was demonstrated. Future uses include assessment of individual programme theory diagrams and comparison of different approaches (e.g. methodological, teaching or other QI support) to produce programme theory. The criteria can be used as a tool to guide the production of better programme theory diagrams, and also highlights where additional support for QI teams could be needed.
NASA Technical Reports Server (NTRS)
Hsu, Ken-Yuh (Editor); Liu, Hua-Kuang (Editor)
1992-01-01
The present conference discusses optical neural networks, photorefractive nonlinear optics, optical pattern recognition, digital and analog processors, and holography and its applications. Attention is given to bifurcating optical information processing, neural structures in digital halftoning, an exemplar-based optical neural net classifier for color pattern recognition, volume storage in photorefractive disks, and microlaser-based compact optical neuroprocessors. Also treated are the optical implementation of a feature-enhanced optical interpattern-associative neural network model and its optical implementation, an optical pattern binary dual-rail logic gate module, a theoretical analysis for holographic associative memories, joint transform correlators, image addition and subtraction via the Talbot effect, and optical wavelet-matched filters. (No individual items are abstracted in this volume)
NASA Astrophysics Data System (ADS)
Hsu, Ken-Yuh; Liu, Hua-Kuang
The present conference discusses optical neural networks, photorefractive nonlinear optics, optical pattern recognition, digital and analog processors, and holography and its applications. Attention is given to bifurcating optical information processing, neural structures in digital halftoning, an exemplar-based optical neural net classifier for color pattern recognition, volume storage in photorefractive disks, and microlaser-based compact optical neuroprocessors. Also treated are the optical implementation of a feature-enhanced optical interpattern-associative neural network model and its optical implementation, an optical pattern binary dual-rail logic gate module, a theoretical analysis for holographic associative memories, joint transform correlators, image addition and subtraction via the Talbot effect, and optical wavelet-matched filters. (No individual items are abstracted in this volume)
Bio-logic analysis of injury biomarker patterns in human serum samples.
Zhou, Jian; Halámek, Jan; Bocharova, Vera; Wang, Joseph; Katz, Evgeny
2011-01-15
Digital biosensor systems analyzing biomarkers characteristic of liver injury (LI), soft tissue injury (STI) and abdominal trauma (ABT) were developed and optimized for their performance in serum solutions spiked with injury biomarkers in order to mimic real medical samples. The systems produced 'Alert'-type optical output signals in the form of "YES-NO" separated by a threshold value. The new approach aims at the reliable detection of injury biomarkers for making autonomous decisions towards timely therapeutic interventions, particularly in conditions when a hospital treatment is not possible. The enzyme-catalyzed reactions performing Boolean AND/NAND logic operations in the presence of different combinations of the injury biomarkers allowed high-fidelity biosensing. Robustness of the systems was confirmed by their operation in serum solutions, representing the first example of chemically performed logic analysis of biological fluids and a step closer towards practical biomedical applications of enzyme-logic bioassays. Copyright © 2010 Elsevier B.V. All rights reserved.
New designs of a complete set of Photonic Crystals logic gates
NASA Astrophysics Data System (ADS)
Hussein, Hussein M. E.; Ali, Tamer A.; Rafat, Nadia H.
2018-03-01
In this paper, we introduce new designs of all-optical OR, AND, XOR, NOT, NOR, NAND and XNOR logic gates based on the interference effect. The designs are built using 2D square lattice Photonic Crystal (PhC) structure of dielectric rods embedded in air background. The lattice constant, a, and the rod radius, r, are designed to achieve maximum operating range of frequencies using the gap map. We use the Plane Wave Expansion (PWE) method to obtain the band structure and the gap map of the proposed designs. The operating wavelengths achieve a wide band range that varies between 1266.9 nm and 1996 nm with center wavelength at 1550 nm. The Finite-Difference Time-Domain (FDTD) method is used to study the field behavior inside the PhC gates. The gates satisfy their truth tables with reasonable power contrast ratio between logic '1' and logic '0'.
Photonic content-addressable memory system that uses a parallel-readout optical disk
NASA Astrophysics Data System (ADS)
Krishnamoorthy, Ashok V.; Marchand, Philippe J.; Yayla, Gökçe; Esener, Sadik C.
1995-11-01
We describe a high-performance associative-memory system that can be implemented by means of an optical disk modified for parallel readout and a custom-designed silicon integrated circuit with parallel optical input. The system can achieve associative recall on 128 \\times 128 bit images and also on variable-size subimages. The system's behavior and performance are evaluated on the basis of experimental results on a motionless-head parallel-readout optical-disk system, logic simulations of the very-large-scale integrated chip, and a software emulation of the overall system.
Digital Optical Circuit Technology.
1985-03-01
ordinateurs ct des syst~mcs de diffusion de donn’es qui soient I la fois numcriques, entierement optiques. tres rapides etI I’abri des interferences et des...F.A.Hopf SESSION 11 - OPTICAL LOGIC PROSPECTS FOR PARALLEL NONLINEAR OPTICAL SIGNAL PROCESSING USING GaAs ETALONS AND ZnS INTERFERENCE FILTERS by...talks 1, 8, and 9) interference filters for room-temperature parallel processing. If one imposes a maximum heat load of 100 W/cm 2 , consistent with
3D Vectorial Time Domain Computational Integrated Photonics
DOE Office of Scientific and Technical Information (OSTI.GOV)
Kallman, J S; Bond, T C; Koning, J M
2007-02-16
The design of integrated photonic structures poses considerable challenges. 3D-Time-Domain design tools are fundamental in enabling technologies such as all-optical logic, photonic bandgap sensors, THz imaging, and fast radiation diagnostics. Such technologies are essential to LLNL and WFO sponsors for a broad range of applications: encryption for communications and surveillance sensors (NSA, NAI and IDIV/PAT); high density optical interconnects for high-performance computing (ASCI); high-bandwidth instrumentation for NIF diagnostics; micro-sensor development for weapon miniaturization within the Stockpile Stewardship and DNT programs; and applications within HSO for CBNP detection devices. While there exist a number of photonics simulation tools on the market,more » they primarily model devices of interest to the communications industry. We saw the need to extend our previous software to match the Laboratory's unique emerging needs. These include modeling novel material effects (such as those of radiation induced carrier concentrations on refractive index) and device configurations (RadTracker bulk optics with radiation induced details, Optical Logic edge emitting lasers with lateral optical inputs). In addition we foresaw significant advantages to expanding our own internal simulation codes: parallel supercomputing could be incorporated from the start, and the simulation source code would be accessible for modification and extension. This work addressed Engineering's Simulation Technology Focus Area, specifically photonics. Problems addressed from the Engineering roadmap of the time included modeling the Auston switch (an important THz source/receiver), modeling Vertical Cavity Surface Emitting Lasers (VCSELs, which had been envisioned as part of fast radiation sensors), and multi-scale modeling of optical systems (for a variety of applications). We proposed to develop novel techniques to numerically solve the 3D multi-scale propagation problem for both the microchip laser logic devices as well as devices characterized by electromagnetic (EM) propagation in nonlinear materials with time-varying parameters. The deliverables for this project were extended versions of the laser logic device code Quench2D and the EM propagation code EMsolve with new modules containing the novel solutions incorporated by taking advantage of the existing software interface and structured computational modules. Our approach was multi-faceted since no single methodology can always satisfy the tradeoff between model runtime and accuracy requirements. We divided the problems to be solved into two main categories: those that required Full Wave Methods and those that could be modeled using Approximate Methods. Full Wave techniques are useful in situations where Maxwell's equations are not separable (or the problem is small in space and time), while approximate techniques can treat many of the remaining cases.« less
Mwanza, Jean-Claude; Budenz, Donald L; Godfrey, David G; Neelakantan, Arvind; Sayyad, Fouad E; Chang, Robert T; Lee, Richard K
2014-04-01
To evaluate the glaucoma diagnostic performance of ganglion cell inner-plexiform layer (GCIPL) parameters used individually and in combination with retinal nerve fiber layer (RNFL) or optic nerve head (ONH) parameters measured with Cirrus HD-OCT (Carl Zeiss Meditec, Inc, Dublin, CA). Prospective cross-sectional study. Fifty patients with early perimetric glaucoma and 49 age-matched healthy subjects. Three peripapillary RNFL and 3 macular GCIPL scans were obtained in 1 eye of each participant. A patient was considered glaucomatous if at least 2 of the 3 RNFL or GCIPL scans had the average or at least 1 sector measurement flagged at 1% to 5% or less than 1%. The diagnostic performance was determined for each GCIPL, RNFL, and ONH parameter as well as for binary or-logic and and-logic combinations of GCIPL with RNFL or ONH parameters. Sensitivity, specificity, positive likelihood ratio (PLR), and negative likelihood ratio (NLR). Among GCIPL parameters, the minimum had the best diagnostic performance (sensitivity, 82.0%; specificity, 87.8%; PLR, 6.69; and NLR, 0.21). Inferior quadrant was the best RNFL parameter (sensitivity, 74%; specificity, 95.9%; PLR, 18.13; and NLR, 0.27), as was rim area (sensitivity, 68%; specificity, 98%; PLR, 33.3; and NLR, 0.33) among ONH parameters. The or-logic combination of minimum GCIPL and average RNFL provided the overall best diagnostic performance (sensitivity, 94%; specificity, 85.7%; PRL, 6.58; and NLR, 0.07) as compared with the best RNFL, best ONH, and best and-logic combination (minimum GCIPL and inferior quadrant RNFL; sensitivity, 64%; specificity, 100%; PLR, infinity; and NPR, 0.36). The binary or-logic combination of minimum GCIPL and average RNFL or rim area provides better diagnostic performances than those of and-logic combinations or best single GCIPL, RNFL, or ONH parameters. This finding may be clinically valuable for the diagnosis of early glaucoma. Copyright © 2014 American Academy of Ophthalmology. Published by Elsevier Inc. All rights reserved.
Radiation-hardened optically reconfigurable gate array exploiting holographic memory characteristics
NASA Astrophysics Data System (ADS)
Seto, Daisaku; Watanabe, Minoru
2015-09-01
In this paper, we present a proposal for a radiation-hardened optically reconfigurable gate array (ORGA). The ORGA is a type of field programmable gate array (FPGA). The ORGA configuration can be executed by the exploitation of holographic memory characteristics even if 20% of the configuration data are damaged. Moreover, the optoelectronic technology enables the high-speed reconfiguration of the programmable gate array. Such a high-speed reconfiguration can increase the radiation tolerance of its programmable gate array to 9.3 × 104 times higher than that of current FPGAs. Through experimentation, this study clarified the configuration dependability using the impulse-noise emulation and high-speed configuration capabilities of the ORGA with corrupt configuration contexts. Moreover, the radiation tolerance of the programmable gate array was confirmed theoretically through probabilistic calculation.
Optical computing, optical memory, and SBIRs at Foster-Miller
NASA Astrophysics Data System (ADS)
Domash, Lawrence H.
1994-03-01
A desktop design and manufacturing system for binary diffractive elements, MacBEEP, was developed with the optical researcher in mind. Optical processing systems for specialized tasks such as cellular automation computation and fractal measurement were constructed. A new family of switchable holograms has enabled several applications for control of laser beams in optical memories. New spatial light modulators and optical logic elements have been demonstrated based on a more manufacturable semiconductor technology. Novel synthetic and polymeric nonlinear materials for optical storage are under development in an integrated memory architecture. SBIR programs enable creative contributions from smaller companies, both product oriented and technology oriented, and support advances that might not otherwise be developed.
Zhu, Weigang; Zhu, Lingyun; Zou, Ye; Wu, Yishi; Zhen, Yonggang; Dong, Huanli; Fu, Hongbing; Wei, Zhixiang; Shi, Qiang; Hu, Wenping
2016-07-01
The charge transfer and photophysics in a new light-emitting cocrystal with ribbon-like morphology are revealed in-depth. These cocrystals can serve as an efficient 1D optical waveguide, and the cocrystal waveguide couplers fabricated by a probe-assisted crystal-moving technique exhibit interfacial white emission and can function as basic photonic logic gates, showing potential for future integrated photonics. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Fuzzy Logic Module of Convolutional Neural Network for Handwritten Digits Recognition
NASA Astrophysics Data System (ADS)
Popko, E. A.; Weinstein, I. A.
2016-08-01
Optical character recognition is one of the important issues in the field of pattern recognition. This paper presents a method for recognizing handwritten digits based on the modeling of convolutional neural network. The integrated fuzzy logic module based on a structural approach was developed. Used system architecture adjusted the output of the neural network to improve quality of symbol identification. It was shown that proposed algorithm was flexible and high recognition rate of 99.23% was achieved.
NASA Technical Reports Server (NTRS)
Adams, Michael J. (Editor)
1987-01-01
The present conference on novel optoelectronics discusses topics in the state-of-the-art in this field in the Netherlands, quantum wells, integrated optics, nonlinear optical devices and fiber-optic-based devices, ultrafast optics, and nonlinear optics and optical bistability. Attention is given to the production of fiber-optics for telecommunications by means of PCVD, lifetime broadening in quantum wells, nonlinear multiple quantum well waveguide devices, tunable single-wavelength lasers, an Si integrated waveguiding polarimeter, and an electrooptic light modulator using long-range surface plasmons. Also discussed are backward-wave couplers and reflectors, a wavelength-selective all-fiber switching matrix, the impact of ultrafast optics in high-speed electronics, the physics of low energy optical switching, and all-optical logical elements for optical processing.
NASA Astrophysics Data System (ADS)
Wang, Yonggang; Kuang, Jie; Liu, Chong; Cao, Qiang; Li, Deng
2017-03-01
A high performance multi-channel time-to-digital converter (TDC) is implemented in a Xilinx Zynq-7000 field programmable gate array (FPGA). It can be flexibly configured as either 32 TDC channels with 9.9 ps time-interval RMS precision, 16 TDC channels with 6.9 ps RMS precision, or 8 TDC channels with 5.8 ps RMS precision. All TDCs have a 380 M Samples/second measurement throughput and a 2.63 ns measurement dead time. The performance consistency and temperature dependence of TDC channels are also evaluated. Because Zynq-7000 FPGA family integrates a feature-rich dual-core ARM based processing system and 28 nm Xilinx programmable logic in a single device, the realization of high performance TDCs on it will make the platform more widely used in time-measuring related applications.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Not Available
The final report for the project is presented in five volumes. This volume is the Programmer's Manual. It covers: a system overview, attractiveness component of gravity model, trip-distribution component of gravity model, economic-effects model, and the consumer-surplus model. The project sought to determine the impact of Outer Continental Shelf development on recreation and tourism.
DOT National Transportation Integrated Search
2008-12-01
Programmable logic controllers (PLCs) were installed at several key ramps with the assistance of the City of Portland and used to capture additional data about ramp operations that are not otherwise logged. The data include include the activation and...
Firmware Modification Analysis in Programmable Logic Controllers
2014-03-27
security and operational requirements [18, 19]. Money is a factor for the DOD but not a driving one. With private industry, money is a primary influential... functions in the original firmware. A proof-of-concept experiment demonstrates the functionality of the analysis tool using different firmware versions...Opcode Difference Comparison . . . . . . . . . . . . . . 37 3.1.2.3 Function Difference Comparison . . . . . . . . . . . . . 37 3.1.2.4 Call Graph
Danger of Prolific Cybercrime and Network DDOS from Unprotected IoT Devices
been around for more than 40 years. But people didn't know about it because most of the internet of things was industrial internet of things. So when you had programmable logical controls, remote terminal for People Power Company. And Scott Wu is also from NewSky. He's on as well. And we'll talk a few
1998-04-01
selected is statistically based on the total number of faults and the failure rate distribution in the system under test. The fault set is also...implemented the BPM and system level emulation consolidation logic as well as statistics counters for cache misses and various bus transactions. These...instruction F22 Advanced Tactical Fighter FET Field Effect Transitor FF Flip-Flop FM Failures/Milhon hours C-3 FPGA Field Programmable Gate Array GET
Unappreciated epidemiology: the churn effect in a regional HIV care programme.
Gill, M J; Krentz, H B
2009-08-01
High levels of geographic mobility in and out of HIV care centres (i.e. the churn effect) can disrupt the continuity of patient care, misalign prevention services, impact local prevalence data perturbing optimal allocation of resources, and contribute to logical challenges in repeated transfer of health records. We report on the clinical, demographic, and administrative impact of high population turnover within HIV populations.