An amorphous titanium dioxide metal insulator metal selector device for resistive random access memory crossbar arrays with tunable voltage margin

NASA Astrophysics Data System (ADS)

Cortese, Simone; Khiat, Ali; Carta, Daniela; Light, Mark E.; Prodromakis, Themistoklis

2016-01-01

Resistive random access memory (ReRAM) crossbar arrays have become one of the most promising candidates for next-generation non volatile memories. To become a mature technology, the sneak path current issue must be solved without compromising all the advantages that crossbars offer in terms of electrical performances and fabrication complexity. Here, we present a highly integrable access device based on nickel and sub-stoichiometric amorphous titanium dioxide (TiO2-x), in a metal insulator metal crossbar structure. The high voltage margin of 3 V, amongst the highest reported for monolayer selector devices, and the good current density of 104 A/cm2 make it suitable to sustain ReRAM read and write operations, effectively tackling sneak currents in crossbars without compromising fabrication complexity in a 1 Selector 1 Resistor (1S1R) architecture. Furthermore, the voltage margin is found to be tunable by an annealing step without affecting the device's characteristics.

Random Access Memories: A New Paradigm for Target Detection in High Resolution Aerial Remote Sensing Images.

PubMed

Zou, Zhengxia; Shi, Zhenwei

2018-03-01

We propose a new paradigm for target detection in high resolution aerial remote sensing images under small target priors. Previous remote sensing target detection methods frame the detection as learning of detection model + inference of class-label and bounding-box coordinates. Instead, we formulate it from a Bayesian view that at inference stage, the detection model is adaptively updated to maximize its posterior that is determined by both training and observation. We call this paradigm "random access memories (RAM)." In this paradigm, "Memories" can be interpreted as any model distribution learned from training data and "random access" means accessing memories and randomly adjusting the model at detection phase to obtain better adaptivity to any unseen distribution of test data. By leveraging some latest detection techniques e.g., deep Convolutional Neural Networks and multi-scale anchors, experimental results on a public remote sensing target detection data set show our method outperforms several other state of the art methods. We also introduce a new data set "LEarning, VIsion and Remote sensing laboratory (LEVIR)", which is one order of magnitude larger than other data sets of this field. LEVIR consists of a large set of Google Earth images, with over 22 k images and 10 k independently labeled targets. RAM gives noticeable upgrade of accuracy (an mean average precision improvement of 1% ~ 4%) of our baseline detectors with acceptable computational overhead.

A Hardware Platform for Characterizing and Validating 1-Dimensional Optical Systems

DTIC Science & Technology

2014-09-01

principle laboratory experiments, a bread -board sensor and data collection system was created to gather fuze data to postprocess after the event...merely differentiates this bistable memory category from dynamic random access memory [RAM], which must be periodically refreshed to retain data.) A

50 CFR 660.15 - Equipment requirements.

Code of Federal Regulations, 2014 CFR

2014-10-01

... water, slime, mud, debris, or other materials. Scale printouts must show: (A) The vessel name and...; (ii) Random Access Memory (RAM): 256 megabytes (MB) or higher; (iii) Hard disk space: (A) If already...

50 CFR 660.15 - Equipment requirements.

Code of Federal Regulations, 2012 CFR

2012-10-01

... water, slime, mud, debris, or other materials. Scale printouts must show: (A) The vessel name and...; (ii) Random Access Memory (RAM): 256 megabytes (MB) or higher; (iii) Hard disk space: (A) If already...

50 CFR 660.15 - Equipment requirements.

Code of Federal Regulations, 2013 CFR

2013-10-01

... water, slime, mud, debris, or other materials. Scale printouts must show: (A) The vessel name and...; (ii) Random Access Memory (RAM): 256 megabytes (MB) or higher; (iii) Hard disk space: (A) If already...

Review of radiation effects on ReRAM devices and technology

NASA Astrophysics Data System (ADS)

Gonzalez-Velo, Yago; Barnaby, Hugh J.; Kozicki, Michael N.

2017-08-01

A review of the ionizing radiation effects on resistive random access memory (ReRAM) technology and devices is presented in this article. The review focuses on vertical devices exhibiting bipolar resistance switching, devices that have already exhibited interesting properties and characteristics for memory applications and, in particular, for non-volatile memory applications. Non-volatile memories are important devices for any type of electronic and embedded system, as they are for space applications. In such applications, specific environmental issues related to the existence of cosmic rays and Van Allen radiation belts around the Earth contribute to specific failure mechanisms related to the energy deposition induced by such ionizing radiation. Such effects are important in non-volatile memory as the current leading technology, i.e. flash-based technology, is sensitive to the total ionizing dose (TID) and single-event effects. New technologies such as ReRAM, if competing with or complementing the existing non-volatile area of memories from the point of view of performance, also have to exhibit great reliability for use in radiation environments such as space. This has driven research on the radiation effects of such ReRAM technology, on both the conductive-bridge RAM as well as the valence-change memories, or OxRAM variants of the technology. Initial characterizations of ReRAM technology showed a high degree of resilience to TID, developing researchers’ interest in characterizing such resilience as well as investigating the cause of such behavior. The state of the art of such research is reviewed in this article.

Influence of ultraviolet irradiation on data retention characteristics in resistive random access memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kimura, K.; Ohmi, K.; Tottori University Electronic Display Research Center, 101 Minami4-chome, Koyama-cho, Tottori-shi, Tottori 680-8551

With increasing density of memory devices, the issue of generating soft errors by cosmic rays is becoming more and more serious. Therefore, the irradiation resistance of resistance random access memory (ReRAM) to cosmic radiation has to be elucidated for practical use. In this paper, we investigated the data retention characteristics of ReRAM against ultraviolet irradiation with a Pt/NiO/ITO structure. Soft errors were confirmed to be caused by ultraviolet irradiation in both low- and high-resistance states. An analysis of the wavelength dependence of light irradiation on data retention characteristics suggested that electronic excitation from the valence to the conduction band andmore » to the energy level generated due to the introduction of oxygen vacancies caused the errors. Based on a statistically estimated soft error rates, the errors were suggested to be caused by the cohesion and dispersion of oxygen vacancies owing to the generation of electron-hole pairs and valence changes by the ultraviolet irradiation.« less

Radiation Response of Emerging FeRAM Technology

NASA Technical Reports Server (NTRS)

Nguyen, D. N.; Scheick, L. Z.

2001-01-01

The test results of measurements performed on two different sizes of ferroelectric random access memory (FeRAM) suggest the degradation is due to the low radiation tolerance of sense amplifiers and reference voltage generators which are based on commercial complementary metal oxide semiconductor (CMOS) technology. This paper presents total ionizing dose (TID) testing of 64Kb Ramtron FM1608 and 256Kb Ramtron FM1808.

Integration of SrBi2Ta2O9 thin films for high density ferroelectric random access memory

NASA Astrophysics Data System (ADS)

Wouters, D. J.; Maes, D.; Goux, L.; Lisoni, J. G.; Paraschiv, V.; Johnson, J. A.; Schwitters, M.; Everaert, J.-L.; Boullart, W.; Schaekers, M.; Willegems, M.; Vander Meeren, H.; Haspeslagh, L.; Artoni, C.; Caputa, C.; Casella, P.; Corallo, G.; Russo, G.; Zambrano, R.; Monchoix, H.; Vecchio, G.; Van Autryve, L.

2006-09-01

Ferroelectric random access memory (FeRAM) is an attractive candidate technology for embedded nonvolatile memory, especially in applications where low power and high program speed are important. Market introduction of high-density FeRAM is, however, lagging behind standard complementary metal-oxide semiconductor (CMOS) because of the difficult integration technology. This paper discusses the major integration issues for high-density FeRAM, based on SrBi2Ta2O9 (strontium bismuth tantalate or SBT), in relation to the fabrication of our stacked cell structure. We have worked in the previous years on the development of SBT-FeRAM integration technology, based on a so-called pseudo-three-dimensional (3D) cell, with a capacitor that can be scaled from quasi two-dimensional towards a true three-dimensional capacitor where the sidewalls will importantly contribute to the signal. In the first phase of our integration development, we integrated our FeRAM cell in a 0.35μm CMOS technology. In a second phase, then, possibility of scaling of our cell is demonstrated in 0.18μm technology. The excellent electrical and reliability properties of the small integrated ferroelectric capacitors prove the feasibility of the technology, while the verification of the potential 3D effect confirms the basic scaling potential of our concept beyond that of the single-mask capacitor. The paper outlines the different material and technological challenges, and working solutions are demonstrated. While some issues are specific to our own cell, many are applicable to different stacked FeRAM cell concepts, or will become more general concerns when more developments are moving into 3D structures.

Fabricating a Microcomputer on a Single Silicon Wafer

NASA Technical Reports Server (NTRS)

Evanchuk, V. L.

1983-01-01

Concept for "microcomputer on a slice" reduces microcomputer costs by eliminating scribing, wiring, and packaging of individual circuit chips. Low-cost microcomputer on silicon slice contains redundant components. All components-central processing unit, input/output circuitry, read-only memory, and random-access memory (CPU, I/O, ROM, and RAM) on placed on single silicon wafer.

Memory-based frame synchronizer. [for digital communication systems

NASA Technical Reports Server (NTRS)

Stattel, R. J.; Niswander, J. K. (Inventor)

1981-01-01

A frame synchronizer for use in digital communications systems wherein data formats can be easily and dynamically changed is described. The use of memory array elements provide increased flexibility in format selection and sync word selection in addition to real time reconfiguration ability. The frame synchronizer comprises a serial-to-parallel converter which converts a serial input data stream to a constantly changing parallel data output. This parallel data output is supplied to programmable sync word recognizers each consisting of a multiplexer and a random access memory (RAM). The multiplexer is connected to both the parallel data output and an address bus which may be connected to a microprocessor or computer for purposes of programming the sync word recognizer. The RAM is used as an associative memory or decorder and is programmed to identify a specific sync word. Additional programmable RAMs are used as counter decoders to define word bit length, frame word length, and paragraph frame length.

An automatic analyzer of solid state nuclear track detectors using an optic RAM as image sensor

NASA Astrophysics Data System (ADS)

Staderini, Enrico Maria; Castellano, Alfredo

1986-02-01

An optic RAM is a conventional digital random access read/write dynamic memory device featuring a quartz windowed package and memory cells regularly ordered on the chip. Such a device is used as an image sensor because each cell retains data stored in it for a time depending on the intensity of the light incident on the cell itself. The authors have developed a system which uses an optic RAM to acquire and digitize images from electrochemically etched CR39 solid state nuclear track detectors (SSNTD) in the track count rate up to 5000 cm -2. On the digital image so obtained, a microprocessor, with appropriate software, performs image analysis, filtering, tracks counting and evaluation.

Cost aware cache replacement policy in shared last-level cache for hybrid memory based fog computing

NASA Astrophysics Data System (ADS)

Jia, Gangyong; Han, Guangjie; Wang, Hao; Wang, Feng

2018-04-01

Fog computing requires a large main memory capacity to decrease latency and increase the Quality of Service (QoS). However, dynamic random access memory (DRAM), the commonly used random access memory, cannot be included into a fog computing system due to its high consumption of power. In recent years, non-volatile memories (NVM) such as Phase-Change Memory (PCM) and Spin-transfer torque RAM (STT-RAM) with their low power consumption have emerged to replace DRAM. Moreover, the currently proposed hybrid main memory, consisting of both DRAM and NVM, have shown promising advantages in terms of scalability and power consumption. However, the drawbacks of NVM, such as long read/write latency give rise to potential problems leading to asymmetric cache misses in the hybrid main memory. Current last level cache (LLC) policies are based on the unified miss cost, and result in poor performance in LLC and add to the cost of using NVM. In order to minimize the cache miss cost in the hybrid main memory, we propose a cost aware cache replacement policy (CACRP) that reduces the number of cache misses from NVM and improves the cache performance for a hybrid memory system. Experimental results show that our CACRP behaves better in LLC performance, improving performance up to 43.6% (15.5% on average) compared to LRU.

Physics Notes.

ERIC Educational Resources Information Center

School Science Review, 1979

1979-01-01

Included is information regarding: fabrication of light emitting diodes, their operation as semiconductors, and an experiment demonstrating electroluminescence; experimenting with Random Access Memory (RAM) circuits; demonstrating Coriolis effect; measuring the diameter of an electron beam, E.H.T. meters; launching a trolley by catapult; a "random…

The Matter with Listening Comprehension Isn't the Ear: Hardware and Software.

ERIC Educational Resources Information Center

Harvey, T. Edward

1978-01-01

Reviews some technological advances and classroom games which may be used to increase listening comprehension skills in the foreign language classroom. These include the Random Access Memory (RAM), the Sens-it-Cell, and the SCUCHO game. (AM)

Jargon that Computes: Today's PC Terminology.

ERIC Educational Resources Information Center

Crawford, Walt

1997-01-01

Discusses PC (personal computer) and telecommunications terminology in context: Integrated Services Digital Network (ISDN); Asymmetric Digital Subscriber Line (ADSL); cable modems; satellite downloads; T1 and T3 lines; magnitudes ("giga-,""nano-"); Central Processing Unit (CPU); Random Access Memory (RAM); Universal Serial Bus…

Evaluation of Recent Technologies of Nonvolatile RAM

NASA Astrophysics Data System (ADS)

Nuns, Thierry; Duzellier, Sophie; Bertrand, Jean; Hubert, Guillaume; Pouget, Vincent; Darracq, FrÉdÉric; David, Jean-Pierre; Soonckindt, Sabine

2008-08-01

Two types of recent nonvolatile random access memories (NVRAM) were evaluated for radiation effects: total dose and single event upset and latch-up under heavy ions and protons. Complementary irradiation with a laser beam provides information on sensitive areas of the devices.

Multilevel resistive information storage and retrieval

DOEpatents

Lohn, Andrew; Mickel, Patrick R.

2016-08-09

The present invention relates to resistive random-access memory (RRAM or ReRAM) systems, as well as methods of employing multiple state variables to form degenerate states in such memory systems. The methods herein allow for precise write and read steps to form multiple state variables, and these steps can be performed electrically. Such an approach allows for multilevel, high density memory systems with enhanced information storage capacity and simplified information retrieval.

Design, processing, and testing of lsi arrays for space station

NASA Technical Reports Server (NTRS)

Lile, W. R.; Hollingsworth, R. J.

1972-01-01

The design of a MOS 256-bit Random Access Memory (RAM) is discussed. Technological achievements comprise computer simulations that accurately predict performance; aluminum-gate COS/MOS devices including a 256-bit RAM with current sensing; and a silicon-gate process that is being used in the construction of a 256-bit RAM with voltage sensing. The Si-gate process increases speed by reducing the overlap capacitance between gate and source-drain, thus reducing the crossover capacitance and allowing shorter interconnections. The design of a Si-gate RAM, which is pin-for-pin compatible with an RCA bulk silicon COS/MOS memory (type TA 5974), is discussed in full. The Integrated Circuit Tester (ICT) is limited to dc evaluation, but the diagnostics and data collecting are under computer control. The Silicon-on-Sapphire Memory Evaluator (SOS-ME, previously called SOS Memory Exerciser) measures power supply drain and performs a minimum number of tests to establish operation of the memory devices. The Macrodata MD-100 is a microprogrammable tester which has capabilities of extensive testing at speeds up to 5 MHz. Beam-lead technology was successfully integrated with SOS technology to make a simple device with beam leads. This device and the scribing are discussed.

32-Bit-Wide Memory Tolerates Failures

NASA Technical Reports Server (NTRS)

Buskirk, Glenn A.

1990-01-01

Electronic memory system of 32-bit words corrects bit errors caused by some common type of failures - even failure of entire 4-bit-wide random-access-memory (RAM) chip. Detects failure of two such chips, so user warned that ouput of memory may contain errors. Includes eight 4-bit-wide DRAM's configured so each bit of each DRAM assigned to different one of four parallel 8-bit words. Each DRAM contributes only 1 bit to each 8-bit word.

Metal oxide resistive random access memory based synaptic devices for brain-inspired computing

NASA Astrophysics Data System (ADS)

Gao, Bin; Kang, Jinfeng; Zhou, Zheng; Chen, Zhe; Huang, Peng; Liu, Lifeng; Liu, Xiaoyan

2016-04-01

The traditional Boolean computing paradigm based on the von Neumann architecture is facing great challenges for future information technology applications such as big data, the Internet of Things (IoT), and wearable devices, due to the limited processing capability issues such as binary data storage and computing, non-parallel data processing, and the buses requirement between memory units and logic units. The brain-inspired neuromorphic computing paradigm is believed to be one of the promising solutions for realizing more complex functions with a lower cost. To perform such brain-inspired computing with a low cost and low power consumption, novel devices for use as electronic synapses are needed. Metal oxide resistive random access memory (ReRAM) devices have emerged as the leading candidate for electronic synapses. This paper comprehensively addresses the recent work on the design and optimization of metal oxide ReRAM-based synaptic devices. A performance enhancement methodology and optimized operation scheme to achieve analog resistive switching and low-energy training behavior are provided. A three-dimensional vertical synapse network architecture is proposed for high-density integration and low-cost fabrication. The impacts of the ReRAM synaptic device features on the performances of neuromorphic systems are also discussed on the basis of a constructed neuromorphic visual system with a pattern recognition function. Possible solutions to achieve the high recognition accuracy and efficiency of neuromorphic systems are presented.

Organic Ferroelectric-Based 1T1T Random Access Memory Cell Employing a Common Dielectric Layer Overcoming the Half-Selection Problem.

PubMed

Zhao, Qiang; Wang, Hanlin; Ni, Zhenjie; Liu, Jie; Zhen, Yonggang; Zhang, Xiaotao; Jiang, Lang; Li, Rongjin; Dong, Huanli; Hu, Wenping

2017-09-01

Organic electronics based on poly(vinylidenefluoride/trifluoroethylene) (P(VDF-TrFE)) dielectric is facing great challenges in flexible circuits. As one indispensable part of integrated circuits, there is an urgent demand for low-cost and easy-fabrication nonvolatile memory devices. A breakthrough is made on a novel ferroelectric random access memory cell (1T1T FeRAM cell) consisting of one selection transistor and one ferroelectric memory transistor in order to overcome the half-selection problem. Unlike complicated manufacturing using multiple dielectrics, this system simplifies 1T1T FeRAM cell fabrication using one common dielectric. To achieve this goal, a strategy for semiconductor/insulator (S/I) interface modulation is put forward and applied to nonhysteretic selection transistors with high performances for driving or addressing purposes. As a result, high hole mobility of 3.81 cm 2 V -1 s -1 (average) for 2,6-diphenylanthracene (DPA) and electron mobility of 0.124 cm 2 V -1 s -1 (average) for N,N'-1H,1H-perfluorobutyl dicyanoperylenecarboxydiimide (PDI-FCN 2 ) are obtained in selection transistors. In this work, we demonstrate this technology's potential for organic ferroelectric-based pixelated memory module fabrication. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

A Novel Ni/WOX/W Resistive Random Access Memory with Excellent Retention and Low Switching Current

NASA Astrophysics Data System (ADS)

Chien, Wei-Chih; Chen, Yi-Chou; Lee, Feng-Ming; Lin, Yu-Yu; Lai, Erh-Kun; Yao, Yeong-Der; Gong, Jeng; Horng, Sheng-Fu; Yeh, Chiao-Wen; Tsai, Shih-Chang; Lee, Ching-Hsiung; Huang, Yu-Kai; Chen, Chun-Fu; Kao, Hsiao-Feng; Shih, Yen-Hao; Hsieh, Kuang-Yeu; Lu, Chih-Yuan

2011-04-01

The behavior of WOX resistive random access memory (ReRAM) is a strong function of the top electrode material, which controls the conduction mechanism and the forming process. When using a top electrode with low work function, the current conduction is limited by space charges. On the other hand, the mechanism becomes thermionic emission for devices with a high work function top electrode. These (thermionic) devices are also found to have higher initial resistance, reduced forming current, and larger resistance window. Based on these insights and considering the compatibility to complementary metal-oxide-semiconductor (CMOS) process, we proposed to use Ni as the top electrode for high performance WOX ReRAM devices. The new Ni/WOX/W device can be switched at a low current density less than 8×105 A/cm2, with RESET/SET resistance ratio greater than 100, and extremely good data retention of more than 300 years at 85 °C.

Improving the leakage current of polyimide-based resistive memory by tuning the molecular chain stack of the polyimide film

NASA Astrophysics Data System (ADS)

Wu, Chi-Chang; Hsiao, Yu-Ping; You, Hsin-Chiang; Lin, Guan-Wei; Kao, Min-Fang; Manga, Yankuba B.; Yang, Wen-Luh

2018-02-01

We have developed an organic-based resistive random access memory (ReRAM) by using spin-coated polyimide (PI) as the resistive layer. In this study, the chain distance and number of chain stacks of PI molecules are investigated. We employed different solid contents of polyamic acid (PAA) to synthesize various PI films, which served as the resistive layer of ReRAM, the electrical performance of which was evaluated. By tuning the PAA solid content, the intermolecular interaction energy of the PI films is changed without altering the molecular structure. Our results show that the leakage current in the high-resistance state and the memory window of the PI-based ReRAM can be substantially improved using this technique. The superior properties of the PI-based ReRAM are ascribed to fewer molecular chain stacks in the PI films when the PAA solid content is decreased, hence suppressing the leakage current. In addition, a device retention time of more than 107 s can be achieved using this technique. Finally, the conduction mechanism in the PI-based ReRAM was analyzed using hopping and conduction models.

Resistive switching characteristics of solution-processed Al-Zn-Sn-O films annealed by microwave irradiation

NASA Astrophysics Data System (ADS)

Kim, Tae-Wan; Baek, Il-Jin; Cho, Won-Ju

2018-02-01

In this study, we employed microwave irradiation (MWI) at low temperature in the fabrication of solution-processed AlZnSnO (AZTO) resistive random access memory (ReRAM) devices with a structure of Ti/AZTO/Pt and compared the memory characteristics with the conventional thermal annealing (CTA) process. Typical bipolar resistance switching (BRS) behavior was observed in AZTO ReRAM devices treated with as-deposited (as-dep), CTA and MWI. In the low resistance state, the Ohmic conduction mechanism describes the dominant conduction of these devices. On the other hand, the trap-controlled space charge limited conduction (SCLC) mechanism predominates in the high resistance state. The AZTO ReRAM devices processed with MWI showed larger memory windows, uniform distribution of resistance state and operating voltage, stable DC durability (>103 cycles) and stable retention characteristics (>104 s). In addition, the AZTO ReRAM devices treated with MWI exhibited multistage storage characteristics by modulating the amplitude of the reset bias, and eight distinct resistance levels were obtained with stable retention capability.

50 CFR 660.15 - Equipment requirements.

Code of Federal Regulations, 2011 CFR

2011-10-01

... perceived weight of water, slime, mud, debris, or other materials. Scale printouts must show: (A) The vessel... with Pentium 75-MHz or higher. Random Access Memory (RAM) must have sufficient megabyte (MB) space to... space of 217 MB or greater. A CD-ROM drive with a Video Graphics Adapter (VGA) or higher resolution...

Ferroelectric tunneling element and memory applications which utilize the tunneling element

DOEpatents

Kalinin, Sergei V [Knoxville, TN; Christen, Hans M [Knoxville, TN; Baddorf, Arthur P [Knoxville, TN; Meunier, Vincent [Knoxville, TN; Lee, Ho Nyung [Oak Ridge, TN

2010-07-20

A tunneling element includes a thin film layer of ferroelectric material and a pair of dissimilar electrically-conductive layers disposed on opposite sides of the ferroelectric layer. Because of the dissimilarity in composition or construction between the electrically-conductive layers, the electron transport behavior of the electrically-conductive layers is polarization dependent when the tunneling element is below the Curie temperature of the layer of ferroelectric material. The element can be used as a basis of compact 1R type non-volatile random access memory (RAM). The advantages include extremely simple architecture, ultimate scalability and fast access times generic for all ferroelectric memories.

Sparse distributed memory prototype: Principles of operation

NASA Technical Reports Server (NTRS)

Flynn, Michael J.; Kanerva, Pentti; Ahanin, Bahram; Bhadkamkar, Neal; Flaherty, Paul; Hickey, Philip

1988-01-01

Sparse distributed memory is a generalized random access memory (RAM) for long binary words. Such words can be written into and read from the memory, and they can be used to address the memory. The main attribute of the memory is sensitivity to similarity, meaning that a word can be read back not only by giving the original right address but also by giving one close to it as measured by the Hamming distance between addresses. Large memories of this kind are expected to have wide use in speech and scene analysis, in signal detection and verification, and in adaptive control of automated equipment. The memory can be realized as a simple, massively parallel computer. Digital technology has reached a point where building large memories is becoming practical. The research is aimed at resolving major design issues that have to be faced in building the memories. The design of a prototype memory with 256-bit addresses and from 8K to 128K locations for 256-bit words is described. A key aspect of the design is extensive use of dynamic RAM and other standard components.

Resistive switching mechanism of ZnO/ZrO2-stacked resistive random access memory device annealed at 300 °C by sol-gel method with forming-free operation

NASA Astrophysics Data System (ADS)

Jian, Wen-Yi; You, Hsin-Chiang; Wu, Cheng-Yen

2018-01-01

In this work, we used a sol-gel process to fabricate a ZnO-ZrO2-stacked resistive switching random access memory (ReRAM) device and investigated its switching mechanism. The Gibbs free energy in ZnO, which is higher than that in ZrO2, facilitates the oxidation and reduction reactions of filaments in the ZnO layer. The current-voltage (I-V) characteristics of the device revealed a forming-free operation because of nonlattice oxygen in the oxide layer. In addition, the device can operate under bipolar or unipolar conditions with a reset voltage of 0 to ±2 V, indicating that in this device, Joule heating dominates at reset and the electric field dominates in the set process. Furthermore, the characteristics reveal why the fabricated device exhibits a greater discrete distribution phenomenon for the set voltage than for the reset voltage. These results will enable the fabrication of future ReRAM devices with double-layer oxide structures with improved characteristics.

Error free physically unclonable function with programmed resistive random access memory using reliable resistance states by specific identification-generation method

NASA Astrophysics Data System (ADS)

Tseng, Po-Hao; Hsu, Kai-Chieh; Lin, Yu-Yu; Lee, Feng-Min; Lee, Ming-Hsiu; Lung, Hsiang-Lan; Hsieh, Kuang-Yeu; Chung Wang, Keh; Lu, Chih-Yuan

2018-04-01

A high performance physically unclonable function (PUF) implemented with WO3 resistive random access memory (ReRAM) is presented in this paper. This robust ReRAM-PUF can eliminated bit flipping problem at very high temperature (up to 250 °C) due to plentiful read margin by using initial resistance state and set resistance state. It is also promised 10 years retention at the temperature range of 210 °C. These two stable resistance states enable stable operation at automotive environments from -40 to 125 °C without need of temperature compensation circuit. The high uniqueness of PUF can be achieved by implementing a proposed identification (ID)-generation method. Optimized forming condition can move 50% of the cells to low resistance state and the remaining 50% remain at initial high resistance state. The inter- and intra-PUF evaluations with unlimited separation of hamming distance (HD) are successfully demonstrated even under the corner condition. The number of reproduction was measured to exceed 107 times with 0% bit error rate (BER) at read voltage from 0.4 to 0.7 V.

Endurance Enhancement and High Speed Set/Reset of 50 nm Generation HfO2 Based Resistive Random Access Memory Cell by Intelligent Set/Reset Pulse Shape Optimization and Verify Scheme

NASA Astrophysics Data System (ADS)

Higuchi, Kazuhide; Miyaji, Kousuke; Johguchi, Koh; Takeuchi, Ken

2012-02-01

This paper proposes a verify-programming method for the resistive random access memory (ReRAM) cell which achieves a 50-times higher endurance and a fast set and reset compared with the conventional method. The proposed verify-programming method uses the incremental pulse width with turnback (IPWWT) for the reset and the incremental voltage with turnback (IVWT) for the set. With the combination of IPWWT reset and IVWT set, the endurance-cycle increases from 48 ×103 to 2444 ×103 cycles. Furthermore, the measured data retention-time after 20 ×103 set/reset cycles is estimated to be 10 years. Additionally, the filamentary based physical model is proposed to explain the set/reset failure mechanism with various set/reset pulse shapes. The reset pulse width and set voltage correspond to the width and length of the conductive-filament, respectively. Consequently, since the proposed IPWWT and IVWT recover set and reset failures of ReRAM cells, the endurance-cycles are improved.

Resistive Random Access Memory from Materials Development fnd Engineering to Novel Encryption and Neuromorphic Applications

NASA Astrophysics Data System (ADS)

Beckmann, Karsten

Resistive random access memory (ReRAM or RRAM) is a novel form of non-volatile memory that is expected to play a major role in future computing and memory solutions. It has been shown that the resistance state of ReRAM devices can be precisely tuned by modulating switching voltages, by limiting peak current, and by adjusting the switching pulse properties. This enables the realization of novel applications such as memristive neuromorphic computing and neural network computing. I have developed two processes based on 100 and 300mm wafer platforms to demonstrate functional HfO2 based ReRAM devices. The first process is designed for a rapid materials engineering and device characterization, while the second is an advanced hybrid ReRAM/CMOS combination based on the IBM 65nm 10LPe process technology. The 100mm wafer efforts were used to show impacts of etch processes on ReRAM switching performance and the need for a rigorous structural evaluation of ReRAM devices before starting materials development. After an etch development, a bottom electrode comparison between the inert materials Pt, Ru and W was performed where Ru showed superior results with respect to yield and resilience against environmental impacts such as humidity over a 2-month period. A comparison of amorphous and crystalline devices showed no statistical difference in the performance with respect to random telegraph noise. This demonstrates, that the forming process fundamentally alters the crystallographic structure within and around the filament. The 300mm wafer development efforts were aimed towards implementing ReRAM in the FEOL, combined with CMOS, to yield a seamless process flow of 1 transistor 1 ReRAM structures (1T1R). This technology was customized with custom-developed tungsten metal 1 (M1) and dual tungsten/copper via 1 (V1) structures, within which the ReRAM stack is embedded. The ReRAM itself consists of an inert W bottom electrode, HfO2 based active switching layer, a Ti oxygen scavenger layer, and an inert TiN top electrode. Linear sweep and controlled pulse (down to 5 ns) based electrical characterization of 1 transistor 1 ReRAM (1T1R) elements was performed to determine key properties including endurance, reliability, and threshold voltages. We demonstrated endurance values above 1010 cycles with an average on/off ratio of 10, and pulse voltages for set/reset operation of +/-1.5V. The on-chip 1T1R structures show an excellent controllability with respect to the low and high resistive states by manipulating the peak current from 75 up to 350 mu?A resulting in 10 distinct low resistance states (LRS). Our results demonstrate that the set operation (which shifts the ReRAM device from the high to the low resistance state) is only dependent on the voltage of the switching pulse and the peak current limit. The reset operation, however, occurs in an analog fashion and appears to be dependent on the total energy of the applied switching pulse. Pulse energy was modulated by varying the peak voltage resulting in a larger relative change of the ReRAM device resistance. The incremental resistance changes are ideally suited to emulate synaptic weights for future implementation into neuromorphic architectures. Switching results from these devices were also used to develop a model time-delay physical unclonable function (PUF) circuit, which showed excellent performance when compared to a pure CMOS implementation with significant improvements in uniqueness, size and accuracy.

Magnetic field dependence of spin torque switching in nanoscale magnetic tunnel junctions

NASA Astrophysics Data System (ADS)

Yang, Liu; Rowlands, Graham; Katine, Jordan; Langer, Juergen; Krivorotov, Ilya

2012-02-01

Magnetic random access memory based on spin transfer torque effect in nanoscale magnetic tunnel junctions (STT-RAM) is emerging as a promising candidate for embedded and stand-alone computer memory. An important performance parameter of STT-RAM is stability of its free magnetic layer against thermal fluctuations. Measurements of the free layer switching probability as a function of sub-critical voltage at zero effective magnetic field (read disturb rate or RDR measurements) have been proposed as a method for quantitative evaluation of the free layer thermal stability at zero voltage. In this presentation, we report RDR measurement as a function of external magnetic field, which provide a test of the RDR method self-consistency and reliability.

Ion beam synthesis of indium-oxide nanocrystals for improvement of oxide resistive random-access memories

NASA Astrophysics Data System (ADS)

Bonafos, C.; Benassayag, G.; Cours, R.; Pécassou, B.; Guenery, P. V.; Baboux, N.; Militaru, L.; Souifi, A.; Cossec, E.; Hamga, K.; Ecoffey, S.; Drouin, D.

2018-01-01

We report on the direct ion beam synthesis of a delta-layer of indium oxide nanocrystals (In2O3-NCs) in silica matrices by using ultra-low energy ion implantation. The formation of the indium oxide phase can be explained by (i) the affinity of indium with oxygen, (ii) the generation of a high excess of oxygen recoils generated by the implantation process in the region where the nanocrystals are formed and (iii) the proximity of the indium-based nanoparticles with the free surface and oxidation from the air. Taking advantage of the selective diffusivity of implanted indium in SiO2 with respect to Si3N4, In2O3-NCs have been inserted in the SiO2 switching oxide of micrometric planar oxide-based resistive random access memory (OxRAM) devices fabricated using the nanodamascene process. Preliminary electrical measurements show switch voltage from high to low resistance state. The devices with In2O3-NCs have been cycled 5 times with identical operating voltages and RESET current meanwhile no switch has been observed for non implanted devices. This first measurement of switching is very promising for the concept of In2O3-NCs based OxRAM memories.

Cost-effective, transfer-free, flexible resistive random access memory using laser-scribed reduced graphene oxide patterning technology.

PubMed

Tian, He; Chen, Hong-Yu; Ren, Tian-Ling; Li, Cheng; Xue, Qing-Tang; Mohammad, Mohammad Ali; Wu, Can; Yang, Yi; Wong, H-S Philip

2014-06-11

Laser scribing is an attractive reduced graphene oxide (rGO) growth and patterning technology because the process is low-cost, time-efficient, transfer-free, and flexible. Various laser-scribed rGO (LSG) components such as capacitors, gas sensors, and strain sensors have been demonstrated. However, obstacles remain toward practical application of the technology where all the components of a system are fabricated using laser scribing. Memory components, if developed, will substantially broaden the application space of low-cost, flexible electronic systems. For the first time, a low-cost approach to fabricate resistive random access memory (ReRAM) using laser-scribed rGO as the bottom electrode is experimentally demonstrated. The one-step laser scribing technology allows transfer-free rGO synthesis directly on flexible substrates or non-flat substrates. Using this time-efficient laser-scribing technology, the patterning of a memory-array area up to 100 cm(2) can be completed in 25 min. Without requiring the photoresist coating for lithography, the surface of patterned rGO remains as clean as its pristine state. Ag/HfOx/LSG ReRAM using laser-scribing technology is fabricated in this work. Comprehensive electrical characteristics are presented including forming-free behavior, stable switching, reasonable reliability performance and potential for 2-bit storage per memory cell. The results suggest that laser-scribing technology can potentially produce more cost-effective and time-effective rGO-based circuits and systems for practical applications.

Computer hardware for radiologists: Part I

PubMed Central

Indrajit, IK; Alam, A

2010-01-01

Computers are an integral part of modern radiology practice. They are used in different radiology modalities to acquire, process, and postprocess imaging data. They have had a dramatic influence on contemporary radiology practice. Their impact has extended further with the emergence of Digital Imaging and Communications in Medicine (DICOM), Picture Archiving and Communication System (PACS), Radiology information system (RIS) technology, and Teleradiology. A basic overview of computer hardware relevant to radiology practice is presented here. The key hardware components in a computer are the motherboard, central processor unit (CPU), the chipset, the random access memory (RAM), the memory modules, bus, storage drives, and ports. The personnel computer (PC) has a rectangular case that contains important components called hardware, many of which are integrated circuits (ICs). The fiberglass motherboard is the main printed circuit board and has a variety of important hardware mounted on it, which are connected by electrical pathways called “buses”. The CPU is the largest IC on the motherboard and contains millions of transistors. Its principal function is to execute “programs”. A Pentium® 4 CPU has transistors that execute a billion instructions per second. The chipset is completely different from the CPU in design and function; it controls data and interaction of buses between the motherboard and the CPU. Memory (RAM) is fundamentally semiconductor chips storing data and instructions for access by a CPU. RAM is classified by storage capacity, access speed, data rate, and configuration. PMID:21042437

Sparse distributed memory: Principles and operation

NASA Technical Reports Server (NTRS)

Flynn, M. J.; Kanerva, P.; Bhadkamkar, N.

1989-01-01

Sparse distributed memory is a generalized random access memory (RAM) for long (1000 bit) binary words. Such words can be written into and read from the memory, and they can also be used to address the memory. The main attribute of the memory is sensitivity to similarity, meaning that a word can be read back not only by giving the original write address but also by giving one close to it as measured by the Hamming distance between addresses. Large memories of this kind are expected to have wide use in speech recognition and scene analysis, in signal detection and verification, and in adaptive control of automated equipment, in general, in dealing with real world information in real time. The memory can be realized as a simple, massively parallel computer. Digital technology has reached a point where building large memories is becoming practical. Major design issues were resolved which were faced in building the memories. The design is described of a prototype memory with 256 bit addresses and from 8 to 128 K locations for 256 bit words. A key aspect of the design is extensive use of dynamic RAM and other standard components.

Switching characteristics in Cu:SiO2 by chemical soak methods for resistive random access memory (ReRAM)

NASA Astrophysics Data System (ADS)

Chin, Fun-Tat; Lin, Yu-Hsien; Yang, Wen-Luh; Liao, Chin-Hsuan; Lin, Li-Min; Hsiao, Yu-Ping; Chao, Tien-Sheng

2015-01-01

A limited copper (Cu)-source Cu:SiO2 switching layer composed of various Cu concentrations was fabricated using a chemical soaking (CS) technique. The switching layer was then studied for developing applications in resistive random access memory (ReRAM) devices. Observing the resistive switching mechanism exhibited by all the samples suggested that Cu conductive filaments formed and ruptured during the set/reset process. The experimental results indicated that the endurance property failure that occurred was related to the joule heating effect. Moreover, the endurance switching cycle increased as the Cu concentration decreased. In high-temperature tests, the samples demonstrated that the operating (set/reset) voltages decreased as the temperature increased, and an Arrhenius plot was used to calculate the activation energy of the set/reset process. In addition, the samples demonstrated stable data retention properties when baked at 85 °C, but the samples with low Cu concentrations exhibited short retention times in the low-resistance state (LRS) during 125 °C tests. Therefore, Cu concentration is a crucial factor in the trade-off between the endurance and retention properties; furthermore, the Cu concentration can be easily modulated using this CS technique.

Thermal characterization and analysis of phase change random access memory

NASA Astrophysics Data System (ADS)

Giraud, V.; Cluzel, J.; Sousa, V.; Jacquot, A.; Dauscher, A.; Lenoir, B.; Scherrer, H.; Romer, S.

2005-07-01

The cross-plane thermal conductivity of Ge2Sb2Te5, either in its amorphous state or fcc crystallized state, and titanium nitride (TiN) thin films has been measured at room temperature by the 3ω method. These materials are involved in the fabrication of phase change random access memory (PC-RAM), Ge2Sb2Te5 and TiN being the PC and pseudoelectrode materials, respectively. The thermal conductivity of insulating SiO2 and ZnS :SiO2 layers was determined too. Each thermal conductivity measurement was performed by the means of at least two strip widths in order to check both the measurement self-consistency and the measurement accuracy. The performance of PC-RAM cells, i.e., the time needed to reach the melting temperature of the PC material and the cooling speed, has been evaluated as a function of both the measured thermal conductivity of the PC material and the reset current intensity independently of the thermal properties of the pseudoelectrodes by the way of analytical formula. The influence of the thickness and the thermal properties of the pseudoelectrodes on the performances have been determined by numerical simulations.

Hf layer thickness dependence of resistive switching characteristics of Ti/Hf/HfO2/Au resistive random access memory device

NASA Astrophysics Data System (ADS)

Nakajima, Ryo; Azuma, Atsushi; Yoshida, Hayato; Shimizu, Tomohiro; Ito, Takeshi; Shingubara, Shoso

2018-06-01

Resistive random access memory (ReRAM) devices with a HfO2 dielectric layer have been studied extensively owing to the good reproducibility of their SET/RESET switching properties. Furthermore, it was reported that a thin Hf layer next to a HfO2 layer stabilized switching properties because of the oxygen scavenging effect. In this work, we studied the Hf thickness dependence of the resistance switching characteristics of a Ti/Hf/HfO2/Au ReRAM device. It is found that the optimum Hf thickness is approximately 10 nm to obtain good reproducibility of SET/RESET voltages with a small RESET current. However, when the Hf thickness was very small (∼2 nm), the device failed after the first RESET process owing to the very large RESET current. In the case of a very thick Hf layer (∼20 nm), RESET did not occur owing to the formation of a leaky dielectric layer. We observed the occurrence of multiple resistance states in the RESET process of the device with a Hf thickness of 10 nm by increasing the RESET voltage stepwise.

A graphite based STT-RAM cell with reduction in switching current

NASA Astrophysics Data System (ADS)

Varghani, Ali; Peiravi, Ali

2015-10-01

Spin Transfer Torque Random Access Memory (STT-RAM) is a serious candidate for "universal memory" because of its non-volatility, fast access time, high density, good scalability, high endurance and relatively low power dissipation. However, problems with low write speed and large write current are important existing challenges in STT-RAM design and there is a tradeoff between them and data retention time. In this study, a novel STT-RAM cell structure which uses perfect graphite based Magnetic Tunnel Junction (MTJ) is proposed. First, the cross-section of the structure is selected to be an ellipse of 45 nm and 180 nm dimensions and a six-layer graphite is used as tunnel barrier. By passing a lateral current with a short pulse width (before applying STT current and independent of it) through four middle graphene layers of the tunnel barrier, a 27% reduction in the amplitude of the switching current (for fast switching time of 2 ns) or a 58% reduction in its pulse width is achieved without any reduction in data retention time. Finally, the effect of downscaling of technology on the proposed structure is evaluated. A reduction of 31.6% and 9% in switching current is achieved for 90 and 22 nm cell width respectively by passing sufficient current (100 μA with 0.1 ns pulse width) through the tunnel barrier. Simulations are done using Object Oriented Micro Magnetic Framework (OOMMF).

Solution-processed flexible NiO resistive random access memory device

NASA Astrophysics Data System (ADS)

Kim, Soo-Jung; Lee, Heon; Hong, Sung-Hoon

2018-04-01

Non-volatile memories (NVMs) using nanocrystals (NCs) as active materials can be applied to soft electronic devices requiring a low-temperature process because NCs do not require a heat treatment process for crystallization. In addition, memory devices can be implemented simply by using a patterning technique using a solution process. In this study, a flexible NiO ReRAM device was fabricated using a simple NC patterning method that controls the capillary force and dewetting of a NiO NC solution at low temperature. The switching behavior of a NiO NC based memory was clearly observed by conductive atomic force microscopy (c-AFM).

A 16K-bit static IIL RAM with 25-ns access time

NASA Astrophysics Data System (ADS)

Inabe, Y.; Hayashi, T.; Kawarada, K.; Miwa, H.; Ogiue, K.

1982-04-01

A 16,384 x 1-bit RAM with 25-ns access time, 600-mW power dissipation, and 33 sq mm chip size has been developed. Excellent speed-power performance with high packing density has been achieved by an oxide isolation technology in conjunction with novel ECL circuit techniques and IIL flip-flop memory cells, 980 sq microns (35 x 28 microns) in cell size. Development results have shown that IIL flip-flop memory cell is a trump card for assuring achievement of a high-performance large-capacity bipolar RAM, in the above 16K-bit/chip area.

Exploration of perpendicular magnetic anisotropy material system for application in spin transfer torque - Random access memory

NASA Astrophysics Data System (ADS)

Natarajarathinam, Anusha

Perpendicular magnetic anisotropy (PMA) materials have unique advantages when used in magnetic tunnel junctions (MTJ) which are the most critical part of spin-torque transfer random access memory devices (STT-RAMs) that are being researched intensively as future non-volatile memory technology. They have high magnetoresistance which improves their sensitivity. The STT-RAM has several advantages over competing technologies, for instance, low power consumption, non-volatility, ultra-fast read and write speed and high endurance. In personal computers, it can replace SRAM for high-speed applications, Flash for non-volatility, and PSRAM and DRAM for high-speed program execution. The main aim of this research is to identify and optimize the best perpendicular magnetic anisotropy (PMA) material system for application to STT-RAM technology. Preliminary search for perpendicular magnetic anisotropy (PMA) materials for pinned layer for MTJs started with the exploration and optimization of crystalline alloys such as Co50Pd50 alloy, Mn50Al50 and amorphous alloys such as Tb21Fe72Co7 and are first presented in this work. Further optimization includes the study of Co/[Pd/Pt]x multilayers (ML), and the development of perpendicular synthetic antiferromagnets (SAF) utilizing these multilayers. Focused work on capping and seed layers to evaluate interfacial perpendicular anisotropy in free layers for pMTJs is then discussed. Optimization of the full perpendicular magnetic tunnel junction (pMTJ) includes the CoFeB/MgO/CoFeB trilayer coupled to a pinned/pinning layer with perpendicular Co/[Pd/Pt]x SAF and a thin Ta seeded CoFeB free layer. Magnetometry, simulations, annealing studies, transport measurements and TEM analysis on these samples will then be presented.

Digital high speed programmable convolver

NASA Astrophysics Data System (ADS)

Rearick, T. C.

1984-12-01

A circuit module for rapidly calculating a discrete numerical convolution is described. A convolution such as finding the sum of the products of a 16 bit constant and a 16 bit variable is performed by a module which is programmable so that the constant may be changed for a new problem. In addition, the module may be programmed to find the sum of the products of 4 and 8 bit constants and variables. RAM (Random Access Memories) are loaded with partial products of the selected constant and all possible variables. Then, when the actual variable is loaded, it acts as an address to find the correct partial product in the particular RAM. The partial products from all of the RAMs are shifted to the appropriate numerical power position (if necessary) and then added in adder elements.

Hydrocarbon-Fueled Scramjet Research at Hypersonic Mach Numbers

DTIC Science & Technology

2005-03-31

oxide O atomic oxygen 02 molecular oxygen OH hydroxyl radical ppm parts per million PD photodiode PLLF planar laser-induced fluorescence PMT...photomultiplier tube RAM random access memory RANS Reynolds-averaged Navier-Stokes RET rotational energy transfer TDLAS tunable diode laser absorption...here extend this knowledge base to flight at Mach 11.5. Griffiths (2004) used a tunable diode laser absorption spectroscopy ( TDLAS ) system to measure

An energy and cost efficient majority-based RAM cell in quantum-dot cellular automata

NASA Astrophysics Data System (ADS)

Khosroshahy, Milad Bagherian; Moaiyeri, Mohammad Hossein; Navi, Keivan; Bagherzadeh, Nader

Nanotechnologies, notably quantum-dot cellular automata, have achieved major attentions for their prominent features as compared to the conventional CMOS circuitry. Quantum-dot cellular automata, particularly owning to its considerable reduction in size, high switching speed and ultra-low energy consumption, is considered as a potential alternative for the CMOS technology. As the memory unit is one of the most essential components in a digital system, designing a well-optimized QCA random access memory (RAM) cell is an important area of research. In this paper, a new five-input majority gate is presented which is suitable for implementing efficient single-layer QCA circuits. In addition, a new RAM cell with set and reset capabilities is designed based on the proposed majority gate, which has an efficient and low-energy structure. The functionality, performance and energy consumption of the proposed designs are evaluated based on the QCADesigner and QCAPro tools. According to the simulation results, the proposed RAM design leads to on average 38% lower total energy dissipation, 25% smaller area, 20% lower cell count, 28% lower delay and 60% lower QCA cost as compared to its previous counterparts.

Perpendicular STT_RAM cell in 8 nm technology node using Co1/Ni3(1 1 1)||Gr2||Co1/Ni3(1 1 1) structure as magnetic tunnel junction

NASA Astrophysics Data System (ADS)

Varghani, Ali; Peiravi, Ali; Moradi, Farshad

2018-04-01

The perpendicular anisotropy Spin-Transfer Torque Random Access Memory (P-STT-RAM) is considered to be a promising candidate for high-density memories. Many distinct advantages of Perpendicular Magnetic Tunnel Junction (P-MTJ) compared to the conventional in-plane MTJ (I-MTJ) such as lower switching current, circular cell shape that facilitates manufacturability in smaller technology nodes, large thermal stability, smaller cell size, and lower dipole field interaction between adjacent cells make it a promising candidate as a universal memory. However, for small MTJ cell sizes, the perpendicular technology requires new materials with high polarization and low damping factor as well as low resistance area product of a P-MTJ in order to avoid a high write voltage as technology is scaled down. A new graphene-based STT-RAM cell for 8 nm technology node that uses high perpendicular magnetic anisotropy cobalt/nickel (Co/Ni) multilayer as magnetic layers is proposed in this paper. The proposed junction benefits from enough Tunneling Magnetoresistance Ratio (TMR), low resistance area product, low write voltage, and low power consumption that make it suitable for 8 nm technology node.

Origin of the OFF state variability in ReRAM cells

NASA Astrophysics Data System (ADS)

Salaoru, Iulia; Khiat, Ali; Li, Qingjiang; Berdan, Radu; Papavassiliou, Christos; Prodromakis, Themistoklis

2014-04-01

This work exploits the switching dynamics of nanoscale resistive random access memory (ReRAM) cells with particular emphasis on the origin of the observed variability when cells are consecutively cycled/programmed at distinct memory states. It is demonstrated that this variance is a common feature of all ReRAM elements and is ascribed to the formation and rupture of conductive filaments that expand across the active core, independently of the material employed as the active switching core, the causal physical switching mechanism, the switching mode (bipolar/unipolar) or even the unit cells' dimensions. Our hypothesis is supported through both experimental and theoretical studies on TiO2 and In2O3 : SnO2 (ITO) based ReRAM cells programmed at three distinct resistive states. Our prototypes employed TiO2 or ITO active cores over 5 × 5 µm2 and 100 × 100 µm2 cell areas, with all tested devices demonstrating both unipolar and bipolar switching modalities. In the case of TiO2-based cells, the underlying switching mechanism is based on the non-uniform displacement of ionic species that foster the formation of conductive filaments. On the other hand, the resistive switching observed in the ITO-based devices is considered to be due to a phase change mechanism. The selected experimental parameters allowed us to demonstrate that the observed programming variance is a common feature of all ReRAM devices, proving that its origin is dependent upon randomly oriented local disorders within the active core that have a substantial impact on the overall state variance, particularly for high-resistive states.

Mitigating Upsets in SRAM-Based FPGAs from the Xilinx Virtex 2 Family

NASA Technical Reports Server (NTRS)

Swift, G. M.; Yui, C. C.; Carmichael, C.; Koga, R.; George, J. S.

2003-01-01

Static random access memory (SRAM) upset rates in field programmable gate arrays (FPGAs) from the Xilinx Virtex 2 family have been tested for radiation effects on configuration memory, block RAM and the power-on-reset (POR) and SelectMAP single event functional interrupts (SEFIs). Dynamic testing has shown the effectiveness and value of Triple Module Redundancy (TMR) and partial reconfiguration when used in conjunction. Continuing dynamic testing for more complex designs and other Virtex 2 capabilities (i.e., I/O standards, digital clock managers (DCM), etc.) is scheduled.

Integrating Epitaxial-Like Pb(Zr,Ti)O3 Thin-Film into Silicon for Next-Generation Ferroelectric Field-Effect Transistor

PubMed Central

Park, Jae Hyo; Kim, Hyung Yoon; Jang, Gil Su; Seok, Ki Hwan; Chae, Hee Jae; Lee, Sol Kyu; Kiaee, Zohreh; Joo, Seung Ki

2016-01-01

The development of ferroelectric random-access memory (FeRAM) technology with control of grain boundaries would result in a breakthrough for new nonvolatile memory devices. The excellent piezoelectric and electrical properties of bulk ferroelectrics are degraded when the ferroelectric is processed into thin films because the grain boundaries then form randomly. Controlling the nature of nucleation and growth are the keys to achieving a good crystalline thin-film. However, the sought after high-quality ferroelectric thin-film has so far been thought to be impossible to make, and research has been restricted to atomic-layer deposition which is extremely expensive and has poor reproducibility. Here we demonstrate a novel epitaxial-like growth technique to achieve extremely uniform and large rectangular-shaped grains in thin-film ferroelectrics by dividing the nucleation and growth phases. With this technique, it is possible to achieve 100-μm large uniform grains, even made available on Si, which is large enough to fabricate a field-effect transistor in each grain. The electrical and reliability test results, including endurance and retention test results, were superior to other FeRAMs reported so far and thus the results presented here constitute the first step toward the development of FeRAM using epitaxial-like ferroelectric thin-films. PMID:27005886

Multistate Memristive Tantalum Oxide Devices for Ternary Arithmetic

PubMed Central

Kim, Wonjoo; Chattopadhyay, Anupam; Siemon, Anne; Linn, Eike; Waser, Rainer; Rana, Vikas

2016-01-01

Redox-based resistive switching random access memory (ReRAM) offers excellent properties to implement future non-volatile memory arrays. Recently, the capability of two-state ReRAMs to implement Boolean logic functionality gained wide interest. Here, we report on seven-states Tantalum Oxide Devices, which enable the realization of an intrinsic modular arithmetic using a ternary number system. Modular arithmetic, a fundamental system for operating on numbers within the limit of a modulus, is known to mathematicians since the days of Euclid and finds applications in diverse areas ranging from e-commerce to musical notations. We demonstrate that multistate devices not only reduce the storage area consumption drastically, but also enable novel in-memory operations, such as computing using high-radix number systems, which could not be implemented using two-state devices. The use of high radix number system reduces the computational complexity by reducing the number of needed digits. Thus the number of calculation operations in an addition and the number of logic devices can be reduced. PMID:27834352

Multistate Memristive Tantalum Oxide Devices for Ternary Arithmetic.

PubMed

Kim, Wonjoo; Chattopadhyay, Anupam; Siemon, Anne; Linn, Eike; Waser, Rainer; Rana, Vikas

2016-11-11

Redox-based resistive switching random access memory (ReRAM) offers excellent properties to implement future non-volatile memory arrays. Recently, the capability of two-state ReRAMs to implement Boolean logic functionality gained wide interest. Here, we report on seven-states Tantalum Oxide Devices, which enable the realization of an intrinsic modular arithmetic using a ternary number system. Modular arithmetic, a fundamental system for operating on numbers within the limit of a modulus, is known to mathematicians since the days of Euclid and finds applications in diverse areas ranging from e-commerce to musical notations. We demonstrate that multistate devices not only reduce the storage area consumption drastically, but also enable novel in-memory operations, such as computing using high-radix number systems, which could not be implemented using two-state devices. The use of high radix number system reduces the computational complexity by reducing the number of needed digits. Thus the number of calculation operations in an addition and the number of logic devices can be reduced.

Multistate Memristive Tantalum Oxide Devices for Ternary Arithmetic

NASA Astrophysics Data System (ADS)

Kim, Wonjoo; Chattopadhyay, Anupam; Siemon, Anne; Linn, Eike; Waser, Rainer; Rana, Vikas

2016-11-01

Redox-based resistive switching random access memory (ReRAM) offers excellent properties to implement future non-volatile memory arrays. Recently, the capability of two-state ReRAMs to implement Boolean logic functionality gained wide interest. Here, we report on seven-states Tantalum Oxide Devices, which enable the realization of an intrinsic modular arithmetic using a ternary number system. Modular arithmetic, a fundamental system for operating on numbers within the limit of a modulus, is known to mathematicians since the days of Euclid and finds applications in diverse areas ranging from e-commerce to musical notations. We demonstrate that multistate devices not only reduce the storage area consumption drastically, but also enable novel in-memory operations, such as computing using high-radix number systems, which could not be implemented using two-state devices. The use of high radix number system reduces the computational complexity by reducing the number of needed digits. Thus the number of calculation operations in an addition and the number of logic devices can be reduced.

Evaluation of Magnetoresistive RAM for Space Applications

NASA Technical Reports Server (NTRS)

Heidecker, Jason

2014-01-01

Magnetoresistive random-access memory (MRAM) is a non-volatile memory that exploits electronic spin, rather than charge, to store data. Instead of moving charge on and off a floating gate to alter the threshold voltage of a CMOS transistor (creating different bit states), MRAM uses magnetic fields to flip the polarization of a ferromagnetic material thus switching its resistance and bit state. These polarized states are immune to radiation-induced upset, thus making MRAM very attractive for space application. These magnetic memory elements also have infinite data retention and erase/program endurance. Presented here are results of reliability testing of two space-qualified MRAM products from Aeroflex and Honeywell.

Memory interface simulator: A computer design aid

NASA Technical Reports Server (NTRS)

Taylor, D. S.; Williams, T.; Weatherbee, J. E.

1972-01-01

Results are presented of a study conducted with a digital simulation model being used in the design of the Automatically Reconfigurable Modular Multiprocessor System (ARMMS), a candidate computer system for future manned and unmanned space missions. The model simulates the activity involved as instructions are fetched from random access memory for execution in one of the system central processing units. A series of model runs measured instruction execution time under various assumptions pertaining to the CPU's and the interface between the CPU's and RAM. Design tradeoffs are presented in the following areas: Bus widths, CPU microprogram read only memory cycle time, multiple instruction fetch, and instruction mix.

Initiation Mechanisms of Low-loss Swept-ramp Obstacles for Deflagration to Detonation Transition in Pulse Detonation Combustors

DTIC Science & Technology

2009-12-01

minimal pressure losses. 15. NUMBER OF PAGES 113 14. SUBJECT TERMS Pulse Detonation Combustors, PDC, Pulse Detonation Engines, PDE , PDE ...Postgraduate School PDC Pulse Detonation Combustor PDE Pulse Detonation Engine RAM Random Access Memory RDT Research, Design and Test RPL...inhibiting the implementation of this advanced propulsion system. The primary advantage offered by pulse detonation engines ( PDEs ) is the high efficiency

A Design Methodology for Optoelectronic VLSI

DTIC Science & Technology

2007-01-01

current gets converted to a CMOS voltage level through a transimpedance amplifier circuit called a receiver. The output of the receiver is then...change the current flowing from the diode to a voltage that the logic inputs can use. That circuit is called a receiver. It is a transimpedance amplifier ...incorpo- rate random access memory circuits, SRAM or dynamic RAM (DRAM). These circuits use weak internal analog signals that are amplified by sense

Studies Of Single-Event-Upset Models

NASA Technical Reports Server (NTRS)

Zoutendyk, J. A.; Smith, L. S.; Soli, G. A.

1988-01-01

Report presents latest in series of investigations of "soft" bit errors known as single-event upsets (SEU). In this investigation, SEU response of low-power, Schottky-diode-clamped, transistor/transistor-logic (TTL) static random-access memory (RAM) observed during irradiation by Br and O ions in ranges of 100 to 240 and 20 to 100 MeV, respectively. Experimental data complete verification of computer model used to simulate SEU in this circuit.

Energy normalization of TV viewed optical correlation (automated correlation plane analyzer for an optical processor)

NASA Technical Reports Server (NTRS)

Grumet, A.

1981-01-01

An automatic correlation plane processor that can rapidly acquire, identify, and locate the autocorrelation outputs of a bank of multiple optical matched filters is described. The read-only memory (ROM) stored digital silhouette of each image associated with each matched filter allows TV video to be used to collect image energy to provide accurate normalization of autocorrelations. The resulting normalized autocorrelations are independent of the illumination of the matched input. Deviation from unity of a normalized correlation can be used as a confidence measure of correct image identification. Analog preprocessing circuits permit digital conversion and random access memory (RAM) storage of those video signals with the correct amplitude, pulse width, rising slope, and falling slope. TV synchronized addressing of 3 RAMs permits on-line storage of: (1) the maximum unnormalized amplitude, (2) the image x location, and (3) the image y location of the output of each of up to 99 matched filters. A fourth RAM stores all normalized correlations. A normalization approach, normalization for cross correlations, a system's description with block diagrams, and system's applications are discussed.

Resistive switching characteristics and mechanisms in silicon oxide memory devices

NASA Astrophysics Data System (ADS)

Chang, Yao-Feng; Fowler, Burt; Chen, Ying-Chen; Zhou, Fei; Wu, Xiaohan; Chen, Yen-Ting; Wang, Yanzhen; Xue, Fei; Lee, Jack C.

2016-05-01

Intrinsic unipolar SiOx-based resistance random access memories (ReRAM) characterization, switching mechanisms, and applications have been investigated. Device structures, material compositions, and electrical characteristics are identified that enable ReRAM cells with high ON/OFF ratio, low static power consumption, low switching power, and high readout-margin using complementary metal-oxide semiconductor transistor (CMOS)-compatible SiOx-based materials. These ideas are combined with the use of horizontal and vertical device structure designs, composition optimization, electrical control, and external factors to help understand resistive switching (RS) mechanisms. Measured temperature effects, pulse response, and carrier transport behaviors lead to compact models of RS mechanisms and energy band diagrams in order to aid the development of computer-aided design for ultralarge-v scale integration. This chapter presents a comprehensive investigation of SiOx-based RS characteristics and mechanisms for the post-CMOS device era.

Methods for resistive switching of memristors

DOEpatents

Mickel, Patrick R.; James, Conrad D.; Lohn, Andrew; Marinella, Matthew; Hsia, Alexander H.

2016-05-10

The present invention is directed generally to resistive random-access memory (RRAM or ReRAM) devices and systems, as well as methods of employing a thermal resistive model to understand and determine switching of such devices. In particular example, the method includes generating a power-resistance measurement for the memristor device and applying an isothermal model to the power-resistance measurement in order to determine one or more parameters of the device (e.g., filament state).

Nonvolatile ferroelectric memory based on PbTiO3 gated single-layer MoS2 field-effect transistor

NASA Astrophysics Data System (ADS)

Shin, Hyun Wook; Son, Jong Yeog

2018-01-01

We fabricated ferroelectric non-volatile random access memory (FeRAM) based on a field effect transistor (FET) consisting of a monolayer MoS2 channel and a ferroelectric PbTiO3 (PTO) thin film of gate insulator. An epitaxial PTO thin film was deposited on a Nb-doped SrTiO3 (Nb:STO) substrate via pulsed laser deposition. A monolayer MoS2 sheet was exfoliated from a bulk crystal and transferred to the surface of the PTO/Nb:STO. Structural and surface properties of the PTO thin film were characterized by X-ray diffraction and atomic force microscopy, respectively. Raman spectroscopy analysis was performed to identify the single-layer MoS2 sheet on the PTO/Nb:STO. We obtained mobility value (327 cm2/V·s) of the MoS2 channel at room temperature. The MoS2-PTO FeRAM FET showed a wide memory window with 17 kΩ of resistance variation which was attributed to high remnant polarization of the epitaxially grown PTO thin film. According to the fatigue resistance test for the FeRAM FET, however, the resistance states gradually varied during the switching cycles of 109. [Figure not available: see fulltext.

An FPGA-Based Test-Bed for Reliability and Endurance Characterization of Non-Volatile Memory

NASA Technical Reports Server (NTRS)

Rao, Vikram; Patel, Jagdish; Patel, Janak; Namkung, Jeffrey

2001-01-01

Memory technologies are divided into two categories. The first category, nonvolatile memories, are traditionally used in read-only or read-mostly applications because of limited write endurance and slow write speed. These memories are derivatives of read only memory (ROM) technology, which includes erasable programmable ROM (EPROM), electrically-erasable programmable ROM (EEPROM), Flash, and more recent ferroelectric non-volatile memory technology. Nonvolatile memories are able to retain data in the absence of power. The second category, volatile memories, are random access memory (RAM) devices including SRAM and DRAM. Writing to these memories is fast and write endurance is unlimited, so they are most often used to store data that change frequently, but they cannot store data in the absence of power. Nonvolatile memory technologies with better future potential are FRAM, Chalcogenide, GMRAM, Tunneling MRAM, and Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) EEPROM.

Improvement of multi-level resistive switching characteristics in solution-processed AlO x -based non-volatile resistive memory using microwave irradiation

NASA Astrophysics Data System (ADS)

Kim, Seung-Tae; Cho, Won-Ju

2018-01-01

We fabricated a resistive random access memory (ReRAM) device on a Ti/AlO x /Pt structure with solution-processed AlO x switching layer using microwave irradiation (MWI), and demonstrated multi-level cell (MLC) operation. To investigate the effect of MWI power on the MLC characteristics, post-deposition annealing was performed at 600-3000 W after AlO x switching layer deposition, and the MLC operation was compared with as-deposited (as-dep) and conventional thermally annealing (CTA) treated devices. All solution-processed AlO x -based ReRAM devices exhibited bipolar resistive switching (BRS) behavior. We found that these devices have four-resistance states (2 bits) of MLC operation according to the modulation of the high-resistance state (HRSs) through reset voltage control. Particularly, compared to the as-dep and CTA ReRAM devices, the MWI-treated ReRAM devices showed a significant increase in the memory window and stable endurance for multi-level operation. Moreover, as the MWI power increased, excellent MLC characteristics were exhibited because the resistance ratio between each resistance state was increased. In addition, it exhibited reliable retention characteristics without deterioration at 25 °C and 85 °C for 10 000 s. Finally, the relationship between the chemical characteristics of the solution-processed AlO x switching layer and BRS-based multi-level operation according to the annealing method and MWI power was investigated using x-ray photoelectron spectroscopy.

Emerging Applications for High K Materials in VLSI Technology

PubMed Central

Clark, Robert D.

2014-01-01

The current status of High K dielectrics in Very Large Scale Integrated circuit (VLSI) manufacturing for leading edge Dynamic Random Access Memory (DRAM) and Complementary Metal Oxide Semiconductor (CMOS) applications is summarized along with the deposition methods and general equipment types employed. Emerging applications for High K dielectrics in future CMOS are described as well for implementations in 10 nm and beyond nodes. Additional emerging applications for High K dielectrics include Resistive RAM memories, Metal-Insulator-Metal (MIM) diodes, Ferroelectric logic and memory devices, and as mask layers for patterning. Atomic Layer Deposition (ALD) is a common and proven deposition method for all of the applications discussed for use in future VLSI manufacturing. PMID:28788599

Radiation evaluation study of LSI RAM technologies

NASA Astrophysics Data System (ADS)

Dinger, G. L.; Knoll, M. G.

1980-01-01

Five commercial LSI static random access memory technologies having a 1 kilobit capacity were radiation characterized. Arrays from the transistor-transistor-logic (TTL), Schottky TTL, n-channel metal oxide semiconductor, complementary metal oxide semiconductor (CMOS), and CMOS/silicon on sapphire families were evaluated. Radiation failure thresholds for gamma doserate logic upset, total gamma dose survivability, and neutron fluence survivability were determined. A brief analysis of the radiation failure mechanism for each of the logic families tested is included.

System for loading executable code into volatile memory in a downhole tool

DOEpatents

Hall, David R.; Bartholomew, David B.; Johnson, Monte L.

2007-09-25

A system for loading an executable code into volatile memory in a downhole tool string component comprises a surface control unit comprising executable code. An integrated downhole network comprises data transmission elements in communication with the surface control unit and the volatile memory. The executable code, stored in the surface control unit, is not permanently stored in the downhole tool string component. In a preferred embodiment of the present invention, the downhole tool string component comprises boot memory. In another embodiment, the executable code is an operating system executable code. Preferably, the volatile memory comprises random access memory (RAM). A method for loading executable code to volatile memory in a downhole tool string component comprises sending the code from the surface control unit to a processor in the downhole tool string component over the network. A central processing unit writes the executable code in the volatile memory.

Resistive switching characteristics of HfO2-based memory devices on flexible plastics.

PubMed

Han, Yong; Cho, Kyoungah; Park, Sukhyung; Kim, Sangsig

2014-11-01

In this study, we examine the characteristics of HfO2-based resistive switching random access memory (ReRAM) devices on flexible plastics. The Pt/HfO2/Au ReRAM devices exhibit the unipolar resistive switching behaviors caused by the conducting filaments. From the Auger depth profiles of the HfO2 thin film, it is confirmed that the relatively lower oxygen content in the interface of the bottom electrode is responsible for the resistive switching by oxygen vacancies. And the unipolar resistive switching behaviors are analyzed from the C-V characteristics in which negative and positive capacitances are measured in the low-resistance state and the high-resistance state, respectively. The devices have a high on/off ratio of 10(4) and the excellent retention properties even after a continuous bending test of two thousand cycles. The correlation between the device size and the memory characteristics is investigated as well. A relatively smaller-sized device having a higher on/off ratio operates at a higher voltage than a relatively larger-sized device.

Resistive RAMs as analog trimming elements

NASA Astrophysics Data System (ADS)

Aziza, H.; Perez, A.; Portal, J. M.

2018-04-01

This work investigates the use of Resistive Random Access Memory (RRAM) as an analog trimming device. The analog storage feature of the RRAM cell is evaluated and the ability of the RRAM to hold several resistance states is exploited to propose analog trim elements. To modulate the memory cell resistance, a series of short programming pulses are applied across the RRAM cell allowing a fine calibration of the RRAM resistance. The RRAM non volatility feature makes the analog device powers up already calibrated for the system in which the analog trimmed structure is embedded. To validate the concept, a test structure consisting of a voltage reference is evaluated.

A floating-point/multiple-precision processor for airborne applications

NASA Technical Reports Server (NTRS)

Yee, R.

1982-01-01

A compact input output (I/O) numerical processor capable of performing floating-point, multiple precision and other arithmetic functions at execution times which are at least 100 times faster than comparable software emulation is described. The I/O device is a microcomputer system containing a 16 bit microprocessor, a numerical coprocessor with eight 80 bit registers running at a 5 MHz clock rate, 18K random access memory (RAM) and 16K electrically programmable read only memory (EPROM). The processor acts as an intelligent slave to the host computer and can be programmed in high order languages such as FORTRAN and PL/M-86.

Imaging System Model Crammed Into A 32K Microcomputer

NASA Astrophysics Data System (ADS)

Tyson, Robert K.

1986-12-01

An imaging system model, based upon linear systems theory, has been developed for a microcomputer with less than 32K of free random access memory (RAM). The model includes diffraction effects of the optics, aberrations in the optics, and atmospheric propagation transfer functions. Variables include pupil geometry, magnitude and character of the aberrations, and strength of atmospheric turbulence ("seeing"). Both coherent and incoherent image formation can be evaluated. The techniques employed for crowding the model into a very small computer will be discussed in detail. Simplifying assumptions for the diffraction and aberration phenomena will be shown along with practical considerations in modeling the optical system. Particular emphasis is placed on avoiding inaccuracies in modeling the pupil and the associated optical transfer function knowing limits on spatial frequency content and resolution. Memory and runtime constraints are analyzed stressing the efficient use of assembly language Fourier transform routines, disk input/output, and graphic displays. The compromises between computer time, limited RAM, and scientific accuracy will be given with techniques for balancing these parameters for individual needs.

Using Dopants to Tune Oxygen Vacancy Formation in Transition Metal Oxide Resistive Memory.

PubMed

Jiang, Hao; Stewart, Derek A

2017-05-17

Introducing dopants is an important way to tailor and improve electronic properties of transition metal oxides used as high-k dielectric thin films and resistance switching layers in leading memory technologies, such as dynamic and resistive random access memory (ReRAM). Ta 2 O 5 has recently received increasing interest because Ta 2 O 5 -based ReRAM demonstrates high switching speed, long endurance, and low operating voltage. However, advances in optimizing device characteristics with dopants have been hindered by limited and contradictory experiments in this field. We report on a systematic study on how various metal dopants affect oxygen vacancy formation in crystalline and amorphous Ta 2 O 5 from first principles. We find that isoelectronic dopants and weak n-type dopants have little impact on neutral vacancy formation energy and that p-type dopants can lower the formation energy significantly by introducing holes into the system. In contrast, n-type dopants have a deleterious effect and actually increase the formation energy for charged oxygen vacancies. Given the similar doping trend reported for other binary transition metal oxides, this doping trend should be universally valid for typical binary transition metal oxides. Based on this guideline, we propose that p-type dopants (Al, Hf, Zr, and Ti) can lower the forming/set voltage and improve retention properties of Ta 2 O 5 ReRAM.

JuxtaView - A tool for interactive visualization of large imagery on scalable tiled displays

USGS Publications Warehouse

Krishnaprasad, N.K.; Vishwanath, V.; Venkataraman, S.; Rao, A.G.; Renambot, L.; Leigh, J.; Johnson, A.E.; Davis, B.

2004-01-01

JuxtaView is a cluster-based application for viewing ultra-high-resolution images on scalable tiled displays. We present in JuxtaView, a new parallel computing and distributed memory approach for out-of-core montage visualization, using LambdaRAM, a software-based network-level cache system. The ultimate goal of JuxtaView is to enable a user to interactively roam through potentially terabytes of distributed, spatially referenced image data such as those from electron microscopes, satellites and aerial photographs. In working towards this goal, we describe our first prototype implemented over a local area network, where the image is distributed using LambdaRAM, on the memory of all nodes of a PC cluster driving a tiled display wall. Aggressive pre-fetching schemes employed by LambdaRAM help to reduce latency involved in remote memory access. We compare LambdaRAM with a more traditional memory-mapped file approach for out-of-core visualization. ?? 2004 IEEE.

Advanced Cu chemical displacement technique for SiO2-based electrochemical metallization ReRAM application.

PubMed

Chin, Fun-Tat; Lin, Yu-Hsien; You, Hsin-Chiang; Yang, Wen-Luh; Lin, Li-Min; Hsiao, Yu-Ping; Ko, Chum-Min; Chao, Tien-Sheng

2014-01-01

This study investigates an advanced copper (Cu) chemical displacement technique (CDT) with varying the chemical displacement time for fabricating Cu/SiO2-stacked resistive random-access memory (ReRAM). Compared with other Cu deposition methods, this CDT easily controls the interface of the Cu-insulator, the switching layer thickness, and the immunity of the Cu etching process, assisting the 1-transistor-1-ReRAM (1T-1R) structure and system-on-chip integration. The modulated shape of the Cu-SiO2 interface and the thickness of the SiO2 layer obtained by CDT-based Cu deposition on SiO2 were confirmed by scanning electron microscopy and atomic force microscopy. The CDT-fabricated Cu/SiO2-stacked ReRAM exhibited lower operation voltages and more stable data retention characteristics than the control Cu/SiO2-stacked sample. As the Cu CDT processing time increased, the forming and set voltages of the CDT-fabricated Cu/SiO2-stacked ReRAM decreased. Conversely, decreasing the processing time reduced the on-state current and reset voltage while increasing the endurance switching cycle time. Therefore, the switching characteristics were easily modulated by Cu CDT, yielding a high performance electrochemical metallization (ECM)-type ReRAM.

On the impact of fiber-delay-lines (FDL) in an all-optical network (AON) bottleneck without wavelength conversion

NASA Astrophysics Data System (ADS)

Argibay-Losada, Pablo Jesus; Sahin, Gokhan

2014-08-01

Random access memories (RAM) are fundamental in conventional electronic switches and routers to manage short-term congestion and to decrease data loss probabilities. Switches in all-optical networks (AONs), however, do not have access to optical RAM, and therefore are prone to much higher loss levels than their electronic counterparts. Fiber-delay-lines (FDLs), able to delay an optical data packet a fixed amount of time, have been proposed in the literature as a means to alleviate those high loss levels. However, they are extremely bulky to manage, so their usage introduces a trade-off between practicality and performance in the design and operation of the AON. In this paper we study the influence that FDLs have in the performance of flows crossing an all-optical switch that acts as their bottleneck. We show how extremely low numbers of FDLs (e.g., 1 or 2) can help in reducing losses by several orders of magnitude in several illustrative scenarios with high aggregation levels. Our results therefore suggest that FDLs can be a practical means of dealing with congestion in AONs in the absence of optical RAM buffers or of suitable data interchange protocols specifically designed for AONs.

Multi-port, optically addressed RAM

NASA Technical Reports Server (NTRS)

Johnston, Alan R. (Inventor); Nixon, Robert H. (Inventor); Bergman, Larry A. (Inventor); Esener, Sadik (Inventor)

1989-01-01

A random access memory addressing system utilizing optical links between memory and the read/write logic circuits comprises addressing circuits including a plurality of light signal sources, a plurality of optical gates including optical detectors associated with the memory cells, and a holographic optical element adapted to reflect and direct the light signals to the desired memory cell locations. More particularly, it is a multi-port, binary computer memory for interfacing with a plurality of computers. There are a plurality of storage cells for containing bits of binary information, the storage cells being disposed at the intersections of a plurality of row conductors and a plurality of column conductors. There is interfacing logic for receiving information from the computers directing access to ones of the storage cells. There are first light sources associated with the interfacing logic for transmitting a first light beam with the access information modulated thereon. First light detectors are associated with the storage cells for receiving the first light beam, for generating an electrical signal containing the access information, and for conducting the electrical signal to the one of the storage cells to which it is directed. There are holographic optical elements for reflecting the first light beam from the first light sources to the first light detectors.

Self-Rectifying Effect in Resistive Switching Memory Using Amorphous InGaZnO

NASA Astrophysics Data System (ADS)

Lee, Jin-Woo; Kwon, Hyeon-Min; Kim, Myeong-Ho; Lee, Seung-Ryul; Kim, Young-Bae; Choi, Duck-Kyun

2014-05-01

Resistance random access memory (ReRAM) has received attention as next-generation memory because of its excellent operating properties and high density integration capability as a crossbar array. However, the application of the existing ReRAM as a crossbar array may lead to crosstalk between adjacent cells due to its symmetric I- V characteristics. In this study, the self-rectifying effect of contact between amorphous In-Ga-Zn-O (a-IGZO) and TaO x was examined in a Pt/a-IGZO/TaO x /Al2O3/W structure. The experimental results show not only self-rectifying behavior but also forming-free characteristics. During the deposition of a-IGZO on the TaO x , an oxygen-rich TaO x interfacial layer was formed. The rectifying effect was observed regardless of the interface formation and is believed to be associated with Schottky contact formation between a-IGZO and TaO x . The current level remained unchanged despite repeated DC sweep cycles. The low resistance state/high resistance state ratio was about 101 at a read voltage of -0.5 V, and the rectifying ratio was about 103 at ±2 V.

Error analysis and prevention of cosmic ion-induced soft errors in static CMOS RAMs

NASA Astrophysics Data System (ADS)

Diehl, S. E.; Ochoa, A., Jr.; Dressendorfer, P. V.; Koga, P.; Kolasinski, W. A.

1982-12-01

Cosmic ray interactions with memory cells are known to cause temporary, random, bit errors in some designs. The sensitivity of polysilicon gate CMOS static RAM designs to logic upset by impinging ions has been studied using computer simulations and experimental heavy ion bombardment. Results of the simulations are confirmed by experimental upset cross-section data. Analytical models have been extended to determine and evaluate design modifications which reduce memory cell sensitivity to cosmic ions. A simple design modification, the addition of decoupling resistance in the feedback path, is shown to produce static RAMs immune to cosmic ray-induced bit errors.

A Decision Model for Selection of Microcomputers and Operating Systems.

DTIC Science & Technology

1984-06-01

is resilting in application software (for microccmputers) being developed almost exclu- sively tor the IBM PC and compatiole systems. NAVDAC ielt that...location can be indepen- dently accessed. RAN memory is also often called read/ write memory, hecause new information can be written into and read from...when power is lost; this is also read/ write memory. Bubble memory, however, has significantly slower access times than RAM or RON and also is not preva

Ti-Doped GaOx Resistive Switching Memory with Self-Rectifying Behavior by Using NbOx/Pt Bilayers.

PubMed

Park, Ju Hyun; Jeon, Dong Su; Kim, Tae Geun

2017-12-13

Crossbar arrays (CBAs) with resistive random access memory (ReRAM) constitute an established architecture for high-density memory. However, sneak paths via unselected cells increase the total power consumption of these devices and limit the array size. To eliminate such sneak-path problems, we propose a Ti/GaO x /NbO x /Pt structure with a self-rectifying resistive-switching (RS) behavior. In this structure, to reduce the operating voltage, we used a Ti/GaO x stack to increase the number of trap sites in the RS GaO x layer through interfacial reactions between the Ti and GaO x layers. This increase enables easier carrier transport with reduced electric fields. We then adopted a NbO x /Pt stack to add rectifying behavior to the RS GaO x layer. This behavior is a result of the large Schottky barrier height between the NbO x and Pt layers. Finally, both the Ti/GaO x and NbO x /Pt stacks were combined to realize a self-rectifying ReRAM device, which exhibited excellent performance. Characteristics of the device include a low operating voltage range (-2.8 to 2.5 V), high on/off ratios (∼20), high selectivity (∼10 4 ), high operating speeds (200-500 ns), a very low forming voltage (∼3 V), stable operation, and excellent uniformity for high-density CBA-based ReRAM applications.

Mitigation of High Altitude and Low Earth Orbit Radiation Effects on Microelectronics via Shielding or Error Detection and Correction Systems

NASA Technical Reports Server (NTRS)

Gupta, Kajal (Technical Monitor); Kirby, Kelvin

2004-01-01

The NASA Cooperative Agreement NAG4-210 was granted under the FY2000 Faculty Awards for Research (FAR) Program. The project was proposed to examine the effects of charged particles and neutrons on selected random access memory (RAM) technologies. The concept of the project was to add to the current knowledge of Single Event Effects (SEE) concerning RAM and explore the impact of selected forms of radiation on Error Detection and Correction Systems. The project was established as an extension of a previous FAR awarded to Prairie View A&M University (PVAMU), under the direction of Dr. Richard Wilkins as principal investigator. The NASA sponsored Center for Applied Radiation Research (CARR) at PVAMU developed an electronic test-bed to explore and quantify SEE on RAM from charged particles and neutrons. The test-bed was developed using 486DX microprocessor technology (PC-104) and a custom test board to mount RAM integrated circuits or other electronic devices. The test-bed had two configurations - a bench test version for laboratory experiments and a 400 Hz powered rack version for flight experiments. The objectives of this project were to: 1) Upgrade the Electronic Test-bed (ETB) to a Pentium configuration; 2) Accommodate more than only 8 Mbytes of RAM; 3) Explore Error Detection and Correction Systems for radiation effects; 4) Test modern RAM technologies in radiation environments.

Single-event effects in avionics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Normand, E.

1996-04-01

The occurrence of single-event upset (SEU) in aircraft electronics has evolved from a series of interesting anecdotal incidents to accepted fact. A study completed in 1992 demonstrated that SEU`s are real, that the measured in-flight rates correlate with the atmospheric neutron flux, and that the rates can be calculated using laboratory SEU data. Once avionics DEU was shown to be an actual effect, it had to be dealt with in avionics designs. The major concern is in random access memories (RAM`s), both static (SRAM`s) and dynamic (DRAM`s), because these microelectronic devices contain the largest number of bits, but other parts,more » such as microprocessors, are also potentially susceptible to upset. In addition, other single-event effects (SEE`s), specifically latch-up and burnout, can also be induced by atmospheric neutrons.« less

The effect of reactive ion etch (RIE) process conditions on ReRAM device performance

NASA Astrophysics Data System (ADS)

Beckmann, K.; Holt, J.; Olin-Ammentorp, W.; Alamgir, Z.; Van Nostrand, J.; Cady, N. C.

2017-09-01

The recent surge of research on resistive random access memory (ReRAM) devices has resulted in a wealth of different materials and fabrication approaches. In this work, we describe the performance implications of utilizing a reactive ion etch (RIE) based process to fabricate HfO2 based ReRAM devices, versus a more unconventional shadow mask fabrication approach. The work is the result of an effort to increase device yield and reduce individual device size. Our results show that choice of RIE etch gas (SF6 versus CF4) is critical for defining the post-etch device profile (cross-section), and for tuning the removal of metal layers used as bottom electrodes in the ReRAM device stack. We have shown that etch conditions leading to a tapered profile for the device stack cause poor electrical performance, likely due to metal re-deposition during etching, and damage to the switching layer. These devices exhibit nonlinear I-V during the low resistive state, but this could be improved to linear behavior once a near-vertical etch profile was achieved. Device stacks with vertical etch profiles also showed an increase in forming voltage, reduced switching variability and increased endurance.

Data storage technology comparisons

NASA Technical Reports Server (NTRS)

Katti, Romney R.

1990-01-01

The role of data storage and data storage technology is an integral, though conceptually often underestimated, portion of data processing technology. Data storage is important in the mass storage mode in which generated data is buffered for later use. But data storage technology is also important in the data flow mode when data are manipulated and hence required to flow between databases, datasets and processors. This latter mode is commonly associated with memory hierarchies which support computation. VLSI devices can reasonably be defined as electronic circuit devices such as channel and control electronics as well as highly integrated, solid-state devices that are fabricated using thin film deposition technology. VLSI devices in both capacities play an important role in data storage technology. In addition to random access memories (RAM), read-only memories (ROM), and other silicon-based variations such as PROM's, EPROM's, and EEPROM's, integrated devices find their way into a variety of memory technologies which offer significant performance advantages. These memory technologies include magnetic tape, magnetic disk, magneto-optic disk, and vertical Bloch line memory. In this paper, some comparison between selected technologies will be made to demonstrate why more than one memory technology exists today, based for example on access time and storage density at the active bit and system levels.

Effects of Piezoelectric Potential of ZnO on Resistive Switching Characteristics of Flexible ZnO/TiO2 Heterojunction Cells

NASA Astrophysics Data System (ADS)

Li, Hongxia; Zhou, You; Du, Gang; Huang, Yanwei; Ji, Zhenguo

2018-03-01

Flexible resistance random access memory (ReRAM) devices with a heterojunction structure of PET/ITO/ZnO/TiO2/Au were fabricated on polyethylene terephthalate/indium tin oxide (PET/ITO) substrates by different physical and chemical preparation methods. X-ray diffraction, scanning electron microscopy and atomic force microscopy were carried out to investigate the crystal structure, surface topography and cross-sectional structure of the prepared films. X-ray photoelectron spectroscopy was also used to identify the chemical state of Ti, O and Zn elements. Theoretical and experimental analyses were conducted to identify the effect of piezoelectric potential of ZnO on resistive switching characteristics of flexible ZnO/TiO2 heterojunction cells. The results showed a pathway to enhance the performance of ReRAM devices by engineering the interface barrier, which is also feasible for other electronics, optoelectronics and photovoltaic devices.

Unified computational model of transport in metal-insulating oxide-metal systems

NASA Astrophysics Data System (ADS)

Tierney, B. D.; Hjalmarson, H. P.; Jacobs-Gedrim, R. B.; Agarwal, Sapan; James, C. D.; Marinella, M. J.

2018-04-01

A unified physics-based model of electron transport in metal-insulator-metal (MIM) systems is presented. In this model, transport through metal-oxide interfaces occurs by electron tunneling between the metal electrodes and oxide defect states. Transport in the oxide bulk is dominated by hopping, modeled as a series of tunneling events that alter the electron occupancy of defect states. Electron transport in the oxide conduction band is treated by the drift-diffusion formalism and defect chemistry reactions link all the various transport mechanisms. It is shown that the current-limiting effect of the interface band offsets is a function of the defect vacancy concentration. These results provide insight into the underlying physical mechanisms of leakage currents in oxide-based capacitors and steady-state electron transport in resistive random access memory (ReRAM) MIM devices. Finally, an explanation of ReRAM bipolar switching behavior based on these results is proposed.

Selector-free resistive switching memory cell based on BiFeO3 nano-island showing high resistance ratio and nonlinearity factor

PubMed Central

Jeon, Ji Hoon; Joo, Ho-Young; Kim, Young-Min; Lee, Duk Hyun; Kim, Jin-Soo; Kim, Yeon Soo; Choi, Taekjib; Park, Bae Ho

2016-01-01

Highly nonlinear bistable current-voltage (I–V) characteristics are necessary in order to realize high density resistive random access memory (ReRAM) devices that are compatible with cross-point stack structures. Up to now, such I–V characteristics have been achieved by introducing complex device structures consisting of selection elements (selectors) and memory elements which are connected in series. In this study, we report bipolar resistive switching (RS) behaviours of nano-crystalline BiFeO3 (BFO) nano-islands grown on Nb-doped SrTiO3 substrates, with large ON/OFF ratio of 4,420. In addition, the BFO nano-islands exhibit asymmetric I–V characteristics with high nonlinearity factor of 1,100 in a low resistance state. Such selector-free RS behaviours are enabled by the mosaic structures and pinned downward ferroelectric polarization in the BFO nano-islands. The high resistance ratio and nonlinearity factor suggest that our BFO nano-islands can be extended to an N × N array of N = 3,740 corresponding to ~107 bits. Therefore, our BFO nano-island showing both high resistance ratio and nonlinearity factor offers a simple and promising building block of high density ReRAM. PMID:27001415

The Effect of NUMA Tunings on CPU Performance

NASA Astrophysics Data System (ADS)

Hollowell, Christopher; Caramarcu, Costin; Strecker-Kellogg, William; Wong, Antonio; Zaytsev, Alexandr

2015-12-01

Non-Uniform Memory Access (NUMA) is a memory architecture for symmetric multiprocessing (SMP) systems where each processor is directly connected to separate memory. Indirect access to other CPU's (remote) RAM is still possible, but such requests are slower as they must also pass through that memory's controlling CPU. In concert with a NUMA-aware operating system, the NUMA hardware architecture can help eliminate the memory performance reductions generally seen in SMP systems when multiple processors simultaneously attempt to access memory. The x86 CPU architecture has supported NUMA for a number of years. Modern operating systems such as Linux support NUMA-aware scheduling, where the OS attempts to schedule a process to the CPU directly attached to the majority of its RAM. In Linux, it is possible to further manually tune the NUMA subsystem using the numactl utility. With the release of Red Hat Enterprise Linux (RHEL) 6.3, the numad daemon became available in this distribution. This daemon monitors a system's NUMA topology and utilization, and automatically makes adjustments to optimize locality. As the number of cores in x86 servers continues to grow, efficient NUMA mappings of processes to CPUs/memory will become increasingly important. This paper gives a brief overview of NUMA, and discusses the effects of manual tunings and numad on the performance of the HEPSPEC06 benchmark, and ATLAS software.

Filamentary model in resistive switching materials

NASA Astrophysics Data System (ADS)

Jasmin, Alladin C.

2017-12-01

The need for next generation computer devices is increasing as the demand for efficient data processing increases. The amount of data generated every second also increases which requires large data storage devices. Oxide-based memory devices are being studied to explore new research frontiers thanks to modern advances in nanofabrication. Various oxide materials are studied as active layers for non-volatile memory. This technology has potential application in resistive random-access-memory (ReRAM) and can be easily integrated in CMOS technologies. The long term perspective of this research field is to develop devices which mimic how the brain processes information. To realize such application, a thorough understanding of the charge transport and switching mechanism is important. A new perspective in the multistate resistive switching based on current-induced filament dynamics will be discussed. A simple equivalent circuit of the device gives quantitative information about the nature of the conducting filament at different resistance states.

Implementing a bubble memory hierarchy system

NASA Technical Reports Server (NTRS)

Segura, R.; Nichols, C. D.

1979-01-01

This paper reports on implementation of a magnetic bubble memory in a two-level hierarchial system. The hierarchy used a major-minor loop device and RAM under microprocessor control. Dynamic memory addressing, dual bus primary memory, and hardware data modification detection are incorporated in the system to minimize access time. It is the objective of the system to incorporate the advantages of bipolar memory with that of bubble domain memory to provide a smart, optimal memory system which is easy to interface and independent of user's system.

Structure and properties of a model conductive filament/host oxide interface in HfO2-based ReRAM

NASA Astrophysics Data System (ADS)

Padilha, A. C. M.; McKenna, K. P.

2018-04-01

Resistive random-access memory (ReRAM) is a promising class of nonvolatile memory capable of storing information via its resistance state. In the case of hafnium oxide-based devices, experimental evidence shows that a conductive oxygen-deficient filament is formed and broken inside of the device by oxygen migration, leading to switching of its resistance state. However, little is known about the nature of this conductive phase, its interface with the host oxide, or the associated interdiffusion of oxygen, presenting a challenge to understanding the switching mechanism and device properties. To address these problems, we present atomic-scale first-principles simulations of a prototypical conductive phase (HfO), the electronic properties of its interface with HfO2, as well as stability with respect to oxygen diffusion across the interface. We show that the conduction-band offset between HfO and HfO2 is 1.3 eV, smaller than typical electrode-HfO2 band offsets, suggesting that positive charging and band bending should occur at the conductive filament-HfO2 interface. We also show that transfer of oxygen across the interface, from HfO2 into HfO, costs around 1.2 eV per atom and leads to a gradual opening of the HfO band gap, and hence disruption of the electrical conductivity. These results provide invaluable insights into understanding the switching mechanism for HfO2-based ReRAM.

Blackcomb: Hardware-Software Co-design for Non-Volatile Memory in Exascale Systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Schreiber, Robert

Summary of technical results of Blackcomb Memory Devices We explored various different memory technologies (STTRAM, PCRAM, FeRAM, and ReRAM). The progress can be classified into three categories, below. Modeling and Tool Releases Various modeling tools have been developed over the last decade to help in the design of SRAM or DRAM-based memory hierarchies. To explore new design opportunities that NVM technologies can bring to the designers, we have developed similar high-level models for NVM, including PCRAMsim [Dong 2009], NVSim [Dong 2012], and NVMain [Poremba 2012]. NVSim is a circuit-level model for NVM performance, energy, and area estimation, which supports variousmore » NVM technologies, including STT-RAM, PCRAM, ReRAM, and legacy NAND Flash. NVSim is successfully validated against industrial NVM prototypes, and it is expected to help boost architecture-level NVM-related studies. On the other side, NVMain is a cycle accurate main memory simulator designed to simulate emerging nonvolatile memories at the architectural level. We have released these models as open source tools and provided contiguous support to them. We also proposed PS3-RAM, which is a fast, portable and scalable statistical STT-RAM reliability analysis model [Wen 2012]. Design Space Exploration and Optimization With the support of these models, we explore different device/circuit optimization techniques. For example, in [Niu 2012a] we studied the power reduction technique for the application of ECC scheme in ReRAM designs and proposed to use ECC code to relax the BER (Bit Error Rate) requirement of a single memory to improve the write energy consumption and latency for both 1T1R and cross-point ReRAM designs. In [Xu 2011], we proposed a methodology to design STT-RAM for different optimization goals such as read performance, write performance and write energy by leveraging the trade-off between write current and write time of MTJ. We also studied the tradeoffs in building a reliable crosspoint ReRAM array [Niu 2012b]. We have conducted an in depth analysis of the circuit and system level design implications of multi-layer cross-point Resistive RAM (MLCReRAM) from performance, power and reliability perspectives [Xu 2013]. The objective of this study is to understand the design trade-offs of this technology with respect to the MLC Phase Change Memory (MLCPCM).Our MLC ReRAM design at the circuit and system levels indicates that different resistance allocation schemes, programming strategies, peripheral designs, and material selections profoundly affect the area, latency, power, and reliability of MLC ReRAM. Based on this analysis, we conduct two case studies: first we compare MLC ReRAM design against MLC phase-change memory (PCM) and multi-layer cross-point ReRAM design, and point out why multi-level ReRAM is appealing; second we further explore the design space for MLC ReRAM. Architecture and Application We explored hybrid checkpointing using phase-change memory for future exascale systems [Dong 2011] and showed that the use of nonvolatile memory for local checkpointing significantly increases the number of faults covered by local checkpoints and reduces the probability of a global failure in the middle of a global checkpoint to less than 1%. We also proposed a technique called i2WAP to mitigate the write variations in NVM-based last-level cache for the improvement of the NVM lifetime [Wang 2013]. Our wear leveling technique attempts to work around the limitations of write endurance by arranging data access so that write operations can be distributed evenly across all the storage cells. During our intensive research on fault-tolerant NVM design, we found that ECC cannot effectively tolerate hard errors from limited write endurance and process imperfection. Therefore, we devised a novel Point and Discard (PAD) architecture in in [ 2012] as a hard-error-tolerant architecture for ReRAM-based Last Level Caches. PAD improves the lifetime of ReRAM caches by 1.6X-440X under different process variations without performance overhead in the system's early life. We have investigated the applicability of NVM for persistent memory design [Zhao 2013]. New byte addressable NVM enables fast persistent memory that allows in-memory persistent data objects to be updated with much higher throughput. Despite the significant improvement, the performance of these designs is only 50% of the native system with no persistence support, due to the logging or copy-on-write mechanisms used to update the persistent memory. A challenge in this approach is therefore how to efficiently enable atomic, consistent, and durable updates to ensure data persistence that survives application and/or system failures. We have designed a persistent memory system, called Klin, that can provide performance as close as that of the native system. The Klin design adopts a non-volatile cache and a non-volatile main memory for constructing a multi-versioned durable memory system, enabling atomic updates without logging or copy-on-write. Our evaluation shows that the proposed Kiln mechanism can achieve up to 2X of performance improvement to NVRAM-based persistent memory employing write-ahead logging. In addition, our design has numerous practical advantages: a simple and intuitive abstract interface, microarchitecture-level optimizations, fast recovery from failures, and no redundant writes to slow non-volatile storage media. The work was published in MICRO 2013 and received Best Paper Honorable Mentioned Award.« less

Uniform Self-rectifying Resistive Switching Behavior via Preformed Conducting Paths in a Vertical-type Ta2O5/HfO2-x Structure with a Sub-μm(2) Cell Area.

PubMed

Yoon, Jung Ho; Yoo, Sijung; Song, Seul Ji; Yoon, Kyung Jean; Kwon, Dae Eun; Kwon, Young Jae; Park, Tae Hyung; Kim, Hye Jin; Shao, Xing Long; Kim, Yumin; Hwang, Cheol Seong

2016-07-20

To replace or succeed the present NAND flash memory, resistive switching random access memory (ReRAM) should be implemented in the vertical-type crossbar array configuration. The ReRAM cell must have a highly reproducible resistive switching (RS) performance and an electroforming-free, self-rectifying, low-power-consumption, multilevel-switching, and easy fabrication process with a deep sub-μm(2) cell area. In this work, a Pt/Ta2O5/HfO2-x/TiN RS memory cell fabricated in the form of a vertical-type structure was presented as a feasible contender to meet the above requirements. While the fundamental RS characteristics of this material based on the electron trapping/detrapping mechanisms have been reported elsewhere, the influence of the cell scaling size to 0.34 μm(2) on the RS performance by adopting the vertical integration scheme was carefully examined in this work. The smaller cell area provided much better switching uniformity while all the other benefits of this specific material system were preserved. Using the overstressing technique, the nature of RS through the localized conducting path was further examined, which elucidated the fundamental difference between the present material system and the general ionic-motion-related bipolar RS mechanism.

Pulse width modulation inverter with battery charger

DOEpatents

Slicker, James M.

1985-01-01

An inverter is connected between a source of DC power and a three-phase AC induction motor, and a microprocessor-based circuit controls the inverter using pulse width modulation techniques. In the disclosed method of pulse width modulation, both edges of each pulse of a carrier pulse train are equally modulated by a time proportional to sin .theta., where .theta. is the angular displacement of the pulse center at the motor stator frequency from a fixed reference point on the carrier waveform. The carrier waveform frequency is a multiple of the motor stator frequency. The modulated pulse train is then applied to each of the motor phase inputs with respective phase shifts of 120.degree. at the stator frequency. Switching control commands for electronic switches in the inverter are stored in a random access memory (RAM) and the locations of the RAM are successively read out in a cyclic manner, each bit of a given RAM location controlling a respective phase input of the motor. The DC power source preferably comprises rechargeable batteries and all but one of the electronic switches in the inverter can be disabled, the remaining electronic switch being part of a "flyback" DC-DC converter circuit for recharging the battery.

Pulse width modulation inverter with battery charger

NASA Technical Reports Server (NTRS)

Slicker, James M. (Inventor)

1985-01-01

An inverter is connected between a source of DC power and a three-phase AC induction motor, and a microprocessor-based circuit controls the inverter using pulse width modulation techniques. In the disclosed method of pulse width modulation, both edges of each pulse of a carrier pulse train are equally modulated by a time proportional to sin .theta., where .theta. is the angular displacement of the pulse center at the motor stator frequency from a fixed reference point on the carrier waveform. The carrier waveform frequency is a multiple of the motor stator frequency. The modulated pulse train is then applied to each of the motor phase inputs with respective phase shifts of 120.degree. at the stator frequency. Switching control commands for electronic switches in the inverter are stored in a random access memory (RAM) and the locations of the RAM are successively read out in a cyclic manner, each bit of a given RAM location controlling a respective phase input of the motor. The DC power source preferably comprises rechargeable batteries and all but one of the electronic switches in the inverter can be disabled, the remaining electronic switch being part of a flyback DC-DC converter circuit for recharging the battery.

Thin TiOx layer as a voltage divider layer located at the quasi-Ohmic junction in the Pt/Ta2O5/Ta resistance switching memory.

PubMed

Li, Xiang Yuan; Shao, Xing Long; Wang, Yi Chuan; Jiang, Hao; Hwang, Cheol Seong; Zhao, Jin Shi

2017-02-09

Ta 2 O 5 has been an appealing contender for the resistance switching random access memory (ReRAM). The resistance switching (RS) in this material is induced by the repeated formation and rupture of the conducting filaments (CFs) in the oxide layer, which are accompanied by the almost inevitable randomness of the switching parameters. In this work, a 1 to 2 nm-thick Ti layer was deposited on the 10 nm-thick Ta 2 O 5 RS layer, which greatly improved the RS performances, including the much-improved switching uniformity. The Ti metal layer was naturally oxidized to TiO x (x < 2) and played the role of a series resistor, whose resistance value was comparable to the on-state resistance of the Ta 2 O 5 RS layer. The series resistor TiO x efficiently suppressed the adverse effects of the voltage (or current) overshooting at the moment of switching by the appropriate voltage partake effect, which increased the controllability of the CF formation and rupture. The switching cycle endurance was increased by two orders of magnitude even during the severe current-voltage sweep tests compared with the samples without the thin TiO x layer. The Ti deposition did not induce any significant overhead to the fabrication process, making the process highly promising for the mass production of a reliable ReRAM.

Fabrication of one-transistor-capacitor structure of nonvolatile TFT ferroelectric RAM devices using Ba(Zr0.1Ti0.9)O3 gated oxide film.

PubMed

Yang, Cheng-Fu; Chen, Kai-Huang; Chen, Ying-Chung; Chang, Ting-Chang

2007-09-01

In this study, the Ba(Zr0.1Ti0.9)O3 (BZ1T9) thin films have been well deposited on the Pt/Ti/SiO2/Si substrate. The optimum radio frequency (RF) deposition parameters are developed, and the BZ1T9 thin films deposition at the optimum parameters have the maximum capacitance and dielectric constant of 4.4 nF and 190. As the applied voltage is increased to 8 V, the remnant polarization and coercive field of BZ1T9 thin films are about 4.5 microC/cm2 and 80 kV/cm. The counterclockwise current hysteresis and memory window of n-channel thin-film transistor property are observed, and that can be used to indicate the switching of ferroelectric polarization of BZ1T9 thin films. One-transistor-capacitor (1TC) structure of BZ1T9 ferroelectric random access memory device using bottom-gate amorphous silicon thin-film transistor was desirable because of the smaller size and better sensitivity. The BZ1T9 ferroelectric RAM devices with channel width = 40 microm and channel length = 8 microm has been successfully fabricated and the ID-VG transfer characteristics also are investigated in this study.

Enabling CD SEM metrology for 5nm technology node and beyond

NASA Astrophysics Data System (ADS)

Lorusso, Gian Francesco; Ohashi, Takeyoshi; Yamaguchi, Astuko; Inoue, Osamu; Sutani, Takumichi; Horiguchi, Naoto; Bömmels, Jürgen; Wilson, Christopher J.; Briggs, Basoene; Tan, Chi Lim; Raymaekers, Tom; Delhougne, Romain; Van den Bosch, Geert; Di Piazza, Luca; Kar, Gouri Sankar; Furnémont, Arnaud; Fantini, Andrea; Donadio, Gabriele Luca; Souriau, Laurent; Crotti, Davide; Yasin, Farrukh; Appeltans, Raf; Rao, Siddharth; De Simone, Danilo; Rincon Delgadillo, Paulina; Leray, Philippe; Charley, Anne-Laure; Zhou, Daisy; Veloso, Anabela; Collaert, Nadine; Hasumi, Kazuhisa; Koshihara, Shunsuke; Ikota, Masami; Okagawa, Yutaka; Ishimoto, Toru

2017-03-01

The CD SEM (Critical Dimension Scanning Electron Microscope) is one of the main tools used to estimate Critical Dimension (CD) in semiconductor manufacturing nowadays, but, as all metrology tools, it will face considerable challenges to keep up with the requirements of the future technology nodes. The root causes of these challenges are not uniquely related to the shrinking CD values, as one might expect, but to the increase in complexity of the devices in terms of morphology and chemical composition as well. In fact, complicated threedimensional device architectures, high aspect ratio features, and wide variety of materials are some of the unavoidable characteristics of the future metrology nodes. This means that, beside an improvement in resolution, it is critical to develop a CD SEM metrology capable of satisfying the specific needs of the devices of the nodes to come, needs that sometimes will have to be addressed through dramatic changes in approach with respect to traditional CD SEM metrology. In this paper, we report on the development of advanced CD SEM metrology at imec on a variety of device platform and processes, for both logic and memories. We discuss newly developed approaches for standard, IIIV, and germanium FinFETs (Fin Field Effect Transistors), for lateral and vertical nanowires (NW), 3D NAND (three-dimensional NAND), STT-MRAM (Spin Transfer Magnetic Torque Random-Access Memory), and ReRAM (Resistive Random Access Memory). Applications for both front-end of line (FEOL) and back-end of line (BEOL) are developed. In terms of process, S/D Epi (Source Drain Epitaxy), SAQP (Self-Aligned Quadruple Patterning), DSA (Dynamic Self-Assembly), and EUVL (Extreme Ultraviolet Lithography) have been used. The work reported here has been performed on Hitachi CG5000, CG6300, and CV5000. In terms of logic, we discuss here the S/D epi defect classification, the metrology optimization for STI (Shallow Trench Isolation) Ge FinFETs, the defectivity of III-V STI FinFETs,, metrology for vertical and horizontal NWs. With respect to memory, we discuss a STT-RAM statistical CD analysis and its comparison to electrical performance, ReRAM metrology for VMCO (Vacancy-modulated conductive oxide) with comparison with electrical performance, 3D NAND ONO (Oxide Nitride Oxide) thickness measurements. In addition, we report on 3D morphological reconstruction using CD SEM in conjunction with FIB (Focused Ion Beam), on optimized BKM (Best Known Methods) development methodologies, and on CD SEM overlay. The large variety of results reported here gives a clear overview of the creative effort put in place to ensure that the critical potential of CD SEM metrology tools is fully enabled for the 5nm node and beyond.

76 FR 73676 - Certain Dynamic Random Access Memory Devices, and Products Containing Same; Receipt of Complaint...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-11-29

... INTERNATIONAL TRADE COMMISSION [DN 2859] Certain Dynamic Random Access Memory Devices, and.... International Trade Commission has received a complaint entitled In Re Certain Dynamic Random Access Memory... certain dynamic random access memory devices, and products containing same. The complaint names Elpida...

75 FR 16507 - In the Matter of Certain Semiconductor Chips Having Synchronous Dynamic Random Access Memory...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-04-01

... Semiconductor Chips Having Synchronous Dynamic Random Access Memory Controllers and Products Containing Same... synchronous dynamic random access memory controllers and products containing same by reason of infringement of... semiconductor chips having synchronous dynamic random access memory controllers and products containing same...

Sustained Resistive Switching in a Single Cu:7,7,8,8-tetracyanoquinodimethane Nanowire: A Promising Material for Resistive Random Access Memory

PubMed Central

Basori, Rabaya; Kumar, Manoranjan; Raychaudhuri, Arup K.

2016-01-01

We report a new type of sustained and reversible unipolar resistive switching in a nanowire device made from a single strand of Cu:7,7,8,8-tetracyanoquinodimethane (Cu:TCNQ) nanowire (diameter <100 nm) that shows high ON/OFF ratio (~103), low threshold voltage of switching (~3.5 V) and large cycling endurance (>103). This indicates a promising material for high density resistive random access memory (ReRAM) device integration. Switching is observed in Cu:TCNQ single nanowire devices with two different electrode configuration: symmetric (C-Pt/Cu:TCNQ/C-Pt) and asymmetric (Cu/Cu:TCNQ/C-Pt), where contacts connecting the nanowire play an important role. This report also developed a method of separating out the electrode and material contributions in switching using metal-semiconductor-metal (MSM) device model along with a direct 4-probe resistivity measurement of the nanowire in the OFF as well as ON state. The device model was followed by a phenomenological model of current transport through the nanowire device which shows that lowering of potential barrier at the contacts likely occur due to formation of Cu filaments in the interface between nanowire and contact electrodes. We obtain quantitative agreement of numerically analyzed results with the experimental switching data. PMID:27245099

Digital Simulation Of Precise Sensor Degradations Including Non-Linearities And Shift Variance

NASA Astrophysics Data System (ADS)

Kornfeld, Gertrude H.

1987-09-01

Realistic atmospheric and Forward Looking Infrared Radiometer (FLIR) degradations were digitally simulated. Inputs to the routine are environmental observables and the FLIR specifications. It was possible to achieve realism in the thermal domain within acceptable computer time and random access memory (RAM) requirements because a shift variant recursive convolution algorithm that well describes thermal properties was invented and because each picture element (pixel) has radiative temperature, a materials parameter and range and altitude information. The computer generation steps start with the image synthesis of an undegraded scene. Atmospheric and sensor degradation follow. The final result is a realistic representation of an image seen on the display of a specific FLIR.

Photonic Potential of Haloarchaeal Pigment Bacteriorhodopsin for Future Electronics: A Review.

PubMed

Ashwini, Ravi; Vijayanand, S; Hemapriya, J

2017-08-01

Haloarchaea are known for its adaptation in extreme saline environment. Halophilic archaea produces carotenoid pigments and proton pumps to protect them from extremes of salinity. Bacteriorhodopsin (bR) is a light-driven proton pump that resides in the membrane of haloarchaea Halobacterium salinarum. The photocycle of Bacteriorhodopsin passes through several states from K to O, finally liberating ATP for host's survival. Extensive studies on Bacteriorhodopsin photocycle has provided in depth knowledge on their sequential mechanism of converting solar energy into chemical energy inside the cell. This ability of Bacteriorhodopsin to harvest sunlight has now been experimented to exploit the unexplored and extensively available solar energy in various biotechnological applications. Currently, bacteriorhodopsin finds its importance in dye-sensitized solar cell (DSSC), logic gates (integrated circuits, IC's), optical switching, optical memories, storage devices (random access memory, RAM), biosensors, electronic sensors and optical microcavities. This review deals with the optical and electrical applications of the purple pigment Bacteriorhodopsin.

Design of the Wind Tunnel Model Communication Controller Board. Degree awarded by Christopher Newport Univ. on Dec. 1998

NASA Technical Reports Server (NTRS)

Wilson, William C.

1999-01-01

The NASA Langley Research Center's Wind Tunnel Reinvestment project plans to shrink the existing data acquisition electronics to fit inside a wind tunnel model. Space limitations within a model necessitate a distributed system of Application Specific Integrated Circuits (ASICs) rather than a centralized system based on PC boards. This thesis will focus on the design of the prototype of the communication Controller board. A portion of the communication Controller board is to be used as the basis of an ASIC design. The communication Controller board will communicate between the internal model modules and the external data acquisition computer. This board is based around an Field Programmable Gate Array (FPGA), to allow for reconfigurability. In addition to the FPGA, this board contains buffer Random Access Memory (RAM), configuration memory (EEPROM), drivers for the communications ports, and passive components.

Tunnel junctions with multiferroic barriers

NASA Astrophysics Data System (ADS)

Gajek, Martin; Bibes, Manuel; Fusil, Stéphane; Bouzehouane, Karim; Fontcuberta, Josep; Barthélémy, Agnès; Fert, Albert

2007-04-01

Multiferroics are singular materials that can exhibit simultaneously electric and magnetic orders. Some are ferroelectric and ferromagnetic and provide the opportunity to encode information in electric polarization and magnetization to obtain four logic states. However, such materials are rare and schemes allowing a simple electrical readout of these states have not been demonstrated in the same device. Here, we show that films of La0.1Bi0.9MnO3 (LBMO) are ferromagnetic and ferroelectric, and retain both ferroic properties down to a thickness of 2nm. We have integrated such ultrathin multiferroic films as barriers in spin-filter-type tunnel junctions that exploit the magnetic and ferroelectric degrees of freedom of LBMO. Whereas ferromagnetism permits read operations reminiscent of magnetic random access memories (MRAM), the electrical switching evokes a ferroelectric RAM write operation. Significantly, our device does not require the destructive ferroelectric readout, and therefore represents an advance over the original four-state memory concept based on multiferroics.

Tunnel junctions with multiferroic barriers.

PubMed

Gajek, Martin; Bibes, Manuel; Fusil, Stéphane; Bouzehouane, Karim; Fontcuberta, Josep; Barthélémy, Agnès; Fert, Albert

2007-04-01

Multiferroics are singular materials that can exhibit simultaneously electric and magnetic orders. Some are ferroelectric and ferromagnetic and provide the opportunity to encode information in electric polarization and magnetization to obtain four logic states. However, such materials are rare and schemes allowing a simple electrical readout of these states have not been demonstrated in the same device. Here, we show that films of La(0.1)Bi(0.9)MnO(3) (LBMO) are ferromagnetic and ferroelectric, and retain both ferroic properties down to a thickness of 2 nm. We have integrated such ultrathin multiferroic films as barriers in spin-filter-type tunnel junctions that exploit the magnetic and ferroelectric degrees of freedom of LBMO. Whereas ferromagnetism permits read operations reminiscent of magnetic random access memories (MRAM), the electrical switching evokes a ferroelectric RAM write operation. Significantly, our device does not require the destructive ferroelectric readout, and therefore represents an advance over the original four-state memory concept based on multiferroics.

76 FR 80964 - Certain Dynamic Random Access Memory Devices, and Products Containing Same; Institution of...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-12-27

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-821] Certain Dynamic Random Access Memory... importation, and the sale within the United States after importation of certain dynamic random access memory... certain dynamic random access memory devices, and products containing same that infringe one or more of...

Method and apparatus for pulse width modulation control of an AC induction motor

DOEpatents

Geppert, Steven; Slicker, James M.

1984-01-01

An inverter is connected between a source of DC power and a three-phase AC induction motor, and a micro-processor-based circuit controls the inverter using pulse width modulation techniques. In the disclosed method of pulse width modulation, both edges of each pulse of a carrier pulse train are equally modulated by a time proportional to sin .THETA., where .THETA. is the angular displacement of the pulse center at the motor stator frequency from a fixed reference point on the carrier waveform. The carrier waveform frequency is a multiple of the motor stator frequency. The modulated pulse train is then applied to each of the motor phase inputs with respective phase shifts of 120.degree. at the stator frequency. Switching control commands of electronic switches in the inverter are stored in a random access memory (RAM) and the locations of the RAM are successively read out in a cyclic manner, each bit of a given RAM location controlling a respective phase input of the motor. The DC power source preferably comprises rechargeable batteries and all but one of the electronic switches in the inverter can be disabled, the remaining electronic switch being part of a "flyback" DC-DC converter circuit for recharging the battery.

Spiking Neural Networks Based on OxRAM Synapses for Real-Time Unsupervised Spike Sorting.

PubMed

Werner, Thilo; Vianello, Elisa; Bichler, Olivier; Garbin, Daniele; Cattaert, Daniel; Yvert, Blaise; De Salvo, Barbara; Perniola, Luca

2016-01-01

In this paper, we present an alternative approach to perform spike sorting of complex brain signals based on spiking neural networks (SNN). The proposed architecture is suitable for hardware implementation by using resistive random access memory (RRAM) technology for the implementation of synapses whose low latency (<1μs) enables real-time spike sorting. This offers promising advantages to conventional spike sorting techniques for brain-computer interfaces (BCI) and neural prosthesis applications. Moreover, the ultra-low power consumption of the RRAM synapses of the spiking neural network (nW range) may enable the design of autonomous implantable devices for rehabilitation purposes. We demonstrate an original methodology to use Oxide based RRAM (OxRAM) as easy to program and low energy (<75 pJ) synapses. Synaptic weights are modulated through the application of an online learning strategy inspired by biological Spike Timing Dependent Plasticity. Real spiking data have been recorded both intra- and extracellularly from an in-vitro preparation of the Crayfish sensory-motor system and used for validation of the proposed OxRAM based SNN. This artificial SNN is able to identify, learn, recognize and distinguish between different spike shapes in the input signal with a recognition rate about 90% without any supervision.

Method and apparatus for pulse width modulation control of an AC induction motor

NASA Technical Reports Server (NTRS)

Geppert, Steven (Inventor); Slicker, James M. (Inventor)

1984-01-01

An inverter is connected between a source of DC power and a three-phase AC induction motor, and a micro-processor-based circuit controls the inverter using pulse width modulation techniques. In the disclosed method of pulse width modulation, both edges of each pulse of a carrier pulse train are equally modulated by a time proportional to sin .THETA., where .THETA. is the angular displacement of the pulse center at the motor stator frequency from a fixed reference point on the carrier waveform. The carrier waveform frequency is a multiple of the motor stator frequency. The modulated pulse train is then applied to each of the motor phase inputs with respective phase shifts of 120.degree. at the stator frequency. Switching control commands of electronic switches in the inverter are stored in a random access memory (RAM) and the locations of the RAM are successively read out in a cyclic manner, each bit of a given RAM location controlling a respective phase input of the motor. The DC power source preferably comprises rechargeable batteries and all but one of the electronic switches in the inverter can be disabled, the remaining electronic switch being part of a flyback DC-DC converter circuit for recharging the battery.

Feasibility and Effectiveness of Memory Specificity Training in Depressed Outpatients: A Pilot Study.

PubMed

Eigenhuis, Eline; Seldenrijk, Adrie; van Schaik, Anneke; Raes, Filip; van Oppen, Patricia

2017-01-01

Research has shown that depressed patients suffer from reduced autobiographical memory specificity (rAMS). This cognitive phenomenon is associated with the maintenance and recurrence of depressive symptoms. This pilot study aims to investigate the feasibility and effectiveness of a relatively new group-based intervention (Memory Specificity Training; MeST) that aims to reduce rAMS in an outpatient setting. Twenty-six depressed outpatients received MeST during the waiting period prior to psychotherapy. The Client Satisfaction Questionnaire (CSQ-8) was used to measure client satisfaction after the training. The Autobiographical Memory Test (AMT) was used to measure memory specificity before and after the training. Depressive symptoms were measured using the Beck Depression Inventory (BDI-II) and the Montgomery Asberg Depression Rating Scale (MADRS), before and after the training, and at a 3-month follow-up. Participants as well as trainers were positive about the use of MeST. Participants also showed an increase in memory specificity and a decrease in depressive symptoms. This study suggests that MeST is feasible in an outpatient setting, that it increases autobiographical memory specificity and that it may decrease depressive symptoms. A randomized controlled trial is recommended to examine MeST and its effects on autobiographical memory specificity, depressive symptoms and depressive relapse more extensively. Copyright © 2015 John Wiley & Sons, Ltd. Key Practitioner Message: Research suggests that modification of rAMS can advance recovery and reduce the chance of developing a depression relapse. However, most existing psychotherapies for depression do not include these specific interventions. This is the first study to show that MeST in an outpatient setting is feasible and can lead to an increase in autobiographical memory specificity and that it may decrease depressive symptoms. A larger scale randomized controlled trial is required to examine whether the addition of MeST to care as usual decreases depressive symptoms more effectively than care as usual without MeST, and to examine whether subgroups of patients benefit specifically from this intervention (e.g. patients with more severely decreased memory specificity). Copyright © 2015 John Wiley & Sons, Ltd.

Improved Writing-Conductor Designs For Magnetic Memory

NASA Technical Reports Server (NTRS)

Wu, Jiin-Chuan; Stadler, Henry L.; Katti, Romney R.

1994-01-01

Writing currents reduced to practical levels. Improved conceptual designs for writing conductors in micromagnet/Hall-effect random-access integrated-circuit memory reduces electrical current needed to magnetize micromagnet in each memory cell. Basic concept of micromagnet/Hall-effect random-access memory presented in "Magnetic Analog Random-Access Memory" (NPO-17999).

Picoampere Resistive Switching Characteristics Realized with Vertically Contacted Carbon Nanotube Atomic Force Microscope Probe

NASA Astrophysics Data System (ADS)

Nakano, Haruhisa; Takahashi, Makoto; Sato, Motonobu; Kotsugi, Masato; Ohkochi, Takuo; Muro, Takayuki; Nihei, Mizuhisa; Yokoyama, Naoki

2013-11-01

The resistive switching characteristics of a TiO2/Ti structure have been investigated using a conductive atomic force microscopy (AFM) system with 5-nm-diameter carbon nanotube (CNT) probes. The resistive switching showed bipolar resistive random access memory (ReRAM) behaviors with extremely low switching currents in the order of Picoamperes when voltages were applied. From transmission electron microscopy (TEM) observation, we confirmed that filament-like nanocrystals, having a diameter of about 10 nm, existed in TiO2 films at resistive switching areas after not only set operation but also reset operation. Moreover, photoemission electron microscopy (PEEM) analysis showed that the anatase-type TiO2 structure did not change after set and reset operations. From these results, we suggested that the Picoampere resistive switching occurred at the interface between the TiO2 dielectric and conductive nanocrystal without any structural changes in the TiO2 film and nanocrystal. The resistive switching mechanism we suggested is highly promising to realize extremely low-power-consumption ReRAMs with vertically contacted CNT electrodes.

ROSAT in-orbit attitude measurement recovery

NASA Astrophysics Data System (ADS)

Kaffer, L.; Boeinghoff, A.; Bruederle, E.; Schrempp, W.; Wullstein, P.

After about 7 months of nearly perfect Attitude Measurement and Control System (AMCS) functioning, the ROSAT mission was influenced by gyro degradations which complicated the operation and after one year the nominal mission could no longer be maintained. The reestablishment of the nominal mission by the redesign of the attitude measurement using inertial reference generation from coarse Sun sensor and magnetometer together with a new star acquisition procedure is described. This success was only possible because sufficient reprogramming provisions in the onboard computer were available. The new software now occupies nearly the complete Random Access Memory (RAM) area and increases the computation time from about 50 msec to 300 msec per 1 sec cycle. This proves that deficiencies of the hardware can be overcome by a more intelligent software.

Analog Nonvolatile Computer Memory Circuits

NASA Technical Reports Server (NTRS)

MacLeod, Todd

2007-01-01

In nonvolatile random-access memory (RAM) circuits of a proposed type, digital data would be stored in analog form in ferroelectric field-effect transistors (FFETs). This type of memory circuit would offer advantages over prior volatile and nonvolatile types: In a conventional complementary metal oxide/semiconductor static RAM, six transistors must be used to store one bit, and storage is volatile in that data are lost when power is turned off. In a conventional dynamic RAM, three transistors must be used to store one bit, and the stored bit must be refreshed every few milliseconds. In contrast, in a RAM according to the proposal, data would be retained when power was turned off, each memory cell would contain only two FFETs, and the cell could store multiple bits (the exact number of bits depending on the specific design). Conventional flash memory circuits afford nonvolatile storage, but they operate at reading and writing times of the order of thousands of conventional computer memory reading and writing times and, hence, are suitable for use only as off-line storage devices. In addition, flash memories cease to function after limited numbers of writing cycles. The proposed memory circuits would not be subject to either of these limitations. Prior developmental nonvolatile ferroelectric memories are limited to one bit per cell, whereas, as stated above, the proposed memories would not be so limited. The design of a memory circuit according to the proposal must reflect the fact that FFET storage is only partly nonvolatile, in that the signal stored in an FFET decays gradually over time. (Retention times of some advanced FFETs exceed ten years.) Instead of storing a single bit of data as either a positively or negatively saturated state in a ferroelectric device, each memory cell according to the proposal would store two values. The two FFETs in each cell would be denoted the storage FFET and the control FFET. The storage FFET would store an analog signal value, between the positive and negative FFET saturation values. This signal value would represent a numerical value of interest corresponding to multiple bits: for example, if the memory circuit were designed to distinguish among 16 different analog values, then each cell could store 4 bits. Simultaneously with writing the signal value in the storage FFET, a negative saturation signal value would be stored in the control FFET. The decay of this control-FFET signal from the saturation value would serve as a model of the decay, for use in regenerating the numerical value of interest from its decaying analog signal value. The memory circuit would include addressing, reading, and writing circuitry that would have features in common with the corresponding parts of other memory circuits, but would also have several distinctive features. The writing circuitry would include a digital-to-analog converter (DAC); the reading circuitry would include an analog-to-digital converter (ADC). For writing a numerical value of interest in a given cell, that cell would be addressed, the saturation value would be written in the control FFET in that cell, and the non-saturation analog value representing the numerical value of interest would be generated by use of the DAC and stored in the storage FFET in that cell. For reading the numerical value of interest stored in a given cell, the cell would be addressed, the ADC would convert the decaying control and storage analog signal values to digital values, and an associated fast digital processing circuit would regenerate the numerical value from digital values.

75 FR 44283 - In the Matter of Certain Dynamic Random Access Memory Semiconductors and Products Containing Same...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-07-28

... Random Access Memory Semiconductors and Products Containing Same, Including Memory Modules; Notice of a... importation of certain dynamic random access memory semiconductors and products containing same, including memory modules, by reason of infringement of certain claims of U.S. Patent Nos. 5,480,051; 5,422,309; 5...

Iconographic dental typography. A dental character font for computer graphics.

PubMed

McCormack, J

1991-06-08

The recent massive increase in available memory for microcomputers now allows multiple font faces to be stored in computer RAM memory for instant access to the screen and for printed output. Fonts can be constructed in which the characters are not just letters or numbers, but are miniature graphic icons--in this instance pictures of teeth. When printed on an appropriate laser printer, this produces printed graphics of publishing quality.

Searching for New Double Stars with a Computer

NASA Astrophysics Data System (ADS)

Bryant, T. V.

2015-04-01

The advent of computers with large amounts of RAM memory and fast processors, as well as easy internet access to large online astronomical databases, has made computer searches based on astrometric data practicable for most researchers. This paper describes one such search that has uncovered hitherto unrecognized double stars.

75 FR 14467 - In the Matter of: Certain Dynamic Random Access Memory Semiconductors and Products Containing...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-03-25

... Access Memory Semiconductors and Products Containing Same, Including Memory Modules; Notice of... the sale within the United States after importation of certain dynamic random access memory semiconductors and products containing same, including memory modules, by reason of infringement of certain...

78 FR 35645 - Certain Static Random Access Memories and Products Containing Same; Commission Determination...

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2013-06-13

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-792] Certain Static Random Access Memories and Products Containing Same; Commission Determination Affirming a Final Initial Determination..., and the sale within the United States after importation of certain static random access memories and...

76 FR 55417 - In the Matter of Certain Dynamic Random Access Memory and Nand Flash Memory Devices and Products...

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2011-09-07

... Access Memory and Nand Flash Memory Devices and Products Containing Same; Notice of Institution of... importation, and the sale within the United States after importation of certain dynamic random access memory and NAND flash memory devices and products containing same by reason of infringement of certain claims...

78 FR 25767 - Certain Static Random Access Memories and Products Containing Same; Commission Determination To...

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2013-05-02

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-792] Certain Static Random Access Memories and Products Containing Same; Commission Determination To Review in Part a Final Initial... States after importation of certain static random access memories and products containing the same by...

A Wearable Healthcare System With a 13.7 μA Noise Tolerant ECG Processor.

PubMed

Izumi, Shintaro; Yamashita, Ken; Nakano, Masanao; Kawaguchi, Hiroshi; Kimura, Hiromitsu; Marumoto, Kyoji; Fuchikami, Takaaki; Fujimori, Yoshikazu; Nakajima, Hiroshi; Shiga, Toshikazu; Yoshimoto, Masahiko

2015-10-01

To prevent lifestyle diseases, wearable bio-signal monitoring systems for daily life monitoring have attracted attention. Wearable systems have strict size and weight constraints, which impose significant limitations of the battery capacity and the signal-to-noise ratio of bio-signals. This report describes an electrocardiograph (ECG) processor for use with a wearable healthcare system. It comprises an analog front end, a 12-bit ADC, a robust Instantaneous Heart Rate (IHR) monitor, a 32-bit Cortex-M0 core, and 64 Kbyte Ferroelectric Random Access Memory (FeRAM). The IHR monitor uses a short-term autocorrelation (STAC) algorithm to improve the heart-rate detection accuracy despite its use in noisy conditions. The ECG processor chip consumes 13.7 μA for heart rate logging application.

76 FR 2336 - Dynamic Random Access Memory Semiconductors From the Republic of Korea: Final Results of...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-01-13

... DEPARTMENT OF COMMERCE International Trade Administration [C-580-851] Dynamic Random Access Memory... administrative review of the countervailing duty order on dynamic random access memory semiconductors from the... following events have occurred since the publication of the preliminary results of this review. See Dynamic...

Optimization of Ferroelectric Ceramics by Design at the Microstructure Level

NASA Astrophysics Data System (ADS)

Jayachandran, K. P.; Guedes, J. M.; Rodrigues, H. C.

2010-05-01

Ferroelectric materials show remarkable physical behaviors that make them essential for many devices and have been extensively studied for their applications of nonvolatile random access memory (NvRAM) and high-speed random access memories. Although ferroelectric ceramics (polycrystals) present ease in manufacture and in compositional modifications and represent the widest application area of materials, computational and theoretical studies are sparse owing to many reasons including the large number of constituent atoms. Macroscopic properties of ferroelectric polycrystals are dominated by the inhomogeneities at the crystallographic domain/grain level. Orientation of grains/domains is critical to the electromechanical response of the single crystalline and polycrystalline materials. Polycrystalline materials have the potential of exhibiting better performance at a macroscopic scale by design of the domain/grain configuration at the domain-size scale. This suggests that piezoelectric properties can be optimized by a proper choice of the parameters which control the distribution of grain orientations. Nevertheless, this choice is complicated and it is impossible to analyze all possible combinations of the distribution parameters or the angles themselves. Hence we have implemented the stochastic optimization technique of simulated annealing combined with the homogenization for the optimization problem. The mathematical homogenization theory of a piezoelectric medium is implemented in the finite element method (FEM) by solving the coupled equilibrium electrical and mechanical fields. This implementation enables the study of the dependence of the macroscopic electromechanical properties of a typical crystalline and polycrystalline ferroelectric ceramic on the grain orientation.

Enhanced switching stability in Ta2O5 resistive RAM by fluorine doping

NASA Astrophysics Data System (ADS)

Sedghi, N.; Li, H.; Brunell, I. F.; Dawson, K.; Guo, Y.; Potter, R. J.; Gibbon, J. T.; Dhanak, V. R.; Zhang, W. D.; Zhang, J. F.; Hall, S.; Robertson, J.; Chalker, P. R.

2017-08-01

The effect of fluorine doping on the switching stability of Ta2O5 resistive random access memory devices is investigated. It shows that the dopant serves to increase the memory window and improve the stability of the resistive states due to the neutralization of oxygen vacancies. The ability to alter the current in the low resistance state with set current compliance coupled with large memory window makes multilevel cell switching more favorable. The devices have set and reset voltages of <1 V with improved stability due to the fluorine doping. Density functional modeling shows that the incorporation of fluorine dopant atoms at the two-fold O vacancy site in the oxide network removes the defect state in the mid bandgap, lowering the overall density of defects capable of forming conductive filaments. This reduces the probability of forming alternative conducting paths and hence improves the current stability in the low resistance states. The doped devices exhibit more stable resistive states in both dc and pulsed set and reset cycles. The retention failure time is estimated to be a minimum of 2 years for F-doped devices measured by temperature accelerated and stress voltage accelerated retention failure methods.

Sptrace

NASA Technical Reports Server (NTRS)

Burleigh, Scott C.

2011-01-01

Sptrace is a general-purpose space utilization tracing system that is conceptually similar to the commercial Purify product used to detect leaks and other memory usage errors. It is designed to monitor space utilization in any sort of heap, i.e., a region of data storage on some device (nominally memory; possibly shared and possibly persistent) with a flat address space. This software can trace usage of shared and/or non-volatile storage in addition to private RAM (random access memory). Sptrace is implemented as a set of C function calls that are invoked from within the software that is being examined. The function calls fall into two broad classes: (1) functions that are embedded within the heap management software [e.g., JPL's SDR (Simple Data Recorder) and PSM (Personal Space Management) systems] to enable heap usage analysis by populating a virtual time-sequenced log of usage activity, and (2) reporting functions that are embedded within the application program whose behavior is suspect. For ease of use, these functions may be wrapped privately inside public functions offered by the heap management software. Sptrace can be used for VxWorks or RTEMS realtime systems as easily as for Linux or OS/X systems.

Effect of acute pesticide exposure on bee spatial working memory using an analogue of the radial-arm maze

NASA Astrophysics Data System (ADS)

Samuelson, Elizabeth E. W.; Chen-Wishart, Zachary P.; Gill, Richard J.; Leadbeater, Ellouise

2016-12-01

Pesticides, including neonicotinoids, typically target pest insects by being neurotoxic. Inadvertent exposure to foraging insect pollinators is usually sub-lethal, but may affect cognition. One cognitive trait, spatial working memory, may be important in avoiding previously-visited flowers and other spatial tasks such as navigation. To test this, we investigated the effect of acute thiamethoxam exposure on spatial working memory in the bumblebee Bombus terrestris, using an adaptation of the radial-arm maze (RAM). We first demonstrated that bumblebees use spatial working memory to solve the RAM by showing that untreated bees performed significantly better than would be expected if choices were random or governed by stereotyped visitation rules. We then exposed bees to either a high sub-lethal positive control thiamethoxam dose (2.5 ng-1 bee), or one of two low doses (0.377 or 0.091 ng-1) based on estimated field-realistic exposure. The high dose caused bees to make more and earlier spatial memory errors and take longer to complete the task than unexposed bees. For the low doses, the negative effects were smaller but statistically significant, and dependent on bee size. The spatial working memory impairment shown here has the potential to harm bees exposed to thiamethoxam, through possible impacts on foraging efficiency or homing.

Enhanced oxygen vacancy diffusion in Ta2O5 resistive memory devices due to infinitely adaptive crystal structure

NASA Astrophysics Data System (ADS)

Jiang, Hao; Stewart, Derek A.

2016-04-01

Metal oxide resistive memory devices based on Ta2O5 have demonstrated high switching speed, long endurance, and low set voltage. However, the physical origin of this improved performance is still unclear. Ta2O5 is an important archetype of a class of materials that possess an adaptive crystal structure that can respond easily to the presence of defects. Using first principles nudged elastic band calculations, we show that this adaptive crystal structure leads to low energy barriers for in-plane diffusion of oxygen vacancies in λ phase Ta2O5. Identified diffusion paths are associated with collective motion of neighboring atoms. The overall vacancy diffusion is anisotropic with higher diffusion barriers found for oxygen vacancy movement between Ta-O planes. Coupled with the fact that oxygen vacancy formation energy in Ta2O5 is relatively small, our calculated low diffusion barriers can help explain the low set voltage in Ta2O5 based resistive memory devices. Our work shows that other oxides with adaptive crystal structures could serve as potential candidates for resistive random access memory devices. We also discuss some general characteristics for ideal resistive RAM oxides that could be used in future computational material searches.

DESTINY

DOE Office of Scientific and Technical Information (OSTI.GOV)

2015-03-10

DESTINY is a comprehensive tool for modeling 3D and 2D cache designs using SRAM,embedded DRAM (eDRAM), spin transfer torque RAM (STT-RAM), resistive RAM (ReRAM), and phase change RAM (PCN). In its purpose, it is similar to CACTI, CACTI-3DD or NVSim. DESTINY is very useful for performing design-space exploration across several dimensions, such as optimizing for a target (e.g. latency, area or energy-delay product) for agiven memory technology, choosing the suitable memory technology or fabrication method (i.e. 2D v/s 3D) for a given optimization target, etc. DESTINY has been validated against several cache prototypes. DESTINY is expected to boost studies ofmore » next-generation memory architectures used in systems ranging from mobile devices to extreme-scale supercomputers.« less

Portable Electromyograph

NASA Technical Reports Server (NTRS)

De Luca, Gianluca; De Luca, Carlo J.; Bergman, Per

2004-01-01

A portable electronic apparatus records electromyographic (EMG) signals in as many as 16 channels at a sampling rate of 1,024 Hz in each channel. The apparatus (see figure) includes 16 differential EMG electrodes (each electrode corresponding to one channel) with cables and attachment hardware, reference electrodes, an input/output-and-power-adapter unit, a 16-bit analog-to-digital converter, and a hand-held computer that contains a removable 256-MB flash memory card. When all 16 EMG electrodes are in use, full-bandwidth data can be recorded in each channel for as long as 8 hours. The apparatus is powered by a battery and is small enough that it can be carried in a waist pouch. The computer is equipped with a small screen that can be used to display the incoming signals on each channel. Amplitude and time adjustments of this display can be made easily by use of touch buttons on the screen. The user can also set up a data-acquisition schedule to conform to experimental protocols or to manage battery energy and memory efficiently. Once the EMG data have been recorded, the flash memory card is removed from the EMG apparatus and placed in a flash-memory- card-reading external drive unit connected to a personal computer (PC). The PC can then read the data recorded in the 16 channels. Preferably, before further analysis, the data should be stored in the hard drive of the PC. The data files are opened and viewed on the PC by use of special- purpose software. The software for operation of the apparatus resides in a random-access memory (RAM), with backup power supplied by a small internal lithium cell. A backup copy of this software resides on the flash memory card. In the event of loss of both main and backup battery power and consequent loss of this software, the backup copy can be used to restore the RAM copy after power has been restored. Accessories for this device are also available. These include goniometers, accelerometers, foot switches, and force gauges.

Multivariate analysis and extraction of parameters in resistive RAMs using the Quantum Point Contact model

NASA Astrophysics Data System (ADS)

Roldán, J. B.; Miranda, E.; González-Cordero, G.; García-Fernández, P.; Romero-Zaliz, R.; González-Rodelas, P.; Aguilera, A. M.; González, M. B.; Jiménez-Molinos, F.

2018-01-01

A multivariate analysis of the parameters that characterize the reset process in Resistive Random Access Memory (RRAM) has been performed. The different correlations obtained can help to shed light on the current components that contribute in the Low Resistance State (LRS) of the technology considered. In addition, a screening method for the Quantum Point Contact (QPC) current component is presented. For this purpose, the second derivative of the current has been obtained using a novel numerical method which allows determining the QPC model parameters. Once the procedure is completed, a whole Resistive Switching (RS) series of thousands of curves is studied by means of a genetic algorithm. The extracted QPC parameter distributions are characterized in depth to get information about the filamentary pathways associated with LRS in the low voltage conduction regime.

Research on SEU hardening of heterogeneous Dual-Core SoC

NASA Astrophysics Data System (ADS)

Huang, Kun; Hu, Keliu; Deng, Jun; Zhang, Tao

2017-08-01

The implementation of Single-Event Upsets (SEU) hardening has various schemes. However, some of them require a lot of human, material and financial resources. This paper proposes an easy scheme on SEU hardening for Heterogeneous Dual-core SoC (HD SoC) which contains three techniques. First, the automatic Triple Modular Redundancy (TMR) technique is adopted to harden the register heaps of the processor and the instruction-fetching module. Second, Hamming codes are used to harden the random access memory (RAM). Last, a software signature technique is applied to check the programs which are running on CPU. The scheme need not to consume additional resources, and has little influence on the performance of CPU. These technologies are very mature, easy to implement and needs low cost. According to the simulation result, the scheme can satisfy the basic demand of SEU-hardening.

The Photon Shell Game and the Quantum von Neumann Architecture with Superconducting Circuits

NASA Astrophysics Data System (ADS)

Mariantoni, Matteo

2012-02-01

Superconducting quantum circuits have made significant advances over the past decade, allowing more complex and integrated circuits that perform with good fidelity. We have recently implemented a machine comprising seven quantum channels, with three superconducting resonators, two phase qubits, and two zeroing registers. I will explain the design and operation of this machine, first showing how a single microwave photon | 1 > can be prepared in one resonator and coherently transferred between the three resonators. I will also show how more exotic states such as double photon states | 2 > and superposition states | 0 >+ | 1 > can be shuffled among the resonators as well [1]. I will then demonstrate how this machine can be used as the quantum-mechanical analog of the von Neumann computer architecture, which for a classical computer comprises a central processing unit and a memory holding both instructions and data. The quantum version comprises a quantum central processing unit (quCPU) that exchanges data with a quantum random-access memory (quRAM) integrated on one chip, with instructions stored on a classical computer. I will also present a proof-of-concept demonstration of a code that involves all seven quantum elements: (1), Preparing an entangled state in the quCPU, (2), writing it to the quRAM, (3), preparing a second state in the quCPU, (4), zeroing it, and, (5), reading out the first state stored in the quRAM [2]. Finally, I will demonstrate that the quantum von Neumann machine provides one unit cell of a two-dimensional qubit-resonator array that can be used for surface code quantum computing. This will allow the realization of a scalable, fault-tolerant quantum processor with the most forgiving error rates to date. [4pt] [1] M. Mariantoni et al., Nature Physics 7, 287-293 (2011.)[0pt] [2] M. Mariantoni et al., Science 334, 61-65 (2011).

Investigation of Hafnium oxide/Copper resistive memory for advanced encryption applications

NASA Astrophysics Data System (ADS)

Briggs, Benjamin D.

The Advanced Encryption Standard (AES) is a widely used encryption algorithm to protect data and communications in today's digital age. Modern AES CMOS implementations require large amounts of dedicated logic and must be tuned for either performance or power consumption. A high throughput, low power, and low die area AES implementation is required in the growing mobile sector. An emerging non-volatile memory device known as resistive memory (ReRAM) is a simple metal-insulator-metal capacitor device structure with the ability to switch between two stable resistance states. Currently, ReRAM is targeted as a non-volatile memory replacement technology to eventually replace flash. Its advantages over flash include ease of fabrication, speed, and lower power consumption. In addition to memory, ReRAM can also be used in advanced logic implementations given its purely resistive behavior. The combination of a new non-volatile memory element ReRAM along with high performance, low power CMOS opens new avenues for logic implementations. This dissertation will cover the design and process implementation of a ReRAM-CMOS hybrid circuit, built using IBM's 10LPe process, for the improvement of hardware AES implementations. Further the device characteristics of ReRAM, specifically the HfO2/Cu memory system, and mechanisms for operation are not fully correlated. Of particular interest to this work is the role of material properties such as the stoichiometry, crystallinity, and doping of the HfO2 layer and their effect on the switching characteristics of resistive memory. Material properties were varied by a combination of atomic layer deposition and reactive sputtering of the HfO2 layer. Several studies will be discussed on how the above mentioned material properties influence switching parameters, and change the underlying physics of device operation.

A-site- and/or B-site-modified PbZrTiO3 materials and (Pb, Sr, Ca, Ba, Mg) (Zr, Ti, Nb, Ta)O3 films having utility in ferroelectric random access memories and high performance thin film microactuators

NASA Technical Reports Server (NTRS)

Bilodeau, Steven (Inventor); Baum, Thomas H. (Inventor); Roeder, Jeffrey F. (Inventor); Chen, Ing-Shin (Inventor)

2001-01-01

A modified PbZrTiO.sub.3 perovskite crystal material thin film, wherein the PbZrTiO.sub.3 perovskite crystal material includes crystal lattice A-sites and B-sites at least one of which is modified by the presence of a substituent selected from the group consisting of (i) A-site substituents consisting of Sr, Ca, Ba and Mg, and (ii) B-site substituents selected from the group consisting of Nb and Ta. The perovskite crystal thin film material may be formed by liquid delivery MOCVD from metalorganic precursors of the metal components of the thin film, to form PZT and PSZT, and other piezoelectric and ferroelectric thin film materials. The thin films of the invention have utility in non-volatile ferroelectric memory devices (NV-FeRAMs), and in microelectromechanical systems (MEMS) as sensor and/or actuator elements, e.g., high speed digital system actuators requiring low input power levels.

A-SITE-AND/OR B-SITE-MODIFIED PBZRTIO3 MATERIALS AND (PB, SR, CA, BA, MG) (ZR, TI,NB, TA)O3 FILMS HAVING UTILITY IN FERROELECTRIC RANDOM ACCESS MEMORIES AND HIGH PERFORMANCE THIN FILM MICROACTUATORS

NASA Technical Reports Server (NTRS)

Bilodeau, Steven (Inventor); Baum, Thomas H. (Inventor); Roeder, Jeffrey F. (Inventor); Chen, Ing-Shin (Inventor)

2004-01-01

A modified PbZrTiO.sub.3 perovskite crystal material thin film, wherein the PbZrTiO.sub.3 perovskite crystal material includes crystal lattice A-sites and B-sites at least one of which is modified by the presence of a substituent selected from the group consisting of (i) A-site substituents consisting of Sr, Ca, Ba and Mg, and (ii) B-site substituents selected from the group consisting of Nb and Ta. The perovskite crystal thin film material may be formed by liquid delivery MOCVD from metalorganic precursors of the metal components of the thin film, to form PZT and PSZT, and other piezoelectric and ferroelectric thin film materials. The thin films of the invention have utility in non-volatile ferroelectric memory devices (NV-FeRAMs), and in microelectromechanical systems (MEMS) as sensor and/or actuator elements, e.g., high speed digital system actuators requiring low input power levels.

Write operation study of Co/BTO/LSMO ferroelectric tunnel junction

NASA Astrophysics Data System (ADS)

Wang, Z. H.; Zhao, W. S.; Kang, W.; Bouchenak-Khelladi, A.; Zhang, Y.; Klein, J.-O.; Ravelosona, D.; Chappert, C.

2013-07-01

Recently, a Co/BaTiO3/La0.67Sr0.33MnO3 (Co/BTO/LSMO) ferroelectric tunnel junction (FTJ) has shown the great potential towards non-volatile memory and logic applications due to its excellent performance. Especially, the giant OFF/ON tunnel resistance ratio (e.g., ˜100) assures that FTJ-based random access memory (FTRAM) can achieve lower reading error rate than emerging magnetic RAM. Nevertheless, in this paper, our investigation demonstrated that this FTJ suffered from difficulties in write operation when integrating with current CMOS technology into a FTRAM. Specifically, the write performances of Co/BTO/LSMO 1T1R FTRAM such as cell area, speed, energy dissipation, and thermal fluctuation effect were simulated and evaluated with a compact model and CMOS 40 nm design kit. Simulation results indicate the drawbacks of this FTRAM including significant performance asymmetry between two write orientations, high write voltage, large cell area, and severe thermal fluctuation disturbance. Simultaneously, this research provides several methods of improving write performance of FTRAM from the perspective of device size and process parameters.

75 FR 20564 - Dynamic Random Access Memory Semiconductors from the Republic of Korea: Extension of Time Limit...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-04-20

... DEPARTMENT OF COMMERCE International Trade Administration [C-580-851] Dynamic Random Access Memory Semiconductors from the Republic of Korea: Extension of Time Limit for Preliminary Results of Countervailing Duty... access memory semiconductors from the Republic of Korea, covering the period January 1, 2008 through...

Accelerating molecular Monte Carlo simulations using distance and orientation dependent energy tables: tuning from atomistic accuracy to smoothed “coarse-grained” models

PubMed Central

Lettieri, S.; Zuckerman, D.M.

2011-01-01

Typically, the most time consuming part of any atomistic molecular simulation is due to the repeated calculation of distances, energies and forces between pairs of atoms. However, many molecules contain nearly rigid multi-atom groups such as rings and other conjugated moieties, whose rigidity can be exploited to significantly speed up computations. The availability of GB-scale random-access memory (RAM) offers the possibility of tabulation (pre-calculation) of distance and orientation-dependent interactions among such rigid molecular bodies. Here, we perform an investigation of this energy tabulation approach for a fluid of atomistic – but rigid – benzene molecules at standard temperature and density. In particular, using O(1) GB of RAM, we construct an energy look-up table which encompasses the full range of allowed relative positions and orientations between a pair of whole molecules. We obtain a hardware-dependent speed-up of a factor of 24-50 as compared to an ordinary (“exact”) Monte Carlo simulation and find excellent agreement between energetic and structural properties. Second, we examine the somewhat reduced fidelity of results obtained using energy tables based on much less memory use. Third, the energy table serves as a convenient platform to explore potential energy smoothing techniques, akin to coarse-graining. Simulations with smoothed tables exhibit near atomistic accuracy while increasing diffusivity. The combined speed-up in sampling from tabulation and smoothing exceeds a factor of 100. For future applications greater speed-ups can be expected for larger rigid groups, such as those found in biomolecules. PMID:22120971

Optical RAM-enabled cache memory and optical routing for chip multiprocessors: technologies and architectures

NASA Astrophysics Data System (ADS)

Pleros, Nikos; Maniotis, Pavlos; Alexoudi, Theonitsa; Fitsios, Dimitris; Vagionas, Christos; Papaioannou, Sotiris; Vyrsokinos, K.; Kanellos, George T.

2014-03-01

The processor-memory performance gap, commonly referred to as "Memory Wall" problem, owes to the speed mismatch between processor and electronic RAM clock frequencies, forcing current Chip Multiprocessor (CMP) configurations to consume more than 50% of the chip real-estate for caching purposes. In this article, we present our recent work spanning from Si-based integrated optical RAM cell architectures up to complete optical cache memory architectures for Chip Multiprocessor configurations. Moreover, we discuss on e/o router subsystems with up to Tb/s routing capacity for cache interconnection purposes within CMP configurations, currently pursued within the FP7 PhoxTrot project.

Effects of self-relevant cues and cue valence on autobiographical memory specificity in dysphoria.

PubMed

Matsumoto, Noboru; Mochizuki, Satoshi

2017-04-01

Reduced autobiographical memory specificity (rAMS) is a characteristic memory bias observed in depression. To corroborate the capture hypothesis in the CaRFAX (capture and rumination, functional avoidance, executive capacity and control) model, we investigated the effects of self-relevant cues and cue valence on rAMS using an adapted Autobiographical Memory Test conducted with a nonclinical population. Hierarchical linear modelling indicated that the main effects of depression and self-relevant cues elicited rAMS. Moreover, the three-way interaction among valence, self-relevance, and depression scores was significant. A simple slope test revealed that dysphoric participants experienced rAMS in response to highly self-relevant positive cues and low self-relevant negative cues. These results partially supported the capture hypothesis in nonclinical dysphoria. It is important to consider cue valence in future studies examining the capture hypothesis.

Ferroelectric memory evaluation and development system

NASA Astrophysics Data System (ADS)

Bondurant, David W.

Attention is given to the Ramtron FEDS-1, an IBM PC/AT compatible single-board 16-b microcomputer with 8-kbyte program/data memory implemented with nonvolatile ferroelectric dynamic RAM. This is the first demonstration of a new type of solid state nonvolatile read/write memory, the ferroelectric RAM (FRAM). It is suggested that this memory technology will have a significant impact on avionics system performance and reliability.

Carbon nanomaterials for non-volatile memories

NASA Astrophysics Data System (ADS)

Ahn, Ethan C.; Wong, H.-S. Philip; Pop, Eric

2018-03-01

Carbon can create various low-dimensional nanostructures with remarkable electronic, optical, mechanical and thermal properties. These features make carbon nanomaterials especially interesting for next-generation memory and storage devices, such as resistive random access memory, phase-change memory, spin-transfer-torque magnetic random access memory and ferroelectric random access memory. Non-volatile memories greatly benefit from the use of carbon nanomaterials in terms of bit density and energy efficiency. In this Review, we discuss sp2-hybridized carbon-based low-dimensional nanostructures, such as fullerene, carbon nanotubes and graphene, in the context of non-volatile memory devices and architectures. Applications of carbon nanomaterials as memory electrodes, interfacial engineering layers, resistive-switching media, and scalable, high-performance memory selectors are investigated. Finally, we compare the different memory technologies in terms of writing energy and time, and highlight major challenges in the manufacturing, integration and understanding of the physical mechanisms and material properties.

Analysis of focusing error signals by differential astigmatic method under off-center tracking in the land-groove-type optical disk

NASA Astrophysics Data System (ADS)

Shinoda, Masahisa; Nakatani, Hidehiko

2015-04-01

We theoretically calculate the behavior of the focusing error signal in the land-groove-type optical disk when the objective lens traverses on out of the radius of the optical disk. The differential astigmatic method is employed instead of the conventional astigmatic method for generating the focusing error signals. The signal behaviors are compared and analyzed in terms of the gain difference of the slope sensitivity of the focusing error signals from the land and the groove. In our calculation, the format of digital versatile disc-random access memory (DVD-RAM) is adopted as the land-groove-type optical disk model, and advantageous conditions for suppressing the gain difference are investigated. The calculation method and results described in this paper will be reflected in the next generation land-groove-type optical disks.

Universal Signal Conditioning Amplifier

NASA Technical Reports Server (NTRS)

Kinney, Frank

1997-01-01

The Technological Research and Development Authority (TRDA) and NASA-KSC entered into a cooperative agreement in March of 1994 to achieve the utilization and commercialization of a technology development for benefiting both the Space Program and U.S. industry on a "dual-use basis". The technology involved in this transfer is a new, unique Universal Conditioning Amplifier (USCA) used in connection with various types of transducers. The project was initiated in partnership with I-Net Corporation, Lockheed Martin Telemetry & Instrumentation (formerly Loral Test and Information Systems) and Brevard Community College. The project consists of designing, miniaturizing, manufacturing, and testing an existing prototype of USCA that was developed for NASA-KSC by the I-Net Corporation. The USCA is a rugged and field-installable self (or remotely)- programmable amplifier that works in combination with a tag random access memory (RAM) attached to various types of transducers. This summary report comprises performance evaluations, TRDA partnership tasks, a project summary, project milestones and results.

The need for control of magnetic parameters for energy efficient performance of magnetic tunnel junctions

NASA Astrophysics Data System (ADS)

Farhat, I. A. H.; Gale, E.; Alpha, C.; Isakovic, A. F.

2017-07-01

Optimizing energy performance of Magnetic Tunnel Junctions (MTJs) is the key for embedding Spin Transfer Torque-Random Access Memory (STT-RAM) in low power circuits. Due to the complex interdependencies of the parameters and variables of the device operating energy, it is important to analyse parameters with most effective control of MTJ power. The impact of threshold current density, Jco , on the energy and the impact of HK on Jco are studied analytically, following the expressions that stem from Landau-Lifshitz-Gilbert-Slonczewski (LLGS-STT) model. In addition, the impact of other magnetic material parameters, such as Ms , and geometric parameters such as tfree and λ is discussed. Device modelling study was conducted to analyse the impact at the circuit level. Nano-magnetism simulation based on NMAGTM package was conducted to analyse the impact of controlling HK on the switching dynamics of the film.

EFFECTS OF TiOx INTERLAYER ON RESISTANCE SWITCHING OF Pt/TiOx/ZnO/n+-Si STRUCTURES

NASA Astrophysics Data System (ADS)

Li, Hongxia; Lv, Xiaojun; Xi, Junhua; Wu, Xin; Mao, Qinan; Liu, Qingmin; Ji, Zhenguo

2014-08-01

In this paper, we fabricated Pt/TiOx/ZnO/n+-Si structures by inserting TiOx interlayer between Pt top electrode (TE) and ZnO thin film for non-volatile resistive random access memory (ReRAM) applications. Effects of TiOx interlayer with different thickness on the resistance switching of Pt/TiOx/ZnO/n+-Si structures were investigated. Conduction behaviors in high and low resistance state (HRS and LRS) fit well with the trap-controlled space-charge-limited conduction (SCLC) and Ohmic behavior, respectively. Variations of set and reset voltages and HRS and LRS resistances of Pt/TiOx/ZnO/n+-Si structures were investigated as a function of TiOx thickness. Switching cycling tests were attempted to evaluate the endurance reliability of Pt/TiOx/ZnO/n+-Si structures. Additionally, the switching mechanism was analyzed by the filament model.

Development of Curie point switching for thin film, random access, memory device

NASA Technical Reports Server (NTRS)

Lewicki, G. W.; Tchernev, D. I.

1967-01-01

Managanese bismuthide films are used in the development of a random access memory device of high packing density and nondestructive readout capability. Memory entry is by Curie point switching using a laser beam. Readout is accomplished by microoptical or micromagnetic scanning.

On the robustness of bucket brigade quantum RAM

NASA Astrophysics Data System (ADS)

Arunachalam, Srinivasan; Gheorghiu, Vlad; Jochym-O'Connor, Tomas; Mosca, Michele; Varshinee Srinivasan, Priyaa

2015-12-01

We study the robustness of the bucket brigade quantum random access memory model introduced by Giovannetti et al (2008 Phys. Rev. Lett.100 160501). Due to a result of Regev and Schiff (ICALP ’08 733), we show that for a class of error models the error rate per gate in the bucket brigade quantum memory has to be of order o({2}-n/2) (where N={2}n is the size of the memory) whenever the memory is used as an oracle for the quantum searching problem. We conjecture that this is the case for any realistic error model that will be encountered in practice, and that for algorithms with super-polynomially many oracle queries the error rate must be super-polynomially small, which further motivates the need for quantum error correction. By contrast, for algorithms such as matrix inversion Harrow et al (2009 Phys. Rev. Lett.103 150502) or quantum machine learning Rebentrost et al (2014 Phys. Rev. Lett.113 130503) that only require a polynomial number of queries, the error rate only needs to be polynomially small and quantum error correction may not be required. We introduce a circuit model for the quantum bucket brigade architecture and argue that quantum error correction for the circuit causes the quantum bucket brigade architecture to lose its primary advantage of a small number of ‘active’ gates, since all components have to be actively error corrected.

On-orbit observations of single event upset in Harris HM-6508 1K RAMs, reissue A

NASA Astrophysics Data System (ADS)

Blake, J. B.; Mandel, R.

1987-02-01

The Harris HM-6508 1K x 1 RAMs are part of a subsystem of a satellite in a low, polar orbit. The memory module, used in the subsystem containing the RAMs, consists of three printed circuit cards, with each card containing eight 2K byte memory hybrids, for a total of 48K bytes. Each memory hybrid contains 16 HM-6508 RAM chips. On a regular basis all but 256 bytes of the 48K bytes are examined for bit errors. Two different techniques were used for detecting bit errors. The first technique, a memory check sum, was capable of automatically detecting all single bit and some double bit errors which occurred within a page of memory. A memory page consists of 256 bytes. Memory check sum tests are performed approximately every 90 minutes. To detect a multiple error or to determine the exact location of the bit error within the page the entire contents of the memory is dumped and compared to the load file. Memory dumps are normally performed once a month, or immediately after the check sum routine detects an error. Once the exact location of the error is found, the correct value is reloaded into memory. After the memory is reloaded, the contents of the memory location in question is verified in order to determine if the error was a soft error generated by an SEU or a hard error generated by a part failure or cosmic-ray induced latchup.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jiang, Hao; Materials Science Program, University of Wisconsin, Madison, Wisconsin 53706; Stewart, Derek A., E-mail: derek.stewart@hgst.com

Metal oxide resistive memory devices based on Ta{sub 2}O{sub 5} have demonstrated high switching speed, long endurance, and low set voltage. However, the physical origin of this improved performance is still unclear. Ta{sub 2}O{sub 5} is an important archetype of a class of materials that possess an adaptive crystal structure that can respond easily to the presence of defects. Using first principles nudged elastic band calculations, we show that this adaptive crystal structure leads to low energy barriers for in-plane diffusion of oxygen vacancies in λ phase Ta{sub 2}O{sub 5}. Identified diffusion paths are associated with collective motion of neighboringmore » atoms. The overall vacancy diffusion is anisotropic with higher diffusion barriers found for oxygen vacancy movement between Ta-O planes. Coupled with the fact that oxygen vacancy formation energy in Ta{sub 2}O{sub 5} is relatively small, our calculated low diffusion barriers can help explain the low set voltage in Ta{sub 2}O{sub 5} based resistive memory devices. Our work shows that other oxides with adaptive crystal structures could serve as potential candidates for resistive random access memory devices. We also discuss some general characteristics for ideal resistive RAM oxides that could be used in future computational material searches.« less

Rumination relates to reduced autobiographical memory specificity in formerly depressed patients following a self-discrepancy challenge: the case of autobiographical memory specificity reactivity.

PubMed

Raes, Filip; Schoofs, Hanne; Griffith, James W; Hermans, Dirk

2012-12-01

Reduced Autobiographical Memory Specificity (rAMS) is a hypothesized vulnerability factor for depression. Rumination is thought to be one of the processes underlying rAMS, but research has failed to show an association between trait rumination and rAMS in individuals who are not currently depressed (e.g., community samples, college samples, and formerly depressed samples). The present study tested whether a challenge procedure that induces a self-discrepancy focus can elicit an association between trait rumination and rAMS in formerly depressed participants. Trait rumination was assessed via self-report. Measures of psychopathology and cognitive function, including depression, were assessed via self-report and interview. Autobiographical Memory Specificity (AMS) was evaluated before and after the induction of a self-discrepancy focus in formerly depressed participants. Results showed that trait rumination was indeed negatively correlated with AMS after, but not before the induction. Moreover, high trait ruminating participants showed a decrease in AMS following the induction. In other words, memory specificity was reactive to the induction, but no such decrease was observed in low trait ruminating individuals. This study is mostly of women. These results may not generalize well to men. Our experimental control was within-subjects, which, although powerful and economical, cannot rule out certain confounding processes including natural changes in self-discrepancy, or non-specific or unintended effects of the induction. In order to detect rAMS in formerly depressed individuals or to observe associations between rAMS and trait measures of rumination, state ruminative processing needs to be activated. Results are discussed by framing rAMS as an example of cognitive reactivity, a general type of processing that is associated with depression. Copyright © 2012 Elsevier Ltd. All rights reserved.

Learning about cognition risk with the radial-arm maze in the developmental neurotoxicology battery.

PubMed

Levin, Edward D

2015-01-01

Cognitive dysfunction has been found in epidemiological studies to be among the most sensitive impairments associated with developmental exposure to a variety of environmental contaminants from heavy metals to polyhalogenated hydrocarbons and pesticides. These chemicals have been also shown to impair cognitive function after developmental exposure in experimental animal models. The radial-arm maze (RAM) has proven to be a sensitive and reliable way to assess both learning and memory in a variety of species, most often in rats and mice. The RAM is a very adaptable test method that takes advantage of rodents' instinct to explore new places in the environment to forage. That is, rodents do not need to be trained to run through the maze; they will normally do this from the initial session of testing. Training with differential reinforcement for arm choices provides a more rigorous test of learning and memory. The RAM is quite adaptable for assessing various aspects of cognition. Although the RAM has been mostly used to assess spatial learning and memory, it can be configured to assess non-spatial memory as well. Both working and reference memory can be easily distinguished. The RAM can be run with both appetitive (food reinforced) and aversive (water escape) motivators. The RAM has been found to be sensitive to a wide variety of developmental toxicants including heavy metals such as mercury and pesticides such as chlorpyrifos. There is an extremely rich literature especially with rats showing the effects of many types of brain lesions and drug effects so that the participation of a wide variety of neural systems in RAM performance is known. These systems, notably the hippocampus and frontal cortex, and acetylcholine and glutamate neurotransmitter systems, are the same neural systems that have been shown in humans to be critical for learning and memory. This considerably aids the interpretation of neurobehavioral toxicity studies. Copyright © 2015 Elsevier Inc. All rights reserved.

Making working memory work: The effects of extended practice on focus capacity and the processes of updating, forward access, and random access

PubMed Central

Price, John M.; Colflesh, Gregory J. H.; Cerella, John; Verhaeghen, Paul

2014-01-01

We investigated the effects of 10 hours of practice on variations of the N-Back task to investigate the processes underlying possible expansion of the focus of attention within working memory. Using subtractive logic, we showed that random access (i.e., Sternberg-like search) yielded a modest effect (a 50% increase in speed) whereas the processes of forward access (i.e., retrieval in order, as in a standard N-Back task) and updating (i.e., changing the contents of working memory) were executed about 5 times faster after extended practice. We additionally found that extended practice increased working memory capacity as measured by the size of the focus of attention for the forward-access task, but not for variations where probing was in random order. This suggests that working memory capacity may depend on the type of search process engaged, and that certain working-memory-related cognitive processes are more amenable to practice than others. PMID:24486803

Plated wire random access memories

NASA Technical Reports Server (NTRS)

Gouldin, L. D.

1975-01-01

A program was conducted to construct 4096-work by 18-bit random access, NDRO-plated wire memory units. The memory units were subjected to comprehensive functional and environmental tests at the end-item level to verify comformance with the specified requirements. A technical description of the unit is given, along with acceptance test data sheets.

Radiation Effects of Commercial Resistive Random Access Memories

NASA Technical Reports Server (NTRS)

Chen, Dakai; LaBel, Kenneth A.; Berg, Melanie; Wilcox, Edward; Kim, Hak; Phan, Anthony; Figueiredo, Marco; Buchner, Stephen; Khachatrian, Ani; Roche, Nicolas

2014-01-01

We present results for the single-event effect response of commercial production-level resistive random access memories. We found that the resistive memory arrays are immune to heavy ion-induced upsets. However, the devices were susceptible to single-event functional interrupts, due to upsets from the control circuits. The intrinsic radiation tolerant nature of resistive memory makes the technology an attractive consideration for future space applications.

BCH codes for large IC random-access memory systems

NASA Technical Reports Server (NTRS)

Lin, S.; Costello, D. J., Jr.

1983-01-01

In this report some shortened BCH codes for possible applications to large IC random-access memory systems are presented. These codes are given by their parity-check matrices. Encoding and decoding of these codes are discussed.

76 FR 35238 - Notice of Receipt of Complaint; Solicitation of Comments Relating to the Public Interest

Federal Register 2010, 2011, 2012, 2013, 2014

2011-06-16

... Static Random Access Memories and Products Containing Same, DN 2816; the Commission is soliciting... importation of certain static random access memories and products containing same. The complaint names as...

Results from On-Orbit Testing of the Fram Memory Test Experiment on the Fastsat Micro-Satellite

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Sims, W. Herb; Varnavas, Kosta A.; Ho, Fat D.

2011-01-01

NASA is planning on going beyond Low Earth orbit with manned exploration missions. The radiation environment for most Low Earth orbit missions is harsher than at the Earth's surface but much less harsh than deep space. Development of new electronics is needed to meet the requirements of high performance, radiation tolerance, and reliability. The need for both Volatile and Non-volatile memory has been identified. Emerging Non-volatile memory technologies (FRAM, C-RAM,M-RAM, R-RAM, Radiation Tolerant FLASH, SONOS, etc.) need to be investigated for use in Space missions. An opportunity arose to fly a small memory experiment on a high inclination satellite (FASTSAT). An off-the-shelf 512K Ramtron FRAM was chosen to be tested in the experiment.

Solar Particle Induced Upsets in the TDRS-1 Attitude Control System RAM During the October 1989 Solar Particle Events

NASA Technical Reports Server (NTRS)

Croley, D. R.; Garrett, H. B.; Murphy, G. B.; Garrard,T. L.

1995-01-01

The three large solar particle events, beginning on October 19, 1989 and lasting approximately six days, were characterized by high fluences of solar protons and heavy ions at 1 AU. During these events, an abnormally large number of upsets (243) were observed in the random access memory of the attitude control system (ACS) control processing electronics (CPE) on-board the geosynchronous TDRS-1 (Telemetry and Data Relay Satellite). The RAM unit affected was composed of eight Fairchild 93L422 memory chips. The Galileo spacecraft, launched on October 18, 1989 (one day prior to the solar particle events) observed the fluxes of heavy ions experienced by TDRS-1. Two solid-state detector telescopes on-board Galileo, designed to measure heavy ion species and energy, were turned on during time periods within each of the three separate events. The heavy ion data have been modeled and the time history of the events reconstructed to estimate heavy ion fluences. These fluences were converted to effective LET spectra after transport through the estimated shielding distribution around the TDRS-1 ACS system. The number of single event upsets (SEU) expected was calculated by integrating the measured cross section for the Fairchild 93L422 memory chip with average effective LET spectrum. The expected number of heavy ion induced SEU's calculated was 176. GOES-7 proton data, observed during the solar particle events, were used to estimate the number of proton-induced SEU's by integrating the proton fluence spectrum incident on the memory chips, with the two-parameter Bendel cross section for proton SEU'S. The proton fluence spectrum at the device level was gotten by transporting the protons through the estimated shielding distribution. The number of calculated proton-induced SEU's was 72, yielding a total of 248 predicted SEU'S, very dose to the 243 observed SEU'S. These calculations uniquely demonstrate the roles that solar heavy ions and protons played in the production of SEU's during the October 1989 solar particle events.

Oxygen vacancy effects in HfO2-based resistive switching memory: First principle study

NASA Astrophysics Data System (ADS)

Dai, Yuehua; Pan, Zhiyong; Wang, Feifei; Li, Xiaofeng

2016-08-01

The work investigated the shape and orientation of oxygen vacancy clusters in HfO2-base resistive random access memory (ReRAM) by using the first-principle method based on the density functional theory. Firstly, the formation energy of different local Vo clusters was calculated in four established orientation systems. Then, the optimized orientation and charger conductor shape were identified by comparing the isosurface plots of partial charge density, formation energy, and the highest isosurface value of oxygen vacancy. The calculated results revealed that the [010] orientation was the optimal migration path of Vo, and the shape of system D4 was the best charge conductor in HfO2, which effectively influenced the SET voltage, formation voltage and the ON/OFF ratio of the device. Afterwards, the PDOS of Hf near Vo and total density of states of the system D4_010 were obtained, revealing the composition of charge conductor was oxygen vacancy instead of metal Hf. Furthermore, the migration barriers of the Vo hopping between neighboring unit cells were calculated along four different orientations. The motion was proved along [010] orientation. The optimal circulation path for Vo migration in the HfO2 super-cell was obtained.

Making working memory work: the effects of extended practice on focus capacity and the processes of updating, forward access, and random access.

PubMed

Price, John M; Colflesh, Gregory J H; Cerella, John; Verhaeghen, Paul

2014-05-01

We investigated the effects of 10h of practice on variations of the N-Back task to investigate the processes underlying possible expansion of the focus of attention within working memory. Using subtractive logic, we showed that random access (i.e., Sternberg-like search) yielded a modest effect (a 50% increase in speed) whereas the processes of forward access (i.e., retrieval in order, as in a standard N-Back task) and updating (i.e., changing the contents of working memory) were executed about 5 times faster after extended practice. We additionally found that extended practice increased working memory capacity as measured by the size of the focus of attention for the forward-access task, but not for variations where probing was in random order. This suggests that working memory capacity may depend on the type of search process engaged, and that certain working-memory-related cognitive processes are more amenable to practice than others. Copyright © 2014 Elsevier B.V. All rights reserved.

Select-divide-and-conquer method for large-scale configuration interaction

NASA Astrophysics Data System (ADS)

Bunge, Carlos F.; Carbó-Dorca, Ramon

2006-07-01

A select-divide-and-conquer variational method to approximate configuration interaction (CI) is presented. Given an orthonormal set made up of occupied orbitals (Hartree-Fock or similar) and suitable correlation orbitals (natural or localized orbitals), a large N-electron target space S is split into subspaces S0,S1,S2,…,SR. S0, of dimension d0, contains all configurations K with attributes (energy contributions, etc.) above thresholds T0≡{T0egy,T0etc.}; the CI coefficients in S0 remain always free to vary. S1 accommodates Ks with attributes above T1⩽T0. An eigenproblem of dimension d0+d1 for S0+S1 is solved first, after which the last d1 rows and columns are contracted into a single row and column, thus freezing the last d1 CI coefficients hereinafter. The process is repeated with successive Sj(j ⩾2) chosen so that corresponding CI matrices fit random access memory (RAM). Davidson's eigensolver is used R times. The final energy eigenvalue (lowest or excited one) is always above the corresponding exact eigenvalue in S. Threshold values {Tj;j=0,1,2,…,R} regulate accuracy; for large-dimensional S, high accuracy requires S0+S1 to be solved outside RAM. From there on, however, usually a few Davidson iterations in RAM are needed for each step, so that Hamiltonian matrix-element evaluation becomes rate determining. One μhartree accuracy is achieved for an eigenproblem of order 24×106, involving 1.2×1012 nonzero matrix elements, and 8.4×109 Slater determinants.

Correlation between the transport mechanisms in conductive filaments inside Ta2O5-based resistive switching devices and in substoichiometric TaOx thin films

NASA Astrophysics Data System (ADS)

Rosário, Carlos M. M.; Thöner, Bo; Schönhals, Alexander; Menzel, Stephan; Wuttig, Matthias; Waser, Rainer; Sobolev, Nikolai A.; Wouters, Dirk J.

2018-05-01

Conductive filaments play a key role in redox-based resistive random access memory (ReRAM) devices based on the valence change mechanism, where the change of the resistance is ascribed to the modulation of the oxygen content in a local region of these conductive filaments. However, a deep understanding of the filaments' composition and structure is still a matter of debate. We approached the problem by comparing the electronic transport, at temperatures from 300 K down to 2 K, in the filaments and in TaOx films exhibiting a substoichiometric oxygen content. The filaments were created in Ta (15 nm)/Ta2O5 (5 nm)/Pt crossbar ReRAM structures. In the TaOx thin films with various oxygen contents, the in-plane transport was studied. There is a close similarity between the electrical properties of the conductive filaments in the ReRAM devices and of the TaOx films with x ˜ 1, evidencing also no dimensionality difference for the electrical transport. More specifically, for both systems there are two different conduction processes: one in the higher temperature range (from 50 K up to ˜300 K), where the conductivity follows a √{ T } dependence, and one at lower temperatures (<50 K), where the conductivity follows the exp(-1 / √{ T } ) dependence. This suggests a strong similarity between the material composition and structure of the filaments and those of the substoichiometric TaOx films. We also discuss the temperature dependence of the conductivity in the framework of possible transport mechanisms, mainly of those normally observed for granular metals.

Comparison of an algebraic multigrid algorithm to two iterative solvers used for modeling ground water flow and transport

USGS Publications Warehouse

Detwiler, R.L.; Mehl, S.; Rajaram, H.; Cheung, W.W.

2002-01-01

Numerical solution of large-scale ground water flow and transport problems is often constrained by the convergence behavior of the iterative solvers used to solve the resulting systems of equations. We demonstrate the ability of an algebraic multigrid algorithm (AMG) to efficiently solve the large, sparse systems of equations that result from computational models of ground water flow and transport in large and complex domains. Unlike geometric multigrid methods, this algorithm is applicable to problems in complex flow geometries, such as those encountered in pore-scale modeling of two-phase flow and transport. We integrated AMG into MODFLOW 2000 to compare two- and three-dimensional flow simulations using AMG to simulations using PCG2, a preconditioned conjugate gradient solver that uses the modified incomplete Cholesky preconditioner and is included with MODFLOW 2000. CPU times required for convergence with AMG were up to 140 times faster than those for PCG2. The cost of this increased speed was up to a nine-fold increase in required random access memory (RAM) for the three-dimensional problems and up to a four-fold increase in required RAM for the two-dimensional problems. We also compared two-dimensional numerical simulations of steady-state transport using AMG and the generalized minimum residual method with an incomplete LU-decomposition preconditioner. For these transport simulations, AMG yielded increased speeds of up to 17 times with only a 20% increase in required RAM. The ability of AMG to solve flow and transport problems in large, complex flow systems and its ready availability make it an ideal solver for use in both field-scale and pore-scale modeling.

Single-Event Effect Response of a Commercial ReRAM

NASA Technical Reports Server (NTRS)

Chen, Dakai; Label, Kenneth A.; Kim, Hak; Phan, Anthony; Wilcox, Edward; Buchner, Stephen; Khachatrian, Ani; Roche, Nicolas

2014-01-01

We show heavy ion test results of a commercial production-level ReRAM. The memory array is robust to bit upsets. However the ReRAM system is vulnerable to SEFIs due to upsets in peripheral circuits, including the sense amplifier.

Spatial and Working Memory Is Linked to Spine Density and Mushroom Spines

PubMed Central

Aher, Yogesh D.; Sase, Ajinkya; Gröger, Marion; Mokhtar, Maher; Höger, Harald; Lubec, Gert

2015-01-01

Background Changes in synaptic structure and efficacy including dendritic spine number and morphology have been shown to underlie neuronal activity and size. Moreover, the shapes of individual dendritic spines were proposed to correlate with their capacity for structural change. Spine numbers and morphology were reported to parallel memory formation in the rat using a water maze but, so far, there is no information on spine counts or shape in the radial arm maze (RAM), a frequently used paradigm for the evaluation of complex memory formation in the rodent. Methods 24 male Sprague-Dawley rats were divided into three groups, 8 were trained, 8 remained untrained in the RAM and 8 rats served as cage controls. Dendritic spine numbers and individual spine forms were counted in CA1, CA3 areas and dentate gyrus of hippocampus using a DIL dye method with subsequent quantification by the Neuronstudio software and the image J program. Results Working memory errors (WME) and latency in the RAM were decreased along the training period indicating that animals performed the task. Total spine density was significantly increased following training in the RAM as compared to untrained rats and cage controls. The number of mushroom spines was significantly increased in the trained as compared to untrained and cage controls. Negative significant correlations between spine density and WME were observed in CA1 basal dendrites and in CA3 apical and basal dendrites. In addition, there was a significant negative correlation between spine density and latency in CA3 basal dendrites. Conclusion The study shows that spine numbers are significantly increased in the trained group, an observation that may suggest the use of this method representing a morphological parameter for memory formation studies in the RAM. Herein, correlations between WME and latency in the RAM and spine density revealed a link between spine numbers and performance in the RAM. PMID:26469788

ACS Science Data Buffer Check/Self-Tests for CS Buffer RAM and MIE RAM

NASA Astrophysics Data System (ADS)

Balzano, V.

2001-07-01

The ACS Science Buffer RAM is checked for bit flips during SAA passages. This is followed by a Control Section {CS} self-test consisting of writing/reading a specified bit pattern from each memory location in Buffer RAM and a similar test for MIE RAM. The MIE must be placed in BOOT mode for its self-test. The CS Buffer RAM self-test as well as the bit flip tests are all done with the CS in Operate.

COS Side 2 Science Data Buffer Check/Self-Tests for CS Buffer RAM and DIB RAM

NASA Astrophysics Data System (ADS)

Bacinski, John

2013-10-01

The COS Science Buffer RAM is checked for bit flips during SAA passages. This is followed by a Control Section {CS} self-test consisting of writing/reading a specified bit pattern from each memory location in Buffer RAM and a similar test for DIB RAM. The DIB must be placed in BOOT mode for its self-test. The CS Buffer RAM self-test as well as the bit flip tests are all done with the CS in Operate.

ACS Science Data Buffer Check/Self-Tests for CS Buffer RAM and MIE RAM

NASA Astrophysics Data System (ADS)

Welty, Alan

2005-07-01

The ACS Science Buffer RAM is checked for bit flips during SAA passages. Thisis followed by a Control Section {CS} self-test consisting of writing/reading a specified bit pattern from each memory location in Buffer RAM and a similar test for MIE RAM. The MIE must be placed in BOOT mode for its self-test. The CS Buffer RAM self-test as well as the bit flip tests are all done with the CS in Operate.

Performance of Ge-Sb-Bi-Te-B Recording Media for Phase-Change Optical Disks

NASA Astrophysics Data System (ADS)

Lee, Chain-Ming; Yen, Wen-Shin; Liu, Ren-Haur; Chin, Tsung-Shune

2001-09-01

We investigated the physical properties of GeSbBiTeB materials and examined the feasibility for phase change recording. The studied compositions were Ge4Sb0.5Bi0.5Te5 and Ge2Sb1.5Bi0.5Te5 with B doping. The coexistence of Bi and B atoms into both Ge4SbTe5 and Ge2Sb2Te5 lattice maintains single fcc structure without phase separation. The Bi substitution shows benefits in decreasing crystallization temperature and activation energy, however the reflectivity is slightly reduced. 3 With small amount addition of boron about 1 at.%, the reflectivity can be increased. 2 Conventional 4-layer structure of digital versatile disk-random access memory (DVD-RAM) 2.6 GB format was used to prepare the disks for dynamic characterization and overwrite cyclability evaluations. The disk with Ge4Sb0.5Bi0.5Te5(B) recording layer shows large noise fluctuation and low overwrite erase ratio, suggesting that the crystallization speed is still insufficient. While the disk with Ge2Sb1.5Bi0.5Te5(B) recording layer shows lower writing and erasing powers, stable noise level and high overwrite erase ratio, indicating the capability for DVD-RAM applications. The effect of B doping was verified to enhance the signal amplitude and modulation.

Ultra-fast fluence optimization for beam angle selection algorithms

NASA Astrophysics Data System (ADS)

Bangert, M.; Ziegenhein, P.; Oelfke, U.

2014-03-01

Beam angle selection (BAS) including fluence optimization (FO) is among the most extensive computational tasks in radiotherapy. Precomputed dose influence data (DID) of all considered beam orientations (up to 100 GB for complex cases) has to be handled in the main memory and repeated FOs are required for different beam ensembles. In this paper, the authors describe concepts accelerating FO for BAS algorithms using off-the-shelf multiprocessor workstations. The FO runtime is not dominated by the arithmetic load of the CPUs but by the transportation of DID from the RAM to the CPUs. On multiprocessor workstations, however, the speed of data transportation from the main memory to the CPUs is non-uniform across the RAM; every CPU has a dedicated memory location (node) with minimum access time. We apply a thread node binding strategy to ensure that CPUs only access DID from their preferred node. Ideal load balancing for arbitrary beam ensembles is guaranteed by distributing the DID of every candidate beam equally to all nodes. Furthermore we use a custom sorting scheme of the DID to minimize the overall data transportation. The framework is implemented on an AMD Opteron workstation. One FO iteration comprising dose, objective function, and gradient calculation takes between 0.010 s (9 beams, skull, 0.23 GB DID) and 0.070 s (9 beams, abdomen, 1.50 GB DID). Our overall FO time is < 1 s for small cases, larger cases take ~ 4 s. BAS runs including FOs for 1000 different beam ensembles take ~ 15-70 min, depending on the treatment site. This enables an efficient clinical evaluation of different BAS algorithms.

A novel ternary content addressable memory design based on resistive random access memory with high intensity and low search energy

NASA Astrophysics Data System (ADS)

Han, Runze; Shen, Wensheng; Huang, Peng; Zhou, Zheng; Liu, Lifeng; Liu, Xiaoyan; Kang, Jinfeng

2018-04-01

A novel ternary content addressable memory (TCAM) design based on resistive random access memory (RRAM) is presented. Each TCAM cell consists of two parallel RRAM to both store and search for ternary data. The cell size of the proposed design is 8F2, enable a ∼60× cell area reduction compared with the conventional static random access memory (SRAM) based implementation. Simulation results also show that the search delay and energy consumption of the proposed design at the 64-bit word search are 2 ps and 0.18 fJ/bit/search respectively at 22 nm technology node, where significant improvements are achieved compared to previous works. The desired characteristics of RRAM for implementation of the high performance TCAM search chip are also discussed.

Resistance Switching Memory Characteristics of Si/CaF2/CdF2 Quantum-Well Structures Grown on Metal (CoSi2) Layer

NASA Astrophysics Data System (ADS)

Denda, Junya; Uryu, Kazuya; Watanabe, Masahiro

2013-04-01

A novel scheme of resistance switching random access memory (ReRAM) devices fabricated using Si/CaF2/CdF2/CaF2/Si quantum-well structures grown on metal CoSi2 layer formed on a Si substrate has been proposed, and embryonic write/erase memory operation has been demonstrated at room temperature. It has been found that the oxide-mediated epitaxy (OME) technique for forming the CoSi2 layer on Si dramatically improves the stability and reproducibility of the current-voltage (I-V) curve. This technology involves 10-nm-thick Co layer deposition on a protective oxide prepared by boiling in a peroxide-based solution followed by annealing at 550 °C for 30 min for silicidation in ultrahigh vacuum. A switching voltage of lower than 1 V, a peak current density of 32 kA/cm2, and an ON/OFF ratio of 10 have been observed for the sample with the thickness sequence of 0.9/0.9/2.5/0.9/5.0 nm for the respective layers in the Si/CaF2/CdF2/CaF2/Si structure. Results of surface morphology analysis suggest that the grain size of crystal islands with flat surfaces strongly affects the quality of device characteristics.

Temperature dependent characteristics of the random telegraph noise on contact resistive random access memory

NASA Astrophysics Data System (ADS)

Chang, Liang-Shun; Lin, Chrong Jung; King, Ya-Chin

2014-01-01

The temperature dependent characteristics of the random telegraphic noise (RTN) on contact resistive random access memory (CRRAM) are studied in this work. In addition to the bi-level switching, the occurrences of the middle states in the RTN signal are investigated. Based on the unique its temperature dependent characteristics, a new temperature sensing scheme is proposed for applications in ultra-low power sensor modules.

COS Science Data Buffer Check/Self-Tests for CS Buffer RAM and DIB RAM

NASA Astrophysics Data System (ADS)

Welty, Alan

2009-07-01

The COS Science Buffer RAM is checked for bit flips during SAA passages. This is followed by a Control Section {CS} self-test consisting of writing/reading a specified bit pattern from each memory location in Buffer RAM and a similar test for DIB RAM. The DIB must be placed in BOOT mode for its self-test. The CS Buffer RAM self-test as well as the bit flip tests are all done with the CS in Operate.Supports Activity COS-03

A Survey Of Architectural Approaches for Managing Embedded DRAM and Non-volatile On-chip Caches

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mittal, Sparsh; Vetter, Jeffrey S; Li, Dong

Recent trends of CMOS scaling and increasing number of on-chip cores have led to a large increase in the size of on-chip caches. Since SRAM has low density and consumes large amount of leakage power, its use in designing on-chip caches has become more challenging. To address this issue, researchers are exploring the use of several emerging memory technologies, such as embedded DRAM, spin transfer torque RAM, resistive RAM, phase change RAM and domain wall memory. In this paper, we survey the architectural approaches proposed for designing memory systems and, specifically, caches with these emerging memory technologies. To highlight theirmore » similarities and differences, we present a classification of these technologies and architectural approaches based on their key characteristics. We also briefly summarize the challenges in using these technologies for architecting caches. We believe that this survey will help the readers gain insights into the emerging memory device technologies, and their potential use in designing future computing systems.« less

Harvesting Entropy for Random Number Generation for Internet of Things Constrained Devices Using On-Board Sensors

PubMed Central

Pawlowski, Marcin Piotr; Jara, Antonio; Ogorzalek, Maciej

2015-01-01

Entropy in computer security is associated with the unpredictability of a source of randomness. The random source with high entropy tends to achieve a uniform distribution of random values. Random number generators are one of the most important building blocks of cryptosystems. In constrained devices of the Internet of Things ecosystem, high entropy random number generators are hard to achieve due to hardware limitations. For the purpose of the random number generation in constrained devices, this work proposes a solution based on the least-significant bits concatenation entropy harvesting method. As a potential source of entropy, on-board integrated sensors (i.e., temperature, humidity and two different light sensors) have been analyzed. Additionally, the costs (i.e., time and memory consumption) of the presented approach have been measured. The results obtained from the proposed method with statistical fine tuning achieved a Shannon entropy of around 7.9 bits per byte of data for temperature and humidity sensors. The results showed that sensor-based random number generators are a valuable source of entropy with very small RAM and Flash memory requirements for constrained devices of the Internet of Things. PMID:26506357

Harvesting entropy for random number generation for internet of things constrained devices using on-board sensors.

PubMed

Pawlowski, Marcin Piotr; Jara, Antonio; Ogorzalek, Maciej

2015-10-22

Entropy in computer security is associated with the unpredictability of a source of randomness. The random source with high entropy tends to achieve a uniform distribution of random values. Random number generators are one of the most important building blocks of cryptosystems. In constrained devices of the Internet of Things ecosystem, high entropy random number generators are hard to achieve due to hardware limitations. For the purpose of the random number generation in constrained devices, this work proposes a solution based on the least-significant bits concatenation entropy harvesting method. As a potential source of entropy, on-board integrated sensors (i.e., temperature, humidity and two different light sensors) have been analyzed. Additionally, the costs (i.e., time and memory consumption) of the presented approach have been measured. The results obtained from the proposed method with statistical fine tuning achieved a Shannon entropy of around 7.9 bits per byte of data for temperature and humidity sensors. The results showed that sensor-based random number generators are a valuable source of entropy with very small RAM and Flash memory requirements for constrained devices of the Internet of Things.

Analysis of behavior of focusing error signals generated by astigmatic method when a focused spot moves beyond the radius of a land-groove-type optical disk

NASA Astrophysics Data System (ADS)

Shinoda, Masahisa; Nakatani, Hidehiko; Nakai, Kenya; Ohmaki, Masayuki

2015-09-01

We theoretically calculate behaviors of focusing error signals generated by an astigmatic method in a land-groove-type optical disk. The focusing error signal from the land does not coincide with that from the groove. This behavior is enhanced when a focused spot of an optical pickup moves beyond the radius of the optical disk. A gain difference between the slope sensitivities of focusing error signals from the land and the groove is an important factor with respect to stable focusing servo control. In our calculation, the format of digital versatile disc-random access memory (DVD-RAM) is adopted as the land-groove-type optical disk model, and the dependences of the gain difference on various factors are investigated. The gain difference strongly depends on the optical intensity distribution of the laser beam in the optical pickup. The calculation method and results in this paper will be reflected in newly developed land-groove-type optical disks.

Ofeq-2 orbit, attitude, and flight evaluation

NASA Astrophysics Data System (ADS)

Grumer, Michael; Komem, Joseph; Kronenfeld, Joseph; Kubitski, Ophir; Lorber, Vitaly; Shyldkrot, Haim

1992-02-01

The most significant events and phenomena that occurred during the Ofeq-2 flight are evaluated in this work. Particular attention is paid to the physical and technological factors which affected its orbital lifetime. Comparison of Ofeq-2 telemetry results with prelaunch estimations and with Ofeq-1 flight data are presented. The satellite's orbit and mission characteristics are defined and the principal systems of Ofeq-2 are described. Topics addressed include the interaction between the spinner's attitude with respect to the sun and consequent electric power generation. The coning angle development history, the role of the solar data evaluation, and the factors influencing drag are also analyzed. All of these affected the Ofeq-2 power outage-recovery event. The orbit determination and the coning angle evolution estimation methods are discussed in some detail. A brief report on radiation effects on computer RAM (random access memory) is also given. An integrative systems engineering approach summary of the telemetry data reconstruction and analysis concludes the paper.

Toward self-assembled ferroelectric random access memories: hard-wired switching capacitor arrays with almost Tb/in.(2) densities.

PubMed

Evans, Paul R; Zhu, Xinhau; Baxter, Paul; McMillen, Mark; McPhillips, John; Morrison, Finlay D; Scott, James F; Pollard, Robert J; Bowman, Robert M; Gregg, J Marty

2007-05-01

We report on the successful fabrication of arrays of switchable nanocapacitors made by harnessing the self-assembly of materials. The structures are composed of arrays of 20-40 nm diameter Pt nanowires, spaced 50-100 nm apart, electrodeposited through nanoporous alumina onto a thin film lower electrode on a silicon wafer. A thin film ferroelectric (both barium titanate (BTO) and lead zirconium titanate (PZT)) has been deposited on top of the nanowire array, followed by the deposition of thin film upper electrodes. The PZT nanocapacitors exhibit hysteresis loops with substantial remnant polarizations, while although the switching performance was inferior, the low-field characteristics of the BTO nanocapacitors show dielectric behavior comparable to conventional thin film heterostructures. While registration is not sufficient for commercial RAM production, this is nevertheless an embryonic form of the highest density hard-wired FRAM capacitor array reported to date and compares favorably with atomic force microscopy read-write densities.

Physical principles and current status of emerging non-volatile solid state memories

NASA Astrophysics Data System (ADS)

Wang, L.; Yang, C.-H.; Wen, J.

2015-07-01

Today the influence of non-volatile solid-state memories on persons' lives has become more prominent because of their non-volatility, low data latency, and high robustness. As a pioneering technology that is representative of non-volatile solidstate memories, flash memory has recently seen widespread application in many areas ranging from electronic appliances, such as cell phones and digital cameras, to external storage devices such as universal serial bus (USB) memory. Moreover, owing to its large storage capacity, it is expected that in the near future, flash memory will replace hard-disk drives as a dominant technology in the mass storage market, especially because of recently emerging solid-state drives. However, the rapid growth of the global digital data has led to the need for flash memories to have larger storage capacity, thus requiring a further downscaling of the cell size. Such a miniaturization is expected to be extremely difficult because of the well-known scaling limit of flash memories. It is therefore necessary to either explore innovative technologies that can extend the areal density of flash memories beyond the scaling limits, or to vigorously develop alternative non-volatile solid-state memories including ferroelectric random-access memory, magnetoresistive random-access memory, phase-change random-access memory, and resistive random-access memory. In this paper, we review the physical principles of flash memories and their technical challenges that affect our ability to enhance the storage capacity. We then present a detailed discussion of novel technologies that can extend the storage density of flash memories beyond the commonly accepted limits. In each case, we subsequently discuss the physical principles of these new types of non-volatile solid-state memories as well as their respective merits and weakness when utilized for data storage applications. Finally, we predict the future prospects for the aforementioned solid-state memories for the next generation of data-storage devices based on a comparison of their performance. [Figure not available: see fulltext.

Recent trends in hardware security exploiting hybrid CMOS-resistive memory circuits

NASA Astrophysics Data System (ADS)

Sahay, Shubham; Suri, Manan

2017-12-01

This paper provides a comprehensive review and insight of recent trends in the field of random number generator (RNG) and physically unclonable function (PUF) circuits implemented using different types of emerging resistive non-volatile (NVM) memory devices. We present a detailed review of hybrid RNG/PUF implementations based on the use of (i) Spin-Transfer Torque (STT-MRAM), and (ii) metal-oxide based (OxRAM), NVM devices. Various approaches on Hybrid CMOS-NVM RNG/PUF circuits are considered, followed by a discussion on different nanoscale device phenomena. Certain nanoscale device phenomena (variability/stochasticity etc), which are otherwise undesirable for reliable memory and storage applications, form the basis for low power and highly scalable RNG/PUF circuits. Detailed qualitative comparison and benchmarking of all implementations is performed.

Dual operation characteristics of resistance random access memory in indium-gallium-zinc-oxide thin film transistors

NASA Astrophysics Data System (ADS)

Yang, Jyun-Bao; Chang, Ting-Chang; Huang, Jheng-Jie; Chen, Yu-Chun; Chen, Yu-Ting; Tseng, Hsueh-Chih; Chu, Ann-Kuo; Sze, Simon M.

2014-04-01

In this study, indium-gallium-zinc-oxide thin film transistors can be operated either as transistors or resistance random access memory devices. Before the forming process, current-voltage curve transfer characteristics are observed, and resistance switching characteristics are measured after a forming process. These resistance switching characteristics exhibit two behaviors, and are dominated by different mechanisms. The mode 1 resistance switching behavior is due to oxygen vacancies, while mode 2 is dominated by the formation of an oxygen-rich layer. Furthermore, an easy approach is proposed to reduce power consumption when using these resistance random access memory devices with the amorphous indium-gallium-zinc-oxide thin film transistor.

Realization of Minimum and Maximum Gate Function in Ta2O5-based Memristive Devices

NASA Astrophysics Data System (ADS)

Breuer, Thomas; Nielen, Lutz; Roesgen, Bernd; Waser, Rainer; Rana, Vikas; Linn, Eike

2016-04-01

Redox-based resistive switching devices (ReRAM) are considered key enablers for future non-volatile memory and logic applications. Functionally enhanced ReRAM devices could enable new hardware concepts, e.g. logic-in-memory or neuromorphic applications. In this work, we demonstrate the implementation of ReRAM-based fuzzy logic gates using Ta2O5 devices to enable analogous Minimum and Maximum operations. The realized gates consist of two anti-serially connected ReRAM cells offering two inputs and one output. The cells offer an endurance up to 106 cycles. By means of exemplary input signals, each gate functionality is verified and signal constraints are highlighted. This realization could improve the efficiency of analogous processing tasks such as sorting networks in the future.

FPGA Sequencer for Radar Altimeter Applications

NASA Technical Reports Server (NTRS)

Berkun, Andrew C.; Pollard, Brian D.; Chen, Curtis W.

2011-01-01

A sequencer for a radar altimeter provides accurate attitude information for a reliable soft landing of the Mars Science Laboratory (MSL). This is a field-programmable- gate-array (FPGA)-only implementation. A table loaded externally into the FPGA controls timing, processing, and decision structures. Radar is memory-less and does not use previous acquisitions to assist in the current acquisition. All cycles complete in exactly 50 milliseconds, regardless of range or whether a target was found. A RAM (random access memory) within the FPGA holds instructions for up to 15 sets. For each set, timing is run, echoes are processed, and a comparison is made. If a target is seen, more detailed processing is run on that set. If no target is seen, the next set is tried. When all sets have been run, the FPGA terminates and waits for the next 50-millisecond event. This setup simplifies testing and improves reliability. A single vertex chip does the work of an entire assembly. Output products require minor processing to become range and velocity. This technology is the heart of the Terminal Descent Sensor, which is an integral part of the Entry Decent and Landing system for MSL. In addition, it is a strong candidate for manned landings on Mars or the Moon.

Effect of Atomic Layer Depositions (ALD)-Deposited Titanium Oxide (TiO2) Thickness on the Performance of Zr40Cu35Al15Ni10 (ZCAN)/TiO2/Indium (In)-Based Resistive Random Access Memory (RRAM) Structures

DTIC Science & Technology

2015-08-01

metal structures, memristors, resistive random access memory, RRAM, titanium dioxide, Zr40Cu35Al15Ni10, ZCAN, resistive memory, tunnel junction 16...TiO2 thickness ........................6 1 1. Introduction Resistive-switching memory elements based on metal-insulator-metal (MIM) diodes ...have attracted great interest due to their potential as components for simple, inexpensive, and high-density non-volatile storage devices. MIM diodes

New high resolution Random Telegraph Noise (RTN) characterization method for resistive RAM

NASA Astrophysics Data System (ADS)

Maestro, M.; Diaz, J.; Crespo-Yepes, A.; Gonzalez, M. B.; Martin-Martinez, J.; Rodriguez, R.; Nafria, M.; Campabadal, F.; Aymerich, X.

2016-01-01

Random Telegraph Noise (RTN) is one of the main reliability problems of resistive switching-based memories. To understand the physics behind RTN, a complete and accurate RTN characterization is required. The standard equipment used to analyse RTN has a typical time resolution of ∼2 ms which prevents evaluating fast phenomena. In this work, a new RTN measurement procedure, which increases the measurement time resolution to 2 μs, is proposed. The experimental set-up, together with the recently proposed Weighted Time Lag (W-LT) method for the analysis of RTN signals, allows obtaining a more detailed and precise information about the RTN phenomenon.

Lewis and Fischer 344 rats as a model for genetic differences in spatial learning and memory: Cocaine effects.

PubMed

Fole, Alberto; Miguéns, Miguel; Morales, Lidia; González-Martín, Carmen; Ambrosio, Emilio; Del Olmo, Nuria

2017-06-02

Lewis (LEW) and Fischer 344 (F344) rats are considered a model of genetic vulnerability to drug addiction. We previously showed important differences in spatial learning and memory between them, but in contrast with previous experiments demonstrating cocaine-induced enhanced learning in Morris water maze (MWM) highly demanding tasks, the eight-arm radial maze (RAM) performance was not modified either in LEW or F344 rats after chronic cocaine treatment. In the present work, chronically cocaine-treated LEW and F344 adult rats have been evaluated in learning and memory performance using the Y-maze, two RAM protocols that differ in difficulty, and a reversal protocol that tests cognitive flexibility. After one of the RAM protocols, we quantified dendritic spine density in hippocampal CA1 neurons and compared it to animals treated with cocaine but not submitted to RAM. LEW cocaine treated rats showed a better performance in the Y maze than their saline counterparts, an effect that was not evident in the F344 strain. F344 rats significantly took more time to learn the RAM task and made a greater number of errors than LEW animals in both protocols tested, whereas cocaine treatment induced deleterious effects in learning and memory in the highly difficult protocol. Moreover, hippocampal spine density was cocaine-modulated in LEW animals whereas no effects were found in F344 rats. We propose that differences in addictive-like behavior between LEW and F344 rats could be related to differences in hippocampal learning and memory processes that could be on the basis of individual vulnerability to cocaine addiction. Copyright © 2017 Elsevier Inc. All rights reserved.

Accelerating String Set Matching in FPGA Hardware for Bioinformatics Research

PubMed Central

Dandass, Yoginder S; Burgess, Shane C; Lawrence, Mark; Bridges, Susan M

2008-01-01

Background This paper describes techniques for accelerating the performance of the string set matching problem with particular emphasis on applications in computational proteomics. The process of matching peptide sequences against a genome translated in six reading frames is part of a proteogenomic mapping pipeline that is used as a case-study. The Aho-Corasick algorithm is adapted for execution in field programmable gate array (FPGA) devices in a manner that optimizes space and performance. In this approach, the traditional Aho-Corasick finite state machine (FSM) is split into smaller FSMs, operating in parallel, each of which matches up to 20 peptides in the input translated genome. Each of the smaller FSMs is further divided into five simpler FSMs such that each simple FSM operates on a single bit position in the input (five bits are sufficient for representing all amino acids and special symbols in protein sequences). Results This bit-split organization of the Aho-Corasick implementation enables efficient utilization of the limited random access memory (RAM) resources available in typical FPGAs. The use of on-chip RAM as opposed to FPGA logic resources for FSM implementation also enables rapid reconfiguration of the FPGA without the place and routing delays associated with complex digital designs. Conclusion Experimental results show storage efficiencies of over 80% for several data sets. Furthermore, the FPGA implementation executing at 100 MHz is nearly 20 times faster than an implementation of the traditional Aho-Corasick algorithm executing on a 2.67 GHz workstation. PMID:18412963

Characterization of Bi and Fe co-doped PZT capacitors for FeRAM.

PubMed

Cross, Jeffrey S; Kim, Seung-Hyun; Wada, Satoshi; Chatterjee, Abhijit

2010-08-01

Ferroelectric random access memory (FeRAM) has been in mass production for over 15 years. Higher polarization ferroelectric materials are needed for future devices which can operate above about 100 °C. With this goal in mind, co-doping of thin Pb(Zr 40 ,Ti 60 )O 3 (PZT) films with 1 at.% Bi and 1 at.% Fe was examined in order to enhance the ferroelectric properties as well as characterize the doped material. The XRD patterns of PZT-5% BiFeO 3 (BF) and PZT 140-nm thick films showed (111) orientation on (111) platinized Si wafers and a 30 °C increase in the tetragonal to cubic phase transition temperature, often called the Curie temperature, from 350 to 380 °C with co-doping, indicating that Bi and Fe are substituting into the PZT lattice. Raman spectra revealed decreased band intensity with Bi and Fe co-doping of PZT compared to PZT. Polarization hysteresis loops show similar values of remanent polarization, but square-shaped voltage pulse-measured net polarization values of PZT-BF were higher and showed higher endurance to repeated cycling up to 10 10 cycles. It is proposed that Bi and Fe are both in the +3 oxidation state and substituting into the perovskite A and B sites, respectively. Substitution of Bi and Fe into the PZT lattice likely creates defect dipoles, which increase the net polarization when measured by the short voltage pulse positive-up-negative-down (PUND) method.

Effects of electrodes on the properties of sol-gel PZT based capacitors in FeRAM

NASA Astrophysics Data System (ADS)

Zhang, Ming-Ming; Jia, Ze; Ren, Tian-Ling

2009-05-01

The effects of electrodes on the properties of capacitors applied in ferroelectric random access memories (FeRAM) are investigated in this work. Pt and Ir are used as bottom and top electrodes (BE and TE), respectively, in sol-gel Pb(Zr xTi 1-x)O 3 (PZT) based capacitors. Bottom electrodes are found to play a dominant role in the properties of PZT films and capacitors. Capacitors using Pt as bottom electrode have larger remnant polarization (2Pr) than those using Ir which may result from the different orientations of PZT films. The higher Schottky barrier, more dense film and smaller roughness are believed to be the reasons for the better leakage performance of capacitors using Pt as bottom electrodes. Different vacancies types and interface conditions are believed to be the main reasons for the better fatigue (less than 10% initial 2Pr loss after 10 11 fatigue cycles) and better imprint properties of TE/PZT/Ir capacitors. Top electrodes are found to have smaller impact on the properties of capacitors compared with bottom electrodes. A decrease in 2Pr is found when Ir is used as top electrode instead of Pt for PZT/Pt, which is believed to be caused by the stress resulting from lattice mismatch. The different thermal processes that top and bottom electrodes suffered are believed to be the reason for the different impacts they have on capacitors.

Characterization of Bi and Fe co-doped PZT capacitors for FeRAM

PubMed Central

Cross, Jeffrey S; Kim, Seung-Hyun; Wada, Satoshi; Chatterjee, Abhijit

2010-01-01

Ferroelectric random access memory (FeRAM) has been in mass production for over 15 years. Higher polarization ferroelectric materials are needed for future devices which can operate above about 100 °C. With this goal in mind, co-doping of thin Pb(Zr40,Ti60)O3 (PZT) films with 1 at.% Bi and 1 at.% Fe was examined in order to enhance the ferroelectric properties as well as characterize the doped material. The XRD patterns of PZT-5% BiFeO3 (BF) and PZT 140-nm thick films showed (111) orientation on (111) platinized Si wafers and a 30 °C increase in the tetragonal to cubic phase transition temperature, often called the Curie temperature, from 350 to 380 °C with co-doping, indicating that Bi and Fe are substituting into the PZT lattice. Raman spectra revealed decreased band intensity with Bi and Fe co-doping of PZT compared to PZT. Polarization hysteresis loops show similar values of remanent polarization, but square-shaped voltage pulse-measured net polarization values of PZT-BF were higher and showed higher endurance to repeated cycling up to 1010 cycles. It is proposed that Bi and Fe are both in the +3 oxidation state and substituting into the perovskite A and B sites, respectively. Substitution of Bi and Fe into the PZT lattice likely creates defect dipoles, which increase the net polarization when measured by the short voltage pulse positive-up-negative-down (PUND) method. PMID:27877349

Solar particle induced upsets in the TDRS-1 attitude control system RAM during the October 1989 solar particle events

NASA Astrophysics Data System (ADS)

Croley, D. R.; Garrett, H. B.; Murphy, G. B.; Garrard, T. L.

1995-10-01

The three large solar particle events, beginning on October 19, 1989 and lasting approximately six days, were characterized by high fluences of solar protons and heavy ions at 1 AU. During these events, an abnormally large number of upsets (243) were observed in the random access memory of the attitude control system (ACS) control processing electronics (CPE) on-board the geosynchronous TDRS-1 (Telemetry and Data Relay Satellite). The RAR I unit affected was composed of eight Fairchild 93L422 memory chips. The Galileo spacecraft, launched on October 18, 1989 (one day prior to the solar particle events) observed the fluxes of heavy ions experienced by TDRS-1. Two solid-state detector telescopes on-board Galileo designed to measure heavy ion species and energy, were turned on during time periods within each of the three separate events. The heavy ion data have been modeled and the time history of the events reconstructed to estimate heavy ion fluences. These fluences were converted to effective LET spectra after transport through the estimated shielding distribution around the TDRS-1 ACS system. The number of single event upsets (SEU) expected was calculated by integrating the measured cross section for the Fairchild 93L422 memory chip with average effective LET spectrum. The expected number of heavy ion induced SEUs calculated was 176. GOES-7 proton data, observed during the solar particle events, were used to estimate the number of proton-induced SEUs by integrating the proton fluence spectrum incident on the memory chips, with the two-parameter Bendel cross section for proton SEUs.

Reduced autobiographical memory specificity relates to weak resistance to proactive interference.

PubMed

Smets, Jorien; Wessel, Ineke; Raes, Filip

2014-06-01

Reduced autobiographical memory specificity (rAMS), experiencing intrusive memories, and rumination appear to be risk factors for depression and depressive relapse. The aim of the current study was to investigate whether a weak resistance to proactive interference (PI) might underlie this trio of cognitive risk factors. Resistance to PI refers to being able to ignore cognitive distracters that were previously relevant but became irrelevant for current task goals. Students (N = 65) and depressed patients (N = 37) completed tasks measuring resistance to PI and AMS, and completed questionnaires on intrusive memories and rumination. In both samples, weaker resistance to PI was associated with rAMS. There was no evidence for a relationship between resistance to PI and intrusive memories or rumination. As we did not assess other measures of executive functioning, we cannot conclude whether the observed relationship between rumination and PI is due to unique qualities of PI. Difficulties to deliberately recall specific, rather than general or categoric autobiographical memories appear to be related to more general problems with the inhibition of interference of mental distracters. The results are in line with the executive control account of rAMS. Copyright © 2013 Elsevier Ltd. All rights reserved.

Reconfigurable Fault Tolerance for FPGAs

NASA Technical Reports Server (NTRS)

Shuler, Robert, Jr.

2010-01-01

The invention allows a field-programmable gate array (FPGA) or similar device to be efficiently reconfigured in whole or in part to provide higher capacity, non-redundant operation. The redundant device consists of functional units such as adders or multipliers, configuration memory for the functional units, a programmable routing method, configuration memory for the routing method, and various other features such as block RAM, I/O (random access memory, input/output) capability, dedicated carry logic, etc. The redundant device has three identical sets of functional units and routing resources and majority voters that correct errors. The configuration memory may or may not be redundant, depending on need. For example, SRAM-based FPGAs will need some type of radiation-tolerant configuration memory, or they will need triple-redundant configuration memory. Flash or anti-fuse devices will generally not need redundant configuration memory. Some means of loading and verifying the configuration memory is also required. These are all components of the pre-existing redundant FPGA. This innovation modifies the voter to accept a MODE input, which specifies whether ordinary voting is to occur, or if redundancy is to be split. Generally, additional routing resources will also be required to pass data between sections of the device created by splitting the redundancy. In redundancy mode, the voters produce an output corresponding to the two inputs that agree, in the usual fashion. In the split mode, the voters select just one input and convey this to the output, ignoring the other inputs. In a dual-redundant system (as opposed to triple-redundant), instead of a voter, there is some means to latch or gate a state update only when both inputs agree. In this case, the invention would require modification of the latch or gate so that it would operate normally in redundant mode, and would separately latch or gate the inputs in non-redundant mode.

RAM Technology Study.

DTIC Science & Technology

1980-01-03

characteristics. 4 2 Example of MOS scaling. 18 3 RAM chip area comparison. 31 4 Summary of RAM switching response. 34 5 Summary of RAM power dissipation...array to retain the data after power is removed (volatility). The level of chip complexity is that of the most complex arrays in current production and is...4) ..4 L) . C U ~~~~ -- -- t 0 -, 4 4 . . Data in the Read-Only-Memory is defined by the metallization pattern during chip fabrication. The stored

Non-volatile magnetic random access memory

NASA Technical Reports Server (NTRS)

Katti, Romney R. (Inventor); Stadler, Henry L. (Inventor); Wu, Jiin-Chuan (Inventor)

1994-01-01

Improvements are made in a non-volatile magnetic random access memory. Such a memory is comprised of an array of unit cells, each having a Hall-effect sensor and a thin-film magnetic element made of material having an in-plane, uniaxial anisotropy and in-plane, bipolar remanent magnetization states. The Hall-effect sensor is made more sensitive by using a 1 m thick molecular beam epitaxy grown InAs layer on a silicon substrate by employing a GaAs/AlGaAs/InAlAs superlattice buffering layer. One improvement avoids current shunting problems of matrix architecture. Another improvement reduces the required magnetizing current for the micromagnets. Another improvement relates to the use of GaAs technology wherein high electron-mobility GaAs MESFETs provide faster switching times. Still another improvement relates to a method for configuring the invention as a three-dimensional random access memory.

Patient ECG recording control for an automatic implantable defibrillator

NASA Technical Reports Server (NTRS)

Fountain, Glen H. (Inventor); Lee, Jr., David G. (Inventor); Kitchin, David A. (Inventor)

1986-01-01

An implantable automatic defibrillator includes sensors which are placed on or near the patient's heart to detect electrical signals indicative of the physiology of the heart. The signals are digitally converted and stored into a FIFO region of a RAM by operation of a direct memory access (DMA) controller. The DMA controller operates transparently with respect to the microprocessor which is part of the defibrillator. The implantable defibrillator includes a telemetry communications circuit for sending data outbound from the defibrillator to an external device (either a patient controller or a physician's console or other) and a receiver for sensing at least an externally generated patient ECG recording command signal. The patient recording command signal is generated by the hand held patient controller. Upon detection of the patient ECG recording command, DMA copies the contents of the FIFO into a specific region of the RAM.

Optical mass memories

NASA Technical Reports Server (NTRS)

Bailey, G. A.

1976-01-01

Optical and magnetic variants in the design of trillion-bit read/write memories are compared and tabulated. Components and materials suitable for a random access read/write nonmoving memory system are examined, with preference given to holography and photoplastic materials. Advantages and deficiencies of photoplastics are reviewed. Holographic page composer design, essential features of an optical memory with no moving parts, fiche-oriented random access memory design, and materials suitable for an efficient photoplastic fiche are considered. The optical variants offer advantages in lower volume and weight at data transfer rates near 1 Mbit/sec, but power drain is of the same order as for the magnetic variants (tape memory, disk memory). The mechanical properties of photoplastic film materials still leave much to be desired.

Magnet/Hall-Effect Random-Access Memory

NASA Technical Reports Server (NTRS)

Wu, Jiin-Chuan; Stadler, Henry L.; Katti, Romney R.

1991-01-01

In proposed magnet/Hall-effect random-access memory (MHRAM), bits of data stored magnetically in Perm-alloy (or equivalent)-film memory elements and read out by using Hall-effect sensors to detect magnetization. Value of each bit represented by polarity of magnetization. Retains data for indefinite time or until data rewritten. Speed of Hall-effect sensors in MHRAM results in readout times of about 100 nanoseconds. Other characteristics include high immunity to ionizing radiation and storage densities of order 10(Sup6)bits/cm(Sup 2) or more.

Electrical Evaluation of RCA MWS5501D Random Access Memory, Volume 2, Appendix a

NASA Technical Reports Server (NTRS)

Klute, A.

1979-01-01

The electrical characterization and qualification test results are presented for the RCA MWS5001D random access memory. The tests included functional tests, AC and DC parametric tests, AC parametric worst-case pattern selection test, determination of worst-case transition for setup and hold times, and a series of schmoo plots. The address access time, address readout time, the data hold time, and the data setup time are some of the results surveyed.

76 FR 45295 - In the Matter of Certain Static Random Access Memories and Products Containing Same; Notice of...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-07-28

... supplementing the amended complaint was filed on June 28, 2011. A second amended complaint was filed on July 13... of certain static random access memories and products containing same by reason of infringement of... 13 of the `937 patent, and whether an industry in the United States exists as required by subsection...

Vertical Launch System Loadout Planner

DTIC Science & Technology

2015-03-01

United States Navy USS United States’ Ship VBA Visual Basic for Applications VLP VLS Loadout Planner VLS Vertical Launch System...with 32 gigabytes of random access memory and eight processors, General Algebraic Modeling System (GAMS) CPLEX version 24 (GAMS, 2015) solves this...problem in ten minutes to an integer tolerance of 10%. The GAMS interpreter and CPLEX solver require 75 Megabytes of random access memory for this

Nonvolatile GaAs Random-Access Memory

NASA Technical Reports Server (NTRS)

Katti, Romney R.; Stadler, Henry L.; Wu, Jiin-Chuan

1994-01-01

Proposed random-access integrated-circuit electronic memory offers nonvolatile magnetic storage. Bits stored magnetically and read out with Hall-effect sensors. Advantages include short reading and writing times and high degree of immunity to both single-event upsets and permanent damage by ionizing radiation. Use of same basic material for both transistors and sensors simplifies fabrication process, with consequent benefits in increased yield and reduced cost.

FPS-RAM: Fast Prefix Search RAM-Based Hardware for Forwarding Engine

NASA Astrophysics Data System (ADS)

Zaitsu, Kazuya; Yamamoto, Koji; Kuroda, Yasuto; Inoue, Kazunari; Ata, Shingo; Oka, Ikuo

Ternary content addressable memory (TCAM) is becoming very popular for designing high-throughput forwarding engines on routers. However, TCAM has potential problems in terms of hardware and power costs, which limits its ability to deploy large amounts of capacity in IP routers. In this paper, we propose new hardware architecture for fast forwarding engines, called fast prefix search RAM-based hardware (FPS-RAM). We designed FPS-RAM hardware with the intent of maintaining the same search performance and physical user interface as TCAM because our objective is to replace the TCAM in the market. Our RAM-based hardware architecture is completely different from that of TCAM and has dramatically reduced the costs and power consumption to 62% and 52%, respectively. We implemented FPS-RAM on an FPGA to examine its lookup operation.

Application of phase-change materials in memory taxonomy.

PubMed

Wang, Lei; Tu, Liang; Wen, Jing

2017-01-01

Phase-change materials are suitable for data storage because they exhibit reversible transitions between crystalline and amorphous states that have distinguishable electrical and optical properties. Consequently, these materials find applications in diverse memory devices ranging from conventional optical discs to emerging nanophotonic devices. Current research efforts are mostly devoted to phase-change random access memory, whereas the applications of phase-change materials in other types of memory devices are rarely reported. Here we review the physical principles of phase-change materials and devices aiming to help researchers understand the concept of phase-change memory. We classify phase-change memory devices into phase-change optical disc, phase-change scanning probe memory, phase-change random access memory, and phase-change nanophotonic device, according to their locations in memory hierarchy. For each device type we discuss the physical principles in conjunction with merits and weakness for data storage applications. We also outline state-of-the-art technologies and future prospects.

A Cerebellar-model Associative Memory as a Generalized Random-access Memory

NASA Technical Reports Server (NTRS)

Kanerva, Pentti

1989-01-01

A versatile neural-net model is explained in terms familiar to computer scientists and engineers. It is called the sparse distributed memory, and it is a random-access memory for very long words (for patterns with thousands of bits). Its potential utility is the result of several factors: (1) a large pattern representing an object or a scene or a moment can encode a large amount of information about what it represents; (2) this information can serve as an address to the memory, and it can also serve as data; (3) the memory is noise tolerant--the information need not be exact; (4) the memory can be made arbitrarily large and hence an arbitrary amount of information can be stored in it; and (5) the architecture is inherently parallel, allowing large memories to be fast. Such memories can become important components of future computers.

Development of highly reliable static random access memory for 40-nm embedded split gate-MONOS flash memory

NASA Astrophysics Data System (ADS)

Okamoto, Shin-ichi; Maekawa, Kei-ichi; Kawashima, Yoshiyuki; Shiba, Kazutoshi; Sugiyama, Hideki; Inoue, Masao; Nishida, Akio

2015-04-01

High quality static random access memory (SRAM) for 40-nm embedded MONOS flash memory with split gate (SG-MONOS) was developed. Marginal failure, which results in threshold voltage/drain current tailing and outliers of SRAM transistors, occurs when using a conventional SRAM structure. These phenomena can be explained by not only gate depletion but also partial depletion and percolation path formation in the MOS channel. A stacked poly-Si gate structure can suppress these phenomena and achieve high quality SRAM without any defects in the 6σ level and with high affinity to the 40-nm SG-MONOS process was developed.

Frontal cortex and hippocampus neurotransmitter receptor complex level parallels spatial memory performance in the radial arm maze.

PubMed

Shanmugasundaram, Bharanidharan; Sase, Ajinkya; Miklosi, András G; Sialana, Fernando J; Subramaniyan, Saraswathi; Aher, Yogesh D; Gröger, Marion; Höger, Harald; Bennett, Keiryn L; Lubec, Gert

2015-08-01

Several neurotransmitter receptors have been proposed to be involved in memory formation. However, information on receptor complexes (RCs) in the radial arm maze (RAM) is missing. It was therefore the aim of this study to determine major neurotransmitter RCs levels that are modulated by RAM training because receptors are known to work in homo-or heteromeric assemblies. Immediate early gene Arc expression was determined by immunohistochemistry to show if prefrontal cortices (PFC) and hippocampi were activated following RAM training as these regions are known to be mainly implicated in spatial memory. Twelve rats per group, trained and untrained in the twelve arm RAM were used, frontal cortices and hippocampi were taken, RCs in membrane protein were quantified by blue-native PAGE immunoblotting. RCs components were characterised by co-immunoprecipitation followed by mass spectrometrical analysis and by the use of the proximity ligation assay. Arc expression was significantly higher in PFC of trained as compared to untrained rats whereas it was comparable in hippocampi. Frontal cortical levels of RCs containing AMPA receptors GluA1, GluA2, NMDA receptors GluN1 and GluN2A, dopamine receptor D1, acetylcholine nicotinic receptor alpha 7 (nAChR-α7) and hippocampal levels of RCs containing D1, GluN1, GluN2B and nAChR-α7 were increased in the trained group; phosphorylated dopamine transporter levels were decreased in the trained group. D1 and GluN1 receptors were shown to be in the same complex. Taken together, distinct RCs were paralleling performance in the RAM which is relevant for interpretation of previous and design of future work on RCs in memory studies. Copyright © 2015 Elsevier B.V. All rights reserved.

CMOS gate array characterization procedures

NASA Astrophysics Data System (ADS)

Spratt, James P.

1993-09-01

Present procedures are inadequate for characterizing the radiation hardness of gate array product lines prior to personalization because the selection of circuits to be used, from among all those available in the manufacturer's circuit library, is usually uncontrolled. (Some circuits are fundamentally more radiation resistant than others.) In such cases, differences in hardness can result between different designs of the same logic function. Hardness also varies because many gate arrays feature large custom-designed megacells (e.g., microprocessors and random access memories-MicroP's and RAM's). As a result, different product lines cannot be compared equally. A characterization strategy is needed, along with standardized test vehicle(s), methodology, and conditions, so that users can make informed judgments on which gate arrays are best suited for their needs. The program described developed preferred procedures for the radiation characterization of gate arrays, including a gate array evaluation test vehicle, featuring a canary circuit, designed to define the speed versus hardness envelope of the gate array. A multiplier was chosen for this role, and a baseline multiplier architecture is suggested that could be incorporated into an existing standard evaluation circuit chip.

Impact of ultra-thin Al2O3-y layers on TiO2-x ReRAM switching characteristics

NASA Astrophysics Data System (ADS)

Trapatseli, Maria; Cortese, Simone; Serb, Alexander; Khiat, Ali; Prodromakis, Themistoklis

2017-05-01

Transition metal-oxide resistive random access memory devices have demonstrated excellent performance in switching speed, versatility of switching and low-power operation. However, this technology still faces challenges like poor cycling endurance, degradation due to high electroforming (EF) switching voltages and low yields. Approaches such as engineering of the active layer by doping or addition of thin oxide buffer layers have been often adopted to tackle these problems. Here, we have followed a strategy that combines the two; we have used ultra-thin Al2O3-y buffer layers incorporated between TiO2-x thin films taking into account both 3+/4+ oxidation states of Al/Ti cations. Our devices were tested by DC and pulsed voltage sweeping and in both cases demonstrated improved switching voltages. We believe that the Al2O3-y layers act as reservoirs of oxygen vacancies which are injected during EF, facilitate a filamentary switching mechanism and provide enhanced filament stability, as shown by the cycling endurance measurements.

Influence of age on cognition and scopolamine induced memory impairment in rats measured in the radial maze paradigm.

PubMed

Appenroth, Dorothea; Fleck, Christian

2010-01-01

The influence of age on (1) cognition and (2) scopolamine (CAS 51-34-3) induced memory impairment in female rats was measured in the radial maze paradigm (RAM). (1) First training trials were done with 3 and 12 months old rats. Rats were trained to find all eight food baits in the RAM without errors and within 1 min. Both 3- and 12-month old rats need about 15 trials for the first-time learning of the RAM task. After intervals of 3 6 months, respectively, initially young rats were re-trained with an age of 6 and 12 months. Surprisingly, re-trained rats successfully completed the maze runs already after one re-training trial. Thus the phenomenon of preserved spatial memory was approved for female rats. (2) Memory impairment by scopolamine in the RAM was tested for the time in rats with an age of 3 months. first rats with thesame After a control run,the rats received an i.p. injection of either scopolamine hydrochloride (0.05 mg/100 g b. wt.) or saline vehicle. The effect of scopolamine on working memory was measured 20 min after administration. Training procedure and scopolamine administration were repeated at an age of 6, 12, 18, and 24 months in the same manner. The cognition impairment after scopolamine (number of errors: control: <1; scopolamine: 5-6) remains constant between 3 and 24 months of age. The only significant difference was the increase in run time in rats older than 18 months caused by degenerative changes developing with age.

A semi-floating gate memory based on van der Waals heterostructures for quasi-non-volatile applications

NASA Astrophysics Data System (ADS)

Liu, Chunsen; Yan, Xiao; Song, Xiongfei; Ding, Shijin; Zhang, David Wei; Zhou, Peng

2018-05-01

As conventional circuits based on field-effect transistors are approaching their physical limits due to quantum phenomena, semi-floating gate transistors have emerged as an alternative ultrafast and silicon-compatible technology. Here, we show a quasi-non-volatile memory featuring a semi-floating gate architecture with band-engineered van der Waals heterostructures. This two-dimensional semi-floating gate memory demonstrates 156 times longer refresh time with respect to that of dynamic random access memory and ultrahigh-speed writing operations on nanosecond timescales. The semi-floating gate architecture greatly enhances the writing operation performance and is approximately 106 times faster than other memories based on two-dimensional materials. The demonstrated characteristics suggest that the quasi-non-volatile memory has the potential to bridge the gap between volatile and non-volatile memory technologies and decrease the power consumption required for frequent refresh operations, enabling a high-speed and low-power random access memory.

ORBS: A data reduction software for the imaging Fourier transform spectrometers SpIOMM and SITELLE

NASA Astrophysics Data System (ADS)

Martin, T.; Drissen, L.; Joncas, G.

2012-09-01

SpIOMM (Spectromètre-Imageur de l'Observatoire du Mont Mégantic) is still the only operational astronomical Imaging Fourier Transform Spectrometer (IFTS) capable of obtaining the visible spectrum of every source of light in a field of view of 12 arc-minutes. Even if it has been designed to work with both outputs of the Michelson interferometer, up to now only one output has been used. Here we present ORBS (Outils de Réduction Binoculaire pour SpIOMM/SITELLE), the reduction software we designed in order to take advantage of the two output data. ORBS will also be used to reduce the data of SITELLE (Spectromètre-Imageur pour l' Étude en Long et en Large des raies d' Émissions) { the direct successor of SpIOMM, which will be in operation at the Canada-France- Hawaii Telescope (CFHT) in early 2013. SITELLE will deliver larger data cubes than SpIOMM (up to 2 cubes of 34 Go each). We thus have made a strong effort in optimizing its performance efficiency in terms of speed and memory usage in order to ensure the best compliance with the quality characteristics discussed with the CFHT team. As a result ORBS is now capable of reducing 68 Go of data in less than 20 hours using only 5 Go of random-access memory (RAM).

Transparent resistive switching memory using aluminum oxide on a flexible substrate

NASA Astrophysics Data System (ADS)

Yeom, Seung-Won; Shin, Sang-Chul; Kim, Tan-Young; Ha, Hyeon Jun; Lee, Yun-Hi; Shim, Jae Won; Ju, Byeong-Kwon

2016-02-01

Resistive switching memory (ReRAM) has attracted much attention in recent times owing to its fast switching, simple structure, and non-volatility. Flexible and transparent electronic devices have also attracted considerable attention. We therefore fabricated an Al2O3-based ReRAM with transparent indium-zinc-oxide (IZO) electrodes on a flexible substrate. The device transmittance was found to be higher than 80% in the visible region (400-800 nm). Bended states (radius = 10 mm) of the device also did not affect the memory performance because of the flexibility of the two transparent IZO electrodes and the thin Al2O3 layer. The conduction mechanism of the resistive switching of our device was explained by ohmic conduction and a Poole-Frenkel emission model. The conduction mechanism was proved by oxygen vacancies in the Al2O3 layer, as analyzed by x-ray photoelectron spectroscopy analysis. These results encourage the application of ReRAM in flexible and transparent electronic devices.

Vortex-Core Reversal Dynamics: Towards Vortex Random Access Memory

NASA Astrophysics Data System (ADS)

Kim, Sang-Koog

2011-03-01

An energy-efficient, ultrahigh-density, ultrafast, and nonvolatile solid-state universal memory is a long-held dream in the field of information-storage technology. The magnetic random access memory (MRAM) along with a spin-transfer-torque switching mechanism is a strong candidate-means of realizing that dream, given its nonvolatility, infinite endurance, and fast random access. Magnetic vortices in patterned soft magnetic dots promise ground-breaking applications in information-storage devices, owing to the very stable twofold ground states of either their upward or downward core magnetization orientation and plausible core switching by in-plane alternating magnetic fields or spin-polarized currents. However, two technologically most important but very challenging issues --- low-power recording and reliable selection of each memory cell with already existing cross-point architectures --- have not yet been resolved for the basic operations in information storage, that is, writing (recording) and readout. Here, we experimentally demonstrate a magnetic vortex random access memory (VRAM) in the basic cross-point architecture. This unique VRAM offers reliable cell selection and low-power-consumption control of switching of out-of-plane core magnetizations using specially designed rotating magnetic fields generated by two orthogonal and unipolar Gaussian-pulse currents along with optimized pulse width and time delay. Our achievement of a new device based on a new material, that is, a medium composed of patterned vortex-state disks, together with the new physics on ultrafast vortex-core switching dynamics, can stimulate further fruitful research on MRAMs that are based on vortex-state dot arrays.

Digital analyzer for point processes based on first-in-first-out memories

NASA Astrophysics Data System (ADS)

Basano, Lorenzo; Ottonello, Pasquale; Schiavi, Enore

1992-06-01

We present an entirely new version of a multipurpose instrument designed for the statistical analysis of point processes, especially those characterized by high bunching. A long sequence of pulses can be recorded in the RAM bank of a personal computer via a suitably designed front end which employs a pair of first-in-first-out (FIFO) memories; these allow one to build an analyzer that, besides being simpler from the electronic point of view, is capable of sustaining much higher intensity fluctuations of the point process. The overflow risk of the device is evaluated by treating the FIFO pair as a queueing system. The apparatus was tested using both a deterministic signal and a sequence of photoelectrons obtained from laser light scattered by random surfaces.

Spin-transfer torque magnetoresistive random-access memory technologies for normally off computing (invited)

NASA Astrophysics Data System (ADS)

Ando, K.; Fujita, S.; Ito, J.; Yuasa, S.; Suzuki, Y.; Nakatani, Y.; Miyazaki, T.; Yoda, H.

2014-05-01

Most parts of present computer systems are made of volatile devices, and the power to supply them to avoid information loss causes huge energy losses. We can eliminate this meaningless energy loss by utilizing the non-volatile function of advanced spin-transfer torque magnetoresistive random-access memory (STT-MRAM) technology and create a new type of computer, i.e., normally off computers. Critical tasks to achieve normally off computers are implementations of STT-MRAM technologies in the main memory and low-level cache memories. STT-MRAM technology for applications to the main memory has been successfully developed by using perpendicular STT-MRAMs, and faster STT-MRAM technologies for applications to the cache memory are now being developed. The present status of STT-MRAMs and challenges that remain for normally off computers are discussed.

Boosting the FM-Index on the GPU: Effective Techniques to Mitigate Random Memory Access.

PubMed

Chacón, Alejandro; Marco-Sola, Santiago; Espinosa, Antonio; Ribeca, Paolo; Moure, Juan Carlos

2015-01-01

The recent advent of high-throughput sequencing machines producing big amounts of short reads has boosted the interest in efficient string searching techniques. As of today, many mainstream sequence alignment software tools rely on a special data structure, called the FM-index, which allows for fast exact searches in large genomic references. However, such searches translate into a pseudo-random memory access pattern, thus making memory access the limiting factor of all computation-efficient implementations, both on CPUs and GPUs. Here, we show that several strategies can be put in place to remove the memory bottleneck on the GPU: more compact indexes can be implemented by having more threads work cooperatively on larger memory blocks, and a k-step FM-index can be used to further reduce the number of memory accesses. The combination of those and other optimisations yields an implementation that is able to process about two Gbases of queries per second on our test platform, being about 8 × faster than a comparable multi-core CPU version, and about 3 × to 5 × faster than the FM-index implementation on the GPU provided by the recently announced Nvidia NVBIO bioinformatics library.

Tuning resistance states by thickness control in an electroforming-free nanometallic complementary resistance random access memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yang, Xiang; Lu, Yang; Lee, Jongho

2016-01-04

Tuning low resistance state is crucial for resistance random access memory (RRAM) that aims to achieve optimal read margin and design flexibility. By back-to-back stacking two nanometallic bipolar RRAMs with different thickness into a complementary structure, we have found that its low resistance can be reliably tuned over several orders of magnitude. Such high tunability originates from the exponential thickness dependence of the high resistance state of nanometallic RRAM, in which electron wave localization in a random network gives rise to the unique scaling behavior. The complementary nanometallic RRAM provides electroforming-free, multi-resistance-state, sub-100 ns switching capability with advantageous characteristics formore » memory arrays.« less

Application of phase-change materials in memory taxonomy

PubMed Central

Wang, Lei; Tu, Liang; Wen, Jing

2017-01-01

Abstract Phase-change materials are suitable for data storage because they exhibit reversible transitions between crystalline and amorphous states that have distinguishable electrical and optical properties. Consequently, these materials find applications in diverse memory devices ranging from conventional optical discs to emerging nanophotonic devices. Current research efforts are mostly devoted to phase-change random access memory, whereas the applications of phase-change materials in other types of memory devices are rarely reported. Here we review the physical principles of phase-change materials and devices aiming to help researchers understand the concept of phase-change memory. We classify phase-change memory devices into phase-change optical disc, phase-change scanning probe memory, phase-change random access memory, and phase-change nanophotonic device, according to their locations in memory hierarchy. For each device type we discuss the physical principles in conjunction with merits and weakness for data storage applications. We also outline state-of-the-art technologies and future prospects. PMID:28740557

Electrical Evaluation of RCA MWS5001D Random Access Memory, Volume 5, Appendix D

NASA Technical Reports Server (NTRS)

Klute, A.

1979-01-01

The electrical characterization and qualification test results are presented for the RCA MWS 5001D random access memory. The tests included functional tests, AC and DC parametric tests, AC parametric worst-case pattern selection test, determination of worst-case transition for setup and hold times, and a series of schmoo plots. Average input high current, worst case input high current, output low current, and data setup time are some of the results presented.

Electrical Evaluation of RCA MWS5001D Random Access Memory, Volume 4, Appendix C

NASA Technical Reports Server (NTRS)

Klute, A.

1979-01-01

The electrical characterization and qualification test results are presented for the RCA MWS5001D random access memory. The tests included functional tests, AC and DC parametric tests, AC parametric worst-case pattern selection test, determination of worst-case transition for setup and hold times, and a series of schmoo plots. Statistical analysis data is supplied along with write pulse width, read cycle time, write cycle time, and chip enable time data.

Fast Magnetoresistive Random-Access Memory

NASA Technical Reports Server (NTRS)

Wu, Jiin-Chuan; Stadler, Henry L.; Katti, Romney R.

1991-01-01

Magnetoresistive binary digital memories of proposed new type expected to feature high speed, nonvolatility, ability to withstand ionizing radiation, high density, and low power. In memory cell, magnetoresistive effect exploited more efficiently by use of ferromagnetic material to store datum and adjacent magnetoresistive material to sense datum for readout. Because relative change in sensed resistance between "zero" and "one" states greater, shorter sampling and readout access times achievable.

A Memory-Based Programmable Logic Device Using Look-Up Table Cascade with Synchronous Static Random Access Memories

NASA Astrophysics Data System (ADS)

Nakamura, Kazuyuki; Sasao, Tsutomu; Matsuura, Munehiro; Tanaka, Katsumasa; Yoshizumi, Kenichi; Nakahara, Hiroki; Iguchi, Yukihiro

2006-04-01

A large-scale memory-technology-based programmable logic device (PLD) using a look-up table (LUT) cascade is developed in the 0.35-μm standard complementary metal oxide semiconductor (CMOS) logic process. Eight 64 K-bit synchronous SRAMs are connected to form an LUT cascade with a few additional circuits. The features of the LUT cascade include: 1) a flexible cascade connection structure, 2) multi phase pseudo asynchronous operations with synchronous static random access memory (SRAM) cores, and 3) LUT-bypass redundancy. This chip operates at 33 MHz in 8-LUT cascades at 122 mW. Benchmark results show that it achieves a comparable performance to field programmable gate array (FPGAs).

Improved cache performance in Monte Carlo transport calculations using energy banding

NASA Astrophysics Data System (ADS)

Siegel, A.; Smith, K.; Felker, K.; Romano, P.; Forget, B.; Beckman, P.

2014-04-01

We present an energy banding algorithm for Monte Carlo (MC) neutral particle transport simulations which depend on large cross section lookup tables. In MC codes, read-only cross section data tables are accessed frequently, exhibit poor locality, and are typically too much large to fit in fast memory. Thus, performance is often limited by long latencies to RAM, or by off-node communication latencies when the data footprint is very large and must be decomposed on a distributed memory machine. The proposed energy banding algorithm allows maximal temporal reuse of data in band sizes that can flexibly accommodate different architectural features. The energy banding algorithm is general and has a number of benefits compared to the traditional approach. In the present analysis we explore its potential to achieve improvements in time-to-solution on modern cache-based architectures.

Cerebellar models of associative memory: Three papers from IEEE COMPCON spring 1989

NASA Technical Reports Server (NTRS)

Raugh, Michael R. (Editor)

1989-01-01

Three papers are presented on the following topics: (1) a cerebellar-model associative memory as a generalized random-access memory; (2) theories of the cerebellum - two early models of associative memory; and (3) intelligent network management and functional cerebellum synthesis.

A review of emerging non-volatile memory (NVM) technologies and applications

NASA Astrophysics Data System (ADS)

Chen, An

2016-11-01

This paper will review emerging non-volatile memory (NVM) technologies, with the focus on phase change memory (PCM), spin-transfer-torque random-access-memory (STTRAM), resistive random-access-memory (RRAM), and ferroelectric field-effect-transistor (FeFET) memory. These promising NVM devices are evaluated in terms of their advantages, challenges, and applications. Their performance is compared based on reported parameters of major industrial test chips. Memory selector devices and cell structures are discussed. Changing market trends toward low power (e.g., mobile, IoT) and data-centric applications create opportunities for emerging NVMs. High-performance and low-cost emerging NVMs may simplify memory hierarchy, introduce non-volatility in logic gates and circuits, reduce system power, and enable novel architectures. Storage-class memory (SCM) based on high-density NVMs could fill the performance and density gap between memory and storage. Some unique characteristics of emerging NVMs can be utilized for novel applications beyond the memory space, e.g., neuromorphic computing, hardware security, etc. In the beyond-CMOS era, emerging NVMs have the potential to fulfill more important functions and enable more efficient, intelligent, and secure computing systems.

Integrated, nonvolatile, high-speed analog random access memory

NASA Technical Reports Server (NTRS)

Katti, Romney R. (Inventor); Wu, Jiin-Chuan (Inventor); Stadler, Henry L. (Inventor)

1994-01-01

This invention provides an integrated, non-volatile, high-speed random access memory. A magnetically switchable ferromagnetic or ferrimagnetic layer is sandwiched between an electrical conductor which provides the ability to magnetize the magnetically switchable layer and a magneto resistive or Hall effect material which allows sensing the magnetic field which emanates from the magnetization of the magnetically switchable layer. By using this integrated three-layer form, the writing process, which is controlled by the conductor, is separated from the storage medium in the magnetic layer and from the readback process which is controlled by the magnetoresistive layer. A circuit for implementing the memory in CMOS or the like is disclosed.

Optical memory development. Volume 2: Gain-assisted holographic storage media

NASA Technical Reports Server (NTRS)

Gange, R. A.; Mezrich, R. S.

1972-01-01

Thin deformable films were investigated for use as the storage medium in a holographic optical memory. The research was directed toward solving the problems of material fatigue, selective heat addressing, electrical charging of the film surface and charge patterning by light. A number of solutions to these problems were found but the main conclusion to be drawn from the work is that deformable media which employ heat in the recording process are not satisfactory for use in a high-speed random-access read/write holographic memory. They are, however, a viable approach in applications where either high speed or random-access is not required.

Serial-data correlator/code translator

NASA Technical Reports Server (NTRS)

Morgan, L. E.

1977-01-01

System, consisting of sampling flip flop, memory (either RAM or ROM), and memory buffer, correlates sampled data with predetermined acceptance code patterns, translates acceptable code patterns to nonreturn-to-zero code, and identifies data dropouts.

A Novel Heterocyclic Compound CE-104 Enhances Spatial Working Memory in the Radial Arm Maze in Rats and Modulates the Dopaminergic System

PubMed Central

Aher, Yogesh D.; Subramaniyan, Saraswathi; Shanmugasundaram, Bharanidharan; Sase, Ajinkya; Saroja, Sivaprakasam R.; Holy, Marion; Höger, Harald; Beryozkina, Tetyana; Sitte, Harald H.; Leban, Johann J.; Lubec, Gert

2016-01-01

Various psychostimulants targeting monoamine neurotransmitter transporters (MATs) have been shown to rescue cognition in patients with neurological disorders and improve cognitive abilities in healthy subjects at low doses. Here, we examined the effects upon cognition of a chemically synthesized novel MAT inhibiting compound 2-(benzhydrylsulfinylmethyl)-4-methylthiazole (named as CE-104). The efficacy of CE-104 in blocking MAT [dopamine transporter (DAT), serotonin transporter (SERT), and norepinephrine transporter] was determined using in vitro neurotransmitter uptake assay. The effect of the drug at low doses (1 and 10 mg/kg) on spatial memory was studied in male rats in the radial arm maze (RAM). Furthermore, the dopamine receptor and transporter complex levels of frontal cortex (FC) tissue of trained and untrained animals treated either with the drug or vehicle were quantified on blue native PAGE (BN-PAGE). The drug inhibited dopamine (IC50: 27.88 μM) and norepinephrine uptake (IC50: 160.40 μM), but had a negligible effect on SERT. In the RAM, both drug-dose groups improved spatial working memory during the performance phase of RAM as compared to vehicle. BN-PAGE Western blot quantification of dopamine receptor and transporter complexes revealed that D1, D2, D3, and DAT complexes were modulated due to training and by drug effects. The drug’s ability to block DAT and its influence on DAT and receptor complex levels in the FC is proposed as a possible mechanism for the observed learning and memory enhancement in the RAM. PMID:26941626

Non-volatile main memory management methods based on a file system.

PubMed

Oikawa, Shuichi

2014-01-01

There are upcoming non-volatile (NV) memory technologies that provide byte addressability and high performance. PCM, MRAM, and STT-RAM are such examples. Such NV memory can be used as storage because of its data persistency without power supply while it can be used as main memory because of its high performance that matches up with DRAM. There are a number of researches that investigated its uses for main memory and storage. They were, however, conducted independently. This paper presents the methods that enables the integration of the main memory and file system management for NV memory. Such integration makes NV memory simultaneously utilized as both main memory and storage. The presented methods use a file system as their basis for the NV memory management. We implemented the proposed methods in the Linux kernel, and performed the evaluation on the QEMU system emulator. The evaluation results show that 1) the proposed methods can perform comparably to the existing DRAM memory allocator and significantly better than the page swapping, 2) their performance is affected by the internal data structures of a file system, and 3) the data structures appropriate for traditional hard disk drives do not always work effectively for byte addressable NV memory. We also performed the evaluation of the effects caused by the longer access latency of NV memory by cycle-accurate full-system simulation. The results show that the effect on page allocation cost is limited if the increase of latency is moderate.

Additional Electrochemical Treatment Effects on the Switching Characteristics of Anodic Porous Alumina Resistive Switching Memory

NASA Astrophysics Data System (ADS)

Otsuka, Shintaro; Takeda, Ryouta; Furuya, Saeko; Shimizu, Tomohiro; Shingubara, Shouso; Iwata, Nobuyuki; Watanabe, Tadataka; Takano, Yoshiki; Takase, Kouichi

2012-06-01

We have investigated the current-voltage characteristics of a resistive switching memory (ReRAM), especially the reproducibility of the switching voltage between an insulating state and a metallic state. The poor reproducibility hinders the practical use of this memory. According to a filament model, the variation of the switching voltage may be understood in terms of the random choice of filaments with different conductivities and lengths at each switching. A limitation of the number of conductive paths is expected to lead to the suppression of the variation of switching voltage. In this study, two strategies for the limitation have been proposed using an anodic porous alumina (APA). The first is the reduction of the number of conductive paths by restriction of the contact area between the top electrodes and the insulator. The second is the lowering of the resistivity of the insulator, which makes it possible to grow filaments with the same characteristics by electrochemical treatments using a pulse-electroplating technique.

Root Architecture Diversity and Meristem Dynamics in Different Populations of Arabidopsis thaliana

PubMed Central

Aceves-García, Pamela; Álvarez-Buylla, Elena R.; Garay-Arroyo, Adriana; García-Ponce, Berenice; Muñoz, Rodrigo; Sánchez, María de la Paz

2016-01-01

Arabidopsis thaliana has been an excellent model system for molecular genetic approaches to development and physiology. More recently, the potential of studying various accessions collected from diverse habitats has been started to exploit. Col-0 has been the best-studied accession but we now know that several traits show significant divergences among them. In this work, we focused in the root that has become a key system for development. We studied root architecture and growth dynamics of 12 Arabidopsis accessions. Our data reveal a wide variability in root architecture and root length among accessions. We also found variability in the root apical meristem (RAM), explained mainly by cell size at the RAM transition domain and possibly by peculiar forms of organization at the stem cell niche in some accessions. Contrary to Col-0 reports, in some accessions the RAM size not always explains the variations in the root length; indicating that elongated cell size could be more relevant in the determination of root length than the RAM size itself. This study contributes to investigations dealing with understanding the molecular and cellular basis of phenotypic variation, the role of plasticity on adaptation, and the developmental mechanisms that may restrict phenotypic variation in response to contrasting environmental conditions. PMID:27379140

Root Architecture Diversity and Meristem Dynamics in Different Populations of Arabidopsis thaliana.

PubMed

Aceves-García, Pamela; Álvarez-Buylla, Elena R; Garay-Arroyo, Adriana; García-Ponce, Berenice; Muñoz, Rodrigo; Sánchez, María de la Paz

2016-01-01

Arabidopsis thaliana has been an excellent model system for molecular genetic approaches to development and physiology. More recently, the potential of studying various accessions collected from diverse habitats has been started to exploit. Col-0 has been the best-studied accession but we now know that several traits show significant divergences among them. In this work, we focused in the root that has become a key system for development. We studied root architecture and growth dynamics of 12 Arabidopsis accessions. Our data reveal a wide variability in root architecture and root length among accessions. We also found variability in the root apical meristem (RAM), explained mainly by cell size at the RAM transition domain and possibly by peculiar forms of organization at the stem cell niche in some accessions. Contrary to Col-0 reports, in some accessions the RAM size not always explains the variations in the root length; indicating that elongated cell size could be more relevant in the determination of root length than the RAM size itself. This study contributes to investigations dealing with understanding the molecular and cellular basis of phenotypic variation, the role of plasticity on adaptation, and the developmental mechanisms that may restrict phenotypic variation in response to contrasting environmental conditions.

A C-Te-based binary OTS device exhibiting excellent performance and high thermal stability for selector application.

PubMed

Chekol, Solomon Amsalu; Yoo, Jongmyung; Park, Jaehyuk; Song, Jeonghwan; Sung, Changhyuck; Hwang, Hyunsang

2018-08-24

In this letter, we demonstrate a new binary ovonic threshold switching (OTS) selector device scalable down to ø30 nm based on C-Te. Our proposed selector device exhibits outstanding performance such as a high switching ratio (I on /I off  > 10 5 ), an extremely low off-current (∼1 nA), an extremely fast operating speed of <10 ns (transition time of <2 ns and delay time of <8 ns), high endurance (10 9 ), and high thermal stability (>450 °C). The observed high thermal stability is caused by the relatively small atomic size of C, compared to Te, which can effectively suppress the segregation and crystallization of Te in the OTS film. Furthermore, to confirm the functionality of the selector in a crossbar array, we evaluated a 1S-1R device by integrating our OTS device with a ReRAM (resistive random access memory) device. The 1S-1R integrated device exhibits a successful suppression of leakage current at the half-selected cell and shows an excellent read-out margin (>2 12 word lines) in a fast read operation.

Constructing linkage maps in the genomics era with MapDisto 2.0.

PubMed

Heffelfinger, Christopher; Fragoso, Christopher A; Lorieux, Mathias

2017-07-15

Genotyping by sequencing (GBS) generates datasets that are challenging to handle by current genetic mapping software with graphical interface. Geneticists need new user-friendly computer programs that can analyze GBS data on desktop computers. This requires improvements in computation efficiency, both in terms of speed and use of random-access memory (RAM). MapDisto v.2.0 is a user-friendly computer program for construction of genetic linkage maps. It includes several new major features: (i) handling of very large genotyping datasets like the ones generated by GBS; (ii) direct importation and conversion of Variant Call Format (VCF) files; (iii) detection of linkage, i.e. construction of linkage groups in case of segregation distortion; (iv) data imputation on VCF files using a new approach, called LB-Impute. Features i to iv operate through inclusion of new Java modules that are used transparently by MapDisto; (v) QTL detection via a new R/qtl graphical interface. The program is available free of charge at mapdisto.free.fr. mapdisto@gmail.com. Supplementary data are available at Bioinformatics online. © The Author (2017). Published by Oxford University Press. All rights reserved. For Permissions, please email: journals.permissions@oup.com

Research in the design of high-performance reconfigurable systems

NASA Technical Reports Server (NTRS)

Slotnick, D. L.; Mcewan, S. D.; Spry, A. J.

1984-01-01

An initial design for the Bit Processor (BP) referred to in prior reports as the Processing Element or PE has been completed. Eight BP's, together with their supporting random-access memory, a 64 k x 9 ROM to perform addition, routing logic, and some additional logic, constitute the components of a single stage. An initial stage design is given. Stages may be combined to perform high-speed fixed or floating point arithmetic. Stages can be configured into a range of arithmetic modules that includes bit-serial one or two-dimensional arrays; one or two dimensional arrays fixed or floating point processors; and specialized uniprocessors, such as long-word arithmetic units. One to eight BP's represent a likely initial chip level. The Stage would then correspond to a first-level pluggable module. As both this project and VLSI CAD/CAM progress, however, it is expected that the chip level would migrate upward to the stage and, perhaps, ultimately the box level. The BP RAM, consisting of two banks, holds only operands and indices. Programs are at the box (high-level function) and system level. At the system level initial effort has been concentrated on specifying the tools needed to evaluate design alternatives.

Early detection of epilepsy seizures based on a weightless neural network.

PubMed

de Aguiar, Kleber; Franca, Felipe M G; Barbosa, Valmir C; Teixeira, Cesar A D

2015-08-01

This work introduces a new methodology for the early detection of epileptic seizure based on the WiSARD weightless neural network model and a new approach in terms of preprocessing the electroencephalogram (EEG) data. WiSARD has, among other advantages, the capacity of perform the training phase in a very fast way. This speed in training is due to the fact that WiSARD's neurons work like Random Access Memories (RAM) addressed by input patterns. Promising results were obtained in the anticipation of seizure onsets in four representative patients from the European Database on Epilepsy (EPILEPSIAE). The proposed seizure early detection WNN architecture was explored by varying the detection anticipation (δ) in the 2 to 30 seconds interval, and by adopting 2 and 3 seconds as the width of the Sliding Observation Window (SOW) input. While in the most challenging patient (A) one obtained accuracies from 99.57% (δ=2s; SOW=3s) to 72.56% (δ=30s; SOW=2s), patient D seizures could be detected in the 99.77% (δ=2s; SOW=2s) to 99.93% (δ=30s; SOW=3s) accuracy interval.

Nanoscale CuO solid-electrolyte-based conductive-bridging, random-access memory cell with a TiN liner

NASA Astrophysics Data System (ADS)

Lee, Jong-Sun; Kim, Dong-Won; Kim, Hea-Jee; Jin, Soo-Min; Song, Myung-Jin; Kwon, Ki-Hyun; Park, Jea-Gun; Jalalah, Mohammed; Al-Hajry, Ali

2018-01-01

The Conductive-bridge random-access memory (CBRAM) cell is a promising candidate for a terabit-level non-volatile memory due to its remarkable advantages. We present for the first time TiN as a diffusion barrier in CBRAM cells for enhancing their reliability. CuO solid-electrolyte-based CBRAM cells implemented with a 0.1-nm TiN liner demonstrated better non-volatile memory characteristics such as 106 AC write/erase endurance cycles with 100-μs AC pulse width and a long retention time of 7.4-years at 85 °C. In addition, the analysis of Ag diffusion in the CBRAM cell suggests that the morphology of the Ag filaments in the electrolyte can be effectively controlled by tuning the thickness of the TiN liner. These promising results pave the way for faster commercialization of terabit-level non-volatile memories.

On Using the Volatile Mem-Capacitive Effect of TiO2 Resistive Random Access Memory to Mimic the Synaptic Forgetting Process

NASA Astrophysics Data System (ADS)

Sarkar, Biplab; Mills, Steven; Lee, Bongmook; Pitts, W. Shepherd; Misra, Veena; Franzon, Paul D.

2018-02-01

In this work, we report on mimicking the synaptic forgetting process using the volatile mem-capacitive effect of a resistive random access memory (RRAM). TiO2 dielectric, which is known to show volatile memory operations due to migration of inherent oxygen vacancies, was used to achieve the volatile mem-capacitive effect. By placing the volatile RRAM candidate along with SiO2 at the gate of a MOS capacitor, a volatile capacitance change resembling the forgetting nature of a human brain is demonstrated. Furthermore, the memory operation in the MOS capacitor does not require a current flow through the gate dielectric indicating the feasibility of obtaining low power memory operations. Thus, the mem-capacitive effect of volatile RRAM candidates can be attractive to the future neuromorphic systems for implementing the forgetting process of a human brain.

Application of holographic optical techniques to bulk memory.

NASA Technical Reports Server (NTRS)

Anderson, L. K.

1971-01-01

Current efforts to exploit the spatial redundancy and built-in imaging of holographic optical techniques to provide high information densities without critical alignment and tight mechanical tolerances are reviewed. Read-write-erase in situ operation is possible but is presently impractical because of limitations in available recording media. As these are overcome, it should prove feasible to build holographic bulk memories with mechanically replaceable hologram plates featuring very fast (less than 2 microsec) random access to large (greater than 100 million bit) data blocks and very high throughput (greater than 500 Mbit/sec). Using volume holographic storage it may eventually be possible to realize random-access mass memories which require no mechanical motion and yet provide very high capacity.

Computer hardware for radiologists: Part 2.

PubMed

Indrajit, Ik; Alam, A

2010-11-01

Computers are an integral part of modern radiology equipment. In the first half of this two-part article, we dwelt upon some fundamental concepts regarding computer hardware, covering components like motherboard, central processing unit (CPU), chipset, random access memory (RAM), and memory modules. In this article, we describe the remaining computer hardware components that are of relevance to radiology. "Storage drive" is a term describing a "memory" hardware used to store data for later retrieval. Commonly used storage drives are hard drives, floppy drives, optical drives, flash drives, and network drives. The capacity of a hard drive is dependent on many factors, including the number of disk sides, number of tracks per side, number of sectors on each track, and the amount of data that can be stored in each sector. "Drive interfaces" connect hard drives and optical drives to a computer. The connections of such drives require both a power cable and a data cable. The four most popular "input/output devices" used commonly with computers are the printer, monitor, mouse, and keyboard. The "bus" is a built-in electronic signal pathway in the motherboard to permit efficient and uninterrupted data transfer. A motherboard can have several buses, including the system bus, the PCI express bus, the PCI bus, the AGP bus, and the (outdated) ISA bus. "Ports" are the location at which external devices are connected to a computer motherboard. All commonly used peripheral devices, such as printers, scanners, and portable drives, need ports. A working knowledge of computers is necessary for the radiologist if the workflow is to realize its full potential and, besides, this knowledge will prepare the radiologist for the coming innovations in the 'ever increasing' digital future.

PCI bus content-addressable-memory (CAM) implementation on FPGA for pattern recognition/image retrieval in a distributed environment

NASA Astrophysics Data System (ADS)

Megherbi, Dalila B.; Yan, Yin; Tanmay, Parikh; Khoury, Jed; Woods, C. L.

2004-11-01

Recently surveillance and Automatic Target Recognition (ATR) applications are increasing as the cost of computing power needed to process the massive amount of information continues to fall. This computing power has been made possible partly by the latest advances in FPGAs and SOPCs. In particular, to design and implement state-of-the-Art electro-optical imaging systems to provide advanced surveillance capabilities, there is a need to integrate several technologies (e.g. telescope, precise optics, cameras, image/compute vision algorithms, which can be geographically distributed or sharing distributed resources) into a programmable system and DSP systems. Additionally, pattern recognition techniques and fast information retrieval, are often important components of intelligent systems. The aim of this work is using embedded FPGA as a fast, configurable and synthesizable search engine in fast image pattern recognition/retrieval in a distributed hardware/software co-design environment. In particular, we propose and show a low cost Content Addressable Memory (CAM)-based distributed embedded FPGA hardware architecture solution with real time recognition capabilities and computing for pattern look-up, pattern recognition, and image retrieval. We show how the distributed CAM-based architecture offers a performance advantage of an order-of-magnitude over RAM-based architecture (Random Access Memory) search for implementing high speed pattern recognition for image retrieval. The methods of designing, implementing, and analyzing the proposed CAM based embedded architecture are described here. Other SOPC solutions/design issues are covered. Finally, experimental results, hardware verification, and performance evaluations using both the Xilinx Virtex-II and the Altera Apex20k are provided to show the potential and power of the proposed method for low cost reconfigurable fast image pattern recognition/retrieval at the hardware/software co-design level.

Low power consumption resistance random access memory with Pt/InOx/TiN structure

NASA Astrophysics Data System (ADS)

Yang, Jyun-Bao; Chang, Ting-Chang; Huang, Jheng-Jie; Chen, Yu-Ting; Tseng, Hsueh-Chih; Chu, Ann-Kuo; Sze, Simon M.; Tsai, Ming-Jinn

2013-09-01

In this study, the resistance switching characteristics of a resistive random access memory device with Pt/InOx/TiN structure is investigated. Unstable bipolar switching behavior is observed during the initial switching cycle, which then stabilizes after several switching cycles. Analyses indicate that the current conduction mechanism in the resistance state is dominated by Ohmic conduction. The decrease in electrical conductance can be attributed to the reduction of the cross-sectional area of the conduction path. Furthermore, the device exhibits low operation voltage and power consumption.

Lowering data retention voltage in static random access memory array by post fabrication self-improvement of cell stability by multiple stress application

NASA Astrophysics Data System (ADS)

Mizutani, Tomoko; Takeuchi, Kiyoshi; Saraya, Takuya; Kobayashi, Masaharu; Hiramoto, Toshiro

2018-04-01

We propose a new version of the post fabrication static random access memory (SRAM) self-improvement technique, which utilizes multiple stress application. It is demonstrated that, using a device matrix array (DMA) test element group (TEG) with intrinsic channel fully depleted (FD) silicon-on-thin-buried-oxide (SOTB) six-transistor (6T) SRAM cells fabricated by the 65 nm technology, the lowering of data retention voltage (DRV) is more effectively achieved than using the previously proposed single stress technique.

NRAM: a disruptive carbon-nanotube resistance-change memory.

PubMed

Gilmer, D C; Rueckes, T; Cleveland, L

2018-04-03

Advanced memory technology based on carbon nanotubes (CNTs) (NRAM) possesses desired properties for implementation in a host of integrated systems due to demonstrated advantages of its operation including high speed (nanotubes can switch state in picoseconds), high endurance (over a trillion), and low power (with essential zero standby power). The applicable integrated systems for NRAM have markets that will see compound annual growth rates (CAGR) of over 62% between 2018 and 2023, with an embedded systems CAGR of 115% in 2018-2023 (http://bccresearch.com/pressroom/smc/bcc-research-predicts:-nram-(finally)-to-revolutionize-computer-memory). These opportunities are helping drive the realization of a shift from silicon-based to carbon-based (NRAM) memories. NRAM is a memory cell made up of an interlocking matrix of CNTs, either touching or slightly separated, leading to low or higher resistance states respectively. The small movement of atoms, as opposed to moving electrons for traditional silicon-based memories, renders NRAM with a more robust endurance and high temperature retention/operation which, along with high speed/low power, is expected to blossom in this memory technology to be a disruptive replacement for the current status quo of DRAM (dynamic RAM), SRAM (static RAM), and NAND flash memories.

NRAM: a disruptive carbon-nanotube resistance-change memory

NASA Astrophysics Data System (ADS)

Gilmer, D. C.; Rueckes, T.; Cleveland, L.

2018-04-01

Advanced memory technology based on carbon nanotubes (CNTs) (NRAM) possesses desired properties for implementation in a host of integrated systems due to demonstrated advantages of its operation including high speed (nanotubes can switch state in picoseconds), high endurance (over a trillion), and low power (with essential zero standby power). The applicable integrated systems for NRAM have markets that will see compound annual growth rates (CAGR) of over 62% between 2018 and 2023, with an embedded systems CAGR of 115% in 2018-2023 (http://bccresearch.com/pressroom/smc/bcc-research-predicts:-nram-(finally)-to-revolutionize-computer-memory). These opportunities are helping drive the realization of a shift from silicon-based to carbon-based (NRAM) memories. NRAM is a memory cell made up of an interlocking matrix of CNTs, either touching or slightly separated, leading to low or higher resistance states respectively. The small movement of atoms, as opposed to moving electrons for traditional silicon-based memories, renders NRAM with a more robust endurance and high temperature retention/operation which, along with high speed/low power, is expected to blossom in this memory technology to be a disruptive replacement for the current status quo of DRAM (dynamic RAM), SRAM (static RAM), and NAND flash memories.

Atomistic mechanisms of ReRAM cell operation and reliability

NASA Astrophysics Data System (ADS)

Pandey, Sumeet C.

2018-01-01

We present results from first-principles-based modeling that captures functionally important physical phenomena critical to cell materials selection, operation, and reliability for resistance-switching memory technologies. An atomic-scale description of retention, the low- and high-resistance states (RS), and the sources of intrinsic cell-level variability in ReRAM is discussed. Through the results obtained from density functional theory, non-equilibrium Green’s function, molecular dynamics, and kinetic Monte Carlo simulations; the role of variable-charge vacancy defects and metal impurities in determining the RS, the LRS-stability, and electron-conduction in such RS is reported. Although, the statistical electrical characteristics of the oxygen-vacancy (Ox-ReRAM) and conductive-bridging RAM (M-ReRAM) are notably different, the underlying similar electrochemical phenomena describing retention and formation/dissolution of RS are being discussed.

A study of the switching mechanism and electrode material of fully CMOS compatible tungsten oxide ReRAM

NASA Astrophysics Data System (ADS)

Chien, W. C.; Chen, Y. C.; Lai, E. K.; Lee, F. M.; Lin, Y. Y.; Chuang, Alfred T. H.; Chang, K. P.; Yao, Y. D.; Chou, T. H.; Lin, H. M.; Lee, M. H.; Shih, Y. H.; Hsieh, K. Y.; Lu, Chih-Yuan

2011-03-01

Tungsten oxide (WO X ) resistive memory (ReRAM), a two-terminal CMOS compatible nonvolatile memory, has shown promise to surpass the existing flash memory in terms of scalability, switching speed, and potential for 3D stacking. The memory layer, WO X , can be easily fabricated by down-stream plasma oxidation (DSPO) or rapid thermal oxidation (RTO) of W plugs universally used in CMOS circuits. Results of conductive AFM (C-AFM) experiment suggest the switching mechanism is dominated by the REDOX (Reduction-oxidation) reaction—the creation of conducting filaments leads to a low resistance state and the rupturing of the filaments results in a high resistance state. Our experimental results show that the reactions happen at the TE/WO X interface. With this understanding in mind, we proposed two approaches to boost the memory performance: (i) using DSPO to treat the RTO WO X surface and (ii) using Pt TE, which forms a Schottky barrier with WO X . Both approaches, especially the latter, significantly reduce the forming current and enlarge the memory window.

The future of memory

NASA Astrophysics Data System (ADS)

Marinella, M.

In the not too distant future, the traditional memory and storage hierarchy of may be replaced by a single Storage Class Memory (SCM) device integrated on or near the logic processor. Traditional magnetic hard drives, NAND flash, DRAM, and higher level caches (L2 and up) will be replaced with a single high performance memory device. The Storage Class Memory paradigm will require high speed (< 100 ns read/write), excellent endurance (> 1012), nonvolatility (retention > 10 years), and low switching energies (< 10 pJ per switch). The International Technology Roadmap for Semiconductors (ITRS) has recently evaluated several potential candidates SCM technologies, including Resistive (or Redox) RAM, Spin Torque Transfer RAM (STT-MRAM), and phase change memory (PCM). All of these devices show potential well beyond that of current flash technologies and research efforts are underway to improve the endurance, write speeds, and scalabilities to be on-par with DRAM. This progress has interesting implications for space electronics: each of these emerging device technologies show excellent resistance to the types of radiation typically found in space applications. Commercially developed, high density storage class memory-based systems may include a memory that is physically radiation hard, and suitable for space applications without major shielding efforts. This paper reviews the Storage Class Memory concept, emerging memory devices, and possible applicability to radiation hardened electronics for space.

Power reduction by power gating in differential pair type spin-transfer-torque magnetic random access memories for low-power nonvolatile cache memories

NASA Astrophysics Data System (ADS)

Ohsawa, Takashi; Ikeda, Shoji; Hanyu, Takahiro; Ohno, Hideo; Endoh, Tetsuo

2014-01-01

Array operation currents in spin-transfer-torque magnetic random access memories (STT-MRAMs) that use four differential pair type magnetic tunnel junction (MTJ)-based memory cells (4T2MTJ, two 6T2MTJs and 8T2MTJ) are simulated and compared with that in SRAM. With L3 cache applications in mind, it is assumed that the memories are composed of 32 Mbyte capacity to be accessed in 64 byte in parallel. All the STT-MRAMs except for the 8T2MTJ one are designed with 32 bit fine-grained power gating scheme applied to eliminate static currents in the memory cells that are not accessed. The 8T2MTJ STT-MRAM, the cell’s design concept being not suitable for the fine-grained power gating, loads and saves 32 Mbyte data in 64 Mbyte unit per 1 Mbit sub-array in 2 × 103 cycles. It is shown that the array operation current of the 4T2MTJ STT-MRAM is 70 mA averaged in 15 ns write cycles at Vdd = 0.9 V. This is the smallest among the STT-MRAMs, about the half of the low standby power (LSTP) SRAM whose array operation current is totally dominated by the cells’ subthreshold leakage.

SQL-RAMS

NASA Technical Reports Server (NTRS)

Alfaro, Victor O.; Casey, Nancy J.

2005-01-01

SQL-RAMS (where "SQL" signifies Structured Query Language and "RAMS" signifies Rocketdyne Automated Management System) is a successor to the legacy version of RAMS -- a computer program used to manage all work, nonconformance, corrective action, and configuration management on rocket engines and ground support equipment at Stennis Space Center. The legacy version resided in the File-Maker Pro software system and was constructed in modules that could act as standalone programs. There was little or no integration among modules. Because of limitations on file-management capabilities in FileMaker Pro, and because of difficulty of integration of FileMaker Pro with other software systems for exchange of data using such industry standards as SQL, the legacy version of RAMS proved to be limited, and working to circumvent its limitations too time-consuming. In contrast, SQL-RAMS is an integrated SQL-server-based program that supports all data-exchange software industry standards. Whereas in the legacy version, it was necessary to access individual modules to gain insight into a particular workstatus document, SQL-RAMS provides access through a single-screen presentation of core modules. In addition, SQL-RAMS enables rapid and efficient filtering of displayed statuses by predefined categories and test numbers. SQL-RAMS is rich in functionality and encompasses significant improvements over the legacy system. It provides users the ability to perform many tasks, which in the past required administrator intervention. Additionally, many of the design limitations have been corrected, allowing for a robust application that is user centric.

SQL-RAMS

NASA Technical Reports Server (NTRS)

Alfaro, Victor O.; Casey, Nancy J.

2005-01-01

SQL-RAMS (where "SQL" signifies Structured Query Language and "RAMS" signifies Rocketdyne Automated Management System) is a successor to the legacy version of RAMS a computer program used to manage all work, nonconformance, corrective action, and configuration management on rocket engines and ground support equipment at Stennis Space Center. The legacy version resided in the FileMaker Pro software system and was constructed in modules that could act as stand-alone programs. There was little or no integration among modules. Because of limitations on file-management capabilities in FileMaker Pro, and because of difficulty of integration of FileMaker Pro with other software systems for exchange of data using such industry standards as SQL, the legacy version of RAMS proved to be limited, and working to circumvent its limitations too time-consuming. In contrast, SQL-RAMS is an integrated SQL-server-based program that supports all data-exchange software industry standards. Whereas in the legacy version, it was necessary to access individual modules to gain insight to a particular work-status documents, SQL-RAMS provides access through a single-screen presentation of core modules. In addition, SQL-RAMS enable rapid and efficient filtering of displayed statuses by predefined categories and test numbers. SQL-RAMS is rich in functionality and encompasses significant improvements over the legacy system. It provides users the ability to perform many tasks which in the past required administrator intervention. Additionally many of the design limitations have been corrected allowing for a robust application that is user centric.

Critical role of a double-layer configuration in solution-based unipolar resistive switching memories.

PubMed

Carlos, Emanuel; Kiazadeh, Asal; Deuermeier, Jonas; Branquinho, Rita; Martins, Rodrigo; Fortunato, Elvira

2018-08-24

Lately, resistive switching memories (ReRAM) have been attracting a lot of attention due to their possibilities of fast operation, lower power consumption and simple fabrication process and they can also be scaled to very small dimensions. However, most of these ReRAM are produced by physical methods and nowadays the industry demands more simplicity, typically associated with low cost manufacturing. As such, ReRAMs in this work are developed from a solution-based aluminum oxide (Al 2 O 3 ) using a simple combustion synthesis process. The device performance is optimized by two-stage deposition of the Al 2 O 3 film. The resistive switching properties of the bilayer devices are reproducible with a yield of 100%. The ReRAM devices show unipolar resistive switching behavior with good endurance and retention time up to 10 5 s at 85 °C. The devices can be programmed in a multi-level cell operation mode by application of different reset voltages. Temperature analysis of various resistance states reveals a filamentary nature based on the oxygen vacancies. The optimized film was stacked between ITO and indium zinc oxide, targeting a fully transparent device for applications on transparent system-on-panel technology.

Recurrent 3-day cycles of water deprivation for over a month depress mating behaviour but not semen characteristics of adult rams.

PubMed

Khnissi, S; Lassoued, N; Rekik, M; Ben Salem, H

2016-02-01

This study aimed to investigate the effect of water deprivation (WD) on reproductive traits of rams. Ten mature rams were used and allocated to two groups balanced for body weight. Control (C) rams had free access to drinking water, while water-restricted rams (WD) were deprived from water for 3 consecutive days and early on the morning of day 4, they had ad libitum access to water for 24 h, similar to C animals. The experiment lasted 32 days, that is eight 4-day cycles of water deprivation and subsequent watering. Feed and water intake were significantly affected by water deprivation; in comparison with C rams, WD rams reduced their feed intake by 18%. During the watering day of the deprivation cycle, WD rams consumed more water than C rams on the same day (11.8 (SD = 3.37) and 8.4 (SD = 1.92) l respectively; p < 0.05). Glucose, total protein and creatinine were increased as a result of water deprivation. However, testosterone levels were lowered as a result of water deprivation and average values were 10.9 and 6.2 (SEM 1.23) ng/ml for C and WD rams respectively (p < 0.05). Semen traits were less affected by treatment; WD rams consistently had superior sperm concentrations than C animals; and statistical significances were reached in cycles 5 and 8 of water deprivation. Several mating behaviour traits were modified as a result of water deprivation. When compared to controls, WD rams had a more prolonged time to first mount attempt (p < 0.001), their frequency of mount attempts decreased [6.8 vs. 5.2 (SEM 0.1); p < 0.001] and their flehmen reaction intensity was negatively affected (p < 0.05). Water deprivation may have practical implications reducing the libido and therefore the serving capacity of rams under field conditions. Journal of Animal Physiology and Animal Nutrition © 2015 Blackwell Verlag GmbH.

Design of a memory-access controller with 3.71-times-enhanced energy efficiency for Internet-of-Things-oriented nonvolatile microcontroller unit

NASA Astrophysics Data System (ADS)

Natsui, Masanori; Hanyu, Takahiro

2018-04-01

In realizing a nonvolatile microcontroller unit (MCU) for sensor nodes in Internet-of-Things (IoT) applications, it is important to solve the data-transfer bottleneck between the central processing unit (CPU) and the nonvolatile memory constituting the MCU. As one circuit-oriented approach to solving this problem, we propose a memory access minimization technique for magnetoresistive-random-access-memory (MRAM)-embedded nonvolatile MCUs. In addition to multiplexing and prefetching of memory access, the proposed technique realizes efficient instruction fetch by eliminating redundant memory access while considering the code length of the instruction to be fetched and the transition of the memory address to be accessed. As a result, the performance of the MCU can be improved while relaxing the performance requirement for the embedded MRAM, and compact and low-power implementation can be performed as compared with the conventional cache-based one. Through the evaluation using a system consisting of a general purpose 32-bit CPU and embedded MRAM, it is demonstrated that the proposed technique increases the peak efficiency of the system up to 3.71 times, while a 2.29-fold area reduction is achieved compared with the cache-based one.

False Operation of Static Random Access Memory Cells under Alternating Current Power Supply Voltage Variation

NASA Astrophysics Data System (ADS)

Sawada, Takuya; Takata, Hidehiro; Nii, Koji; Nagata, Makoto

2013-04-01

Static random access memory (SRAM) cores exhibit susceptibility against power supply voltage variation. False operation is investigated among SRAM cells under sinusoidal voltage variation on power lines introduced by direct RF power injection. A standard SRAM core of 16 kbyte in a 90 nm 1.5 V technology is diagnosed with built-in self test and on-die noise monitor techniques. The sensitivity of bit error rate is shown to be high against the frequency of injected voltage variation, while it is not greatly influenced by the difference in frequency and phase against SRAM clocking. It is also observed that the distribution of false bits is substantially random in a cell array.

A random access memory immune to single event upset using a T-Resistor

DOEpatents

Ochoa, A. Jr.

1987-10-28

In a random access memory cell, a resistance ''T'' decoupling network in each leg of the cell reduces random errors caused by the interaction of energetic ions with the semiconductor material forming the cell. The cell comprises two parallel legs each containing a series pair of complementary MOS transistors having a common gate connected to the node between the transistors of the opposite leg. The decoupling network in each leg is formed by a series pair of resistors between the transistors together with a third resistor interconnecting the junction between the pair of resistors and the gate of the transistor pair forming the opposite leg of the cell. 4 figs.

Random access memory immune to single event upset using a T-resistor

DOEpatents

Ochoa, Jr., Agustin

1989-01-01

In a random access memory cell, a resistance "T" decoupling network in each leg of the cell reduces random errors caused by the interaction of energetic ions with the semiconductor material forming the cell. The cell comprises two parallel legs each containing a series pair of complementary MOS transistors having a common gate connected to the node between the transistors of the opposite leg. The decoupling network in each leg is formed by a series pair of resistors between the transistors together with a third resistor interconnecting the junction between the pair of resistors and the gate of the transistor pair forming the opposite leg of the cell.

Implementation of nitrogen-doped titanium-tungsten tunable heater in phase change random access memory and its effects on device performance

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tan, Chun Chia; Zhao, Rong, E-mail: zhao-rong@sutd.edu.sg; Chong, Tow Chong

2014-10-13

Nitrogen-doped titanium-tungsten (N-TiW) was proposed as a tunable heater in Phase Change Random Access Memory (PCRAM). By tuning N-TiW's material properties through doping, the heater can be tailored to optimize the access speed and programming current of PCRAM. Experiments reveal that N-TiW's resistivity increases and thermal conductivity decreases with increasing nitrogen-doping ratio, and N-TiW devices displayed (∼33% to ∼55%) reduced programming currents. However, there is a tradeoff between the current and speed for heater-based PCRAM. Analysis of devices with different N-TiW heaters shows that N-TiW doping levels could be optimized to enable low RESET currents and fast access speeds.

Twin-bit via resistive random access memory in 16 nm FinFET logic technologies

NASA Astrophysics Data System (ADS)

Shih, Yi-Hong; Hsu, Meng-Yin; King, Ya-Chin; Lin, Chrong Jung

2018-04-01

A via resistive random access memory (RRAM) cell fully compatible with the standard CMOS logic process has been successfully demonstrated for high-density logic nonvolatile memory (NVM) modules in advanced FinFET circuits. In this new cell, the transition metal layers are formed on both sides of a via, given two storage bits per via. In addition to its compact cell area (1T + 14 nm × 32 nm), the twin-bit via RRAM cell features a low operation voltage, a large read window, good data retention, and excellent cycling capability. As fine alignments between mask layers become possible, the twin-bit via RRAM cell is expected to be highly scalable in advanced FinFET technology.

Soft errors in commercial off-the-shelf static random access memories

NASA Astrophysics Data System (ADS)

Dilillo, L.; Tsiligiannis, G.; Gupta, V.; Bosser, A.; Saigne, F.; Wrobel, F.

2017-01-01

This article reviews state-of-the-art techniques for the evaluation of the effect of radiation on static random access memory (SRAM). We detailed irradiation test techniques and results from irradiation experiments with several types of particles. Two commercial SRAMs, in 90 and 65 nm technology nodes, were considered as case studies. Besides the basic static and dynamic test modes, advanced stimuli for the irradiation tests were introduced, as well as statistical post-processing techniques allowing for deeper analysis of the correlations between bit-flip cross-sections and design/architectural characteristics of the memory device. Further insight is provided on the response of irradiated stacked layer devices and on the use of characterized SRAM devices as particle detectors.

Modeling and Implementation of HfO2-based Ferroelectric Tunnel Junctions

NASA Astrophysics Data System (ADS)

Pringle, Spencer Allen

HfO2-based ferroelectric tunnel junctions (FTJs) represent a unique opportunity as both a next-generation digital non-volatile memory and as synapse devices in braininspired logic systems, owing to their higher reliability compared to filamentary resistive random-access memory (ReRAM) and higher speed and lower power consumption compared to competing devices, including phase-change memory (PCM) and state-of-the-art FTJ. Ferroelectrics are often easier to deposit and have simpler material structure than films for magnetic tunnel junctions (MTJs). Ferroelectric HfO2 also enables complementary metal-oxide-semiconductor (CMOS) compatibility, since lead zirconate titanate (PZT) and BaTiO3-based FTJs often are not. No other groups have yet demonstrated a HfO2-based FTJ (to best of the author's knowledge) or applied it to a suitable system. For such devices to be useful, system designers require models based on both theoretical physical analysis and experimental results of fabricated devices in order to confidently design control systems. Both the CMOS circuitry and FTJs must then be designed in layout and fabricated on the same die. This work includes modeling of proposed device structures using a custom python script, which calculates theoretical potential barrier heights as a function of material properties and corresponding current densities (ranging from 8x103 to 3x10-2 A/cm 2 with RHRS/RLRS ranging from 5x105 to 6, depending on ferroelectric thickness). These equations were then combined with polynomial fits of experimental timing data and implemented in a Verilog-A behavioral analog model in Cadence Virtuoso. The author proposes tristate CMOS control systems, and circuits, for implementation of FTJ devices as digital memory and presents simulated performance. Finally, a process flow for fabrication of FTJ devices with CMOS is presented. This work has therefore enabled the fabrication of FTJ devices at RIT and the continued investigation of them as applied to any appropriate systems.

Aspects of GPU perfomance in algorithms with random memory access

NASA Astrophysics Data System (ADS)

Kashkovsky, Alexander V.; Shershnev, Anton A.; Vashchenkov, Pavel V.

2017-10-01

The numerical code for solving the Boltzmann equation on the hybrid computational cluster using the Direct Simulation Monte Carlo (DSMC) method showed that on Tesla K40 accelerators computational performance drops dramatically with increase of percentage of occupied GPU memory. Testing revealed that memory access time increases tens of times after certain critical percentage of memory is occupied. Moreover, it seems to be the common problem of all NVidia's GPUs arising from its architecture. Few modifications of the numerical algorithm were suggested to overcome this problem. One of them, based on the splitting the memory into "virtual" blocks, resulted in 2.5 times speed up.

Long-term reliable physically unclonable function based on oxide tunnel barrier breakdown on two-transistors two-magnetic-tunnel-junctions cell-based embedded spin transfer torque magnetoresistive random access memory

NASA Astrophysics Data System (ADS)

Takaya, Satoshi; Tanamoto, Tetsufumi; Noguchi, Hiroki; Ikegami, Kazutaka; Abe, Keiko; Fujita, Shinobu

2017-04-01

Among the diverse applications of spintronics, security for internet-of-things (IoT) devices is one of the most important. A physically unclonable function (PUF) with a spin device (spin transfer torque magnetoresistive random access memory, STT-MRAM) is presented. Oxide tunnel barrier breakdown is used to realize long-term stability for PUFs. A secure PUF has been confirmed by evaluating the Hamming distance of a 32-bit STT-MRAM-PUF fabricated using 65 nm CMOS technology.

Design and measurement of fully digital ternary content addressable memory using ratioless static random access memory cells and hierarchical-AND matching comparator

NASA Astrophysics Data System (ADS)

Nishikata, Daisuke; Ali, Mohammad Alimudin Bin Mohd; Hosoda, Kento; Matsumoto, Hiroshi; Nakamura, Kazuyuki

2018-04-01

A 36-bit × 32-entry fully digital ternary content addressable memory (TCAM) using the ratioless static random access memory (RL-SRAM) technology and fully complementary hierarchical-AND matching comparators (HAMCs) was developed. Since its fully complementary and digital operation enables the effect of device variabilities to be avoided, it can operate with a quite low supply voltage. A test chip incorporating a conventional TCAM and a proposed 24-transistor ratioless TCAM (RL-TCAM) cells and HAMCs was developed using a 0.18 µm CMOS process. The minimum operating voltage of 0.25 V of the developed RL-TCAM, which is less than half of that of the conventional TCAM, was measured via the conventional CMOS push–pull output buffers with the level-shifting and flipping technique using optimized pull-up voltage and resistors.

Announcing Supercomputer Summit

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wells, Jack; Bland, Buddy; Nichols, Jeff

Summit is the next leap in leadership-class computing systems for open science. With Summit we will be able to address, with greater complexity and higher fidelity, questions concerning who we are, our place on earth, and in our universe. Summit will deliver more than five times the computational performance of Titan’s 18,688 nodes, using only approximately 3,400 nodes when it arrives in 2017. Like Titan, Summit will have a hybrid architecture, and each node will contain multiple IBM POWER9 CPUs and NVIDIA Volta GPUs all connected together with NVIDIA’s high-speed NVLink. Each node will have over half a terabyte ofmore » coherent memory (high bandwidth memory + DDR4) addressable by all CPUs and GPUs plus 800GB of non-volatile RAM that can be used as a burst buffer or as extended memory. To provide a high rate of I/O throughput, the nodes will be connected in a non-blocking fat-tree using a dual-rail Mellanox EDR InfiniBand interconnect. Upon completion, Summit will allow researchers in all fields of science unprecedented access to solving some of the world’s most pressing challenges.« less

Language Classification using N-grams Accelerated by FPGA-based Bloom Filters

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jacob, A; Gokhale, M

N-Gram (n-character sequences in text documents) counting is a well-established technique used in classifying the language of text in a document. In this paper, n-gram processing is accelerated through the use of reconfigurable hardware on the XtremeData XD1000 system. Our design employs parallelism at multiple levels, with parallel Bloom Filters accessing on-chip RAM, parallel language classifiers, and parallel document processing. In contrast to another hardware implementation (HAIL algorithm) that uses off-chip SRAM for lookup, our highly scalable implementation uses only on-chip memory blocks. Our implementation of end-to-end language classification runs at 85x comparable software and 1.45x the competing hardware design.

Charge transfer in rectifying oxide heterostructures and oxide access elements in ReRAM

DOE Office of Scientific and Technical Information (OSTI.GOV)

Stefanovich, G. B.; Pergament, A. L.; Boriskov, P. P.

2016-05-15

The main aspects of the synthesis and experimental research of oxide diode heterostructures are discussed with respect to their use as selector diodes, i.e., access elements in oxide resistive memory. It is shown that charge transfer in these materials differs significantly from the conduction mechanism in p–n junctions based on conventional semiconductors (Si, Ge, A{sup III}–B{sup V}), and the model should take into account the electronic properties of oxides, primarily the low carrier drift mobility. It is found that an increase in the forward current requires an oxide with a small band gap (<1.3 eV) in the heterostructure composition. Heterostructuresmore » with Zn, In–Zn (IZO), Ti, Ni, and Cu oxides are studied; it is found that the CuO–IZO heterojunction has the highest forward current density (10{sup 4} A/cm{sup 2}).« less

Experimental Results and Issues on Equalization for Nonlinear Memory Channel: Pre-Cursor Enhanced Ram-DFE Canceler

NASA Technical Reports Server (NTRS)

Yuan, Lu; LeBlanc, James

1998-01-01

This thesis investigates the effects of the High Power Amplifier (HPA) and the filters over a satellite or telemetry channel. The Volterra series expression is presented for the nonlinear channel with memory, and the algorithm is based on the finite-state machine model. A RAM-based algorithm operating on the receiver side, Pre-cursor Enhanced RAM-FSE Canceler (PERC) is developed. A high order modulation scheme , 16-QAM is used for simulation, the results show that PERC provides an efficient and reliable method to transmit data on the bandlimited nonlinear channel. The contribution of PERC algorithm is that it includes both pre-cursors and post-cursors as the RAM address lines, and suggests a new way to make decision on the pre-addresses. Compared with the RAM-DFE structure that only includes post- addresses, the BER versus Eb/NO performance of PERC is substantially enhanced. Experiments are performed for PERC algorithms with different parameters on AWGN channels, and the results are compared and analyzed. The investigation of this thesis includes software simulation and hardware verification. Hardware is setup to collect actual TWT data. Simulation on both the software-generated data and the real-world data are performed. Practical limitations are considered for the hardware collected data. Simulation results verified the reliability of the PERC algorithm. This work was conducted at NMSU in the Center for Space Telemetering and Telecommunications Systems in the Klipsch School of Electrical and Computer Engineering Department.

Conceptual design and feasibility evaluation model of a 10 to the 8th power bit oligatomic mass memory. Volume 1: Conceptual design

NASA Technical Reports Server (NTRS)

Recksiedler, A. L.; Lutes, C. L.

1972-01-01

The oligatomic (mirror) thin film memory technology is a suitable candidate for general purpose spaceborne applications in the post-1975 time frame. Capacities of around 10 to the 8th power bits can be reliably implemented with systems designed around a 335 million bit module. The recommended mode was determined following an investigation of implementation sizes ranging from an 8,000,000 to 100,000,000 bits per module. Cost, power, weight, volume, reliability, maintainability and speed were investigated. The memory includes random access, NDRO, SEC-DED, nonvolatility, and dual interface characteristics. The applications most suitable for the technology are those involving a large capacity with high speed (no latency), nonvolatility, and random accessing.

Set statistics in conductive bridge random access memory device with Cu/HfO{sub 2}/Pt structure

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhang, Meiyun; Long, Shibing, E-mail: longshibing@ime.ac.cn; Wang, Guoming

2014-11-10

The switching parameter variation of resistive switching memory is one of the most important challenges in its application. In this letter, we have studied the set statistics of conductive bridge random access memory with a Cu/HfO{sub 2}/Pt structure. The experimental distributions of the set parameters in several off resistance ranges are shown to nicely fit a Weibull model. The Weibull slopes of the set voltage and current increase and decrease logarithmically with off resistance, respectively. This experimental behavior is perfectly captured by a Monte Carlo simulator based on the cell-based set voltage statistics model and the Quantum Point Contact electronmore » transport model. Our work provides indications for the improvement of the switching uniformity.« less

High-density magnetoresistive random access memory operating at ultralow voltage at room temperature.

PubMed

Hu, Jia-Mian; Li, Zheng; Chen, Long-Qing; Nan, Ce-Wen

2011-11-22

The main bottlenecks limiting the practical applications of current magnetoresistive random access memory (MRAM) technology are its low storage density and high writing energy consumption. Although a number of proposals have been reported for voltage-controlled memory device in recent years, none of them simultaneously satisfy the important device attributes: high storage capacity, low power consumption and room temperature operation. Here we present, using phase-field simulations, a simple and new pathway towards high-performance MRAMs that display significant improvements over existing MRAM technologies or proposed concepts. The proposed nanoscale MRAM device simultaneously exhibits ultrahigh storage capacity of up to 88 Gb inch(-2), ultralow power dissipation as low as 0.16 fJ per bit and room temperature high-speed operation below 10 ns.

High-density magnetoresistive random access memory operating at ultralow voltage at room temperature

PubMed Central

Hu, Jia-Mian; Li, Zheng; Chen, Long-Qing; Nan, Ce-Wen

2011-01-01

The main bottlenecks limiting the practical applications of current magnetoresistive random access memory (MRAM) technology are its low storage density and high writing energy consumption. Although a number of proposals have been reported for voltage-controlled memory device in recent years, none of them simultaneously satisfy the important device attributes: high storage capacity, low power consumption and room temperature operation. Here we present, using phase-field simulations, a simple and new pathway towards high-performance MRAMs that display significant improvements over existing MRAM technologies or proposed concepts. The proposed nanoscale MRAM device simultaneously exhibits ultrahigh storage capacity of up to 88 Gb inch−2, ultralow power dissipation as low as 0.16 fJ per bit and room temperature high-speed operation below 10 ns. PMID:22109527

Ames Lab 101: Ultrafast Magnetic Switching

ScienceCinema

Wang; Jigang

2018-01-01

Ames Laboratory physicists have found a new way to switch magnetism that is at least 1000 times faster than currently used in magnetic memory technologies. Magnetic switching is used to encode information in hard drives, magnetic random access memory and other computing devices. The discovery potentially opens the door to terahertz and faster memory speeds.

Soft-error tolerance and energy consumption evaluation of embedded computer with magnetic random access memory in practical systems using computer simulations

NASA Astrophysics Data System (ADS)

Nebashi, Ryusuke; Sakimura, Noboru; Sugibayashi, Tadahiko

2017-08-01

We evaluated the soft-error tolerance and energy consumption of an embedded computer with magnetic random access memory (MRAM) using two computer simulators. One is a central processing unit (CPU) simulator of a typical embedded computer system. We simulated the radiation-induced single-event-upset (SEU) probability in a spin-transfer-torque MRAM cell and also the failure rate of a typical embedded computer due to its main memory SEU error. The other is a delay tolerant network (DTN) system simulator. It simulates the power dissipation of wireless sensor network nodes of the system using a revised CPU simulator and a network simulator. We demonstrated that the SEU effect on the embedded computer with 1 Gbit MRAM-based working memory is less than 1 failure in time (FIT). We also demonstrated that the energy consumption of the DTN sensor node with MRAM-based working memory can be reduced to 1/11. These results indicate that MRAM-based working memory enhances the disaster tolerance of embedded computers.

Random Telegraph Signal-Like Fluctuation Created by Fowler-Nordheim Stress in Gate Induced Drain Leakage Current of the Saddle Type Dynamic Random Access Memory Cell Transistor

NASA Astrophysics Data System (ADS)

Kim, Heesang; Oh, Byoungchan; Kim, Kyungdo; Cha, Seon-Yong; Jeong, Jae-Goan; Hong, Sung-Joo; Lee, Jong-Ho; Park, Byung-Gook; Shin, Hyungcheol

2010-09-01

We generated traps inside gate oxide in gate-drain overlap region of recess channel type dynamic random access memory (DRAM) cell transistor through Fowler-Nordheim (FN) stress, and observed gate induced drain leakage (GIDL) current both in time domain and in frequency domain. It was found that the trap inside gate oxide could generate random telegraph signal (RTS)-like fluctuation in GIDL current. The characteristics of that fluctuation were similar to those of RTS-like fluctuation in GIDL current observed in the non-stressed device. This result shows the possibility that the trap causing variable retention time (VRT) in DRAM data retention time can be located inside gate oxide like channel RTS of metal-oxide-semiconductor field-effect transistors (MOSFETs).

Efficient checkpointing schemes for depletion perturbation solutions on memory-limited architectures

DOE Office of Scientific and Technical Information (OSTI.GOV)

Stripling, H. F.; Adams, M. L.; Hawkins, W. D.

2013-07-01

We describe a methodology for decreasing the memory footprint and machine I/O load associated with the need to access a forward solution during an adjoint solve. Specifically, we are interested in the depletion perturbation equations, where terms in the adjoint Bateman and transport equations depend on the forward flux solution. Checkpointing is the procedure of storing snapshots of the forward solution to disk and using these snapshots to recompute the parts of the forward solution that are necessary for the adjoint solve. For large problems, however, the storage cost of just a few copies of an angular flux vector canmore » exceed the available RAM on the host machine. We propose a methodology that does not checkpoint the angular flux vector; instead, we write and store converged source moments, which are typically of a much lower dimension than the angular flux solution. This reduces the memory footprint and I/O load of the problem, but requires that we perform single sweeps to reconstruct flux vectors on demand. We argue that this trade-off is exactly the kind of algorithm that will scale on advanced, memory-limited architectures. We analyze the cost, in terms of FLOPS and memory footprint, of five checkpointing schemes. We also provide computational results that support the analysis and show that the memory-for-work trade off does improve time to solution. (authors)« less

Implications of scaling on static RAM bit cell stability and reliability

NASA Astrophysics Data System (ADS)

Coones, Mary Ann; Herr, Norm; Bormann, Al; Erington, Kent; Soorholtz, Vince; Sweeney, John; Phillips, Michael

1993-01-01

In order to lower manufacturing costs and increase performance, static random access memory (SRAM) bit cells are scaled progressively toward submicron geometries. The reliability of an SRAM is highly dependent on the bit cell stability. Smaller memory cells with less capacitance and restoring current make the array more susceptible to failures from defectivity, alpha hits, and other instabilities and leakage mechanisms. Improving long term reliability while migrating to higher density devices makes the task of building in and improving reliability increasingly difficult. Reliability requirements for high density SRAMs are very demanding with failure rates of less than 100 failures per billion device hours (100 FITs) being a common criteria. Design techniques for increasing bit cell stability and manufacturability must be implemented in order to build in this level of reliability. Several types of analyses are performed to benchmark the performance of the SRAM device. Examples of these analysis techniques which are presented here include DC parametric measurements of test structures, functional bit mapping of the circuit used to characterize the entire distribution of bits, electrical microprobing of weak and/or failing bits, and system and accelerated soft error rate measurements. These tests allow process and design improvements to be evaluated prior to implementation on the final product. These results are used to provide comprehensive bit cell characterization which can then be compared to device models and adjusted accordingly to provide optimized cell stability versus cell size for a particular technology. The result is designed in reliability which can be accomplished during the early stages of product development.

Microcontroller for automation application

NASA Technical Reports Server (NTRS)

Cooper, H. W.

1975-01-01

The description of a microcontroller currently being developed for automation application was given. It is basically an 8-bit microcomputer with a 40K byte random access memory/read only memory, and can control a maximum of 12 devices through standard 15-line interface ports.

Unexpected surface implanted layer in static random access memory devices observed by microwave impedance microscope

NASA Astrophysics Data System (ADS)

Kundhikanjana, W.; Yang, Y.; Tanga, Q.; Zhang, K.; Lai, K.; Ma, Y.; Kelly, M. A.; Li, X. X.; Shen, Z.-X.

2013-02-01

Real-space mapping of doping concentration in semiconductor devices is of great importance for the microelectronics industry. In this work, a scanning microwave impedance microscope (MIM) is employed to resolve the local conductivity distribution of a static random access memory sample. The MIM electronics can also be adjusted to the scanning capacitance microscopy (SCM) mode, allowing both measurements on the same region. Interestingly, while the conventional SCM images match the nominal device structure, the MIM results display certain unexpected features, which originate from a thin layer of the dopant ions penetrating through the protective layers during the heavy implantation steps.

Hydrogen doping in HfO{sub 2} resistance change random access memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Duncan, D.; Magyari-Köpe, B.; Nishi, Y.

2016-01-25

The structures and energies of hydrogen-doped monoclinic hafnium dioxide were calculated using density-functional theory. The electronic interactions are described within the LDA + U formalism, where on-site Coulomb corrections are applied to the 5d orbital electrons of Hf atoms and 2p orbital electrons of the O atoms. The effects of charge state, defect-defect interactions, and hydrogenation are investigated and compared with experiment. It is found that hydrogenation of HfO{sub 2} resistance-change random access memory devices energetically stabilizes the formation of oxygen vacancies and conductive vacancy filaments through multiple mechanisms, leading to improved switching characteristic and device yield.

A stochastic simulation method for the assessment of resistive random access memory retention reliability

DOE Office of Scientific and Technical Information (OSTI.GOV)

Berco, Dan, E-mail: danny.barkan@gmail.com; Tseng, Tseung-Yuen, E-mail: tseng@cc.nctu.edu.tw

This study presents an evaluation method for resistive random access memory retention reliability based on the Metropolis Monte Carlo algorithm and Gibbs free energy. The method, which does not rely on a time evolution, provides an extremely efficient way to compare the relative retention properties of metal-insulator-metal structures. It requires a small number of iterations and may be used for statistical analysis. The presented approach is used to compare the relative robustness of a single layer ZrO{sub 2} device with a double layer ZnO/ZrO{sub 2} one, and obtain results which are in good agreement with experimental data.

Memory Forensics: Review of Acquisition and Analysis Techniques

DTIC Science & Technology

2013-11-01

Management Overview Processes running on modern multitasking operating systems operate on an abstraction of RAM, called virtual memory [7]. In these systems...information such as user names, email addresses and passwords [7]. Analysts also use tools such as WinHex to identify headers or other suspicious data within

An improved algorithm of image processing technique for film thickness measurement in a horizontal stratified gas-liquid two-phase flow

NASA Astrophysics Data System (ADS)

Kuntoro, Hadiyan Yusuf; Hudaya, Akhmad Zidni; Dinaryanto, Okto; Majid, Akmal Irfan; Deendarlianto

2016-06-01

Due to the importance of the two-phase flow researches for the industrial safety analysis, many researchers developed various methods and techniques to study the two-phase flow phenomena on the industrial cases, such as in the chemical, petroleum and nuclear industries cases. One of the developing methods and techniques is image processing technique. This technique is widely used in the two-phase flow researches due to the non-intrusive capability to process a lot of visualization data which are contain many complexities. Moreover, this technique allows to capture direct-visual information data of the flow which are difficult to be captured by other methods and techniques. The main objective of this paper is to present an improved algorithm of image processing technique from the preceding algorithm for the stratified flow cases. The present algorithm can measure the film thickness (hL) of stratified flow as well as the geometrical properties of the interfacial waves with lower processing time and random-access memory (RAM) usage than the preceding algorithm. Also, the measurement results are aimed to develop a high quality database of stratified flow which is scanty. In the present work, the measurement results had a satisfactory agreement with the previous works.

Indonesian kalkulator of oocytes (IKO): A smart application to determine our biological age

NASA Astrophysics Data System (ADS)

Wiweko, Budi; Narasati, Shabrina; Agung, Prince Gusti; Zesario, Aulia; Wibawa, Yohanes Satrya; Maidarti, Mila; Harzif, Achmad Kemal; Pratama, Gita; Sumapraja, Kanadi; Muharam, Raden; Hestiantoro, Andon

2018-02-01

Background: The use of smartphones and its associated application provides new opportunities for physicians. In current situations, there are still few applications are designed in the field of infertility and Assisted Reproductive Technologies (ART). A study conducted on 1616 subjects proved that AMH (Anti-Mullerian Hormone) could be used to predict a woman's biological age earlier than Follicle-Stimulating Hormone (FSH) and Antral Follicle Count (AFC). In this study, we describe the AMH nomogram that has been developed into a mobile application as "Indonesian Kalculator of Oocytes" (IKO). The software required to create IKO application was the Android 4.0.3 Ice Cream Sandwich and Java Application Development. The hardware specification that needed to develop the IKO apps were a 4.0-inch screen, 512 MB RAM (random-access memory), and CPU (central processing unit) with dual core 1.2 Ghz. The application is built using the Android SDK (Software Development Kit) and Java Application Development. In this application, we can predict the woman's biological age, some mature oocytes, and AMH level. This app is expected to help patients to plan effectively for pregnancy and help the doctor to choose the best intervention for patients who face infertility problems using Assisted Reproductive Technology (ART). IKO application can be downloaded for free on Google PlayStore and Apple Store.

Critical issues regarding SEU in avionics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Normand, E.; McNulty, P.J.

1993-01-01

The energetic neutrons in the atmosphere cause microelectronics in avionic system to malfunction through a mechanism called single-event upsets (SEUs), and single-event latchup is a potential threat. Data from military and experimental flights as well as laboratory testing indicate that typical non-radiation-hardened 64K and 256K static random access memories (SRAMs) can experience a significant SEU rate at aircraft altitudes. Microelectronics in avionics systems have been demonstrated to be susceptible to SEU. Of all device types, RAMs are the most sensitive because they have the largest number of bits on a chip (e.g., an SRAM may have from 64K to 1Mmore » bits, a microprocessor 3K to 10K bits, and a logic device like an analog-to-digital converter, 12 bits). Avionics designers will need to take this susceptibility into account in current and future designs. A number of techniques are available for dealing with SEU: EDAC, redundancy, use of SEU-hard parts, reset and/or watchdog timer capability, etc. Specifications should be developed to guide avionics vendors in the analysis, prevention, and verification of neutron-induced SEU. Areas for additional research include better definition of the atmospheric neutrons and protons, development of better calculational models (e.g., those used for protons[sup 11]), and better characterization of neutron-induced latchup.« less

An improved algorithm of image processing technique for film thickness measurement in a horizontal stratified gas-liquid two-phase flow

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kuntoro, Hadiyan Yusuf, E-mail: hadiyan.y.kuntoro@mail.ugm.ac.id; Majid, Akmal Irfan; Deendarlianto, E-mail: deendarlianto@ugm.ac.id

Due to the importance of the two-phase flow researches for the industrial safety analysis, many researchers developed various methods and techniques to study the two-phase flow phenomena on the industrial cases, such as in the chemical, petroleum and nuclear industries cases. One of the developing methods and techniques is image processing technique. This technique is widely used in the two-phase flow researches due to the non-intrusive capability to process a lot of visualization data which are contain many complexities. Moreover, this technique allows to capture direct-visual information data of the flow which are difficult to be captured by other methodsmore » and techniques. The main objective of this paper is to present an improved algorithm of image processing technique from the preceding algorithm for the stratified flow cases. The present algorithm can measure the film thickness (h{sub L}) of stratified flow as well as the geometrical properties of the interfacial waves with lower processing time and random-access memory (RAM) usage than the preceding algorithm. Also, the measurement results are aimed to develop a high quality database of stratified flow which is scanty. In the present work, the measurement results had a satisfactory agreement with the previous works.« less

Working memory span capacity improved by a D2 but not D1 receptor family agonist.

PubMed

Tarantino, Isadore S; Sharp, Richard F; Geyer, Mark A; Meves, Jessica M; Young, Jared W

2011-06-01

Patients with schizophrenia exhibit poor working memory (WM). Although several subcomponents of WM can be measured, evidence suggests the primary subcomponent affected in schizophrenia is span capacity (WMC). Indeed, the NIMH-funded MATRICS initiative recommended assaying the WMC when assessing the efficacy of a putative therapeutic for FDA approval. Although dopamine D1 receptor agonists improve delay-dependent memory in animals, evidence for improvements in WMC due to dopamine D1 receptor activation is limited. In contrast, the dopamine D2-family agonist bromocriptine improves WMC in humans. The radial arm maze (RAM) can be used to assess WMC, although complications due to ceiling effects or strategy confounds have limited its use. We describe a 12-arm RAM protocol designed to assess whether the dopamine D1-family agonist SKF 38393 (0, 1, 3, and 10 mg/kg) or bromocriptine (0, 1, 3, and 10 mg/kg) could improve WMC in C57BL/6N mice (n=12) in cross-over designs. WMC increased and strategy usage decreased with training. The dopamine D1 agonist SKF 38393 had no effect on WMC or long-term memory. Bromocriptine decreased WMC errors, without affecting long-term memory, consistent with human studies. These data confirm that WMC can be measured in mice and reveal drug effects that are consistent with reported effects in humans. Future research is warranted to identify the subtype of the D2-family of receptors responsible for the observed improvement in WMC. Finally, this RAM procedure may prove useful in developing animal models of deficient WMC to further assess putative treatments for the cognitive deficits in schizophrenia. Copyright © 2011 Elsevier B.V. All rights reserved.

More than a feeling: Emotional cues impact the access and experience of autobiographical memories.

PubMed

Sheldon, Signy; Donahue, Julia

2017-07-01

Remembering is impacted by several factors of retrieval, including the emotional content of a memory cue. Here we tested how musical retrieval cues that differed on two dimensions of emotion-valence (positive and negative) and arousal (high and low)-impacted the following aspects of autobiographical memory recall: the response time to access a past personal event, the experience of remembering (ratings of memory vividness), the emotional content of a cued memory (ratings of event arousal and valence), and the type of event recalled (ratings of event energy, socialness, and uniqueness). We further explored how cue presentation affected autobiographical memory retrieval by administering cues of similar arousal and valence levels in a blocked fashion to one half of the tested participants, and randomly to the other half. We report three main findings. First, memories were accessed most quickly in response to musical cues that were highly arousing and positive in emotion. Second, we observed a relation between a cue and the elicited memory's emotional valence but not arousal; however, both the cue valence and arousal related to the nature of the recalled event. Specifically, high cue arousal led to lower memory vividness and uniqueness ratings, but cues with both high arousal and positive valence were associated with memories rated as more social and energetic. Finally, cue presentation impacted both how quickly and specifically memories were accessed and how cue valence affected the memory vividness ratings. The implications of these findings for views of how emotion directs the access to memories and the experience of remembering are discussed.

Active non-volatile memory post-processing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kannan, Sudarsun; Milojicic, Dejan S.; Talwar, Vanish

A computing node includes an active Non-Volatile Random Access Memory (NVRAM) component which includes memory and a sub-processor component. The memory is to store data chunks received from a processor core, the data chunks comprising metadata indicating a type of post-processing to be performed on data within the data chunks. The sub-processor component is to perform post-processing of said data chunks based on said metadata.

Empirical Modeling Of Single-Event Upset

NASA Technical Reports Server (NTRS)

Zoutendyk, John A.; Smith, Lawrence S.; Soli, George A.; Thieberger, Peter; Smith, Stephen L.; Atwood, Gregory E.

1988-01-01

Experimental study presents examples of empirical modeling of single-event upset in negatively-doped-source/drain metal-oxide-semiconductor static random-access memory cells. Data supports adoption of simplified worst-case model in which cross sectionof SEU by ion above threshold energy equals area of memory cell.

Ga-doped indium oxide nanowire phase change random access memory cells

NASA Astrophysics Data System (ADS)

Jin, Bo; Lim, Taekyung; Ju, Sanghyun; Latypov, Marat I.; Kim, Hyoung Seop; Meyyappan, M.; Lee, Jeong-Soo

2014-02-01

Phase change random access memory (PCRAM) devices are usually constructed using tellurium based compounds, but efforts to seek other materials providing desirable memory characteristics have continued. We have fabricated PCRAM devices using Ga-doped In2O3 nanowires with three different Ga compositions (Ga/(In+Ga) atomic ratio: 2.1%, 11.5% and 13.0%), and investigated their phase switching properties. The nanowires (˜40 nm in diameter) can be repeatedly switched between crystalline and amorphous phases, and Ga concentration-dependent memory switching behavior in the nanowires was observed with ultra-fast set/reset rates of 80 ns/20 ns, which are faster than for other competitive phase change materials. The observations of fast set/reset rates and two distinct states with a difference in resistance of two to three orders of magnitude appear promising for nonvolatile information storage. Moreover, we found that increasing the Ga concentration can reduce the power consumption and resistance drift; however, too high a level of Ga doping may cause difficulty in achieving the phase transition.

SiGe epitaxial memory for neuromorphic computing with reproducible high performance based on engineered dislocations

NASA Astrophysics Data System (ADS)

Choi, Shinhyun; Tan, Scott H.; Li, Zefan; Kim, Yunjo; Choi, Chanyeol; Chen, Pai-Yu; Yeon, Hanwool; Yu, Shimeng; Kim, Jeehwan

2018-01-01

Although several types of architecture combining memory cells and transistors have been used to demonstrate artificial synaptic arrays, they usually present limited scalability and high power consumption. Transistor-free analog switching devices may overcome these limitations, yet the typical switching process they rely on—formation of filaments in an amorphous medium—is not easily controlled and hence hampers the spatial and temporal reproducibility of the performance. Here, we demonstrate analog resistive switching devices that possess desired characteristics for neuromorphic computing networks with minimal performance variations using a single-crystalline SiGe layer epitaxially grown on Si as a switching medium. Such epitaxial random access memories utilize threading dislocations in SiGe to confine metal filaments in a defined, one-dimensional channel. This confinement results in drastically enhanced switching uniformity and long retention/high endurance with a high analog on/off ratio. Simulations using the MNIST handwritten recognition data set prove that epitaxial random access memories can operate with an online learning accuracy of 95.1%.

The effect of patterning options on embedded memory cells in logic technologies at iN10 and iN7

NASA Astrophysics Data System (ADS)

Appeltans, Raf; Weckx, Pieter; Raghavan, Praveen; Kim, Ryoung-Han; Kar, Gouri Sankar; Furnémont, Arnaud; Van der Perre, Liesbet; Dehaene, Wim

2017-03-01

Static Random Access Memory (SRAM) cells are used together with logic standard cells as the benchmark to develop the process flow for new logic technologies. In order to achieve successful integration of Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM) as area efficient higher level embedded cache, it also needs to be included as a benchmark. The simple cell structure of STT-MRAM brings extra patterning challenges to achieve high density. The two memory types are compared in terms of minimum area and critical design rules in both the iN10 and iN7 node, with an extra focus on patterning options in iN7. Both the use of Self-Aligned Quadruple Patterning (SAQP) mandrel and spacer engineering, as well as multi-level via's are explored. These patterning options result in large area gains for the STT-MRAM cell and moreover determine which cell variant is the smallest.

On the mechanisms of cation injection in conducting bridge memories: The case of HfO{sub 2} in contact with noble metal anodes (Au, Cu, Ag)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Saadi, M.; CNRS, LTM, F-38000 Grenoble; El Manar University, LMOP, 2092 Tunis

Resistance switching is studied in HfO{sub 2} as a function of the anode metal (Au, Cu, and Ag) in view of its application to resistive memories (resistive random access memories, RRAM). Current-voltage (I-V) and current-time (I-t) characteristics are presented. For Au anodes, resistance transition is controlled by oxygen vacancies (oxygen-based resistive random access memory, OxRRAM). For Ag anodes, resistance switching is governed by cation injection (Conducting Bridge random access memory, CBRAM). Cu anodes lead to an intermediate case. I-t experiments are shown to be a valuable tool to distinguish between OxRRAM and CBRAM behaviors. A model is proposed to explainmore » the high-to-low resistance transition in CBRAMs. The model is based on the theory of low-temperature oxidation of metals (Cabrera-Mott theory). Upon electron injection, oxygen vacancies and oxygen ions are generated in the oxide. Oxygen ions are drifted to the anode, and an interfacial oxide is formed at the HfO{sub 2}/anode interface. If oxygen ion mobility is low in the interfacial oxide, a negative space charge builds-up at the HfO{sub 2}/oxide interface. This negative space charge is the source of a strong electric field across the interfacial oxide thickness, which pulls out cations from the anode (CBRAM case). Inversely, if oxygen ions migration through the interfacial oxide is important (or if the anode does not oxidize such as Au), bulk oxygen vacancies govern resistance transition (OxRRAM case).« less

Architectural Techniques For Managing Non-volatile Caches

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mittal, Sparsh

As chip power dissipation becomes a critical challenge in scaling processor performance, computer architects are forced to fundamentally rethink the design of modern processors and hence, the chip-design industry is now at a major inflection point in its hardware roadmap. The high leakage power and low density of SRAM poses serious obstacles in its use for designing large on-chip caches and for this reason, researchers are exploring non-volatile memory (NVM) devices, such as spin torque transfer RAM, phase change RAM and resistive RAM. However, since NVMs are not strictly superior to SRAM, effective architectural techniques are required for making themmore » a universal memory solution. This book discusses techniques for designing processor caches using NVM devices. It presents algorithms and architectures for improving their energy efficiency, performance and lifetime. It also provides both qualitative and quantitative evaluation to help the reader gain insights and motivate them to explore further. This book will be highly useful for beginners as well as veterans in computer architecture, chip designers, product managers and technical marketing professionals.« less

System matrix computation vs storage on GPU: A comparative study in cone beam CT.

PubMed

Matenine, Dmitri; Côté, Geoffroi; Mascolo-Fortin, Julia; Goussard, Yves; Després, Philippe

2018-02-01

Iterative reconstruction algorithms in computed tomography (CT) require a fast method for computing the intersection distances between the trajectories of photons and the object, also called ray tracing or system matrix computation. This work focused on the thin-ray model is aimed at comparing different system matrix handling strategies using graphical processing units (GPUs). In this work, the system matrix is modeled by thin rays intersecting a regular grid of box-shaped voxels, known to be an accurate representation of the forward projection operator in CT. However, an uncompressed system matrix exceeds the random access memory (RAM) capacities of typical computers by one order of magnitude or more. Considering the RAM limitations of GPU hardware, several system matrix handling methods were compared: full storage of a compressed system matrix, on-the-fly computation of its coefficients, and partial storage of the system matrix with partial on-the-fly computation. These methods were tested on geometries mimicking a cone beam CT (CBCT) acquisition of a human head. Execution times of three routines of interest were compared: forward projection, backprojection, and ordered-subsets convex (OSC) iteration. A fully stored system matrix yielded the shortest backprojection and OSC iteration times, with a 1.52× acceleration for OSC when compared to the on-the-fly approach. Nevertheless, the maximum problem size was bound by the available GPU RAM and geometrical symmetries. On-the-fly coefficient computation did not require symmetries and was shown to be the fastest for forward projection. It also offered reasonable execution times of about 176.4 ms per view per OSC iteration for a detector of 512 × 448 pixels and a volume of 384 3 voxels, using commodity GPU hardware. Partial system matrix storage has shown a performance similar to the on-the-fly approach, while still relying on symmetries. Partial system matrix storage was shown to yield the lowest relative performance. On-the-fly ray tracing was shown to be the most flexible method, yielding reasonable execution times. A fully stored system matrix allowed for the lowest backprojection and OSC iteration times and may be of interest for certain performance-oriented applications. © 2017 American Association of Physicists in Medicine.

Plated wire memory subsystem

NASA Technical Reports Server (NTRS)

Reynolds, L.; Tweed, H.

1972-01-01

The work performed entailed the design, development, construction and testing of a 4000 word by 18 bit random access, NDRO plated wire memory for use in conjunction with a spacecraft imput/output unit and central processing unit. The primary design parameters, in order of importance, were high reliability, low power, volume and weight. A single memory unit, referred to as a qualification model, was delivered.

Particle sensor array

NASA Technical Reports Server (NTRS)

Buehler, Martin G. (Inventor); Blaes, Brent R. (Inventor); Lieneweg, Udo (Inventor)

1994-01-01

A particle sensor array which in a preferred embodiment comprises a static random access memory having a plurality of ion-sensitive memory cells, each such cell comprising at least one pull-down field effect transistor having a sensitive drain surface area (such as by bloating) and at least one pull-up field effect transistor having a source connected to an offset voltage. The sensitive drain surface area and the offset voltage are selected for memory cell upset by incident ions such as alpha-particles. The static random access memory of the present invention provides a means for selectively biasing the memory cells into the same state in which each of the sensitive drain surface areas is reverse biased and then selectively reducing the reversed bias on these sensitive drain surface areas for increasing the upset sensitivity of the cells to ions. The resulting selectively sensitive memory cells can be used in a number of applications. By way of example, the present invention can be used for measuring the linear energy transfer of ion particles, as well as a device for assessing the resistance of CMOS latches to Cosmic Ray induced single event upsets. The sensor of the present invention can also be used to determine the uniformity of an ion beam.

Eight microprocessor-based instrument data systems in the Galileo Orbiter spacecraft

NASA Technical Reports Server (NTRS)

Barry, R. C.

1980-01-01

Instrument data systems consist of a microprocessor, 3K bytes of Read Only Memory and 3K bytes of Random Access Memory. It interfaces with the spacecraft data bus through an isolated user interface with a direct memory access bus adaptor, and/or parallel data from instrument devices such as registers, buffers, analog to digital converters, multiplexers, and solid state sensors. These data systems support the spacecraft hardware and software communication protocol, decode and process instrument commands, generate continuous instrument operating modes, control the instrument mechanisms, acquire, process, format, and output instrument science data.

Distributed Micro-Processor Applications to Guidance and Control Systems.

DTIC Science & Technology

1982-07-01

nanoseconds compared with 22 milliseconds for the older type of NMOS non-volatile RAM. This non-volatile RAM is estimated to hold its memory for 100 years...illustrated in figure 1.4.3.3 and compared with the traditional permalog chevron bubble structure. The contiguous element bubble structure is being developed ...M for its 8086 based Digital Advanced Avionics System (DAAS) developed for NASA Ames, but rejected it as being unsuitable. Ada is the new DoD

FPGA-Based, Self-Checking, Fault-Tolerant Computers

NASA Technical Reports Server (NTRS)

Some, Raphael; Rennels, David

2004-01-01

A proposed computer architecture would exploit the capabilities of commercially available field-programmable gate arrays (FPGAs) to enable computers to detect and recover from bit errors. The main purpose of the proposed architecture is to enable fault-tolerant computing in the presence of single-event upsets (SEUs). [An SEU is a spurious bit flip (also called a soft error) caused by a single impact of ionizing radiation.] The architecture would also enable recovery from some soft errors caused by electrical transients and, to some extent, from intermittent and permanent (hard) errors caused by aging of electronic components. A typical FPGA of the current generation contains one or more complete processor cores, memories, and highspeed serial input/output (I/O) channels, making it possible to shrink a board-level processor node to a single integrated-circuit chip. Custom, highly efficient microcontrollers, general-purpose computers, custom I/O processors, and signal processors can be rapidly and efficiently implemented by use of FPGAs. Unfortunately, FPGAs are susceptible to SEUs. Prior efforts to mitigate the effects of SEUs have yielded solutions that degrade performance of the system and require support from external hardware and software. In comparison with other fault-tolerant- computing architectures (e.g., triple modular redundancy), the proposed architecture could be implemented with less circuitry and lower power demand. Moreover, the fault-tolerant computing functions would require only minimal support from circuitry outside the central processing units (CPUs) of computers, would not require any software support, and would be largely transparent to software and to other computer hardware. There would be two types of modules: a self-checking processor module and a memory system (see figure). The self-checking processor module would be implemented on a single FPGA and would be capable of detecting its own internal errors. It would contain two CPUs executing identical programs in lock step, with comparison of their outputs to detect errors. It would also contain various cache local memory circuits, communication circuits, and configurable special-purpose processors that would use self-checking checkers. (The basic principle of the self-checking checker method is to utilize logic circuitry that generates error signals whenever there is an error in either the checker or the circuit being checked.) The memory system would comprise a main memory and a hardware-controlled check-pointing system (CPS) based on a buffer memory denoted the recovery cache. The main memory would contain random-access memory (RAM) chips and FPGAs that would, in addition to everything else, implement double-error-detecting and single-error-correcting memory functions to enable recovery from single-bit errors.

Long-term cognitive, emotional and neurogenic alterations induced by alcohol and methamphetamine exposure in adolescent rats.

PubMed

Loxton, David; Canales, Juan J

2017-03-06

A high proportion of young methamphetamine (MA) users simultaneously consume alcohol. However, the potential neurological and behavioural alterations induced by such a drug combination have not been systematically examined. We studied in adolescent rats the long-term effects of alcohol, MA, and alcohol and MA combined on anxiety-like behaviour, memory, and neurogenesis in the adult hippocampus. Rats received saline, ethanol (ETOH, 1.5g/kg), MA (MA, 2mg/kg), or ethanol and MA combined (ETHOH-MA, 1.5g/kg ethanol plus 2mg/kg MA) via oral gavage, once daily for 5 consecutive days. Open field (OF), elevated plus maze (EPM) and radial arm maze (RAM) tests were conducted following a 15-day withdrawal period. The results showed alterations in exploratory behaviour in the OF in the MA and ETOH-MA groups, and anxiety-like effects in the EPM in all three drug treatment groups. All three drug groups exhibited reference memory deficits in the RAM, but only the combination treatment group displayed alterations in working memory. Both MA and ETOH-MA treatments increased the length of doublecortin (DCX)-void gaps in the dentate gyrus but only ETOH-MA treatment increased the number of such gaps. An increased number and length of DCX-void gaps correlated with decreased exploratory activity in the OF, and impaired working memory in the RAM was associated with an augmented number of gaps. These findings suggest that alterations in adult hippocampal neurogenesis are linked to the persistent cognitive and behavioural deficits produced by alcohol and MA exposure. Copyright © 2016 Elsevier Inc. All rights reserved.

Robust training attenuates TBI-induced deficits in reference and working memory on the radial 8-arm maze

PubMed Central

Sebastian, Veronica; Diallo, Aissatou; Ling, Douglas S. F.; Serrano, Peter A.

2013-01-01

Globally, it is estimated that nearly 10 million people sustain severe brain injuries leading to hospitalization and/or death every year. Amongst survivors, traumatic brain injury (TBI) results in a wide variety of physical, emotional and cognitive deficits. The most common cognitive deficit associated with TBI is memory loss, involving impairments in spatial reference and working memory. However, the majority of research thus far has characterized the deficits associated with TBI on either reference or working memory systems separately, without investigating how they interact within a single task. Thus, we examined the effects of TBI on short-term working and long-term reference memory using the radial 8-arm maze (RAM) with a sequence of four baited and four unbaited arms. Subjects were given 10 daily trials for 6 days followed by a memory retrieval test 2 weeks after training. Multiple training trials not only provide robust training, but also test the subjects' ability to frequently update short-term memory while learning the reference rules of the task. Our results show that TBI significantly impaired short-term working memory function on previously acquired spatial information but has little effect on long-term reference memory. Additionally, TBI significantly increased working memory errors during acquisition and reference memory errors during retention testing 2 weeks later. With a longer recovery period after TBI, the robust RAM training mitigated the reference memory deficit in retention but not the short-term working memory deficit during acquisition. These results identify the resiliency and vulnerabilities of short-term working and long-term reference memory to TBI in the context of robust training. The data highlight the role of cognitive training and other behavioral remediation strategies implicated in attenuating deficits associated with TBI. PMID:23653600

Nonvolatile reconfigurable sequential logic in a HfO2 resistive random access memory array.

PubMed

Zhou, Ya-Xiong; Li, Yi; Su, Yu-Ting; Wang, Zhuo-Rui; Shih, Ling-Yi; Chang, Ting-Chang; Chang, Kuan-Chang; Long, Shi-Bing; Sze, Simon M; Miao, Xiang-Shui

2017-05-25

Resistive random access memory (RRAM) based reconfigurable logic provides a temporal programmable dimension to realize Boolean logic functions and is regarded as a promising route to build non-von Neumann computing architecture. In this work, a reconfigurable operation method is proposed to perform nonvolatile sequential logic in a HfO 2 -based RRAM array. Eight kinds of Boolean logic functions can be implemented within the same hardware fabrics. During the logic computing processes, the RRAM devices in an array are flexibly configured in a bipolar or complementary structure. The validity was demonstrated by experimentally implemented NAND and XOR logic functions and a theoretically designed 1-bit full adder. With the trade-off between temporal and spatial computing complexity, our method makes better use of limited computing resources, thus provides an attractive scheme for the construction of logic-in-memory systems.

Dynamics of the stress-mediated magnetoelectric memory cell N×(TbCo2/FeCo)/PMN-PT

NASA Astrophysics Data System (ADS)

Preobrazhensky, Vladimir; Klimov, Alexey; Tiercelin, Nicolas; Dusch, Yannick; Giordano, Stefano; Churbanov, Anton; Mathurin, Theo; Pernod, Philippe; Sigov, Alexander

2018-08-01

Stress-mediated magnetoelectric heterostructures represent a very promising approach for the realization of ultra-low energy Random Access Memories. The magnetoelectric writing of information has been extensively studied in the past, but it was demonstrated only recently that the magnetoelectric effect can also provide means for reading the stored information. We hereby theoretically study the dynamic behaviour of a magnetoelectric random access memory cell (MELRAM) typically composed of a magnetostrictive multilayer N × (TbCo2 / FeCo) that is elastically coupled with a 〈0 1 1〉 PMN-PT ferroelectric crystal and placed in a Wheatstone bridge-like configuration. The numerical resolution of the LLG and electrodynamics equation system demonstrates high speed write and read operations with an associated extra-low energy consumption. In this model, the reading energy for a 50 nm cell size is estimated to be less than 5 aJ/bit.

Single Event Upset in Static Random Access Memories in Atmospheric Neutron Environments

NASA Astrophysics Data System (ADS)

Arita, Yutaka; Takai, Mikio; Ogawa, Izumi; Kishimoto, Tadafumi

2003-07-01

Single-event upsets (SEUs) in a 0.4 μm 4 Mbit complementary metal oxide semiconductor (CMOS) static random access memory (SRAM) were investigated in various atmospheric neutron environments at sea level, at an altitude of 2612 m mountain, at an altitude of commercial airplane, and at an underground depth of 476 m. Neutron-induced SEUs increase with the increase in altitude. For a device with a borophosphosilicate glass (BPSG) film, SEU rates induced by thermal neutrons increase with the decrease in the cell charge of a memory cell. A thermal neutron-induced SEU is significant in SRAMs with a small cell charge. With the conditions of small cell charge, thermal neutron-induced SEUs account for 60% or more of the total neutron-induced SEUs. The SEU rate induced by atmospheric thermal neutrons can be estimated by an acceleration test using 252Cf.

Quantifying data retention of perpendicular spin-transfer-torque magnetic random access memory chips using an effective thermal stability factor method

DOE Office of Scientific and Technical Information (OSTI.GOV)

Thomas, Luc, E-mail: luc.thomas@headway.com; Jan, Guenole; Le, Son

The thermal stability of perpendicular Spin-Transfer-Torque Magnetic Random Access Memory (STT-MRAM) devices is investigated at chip level. Experimental data are analyzed in the framework of the Néel-Brown model including distributions of the thermal stability factor Δ. We show that in the low error rate regime important for applications, the effect of distributions of Δ can be described by a single quantity, the effective thermal stability factor Δ{sub eff}, which encompasses both the median and the standard deviation of the distributions. Data retention of memory chips can be assessed accurately by measuring Δ{sub eff} as a function of device diameter andmore » temperature. We apply this method to show that 54 nm devices based on our perpendicular STT-MRAM design meet our 10 year data retention target up to 120 °C.« less

Announcing Supercomputer Summit

ScienceCinema

Wells, Jack; Bland, Buddy; Nichols, Jeff; Hack, Jim; Foertter, Fernanda; Hagen, Gaute; Maier, Thomas; Ashfaq, Moetasim; Messer, Bronson; Parete-Koon, Suzanne

2018-01-16

Summit is the next leap in leadership-class computing systems for open science. With Summit we will be able to address, with greater complexity and higher fidelity, questions concerning who we are, our place on earth, and in our universe. Summit will deliver more than five times the computational performance of Titan’s 18,688 nodes, using only approximately 3,400 nodes when it arrives in 2017. Like Titan, Summit will have a hybrid architecture, and each node will contain multiple IBM POWER9 CPUs and NVIDIA Volta GPUs all connected together with NVIDIA’s high-speed NVLink. Each node will have over half a terabyte of coherent memory (high bandwidth memory + DDR4) addressable by all CPUs and GPUs plus 800GB of non-volatile RAM that can be used as a burst buffer or as extended memory. To provide a high rate of I/O throughput, the nodes will be connected in a non-blocking fat-tree using a dual-rail Mellanox EDR InfiniBand interconnect. Upon completion, Summit will allow researchers in all fields of science unprecedented access to solving some of the world’s most pressing challenges.

Sub-1-V-60 nm vertical body channel MOSFET-based six-transistor static random access memory array with wide noise margin and excellent power delay product and its optimization with the cell ratio on static random access memory cell

NASA Astrophysics Data System (ADS)

Ogasawara, Ryosuke; Endoh, Tetsuo

2018-04-01

In this study, with the aim to achieve a wide noise margin and an excellent power delay product (PDP), a vertical body channel (BC)-MOSFET-based six-transistor (6T) static random access memory (SRAM) array is evaluated by changing the number of pillars in each part of a SRAM cell, that is, by changing the cell ratio in the SRAM cell. This 60 nm vertical BC-MOSFET-based 6T SRAM array realizes 0.84 V operation under the best PDP and up to 31% improvement of PDP compared with the 6T SRAM array based on a 90 nm planar MOSFET whose gate length and channel width are the same as those of the 60 nm vertical BC-MOSFET. Additionally, the vertical BC-MOSFET-based 6T SRAM array achieves an 8.8% wider read static noise margin (RSNM), a 16% wider write margin (WM), and an 89% smaller leakage. Moreover, it is shown that changing the cell ratio brings larger improvements of RSNM, WM, and write time in the vertical BC-MOSFET-based 6T SRAM array.

[Artificial intelligence meeting neuropsychology. Semantic memory in normal and pathological aging].

PubMed

Aimé, Xavier; Charlet, Jean; Maillet, Didier; Belin, Catherine

2015-03-01

Artificial intelligence (IA) is the subject of much research, but also many fantasies. It aims to reproduce human intelligence in its learning capacity, knowledge storage and computation. In 2014, the Defense Advanced Research Projects Agency (DARPA) started the restoring active memory (RAM) program that attempt to develop implantable technology to bridge gaps in the injured brain and restore normal memory function to people with memory loss caused by injury or disease. In another IA's field, computational ontologies (a formal and shared conceptualization) try to model knowledge in order to represent a structured and unambiguous meaning of the concepts of a target domain. The aim of these structures is to ensure a consensual understanding of their meaning and a univariant use (the same concept is used by all to categorize the same individuals). The first representations of knowledge in the AI's domain are largely based on model tests of semantic memory. This one, as a component of long-term memory is the memory of words, ideas, concepts. It is the only declarative memory system that resists so remarkably to the effects of age. In contrast, non-specific cognitive changes may decrease the performance of elderly in various events and instead report difficulties of access to semantic representations that affect the semantics stock itself. Some dementias, like semantic dementia and Alzheimer's disease, are linked to alteration of semantic memory. We propose in this paper, using the computational ontologies model, a formal and relatively thin modeling, in the service of neuropsychology: 1) for the practitioner with decision support systems, 2) for the patient as cognitive prosthesis outsourced, and 3) for the researcher to study semantic memory.

Comparing interfertility data with random amplified microsatellites DNA (RAMS) studies in Ganoderma Karst. Taxonomy.

PubMed

Nudin, Nur Fatihah Hasan; S, Siddiquee

2012-03-01

The taxonomy of the causal pathogen of basal stem rot of oil palms, Ganoderma is somewhat problematic at present. In order to determine the genetic distance relationship between G. boninense isolates and non-boninense isolates, a random amplified microsatellites DNA (RAMS) technique was carried out. The result was then compared with interfertility data of G. boninense that had been determined in previous mating studies to confirm the species of G. boninense. Dendrogram from cluster analysis based on UPGMA of RAMS data showed that two major clusters, I and II which separated at a genetic distance of 0.7935 were generated. Cluster I consisted of all the biological species G. boninense isolates namely CNLB, GSDK 3, PER 71, WD 814, GBL 3, GBL 6, OC, GH 02, 170 SL and 348781 while all non-boninense isolates namely G. ASAM, WRR, TFRI 129, G. RES, GJ, and CNLM were grouped together in cluster II. Although the RAMS markers showed polymorphisms in all the isolates tested, the results obtained were in agreement with the interfertility data. Therefore, the RAMS data could support the interfertility data for the identification of Ganoderma isolates.

Feasibilty of a Multi-bit Cell Perpendicular Magnetic Tunnel Junction Device

NASA Astrophysics Data System (ADS)

Kim, Chang Soo

The ultimate objective of this research project was to explore the feasibility of making a multi-bit cell perpendicular magnetic tunnel junction (PMTJ) device to increase the storage density of spin-transfer-torque random access memory (STT-RAM). As a first step toward demonstrating a multi-bit cell device, this dissertation contributed a systematic and detailed study of developing a single cell PMTJ device using L10 FePt films. In the beginning of this research, 13 up-and-coming non-volatile memory (NVM) technologies were investigated and evaluated to see whether one of them might outperform NAND flash memories and even HDDs on a cost-per-TB basis in 2020. This evaluation showed that STT-RAM appears to potentially offer superior power efficiency, among other advantages. It is predicted that STTRAM's density could make it a promising candidate for replacing NAND flash memories and possibly HDDs if STTRAM could be improved to store multiple bits per cell. Ta/Mg0 under-layers were used first in order to develop (001) L1 0 ordering of FePt at a low temperature of below 400 °C. It was found that the tradeoff between surface roughness and (001) L10 ordering of FePt makes it difficult to achieve low surface roughness and good perpendicular magnetic properties simultaneously when Ta/Mg0 under-layers are used. It was, therefore, decided to investigate MgO/CrRu under-layers to simultaneously achieve smooth films with good ordering below 400°C. A well ordered 4 nm L10 FePt film with RMS surface roughness close to 0.4 nm, perpendicular coercivity of about 5 kOe, and perpendicular squareness near 1 was obtained at a deposition temperature of 390 °C on a thermally oxidized Si substrate when MgO/CrRu under-layers are used. A PMTJ device was developed by depositing a thin MgO tunnel barrier layer and a top L10 FePt film and then being postannealed at 450 °C for 30 minutes. It was found that the sputtering power needs to be minimized during the thin MgO tunnel barrier deposition because the high sputtering power can degrade perpendicular magnetic anisotropy of the bottom L1 0 FePt film and also increase RMS film surface roughness of the MgO tunnel barrier layer. From a lithographically unpatterned PMTJ sample, MR ratio and RA were measured at room temperature by the CIPT method and found to be 138% and 6.4 kOmicrom2, respectively. A completed PMTJ test pattern with a junction size of 80x40 microm2 was fabricated and showed a measured MR ratio and RA product of 108% and 4~6 kOmicrom 2, respectively. These values agree relatively well with the corresponding values of 138% and 6.4 kOmicrom2 obtained from the unpatterned PMTJ sample measured by a current-in-plane tunneling (CIPT) method.

Rutger's CAM2000 chip architecture

NASA Technical Reports Server (NTRS)

Smith, Donald E.; Hall, J. Storrs; Miyake, Keith

1993-01-01

This report describes the architecture and instruction set of the Rutgers CAM2000 memory chip. The CAM2000 combines features of Associative Processing (AP), Content Addressable Memory (CAM), and Dynamic Random Access Memory (DRAM) in a single chip package that is not only DRAM compatible but capable of applying simple massively parallel operations to memory. This document reflects the current status of the CAM2000 architecture and is continually updated to reflect the current state of the architecture and instruction set.

Fencing direct memory access data transfers in a parallel active messaging interface of a parallel computer

DOEpatents

Blocksome, Michael A.; Mamidala, Amith R.

2013-09-03

Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to segments of shared random access memory through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and a segment of shared memory; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.

Fencing direct memory access data transfers in a parallel active messaging interface of a parallel computer

DOEpatents

Blocksome, Michael A; Mamidala, Amith R

2014-02-11

Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to segments of shared random access memory through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and a segment of shared memory; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.

Computer hardware for radiologists: Part 2

PubMed Central

Indrajit, IK; Alam, A

2010-01-01

Computers are an integral part of modern radiology equipment. In the first half of this two-part article, we dwelt upon some fundamental concepts regarding computer hardware, covering components like motherboard, central processing unit (CPU), chipset, random access memory (RAM), and memory modules. In this article, we describe the remaining computer hardware components that are of relevance to radiology. “Storage drive” is a term describing a “memory” hardware used to store data for later retrieval. Commonly used storage drives are hard drives, floppy drives, optical drives, flash drives, and network drives. The capacity of a hard drive is dependent on many factors, including the number of disk sides, number of tracks per side, number of sectors on each track, and the amount of data that can be stored in each sector. “Drive interfaces” connect hard drives and optical drives to a computer. The connections of such drives require both a power cable and a data cable. The four most popular “input/output devices” used commonly with computers are the printer, monitor, mouse, and keyboard. The “bus” is a built-in electronic signal pathway in the motherboard to permit efficient and uninterrupted data transfer. A motherboard can have several buses, including the system bus, the PCI express bus, the PCI bus, the AGP bus, and the (outdated) ISA bus. “Ports” are the location at which external devices are connected to a computer motherboard. All commonly used peripheral devices, such as printers, scanners, and portable drives, need ports. A working knowledge of computers is necessary for the radiologist if the workflow is to realize its full potential and, besides, this knowledge will prepare the radiologist for the coming innovations in the ‘ever increasing’ digital future. PMID:21423895

E-field induced resistive switch in metal/praseodymium calcium manganite interfaces: A model for future nonvolatile memory devices

NASA Astrophysics Data System (ADS)

Das, Nilanjan

Among the various candidates for non-volatile random access memory (RAM), interfacial resistive switch in Ag/Pr0.7Ca0.3 MnO3 (PCMO) configuration has drawn major attention in recent years due to its potential as a high storage density (˜ terabyte) device. However, the diverse nature of the resistive switch in different systems makes the development of a unifying model for its underlying physics very difficult. This dissertation will address both issues, namely, characterization of switches for device applications and development of a system-independent generic model, in detail. In our work, we have studied the properties electric pulse induced interfacial switch in electrode/PCMO system. A very fast speed ("write speed") of 100 ns, threshold ("programming voltage") as low as 2 V (for micro electrodes), and non-volatility ("data retention") of switched states have been achieved. A clear distinction between fast switch and sub-threshold slow quasistatic-dc switch has been made. Results obtained from time-dependence studies and impedance spectroscopy suggest that defect creation/annihilation, such as broken bonds (under very high field at interface, 107V/cm), is likely the mechanism for the sub-micros fast switching. On the other hand, slow accumulative process, such as electromigration of point defects, are responsible for the subthreshold quasi-dc switch. Scanning probe imaging has revealed the nanoscale inhomogeneity of the switched surfaces, essential for observing a resistive switch. Evolution of such structures has been observed under surface pre-training. Device scalability has been tested by creating reversible modification of surface conductivities with atomic force microscopy, thus creating the "nano-switch" (limited to a region of 10--100 nm).

Demonstration of the Potential of Magnetic Tunnel Junctions for a Universal RAM Technology

NASA Astrophysics Data System (ADS)

Gallagher, William J.

2000-03-01

Over the past four years, tunnel junctions with magnetic electrodes have emerged as promising devices for future magnetoresistive sensing and for information storage. This talk will review advances in these devices, focusing particularly on the use of magnetic tunnel junctions for magnetic random access memory (MRAM). Exchange-biased versions of magnetic tunnel junctions (MTJs) in particular will be shown to have useful properties for forming magnetic memory storage elements in a novel cross-point architecture. Exchange-biased MTJ elements have been made with areas as small as 0.1 square microns and have shown magnetoresistance values exceeding 40 The potential of exchange-biased MTJs for MRAM has been most seriously explored in a demonstration experiment involving the integration of 0.25 micron CMOS technology with a special magnetic tunnel junction "back end." The magnetic back end is based upon multi-layer magnetic tunnel junction growth technology which was developed using research-scale equipment and one-inch size substrates. For the demonstration, the CMOS wafers processed through two metal layers were cut into one-inch squares for depositions of bottom-pinned exchange-biased magnetic tunnel junctions. The samples were then processed through four additional lithographic levels to complete the circuits. The demonstration focused attention on a number of processing and device issues that were addressed successfully enough that key performance aspects of MTJ MRAM were demonstrated in 1 K bit arrays, including reads and writes in less than 10 ns and nonvolatility. While other key issues remain to be addressed, these results suggest that MTJ MRAM might simultaneously provide much of the functionality now provided separately by SRAM, DRAM, and NVRAM.

The storage system of PCM based on random access file system

NASA Astrophysics Data System (ADS)

Han, Wenbing; Chen, Xiaogang; Zhou, Mi; Li, Shunfen; Li, Gezi; Song, Zhitang

2016-10-01

Emerging memory technologies such as Phase change memory (PCM) tend to offer fast, random access to persistent storage with better scalability. It's a hot topic of academic and industrial research to establish PCM in storage hierarchy to narrow the performance gap. However, the existing file systems do not perform well with the emerging PCM storage, which access storage medium via a slow, block-based interface. In this paper, we propose a novel file system, RAFS, to bring about good performance of PCM, which is built in the embedded platform. We attach PCM chips to the memory bus and build RAFS on the physical address space. In the proposed file system, we simplify traditional system architecture to eliminate block-related operations and layers. Furthermore, we adopt memory mapping and bypassed page cache to reduce copy overhead between the process address space and storage device. XIP mechanisms are also supported in RAFS. To the best of our knowledge, we are among the first to implement file system on real PCM chips. We have analyzed and evaluated its performance with IOZONE benchmark tools. Our experimental results show that the RAFS on PCM outperforms Ext4fs on SDRAM with small record lengths. Based on DRAM, RAFS is significantly faster than Ext4fs by 18% to 250%.

Spin-transfer-torque efficiency enhanced by edge-damage of perpendicular magnetic random access memories

DOE Office of Scientific and Technical Information (OSTI.GOV)

Song, Kyungmi; Lee, Kyung-Jin, E-mail: kj-lee@korea.ac.kr; Department of Materials Science and Engineering, Korea University, Seoul 136-713

2015-08-07

We numerically investigate the effect of magnetic and electrical damages at the edge of a perpendicular magnetic random access memory (MRAM) cell on the spin-transfer-torque (STT) efficiency that is defined by the ratio of thermal stability factor to switching current. We find that the switching mode of an edge-damaged cell is different from that of an undamaged cell, which results in a sizable reduction in the switching current. Together with a marginal reduction of the thermal stability factor of an edge-damaged cell, this feature makes the STT efficiency large. Our results suggest that a precise edge control is viable formore » the optimization of STT-MRAM.« less

Multi-step resistive switching behavior of Li-doped ZnO resistance random access memory device controlled by compliance current

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lin, Chun-Cheng; Department of Mathematic and Physical Sciences, R.O.C. Air Force Academy, Kaohsiung 820, Taiwan; Tang, Jian-Fu

2016-06-28

The multi-step resistive switching (RS) behavior of a unipolar Pt/Li{sub 0.06}Zn{sub 0.94}O/Pt resistive random access memory (RRAM) device is investigated. It is found that the RRAM device exhibits normal, 2-, 3-, and 4-step RESET behaviors under different compliance currents. The transport mechanism within the device is investigated by means of current-voltage curves, in-situ transmission electron microscopy, and electrochemical impedance spectroscopy. It is shown that the ion transport mechanism is dominated by Ohmic behavior under low electric fields and the Poole-Frenkel emission effect (normal RS behavior) or Li{sup +} ion diffusion (2-, 3-, and 4-step RESET behaviors) under high electric fields.

Comparison and statistical analysis of four write stability metrics in bulk CMOS static random access memory cells

NASA Astrophysics Data System (ADS)

Qiu, Hao; Mizutani, Tomoko; Saraya, Takuya; Hiramoto, Toshiro

2015-04-01

The commonly used four metrics for write stability were measured and compared based on the same set of 2048 (2k) six-transistor (6T) static random access memory (SRAM) cells by the 65 nm bulk technology. The preferred one should be effective for yield estimation and help predict edge of stability. Results have demonstrated that all metrics share the same worst SRAM cell. On the other hand, compared to butterfly curve with non-normality and write N-curve where no cell state flip happens, bit-line and word-line margins have good normality as well as almost perfect correlation. As a result, both bit line method and word line method prove themselves preferred write stability metrics.

Parallel Optical Random Access Memory (PORAM)

NASA Technical Reports Server (NTRS)

Alphonse, G. A.

1989-01-01

It is shown that the need to minimize component count, power and size, and to maximize packing density require a parallel optical random access memory to be designed in a two-level hierarchy: a modular level and an interconnect level. Three module designs are proposed, in the order of research and development requirements. The first uses state-of-the-art components, including individually addressed laser diode arrays, acousto-optic (AO) deflectors and magneto-optic (MO) storage medium, aimed at moderate size, moderate power, and high packing density. The next design level uses an electron-trapping (ET) medium to reduce optical power requirements. The third design uses a beam-steering grating surface emitter (GSE) array to reduce size further and minimize the number of components.

Deviation from the law of energy equipartition in a small dynamic-random-access memory

NASA Astrophysics Data System (ADS)

Carles, Pierre-Alix; Nishiguchi, Katsuhiko; Fujiwara, Akira

2015-06-01

A small dynamic-random-access memory (DRAM) coupled with a high charge sensitivity electrometer based on a silicon field-effect transistor is used to study the law of equipartition of energy. By statistically analyzing the movement of single electrons in the DRAM at various temperature and voltage conditions in thermal equilibrium, we are able to observe a behavior that differs from what is predicted by the law of equipartition energy: when the charging energy of the capacitor of the DRAM is comparable to or smaller than the thermal energy kBT/2, random electron motion is ruled perfectly by thermal energy; on the other hand, when the charging energy becomes higher in relation to the thermal energy kBT/2, random electron motion is suppressed which indicates a deviation from the law of equipartition of energy. Since the law of equipartition is analyzed using the DRAM, one of the most familiar devices, we believe that our results are perfectly universal among all electronic devices.

Low-power resistive random access memory by confining the formation of conducting filaments

DOE Office of Scientific and Technical Information (OSTI.GOV)

Huang, Yi-Jen; Lee, Si-Chen, E-mail: sclee@ntu.edu.tw; Shen, Tzu-Hsien

2016-06-15

Owing to their small physical size and low power consumption, resistive random access memory (RRAM) devices are potential for future memory and logic applications in microelectronics. In this study, a new resistive switching material structure, TiO{sub x}/silver nanoparticles/TiO{sub x}/AlTiO{sub x}, fabricated between the fluorine-doped tin oxide bottom electrode and the indium tin oxide top electrode is demonstrated. The device exhibits excellent memory performances, such as low operation voltage (<±1 V), low operation power, small variation in resistance, reliable data retention, and a large memory window. The current-voltage measurement shows that the conducting mechanism in the device at the high resistancemore » state is via electron hopping between oxygen vacancies in the resistive switching material. When the device is switched to the low resistance state, conducting filaments are formed in the resistive switching material as a result of accumulation of oxygen vacancies. The bottom AlTiO{sub x} layer in the device structure limits the formation of conducting filaments; therefore, the current and power consumption of device operation are significantly reduced.« less

Spin-transfer torque switched magnetic tunnel junctions in magnetic random access memory

NASA Astrophysics Data System (ADS)

Sun, Jonathan Z.

2016-10-01

Spin-transfer torque (or spin-torque, or STT) based magnetic tunnel junction (MTJ) is at the heart of a new generation of magnetism-based solid-state memory, the so-called spin-transfer-torque magnetic random access memory, or STT-MRAM. Over the past decades, STT-based switchable magnetic tunnel junction has seen progress on many fronts, including the discovery of (001) MgO as the most favored tunnel barrier, which together with (bcc) Fe or FeCo alloy are yielding best demonstrated tunnel magneto-resistance (TMR); the development of perpendicularly magnetized ultrathin CoFeB-type of thin films sufficient to support high density memories with junction sizes demonstrated down to 11nm in diameter; and record-low spin-torque switching threshold current, giving best reported switching efficiency over 5 kBT/μA. Here we review the basic device properties focusing on the perpendicularly magnetized MTJs, both in terms of switching efficiency as measured by sub-threshold, quasi-static methods, and of switching speed at super-threshold, forced switching. We focus on device behaviors important for memory applications that are rooted in fundamental device physics, which highlights the trade-off of device parameters for best suitable system integration.

Effect of embedded metal nanocrystals on the resistive switching characteristics in NiN-based resistive random access memory cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yun, Min Ju; Kim, Hee-Dong; Man Hong, Seok

2014-03-07

The metal nanocrystals (NCs) embedded-NiN-based resistive random access memory cells are demonstrated using several metal NCs (i.e., Pt, Ni, and Ti) with different physical parameters in order to investigate the metal NC's dependence on resistive switching (RS) characteristics. First, depending on the electronegativity of metal, the size of metal NCs is determined and this affects the operating current of memory cells. If metal NCs with high electronegativity are incorporated, the size of the NCs is reduced; hence, the operating current is reduced owing to the reduced density of the electric field around the metal NCs. Second, the potential wells aremore » formed by the difference of work function between the metal NCs and active layer, and the barrier height of the potential wells affects the level of operating voltage as well as the conduction mechanism of metal NCs embedded memory cells. Therefore, by understanding these correlations between the active layer and embedded metal NCs, we can optimize the RS properties of metal NCs embedded memory cells as well as predict their conduction mechanisms.« less

Memory deficits associated with sublethal cyanide poisoning relative to cyanate toxicity in rodents.

PubMed

Kimani, S; Sinei, K; Bukachi, F; Tshala-Katumbay, D; Maitai, C

2014-03-01

Food (cassava) linamarin is metabolized into neurotoxicants cyanide and cyanate, metabolites of which we sought to elucidate the differential toxicity effects on memory. Young 6-8 weeks old male rats were treated intraperitoneally with either 2.5 mg/kg body weight (bw) cyanide (NaCN), or 50 mg/kg bw cyanate (NaOCN), or 1 μl/g bw saline, daily for 6 weeks. Short-term and long-term memories were assessed using a radial arm maze (RAM) testing paradigm. Toxic exposures had an influence on short-term working memory with fewer correct arm entries (F(2, 19) = 4.57 p < 0.05), higher working memory errors (WME) (F(2, 19) = 5.09, p < 0.05) and longer RAM navigation time (F(2, 19) = 3.91, p < 0.05) for NaOCN relative to NaCN and saline treatments. The long-term working memory was significantly impaired by cyanide with fewer correct arm entries (F(2, 19) = 7.45, p < 0.01) and increased working memory errors (F(2, 19) = 9.35 p < 0.05) in NaCN relative to NaOCN or vehicle treated animals. Reference memory was not affected by either cyanide or cyanate. Our study findings provide an experimental evidence for the biological plausibility that cassava cyanogens may induce cognition deficits. Differential patterns of memory deficits may reflect the differences in toxicity mechanisms of NaOCN relative to NaCN. Cognition deficits associated with cassava cyanogenesis may reflect a dual toxicity effect of cyanide and cyanate.

Memory deficits associated with sublethal cyanide poisoning relative to cyanate toxicity in rodents

PubMed Central

Kimani, S.; Sinei, K.; Bukachi, F.; Tshala-Katumbay, D.; Maitai, C.

2014-01-01

Background Food (cassava) linamarin is metabolized into neurotoxicants cyanide and cyanate, metabolites of which we sought to elucidate the differential toxicity effects on memory. Methods Young 6-8 weeks old male rats were treated intraperitoneally with either 2.5 mg/kg body weight (bw) cyanide (NaCN), or 50 mg/kg bw cyanate (NaOCN), or 1 μl/g bw saline, daily for 6 weeks. Short-term and long-term memories were assessed using a radial arm maze (RAM) testing paradigm. Results Toxic exposures had an influence on short-term working memory with fewer correct arm entries (F 2, 19 = 4.57 p <0.05), higher working memory errors (WME) (F 2, 19 = 5.09, p <0.05) and longer RAM navigation time (F2, 19 = 3.91, p <0.05) for NaOCN relative to NaCN and saline treatments. The long-term working memory was significantly impaired by cyanide with fewer correct arm entries (F 2, 19 = 7.45, p <0.01) and increased working memory errors (F 2, 19 = 9.35 p <0.05) in NaCN relative to NaOCN or vehicle treated animals. Reference memory was not affected by either cyanide or cyanate. Conclusion Our study findings provide an experimental evidence for the biological plausibility that cassava cyanogens may induce cognition deficits. Differential patterns of memory deficits may reflect the differences in toxicity mechanisms of NaOCN relative to NaCN. Cognition deficits associated with cassava cyanogenesis may reflect a dual toxicity effect of cyanide and cyanate. PMID:24293006

Rare emergence of drug resistance in HIV-1 treatment-naïve patients after 48 weeks of treatment with elvitegravir/cobicistat/emtricitabine/tenofovir alafenamide.

PubMed

Margot, Nicolas A; Kitrinos, Kathryn M; Fordyce, Marshall; McCallister, Scott; Miller, Michael D; Callebaut, Christian

2016-03-01

Tenofovir alafenamide (TAF), a novel prodrug of the NtRTI tenofovir (TFV), delivers TFV-diphosphate (TFV-DP) to target cells more efficiently than the current prodrug, tenofovir disoproxil fumarate (TDF), with a 90% reduction in TFV plasma exposure. TAF, within the fixed dose combination of elvitegravir /cobicistat / emtricitabine (FTC)/TAF (E/C/F/TAF), has been evaluated in one Phase 2 and two Phase 3 randomized, double-blinded studies in HIV-infected treatment-naive patients, comparing E/C/F/TAF to E/C/F/TDF. In these studies, the TAF-containing group demonstrated non-inferior efficacy to the TDF-containing comparator group with 91.9% of E/C/F/TAF patients having <50 copies/mL of HIV-1 RNA at week 48. An integrated resistance analysis across these three studies was conducted, including HIV-1 genotypic analysis at screening, and genotypic/phenotypic analysis for patients with HIV-1 RNA>400 copies/mL at virologic failure. Pre-existing primary resistance-associated mutations (RAMs) were observed at screening among the 1903 randomized and treated patients: 7.5% had NRTI-RAMs, 18.2% had NNRTI-RAMs, and 3.4% had primary PI-RAMs. Pre-treatment RAMs did not influence treatment response at Week 48. In the E/C/F/TAF group, resistance development was rare; seven patients (0.7%, 7/978) developed NRTI-RAMs, five of whom (0.5%, 5/978) also developed primary INSTI-RAMs. In the E/C/F/TDF group, resistance development was also rare; seven patients (0.8%, 7/925) developed NRTI-RAMs, four of whom (0.4%, 4/925) also developed primary INSTI-RAMs. An additional analysis by deep sequencing in virologic failures revealed minimal differences compared to population sequencing. Overall, resistance development was rare in E/C/F/TAF-treated patients, and the pattern of emergent mutations was similar to E/C/F/TDF.

Nonvolatile Memory Technology for Space Applications

NASA Technical Reports Server (NTRS)

Oldham, Timothy R.; Irom, Farokh; Friendlich, Mark; Nguyen, Duc; Kim, Hak; Berg, Melanie; LaBel, Kenneth A.

2010-01-01

This slide presentation reviews several forms of nonvolatile memory for use in space applications. The intent is to: (1) Determine inherent radiation tolerance and sensitivities, (2) Identify challenges for future radiation hardening efforts, (3) Investigate new failure modes and effects, and technology modeling programs. Testing includes total dose, single event (proton, laser, heavy ion), and proton damage (where appropriate). Test vehicles are expected to be a variety of non-volatile memory devices as available including Flash (NAND and NOR), Charge Trap, Nanocrystal Flash, Magnetic Memory (MRAM), Phase Change--Chalcogenide, (CRAM), Ferroelectric (FRAM), CNT, and Resistive RAM.

Toward early estimation and treatment of addiction vulnerability: radial arm maze and N-acetyl cysteine before cocaine sensitization or nicotine self-administration in neonatal ventral hippocampal lesion rats.

PubMed

Rao, Kalyan N; Sentir, Alena M; Engleman, Eric A; Bell, Richard L; Hulvershorn, Leslie A; Breier, Alan; Chambers, R Andrew

2016-12-01

Prefrontal cortical (PFC)-hippocampal-striatal circuits, interconnected via glutamatergic signaling, are dysfunctional in mental illnesses that involve addiction vulnerability. In healthy and neurodevelopmentally altered rats, we examined how Radial Arm Maze (RAM) performance estimates addiction vulnerability, and how starting a glutamatergic modulating agent, N-acetyl cysteine (NAC) in adolescence alters adult mental illness and/or addiction phenotypes. Rats with neonatal ventral hippocampal lesions (NVHL) vs. SHAM-operated controls were randomized to NAC vs. saline in adolescence followed by cognitive testing (RAM) in early adulthood and then cocaine behavioral sensitization (experiment 1; n = 80) or nicotine self-administration (experiment 2; n = 12). In experiment 1, NVHL rats showed over-consumption of food (Froot-Loops (FL)) baiting the RAM with poor working memory (low-arm entries to repeat (ETR)), producing an elevated FL to ETR ratio ("FLETR"; p < 0.001). FLETR was the best linear estimator (compared to FL or ETR) of magnitude of long-term cocaine sensitization (R 2  = 0.14, p < 0.001). NAC treatment did not alter FL, ETR, FLETR, or cocaine sensitization. In experiment 2, FLETR also significantly and uniquely correlated with subsequent drug seeking during nicotine-induced reinstatement after extinction of nicotine self-administration (R 2  = 0.47, p < 0.01). NAC did not alter RAM performance, but significantly reversed NVHL-induced increases in nicotine seeking during extinction and reinstatement. These findings demonstrate the utility of animal models of mental illness with addiction vulnerability for developing novel diagnostic measures of PFC-hippocampal-striatal circuit dysfunction that may reflect addiction risk. Such tests may direct pharmacological treatments prior to adulthood and addictive drug exposure, to prevent or treat adult addictions.

CoNNeCT Baseband Processor Module

NASA Technical Reports Server (NTRS)

Yamamoto, Clifford K; Jedrey, Thomas C.; Gutrich, Daniel G.; Goodpasture, Richard L.

2011-01-01

A document describes the CoNNeCT Baseband Processor Module (BPM) based on an updated processor, memory technology, and field-programmable gate arrays (FPGAs). The BPM was developed from a requirement to provide sufficient computing power and memory storage to conduct experiments for a Software Defined Radio (SDR) to be implemented. The flight SDR uses the AT697 SPARC processor with on-chip data and instruction cache. The non-volatile memory has been increased from a 20-Mbit EEPROM (electrically erasable programmable read only memory) to a 4-Gbit Flash, managed by the RTAX2000 Housekeeper, allowing more programs and FPGA bit-files to be stored. The volatile memory has been increased from a 20-Mbit SRAM (static random access memory) to a 1.25-Gbit SDRAM (synchronous dynamic random access memory), providing additional memory space for more complex operating systems and programs to be executed on the SPARC. All memory is EDAC (error detection and correction) protected, while the SPARC processor implements fault protection via TMR (triple modular redundancy) architecture. Further capability over prior BPM designs includes the addition of a second FPGA to implement features beyond the resources of a single FPGA. Both FPGAs are implemented with Xilinx Virtex-II and are interconnected by a 96-bit bus to facilitate data exchange. Dedicated 1.25- Gbit SDRAMs are wired to each Xilinx FPGA to accommodate high rate data buffering for SDR applications as well as independent SpaceWire interfaces. The RTAX2000 manages scrub and configuration of each Xilinx.

Naringenin improves learning and memory in an Alzheimer's disease rat model: Insights into the underlying mechanisms.

PubMed

Ghofrani, Saeed; Joghataei, Mohammad-Taghi; Mohseni, Simin; Baluchnejadmojarad, Tourandokht; Bagheri, Maryam; Khamse, Safoura; Roghani, Mehrdad

2015-10-05

Alzheimer's disease (AD) is one of the prevalent neurological disorders of the central nervous system hallmarked by increased beta-amyloid (Aβ) deposition and ensuing learning and memory deficit. In the present study, the beneficial effect of naringenin on improvement of learning and memory was evaluated in an Alzheimer's disease rat model. The Aβ-injected rats showed a lower alternation score in Y-maze task, impairment of retention and recall capability in passive avoidance test, and lower correct choices and higher errors in radial arm maze (RAM) task as compared to sham group in addition to enhanced oxidative stress and apoptosis. Naringenin, but not a combination of naringenin and fulvestrant (an estrogenic receptor antagonist) significantly improved the performance of Aβ-injected rats in passive avoidance and RAM tasks. Naringenin pretreatment of Aβ-injected rats also lowered hippocampal malondialdehyde (MDA) with no significant effect on nitrite and superoxide dismutase (SOD) activity in addition to lowering apoptosis. These results suggest naringenin pretreatment attenuates Aβ-induced impairment of learning and memory through mitigation of lipid peroxidation and apoptosis and its beneficial effect is somewhat mediated via estrogenic pathway. Copyright © 2015 Elsevier B.V. All rights reserved.

Plated wire memory subsystem

NASA Technical Reports Server (NTRS)

Carpenter, K. H.

1974-01-01

The design, construction, and test history of a 4096 word by 18 bit random access NDRO Plated Wire Memory for use in conjunction with a spacecraft input/output and central processing unit is reported. A technical and functional description is given along with diagrams illustrating layout and systems operation. Test data is shown on the procedures and results of system level and memory stack testing, and hybrid circuit screening. A comparison of the most significant physical and performance characteristics of the memory unit versus the specified requirements is also included.

Kanerva's sparse distributed memory: An associative memory algorithm well-suited to the Connection Machine

NASA Technical Reports Server (NTRS)

Rogers, David

1988-01-01

The advent of the Connection Machine profoundly changes the world of supercomputers. The highly nontraditional architecture makes possible the exploration of algorithms that were impractical for standard Von Neumann architectures. Sparse distributed memory (SDM) is an example of such an algorithm. Sparse distributed memory is a particularly simple and elegant formulation for an associative memory. The foundations for sparse distributed memory are described, and some simple examples of using the memory are presented. The relationship of sparse distributed memory to three important computational systems is shown: random-access memory, neural networks, and the cerebellum of the brain. Finally, the implementation of the algorithm for sparse distributed memory on the Connection Machine is discussed.

Optoelectronic-cache memory system architecture.

PubMed

Chiarulli, D M; Levitan, S P

1996-05-10

We present an investigation of the architecture of an optoelectronic cache that can integrate terabit optical memories with the electronic caches associated with high-performance uniprocessors and multiprocessors. The use of optoelectronic-cache memories enables these terabit technologies to provide transparently low-latency secondary memory with frame sizes comparable with disk pages but with latencies that approach those of electronic secondary-cache memories. This enables the implementation of terabit memories with effective access times comparable with the cycle times of current microprocessors. The cache design is based on the use of a smart-pixel array and combines parallel free-space optical input-output to-and-from optical memory with conventional electronic communication to the processor caches. This cache and the optical memory system to which it will interface provide a large random-access memory space that has a lower overall latency than that of magnetic disks and disk arrays. In addition, as a consequence of the high-bandwidth parallel input-output capabilities of optical memories, fault service times for the optoelectronic cache are substantially less than those currently achievable with any rotational media.

EqualChance: Addressing Intra-set Write Variation to Increase Lifetime of Non-volatile Caches

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mittal, Sparsh; Vetter, Jeffrey S

To address the limitations of SRAM such as high-leakage and low-density, researchers have explored use of non-volatile memory (NVM) devices, such as ReRAM (resistive RAM) and STT-RAM (spin transfer torque RAM) for designing on-chip caches. A crucial limitation of NVMs, however, is that their write endurance is low and the large intra-set write variation introduced by existing cache management policies may further exacerbate this problem, thereby reducing the cache lifetime significantly. We present EqualChance, a technique to increase cache lifetime by reducing intra-set write variation. EqualChance works by periodically changing the physical cache-block location of a write-intensive data item withinmore » a set to achieve wear-leveling. Simulations using workloads from SPEC CPU2006 suite and HPC (high-performance computing) field show that EqualChance improves the cache lifetime by 4.29X. Also, its implementation overhead is small, and it incurs very small performance and energy loss.« less

Design and evaluation of an architecture for a digital signal processor for instrumentation applications

NASA Astrophysics Data System (ADS)

Fellman, Ronald D.; Kaneshiro, Ronald T.; Konstantinides, Konstantinos

1990-03-01

The authors present the design and evaluation of an architecture for a monolithic, programmable, floating-point digital signal processor (DSP) for instrumentation applications. An investigation of the most commonly used algorithms in instrumentation led to a design that satisfies the requirements for high computational and I/O (input/output) throughput. In the arithmetic unit, a 16- x 16-bit multiplier and a 32-bit accumulator provide the capability for single-cycle multiply/accumulate operations, and three format adjusters automatically adjust the data format for increased accuracy and dynamic range. An on-chip I/O unit is capable of handling data block transfers through a direct memory access port and real-time data streams through a pair of parallel I/O ports. I/O operations and program execution are performed in parallel. In addition, the processor includes two data memories with independent addressing units, a microsequencer with instruction RAM, and multiplexers for internal data redirection. The authors also present the structure and implementation of a design environment suitable for the algorithmic, behavioral, and timing simulation of a complete DSP system. Various benchmarking results are reported.

Dual representation of item positions in verbal short-term memory: Evidence for two access modes.

PubMed

Lange, Elke B; Verhaeghen, Paul; Cerella, John

Memory sets of N = 1~5 digits were exposed sequentially from left-to-right across the screen, followed by N recognition probes. Probes had to be compared to memory list items on identity only (Sternberg task) or conditional on list position. Positions were probed randomly or in left-to-right order. Search functions related probe response times to set size. Random probing led to ramped, "Sternbergian" functions whose intercepts were elevated by the location requirement. Sequential probing led to flat search functions-fast responses unaffected by set size. These results suggested that items in STM could be accessed either by a slow search-on-identity followed by recovery of an associated location tag, or in a single step by following item-to-item links in study order. It is argued that this dual coding of location information occurs spontaneously at study, and that either code can be utilised at retrieval depending on test demands.

Role of Al2O3 thin layer on improving the resistive switching properties of Ta5Si3-based conductive bridge random accesses memory device

NASA Astrophysics Data System (ADS)

Kumar, Dayanand; Aluguri, Rakesh; Chand, Umesh; Tseng, Tseung-Yuen

2018-04-01

Ta5Si3-based conductive bridge random access memory (CBRAM) devices have been investigated to improve their resistive switching characteristics for their application in future nonvolatile memory technology. Changes in the switching characteristics by the addition of a thin Al2O3 layer of different thicknesses at the bottom electrode interface of a Ta5Si3-based CBRAM devices have been studied. The double-layer device with a 1 nm Al2O3 layer has shown improved resistive switching characteristics over the single layer one with a high on/off resistance ratio of 102, high endurance of more than 104 cycles, and good retention for more than 105 s at the temperature of 130 °C. The higher thermal conductivity of Al2O3 over Ta5Si3 has been attributed to the enhanced switching properties of the double-layer devices.

Influence of Thermal Annealing Treatment on Bipolar Switching Properties of Vanadium Oxide Thin-Film Resistance Random-Access Memory Devices

NASA Astrophysics Data System (ADS)

Chen, Kai-Huang; Cheng, Chien-Min; Kao, Ming-Cheng; Chang, Kuan-Chang; Chang, Ting-Chang; Tsai, Tsung-Ming; Wu, Sean; Su, Feng-Yi

2017-04-01

The bipolar switching properties and electrical conduction mechanism of vanadium oxide thin-film resistive random-access memory (RRAM) devices obtained using a rapid thermal annealing (RTA) process have been investigated in high-resistive status/low-resistive status (HRS/LRS) and are discussed herein. In addition, the resistance switching properties and quality improvement of the vanadium oxide thin-film RRAM devices were measured by x-ray diffraction (XRD) analysis, x-ray photoelectron spectrometry (XPS), scanning electron microscopy (SEM), atomic force microscopy (AFM), and current-voltage ( I- V) measurements. The activation energy of the hopping conduction mechanism in the devices was investigated based on Arrhenius plots in HRS and LRS. The hopping conduction distance and activation energy barrier were obtained as 12 nm and 45 meV, respectively. The thermal annealing process is recognized as a candidate method for fabrication of thin-film RRAM devices, being compatible with integrated circuit technology for nonvolatile memory devices.

Plastic Deformation and Failure Analysis of Phase Change Random Access Memory

NASA Astrophysics Data System (ADS)

Yang; Hongxin; Shi; Luping; Lee; Koon, Hock; Zhao; Rong; Li; Jianming; Lim; Guan, Kian; Chong; Chong, Tow

2009-04-01

Although lateral phase change random access memory (PCRAM) has attracted a lot of interest due to its simpler fabrication process and lower current compared to ovonic unified memory (OUM), it faces a problem of poor lifetime. This paper studied relation between plastic deformation and the failure of PCRAM through both experiment and simulation. OUM and lateral PCRAM incorporating Ge2Sb2Te5 were fabricated and tested. The overwriting test showed that lifetime of OUM exceeded 106 while that of lateral PCRAM was only about 100. Using atomic force microscopy (AFM), it was found that the plastic deformation after 106 overwriting reached several tens of nm for lateral PCRAM while it was negligible for OUM. The thermo-mechanical simulation results confirmed the similar results on larger plastic deformation of lateral PCRAM than that of OUM during overwriting. As plastic deformation involves of atomic bonds breaking and reforming in phase change material, the plastic deformation may be one main reason for the failure of lateral PCRAM.

Random-access technique for modular bathymetry data storage in a continental shelf wave refraction program

NASA Technical Reports Server (NTRS)

Poole, L. R.

1974-01-01

A study was conducted of an alternate method for storage and use of bathymetry data in the Langley Research Center and Virginia Institute of Marine Science mid-Atlantic continental-shelf wave-refraction computer program. The regional bathymetry array was divided into 105 indexed modules which can be read individually into memory in a nonsequential manner from a peripheral file using special random-access subroutines. In running a sample refraction case, a 75-percent decrease in program field length was achieved by using the random-access storage method in comparison with the conventional method of total regional array storage. This field-length decrease was accompanied by a comparative 5-percent increase in central processing time and a 477-percent increase in the number of operating-system calls. A comparative Langley Research Center computer system cost savings of 68 percent was achieved by using the random-access storage method.

An energy efficient and high speed architecture for convolution computing based on binary resistive random access memory

NASA Astrophysics Data System (ADS)

Liu, Chen; Han, Runze; Zhou, Zheng; Huang, Peng; Liu, Lifeng; Liu, Xiaoyan; Kang, Jinfeng

2018-04-01

In this work we present a novel convolution computing architecture based on metal oxide resistive random access memory (RRAM) to process the image data stored in the RRAM arrays. The proposed image storage architecture shows performances of better speed-device consumption efficiency compared with the previous kernel storage architecture. Further we improve the architecture for a high accuracy and low power computing by utilizing the binary storage and the series resistor. For a 28 × 28 image and 10 kernels with a size of 3 × 3, compared with the previous kernel storage approach, the newly proposed architecture shows excellent performances including: 1) almost 100% accuracy within 20% LRS variation and 90% HRS variation; 2) more than 67 times speed boost; 3) 71.4% energy saving.

Simulation of Voltage SET Operation in Phase-Change Random Access Memories with Heater Addition and Ring-Type Contactor for Low-Power Consumption by Finite Element Modeling

NASA Astrophysics Data System (ADS)

Gong, Yue-Feng; Song, Zhi-Tang; Ling, Yun; Liu, Yan; Li, Yi-Jin

2010-06-01

A three-dimensional finite element model for phase change random access memory is established to simulate electric, thermal and phase state distribution during (SET) operation. The model is applied to simulate the SET behaviors of the heater addition structure (HS) and the ring-type contact in the bottom electrode (RIB) structure. The simulation results indicate that the small bottom electrode contactor (BEC) is beneficial for heat efficiency and reliability in the HS cell, and the bottom electrode contactor with size Fx = 80 nm is a good choice for the RIB cell. Also shown is that the appropriate SET pulse time is 100 ns for the low power consumption and fast operation.

Simulation study on heat conduction of a nanoscale phase-change random access memory cell.

PubMed

Kim, Junho; Song, Ki-Bong

2006-11-01

We have investigated heat transfer characteristics of a nano-scale phase-change random access memory (PRAM) cell using finite element method (FEM) simulation. Our PRAM cell is based on ternary chalcogenide alloy, Ge2Sb2Te5 (GST), which is used as a recording layer. For contact area of 100 x 100 nm2, simulations of crystallization and amorphization processes were carried out. Physical quantities such as electric conductivity, thermal conductivity, and specific heat were treated as temperature-dependent parameters. Through many simulations, it is concluded that one can reduce set current by decreasing both electric conductivities of amorphous GST and crystalline GST, and in addition to these conditions by decreasing electric conductivity of molten GST one can also reduce reset current significantly.

Monitoring oxygen movement by Raman spectroscopy of resistive random access memory with a graphene-inserted electrode.

PubMed

Tian, He; Chen, Hong-Yu; Gao, Bin; Yu, Shimeng; Liang, Jiale; Yang, Yi; Xie, Dan; Kang, Jinfeng; Ren, Tian-Ling; Zhang, Yuegang; Wong, H-S Philip

2013-02-13

In this paper, we employed Ramen spectroscopy to monitor oxygen movement at the electrode/oxide interface by inserting single-layer graphene (SLG). Raman area mapping and single-point measurements show noticeable changes in the D-band, G-band, and 2D-band signals of the SLG during consecutive electrical programming repeated for nine cycles. In addition, the inserted SLG enables the reduction of RESET current by 22 times and programming power consumption by 47 times. Collectively, our results show that monitoring the oxygen movement by Raman spectroscopy for a resistive random access memory (RRAM) is made possible by inserting a single-layer graphene at electrode/oxide interface. This may open up an important analysis tool for investigation of switching mechanism of RRAM.

FDDI network test adaptor error injection circuit

NASA Technical Reports Server (NTRS)

Eckenrode, Thomas (Inventor); Stauffer, David R. (Inventor); Stempski, Rebecca (Inventor)

1994-01-01

An apparatus for injecting errors into a FDDI token ring network is disclosed. The error injection scheme operates by fooling a FORMAC into thinking it sent a real frame of data. This is done by using two RAM buffers. The RAM buffer normally accessed by the RBC/DPC becomes a SHADOW RAM during error injection operation. A dummy frame is loaded into the shadow RAM in order to fool the FORMAC. This data is just like the data that would be used if sending a normal frame, with the restriction that it must be shorter than the error injection data. The other buffer, the error injection RAM, contains the error injection frame. The error injection data is sent out to the media by switching a multiplexor. When the FORMAC is done transmitting the data, the multiplexor is switched back to the normal mode. Thus, the FORMAC is unaware of what happened and the token ring remains operational.

Packaging of a large capacity magnetic bubble domain spacecraft recorder

NASA Technical Reports Server (NTRS)

Becker, F. J.; Stermer, R. L.

1977-01-01

A Solid State Spacecraft Data Recorder (SSDR), based on bubble domain technology, having a storage capacity of 10 to the 8th power bits, was designed and is being tested. The recorder consists of two memory modules each having 32 cells, each cell containing sixteen 100 kilobit serial bubble memory chips. The memory modules are interconnected to a Drive and Control Unit (DCU) module containing four microprocessors, 500 integrated circuits, a RAM core memory and two PROM's. The two memory modules and DCU are housed in individual machined aluminum frames, are stacked in brick fashion and through bolted to a base plate assembly which also houses the power supply.

Thyroid hormone disruption and cognitive impairment in rats exposed to PBDE during postnatal development.

PubMed

de-Miranda, Andressa S; Kuriyama, Sergio N; da-Silva, Camille S; do-Nascimento, Monicke S C; Parente, Thiago E M; Paumgartten, Francisco J R

2016-08-01

Polybrominated diphenyl ether flame-retardants (PBDEs) are thyroid-disrupting environmental chemicals. We investigated the effects of postnatal exposure to DE-71 (a mixture of tetra- and penta-brominated congeners), n-propylthiouracil (PTU) and thyroxine (T4) replacement on open-field (OF) and radial maze (RAM) tests. Wistar rats (5 males/5 females per litter, 32 litters) were treated orally (PND 5-22) with PTU (4mg/kg bw/d), DE-71 (30mg/kg bw/d), with and without co-administration of T4 (15μg/kg bw/d, sc). PTU depressed T4 serum levels and body weight gain and enlarged thyroid gland. Although decreasing T4 levels, DE-71 did not change thyroid and body weights. PTU-treated rats showed hyperactivity (PND 42 and 70), and working and reference memory learning deficits (RAM, PND 100). Although not altering motor activity and working memory, DE-71 caused a reference memory deficit (females only). T4 co-administration averted hypothyroxinemia and long-term cognitive deficits caused by PTU and DE-71. Copyright © 2016 Elsevier Inc. All rights reserved.

Working and reference memory across the estrous cycle of rat: a long-term study in gonadally intact females.

PubMed

Pompili, Assunta; Tomaz, Carlos; Arnone, Benedetto; Tavares, Maria Clotilde; Gasbarri, Antonella

2010-11-12

The results of many studies conducted over the past two decades suggested a role of estrogen on mammal's ability to learn and remember. In the present paper, we analyzed the influence that the endogenous fluctuation of estrogen, naturally present across the different phases of estrous cycle of female rats, can exert over the performance of tasks utilized to assess memory. In particular, we analyzed the performances in an eight arms radial maze task, dependent upon working memory, and in a water maze (WM) task, dependent upon spatial reference memory. The water maze is aversively motivated by the desire to escape onto a safe platform, whereas the radial arm maze (RAM) is motivated by food reward. The difference in reinforcement may affect the speed of learning, the strategy adopted and the necessity for accurate navigation. Therefore, coherent results obtained through the two different tasks can be due to mnemonic factors. The study was conducted during a long period of time, 14 months, utilizing gonadally intact females, without pharmacological and surgical treatments. In order to evaluate the post-acquisition phase we first trained the animals to reach the criterion in performing tasks, and then we submitted them to experimental phase. Our results show that estrogen can have an effect on memory processes, and that this effect may be different in relation to different kinds of memory. In fact, in our study, estrogen selectively improved working memory, but not reference memory, during post-acquisition performance of a RAM task with four baited and four un-baited arms. Moreover, WM performances showed that estrogen have a negative effect on spatial reference memory. (c) 2010 Elsevier B.V. All rights reserved.

Fencing direct memory access data transfers in a parallel active messaging interface of a parallel computer

DOE Office of Scientific and Technical Information (OSTI.GOV)

Blocksome, Michael A.; Mamidala, Amith R.

2013-09-03

Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to segments of shared random access memory through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and a segmentmore » of shared memory; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.« less

Nigella sativa Oil Enhances the Spatial Working Memory Performance of Rats on a Radial Arm Maze

PubMed Central

Sahak, Mohamad Khairul Azali; Mohamed, Abdul Majid; Hashim, Noor Hashida; Hasan Adli, Durriyyah Sharifah

2013-01-01

Nigella sativa, an established historical and religion-based remedy for a wide range of health problems, is a herbal medicine known to have antioxidant and neuroprotective effects. This present study investigated the effect of Nigella sativa oil (NSO) administration on the spatial memory performance (SMP) of male adult rats using eight-arm radial arm maze (RAM). Twelve Sprague Dawley rats (7–9 weeks old) were force-fed daily with 6.0 μL/100 g body weight of Nigella sativa oil (NSO group; n = 6) or 0.1 mL/100 g body weight of corn oil (control) (CO group; n = 6) for a period of 20 consecutive weeks. For each weekly evaluation of SMP, one day food-deprived rats were tested by allowing each of them 3 minutes to explore the RAM for food as their rewards. Similar to the control group, the SMP of the treated group was not hindered, as indicated by the establishment of the reference and working memory components of the spatial memory. The results demonstrated that lesser mean numbers of error were observed for the NSO-treated group in both parameters as compared to the CO-treated group. NSO could therefore enhance the learning and memory abilities of the rats; there was a significant decrease in the overall mean number of working memory error (WME) in the NSO-treated group. PMID:24454487

Design and Implementation of an MC68020-Based Educational Computer Board

DTIC Science & Technology

1989-12-01

device and the other for a Macintosh personal computer. A stored program can be installed in 8K bytes Programmable Read Only Memory (PROM) to initialize...MHz. It includes four * Static Random Access Memory (SRAM) chips which provide a storage of 32K bytes. Two Programmable Array Logic (PAL) chips...device and the other for a Macintosh personal computer. A stored program can be installed in 8K bytes Programmable Read Only Memory (PROM) to

Novel nano materials for high performance logic and memory devices

NASA Astrophysics Data System (ADS)

Das, Saptarshi

After decades of relentless progress, the silicon CMOS industry is approaching a stall in device performance for both logic and memory devices due to fundamental scaling limitations. In order to reinforce the accelerating pace, novel materials with unique properties are being proposed on an urgent basis. This list includes one dimensional nanotubes, quasi one dimensional nanowires, two dimensional atomistically thin layered materials like graphene, hexagonal boron nitride and the more recently the rich family of transition metal di-chalcogenides comprising of MoS2, WSe2, WS2 and many more for logic applications and organic and inorganic ferroelectrics, phase change materials and magnetic materials for memory applications. Only time will tell who will win, but exploring these novel materials allow us to revisit the fundamentals and strengthen our understanding which will ultimately be beneficial for high performance device design. While there has been growing interest in two-dimensional (2D) crystals other than graphene, evaluating their potential usefulness for electronic applications is still in its infancies due to the lack of a complete picture of their performance potential. The fact that the 2-D layered semiconducting di-chalcogenides need to be connected to the "outside" world in order to capitalize on their ultimate potential immediately emphasizes the importance of a thorough understanding of the contacts. This thesis demonstrate that through a proper understanding and design of source/drain contacts and the right choice of number of MoS2 layers the excellent intrinsic properties of this 2D material can be harvested. A comprehensive experimental study on the dependence of carrier mobility on the layer thickness of back gated multilayer MoS 2 field effect transistors is also provided. A resistor network model that comprises of Thomas-Fermi charge screening and interlayer coupling is used to explain the non-monotonic trend in the extracted field effect mobility with the layer thickness. The non-monotonic trend suggests that in order to harvest the maximum potential of MoS2 for high performance device applications, a layer thickness in the range of 6-12 nm would be ideal. Finally using scandium contacts on 10nm thick exfoliated MoS2 flakes that are covered by a 15nm ALD grown Al2O3 film, record high mobility of 700cm2/Vs is achieved at room-temperature which is extremely encouraging for the design of high performance logic devices. The destructive nature of the readout process in Ferroelectric Random Access Memories (FeRAMs) is one of the major limiting factors for their wide scale commercialization. Utilizing Ferroelectric Field-Effect Transistor RAM (FeTRAM) instead solves the destructive read out problem, but at the expense of introducing crystalline ferroelectrics that are hard to integrate into CMOS. In order to address these challenges a novel, fully functional, CMOS compatible, One-Transistor-One-Transistor (1T1T) memory cell architecture using an organic ferroelectric -- PVDF-TrFE -- as the memory storage unit (gate oxide) and a silicon nanowire as the memory read out unit (channel material) is proposed and experimentally demonstrated. While evaluating the scaling potential of the above mentioned organic FeTRAM, it is found that the switching time and switching voltage of this organic copolymer PVDF-TrFE exhibits an unexpected scaling behavior as a function of the lateral device dimensions. The phenomenological theory, that explains this abnormal scaling trend, involves in-plane interchain and intrachain interaction of the copolymer - resulting in a power-law dependence of the switching field on the device area (ESW alpha ACH0.1) that is ultimately responsible for the decrease in the switching time and switching voltage. These findings are encouraging since they indicate that scaling the switching voltage and switching time without aggressively scaling the copolymer thickness occurs naturally while scaling the device area -- in this way ultimately improving the packing density and leading towards high performance memory devices.

A highly symmetrical 10 transistor 2-read/write dual-port static random access memory bitcell design in 28 nm high-k/metal-gate planar bulk CMOS technology

NASA Astrophysics Data System (ADS)

Ishii, Yuichiro; Tanaka, Miki; Yabuuchi, Makoto; Sawada, Yohei; Tanaka, Shinji; Nii, Koji; Lu, Tien Yu; Huang, Chun Hsien; Sian Chen, Shou; Tse Kuo, Yu; Lung, Ching Cheng; Cheng, Osbert

2018-04-01

We propose a highly symmetrical 10 transistor (10T) 2-read/write (2RW) dual-port (DP) static random access memory (SRAM) bitcell in 28 nm high-k/metal-gate (HKMG) planar bulk CMOS. It replaces the conventional 8T 2RW DP SRAM bitcell without any area overhead. It significantly improves the robustness of process variations and an asymmetric issue between the true and bar bitline pairs. Measured data show that read current (I read) and read static noise margin (SNM) are respectively boosted by +20% and +15 mV by introducing the proposed bitcell with enlarged pull-down (PD) and pass-gate (PG) N-channel MOSs (NMOSs). The minimum operating voltage (V min) of the proposed 256 kbit 10T DP SRAM is 0.53 V in the TT process, 25 °C under the worst access condition with read/write disturbances, and improved by 90 mV (15%) compared with the conventional one.

77 FR 74222 - Certain Dynamic Random Access Memory and NAND Flash Memory Devices and Products Containing Same...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-12-13

..., California; Kingston Technology Co., Inc. of Fountain Valley, California; Logitek International S.A. (``LISA...: Clint Gerdine, Esq., Office of the General Counsel, U.S. International Trade Commission, 500 E Street SW....m. to 5:15 p.m.) in the Office of the Secretary, U.S. International Trade Commission, 500 E Street...

Gas-Sensing Flip-Flop Circuits

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Blaes, Brent R.; Williams, Roger; Ryan, Margaret A.

1995-01-01

Gas-sensing integrated circuits consisting largely of modified static random-access memories (SRAMs) undergoing development, building on experience gained in use of modified SRAMs as radiation sensors. Each SRAM memory cell includes flip-flop circuit; sensors exploit metastable state that lies between two stable states (corresponding to binary logic states) of flip-flop circuit. Voltages of metastable states vary with exposures of gas-sensitive resistors.

Assessing Server Fault Tolerance and Disaster Recovery Implementation in Thin Client Architectures

DTIC Science & Technology

2007-09-01

server • Windows 2003 server Processor AMD Geode GX Memory 512MB Flash/256MB DDR RAM I/O/Peripheral Support • VGA-type video output (DB-15...2000 Advanced Server Processor AMD Geode NX 1500 Memory • 256MB or 512MB or 1GB DDR SDRAM • 1GB or 512MB Flash I/O/Peripheral Support • SiS741 GX

A spin transfer torque magnetoresistance random access memory-based high-density and ultralow-power associative memory for fully data-adaptive nearest neighbor search with current-mode similarity evaluation and time-domain minimum searching

NASA Astrophysics Data System (ADS)

Ma, Yitao; Miura, Sadahiko; Honjo, Hiroaki; Ikeda, Shoji; Hanyu, Takahiro; Ohno, Hideo; Endoh, Tetsuo

2017-04-01

A high-density nonvolatile associative memory (NV-AM) based on spin transfer torque magnetoresistive random access memory (STT-MRAM), which achieves highly concurrent and ultralow-power nearest neighbor search with full adaptivity of the template data format, has been proposed and fabricated using the 90 nm CMOS/70 nm perpendicular-magnetic-tunnel-junction hybrid process. A truly compact current-mode circuitry is developed to realize flexibly controllable and high-parallel similarity evaluation, which makes the NV-AM adaptable to any dimensionality and component-bit of template data. A compact dual-stage time-domain minimum searching circuit is also developed, which can freely extend the system for more template data by connecting multiple NM-AM cores without additional circuits for integrated processing. Both the embedded STT-MRAM module and the computing circuit modules in this NV-AM chip are synchronously power-gated to completely eliminate standby power and maximally reduce operation power by only activating the currently accessed circuit blocks. The operations of a prototype chip at 40 MHz are demonstrated by measurement. The average operation power is only 130 µW, and the circuit density is less than 11 µm2/bit. Compared with the latest conventional works in both volatile and nonvolatile approaches, more than 31.3% circuit area reductions and 99.2% power improvements are achieved, respectively. Further power performance analyses are discussed, which verify the special superiority of the proposed NV-AM in low-power and large-memory-based VLSIs.

Improved characteristics of amorphous indium-gallium-zinc-oxide-based resistive random access memory using hydrogen post-annealing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kang, Dae Yun; Lee, Tae-Ho; Kim, Tae Geun, E-mail: tgkim1@korea.ac.kr

The authors report an improvement in resistive switching (RS) characteristics of amorphous indium-gallium-zinc-oxide (a-IGZO)-based resistive random access memory devices using hydrogen post-annealing. Because this a-IGZO thin film has oxygen off-stoichiometry in the form of deficient and excessive oxygen sites, the film properties can be improved by introducing hydrogen atoms through the annealing process. After hydrogen post-annealing, the device exhibited a stable bipolar RS, low-voltage set and reset operation, long retention (>10{sup 5 }s), good endurance (>10{sup 6} cycles), and a narrow distribution in each current state. The effect of hydrogen post-annealing is also investigated by analyzing the sample surface using X-raymore » photon spectroscopy and atomic force microscopy.« less

Elevated-Confined Phase-Change Random Access Memory Cells

NASA Astrophysics Data System (ADS)

Lee; Koon, Hock; Shi; Luping; Zhao; Rong; Yang; Hongxin; Lim; Guan, Kian; Li; Jianming; Chong; Chong, Tow

2010-04-01

A new elevated-confined phase-change random access memory (PCRAM) cell structure to reduce power consumption was proposed. In this proposed structure, the confined phase-change region is sitting on top of a small metal column enclosed by a dielectric at the sides. Hence, more heat can be effectively sustained underneath the phase-change region. As for the conventional structure, the confined phase-change region is sitting directly above a large planar bottom metal electrode, which can easily conduct most of the induced heat away. From simulations, a more uniform temperature profile around the active region and a higher peak temperature at the phase-change layer (PCL) in an elevated-confined structure were observed. Experimental results showed that the elevated-confined PCRAM cell requires a lower programming power and has a better scalability than a conventional confined PCRAM cell.

Electrical characteristics of paraelectric lead lanthanum zirconium titanate thin films for dynamic random access memory applications

NASA Astrophysics Data System (ADS)

Jones, R. E., Jr.; Maniar, P. D.; Olowolafe, J. O.; Campbell, A. C.; Mogab, C. J.

1992-02-01

Paraelectric lead lanthanum zirconium titanate (PLZT) films, 150 nm thick, were deposited using a spin-coat, sol-gel process followed by a 650 °C oxygen anneal. X-ray diffraction indicated complete conversion to the perovskite phase. Sputter-deposited platinum electrodes were employed with the PLZT films to form thin-film capacitors with the best combination of high charge storage density (26.1 μC/cm2 at 3 V and 36.4 μC/cm2 at 5 V) and leakage current density (0.2 μA/cm2 at 3 V and 0.5 μA/cm2 at 5 V ) reported to date. The electrical characteristics of these thin-film capacitors meet the requirements for a planar bit cell capacitor for 64-Mbit dynamic random access memories.

Non-volatile, high density, high speed, Micromagnet-Hall effect Random Access Memory (MHRAM)

NASA Technical Reports Server (NTRS)

Wu, Jiin C.; Katti, Romney R.; Stadler, Henry L.

1991-01-01

The micromagnetic Hall effect random access memory (MHRAM) has the potential of replacing ROMs, EPROMs, EEPROMs, and SRAMs because of its ability to achieve non-volatility, radiation hardness, high density, and fast access times, simultaneously. Information is stored magnetically in small magnetic elements (micromagnets), allowing unlimited data retention time, unlimited numbers of rewrite cycles, and inherent radiation hardness and SEU immunity, making the MHRAM suitable for ground based as well as spaceflight applications. The MHRAM device design is not affected by areal property fluctuations in the micromagnet, so high operating margins and high yield can be achieved in large scale integrated circuit (IC) fabrication. The MHRAM has short access times (less than 100 nsec). Write access time is short because on-chip transistors are used to gate current quickly, and magnetization reversal in the micromagnet can occur in a matter of a few nanoseconds. Read access time is short because the high electron mobility sensor (InAs or InSb) produces a large signal voltage in response to the fringing magnetic field from the micromagnet. High storage density is achieved since a unit cell consists only of two transistors and one micromagnet Hall effect element. By comparison, a DRAM unit cell has one transistor and one capacitor, and a SRAM unit cell has six transistors.

The differential effects of ecstasy/polydrug use on executive components: shifting, inhibition, updating and access to semantic memory.

PubMed

Montgomery, Catharine; Fisk, John E; Newcombe, Russell; Murphy, Phillip N

2005-10-01

Recent theoretical models suggest that the central executive may not be a unified structure. The present study explored the nature of central executive deficits in ecstasy users. In study 1, 27 ecstasy users and 34 non-users were assessed using tasks to tap memory updating (computation span; letter updating) and access to long-term memory (a semantic fluency test and the Chicago Word Fluency Test). In study 2, 51 ecstasy users and 42 non-users completed tasks that assess mental set switching (number/letter and plus/minus) and inhibition (random letter generation). MANOVA revealed that ecstasy users performed worse on both tasks used to assess memory updating and on tasks to assess access to long-term memory (C- and S-letter fluency). However, notwithstanding the significant ecstasy group-related effects, indices of cocaine and cannabis use were also significantly correlated with most of the executive measures. Unexpectedly, in study 2, ecstasy users performed significantly better on the inhibition task, producing more letters than non-users. No group differences were observed on the switching tasks. Correlations between indices of ecstasy use and number of letters produced were significant. The present study provides further support for ecstasy/polydrug-related deficits in memory updating and in access to long-term memory. The surplus evident on the inhibition task should be treated with some caution, as this was limited to a single measure and has not been supported by our previous work.

QRAP: A numerical code for projected (Q)uasiparticle (RA)ndom (P)hase approximation

NASA Astrophysics Data System (ADS)

Samana, A. R.; Krmpotić, F.; Bertulani, C. A.

2010-06-01

A computer code for quasiparticle random phase approximation - QRPA and projected quasiparticle random phase approximation - PQRPA models of nuclear structure is explained in details. The residual interaction is approximated by a simple δ-force. An important application of the code consists in evaluating nuclear matrix elements involved in neutrino-nucleus reactions. As an example, cross sections for 56Fe and 12C are calculated and the code output is explained. The application to other nuclei and the description of other nuclear and weak decay processes are also discussed. Program summaryTitle of program: QRAP ( Quasiparticle RAndom Phase approximation) Computers: The code has been created on a PC, but also runs on UNIX or LINUX machines Operating systems: WINDOWS or UNIX Program language used: Fortran-77 Memory required to execute with typical data: 16 Mbytes of RAM memory and 2 MB of hard disk space No. of lines in distributed program, including test data, etc.: ˜ 8000 No. of bytes in distributed program, including test data, etc.: ˜ 256 kB Distribution format: tar.gz Nature of physical problem: The program calculates neutrino- and antineutrino-nucleus cross sections as a function of the incident neutrino energy, and muon capture rates, using the QRPA or PQRPA as nuclear structure models. Method of solution: The QRPA, or PQRPA, equations are solved in a self-consistent way for even-even nuclei. The nuclear matrix elements for the neutrino-nucleus interaction are treated as the beta inverse reaction of odd-odd nuclei as function of the transfer momentum. Typical running time: ≈ 5 min on a 3 GHz processor for Data set 1.

Survey and Analysis of Environmental Requirements for Shipboard Electronic Equipment Applications. Appendix B. Volume 3.

DTIC Science & Technology

1991-07-31

memory banks Up to 1.25MByte SRAM 5 planes of 2048 x 1024 pixels Programmable video parameters max 720 x 512 pixels Sixteen colors TTL RGBI standard...bit I/O extension bus (VLXbus) Up to 2048 KByte 0-wait state static RAM BTT (Built-In-Test) PAL selectable dual ported VMEbus address Two RS-232/422...16, 25, or 33 MHz) A16/24:D08/16 VMEbus interface 8/16-bit I/O Extension bus (VLXbus) Up to 2048 KByte 32-bit wide static RAM -- 0-wait state at 16

Test Procedures for Semiconductor Random Access Memories

DTIC Science & Technology

1979-11-01

of each cell exactly complement to each other, the read operations on the base cell in (g) of step 2 following operations ko S odd and in (p) of step...contents of Sko (these cells this address. Furthermore, when more than one contained I at test time and even if the con- cell is accessed then the output

Designing Programs for Multiple Configurations: "You Mean Everyone Doesn't Have a Pentium or Better!"

ERIC Educational Resources Information Center

Conkright, Thomas D.; Joliat, Judy

1996-01-01

Discusses the challenges, solutions, and compromises involved in creating computer-delivered training courseware for Apollo Travel Services, a company whose 50,000 agents must access a mainframe from many different computing configurations. Initial difficulties came in trying to manage random access memory and quicken response time, but the future…

Towards Terabit Memories

NASA Astrophysics Data System (ADS)

Hoefflinger, Bernd

Memories have been the major yardstick for the continuing validity of Moore's law. In single-transistor-per-Bit dynamic random-access memories (DRAM), the number of bits per chip pretty much gives us the number of transistors. For decades, DRAM's have offered the largest storage capacity per chip. However, DRAM does not scale any longer, both in density and voltage, severely limiting its power efficiency to 10 fJ/b. A differential DRAM would gain four-times in density and eight-times in energy. Static CMOS RAM (SRAM) with its six transistors/cell is gaining in reputation because it scales well in cell size and operating voltage so that its fundamental advantage of speed, non-destructive read-out and low-power standby could lead to just 2.5 electrons/bit in standby and to a dynamic power efficiency of 2aJ/b. With a projected 2020 density of 16 Gb/cm², the SRAM would be as dense as normal DRAM and vastly better in power efficiency, which would mean a major change in the architecture and market scenario for DRAM versus SRAM. Non-volatile Flash memory have seen two quantum jumps in density well beyond the roadmap: Multi-Bit storage per transistor and high-density TSV (through-silicon via) technology. The number of electrons required per Bit on the storage gate has been reduced since their first realization in 1996 by more than an order of magnitude to 400 electrons/Bit in 2010 for a complexity of 32Gbit per chip at the 32 nm node. Chip stacking of eight chips with TSV has produced a 32GByte solid-state drive (SSD). A stack of 32 chips with 2 b/cell at the 16 nm node will reach a density of 2.5 Terabit/cm². Non-volatile memory with a density of 10 × 10 nm²/Bit is the target for widespread development. Phase-change memory (PCM) and resistive memory (RRAM) lead in cell density, and they will reach 20 Gb/cm² in 2D and higher with 3D chip stacking. This is still almost an order-of-magnitude less than Flash. However, their read-out speed is ~10-times faster, with as yet little data on their energy/b. As a read-out memory with unparalleled retention and lifetime, the ROM with electron-beam direct-write-lithography (Chap. 8) should be considered for its projected 2D density of 250 Gb/cm², a very small read energy of 0.1 μW/Gb/s. The lithography write-speed 10 ms/Terabit makes this ROM a serious contentender for the optimum in non-volatile, tamper-proof storage.

Single-cell full-length total RNA sequencing uncovers dynamics of recursive splicing and enhancer RNAs.

PubMed

Hayashi, Tetsutaro; Ozaki, Haruka; Sasagawa, Yohei; Umeda, Mana; Danno, Hiroki; Nikaido, Itoshi

2018-02-12

Total RNA sequencing has been used to reveal poly(A) and non-poly(A) RNA expression, RNA processing and enhancer activity. To date, no method for full-length total RNA sequencing of single cells has been developed despite the potential of this technology for single-cell biology. Here we describe random displacement amplification sequencing (RamDA-seq), the first full-length total RNA-sequencing method for single cells. Compared with other methods, RamDA-seq shows high sensitivity to non-poly(A) RNA and near-complete full-length transcript coverage. Using RamDA-seq with differentiation time course samples of mouse embryonic stem cells, we reveal hundreds of dynamically regulated non-poly(A) transcripts, including histone transcripts and long noncoding RNA Neat1. Moreover, RamDA-seq profiles recursive splicing in >300-kb introns. RamDA-seq also detects enhancer RNAs and their cell type-specific activity in single cells. Taken together, we demonstrate that RamDA-seq could help investigate the dynamics of gene expression, RNA-processing events and transcriptional regulation in single cells.

Deterministic binary vectors for efficient automated indexing of MEDLINE/PubMed abstracts.

PubMed

Wahle, Manuel; Widdows, Dominic; Herskovic, Jorge R; Bernstam, Elmer V; Cohen, Trevor

2012-01-01

The need to maintain accessibility of the biomedical literature has led to development of methods to assist human indexers by recommending index terms for newly encountered articles. Given the rapid expansion of this literature, it is essential that these methods be scalable. Document vector representations are commonly used for automated indexing, and Random Indexing (RI) provides the means to generate them efficiently. However, RI is difficult to implement in real-world indexing systems, as (1) efficient nearest-neighbor search requires retaining all document vectors in RAM, and (2) it is necessary to maintain a store of randomly generated term vectors to index future documents. Motivated by these concerns, this paper documents the development and evaluation of a deterministic binary variant of RI. The increased capacity demonstrated by binary vectors has implications for information retrieval, and the elimination of the need to retain term vectors facilitates distributed implementations, enhancing the scalability of RI.

Deterministic Binary Vectors for Efficient Automated Indexing of MEDLINE/PubMed Abstracts

PubMed Central

Wahle, Manuel; Widdows, Dominic; Herskovic, Jorge R.; Bernstam, Elmer V.; Cohen, Trevor

2012-01-01

The need to maintain accessibility of the biomedical literature has led to development of methods to assist human indexers by recommending index terms for newly encountered articles. Given the rapid expansion of this literature, it is essential that these methods be scalable. Document vector representations are commonly used for automated indexing, and Random Indexing (RI) provides the means to generate them efficiently. However, RI is difficult to implement in real-world indexing systems, as (1) efficient nearest-neighbor search requires retaining all document vectors in RAM, and (2) it is necessary to maintain a store of randomly generated term vectors to index future documents. Motivated by these concerns, this paper documents the development and evaluation of a deterministic binary variant of RI. The increased capacity demonstrated by binary vectors has implications for information retrieval, and the elimination of the need to retain term vectors facilitates distributed implementations, enhancing the scalability of RI. PMID:23304369

Single event upset in avionics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Taber, A.; Normand, E.

1993-04-01

Data from military/experimental flights and laboratory testing indicate that typical non radiation-hardened 64K and 256K static random access memories (SRAMs) can experience a significant soft upset rate at aircraft altitudes due to energetic neutrons created by cosmic ray interactions in the atmosphere. It is suggested that error detection and correction (EDAC) circuitry be considered for all avionics designs containing large amounts of semi-conductor memory.

MRAM Technology Status

NASA Technical Reports Server (NTRS)

Heidecker, Jason

2013-01-01

Magnetoresistive Random Access Memory (MRAM) is much different from conventional types of memory like SRAM, DRAM, and Flash, where electric charge is used to store information. Instead of exploiting the charge of an electron, MRAM uses its spin to store data. This new type of electronics is known as "spintronics." The primary focus of this report is the current generation of MRAM technology, and its reliability, vendors, and space-readiness.

SEU hardened memory cells for a CCSDS Reed Solomon encoder

DOE Office of Scientific and Technical Information (OSTI.GOV)

Whitaker, S.; Canaris, J.; Liu, K.

This paper reports on design technique to harden CMOS memory circuits against Single Event Upset (SEU) in the space environment. The design technique provides a recovery mechanism which is independent of the shape of the upsetting event. A RAM cell and Flip Flop design are presented to demonstrate the method. The Flip Flop was used in the control circuitry for a Reed Solomon encoder designed for the Space Station and Explorer platforms.

Flexible Peripheral Component Interconnect Input/Output Card

NASA Technical Reports Server (NTRS)

Bigelow, Kirk K.; Jerry, Albert L.; Baricio, Alisha G.; Cummings, Jon K.

2010-01-01

The Flexible Peripheral Component Interconnect (PCI) Input/Output (I/O) Card is an innovative circuit board that provides functionality to interface between a variety of devices. It supports user-defined interrupts for interface synchronization, tracks system faults and failures, and includes checksum and parity evaluation of interface data. The card supports up to 16 channels of high-speed, half-duplex, low-voltage digital signaling (LVDS) serial data, and can interface combinations of serial and parallel devices. Placement of a processor within the field programmable gate array (FPGA) controls an embedded application with links to host memory over its PCI bus. The FPGA also provides protocol stacking and quick digital signal processor (DSP) functions to improve host performance. Hardware timers, counters, state machines, and other glue logic support interface communications. The Flexible PCI I/O Card provides an interface for a variety of dissimilar computer systems, featuring direct memory access functionality. The card has the following attributes: 8/16/32-bit, 33-MHz PCI r2.2 compliance, Configurable for universal 3.3V/5V interface slots, PCI interface based on PLX Technology's PCI9056 ASIC, General-use 512K 16 SDRAM memory, General-use 1M 16 Flash memory, FPGA with 3K to 56K logical cells with embedded 27K to 198K bits RAM, I/O interface: 32-channel LVDS differential transceivers configured in eight, 4-bit banks; signaling rates to 200 MHz per channel, Common SCSI-3, 68-pin interface connector.

Pressure-induced reversible amorphization and an amorphous–amorphous transition in Ge2Sb2Te5 phase-change memory material

PubMed Central

Sun, Zhimei; Zhou, Jian; Pan, Yuanchun; Song, Zhitang; Mao, Ho-Kwang; Ahuja, Rajeev

2011-01-01

Ge2Sb2Te5 (GST) is a technologically very important phase-change material that is used in digital versatile disks-random access memory and is currently studied for the use in phase-change random access memory devices. This type of data storage is achieved by the fast reversible phase transition between amorphous and crystalline GST upon heat pulse. Here we report pressure-induced reversible crystalline-amorphous and polymorphic amorphous transitions in NaCl structured GST by ab initio molecular dynamics calculations. We have showed that the onset amorphization of GST starts at approximately 18 GPa and the system become completely random at approximately 22 GPa. This amorphous state has a cubic framework (c-amorphous) of sixfold coordinations. With further increasing pressure, the c-amorphous transforms to a high-density amorphous structure with trigonal framework (t-amorphous) and an average coordination number of eight. The pressure-induced amorphization is investigated to be due to large displacements of Te atoms for which weak Te–Te bonds exist or vacancies are nearby. Upon decompressing to ambient conditions, the original cubic crystalline structure is restored for c-amorphous, whereas t-amorphous transforms to another amorphous phase that is similar to the melt-quenched amorphous GST. PMID:21670255

Pressure-induced reversible amorphization and an amorphous-amorphous transition in Ge₂Sb₂Te₅ phase-change memory material.

PubMed

Sun, Zhimei; Zhou, Jian; Pan, Yuanchun; Song, Zhitang; Mao, Ho-Kwang; Ahuja, Rajeev

2011-06-28

Ge(2)Sb(2)Te(5) (GST) is a technologically very important phase-change material that is used in digital versatile disks-random access memory and is currently studied for the use in phase-change random access memory devices. This type of data storage is achieved by the fast reversible phase transition between amorphous and crystalline GST upon heat pulse. Here we report pressure-induced reversible crystalline-amorphous and polymorphic amorphous transitions in NaCl structured GST by ab initio molecular dynamics calculations. We have showed that the onset amorphization of GST starts at approximately 18 GPa and the system become completely random at approximately 22 GPa. This amorphous state has a cubic framework (c-amorphous) of sixfold coordinations. With further increasing pressure, the c-amorphous transforms to a high-density amorphous structure with trigonal framework (t-amorphous) and an average coordination number of eight. The pressure-induced amorphization is investigated to be due to large displacements of Te atoms for which weak Te-Te bonds exist or vacancies are nearby. Upon decompressing to ambient conditions, the original cubic crystalline structure is restored for c-amorphous, whereas t-amorphous transforms to another amorphous phase that is similar to the melt-quenched amorphous GST.

Conductance Quantization in Resistive Random Access Memory

NASA Astrophysics Data System (ADS)

Li, Yang; Long, Shibing; Liu, Yang; Hu, Chen; Teng, Jiao; Liu, Qi; Lv, Hangbing; Suñé, Jordi; Liu, Ming

2015-10-01

The intrinsic scaling-down ability, simple metal-insulator-metal (MIM) sandwich structure, excellent performances, and complementary metal-oxide-semiconductor (CMOS) technology-compatible fabrication processes make resistive random access memory (RRAM) one of the most promising candidates for the next-generation memory. The RRAM device also exhibits rich electrical, thermal, magnetic, and optical effects, in close correlation with the abundant resistive switching (RS) materials, metal-oxide interface, and multiple RS mechanisms including the formation/rupture of nanoscale to atomic-sized conductive filament (CF) incorporated in RS layer. Conductance quantization effect has been observed in the atomic-sized CF in RRAM, which provides a good opportunity to deeply investigate the RS mechanism in mesoscopic dimension. In this review paper, the operating principles of RRAM are introduced first, followed by the summarization of the basic conductance quantization phenomenon in RRAM and the related RS mechanisms, device structures, and material system. Then, we discuss the theory and modeling of quantum transport in RRAM. Finally, we present the opportunities and challenges in quantized RRAM devices and our views on the future prospects.

Conductance Quantization in Resistive Random Access Memory.

PubMed

Li, Yang; Long, Shibing; Liu, Yang; Hu, Chen; Teng, Jiao; Liu, Qi; Lv, Hangbing; Suñé, Jordi; Liu, Ming

2015-12-01

The intrinsic scaling-down ability, simple metal-insulator-metal (MIM) sandwich structure, excellent performances, and complementary metal-oxide-semiconductor (CMOS) technology-compatible fabrication processes make resistive random access memory (RRAM) one of the most promising candidates for the next-generation memory. The RRAM device also exhibits rich electrical, thermal, magnetic, and optical effects, in close correlation with the abundant resistive switching (RS) materials, metal-oxide interface, and multiple RS mechanisms including the formation/rupture of nanoscale to atomic-sized conductive filament (CF) incorporated in RS layer. Conductance quantization effect has been observed in the atomic-sized CF in RRAM, which provides a good opportunity to deeply investigate the RS mechanism in mesoscopic dimension. In this review paper, the operating principles of RRAM are introduced first, followed by the summarization of the basic conductance quantization phenomenon in RRAM and the related RS mechanisms, device structures, and material system. Then, we discuss the theory and modeling of quantum transport in RRAM. Finally, we present the opportunities and challenges in quantized RRAM devices and our views on the future prospects.

Radiation Test Challenges for Scaled Commerical Memories

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Ladbury, Ray L.; Cohn, Lewis M.; Oldham, Timothy

2007-01-01

As sub-100nm CMOS technologies gather interest, the radiation effects performance of these technologies provide a significant challenge. In this talk, we shall discuss the radiation testing challenges as related to commercial memory devices. The focus will be on complex test and failure modes emerging in state-of-the-art Flash non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs), which are volatile. Due to their very high bit density, these device types are highly desirable for use in the natural space environment. In this presentation, we shall discuss these devices with emphasis on considerations for test and qualification methods required.

The relationships of 'ecstasy' (MDMA) and cannabis use to impaired executive inhibition and access to semantic long-term memory.

PubMed

Murphy, Philip N; Erwin, Philip G; Maciver, Linda; Fisk, John E; Larkin, Derek; Wareing, Michelle; Montgomery, Catharine; Hilton, Joanne; Tames, Frank J; Bradley, Belinda; Yanulevitch, Kate; Ralley, Richard

2011-10-01

This study aimed to examine the relationship between the consumption of ecstasy (3,4-methylenedioxymethamphetamine (MDMA)) and cannabis, and performance on the random letter generation task which generates dependent variables drawing upon executive inhibition and access to semantic long-term memory (LTM). The participant group was a between-participant independent variable with users of both ecstasy and cannabis (E/C group, n = 15), users of cannabis but not ecstasy (CA group, n = 13) and controls with no exposure to these drugs (CO group, n = 12). Dependent variables measured violations of randomness: number of repeat sequences, number of alphabetical sequences (both drawing upon inhibition) and redundancy (drawing upon access to semantic LTM). E/C participants showed significantly higher redundancy than CO participants but did not differ from CA participants. There were no significant effects for the other dependent variables. A regression model comprising intelligence measures and estimates of ecstasy and cannabis consumption predicted redundancy scores, but only cannabis consumption contributed significantly to this prediction. Impaired access to semantic LTM may be related to cannabis consumption, although the involvement of ecstasy and other stimulant drugs cannot be excluded here. Executive inhibitory functioning, as measured by the random letter generation task, is unrelated to ecstasy and cannabis consumption. Copyright © 2011 John Wiley & Sons, Ltd.

MIL-STD-1553B Marconi LSI chip set in a remote terminal application

NASA Astrophysics Data System (ADS)

Dimarino, A.

1982-11-01

Marconi Avionics is utilizing the MIL-STD-1553B LSI Chip Set in the SCADC Air Data Computer application to perform all of the required remote terminal MIL-STD-1553B protocol functions. Basic components of the RTU are the dual redundant chip set, CT3231 Transceivers, 256 x 16 RAM and a Z8002 microprocessor. Basic transfers are to/from the RAM command of the bus controller or Z8002 processor. During transfers from the processor to the RAM, the chip set busy bit is set for a period not exceeding 250 microseconds. When the transfer is complete, the busy bit is released and transfers to the data bus occur on command. The LSI Chip Set word count lines are used to locate each data word in the local memory and 4 mode codes are used in the application: reset remote terminal, transmit status word, transmitter shut-down, and override transmitter shutdown.

High Resolution, High Precision I-Line Stepper Processing

NASA Astrophysics Data System (ADS)

Yanazawa, H.; Hasegawa, N.; Kurosaki, T.; Hashimoto, N.; Nonogaki, S.

1985-06-01

Currently, the integrated MOS dynamic RAM has as many as 256 thousand memory cells per chip based on 2 pm photolithography. Figure 1 shows the history and the prospects for progress in microfabrication technology. Feature size versus year, as reported by Bossung in 1978, is shown, as developed from independent analysis by Moore, Noyce and Gnostic concept. Circles numbered 1 and 2 show that 64K- and 256K-bit RAMs were developed in 1981 and 1984, and that their feature sizes were 3μm and 2μm, respectively. It is significant that the predictions and the real developments are so close. Furthermore, since the basic process for 3 M-bit RAMs based on 1.3μm microlithography has already been reported in conference, it is highly likely that they will become commercially available around 1987, as predicted by the circle numbered 3 based on 1.3μm microlithography.

MSIX - A general and user-friendly platform for RAM analysis

NASA Astrophysics Data System (ADS)

Pan, Z. J.; Blemel, Peter

The authors present a CAD (computer-aided design) platform supporting RAM (reliability, availability, and maintainability) analysis with efficient system description and alternative evaluation. The design concepts, implementation techniques, and application results are described. This platform is user-friendly because of its graphic environment, drawing facilities, object orientation, self-tutoring, and access to the operating system. The programs' independency and portability make them generally applicable to various analysis tasks.

75 FR 44989 - In the Matter of Certain Semiconductor Chips Having Synchronous Dynamic Random Access Memory...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-07-30

... following respondents: NVIDIA Corporation of Santa Clara, California; Asustek Computer, Inc. of Taipei... exclusion order and cease- and-desist orders against respondents NVIDIA Corp.; Hewlett-Packard Co.; ASUS...

Realization of the Switching Mechanism in Resistance Random Access Memory™ Devices: Structural and Electronic Properties Affecting Electron Conductivity in a Hafnium Oxide-Electrode System Through First-Principles Calculations

NASA Astrophysics Data System (ADS)

Aspera, Susan Meñez; Kasai, Hideaki; Kishi, Hirofumi; Awaya, Nobuyoshi; Ohnishi, Shigeo; Tamai, Yukio

2013-01-01

The resistance random access memory (RRAM™) device, with its electrically induced nanoscale resistive switching capacity, has attracted considerable attention as a future nonvolatile memory device. Here, we propose a mechanism of switching based on an oxygen vacancy migration-driven change in the electronic properties of the transition-metal oxide film stimulated by set pulse voltages. We used density functional theory-based calculations to account for the effect of oxygen vacancies and their migration on the electronic properties of HfO2 and Ta/HfO2 systems, thereby providing a complete explanation of the RRAM™ switching mechanism. Furthermore, computational results on the activation energy barrier for oxygen vacancy migration were found to be consistent with the set and reset pulse voltage obtained from experiments. Understanding this mechanism will be beneficial to effectively realizing the materials design in these devices.

CMOS integration of high-k/metal gate transistors in diffusion and gate replacement (D&GR) scheme for dynamic random access memory peripheral circuits

NASA Astrophysics Data System (ADS)

Dentoni Litta, Eugenio; Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; O’Sullivan, Barry; Machkaoutsan, Vladimir; Fazan, Pierre; Ji, Yunhyuck; Mannaert, Geert; Lorant, Christophe; Sebaai, Farid; Thiam, Arame; Ercken, Monique; Demuynck, Steven; Horiguchi, Naoto

2018-04-01

Integration of high-k/metal gate stacks in peripheral transistors is a major candidate to ensure continued scaling of dynamic random access memory (DRAM) technology. In this paper, the CMOS integration of diffusion and gate replacement (D&GR) high-k/metal gate stacks is investigated, evaluating four different approaches for the critical patterning step of removing the N-type field effect transistor (NFET) effective work function (eWF) shifter stack from the P-type field effect transistor (PFET) area. The effect of plasma exposure during the patterning step is investigated in detail and found to have a strong impact on threshold voltage tunability. A CMOS integration scheme based on an experimental wet-compatible photoresist is developed and the fulfillment of the main device metrics [equivalent oxide thickness (EOT), eWF, gate leakage current density, on/off currents, short channel control] is demonstrated.

Combinatorial Investigation of ZrO2-Based Dielectric Materials for Dynamic Random-Access Memory Capacitors

NASA Astrophysics Data System (ADS)

Kiyota, Yuji; Itaka, Kenji; Iwashita, Yuta; Adachi, Tetsuya; Chikyow, Toyohiro; Ogura, Atsushi

2011-06-01

We investigated zirconia (ZrO2)-based material libraries in search of new dielectric materials for dynamic random-access memory (DRAM) by combinatorial-pulsed laser deposition (combi-PLD). We found that the substitution of yttrium (Y) to Zr sites in the ZrO2 system suppressed the leakage current effectively. The metal-insulator-metal (MIM) capacitor property of this system showed a leakage current density of less than 5×10-7 A/cm2 and the dielectric constant was 20. Moreover, the addition of titanium (Ti) or tantalum (Ta) to this system caused the dielectric constant to increase to ˜25 within the allowed leakage level of 5×10-7 A/cm2. Therefore, Zr-Y-Ti-O and Zr-Y-Ta-O systems have good potentials for use as new materials with high dielectric constants of DRAM capacitors instead of silicon dioxides (SiO2).

CROSS-DISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY: Simulation of SET Operation in Phase-Change Random Access Memories with Heater Addition and Ring-Type Contactor for Low-Power Consumption by Finite Element Modeling

NASA Astrophysics Data System (ADS)

Gong, Yue-Feng; Song, Zhi-Tang; Ling, Yun; Liu, Yan; Feng, Song-Lin

2009-11-01

A three-dimensional finite element model for phase change random access memory (PCRAM) is established for comprehensive electrical and thermal analysis during SET operation. The SET behaviours of the heater addition structure (HS) and the ring-type contact in bottom electrode (RIB) structure are compared with each other. There are two ways to reduce the RESET current, applying a high resistivity interfacial layer and building a new device structure. The simulation results indicate that the variation of SET current with different power reduction ways is little. This study takes the RESET and SET operation current into consideration, showing that the RIB structure PCRAM cell is suitable for future devices with high heat efficiency and high-density, due to its high heat efficiency in RESET operation.

Low leakage Ru-strontium titanate-Ru metal-insulator-metal capacitors for sub-20 nm technology node in dynamic random access memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Popovici, M., E-mail: Mihaela.Ioana.Popovici@imec.be; Swerts, J.; Redolfi, A.

2014-02-24

Improved metal-insulator-metal capacitor (MIMCAP) stacks with strontium titanate (STO) as dielectric sandwiched between Ru as top and bottom electrode are shown. The Ru/STO/Ru stack demonstrates clearly its potential to reach sub-20 nm technology nodes for dynamic random access memory. Downscaling of the equivalent oxide thickness, leakage current density (J{sub g}) of the MIMCAPs, and physical thickness of the STO have been realized by control of the Sr/Ti ratio and grain size using a heterogeneous TiO{sub 2}/STO based nanolaminate stack deposition and a two-step crystallization anneal. Replacement of TiN with Ru as both top and bottom electrodes reduces the amount of electricallymore » active defects and is essential to achieve a low leakage current in the MIM capacitor.« less

Windsock memory COnditioned RAM (CO-RAM) pressure effect: Forced reconnection in the Earth's magnetotail

NASA Astrophysics Data System (ADS)

Vörös, Z.; Facskó, G.; Khodachenko, M.; Honkonen, I.; Janhunen, P.; Palmroth, M.

2014-08-01

Magnetic reconnection (MR) is a key physical concept explaining the addition of magnetic flux to the magnetotail and closed flux lines back-motion to the dayside magnetosphere. This scenario elaborated by Dungey (1963) can explain many aspects of solar wind-magnetosphere interaction processes, including substorms. However, neither the Dungey model nor its numerous modifications were able to explain fully the onset conditions for MR in the tail. In this paper, we introduce new onset conditions for forced MR in the tail. We call our scenario the "windsock memory conditioned ram pressure effect." Our nonflux transfer-associated forcing is introduced by a combination of the large-scale windsock motions exhibiting memory effects and solar wind dynamic pressure actions on the nightside magnetopause during northward oriented interplanetary magnetic field (IMF). Using global MHD Grand Unified Magnetosphere Ionosphere Coupling Simulation version 4 simulation results, upstream data from Wind, magnetosheath data from Cluster 1 and distant tail data from the two-probe Acceleration, Reconnection, Turbulence and Electrodynamics of the Moon's Interaction with the Sun mission, we show that the simultaneous occurrence of vertical windsock motions of the magnetotail and enhanced solar wind dynamic pressure introduces strong nightside disturbances, including enhanced electric fields and persistent vertical cross-tail shear flows. These perturbations, associated with a stream interaction region in the solar wind, drive MR in the tail during episodes of northward oriented interplanetary magnetic field (IMF). We detect MR indirectly, observing plasmoids in the tail and ground-based signatures of earthward moving fast flows. We also consider the application to solar system planets and close-in exoplanets, where the proposed scenario can elucidate some new aspects of solar/stellar wind-magnetosphere interactions.

Design of a magnetic-tunnel-junction-oriented nonvolatile lookup table circuit with write-operation-minimized data shifting

NASA Astrophysics Data System (ADS)

Suzuki, Daisuke; Hanyu, Takahiro

2018-04-01

A magnetic-tunnel-junction (MTJ)-oriented nonvolatile lookup table (LUT) circuit, in which a low-power data-shift function is performed by minimizing the number of write operations in MTJ devices is proposed. The permutation of the configuration memory cell for read/write access is performed as opposed to conventional direct data shifting to minimize the number of write operations, which results in significant write energy savings in the data-shift function. Moreover, the hardware cost of the proposed LUT circuit is small since the selector is shared between read access and write access. In fact, the power consumption in the data-shift function and the transistor count are reduced by 82 and 52%, respectively, compared with those in a conventional static random-access memory-based implementation using a 90 nm CMOS technology.

Methodology for assessing the safety of Hydrogen Systems: HyRAM 1.1 technical reference manual

DOE Office of Scientific and Technical Information (OSTI.GOV)

Groth, Katrina; Hecht, Ethan; Reynolds, John Thomas

The HyRAM software toolkit provides a basis for conducting quantitative risk assessment and consequence modeling for hydrogen infrastructure and transportation systems. HyRAM is designed to facilitate the use of state-of-the-art science and engineering models to conduct robust, repeatable assessments of hydrogen safety, hazards, and risk. HyRAM is envisioned as a unifying platform combining validated, analytical models of hydrogen behavior, a stan- dardized, transparent QRA approach, and engineering models and generic data for hydrogen installations. HyRAM is being developed at Sandia National Laboratories for the U. S. De- partment of Energy to increase access to technical data about hydrogen safety andmore » to enable the use of that data to support development and revision of national and international codes and standards. This document provides a description of the methodology and models contained in the HyRAM version 1.1. HyRAM 1.1 includes generic probabilities for hydrogen equipment fail- ures, probabilistic models for the impact of heat flux on humans and structures, and computa- tionally and experimentally validated analytical and first order models of hydrogen release and flame physics. HyRAM 1.1 integrates deterministic and probabilistic models for quantifying accident scenarios, predicting physical effects, and characterizing hydrogen hazards (thermal effects from jet fires, overpressure effects from deflagrations), and assessing impact on people and structures. HyRAM is a prototype software in active development and thus the models and data may change. This report will be updated at appropriate developmental intervals.« less

Perpendicular magnetic anisotropy in CoXPd100-X alloys for magnetic tunnel junctions

NASA Astrophysics Data System (ADS)

Clark, B. D.; Natarajarathinam, A.; Tadisina, Z. R.; Chen, P. J.; Shull, R. D.; Gupta, S.

2017-08-01

CoFeB/MgO-based perpendicular magnetic tunnel junctions (p-MTJ's) with high anisotropy and low damping are critical for spin-torque transfer random access memory (STT-RAM). Most schemes of making the pinned CoFeB fully perpendicular require ferrimagnets with high damping constants, a high temperature-grown L10 alloy, or an overly complex multilayered synthetic antiferromagnet (SyAF). We report a compositional study of perpendicular CoxPd alloy-pinned Co20Fe60B20/MgO based MTJ stacks, grown at moderate temperatures in a planetary deposition system. The perpendicular anisotropy of the CoxPd alloy films can be tuned based on the layer thickness and composition. The films were characterized by alternating gradient magnetometry (AGM), energy-dispersive X-rays (EDX), and X-ray diffraction (XRD). Current-in-plane tunneling (CIPT) measurements have also been performed on the compositionally varied CoxPd MTJ stacks. The CoxPd alloy becomes fully perpendicular at approximately x = 30% (atomic fraction) Co. Full-film MTJ stacks of Si/SiO2/MgO (13)/CoXPd100-x (50)/Ta (0.3)/CoFeB (1)/MgO (1.6)/CoFeB (1)/Ta (5)/Ru (10), with the numbers enclosed in parentheses being the layer thicknesses in nm, were sputtered onto thermally oxidized silicon substrates and in-situ lamp annealed at 400 °C for 5 min. CIPT measurements indicate that the highest TMR is observed for the CoPd composition with the highest perpendicular magnetic anisotropy.

Evaluating Non-In-Place Update Techniques for Flash-Based Transaction Processing Systems

NASA Astrophysics Data System (ADS)

Wang, Yongkun; Goda, Kazuo; Kitsuregawa, Masaru

Recently, flash memory is emerging as the storage device. With price sliding fast, the cost per capacity is approaching to that of SATA disk drives. So far flash memory has been widely deployed in consumer electronics even partly in mobile computing environments. For enterprise systems, the deployment has been studied by many researchers and developers. In terms of the access performance characteristics, flash memory is quite different from disk drives. Without the mechanical components, flash memory has very high random read performance, whereas it has a limited random write performance because of the erase-before-write design. The random write performance of flash memory is comparable with or even worse than that of disk drives. Due to such a performance asymmetry, naive deployment to enterprise systems may not exploit the potential performance of flash memory at full blast. This paper studies the effectiveness of using non-in-place-update (NIPU) techniques through the IO path of flash-based transaction processing systems. Our deliberate experiments using both open-source DBMS and commercial DBMS validated the potential benefits; x3.0 to x6.6 performance improvement was confirmed by incorporating non-in-place-update techniques into file system without any modification of applications or storage devices.

Improving Unipolar Resistive Switching Uniformity with Cone-Shaped Conducting Filaments and Its Logic-In-Memory Application.

PubMed

Gao, Shuang; Liu, Gang; Chen, Qilai; Xue, Wuhong; Yang, Huali; Shang, Jie; Chen, Bin; Zeng, Fei; Song, Cheng; Pan, Feng; Li, Run-Wei

2018-02-21

Resistive random access memory (RRAM) with inherent logic-in-memory capability exhibits great potential to construct beyond von-Neumann computers. Particularly, unipolar RRAM is more promising because its single polarity operation enables large-scale crossbar logic-in-memory circuits with the highest integration density and simpler peripheral control circuits. However, unipolar RRAM usually exhibits poor switching uniformity because of random activation of conducting filaments and consequently cannot meet the strict uniformity requirement for logic-in-memory application. In this contribution, a new methodology that constructs cone-shaped conducting filaments by using chemically a active metal cathode is proposed to improve unipolar switching uniformity. Such a peculiar metal cathode will react spontaneously with the oxide switching layer to form an interfacial layer, which together with the metal cathode itself can act as a load resistor to prevent the overgrowth of conducting filaments and thus make them more cone-like. In this way, the rupture of conducting filaments can be strictly limited to the tip region, making their residual parts favorable locations for subsequent filament growth and thus suppressing their random regeneration. As such, a novel "one switch + one unipolar RRAM cell" hybrid structure is capable to realize all 16 Boolean logic functions for large-scale logic-in-memory circuits.

Advanced Simulation in Undergraduate Pilot Training: Automatic Instructional System

DTIC Science & Technology

1975-10-01

an addressable reel-to--reel audio tape recorder, a random access audio memory drum , and an interactive software package which permits the user to...audio memory drum , and an interactive software package which permits the user to develop preptogtahmed exercises. Figure 2 illustrates overall...Data Recprding System consists of two elements; an overlay program which performs the real-time sampling of specified variables and stores data to disc

a-SiNx:H-based ultra-low power resistive random access memory with tunable Si dangling bond conduction paths

PubMed Central

Jiang, Xiaofan; Ma, Zhongyuan; Xu, Jun; Chen, Kunji; Xu, Ling; Li, Wei; Huang, Xinfan; Feng, Duan

2015-01-01

The realization of ultra-low power Si-based resistive switching memory technology will be a milestone in the development of next generation non-volatile memory. Here we show that a high performance and ultra-low power resistive random access memory (RRAM) based on an Al/a-SiNx:H/p+-Si structure can be achieved by tuning the Si dangling bond conduction paths. We reveal the intrinsic relationship between the Si dangling bonds and the N/Si ratio x for the a-SiNx:H films, which ensures that the programming current can be reduced to less than 1 μA by increasing the value of x. Theoretically calculated current-voltage (I–V ) curves combined with the temperature dependence of the I–V characteristics confirm that, for the low-resistance state (LRS), the Si dangling bond conduction paths obey the trap-assisted tunneling model. In the high-resistance state (HRS), conduction is dominated by either hopping or Poole–Frenkel (P–F) processes. Our introduction of hydrogen in the a-SiNx:H layer provides a new way to control the Si dangling bond conduction paths, and thus opens up a research field for ultra-low power Si-based RRAM. PMID:26508086

a-SiNx:H-based ultra-low power resistive random access memory with tunable Si dangling bond conduction paths.

PubMed

Jiang, Xiaofan; Ma, Zhongyuan; Xu, Jun; Chen, Kunji; Xu, Ling; Li, Wei; Huang, Xinfan; Feng, Duan

2015-10-28

The realization of ultra-low power Si-based resistive switching memory technology will be a milestone in the development of next generation non-volatile memory. Here we show that a high performance and ultra-low power resistive random access memory (RRAM) based on an Al/a-SiNx:H/p(+)-Si structure can be achieved by tuning the Si dangling bond conduction paths. We reveal the intrinsic relationship between the Si dangling bonds and the N/Si ratio x for the a-SiNx:H films, which ensures that the programming current can be reduced to less than 1 μA by increasing the value of x. Theoretically calculated current-voltage (I-V) curves combined with the temperature dependence of the I-V characteristics confirm that, for the low-resistance state (LRS), the Si dangling bond conduction paths obey the trap-assisted tunneling model. In the high-resistance state (HRS), conduction is dominated by either hopping or Poole-Frenkel (P-F) processes. Our introduction of hydrogen in the a-SiNx:H layer provides a new way to control the Si dangling bond conduction paths, and thus opens up a research field for ultra-low power Si-based RRAM.

Impact of Linearity and Write Noise of Analog Resistive Memory Devices in a Neural Algorithm Accelerator

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jacobs-Gedrim, Robin B.; Agarwal, Sapan; Knisely, Kathrine E.

Resistive memory (ReRAM) shows promise for use as an analog synapse element in energy-efficient neural network algorithm accelerators. A particularly important application is the training of neural networks, as this is the most computationally-intensive procedure in using a neural algorithm. However, training a network with analog ReRAM synapses can significantly reduce the accuracy at the algorithm level. In order to assess this degradation, analog properties of ReRAM devices were measured and hand-written digit recognition accuracy was modeled for the training using backpropagation. Bipolar filamentary devices utilizing three material systems were measured and compared: one oxygen vacancy system, Ta-TaO x, andmore » two conducting metallization systems, Cu-SiO 2, and Ag/chalcogenide. Analog properties and conductance ranges of the devices are optimized by measuring the response to varying voltage pulse characteristics. Key analog device properties which degrade the accuracy are update linearity and write noise. Write noise may improve as a function of device manufacturing maturity, but write nonlinearity appears relatively consistent among the different device material systems and is found to be the most significant factor affecting accuracy. As a result, this suggests that new materials and/or fundamentally different resistive switching mechanisms may be required to improve device linearity and achieve higher algorithm training accuracy.« less

Impact of Linearity and Write Noise of Analog Resistive Memory Devices in a Neural Algorithm Accelerator

DOE PAGES

Jacobs-Gedrim, Robin B.; Agarwal, Sapan; Knisely, Kathrine E.; ...

2017-12-01

Resistive memory (ReRAM) shows promise for use as an analog synapse element in energy-efficient neural network algorithm accelerators. A particularly important application is the training of neural networks, as this is the most computationally-intensive procedure in using a neural algorithm. However, training a network with analog ReRAM synapses can significantly reduce the accuracy at the algorithm level. In order to assess this degradation, analog properties of ReRAM devices were measured and hand-written digit recognition accuracy was modeled for the training using backpropagation. Bipolar filamentary devices utilizing three material systems were measured and compared: one oxygen vacancy system, Ta-TaO x, andmore » two conducting metallization systems, Cu-SiO 2, and Ag/chalcogenide. Analog properties and conductance ranges of the devices are optimized by measuring the response to varying voltage pulse characteristics. Key analog device properties which degrade the accuracy are update linearity and write noise. Write noise may improve as a function of device manufacturing maturity, but write nonlinearity appears relatively consistent among the different device material systems and is found to be the most significant factor affecting accuracy. As a result, this suggests that new materials and/or fundamentally different resistive switching mechanisms may be required to improve device linearity and achieve higher algorithm training accuracy.« less

Manufacturing Methods and Technology for Digital Fault Isolation for Printed Circuit Boards.

DTIC Science & Technology

1979-08-25

microprocessors and support chips, ROMs, RAMs, UARTs , etc. They also include rules for busses and memory testing. The special rules for test points emphasize...I 8). UART .. ...................................................... I 9). SAT...0.0 I ( 8). UART ...................................................... 0.0O S 9). SAT

Investigation of resistive switching behaviours in WO3-based RRAM devices

NASA Astrophysics Data System (ADS)

Li, Ying-Tao; Long, Shi-Bing; Lü, Hang-Bing; Liu, Qi; Wang, Qin; Wang, Yan; Zhang, Sen; Lian, Wen-Tai; Liu, Su; Liu, Ming

2011-01-01

In this paper, a WO3-based resistive random access memory device composed of a thin film of WO3 sandwiched between a copper top and a platinum bottom electrodes is fabricated by electron beam evaporation at room temperature. The reproducible resistive switching, low power consumption, multilevel storage possibility, and good data retention characteristics demonstrate that the Cu/WO3/Pt memory device is very promising for future nonvolatile memory applications. The formation and rupture of localised conductive filaments is suggested to be responsible for the observed resistive switching behaviours.

Development of bubble memory recorder onboard Japan Earth Resources Satellite-1

NASA Astrophysics Data System (ADS)

Araki, Tsunehiko; Ishida, Chu; Ochiai, Kiyoshi; Nozue, Tatsuhiro; Tachibana, Kyozo; Yoshida, Kazutoshi

The Bubble Memory Recorder (BMR) developed for use on the Earth Resources Satellite is described in terms of its design, capabilities, and functions. The specifications of the BMR are given listing memory capacity, functions, and interface types for data, command, and telemetry functions. The BMR has an emergency signal interface to provide contingency recording, and a satellite-separation signal interface can be turned on automatically by signal input. Data are stored in a novolatile memory device so that the memory is retained during power outages. The BMR is characterized by a capability for random access, nonvolatility, and a solid-state design that is useful for space operations since it does not disturb spacecraft attitude.

RAPID: A random access picture digitizer, display, and memory system

NASA Technical Reports Server (NTRS)

Yakimovsky, Y.; Rayfield, M.; Eskenazi, R.

1976-01-01

RAPID is a system capable of providing convenient digital analysis of video data in real-time. It has two modes of operation. The first allows for continuous digitization of an EIA RS-170 video signal. Each frame in the video signal is digitized and written in 1/30 of a second into RAPID's internal memory. The second mode leaves the content of the internal memory independent of the current input video. In both modes of operation the image contained in the memory is used to generate an EIA RS-170 composite video output signal representing the digitized image in the memory so that it can be displayed on a monitor.

eRAM: encyclopedia of rare disease annotations for precision medicine.

PubMed

Jia, Jinmeng; An, Zhongxin; Ming, Yue; Guo, Yongli; Li, Wei; Liang, Yunxiang; Guo, Dongming; Li, Xin; Tai, Jun; Chen, Geng; Jin, Yaqiong; Liu, Zhimei; Ni, Xin; Shi, Tieliu

2018-01-04

Rare diseases affect over a hundred million people worldwide, most of these patients are not accurately diagnosed and effectively treated. The limited knowledge of rare diseases forms the biggest obstacle for improving their treatment. Detailed clinical phenotyping is considered as a keystone of deciphering genes and realizing the precision medicine for rare diseases. Here, we preset a standardized system for various types of rare diseases, called encyclopedia of Rare disease Annotations for Precision Medicine (eRAM). eRAM was built by text-mining nearly 10 million scientific publications and electronic medical records, and integrating various data in existing recognized databases (such as Unified Medical Language System (UMLS), Human Phenotype Ontology, Orphanet, OMIM, GWAS). eRAM systematically incorporates currently available data on clinical manifestations and molecular mechanisms of rare diseases and uncovers many novel associations among diseases. eRAM provides enriched annotations for 15 942 rare diseases, yielding 6147 human disease related phenotype terms, 31 661 mammalians phenotype terms, 10,202 symptoms from UMLS, 18 815 genes and 92 580 genotypes. eRAM can not only provide information about rare disease mechanism but also facilitate clinicians to make accurate diagnostic and therapeutic decisions towards rare diseases. eRAM can be freely accessed at http://www.unimd.org/eram/. © The Author(s) 2017. Published by Oxford University Press on behalf of Nucleic Acids Research.

High Speed Oblivious Random Access Memory (HS-ORAM)

DTIC Science & Technology

2015-09-01

Bryan Parno, “Non-interactive verifiable computing: Outsourcing computation to untrusted workers”, 30th International Cryptology Conference, pp. 465...holder or any other person or corporation; or convey any rights or permission to manufacture , use, or sell any patented invention that may relate to...secure outsourced data access protocols. HS-ORAM deploys a number of server- side software components running inside tamper-proof secure coprocessors

Ease of Access to List Items in Short-Term Memory Depends on the Order of the Recognition Probes

ERIC Educational Resources Information Center

Lange, Elke B.; Cerella, John; Verhaeghen, Paul

2011-01-01

We report data from 4 experiments using a recognition design with multiple probes to be matched to specific study positions. Items could be accessed rapidly, independent of set size, when the test order matched the study order (forward condition). When the order of testing was random, backward, or in a prelearned irregular sequence (reordered…

Stroboscope Controller for Imaging Helicopter Rotors

NASA Technical Reports Server (NTRS)

Jensen, Scott; Marmie, John; Mai, Nghia

2004-01-01

A versatile electronic timing-and-control unit, denoted a rotorcraft strobe controller, has been developed for use in controlling stroboscopes, lasers, video cameras, and other instruments for capturing still images of rotating machine parts especially helicopter rotors. This unit is designed to be compatible with a variety of sources of input shaftangle or timing signals and to be capable of generating a variety of output signals suitable for triggering instruments characterized by different input-signal specifications. It is also designed to be flexible and reconfigurable in that it can be modified and updated through changes in its control software, without need to change its hardware. Figure 1 is a block diagram of the rotorcraft strobe controller. The control processor is a high-density complementary metal oxide semiconductor, singlechip 8-bit microcontroller. It is connected to a 32K x 8 nonvolatile static random-access memory (RAM) module. Also connected to the control processor is a 32K 8 electrically programmable read-only-memory (EPROM) module, which is used to store the control software. Digital logic support circuitry is implemented in a field-programmable gate array (FPGA). A 240 x 128-dot, 40- character 16-line liquid-crystal display (LCD) module serves as a graphical user interface; the user provides input through a 16-key keypad mounted next to the LCD. A 12-bit digital-to-analog converter (DAC) generates a 0-to-10-V ramp output signal used as part of a rotor-blade monitoring system, while the control processor generates all the appropriate strobing signals. Optocouplers are used to isolate all input and output digital signals, and optoisolators are used to isolate all analog signals. The unit is designed to fit inside a 19-in. (.48-cm) rack-mount enclosure. Electronic components are mounted on a custom printed-circuit board (see Figure 2). Two power-conversion modules on the printedcircuit board convert AC power to +5 VDC and 15 VDC, respectively.

Telephone word-list recall tested in the rural aging and memory study: two parallel versions for the TICS-M.

PubMed

Hogervorst, Eva; Bandelow, Stephan; Hart, John; Henderson, Victor W

2004-09-01

Parallel versions of memory tasks are useful in clinical and research settings to reduce practice effects engendered by multiple administrations. We aimed to investigate the usefulness of three parallel versions of ten-item word list recall tasks administered by telephone. A population based telephone survey of middle-aged and elderly residents of Bradley County, Arkansas was carried out as part of the Rural Aging and Memory Study (RAMS). Participants in the study were 1845 persons aged 40 to 95 years. Word lists included that used in the telephone interview of cognitive status (TICS) as a criterion standard and two newly developed lists. The mean age of participants was 61.05 (SD 12.44) years; 39.5% were over age 65. 78% of the participants had completed high school, 66% were women and 21% were African-American. There was no difference in demographic characteristics between groups receiving different word list versions, and performances on the three versions were equivalent for both immediate (mean 4.22, SD 1.53) and delayed (mean 2.35 SD 1.75) recall trials. The total memory score (immediate+delayed recall) was negatively associated with older age (beta = -0.41, 95%CI=-0.11 to -0.04), lower education (beta = 0.24, 95%CI = 0.36 to 0.51), male gender (beta = -0.18, 95%CI = -1.39 to -0.90) and African-American race (beta = -0.15, 95%CI = -1.41 to -0.82). The two RAMS word recall lists and the TICS word recall list can be used interchangeably in telephone assessment of memory of middle-aged and elderly persons. This finding is important for future studies where parallel versions of a word-list memory task are needed. (250 words).

Context-dependent activation of reduced autobiographical memory specificity as an avoidant coping style.

PubMed

Debeer, Elise; Raes, Filip; Williams, J Mark G; Hermans, Dirk

2011-12-01

According to the affect-regulation hypothesis (Williams et al., 2007), reduced autobiographical memory specificity (rAMS) or overgeneral memory (OGM) might be considered a cognitive avoidance strategy; that is, people learn to avoid the emotionally painful consequences associated with the retrieval of specific negative memories. Based on this hypothesis, one would predict significant negative associations between AMS and avoidant coping. However, studies investigating this prediction have led to equivocal results. In the present study we tested a possible explanation for these contradictory findings. It was hypothesized that rAMS (in part) reflects an avoidant coping strategy, which might only become apparent under certain conditions, that is, conditions that signal the possibility of 'danger.' To test this hypothesis, we assessed AMS and behavioral avoidance but experimentally manipulated the instructions. In the neutral condition, two parallel versions of the Autobiographical Memory Test (AMT) were presented under neutral instructions. In the threat condition, the first AMT was presented under neutral instructions, while the second AMT was presented under 'threat instructions.' Results showed no significant correlations between avoidance and OGM under neutral conditions but significant and markedly stronger correlations under threat conditions, with more avoidance being associated with fewer specific and more categoric memories. In addition, high avoiders showed a stronger reduction in AMS in the threat condition as compared with the neutral condition, while low avoiders showed no such difference between conditions. The data confirm that OGM can be considered as part of a broader avoidant coping style. However, more importantly, they show that, at least in nonclinical individuals, the activation of this coping style may depend on the context. (c) 2011 APA, all rights reserved.

SRAM As An Array Of Energetic-Ion Detectors

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Blaes, Brent R.; Lieneweg, Udo; Nixon, Robert H.

1993-01-01

Static random-access memory (SRAM) designed for use as array of energetic-ion detectors. Exploits well-known tendency of incident energetic ions to cause bit flips in cells of electronic memories. Design of ion-detector SRAM involves modifications of standard SRAM design to increase sensitivity to ions. Device fabricated by use of conventional complementary metal oxide/semiconductor (CMOS) processes. Potential uses include gas densimetry, position sensing, and measurement of cosmic-ray spectrum.

Asymmetric Memory Circuit Would Resist Soft Errors

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Perlman, Marvin

1990-01-01

Some nonlinear error-correcting codes more efficient in presence of asymmetry. Combination of circuit-design and coding concepts expected to make integrated-circuit random-access memories more resistant to "soft" errors (temporary bit errors, also called "single-event upsets" due to ionizing radiation). Integrated circuit of new type made deliberately more susceptible to one kind of bit error than to other, and associated error-correcting code adapted to exploit this asymmetry in error probabilities.

Environmental Containment Property Estimation Using QSARs in an Expert System

DTIC Science & Technology

1993-01-15

2 megabytes of memory (RAM), with 1000 kBytes of memory allocated for HyperCard. PEP overview The PEP system currently consists of four HyperCard...BCF Universel I ’ mI Figure 6. TSA module card from PEP The TSA module is also designed to accept files generated by other hardware/software... allocated to 1500 MB. * Installation of PEP PEP is typically shipped on one 3.5 inch 1.44 Megabyte floppy disk. To install PEP: 1. Insert the PEP disk into

Portable and Error-Free DNA-Based Data Storage.

PubMed

Yazdi, S M Hossein Tabatabaei; Gabrys, Ryan; Milenkovic, Olgica

2017-07-10

DNA-based data storage is an emerging nonvolatile memory technology of potentially unprecedented density, durability, and replication efficiency. The basic system implementation steps include synthesizing DNA strings that contain user information and subsequently retrieving them via high-throughput sequencing technologies. Existing architectures enable reading and writing but do not offer random-access and error-free data recovery from low-cost, portable devices, which is crucial for making the storage technology competitive with classical recorders. Here we show for the first time that a portable, random-access platform may be implemented in practice using nanopore sequencers. The novelty of our approach is to design an integrated processing pipeline that encodes data to avoid costly synthesis and sequencing errors, enables random access through addressing, and leverages efficient portable sequencing via new iterative alignment and deletion error-correcting codes. Our work represents the only known random access DNA-based data storage system that uses error-prone nanopore sequencers, while still producing error-free readouts with the highest reported information rate/density. As such, it represents a crucial step towards practical employment of DNA molecules as storage media.

Models for Total-Dose Radiation Effects in Non-Volatile Memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Campbell, Philip Montgomery; Wix, Steven D.

The objective of this work is to develop models to predict radiation effects in non- volatile memory: flash memory and ferroelectric RAM. In flash memory experiments have found that the internal high-voltage generators (charge pumps) are the most sensitive to radiation damage. Models are presented for radiation effects in charge pumps that demonstrate the experimental results. Floating gate models are developed for the memory cell in two types of flash memory devices by Intel and Samsung. These models utilize Fowler-Nordheim tunneling and hot electron injection to charge and erase the floating gate. Erase times are calculated from the models andmore » compared with experimental results for different radiation doses. FRAM is less sensitive to radiation than flash memory, but measurements show that above 100 Krad FRAM suffers from a large increase in leakage current. A model for this effect is developed which compares closely with the measurements.« less

77 FR 11486 - Fresh Garlic From the People's Republic of China: Partial Final Results and Partial Final...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-02-27

... between grades are based on color, size, sheathing, and level of decay. The scope of the order does not... Less than Fair Value: Static Random Access Memory Semiconductors From Taiwan, 63 FR 8909, 8911...

Preparation of School District Budgets with Microcomputer Electronic Spreadsheets.

ERIC Educational Resources Information Center

Hinitz, Herman J.

1996-01-01

Preparing a microcomputer electronic spreadsheet containing all relevant school district budgetary information is possible with currently available hardware and software (such as Lotus 1-2-3), despite random-access-memory limitations. Spreadsheets can provide financial summaries, inventory-control listings, scheduling alternatives,…

High density submicron magnetoresistive random access memory (invited)

NASA Astrophysics Data System (ADS)

Tehrani, S.; Chen, E.; Durlam, M.; DeHerrera, M.; Slaughter, J. M.; Shi, J.; Kerszykowski, G.

1999-04-01

Various giant magnetoresistance material structures were patterned and studied for their potential as memory elements. The preferred memory element, based on pseudo-spin valve structures, was designed with two magnetic stacks (NiFeCo/CoFe) of different thickness with Cu as an interlayer. The difference in thickness results in dissimilar switching fields due to the shape anisotropy at deep submicron dimensions. It was found that a lower switching current can be achieved when the bits have a word line that wraps around the bit 1.5 times. Submicron memory elements integrated with complementary metal-oxide-semiconductor (CMOS) transistors maintained their characteristics and no degradation to the CMOS devices was observed. Selectivity between memory elements in high-density arrays was demonstrated.

Non-volatile memory based on the ferroelectric photovoltaic effect

PubMed Central

Guo, Rui; You, Lu; Zhou, Yang; Shiuh Lim, Zhi; Zou, Xi; Chen, Lang; Ramesh, R.; Wang, Junling

2013-01-01

The quest for a solid state universal memory with high-storage density, high read/write speed, random access and non-volatility has triggered intense research into new materials and novel device architectures. Though the non-volatile memory market is dominated by flash memory now, it has very low operation speed with ~10 μs programming and ~10 ms erasing time. Furthermore, it can only withstand ~105 rewriting cycles, which prevents it from becoming the universal memory. Here we demonstrate that the significant photovoltaic effect of a ferroelectric material, such as BiFeO3 with a band gap in the visible range, can be used to sense the polarization direction non-destructively in a ferroelectric memory. A prototype 16-cell memory based on the cross-bar architecture has been prepared and tested, demonstrating the feasibility of this technique. PMID:23756366

Association of soybean-based extenders with field fertility of stored ram (Ovis aries) semen: a randomized double-blind parallel group design.

PubMed

Khalifa, Tarek; Lymberopoulos, Aristotelis; Theodosiadou, Ekaterini

2013-02-01

Two consecutive randomized double-blind field fertility experiments were conducted over a 4-month period and aimed at evaluating the association of two commercial soybean lecithin-based extenders (AndroMed [Minitub, Tiefenbach, Germany] and BioXcell [IMV Technologies, L'Aigle, France]) with pregnancy rates of chilled-stored (CS) and frozen-thawed (FT) ram semen. Semen samples with more than 2 × 10(9) sperm per mL and 70% progressive motile spermatozoa were collected via an artificial vagina from twelve proven fertile Chios rams, split-diluted with the above mentioned extenders, packaged in 0.25 mL straws and either stored at 5 ± 1 °C for 30 to 36 hours or frozen and thawed. Non-lactating multiparous ewes were inseminated in progestagen-synchronized estrus either with CS (AndroMed: N = 212 and BioXcell: N = 206; intracervical AI) or with FT (AndroMed: N = 114 and BioXcell: N = 92; laparoscopic intrauterine AI) semen. Ovulation was confirmed in all ewes based on determination of blood plasma progesterone (>1 ng/mL) 8 days post AI. Ewes were screened for pregnancy diagnosis by transabdominal ultrasonography 65 days post AI. BioXcell was superior to AndroMed in preserving the fertilizing potential of CS (P < 0.05) and FT (P < 0.005) semen. In AndroMed-stored semen, young rams (1.5-2.5 years old, N = 8) had a pregnancy rate (59.1%; 124/210) lower than that (72.4%; 84/116) of mature rams (4.5 to 5.5 years, N = 4; P < 0.025). Compared with AndroMed extender, processing of young ram semen in BioXcell extender improved pregnancy rates of CS (66.7%; 88/132 vs. 83.9%; 94/112; P < 0.005) and FT (46.2%; 36/78 vs. 71.0%; 44/62; P < 0.01) spermatozoa. Both extenders were similarly effective in preserving pregnancy rates of mature ram semen (P > 0.05). Ram-by-extender interactions were significant for pregnancy rates of CS and FT semen. Irrespective of extenders, overall pregnancy rates after intracervical and intrauterine AI were 75.1% and 62.2%, respectively (P < 0.001). In conclusion, BioXcell is a suitable extender for short- and long-term storage of ram semen. Selection of the ewes, farms, and extenders for intracervical AI programs can contribute to satisfactory fertility rates with semen preserved more than 24 hours at 5 °C. Copyright © 2013 Elsevier Inc. All rights reserved.

Radiation Testing, Characterization and Qualification Challenges for Modern Microelectronics and Photonics Devices and Technologies

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Cohn, Lewis M.

2008-01-01

At GOMAC 2007, we discussed a selection of the challenges for radiation testing of modern semiconductor devices focusing on state-of-the-art memory technologies. This included FLASH non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs). In this presentation, we extend this discussion in device packaging and complexity as well as single event upset (SEU) mechanisms using several technology areas as examples including: system-on-a-chip (SOC) devices and photonic or fiber optic systems. The underlying goal is intended to provoke thought for understanding the limitations and interpretation of radiation testing results.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fang, Runchen; Yu, Shimeng, E-mail: shimengy@asu.edu; School of Electrical, Computer, and Energy Engineering, Arizona State University, Tempe, Arizona 85287

The total ionizing dose (TID) effect of gamma-ray (γ-ray) irradiation on HfOx based resistive random access memory was investigated by electrical and material characterizations. The memory states can sustain TID level ∼5.2 Mrad (HfO{sub 2}) without significant change in the functionality or the switching characteristics under pulse cycling. However, the stability of the filament is weakened after irradiation as memory states are more vulnerable to flipping under the electrical stress. X-ray photoelectron spectroscopy was performed to ascertain the physical mechanism of the stability degradation, which is attributed to the Hf-O bond breaking by the high-energy γ-ray exposure.

Spin torque switching of 20 nm magnetic tunnel junctions with perpendicular anisotropy

NASA Astrophysics Data System (ADS)

Gajek, M.; Nowak, J. J.; Sun, J. Z.; Trouilloud, P. L.; O'Sullivan, E. J.; Abraham, D. W.; Gaidis, M. C.; Hu, G.; Brown, S.; Zhu, Y.; Robertazzi, R. P.; Gallagher, W. J.; Worledge, D. C.

2012-03-01

Spin-transfer torque magnetic random access memory (STT-MRAM) is one of the most promising emerging non-volatile memory technologies. MRAM has so far been demonstrated with a unique combination of density, speed, and non-volatility in a single chip, however, without the capability to replace any single mainstream memory. In this paper, we demonstrate the basic physics of spin torque switching in 20 nm diameter magnetic tunnel junctions with perpendicular magnetic anisotropy materials. This deep scaling capability clearly indicates the STT MRAM device itself may be suitable for integration at much higher densities than previously proven.

Bistable resistive memory behavior in gelatin-CdTe quantum dot composite film

NASA Astrophysics Data System (ADS)

Vallabhapurapu, Sreedevi; Rohom, Ashwini; Chaure, N. B.; Du, Shengzhi; Srinivasan, Ananthakrishnan

2018-05-01

Bistable memory behavior has been observed for the first time in gelatin type A thin film dispersed with functionalized CdTe quantum dots. The two terminal device with the polymer nanocomposite layer sandwiched between an indium tin oxide coated glass plate and an aluminium top electrode performs as a bistable resistive random access memory module. Butterfly shaped (O-shaped with a hysteresis in forward and reverse sweeps) current-voltage response is observed in this device. The conduction mechanism leading to the bistable electrical switching has been deduced to be a combination of ohmic and electron hopping.

Investigating the origins of high multilevel resistive switching in forming free Ti/TiO2-x-based memory devices through experiments and simulations

NASA Astrophysics Data System (ADS)

Bousoulas, P.; Giannopoulos, I.; Asenov, P.; Karageorgiou, I.; Tsoukalas, D.

2017-03-01

Although multilevel capability is probably the most important property of resistive random access memory (RRAM) technology, it is vulnerable to reliability issues due to the stochastic nature of conducting filament (CF) creation. As a result, the various resistance states cannot be clearly distinguished, which leads to memory capacity failure. In this work, due to the gradual resistance switching pattern of TiO2-x-based RRAM devices, we demonstrate at least six resistance states with distinct memory margin and promising temporal variability. It is shown that the formation of small CFs with high density of oxygen vacancies enhances the uniformity of the switching characteristics in spite of the random nature of the switching effect. Insight into the origin of the gradual resistance modulation mechanisms is gained by the application of a trap-assisted-tunneling model together with numerical simulations of the filament formation physical processes.

Signal and noise extraction from analog memory elements for neuromorphic computing.

PubMed

Gong, N; Idé, T; Kim, S; Boybat, I; Sebastian, A; Narayanan, V; Ando, T

2018-05-29

Dense crossbar arrays of non-volatile memory (NVM) can potentially enable massively parallel and highly energy-efficient neuromorphic computing systems. The key requirements for the NVM elements are continuous (analog-like) conductance tuning capability and switching symmetry with acceptable noise levels. However, most NVM devices show non-linear and asymmetric switching behaviors. Such non-linear behaviors render separation of signal and noise extremely difficult with conventional characterization techniques. In this study, we establish a practical methodology based on Gaussian process regression to address this issue. The methodology is agnostic to switching mechanisms and applicable to various NVM devices. We show tradeoff between switching symmetry and signal-to-noise ratio for HfO 2 -based resistive random access memory. Then, we characterize 1000 phase-change memory devices based on Ge 2 Sb 2 Te 5 and separate total variability into device-to-device variability and inherent randomness from individual devices. These results highlight the usefulness of our methodology to realize ideal NVM devices for neuromorphic computing.

Nanoscale chemical state analysis of resistance random access memory device reacting with Ti

NASA Astrophysics Data System (ADS)

Shima, Hisashi; Nakano, Takashi; Akinaga, Hiro

2010-05-01

The thermal stability of the resistance random access memory material in the reducing atmosphere at the elevated temperature was improved by the addition of Ti. The unipolar resistance switching before and after the postdeposition annealing (PDA) process at 400 °C was confirmed in Pt/CoO/Ti(5 nm)/Pt device, while the severe degradation of the initial resistance occurs in the Pt/CoO/Pt and Pt/CoO/Ti(50 nm)/Pt devices. By investigating the chemical bonding states of Co, O, and Ti using electron energy loss spectroscopy combined with transmission electron microscopy, it was revealed that excess Ti induces the formation of metallic Co, while the thermal stability was improved by trace Ti. Moreover, it was indicated that the filamentary conduction path can be thermally induced after PDA in the oxide layer by analyzing electrical properties of the degraded devices. The adjustment of the reducing elements is quite essential in order to participate in their profits.

Forming-free, bipolar resistivity switching characteristics of fully transparent resistive random access memory with IZO/α-IGZO/ITO structure

NASA Astrophysics Data System (ADS)

Lo, Chun-Chieh; Hsieh, Tsung-Eong

2016-09-01

Fully transparent resistive random access memory (TRRAM) containing amorphous indium gallium zinc oxide as the resistance switching (RS) layer and transparent conducting oxides (indium zinc oxide and indium tin oxide) as the electrodes was prepared. Optical measurement indicated the transmittance of device exceeds 80% in visible-light wavelength range. TRRAM samples exhibited the forming-free feature and the best electrical performance (V SET  =  0.61 V V RESET  =  -0.76 V R HRS/R LRS (i.e. the R-ratio)  >103) was observed in the device subject to a post-annealing at 300 °C for 1 hr in atmospheric ambient. Such a sample also exhibited satisfactory endurance and retention properties at 85 °C as revealed by the reliability tests. Electrical measurement performed in vacuum ambient indicated that the RS mechanism correlates with the charge trapping/de-trapping process associated with oxygen defects in the RS layer.

Dynamic-load-enabled ultra-low power multiple-state RRAM devices.

PubMed

Yang, Xiang; Chen, I-Wei

2012-01-01

Bipolar resistance-switching materials allowing intermediate states of wide-varying resistance values hold the potential of drastically reduced power for non-volatile memory. To exploit this potential, we have introduced into a nanometallic resistance-random-access-memory (RRAM) device an asymmetric dynamic load, which can reliably lower switching power by orders of magnitude. The dynamic load is highly resistive during on-switching allowing access to the highly resistive intermediate states; during off-switching the load vanishes to enable switching at low voltage. This approach is entirely scalable and applicable to other bipolar RRAM with intermediate states. The projected power is 12 nW for a 100 × 100 nm(2) device and 500 pW for a 10 × 10 nm(2) device. The dynamic range of the load can be increased to allow power to be further decreased by taking advantage of the exponential decay of wave-function in a newly discovered nanometallic random material, reaching possibly 1 pW for a 10×10 nm(2) nanometallic RRAM device.

Electrical Characterization of the RCA CDP1822SD Random Access Memory, Volume 1, Appendix a

NASA Technical Reports Server (NTRS)

Klute, A.

1979-01-01

Electrical characteristization tests were performed on 35 RCA CDP1822SD, 256-by-4-bit, CMOS, random access memories. The tests included three functional tests, AC and DC parametric tests, a series of schmoo plots, rise/fall time screening, and a data retention test. All tests were performed on an automated IC test system with temperatures controlled by a thermal airstream unit. All the functional tests, the data retention test, and the AC and DC parametric tests were performed at ambient temperatures of 25 C, -20 C, -55 C, 85 C, and 125 C. The schmoo plots were performed at ambient temperatures of 25 C, -55 C, and 125 C. The data retention test was performed at 25 C. Five devices failed one or more functional tests and four of these devices failed to meet the expected limits of a number of AC parametric tests. Some of the schmoo plots indicated a small degree of interaction between parameters.

Electrical Evaluation of RCA MWS5001D Random Access Memory, Volume 1

NASA Technical Reports Server (NTRS)

Klute, A.

1979-01-01

Electrical characterization and qualification tests were performed on the RCA MWS5001D, 1024 by 1-bit, CMOS, random access memory. Characterization tests were performed on five devices. The tests included functional tests, AC parametric worst case pattern selection test, determination of worst-case transition for setup and hold times and a series of schmoo plots. The qualification tests were performed on 32 devices and included a 2000 hour burn in with electrical tests performed at 0 hours and after 168, 1000, and 2000 hours of burn in. The tests performed included functional tests and AC and DC parametric tests. All of the tests in the characterization phase, with the exception of the worst-case transition test, were performed at ambient temperatures of 25, -55 and 125 C. The worst-case transition test was performed at 25 C. The preburn in electrical tests were performed at 25, -55, and 125 C. All burn in endpoint tests were performed at 25, -40, -55, 85, and 125 C.

Growth performance and hematology of Djallonké rams fed haulms of four varieties of groundnut (Arachis hypogaea L.).

PubMed

Ansah, Terry; Yaccub, Zanabongo I; Rahman, Nurudeen A

2017-12-01

The study was conducted to assess the chemical composition of the haulms of 4 dual-purpose groundnut ( Arachis hypogaea L.) varieties and their effects on the growth and hematology of Djallonké rams. The groundnut varieties were ICGV 97049 (Obolo), ICGX SM 87057 (Yenyawoso), RMP 12 (Azivivi) and Manipinta. Rams (live weight 15.0 ± 3.0 kg) were randomly assigned to 4 sole groundnut haulm meal (GHM) treatments, with 4 rams each in an individual pen per treatment (total n  = 16 rams). Samples of the groundnut haulms were milled and analyzed for crude protein (CP), neutral detergent fiber (NDF) and acid detergent fiber (ADF). The CP concentration was higher ( P  < 0.05) in Azivivi, Manipinta and Yenyawoso than in Obolo. The highest ( P  < 0.05) NDF and ADF fractions were obtained in Obolo. Whilst no significant difference was reported in total and daily dry matter (DM) intake among the varieties, CP, NDF and ADF intake all differed between Obolo and other varieties. The apparent nutrient digestibility did not differ ( P  > 0.05) when the Djallonké rams were fed the haulms. However, significant differences were observed in final live weight and average daily live weight gain. Rams fed the Yenyawoso variety had higher ( P  < 0.05) final live weight and average daily live weight gain compared with those fed Obolo and Azivivi varieties. Consumption of any of the 4 varieties of groundnut haulms by Djallonké rams did not have any harmful effect on their red and white blood cell numbers and hemoglobin concentration. The study revealed that the different varieties of groundnut haulms differ in nutrient composition and also affect the growth performance of the rams. The Yenyawoso variety may be used as a sole diet for fattening Djallonké rams.

Static Behavior of Chalcogenide Based Programmable Metallization Cells

NASA Astrophysics Data System (ADS)

Rajabi, Saba

Nonvolatile memory (NVM) technologies have been an integral part of electronic systems for the past 30 years. The ideal non-volatile memory have minimal physical size, energy usage, and cost while having maximal speed, capacity, retention time, and radiation hardness. A promising candidate for next-generation memory is ion-conducting bridging RAM which is referred to as programmable metallization cell (PMC), conductive bridge RAM (CBRAM), or electrochemical metallization memory (ECM), which is likely to surpass flash memory in all the ideal memory characteristics. A comprehensive physics-based model is needed to completely understand PMC operation and assist in design optimization. To advance the PMC modeling effort, this thesis presents a precise physical model parameterizing materials associated with both ion-rich and ion-poor layers of the PMC's solid electrolyte, so that captures the static electrical behavior of the PMC in both its low-resistance on-state (LRS) and high resistance off-state (HRS). The experimental data is measured from a chalcogenide glass PMC designed and manufactured at ASU. The static on- and off-state resistance of a PMC device composed of a layered (Ag-rich/Ag-poor) Ge30Se70 ChG film is characterized and modeled using three dimensional simulation code written in Silvaco Atlas finite element analysis software. Calibrating the model to experimental data enables the extraction of device parameters such as material bandgaps, workfunctions, density of states, carrier mobilities, dielectric constants, and affinities. The sensitivity of our modeled PMC to the variation of its prominent achieved material parameters is examined on the HRS and LRS impedance behavior. The obtained accurate set of material parameters for both Ag-rich and Ag-poor ChG systems and process variation verification on electrical characteristics enables greater fidelity in PMC device simulation, which significantly enhances our ability to understand the underlying physics of ChG-based resistive switching memory.

Evaluation of Data Retention Characteristics for Ferroelectric Random Access Memories (FRAMs)

NASA Technical Reports Server (NTRS)

Sharma, Ashok K.; Teverovsky, Alexander

2001-01-01

Data retention and fatigue characteristics of 64 Kb lead zirconate titanate (PZT)-based Ferroelectric Random Access Memories (FRAMs) microcircuits manufactured by Ramtron were examined over temperature range from -85 C to +310 C for ceramic packaged parts and from -85 C to +175 C for plastic parts, during retention periods up to several thousand hours. Intrinsic failures, which were caused by a thermal degradation of the ferroelectric cells, occurred in ceramic parts after tens or hundreds hours of aging at temperatures above 200 C. The activation energy of the retention test failures was 1.05 eV and the extrapolated mean-time-to-failure (MTTF) at room temperature was estimated to be more than 280 years. Multiple write-read cycling (up to 3x10(exp 7)) during the fatigue testing of plastic and ceramic parts did not result in any parametric or functional failures. However, operational currents linearly decreased with the logarithm of number of cycles thus indicating fatigue process in PZT films. Plastic parts, that had more recent date code as compared to ceramic parts, appeared to be using die with improved process technology and showed significantly smaller changes in operational currents and data access times.

New On-board Microprocessors

NASA Astrophysics Data System (ADS)

Weigand, R.

Two new processor devices have been developed for the use on board of spacecrafts. An 8-bit 8032-microcontroller targets typical controlling applications in instruments and sub-systems, or could be used as a main processor on small satellites, whereas the LEON 32-bit SPARC processor can be used for high performance controlling and data processing tasks. The ADV80S32 is fully compliant to the Intel 80x1 architecture and instruction set, extended by additional peripherals, 512 bytes on-chip RAM and a bootstrap PROM, which allows downloading the application software using the CCSDS PacketWire pro- tocol. The memory controller provides a de-multiplexed address/data bus, and allows to access up to 16 MB data and 8 MB program RAM. The peripherals have been de- signed for the specific needs of a spacecraft, such as serial interfaces compatible to RS232, PacketWire and TTC-B-01, counters/timers for extended duration and a CRC calculation unit accelerating the CCSDS TM/TC protocol. The 0.5 um Atmel manu- facturing technology (MG2RT) provides latch-up and total dose immunity; SEU fault immunity is implemented by using SEU hardened Flip-Flops and EDAC protection of internal and external memories. The maximum clock frequency of 20 MHz allows a processing power of 3 MIPS. Engineering samples are available. For SW develop- ment, various SW packages for the 8051 architecture are on the market. The LEON processor implements a 32-bit SPARC V8 architecture, including all the multiply and divide instructions, complemented by a floating-point unit (FPU). It includes several standard peripherals, such as timers/watchdog, interrupt controller, UARTs, parallel I/Os and a memory controller, allowing to use 8, 16 and 32 bit PROM, SRAM or memory mapped I/O. With on-chip separate instruction and data caches, almost one instruction per clock cycle can be reached in some applications. A 33-MHz 32-bit PCI master/target interface and a PCI arbiter allow operating the device in a plug-in card (for SW development on PC etc.), or to consider using it as a PCI master controller in an on-board system. Advanced SEU fault tolerance is in- troduced by design, using triple modular redundancy (TMR) flip-flops for all registers and EDAC protection for all memories. The device will be manufactured in a radia- tion hard Atmel 0.25 um technology, targeting 100 MHz processor clock frequency. The non fault-tolerant LEON processor VHDL model is available as free source code, and the SPARC architecture is a well-known industry standard. Therefore, know-how, software tools and operating systems are widely available.

Solving large test-day models by iteration on data and preconditioned conjugate gradient.

PubMed

Lidauer, M; Strandén, I; Mäntysaari, E A; Pösö, J; Kettunen, A

1999-12-01

A preconditioned conjugate gradient method was implemented into an iteration on a program for data estimation of breeding values, and its convergence characteristics were studied. An algorithm was used as a reference in which one fixed effect was solved by Gauss-Seidel method, and other effects were solved by a second-order Jacobi method. Implementation of the preconditioned conjugate gradient required storing four vectors (size equal to number of unknowns in the mixed model equations) in random access memory and reading the data at each round of iteration. The preconditioner comprised diagonal blocks of the coefficient matrix. Comparison of algorithms was based on solutions of mixed model equations obtained by a single-trait animal model and a single-trait, random regression test-day model. Data sets for both models used milk yield records of primiparous Finnish dairy cows. Animal model data comprised 665,629 lactation milk yields and random regression test-day model data of 6,732,765 test-day milk yields. Both models included pedigree information of 1,099,622 animals. The animal model ¿random regression test-day model¿ required 122 ¿305¿ rounds of iteration to converge with the reference algorithm, but only 88 ¿149¿ were required with the preconditioned conjugate gradient. To solve the random regression test-day model with the preconditioned conjugate gradient required 237 megabytes of random access memory and took 14% of the computation time needed by the reference algorithm.

Development of a fault-tolerant microprocessor based computer system for space flight

NASA Technical Reports Server (NTRS)

Montgomery, V. T.

1981-01-01

A methodology for the design of a tightly coupled, highly reliable microprocessor based computer system is described. The concept of triple modular redundancy with sparing is used. The notion of synchronizing by using a single crystal oscillator is examined. The use of decoders to replace voters is also used. The decoders not only isolate the failed module but also allow error identification to be accomplished. Each module is to have its own RAM memory. The necessary circuitry to select a correct memory and the corresponding DMA controller was designed.

Template Based Low Data Rate Speech Encoder

DTIC Science & Technology

1993-09-30

Nasality Distinguishes In/ from d/ 95.6 96.9 1m/ from /b/, etc. Sustention Distinguishes /f/ from /p/, $7.5 88.3 ibi from N/, Al from /0 8. etc. Sibilation...processor performs mainly Processor Workstation input/output (I/O) operations. The dynamic random access memory (DRAM) has 16 million bytes of...storage capacity. To execute the 800-b/s voice algorithm, the following amount of memory is needed: 5 MB for tables, 1.5 MB for it "program, and 30 KB for

Hidden long evolutionary memory in a model biochemical network

NASA Astrophysics Data System (ADS)

Ali, Md. Zulfikar; Wingreen, Ned S.; Mukhopadhyay, Ranjan

2018-04-01

We introduce a minimal model for the evolution of functional protein-interaction networks using a sequence-based mutational algorithm, and apply the model to study neutral drift in networks that yield oscillatory dynamics. Starting with a functional core module, random evolutionary drift increases network complexity even in the absence of specific selective pressures. Surprisingly, we uncover a hidden order in sequence space that gives rise to long-term evolutionary memory, implying strong constraints on network evolution due to the topology of accessible sequence space.

Skilled memory in expert figure skaters.

PubMed

Deakin, J M; Allard, F

1991-01-01

The present studies extend skilled-memory theory to a domain involving the performance of motor sequences. Skilled figure skaters were better able than their less skilled counterparts to perform short skating sequences that were choreographed, rather than randomly constructed. Expert skaters encoded sequences for performance very differently from the way in which they encoded sequences that were verbally presented for verbal recall. Tasks interpolated between sequence and recall showed no significant influence on recall accuracy, implicating long-term memory in skating memory. There was little evidence for the use of retrieval structures when skaters learned the brief sequences used throughout these studies. Finally, expert skaters were able to judge the similarity of two skating elements faster than less skilled skaters, indicating a faster access to semantic memory for experts. The data indicate that skaters show many of the same skilled-memory characteristics as have been described in other skill domains involving memorization, such as digit span and memory for dinner orders.

One bipolar transistor selector - One resistive random access memory device for cross bar memory array

NASA Astrophysics Data System (ADS)

Aluguri, R.; Kumar, D.; Simanjuntak, F. M.; Tseng, T.-Y.

2017-09-01

A bipolar transistor selector was connected in series with a resistive switching memory device to study its memory characteristics for its application in cross bar array memory. The metal oxide based p-n-p bipolar transistor selector indicated good selectivity of about 104 with high retention and long endurance showing its usefulness in cross bar RRAM devices. Zener tunneling is found to be the main conduction phenomena for obtaining high selectivity. 1BT-1R device demonstrated good memory characteristics with non-linearity of 2 orders, selectivity of about 2 orders and long retention characteristics of more than 105 sec. One bit-line pull-up scheme shows that a 650 kb cross bar array made with this 1BT1R devices works well with more than 10 % read margin proving its ability in future memory technology application.

A wide bandwidth CCD buffer memory system

NASA Technical Reports Server (NTRS)

Siemens, K.; Wallace, R. W.; Robinson, C. R.

1978-01-01

A prototype system was implemented to demonstrate that CCD's can be applied advantageously to the problem of low power digital storage and particularly to the problem of interfacing widely varying data rates. CCD shift register memories (8K bit) were used to construct a feasibility model 128 K-bit buffer memory system. Serial data that can have rates between 150 kHz and 4.0 MHz can be stored in 4K-bit, randomly-accessible memory blocks. Peak power dissipation during a data transfer is less than 7 W, while idle power is approximately 5.4 W. The system features automatic data input synchronization with the recirculating CCD memory block start address. System expansion to accommodate parallel inputs or a greater number of memory blocks can be performed in a modular fashion. Since the control logic does not increase proportionally to increase in memory capacity, the power requirements per bit of storage can be reduced significantly in a larger system.

An experimental distributed microprocessor implementation with a shared memory communications and control medium

NASA Technical Reports Server (NTRS)

Mejzak, R. S.

1980-01-01

The distributed processing concept is defined in terms of control primitives, variables, and structures and their use in performing a decomposed discrete Fourier transform (DET) application function. The design assumes interprocessor communications to be anonymous. In this scheme, all processors can access an entire common database by employing control primitives. Access to selected areas within the common database is random, enforced by a hardware lock, and determined by task and subtask pointers. This enables the number of processors to be varied in the configuration without any modifications to the control structure. Decompositional elements of the DFT application function in terms of tasks and subtasks are also described. The experimental hardware configuration consists of IMSAI 8080 chassis which are independent, 8 bit microcomputer units. These chassis are linked together to form a multiple processing system by means of a shared memory facility. This facility consists of hardware which provides a bus structure to enable up to six microcomputers to be interconnected. It provides polling and arbitration logic so that only one processor has access to shared memory at any one time.

A study on carbon nanotube bridge as a electromechanical memory device

NASA Astrophysics Data System (ADS)

Kang, Jeong Won; Ha Lee, Jun; Joo Lee, Hoong; Hwang, Ho Jung

2005-04-01

A nanoelectromechanical (NEM) nanotube random access memory (NRAM) device based on carbon nanotube (CNT) was investigated using atomistic simulations. For the CNT-based NEM memory, the mechanical properties of the CNT-bridge and van der Waals interactions between the CNT-bridge and substrate were very important. The critical amplitude of the CNT-bridge was 16% of the length of the CNT-bridge. As molecular dynamics time increased, the CNT-bridge went to the steady state under the electrostatic force with the damping of the potential and the kinetic energies of the CNT-bridge. The interatomic interaction between the CNT-bridge and substrate, value of the CNT-bridge slack, and damping rate of the CNT-bridge were very important for the operation of the NEM memory device as a nonvolatile memory.

Atomic memory access hardware implementations

DOEpatents

Ahn, Jung Ho; Erez, Mattan; Dally, William J

2015-02-17

Atomic memory access requests are handled using a variety of systems and methods. According to one example method, a data-processing circuit having an address-request generator that issues requests to a common memory implements a method of processing the requests using a memory-access intervention circuit coupled between the generator and the common memory. The method identifies a current atomic-memory access request from a plurality of memory access requests. A data set is stored that corresponds to the current atomic-memory access request in a data storage circuit within the intervention circuit. It is determined whether the current atomic-memory access request corresponds to at least one previously-stored atomic-memory access request. In response to determining correspondence, the current request is implemented by retrieving data from the common memory. The data is modified in response to the current request and at least one other access request in the memory-access intervention circuit.

77 FR 26789 - Certain Semiconductor Chips Having Synchronous Dynamic Random Access Memory Controllers and...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-05-07

... patents. 73 FR 75131. The principal respondent was NVIDIA Corporation of Santa Clara, California (``NVIDIA''). Joining NVIDIA as respondents were approximately twenty of NVIDIA's customers. The Commission found a... accused products in the United States: NVIDIA; Hewlett-Packard Co. of Palo Alto, California; ASUS Computer...

61 FR 41385 - Notice of Government-Owned Inventions; Availability for Licensing

Federal Register 2010, 2011, 2012, 2013, 2014

1996-08-08

... PRESSURE VESSEL; filed 24 February 1995; patented 21 November 1995.// Patent 5,468,356: LARGE SCALE...,477,482: ULTRA HIGH DENSITY, NON- VOLATILE FERROMAGNETIC RANDOM ACCESS MEMORY; filed 1 October 1993....// Patent 5,483,017: HIGH TEMPERATURE THERMOSETS AND CERAMICS DERIVED FROM LINEAR CARBORANE-(SILOXANE OR...

New Mode For Single-Event Upsets

NASA Technical Reports Server (NTRS)

Zoutendyk, John A.; Smith, Lawrence S.; Soli, George A.; Lo, Roger Y.

1988-01-01

Report presents theory and experimental data regarding newly discovered mode for single-event upsets, (SEU's) in complementary metal-oxide/semiconductor, static random-access memories, CMOS SRAM's. SEU cross sections larger than those expected from previously known modes given rise to speculation regarding additional mode, and subsequent cross-section measurements appear to confirm speculation.

Radiation-Tolerant Intelligent Memory Stack - RTIMS

NASA Technical Reports Server (NTRS)

Ng, Tak-kwong; Herath, Jeffrey A.

2011-01-01

This innovation provides reconfigurable circuitry and 2-Gb of error-corrected or 1-Gb of triple-redundant digital memory in a small package. RTIMS uses circuit stacking of heterogeneous components and radiation shielding technologies. A reprogrammable field-programmable gate array (FPGA), six synchronous dynamic random access memories, linear regulator, and the radiation mitigation circuits are stacked into a module of 42.7 42.7 13 mm. Triple module redundancy, current limiting, configuration scrubbing, and single- event function interrupt detection are employed to mitigate radiation effects. The novel self-scrubbing and single event functional interrupt (SEFI) detection allows a relatively soft FPGA to become radiation tolerant without external scrubbing and monitoring hardware

Unified random access memory (URAM) by integration of a nanocrystal floating gate for nonvolatile memory and a partially depleted floating body for capacitorless 1T-DRAM

NASA Astrophysics Data System (ADS)

Ryu, Seong-Wan; Han, Jin-Woo; Kim, Chung-Jin; Kim, Sungho; Choi, Yang-Kyu

2009-03-01

This paper describes a unified memory (URAM) that utilizes a nanocrystal SOI MOSFET for multi-functional applications of both nonvolatile memory (NVM) and capacitorless 1T-DRAM. By using a discrete storage node (Ag nanocrystal) as the floating gate of the NVM, high defect immunity and 2-bit/cell operation were achieved. The embedded nanocrystal NVM also showed 1T-DRAM operation (program/erase time = 100 ns) characteristics, which were realized by storing holes in the floating body of the SOI MOSFET, without requiring an external capacitor. Three-bit/cell operation was accomplished for different applications - 2-bits for nonvolatility and 1-bit for fast operation.

Demonstration of holographic smart card system using the optical memory technology

NASA Astrophysics Data System (ADS)

Kim, JungHoi; Choi, JaeKwang; An, JunWon; Kim, Nam; Lee, KwonYeon; Jeon, SeckHee

2003-05-01

In this paper, we demonstrate the holographic smart card system using digital holographic memory technique that uses reference beam encrypted by the random phase mask to prevent unauthorized users from accessing the stored digital page. The input data that include document data, a picture of face, and a fingerprint for identification is encoded digitally and then coupled with the reference beam modulated by a random phase mask. Therefore, this proposed system can execute recording in the order of MB~GB and readout all personal information from just one card without any additional database system. Also, recorded digital holograms can't be reconstructed without a phase key and can't be copied by using computers, scanners, or photography.

An overview of Experimental Condensed Matter Physics in Argentina by 2014, and Oxides for Non Volatile Memory Devices: The MeMOSat Project

NASA Astrophysics Data System (ADS)

Levy, Pablo

2015-03-01

In the first part of my talk, I will describe the status of the experimental research in Condensed Matter Physics in Argentina, biased towards developments related to micro and nanotechnology. In the second part, I will describe the MeMOSat Project, a consortium aimed at producing non-volatile memory devices to work in aggressive environments, like those found in the aerospace and nuclear industries. Our devices rely on the Resistive Switching mechanism, which produces a permanent but reversible change in the electrical resistance across a metal-insulator-metal structure by means of a pulsed protocol of electrical stimuli. Our project is devoted to the study of Memory Mechanisms in Oxides (MeMO) in order to establish a technological platform that tests the Resistive RAM (ReRAM) technology for aerospace applications. A review of MeMOSat's activities is presented, covering the initial Proof of Concept in ceramic millimeter sized samples; the study of different oxide-metal couples including (LaPr)2/3Ca1/3MnO, La2/3Ca1/3MnO3, YBa2Cu3O7, TiO2, HfO2, MgO and CuO; and recent miniaturized arrays of micrometer sized devices controlled by in-house designed electronics, which were launched with the BugSat01 satellite in June2014 by the argentinian company Satellogic.

A Tutorial for the Student Edition (Release 1.1) of Minitab.

ERIC Educational Resources Information Center

MacFarland, Thomas W.; Hou, Cheng-I

This guide for using Minitab requires DOS version 2.0 or greater, 512K RAM memory, two double-sided diskette drives, and a graphics monitor. Topics covered in the tutorial are Getting started; Installation; Making a data diskette; Entering data; Central tendency and dispersion; t-test; Chi-square test; Oneway ANOVA test; Twoway ANOVA test; and…

Threshold-voltage modulated phase change heterojunction for application of high density memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yan, Baihan; Tong, Hao, E-mail: tonghao@hust.edu.cn; Qian, Hang

2015-09-28

Phase change random access memory is one of the most important candidates for the next generation non-volatile memory technology. However, the ability to reduce its memory size is compromised by the fundamental limitations inherent in the CMOS technology. While 0T1R configuration without any additional access transistor shows great advantages in improving the storage density, the leakage current and small operation window limit its application in large-scale arrays. In this work, phase change heterojunction based on GeTe and n-Si is fabricated to address those problems. The relationship between threshold voltage and doping concentration is investigated, and energy band diagrams and X-raymore » photoelectron spectroscopy measurements are provided to explain the results. The threshold voltage is modulated to provide a large operational window based on this relationship. The switching performance of the heterojunction is also tested, showing a good reverse characteristic, which could effectively decrease the leakage current. Furthermore, a reliable read-write-erase function is achieved during the tests. Phase change heterojunction is proposed for high-density memory, showing some notable advantages, such as modulated threshold voltage, large operational window, and low leakage current.« less

The design of an adaptive predictive coder using a single-chip digital signal processor

NASA Astrophysics Data System (ADS)

Randolph, M. A.

1985-01-01

A speech coding processor architecture design study has been performed in which Texas Instruments TMS32010 has been selected from among three commercially available digital signal processing integrated circuits and evaluated in an implementation study of real-time Adaptive Predictive Coding (APC). The TMS32010 has been compared with AR&T Bell Laboratories DSP I and Nippon Electric Co. PD7720 and was found to be most suitable for a single chip implementation of APC. A preliminary design system based on TMS32010 has been performed, and several of the hardware and software design issues are discussed. Particular attention was paid to the design of an external memory controller which permits rapid sequential access of external RAM. As a result, it has been determined that a compact hardware implementation of the APC algorithm is feasible based of the TSM32010. Originator-supplied keywords include: vocoders, speech compression, adaptive predictive coding, digital signal processing microcomputers, speech processor architectures, and special purpose processor.

Quantification of the Flavonoid-Degrading Bacterium Eubacterium ramulus in Human Fecal Samples with a Species-Specific Oligonucleotide Hybridization Probe

PubMed Central

Simmering, Rainer; Kleessen, Brigitta; Blaut, Michael

1999-01-01

To investigate the occurrence of the flavonoid-degrading bacterium Eubacterium ramulus in the human intestinal tract, an oligonucleotide probe designated S-S-E.ram-0997-a-A-18 was designed and validated, with over 90 bacterial strains representing the dominant described human fecal flora. Application of S-S-E.ram-0997-a-A-18 to fecal samples from 20 subjects indicated the presence of E. ramulus in each individual tested in numbers from 4.4 × 107 to 2.0 × 109 cells/g of fecal dry mass. Six fecal E. ramulus isolates were recognized by S-S-E.ram-0997-a-A-18 but exhibited different band patterns when analyzed by randomly amplified polymorphic DNA. PMID:10427069

Radiation Tolerant Intelligent Memory Stack (RTIMS)

NASA Technical Reports Server (NTRS)

Ng, Tak-kwong; Herath, Jeffrey A.

2006-01-01

The Radiation Tolerant Intelligent Memory Stack (RTIMS), suitable for both geostationary and low earth orbit missions, has been developed. The memory module is fully functional and undergoing environmental and radiation characterization. A self-contained flight-like module is expected to be completed in 2006. RTIMS provides reconfigurable circuitry and 2 gigabits of error corrected or 1 gigabit of triple redundant digital memory in a small package. RTIMS utilizes circuit stacking of heterogeneous components and radiation shielding technologies. A reprogrammable field programmable gate array (FPGA), six synchronous dynamic random access memories, linear regulator, and the radiation mitigation circuitries are stacked into a module of 42.7mm x 42.7mm x 13.00mm. Triple module redundancy, current limiting, configuration scrubbing, and single event function interrupt detection are employed to mitigate radiation effects. The mitigation techniques significantly simplify system design. RTIMS is well suited for deployment in real-time data processing, reconfigurable computing, and memory intensive applications.

Impacts of Co doping on ZnO transparent switching memory device characteristics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Simanjuntak, Firman Mangasa; Wei, Kung-Hwa; Prasad, Om Kumar

2016-05-02

The resistive switching characteristics of indium tin oxide (ITO)/Zn{sub 1−x}Co{sub x}O/ITO transparent resistive memory devices were investigated. An appropriate amount of cobalt dopant in ZnO resistive layer demonstrated sufficient memory window and switching stability. In contrast, pure ZnO devices demonstrated a poor memory window, and using an excessive dopant concentration led to switching instability. To achieve suitable memory performance, relying only on controlling defect concentrations is insufficient; the grain growth orientation of the resistive layer must also be considered. Stable endurance with an ON/OFF ratio of more than one order of magnitude during 5000 cycles confirmed that the Co-doped ZnOmore » device is a suitable candidate for resistive random access memory application. Additionally, fully transparent devices with a high transmittance of up to 90% at wavelength of 550 nm have been fabricated.« less

Modeling of behavioral responses for successful selection of easy-to-train rams for semen collection with an artificial vagina.

PubMed

Ambrosi, Claudia Pamela; Rubio, Natalia; Giménez, Gustavo; Venturino, Andrés; Aisen, Eduardo Gabriel; López Armengol, María Fernanda

2018-06-01

The aim of this study was to analyze the reproductive behavioral responses in Australian Merino rams, to identify those related to a faster training for semen collection with an artificial vagina. Eight Australian Merino rams, aged 1.5 years and with no prior sexual experience, were randomly selected from an extensively grazed flock. One immobilized ewe with no hormone stimulation was used for rams to sexually interact and mount. The frequencies of approaching, sniffing, flehmen, pushing, pawing with chin resting, and tongue flicking were recorded during eight training and three post-training assessments periods. In addition, the duration of sniffing and flehmen responses, as well as the time from when the ram started to approach the ewe until the mount with ejaculation (completed mount) were recorded. Descriptive, correlation, and modeling analyses were performed. Amongst the rams, four mounted the ewe and ejaculated for the first time during the training phase, and three mounted and ejaculated for the first time after the training phase. The remaining ram mounted the ewe and ejaculated for the first time during the post-training evaluation in the following year. A great variability in the behavior repertoire was observed among rams. The correlation analysis indicated that the completed mount was associated with the behaviors during the approaching response. The expression of the sniffing response decreased between the training phase and post-training evaluation, while the responses of pushing the ewe and tongue flicking ceased to occur. Pawing the side of the ewe with the chin resting on the back of the ewe and flehmen responses, however, continued between the training and post-training phases. This led to a decrease in the time from when the ram started to approach the ewe until the completed mount. It is concluded that the responses of approaching the ewe, pawing the side of the ewe with chin resting on the ewe, and sniffing of the ewe (the latter occurring only during the training phase) are behavioral indicators that could be used for selection of easy-to-train rams for purposes of semen collection with an artificial vagina. Copyright © 2018 Elsevier B.V. All rights reserved.

Selective molecularly imprinted polymer combined with restricted access material for in-tube SPME/UHPLC-MS/MS of parabens in breast milk samples.

PubMed

Souza, Israel D; Melo, Lidervan P; Jardim, Isabel C S F; Monteiro, Juliana C S; Nakano, Ana Marcia S; Queiroz, Maria Eugênia C

2016-08-17

A new molecularly imprinted polymer modified with restricted access material (a hydrophilic external layer), (MIP-RAM) was synthesized via polymerization in situ in an open fused silica capillary. This stationary phase was used as sorbent for in-tube solid phase microextraction (in-tube SPME) to determine parabens in breast milk samples by ultra-high-performance liquid chromatography-tandem mass spectrometry (UHPLC-MS/MS). Scanning electron micrographs (SEM) illustrate MIP surface modification after glycerol dimethacrylate (hydrophilic monomer) incorporation. The interaction between parabens and MIP-RAM was investigated by Fourier-transform infrared (FTIR) spectroscopy. The Scatchard plot for MIP-RAM presented two linear parts with different slopes, illustrating binding sites with high- and low-affinity. Endogenous compounds exclusion from the MIP-RAM capillary was demonstrated by in-tube SPME/LC-UV assays carried out with blank milk samples. The in-tube SPME/UHPLC-MS/MS method presented linear range from 10 ng mL(-1) (LLOQ) to 400 ng mL(-1) with coefficients of determination higher than 0.99, inter-assay precision with coefficient of variation (CV) values ranging from 2 to 15%, and inter-assay accuracy with relative standard deviation (RSD) values ranging from -1% to 19%. Analytical validation parameters attested that in-tube SPME/UHPLC-MS/MS is an appropriate method to determine parabens in human milk samples to assess human exposure to these compounds. Analysis of breast milk samples from lactating women demonstrated that the proposed method is effective. Copyright © 2016 Elsevier B.V. All rights reserved.

Making A D-Latch Sensitive To Alpha Particles

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Blaes, Brent R.; Nixon, Robert H.

1994-01-01

Standard complementary metal oxide/semiconductor (CMOS) D-latch integrated circuit modified to increase susceptibility to single-event upsets (SEU's) (changes in logic state) caused by impacts of energetic alpha particles. Suitable for use in relatively inexpensive bench-scale SEU tests of itself and of related integrated circuits like static random-access memories.

A Comparison of the Two Leading Electronic Braille Notetakers.

ERIC Educational Resources Information Center

Leventhal, J. D.; Uslan, M. M.

1992-01-01

Comparison of two electronic braille notetakers found that the Braille 'n Speak was less expensive, easier to learn, and easier for both experienced users and beginners to operate than the BrailleMate, though the BrailleMate offers a unique alternative by including a braille display and a Random Access Memory card storage system. (JDD)

75 FR 55764 - Dynamic Random Access Memory Semiconductors From the Republic of Korea: Preliminary Results of...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-09-14

... lending rates published by the IMF for each year. For countervailable short-term and long-term foreign... administrative reviews. For long-term, won-denominated loans originating in 1986 through 1995, we used the... International Monetary Fund's (``IMF's'') International Financial Statistics Yearbook. For long-term won...

Criticality of Low-Energy Protons in Single-Event Effects Testing of Highly-Scaled Technologies

NASA Technical Reports Server (NTRS)

Pellish, Jonathan Allen; Marshall, Paul W.; Rodbell, K. P.; Gordon, M. S.; LaBel, K. A.; Schwank, J. R.; Dodds, N. A.; Castaneda, C. M.; Berg, M. D.; Kim, H. S.;

Switching characteristics for ferroelectric random access memory based on RC model in poly(vinylidene fluoride-trifluoroethylene) ultrathin films

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, ChangLi; Complex and Intelligent System Research Center, East China University of Science and Technology, Shanghai 200237; Wang, XueJun

2016-05-15

The switching characteristic of the poly(vinylidene fluoride-trifluoroethlene) (P(VDF-TrFE)) films have been studied at different ranges of applied electric field. It is suggest that the increase of the switching speed upon nucleation protocol and the deceleration of switching could be related to the presence of a non-ferroelectric layer. Remarkably, a capacitor and resistor (RC) links model plays significant roles in the polarization switching dynamics of the thin films. For P(VDF-TrFE) ultrathin films with electroactive interlayer, it is found that the switching dynamic characteristics are strongly affected by the contributions of resistor and non-ferroelectric (non-FE) interface factors. A corresponding experiment is designedmore » using poly(3,4-ethylene dioxythiophene):poly(styrene sulfonic) (PEDOT-PSSH) as interlayer with different proton concentrations, and the testing results show that the robust switching is determined by the proton concentration in interlayer and lower leakage current in circuit to reliable applications of such polymer films. These findings provide a new feasible method to enhance the polarization switching for the ferroelectric random access memory.« less

Scanning transmission X-ray microscopy probe for in situ mechanism study of graphene-oxide-based resistive random access memory.

PubMed

Nho, Hyun Woo; Kim, Jong Yun; Wang, Jian; Shin, Hyun-Joon; Choi, Sung-Yool; Yoon, Tae Hyun

2014-01-01

Here, an in situ probe for scanning transmission X-ray microscopy (STXM) has been developed and applied to the study of the bipolar resistive switching (BRS) mechanism in an Al/graphene oxide (GO)/Al resistive random access memory (RRAM) device. To perform in situ STXM studies at the C K- and O K-edges, both the RRAM junctions and the I0 junction were fabricated on a single Si3N4 membrane to obtain local XANES spectra at these absorption edges with more delicate I0 normalization. Using this probe combined with the synchrotron-based STXM technique, it was possible to observe unique chemical changes involved in the BRS process of the Al/GO/Al RRAM device. Reversible oxidation and reduction of GO induced by the externally applied bias voltages were observed at the O K-edge XANES feature located at 538.2 eV, which strongly supported the oxygen ion drift model that was recently proposed from ex situ transmission electron microscope studies.

Energetics of intrinsic defects in NiO and the consequences for its resistive random access memory performance

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dawson, J. A., E-mail: jad95@cam.ac.uk; Guo, Y.; Robertson, J.

2015-09-21

Energetics for a variety of intrinsic defects in NiO are calculated using state-of-the-art ab initio hybrid density functional theory calculations. At the O-rich limit, Ni vacancies are the lowest cost defect for all Fermi energies within the gap, in agreement with the well-known p-type behaviour of NiO. However, the ability of the metal electrode in a resistive random access memory metal-oxide-metal setup to shift the oxygen chemical potential towards the O-poor limit results in unusual NiO behaviour and O vacancies dominating at lower Fermi energy levels. Calculated band diagrams show that O vacancies in NiO are positively charged at themore » operating Fermi energy giving it the advantage of not requiring a scavenger metal layer to maximise drift. Ni and O interstitials are generally found to be higher in energy than the respective vacancies suggesting that significant recombination of O vacancies and interstitials does not take place as proposed in some models of switching behaviour.« less