Optical systems fabricated by printing-based assembly

DOEpatents

Rogers, John; Nuzzo, Ralph; Meitl, Matthew; Menard, Etienne; Baca, Alfred J; Motala, Michael; Ahn, Jong-Hyun; Park, Sang-Il; Yu, Chang-Jae; Ko, Heung Cho; Stoykovich, Mark; Yoon, Jongseung

2014-05-13

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

Optical systems fabricated by printing-based assembly

DOEpatents

Rogers, John [Champaign, IL; Nuzzo, Ralph [Champaign, IL; Meitl, Matthew [Durham, NC; Menard, Etienne [Durham, NC; Baca, Alfred J [Urbana, IL; Motala, Michael [Champaign, IL; Ahn, Jong-Hyun [Suwon, KR; Park, Sang-II [Savoy, IL; Yu,; Chang-Jae, [Urbana, IL; Ko, Heung-Cho [Gwangju, KR; Stoykovich,; Mark, [Dover, NH; Yoon, Jongseung [Urbana, IL

2011-07-05

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

Optical systems fabricated by printing-based assembly

DOEpatents

Rogers, John; Nuzzo, Ralph; Meitl, Matthew; Menard, Etienne; Baca, Alfred; Motala, Michael; Ahn, Jong -Hyun; Park, Sang -Il; Yu, Chang -Jae; Ko, Heung Cho; Stoykovich, Mark; Yoon, Jongseung

2015-08-25

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

Optical systems fabricated by printing-based assembly

DOEpatents

Rogers, John; Nuzzo, Ralph; Meitl, Matthew; Menard, Etienne; Baca, Alfred; Motala, Michael; Ahn, Jong-Hyun; Park, Sang-Il; Yu, Chang-Jae; Ko, Heung Cho; Stoykovich, Mark; Yoon, Jongseung

2017-03-21

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

Over-voltage protection system and method

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chi, Song; Dong, Dong; Lai, Rixin

An over-voltage protection system includes an electronic valve connected across two terminals of a circuit and an over-voltage detection circuit connected across one of the plurality of semiconductor devices for detecting an over-voltage across the circuit. The electronic valve includes a plurality of semiconductor devices connected in series. The over-voltage detection circuit includes a voltage divider circuit connected to a break-over diode in a way to provide a representative low voltage to the break-over diode and an optocoupler configured to receive a current from the break-over diode when the representative low voltage exceeds a threshold voltage of the break-over diodemore » indicating an over-voltage condition. The representative low voltage provided to the break-over diode represents a voltage across the one semiconductor device. A plurality of self-powered gate drive circuits are connected to the plurality of semiconductor devices, wherein the plurality of self-powered gate drive circuits receive over-voltage triggering pulses from the optocoupler during the over-voltage condition and switch on the plurality of semiconductor devices to bypass the circuit.« less

Growth of coincident site lattice matched semiconductor layers and devices on crystalline substrates

DOEpatents

Norman, Andrew G; Ptak, Aaron J

2013-08-13

Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a substrate having a crystalline surface with a known lattice parameter (a). The method further includes growing a crystalline semiconductor layer on the crystalline substrate surface by coincident site lattice matched epitaxy, without any buffer layer between the crystalline semiconductor layer and the crystalline surface of the substrate. The crystalline semiconductor layer will be prepared to have a lattice parameter (a') that is related to the substrate lattice parameter (a). The lattice parameter (a') maybe related to the lattice parameter (a) by a scaling factor derived from a geometric relationship between the respective crystal lattices.

Diode having trenches in a semiconductor region

DOEpatents

Palacios, Tomas Apostol; Lu, Bin; Matioli, Elison de Nazareth

2016-03-22

An electrode structure is described in which conductive regions are recessed into a semiconductor region. Trenches may be formed in a semiconductor region, such that conductive regions can be formed in the trenches. The electrode structure may be used in semiconductor devices such as field effect transistors or diodes. Nitride-based power semiconductor devices are described including such an electrode structure, which can reduce leakage current and otherwise improve performance.

Total-dose radiation effects data for semiconductor devices, volume 1. [radiation resistance of components for the Galileo Project

NASA Technical Reports Server (NTRS)

Price, W. E.; Martin, K. E.; Nichols, D. K.; Gauthier, M. K.; Brown, S. F.

1981-01-01

Steady-state, total-dose radiation test data are provided in graphic format, for use by electronic designers and other personnel using semiconductor devices in a radiation environment. Data are presented by JPL for various NASA space programs on diodes, bipolar transistors, field effect transistors, silicon-controlled rectifiers, and optical devices. A vendor identification code list is included along with semiconductor device electrical parameter symbols and abbreviations.

Methods of Measurement for Semiconductor Materials, Process Control, and Devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1973-01-01

The development of methods of measurement for semiconductor materials, process control, and devices is reported. Significant accomplishments include: (1) Completion of an initial identification of the more important problems in process control for integrated circuit fabrication and assembly; (2) preparations for making silicon bulk resistivity wafer standards available to the industry; and (3) establishment of the relationship between carrier mobility and impurity density in silicon. Work is continuing on measurement of resistivity of semiconductor crystals; characterization of generation-recombination-trapping centers, including gold, in silicon; evaluation of wire bonds and die attachment; study of scanning electron microscopy for wafer inspection and test; measurement of thermal properties of semiconductor devices; determination of S-parameters and delay time in junction devices; and characterization of noise and conversion loss of microwave detector diodes.

Lattice matched semiconductor growth on crystalline metallic substrates

DOEpatents

Norman, Andrew G; Ptak, Aaron J; McMahon, William E

2013-11-05

Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a metal or metal alloy substrate having a crystalline surface with a known lattice parameter (a). The methods further include growing a crystalline semiconductor alloy layer on the crystalline substrate surface by coincident site lattice matched epitaxy. The semiconductor layer may be grown without any buffer layer between the alloy and the crystalline surface of the substrate. The semiconductor alloy may be prepared to have a lattice parameter (a') that is related to the lattice parameter (a). The semiconductor alloy may further be prepared to have a selected band gap.

Epitaxial Growth of Cubic Crystalline Semiconductor Alloys on Basal Plane of Trigonal or Hexagonal Crystal

NASA Technical Reports Server (NTRS)

Park, Yeonjoon (Inventor); Choi, Sang H. (Inventor); King, Glen C. (Inventor)

2011-01-01

Hetero-epitaxial semiconductor materials comprising cubic crystalline semiconductor alloys grown on the basal plane of trigonal and hexagonal substrates, in which misfit dislocations are reduced by approximate lattice matching of the cubic crystal structure to underlying trigonal or hexagonal substrate structure, enabling the development of alloyed semiconductor layers of greater thickness, resulting in a new class of semiconductor materials and corresponding devices, including improved hetero-bipolar and high-electron mobility transistors, and high-mobility thermoelectric devices.

High efficiency photovoltaic device

DOEpatents

Guha, Subhendu; Yang, Chi C.; Xu, Xi Xiang

1999-11-02

An N-I-P type photovoltaic device includes a multi-layered body of N-doped semiconductor material which has an amorphous, N doped layer in contact with the amorphous body of intrinsic semiconductor material, and a microcrystalline, N doped layer overlying the amorphous, N doped material. A tandem device comprising stacked N-I-P cells may further include a second amorphous, N doped layer interposed between the microcrystalline, N doped layer and a microcrystalline P doped layer. Photovoltaic devices thus configured manifest improved performance, particularly when configured as tandem devices.

Semiconductor technology program. Progress briefs

NASA Technical Reports Server (NTRS)

Bullis, W. M.

1980-01-01

Measurement technology for semiconductor materials, process control, and devices is reviewed. Activities include: optical linewidth and thermal resistance measurements; device modeling; dopant density profiles; resonance ionization spectroscopy; and deep level measurements. Standardized oxide charge terminology is also described.

Monolayer-Mediated Growth of Organic Semiconductor Films with Improved Device Performance.

PubMed

Huang, Lizhen; Hu, Xiaorong; Chi, Lifeng

2015-09-15

Increased interest in wearable and smart electronics is driving numerous research works on organic electronics. The control of film growth and patterning is of great importance when targeting high-performance organic semiconductor devices. In this Feature Article, we summarize our recent work focusing on the growth, crystallization, and device operation of organic semiconductors intermediated by ultrathin organic films (in most cases, only a monolayer). The site-selective growth, modified crystallization and morphology, and improved device performance of organic semiconductor films are demonstrated with the help of the inducing layers, including patterned and uniform Langmuir-Blodgett monolayers, crystalline ultrathin organic films, and self-assembled polymer brush films. The introduction of the inducing layers could dramatically change the diffusion of the organic semiconductors on the surface and the interactions between the active layer with the inducing layer, leading to improved aggregation/crystallization behavior and device performance.

Semiconductor millimeter wavelength electronics

NASA Astrophysics Data System (ADS)

Rosenbaum, F. J.

1985-12-01

This final report summarizes the results of research carried out on topics in millimeter wavelength semiconductor electronics under an ONR Selected Research Opportunity program. Study areas included III-V compound semiconductor growth and characterization, microwave and millimeter wave device modeling, fabrication and testing, and the development of new device concepts. A new millimeter wave mixer and detector, the Gap diode was invented. Topics reported on include ballistic transport, Zener oscillations, impurities in GaAs, electron velocity-electric field calculation and measurements, etc., calculations.

Thermovoltaic semiconductor device including a plasma filter

DOEpatents

Baldasaro, Paul F.

1999-01-01

A thermovoltaic energy conversion device and related method for converting thermal energy into an electrical potential. An interference filter is provided on a semiconductor thermovoltaic cell to pre-filter black body radiation. The semiconductor thermovoltaic cell includes a P/N junction supported on a substrate which converts incident thermal energy below the semiconductor junction band gap into electrical potential. The semiconductor substrate is doped to provide a plasma filter which reflects back energy having a wavelength which is above the band gap and which is ineffectively filtered by the interference filter, through the P/N junction to the source of radiation thereby avoiding parasitic absorption of the unusable portion of the thermal radiation energy.

Dry etching method for compound semiconductors

DOEpatents

Shul, Randy J.; Constantine, Christopher

1997-01-01

A dry etching method. According to the present invention, a gaseous plasma comprising, at least in part, boron trichloride, methane, and hydrogen may be used for dry etching of a compound semiconductor material containing layers including aluminum, or indium, or both. Material layers of a compound semiconductor alloy such as AlGaInP or the like may be anisotropically etched for forming electronic devices including field-effect transistors and heterojunction bipolar transistors and for forming photonic devices including vertical-cavity surface-emitting lasers, edge-emitting lasers, and reflectance modulators.

Dry etching method for compound semiconductors

DOEpatents

Shul, R.J.; Constantine, C.

1997-04-29

A dry etching method is disclosed. According to the present invention, a gaseous plasma comprising, at least in part, boron trichloride, methane, and hydrogen may be used for dry etching of a compound semiconductor material containing layers including aluminum, or indium, or both. Material layers of a compound semiconductor alloy such as AlGaInP or the like may be anisotropically etched for forming electronic devices including field-effect transistors and heterojunction bipolar transistors and for forming photonic devices including vertical-cavity surface-emitting lasers, edge-emitting lasers, and reflectance modulators. 1 fig.

Processes for multi-layer devices utilizing layer transfer

DOEpatents

Nielson, Gregory N; Sanchez, Carlos Anthony; Tauke-Pedretti, Anna; Kim, Bongsang; Cederberg, Jeffrey; Okandan, Murat; Cruz-Campa, Jose Luis; Resnick, Paul J

2015-02-03

A method includes forming a release layer over a donor substrate. A plurality of devices made of a first semiconductor material are formed over the release layer. A first dielectric layer is formed over the plurality of devices such that all exposed surfaces of the plurality of devices are covered by the first dielectric layer. The plurality of devices are chemically attached to a receiving device made of a second semiconductor material different than the first semiconductor material, the receiving device having a receiving substrate attached to a surface of the receiving device opposite the plurality of devices. The release layer is etched to release the donor substrate from the plurality of devices. A second dielectric layer is applied over the plurality of devices and the receiving device to mechanically attach the plurality of devices to the receiving device.

High voltage semiconductor devices and methods of making the devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Matocha, Kevin; Chatty, Kiran; Banerjee, Sujit

A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type well regions which are formed in an n-type drift layer. A p-type body contact region is formed on the periphery of the MOSFET. The source metallization of the device forms a Schottky contact with an n-type semiconductor region adjacent the p-type body contact region of the device. Vias can be formed through a dielectric material covering the source ohmic contacts and/or Schottky region of the device and the source metallization can be formed in the vias.more » The n-type semiconductor region forming the Schottky contact and/or the n-type source regions can be a single continuous region or a plurality of discontinuous regions alternating with discontinuous p-type body contact regions. The device can be a SiC device. Methods of making the device are also provided.« less

High voltage semiconductor devices and methods of making the devices

DOEpatents

Matocha, Kevin; Chatty, Kiran; Banerjee, Sujit

2017-02-28

A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type well regions which are formed in an n-type drift layer. A p-type body contact region is formed on the periphery of the MOSFET. The source metallization of the device forms a Schottky contact with an n-type semiconductor region adjacent the p-type body contact region of the device. Vias can be formed through a dielectric material covering the source ohmic contacts and/or Schottky region of the device and the source metallization can be formed in the vias. The n-type semiconductor region forming the Schottky contact and/or the n-type source regions can be a single continuous region or a plurality of discontinuous regions alternating with discontinuous p-type body contact regions. The device can be a SiC device. Methods of making the device are also provided.

Thin film photovoltaic device with multilayer substrate

DOEpatents

Catalano, Anthony W.; Bhushan, Manjul

1984-01-01

A thin film photovoltaic device which utilizes at least one compound semiconductor layer chosen from Groups IIB and VA of the Periodic Table is formed on a multilayer substrate The substrate includes a lowermost support layer on which all of the other layers of the device are formed. Additionally, an uppermost carbide or silicon layer is adjacent to the semiconductor layer. Below the carbide or silicon layer is a metal layer of high conductivity and expansion coefficient equal to or slightly greater than that of the semiconductor layer.

Tungsten coating for improved wear resistance and reliability of microelectromechanical devices

DOEpatents

Fleming, James G.; Mani, Seethambal S.; Sniegowski, Jeffry J.; Blewer, Robert S.

2001-01-01

A process is disclosed whereby a 5-50-nanometer-thick conformal tungsten coating can be formed over exposed semiconductor surfaces (e.g. silicon, germanium or silicon carbide) within a microelectromechanical (MEM) device for improved wear resistance and reliability. The tungsten coating is formed after cleaning the semiconductor surfaces to remove any organic material and oxide film from the surface. A final in situ cleaning step is performed by heating a substrate containing the MEM device to a temperature in the range of 200-600 .degree. C. in the presence of gaseous nitrogen trifluoride (NF.sub.3). The tungsten coating can then be formed by a chemical reaction between the semiconductor surfaces and tungsten hexafluoride (WF.sub.6) at an elevated temperature, preferably about 450.degree. C. The tungsten deposition process is self-limiting and covers all exposed semiconductor surfaces including surfaces in close contact. The present invention can be applied to many different types of MEM devices including microrelays, micromirrors and microengines. Additionally, the tungsten wear-resistant coating of the present invention can be used to enhance the hardness, wear resistance, electrical conductivity, optical reflectivity and chemical inertness of one or more semiconductor surfaces within a MEM device.

Methods for forming particles from single source precursors

DOEpatents

Fox, Robert V [Idaho Falls, ID; Rodriguez, Rene G [Pocatello, ID; Pak, Joshua [Pocatello, ID

2011-08-23

Single source precursors are subjected to carbon dioxide to form particles of material. The carbon dioxide may be in a supercritical state. Single source precursors also may be subjected to supercritical fluids other than supercritical carbon dioxide to form particles of material. The methods may be used to form nanoparticles. In some embodiments, the methods are used to form chalcopyrite materials. Devices such as, for example, semiconductor devices may be fabricated that include such particles. Methods of forming semiconductor devices include subjecting single source precursors to carbon dioxide to form particles of semiconductor material, and establishing electrical contact between the particles and an electrode.

Multiple gap photovoltaic device

DOEpatents

Dalal, Vikram L.

1981-01-01

A multiple gap photovoltaic device having a transparent electrical contact adjacent a first cell which in turn is adjacent a second cell on an opaque electrical contact, includes utilizing an amorphous semiconductor as the first cell and a crystalline semiconductor as the second cell.

Liquid crystal cells with built-in CdSe nanotubes for chromogenic smart emission devices.

PubMed

Lin, Tsung Ju; Chen, Chin-Chang; Cheng, Soofin; Chen, Yang Fang

2008-01-21

A simple and general approach for controlling optical anisotropy of nanostructured semiconductors is reported. Our design involves the fabrication of liquid crystal devices with built-in semiconductor nanotubes. Quite interestingly, it is found that semiconductor nanotubes can be well aligned along the orientation of liquid crystals molecules automatically, resulting in a very large emission anisotropy with the degree of polarization up to 72%. This intriguing result manifests a way to obtain well aligned semiconductor nanotubes and the emission anisotropy can be easily manipulated by an external bias. The ability to well control the emission anisotropy should open up new opportunities for nanostructured semiconductors, including optical filters, polarized light emitting diodes, flat panel displays, and many other chromogenic smart devices.

Non- contacting capacitive diagnostic device

DOEpatents

Ellison, Timothy

2005-07-12

A non-contacting capacitive diagnostic device includes a pulsed light source for producing an electric field in a semiconductor or photovoltaic device or material to be evaluated and a circuit responsive to the electric field. The circuit is not in physical contact with the device or material being evaluated and produces an electrical signal characteristic of the electric field produced in the device or material. The diagnostic device permits quality control and evaluation of semiconductor or photovoltaic device properties in continuous manufacturing processes.

Solid state photosensitive devices which employ isolated photosynthetic complexes

DOEpatents

Peumans, Peter; Forrest, Stephen R.

2009-09-22

Solid state photosensitive devices including photovoltaic devices are provided which comprise a first electrode and a second electrode in superposed relation; and at least one isolated Light Harvesting Complex (LHC) between the electrodes. Preferred photosensitive devices comprise an electron transport layer formed of a first photoconductive organic semiconductor material, adjacent to the LHC, disposed between the first electrode and the LHC; and a hole transport layer formed of a second photoconductive organic semiconductor material, adjacent to the LHC, disposed between the second electrode and the LHC. Solid state photosensitive devices of the present invention may comprise at least one additional layer of photoconductive organic semiconductor material disposed between the first electrode and the electron transport layer; and at least one additional layer of photoconductive organic semiconductor material, disposed between the second electrode and the hole transport layer. Methods of generating photocurrent are provided which comprise exposing a photovoltaic device of the present invention to light. Electronic devices are provided which comprise a solid state photosensitive device of the present invention.

Semiconductor Laser Low Frequency Noise Characterization

NASA Technical Reports Server (NTRS)

Maleki, Lute; Logan, Ronald T.

1996-01-01

This work summarizes the efforts in identifying the fundamental noise limit in semiconductor optical sources (lasers) to determine the source of 1/F noise and it's associated behavior. In addition, the study also addresses the effects of this 1/F noise on RF phased arrays. The study showed that the 1/F noise in semiconductor lasers has an ultimate physical limit based upon similar factors to fundamental noise generated in other semiconductor and solid state devices. The study also showed that both additive and multiplicative noise can be a significant detriment to the performance of RF phased arrays especially in regard to very low sidelobe performance and ultimate beam steering accuracy. The final result is that a noise power related term must be included in a complete analysis of the noise spectrum of any semiconductor device including semiconductor lasers.

Biasing, operation and parasitic current limitation in single device equivalent to CMOS, and other semiconductor systems

DOEpatents

Welch, James D.

2003-09-23

Disclosed are semiconductor devices including at least one junction which is rectifying whether the semiconductor is caused to be N or P-type, by the presence of applied gate voltage field induced carriers in essentially intrinsic, essentially homogeneously simultaneously containing both N and P-type metallurgical dopants at substantially equal doping levels, essentially homogeneously simultaneously containing both N and P-type metallurgical dopants at different doping levels, and containing a single metallurgical doping type, and functional combinations thereof. In particular, inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to conventional multiple device CMOS systems, which can be operated as modulators, are disclosed as are a non-latching SCR and an approach to blocking parasitic currents utilizing material(s) which form rectifying junctions with both N and P-type semiconductor whether metallurigically or field induced.

Semiconductor technology program: Progress briefs

NASA Technical Reports Server (NTRS)

Galloway, K. F.; Scace, R. I.; Walters, E. J.

1981-01-01

Measurement technology for semiconductor materials, process control, and devices, is discussed. Silicon and silicon based devices are emphasized. Highlighted activities include semiinsulating GaAs characterization, an automatic scanning spectroscopic ellipsometer, linewidth measurement and coherence, bandgap narrowing effects in silicon, the evaluation of electrical linewidth uniformity, and arsenicomplanted profiles in silicon.

General Electronics Technician: Semiconductor Devices and Circuits.

ERIC Educational Resources Information Center

Hilley, Robert

These instructional materials include a teacher's guide designed to assist instructors in organizing and presenting an introductory course in general electronics focusing on semiconductor devices and circuits and a student guide. The materials are based on the curriculum-alignment concept of first stating the objectives, developing instructional…

Semiconductor structures having electrically insulating and conducting portions formed from an AlSb-alloy layer

DOEpatents

Spahn, Olga B.; Lear, Kevin L.

1998-01-01

A semiconductor structure. The semiconductor structure comprises a plurality of semiconductor layers formed on a substrate including at least one layer of a III-V compound semiconductor alloy comprising aluminum (Al) and antimony (Sb), with at least a part of the AlSb-alloy layer being chemically converted by an oxidation process to form superposed electrically insulating and electrically conducting portions. The electrically insulating portion formed from the AlSb-alloy layer comprises an oxide of aluminum (e.g. Al.sub.2 O.sub.3), while the electrically conducting portion comprises Sb. A lateral oxidation process allows formation of the superposed insulating and conducting portions below monocrystalline semiconductor layers for forming many different types of semiconductor structures having particular utility for optoelectronic devices such as light-emitting diodes, edge-emitting lasers, vertical-cavity surface-emitting lasers, photodetectors and optical modulators (waveguide and surface normal), and for electronic devices such as heterojunction bipolar transistors, field-effect transistors and quantum-effect devices. The invention is expected to be particularly useful for forming light-emitting devices for use in the 1.3-1.6 .mu.m wavelength range, with the AlSb-alloy layer acting to define an active region of the device and to effectively channel an electrical current therein for efficient light generation.

Photonic Switching Devices Using Light Bullets

NASA Technical Reports Server (NTRS)

Goorjian, Peter M. (Inventor)

1999-01-01

A unique ultra-fast, all-optical switching device or switch is made with readily available, relatively inexpensive, highly nonlinear optical materials. which includes highly nonlinear optical glasses, semiconductor crystals and/or multiple quantum well semiconductor materials. At the specified wavelengths. these optical materials have a sufficiently negative group velocity dispersion and high nonlinear index of refraction to support stable light bullets. The light bullets counter-propagate through, and interact within the waveguide to selectively change each others' directions of propagation into predetermined channels. In one embodiment, the switch utilizes a rectangularly planar slab waveguide. and further includes two central channels and a plurality of lateral channels for guiding the light bullets into and out of the waveguide. An advantage of the present all-optical switching device lies in its practical use of light bullets, thus preventing the degeneration of the pulses due to dispersion and diffraction at the front and back of the pulses. Another advantage of the switching device is the relative insensitivity of the collision process to the time difference in which the counter-propagating pulses enter the waveguide. since. contrary to conventional co-propagating spatial solitons, the relative phase of the colliding pulses does not affect the interaction of these pulses. Yet another feature of the present all-optical switching device is the selection of the light pulse parameters which enables the generation of light bullets in nonlinear optical materials. including highly nonlinear optical glasses and semiconductor materials such as semiconductor crystals and/or multiple quantum well semiconductor materials.

Methods of measurement for semiconductor materials, process control, and devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1972-01-01

Activities directed toward the development of methods of measurement for semiconductor materials, process control, and devices are described. Accomplishments include the determination of the reasons for differences in measurements of transistor delay time, identification of an energy level model for gold-doped silicon, and the finding of evidence that it does not appear to be necessary for an ultrasonic bonding tool to grip the wire and move it across the substrate metallization to make the bond. Work is continuing on measurement of resistivity of semiconductor crystals; study of gold-doped silicon; development of the infrared response technique; evaluation of wire bonds and die attachment; measurement of thermal properties of semiconductor devices, delay time, and related carrier transport properties in junction devices, and noise properties of microwave diodes; and characterization of silicon nuclear radiation detectors.

Multi-junction, monolithic solar cell using low-band-gap materials lattice matched to GaAs or Ge

DOEpatents

Olson, Jerry M.; Kurtz, Sarah R.; Friedman, Daniel J.

2001-01-01

A multi-junction, monolithic, photovoltaic solar cell device is provided for converting solar radiation to photocurrent and photovoltage with improved efficiency. The solar cell device comprises a plurality of semiconductor cells, i.e., active p/n junctions, connected in tandem and deposited on a substrate fabricated from GaAs or Ge. To increase efficiency, each semiconductor cell is fabricated from a crystalline material with a lattice constant substantially equivalent to the lattice constant of the substrate material. Additionally, the semiconductor cells are selected with appropriate band gaps to efficiently create photovoltage from a larger portion of the solar spectrum. In this regard, one semiconductor cell in each embodiment of the solar cell device has a band gap between that of Ge and GaAs. To achieve desired band gaps and lattice constants, the semiconductor cells may be fabricated from a number of materials including Ge, GaInP, GaAs, GaInAsP, GaInAsN, GaAsGe, BGaInAs, (GaAs)Ge, CuInSSe, CuAsSSe, and GaInAsNP. To further increase efficiency, the thickness of each semiconductor cell is controlled to match the photocurrent generated in each cell. To facilitate photocurrent flow, a plurality of tunnel junctions of low-resistivity material are included between each adjacent semiconductor cell. The conductivity or direction of photocurrent in the solar cell device may be selected by controlling the specific p-type or n-type characteristics for each active junction.

Interconnect assembly for an electronic assembly and assembly method therefor

DOEpatents

Gerbsch, Erich William

2003-06-10

An interconnect assembly and method for a semiconductor device, in which the interconnect assembly can be used in lieu of wirebond connections to form an electronic assembly. The interconnect assembly includes first and second interconnect members. The first interconnect member has a first surface with a first contact and a second surface with a second contact electrically connected to the first contact, while the second interconnect member has a flexible finger contacting the second contact of the first interconnect member. The first interconnect member is adapted to be aligned and registered with a semiconductor device having a contact on a first surface thereof, so that the first contact of the first interconnect member electrically contacts the contact of the semiconductor device. Consequently, the assembly method does not require any wirebonds, but instead merely entails aligning and registering the first interconnect member with the semiconductor device so that the contacts of the first interconnect member and the semiconductor device make electrically contact, and then contacting the second contact of the first interconnect member with the flexible finger of the second interconnect member.

Unitary lens semiconductor device

DOEpatents

Lear, Kevin L.

1997-01-01

A unitary lens semiconductor device and method. The unitary lens semiconductor device is provided with at least one semiconductor layer having a composition varying in the growth direction for unitarily forming one or more lenses in the semiconductor layer. Unitary lens semiconductor devices may be formed as light-processing devices such as microlenses, and as light-active devices such as light-emitting diodes, photodetectors, resonant-cavity light-emitting diodes, vertical-cavity surface-emitting lasers, and resonant cavity photodetectors.

Single photon detection with self-quenching multiplication

NASA Technical Reports Server (NTRS)

Zheng, Xinyu (Inventor); Cunningham, Thomas J. (Inventor); Pain, Bedabrata (Inventor)

2011-01-01

A photoelectronic device and an avalanche self-quenching process for a photoelectronic device are described. The photoelectronic device comprises a nanoscale semiconductor multiplication region and a nanoscale doped semiconductor quenching structure including a depletion region and an undepletion region. The photoelectronic device can act as a single photon detector or a single carrier multiplier. The avalanche self-quenching process allows electrical field reduction in the multiplication region by movement of the multiplication carriers, thus quenching the avalanche.

Unitary lens semiconductor device

DOEpatents

Lear, K.L.

1997-05-27

A unitary lens semiconductor device and method are disclosed. The unitary lens semiconductor device is provided with at least one semiconductor layer having a composition varying in the growth direction for unitarily forming one or more lenses in the semiconductor layer. Unitary lens semiconductor devices may be formed as light-processing devices such as microlenses, and as light-active devices such as light-emitting diodes, photodetectors, resonant-cavity light-emitting diodes, vertical-cavity surface-emitting lasers, and resonant cavity photodetectors. 9 figs.

The MSFC complementary metal oxide semiconductor (including multilevel interconnect metallization) process handbook

NASA Technical Reports Server (NTRS)

Bouldin, D. L.; Eastes, R. W.; Feltner, W. R.; Hollis, B. R.; Routh, D. E.

1979-01-01

The fabrication techniques for creation of complementary metal oxide semiconductor integrated circuits at George C. Marshall Space Flight Center are described. Examples of C-MOS integrated circuits manufactured at MSFC are presented with functional descriptions of each. Typical electrical characteristics of both p-channel metal oxide semiconductor and n-channel metal oxide semiconductor discrete devices under given conditions are provided. Procedures design, mask making, packaging, and testing are included.

Low temperature junction growth using hot-wire chemical vapor deposition

DOEpatents

Wang, Qi; Page, Matthew; Iwaniczko, Eugene; Wang, Tihu; Yan, Yanfa

2014-02-04

A system and a process for forming a semi-conductor device, and solar cells (10) formed thereby. The process includes preparing a substrate (12) for deposition of a junction layer (14); forming the junction layer (14) on the substrate (12) using hot wire chemical vapor deposition; and, finishing the semi-conductor device.

Circuit For Current-vs.-Voltage Tests Of Semiconductors

NASA Technical Reports Server (NTRS)

Huston, Steven W.

1991-01-01

Circuit designed for measurement of dc current-versus-voltage characteristics of semiconductor devices. Operates in conjunction with x-y pen plotter or digital storage oscilloscope, which records data. Includes large feedback resistors to prevent high currents damaging device under test. Principal virtues: low cost, simplicity, and compactness. Also used to evaluate diodes and transistors.

Bulk semiconducting scintillator device for radiation detection

DOEpatents

Stowe, Ashley C.; Burger, Arnold; Groza, Michael

2016-08-30

A bulk semiconducting scintillator device, including: a Li-containing semiconductor compound of general composition Li-III-VI.sub.2, wherein III is a Group III element and VI is a Group VI element; wherein the Li-containing semiconductor compound is used in one or more of a first mode and a second mode, wherein: in the first mode, the Li-containing semiconductor compound is coupled to an electrical circuit under bias operable for measuring electron-hole pairs in the Li-containing semiconductor compound in the presence of neutrons and the Li-containing semiconductor compound is also coupled to current detection electronics operable for detecting a corresponding current in the Li-containing semiconductor compound; and, in the second mode, the Li-containing semiconductor compound is coupled to a photodetector operable for detecting photons generated in the Li-containing semiconductor compound in the presence of the neutrons.

Architectures for Improved Organic Semiconductor Devices

NASA Astrophysics Data System (ADS)

Beck, Jonathan H.

Advancements in the microelectronics industry have brought increasing performance and decreasing prices to a wide range of users. Conventional silicon-based electronics have followed Moore's law to provide an ever-increasing integrated circuit transistor density, which drives processing power, solid-state memory density, and sensor technologies. As shrinking conventional integrated circuits became more challenging, researchers began exploring electronics with the potential to penetrate new applications with a low price of entry: "Electronics everywhere." The new generation of electronics is thin, light, flexible, and inexpensive. Organic electronics are part of the new generation of thin-film electronics, relying on the synthetic flexibility of carbon molecules to create organic semiconductors, absorbers, and emitters which perform useful tasks. Organic electronics can be fabricated with low energy input on a variety of novel substrates, including inexpensive plastic sheets. The potential ease of synthesis and fabrication of organic-based devices means that organic electronics can be made at very low cost. Successfully demonstrated organic semiconductor devices include photovoltaics, photodetectors, transistors, and light emitting diodes. Several challenges that face organic semiconductor devices are low performance relative to conventional devices, long-term device stability, and development of new organic-compatible processes and materials. While the absorption and emission performance of organic materials in photovoltaics and light emitting diodes is extraordinarily high for thin films, the charge conduction mobilities are generally low. Building highly efficient devices with low-mobility materials is one challenge. Many organic semiconductor films are unstable during fabrication, storage, and operation due to reactions with water, oxygen and hydroxide. A final challenge facing organic electronics is the need for new processes and materials for electrodes, semiconductors and substrates compatible with low-temperature, flexible, and oxygenated and aromatic solvent-free fabrication. Materials and processes must be capable of future high volume production in order to enable low costs. In this thesis we explore several techniques to improve organic semiconductor device performance and enable new fabrication processes. In Chapter 2, I describe the integration of sub-optical-wavelength nanostructured electrodes that improve fill factor and power conversion efficiency in organic photovoltaic devices. Photovoltaic fill factor performance is one of the primary challenges facing organic photovoltaics because most organic semiconductors have poor charge mobility. Our electrical and optical measurements and simulations indicate that nanostructured electrodes improve charge extraction in organic photovoltaics. In Chapter 3, I describe a general method for maximizing the efficiency of organic photovoltaic devices by simultaneously optimizing light absorption and charge carrier collection. We analyze the potential benefits of light trapping strategies for maximizing the overall power conversion efficiency of organic photovoltaic devices. This technique may be used to improve organic photovoltaic materials with low absorption, or short exciton diffusion and carrier-recombination lengths, opening up the device design space. In Chapter 4, I describe a process for high-quality graphene transfer onto chemically sensitive, weakly interacting organic semiconductor thin-films. Graphene is a promising flexible and highly transparent electrode for organic electronics; however, transferring graphene films onto organic semiconductor devices was previously impossible. We demonstrate a new transfer technique based on an elastomeric stamp coated with an fluorinated polymer release layer. We fabricate three classes of organic semiconductor devices: field effect transistors without high temperature annealing, transparent organic light-emitting diodes, and transparent small-molecule organic photovoltaic devices.

One-Dimensional Nanostructures and Devices of II–V Group Semiconductors

PubMed Central

2009-01-01

The II–V group semiconductors, with narrow band gaps, are important materials with many applications in infrared detectors, lasers, solar cells, ultrasonic multipliers, and Hall generators. Since the first report on trumpet-like Zn3P2nanowires, one-dimensional (1-D) nanostructures of II–V group semiconductors have attracted great research attention recently because these special 1-D nanostructures may find applications in fabricating new electronic and optoelectronic nanoscale devices. This article covers the 1-D II–V semiconducting nanostructures that have been synthesized till now, focusing on nanotubes, nanowires, nanobelts, and special nanostructures like heterostructured nanowires. Novel electronic and optoelectronic devices built on 1-D II–V semiconducting nanostructures will also be discussed, which include metal–insulator-semiconductor field-effect transistors, metal-semiconductor field-effect transistors, andp–nheterojunction photodiode. We intent to provide the readers a brief account of these exciting research activities. PMID:20596452

Semiconductor structures having electrically insulating and conducting portions formed from an AlSb-alloy layer

DOEpatents

Spahn, O.B.; Lear, K.L.

1998-03-10

The semiconductor structure comprises a plurality of semiconductor layers formed on a substrate including at least one layer of a III-V compound semiconductor alloy comprising aluminum (Al) and antimony (Sb), with at least a part of the AlSb-alloy layer being chemically converted by an oxidation process to form superposed electrically insulating and electrically conducting portions. The electrically insulating portion formed from the AlSb-alloy layer comprises an oxide of aluminum (e.g., Al{sub 2}O{sub 3}), while the electrically conducting portion comprises Sb. A lateral oxidation process allows formation of the superposed insulating and conducting portions below monocrystalline semiconductor layers for forming many different types of semiconductor structures having particular utility for optoelectronic devices such as light-emitting diodes, edge-emitting lasers, vertical-cavity surface-emitting lasers, photodetectors and optical modulators (waveguide and surface normal), and for electronic devices such as heterojunction bipolar transistors, field-effect transistors and quantum-effect devices. The invention is expected to be particularly useful for forming light-emitting devices for use in the 1.3--1.6 {mu}m wavelength range, with the AlSb-alloy layer acting to define an active region of the device and to effectively channel an electrical current therein for efficient light generation. 10 figs.

Color selective photodetector and methods of making

DOEpatents

Walker, Brian J.; Dorn, August; Bulovic, Vladimir; Bawendi, Moungi G.

2013-03-19

A photoelectric device, such as a photodetector, can include a semiconductor nanowire electrostatically associated with a J-aggregate. The J-aggregate can facilitate absorption of a desired wavelength of light, and the semiconductor nanowire can facilitate charge transport. The color of light detected by the device can be chosen by selecting a J-aggregate with a corresponding peak absorption wavelength.

Organic photosensitive cells grown on rough electrode with nano-scale morphology control

DOEpatents

Yang, Fan [Piscataway, NJ; Forrest, Stephen R [Ann Arbor, MI

2011-06-07

An optoelectronic device and a method for fabricating the optoelectronic device includes a first electrode disposed on a substrate, an exposed surface of the first electrode having a root mean square roughness of at least 30 nm and a height variation of at least 200 nm, the first electrode being transparent. A conformal layer of a first organic semiconductor material is deposited onto the first electrode by organic vapor phase deposition, the first organic semiconductor material being a small molecule material. A layer of a second organic semiconductor material is deposited over the conformal layer. At least some of the layer of the second organic semiconductor material directly contacts the conformal layer. A second electrode is deposited over the layer of the second organic semiconductor material. The first organic semiconductor material is of a donor-type or an acceptor-type relative to the second organic semiconductor material, which is of the other material type.

Selective etchant for oxide sacrificial material in semiconductor device fabrication

DOEpatents

Clews, Peggy J.; Mani, Seethambal S.

2005-05-17

An etching composition and method is disclosed for removing an oxide sacrificial material during manufacture of semiconductor devices including micromechanical, microelectromechanical or microfluidic devices. The etching composition and method are based on the combination of hydrofluoric acid (HF) and sulfuric acid (H.sub.2 SO.sub.4). These acids can be used in the ratio of 1:3 to 3:1 HF:H.sub.2 SO.sub.4 to remove all or part of the oxide sacrificial material while providing a high etch selectivity for non-oxide materials including polysilicon, silicon nitride and metals comprising aluminum. Both the HF and H.sub.2 SO.sub.4 can be provided as "semiconductor grade" acids in concentrations of generally 40-50% by weight HF, and at least 90% by weight H.sub.2 SO.sub.4.

Methods and devices for fabricating and assembling printable semiconductor elements

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nuzzo, Ralph G.; Rogers, John A.; Menard, Etienne

The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.

Methods and devices for fabricating and assembling printable semiconductor elements

DOEpatents

Nuzzo, Ralph G; Rogers, John A; Menard, Etienne; Lee, Keon Jae; Khang, Dahl-Young; Sun, Yugang; Meitl, Matthew; Zhu, Zhengtao

2014-03-04

The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.

Electrically tunable infrared metamaterial devices

DOEpatents

Brener, Igal; Jun, Young Chul

2015-07-21

A wavelength-tunable, depletion-type infrared metamaterial optical device is provided. The device includes a thin, highly doped epilayer whose electrical permittivity can become negative at some infrared wavelengths. This highly-doped buried layer optically couples with a metamaterial layer. Changes in the transmission spectrum of the device can be induced via the electrical control of this optical coupling. An embodiment includes a contact layer of semiconductor material that is sufficiently doped for operation as a contact layer and that is effectively transparent to an operating range of infrared wavelengths, a thin, highly doped buried layer of epitaxially grown semiconductor material that overlies the contact layer, and a metallized layer overlying the buried layer and patterned as a resonant metamaterial.

Methods of producing free-standing semiconductors using sacrificial buffer layers and recyclable substrates

DOEpatents

Ptak, Aaron Joseph; Lin, Yong; Norman, Andrew; Alberi, Kirstin

2015-05-26

A method of producing semiconductor materials and devices that incorporate the semiconductor materials are provided. In particular, a method is provided of producing a semiconductor material, such as a III-V semiconductor, on a spinel substrate using a sacrificial buffer layer, and devices such as photovoltaic cells that incorporate the semiconductor materials. The sacrificial buffer material and semiconductor materials may be deposited using lattice-matching epitaxy or coincident site lattice-matching epitaxy, resulting in a close degree of lattice matching between the substrate material and deposited material for a wide variety of material compositions. The sacrificial buffer layer may be dissolved using an epitaxial liftoff technique in order to separate the semiconductor device from the spinel substrate, and the spinel substrate may be reused in the subsequent fabrication of other semiconductor devices. The low-defect density semiconductor materials produced using this method result in the enhanced performance of the semiconductor devices that incorporate the semiconductor materials.

Methods of measurement for semiconductor materials, process control, and devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1972-01-01

Activities directed toward the development of methods of measurement for semiconductor materials, process control, and devices are described. Topics investigated include: measurements of transistor delay time; application of the infrared response technique to the study of radiation-damaged, lithium-drifted silicon detectors; and identification of a condition that minimizes wire flexure and reduces the failure rate of wire bonds in transistors and integrated circuits under slow thermal cycling conditions. Supplementary data concerning staff, standards committee activities, technical services, and publications are included as appendixes.

Methods of measurement for semiconductor materials, process control, and devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1973-01-01

This progress report describes NBS activities directed toward the development of methods of measurement for semiconductor materials, process control, and devices. Significant accomplishments during this reporting period include design of a plan to provide standard silicon wafers for four-probe resistivity measurements for the industry, publication of a summary report on the photoconductive decay method for measuring carrier lifetime, publication of a comprehensive review of the field of wire bond fabrication and testing, and successful completion of organizational activity leading to the establishment of a new group on quality and hardness assurance in ASTM Committee F-1 on Electronics. Work is continuing on measurement of resistivity of semiconductor crystals; characterization of generation-recombination-trapping centers in silicon; study of gold-doped silicon; development of the infrared response technique; evaluation of wire bonds and die attachment; and measurement of thermal properties of semiconductor devices, delay time and related carrier transport properties in junction devices, and noise properties of microwave diodes.

Active pixel sensor with intra-pixel charge transfer

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

1995-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Active pixel sensor with intra-pixel charge transfer

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

2003-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Active pixel sensor with intra-pixel charge transfer

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

2004-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Surface plasmon-mediated energy transfer of electrically-pumped excitons

DOEpatents

An, Kwang Hyup; Shtein, Max; Pipe, Kevin P.

2015-08-25

An electrically pumped light emitting device emits a light when powered by a power source. The light emitting device includes a first electrode, a second electrode including an outer surface, and at least one active organic semiconductor disposed between the first and second electrodes. The device also includes a dye adjacent the outer surface of the second electrode such that the second electrode is disposed between the dye and the active organic semiconductor. A voltage applied by the power source across the first and second electrodes causes energy to couple from decaying dipoles into surface plasmon polariton modes, which then evanescently couple to the dye to cause the light to be emitted.

Abatement of waste gases and water during the processes of semiconductor fabrication.

PubMed

Wen, Rui-mei; Liang, Jun-wu

2002-10-01

The purpose of this article is to examine the methods and equipment for abating waste gases and water produced during the manufacture of semiconductor materials and devices. Three separating methods and equipment are used to control three different groups of electronic wastes. The first group includes arsine and phosphine emitted during the processes of semiconductor materials manufacture. The abatement procedure for this group of pollutants consists of adding iodates, cupric and manganese salts to a multiple shower tower (MST) structure. The second group includes pollutants containing arsenic, phosphorus, HF, HCl, NO2, and SO3 emitted during the manufacture of semiconductor materials and devices. The abatement procedure involves mixing oxidants and bases in an oval column with a separator in the middle. The third group consists of the ions of As, P and heavy metals contained in the waste water. The abatement procedure includes adding CaCO3 and ferric salts in a flocculation-sedimentation compact device equipment. Test results showed that all waste gases and water after the abatement procedures presented in this article passed the discharge standards set by the State Environmental Protection Administration of China.

Atomic layer deposition: an enabling technology for the growth of functional nanoscale semiconductors

NASA Astrophysics Data System (ADS)

Biyikli, Necmi; Haider, Ali

2017-09-01

In this paper, we present the progress in the growth of nanoscale semiconductors grown via atomic layer deposition (ALD). After the adoption by semiconductor chip industry, ALD became a widespread tool to grow functional films and conformal ultra-thin coatings for various applications. Based on self-limiting and ligand-exchange-based surface reactions, ALD enabled the low-temperature growth of nanoscale dielectric, metal, and semiconductor materials. Being able to deposit wafer-scale uniform semiconductor films at relatively low-temperatures, with sub-monolayer thickness control and ultimate conformality, makes ALD attractive for semiconductor device applications. Towards this end, precursors and low-temperature growth recipes are developed to deposit crystalline thin films for compound and elemental semiconductors. Conventional thermal ALD as well as plasma-assisted and radical-enhanced techniques have been exploited to achieve device-compatible film quality. Metal-oxides, III-nitrides, sulfides, and selenides are among the most popular semiconductor material families studied via ALD technology. Besides thin films, ALD can grow nanostructured semiconductors as well using either template-assisted growth methods or bottom-up controlled nucleation mechanisms. Among the demonstrated semiconductor nanostructures are nanoparticles, nano/quantum-dots, nanowires, nanotubes, nanofibers, nanopillars, hollow and core-shell versions of the afore-mentioned nanostructures, and 2D materials including transition metal dichalcogenides and graphene. ALD-grown nanoscale semiconductor materials find applications in a vast amount of applications including functional coatings, catalysis and photocatalysis, renewable energy conversion and storage, chemical sensing, opto-electronics, and flexible electronics. In this review, we give an overview of the current state-of-the-art in ALD-based nanoscale semiconductor research including the already demonstrated and future applications.

Two-Dimensional Semiconductor Optoelectronics Based on van der Waals Heterostructures.

PubMed

Lee, Jae Yoon; Shin, Jun-Hwan; Lee, Gwan-Hyoung; Lee, Chul-Ho

2016-10-27

Two-dimensional (2D) semiconductors such as transition metal dichalcogenides (TMDCs) and black phosphorous have drawn tremendous attention as an emerging optical material due to their unique and remarkable optical properties. In addition, the ability to create the atomically-controlled van der Waals (vdW) heterostructures enables realizing novel optoelectronic devices that are distinct from conventional bulk counterparts. In this short review, we first present the atomic and electronic structures of 2D semiconducting TMDCs and their exceptional optical properties, and further discuss the fabrication and distinctive features of vdW heterostructures assembled from different kinds of 2D materials with various physical properties. We then focus on reviewing the recent progress on the fabrication of 2D semiconductor optoelectronic devices based on vdW heterostructures including photodetectors, solar cells, and light-emitting devices. Finally, we highlight the perspectives and challenges of optoelectronics based on 2D semiconductor heterostructures.

Two-Dimensional Semiconductor Optoelectronics Based on van der Waals Heterostructures

PubMed Central

Lee, Jae Yoon; Shin, Jun-Hwan; Lee, Gwan-Hyoung; Lee, Chul-Ho

2016-01-01

Two-dimensional (2D) semiconductors such as transition metal dichalcogenides (TMDCs) and black phosphorous have drawn tremendous attention as an emerging optical material due to their unique and remarkable optical properties. In addition, the ability to create the atomically-controlled van der Waals (vdW) heterostructures enables realizing novel optoelectronic devices that are distinct from conventional bulk counterparts. In this short review, we first present the atomic and electronic structures of 2D semiconducting TMDCs and their exceptional optical properties, and further discuss the fabrication and distinctive features of vdW heterostructures assembled from different kinds of 2D materials with various physical properties. We then focus on reviewing the recent progress on the fabrication of 2D semiconductor optoelectronic devices based on vdW heterostructures including photodetectors, solar cells, and light-emitting devices. Finally, we highlight the perspectives and challenges of optoelectronics based on 2D semiconductor heterostructures. PMID:28335321

Field-effect P-N junction

DOEpatents

Regan, William; Zettl, Alexander

2015-05-05

This disclosure provides systems, methods, and apparatus related to field-effect p-n junctions. In one aspect, a device includes an ohmic contact, a semiconductor layer disposed on the ohmic contact, at least one rectifying contact disposed on the semiconductor layer, a gate including a layer disposed on the at least one rectifying contact and the semiconductor layer and a gate contact disposed on the layer. A lateral width of the rectifying contact is less than a semiconductor depletion width of the semiconductor layer. The gate contact is electrically connected to the ohmic contact to create a self-gating feedback loop that is configured to maintain a gate electric field of the gate.

Substrate induced changes in atomically thin 2-dimensional semiconductors: Fundamentals, engineering, and applications

NASA Astrophysics Data System (ADS)

Sun, Yinghui; Wang, Rongming; Liu, Kai

2017-03-01

Substrate has great influences on materials syntheses, properties, and applications. The influences are particularly crucial for atomically thin 2-dimensional (2D) semiconductors. Their thicknesses are less than 1 nm; however, the lateral sizes can reach up to several inches or more. Therefore, these materials must be placed onto a variety of substrates before subsequent post-processing techniques for final electronic or optoelectronic devices. Recent studies reveal that substrates have been employed as ways to modulate the optical, electrical, mechanical, and chemical properties of 2D semiconductors. In this review, we summarize recent progress upon the effects of substrates on properties of 2D semiconductors, mostly focused on 2D transition metal dichalcogenides, through viewpoints of both fundamental physics and device applications. First, we discuss various effects of substrates, including interface strain, charge transfer, dielectric screening, and optical interference. Second, we show the modulation of 2D semiconductors by substrate engineering, including novel substrates (patterned substrates, 2D-material substrates, etc.) and active substrates (phase transition materials, ferroelectric materials, flexible substrates, etc.). Last, we present prospectives and challenges in this research field. This review provides a comprehensive understanding of the substrate effects, and may inspire new ideas of novel 2D devices based on substrate engineering.

Method and apparatus for increasing the durability and yield of thin film photovoltaic devices

DOEpatents

Phillips, J.E.; Lasswell, P.G.

1987-02-03

Thin film photovoltaic cells having a pair of semiconductor layers between an opaque and a transparent electrical contact are manufactured in a method which includes the step of scanning one of the semiconductor layers to determine the location of any possible shorting defect. Upon the detection of such defect, the defect is eliminated to increase the durability and yield of the photovoltaic device. 10 figs.

Spiking Excitable Semiconductor Laser as Optical Neurons: Dynamics, Clustering and Global Emerging Behaviors

DTIC Science & Technology

2014-06-28

constructed from inexpensive semiconductor lasers could lead to the development of novel neuro-inspired optical computing devices (threshold detectors ...optical computing devices (threshold detectors , logic gates, signal recognition, etc.). Other topics of research included the analysis of extreme events in...Extreme events is nowadays a highly active field of research. Rogue waves, earthquakes of high magnitude and financial crises are all rare and

Method and apparatus for increasing the durability and yield of thin film photovoltaic devices

DOEpatents

Phillips, James E.; Lasswell, Patrick G.

1987-01-01

Thin film photovoltaic cells having a pair of semiconductor layers between an opaque and a transparent electrical contact are manufactured in a method which includes the step of scanning one of the semiconductor layers to determine the location of any possible shorting defect. Upon the detection of such defect, the defect is eliminated to increase the durability and yield of the photovoltaic device.

Chemical Vapor Deposition Of Silicon Carbide

NASA Technical Reports Server (NTRS)

Powell, J. Anthony; Larkin, David J.; Matus, Lawrence G.; Petit, Jeremy B.

1993-01-01

Large single-crystal SiC boules from which wafers of large area cut now being produced commerically. Availability of wafers opens door for development of SiC semiconductor devices. Recently developed chemical vapor deposition (CVD) process produces thin single-crystal SiC films on SiC wafers. Essential step in sequence of steps used to fabricate semiconductor devices. Further development required for specific devices. Some potential high-temperature applications include sensors and control electronics for advanced turbine engines and automobile engines, power electronics for electromechanical actuators for advanced aircraft and for space power systems, and equipment used in drilling of deep wells. High-frequency applications include communication systems, high-speed computers, and microwave power transistors. High-radiation applications include sensors and controls for nuclear reactors.

Method of acquiring an image from an optical structure having pixels with dedicated readout circuits

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

2006-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Semiconductor optoelectronic devices for free-space optical communications

NASA Technical Reports Server (NTRS)

Katz, J.

1983-01-01

The properties of individual injection lasers are reviewed, and devices of greater complexity are described. These either include or are relevant to monolithic integration configurations of the lasers with their electronic driving circuitry, power combining methods of semiconductor lasers, and electronic methods of steering the radiation patterns of semiconductor lasers and laser arrays. The potential of AlGaAs laser technology for free-space optical communications systems is demonstrated. These solid-state components, which can generate and modulate light, combine the power of a number of sources and perform at least part of the beam pointing functions. Methods are proposed for overcoming the main drawback of semiconductor lasers, that is, their inability to emit the needed amount of optical power in a single-mode operation.

Controlled growth of larger heterojunction interface area for organic photosensitive devices

DOEpatents

Yang, Fan [Somerset, NJ; Forrest, Stephen R [Ann Arbor, MI

2009-12-29

An optoelectronic device and a method of fabricating a photosensitive optoelectronic device includes depositing a first organic semiconductor material on a first electrode to form a continuous first layer having protrusions, a side of the first layer opposite the first electrode having a surface area at least three times greater than an underlying lateral cross-sectional area; depositing a second organic semiconductor material directly on the first layer to form a discontinuous second layer, portions of the first layer remaining exposed; depositing a third organic semiconductor material directly on the second layer to form a discontinuous third layer, portions of at least the second layer remaining exposed; depositing a fourth organic semiconductor material on the third layer to form a continuous fourth layer, filling any exposed gaps and recesses in the first, second, and third layers; and depositing a second electrode on the fourth layer, wherein at least one of the first electrode and the second electrode is transparent, and the first and third organic semiconductor materials are both of a donor-type or an acceptor-type relative to second and fourth organic semiconductor materials, which are of the other material type.

Theoretical discovery of stable structures of group III-V monolayers: The materials for semiconductor devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Suzuki, Tatsuo, E-mail: dr.tatsuosuzuki@gmail.com

Group III-V compounds are very important as the materials of semiconductor devices. Stable structures of the monolayers of group III-V binary compounds have been discovered by using first-principles calculations. The primitive unit cell of the discovered structures is a rectangle, which includes four group-III atoms and four group-V atoms. A group-III atom and its three nearest-neighbor group-V atoms are placed on the same plane; however, these connections are not the sp{sup 2} hybridization. The bond angles around the group-V atoms are less than the bond angle of sp{sup 3} hybridization. The discovered structure of GaP is an indirect transition semiconductor,more » while the discovered structures of GaAs, InP, and InAs are direct transition semiconductors. Therefore, the discovered structures of these compounds have the potential of the materials for semiconductor devices, for example, water splitting photocatalysts. The discovered structures may become the most stable structures of monolayers which consist of other materials.« less

Defect Characterization, Imaging, and Control in Wide-Bandgap Semiconductors and Devices

NASA Astrophysics Data System (ADS)

Brillson, L. J.; Foster, G. M.; Cox, J.; Ruane, W. T.; Jarjour, A. B.; Gao, H.; von Wenckstern, H.; Grundmann, M.; Wang, B.; Look, D. C.; Hyland, A.; Allen, M. W.

2018-03-01

Wide-bandgap semiconductors are now leading the way to new physical phenomena and device applications at nanoscale dimensions. The impact of defects on the electronic properties of these materials increases as their size decreases, motivating new techniques to characterize and begin to control these electronic states. Leading these advances have been the semiconductors ZnO, GaN, and related materials. This paper highlights the importance of native point defects in these semiconductors and describes how a complement of spatially localized surface science and spectroscopy techniques in three dimensions can characterize, image, and begin to control these electronic states at the nanoscale. A combination of characterization techniques including depth-resolved cathodoluminescence spectroscopy, surface photovoltage spectroscopy, and hyperspectral imaging can describe the nature and distribution of defects at interfaces at both bulk and nanoscale surfaces, their metal interfaces, and inside nanostructures themselves. These features as well as temperature and mechanical strain inside wide-bandgap device structures at the nanoscale can be measured even while these devices are operating. These advanced capabilities enable several new directions for describing defects at the nanoscale, showing how they contribute to device degradation, and guiding growth processes to control them.

Investigation of advanced fault insertion and simulator methods

NASA Technical Reports Server (NTRS)

Dunn, W. R.; Cottrell, D.

1986-01-01

The cooperative agreement partly supported research leading to the open-literature publication cited. Additional efforts under the agreement included research into fault modeling of semiconductor devices. Results of this research are presented in this report which is summarized in the following paragraphs. As a result of the cited research, it appears that semiconductor failure mechanism data is abundant but of little use in developing pin-level device models. Failure mode data on the other hand does exist but is too sparse to be of any statistical use in developing fault models. What is significant in the failure mode data is that, unlike classical logic, MSI and LSI devices do exhibit more than 'stuck-at' and open/short failure modes. Specifically they are dominated by parametric failures and functional anomalies that can include intermittent faults and multiple-pin failures. The report discusses methods of developing composite pin-level models based on extrapolation of semiconductor device failure mechanisms, failure modes, results of temperature stress testing and functional modeling. Limitations of this model particularly with regard to determination of fault detection coverage and latency time measurement are discussed. Indicated research directions are presented.

Carrier transport and collection in fully depleted semiconductors by a combined action of the space charge field and the field due to electrode voltages

DOEpatents

Rehak, P.; Gatti, E.

1984-02-24

A semiconductor charge transport device and method for making same, characterized by providing a thin semiconductor wafer having rectifying functions on its opposing major surfaces and including a small capacitance ohmic contact, in combination with bias voltage means and associated circuit means for applying a predetermined voltage to effectively deplete the wafer in regions thereof between the rectifying junctions and the ohmic contact. A charge transport device of the invention is usable as a drift chamber, a low capacitance detector, or a charge coupled device each constructed according to the methods of the invention for making such devices. Detectors constructed according to the principles of the invention are characterized by having significantly higher particle position indicating resolution than is attainable with prior art detectors, while at the same time requiring substantially fewer readout channels to realize such high resolution.

Carrier transport and collection in fully depleted semiconductors by a combined action of the space charge field and the field due to electrode voltages

DOEpatents

Rehak, Pavel; Gatti, Emilio

1987-01-01

A semiconductor charge transport device and method for making same, characterized by providing a thin semiconductor wafer having rectifying junctions on its opposing major surfaces and including a small capacitance ohmic contact, in combination with bias voltage means and associated circuit means for applying a predetermined voltage to effectively deplete the wafer in regions thereof between the rectifying junctions and the ohmic contact. A charge transport device of the invention is usable as a drift chamber, a low capacitance detector, or a charge coupled device each constructed according to the methods of the invention for making such devices. Detectors constructed according to the principles of the invention are characterized by having significantly higher particle position indicating resolution than is attainable with prior art detectors, while at the same time requiring substantially fewer readout channels to realize such high resolution.

Carrier transport and collection in fully depleted semiconductors by a combined action of the space charge field and the field due to electrode voltages

DOEpatents

Rehak, P.; Gatti, E.

1987-08-18

A semiconductor charge transport device and method for making same are disclosed, characterized by providing a thin semiconductor wafer having rectifying junctions on its opposing major surfaces and including a small capacitance ohmic contact, in combination with bias voltage means and associated circuit means for applying a predetermined voltage to effectively deplete the wafer in regions thereof between the rectifying junctions and the ohmic contact. A charge transport device of the invention is usable as a drift chamber, a low capacitance detector, or a charge coupled device each constructed according to the methods of the invention for making such devices. Detectors constructed according to the principles of the invention are characterized by having significantly higher particle position indicating resolution than is attainable with prior art detectors, while at the same time requiring substantially fewer readout channels to realize such high resolution. 16 figs.

Research and Development Strategies in the Semiconductor Industry

NASA Astrophysics Data System (ADS)

Bowling, Allen

2003-03-01

In the 21st Century semiconductor industry, there is a critical balance between internally funded semiconductor research and development (R) and externally funded R. External R may include jointly-funded research collaborations/partnerships with other device manufacturers, jointly-funded consortia-based R, and individually-funded research programs at universities and other contract research locations. Each of these approaches has merits and each has costs. There is a critical balance between keeping the internal research and development pipeline filled and keeping it from being overspent. To meet both competitive schedule and cost goals, a semiconductor device manufacturer must decide on a model for selection of internal versus external R. Today, one of the most critical decisions is whether or not to do semiconductor research and development on 300 mm silicon wafers. Equipment suppliers are doing first development on 300 mm equipment. So, for the device manufacturer, there is a balance between the cost of doing development on 300 mm wafers and the development time schedule driven by equipment availability. In the face of these cost and schedule elements, device manufacturers are looking to consortia such as SEMATECH, SRC, and SRC MARCO for early development and screening of new materials and device structure approaches. This also causes much more close development collaboration between device manufacturer and equipment supplier. Many device manufacturers are also making use of direct contract research with universities and other contract-research organizations, such as IMEC, LETI, and other government-funded research organizations around the world. To get the most out of these external research interactions, the company must develop a strategy for management and technology integration of external R.

Minority carrier device comprising a passivating layer including a Group 13 element and a chalcogenide component

NASA Technical Reports Server (NTRS)

Barron, Andrew R. (Inventor); Hepp, Aloysius F. (Inventor); Jenkins, Phillip P. (Inventor); MacInnes, Andrew N. (Inventor)

1999-01-01

A minority carrier device includes at least one junction of at least two dissimilar materials, at least one of which is a semiconductor, and a passivating layer on at least one surface of the device. The passivating layer includes a Group 13 element and a chalcogenide component. Embodiments of the minority carrier device include, for example, laser diodes, light emitting diodes, heterojunction bipolar transistors, and solar cells.

Python Scripts for Automation of Current-Voltage Testing of Semiconductor Devices (FY17)

DTIC Science & Technology

2017-01-01

ARL-TR-7923 ● JAN 2017 US Army Research Laboratory Python Scripts for Automation of Current- Voltage Testing of Semiconductor...manual device-testing procedures is reduced or eliminated through automation. This technical report includes scripts written in Python , version 2.7, used ...nothing. 3.1.9 Exit Program The script exits the entire program. Line 505, sys.exit(), uses the sys package that comes with Python to exit system

Exact solution of three-dimensional transport problems using one-dimensional models. [in semiconductor devices

NASA Technical Reports Server (NTRS)

Misiakos, K.; Lindholm, F. A.

1986-01-01

Several parameters of certain three-dimensional semiconductor devices including diodes, transistors, and solar cells can be determined without solving the actual boundary-value problem. The recombination current, transit time, and open-circuit voltage of planar diodes are emphasized here. The resulting analytical expressions enable determination of the surface recombination velocity of shallow planar diodes. The method involves introducing corresponding one-dimensional models having the same values of these parameters.

Method of passivating semiconductor surfaces

DOEpatents

Wanlass, M.W.

1990-06-19

A method is described for passivating Group III-V or II-VI semiconductor compound surfaces. The method includes selecting a passivating material having a lattice constant substantially mismatched to the lattice constant of the semiconductor compound. The passivating material is then grown as an ultrathin layer of passivating material on the surface of the Group III-V or II-VI semiconductor compound. The passivating material is grown to a thickness sufficient to maintain a coherent interface between the ultrathin passivating material and the semiconductor compound. In addition, a device formed from such method is also disclosed.

Method of passivating semiconductor surfaces

DOEpatents

Wanlass, Mark W.

1990-01-01

A method of passivating Group III-V or II-VI semiconductor compound surfaces. The method includes selecting a passivating material having a lattice constant substantially mismatched to the lattice constant of the semiconductor compound. The passivating material is then grown as an ultrathin layer of passivating material on the surface of the Group III-V or II-VI semiconductor compound. The passivating material is grown to a thickness sufficient to maintain a coherent interface between the ultrathin passivating material and the semiconductor compound. In addition, a device formed from such method is also disclosed.

Back-side readout semiconductor photomultiplier

DOEpatents

Choong, Woon-Seng; Holland, Stephen E

2014-05-20

This disclosure provides systems, methods, and apparatus related to semiconductor photomultipliers. In one aspect, a device includes a p-type semiconductor substrate, the p-type semiconductor substrate having a first side and a second side, the first side of the p-type semiconductor substrate defining a recess, and the second side of the p-type semiconductor substrate being doped with n-type ions. A conductive material is disposed in the recess. A p-type epitaxial layer is disposed on the second side of the p-type semiconductor substrate. The p-type epitaxial layer includes a first region proximate the p-type semiconductor substrate, the first region being implanted with p-type ions at a higher doping level than the p-type epitaxial layer, and a second region disposed on the first region, the second region being doped with p-type ions at a higher doping level than the first region.

Method of Manufacturing a Light Emitting, Photovoltaic or Other Electronic Apparatus and System

NASA Technical Reports Server (NTRS)

Blanchard, Richard A. (Inventor); Lewandowski, Mark Allan (Inventor); Frazier, Donald Odell (Inventor); Ray, William Johnstone (Inventor); Fuller, Kirk A. (Inventor); Lowenthal, Mark David (Inventor); Shotton, Neil O. (Inventor)

2014-01-01

The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.

Method of manufacturing a light emitting, photovoltaic or other electronic apparatus and system

NASA Technical Reports Server (NTRS)

Fuller, Kirk A. (Inventor); Frazier, Donald Odell (Inventor); Blanchard, Richard A. (Inventor); Lowenthal, Mark D. (Inventor); Lewandowski, Mark Allan (Inventor); Ray, William Johnstone (Inventor); Shotton, Neil O. (Inventor)

2012-01-01

The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.

Methods of measurement for semiconductor materials, process control, and devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1972-01-01

Significant accomplishments include development of a procedure to correct for the substantial differences of transistor delay time as measured with different instruments or with the same instrument at different frequencies; association of infrared response spectra of poor quality germanium gamma ray detectors with spectra of detectors fabricated from portions of a good crystal that had been degraded in known ways; and confirmation of the excellent quality and cosmetic appearance of ultrasonic bonds made with aluminum ribbon wire. Work is continuing on measurement of resistivity of semiconductor crystals; study of gold-doped silicon, development of the infrared response technique; evaluation of wire bonds and die attachment; and measurement of thermal properties of semiconductor devices, delay time and related carrier transport properties in junction devices, and noise properties of microwave diodes.

Device and method for luminescence enhancement by resonant energy transfer from an absorptive thin film

DOE Office of Scientific and Technical Information (OSTI.GOV)

Akselrod, Gleb M.; Bawendi, Moungi G.; Bulovic, Vladimir

Disclosed are a device and a method for the design and fabrication of the device for enhancing the brightness of luminescent molecules, nanostructures, and thin films. The device includes a mirror, a dielectric medium or spacer, an absorptive layer, and a luminescent layer. The absorptive layer is a continuous thin film of a strongly absorbing organic or inorganic material. The luminescent layer may be a continuous luminescent thin film or an arrangement of isolated luminescent species, e.g., organic or metal-organic dye molecules, semiconductor quantum dots, or other semiconductor nanostructures, supported on top of the absorptive layer.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nuzzo, Ralph G.; Rogers, John A.; Menard, Etienne

The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.

Electronic-carrier-controlled photochemical etching process in semiconductor device fabrication

DOEpatents

Ashby, C.I.H.; Myers, D.R.; Vook, F.L.

1988-06-16

An electronic-carrier-controlled photochemical etching process for carrying out patterning and selective removing of material in semiconductor device fabrication includes the steps of selective ion implanting, photochemical dry etching, and thermal annealing, in that order. In the selective ion implanting step, regions of the semiconductor material in a desired pattern are damaged and the remainder of the regions of the material not implanted are left undamaged. The rate of recombination of electrons and holes is increased in the damaged regions of the pattern compared to undamaged regions. In the photochemical dry etching step which follows ion implanting step, the material in the undamaged regions of the semiconductor are removed substantially faster than in the damaged regions representing the pattern, leaving the ion-implanted, damaged regions as raised surface structures on the semiconductor material. After completion of photochemical dry etching step, the thermal annealing step is used to restore the electrical conductivity of the damaged regions of the semiconductor material.

Electronic-carrier-controlled photochemical etching process in semiconductor device fabrication

DOEpatents

Ashby, Carol I. H.; Myers, David R.; Vook, Frederick L.

1989-01-01

An electronic-carrier-controlled photochemical etching process for carrying out patterning and selective removing of material in semiconductor device fabrication includes the steps of selective ion implanting, photochemical dry etching, and thermal annealing, in that order. In the selective ion implanting step, regions of the semiconductor material in a desired pattern are damaged and the remainder of the regions of the material not implanted are left undamaged. The rate of recombination of electrons and holes is increased in the damaged regions of the pattern compared to undamaged regions. In the photochemical dry etching step which follows ion implanting step, the material in the undamaged regions of the semiconductor are removed substantially faster than in the damaged regions representing the pattern, leaving the ion-implanted, damaged regions as raised surface structures on the semiconductor material. After completion of photochemical dry etching step, the thermal annealing step is used to restore the electrical conductivity of the damaged regions of the semiconductor material.

Micro-fabricated integrated coil and magnetic circuit and method of manufacturing thereof

DOEpatents

Mihailovich, Robert E.; Papavasiliou, Alex P.; Mehrotra, Vivek; Stupar, Philip A.; Borwick, III, Robert L.; Ganguli, Rahul; DeNatale, Jeffrey F.

2017-03-28

A micro-fabricated electromagnetic device is provided for on-circuit integration. The electromagnetic device includes a core. The core has a plurality of electrically insulating layers positioned alternatingly between a plurality of magnetic layers to collectively form a continuous laminate having alternating magnetic and electrically insulating layers. The electromagnetic device includes a coil embedded in openings of the semiconductor substrate. An insulating material is positioned in the cavity and between the coil and an inner surface of the core. A method of manufacturing the electromagnetic device includes providing a semiconductor substrate having openings formed therein. Windings of a coil are electroplated and embedded in the openings. The insulating material is coated on or around an exposed surface of the coil. Alternating magnetic layers and electrically insulating layers may be micro-fabricated and electroplated as a single and substantially continuous segment on or around the insulating material.

Andreev reflection enhancement in semiconductor-superconductor structures

NASA Astrophysics Data System (ADS)

Bouscher, Shlomi; Winik, Roni; Hayat, Alex

2018-02-01

We develop a theoretical approach for modeling a wide range of semiconductor-superconductor structures with arbitrary potential barriers and a spatially dependent superconducting order parameter. We demonstrate asymmetry in the conductance spectrum as a result of a Schottky barrier shape. We further show that the Andreev reflection process can be significantly enhanced through resonant tunneling with appropriate barrier configuration, which can incorporate the Schottky barrier as a contributing component of the device. Moreover, we show that resonant tunneling can be achieved in superlattice structures as well. These theoretically demonstrated effects along with our modeling approach enable much more efficient Cooper pair injection into semiconductor-superconductor structures, including superconducting optoelectronic devices.

Center for Semiconductor Materials and Device Modeling: expanding collaborative research opportunities between government, academia, and industry

NASA Astrophysics Data System (ADS)

Perconti, Philip; Bedair, Sarah S.; Bajaj, Jagmohan; Schuster, Jonathan; Reed, Meredith

2016-09-01

To increase Soldier readiness and enhance situational understanding in ever-changing and complex environments, there is a need for rapid development and deployment of Army technologies utilizing sensors, photonics, and electronics. Fundamental aspects of these technologies include the research and development of semiconductor materials and devices which are ubiquitous in numerous applications. Since many Army technologies are considered niche, there is a lack of significant industry investment in the fundamental research and understanding of semiconductor technologies relevant to the Army. To address this issue, the US Army Research Laboratory is establishing a Center for Semiconductor Materials and Device Modeling and seeks to leverage expertise and resources across academia, government and industry. Several key research areas—highlighted and addressed in this paper—have been identified by ARL and external partners and will be pursued in a collaborative fashion by this Center. This paper will also address the mechanisms by which the Center is being established and will operate.

Plasma Properties of an Exploding Semiconductor Igniter

NASA Astrophysics Data System (ADS)

McGuirk, J. S.; Thomas, K. A.; Shaffer, E.; Malone, A. L.; Baginski, T.; Baginski, M. E.

1997-11-01

Requirements by the automotive industry for low-cost, pyrotechnic igniters for automotive airbags have led to the development of several semiconductor devices. The properties of the plasma produced by the vaporization of an exploding semiconductor are necessary in order to minimize the electrical energy requirements. This work considers two silicon-based semiconductor devices: the semiconductor bridge (SCB) and the semiconductor junction igniter both consisting of etched silicon with vapor deposited aluminum structures. Electrical current passing through the device heats a narrow junction region to the point of vaporization creating an aluminum and silicon low-temperature plasma. This work will investigate the electrical characteristics of both devices and infer the plasma properties. Furthermore optical spectral measurements will be taken of the exploding devices to estimate the temperature and density of the plasma.

Optical devices featuring textured semiconductor layers

DOEpatents

Moustakas, Theodore D [Dover, MA; Cabalu, Jasper S [Cary, NC

2011-10-11

A semiconductor sensor, solar cell or emitter, or a precursor therefor, has a substrate and one or more textured semiconductor layers deposited onto the substrate. The textured layers enhance light extraction or absorption. Texturing in the region of multiple quantum wells greatly enhances internal quantum efficiency if the semiconductor is polar and the quantum wells are grown along the polar direction. Electroluminescence of LEDs of the invention is dichromatic, and results in variable color LEDs, including white LEDs, without the use of phosphor.

Optical devices featuring textured semiconductor layers

DOEpatents

Moustakas, Theodore D [Dover, MA; Cabalu, Jasper S [Cary, NC

2012-08-07

A semiconductor sensor, solar cell or emitter, or a precursor therefor, has a substrate and one or more textured semiconductor layers deposited onto the substrate. The textured layers enhance light extraction or absorption. Texturing in the region of multiple quantum wells greatly enhances internal quantum efficiency if the semiconductor is polar and the quantum wells are grown along the polar direction. Electroluminescence of LEDs of the invention is dichromatic, and results in variable color LEDs, including white LEDs, without the use of phosphor.

Apparatus for making photovoltaic devices

DOEpatents

Foote, James B.; Kaake, Steven A. F.; Meyers, Peter V.; Nolan, James F.

1994-12-13

A process and apparatus (70) for making a large area photovoltaic device (22) that is capable of generating low cost electrical power. The apparatus (70) for performing the process includes an enclosure (126) providing a controlled environment in which an oven (156) is located. At least one and preferably a plurality of deposition stations (74,76,78) provide heated vapors of semiconductor material within the oven (156) for continuous elevated temperature deposition of semiconductor material on a sheet substrate (24) including a glass sheet (26) conveyed within the oven. The sheet substrate (24) is conveyed on a roller conveyor (184) within the oven (156) and the semiconductor material whose main layer (82) is cadmium telluride is deposited on an upwardly facing surface (28) of the substrate by each deposition station from a location within the oven above the roller conveyor. A cooling station (86) rapidly cools the substrate (24) after deposition of the semiconductor material thereon to strengthen the glass sheet of the substrate.

Process for making photovoltaic devices and resultant product

DOEpatents

Foote, James B.; Kaake, Steven A. F.; Meyers, Peter V.; Nolan, James F.

1996-07-16

A process and apparatus (70) for making a large area photovoltaic device (22) that is capable of generating low cost electrical power. The apparatus (70) for performing the process includes an enclosure (126) providing a controlled environment in which an oven (156) is located. At least one and preferably a plurality of deposition stations (74,76,78) provide heated vapors of semiconductor material within the oven (156) for continuous elevated temperature deposition of semiconductor material on a sheet substrate (24) including a glass sheet (26) conveyed within the oven. The sheet substrate (24) is conveyed on a roller conveyor (184) within the oven (156) and the semiconductor material whose main layer (82) is cadmium telluride is deposited on an upwardly facing surface (28) of the substrate by each deposition station from a location within the oven above the roller conveyor. A cooling station (86) rapidly cools the substrate (24) after deposition of the semiconductor material thereon to strengthen the glass sheet of the substrate.

Process for making photovoltaic devices and resultant product

DOEpatents

Foote, James B.; Kaake, Steven A. F.; Meyers, Peter V.; Nolan, James F.

1995-11-28

A process and apparatus (70) for making a large area photovoltaic device (22) that is capable of generating low cost electrical power. The apparatus (70) for performing the process includes an enclosure (126) providing a controlled environment in which an oven (156) is located. At least one and preferably a plurality of deposition stations (74,76,78) provide heated vapors of semiconductor material within the oven (156) for continuous elevated temperature deposition of semiconductor material on a sheet substrate (24) including a glass sheet (26) conveyed within the oven. The sheet substrate (24) is conveyed on a roller conveyor (184) within the oven (156) and the semiconductor material whose main layer (82) is cadmium telluride is deposited on an upwardly facing surface (28) of the substrate by each deposition station from a location within the oven above the roller conveyor. A cooling station (86) rapidly cools the substrate (24) after deposition of the semiconductor material thereon to strengthen the glass sheet of the substrate.

Process for making photovoltaic devices and resultant product

DOEpatents

Foote, James B.; Kaake, Steven A. F.; Meyers, Peter V.; Nolan, James F.

1993-09-28

A process and apparatus (70) for making a large area photovoltaic device (22) that is capable of generating low cost electrical power. The apparatus (70) for performing the process includes an enclosure (126) providing a controlled environment in which an oven (156) is located. At least one and preferably a plurality of deposition stations (74,76,78) provide heated vapors of semiconductor material within the oven (156) for continuous elevated temperature deposition of semiconductor material on a sheet substrate (24) including a glass sheet (26) conveyed within the oven. The sheet substrate (24) is conveyed on a roller conveyor (184) within the oven (156) and the semiconductor material whose main layer (82) is cadmium telluride is deposited on an upwardly facing surface (28) of the substrate by each deposition station from a location within the oven above the roller conveyor. A cooling station (86) rapidly cools the substrate (24) after deposition of the semiconductor material thereon to strengthen the glass sheet of the substrate.

High efficiency, low cost, thin film silicon solar cell design and method for making

DOEpatents

Sopori, Bhushan L.

2001-01-01

A semiconductor device having a substrate, a conductive intermediate layer deposited onto said substrate, wherein the intermediate layer serves as a back electrode, an optical reflector, and an interface for impurity gettering, and a semiconductor layer deposited onto said intermediate layer, wherein the semiconductor layer has a grain size at least as large as the layer thickness, and preferably about ten times the layer thickness. The device is formed by depositing a metal layer on a substrate, depositing a semiconductive material on the metal-coated substrate to produce a composite structure, and then optically processing the composite structure by illuminating it with infrared electromagnetic radiation according to a unique time-energy profile that first produces pits in the backside surface of the semiconductor material, then produces a thin, highly reflective, low resistivity alloy layer over the entire area of the interface between the semiconductor material and the metal layer, and finally produces a grain-enhanced semiconductor layer. The time-energy profile includes increasing the energy to a first energy level to initiate pit formation and create the desired pit size and density, then ramping up to a second energy level in which the entire device is heated to produce an interfacial melt, and finally reducing the energy to a third energy level and holding for a period of time to allow enhancement in the grain size of the semiconductor layer.

High efficiency low cost thin film silicon solar cell design and method for making

DOEpatents

Sopori, Bhushan L.

1999-01-01

A semiconductor device having a substrate, a conductive intermediate layer deposited onto said substrate, wherein the intermediate layer serves as a back electrode, an optical reflector, and an interface for impurity gettering, and a semiconductor layer deposited onto said intermediate layer, wherein the semiconductor layer has a grain size at least as large as the layer thickness, and preferably about ten times the layer thickness. The device is formed by depositing a metal layer on a substrate, depositing a semiconductive material on the metal-coated substrate to produce a composite structure, and then optically processing the composite structure by illuminating it with infrared electromagnetic radiation according to a unique time-energy profile that first produces pits in the backside surface of the semiconductor material, then produces a thin, highly reflective, low resistivity alloy layer over the entire area of the interface between the semiconductor material and the metal layer, and finally produces a grain-enhanced semiconductor layer. The time-energy profile includes increasing the energy to a first energy level to initiate pit formation and create the desired pit size and density, then ramping up to a second energy level in which the entire device is heated to produce an interfacial melt, and finally reducing the energy to a third energy level and holding for a period of time to allow enhancement in the grain size of the semiconductor layer.

Improved Photon-Emission-Microscope System

NASA Technical Reports Server (NTRS)

Vu, Duc

2006-01-01

An improved photon-emission-microscope (PEM) instrumentation system has been developed for use in diagnosing failure conditions in semiconductor devices, including complex integrated circuits. This system is designed primarily to image areas that emit photons, at wavelengths from 400 to 1,100 nm, associated with device failures caused by leakage of electric current through SiO2 and other dielectric materials used in multilayer semiconductor structures. In addition, the system is sensitive enough to image areas that emit photons during normal operation.

Ferroelectricity in Covalently functionalized Two-dimensional Materials: Integration of High-mobility Semiconductors and Nonvolatile Memory.

PubMed

Wu, Menghao; Dong, Shuai; Yao, Kailun; Liu, Junming; Zeng, Xiao Cheng

2016-11-09

Realization of ferroelectric semiconductors by conjoining ferroelectricity with semiconductors remains a challenging task because most present-day ferroelectric materials are unsuitable for such a combination due to their wide bandgaps. Herein, we show first-principles evidence toward the realization of a new class of two-dimensional (2D) ferroelectric semiconductors through covalent functionalization of many prevailing 2D materials. Members in this new class of 2D ferroelectric semiconductors include covalently functionalized germanene, and stanene (Nat. Commun. 2014, 5, 3389), as well as MoS 2 monolayer (Nat. Chem. 2015, 7, 45), covalent functionalization of the surface of bulk semiconductors such as silicon (111) (J. Phys. Chem. B 2006, 110 , 23898), and the substrates of oxides such as silica with self-assembly monolayers (Nano Lett. 2014, 14, 1354). The newly predicted 2D ferroelectric semiconductors possess high mobility, modest bandgaps, and distinct ferroelectricity that can be exploited for developing various heterostructural devices with desired functionalities. For example, we propose applications of the 2D materials as 2D ferroelectric field-effect transistors with ultrahigh on/off ratio, topological transistors with Dirac Fermions switchable between holes and electrons, ferroelectric junctions with ultrahigh electro-resistance, and multiferroic junctions for controlling spin by electric fields. All these heterostructural devices take advantage of the combination of high-mobility semiconductors with fast writing and nondestructive reading capability of nonvolatile memory, thereby holding great potential for the development of future multifunctional devices.

Electromagnetic radiation screening of microcircuits for long life applications

NASA Technical Reports Server (NTRS)

Brammer, W. G.; Erickson, J. J.; Levy, M. E.

1974-01-01

The utility of X-rays as a stimulus for screening high reliability semiconductor microcircuits was studied. The theory of the interaction of X-rays with semiconductor materials and devices was considered. Experimental measurements of photovoltages, photocurrents, and effects on specified parameters were made on discrete devices and on microcircuits. The test specimens included discrete devices with certain types of identified flaws and symptoms of flaws, and microcircuits exhibiting deviant electrical behavior. With a necessarily limited sample of test specimens, no useful correlation could be found between the X-ray-induced electrical response and the known or suspected presence of flaws.

Silicon carbide, an emerging high temperature semiconductor

NASA Technical Reports Server (NTRS)

Matus, Lawrence G.; Powell, J. Anthony

1991-01-01

In recent years, the aerospace propulsion and space power communities have expressed a growing need for electronic devices that are capable of sustained high temperature operation. Applications for high temperature electronic devices include development instrumentation within engines, engine control, and condition monitoring systems, and power conditioning and control systems for space platforms and satellites. Other earth-based applications include deep-well drilling instrumentation, nuclear reactor instrumentation and control, and automotive sensors. To meet the needs of these applications, the High Temperature Electronics Program at the Lewis Research Center is developing silicon carbide (SiC) as a high temperature semiconductor material. Research is focussed on developing the crystal growth, characterization, and device fabrication technologies necessary to produce a family of silicon carbide electronic devices and integrated sensors. The progress made in developing silicon carbide is presented, and the challenges that lie ahead are discussed.

Monolithic in-based III-V compound semiconductor focal plane array cell with single stage CCD output

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Cunningham, Thomas J. (Inventor); Krabach, Timothy N. (Inventor); Staller, Craig O. (Inventor)

1994-01-01

A monolithic semiconductor imager includes an indium-based III-V compound semiconductor monolithic active layer of a first conductivity type, an array of plural focal plane cells on the active layer, each of the focal plane cells including a photogate over a top surface of the active layer, a readout circuit dedicated to the focal plane cell including plural transistors formed monolithically with the monolithic active layer and a single-stage charge coupled device formed monolithically with the active layer between the photogate and the readout circuit for transferring photo-generated charge accumulated beneath the photogate during an integration period to the readout circuit. The photogate includes thin epitaxial semiconductor layer of a second conductivity type overlying the active layer and an aperture electrode overlying a peripheral portion of the thin epitaxial semiconductor layer, the aperture electrode being connectable to a photogate bias voltage.

Advanced 3-V semiconductor technology assessment

NASA Technical Reports Server (NTRS)

Nowogrodzki, M.

1983-01-01

Components required for extensions of currently planned space communications systems are discussed for large antennas, crosslink systems, single sideband systems, Aerostat systems, and digital signal processing. Systems using advanced modulation concepts and new concepts in communications satellites are included. The current status and trends in materials technology are examined with emphasis on bulk growth of semi-insulating GaAs and InP, epitaxial growth, and ion implantation. Microwave solid state discrete active devices, multigigabit rate GaAs digital integrated circuits, microwave integrated circuits, and the exploratory development of GaInAs devices, heterojunction devices, and quasi-ballistic devices is considered. Competing technologies such as RF power generation, filter structures, and microwave circuit fabrication are discussed. The fundamental limits of semiconductor devices and problems in implementation are explored.

Apparatus and methods for memory using in-plane polarization

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, Junwei; Chang, Kai; Ji, Shuai-Hua

A memory device includes a semiconductor layer with an in-plane polarization component switchable between a first direction and a second direction. A writing electrode is employed to apply a writing voltage to the semiconductor layer to change the in-plane polarization component between the first direction and the second direction. A reading electrode is employed to apply a reading voltage to the semiconductor layer to measure a tunneling current substantially perpendicular to the polarization direction of the in-plane polarization component. The directions of the reading voltage and the writing voltage are substantially perpendicular to each other. Therefore, the reading process ismore » non-destructive. Thin films (e.g., one unit cell thick) of ferroelectric material can be used in the memory device to increase the miniaturization of the device.« less

Method for depositing high-quality microcrystalline semiconductor materials

DOEpatents

Guha, Subhendu [Bloomfield Hills, MI; Yang, Chi C [Troy, MI; Yan, Baojie [Rochester Hills, MI

2011-03-08

A process for the plasma deposition of a layer of a microcrystalline semiconductor material is carried out by energizing a process gas which includes a precursor of the semiconductor material and a diluent with electromagnetic energy so as to create a plasma therefrom. The plasma deposits a layer of the microcrystalline semiconductor material onto the substrate. The concentration of the diluent in the process gas is varied as a function of the thickness of the layer of microcrystalline semiconductor material which has been deposited. Also disclosed is the use of the process for the preparation of an N-I-P type photovoltaic device.

Systems and methods for producing low work function electrodes

DOEpatents

Kippelen, Bernard; Fuentes-Hernandez, Canek; Zhou, Yinhua; Kahn, Antoine; Meyer, Jens; Shim, Jae Won; Marder, Seth R.

2015-07-07

According to an exemplary embodiment of the invention, systems and methods are provided for producing low work function electrodes. According to an exemplary embodiment, a method is provided for reducing a work function of an electrode. The method includes applying, to at least a portion of the electrode, a solution comprising a Lewis basic oligomer or polymer; and based at least in part on applying the solution, forming an ultra-thin layer on a surface of the electrode, wherein the ultra-thin layer reduces the work function associated with the electrode by greater than 0.5 eV. According to another exemplary embodiment of the invention, a device is provided. The device includes a semiconductor; at least one electrode disposed adjacent to the semiconductor and configured to transport electrons in or out of the semiconductor.

High-Temperature Electronics: A Role for Wide Bandgap Semiconductors?

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Okojie, Robert S.; Chen, Liang-Yu

2002-01-01

It is increasingly recognized that semiconductor based electronics that can function at ambient temperatures higher than 150 C without external cooling could greatly benefit a variety of important applications, especially-in the automotive, aerospace, and energy production industries. The fact that wide bandgap semiconductors are capable of electronic functionality at much higher temperatures than silicon has partially fueled their development, particularly in the case of SiC. It appears unlikely that wide bandgap semiconductor devices will find much use in low-power transistor applications until the ambient temperature exceeds approximately 300 C, as commercially available silicon and silicon-on-insulator technologies are already satisfying requirements for digital and analog very large scale integrated circuits in this temperature range. However, practical operation of silicon power devices at ambient temperatures above 200 C appears problematic, as self-heating at higher power levels results in high internal junction temperatures and leakages. Thus, most electronic subsystems that simultaneously require high-temperature and high-power operation will necessarily be realized using wide bandgap devices, once the technology for realizing these devices become sufficiently developed that they become widely available. Technological challenges impeding the realization of beneficial wide bandgap high ambient temperature electronics, including material growth, contacts, and packaging, are briefly discussed.

Improvement of hot-carrier and radiation hardnesses in metal-oxide-nitride-oxide semiconductor devices by irradiation-then-anneal treatments

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chang-Liao, K.S.; Hwu, J.G.

The hardnesses of hot-carrier and radiation of metal-oxide nitride-oxide semiconductor (MONOS) devices can be improved by the irradiation-then-anneal (ITA) treatments. Each treatment includes an irradiation of Co-60 with a total dose of 1M rads(SiO[sub 2]) and an anneal in N[sub 2] at 400 C for 10 min successively. This improvement can be explained by the release of SiO[sub 2]/Si interfacial strain.

Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

2003-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

2000-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor Integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

Ultra-high heat flux cooling characteristics of cryogenic micro-solid nitrogen particles and its application to semiconductor wafer cleaning technology

NASA Astrophysics Data System (ADS)

Ishimoto, Jun; Oh, U.; Guanghan, Zhao; Koike, Tomoki; Ochiai, Naoya

2014-01-01

The ultra-high heat flux cooling characteristics and impingement behavior of cryogenic micro-solid nitrogen (SN2) particles in relation to a heated wafer substrate were investigated for application to next generation semiconductor wafer cleaning technology. The fundamental characteristics of cooling heat transfer and photoresist removal-cleaning performance using micro-solid nitrogen particulate spray impinging on a heated substrate were numerically investigated and experimentally measured by a new type of integrated computational-experimental technique. This study contributes not only advanced cryogenic cooling technology for high thermal emission devices, but also to the field of nano device engineering including the semiconductor wafer cleaning technology.

Theoretical Investigation of Device Aspects of Semiconductor Superlattices.

DTIC Science & Technology

1983-09-01

n-i-p-i devices include bulk field effect transistors, ultrasensitive or ultrafast IR photodetectors , tunable light-emitting devices, and ultrafast...transistor4 ultrasensitive or ultrafast IR photodetectors , tunable light-emitt tg devices, and ultrafast optical modulators. Particularlylppealing...differential conductivity ( NDC ) ......................... 19 3.2.2. Spontaneous and stimulated FIR emission from interlayer transitions

Electroluminescent devices formed using semiconductor nanocrystals as an electron transport media and method of making such electroluminescent devices

DOEpatents

Alivisatos, A. Paul; Colvin, Vickie

1996-01-01

An electroluminescent device is described, as well as a method of making same, wherein the device is characterized by a semiconductor nanocrystal electron transport layer capable of emitting visible light in response to a voltage applied to the device. The wavelength of the light emitted by the device may be changed by changing either the size or the type of semiconductor nanocrystals used in forming the electron transport layer. In a preferred embodiment the device is further characterized by the capability of emitting visible light of varying wavelengths in response to changes in the voltage applied to the device. The device comprises a hole processing structure capable of injecting and transporting holes, and usually comprising a hole injecting layer and a hole transporting layer; an electron transport layer in contact with the hole processing structure and comprising one or more layers of semiconductor nanocrystals; and an electron injecting layer in contact with the electron transport layer for injecting electrons into the electron transport layer. The capability of emitting visible light of various wavelengths is principally based on the variations in voltage applied thereto, but the type of semiconductor nanocrystals used and the size of the semiconductor nanocrystals in the layers of semiconductor nanometer crystals may also play a role in color change, in combination with the change in voltage.

High Temperature Superconductor/Semiconductor Hybrid Microwave Devices and Circuits

NASA Technical Reports Server (NTRS)

Romanofsky, Robert R.; Miranda, Felix A.

1999-01-01

Contents include following: film deposition technique; laser ablation; magnetron sputtering; sequential evaporation; microwave substrates; film characterization at microwave frequencies; complex conductivity; magnetic penetration depth; surface impedance; planar single-mode filters; small antennas; antenna arrays phase noise; tunable oscillations; hybrid superconductor/semiconductor receiver front ends; and noise modeling.

Semiconductor Devices and Applications. Electronics Module 5. Instructor's Guide.

ERIC Educational Resources Information Center

Chappell, John; And Others

This module is the fifth of 10 modules in the competency-based electronics series. Introductory materials include a listing of competencies addressed in the module, a parts/equipment list, and a cross-reference table of instructional materials. Sixteen instructional units cover: semiconductor materials; diodes; diode applications and…

Fundamentals handbook of electrical and computer engineering. Volume 1 Circuits fields and electronics

NASA Astrophysics Data System (ADS)

Chang, S. S. L.

State of the art technology in circuits, fields, and electronics is discussed. The principles and applications of these technologies to industry, digital processing, microwave semiconductors, and computer-aided design are explained. Important concepts and methodologies in mathematics and physics are reviewed, and basic engineering sciences and associated design methods are dealt with, including: circuit theory and the design of magnetic circuits and active filter synthesis; digital signal processing, including FIR and IIR digital filter design; transmission lines, electromagnetic wave propagation and surface acoustic wave devices. Also considered are: electronics technologies, including power electronics, microwave semiconductors, GaAs devices, and magnetic bubble memories; digital circuits and logic design.

Review of - SiC wide-bandgap heterostructure properties as an alternate semiconductor material

NASA Astrophysics Data System (ADS)

Rajput Priti, J.; Patankar, Udayan S.; Koel, Ants; Nitnaware, V. N.

2018-05-01

Silicon substance (is also known as Quartz) is an abundant in nature and the electrical properties it exhibits, plays a vital role in developing its usage in the field of semiconductor. More than decades we can say that Silicon has shown desirable signs but at the later parts it has shown some research potential for development of alternative material as semiconductor devices. This need has come to light as we started scaling down in size of the Silicon material and up in speed. This semiconductor material started exhibiting several fundamental physical limits that include the minimum gate oxide thickness and the maximum saturation velocity of carriers which determines the operation frequency. Though the alternative semiconductors provide some answers (such as III-V's for high speed devices) for a path to skirt these problems, there also may be some ways to extend the life of silicon itself. Two paths are used as for alternative semiconductors i.e alternative gate dielectrics and silicon-based heterostructures. The SiC material has some strength properties under different conditions and find out the defects available in the material.

Three fundamental devices in one: a reconfigurable multifunctional device in two-dimensional WSe2

NASA Astrophysics Data System (ADS)

Dhakras, Prathamesh; Agnihotri, Pratik; Lee, Ji Ung

2017-06-01

The three pillars of semiconductor device technologies are (1) the p-n diode, (2) the metal-oxide-semiconductor field-effect transistor and (3) the bipolar junction transistor. They have enabled the unprecedented growth in the field of information technology that we see today. Until recently, the technological revolution for better, faster and more efficient devices has been governed by scaling down the device dimensions following Moore’s Law. With the slowing of Moore’s law, there is a need for alternative materials and computing technologies that can continue the advancement in functionality. Here, we describe a single, dynamically reconfigurable device that implements these three fundamental device functions. The device uses buried gates to achieve n- and p-channels and fits into a larger effort to develop devices with enhanced functionalities, including logic functions, over device scaling. As they are all surface conducting devices, we use one material parameter, the interface trap density of states, to describe the key figure-of-merit of each device.

Low-Resistivity Zinc Selenide for Heterojunctions

NASA Technical Reports Server (NTRS)

Stirn, R. J.

1986-01-01

Magnetron reactive sputtering enables doping of this semiconductor. Proposed method of reactive sputtering combined with doping shows potential for yielding low-resistivity zinc selenide films. Zinc selenide attractive material for forming heterojunctions with other semiconductor compounds as zinc phosphide, cadmium telluride, and gallium arsenide. Semiconductor junctions promising for future optoelectronic devices, including solar cells and electroluminescent displays. Resistivities of zinc selenide layers deposited by evaporation or chemical vapor deposition too high to form practical heterojunctions.

Gunn diodes and devices (bibliography for 1978-1980)

NASA Technical Reports Server (NTRS)

Yelenskiy, Y. G.; Kosov, A. S.; Strukov, I. A.

1981-01-01

A listing of about 500 works from Soviet and foreign scientific literature on Gunn diodes and devices based on them is presented. The bibliography includes publications in which various questions pertinent to all (or several) types of semiconductor instruments in the superhigh frequency range are mentioned. A subject index is included.

High efficiency low cost thin film silicon solar cell design and method for making

DOEpatents

Sopori, B.L.

1999-04-27

A semiconductor device is described having a substrate, a conductive intermediate layer deposited onto said substrate, wherein the intermediate layer serves as a back electrode, an optical reflector, and an interface for impurity gettering, and a semiconductor layer deposited onto said intermediate layer, wherein the semiconductor layer has a grain size at least as large as the layer thickness, and preferably about ten times the layer thickness. The device is formed by depositing a metal layer on a substrate, depositing a semiconductive material on the metal-coated substrate to produce a composite structure, and then optically processing the composite structure by illuminating it with infrared electromagnetic radiation according to a unique time-energy profile that first produces pits in the backside surface of the semiconductor material, then produces a thin, highly reflective, low resistivity alloy layer over the entire area of the interface between the semiconductor material and the metal layer, and finally produces a grain-enhanced semiconductor layer. The time-energy profile includes increasing the energy to a first energy level to initiate pit formation and create the desired pit size and density, then ramping up to a second energy level in which the entire device is heated to produce an interfacial melt, and finally reducing the energy to a third energy level and holding for a period of time to allow enhancement in the grain size of the semiconductor layer. 9 figs.

Voltage-matched, monolithic, multi-band-gap devices

DOEpatents

Wanlass, Mark W.; Mascarenhas, Angelo

2006-08-22

Monolithic, tandem, photonic cells include at least a first semiconductor layer and a second semiconductor layer, wherein each semiconductor layer includes an n-type region, a p-type region, and a given band-gap energy. Formed within each semiconductor layer is a sting of electrically connected photonic sub-cells. By carefully selecting the numbers of photonic sub-cells in the first and second layer photonic sub-cell string(s), and by carefully selecting the manner in which the sub-cells in a first and second layer photonic sub-cell string(s) are electrically connected, each of the first and second layer sub-cell strings may be made to achieve one or more substantially identical electrical characteristics.

Voltage-Matched, Monolithic, Multi-Band-Gap Devices

DOEpatents

Wanlass, M. W.; Mascarenhas, A.

2006-08-22

Monolithic, tandem, photonic cells include at least a first semiconductor layer and a second semiconductor layer, wherein each semiconductor layer includes an n-type region, a p-type region, and a given band-gap energy. Formed within each semiconductor layer is a string of electrically connected photonic sub-cells. By carefully selecting the numbers of photonic sub-cells in the first and second layer photonic sub-cell string(s), and by carefully selecting the manner in which the sub-cells in a first and second layer photonic sub-cell string(s) are electrically connected, each of the first and second layer sub-cell strings may be made to achieve one or more substantially identical electrical characteristics.

Photoelectrochemical devices for solar water splitting - materials and challenges.

PubMed

Jiang, Chaoran; Moniz, Savio J A; Wang, Aiqin; Zhang, Tao; Tang, Junwang

2017-07-31

It is widely accepted within the community that to achieve a sustainable society with an energy mix primarily based on solar energy we need an efficient strategy to convert and store sunlight into chemical fuels. A photoelectrochemical (PEC) device would therefore play a key role in offering the possibility of carbon-neutral solar fuel production through artificial photosynthesis. The past five years have seen a surge in the development of promising semiconductor materials. In addition, low-cost earth-abundant co-catalysts are ubiquitous in their employment in water splitting cells due to the sluggish kinetics of the oxygen evolution reaction (OER). This review commences with a fundamental understanding of semiconductor properties and charge transfer processes in a PEC device. We then describe various configurations of PEC devices, including single light-absorber cells and multi light-absorber devices (PEC, PV-PEC and PV/electrolyser tandem cell). Recent progress on both photoelectrode materials (light absorbers) and electrocatalysts is summarized, and important factors which dominate photoelectrode performance, including light absorption, charge separation and transport, surface chemical reaction rate and the stability of the photoanode, are discussed. Controlling semiconductor properties is the primary concern in developing materials for solar water splitting. Accordingly, strategies to address the challenges for materials development in this area, such as the adoption of smart architectures, innovative device configuration design, co-catalyst loading, and surface protection layer deposition, are outlined throughout the text, to deliver a highly efficient and stable PEC device for water splitting.

Reliability Prediction Models for Discrete Semiconductor Devices

DTIC Science & Technology

1988-07-01

influence failure rate were device construction, semiconductor material, junction temperature, electrical stress, circuit application., a plication...found to influence failure rate were device construction, semiconductor material, junction temperature, electrical stress, circuit application...MFA Airbreathlng 14issile, Flight MFF Missile, Free Flight ML Missile, Launch MMIC Monolithic Microwave Integrated Circuits MOS Metal-Oxide

Reproducible Growth of High-Quality Cubic-SiC Layers

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Powell, J. Anthony

2004-01-01

Semiconductor electronic devices and circuits based on silicon carbide (SiC) are being developed for use in high-temperature, high-power, and/or high-radiation conditions under which devices made from conventional semiconductors cannot adequately perform. The ability of SiC-based devices to function under such extreme conditions is expected to enable significant improvements in a variety of applications and systems. These include greatly improved high-voltage switching for saving energy in public electric power distribution and electric motor drives; more powerful microwave electronic circuits for radar and communications; and sensors and controls for cleaner-burning, more fuel-efficient jet aircraft and automobile engines.

Better Ohmic Contacts For InP Semiconductor Devices

NASA Technical Reports Server (NTRS)

Weizer, Victor G.; Fatemi, Navid S.

1995-01-01

Four design modifications enable fabrication of improved ohmic contacts on InP-based semiconductor devices. First modification consists of insertion of layer of gold phosphide between n-doped InP and metal or other overlayer of contact material. Second, includes first modification plus use of particular metal overlayer to achieve very low contact resistivities. Third, also involves deposition of Au(2)P(3) interlayer; in addition, refractory metal (W or Ta) deposited to form contact overlayer. In fourth, contact layer of Auln alloy deposited directly on InP. Improved contacts exhibit low electrical resistances and fabricated without exposing devices to destructive predeposition or postdeposition treatments.

Growth and device processing of hexagonal boron nitride epilayers for thermal neutron and deep ultraviolet detectors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Doan, T. C.; Li, J.; Lin, J. Y.

2016-07-15

Solid-state neutron detectors with high performance are highly sought after for the detection of fissile materials. However, direct-conversion neutron detectors based on semiconductors with a measureable efficiency have not been realized. We report here the first successful demonstration of a direct-conversion semiconductor neutron detector with an overall detection efficiency for thermal neutrons of 4% and a charge collection efficiency as high as 83%. The detector is based on a 2.7 μm thick {sup 10}B-enriched hexagonal boron nitride (h-BN) epitaxial layer. The results represent a significant step towards the realization of practical neutron detectors based on h-BN epilayers. Neutron detectors basedmore » on h-BN are expected to possess all the advantages of semiconductor devices including wafer-scale processing, compact size, light weight, and ability to integrate with other functional devices.« less

Nonlinear terahertz devices utilizing semiconducting plasmonic metamaterials

DOE PAGES

Seren, Huseyin R.; Zhang, Jingdi; Keiser, George R.; ...

2016-01-26

The development of responsive metamaterials has enabled the realization of compact tunable photonic devices capable of manipulating the amplitude, polarization, wave vector and frequency of light. Integration of semiconductors into the active regions of metallic resonators is a proven approach for creating nonlinear metamaterials through optoelectronic control of the semiconductor carrier density. Metal-free subwavelength resonant semiconductor structures offer an alternative approach to create dynamic metamaterials. We present InAs plasmonic disk arrays as a viable resonant metamaterial at terahertz frequencies. Importantly, InAs plasmonic disks exhibit a strong nonlinear response arising from electric field-induced intervalley scattering, resulting in a reduced carrier mobilitymore » thereby damping the plasmonic response. here, we demonstrate nonlinear perfect absorbers configured as either optical limiters or saturable absorbers, including flexible nonlinear absorbers achieved by transferring the disks to polyimide films. Nonlinear plasmonic metamaterials show potential for use in ultrafast terahertz (THz) optics and for passive protection of sensitive electromagnetic devices.« less

Nonlinear terahertz devices utilizing semiconducting plasmonic metamaterials

DOE Office of Scientific and Technical Information (OSTI.GOV)

Seren, Huseyin R.; Zhang, Jingdi; Keiser, George R.

The development of responsive metamaterials has enabled the realization of compact tunable photonic devices capable of manipulating the amplitude, polarization, wave vector and frequency of light. Integration of semiconductors into the active regions of metallic resonators is a proven approach for creating nonlinear metamaterials through optoelectronic control of the semiconductor carrier density. Metal-free subwavelength resonant semiconductor structures offer an alternative approach to create dynamic metamaterials. We present InAs plasmonic disk arrays as a viable resonant metamaterial at terahertz frequencies. Importantly, InAs plasmonic disks exhibit a strong nonlinear response arising from electric field-induced intervalley scattering, resulting in a reduced carrier mobilitymore » thereby damping the plasmonic response. here, we demonstrate nonlinear perfect absorbers configured as either optical limiters or saturable absorbers, including flexible nonlinear absorbers achieved by transferring the disks to polyimide films. Nonlinear plasmonic metamaterials show potential for use in ultrafast terahertz (THz) optics and for passive protection of sensitive electromagnetic devices.« less

The impact of the Fermi-Dirac distribution on charge injection at metal/organic interfaces.

PubMed

Wang, Z B; Helander, M G; Greiner, M T; Lu, Z H

2010-05-07

The Fermi level has historically been assumed to be the only energy-level from which carriers are injected at metal/semiconductor interfaces. In traditional semiconductor device physics, this approximation is reasonable as the thermal distribution of delocalized states in the semiconductor tends to dominate device characteristics. However, in the case of organic semiconductors the weak intermolecular interactions results in highly localized electronic states, such that the thermal distribution of carriers in the metal may also influence device characteristics. In this work we demonstrate that the Fermi-Dirac distribution of carriers in the metal has a much more significant impact on charge injection at metal/organic interfaces than has previously been assumed. An injection model which includes the effect of the Fermi-Dirac electron distribution was proposed. This model has been tested against experimental data and was found to provide a better physical description of charge injection. This finding indicates that the thermal distribution of electronic states in the metal should, in general, be considered in the study of metal/organic interfaces.

Lattice matched crystalline substrates for cubic nitride semiconductor growth

DOEpatents

Norman, Andrew G; Ptak, Aaron J; McMahon, William E

2015-02-24

Disclosed embodiments include methods of fabricating a semiconductor layer or device and devices fabricated thereby. The methods include, but are not limited to, providing a substrate having a cubic crystalline surface with a known lattice parameter and growing a cubic crystalline group III-nitride alloy layer on the cubic crystalline substrate by coincident site lattice matched epitaxy. The cubic crystalline group III-nitride alloy may be prepared to have a lattice parameter (a') that is related to the lattice parameter of the substrate (a). The group III-nitride alloy may be a cubic crystalline In.sub.xGa.sub.yAl.sub.1-x-yN alloy. The lattice parameter of the In.sub.xGa.sub.yAl.sub.1-x-yN or other group III-nitride alloy may be related to the substrate lattice parameter by (a')= 2(a) or (a')=(a)/ 2. The semiconductor alloy may be prepared to have a selected band gap.

Complex-envelope alternating-direction-implicit FDTD method for simulating active photonic devices with semiconductor/solid-state media.

PubMed

Singh, Gurpreet; Ravi, Koustuban; Wang, Qian; Ho, Seng-Tiong

2012-06-15

A complex-envelope (CE) alternating-direction-implicit (ADI) finite-difference time-domain (FDTD) approach to treat light-matter interaction self-consistently with electromagnetic field evolution for efficient simulations of active photonic devices is presented for the first time (to our best knowledge). The active medium (AM) is modeled using an efficient multilevel system of carrier rate equations to yield the correct carrier distributions, suitable for modeling semiconductor/solid-state media accurately. To include the AM in the CE-ADI-FDTD method, a first-order differential system involving CE fields in the AM is first set up. The system matrix that includes AM parameters is then split into two time-dependent submatrices that are then used in an efficient ADI splitting formula. The proposed CE-ADI-FDTD approach with AM takes 22% of the time as the approach of the corresponding explicit FDTD, as validated by semiconductor microdisk laser simulations.

Visible-wavelength semiconductor lasers and arrays

DOEpatents

Schneider, Jr., Richard P.; Crawford, Mary H.

1996-01-01

A visible semiconductor laser. The visible semiconductor laser includes an InAlGaP active region surrounded by one or more AlGaAs layers on each side, with carbon as the sole p-type dopant. Embodiments of the invention are provided as vertical-cavity surface-emitting lasers (VCSELs) and as edge-emitting lasers (EELs). One or more transition layers comprised of a substantially indium-free semiconductor alloy such as AlAsP, AlGaAsP, or the like may be provided between the InAlGaP active region and the AlGaAS DBR mirrors or confinement layers to improve carrier injection and device efficiency by reducing any band offsets. Visible VCSEL devices fabricated according to the invention with a one-wavelength-thick (1.lambda.) optical cavity operate continuous-wave (cw) with lasing output powers up to 8 mW, and a peak power conversion efficiency of up to 11%.

Radiation hardening of metal-oxide semi-conductor (MOS) devices by boron

NASA Technical Reports Server (NTRS)

Danchenko, V.

1974-01-01

Technique using boron effectively protects metal-oxide semiconductor devices from ionizing radiation without using shielding materials. Boron is introduced into insulating gate oxide layer at semiconductor-insulator interface.

Coincident site lattice-matched growth of semiconductors on substrates using compliant buffer layers

DOEpatents

Norman, Andrew

2016-08-23

A method of producing semiconductor materials and devices that incorporate the semiconductor materials are provided. In particular, a method is provided of producing a semiconductor material, such as a III-V semiconductor, on a silicon substrate using a compliant buffer layer, and devices such as photovoltaic cells that incorporate the semiconductor materials. The compliant buffer material and semiconductor materials may be deposited using coincident site lattice-matching epitaxy, resulting in a close degree of lattice matching between the substrate material and deposited material for a wide variety of material compositions. The coincident site lattice matching epitaxial process, as well as the use of a ductile buffer material, reduce the internal stresses and associated crystal defects within the deposited semiconductor materials fabricated using the disclosed method. As a result, the semiconductor devices provided herein possess enhanced performance characteristics due to a relatively low density of crystal defects.

Graphene-on-semiconductor substrates for analog electronics

DOEpatents

Lagally, Max G.; Cavallo, Francesca; Rojas-Delgado, Richard

2016-04-26

Electrically conductive material structures, analog electronic devices incorporating the structures and methods for making the structures are provided. The structures include a layer of graphene on a semiconductor substrate. The graphene layer and the substrate are separated by an interfacial region that promotes transfer of charge carriers from the surface of the substrate to the graphene.

Multi-junction solar cell device

DOEpatents

Friedman, Daniel J.; Geisz, John F.

2007-12-18

A multi-junction solar cell device (10) is provided. The multi-junction solar cell device (10) comprises either two or three active solar cells connected in series in a monolithic structure. The multi-junction device (10) comprises a bottom active cell (20) having a single-crystal silicon substrate base and an emitter layer (23). The multi-junction device (10) further comprises one or two subsequent active cells each having a base layer (32) and an emitter layer (23) with interconnecting tunnel junctions between each active cell. At least one layer that forms each of the top and middle active cells is composed of a single-crystal III-V semiconductor alloy that is substantially lattice-matched to the silicon substrate (22). The polarity of the active p-n junction cells is either p-on-n or n-on-p. The present invention further includes a method for substantially lattice matching single-crystal III-V semiconductor layers with the silicon substrate (22) by including boron and/or nitrogen in the chemical structure of these layers.

Low-voltage organic electronics based on a gate-tunable injection barrier in vertical graphene-organic semiconductor heterostructures.

PubMed

Hlaing, Htay; Kim, Chang-Hyun; Carta, Fabio; Nam, Chang-Yong; Barton, Rob A; Petrone, Nicholas; Hone, James; Kymissis, Ioannis

2015-01-14

The vertical integration of graphene with inorganic semiconductors, oxide semiconductors, and newly emerging layered materials has recently been demonstrated as a promising route toward novel electronic and optoelectronic devices. Here, we report organic thin film transistors based on vertical heterojunctions of graphene and organic semiconductors. In these thin heterostructure devices, current modulation is accomplished by tuning of the injection barriers at the semiconductor/graphene interface with the application of a gate voltage. N-channel devices fabricated with a thin layer of C60 show a room temperature on/off ratio >10(4) and current density of up to 44 mAcm(-2). Because of the ultrashort channel intrinsic to the vertical structure, the device is fully operational at a driving voltage of 200 mV. A complementary p-channel device is also investigated, and a logic inverter based on two complementary transistors is demonstrated. The vertical integration of graphene with organic semiconductors via simple, scalable, and low-temperature fabrication processes opens up new opportunities to realize flexible, transparent organic electronic, and optoelectronic devices.

Photoemission-based microelectronic devices

PubMed Central

Forati, Ebrahim; Dill, Tyler J.; Tao, Andrea R.; Sievenpiper, Dan

2016-01-01

The vast majority of modern microelectronic devices rely on carriers within semiconductors due to their integrability. Therefore, the performance of these devices is limited due to natural semiconductor properties such as band gap and electron velocity. Replacing the semiconductor channel in conventional microelectronic devices with a gas or vacuum channel may scale their speed, wavelength and power beyond what is available today. However, liberating electrons into gas/vacuum in a practical microelectronic device is quite challenging. It often requires heating, applying high voltages, or using lasers with short wavelengths or high powers. Here, we show that the interaction between an engineered resonant surface and a low-power infrared laser can cause enough photoemission via electron tunnelling to implement feasible microelectronic devices such as transistors, switches and modulators. The proposed photoemission-based devices benefit from the advantages of gas-plasma/vacuum electronic devices while preserving the integrability of semiconductor-based devices. PMID:27811946

Control of GaAs Microwave Schottky Diode Electrical Characteristics by Contact Geometry: The Gap Diode.

DTIC Science & Technology

1982-05-01

semiconductor Schottky-barrier contacts are used in many semiconductor devices, including switches, rectifiers, varactors , IMPATTs, mixer and detector...ionic materials such as most of the II-VI compound semiconductors (e.g. ZnS and ZnO) and the transition-metal oxides , the barrier height is strongly...the alloying process described above is nonuniformity, due to the incomplete removal of residual surface oxides prior to the evaporation of the metal

Boron, bismuth co-doping of gallium arsenide and other compounds for photonic and heterojunction bipolar transistor devices

DOEpatents

Mascarenhas, Angelo

2015-07-07

Isoelectronic co-doping of semiconductor compounds and alloys with acceptors and deep donors is sued to decrease bandgap, to increase concentration of the dopant constituents in the resulting alloys, and to increase carrier mobilities lifetimes. For example, Group III-V compounds and alloys, such as GaAs and GaP, are isoelectronically co-doped with, for example, B and Bi, to customize solar cells, and other semiconductor devices. Isoelectronically co-doped Group II-VI compounds and alloys are also included.

Optical XOR gate

DOEpatents

Vawter, G. Allen

2013-11-12

An optical XOR gate is formed as a photonic integrated circuit (PIC) from two sets of optical waveguide devices on a substrate, with each set of the optical waveguide devices including an electroabsorption modulator electrically connected in series with a waveguide photodetector. The optical XOR gate utilizes two digital optical inputs to generate an XOR function digital optical output. The optical XOR gate can be formed from III-V compound semiconductor layers which are epitaxially deposited on a III-V compound semiconductor substrate, and operates at a wavelength in the range of 0.8-2.0 .mu.m.

System for characterizing semiconductor materials and photovoltaic devices through calibration

DOEpatents

Sopori, Bhushan L.; Allen, Larry C.; Marshall, Craig; Murphy, Robert C.; Marshall, Todd

1998-01-01

A method and apparatus for measuring characteristics of a piece of material, typically semiconductor materials including photovoltaic devices. The characteristics may include dislocation defect density, grain boundaries, reflectance, external LBIC, internal LBIC, and minority carrier diffusion length. The apparatus includes a light source, an integrating sphere, and a detector communicating with a computer. The measurement or calculation of the characteristics is calibrated to provide accurate, absolute values. The calibration is performed by substituting a standard sample for the piece of material, the sample having a known quantity of one or more of the relevant characteristics. The quantity measured by the system of the relevant characteristic is compared to the known quantity and a calibration constant is created thereby.

System for characterizing semiconductor materials and photovoltaic devices through calibration

DOEpatents

Sopori, B.L.; Allen, L.C.; Marshall, C.; Murphy, R.C.; Marshall, T.

1998-05-26

A method and apparatus are disclosed for measuring characteristics of a piece of material, typically semiconductor materials including photovoltaic devices. The characteristics may include dislocation defect density, grain boundaries, reflectance, external LBIC, internal LBIC, and minority carrier diffusion length. The apparatus includes a light source, an integrating sphere, and a detector communicating with a computer. The measurement or calculation of the characteristics is calibrated to provide accurate, absolute values. The calibration is performed by substituting a standard sample for the piece of material, the sample having a known quantity of one or more of the relevant characteristics. The quantity measured by the system of the relevant characteristic is compared to the known quantity and a calibration constant is created thereby. 44 figs.

Introduction to Semiconductor Devices

NASA Astrophysics Data System (ADS)

Brennan, Kevin F.

2005-03-01

This volume offers a solid foundation for understanding the most important devices used in the hottest areas of electronic engineering today, from semiconductor fundamentals to state-of-the-art semiconductor devices in the telecommunications and computing industries. Kevin Brennan describes future approaches to computing hardware and RF power amplifiers, and explains how emerging trends and system demands of computing and telecommunications systems influence the choice, design and operation of semiconductor devices. In addition, he covers MODFETs and MOSFETs, short channel effects, and the challenges faced by continuing miniaturization. His book is both an excellent senior/graduate text and a valuable reference for practicing engineers and researchers.

Active pixel sensor array with multiresolution readout

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Kemeny, Sabrina E. (Inventor); Pain, Bedabrata (Inventor)

1999-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. The imaging device can also include an electronic shutter formed on the substrate adjacent the photogate, and/or a storage section to allow for simultaneous integration. In addition, the imaging device can include a multiresolution imaging circuit to provide images of varying resolution. The multiresolution circuit could also be employed in an array where the photosensitive portion of each pixel cell is a photodiode. This latter embodiment could further be modified to facilitate low light imaging.

Visible scintillation photodetector device incorporating chalcopyrite semiconductor crystals

DOE Office of Scientific and Technical Information (OSTI.GOV)

Stowe, Ashley C.; Burger, Arnold

2017-04-04

A photodetector device, including: a scintillator material operable for receiving incident radiation and emitting photons in response; a photodetector material coupled to the scintillator material operable for receiving the photons emitted by the scintillator material and generating a current in response, wherein the photodetector material includes a chalcopyrite semiconductor crystal; and a circuit coupled to the photodetector material operable for characterizing the incident radiation based on the current generated by the photodetector material. Optionally, the scintillator material includes a gamma scintillator material and the incident radiation received includes gamma rays. Optionally, the photodetector material is further operable for receiving thermalmore » neutrons and generating a current in response. The circuit is further operable for characterizing the thermal neutrons based on the current generated by the photodetector material.« less

MBE Growth of Ferromagnetic Metal/Compound Semiconductor Heterostructures for Spintronics

ScienceCinema

Palmstrom, Chris [University of California, Santa Barbara, California, United States

2017-12-09

Electrical transport and spin-dependent transport across ferromagnet/semiconductor contacts is crucial in the realization of spintronic devices. Interfacial reactions, the formation of non-magnetic interlayers, and conductivity mismatch have been attributed to low spin injection efficiency. MBE has been used to grow epitaxial ferromagnetic metal/GA(1-x)AL(x)As heterostructures with the aim of controlling the interfacial structural, electronic, and magnetic properties. In situ, STM, XPS, RHEED and LEED, and ex situ XRD, RBS, TEM, magnetotransport, and magnetic characterization have been used to develop ferromagnetic elemental and metallic compound/compound semiconductor tunneling contacts for spin injection. The efficiency of the spin polarized current injected from the ferromagnetic contact has been determined by measuring the electroluminescence polarization of the light emitted from/GA(1-x)AL(x)As light-emitting diodes as a function of applied magnetic field and temperature. Interfacial reactions during MBE growth and post-growth anneal, as well as the semiconductor device band structure, were found to have a dramatic influence on the measured spin injection, including sign reversal. Lateral spin-transport devices with epitaxial ferromagnetic metal source and drain tunnel barrier contacts have been fabricated with the demonstration of electrical detection and the bias dependence of spin-polarized electron injection and accumulation at the contacts. This talk emphasizes the progress and achievements in the epitaxial growth of a number of ferromagnetic compounds/III-V semiconductor heterostructures and the progress towards spintronic devices.

Preface: phys. stat. sol. (c) 1/8

NASA Astrophysics Data System (ADS)

Amann, Markus C.

2004-07-01

In this special issue of physica status solidi (c) we have included 10 invited papers reviewing the current state-of-the-art and the progress achieved in materials science, semiconductor theory, novel physical mechanisms and advanced device concepts in the field of nanostructured electronic and optoelectronic semiconductor devices. All of these papers were written by previous members of the Collaborative Research Centre 348 Nanometer-Halbleiterbauelemente: Grundlagen - Konzepte - Realisierungen (Nanometer Semiconductor Devices: Fundamentals - Concepts - Realisations), which was funded by the German Research Foundation (Deutsche Forschungsgemeinschaft, DFG) during the period from 1991 to 2003. In these twelve years, the researchers in this programme have carried an intense activity directed towards two main objectives. First of all, Fundamentals and Concepts of nanostructure devices and their technology were explored theoretically and experimentally including the effects of low-dimensional structures on carrier transport, optical properties and spin, as well as the enabling epitaxial and nanostructure technologies such as the cleaved-edge-overgrowth technique and the self-assembled growth of quantum dots. A second field of interest was focused towards the design and development of Novel Semiconductor Devices exploiting nanostructure technology. This comprises optical detectors and memories with nanometer lateral dimensions, microwave detectors and sources up to the 300 GHz regime, innovative tunable and surface-emitting semiconductor lasers for the wavelength range 0.9 to 2 m, and nitride-based resonant tunnelling diodes. Some of the device innovations have meanwhile become commercial products proving also the practical importance of this research area. The articles in this special issue relate to the projects of the last three-years' funding period from 2000 to 2003 and are organized along these two We would like to thank the numerous reviewers for their valuable comments and the editorial staff of physica status solidi (c) for their extremely helpful support. The funding by the German Research Foundation over the full project time and the continued monitoring and advice by its representatives Dr. Klaus Wehrberger and Dr. Peter Heil are gratefully acknowledged by all previous members and co-workers of this Collaborative Research Centre.

Energy storage device with large charge separation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Holme, Timothy P.; Prinz, Friedrich B.; Iancu, Andrei T.

High density energy storage in semiconductor devices is provided. There are two main aspects of the present approach. The first aspect is to provide high density energy storage in semiconductor devices based on formation of a plasma in the semiconductor. The second aspect is to provide high density energy storage based on charge separation in a p-n junction.

Energy storage device with large charge separation

DOEpatents

Holme, Timothy P.; Prinz, Friedrich B.; Iancu, Andrei

2016-04-12

High density energy storage in semiconductor devices is provided. There are two main aspects of the present approach. The first aspect is to provide high density energy storage in semiconductor devices based on formation of a plasma in the semiconductor. The second aspect is to provide high density energy storage based on charge separation in a p-n junction.

Semiconductor systems utilizing materials that form rectifying junctions in both N and P-type doping regions, whether metallurgically or field induced, and methods of use

DOEpatents

Welch, James D.

2000-01-01

Disclosed are semiconductor systems, such as integrated circuits utilizing Schotky barrier and/or diffused junction technology, which semiconductor systems incorporate material(s) that form rectifying junctions in both metallurgically and/or field induced N and P-type doping regions, and methods of their use. Disclosed are Schottky barrier based inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems and which can be operated as modulators, N and P-channel MOSFETS and CMOS formed therefrom, and (MOS) gate voltage controlled rectification direction and gate voltage controlled switching devices, and use of such material(s) to block parasitic current flow pathways. Simple demonstrative five mask fabrication procedures for inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems are also presented.

Electra-optical device including a nitrogen containing electrolyte

DOEpatents

Bates, J.B.; Dudney, N.J.; Gruzalski, G.R.; Luck, C.F.

1995-10-03

Described is a thin-film battery, especially a thin-film microbattery, and a method for making same having application as a backup or primary integrated power source for electronic devices. The battery includes a novel electrolyte which is electrochemically stable and does not react with the lithium anode and a novel vanadium oxide cathode. Configured as a microbattery, the battery can be fabricated directly onto a semiconductor chip, onto the semiconductor die or onto any portion of the chip carrier. The battery can be fabricated to any specified size or shape to meet the requirements of a particular application. The battery is fabricated of solid state materials and is capable of operation between {minus}15 C and 150 C.

Sensor development at the semiconductor laboratory of the Max-Planck-Society

NASA Astrophysics Data System (ADS)

Bähr, A.; Lechner, P.; Ninkovic, J.

2017-12-01

For more than twenty years the semiconductor laboratory of the Max-Planck Society (MPG-HLL) is developing high-performing, specialised, scientific silicon sensors including the integration of amplifying electronics on the sensor chip. This paper summarises the actual status of these devices like pnCCDs and DePFET Active Pixel Sensors and their applications.

Discrete Semiconductor Device Reliability

DTIC Science & Technology

1988-03-25

array or alphanumeric display. "--" indicates unknown diode count. Voc Open circuit voltage for photovoltaic modules . indicates unknown. Isc Short... circuit current for photovoltaic modules . "--" indicates unknown. Number Tested Quantity of parts under the described test or field conditions for that...information pertaining to electronic systems and parts used therein. The present scope includes integrated circuits , hybrids, discrete semiconductors

Development of silicon carbide semiconductor devices for high temperature applications

NASA Technical Reports Server (NTRS)

Matus, Lawrence G.; Powell, J. Anthony; Petit, Jeremy B.

1991-01-01

The semiconducting properties of electronic grade silicon carbide crystals, such as wide energy bandgap, make it particularly attractive for high temperature applications. Applications for high temperature electronic devices include instrumentation for engines under development, engine control and condition monitoring systems, and power conditioning and control systems for space platforms and satellites. Discrete prototype SiC devices were fabricated and tested at elevated temperatures. Grown p-n junction diodes demonstrated very good rectification characteristics at 870 K. A depletion-mode metal-oxide-semiconductor field-effect transistor was also successfully fabricated and tested at 770 K. While optimization of SiC fabrication processes remain, it is believed that SiC is an enabling high temperature electronic technology.

Dynamic detection of spin accumulation in ferromagnet-semiconductor devices by ferromagnetic resonance (Conference Presentation)

NASA Astrophysics Data System (ADS)

Crowell, Paul A.; Liu, Changjiang; Patel, Sahil; Peterson, Tim; Geppert, Chad C.; Christie, Kevin; Stecklein, Gordon; Palmstrøm, Chris J.

2016-10-01

A distinguishing feature of spin accumulation in ferromagnet-semiconductor devices is its precession in a magnetic field. This is the basis for detection techniques such as the Hanle effect, but these approaches become ineffective as the spin lifetime in the semiconductor decreases. For this reason, no electrical Hanle measurement has been demonstrated in GaAs at room temperature. We show here that by forcing the magnetization in the ferromagnet to precess at resonance instead of relying only on the Larmor precession of the spin accumulation in the semiconductor, an electrically generated spin accumulation can be detected up to 300 K. The injection bias and temperature dependence of the measured spin signal agree with those obtained using traditional methods. We further show that this new approach enables a measurement of short spin lifetimes (< 100 psec), a regime that is not accessible in semiconductors using traditional Hanle techniques. The measurements were carried out on epitaxial Heusler alloy (Co2FeSi or Co2MnSi)/n-GaAs heterostructures. Lateral spin valve devices were fabricated by electron beam and photolithography. We compare measurements carried out by the new FMR-based technique with traditional non-local and three-terminal Hanle measurements. A full model appropriate for the measurements will be introduced, and a broader discussion in the context of spin pumping experimenments will be included in the talk. The new technique provides a simple and powerful means for detecting spin accumulation at high temperatures. Reference: C. Liu, S. J. Patel, T. A. Peterson, C. C. Geppert, K. D. Christie, C. J. Palmstrøm, and P. A. Crowell, "Dynamic detection of electron spin accumulation in ferromagnet-semiconductor devices by ferromagnetic resonance," Nature Communications 7, 10296 (2016). http://dx.doi.org/10.1038/ncomms10296

Macroporous Semiconductors

PubMed Central

Föll, Helmut; Leisner, Malte; Cojocaru, Ala; Carstensen, Jürgen

2010-01-01

Pores in single crystalline semiconductors come in many forms (e.g., pore sizes from 2 nm to > 10 µm; morphologies from perfect pore crystal to fractal) and exhibit many unique properties directly or as nanocompounds if the pores are filled. The various kinds of pores obtained in semiconductors like Ge, Si, III-V, and II-VI compound semiconductors are systematically reviewed, emphasizing macropores. Essentials of pore formation mechanisms will be discussed, focusing on differences and some open questions but in particular on common properties. Possible applications of porous semiconductors, including for example high explosives, high efficiency electrodes for Li ion batteries, drug delivery systems, solar cells, thermoelectric elements and many novel electronic, optical or sensor devices, will be introduced and discussed.

Printable semiconductor structures and related methods of making and assembling

DOEpatents

Nuzzo, Ralph G.; Rogers, John A.; Menard, Etienne; Lee, Keon Jae; Khang; , Dahl-Young; Sun, Yugang; Meitl, Matthew; Zhu, Zhengtao; Ko, Heung Cho; Mack, Shawn

2013-03-12

The present invention provides a high yield pathway for the fabrication, transfer and assembly of high quality printable semiconductor elements having selected physical dimensions, shapes, compositions and spatial orientations. The compositions and methods of the present invention provide high precision registered transfer and integration of arrays of microsized and/or nanosized semiconductor structures onto substrates, including large area substrates and/or flexible substrates. In addition, the present invention provides methods of making printable semiconductor elements from low cost bulk materials, such as bulk silicon wafers, and smart-materials processing strategies that enable a versatile and commercially attractive printing-based fabrication platform for making a broad range of functional semiconductor devices.

Printable semiconductor structures and related methods of making and assembling

DOEpatents

Nuzzo, Ralph G [Champaign, IL; Rogers, John A [Champaign, IL; Menard, Etienne [Durham, NC; Lee, Keon Jae [Tokyo, JP; Khang, Dahl-Young [Urbana, IL; Sun, Yugang [Westmont, IL; Meitl, Matthew [Raleigh, NC; Zhu, Zhengtao [Rapid City, SD; Ko, Heung Cho [Urbana, IL; Mack, Shawn [Goleta, CA

2011-10-18

The present invention provides a high yield pathway for the fabrication, transfer and assembly of high quality printable semiconductor elements having selected physical dimensions, shapes, compositions and spatial orientations. The compositions and methods of the present invention provide high precision registered transfer and integration of arrays of microsized and/or nanosized semiconductor structures onto substrates, including large area substrates and/or flexible substrates. In addition, the present invention provides methods of making printable semiconductor elements from low cost bulk materials, such as bulk silicon wafers, and smart-materials processing strategies that enable a versatile and commercially attractive printing-based fabrication platform for making a broad range of functional semiconductor devices.

Printable semiconductor structures and related methods of making and assembling

DOEpatents

Nuzzo, Ralph G.; Rogers, John A.; Menard, Etienne; Lee, Keon Jae; Khang, Dahl-Young; Sun, Yugang; Meitl, Matthew; Zhu, Zhengtao; Ko, Heung Cho; Mack, Shawn

2010-09-21

The present invention provides a high yield pathway for the fabrication, transfer and assembly of high quality printable semiconductor elements having selected physical dimensions, shapes, compositions and spatial orientations. The compositions and methods of the present invention provide high precision registered transfer and integration of arrays of microsized and/or nanosized semiconductor structures onto substrates, including large area substrates and/or flexible substrates. In addition, the present invention provides methods of making printable semiconductor elements from low cost bulk materials, such as bulk silicon wafers, and smart-materials processing strategies that enable a versatile and commercially attractive printing-based fabrication platform for making a broad range of functional semiconductor devices.

Method for manufacturing compound semiconductor field-effect transistors with improved DC and high frequency performance

DOEpatents

Zolper, John C.; Sherwin, Marc E.; Baca, Albert G.

2000-01-01

A method for making compound semiconductor devices including the use of a p-type dopant is disclosed wherein the dopant is co-implanted with an n-type donor species at the time the n-channel is formed and a single anneal at moderate temperature is then performed. Also disclosed are devices manufactured using the method. In the preferred embodiment n-MESFETs and other similar field effect transistor devices are manufactured using C ions co-implanted with Si atoms in GaAs to form an n-channel. C exhibits a unique characteristic in the context of the invention in that it exhibits a low activation efficiency (typically, 50% or less) as a p-type dopant, and consequently, it acts to sharpen the Si n-channel by compensating Si donors in the region of the Si-channel tail, but does not contribute substantially to the acceptor concentration in the buried p region. As a result, the invention provides for improved field effect semiconductor and related devices with enhancement of both DC and high-frequency performance.

Monolithic integrated high-T.sub.c superconductor-semiconductor structure

NASA Technical Reports Server (NTRS)

Barfknecht, Andrew T. (Inventor); Garcia, Graham A. (Inventor); Russell, Stephen D. (Inventor); Burns, Michael J. (Inventor); de la Houssaye, Paul R. (Inventor); Clayton, Stanley R. (Inventor)

2000-01-01

A method for the fabrication of active semiconductor and high-temperature superconducting device of the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.

A new approximation of Fermi-Dirac integrals of order 1/2 for degenerate semiconductor devices

NASA Astrophysics Data System (ADS)

AlQurashi, Ahmed; Selvakumar, C. R.

2018-06-01

There had been tremendous growth in the field of Integrated circuits (ICs) in the past fifty years. Scaling laws mandated both lateral and vertical dimensions to be reduced and a steady increase in doping densities. Most of the modern semiconductor devices have invariably heavily doped regions where Fermi-Dirac Integrals are required. Several attempts have been devoted to developing analytical approximations for Fermi-Dirac Integrals since numerical computations of Fermi-Dirac Integrals are difficult to use in semiconductor devices, although there are several highly accurate tabulated functions available. Most of these analytical expressions are not sufficiently suitable to be employed in semiconductor device applications due to their poor accuracy, the requirement of complicated calculations, and difficulties in differentiating and integrating. A new approximation has been developed for the Fermi-Dirac integrals of the order 1/2 by using Prony's method and discussed in this paper. The approximation is accurate enough (Mean Absolute Error (MAE) = 0.38%) and easy enough to be used in semiconductor device equations. The new approximation of Fermi-Dirac Integrals is applied to a more generalized Einstein Relation which is an important relation in semiconductor devices.

Computational Modeling of Ultrafast Pulse Propagation in Nonlinear Optical Materials

NASA Technical Reports Server (NTRS)

Goorjian, Peter M.; Agrawal, Govind P.; Kwak, Dochan (Technical Monitor)

1996-01-01

There is an emerging technology of photonic (or optoelectronic) integrated circuits (PICs or OEICs). In PICs, optical and electronic components are grown together on the same chip. rib build such devices and subsystems, one needs to model the entire chip. Accurate computer modeling of electromagnetic wave propagation in semiconductors is necessary for the successful development of PICs. More specifically, these computer codes would enable the modeling of such devices, including their subsystems, such as semiconductor lasers and semiconductor amplifiers in which there is femtosecond pulse propagation. Here, the computer simulations are made by solving the full vector, nonlinear, Maxwell's equations, coupled with the semiconductor Bloch equations, without any approximations. The carrier is retained in the description of the optical pulse, (i.e. the envelope approximation is not made in the Maxwell's equations), and the rotating wave approximation is not made in the Bloch equations. These coupled equations are solved to simulate the propagation of femtosecond optical pulses in semiconductor materials. The simulations describe the dynamics of the optical pulses, as well as the interband and intraband.

A review of the semiconductor storage of television signals. Part 2: Applications 1975-1986

NASA Astrophysics Data System (ADS)

Riley, J. L.

1987-08-01

This is the second of two reports. In the first, the emerging semiconductor memory technology over the last two decades and some of the important operational characteristics of each ensuing generation of device are described together with the design philosophy for forming the devices into useful tools for the storage of television signals. The second of these reports describes some of the applications. These include improved television synchronizers, high quality PAL decoders, television noise reducers, film dirt concealment equipment and buffer storage for television picture processing equipment such as stills stores. The continuing developments in the technology promise still further increases of memory capacity and there is a proposal to build a mass semiconductor television picture sequence store, initially as a research tool.

Fabrication and performance of pressure-sensing device consisting of electret film and organic semiconductor

NASA Astrophysics Data System (ADS)

Kodzasa, Takehito; Nobeshima, Daiki; Kuribara, Kazunori; Uemura, Sei; Yoshida, Manabu

2017-04-01

We propose a new concept of a pressure-sensitive device that consists of an organic electret film and an organic semiconductor. This device exhibits high sensitivity and selectivity against various types of pressure. The sensing mechanism of this device originates from a modulation of the electric conductivity of the organic semiconductor film induced by the interaction between the semiconductor film and the charged electret film placed face to face. It is expected that a complicated sensor array will be fabricated by using a roll-to-roll manufacturing system, because this device can be prepared by an all-printing and simple lamination process without high-level positional adjustment for printing processes. This also shows that this device with a simple structure is suitable for application to a highly flexible device array sheet for an Internet of Things (IoT) or wearable sensing system.

Semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit [Knoxville, TN

2011-03-15

Novel articles and methods to fabricate the same resulting in flexible, large-area, triaxially textured, single-crystal or single-crystal-like, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Semiconductor-based, large-area, flexible, electronic devices on {110}<100> oriented substrates

DOEpatents

Goyal, Amit

2014-08-05

Novel articles and methods to fabricate the same resulting in flexible, oriented, semiconductor-based, electronic devices on {110}<100> textured substrates are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

[100] or [110] aligned, semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit

2015-03-24

Novel articles and methods to fabricate the same resulting in flexible, large-area, [100] or [110] textured, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Evaluation of semiconductor devices for Electric and Hybrid Vehicle (EHV) ac-drive applications, volume 1

NASA Technical Reports Server (NTRS)

Lee, F. C.; Chen, D. Y.; Jovanovic, M.; Hopkins, D. C.

1985-01-01

The results of evaluation of power semiconductor devices for electric hybrid vehicle ac drive applications are summarized. Three types of power devices are evaluated in the effort: high power bipolar or Darlington transistors, power MOSFETs, and asymmetric silicon control rectifiers (ASCR). The Bipolar transistors, including discrete device and Darlington devices, range from 100 A to 400 A and from 400 V to 900 V. These devices are currently used as key switching elements inverters for ac motor drive applications. Power MOSFETs, on the other hand, are much smaller in current rating. For the 400 V device, the current rating is limited to 25 A. For the main drive of an electric vehicle, device paralleling is normally needed to achieve practical power level. For other electric vehicle (EV) related applications such as battery charger circuit, however, MOSFET is advantageous to other devices because of drive circuit simplicity and high frequency capability. Asymmetrical SCR is basically a SCR device and needs commutation circuit for turn off. However, the device poses several advantages, i.e., low conduction drop and low cost.

Multi-layer MOS capacitor based polarization insensitive electro-optic intensity modulator.

PubMed

Qiu, Xiaoming; Ruan, Xiaoke; Li, Yanping; Zhang, Fan

2018-05-28

In this study, a multi-layer metal-oxide-semiconductor capacitor (MLMOSC) polarization insensitive modulator is proposed. The design is validated by numerical simulation with commercial software LUMERICAL SOLUTION. Based on the epsilon-near-zero (ENZ) effect of indium tin oxide (ITO), the device manages to uniformly modulate both the transverse electric (TE) and the transverse magnetic (TM) modes. With a 20μm-long double-layer metal-oxide-semiconductor capacitor (DLMOSC) polarization insensitive modulator, in which two metal-oxide-semiconductor (MOS) structures are formed by the n-doped Si/HfO 2 /ITO/HfO 2 / n-doped Si stack, the extinction ratios (ERs) of both the TE and the TM modes can be over 20dB. The polarization dependent losses of the device can be as low as 0.05dB for the "OFF" state and 0.004dB for the "ON" state. Within 1dB polarization dependent loss, the device can operate with over 20dB ERs at the S, C, and L bands. The polarization insensitive modulator offers various merits including ultra-compact size, broadband spectrum, and complementary metal oxide semiconductor (CMOS) compatibility.

Thick layered semiconductor devices with water top-gates: High on-off ratio field-effect transistors and aqueous sensors.

PubMed

Huang, Yuan; Sutter, Eli; Wu, Liangmei; Xu, Hong; Bao, Lihong; Gao, Hong-Jun; Zhou, Xingjiang; Sutter, Peter

2018-06-21

Layered semiconductors show promise as channel materials for field-effect transistors (FETs). Usually, such devices incorporate solid back or top gate dielectrics. Here, we explore de-ionized (DI) water as a solution top gate for field-effect switching of layered semiconductors including SnS2, MoS2, and black phosphorus. The DI water gate is easily fabricated, can sustain rapid bias changes, and its efficient coupling to layered materials provides high on-off current ratios, near-ideal sub-threshold swing, and enhanced short-channel behavior even for FETs with thick, bulk-like channels where such control is difficult to realize with conventional back-gating. Screening by the high-k solution gate eliminates hysteresis due to surface and interface trap states and substantially enhances the field-effect mobility. The onset of water electrolysis sets the ultimate limit to DI water gating at large negative gate bias. Measurements in this regime show promise for aqueous sensing, demonstrated here by the amperometric detection of glucose in aqueous solution. DI water gating of layered semiconductors can be harnessed in research on novel materials and devices, and it may with further development find broad applications in microelectronics and sensing.

Nanoionics-Based Switches for Radio-Frequency Applications

NASA Technical Reports Server (NTRS)

Nessel, James; Lee, Richard

2010-01-01

Nanoionics-based devices have shown promise as alternatives to microelectromechanical systems (MEMS) and semiconductor diode devices for switching radio-frequency (RF) signals in diverse systems. Examples of systems that utilize RF switches include phase shifters for electronically steerable phased-array antennas, multiplexers, cellular telephones and other radio transceivers, and other portable electronic devices. Semiconductor diode switches can operate at low potentials (about 1 to 3 V) and high speeds (switching times of the order of nanoseconds) but are characterized by significant insertion loss, high DC power consumption, low isolation, and generation of third-order harmonics and intermodulation distortion (IMD). MEMS-based switches feature low insertion loss (of the order of 0.2 dB), low DC power consumption (picowatts), high isolation (>30 dB), and low IMD, but contain moving parts, are not highly reliable, and must be operated at high actuation potentials (20 to 60 V) generated and applied by use of complex circuitry. In addition, fabrication of MEMS is complex, involving many processing steps. Nanoionics-based switches offer the superior RF performance and low power consumption of MEMS switches, without need for the high potentials and complex circuitry necessary for operation of MEMS switches. At the same time, nanoionics-based switches offer the high switching speed of semiconductor devices. Also, like semiconductor devices, nanoionics-based switches can be fabricated relatively inexpensively by use of conventional integrated-circuit fabrication techniques. More over, nanoionics-based switches have simple planar structures that can easily be integrated into RF power-distribution circuits.

High-voltage compatible, full-depleted CCD

DOEpatents

Holland, Stephen Edward

2007-09-18

A charge coupled device for detecting electromagnetic and particle radiation is described. The device includes a high-resistivity semiconductor substrate, buried channel regions, gate electrode circuitry, and amplifier circuitry. For good spatial resolution and high performance, especially when operated at high voltages with full or nearly full depletion of the substrate, the device can also include a guard ring positioned near channel regions, a biased channel stop, and a biased polysilicon electrode over the channel stop.

Method of forming through substrate vias (TSVs) and singulating and releasing die having the TSVs from a mechanical support substrate

DOEpatents

Okandan, Murat; Nielson, Gregory N

2014-12-09

Accessing a workpiece object in semiconductor processing is disclosed. The workpiece object includes a mechanical support substrate, a release layer over the mechanical support substrate, and an integrated circuit substrate coupled over the release layer. The integrated circuit substrate includes a device layer having semiconductor devices. The method also includes etching through-substrate via (TSV) openings through the integrated circuit substrate that have buried ends at or within the release layer including using the release layer as an etch stop. TSVs are formed by introducing one or more conductive materials into the TSV openings. A die singulation trench is etched at least substantially through the integrated circuit substrate around a perimeter of an integrated circuit die. The integrated circuit die is at least substantially released from the mechanical support substrate.

Development of UItra-Low Temperature Motor Controllers: Ultra Low Temperatures Evaluation and Characterization of Semiconductor Technologies For The Next Generation Space Telescope

NASA Technical Reports Server (NTRS)

Elbuluk, Malik E.

2003-01-01

Electronics designed for low temperature operation will result in more efficient systems than room temperature. This improvement is a result of better electronic, electrical, and thermal properties of materials at low temperatures. In particular, the performance of certain semiconductor devices improves with decreasing temperature down to ultra-low temperature (-273 'C). The Low Temperature Electronics Program at the NASA Glenn Research Center focuses on research and development of electrical components and systems suitable for applications in deep space missions. Research is being conducted on devices and systems for use down to liquid helium temperatures (-273 'C). Some of the components that are being characterized include semiconductor switching devices, resistors, magnetics, and capacitors. The work performed this summer has focused on the evaluation of silicon-, silicon-germanium- and gallium-Arsenide-based (GaAs) bipolar, MOS and CMOS discrete components and integrated circuits (ICs), from room temperature (23 'C) down to ultra low temperatures (-263 'C).

Photovoltaic healing of non-uniformities in semiconductor devices

DOEpatents

Karpov, Victor G.; Roussillon, Yann; Shvydka, Diana; Compaan, Alvin D.; Giolando, Dean M.

2006-08-29

A method of making a photovoltaic device using light energy and a solution to normalize electric potential variations in the device. A semiconductor layer having nonuniformities comprising areas of aberrant electric potential deviating from the electric potential of the top surface of the semiconductor is deposited onto a substrate layer. A solution containing an electrolyte, at least one bonding material, and positive and negative ions is applied over the top surface of the semiconductor. Light energy is applied to generate photovoltage in the semiconductor, causing a redistribution of the ions and the bonding material to the areas of aberrant electric potential. The bonding material selectively bonds to the nonuniformities in a manner such that the electric potential of the nonuniformities is normalized relative to the electric potential of the top surface of the semiconductor layer. A conductive electrode layer is then deposited over the top surface of the semiconductor layer.

{100}<100> or 45.degree.-rotated {100}<100>, semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit [Knoxville, TN

2012-05-15

Novel articles and methods to fabricate the same resulting in flexible, {100}<100> or 45.degree.-rotated {100}<100> oriented, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Tuneable photonic device including an array of metamaterial resonators

DOEpatents

Brener, Igal; Wanke, Michael; Benz, Alexander

2017-03-14

A photonic apparatus includes a metamaterial resonator array overlying and electromagnetically coupled to a vertically stacked plurality of quantum wells defined in a semiconductor body. An arrangement of electrical contact layers is provided for facilitating the application of a bias voltage across the quantum well stack. Those portions of the semiconductor body that lie between the electrical contact layers are conformed to provide an electrically conductive path between the contact layers and through the quantum well stack.

Silicon carbide semiconductor technology for high temperature and radiation environments

NASA Technical Reports Server (NTRS)

Matus, Lawrence G.

1993-01-01

Viewgraphs on silicon carbide semiconductor technology and its potential for enabling electronic devices to function in high temperature and high radiation environments are presented. Topics covered include silicon carbide; sublimation growth of 6H-SiC boules; SiC chemical vapor deposition reaction system; 6H silicon carbide p-n junction diode; silicon carbide MOSFET; and silicon carbide JFET radiation response.

SEM evaluation of metallization on semiconductors. [Scanning Electron Microscope

NASA Technical Reports Server (NTRS)

Fresh, D. L.; Adolphsen, J. W.

1974-01-01

A test method for the evaluation of metallization on semiconductors is presented and discussed. The method has been prepared in MIL-STD format for submittal as a proposed addition to MIL-STD-883. It is applicable to discrete devices and to integrated circuits and specifically addresses batch-process oriented defects. Quantitative accept/reject criteria are given for contact windows, other oxide steps, and general interconnecting metallization. Figures are provided that illustrate typical types of defects. Apparatus specifications, sampling plans, and specimen preparation and examination requirements are described. Procedures for glassivated devices and for multi-metal interconnection systems are included.

Dynamic carrier transport modulation for constructing advanced devices with improved performance by piezotronic and piezo-phototronic effects: a brief review

NASA Astrophysics Data System (ADS)

Guo, Zhen; Pan, Haixi; Li, Chuanyu; Zhang, Lili; Yan, Shuai; Zhang, Wei; Yao, Jia; Tang, Yuguo; Yang, Hongbo; Wu, Yihui; Feng, Liping; Zhou, Lianqun

2017-08-01

Carrier generation, transport, separation, and recombination behaviors can be modulated for improving the performance of semiconductor devices by using piezotronic and piezo-phototronic effects with creating piezopotential in crystals based on non-centrosymmetric semiconductor materials such as group II-VI and III-V semiconductors and transition metal dichalcogenides (TMDCs), which have emerged as attractive materials for electronic/photonic applications because of their novel properties. Until now, much effort has been devoted to improving the performance of devices based on the aforementioned materials through modulation of the carrier behavior. However, due to existing drawbacks, it has been difficult to further enhance the device performance for a built structure. However, effective exploration of the piezotronic and piezo-phototronic effects in these semiconducting materials could pave the way to the realization of high-performance devices. In general, the effective modulation of carrier behavior dynamically in devices such as light-emitting diodes, photodetectors, solar cells, nanogenerators, and so on, remains a key challenge. Due to the polarization of ions in semiconductor materials with noncentral symmetry under external strain, a piezopotential is created considering piezotronic and piezo-photoronic effects, which could dynamically modulate charge carrier transport behaviors across p-n junctions or metal-semiconductor interfaces. Through a combination of these effects and semiconductor properties, the performance of the related devices could be improved and new types of devices such as piezoelectric field-effect transistors and sensors have emerged, with potential applications in self-driven devices for effective energy harvesting and biosensing with high sensitivity, which are different from those traditionally designed and may have potential applications in strained triggered devices. The objective of this review is to briefly introduce the corresponding mechanisms for modulating carrier behavior on the basis of piezotronic and piezo-phototronic effects in materials such as group II-VI and group III-V semiconductors and TMDCs, as well as to discuss possible solutions to effectively enhance the performance of the devices via carrier modulation.

Method for making a monolithic integrated high-T.sub.c superconductor-semiconductor structure

NASA Technical Reports Server (NTRS)

Burns, Michael J. (Inventor); de la Houssaye, Paul R. (Inventor); Russell, Stephen D. (Inventor); Garcia, Graham A. (Inventor); Barfknecht, Andrew T. (Inventor); Clayton, Stanley R. (Inventor)

2000-01-01

A method for the fabrication of active semiconductor and high-temperature perconducting devices on the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.

Molecular detection via hybrid peptide-semiconductor photonic devices

NASA Astrophysics Data System (ADS)

Estephan, E.; Saab, M.-b.; Martin, M.; Cloitre, T.; Larroque, C.; Cuisinier, F. J. G.; Malvezzi, A. M.; Gergely, C.

2011-03-01

The aim of this work was to investigate the possibilities to support device functionality that includes strongly confined and localized light emission and detection processes within nano/micro-structured semiconductors for biosensing applications. The interface between biological molecules and semiconductor surfaces, yet still under-explored is a key issue for improving biomolecular recognition in devices. We report on the use of adhesion peptides, elaborated via combinatorial phage-display libraries for controlled placement of biomolecules, leading to user-tailored hybrid photonic systems for molecular detection. An M13 bacteriophage library has been used to screen 1010 different peptides against various semiconductors to finally isolate specific peptides presenting a high binding capacity for the target surfaces. When used to functionalize porous silicon microcavities (PSiM) and GaAs/AlGaAs photonic crystals, we observe the formation of extremely thin (<1nm) peptide layers, hereby preserving the nanostructuration of the crystals. This is important to assure the photonic response of these tiny structures when they are functionalized by a biotinylated peptide layer and then used to capture streptavidin. Molecular detection was monitored via both linear and nonlinear optical measurements. Our linear reflectance spectra demonstrate an enhanced detection resolution via PSiM devices, when functionalized with the Si-specific peptide. Molecular capture at even lower concentrations (femtomols) is possible via the second harmonic generation of GaAs/AlGaAs photonic crystals when functionalized with GaAs-specific peptides. Our work demonstrates the outstanding value of adhesion peptides as interface linkers between semiconductors and biological molecules. They assure an enhanced molecular detection via both linear and nonlinear answers of photonic crystals.

Active pixel sensor pixel having a photodetector whose output is coupled to an output transistor gate

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Nakamura, Junichi (Inventor); Kemeny, Sabrina E. (Inventor)

2005-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. A Simple Floating Gate (SFG) pixel structure could also be employed in the imager to provide a non-destructive readout and smaller pixel sizes.

Advanced thermoelectric materials with enhanced crystal lattice structure and methods of preparation

NASA Technical Reports Server (NTRS)

Fleurial, Jean-Pierre (Inventor); Caillat, Thierry F. (Inventor); Borshchevsky, Alexander (Inventor)

1998-01-01

New skutterudite phases including Ru.sub.0.5 Pd.sub.0.5 Sb.sub.3, RuSb.sub.2 Te, and FeSb.sub.2 Te, have been prepared having desirable thermoelectric properties. In addition, a novel thermoelectric device has been prepared using skutterudite phase Fe.sub.0.5 Ni.sub.0.5 Sb.sub.3. The skutterudite-type crystal lattice structure of these semiconductor compounds and their enhanced thermoelectric properties results in semiconductor materials which may be used in the fabrication of thermoelectric elements to substantially improve the efficiency of the resulting thermoelectric device. Semiconductor materials having the desired skutterudite-type crystal lattice structure may be prepared in accordance with the present invention by using powder metallurgy techniques. Measurements of electrical and thermal transport properties of selected semiconductor materials prepared in accordance with the present invention, demonstrated high Hall mobilities and good Seebeck coefficients. These materials have low thermal conductivity and relatively low electrical resistivity, and are good candidates for low temperature thermoelectric applications.

Tapered rib fiber coupler for semiconductor optical devices

DOEpatents

Vawter, Gregory A.; Smith, Robert Edward

2001-01-01

A monolithic tapered rib waveguide for transformation of the spot size of light between a semiconductor optical device and an optical fiber or from the fiber into the optical device. The tapered rib waveguide is integrated into the guiding rib atop a cutoff mesa type semiconductor device such as an expanded mode optical modulator or and expanded mode laser. The tapered rib acts to force the guided light down into the mesa structure of the semiconductor optical device instead of being bound to the interface between the bottom of the guiding rib and the top of the cutoff mesa. The single mode light leaving or entering the output face of the mesa structure then can couple to the optical fiber at coupling losses of 1.0 dB or less.

Silicon superlattices: Theory and application to semiconductor devices

NASA Technical Reports Server (NTRS)

Moriarty, J. A.

1981-01-01

Silicon superlattices and their applicability to improved semiconductor devices were studied. The device application potential of the atomic like dimension of III-V semiconductor superlattices fabricated in the form of ultrathin periodically layered heterostructures was examined. Whether this leads to quantum size effects and creates the possibility to alter familiar transport and optical properties over broad physical ranges was studied. Applications to improved semiconductor lasers and electrondevices were achieved. Possible application of silicon sperlattices to faster high speed computing devices was examined. It was found that the silicon lattices show features of smaller fundamental energyband gaps and reduced effective masses. The effects correlate strongly with both the chemical and geometrical nature of the superlattice.

Evolution of corundum-structured III-oxide semiconductors: Growth, properties, and devices

NASA Astrophysics Data System (ADS)

Fujita, Shizuo; Oda, Masaya; Kaneko, Kentaro; Hitora, Toshimi

2016-12-01

The recent progress and development of corundum-structured III-oxide semiconductors are reviewed. They allow bandgap engineering from 3.7 to ∼9 eV and function engineering, leading to highly durable electronic devices and deep ultraviolet optical devices as well as multifunctional devices. Mist chemical vapor deposition can be a simple and safe growth technology and is advantageous for reducing energy and cost for the growth. This is favorable for the wide commercial use of devices at low cost. The III-oxide semiconductors are promising candidates for new devices contributing to sustainable social, economic, and technological development for the future.

Superlattice optical device

DOEpatents

Biefeld, R.M.; Fritz, I.J.; Gourley, P.L.; Osbourn, G.C.

A semiconductor optical device which includes a superlattice having direct transitions between conduction band and valence band states with the same wave vector, the superlattice being formed from a plurality of alternating layers of two or more different materials, at least the material with the smallest bandgap being an indirect bandgap material.

Electra-optical device including a nitrogen containing electrolyte

DOEpatents

Bates, John B.; Dudney, Nancy J.; Gruzalski, Greg R.; Luck, Christopher F.

1995-01-01

Described is a thin-film battery, especially a thin-film microbattery, and a method for making same having application as a backup or primary integrated power source for electronic devices. The battery includes a novel electrolyte which is electrochemically stable and does not react with the lithium anode and a novel vanadium oxide cathode Configured as a microbattery, the battery can be fabricated directly onto a semiconductor chip, onto the semiconductor die or onto any portion of the chip carrier. The battery can be fabricated to any specified size or shape to meet the requirements of a particular application. The battery is fabricated of solid state materials and is capable of operation between -15.degree. C. and 150.degree. C.

Geckoprinting: assembly of microelectronic devices on unconventional surfaces by transfer printing with isolated gecko setal arrays

PubMed Central

Jeong, Jaeyoung; Kim, Juho; Song, Kwangsun; Autumn, Kellar; Lee, Jongho

2014-01-01

Developing electronics in unconventional forms provides opportunities to expand the use of electronics in diverse applications including bio-integrated or implanted electronics. One of the key challenges lies in integrating semiconductor microdevices onto unconventional substrates without glue, high pressure or temperature that may cause damage to microdevices, substrates or interfaces. This paper describes a solution based on natural gecko setal arrays that switch adhesion mechanically on and off, enabling pick and place manipulation of thin microscale semiconductor materials onto diverse surfaces including plants and insects whose surfaces are usually rough and irregular. A demonstration of functional ‘geckoprinted’ microelectronic devices provides a proof of concept of our results in practical applications. PMID:25056216

Cameras for semiconductor process control

NASA Technical Reports Server (NTRS)

Porter, W. A.; Parker, D. L.

1977-01-01

The application of X-ray topography to semiconductor process control is described, considering the novel features of the high speed camera and the difficulties associated with this technique. The most significant results on the effects of material defects on device performance are presented, including results obtained using wafers processed entirely within this institute. Defects were identified using the X-ray camera and correlations made with probe data. Also included are temperature dependent effects of material defects. Recent applications and improvements of X-ray topographs of silicon-on-sapphire and gallium arsenide are presented with a description of a real time TV system prototype and of the most recent vacuum chuck design. Discussion is included of our promotion of the use of the camera by various semiconductor manufacturers.

Interconnected semiconductor devices

DOEpatents

Grimmer, Derrick P.; Paulson, Kenneth R.; Gilbert, James R.

1990-10-23

Semiconductor layer and conductive layer formed on a flexible substrate, divided into individual devices and interconnected with one another in series by interconnection layers and penetrating terminals.

Lapped substrate for enhanced backsurface reflectivity in a thermophotovoltaic energy conversion system

DOEpatents

Baldasaro, Paul F; Brown, Edward J; Charache, Greg W; DePoy, David M

2000-01-01

A method for fabricating a thermophotovoltaic energy conversion cell including a thin semiconductor wafer substrate (10) having a thickness (.beta.) calculated to decrease the free carrier absorption on a heavily doped substrate; wherein the top surface of the semiconductor wafer substrate is provided with a thermophotovoltaic device (11), a metallized grid (12) and optionally an antireflective (AR) overcoating; and, the bottom surface (10') of the semiconductor wafer substrate (10) is provided with a highly reflecting coating which may comprise a metal coating (14) or a combined dielectric/metal coating (17).

Lapped substrate for enhanced backsurface reflectivity in a thermophotovoltaic energy conversion system

DOEpatents

Baldasaro, Paul F; Brown, Edward J; Charache, Greg W; DePoy, David M

2000-09-05

A method for fabricating a thermophotovoltaic energy conversion cell including a thin semiconductor wafer substrate (10) having a thickness (.beta.) calculated to decrease the free carrier absorption on a heavily doped substrate; wherein the top surface of the semiconductor wafer substrate is provided with a thermophotovoltaic device (11), a metallized grid (12) and optionally an antireflective (AR) overcoating; and, the bottom surface (10') of the semiconductor wafer substrate (10) is provided with a highly reflecting coating which may comprise a metal coating (14) or a combined dielectric/metal coating (17).

Thin film photovoltaic device

DOEpatents

Catalano, Anthony W.; Bhushan, Manjul

1982-01-01

A thin film photovoltaic solar cell which utilizes a zinc phosphide semiconductor is of the homojunction type comprising an n-type conductivity region forming an electrical junction with a p-type region, both regions consisting essentially of the same semiconductor material. The n-type region is formed by treating zinc phosphide with an extrinsic dopant such as magnesium. The semiconductor is formed on a multilayer substrate which acts as an opaque contact. Various transparent contacts may be used, including a thin metal film of the same chemical composition as the n-type dopant or conductive oxides or metal grids.

Room-temperature semiconductor heterostructure refrigeration

NASA Astrophysics Data System (ADS)

Chao, K. A.; Larsson, Magnus; Mal'shukov, A. G.

2005-07-01

With the proper design of semiconductor tunneling barrier structures, we can inject low-energy electrons via resonant tunneling, and take out high-energy electrons via a thermionic process. This is the operation principle of our semiconductor heterostructure refrigerator (SHR) without the need of applying a temperature gradient across the device. Even for the bad thermoelectric material AlGaAs, our calculation shows that at room temperature, the SHR can easily lower the temperature by 5-7K. Such devices can be fabricated with the present semiconductor technology. Besides its use as a kitchen refrigerator, the SHR can efficiently cool microelectronic devices.

A Thermal and Electrical Analysis of Power Semiconductor Devices

NASA Technical Reports Server (NTRS)

Vafai, Kambiz

1997-01-01

The state-of-art power semiconductor devices require a thorough understanding of the thermal behavior for these devices. Traditional thermal analysis have (1) failed to account for the thermo-electrical interaction which is significant for power semiconductor devices operating at high temperature, and (2) failed to account for the thermal interactions among all the levels involved in, from the entire device to the gate micro-structure. Furthermore there is a lack of quantitative studies of the thermal breakdown phenomenon which is one of the major failure mechanisms for power electronics. This research work is directed towards addressing. Using a coupled thermal and electrical simulation, in which the drift-diffusion equations for the semiconductor and the energy equation for temperature are solved simultaneously, the thermo-electrical interactions at the micron scale of various junction structures are thoroughly investigated. The optimization of gate structure designs and doping designs is then addressed. An iterative numerical procedure which incorporates the thermal analysis at the device, chip and junction levels of the power device is proposed for the first time and utilized in a BJT power semiconductor device. In this procedure, interactions of different levels are fully considered. The thermal stability issue is studied both analytically and numerically in this research work in order to understand the mechanism for thermal breakdown.

neutron-Induced Failures in semiconductor Devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wender, Stephen Arthur

2017-03-13

Single Event Effects are a very significant failure mode in modern semiconductor devices that may limit their reliability. Accelerated testing is important for semiconductor industry. Considerable more work is needed in this field to mitigate the problem. Mitigation of this problem will probably come from Physicists and Electrical Engineers working together

77 FR 25747 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Institution of...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-05-01

... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-840] Certain Semiconductor Integrated Circuit... States after importation of certain semiconductor integrated circuit devices and products containing same... No. 6,847,904 (``the '904 patent''). The complaint further alleges that an industry in the United...

Highly Efficient Multilayer Thermoelectric Devices

NASA Technical Reports Server (NTRS)

Boufelfel, Ali

2006-01-01

Multilayer thermoelectric devices now at the prototype stage of development exhibit a combination of desirable characteristics, including high figures of merit and high performance/cost ratios. These devices are capable of producing temperature differences of the order of 50 K in operation at or near room temperature. A solvent-free batch process for mass production of these state-of-the-art thermoelectric devices has also been developed. Like prior thermoelectric devices, the present ones have commercial potential mainly by virtue of their utility as means of controlled cooling (and/or, in some cases, heating) of sensors, integrated circuits, and temperature-critical components of scientific instruments. The advantages of thermoelectric devices for such uses include no need for circulating working fluids through or within the devices, generation of little if any noise, and high reliability. The disadvantages of prior thermoelectric devices include high power consumption and relatively low coefficients of performance. The present development program was undertaken in the hope of reducing the magnitudes of the aforementioned disadvantages and, especially, obtaining higher figures of merit for operation at and near room temperature. Accomplishments of the program thus far include development of an algorithm to estimate the heat extracted by, and the maximum temperature drop produced by, a thermoelectric device; solution of the problem of exchange of heat between a thermoelectric cooler and a water-cooled copper block; retrofitting of a vacuum chamber for depositing materials by sputtering; design of masks; and fabrication of multilayer thermoelectric devices of two different designs, denoted I and II. For both the I and II designs, the thicknesses of layers are of the order of nanometers. In devices of design I, nonconsecutive semiconductor layers are electrically connected in series. Devices of design II contain superlattices comprising alternating electron-acceptor (p)-doped and electron-donor (n)-doped, nanometer- thick semiconductor layers.

Controlling Molecular Doping in Organic Semiconductors.

PubMed

Jacobs, Ian E; Moulé, Adam J

2017-11-01

The field of organic electronics thrives on the hope of enabling low-cost, solution-processed electronic devices with mechanical, optoelectronic, and chemical properties not available from inorganic semiconductors. A key to the success of these aspirations is the ability to controllably dope organic semiconductors with high spatial resolution. Here, recent progress in molecular doping of organic semiconductors is summarized, with an emphasis on solution-processed p-type doped polymeric semiconductors. Highlighted topics include how solution-processing techniques can control the distribution, diffusion, and density of dopants within the organic semiconductor, and, in turn, affect the electronic properties of the material. Research in these areas has recently intensified, thanks to advances in chemical synthesis, improved understanding of charged states in organic materials, and a focus on relating fabrication techniques to morphology. Significant disorder in these systems, along with complex interactions between doping and film morphology, is often responsible for charge trapping and low doping efficiency. However, the strong coupling between doping, solubility, and morphology can be harnessed to control crystallinity, create doping gradients, and pattern polymers. These breakthroughs suggest a role for molecular doping not only in device function but also in fabrication-applications beyond those directly analogous to inorganic doping. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

ZnSe based semiconductor core-shell structures: From preparation to application

NASA Astrophysics Data System (ADS)

Sun, Chengcheng; Gu, Yarong; Wen, Weijia; Zhao, Lijuan

2018-07-01

Inorganic core-shell semiconductor materials have attracted increasing interest in recent years because of the unique structure, stable chemical properties and high performance in devices. With special properties such as a direct band-gap and excellent photoelectrical characteristics, ZnSe based semiconductor core-shell structures are promising materials for applications in such fields as photocatalysts, light-emitting diodes, solar cells, photodetectors, biomedical science and so on. However, few reviews on ZnSe based semiconductor core-shell structures have been reported so far. Therefore this manuscript mainly focuses on the research activities on ZnSe based semiconductor core-shell composites including various preparation methods and the applications of these core-shell structures, especially in photocatalysts, light emitting, solar cells and photodetectors. The possibilities and limitations of studies on ZnSe based semiconductor core-shell composites are also highlighted.

Zinc Alloys for the Fabrication of Semiconductor Devices

NASA Technical Reports Server (NTRS)

Ryu, Yungryel; Lee, Tae S.

2009-01-01

ZnBeO and ZnCdSeO alloys have been disclosed as materials for the improvement in performance, function, and capability of semiconductor devices. The alloys can be used alone or in combination to form active photonic layers that can emit over a range of wavelength values. Materials with both larger and smaller band gaps would allow for the fabrication of semiconductor heterostructures that have increased function in the ultraviolet (UV) region of the spectrum. ZnO is a wide band-gap material possessing good radiation-resistance properties. It is desirable to modify the energy band gap of ZnO to smaller values than that for ZnO and to larger values than that for ZnO for use in semiconductor devices. A material with band gap energy larger than that of ZnO would allow for the emission at shorter wavelengths for LED (light emitting diode) and LD (laser diode) devices, while a material with band gap energy smaller than that of ZnO would allow for emission at longer wavelengths for LED and LD devices. The amount of Be in the ZnBeO alloy system can be varied to increase the energy bandgap of ZnO to values larger than that of ZnO. The amount of Cd and Se in the ZnCdSeO alloy system can be varied to decrease the energy band gap of ZnO to values smaller than that of ZnO. Each alloy formed can be undoped or can be p-type doped using selected dopant elements, or can be n-type doped using selected dopant elements. The layers and structures formed with both the ZnBeO and ZnCdSeO semiconductor alloys - including undoped, p-type-doped, and n-type-doped types - can be used for fabricating photonic and electronic semiconductor devices for use in photonic and electronic applications. These devices can be used in LEDs, LDs, FETs (field effect transistors), PN junctions, PIN junctions, Schottky barrier diodes, UV detectors and transmitters, and transistors and transparent transistors. They also can be used in applications for lightemitting display, backlighting for displays, UV and visible transmitters and detectors, high-frequency radar, biomedical imaging, chemical compound identification, molecular identification and structure, gas sensors, imaging systems, and for the fundamental studies of atoms, molecules, gases, vapors, and solids.

Development of high temperature, high radiation resistant silicon semiconductors

NASA Technical Reports Server (NTRS)

Whorl, C. A.; Evans, A. W.

1972-01-01

The development of a hardened silicon power transistor for operation in severe nuclear radiation environments at high temperature was studied. Device hardness and diffusion techniques are discussed along with the geometries of hardened power transistor chips. Engineering drawings of 100 amp and 5 amp silicon devices are included.

Semiconductor Quantum Electron Wave Transport, Diffraction, and Interference: Analysis, Device, and Measurement.

NASA Astrophysics Data System (ADS)

Henderson, Gregory Newell

Semiconductor device dimensions are rapidly approaching a fundamental limit where drift-diffusion equations and the depletion approximation are no longer valid. In this regime, quantum effects can dominate device response. To increase further device density and speed, new devices must be designed that use these phenomena to positive advantage. In addition, quantum effects provide opportunities for a new class of devices which can perform functions previously unattainable with "conventional" semiconductor devices. This thesis has described research in the analysis of electron wave effects in semiconductors and the development of methods for the design, fabrication, and characterization of quantum devices based on these effects. First, an exact set of quantitative analogies are presented which allow the use of well understood optical design and analysis tools for the development of electron wave semiconductor devices. Motivated by these analogies, methods are presented for modeling electron wave grating diffraction using both an exact rigorous coupled-wave analysis and approximate analyses which are useful for grating design. Example electron wave grating switch and multiplexer designs are presented. In analogy to thin-film optics, the design and analysis of electron wave Fabry-Perot interference filters are also discussed. An innovative technique has been developed for testing these (and other) electron wave structures using Ballistic Electron Emission Microscopy (BEEM). This technique uses a liquid-helium temperature scanning tunneling microscope (STM) to perform spectroscopy of the electron transmittance as a function of electron energy. Experimental results show that BEEM can resolve even weak quantum effects, such as the reflectivity of a single interface between materials. Finally, methods are discussed for incorporating asymmetric electron wave Fabry-Perot filters into optoelectronic devices. Theoretical and experimental results show that such structures could be the basis for a new type of electrically pumped mid - to far-infrared semiconductor laser.

Semiconductor with protective surface coating and method of manufacture thereof. [Patent application

DOEpatents

Hansen, W.L.; Haller, E.E.

1980-09-19

Passivation of predominantly crystalline semiconductor devices is provided for by a surface coating of sputtered hydrogenated amorphous semiconductor material. Passivation of a radiation detector germanium diode, for example, is realized by sputtering a coating of amorphous germanium onto the etched and quenched diode surface in a low pressure atmosphere of hydrogen and argon. Unlike prior germanium diode semiconductor devices, which must be maintained in vacuum at cryogenic temperatures to avoid deterioration, a diode processed in the described manner may be stored in air at room temperature or otherwise exposed to a variety of environmental conditions. The coating compensates for pre-existing undesirable surface states as well as protecting the semiconductor device against future impregnation with impurities.

Ferrite film growth on semiconductor substrates towards microwave and millimeter wave integrated circuits

NASA Astrophysics Data System (ADS)

Chen, Z.; Harris, V. G.

2012-10-01

It is widely recognized that as electronic systems' operating frequency shifts to microwave and millimeter wave bands, the integration of ferrite passive devices with semiconductor solid state active devices holds significant advantages in improved miniaturization, bandwidth, speed, power and production costs, among others. Traditionally, ferrites have been employed in discrete bulk form, despite attempts to integrate ferrite as films within microwave integrated circuits. Technical barriers remain centric to the incompatibility between ferrite and semiconductor materials and their processing protocols. In this review, we present past and present efforts at ferrite integration with semiconductor platforms with the aim to identify the most promising paths to realizing the complete integration of on-chip ferrite and semiconductor devices, assemblies and systems.

Design and fabrication of 6.1-.ANG. family semiconductor devices using semi-insulating A1Sb substrate

DOEpatents

Sherohman, John W [Livermore, CA; Coombs, III, Arthur W.; Yee, Jick Hong [Livermore, CA; Wu, Kuang Jen J [Cupertino, CA

2007-05-29

For the first time, an aluminum antimonide (AlSb) single crystal substrate is utilized to lattice-match to overlying semiconductor layers. The AlSb substrate establishes a new design and fabrication approach to construct high-speed, low-power electronic devices while establishing inter-device isolation. Such lattice matching between the substrate and overlying semiconductor layers minimizes the formation of defects, such as threaded dislocations, which can decrease the production yield and operational life-time of 6.1-.ANG. family heterostructure devices.

Bulk single crystal ternary substrates for a thermophotovoltaic energy conversion system

DOEpatents

Charache, Greg W.; Baldasaro, Paul F.; Nichols, Greg J.

1998-01-01

A thermophotovoltaic energy conversion device and a method for making the device. The device includes a substrate formed from a bulk single crystal material having a bandgap (E.sub.g) of 0.4 eV

Bulk single crystal ternary substrates for a thermophotovoltaic energy conversion system

DOEpatents

Charache, G.W.; Baldasaro, P.F.; Nichols, G.J.

1998-06-23

A thermophotovoltaic energy conversion device and a method for making the device are disclosed. The device includes a substrate formed from a bulk single crystal material having a bandgap (E{sub g}) of 0.4 eV < E{sub g} < 0.7 eV and an emitter fabricated on the substrate formed from one of a p-type or an n-type material. Another thermophotovoltaic energy conversion device includes a host substrate formed from a bulk single crystal material and lattice-matched ternary or quaternary III-V semiconductor active layers. 12 figs.

Solution-Processed Wide-Bandgap Organic Semiconductor Nanostructures Arrays for Nonvolatile Organic Field-Effect Transistor Memory.

PubMed

Li, Wen; Guo, Fengning; Ling, Haifeng; Liu, Hui; Yi, Mingdong; Zhang, Peng; Wang, Wenjun; Xie, Linghai; Huang, Wei

2018-01-01

In this paper, the development of organic field-effect transistor (OFET) memory device based on isolated and ordered nanostructures (NSs) arrays of wide-bandgap (WBG) small-molecule organic semiconductor material [2-(9-(4-(octyloxy)phenyl)-9H-fluoren-2-yl)thiophene]3 (WG 3 ) is reported. The WG 3 NSs are prepared from phase separation by spin-coating blend solutions of WG 3 /trimethylolpropane (TMP), and then introduced as charge storage elements for nonvolatile OFET memory devices. Compared to the OFET memory device with smooth WG 3 film, the device based on WG 3 NSs arrays exhibits significant improvements in memory performance including larger memory window (≈45 V), faster switching speed (≈1 s), stable retention capability (>10 4 s), and reliable switching properties. A quantitative study of the WG 3 NSs morphology reveals that enhanced memory performance is attributed to the improved charge trapping/charge-exciton annihilation efficiency induced by increased contact area between the WG 3 NSs and pentacene layer. This versatile solution-processing approach to preparing WG 3 NSs arrays as charge trapping sites allows for fabrication of high-performance nonvolatile OFET memory devices, which could be applicable to a wide range of WBG organic semiconductor materials. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Collective Poisson process with periodic rates: applications in physics from micro-to nanodevices.

PubMed

da Silva, Roberto; Lamb, Luis C; Wirth, Gilson Inacio

2011-01-28

Continuous reductions in the dimensions of semiconductor devices have led to an increasing number of noise sources, including random telegraph signals (RTS) due to the capture and emission of electrons by traps at random positions between oxide and semiconductor. The models traditionally used for microscopic devices become of limited validity in nano- and mesoscale systems since, in such systems, distributed quantities such as electron and trap densities, and concepts like electron mobility, become inadequate to model electrical behaviour. In addition, current experimental works have shown that RTS in semiconductor devices based on carbon nanotubes lead to giant current fluctuations. Therefore, the physics of this phenomenon and techniques to decrease the amplitudes of RTS need to be better understood. This problem can be described as a collective Poisson process under different, but time-independent, rates, τ(c) and τ(e), that control the capture and emission of electrons by traps distributed over the oxide. Thus, models that consider calculations performed under time-dependent periodic capture and emission rates should be of interest in order to model more efficient devices. We show a complete theoretical description of a model that is capable of showing a noise reduction of current fluctuations in the time domain, and a reduction of the power spectral density in the frequency domain, in semiconductor devices as predicted by previous experimental work. We do so through numerical integrations and a novel Monte Carlo Markov chain (MCMC) algorithm based on microscopic discrete values. The proposed model also handles the ballistic regime, relevant in nano- and mesoscale devices. Finally, we show that the ballistic regime leads to nonlinearity in the electrical behaviour.

Semiconductor photoelectrochemistry

NASA Technical Reports Server (NTRS)

Buoncristiani, A. M.; Byvik, C. E.

1983-01-01

Semiconductor photoelectrochemical reactions are investigated. A model of the charge transport processes in the semiconductor, based on semiconductor device theory, is presented. It incorporates the nonlinear processes characterizing the diffusion and reaction of charge carriers in the semiconductor. The model is used to study conditions limiting useful energy conversion, specifically the saturation of current flow due to high light intensity. Numerical results describing charge distributions in the semiconductor and its effects on the electrolyte are obtained. Experimental results include: an estimate rate at which a semiconductor photoelectrode is capable of converting electromagnetic energy into chemical energy; the effect of cell temperature on the efficiency; a method for determining the point of zero zeta potential for macroscopic semiconductor samples; a technique using platinized titanium dioxide powders and ultraviolet radiation to produce chlorine, bromine, and iodine from solutions containing their respective ions; the photoelectrochemical properties of a class of layered compounds called transition metal thiophosphates; and a technique used to produce high conversion efficiency from laser radiation to chemical energy.

Memory effects in a Al/Ti:HfO2/CuPc metal-oxide-semiconductor device

NASA Astrophysics Data System (ADS)

Tripathi, Udbhav; Kaur, Ramneek

2016-05-01

Metal oxide semiconductor structured organic memory device has been successfully fabricated. Ti doped hafnium oxide (Ti:HfO2) nanoparticles has been fabricated by precipitation method and further calcinated at 800 °C. Copper phthalocyanine, a hole transporting material has been utilized as an organic semiconductor. The electrical properties of the fabricated device have been studied by measuring the current-voltage and capacitance-voltage characteristics. The amount of charge stored in the nanoparticles has been calculated by using flat band condition. This simple approach for fabricating MOS memory device has opens up opportunities for the development of next generation memory devices.

Porous silicon carbide (SiC) semiconductor device

NASA Technical Reports Server (NTRS)

Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)

1994-01-01

A semiconductor device employs at least one layer of semiconducting porous silicon carbide (SiC). The porous SiC layer has a monocrystalline structure wherein the pore sizes, shapes, and spacing are determined by the processing conditions. In one embodiment, the semiconductor device is a p-n junction diode in which a layer of n-type SiC is positioned on a p-type layer of SiC, with the p-type layer positioned on a layer of silicon dioxide. Because of the UV luminescent properties of the semiconducting porous SiC layer, it may also be utilized for other devices such as LEDs and optoelectronic devices.

16th Russian Youth Conference on Physics of Semiconductors and Nanostructures, Opto- and Nanoelectronics

NASA Astrophysics Data System (ADS)

Suris, Robert A.; Vorobjev, Leonid E.; Firsov, Dmitry A.

2015-01-01

The 16th Russian Youth Conference on Physics of Semiconductors and Nanostructures, Opto- and Nanoelectronics was held on November 24 - 28 at St. Petersburg Polytechnic University. The program of the Conference included semiconductor technology, heterostructures with quantum wells and quantum dots, opto- and nanoelectronic devices, and new materials. A large number of participants with about 200 attendees from many regions of Russia provided a perfect platform for the valuable discussions between students and experienced scientists. The Conference included two invited talks given by a corresponding member of RAS P.S. Kopyev ("Nitrides: the 4th Nobel Prize on semiconductor heterostructures") and Dr. A.V. Ivanchik ("XXI century is the era of precision cosmology"). Students, graduate and postgraduate students presented their results on plenary and poster sessions. The total number of accepted papers published in Russian (the official conference language) was 92. Here we publish 18 of them in English. Like previous years, the participants were involved in the competition for the best report. Certificates and cash prizes were awarded to a number of participants for the presentations selected by the Program Committee. Two special E.F. Gross Prizes were given for the best presentations in semiconductor optics. Works with potential applications were recommended for participation in the following competition for support from the Russian Foundation for Assistance to Small Innovative Enterprises in Science and Technology. The Conference was supported by the Russian Foundation for Basic Research, the "Dynasty" foundation and the innovation company "ATC - Semiconductor Devices", St. Petersburg. The official Conference website is http://www.semicond.spbstu.ru/conf2014-eng.html

Review on the dynamics of semiconductor nanowire lasers

NASA Astrophysics Data System (ADS)

Röder, Robert; Ronning, Carsten

2018-03-01

Semiconductor optoelectronic devices have contributed tremendously to the technological progress in the past 50-60 years. Today, they also play a key role in nanophotonics stimulated by the inherent limitations of electronic integrated circuits and the growing demand for faster communications on chip. In particular, the field of ‘nanowire photonics’ has emerged including the search for coherent light sources with a nano-scaled footprint. The past decade has been dedicated to find suitable semiconductor nanowire (NW) materials for such nanolasers. Nowadays, such NW lasers consistently work at room temperature covering a huge spectral range from the ultraviolet down to the mid-infrared depending on the band gap of the NW material. Furthermore, first approaches towards the modification and optimization of such NW laser devices have been demonstrated. The underlying dynamics of the electronic and photonic NW systems have also been studied very recently, as they need to be understood in order to push the technological relevance of nano-scaled coherent light sources. Therefore, this review will first present novel measurement approaches in order to study the ultrafast temporal and optical mode dynamics of individual NW laser devices. Furthermore, these fundamental new insights are reviewed and deeply discussed towards the efficient control and adjustment of the dynamics in semiconductor NW lasers.

The preparation method of terahertz monolithic integrated device

NASA Astrophysics Data System (ADS)

Zhang, Cong; Su, Bo; He, Jingsuo; Zhang, Hongfei; Wu, Yaxiong; Zhang, Shengbo; Zhang, Cunlin

2018-01-01

The terahertz monolithic integrated device is to integrate the pumping area of the terahertz generation, the detection area of the terahertz receiving and the metal waveguide of terahertz transmission on the same substrate. The terahertz generation and detection device use a photoconductive antenna structure the metal waveguide use a microstrip line structure. The evanescent terahertz-bandwidth electric field extending above the terahertz transmission line interacts with, and is modified by, overlaid dielectric samples, thus enabling the characteristic vibrational absorption resonances in the sample to be probed. In this device structure, since the semiconductor substrate of the photoconductive antenna is located between the strip conductor and the dielectric layer of the microstrip line, and the semiconductor substrate cannot grow on the dielectric layer directly. So how to prepare the semiconductor substrate of the photoconductive antenna and how to bond the semiconductor substrate to the dielectric layer of the microstrip line is a key step in the terahertz monolithic integrated device. In order to solve this critical problem, the epitaxial wafer structure of the two semiconductor substrates is given and transferred to the desired substrate by two methods, respectively.

Metal-organic semiconductor interfacial barrier height determination from internal photoemission signal in spectral response measurements

NASA Astrophysics Data System (ADS)

Kumar, Sandeep; Iyer, S. Sundar Kumar

2017-04-01

Accurate and convenient evaluation methods of the interfacial barrier ϕb for charge carriers in metal semiconductor (MS) junctions are important for designing and building better opto-electronic devices. This becomes more critical for organic semiconductor devices where a plethora of molecules are in use and standardised models applicable to myriads of material combinations for the different devices may have limited applicability. In this paper, internal photoemission (IPE) from spectral response (SR) in the ultra-violet to near infra-red range of different MS junctions of metal-organic semiconductor-metal (MSM) test structures is used to determine more realistic MS ϕb values. The representative organic semiconductor considered is [6, 6]-phenyl C61 butyric acid methyl ester, and the metals considered are Al and Au. The IPE signals in the SR measurement of the MSM device are identified and separated before it is analysed to estimate ϕb for the MS junction. The analysis of IPE signals under different bias conditions allows the evaluation of ϕb for both the front and back junctions, as well as for symmetric MSM devices.

Materials growth and characterization of thermoelectric and resistive switching devices

NASA Astrophysics Data System (ADS)

Norris, Kate J.

In the 74 years since diode rectifier based radar technology helped the allied forces win WWII, semiconductors have transformed the world we live in. From our smart phones to semiconductor-based energy conversion, semiconductors touch every aspect of our lives. With this thesis I hope to expand human knowledge of semiconductor thermoelectric devices and resistive switching devices through experimentation with materials growth and subsequent materials characterization. Metal organic chemical vapor deposition (MOCVD) was the primary method of materials growth utilized in these studies. Additionally, plasma enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD),ion beam sputter deposition, reactive sputter deposition and electron-beam (e-beam) evaporation were also used in this research for device fabrication. Scanning electron microscopy (SEM), Transmission electron microscopy (TEM), and Electron energy loss spectroscopy (EELS) were the primary characterization methods utilized for this research. Additional device and materials characterization techniques employed include: current-voltage measurements, thermoelectric measurements, x-ray diffraction (XRD), reflection absorption infra-red spectroscopy (RAIRS), atomic force microscopy (AFM), photoluminescence (PL), and raman spectroscopy. As society has become more aware of its impact on the planet and its limited resources, there has been a push toward developing technologies to sustainably produce the energy we need. Thermoelectric devices convert heat directly into electricity. Thermoelectric devices have the potential to save huge amounts of energy that we currently waste as heat, if we can make them cost-effective. Semiconducting thin films and nanowires appear to be promising avenues of research to attain this goal. Specifically, in this work we will explore the use of ErSb thin films as well as Si and InP nanowire networks for thermoelectric applications. First we will discuss the growth of erbium monoantimonide (ErSb) thin films with thermal conductivities close to or slightly smaller than the alloy limit of the two ternary alloy hosts. Second we consider an ex-situ monitoring technique based on glancing-angle infrared-absorption used to determine small amounts of erbium antimonide (ErSb) deposited on an indium antimonide (InSb) layer, a concept for thermoelectric devices to scatter phonons. Thirdly we begin our discussion of nanowires with the selective area growth (SAG) of single crystalline indium phosphide (InP) nanopillars on an array of template segments composed of a stack of gold and amorphous silicon. Our approach enables flexible and scalable nanofabrication using industrially proven tools and a wide range of semiconductors on various non-semiconductor substrates. Then we examine the use of graphene to promote the growth of nanowire networks on flexible copper foil leading to the testing of nanowire network devices for thermoelectric applications and the concept of multi-stage devices. We present the ability to tailor current-voltage characteristics to fit a desired application of thermoelectric devices by using nanowire networks as building blocks that can be stacked vertically or laterally. Furthermore, in the study of our flexible nanowire network multi-stage devices, we discovered the presence of nonlinear current-voltage characteristics and discuss how this feature could be utilized to increase efficiency for thermoelectric devices. This work indicates that with sufficient volume and optimized doping, flexible nanowire networks could be a low cost semiconductor solution to our wasted heat challenge. Resistive switching devices are two terminal electrical resistance switches that retain a state of internal resistance based on the history of applied voltage and current. The occurrence of reversible resistance switching has been widely studied in a variety of material systems for applications including nonvolatile memory, logic circuits, and neuromorphic computing. To this end we next we studied devices in each resistance state of a TaOx switch, which has previously shown high endurance and desirable switching behavior, to better understand the system in nanoscale devices. Finally, we will discuss a self-aligned NbO2 nano-cap demonstrated atop a TaO2.2 switching layer. The goal of this device is to create a nanoscale RRAM and selector device in a single stack. These results indicate that ternary resistive switching devices may be a beneficial method of combining behaviors of different material systems and that with proper engineering a self-aligned selector is possible.

System and method for floating-substrate passive voltage contrast

DOEpatents

Jenkins, Mark W [Albuquerque, NM; Cole, Jr., Edward I.; Tangyunyong, Paiboon [Albuquerque, NM; Soden, Jerry M [Placitas, NM; Walraven, Jeremy A [Albuquerque, NM; Pimentel, Alejandro A [Albuquerque, NM

2009-04-28

A passive voltage contrast (PVC) system and method are disclosed for analyzing ICs to locate defects and failure mechanisms. During analysis a device side of a semiconductor die containing the IC is maintained in an electrically-floating condition without any ground electrical connection while a charged particle beam is scanned over the device side. Secondary particle emission from the device side of the IC is detected to form an image of device features, including electrical vias connected to transistor gates or to other structures in the IC. A difference in image contrast allows the defects or failure mechanisms be pinpointed. Varying the scan rate can, in some instances, produce an image reversal to facilitate precisely locating the defects or failure mechanisms in the IC. The system and method are useful for failure analysis of ICs formed on substrates (e.g. bulk semiconductor substrates and SOI substrates) and other types of structures.

Exploration of Gas Discharges with GaAs, GaP and ZnSe Electrodes Under Atmospheric Pressure

NASA Astrophysics Data System (ADS)

Kurt, H. Hilal

2018-03-01

This work reports on the electrical and optical characterization of the atmospheric pressure glow discharge regimes for different semiconductor electrodes made of GaAs, GaP and ZnSe. The discharge cell is driven by DC feeding voltages at a wide pressure range of 0.66-120 kPa in argon and air media for different interelectrode gaps. The discharge phenomena including different stages of discharges such as glow and Townsend breakdown have been examined. In addition, the infrared sensitivities of the semiconducting materials are evaluated in the micro-discharge cell and discharge light emission measurements have been performed. The qualities of the semiconducting electrode samples can be determined by seeking the homogeneity of the discharge light emission for the optoelectronic device applications. Operation of optical devices under atmospheric pressures gives certain advantages for manufacturing of the devices including the material processing and surface treatment procedures. Besides, finite element analyses of the overall experimental system have been performed for the abovementioned semiconductors. The electron densities and potential patterns have been determined on the discharge cell plane between the electrodes. The findings have proven that the electron densities along the plasma cell depend on both the semiconductor type and plasma parameters.

Method for fabricating an interconnected array of semiconductor devices

DOEpatents

Grimmer, Derrick P.; Paulson, Kenneth R.; Gilbert, James R.

1989-10-10

Semiconductor layer and conductive layer formed on a flexible substrate, divided into individual devices and interconnected with one another in series by interconnection layers and penetrating terminals.

Magnetic-field-controlled reconfigurable semiconductor logic.

PubMed

Joo, Sungjung; Kim, Taeyueb; Shin, Sang Hoon; Lim, Ju Young; Hong, Jinki; Song, Jin Dong; Chang, Joonyeon; Lee, Hyun-Woo; Rhie, Kungwon; Han, Suk Hee; Shin, Kyung-Ho; Johnson, Mark

2013-02-07

Logic devices based on magnetism show promise for increasing computational efficiency while decreasing consumed power. They offer zero quiescent power and yet combine novel functions such as programmable logic operation and non-volatile built-in memory. However, practical efforts to adapt a magnetic device to logic suffer from a low signal-to-noise ratio and other performance attributes that are not adequate for logic gates. Rather than exploiting magnetoresistive effects that result from spin-dependent transport of carriers, we have approached the development of a magnetic logic device in a different way: we use the phenomenon of large magnetoresistance found in non-magnetic semiconductors in high electric fields. Here we report a device showing a strong diode characteristic that is highly sensitive to both the sign and the magnitude of an external magnetic field, offering a reversible change between two different characteristic states by the application of a magnetic field. This feature results from magnetic control of carrier generation and recombination in an InSb p-n bilayer channel. Simple circuits combining such elementary devices are fabricated and tested, and Boolean logic functions including AND, OR, NAND and NOR are performed. They are programmed dynamically by external electric or magnetic signals, demonstrating magnetic-field-controlled semiconductor reconfigurable logic at room temperature. This magnetic technology permits a new kind of spintronic device, characterized as a current switch rather than a voltage switch, and provides a simple and compact platform for non-volatile reconfigurable logic devices.

Lattice-mismatched GaInP LED devices and methods of fabricating same

DOEpatents

Mascarenhas, Angelo; Steiner, Myles A; Bhusal, Lekhnath; Zhang, Yong

2014-10-21

A method (100) of fabricating an LED or the active regions of an LED and an LED (200). The method includes growing, depositing or otherwise providing a bottom cladding layer (208) of a selected semiconductor alloy with an adjusted bandgap provided by intentionally disordering the structure of the cladding layer (208). A first active layer (202) may be grown above the bottom cladding layer (208) wherein the first active layer (202) is fabricated of the same semiconductor alloy, with however, a partially ordered structure. The first active layer (202) will also be fabricated to include a selected n or p type doping. The method further includes growing a second active layer (204) above the first active layer (202) where the second active layer (204) Is fabricated from the same semiconductor alloy.

Recent progress in tungsten oxides based memristors and their neuromorphological applications

NASA Astrophysics Data System (ADS)

Qu, Bo; Younis, Adnan; Chu, Dewei

2016-09-01

The advance in conventional silicon based semiconductor industry is now becoming indeterminacy as it still along the road of Moore's Law and concomitant problems associated with it are the emergence of a number of practical issues such as short channel effect. In terms of memory applications, it is generally believed that transistors based memory devices will approach to their scaling limits up to 2018. Therefore, one of the most prominent challenges today in semiconductor industry is the need of a new memory technology which is able to combine the best characterises of current devices. The resistive switching memories which are regarded as "memristors" thus gain great attentions thanks to their specific nonlinear electrical properties. More importantly, their behaviour resembles with the transmission characteristic of synapse in biology. Therefore, the research of synapses biomimetic devices based on memristor will certainly bring a great research prospect in studying synapse emulation as well as building artificial neural networks. Tungsten oxides (WO x ) exhibits many essential characteristics as a great candidate for memristive devices including: accredited endurance (over 105 cycles), stoichiometric flexibility, complimentary metal-oxide-semiconductor (CMOS) process compatibility and configurable properties including non-volatile rectification, memorization and learning functions. Herein, recent progress on Tungsten oxide based materials and its associating memory devices had been reviewed. The possible implementation of this material as a bio-inspired artificial synapse is also highlighted. The penultimate section summaries the current research progress for tungsten oxide based biological synapses and end up with several proposals that have been suggested for possible future developments.

Optical processing for semiconductor device fabrication

NASA Technical Reports Server (NTRS)

Sopori, Bhushan L.

1994-01-01

A new technique for semiconductor device processing is described that uses optical energy to produce local heating/melting in the vicinity of a preselected interface of the device. This process, called optical processing, invokes assistance of photons to enhance interface reactions such as diffusion and melting, as compared to the use of thermal heating alone. Optical processing is performed in a 'cold wall' furnace, and requires considerably lower energies than furnace or rapid thermal annealing. This technique can produce some device structures with unique properties that cannot be produced by conventional thermal processing. Some applications of optical processing involving semiconductor-metal interfaces are described.

New developments in power semiconductors

NASA Technical Reports Server (NTRS)

Sundberg, G. R.

1983-01-01

This paper represents an overview of some recent power semiconductor developments and spotlights new technologies that may have significant impact for aircraft electric secondary power. Primary emphasis will be on NASA-Lewis-supported developments in transistors, diodes, a new family of semiconductors, and solid-state remote power controllers. Several semiconductor companies that are moving into the power arena with devices rated at 400 V and 50 A and above are listed, with a brief look at a few devices.

Visible-wavelength semiconductor lasers and arrays

DOEpatents

Schneider, R.P. Jr.; Crawford, M.H.

1996-09-17

The visible semiconductor laser includes an InAlGaP active region surrounded by one or more AlGaAs layers on each side, with carbon as the sole p-type dopant. Embodiments of the invention are provided as vertical-cavity surface-emitting lasers (VCSELs) and as edge-emitting lasers (EELs). One or more transition layers comprised of a substantially indium-free semiconductor alloy such as AlAsP, AlGaAsP, or the like may be provided between the InAlGaP active region and the AlGaAS DBR mirrors or confinement layers to improve carrier injection and device efficiency by reducing any band offsets. Visible VCSEL devices fabricated according to the invention with a one-wavelength-thick (1{lambda}) optical cavity operate continuous-wave (cw) with lasing output powers up to 8 mW, and a peak power conversion efficiency of up to 11%. 5 figs.

Screening-Engineered Field-Effect Solar Cells

DTIC Science & Technology

2012-01-01

virtually any semiconductor, including the promising but hard-to- dope metal oxides, sulfides, and phosphides.3 Prototype SFPV devices have been...MIS interface. Unfortu- nately, MIS cells, though sporting impressive efficiencies,4−6 typically have short operating lifetimes due to surface state...instability at the MIS interface.7 Methods aimed at direct field- effect “ doping ” of semiconductors, in which the voltage is externally applied to a gate

Waveguide embedded plasmon laser with multiplexing and electrical modulation

DOEpatents

Ma, Ren-min; Zhang, Xiang

2017-08-29

This disclosure provides systems, methods, and apparatus related to nanometer scale lasers. In one aspect, a device includes a substrate, a line of metal disposed on the substrate, an insulating material disposed on the line of metal, and a line of semiconductor material disposed on the substrate and the insulating material. The line of semiconductor material overlaying the line of metal, disposed on the insulating material, forms a plasmonic cavity.

A simplified boron diffusion for preparing the silicon single crystal p-n junction as an educational device

NASA Astrophysics Data System (ADS)

Shiota, Koki; Kai, Kazuho; Nagaoka, Shiro; Tsuji, Takuto; Wakahara, Akihiro; Rusop, Mohamad

2016-07-01

The educational method which is including designing, making, and evaluating actual semiconductor devices with learning the theory is one of the best way to obtain the fundamental understanding of the device physics and to cultivate the ability to make unique ideas using the knowledge in the semiconductor device. In this paper, the simplified Boron thermal diffusion process using Sol-Gel material under normal air environment was proposed based on simple hypothesis and the feasibility of the reproducibility and reliability were investigated to simplify the diffusion process for making the educational devices, such as p-n junction, bipolar and pMOS devices. As the result, this method was successfully achieved making p+ region on the surface of the n-type silicon substrates with good reproducibility. And good rectification property of the p-n junctions was obtained successfully. This result indicates that there is a possibility to apply on the process making pMOS or bipolar transistors. It suggests that there is a variety of the possibility of the applications in the educational field to foster an imagination of new devices.

High temperature electronics applications in space exploration

NASA Technical Reports Server (NTRS)

Jurgens, R. F.

1981-01-01

The extension of the range of operating temperatures of electronic components and systems for planetary exploration is examined. In particular, missions which utilize balloon-borne instruments to study the Venusian and Jovian atmospheres are discussed. Semiconductor development and devices including power sources, ultrastable oscillators, transmitters, antennas, electromechanical devices, and deployment systems are addressed.

All oxide semiconductor-based bidirectional vertical p-n-p selectors for 3D stackable crossbar-array electronics

PubMed Central

Bae, Yoon Cheol; Lee, Ah Rahm; Baek, Gwang Ho; Chung, Je Bock; Kim, Tae Yoon; Park, Jea Gun; Hong, Jin Pyo

2015-01-01

Three-dimensional (3D) stackable memory devices including nano-scaled crossbar array are central for the realization of high-density non-volatile memory electronics. However, an essential sneak path issue affecting device performance in crossbar array remains a bottleneck and a grand challenge. Therefore, a suitable bidirectional selector as a two-way switch is required to facilitate a major breakthrough in the 3D crossbar array memory devices. Here, we show the excellent selectivity of all oxide p-/n-type semiconductor-based p-n-p open-based bipolar junction transistors as selectors in crossbar memory array. We report that bidirectional nonlinear characteristics of oxide p-n-p junctions can be highly enhanced by manipulating p-/n-type oxide semiconductor characteristics. We also propose an associated Zener tunneling mechanism that explains the unique features of our p-n-p selector. Our experimental findings are further extended to confirm the profound functionality of oxide p-n-p selectors integrated with several bipolar resistive switching memory elements working as storage nodes. PMID:26289565

Semiconductor devices incorporating multilayer interference regions

DOEpatents

Biefeld, Robert M.; Drummond, Timothy J.; Gourley, Paul L.; Zipperian, Thomas E.

1990-01-01

A semiconductor high reflector comprising a number of thin alternating layers of semiconductor materials is electrically tunable and may be used as a temperature insensitive semiconductor laser in a Fabry-Perot configuration.

Multi-harmonic quantum dot optomechanics in fused LiNbO3-(Al)GaAs hybrids

NASA Astrophysics Data System (ADS)

Nysten, Emeline D. S.; Huo, Yong Heng; Yu, Hailong; Song, Guo Feng; Rastelli, Armando; Krenner, Hubert J.

2017-11-01

We fabricated an acousto-optic semiconductor hybrid device for strong optomechanical coupling of individual quantum emitters and a surface acoustic wave. Our device comprises of a surface acoustic wave chip made from highly piezoelectric LiNbO3 and a GaAs-based semiconductor membrane with an embedded layer of quantum dots. Employing multi-harmonic transducers, we generated sound waves on LiNbO3 over a wide range of radio frequencies. We monitored their coupling to and propagation across the semiconductor membrane, both in the electrical and optical domain. We demonstrate the enhanced optomechanical tuning of the embedded quantum dots with increasing frequencies. This effect was verified by finite element modelling of our device geometry and attributed to an increased localization of the acoustic field within the semiconductor membrane. For moderately high acoustic frequencies, our simulations predict strong optomechanical coupling, making our hybrid device ideally suited for applications in semiconductor based quantum acoustics.

Thin film photovoltaic device

DOEpatents

Catalano, A.W.; Bhushan, M.

1982-08-03

A thin film photovoltaic solar cell which utilizes a zinc phosphide semiconductor is of the homojunction type comprising an n-type conductivity region forming an electrical junction with a p-type region, both regions consisting essentially of the same semiconductor material. The n-type region is formed by treating zinc phosphide with an extrinsic dopant such as magnesium. The semiconductor is formed on a multilayer substrate which acts as an opaque contact. Various transparent contacts may be used, including a thin metal film of the same chemical composition as the n-type dopant or conductive oxides or metal grids. 5 figs.

Digital Inverter Amine Sensing via Synergistic Responses by n and p Organic Semiconductors.

PubMed

Tremblay, Noah J; Jung, Byung Jun; Breysse, Patrick; Katz, Howard E

2011-11-22

Chemiresistors and sensitive OFETs have been substantially developed as cheap, scalable, and versatile sensing platforms. While new materials are expanding OFET sensing capabilities, the device architectures have changed little. Here we report higher order logic circuits utilizing OFETs sensitive to amine vapors. The circuits depend on the synergistic responses of paired p- and n-channel organic semiconductors, including an unprecedented analyte-induced current increase by the n-channel semiconductor. This represents the first step towards 'intelligent sensors' that utilize analog signal changes in sensitive OFETs to produce direct digital readouts suitable for further logic operations.

Digital Inverter Amine Sensing via Synergistic Responses by n and p Organic Semiconductors

PubMed Central

Tremblay, Noah J.; Jung, Byung Jun; Breysse, Patrick; Katz, Howard E.

2013-01-01

Chemiresistors and sensitive OFETs have been substantially developed as cheap, scalable, and versatile sensing platforms. While new materials are expanding OFET sensing capabilities, the device architectures have changed little. Here we report higher order logic circuits utilizing OFETs sensitive to amine vapors. The circuits depend on the synergistic responses of paired p- and n-channel organic semiconductors, including an unprecedented analyte-induced current increase by the n-channel semiconductor. This represents the first step towards ‘intelligent sensors’ that utilize analog signal changes in sensitive OFETs to produce direct digital readouts suitable for further logic operations. PMID:23754969

Air-gating and chemical-gating in transistors and sensing devices made from hollow TiO2 semiconductor nanotubes

NASA Astrophysics Data System (ADS)

Alivov, Yahya; Funke, Hans; Nagpal, Prashant

2015-07-01

Rapid miniaturization of electronic devices down to the nanoscale, according to Moore’s law, has led to some undesirable effects like high leakage current in transistors, which can offset additional benefits from scaling down. Development of three-dimensional transistors, by spatial extension in the third dimension, has allowed higher contact area with a gate electrode and better control over conductivity in the semiconductor channel. However, these devices do not utilize the large surface area and interfaces for new electronic functionality. Here, we demonstrate air gating and chemical gating in hollow semiconductor nanotube devices and highlight the potential for development of novel transistors that can be modulated using channel bias, gate voltage, chemical composition, and concentration. Using chemical gating, we reversibly altered the conductivity of nanoscaled semiconductor nanotubes (10-500 nm TiO2 nanotubes) by six orders of magnitude, with a tunable rectification factor (ON/OFF ratio) ranging from 1-106. While demonstrated air- and chemical-gating speeds were slow here (˜seconds) due to the mechanical-evacuation rate and size of our chamber, the small nanoscale volume of these hollow semiconductors can enable much higher switching speeds, limited by the rate of adsorption/desorption of molecules at semiconductor interfaces. These chemical-gating effects are completely reversible, additive between different chemical compositions, and can enable semiconductor nanoelectronic devices for ‘chemical transistors’, ‘chemical diodes’, and very high-efficiency sensing applications.

Methods of manipulating stressed epistructures

DOEpatents

Wanlass, Mark W

2014-04-08

A method of processing an epistructure or processing a semiconductor device including associating a conformal and flexible handle with the epistructure and removing the epistructure and handle as a unit from the parent substrate. The method further includes causing the epistructure and handle unit to conform to a shape that differs from the shape the epistructure otherwise inherently assumes upon removal from the parent substrate. A device prepared according to the disclosed methods.

Semiconductor devices incorporating multilayer interference regions

DOEpatents

Biefeld, R.M.; Drummond, T.J.; Gourley, P.L.; Zipperian, T.E.

1987-08-31

A semiconductor high reflector comprising a number of thin alternating layers of semiconductor materials is electrically tunable and may be used as a temperature insensitive semiconductor laser in a Fabry-Perot configuration. 8 figs.

77 FR 60721 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Notice of...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-10-04

... Circuit Devices and Products Containing Same; Notice of Commission Determination Not To Review an Initial... public record for this investigation may be viewed on the Commission's electronic docket (EDIS) at http... certain semiconductor integrated circuit devices and products containing same by reason of infringement of...

77 FR 19032 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same Notice of Receipt...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-03-29

... INTERNATIONAL TRADE COMMISSION [DN 2888] Certain Semiconductor Integrated Circuit Devices and... Integrated Circuit Devices and Products Containing Same, DN 2888; the Commission is soliciting comments on... Commission's electronic docket (EDIS) at http://edis.usitc.gov , and will be available for inspection during...

Self-similar and fractal design for stretchable electronics

DOEpatents

Rogers, John A.; Fan, Jonathan; Yeo, Woon-Hong; Su, Yewang; Huang, Yonggang; Zhang, Yihui

2017-04-04

The present invention provides electronic circuits, devices and device components including one or more stretchable components, such as stretchable electrical interconnects, electrodes and/or semiconductor components. Stretchability of some of the present systems is achieved via a materials level integration of stretchable metallic or semiconducting structures with soft, elastomeric materials in a configuration allowing for elastic deformations to occur in a repeatable and well-defined way. The stretchable device geometries and hard-soft materials integration approaches of the invention provide a combination of advance electronic function and compliant mechanics supporting a broad range of device applications including sensing, actuation, power storage and communications.

Radiation Testing, Characterization and Qualification Challenges for Modern Microelectronics and Photonics Devices and Technologies

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Cohn, Lewis M.

2008-01-01

At GOMAC 2007, we discussed a selection of the challenges for radiation testing of modern semiconductor devices focusing on state-of-the-art memory technologies. This included FLASH non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs). In this presentation, we extend this discussion in device packaging and complexity as well as single event upset (SEU) mechanisms using several technology areas as examples including: system-on-a-chip (SOC) devices and photonic or fiber optic systems. The underlying goal is intended to provoke thought for understanding the limitations and interpretation of radiation testing results.

Power enhanced frequency conversion system

NASA Technical Reports Server (NTRS)

Sanders, Steven (Inventor); Lang, Robert J. (Inventor); Waarts, Robert G. (Inventor)

2001-01-01

A frequency conversion system includes at least one source providing a first near-IR wavelength output including a gain medium for providing high power amplification, such as double clad fiber amplifier, a double clad fiber laser or a semiconductor tapered amplifier to enhance the power output level of the near-IR wavelength output. The NFM device may be a difference frequency mixing (DFM) device or an optical parametric oscillation (OPO) device. Pump powers are gain enhanced by the addition of a rare earth amplifier or oscillator, or a Ra-man/Brillouin amplifier or oscillator between the high power source and the NFM device.

Semiconductor technology program. Progress briefs

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1979-01-01

The current status of NBS work on measurement technology for semiconductor materials, process control, and devices is reported. Results of both in-house and contract research are covered. Highlighted activities include modeling of diffusion processes, analysis of model spreading resistance data, and studies of resonance ionization spectroscopy, resistivity-dopant density relationships in p-type silicon, deep level measurements, photoresist sensitometry, random fault measurements, power MOSFET thermal characteristics, power transistor switching characteristics, and gross leak testing. New and selected on-going projects are described. Compilations of recent publications and publications in press are included.

Insulator Charging in RF MEMS Capacitive Switches

DTIC Science & Technology

2005-06-01

and Simulations,” Journal of Microelectromechanical Systems, 8: 208-217 (June 1999). 5. Neaman , Donald. Semiconductor Physics & Devices. Boston...227-230 (2001). 5. Sze, S.M. Semiconductor Devices: Physics and Technology. New York: Wiley, 1985. 6. Neaman , Donald A. Semiconductor Physics...Radiation Response of Hafnium-Silicate Capacitors,” IEEE Transactions on Nuclear Science, 49: 3191-3196 (December 2002). 3. Neaman , D.A

Developments in space power components for power management and distribution

NASA Technical Reports Server (NTRS)

Renz, D. D.

1984-01-01

Advanced power electronic components development for space applications is discussed. The components described include transformers, inductors, semiconductor devices such as transistors and diodes, remote power controllers, and transmission lines.

Charge dissipative dielectric for cryogenic devices

NASA Technical Reports Server (NTRS)

Cantor, Robin Harold (Inventor); Hall, John Addison (Inventor)

2007-01-01

A Superconducting Quantum Interference Device (SQUID) is disclosed comprising a pair of resistively shunted Josephson junctions connected in parallel within a superconducting loop and biased by an external direct current (dc) source. The SQUID comprises a semiconductor substrate and at least one superconducting layer. The metal layer(s) are separated by or covered with a semiconductor material layer having the properties of a conductor at room temperature and the properties of an insulator at operating temperatures (generally less than 100 Kelvins). The properties of the semiconductor material layer greatly reduces the risk of electrostatic discharge that can damage the device during normal handling of the device at room temperature, while still providing the insulating properties desired to allow normal functioning of the device at its operating temperature. A method of manufacturing the SQUID device is also disclosed.

Anisotropy-based crystalline oxide-on-semiconductor material

DOEpatents

McKee, Rodney Allen; Walker, Frederick Joseph

2000-01-01

A semiconductor structure and device for use in a semiconductor application utilizes a substrate of semiconductor-based material, such as silicon, and a thin film of a crystalline oxide whose unit cells are capable of exhibiting anisotropic behavior overlying the substrate surface. Within the structure, the unit cells of the crystalline oxide are exposed to an in-plane stain which influences the geometric shape of the unit cells and thereby arranges a directional-dependent quality of the unit cells in a predisposed orientation relative to the substrate. This predisposition of the directional-dependent quality of the unit cells enables the device to take beneficial advantage of characteristics of the structure during operation. For example, in the instance in which the crystalline oxide of the structure is a perovskite, a spinel or an oxide of similarly-related cubic structure, the structure can, within an appropriate semiconductor device, exhibit ferroelectric, piezoelectric, pyroelectric, electro-optic, ferromagnetic, antiferromagnetic, magneto-optic or large dielectric properties that synergistically couple to the underlying semiconductor substrate.

Suppressing molecular vibrations in organic semiconductors by inducing strain

PubMed Central

Kubo, Takayoshi; Häusermann, Roger; Tsurumi, Junto; Soeda, Junshi; Okada, Yugo; Yamashita, Yu; Akamatsu, Norihisa; Shishido, Atsushi; Mitsui, Chikahiko; Okamoto, Toshihiro; Yanagisawa, Susumu; Matsui, Hiroyuki; Takeya, Jun

2016-01-01

Organic molecular semiconductors are solution processable, enabling the growth of large-area single-crystal semiconductors. Improving the performance of organic semiconductor devices by increasing the charge mobility is an ongoing quest, which calls for novel molecular and material design, and improved processing conditions. Here we show a method to increase the charge mobility in organic single-crystal field-effect transistors, by taking advantage of the inherent softness of organic semiconductors. We compress the crystal lattice uniaxially by bending the flexible devices, leading to an improved charge transport. The mobility increases from 9.7 to 16.5 cm2 V−1 s−1 by 70% under 3% strain. In-depth analysis indicates that compressing the crystal structure directly restricts the vibration of the molecules, thus suppresses dynamic disorder, a unique mechanism in organic semiconductors. Since strain can be easily induced during the fabrication process, we expect our method to be exploited to build high-performance organic devices. PMID:27040501

Suppressing molecular vibrations in organic semiconductors by inducing strain.

PubMed

Kubo, Takayoshi; Häusermann, Roger; Tsurumi, Junto; Soeda, Junshi; Okada, Yugo; Yamashita, Yu; Akamatsu, Norihisa; Shishido, Atsushi; Mitsui, Chikahiko; Okamoto, Toshihiro; Yanagisawa, Susumu; Matsui, Hiroyuki; Takeya, Jun

2016-04-04

Organic molecular semiconductors are solution processable, enabling the growth of large-area single-crystal semiconductors. Improving the performance of organic semiconductor devices by increasing the charge mobility is an ongoing quest, which calls for novel molecular and material design, and improved processing conditions. Here we show a method to increase the charge mobility in organic single-crystal field-effect transistors, by taking advantage of the inherent softness of organic semiconductors. We compress the crystal lattice uniaxially by bending the flexible devices, leading to an improved charge transport. The mobility increases from 9.7 to 16.5 cm(2) V(-1) s(-1) by 70% under 3% strain. In-depth analysis indicates that compressing the crystal structure directly restricts the vibration of the molecules, thus suppresses dynamic disorder, a unique mechanism in organic semiconductors. Since strain can be easily induced during the fabrication process, we expect our method to be exploited to build high-performance organic devices.

EDITORIAL The 23rd Nordic Semiconductor Meeting The 23rd Nordic Semiconductor Meeting

NASA Astrophysics Data System (ADS)

Ólafsson, Sveinn; Sveinbjörnsson, Einar

2010-12-01

A Nordic Semiconductor Meeting is held every other year with the venue rotating amongst the Nordic countries of Denmark, Finland, Iceland, Norway and Sweden. The focus of these meetings remains 'original research and science being carried out on semiconductor materials, devices and systems'. Reports on industrial activity have usually featured. The topics have ranged from fundamental research on point defects in a semiconductor to system architecture of semiconductor electronic devices. Proceedings from these events are regularly published as a topical issue of Physica Scripta. All of the papers in this topical issue have undergone critical peer review and we wish to thank the reviewers and the authors for their cooperation, which has been instrumental in meeting the high scientific standards and quality of the series. This meeting of the 23rd Nordic Semiconductor community, NSM 2009, was held at Háskólatorg at the campus of the University of Iceland, Reykjavik, Iceland, 14-17 June 2009. Support was provided by the University of Iceland. Almost 50 participants presented a broad range of topics covering semiconductor materials and devices as well as related material science interests. The conference provided a forum for Nordic and international scientists to present and discuss new results and ideas concerning the fundamentals and applications of semiconductor materials. The meeting aim was to advance the progress of Nordic science and thus aid in future worldwide technological advances concerning technology, education, energy and the environment. Topics Theory and fundamental physics of semiconductors Emerging semiconductor technologies (for example III-V integration on Si, novel Si devices, graphene) Energy and semiconductors Optical phenomena and optical devices MEMS and sensors Program 14 June Registration 13:00-17:00 15 June Meeting program 09:30-17:00 and Poster Session I 16 June Meeting program 09:30-17:00 and Poster Session II 17 June Excursion and dinner on Icelandic National Day In connection with the conference, a summer school for 40 research students was organized by the Nordic LENS network. The summer school took place in Reykjavik on 11-14 June. For more information on the school please visit the website. The next Nordic Semiconductor meeting, NSM 2011, is scheduled to take place in Aarhus, Denmark, 19-22 June 2011. A full participant list is available in the PDF of this article.

Self bleaching photoelectrochemical-electrochromic device

DOEpatents

Bechinger, Clemens S.; Gregg, Brian A.

2002-04-09

A photoelectrochemical-electrochromic device comprising a first transparent electrode and a second transparent electrode in parallel, spaced relation to each other. The first transparent electrode is electrically connected to the second transparent electrode. An electrochromic material is applied to the first transparent electrode and a nanoporous semiconductor film having a dye adsorbed therein is applied to the second transparent electrode. An electrolyte layer contacts the electrochromic material and the nanoporous semiconductor film. The electrolyte layer has a redox couple whereby upon application of light, the nanoporous semiconductor layer dye absorbs the light and the redox couple oxidizes producing an electric field across the device modulating the effective light transmittance through the device.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mascarenhas, Angelo

Isoelectronic co-doping of semiconductor compounds and alloys with acceptors and deep donors is used to decrease bandgap, to increase concentration of the dopant constituents in the resulting alloys, and to increase carrier mobilities lifetimes. For example, Group III-V compounds and alloys, such as GaAs and GaP, are isoelectronically co-doped with, for example, B and Bi, to customize solar cells, and other semiconductor devices. Isoelectronically co-doped Group II-VI compounds and alloys are also included.

Contributive research in compound semiconductor material and related devices

NASA Astrophysics Data System (ADS)

Twist, James R.

1988-05-01

The objective of this program was to provide the Electronic Device Branch (AFWAL/AADR) with the support needed to perform state of the art electronic device research. In the process of managing and performing on the project, UES has provided a wide variety of scientific and engineering talent who worked in-house for the Avionics Laboratory. These personnel worked on many different types of research programs from gas phase microwave driven lasers, CVD and MOCVD of electronic materials to Electronic Device Technology for new devices. The fields of research included MBE and theoretical research in this novel growth technique. Much of the work was slanted towards the rapidly developing technology of GaAs and the general thrust of the research that these tasks started has remained constant. This work was started because the Avionics Laboratory saw a chance to advance the knowledge and level of the current device technology by working in the compounds semiconductor field. UES is pleased to have had the opportunity to perform on this program and is looking forward to future efforts with the Avionics Laboratory.

Lanthanum Gadolinium Oxide: A New Electronic Device Material for CMOS Logic and Memory Devices

PubMed Central

Pavunny, Shojan P.; Scott, James F.; Katiyar, Ram S.

2014-01-01

A comprehensive study on the ternary dielectric, LaGdO3, synthesized and qualified in our laboratory as a novel high-k dielectric material for logic and memory device applications in terms of its excellent features that include a high linear dielectric constant (k) of ~22 and a large energy bandgap of ~5.6 eV, resulting in sufficient electron and hole band offsets of ~2.57 eV and ~1.91 eV, respectively, on silicon, good thermal stability with Si and lower gate leakage current densities within the International Technology Roadmap for Semiconductors (ITRS) specified limits at the sub-nanometer electrical functional thickness level, which are desirable for advanced complementary metal-oxide-semiconductor (CMOS), bipolar (Bi) and BiCMOS chips applications, is presented in this review article. PMID:28788589

Heating device for semiconductor wafers

DOEpatents

Vosen, Steven R.

1999-01-01

An apparatus for heat treating semiconductor wafers is disclosed. The apparatus includes a heating device which contains an assembly of light energy sources for emitting light energy onto a wafer. In particular, the light energy sources are positioned such that many different radial heating zones are created on a wafer being heated. For instance, in one embodiment, the light energy sources form a spiral configuration. In an alternative embodiment, the light energy sources appear to be randomly dispersed with respect to each other so that no discernable pattern is present. In a third alternative embodiment of the present invention, the light energy sources form concentric rings. Tuning light sources are then placed in between the concentric rings of light.

Heating device for semiconductor wafers

DOEpatents

Vosen, S.R.

1999-07-27

An apparatus for heat treating semiconductor wafers is disclosed. The apparatus includes a heating device which contains an assembly of light energy sources for emitting light energy onto a wafer. In particular, the light energy sources are positioned such that many different radial heating zones are created on a wafer being heated. For instance, in one embodiment, the light energy sources form a spiral configuration. In an alternative embodiment, the light energy sources appear to be randomly dispersed with respect to each other so that no discernible pattern is present. In a third alternative embodiment of the present invention, the light energy sources form concentric rings. Tuning light sources are then placed in between the concentric rings of light. 4 figs.

Silicon carbide, a semiconductor for space power electronics

NASA Technical Reports Server (NTRS)

Powell, J. Anthony; Matus, Lawrence G.

1991-01-01

After many years of promise as a high temperature semiconductor, silicon carbide (SiC) is finally emerging as a useful electronic material. Recent significant progress that has led to this emergence has been in the areas of crystal growth and device fabrication technology. High quality single-crystal SiC wafers, up to 25 mm in diameter, can now be produced routinely from boules grown by a high temperature (2700 K) sublimation process. Device fabrication processes, including chemical vapor deposition (CVD), in situ doping during CVD, reactive ion etching, oxidation, metallization, etc. have been used to fabricate p-n junction diodes and MOSFETs. The diode was operated to 870 K and the MOSFET to 770 K.

Enhanced Resonant Tunneling in Symmetric 2D Semiconductor Vertical Heterostructure Transistors.

PubMed

Campbell, Philip M; Tarasov, Alexey; Joiner, Corey A; Ready, William J; Vogel, Eric M

2015-05-26

Tunneling transistors with negative differential resistance have widespread appeal for both digital and analog electronics. However, most attempts to demonstrate resonant tunneling devices, including graphene-insulator-graphene structures, have resulted in low peak-to-valley ratios, limiting their application. We theoretically demonstrate that vertical heterostructures consisting of two identical monolayer 2D transition-metal dichalcogenide semiconductor electrodes and a hexagonal boron nitride barrier result in a peak-to-valley ratio several orders of magnitude higher than the best that can be achieved using graphene electrodes. The peak-to-valley ratio is large even at coherence lengths on the order of a few nanometers, making these devices appealing for nanoscale electronics.

Ultra-thin ohmic contacts for p-type nitride light emitting devices

DOEpatents

Raffetto, Mark [Raleigh, NC; Bharathan, Jayesh [Cary, NC; Haberern, Kevin [Cary, NC; Bergmann, Michael [Chapel Hill, NC; Emerson, David [Chapel Hill, NC; Ibbetson, James [Santa Barbara, CA; Li, Ting [Ventura, CA

2012-01-03

A semiconductor based Light Emitting Device (LED) can include a p-type nitride layer and a metal ohmic contact, on the p-type nitride layer. The metal ohmic contact can have an average thickness of less than about 25 .ANG. and a specific contact resistivity less than about 10.sup.-3 ohm-cm.sup.2.

Deep UV LEDs

NASA Astrophysics Data System (ADS)

Han, Jung; Amano, Hiroshi; Schowalter, Leo

2014-06-01

Deep ultraviolet (DUV) photons interact strongly with a broad range of chemical and biological molecules; compact DUV light sources could enable a wide range of applications in chemi/bio-sensing, sterilization, agriculture, and industrial curing. The much shorter wavelength also results in useful characteristics related to optical diffraction (for lithography) and scattering (non-line-of-sight communication). The family of III-N (AlGaInN) compound semiconductors offers a tunable energy gap from infrared to DUV. While InGaN-based blue light emitters have been the primary focus for the obvious application of solid state lighting, there is a growing interest in the development of efficient UV and DUV light-emitting devices. In the past few years we have witnessed an increasing investment from both government and industry sectors to further the state of DUV light-emitting devices. The contributions in Semiconductor Science and Technology 's special issue on DUV devices provide an up-to-date snapshot covering many relevant topics in this field. Given the expected importance of bulk AlN substrate in DUV technology, we are pleased to include a review article by Hartmann et al on the growth of AlN bulk crystal by physical vapour transport. The issue of polarization field within the deep ultraviolet LEDs is examined in the article by Braut et al. Several commercial companies provide useful updates in their development of DUV emitters, including Nichia (Fujioka et al ), Nitride Semiconductors (Muramoto et al ) and Sensor Electronic Technology (Shatalov et al ). We believe these articles will provide an excellent overview of the state of technology. The growth of AlGaN heterostructures by molecular beam epitaxy, in contrast to the common organo-metallic vapour phase epitaxy, is discussed by Ivanov et al. Since hexagonal boron nitride (BN) has received much attention as both a UV and a two-dimensional electronic material, we believe it serves readers well to include the article by Jiang et al on using BN for UV devices; potentially as a p-type wide band gap semiconductor contact. Finally, an in-depth discussion of one DUV application in defense, the non-line-of-sight (NLOS) communication, is given by Drost and Sadler. Overall, we believe that this special issue of Semiconductor Science and Technology provides a useful overview of the state-of-art in the field on DUV materials and devices. In view of the rapidly growing interest in this field, the demonstrated enhanced device performance, and the wide range of applications, this special issue can be considered a very timely contribution. Finally, we would like to thank the IOP editorial staff, in particular Alice Malhador, for their support and also like to thank all contributors for their efforts to make this special issue possible.

Hot carrier-enhanced interlayer electron-hole pair multiplication in 2D semiconductor heterostructure photocells

NASA Astrophysics Data System (ADS)

Barati, Fatemeh; Grossnickle, Max; Su, Shanshan; Lake, Roger K.; Aji, Vivek; Gabor, Nathaniel M.

2017-12-01

Strong electronic interactions can result in novel particle-antiparticle (electron-hole, e-h) pair generation effects, which may be exploited to enhance the photoresponse of nanoscale optoelectronic devices. Highly efficient e-h pair multiplication has been demonstrated in several important nanoscale systems, including nanocrystal quantum dots, carbon nanotubes and graphene. The small Fermi velocity and nonlocal nature of the effective dielectric screening in ultrathin layers of transition-metal dichalcogenides (TMDs) indicates that e-h interactions are very strong, so high-efficiency generation of e-h pairs from hot electrons is expected. However, such e-h pair multiplication has not been observed in 2D TMD devices. Here, we report the highly efficient multiplication of interlayer e-h pairs in 2D semiconductor heterostructure photocells. Electronic transport measurements of the interlayer I-VSD characteristics indicate that layer-indirect e-h pairs are generated by hot-electron impact excitation at temperatures near T = 300 K. By exploiting this highly efficient interlayer e-h pair multiplication process, we demonstrate near-infrared optoelectronic devices that exhibit 350% enhancement of the optoelectronic responsivity at microwatt power levels. Our findings, which demonstrate efficient carrier multiplication in TMD-based optoelectronic devices, make 2D semiconductor heterostructures viable for a new class of ultra-efficient photodetectors based on layer-indirect e-h excitations.

Electrical properties of AlGaN/GaN HEMTs in stretchable geometries

NASA Astrophysics Data System (ADS)

Tompkins, R. P.; Mahaboob, I.; Shahedipour-Sandvik, F.; Lazarus, N.

2017-10-01

Many biological materials are naturally soft and stretchable, far more so than crystalline semiconductors. Creating systems that can be placed directly on a surface such as human skin has required new approaches in electronic device design and materials, a field known as stretchable electronics. One common method for fabricating a highly brittle semiconductor device able to survive tens of percent strain is to incorporate stress relief structures ('waves'). Although the mechanical advantages of this approach are well known, the effects on the electrical behavior of a device such as a transistor compared to a more traditional geometry have not been studied. Here, AlGaN/GaN high electron mobility transistors (HEMTs) grown on rigid sapphire substrates were fabricated in a common wavy geometry, a sinusoid, with dimensions similar to those used in stretchable electronics. The study analyzes control parameters available to the designer including gate location along the sinusoid, angle the source-drain contacts make with the gate, as well as variation of the gate length at the peak of the sinusoid. Common electrical parameters such as saturation current density, threshold voltage, and transconductance were compared between the sinusoidal and conventional straight geometries and results found to fall to within experimental uncertainty, suggesting shifting to a stretchable geometry is possible without appreciably degrading semiconductor device performance.

Optoelectronic Devices and Materials

NASA Astrophysics Data System (ADS)

Sweeney, Stephen; Adams, Alfred

Unlike the majority of electronic devices, which are silicon based, optoelectronic devices are predominantly made using III-V semiconductor compounds such as GaAs, InP, GaN and GaSb and their alloys due to their direct band gap. Understanding the properties of these materials has been of vital importance in the development of optoelectronic devices. Since the first demonstration of a semiconductor laser in the early 1960s, optoelectronic devices have been produced in their millions, pervading our everyday lives in communications, computing, entertainment, lighting and medicine. It is perhaps their use in optical-fibre communications that has had the greatest impact on humankind, enabling high-quality and inexpensive voice and data transmission across the globe. Optical communications spawned a number of developments in optoelectronics, leading to devices such as vertical-cavity surface-emitting lasers, semiconductor optical amplifiers, optical modulators and avalanche photodiodes. In this chapter we discuss the underlying theory of operation of the most important optoelectronic devices. The influence of carrier-photon interactions is discussed in the context of producing efficient emitters and detectors. Finally we discuss how the semiconductor band structure can be manipulated to enhance device properties using quantum confinement and strain effects, and how the addition of dilute amounts of elements such as nitrogen is having a profound effect on the next generation of optoelectronic devices.

Space station power semiconductor package

NASA Technical Reports Server (NTRS)

Balodis, Vilnis; Berman, Albert; Devance, Darrell; Ludlow, Gerry; Wagner, Lee

1987-01-01

A package of high-power switching semiconductors for the space station have been designed and fabricated. The package includes a high-voltage (600 volts) high current (50 amps) NPN Fast Switching Power Transistor and a high-voltage (1200 volts), high-current (50 amps) Fast Recovery Diode. The package features an isolated collector for the transistors and an isolated anode for the diode. Beryllia is used as the isolation material resulting in a thermal resistance for both devices of .2 degrees per watt. Additional features include a hermetical seal for long life -- greater than 10 years in a space environment. Also, the package design resulted in a low electrical energy loss with the reduction of eddy currents, stray inductances, circuit inductance, and capacitance. The required package design and device parameters have been achieved. Test results for the transistor and diode utilizing the space station package is given.

Release strategies for making transferable semiconductor structures, devices and device components

DOEpatents

Rogers, John A; Nuzzo, Ralph G; Meitl, Matthew; Ko, Heung Cho; Yoon, Jongseung; Menard, Etienne; Baca, Alfred J

2014-11-25

Provided are methods for making a device or device component by providing a multilayer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.

Release strategies for making transferable semiconductor structures, devices and device components

DOEpatents

Rogers, John A [Champaign, IL; Nuzzo, Ralph G [Champaign, IL; Meitl, Matthew [Raleigh, NC; Ko, Heung Cho [Urbana, IL; Yoon, Jongseung [Urbana, IL; Menard, Etienne [Durham, NC; Baca, Alfred J [Urbana, IL

2011-04-26

Provided are methods for making a device or device component by providing a multilayer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.

Release strategies for making transferable semiconductor structures, devices and device components

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rogers, John A.; Nuzzo, Ralph G.; Meitl, Matthew

2016-05-24

Provided are methods for making a device or device component by providing a multi layer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.

Spectroscopic Studies of the Electronic Structure of Metal-Semiconductor and Vacuum-Semiconductor Interfaces.

DTIC Science & Technology

1982-12-31

interfaces which are of importance in such semi- conductor devices as MOSFETS, CCD devices, photovoltaic devices, DD I jAN 73 1473 EDITION OF INOV 66 if...interfaces is interesting for the study of electrolytic cells . Our photoemission study reveals for the first time how the electronic structure of water

Semiconductor quantum wells: old technology or new device functionalities

NASA Astrophysics Data System (ADS)

Kolbas, R. M.; Lo, Y. C.; Hsieh, K. Y.; Lee, J. H.; Reed, F. E.; Zhang, D.; Zhang, T.

2009-08-01

The introduction of semiconductor quantum wells in the 1970s created a revolution in optoelectronic devices. A large fraction of today's lasers and light emitting diodes are based on quantum wells. It has been more than 30 years but novel ideas and new device functions have recently been demonstrated using quantum well heterostructures. This paper provides a brief overview of the subject and then focuses on the physics of quantum wells that the lead author believes holds the key to new device functionalities. The data and figures contained within are not new. They have been assembled from 30 years of work. They are presented to convey the story of why quantum wells continue to fuel the engine that drives the semiconductor optoelectronic business. My apologies in advance to my students and co-workers that contributed so much that could not be covered in such a short manuscript. The explanations provided are based on the simplest models possible rather than the very sophisticated mathematical models that have evolved over many years. The intended readers are those involved with semiconductor optoelectronic devices and are interested in new device possibilities.

Optoelectronic semiconductor device and method of fabrication

DOEpatents

Cui, Yi; Zhu, Jia; Hsu, Ching-Mei; Fan, Shanhui; Yu, Zongfu

2014-11-25

An optoelectronic device comprising an optically active layer that includes a plurality of domes is presented. The plurality of domes is arrayed in two dimensions having a periodicity in each dimension that is less than or comparable with the shortest wavelength in a spectral range of interest. By virtue of the plurality of domes, the optoelectronic device achieves high performance. A solar cell having high energy-conversion efficiency, improved absorption over the spectral range of interest, and an improved acceptance angle is presented as an exemplary device.

Surface breakdown igniter for mercury arc devices

DOEpatents

Bayless, John R.

1977-01-01

Surface breakdown igniter comprises a semiconductor of medium resistivity which has the arc device cathode as one electrode and has an igniter anode electrode so that when voltage is applied between the electrodes a spark is generated when electrical breakdown occurs over the surface of the semiconductor. The geometry of the igniter anode and cathode electrodes causes the igniter discharge to be forced away from the semiconductor surface.

Photovoltaic devices comprising zinc stannate buffer layer and method for making

DOEpatents

Wu, Xuanzhi; Sheldon, Peter; Coutts, Timothy J.

2001-01-01

A photovoltaic device has a buffer layer zinc stannate Zn.sub.2 SnO.sub.4 disposed between the semiconductor junction structure and the transparent conducting oxide (TCO) layer to prevent formation of localized junctions with the TCO through a thin window semiconductor layer, to prevent shunting through etched grain boundaries of semiconductors, and to relieve stresses and improve adhesion between these layers.

Semiconductor Materials for High Frequency Solid State Sources.

DTIC Science & Technology

1985-01-18

saturation on near and submicron-scale device performance. The motivation for this is as follows: Presently, individual semiconductors are accepted or...basis of all FET scaling procedures; and is a major motivating factor for going to submicron structures. This scaling was tested with the 4 following...performance. The motivation for this is as follows: Presently, individual semiconductors are accepted or rejected as candidate device materials based, in

Technological and organizational diversity and technical advance in the early history of the American semiconductor industry

NASA Astrophysics Data System (ADS)

Cohen, W.; Holbrook, D.; Klepper, S.

1994-06-01

This study examines the early years of the semiconductor industry and focuses on the roles played by different size firms in technologically innovative processes. A large and diverse pool of firms participated in the growth of the industry. Three related technological areas were chosen for in-depth analysis: integrated circuits, materials technology, and device packaging. Large business producing vacuum tubes dominated the early production of semiconductor devices. As the market for new devices grew during the 1950's, new firms were founded and existing firms from other industries, e.g. aircraft builders and instrument makers, began to pursue semiconductor electronics. Small firms began to cater to the emerging industry by supplying materials and equipment. These firms contributed to the development of certain aspects of one thousand firms that were playing some part in the semiconductor industry.

Hetero-junction photovoltaic device and method of fabricating the device

DOEpatents

Aytug, Tolga; Christen, David K; Paranthaman, Mariappan Parans; Polat, Ozgur

2014-02-10

A hetero-junction device and fabrication method in which phase-separated n-type and p-type semiconductor pillars define vertically-oriented p-n junctions extending above a substrate. Semiconductor materials are selected for the p-type and n-type pillars that are thermodynamically stable and substantially insoluble in one another. An epitaxial deposition process is employed to form the pillars on a nucleation layer and the mutual insolubility drives phase separation of the materials. During the epitaxial deposition process, the orientation is such that the nucleation layer initiates propagation of vertical columns resulting in a substantially ordered, three-dimensional structure throughout the deposited material. An oxidation state of at least a portion of one of the p-type or the n-type semiconductor materials is altered relative to the other, such that the band-gap energy of the semiconductor materials differ with respect to stoichiometric compositions and the device preferentially absorbs particular selected bands of radiation.

Main principles of developing exploitation models of semiconductor devices

NASA Astrophysics Data System (ADS)

Gradoboev, A. V.; Simonova, A. V.

2018-05-01

The paper represents primary tasks, solutions of which allow to develop the exploitation modes of semiconductor devices taking into account complex and combined influence of ionizing irradiation and operation factors. The structure of the exploitation model of the semiconductor device is presented, which is based on radiation and reliability models. Furthermore, it was shown that the exploitation model should take into account complex and combine influence of various ionizing irradiation types and operation factors. The algorithm of developing the exploitation model of the semiconductor devices is proposed. The possibility of creating the radiation model of Schottky barrier diode, Schottky field-effect transistor and Gunn diode is shown based on the available experimental data. The basic exploitation model of IR-LEDs based upon double AlGaAs heterostructures is represented. The practical application of the exploitation models will allow to output the electronic products with guaranteed operational properties.

The Physics of Semiconductors

NASA Astrophysics Data System (ADS)

Brennan, Kevin F.

1999-02-01

Modern fabrication techniques have made it possible to produce semiconductor devices whose dimensions are so small that quantum mechanical effects dominate their behavior. This book describes the key elements of quantum mechanics, statistical mechanics, and solid-state physics that are necessary in understanding these modern semiconductor devices. The author begins with a review of elementary quantum mechanics, and then describes more advanced topics, such as multiple quantum wells. He then disusses equilibrium and nonequilibrium statistical mechanics. Following this introduction, he provides a thorough treatment of solid-state physics, covering electron motion in periodic potentials, electron-phonon interaction, and recombination processes. The final four chapters deal exclusively with real devices, such as semiconductor lasers, photodiodes, flat panel displays, and MOSFETs. The book contains many homework exercises and is suitable as a textbook for electrical engineering, materials science, or physics students taking courses in solid-state device physics. It will also be a valuable reference for practicing engineers in optoelectronics and related areas.

Germanium detector passivated with hydrogenated amorphous germanium

DOEpatents

Hansen, William L.; Haller, Eugene E.

1986-01-01

Passivation of predominantly crystalline semiconductor devices (12) is provided for by a surface coating (21) of sputtered hydrogenated amorphous semiconductor material. Passivation of a radiation detector germanium diode, for example, is realized by sputtering a coating (21) of amorphous germanium onto the etched and quenched diode surface (11) in a low pressure atmosphere of hydrogen and argon. Unlike prior germanium diode semiconductor devices (12), which must be maintained in vacuum at cryogenic temperatures to avoid deterioration, a diode processed in the described manner may be stored in air at room temperature or otherwise exposed to a variety of environmental conditions. The coating (21) compensates for pre-existing undesirable surface states as well as protecting the semiconductor device (12) against future impregnation with impurities.

Photovoltaic devices comprising cadmium stannate transparent conducting films and method for making

DOEpatents

Wu, Xuanzhi; Coutts, Timothy J.; Sheldon, Peter; Rose, Douglas H.

1999-01-01

A photovoltaic device having a substrate, a layer of Cd.sub.2 SnO.sub.4 disposed on said substrate as a front contact, a thin film comprising two or more layers of semiconductor materials disposed on said layer of Cd.sub.2 SnO.sub.4, and an electrically conductive film disposed on said thin film of semiconductor materials to form a rear electrical contact to said thin film. The device is formed by RF sputter coating a Cd.sub.2 SnO.sub.4 layer onto a substrate, depositing a thin film of semiconductor materials onto the layer of Cd.sub.2 SnO.sub.4, and depositing an electrically conductive film onto the thin film of semiconductor materials.

Oxide semiconductor thin-film transistors: a review of recent advances.

PubMed

Fortunato, E; Barquinha, P; Martins, R

2012-06-12

Transparent electronics is today one of the most advanced topics for a wide range of device applications. The key components are wide bandgap semiconductors, where oxides of different origins play an important role, not only as passive component but also as active component, similar to what is observed in conventional semiconductors like silicon. Transparent electronics has gained special attention during the last few years and is today established as one of the most promising technologies for leading the next generation of flat panel display due to its excellent electronic performance. In this paper the recent progress in n- and p-type oxide based thin-film transistors (TFT) is reviewed, with special emphasis on solution-processed and p-type, and the major milestones already achieved with this emerging and very promising technology are summarizeed. After a short introduction where the main advantages of these semiconductors are presented, as well as the industry expectations, the beautiful history of TFTs is revisited, including the main landmarks in the last 80 years, finishing by referring to some papers that have played an important role in shaping transparent electronics. Then, an overview is presented of state of the art n-type TFTs processed by physical vapour deposition methods, and finally one of the most exciting, promising, and low cost but powerful technologies is discussed: solution-processed oxide TFTs. Moreover, a more detailed focus analysis will be given concerning p-type oxide TFTs, mainly centred on two of the most promising semiconductor candidates: copper oxide and tin oxide. The most recent data related to the production of complementary metal oxide semiconductor (CMOS) devices based on n- and p-type oxide TFT is also be presented. The last topic of this review is devoted to some emerging applications, finalizing with the main conclusions. Related work that originated at CENIMAT|I3N during the last six years is included in more detail, which has led to the fabrication of high performance n- and p-type oxide transistors as well as the fabrication of CMOS devices with and on paper. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Epitaxial MoS2/GaN structures to enable vertical 2D/3D semiconductor heterostructure devices

NASA Astrophysics Data System (ADS)

Ruzmetov, D.; Zhang, K.; Stan, G.; Kalanyan, B.; Eichfeld, S.; Burke, R.; Shah, P.; O'Regan, T.; Crowne, F.; Birdwell, A. G.; Robinson, J.; Davydov, A.; Ivanov, T.

MoS2/GaN structures are investigated as a building block for vertical 2D/3D semiconductor heterostructure devices that utilize a 3D substrate (GaN) as an active component of the semiconductor device without the need of mechanical transfer of the 2D layer. Our CVD-grown monolayer MoS2 has been shown to be epitaxially aligned to the GaN lattice which is a pre-requisite for high quality 2D/3D interfaces desired for efficient vertical transport and large area growth. The MoS2 coverage is nearly 50 % including isolated triangles and monolayer islands. The GaN template is a double-layer grown by MOCVD on sapphire and allows for measurement of transport perpendicular to the 2D layer. Photoluminescence, Raman, XPS, Kelvin force probe microscopy, and SEM analysis identified high quality monolayer MoS2. The MoS2/GaN structures electrically conduct in the out-of-plane direction and across the van der Waals gap, as measured with conducting AFM (CAFM). The CAFM current maps and I-V characteristics are analyzed to estimate the MoS2/GaN contact resistivity to be less than 4 Ω-cm2 and current spreading in the MoS2 monolayer to be approx. 1 μm in diameter. Epitaxial MoS2/GaN heterostructures present a promising platform for the design of energy-efficient, high-speed vertical devices incorporating 2D layered materials with 3D semiconductors.

Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

PubMed Central

Long, Rathnait D.; McIntyre, Paul C.

2012-01-01

The literature on polar Gallium Nitride (GaN) surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS) devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

Methods and devices for optimizing the operation of a semiconductor optical modulator

DOEpatents

Zortman, William A.

2015-07-14

A semiconductor-based optical modulator includes a control loop to control and optimize the modulator's operation for relatively high data rates (above 1 GHz) and/or relatively high voltage levels. Both the amplitude of the modulator's driving voltage and the bias of the driving voltage may be adjusted using the control loop. Such adjustments help to optimize the operation of the modulator by reducing the number of errors present in a modulated data stream.

Wide Bandgap Extrinsic Photoconductive Switches

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sullivan, James S.

2012-01-20

Photoconductive semiconductor switches (PCSS) have been investigated since the late 1970s. Some devices have been developed that withstand tens of kilovolts and others that switch hundreds of amperes. However, no single device has been developed that can reliably withstand both high voltage and switch high current. Yet, photoconductive switches still hold the promise of reliable high voltage and high current operation with subnanosecond risetimes. Particularly since good quality, bulk, single crystal, wide bandgap semiconductor materials have recently become available. In this chapter we will review the basic operation of PCSS devices, status of PCSS devices and properties of the widemore » bandgap semiconductors 4H-SiC, 6H-SiC and 2H-GaN.« less

NREL Finds Nanotube Semiconductors Well-suited for PV Systems | News | NREL

Science.gov Websites

photoinduced electron transfer for emerging organic semiconductors such as single-walled carbon nanotubes (SWCNT) that can be used in organic PV devices. In organic PV devices, after a photon is absorbed Larson, and Steven Strauss from Colorado State University. Organic PV devices involve an interface

Hybrid method of making an amorphous silicon P-I-N semiconductor device

DOEpatents

Moustakas, Theodore D.; Morel, Don L.; Abeles, Benjamin

1983-10-04

The invention is directed to a hydrogenated amorphous silicon PIN semiconductor device of hybrid glow discharge/reactive sputtering fabrication. The hybrid fabrication method is of advantage in providing an ability to control the optical band gap of the P and N layers, resulting in increased photogeneration of charge carriers and device output.

Four-terminal circuit element with photonic core

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sampayan, Stephen

A four-terminal circuit element is described that includes a photonic core inside of the circuit element that uses a wide bandgap semiconductor material that exhibits photoconductivity and allows current flow through the material in response to the light that is incident on the wide bandgap material. The four-terminal circuit element can be configured based on various hardware structures using a single piece or multiple pieces or layers of a wide bandgap semiconductor material to achieve various designed electrical properties such as high switching voltages by using the photoconductive feature beyond the breakdown voltages of semiconductor devices or circuits operated basedmore » on electrical bias or control designs. The photonic core aspect of the four-terminal circuit element provides unique features that enable versatile circuit applications to either replace the semiconductor transistor-based circuit elements or semiconductor diode-based circuit elements.« less

Microscopic properties of ionic liquid/organic semiconductor interfaces revealed by molecular dynamics simulations.

PubMed

Yokota, Yasuyuki; Miyamoto, Hiroo; Imanishi, Akihito; Takeya, Jun; Inagaki, Kouji; Morikawa, Yoshitada; Fukui, Ken-Ichi

2018-05-09

Electric double-layer transistors based on ionic liquid/organic semiconductor interfaces have been extensively studied during the past decade because of their high carrier densities at low operation voltages. Microscopic structures and the dynamics of ionic liquids likely determine the device performance; however, knowledge of these is limited by a lack of appropriate experimental tools. In this study, we investigated ionic liquid/organic semiconductor interfaces using molecular dynamics to reveal the microscopic properties of ionic liquids. The organic semiconductors include pentacene, rubrene, fullerene, and 7,7,8,8-tetracyanoquinodimethane (TCNQ). While ionic liquids close to the substrate always form the specific layered structures, the surface properties of organic semiconductors drastically alter the ionic dynamics. Ionic liquids at the fullerene interface behave as a two-dimensional ionic crystal because of the energy gain derived from the favorable electrostatic interaction on the corrugated periodic substrate.

A simplified boron diffusion for preparing the silicon single crystal p-n junction as an educational device

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shiota, Koki, E-mail: a14510@sr.kagawa-nct.ac.jp; Kai, Kazuho; Nagaoka, Shiro, E-mail: nagaoka@es.kagawa-nct.ac.jp

The educational method which is including designing, making, and evaluating actual semiconductor devices with learning the theory is one of the best way to obtain the fundamental understanding of the device physics and to cultivate the ability to make unique ideas using the knowledge in the semiconductor device. In this paper, the simplified Boron thermal diffusion process using Sol-Gel material under normal air environment was proposed based on simple hypothesis and the feasibility of the reproducibility and reliability were investigated to simplify the diffusion process for making the educational devices, such as p-n junction, bipolar and pMOS devices. As themore » result, this method was successfully achieved making p+ region on the surface of the n-type silicon substrates with good reproducibility. And good rectification property of the p-n junctions was obtained successfully. This result indicates that there is a possibility to apply on the process making pMOS or bipolar transistors. It suggests that there is a variety of the possibility of the applications in the educational field to foster an imagination of new devices.« less

An Assessment of Critical Dimension Small Angle X-ray Scattering Metrology for Advanced Semiconductor Manufacturing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Settens, Charles M.

2015-01-01

Simultaneous migration of planar transistors to FinFET architectures, the introduction of a plurality of materials to ensure suitable electrical characteristics, and the establishment of reliable multiple patterning lithography schemes to pattern sub-10 nm feature sizes imposes formidable challenges to current in-line dimensional metrologies. Because the shape of a FinFET channel cross-section immediately influences the electrical characteristics, the evaluation of 3D device structures requires measurement of parameters beyond traditional critical dimension (CD), including their sidewall angles, top corner rounding and footing, roughness, recesses and undercuts at single nanometer dimensions; thus, metrologies require sub-nm and approaching atomic level measurement uncertainty. Synchrotron criticalmore » dimension small angle X-ray scattering (CD-SAXS) has unique capabilities to non-destructively monitor the cross-section shape of surface structures with single nanometer uncertainty and can perform overlay metrology to sub-nm uncertainty. In this dissertation, we perform a systematic experimental investigation using CD-SAXS metrology on a hierarchy of semiconductor 3D device architectures including, high-aspect-ratio contact holes, H2 annealed Si fins, and a series of grating type samples at multiple points along a FinFET fabrication process increasing in structural intricacy and ending with fully fabricated FinFET. Comparative studies between CD-SAXS metrology and other relevant semiconductor dimensional metrologies, particularly CDSEM, CD-AFM and TEM are used to determine physical limits of CD-SAXS approach for advanced semiconductor samples. CD-SAXS experimental tradeoffs, advice for model-dependent analysis and thoughts on the compatibility with a semiconductor manufacturing environment are discussed.« less

Analysis of quantum semiconductor heterostructures by ballistic electron emission spectroscopy

NASA Astrophysics Data System (ADS)

Guthrie, Daniel K.

1998-09-01

The microelectronics industry is diligently working to achieve the goal of gigascale integration (GSI) by early in the 21st century. For the past twenty-five years, progress toward this goal has been made by continually scaling down device technology. Unfortunately, this trend cannot continue to the point of producing arbitrarily small device sizes. One possible solution to this problem that is currently under intensive study is the relatively new area of quantum devices. Quantum devices represent a new class of microelectronic devices that operate by utilizing the wave-like nature (reflection, refraction, and confinement) of electrons together with the laws of quantum mechanics to construct useful devices. One difficulty associated with these structures is the absence of measurement techniques that can fully characterize carrier transport in such devices. This thesis addresses this need by focusing on the study of carrier transport in quantum semiconductor heterostructures using a relatively new and versatile measurement technique known as ballistic electron emission spectroscopy (BEES). To achieve this goal, a systematic approach that encompasses a set of progressively more complex structures is utilized. First, the simplest BEES structure possible, the metal/semiconductor interface, is thoroughly investigated in order to provide a foundation for measurements on more the complex structures. By modifying the semiclassical model commonly used to describe the experimental BEES spectrum, a very complete and accurate description of the basic structure has been achieved. Next, a very simple semiconductor heterostructure, a Ga1-xAlxAs single-barrier structure, was measured and analyzed. Low-temperature measurements on this structure were used to investigate the band structure and electron-wave interference effects in the Ga1-xAlxAs single barrier structure. These measurements are extended to a simple quantum device by designing, measuring, and analyzing a set of complementary electron-wave Fabry-Perot quantum interference filters which included both a half- and a quarter-electron-wavelength resonant device. High-resolution, low noise, BEES spectra obtained on these devices at low-temperature were used to measure the zero-bias electron transmittance as a function of injected energy for these resonant devices. Finally, by analyzing BEES spectra taken at various spatial locations, one monolayer variations in the thickness of a buried quantum well have been detected.

Overview of the 1997 Dirac High-Magnetic Series at LOS Alamos

NASA Astrophysics Data System (ADS)

Clark, D. A.; Campbell, L. J.; Forman, K. C.; Fowler, C. M.; Goettee, J. D.; Mielke, C. H.; Rickel, D. G.; Marshall, B. R.

2004-11-01

During the summer of 1997, a series of high magnetic field experiments was conducted at Los Alamos National Laboratory. Four experiments utilizing Russian built MC-1 generators, which can reach fields as high as 10 Megagauss, and four smaller strip generator experiments at fields near 1.5 Megagauss were conducted. Experiments mounted on the devices included magnetoresistance of high temperature superconductors and semiconductors, optical reflectivity (conductivity) of semiconductors, magnetization of a magnetic cluster material and a semiconductor, Faraday rotation in a semiconductor and a magnetic cluster material, and transmission spectroscopy of molecules. Brief descriptions of the experimental setups, magnetic field measurement techniques, field results and various experiments are presented. Magnetic field data and other information on Dirac `97 can be found at .

Semiconductor cooling by thin-film thermocouples

NASA Technical Reports Server (NTRS)

Tick, P. A.; Vilcans, J.

1970-01-01

Thin-film, metal alloy thermocouple junctions do not rectify, change circuit impedance only slightly, and require very little increase in space. Although they are less efficient cooling devices than semiconductor junctions, they may be applied to assist conventional cooling techniques for electronic devices.

Band alignments in Fe/graphene/Si(001) junctions studied by x-ray photoemission spectroscopy

DOE Office of Scientific and Technical Information (OSTI.GOV)

Le Breton, J.-C., E-mail: jean-christophe.lebreton@univ-rennes1.fr; Tricot, S.; Delhaye, G.

2016-08-01

The control of tunnel contact resistance is of primary importance for semiconductor-based spintronic devices. This control is hardly achieved with conventional oxide-based tunnel barriers due to deposition-induced interface states. Manipulation of single 2D atomic crystals (such as graphene sheets) weakly interacting with their substrate might represent an alternative and efficient way to design new heterostructures for a variety of different purposes including spin injection into semiconductors. In the present paper, we study by x-ray photoemission spectroscopy the band alignments and interface chemistry of iron–graphene-hydrogenated passivated silicon (001) surfaces for a low and a high n-doping concentration. We find that themore » hydrogen passivation of the Si(001) surface remains efficient even with a graphene sheet on the Si(001) surface. For both doping concentrations, the semiconductor is close to flat-band conditions which indicates that the Fermi level is unpinned on the semiconductor side of the Graphene/Si(001):H interface. When iron is deposited on the graphene/Si(001):H structures, the Schottky barrier height remains mainly unaffected by the metallic overlayer with a very low barrier height for electrons, a sought-after property in semiconductor based spintronic devices. Finally, we demonstrate that the graphene layer intercalated between the metal and semiconductor also serves as a protection against iron-silicide formation even at elevated temperatures preventing from the formation of a Si-based magnetic dead layer.« less

Band alignments in Fe/graphene/Si(001) junctions studied by x-ray photoemission spectroscopy

NASA Astrophysics Data System (ADS)

Le Breton, J.-C.; Tricot, S.; Delhaye, G.; Lépine, B.; Turban, P.; Schieffer, P.

2016-08-01

The control of tunnel contact resistance is of primary importance for semiconductor-based spintronic devices. This control is hardly achieved with conventional oxide-based tunnel barriers due to deposition-induced interface states. Manipulation of single 2D atomic crystals (such as graphene sheets) weakly interacting with their substrate might represent an alternative and efficient way to design new heterostructures for a variety of different purposes including spin injection into semiconductors. In the present paper, we study by x-ray photoemission spectroscopy the band alignments and interface chemistry of iron-graphene-hydrogenated passivated silicon (001) surfaces for a low and a high n-doping concentration. We find that the hydrogen passivation of the Si(001) surface remains efficient even with a graphene sheet on the Si(001) surface. For both doping concentrations, the semiconductor is close to flat-band conditions which indicates that the Fermi level is unpinned on the semiconductor side of the Graphene/Si(001):H interface. When iron is deposited on the graphene/Si(001):H structures, the Schottky barrier height remains mainly unaffected by the metallic overlayer with a very low barrier height for electrons, a sought-after property in semiconductor based spintronic devices. Finally, we demonstrate that the graphene layer intercalated between the metal and semiconductor also serves as a protection against iron-silicide formation even at elevated temperatures preventing from the formation of a Si-based magnetic dead layer.

New Concentric Electrode Metal-Semiconductor-Metal Photodetectors

NASA Technical Reports Server (NTRS)

Towe, Elias

1996-01-01

A new metal-semiconductor-metal (MSM) photodetector geometry is proposed. The new device has concentric metal electrodes which exhibit a high degree of symmetry and a design flexibility absent in the conventional MSM device. The concentric electrodes are biased to alternating potentials as in the conventional interdigitated device. Because of the high symmetry configuration, however, the new device also has a lower effective capacitance. This device and the conventional MSM structure are analyzed within a common theoretical framework which allows for the comparison of the important performance characteristics.

Photovoltaic devices comprising cadmium stannate transparent conducting films and method for making

DOEpatents

Wu, X.; Coutts, T.J.; Sheldon, P.; Rose, D.H.

1999-07-13

A photovoltaic device is disclosed having a substrate, a layer of Cd[sub 2]SnO[sub 4] disposed on said substrate as a front contact, a thin film comprising two or more layers of semiconductor materials disposed on said layer of Cd[sub 2]SnO[sub 4], and an electrically conductive film disposed on said thin film of semiconductor materials to form a rear electrical contact to said thin film. The device is formed by RF sputter coating a Cd[sub 2]SnO[sub 4] layer onto a substrate, depositing a thin film of semiconductor materials onto the layer of Cd[sub 2]SnO[sub 4], and depositing an electrically conductive film onto the thin film of semiconductor materials. 10 figs.

The measurement of alpha particle emissions from semiconductor memory materials

NASA Astrophysics Data System (ADS)

Bouldin, D. P.

1981-07-01

With the increasing concern for the affects of alpha particles on the reliability of semiconductor memories, an interest has arisen in characterizing semiconductor manufacturing materials for extremely low-level alpha-emitting contaminants. It is shown that four elements are of primary concern: uranium, thorium, radium, and polonium. Measurement of contamination levels are given relevance by first correlating them with alpha flux emission levels and then corre1ating these flux values with device soft error rates. Measurement techniques involve either measurements of elemental concentrations-applicable to only uranium and thorium - or direct measurements of alpha emission fluxes. Alpha fluxes are most usefully measured by means of ZnS scintillation counting, practical details of which are discussed. Materials measurements are reported for ceramics, solder, silicon, quartz, and various metals and organic materials. Ceramics and most metals have contamination levels of concern, but the high temperature processing normally used in semiconductor manufacturing and low total amounts reduce problems, at least for metals. Silicon, silicon compounds, and organic materials have been found to have no detectable alpha emitters. Finally, a brief discussion of the calibration of alpha sources for accelerated device testing is given, including practical details on the affects of source/chip separation and alignment variations.

Thermally Stable Ohmic Contacts on Silicon Carbide Developed for High- Temperature Sensors and Electronics

NASA Technical Reports Server (NTRS)

Okojie, Robert S.

2001-01-01

The NASA aerospace program, in particular, requires breakthrough instrumentation inside the combustion chambers of engines for the purpose of, among other things, improving computational fluid dynamics code validation and active engine behavioral control (combustion, flow, stall, and noise). This environment can be as high as 600 degrees Celsius, which is beyond the capability of silicon and gallium arsenide devices. Silicon-carbide- (SiC-) based devices appear to be the most technologically mature among wide-bandgap semiconductors with the proven capability to function at temperatures above 500 degrees Celsius. However, the contact metalization of SiC degrades severely beyond this temperature because of factors such as the interdiffusion between layers, oxidation of the contact, and compositional and microstructural changes at the metal/semiconductor interface. These mechanisms have been proven to be device killers. Very costly and weight-adding packaging schemes that include vacuum sealing are sometimes adopted as a solution.

Plasma-Enhanced Pulsed Laser Deposition of Wide Bandgap Nitrides for Space Power Applications

NASA Technical Reports Server (NTRS)

Triplett, G. E., Jr.; Durbin, S. M.

2004-01-01

The need for a reliable, inexpensive technology for small-scale space power applications where photovoltaic or chemical battery approaches are not feasible has prompted renewed interest in radioisotope-based energy conversion devices. Although a number of devices have been developed using a variety of semiconductors, the single most limiting factor remains the overall lifetime of the radioisotope battery. Recent advances in growth techniques for ultra-wide bandgap III-nitride semiconductors provide the means to explore a new group of materials with the promise of significant radiation resistance. Additional benefits resulting from the use of ultra-wide bandgap materials include a reduction in leakage current and higher operating voltage without a loss of energy transfer efficiency. This paper describes the development of a novel plasma-enhanced pulsed laser deposition system for the growth of cubic boron nitride semiconducting thin films, which will be used to construct pn junction devices for alphavoltaic applications.

Graphene-Mesoporous Si Nanocomposite as a Compliant Substrate for Heteroepitaxy.

PubMed

Boucherif, Abderrahim Rahim; Boucherif, Abderraouf; Kolhatkar, Gitanjali; Ruediger, Andreas; Arès, Richard

2017-05-01

The ultimate performance of a solid state device is limited by the restricted number of crystalline substrates that are available for epitaxial growth. As a result, only a small fraction of semiconductors are usable. This study describes a novel concept for a tunable compliant substrate for epitaxy, based on a graphene-porous silicon nanocomposite, which extends the range of available lattice constants for epitaxial semiconductor alloys. The presence of graphene and its effect on the strain of the porous layer lattice parameter are discussed in detail and new remarkable properties are demonstrated. These include thermal stability up to 900 °C, lattice tuning up to 0.9 % mismatch, and compliance under stress for virtual substrate thicknesses of several micrometers. A theoretical model is proposed to define the compliant substrate design rules. These advances lay the foundation for the fabrication of a compliant substrate that could unlock the lattice constant restrictions for defect-free new epitaxial semiconductor alloys and devices. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Two dimensional thermal and charge mapping of power thyristors

NASA Technical Reports Server (NTRS)

Hu, S. P.; Rabinovici, B. M.

1975-01-01

The two dimensional static and dynamic current density distributions within the junction of semiconductor power switching devices and in particular the thyristors were obtained. A method for mapping the thermal profile of the device junctions with fine resolution using an infrared beam and measuring the attenuation through the device as a function of temperature were developed. The results obtained are useful in the design and quality control of high power semiconductor switching devices.

A summary of the research program in the broad field of electronics

NASA Technical Reports Server (NTRS)

1972-01-01

Summary reports of research projects covering solid state materials, semiconductors and devices, quantum electronics, plasmas, applied electromagnetics, electrical engineering systems to include control communication, computer and power systems, biomedical engineering and mathematical biosciences.

Imaging the motion of electrons in 2D semiconductor heterostructures

NASA Astrophysics Data System (ADS)

Dani, Keshav

Technological progress since the late 20th century has centered on semiconductor devices, such as transistors, diodes, and solar cells. At the heart of these devices, is the internal motion of electrons through semiconductor materials due to applied electric fields or by the excitation of photocarriers. Imaging the motion of these electrons would provide unprecedented insight into this important phenomenon, but requires high spatial and temporal resolution. Current studies of electron dynamics in semiconductors are generally limited by the spatial resolution of optical probes, or by the temporal resolution of electronic probes. In this talk, we combine femtosecond pump-probe techniques with spectroscopic photoemission electron microscopy to image the motion of photoexcited electrons from high-energy to low-energy states in a 2D InSe/GaAs heterostructure exhibiting a type-II band alignment. At the instant of photoexcitation, energy-resolved photoelectron images reveal a highly non-equilibrium distribution of photocarriers in space and energy. Thereafter, in response to the out-of-equilibrium photocarriers, we observe the spatial redistribution of charges, thus forming internal electric fields, bending the semiconductor bands, and finally impeding further charge transfer. By assembling images taken at different time-delays, we make a movie lasting a few tens of picoseconds of the electron transfer process in the photoexcited type-II heterostructure - a fundamental phenomenon in semiconductor devices like solar cells. Quantitative analysis and theoretical modeling of spatial variations in the video provide insight into future solar cells, electron dynamics in 2D materials, and other semiconductor devices.

Imaging the motion of electrons across semiconductor heterojunctions.

PubMed

Man, Michael K L; Margiolakis, Athanasios; Deckoff-Jones, Skylar; Harada, Takaaki; Wong, E Laine; Krishna, M Bala Murali; Madéo, Julien; Winchester, Andrew; Lei, Sidong; Vajtai, Robert; Ajayan, Pulickel M; Dani, Keshav M

2017-01-01

Technological progress since the late twentieth century has centred on semiconductor devices, such as transistors, diodes and solar cells. At the heart of these devices is the internal motion of electrons through semiconductor materials due to applied electric fields or by the excitation of photocarriers. Imaging the motion of these electrons would provide unprecedented insight into this important phenomenon, but requires high spatial and temporal resolution. Current studies of electron dynamics in semiconductors are generally limited by the spatial resolution of optical probes, or by the temporal resolution of electronic probes. Here, by combining femtosecond pump-probe techniques with spectroscopic photoemission electron microscopy, we imaged the motion of photoexcited electrons from high-energy to low-energy states in a type-II 2D InSe/GaAs heterostructure. At the instant of photoexcitation, energy-resolved photoelectron images revealed a highly non-equilibrium distribution of photocarriers in space and energy. Thereafter, in response to the out-of-equilibrium photocarriers, we observed the spatial redistribution of charges, thus forming internal electric fields, bending the semiconductor bands, and finally impeding further charge transfer. By assembling images taken at different time-delays, we produced a movie lasting a few trillionths of a second of the electron-transfer process in the photoexcited type-II heterostructure-a fundamental phenomenon in semiconductor devices such as solar cells. Quantitative analysis and theoretical modelling of spatial variations in the movie provide insight into future solar cells, 2D materials and other semiconductor devices.

Imaging the motion of electrons across semiconductor heterojunctions

NASA Astrophysics Data System (ADS)

Man, Michael K. L.; Margiolakis, Athanasios; Deckoff-Jones, Skylar; Harada, Takaaki; Wong, E. Laine; Krishna, M. Bala Murali; Madéo, Julien; Winchester, Andrew; Lei, Sidong; Vajtai, Robert; Ajayan, Pulickel M.; Dani, Keshav M.

2017-01-01

Technological progress since the late twentieth century has centred on semiconductor devices, such as transistors, diodes and solar cells. At the heart of these devices is the internal motion of electrons through semiconductor materials due to applied electric fields or by the excitation of photocarriers. Imaging the motion of these electrons would provide unprecedented insight into this important phenomenon, but requires high spatial and temporal resolution. Current studies of electron dynamics in semiconductors are generally limited by the spatial resolution of optical probes, or by the temporal resolution of electronic probes. Here, by combining femtosecond pump-probe techniques with spectroscopic photoemission electron microscopy, we imaged the motion of photoexcited electrons from high-energy to low-energy states in a type-II 2D InSe/GaAs heterostructure. At the instant of photoexcitation, energy-resolved photoelectron images revealed a highly non-equilibrium distribution of photocarriers in space and energy. Thereafter, in response to the out-of-equilibrium photocarriers, we observed the spatial redistribution of charges, thus forming internal electric fields, bending the semiconductor bands, and finally impeding further charge transfer. By assembling images taken at different time-delays, we produced a movie lasting a few trillionths of a second of the electron-transfer process in the photoexcited type-II heterostructure—a fundamental phenomenon in semiconductor devices such as solar cells. Quantitative analysis and theoretical modelling of spatial variations in the movie provide insight into future solar cells, 2D materials and other semiconductor devices.

Ultra-thin ohmic contacts for p-type nitride light emitting devices

DOEpatents

Raffetto, Mark; Bharathan, Jayesh; Haberern, Kevin; Bergmann, Michael; Emerson, David; Ibbetson, James; Li, Ting

2014-06-24

A flip-chip semiconductor based Light Emitting Device (LED) can include an n-type semiconductor substrate and an n-type GaN epi-layer on the substrate. A p-type GaN epi-layer can be on the n-type GaN epi-layer and a metal ohmic contact p-electrode can be on the p-type GaN epi-layer, where the metal ohmic contact p-electrode can have an average thickness less than about 25 .ANG.. A reflector can be on the metal ohmic contact p-electrode and a metal stack can be on the reflector. An n-electrode can be on the substrate opposite the n-type GaN epi-layer and a bonding pad can be on the n-electrode.

Polar semiconductor heterojunction structure energy band diagram considerations

NASA Astrophysics Data System (ADS)

Lin, Shuxun; Wen, Cheng P.; Wang, Maojun; Hao, Yilong

2016-03-01

The unique nature of built-in electric field induced positive/negative charge pairs of polar semiconductor heterojunction structure has led to a more realistic device model for hexagonal III-nitride HEMT. In this modeling approach, the distribution of charge carriers is dictated by the electrostatic potential profile instead of Femi statistics. The proposed device model is found suitable to explain peculiar properties of GaN HEMT structures, including: (1) Discrepancy in measured conventional linear transmission line model (LTLM) sheet resistance and contactless sheet resistance of GaN HEMT with thin barrier layer. (2) Below bandgap radiation from forward biased Nickel Schottky barrier diode on GaN HEMT structure. (3) GaN HEMT barrier layer doping has negligible effect on transistor channel sheet charge density.

Ferroelectrics for semiconductor devices

NASA Astrophysics Data System (ADS)

Sayer, M.; Wu, Z.; Vasant Kumar, C. V. R.; Amm, D. T.; Griswold, E. M.

1992-11-01

The technology for the implementation of the integration of thin film ferroelectrics with silicon processing for various devices is described, and factors affecting the integration of ferroelectric films with semiconductor processing are discussed. Consideration is also given to film properties, the properties of electrode materials and structures, and the phenomena of ferroelectric fatigue and aging. Particular attention is given to the nonmemory device application of ferroelectrics.

Optical devices integrated with semiconductor optical amplifier

NASA Astrophysics Data System (ADS)

Oh, Kwang R.; Park, Moon S.; Jeong, Jong S.; Baek, Yongsoon; Oh, Dae-Kon

2000-07-01

Semiconductor optical amplifiers (SOA's) have been used as a key optical component for the high capacity communication systems. The monolithic integration is necessary for the stable operation of these devices and the wider applications. In this paper, the coupling technique between different waveguides and the integration of SSC's are discussed and the research results of optical devices integrated with SOA's are presented.

Sputtered pin amorphous silicon semi-conductor device and method therefor

DOEpatents

Moustakas, Theodore D.; Friedman, Robert A.

1983-11-22

A high efficiency amorphous silicon PIN semi-conductor device is constructed by the sequential sputtering of N, I and P layers of amorphous silicon and at least one semi-transparent ohmic electrode. A method of construction produces a PIN device, exhibiting enhanced physical integrity and facilitates ease of construction in a singular vacuum system and vacuum pump down procedure.

Modeling of Quantum Transport in Semiconductor Devices (The Physics and Operation of Ultra-Submicron Length Semiconductor Devices).

DTIC Science & Technology

1994-05-01

Open Systems and Contacts ...................... 16 A Ballistic Transport .......................... 17 B Role of the Boundaries and Contacts...15 Other Devices ................................ 90 V Modeling with the Green’s Functions 91 16 Homogeneous, Low-Field Systems .................. 93 A...The Retarded Function ..................... 95 B The "Less-Than" Function ................... 99 17 Homogeneous, High-Field Systems

Semiconductor crystal high resolution imager

NASA Technical Reports Server (NTRS)

Matteson, James (Inventor); Levin, Craig S. (Inventor)

2011-01-01

A radiation imaging device (10). The radiation image device (10) comprises a subject radiation station (12) producing photon emissions (14), and at least one semiconductor crystal detector (16) arranged in an edge-on orientation with respect to the emitted photons (14) to directly receive the emitted photons (14) and produce a signal. The semiconductor crystal detector (16) comprises at least one anode and at least one cathode that produces the signal in response to the emitted photons (14).

Semiconductor/High-Tc-Superconductor Hybrid ICs

NASA Technical Reports Server (NTRS)

Burns, Michael J.

1995-01-01

Hybrid integrated circuits (ICs) containing both Si-based semiconducting and YBa(2)Cu(3)O(7-x) superconducting circuit elements on sapphire substrates developed. Help to prevent diffusion of Cu from superconductors into semiconductors. These hybrid ICs combine superconducting and semiconducting features unavailable in superconducting or semiconducting circuitry alone. For example, complementary metal oxide/semiconductor (CMOS) readout and memory devices integrated with fast-switching Josephson-junction super-conducting logic devices and zero-resistance interconnections.

Optical devices featuring nonpolar textured semiconductor layers

DOEpatents

Moustakas, Theodore D; Moldawer, Adam; Bhattacharyya, Anirban; Abell, Joshua

2013-11-26

A semiconductor emitter, or precursor therefor, has a substrate and one or more textured semiconductor layers deposited onto the substrate in a nonpolar orientation. The textured layers enhance light extraction, and the use of nonpolar orientation greatly enhances internal quantum efficiency compared to conventional devices. Both the internal and external quantum efficiencies of emitters of the invention can be 70-80% or higher. The invention provides highly efficient light emitting diodes suitable for solid state lighting.

Controlled buckling structures in semiconductor interconnects and nanomembranes for stretchable electronics

DOEpatents

Rogers, John A; Meitl, Matthew; Sun, Yugang; Ko, Heung Cho; Carlson, Andrew; Choi, Won Mook; Stoykovich, Mark; Jiang, Hanqing; Huang, Yonggang; Nuzzo, Ralph G; Zhu, Zhengtao; Menard, Etienne; Khang, Dahl-Young

2014-05-20

In an aspect, the present invention provides stretchable, and optionally printable, components such as semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed, and related methods of making or tuning such stretchable components. Stretchable semiconductors and electronic circuits preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention are adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Controlled buckling structures in semiconductor interconnects and nanomembranes for stretchable electronics

DOEpatents

Rogers, John A [Champaign, IL; Meitl, Matthew [Raleigh, NC; Sun, Yugang [Naperville, IL; Ko, Heung Cho [Urbana, IL; Carlson, Andrew [Urbana, IL; Choi, Won Mook [Champaign, IL; Stoykovich, Mark [Dover, NH; Jiang, Hanqing [Urbana, IL; Huang, Yonggang [Glencoe, IL; Nuzzo, Ralph G [Champaign, IL; Lee, Keon Jae [Tokyo, JP; Zhu, Zhengtao [Rapid City, SD; Menard, Etienne [Durham, NC; Khang, Dahl-Young [Seoul, KR; Kan, Seong Jun [Daejeon, KR; Ahn, Jong Hyun [Suwon, KR; Kim, Hoon-sik [Champaign, IL

2012-07-10

In an aspect, the present invention provides stretchable, and optionally printable, components such as semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed, and related methods of making or tuning such stretchable components. Stretchable semiconductors and electronic circuits preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention are adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Fabrication of eco-friendly PNP transistor using RF magnetron sputtering

NASA Astrophysics Data System (ADS)

Kumar, B. Santhosh; Harinee, N.; Purvaja, K.; Shanker, N. Praveen; Manikandan, M.; Aparnadevi, N.; Mukilraj, T.; Venkateswaran, C.

2018-05-01

An effort has been made to fabricate a thin film transistor using eco-friendly oxide semiconductor materials. Oxide semiconductor materials are cost - effective, thermally and chemically stable with high electron/hole mobility. Copper (II) oxide is a p-type semiconductor and zinc oxide is an n-type semiconductor. A pnp thin film transistor was fabricated using RF magnetron sputtering. The films deposited have been subjected to structural characterization using AFM. I-V characterization of the fabricated device, Ag/CuO/ZnO/CuO/Ag, confirms transistor behaviour. The mechanism of electron/hole transport of the device is discussed below.

Near-Unity Absorption in van der Waals Semiconductors for Ultrathin Optoelectronics.

PubMed

Jariwala, Deep; Davoyan, Artur R; Tagliabue, Giulia; Sherrott, Michelle C; Wong, Joeson; Atwater, Harry A

2016-09-14

We demonstrate near-unity, broadband absorbing optoelectronic devices using sub-15 nm thick transition metal dichalcogenides (TMDCs) of molybdenum and tungsten as van der Waals semiconductor active layers. Specifically, we report that near-unity light absorption is possible in extremely thin (<15 nm) van der Waals semiconductor structures by coupling to strongly damped optical modes of semiconductor/metal heterostructures. We further fabricate Schottky junction devices using these highly absorbing heterostructures and characterize their optoelectronic performance. Our work addresses one of the key criteria to enable TMDCs as potential candidates to achieve high optoelectronic efficiency.

Noise And Charge Transport In Carbon Nanotube Devices

NASA Astrophysics Data System (ADS)

Reza, Shahed; Huynh, Quyen T.; Bosman, Gijs; Sippel, Jennifer; Rinzler, Andrew G.

2005-11-01

The charge transport and noise properties of three terminal, gated devices containing multiple, single wall, metallic and semiconductor carbon nanotubes have been measured as a function of gate and drain bias at 300K. Using pulsed bias the metallic tubes could be burned sequentially enabling the separation of measured conductance and low frequency excess noise into metallic and semiconductor contributions. The relative low frequency excess noise of the metallic tubes was about a factor 100 lower than that of the semiconductor tubes, whereas the conductance of the metallic tubes was significantly higher (10 to 50 times) than that of the semiconductor tubes.

Gate bias stress in pentacene field-effect-transistors: Charge trapping in the dielectric or semiconductor

NASA Astrophysics Data System (ADS)

Häusermann, R.; Batlogg, B.

2011-08-01

Gate bias stress instability in organic field-effect transistors (OFETs) is a major conceptual and device issue. This effect manifests itself by an undesirable shift of the transfer characteristics and is associated with long term charge trapping. We study the role of the dielectric and the semiconductor separately by producing OFETs with the same semiconductor (pentacene) combined with different dielectrics (SiO2 and Cytop). We show that it is possible to fabricate devices which are immune to gate bias stress. For other material combinations, charge trapping occurs in the semiconductor alone or in the dielectric.

Monolayer borophene electrode for effective elimination of both the Schottky barrier and strong electric field effect

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, L. Z., E-mail: lzliu@nju.edu.cn, E-mail: hkxlwu@nju.edu.cn; Xiong, S. J.; Wu, X. L., E-mail: lzliu@nju.edu.cn, E-mail: hkxlwu@nju.edu.cn

2016-08-08

The formation of Schottky barriers between 2D semiconductors and traditional metallic electrodes has greatly limited the application of 2D semiconductors in nanoelectronic and optoelectronic devices. In this study, metallic borophene was used as a substitute for the traditional noble metal electrode to contact with the 2D semiconductor. Theoretical calculations demonstrated that no Schottky barrier exists in the borophene/2D semiconductor heterostructure. The contact remains ohmic even with a strong electric field applied. This finding provides a way to construct 2D electronic devices and sensors with greatly enhanced performance.

76 FR 2647 - Application(s) for Duty-Free Entry of Scientific Instruments

Federal Register 2010, 2011, 2012, 2013, 2014

2011-01-14

... Netherlands. Intended Use: The instrument will be used for a wide variety of research projects, including the..., the Netherlands. Intended Use: The instrument will be used for a wide variety of research projects including the study of artificial atoms, nanomagnetic research, and advanced semiconductor devices. The...

Doped polymer semiconductors with ultrahigh and ultralow work functions for ohmic contacts.

PubMed

Tang, Cindy G; Ang, Mervin C Y; Choo, Kim-Kian; Keerthi, Venu; Tan, Jun-Kai; Syafiqah, Mazlan Nur; Kugler, Thomas; Burroughes, Jeremy H; Png, Rui-Qi; Chua, Lay-Lay; Ho, Peter K H

2016-11-24

To make high-performance semiconductor devices, a good ohmic contact between the electrode and the semiconductor layer is required to inject the maximum current density across the contact. Achieving ohmic contacts requires electrodes with high and low work functions to inject holes and electrons respectively, where the work function is the minimum energy required to remove an electron from the Fermi level of the electrode to the vacuum level. However, it is challenging to produce electrically conducting films with sufficiently high or low work functions, especially for solution-processed semiconductor devices. Hole-doped polymer organic semiconductors are available in a limited work-function range, but hole-doped materials with ultrahigh work functions and, especially, electron-doped materials with low to ultralow work functions are not yet available. The key challenges are stabilizing the thin films against de-doping and suppressing dopant migration. Here we report a general strategy to overcome these limitations and achieve solution-processed doped films over a wide range of work functions (3.0-5.8 electronvolts), by charge-doping of conjugated polyelectrolytes and then internal ion-exchange to give self-compensated heavily doped polymers. Mobile carriers on the polymer backbone in these materials are compensated by covalently bonded counter-ions. Although our self-compensated doped polymers superficially resemble self-doped polymers, they are generated by separate charge-carrier doping and compensation steps, which enables the use of strong dopants to access extreme work functions. We demonstrate solution-processed ohmic contacts for high-performance organic light-emitting diodes, solar cells, photodiodes and transistors, including ohmic injection of both carrier types into polyfluorene-the benchmark wide-bandgap blue-light-emitting polymer organic semiconductor. We also show that metal electrodes can be transformed into highly efficient hole- and electron-injection contacts via the self-assembly of these doped polyelectrolytes. This consequently allows ambipolar field-effect transistors to be transformed into high-performance p- and n-channel transistors. Our strategy provides a method for producing ohmic contacts not only for organic semiconductors, but potentially for other advanced semiconductors as well, including perovskites, quantum dots, nanotubes and two-dimensional materials.

Outline and comparison of the possible effects present in a metal-thin-film-insulator-semiconductor solar cell

NASA Technical Reports Server (NTRS)

Fonash, S. J.

1976-01-01

The advantages possible with the insertion of a thin-film insulating or semi-insulating layer between a metal and a semiconductor to form the MIS photovoltaic device have been presented previously in the literature. This MIS configuration may be considered as a specific example of a more general class of photovoltaic devices: electrode-thin-film-insulator-semiconductor devices. Since the advantages of the configuration were pointed out, there has been considerable experimental interest in these photovoltaic devices. Because the previous analysis showed that the introduction of the insulator layer could produce several different but advantageous effects, this paper presents a further outline giving a comparison of these effects together with their ramifications.

Efficient Suppression of Defects and Charge Trapping in High Density In-Sn-Zn-O Thin Film Transistor Prepared using Microwave-Assisted Sputter.

PubMed

Goh, Youngin; Ahn, Jaehan; Lee, Jeong Rak; Park, Wan Woo; Ko Park, Sang-Hee; Jeon, Sanghun

2017-10-25

Amorphous oxide semiconductor-based thin film transistors (TFTs) have been considered as excellent switching elements for driving active-matrix organic light-emitting diodes (AMOLED) owing to their high mobility and process compatibility. However, oxide semiconductors have inherent defects, causing fast transient charge trapping and device instability. For the next-generation displays such as flexible, wearable, or transparent displays, an active semiconductor layer with ultrahigh mobility and high reliability at low deposition temperature is required. Therefore, we introduced high density plasma microwave-assisted (MWA) sputtering method as a promising deposition tool for the formation of high density and high-performance oxide semiconductor films. In this paper, we present the effect of the MWA sputtering method on the defects and fast charge trapping in In-Sn-Zn-O (ITZO) TFTs using various AC device characterization methodologies including fast I-V, pulsed I-V, transient current, low frequency noise, and discharge current analysis. Using these methods, we were able to analyze the charge trapping mechanism and intrinsic electrical characteristics, and extract the subgap density of the states of oxide TFTs quantitatively. In comparison to conventional sputtered ITZO, high density plasma MWA-sputtered ITZO exhibits outstanding electrical performance, negligible charge trapping characteristics and low subgap density of states. High-density plasma MWA sputtering method has high deposition rate even at low working pressure and control the ion bombardment energy, resulting in forming low defect generation in ITZO and presenting high performance ITZO TFT. We expect the proposed high density plasma sputtering method to be applicable to a wide range of oxide semiconductor device applications.

A comprehensive study of charge trapping in organic field-effect devices with promising semiconductors and different contact metals by displacement current measurements

NASA Astrophysics Data System (ADS)

Bisoyi, Sibani; Rödel, Reinhold; Zschieschang, Ute; Kang, Myeong Jin; Takimiya, Kazuo; Klauk, Hagen; Tiwari, Shree Prakash

2016-02-01

A systematic and comprehensive study on the charge-carrier injection and trapping behavior was performed using displacement current measurements in long-channel capacitors based on four promising small-molecule organic semiconductors (pentacene, DNTT, C10-DNTT and DPh-DNTT). In thin-film transistors, these semiconductors showed charge-carrier mobilities ranging from 1.0 to 7.8 cm2 V-1 s-1. The number of charges injected into and extracted from the semiconductor and the density of charges trapped in the device during each measurement were calculated from the displacement current characteristics and it was found that the density of trapped charges is very similar in all devices and of the order 1012 cm-2, despite the fact that the four semiconductors show significantly different charge-carrier mobilities. The choice of the contact metal (Au, Ag, Cu, Pd) was also found to have no significant effect on the trapping behavior.

An Ultrathin Single Crystalline Relaxor Ferroelectric Integrated on a High Mobility Semiconductor.

PubMed

Moghadam, Reza M; Xiao, Zhiyong; Ahmadi-Majlan, Kamyar; Grimley, Everett D; Bowden, Mark; Ong, Phuong-Vu; Chambers, Scott A; Lebeau, James M; Hong, Xia; Sushko, Peter V; Ngai, Joseph H

2017-10-11

The epitaxial growth of multifunctional oxides on semiconductors has opened a pathway to introduce new functionalities to semiconductor device technologies. In particular, the integration of gate materials that enable nonvolatile or hysteretic functionality in field-effect transistors could lead to device technologies that consume less power or allow for novel modalities in computing. Here we present electrical characterization of ultrathin single crystalline SrZr x Ti 1-x O 3 (x = 0.7) films epitaxially grown on a high mobility semiconductor, Ge. Epitaxial films of SrZr x Ti 1-x O 3 exhibit relaxor behavior, characterized by a hysteretic polarization that can modulate the surface potential of Ge. We find that gate layers as thin as 5 nm corresponding to an equivalent-oxide thickness of just 1.0 nm exhibit a ∼2 V hysteretic window in the capacitance-voltage characteristics. The development of hysteretic metal-oxide-semiconductor capacitors with nanoscale gate thicknesses opens new vistas for nanoelectronic devices.

Researchers Validate UV Light's Use in Improving Semiconductors | News |

Science.gov Websites

device. The ability to use different classes of semiconductors could create additional possibilities for integrating a variety of different semiconductors in the future," Park said. The researchers explored

78 FR 40427 - Foreign-Trade Zone (FTZ) 183-Austin, Texas; Notification of Proposed Production Activity; Samsung...

Federal Register 2010, 2011, 2012, 2013, 2014

2013-07-05

..., Texas; Notification of Proposed Production Activity; Samsung Austin Semiconductor, LLC (Semiconductors); Austin, Texas Samsung Austin Semiconductor, LLC (Samsung), operator of Subzone 183B, submitted a... June 26, 2013. Samsung currently has authority to produce semiconductor memory devices for export...

Method for altering the luminescence of a semiconductor

DOEpatents

Barbour, J. Charles; Dimos, Duane B.

1999-01-01

A method is described for altering the luminescence of a light emitting semiconductor (LES) device. In particular, a method is described whereby a silicon LES device can be selectively irradiated with a radiation source effective for altering the intensity of luminescence of the irradiated region.

Power semiconductor device with negative thermal feedback

NASA Technical Reports Server (NTRS)

Borky, J. M.; Thornton, R. D.

1970-01-01

Composite power semiconductor avoids second breakdown and provides stable operation. It consists of an array of parallel-connected integrated circuits fabricated in a single chip. The output power device and associated low-level amplifier are closely coupled thermally, so that they have a predetermined temperature relationship.

The Integration of Bacteriorhodopsin Proteins with Semiconductor Heterostructure Devices

NASA Astrophysics Data System (ADS)

Xu, Jian

2008-03-01

Bioelectronics has emerged as one of the most rapidly developing fields among the active frontiers of interdisciplinary research. A major thrust in this field is aimed at the coupling of the technologically-unmatched performance of biological systems, such as neural and sensing functions, with the well developed technology of microelectronics and optoelectronics. To this end we have studied the integration of a suitably engineered protein, bacteriorhodopsin (BR), with semiconductor optoelectronic devices and circuits. Successful integration will potentially lead to ultrasensitive sensors with polarization selectivity and built-in preprocessing capabilities that will be useful for high speed tracking, motion and edge detection, biological detection, and artificial vision systems. In this presentation we will summarize our progresses in this area, which include fundamental studies on the transient dynamics of photo-induced charge shift in BR and the coupling mechanism at protein-semiconductor interface for effective immobilizing and selectively integrating light sensitive proteins with microelectronic devices and circuits, and the device engineering of BR-transistor-integrated optical sensors as well as their applications in phototransceiver circuits. Work done in collaboration with Pallab Bhattacharya, Jonghyun Shin, Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI; Robert R. Birge, Department of Chemistry, University of Connecticut, Storrs, CT 06269; and György V'ar'o, Institute of Biophysics, Biological Research Center of the Hungarian Academy of Science, H-6701 Szeged, Hungary.

Magneto-Optical Thin Films for On-Chip Monolithic Integration of Non-Reciprocal Photonic Devices

PubMed Central

Bi, Lei; Hu, Juejun; Jiang, Peng; Kim, Hyun Suk; Kim, Dong Hun; Onbasli, Mehmet Cengiz; Dionne, Gerald F.; Ross, Caroline A.

2013-01-01

Achieving monolithic integration of nonreciprocal photonic devices on semiconductor substrates has been long sought by the photonics research society. One way to achieve this goal is to deposit high quality magneto-optical oxide thin films on a semiconductor substrate. In this paper, we review our recent research activity on magneto-optical oxide thin films toward the goal of monolithic integration of nonreciprocal photonic devices on silicon. We demonstrate high Faraday rotation at telecommunication wavelengths in several novel magnetooptical oxide thin films including Co substituted CeO2−δ, Co- or Fe-substituted SrTiO3−δ, as well as polycrystalline garnets on silicon. Figures of merit of 3~4 deg/dB and 21 deg/dB are achieved in epitaxial Sr(Ti0.2Ga0.4Fe0.4)O3−δ and polycrystalline (CeY2)Fe5O12 films, respectively. We also demonstrate an optical isolator on silicon, based on a racetrack resonator using polycrystalline (CeY2)Fe5O12/silicon strip-loaded waveguides. Our work demonstrates that physical vapor deposited magneto-optical oxide thin films on silicon can achieve high Faraday rotation, low optical loss and high magneto-optical figure of merit, therefore enabling novel high-performance non-reciprocal photonic devices monolithically integrated on semiconductor substrates. PMID:28788379

DOE Office of Scientific and Technical Information (OSTI.GOV)

Moghadam, Reza M.; Xiao, Zhiyong; Ahmadi-Majlan, Kamyar

The epitaxial growth of multifunctional oxides on semiconductors has opened a pathway to introduce new functionalities to semiconductor device technologies. In particular, ferroelectric materials integrated on semiconductors could lead to low-power field-effect devices that can be used for logic or memory. Essential to realizing such field-effect devices is the development of ferroelectric metal-oxide-semiconductor (MOS) capacitors, in which the polarization of a ferroelectric gate is coupled to the surface potential of a semiconducting channel. Here we demonstrate that ferroelectric MOS capacitors can be realized using single crystalline SrZrxTi1-xO3 (x= 0.7) that has been epitaxially grown on Ge. We find that themore » ferroelectric properties of SrZrxTi1-xO3 are exceptionally robust, as gate layers as thin as 5 nm give rise to hysteretic capacitance-voltage characteristics that are 2 V in width. The development of ferroelectric MOS capacitors with gate thicknesses that are technologically relevant opens a pathway to realize scalable ferroelectric field-effect devices.« less

Recent Progress on Stretchable Electronic Devices with Intrinsically Stretchable Components.

PubMed

Trung, Tran Quang; Lee, Nae-Eung

2017-01-01

Stretchable electronic devices with intrinsically stretchable components have significant inherent advantages, including simple fabrication processes, a high integrity of the stacked layers, and low cost in comparison with stretchable electronic devices based on non-stretchable components. The research in this field has focused on developing new intrinsically stretchable components for conductors, semiconductors, and insulators. New methodologies and fabrication processes have been developed to fabricate stretchable devices with intrinsically stretchable components. The latest successful examples of stretchable conductors for applications in interconnections, electrodes, and piezoresistive devices are reviewed here. Stretchable conductors can be used for electrode or sensor applications depending on the electrical properties of the stretchable conductors under mechanical strain. A detailed overview of the recent progress in stretchable semiconductors, stretchable insulators, and other novel stretchable materials is also given, along with a discussion of the associated technological innovations and challenges. Stretchable electronic devices with intrinsically stretchable components such as field-effect transistors (FETs), photodetectors, light-emitting diodes (LEDs), electronic skins, and energy harvesters are also described and a new strategy for development of stretchable electronic devices is discussed. Conclusions and future prospects for the development of stretchable electronic devices with intrinsically stretchable components are discussed. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Tunnel based spin injection devices for semiconductor spintronics

NASA Astrophysics Data System (ADS)

Jiang, Xin

This dissertation summarizes the work on spin-dependent electron transport and spin injection in tunnel based spintronic devices. In particular, it focuses on a novel three terminal hot electron device combining ferromagnetic metals and semiconductors---the magnetic tunnel transistor (MTT). The MTT has extremely high magnetic field sensitivity and is a useful tool to explore spin-dependent electron transport in metals, semiconductors, and at their interfaces over a wide energy range. In Chap. 1, the basic concept and fabrication of the MTT are discussed. Two types of MTTs, with ferromagnetic single and spin-valve base layers, respectively, are introduced and compared. In the following chapters, the transport properties of the MTT are discussed in detail, including the spin-dependent hot electron attenuation lengths in CoFe and NiFe thin films on GaAs (Chap. 2), the bias voltage dependence of the magneto-current (Chap. 3), the giant magneto-current effect in MTTs with a spin-valve base (Chap. 4), and the influence of non-magnetic seed layers on magneto-electronic properties of MTTs with a Si collector (Chap. 5). Chap. 6 concentrates on electrical injection of spin-polarized electrons into semiconductors, which is an essential ingredient in semiconductor spintronics. Two types of spin injectors are discussed: an MTT injector and a CoFe/MgO tunnel injector. The spin polarization of the injected electron current is detected optically by measuring the circular polarization of electroluminescence from a quantum well light emitting diode. Using an MTT injector a spin polarization of ˜10% is found for injection electron energy of ˜2 eV at 1.4K. This moderate spin polarization is most likely limited by significant electron spin relaxation at high energy. Much higher spin injection efficiency is obtained by using a CoFe/MgO tunnel injector with spin polarization values of ˜50% at 100K. The temperature and bias dependence of the electroluminescence polarization provides insight into spin relaxation mechanisms within the semiconductor heterostructure.

Two-dimensional transition metal dichalcogenides as atomically thin semiconductors: opportunities and challenges.

PubMed

Duan, Xidong; Wang, Chen; Pan, Anlian; Yu, Ruqin; Duan, Xiangfeng

2015-12-21

The discovery of graphene has ignited intensive interest in two-dimensional layered materials (2DLMs). These 2DLMs represent a new class of nearly ideal 2D material systems for exploring fundamental chemistry and physics at the limit of single-atom thickness, and have the potential to open up totally new technological opportunities beyond the reach of existing materials. In general, there are a wide range of 2DLMs in which the atomic layers are weakly bonded together by van der Waals interactions and can be isolated into single or few-layer nanosheets. The van der Waals interactions between neighboring atomic layers could allow much more flexible integration of distinct materials to nearly arbitrarily combine and control different properties at the atomic scale. The transition metal dichalcogenides (TMDs) (e.g., MoS2, WSe2) represent a large family of layered materials, many of which exhibit tunable band gaps that can undergo a transition from an indirect band gap in bulk crystals to a direct band gap in monolayer nanosheets. These 2D-TMDs have thus emerged as an exciting class of atomically thin semiconductors for a new generation of electronic and optoelectronic devices. Recent studies have shown exciting potential of these atomically thin semiconductors, including the demonstration of atomically thin transistors, a new design of vertical transistors, as well as new types of optoelectronic devices such as tunable photovoltaic devices and light emitting devices. In parallel, there have also been considerable efforts in developing diverse synthetic approaches for the rational growth of various forms of 2D materials with precisely controlled chemical composition, physical dimension, and heterostructure interface. Here we review the recent efforts, progress, opportunities and challenges in exploring the layered TMDs as a new class of atomically thin semiconductors.

Implications of Analytical Investigations about the Semiconductor Equations on Device Modeling Programs.

DTIC Science & Technology

1983-04-01

34.. .. . ...- "- -,-. SIGNIFICANCE AND EXPLANATION Many different codes for the simulation of semiconductor devices such as transitors , diodes, thyristors are already circulated...partially take into account the consequences introduced by degenerate semiconductors (e.g. invalidity of Boltzmann’s statistics , bandgap narrowing). These...ft - ni p nep /Ut(2.10) Sni *e p nie 2.11) .7. (2.10) can be physically interpreted as the application of Boltzmann statistics . However (2.10) a.,zo

Investigation of semiconductor clad optical waveguides

NASA Technical Reports Server (NTRS)

Batchman, T. E.; Carson, R. F.

1985-01-01

A variety of techniques have been proposed for fabricating integrated optical devices using semiconductors, lithium niobate, and glasses as waveguides and substrates. The use of glass waveguides and their interaction with thin semiconductor cladding layers was studied. Though the interactions of these multilayer waveguide structures have been analyzed here using glass, they may be applicable to other types of materials as well. The primary reason for using glass is that it provides a simple, inexpensive way to construct waveguides and devices.

Rocksalt nitride metal/semiconductor superlattices: A new class of artificially structured materials

NASA Astrophysics Data System (ADS)

Saha, Bivas; Shakouri, Ali; Sands, Timothy D.

2018-06-01

Artificially structured materials in the form of superlattice heterostructures enable the search for exotic new physics and novel device functionalities, and serve as tools to push the fundamentals of scientific and engineering knowledge. Semiconductor heterostructures are the most celebrated and widely studied artificially structured materials, having led to the development of quantum well lasers, quantum cascade lasers, measurements of the fractional quantum Hall effect, and numerous other scientific concepts and practical device technologies. However, combining metals with semiconductors at the atomic scale to develop metal/semiconductor superlattices and heterostructures has remained a profoundly difficult scientific and engineering challenge. Though the potential applications of metal/semiconductor heterostructures could range from energy conversion to photonic computing to high-temperature electronics, materials challenges primarily had severely limited progress in this pursuit until very recently. In this article, we detail the progress that has taken place over the last decade to overcome the materials engineering challenges to grow high quality epitaxial, nominally single crystalline metal/semiconductor superlattices based on transition metal nitrides (TMN). The epitaxial rocksalt TiN/(Al,Sc)N metamaterials are the first pseudomorphic metal/semiconductor superlattices to the best of our knowledge, and their physical properties promise a new era in superlattice physics and device engineering.

Integrated semiconductor optical sensors for chronic, minimally-invasive imaging of brain function.

PubMed

Lee, Thomas T; Levi, Ofer; Cang, Jianhua; Kaneko, Megumi; Stryker, Michael P; Smith, Stephen J; Shenoy, Krishna V; Harris, James S

2006-01-01

Intrinsic optical signal (IOS) imaging is a widely accepted technique for imaging brain activity. We propose an integrated device consisting of interleaved arrays of gallium arsenide (GaAs) based semiconductor light sources and detectors operating at telecommunications wavelengths in the near-infrared. Such a device will allow for long-term, minimally invasive monitoring of neural activity in freely behaving subjects, and will enable the use of structured illumination patterns to improve system performance. In this work we describe the proposed system and show that near-infrared IOS imaging at wavelengths compatible with semiconductor devices can produce physiologically significant images in mice, even through skull.

Method for altering the luminescence of a semiconductor

DOEpatents

Barbour, J.C.; Dimos, D.B.

1999-01-12

A method is described for altering the luminescence of a light emitting semiconductor (LES) device. In particular, a method is described whereby a silicon LES device can be selectively irradiated with a radiation source effective for altering the intensity of luminescence of the irradiated region. 4 figs.

Resonant optical device with a microheater

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lentine, Anthony L.; DeRose, Christopher

2017-04-04

A resonant photonic device is provided. The device comprises an optical waveguiding element, such as an optical resonator, that includes a diode junction region, two signal terminals configured to apply a bias voltage across the junction region, and a heater laterally separated from the optical waveguiding element. A semiconductor electrical barrier element is juxtaposed to the heater. A metallic strip is electrically and thermally connected at one end to a signal terminal of the optical waveguiding element and thermally connected at another end to the barrier element.

Exploring the Electronic Landscape at Interfaces and Junctions in Semiconductor Nanowire Devices with Subsurface Local Probing of Carrier Dynamics

NASA Astrophysics Data System (ADS)

McGuckin, Terrence

The solid state devices that are pervasive in our society, are based on building blocks composed of interfaces between materials and junctions that manipulate how charge carriers behave in a device. As the dimensions of these devices are reduced to the nanoscale, surfaces and interfaces play a larger role in the behavior of carriers in devices and must be thoroughly investigated to understand not only the material properties but how these materials interact. Separating the effects of these different building blocks is a challenge, as most testing methods measure the performance of the whole device. Semiconductor nanowires represent an excellent test system to explore the limits of size and novel device structures. The behavior of charge carriers in semiconductor nanowire devices under operational conditions is investigated using local probing technique electron beam induced current (EBIC). The behavior of locally excited carriers are driven by the forces of drift, from electric fields within a device at junctions, surfaces, contacts and, applied voltage bias, and diffusion. This thesis presents the results of directly measuring these effects spatially with nanometer resolution, using EBIC in Ge, Si, and complex heterostructure GaAs/AlGaAs nanowire devices. Advancements to the EBIC technique, have pushed the resolution from tens of nanometers down to 1 to 2 nanometers. Depth profiling and tuning of the interaction volume allows for the separating the signal originating from the surface and the interior of the nanowire. Radial junctions and variations in bands can now be analyzed including core/shell hetero-structures. This local carrier probing reveals a number of surprising behaviors; Most notably, directly imaging the evolution of surface traps filling with electrons causing bandbending at the surface of Ge nanowires that leads to an enhancement in the charge separation of electrons and holes, and extracting different characteristic lengths from GaAs and AlGaAs in core/shell nanowires. For new and emerging solid state materials, understanding charge carrier dynamics is crucial to designing functional devices. Presented here are examples of the wide application of EBIC, and its variants, through imaging domains in ferroelectric materials, local electric fields and defects in 2D semiconductor material MoS2, and gradients in doping profiles of solar cells. Measuring the local behavior of carrier dynamics, EBIC has the potential to be a key metrology technique in correlative microscopy, enabling a deeper understanding of materials and how they interact within devices.

Precise, Self-Limited Epitaxy of Ultrathin Organic Semiconductors and Heterojunctions Tailored by van der Waals Interactions.

PubMed

Wu, Bing; Zhao, Yinghe; Nan, Haiyan; Yang, Ziyi; Zhang, Yuhan; Zhao, Huijuan; He, Daowei; Jiang, Zonglin; Liu, Xiaolong; Li, Yun; Shi, Yi; Ni, Zhenhua; Wang, Jinlan; Xu, Jian-Bin; Wang, Xinran

2016-06-08

Precise assembly of semiconductor heterojunctions is the key to realize many optoelectronic devices. By exploiting the strong and tunable van der Waals (vdW) forces between graphene and organic small molecules, we demonstrate layer-by-layer epitaxy of ultrathin organic semiconductors and heterostructures with unprecedented precision with well-defined number of layers and self-limited characteristics. We further demonstrate organic p-n heterojunctions with molecularly flat interface, which exhibit excellent rectifying behavior and photovoltaic responses. The self-limited organic molecular beam epitaxy (SLOMBE) is generically applicable for many layered small-molecule semiconductors and may lead to advanced organic optoelectronic devices beyond bulk heterojunctions.

Microsensors based on GaN semiconductors covalently functionalized with luminescent Ru(II) complexes.

PubMed

López-Gejo, Juan; Arranz, Antonio; Navarro, Alvaro; Palacio, Carlos; Muñoz, Elías; Orellana, Guillermo

2010-02-17

Covalent tethering of a Ru(II) dye to gallium nitride surfaces has been accomplished as a key step in the development of innovative sensing devices in which the indicator support (semiconductor) plays the role of both support and excitation source. Luminescence emission decays and time-resolved emission spectra confirm the presence of the dye on the semiconductor surfaces, while X-ray photoelectron spectroscopy proves its covalent bonding. The O(2) sensitivity of the new device is comparable to those of other ruthenium-based sensor systems. This achievement paves the way to a new generation of integrable ultracompact microsensors that combine semiconductor emitter-probe assemblies.

Fabrication of optically reflecting ohmic contacts for semiconductor devices

DOEpatents

Sopori, Bhushan L.

1995-01-01

A method is provided to produce a low-resistivity ohmic contact having high optical reflectivity on one side of a semiconductor device. The contact is formed by coating the semiconductor substrate with a thin metal film on the back reflecting side and then optically processing the wafer by illuminating it with electromagnetic radiation of a predetermined wavelength and energy level through the front side of the wafer for a predetermined period of time. This method produces a thin epitaxial alloy layer between the semiconductor substrate and the metal layer when a crystalline substrate is used. The alloy layer provides both a low-resistivity ohmic contact and high optical reflectance.

Editorial

NASA Astrophysics Data System (ADS)

Bruzzi, Mara; Cartiglia, Nicolo; Pace, Emanuele; Talamonti, Cinzia

2015-10-01

The 10th edition of the International Conference on Radiation Effects on Semiconductor Materials, Detectors and Devices (RESMDD) was held in Florence, at Dipartimento di Fisica ed Astronomia on October 8-10, 2014. It has been aimed at discussing frontier research activities in several application fields as nuclear and particle physics, astrophysics, medical and solid-state physics. Main topics discussed in this conference concern performance of heavily irradiated silicon detectors, developments required for the luminosity upgrade of the Large Hadron Collider (HL-LHC), ultra-fast silicon detectors design and manufacturing, high-band gap semiconductor detectors, novel semiconductor-based devices for medical applications, radiation damage issues in semiconductors and related radiation-hardening technologies.

VLSI (Very Large Scale Integrated Circuits) Device Reliability Models.

DTIC Science & Technology

1984-12-01

CIRCUIT COMPLEXITY FAILURE RATES FOR... A- 40 MOS SSI/MSI DEVICES IN FAILURE PER 106 HOURS TABLE 5.1.2.5-19: C1 AND C2 CIRCUIT COMPLEXITY FAILURE RATES FOR...A- 40 MOS SSI/MSI DEVICES IN FAILURE PER 106 HOURS TABLE 5.1.2.5-19: Cl AND C2 CIRCUIT COMPLEXITY FAILURE RATES FOR... A-41 LINEAR DEVICES IN...19 National Semiconductor 20 Nitron 21 Raytheon 22 Sprague 23 Synertek 24 Teledyne Crystalonics 25 TRW Semiconductor 26 Zilog The following companies

Whatever happened to silicon carbide. [semiconductor devices

NASA Technical Reports Server (NTRS)

Campbell, R. B.

1981-01-01

The progress made in silicon carbide semiconductor devices in the 1955 to 1975 time frame is examined and reasons are given for the present lack of interest in the material. Its physical and chemical properties and methods of preparation are discussed. Fabrication techniques and the characteristics of silicon carbide devices are reviewed. It is concluded that a combination of economic factors and the lack of progress in fabrication techniques leaves no viable market for SiC devices in the near future.

Semiconductor@metal-organic framework core-shell heterostructures: a case of ZnO@ZIF-8 nanorods with selective photoelectrochemical response.

PubMed

Zhan, Wen-wen; Kuang, Qin; Zhou, Jian-zhang; Kong, Xiang-jian; Xie, Zhao-xiong; Zheng, Lan-sun

2013-02-06

Metal-organic frameworks (MOFs) and related material classes are attracting considerable attention for their applications in gas storage/separation as well as catalysis. In contrast, research concerning potential uses in electronic devices (such as sensors) is in its infancy, which might be due to a great challenge in the fabrication of MOFs and semiconductor composites with well-designed structures. In this paper, we proposed a simple self-template strategy to fabricate metal oxide semiconductor@MOF core-shell heterostructures, and successfully obtained freestanding ZnO@ZIF-8 nanorods as well as vertically standing arrays (including nanorod arrays and nanotube arrays). In this synthetic process, ZnO nanorods not only act as the template but also provide Zn(2+) ions for the formation of ZIF-8. In addition, we have demonstrated that solvent composition and reaction temperature are two crucial factors for successfully fabricating well-defined ZnO@ZIF-8 heterostructures. As we expect, the as-prepared ZnO@ZIF-8 nanorod arrays display distinct photoelectrochemical response to hole scavengers with different molecule sizes (e.g., H(2)O(2) and ascorbic acid) owing to the limitation of the aperture of the ZIF-8 shell. Excitingly, such ZnO@ZIF-8 nanorod arrays were successfully applied to the detection of H(2)O(2) in the presence of serous buffer solution. Therefore, it is reasonable to believe that the semiconductor@MOFs heterostructure potentially has promising applications in many electronic devices including sensors.

Metal-insulator-semiconductor heterostructures for plasmonic hot-carrier optoelectronics.

PubMed

García de Arquer, F Pelayo; Konstantatos, Gerasimos

2015-06-01

Plasmonic hot-electron devices are attractive candidates for light-energy harvesting and photodetection applications. For solid state devices, the most compact and straightforward architecture is the metal-semiconductor Schottky junction. However convenient, this structure introduces limitations such as the elevated dark current associated to thermionic emission, or constraints for device design due to the finite choice of materials. In this work we theoretically consider the metal-insulator-semiconductor heterojunction as a candidate for plasmonic hot-carrier photodetection and solar cells. The presence of the insulating layer can significantly reduce the dark current, resulting in increased device performance with predicted solar power conversion efficiencies up to 9%. For photodetection, the sensitivity can be extended well into the infrared by a judicious choice of the insulating layer, with up to 300-fold expected enhancement in detectivity.

Method to determine the position-dependant metal correction factor for dose-rate equivalent laser testing of semiconductor devices

DOEpatents

Horn, Kevin M.

2013-07-09

A method reconstructs the charge collection from regions beneath opaque metallization of a semiconductor device, as determined from focused laser charge collection response images, and thereby derives a dose-rate dependent correction factor for subsequent broad-area, dose-rate equivalent, laser measurements. The position- and dose-rate dependencies of the charge-collection magnitude of the device are determined empirically and can be combined with a digital reconstruction methodology to derive an accurate metal-correction factor that permits subsequent absolute dose-rate response measurements to be derived from laser measurements alone. Broad-area laser dose-rate testing can thereby be used to accurately determine the peak transient current, dose-rate response of semiconductor devices to penetrating electron, gamma- and x-ray irradiation.

Progress in silicon carbide semiconductor technology

NASA Technical Reports Server (NTRS)

Powell, J. A.; Neudeck, P. G.; Matus, L. G.; Petit, J. B.

1992-01-01

Silicon carbide semiconductor technology has been advancing rapidly over the last several years. Advances have been made in boule growth, thin film growth, and device fabrication. This paper wi11 review reasons for the renewed interest in SiC, and will review recent developments in both crystal growth and device fabrication.

Spatially Mapping Energy Transfer from Single Plasmonic Particles to Semiconductor Substrates via STEM/EELS.

PubMed

Li, Guoliang; Cherqui, Charles; Bigelow, Nicholas W; Duscher, Gerd; Straney, Patrick J; Millstone, Jill E; Masiello, David J; Camden, Jon P

2015-05-13

Energy transfer from plasmonic nanoparticles to semiconductors can expand the available spectrum of solar energy-harvesting devices. Here, we spatially and spectrally resolve the interaction between single Ag nanocubes with insulating and semiconducting substrates using electron energy-loss spectroscopy, electrodynamics simulations, and extended plasmon hybridization theory. Our results illustrate a new way to characterize plasmon-semiconductor energy transfer at the nanoscale and bear impact upon the design of next-generation solar energy-harvesting devices.

Programme and Abstracts. Workshop on Expert Evaluation and Control of Compound Semiconductor Materials and Technologies (1st) Held in Ecole Centrale De Lyon, France on 19 -22 May 1992. (EXAMTEC’ 92)

DTIC Science & Technology

1992-05-22

Evaluation and Control of Compound Semiconductor Materials and Technologies (EXMATEC󈨠) at Ecole Centrale de Lyon (Ecully, France, 19th to 22nd May...semiconductor technologies to manufacture advanced devices with improved reproducibility, better reliability and lower cost. -’Device structures...concepts are required for expert evaluation and control of still developing technologies . In this context, the EXMATEC series will constitute a major

Organic semiconductor crystals.

PubMed

Wang, Chengliang; Dong, Huanli; Jiang, Lang; Hu, Wenping

2018-01-22

Organic semiconductors have attracted a lot of attention since the discovery of highly doped conductive polymers, due to the potential application in field-effect transistors (OFETs), light-emitting diodes (OLEDs) and photovoltaic cells (OPVs). Single crystals of organic semiconductors are particularly intriguing because they are free of grain boundaries and have long-range periodic order as well as minimal traps and defects. Hence, organic semiconductor crystals provide a powerful tool for revealing the intrinsic properties, examining the structure-property relationships, demonstrating the important factors for high performance devices and uncovering fundamental physics in organic semiconductors. This review provides a comprehensive overview of the molecular packing, morphology and charge transport features of organic semiconductor crystals, the control of crystallization for achieving high quality crystals and the device physics in the three main applications. We hope that this comprehensive summary can give a clear picture of the state-of-art status and guide future work in this area.

Optoelectronic device physics and technology of nitride semiconductors from the UV to the terahertz.

PubMed

Moustakas, Theodore D; Paiella, Roberto

2017-10-01

This paper reviews the device physics and technology of optoelectronic devices based on semiconductors of the GaN family, operating in the spectral regions from deep UV to Terahertz. Such devices include LEDs, lasers, detectors, electroabsorption modulators and devices based on intersubband transitions in AlGaN quantum wells (QWs). After a brief history of the development of the field, we describe how the unique crystal structure, chemical bonding, and resulting spontaneous and piezoelectric polarizations in heterostructures affect the design, fabrication and performance of devices based on these materials. The heteroepitaxial growth and the formation and role of extended defects are addressed. The role of the chemical bonding in the formation of metallic contacts to this class of materials is also addressed. A detailed discussion is then presented on potential origins of the high performance of blue LEDs and poorer performance of green LEDs (green gap), as well as of the efficiency reduction of both blue and green LEDs at high injection current (efficiency droop). The relatively poor performance of deep-UV LEDs based on AlGaN alloys and methods to address the materials issues responsible are similarly addressed. Other devices whose state-of-the-art performance and materials-related issues are reviewed include violet-blue lasers, 'visible blind' and 'solar blind' detectors based on photoconductive and photovoltaic designs, and electroabsorption modulators based on bulk GaN or GaN/AlGaN QWs. Finally, we describe the basic physics of intersubband transitions in AlGaN QWs, and their applications to near-infrared and terahertz devices.

Optoelectronic device physics and technology of nitride semiconductors from the UV to the terahertz

NASA Astrophysics Data System (ADS)

Moustakas, Theodore D.; Paiella, Roberto

2017-10-01

This paper reviews the device physics and technology of optoelectronic devices based on semiconductors of the GaN family, operating in the spectral regions from deep UV to Terahertz. Such devices include LEDs, lasers, detectors, electroabsorption modulators and devices based on intersubband transitions in AlGaN quantum wells (QWs). After a brief history of the development of the field, we describe how the unique crystal structure, chemical bonding, and resulting spontaneous and piezoelectric polarizations in heterostructures affect the design, fabrication and performance of devices based on these materials. The heteroepitaxial growth and the formation and role of extended defects are addressed. The role of the chemical bonding in the formation of metallic contacts to this class of materials is also addressed. A detailed discussion is then presented on potential origins of the high performance of blue LEDs and poorer performance of green LEDs (green gap), as well as of the efficiency reduction of both blue and green LEDs at high injection current (efficiency droop). The relatively poor performance of deep-UV LEDs based on AlGaN alloys and methods to address the materials issues responsible are similarly addressed. Other devices whose state-of-the-art performance and materials-related issues are reviewed include violet-blue lasers, ‘visible blind’ and ‘solar blind’ detectors based on photoconductive and photovoltaic designs, and electroabsorption modulators based on bulk GaN or GaN/AlGaN QWs. Finally, we describe the basic physics of intersubband transitions in AlGaN QWs, and their applications to near-infrared and terahertz devices.

Device having two optical ports for switching applications

DOEpatents

Rosen, Ayre; Stabile, Paul J.

1991-09-24

A two-sided light-activatable semiconductor switch device having an optical port on each side thereof. The semiconductor device may be a p-i-n diode or of bulk intrinsic material. A two ported p-i-n diode, reverse-biased to "off" by a 1.3 kV dc power supply, conducted 192 A when activated by two 1 kW laser diode arrays, one for each optical port.

Lorentz factor determination for local electric fields in semiconductor devices utilizing hyper-thin dielectrics

DOE Office of Scientific and Technical Information (OSTI.GOV)

McPherson, J. W., E-mail: mcpherson.reliability@yahoo.com

The local electric field (the field that distorts, polarizes, and weakens polar molecular bonds in dielectrics) has been investigated for hyper-thin dielectrics. Hyper-thin dielectrics are currently required for advanced semiconductor devices. In the work presented, it is shown that the common practice of using a Lorentz factor of L = 1/3, to describe the local electric field in a dielectric layer, remains valid for hyper-thin dielectrics. However, at the very edge of device structures, a rise in the macroscopic/Maxwell electric field E{sub diel} occurs and this causes a sharp rise in the effective Lorentz factor L{sub eff}. At capacitor and transistor edges,more » L{sub eff} is found to increase to a value 2/3 < L{sub eff} < 1. The increase in L{sub eff} results in a local electric field, at device edge, that is 50%–100% greater than in the bulk of the dielectric. This increase in local electric field serves to weaken polar bonds thus making them more susceptible to breakage by standard Boltzmann and/or current-driven processes. This has important time-dependent dielectric breakdown (TDDB) implications for all electronic devices utilizing polar materials, including GaN devices that suffer from device-edge TDDB.« less

Implantable biomedical devices on bioresorbable substrates

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rogers, John A; Kim, Dae-Hyeong; Omenetto, Fiorenzo

Provided herein are implantable biomedical devices, methods of administering implantable biomedical devices, methods of making implantable biomedical devices, and methods of using implantable biomedical devices to actuate a target tissue or sense a parameter associated with the target tissue in a biological environment. Each implantable biomedical device comprises a bioresorbable substrate, an electronic device having a plurality of inorganic semiconductor components supported by the bioresorbable substrate, and a barrier layer encapsulating at least a portion of the inorganic semiconductor components. Upon contact with a biological environment the bioresorbable substrate is at least partially resorbed, thereby establishing conformal contact between themore » implantable biomedical device and the target tissue in the biological environment.« less

High efficiency light source using solid-state emitter and down-conversion material

DOEpatents

Narendran, Nadarajah; Gu, Yimin; Freyssinier, Jean Paul

2010-10-26

A light emitting apparatus includes a source of light for emitting light; a down conversion material receiving the emitted light, and converting the emitted light into transmitted light and backward transmitted light; and an optic device configured to receive the backward transmitted light and transfer the backward transmitted light outside of the optic device. The source of light is a semiconductor light emitting diode, a laser diode (LD), or a resonant cavity light emitting diode (RCLED). The down conversion material includes one of phosphor or other material for absorbing light in one spectral region and emitting light in another spectral region. The optic device, or lens, includes light transmissive material.

Thermal modeling of wide bandgap semiconductor devices for high frequency power converters

NASA Astrophysics Data System (ADS)

Sharath Sundar Ram, S.; Vijayakumari, A.

2018-02-01

The emergence of wide bandgap semiconductors has led to development of new generation semiconductor switches that are highly efficient and scalable. To exploit the advantages of GaNFETs in power converters, in terms of reduction in the size of heat sinks and filters, a thorough understanding of the thermal behavior of the device is essential. This paper aims to establish a thermal model for wideband gap semiconductor GaNFETs commercially available, which will enable power electronic designers to obtain the thermal characteristics of the device more effectively. The model parameters is obtained from the manufacturer’s data sheet by adopting an exponential curve fitting technique and the thermal model is validated using PSPICE simulations. The model was developed based on the parametric equivalence that exists between the thermal and electrical components, such that it responds for transient thermal stresses. A suitable power profile has been generated to evaluate the GaNFET model under different power dissipation scenarios. The results were compared with a Silicon MOSFETs to further highlight the advantages of the GaN devices. The proposed modeling approach can be extended for other GaN devices and can provide a platform for the thermal study and heat sink optimization.

Flat-lying semiconductor-insulator interfacial layer in DNTT thin films.

PubMed

Jung, Min-Cherl; Leyden, Matthew R; Nikiforov, Gueorgui O; Lee, Michael V; Lee, Han-Koo; Shin, Tae Joo; Takimiya, Kazuo; Qi, Yabing

2015-01-28

The molecular order of organic semiconductors at the gate dielectric is the most critical factor determining carrier mobility in thin film transistors since the conducting channel forms at the dielectric interface. Despite its fundamental importance, this semiconductor-insulator interface is not well understood, primarily because it is buried within the device. We fabricated dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT) thin film transistors by thermal evaporation in vacuum onto substrates held at different temperatures and systematically correlated the extracted charge mobility to the crystal grain size and crystal orientation. As a result, we identify a molecular layer of flat-lying DNTT molecules at the semiconductor-insulator interface. It is likely that such a layer might form in other material systems as well, and could be one of the factors reducing charge transport. Controlling this interfacial flat-lying layer may raise the ultimate possible device performance for thin film devices.

Active Control of Charge Density Waves at Degenerate Semiconductor Interfaces

NASA Astrophysics Data System (ADS)

Vinnakota, Raj; Genov, Dentcho

We present numerical modeling of an active electronically controlled highly confined charge-density waves, i.e. surface plasmon polaritons (SPPs) at the metallurgic interfaces of degenerate semiconductor materials. An electro-optic switching element for fully-functional plasmonic circuits based on p-n junction semiconductor Surface Plasmon Polariton (SPP) waveguide is shown. Two figures of merits are introduced and parametric study has been performed identifying the device optimal operation range. The Indium Gallium Arsenide (In0.53Ga0.47As) is identified as the best semiconductor material for the device providing high optical confinement, reduced system size and fast operation. The electro-optic SPP switching element is shown to operate at signal modulation up to -24dB and switching rates surpassing 100GHz, thus potentially providing a new pathway toward bridging the gap between electronic and photonic devices. The current work is funded by the NSF EPSCoR CIMM project under award #OIA-1541079.

Achieving Optimal Self-Adaptivity for Dynamic Tuning of Organic Semiconductors through Resonance Engineering.

PubMed

Tao, Ye; Xu, Lijia; Zhang, Zhen; Chen, Runfeng; Li, Huanhuan; Xu, Hui; Zheng, Chao; Huang, Wei

2016-08-03

Current static-state explorations of organic semiconductors for optimal material properties and device performance are hindered by limited insights into the dynamically changed molecular states and charge transport and energy transfer processes upon device operation. Here, we propose a simple yet successful strategy, resonance variation-based dynamic adaptation (RVDA), to realize optimized self-adaptive properties in donor-resonance-acceptor molecules by engineering the resonance variation for dynamic tuning of organic semiconductors. Organic light-emitting diodes hosted by these RVDA materials exhibit remarkably high performance, with external quantum efficiencies up to 21.7% and favorable device stability. Our approach, which supports simultaneous realization of dynamically adapted and selectively enhanced properties via resonance engineering, illustrates a feasible design map for the preparation of smart organic semiconductors capable of dynamic structure and property modulations, promoting the studies of organic electronics from static to dynamic.

Exchanging Ohmic Losses in Metamaterial Absorbers with Useful Optical Absorption for Photovoltaics

PubMed Central

Vora, Ankit; Gwamuri, Jephias; Pala, Nezih; Kulkarni, Anand; Pearce, Joshua M.; Güney, Durdu Ö.

2014-01-01

Using metamaterial absorbers, we have shown that metallic layers in the absorbers do not necessarily constitute undesired resistive heating problem for photovoltaics. Tailoring the geometric skin depth of metals and employing the natural bulk absorbance characteristics of the semiconductors in those absorbers can enable the exchange of undesired resistive losses with the useful optical absorbance in the active semiconductors. Thus, Ohmic loss dominated metamaterial absorbers can be converted into photovoltaic near-perfect absorbers with the advantage of harvesting the full potential of light management offered by the metamaterial absorbers. Based on experimental permittivity data for indium gallium nitride, we have shown that between 75%–95% absorbance can be achieved in the semiconductor layers of the converted metamaterial absorbers. Besides other metamaterial and plasmonic devices, our results may also apply to photodectors and other metal or semiconductor based optical devices where resistive losses and power consumption are important pertaining to the device performance. PMID:24811322

Processing approach towards the formation of thin-film Cu(In,Ga)Se2

DOEpatents

Beck, Markus E.; Noufi, Rommel

2003-01-01

A two-stage method of producing thin-films of group IB-IIIA-VIA on a substrate for semiconductor device applications includes a first stage of depositing an amorphous group IB-IIIA-VIA precursor onto an unheated substrate, wherein the precursor contains all of the group IB and group IIIA constituents of the semiconductor thin-film to be produced in the stoichiometric amounts desired for the final product, and a second stage which involves subjecting the precursor to a short thermal treatment at 420.degree. C.-550.degree. C. in a vacuum or under an inert atmosphere to produce a single-phase, group IB-III-VIA film. Preferably the precursor also comprises the group VIA element in the stoichiometric amount desired for the final semiconductor thin-film. The group IB-IIIA-VIA semiconductor films may be, for example, Cu(In,Ga)(Se,S).sub.2 mixed-metal chalcogenides. The resultant supported group IB-IIIA-VIA semiconductor film is suitable for use in photovoltaic applications.

Semiconductor wire array structures, and solar cells and photodetectors based on such structures

DOEpatents

Kelzenberg, Michael D.; Atwater, Harry A.; Briggs, Ryan M.; Boettcher, Shannon W.; Lewis, Nathan S.; Petykiewicz, Jan A.

2014-08-19

A structure comprising an array of semiconductor structures, an infill material between the semiconductor materials, and one or more light-trapping elements is described. Photoconverters and photoelectrochemical devices based on such structure also described.

Microscopic studies of the fate of charges in organic semiconductors: Scanning Kelvin probe measurements of charge trapping, transport, and electric fields in p- and n-type devices

NASA Astrophysics Data System (ADS)

Smieska, Louisa Marion

Organic semiconductors could have wide-ranging applications in lightweight, efficient electronic circuits. However, several fundamental questions regarding organic electronic device behavior have not yet been fully addressed, including the nature of chemical charge traps, and robust models for injection and transport. Many studies focus on engineering devices through bulk transport measurements, but it is not always possible to infer the microscopic behavior leading to the observed measurements. In this thesis, we present scanning-probe microscope studies of organic semiconductor devices in an effort to connect local properties with local device behavior. First, we study the chemistry of charge trapping in pentacene transistors. Working devices are doped with known pentacene impurities and the extent of charge trap formation is mapped across the transistor channel. Trap-clearing spectroscopy is employed to measure an excitation of the pentacene charge trap species, enabling identification of the degradationrelated chemical trap in pentacene. Second, we examine transport and trapping in peryelene diimide (PDI) transistors. Local mobilities are extracted from surface potential profiles across a transistor channel, and charge injection kinetics are found to be highly sensitive to electrode cleanliness. Trap-clearing spectra generally resemble PDI absorption spectra, but one derivative yields evidence indicating variation in trap-clearing mechanisms for different surface chemistries. Trap formation rates are measured and found to be independent of surface chemistry, contradicting a proposed silanol trapping mechanism. Finally, we develop a variation of scanning Kelvin probe microscopy that enables measurement of electric fields through a position modulation. This method avoids taking a numeric derivative of potential, which can introduce high-frequency noise into the electric field signal. Preliminary data is presented, and the theoretical basis for electric field noise in both methods is examined.

Nanocrystals for electronics.

PubMed

Panthani, Matthew G; Korgel, Brian A

2012-01-01

Semiconductor nanocrystals are promising materials for low-cost large-area electronic device fabrication. They can be synthesized with a wide variety of chemical compositions and size-tunable optical and electronic properties as well as dispersed in solvents for room-temperature deposition using various types of printing processes. This review addresses research progress in large-area electronic device applications using nanocrystal-based electrically active thin films, including thin-film transistors, light-emitting diodes, photovoltaics, and thermoelectrics.

Light-Emitting GaAs Nanowires on a Flexible Substrate.

PubMed

Valente, João; Godde, Tillmann; Zhang, Yunyan; Mowbray, David J; Liu, Huiyun

2018-06-18

Semiconductor nanowire-based devices are among the most promising structures used to meet the current challenges of electronics, optics and photonics. Due to their high surface-to-volume ratio and excellent optical and electrical properties, devices with low power, high efficiency and high density can be created. This is of major importance for environmental issues and economic impact. Semiconductor nanowires have been used to fabricate high performance devices, including detectors, solar cells and transistors. Here, we demonstrate a technique for transferring large-area nanowire arrays to flexible substrates while retaining their excellent quantum efficiency in emission. Starting with a defect-free self-catalyzed molecular beam epitaxy (MBE) sample grown on a Si substrate, GaAs core-shell nanowires are embedded in a dielectric, removed by reactive ion etching and transferred to a plastic substrate. The original structural and optical properties, including the vertical orientation, of the nanowires are retained in the final plastic substrate structure. Nanowire emission is observed for all stages of the fabrication process, with a higher emission intensity observed for the final transferred structure, consistent with a reduction in nonradiative recombination via the modification of surface states. This transfer process could form the first critical step in the development of flexible nanowire-based light-emitting devices.

Resistive field structures for semiconductor devices and uses therof

DOE Office of Scientific and Technical Information (OSTI.GOV)

Marinella, Matthew; DasGupta, Sandeepan; Kaplar, Robert

The present disclosure relates to resistive field structures that provide improved electric field profiles when used with a semiconductor device. In particular, the resistive field structures provide a uniform electric field profile, thereby enhancing breakdown voltage and improving reliability. In example, the structure is a field cage that is configured to be resistive, in which the potential changes significantly over the distance of the cage. In another example, the structure is a resistive field plate. Using these resistive field structures, the characteristics of the electric field profile can be independently modulated from the physical parameters of the semiconductor device. Additionalmore » methods and architectures are described herein.« less

Electrical Characterization of Semiconductor Materials and Devices

NASA Astrophysics Data System (ADS)

Deen, M.; Pascal, Fabien

Semiconductor materials and devices continue to occupy a preeminent technological position due to their importance when building integrated electronic systems used in a wide range of applications from computers, cell-phones, personal digital assistants, digital cameras and electronic entertainment systems, to electronic instrumentation for medical diagnositics and environmental monitoring. Key ingredients of this technological dominance have been the rapid advances made in the quality and processing of materials - semiconductors, conductors and dielectrics - which have given metal oxide semiconductor device technology its important characteristics of negligible standby power dissipation, good input-output isolation, surface potential control and reliable operation. However, when assessing material quality and device reliability, it is important to have fast, nondestructive, accurate and easy-to-use electrical characterization techniques available, so that important parameters such as carrier doping density, type and mobility of carriers, interface quality, oxide trap density, semiconductor bulk defect density, contact and other parasitic resistances and oxide electrical integrity can be determined. This chapter describes some of the more widely employed and popular techniques that are used to determine these important parameters. The techniques presented in this chapter range in both complexity and test structure requirements from simple current-voltage measurements to more sophisticated low-frequency noise, charge pumping and deep-level transient spectroscopy techniques.

Substrate structures for InP-based devices

DOEpatents

Wanlass, Mark W.; Sheldon, Peter

1990-01-01

A substrate structure for an InP-based semiconductor device having an InP based film is disclosed. The substrate structure includes a substrate region having a lightweight bulk substrate and an upper GaAs layer. An interconnecting region is disposed between the substrate region and the InP-based device. The interconnecting region includes a compositionally graded intermediate layer substantially lattice-matched at one end to the GaAs layer and substantially lattice-matched at the opposite end to the InP-based film. The interconnecting region further includes a dislocation mechanism disposed between the GaAs layer and the InP-based film in cooperation with the graded intermediate layer, the buffer mechanism blocking and inhibiting propagation of threading dislocations between the substrate region, and the InP-based device.

High performance low voltage organic field effect transistors on plastic substrate for amplifier circuits

NASA Astrophysics Data System (ADS)

Houin, G.; Duez, F.; Garcia, L.; Cantatore, E.; Torricelli, F.; Hirsch, L.; Belot, D.; Pellet, C.; Abbas, M.

2016-09-01

The high performance air stable organic semiconductor small molecule dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT) was chosen as active layer for field effect transistors built to realize flexible amplifier circuits. Initial device on rigid Si/SiO2 substrate showed appreciable performance with hysteresis-free characteristics. A number of approaches were applied to simplify the process, improve device performance and decrease the operating voltage: they include an oxide interfacial layer to decrease contact resistance; a polymer passivation layer to optimize semiconductor/dielectric interface and an anodized high-k oxide as dielectric layer for low voltage operation. The devices fabricated on plastic substrate yielded excellent electrical characteristics, showing mobility of 1.6 cm2/Vs, lack of hysteresis, operation below 5 V and on/off current ratio above 105. An OFET model based on variable ranging hopping theory was used to extract the relevant parameters from the transfer and output characteristics, which enabled us to simulate our devices achieving reasonable agreement with the measurements

Electroless silver plating of the surface of organic semiconductors.

PubMed

Campione, Marcello; Parravicini, Matteo; Moret, Massimo; Papagni, Antonio; Schröter, Bernd; Fritz, Torsten

2011-10-04

The integration of nanoscale processes and devices demands fabrication routes involving rapid, cost-effective steps, preferably carried out under ambient conditions. The realization of the metal/organic semiconductor interface is one of the most demanding steps of device fabrication, since it requires mechanical and/or thermal treatments which increment costs and are often harmful in respect to the active layer. Here, we provide a microscopic analysis of a room temperature, electroless process aimed at the deposition of a nanostructured metallic silver layer with controlled coverage atop the surface of single crystals and thin films of organic semiconductors. This process relies on the reaction of aqueous AgF solutions with the nonwettable crystalline surface of donor-type organic semiconductors. It is observed that the formation of a uniform layer of silver nanoparticles can be accomplished within 20 min contact time. The electrical characterization of two-terminal devices performed before and after the aforementioned treatment shows that the metal deposition process is associated with a redox reaction causing the p-doping of the semiconductor. © 2011 American Chemical Society

Study on the photoresponse of amorphous In-Ga-Zn-O and zinc oxynitride semiconductor devices by the extraction of sub-gap-state distribution and device simulation.

PubMed

Jang, Jun Tae; Park, Jozeph; Ahn, Byung Du; Kim, Dong Myong; Choi, Sung-Jin; Kim, Hyun-Suk; Kim, Dae Hwan

2015-07-22

Persistent photoconduction (PPC) is a phenomenon that limits the application of oxide semiconductor thin-film transistors (TFTs) in optical sensor-embedded displays. In the present work, a study on zinc oxynitride (ZnON) semiconductor TFTs based on the combination of experimental results and device simulation is presented. Devices incorporating ZnON semiconductors exhibit negligible PPC effects compared with amorphous In-Ga-Zn-O (a-IGZO) TFTs, and the difference between the two types of materials are examined by monochromatic photonic C-V spectroscopy (MPCVS). The latter method allows the estimation of the density of subgap states in the semiconductor, which may account for the different behavior of ZnON and IGZO materials with respect to illumination and the associated PPC. In the case of a-IGZO TFTs, the oxygen flow rate during the sputter deposition of a-IGZO is found to influence the amount of PPC. Small oxygen flow rates result in pronounced PPC, and large densities of valence band tail (VBT) states are observed in the corresponding devices. This implies a dependence of PPC on the amount of oxygen vacancies (VO). On the other hand, ZnON has a smaller bandgap than a-IGZO and contains a smaller density of VBT states over the entire range of its bandgap energy. Here, the concept of activation energy window (AEW) is introduced to explain the occurrence of PPC effects by photoinduced electron doping, which is likely to be associated with the formation of peroxides in the semiconductor. The analytical methodology presented in this report accounts well for the reduction of PPC in ZnON TFTs, and provides a quantitative tool for the systematic development of phototransistors for optical sensor-embedded interactive displays.

Graded junction termination extensions for electronic devices

NASA Technical Reports Server (NTRS)

Merrett, J. Neil (Inventor); Isaacs-Smith, Tamara (Inventor); Sheridan, David C. (Inventor); Williams, John R. (Inventor)

2006-01-01

A graded junction termination extension in a silicon carbide (SiC) semiconductor device and method of its fabrication using ion implementation techniques is provided for high power devices. The properties of silicon carbide (SiC) make this wide band gap semiconductor a promising material for high power devices. This potential is demonstrated in various devices such as p-n diodes, Schottky diodes, bipolar junction transistors, thyristors, etc. These devices require adequate and affordable termination techniques to reduce leakage current and increase breakdown voltage in order to maximize power handling capabilities. The graded junction termination extension disclosed is effective, self-aligned, and simplifies the implementation process.

Graded junction termination extensions for electronic devices

NASA Technical Reports Server (NTRS)

Merrett, J. Neil (Inventor); Isaacs-Smith, Tamara (Inventor); Sheridan, David C. (Inventor); Williams, John R. (Inventor)

2007-01-01

A graded junction termination extension in a silicon carbide (SiC) semiconductor device and method of its fabrication using ion implementation techniques is provided for high power devices. The properties of silicon carbide (SiC) make this wide band gap semiconductor a promising material for high power devices. This potential is demonstrated in various devices such as p-n diodes, Schottky diodes, bipolar junction transistors, thyristors, etc. These devices require adequate and affordable termination techniques to reduce leakage current and increase breakdown voltage in order to maximize power handling capabilities. The graded junction termination extension disclosed is effective, self-aligned, and simplifies the implementation process.

Optical cavity furnace for semiconductor wafer processing

DOEpatents

Sopori, Bhushan L.

2014-08-05

An optical cavity furnace 10 having multiple optical energy sources 12 associated with an optical cavity 18 of the furnace. The multiple optical energy sources 12 may be lamps or other devices suitable for producing an appropriate level of optical energy. The optical cavity furnace 10 may also include one or more reflectors 14 and one or more walls 16 associated with the optical energy sources 12 such that the reflectors 14 and walls 16 define the optical cavity 18. The walls 16 may have any desired configuration or shape to enhance operation of the furnace as an optical cavity 18. The optical energy sources 12 may be positioned at any location with respect to the reflectors 14 and walls defining the optical cavity. The optical cavity furnace 10 may further include a semiconductor wafer transport system 22 for transporting one or more semiconductor wafers 20 through the optical cavity.

Mechanical scriber for semiconductor devices

DOEpatents

Lin, Peter T.

1985-01-01

A mechanical scriber using a scribing tip, such as a diamond, provides controlled scriber forces with a spring-loaded compound lever arrangement. The scribing force and range of scribing depth are adjusted by a pair of adjustable micrometer heads. A semiconductor device, such as a multilayer solar cell, can be formed into scribed strips at each layer.

Semiconductors: In Situ Processing of Photovoltaic Devices

NASA Technical Reports Server (NTRS)

Curreri, Peter A.

1998-01-01

The possible processing of semiconductor photovoltaic devices is discussed. The requirements for lunar PV cells is reviewed, and the key challenges involved in their manufacturing are investigated. A schematic diagram of a passivated emitter and rear cell (PERC) is presented. The possible fabrication of large photovoltaic arrays in space from lunar materials is also discussed.

Methods to Account for Accelerated Semi-Conductor Device Wearout in Longlife Aerospace Applications

DTIC Science & Technology

2003-01-01

Vasi, “Device scalling effects on hot-carrier induced interface and oxide-trappoing charge distributions in MOSFETs,” IEEE Transactions on Electron...Symposium Proceedings, pp. 248–254, 2002. [104] S. I. A. ( SIA ), “International technology roadmap for semiconductors.” <www.semichips.org>, 1999. 113

Large-Area CVD-Grown Sub-2 V ReS2 Transistors and Logic Gates.

PubMed

Dathbun, Ajjiporn; Kim, Youngchan; Kim, Seongchan; Yoo, Youngjae; Kang, Moon Sung; Lee, Changgu; Cho, Jeong Ho

2017-05-10

We demonstrated the fabrication of large-area ReS 2 transistors and logic gates composed of a chemical vapor deposition (CVD)-grown multilayer ReS 2 semiconductor channel and graphene electrodes. Single-layer graphene was used as the source/drain and coplanar gate electrodes. An ion gel with an ultrahigh capacitance effectively gated the ReS 2 channel at a low voltage, below 2 V, through a coplanar gate. The contact resistance of the ion gel-gated ReS 2 transistors with graphene electrodes decreased dramatically compared with the SiO 2 -devices prepared with Cr electrodes. The resulting transistors exhibited good device performances, including a maximum electron mobility of 0.9 cm 2 /(V s) and an on/off current ratio exceeding 10 4 . NMOS logic devices, such as NOT, NAND, and NOR gates, were assembled using the resulting transistors as a proof of concept demonstration of the applicability of the devices to complex logic circuits. The large-area synthesis of ReS 2 semiconductors and graphene electrodes and their applications in logic devices open up new opportunities for realizing future flexible electronics based on 2D nanomaterials.

GaN-on-Silicon - Present capabilities and future directions

NASA Astrophysics Data System (ADS)

Boles, Timothy

2018-02-01

Gallium Nitride, in the form of epitaxial HEMT transistors on various substrate materials, is the newest and most promising semiconductor technology for high performance devices in the RF, microwave, and mmW arenas. This is particularly true for GaN-on-Silicon based devices and MMIC's which enable both state-of-the-art high frequency functionality and the ability to scale production into large wafer diameter CMOS foundries. The design and development of GaN-on-Silicon structures and devices will be presented beginning with the basic material parameters, growth of the required epitaxial construction, and leading to the fundamental operational theory of high frequency, high power HEMTs. In this discussion comparisons will be made with alternative substrate materials with emphasis on contrasting the inherent advantages of a silicon based system. Theory of operation of microwave and mmW high power HEMT devices will be presented with special emphasis on fundamental limitations of device performance including inherent frequency limiting transit time analysis, required impedance transformations, internal and external parasitic reactance, thermal impedance optimization, and challenges improved by full integration into monolithic MMICs. Lastly, future directions for implementing GaN-on-Silicon into mainstream CMOS silicon semiconductor technologies will be discussed.

Semiconductor laser-based optoelectronics oscillators

NASA Astrophysics Data System (ADS)

Yao, X. S.; Maleki, Lute; Wu, Chi; Davis, Lawrence J.; Forouhar, Siamak

1998-08-01

We demonstrate the realization of coupled opto-electronic oscillators (COEO) with different semiconductor lasers, including a ring laser, a Fabry-Perot laser, and a colliding pulse mode-locked laser. Each COEO can simultaneously generate short optical pulses and spectrally pure RF signals. With these devices, we obtained optical pulses as short as 6 picoseconds and RF signals as high in frequency as 18 GHz with a spectral purity comparable with a HP8561B synthesizer. These experiments demonstrate that COEOs are promising compact sources for generating low jitter optical pulses and low phase noise RF/millimeter wave signals.

Rapid thermal processing by stamping

DOEpatents

Stradins, Pauls; Wang, Qi

2013-03-05

A rapid thermal processing device and methods are provided for thermal processing of samples such as semiconductor wafers. The device has components including a stamp (35) having a stamping surface and a heater or cooler (40) to bring it to a selected processing temperature, a sample holder (20) for holding a sample (10) in position for intimate contact with the stamping surface; and positioning components (25) for moving the stamping surface and the stamp (35) in and away from intimate, substantially non-pressured contact. Methods for using and making such devices are also provided. These devices and methods allow inexpensive, efficient, easily controllable thermal processing.

Negative Differential Conductance & Hot-Carrier Avalanching in Monolayer WS2 FETs

DOE Office of Scientific and Technical Information (OSTI.GOV)

He, G.; Nathawat, J.; Kwan, C. -P.

The high field phenomena of inter-valley transfer and avalanching breakdown have long been exploited in devices based on conventional semiconductors. In this Article, we demonstrate the manifestation of these effects in atomically-thin WS 2 field-effect transistors. The negative differential conductance exhibits all of the features familiar from discussions of this phenomenon in bulk semiconductors, including hysteresis in the transistor characteristics and increased noise that is indicative of travelling high-field domains. It is also found to be sensitive to thermal annealing, a result that we attribute to the influence of strain on the energy separation of the different valleys involved inmore » hot-electron transfer. This idea is supported by the results of ensemble Monte Carlo simulations, which highlight the sensitivity of the negative differential conductance to the equilibrium populations of the different valleys. At high drain currents (>10 μA/μm) avalanching breakdown is also observed, and is attributed to trap-assisted inverse Auger scattering. This mechanism is not normally relevant in conventional semiconductors, but is possible in WS 2 due to the narrow width of its energy bands. The various results presented here suggest that WS 2 exhibits strong potential for use in hot-electron devices, including compact high-frequency sources and photonic detectors.« less

Negative Differential Conductance & Hot-Carrier Avalanching in Monolayer WS2 FETs

DOE PAGES

He, G.; Nathawat, J.; Kwan, C. -P.; ...

2017-09-12

The high field phenomena of inter-valley transfer and avalanching breakdown have long been exploited in devices based on conventional semiconductors. In this Article, we demonstrate the manifestation of these effects in atomically-thin WS 2 field-effect transistors. The negative differential conductance exhibits all of the features familiar from discussions of this phenomenon in bulk semiconductors, including hysteresis in the transistor characteristics and increased noise that is indicative of travelling high-field domains. It is also found to be sensitive to thermal annealing, a result that we attribute to the influence of strain on the energy separation of the different valleys involved inmore » hot-electron transfer. This idea is supported by the results of ensemble Monte Carlo simulations, which highlight the sensitivity of the negative differential conductance to the equilibrium populations of the different valleys. At high drain currents (>10 μA/μm) avalanching breakdown is also observed, and is attributed to trap-assisted inverse Auger scattering. This mechanism is not normally relevant in conventional semiconductors, but is possible in WS 2 due to the narrow width of its energy bands. The various results presented here suggest that WS 2 exhibits strong potential for use in hot-electron devices, including compact high-frequency sources and photonic detectors.« less

Metal-oxide-semiconductor devices using Ga2O3 dielectrics on n-type GaN

NASA Astrophysics Data System (ADS)

Lee, Ching-Ting; Chen, Hong-Wei; Lee, Hsin-Ying

2003-06-01

Using a photoelectrochemical method involving a He-Cd laser, Ga2O3 oxide layers were directly grown on n-type GaN. We demonstrated the performance of the resultant metal-oxide-semiconductor devices based on the grown Ga2O3 layer. An extremely low reverse leakage current of 200 pA was achieved when devices operated at -20 V. Furthermore, high forward and reverse breakdown electric fields of 2.80 MV/cm and 5.70 MV/cm, respectively, were obtained. Using a photoassisted current-voltage method, a low interface state density of 2.53×1011 cm-2 eV-1 was estimated. The varactor devices permit formation of inversion layers, so that they may be applied for the fabrication of metal-oxide-semiconductor field-effect transistors.

Low-threshold voltage ultraviolet light-emitting diodes based on (Al,Ga)N metal-insulator-semiconductor structures

NASA Astrophysics Data System (ADS)

Liang, Yu-Han; Towe, Elias

2017-12-01

Al-rich III-nitride-based deep-ultraviolet (UV) (275-320 nm) light-emitting diodes are plagued with a low emission efficiency and high turn-on voltages. We report Al-rich (Al,Ga)N metal-insulator-semiconductor UV light-emitting Schottky diodes with low turn-on voltages of <3 V, which are about half those of typical (Al,Ga)N p-i-n diodes. Our devices use a thin AlN film as the insulator and an n-type Al0.58Ga0.42N film as the semiconductor. To improve the efficiency, we inserted a GaN quantum-well structure between the AlN insulator and the n-type Al x Ga1- x N semiconductor. The benefits of the quantum-well structure include the potential to tune the emission wavelength and the capability to confine carriers for more efficient radiative recombination.

Nanocrystal doped matrixes

DOEpatents

Parce, J. Wallace; Bernatis, Paul; Dubrow, Robert; Freeman, William P.; Gamoras, Joel; Kan, Shihai; Meisel, Andreas; Qian, Baixin; Whiteford, Jeffery A.; Ziebarth, Jonathan

2010-01-12

Matrixes doped with semiconductor nanocrystals are provided. In certain embodiments, the semiconductor nanocrystals have a size and composition such that they absorb or emit light at particular wavelengths. The nanocrystals can comprise ligands that allow for mixing with various matrix materials, including polymers, such that a minimal portion of light is scattered by the matrixes. The matrixes of the present invention can also be utilized in refractive index matching applications. In other embodiments, semiconductor nanocrystals are embedded within matrixes to form a nanocrystal density gradient, thereby creating an effective refractive index gradient. The matrixes of the present invention can also be used as filters and antireflective coatings on optical devices and as down-converting layers. Processes for producing matrixes comprising semiconductor nanocrystals are also provided. Nanostructures having high quantum efficiency, small size, and/or a narrow size distribution are also described, as are methods of producing indium phosphide nanostructures and core-shell nanostructures with Group II-VI shells.

Fabrication of optically reflecting ohmic contacts for semiconductor devices

DOEpatents

Sopori, B.L.

1995-07-04

A method is provided to produce a low-resistivity ohmic contact having high optical reflectivity on one side of a semiconductor device. The contact is formed by coating the semiconductor substrate with a thin metal film on the back reflecting side and then optically processing the wafer by illuminating it with electromagnetic radiation of a predetermined wavelength and energy level through the front side of the wafer for a predetermined period of time. This method produces a thin epitaxial alloy layer between the semiconductor substrate and the metal layer when a crystalline substrate is used. The alloy layer provides both a low-resistivity ohmic contact and high optical reflectance. 5 figs.

Methods of producing strain in a semiconductor waveguide and related devices

DOEpatents

Cox, Johathan Albert; Rakich, Peter Thomas

2016-02-16

Quasi-phase matched (QPM), semiconductor photonic waveguides include periodically-poled alternating first and second sections. The first sections exhibit a high degree of optical coupling (abbreviated "X.sup.2"), while the second sections have a low X.sup.2. The alternating first and second sections may comprise high-strain and low-strain sections made of different material states (such as crystalline and amorphous material states) that exhibit high and low X.sup.2 properties when formed on a particular substrate, and/or strained corrugated sections of different widths. The QPM semiconductor waveguides may be implemented as silicon-on-insulator (SOI), or germanium-on-silicon structures compatible with standard CMOS processes, or as silicon-on-sapphire (SOS) structures.

Frequency-doubled vertical-external-cavity surface-emitting laser

DOEpatents

Raymond, Thomas D.; Alford, William J.; Crawford, Mary H.; Allerman, Andrew A.

2002-01-01

A frequency-doubled semiconductor vertical-external-cavity surface-emitting laser (VECSEL) is disclosed for generating light at a wavelength in the range of 300-550 nanometers. The VECSEL includes a semiconductor multi-quantum-well active region that is electrically or optically pumped to generate lasing at a fundamental wavelength in the range of 600-1100 nanometers. An intracavity nonlinear frequency-doubling crystal then converts the fundamental lasing into a second-harmonic output beam. With optical pumping with 330 milliWatts from a semiconductor diode pump laser, about 5 milliWatts or more of blue light can be generated at 490 nm. The device has applications for high-density optical data storage and retrieval, laser printing, optical image projection, chemical-sensing, materials processing and optical metrology.

Lithography for enabling advances in integrated circuits and devices.

PubMed

Garner, C Michael

2012-08-28

Because the transistor was fabricated in volume, lithography has enabled the increase in density of devices and integrated circuits. With the invention of the integrated circuit, lithography enabled the integration of higher densities of field-effect transistors through evolutionary applications of optical lithography. In 1994, the semiconductor industry determined that continuing the increase in density transistors was increasingly difficult and required coordinated development of lithography and process capabilities. It established the US National Technology Roadmap for Semiconductors and this was expanded in 1999 to the International Technology Roadmap for Semiconductors to align multiple industries to provide the complex capabilities to continue increasing the density of integrated circuits to nanometre scales. Since the 1960s, lithography has become increasingly complex with the evolution from contact printers, to steppers, pattern reduction technology at i-line, 248 nm and 193 nm wavelengths, which required dramatic improvements of mask-making technology, photolithography printing and alignment capabilities and photoresist capabilities. At the same time, pattern transfer has evolved from wet etching of features, to plasma etch and more complex etching capabilities to fabricate features that are currently 32 nm in high-volume production. To continue increasing the density of devices and interconnects, new pattern transfer technologies will be needed with options for the future including extreme ultraviolet lithography, imprint technology and directed self-assembly. While complementary metal oxide semiconductors will continue to be extended for many years, these advanced pattern transfer technologies may enable development of novel memory and logic technologies based on different physical phenomena in the future to enhance and extend information processing.

Outlook and emerging semiconducting materials for ambipolar transistors.

PubMed

Bisri, Satria Zulkarnaen; Piliego, Claudia; Gao, Jia; Loi, Maria Antonietta

2014-02-26

Ambipolar or bipolar transistors are transistors in which both holes and electrons are mobile inside the conducting channel. This device allows switching among several states: the hole-dominated on-state, the off-state, and the electron-dominated on-state. In the past year, it has attracted great interest in exotic semiconductors, such as organic semiconductors, nanostructured materials, and carbon nanotubes. The ability to utilize both holes and electrons inside one device opens new possibilities for the development of more compact complementary metal-oxide semiconductor (CMOS) circuits, and new kinds of optoelectronic device, namely, ambipolar light-emitting transistors. This progress report highlights the recent progresses in the field of ambipolar transistors, both from the fundamental physics and application viewpoints. Attention is devoted to the challenges that should be faced for the realization of ambipolar transistors with different material systems, beginning with the understanding of the importance of interface modification, which heavily affects injections and trapping of both holes and electrons. The recent development of advanced gating applications, including ionic liquid gating, that open up more possibility to realize ambipolar transport in materials in which one type of charge carrier is highly dominant is highlighted. Between the possible applications of ambipolar field-effect transistors, we focus on ambipolar light-emitting transistors. We put this new device in the framework of its prospective for general lightings, embedded displays, current-driven laser, as well as for photonics-electronics interconnection. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications.

PubMed

Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

2016-05-09

Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm(2) V(-1) sec(-1), and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity.

Mixed-RKDG Finite Element Methods for the 2-D Hydrodynamic Model for Semiconductor Device Simulation

DOE PAGES

Chen, Zhangxin; Cockburn, Bernardo; Jerome, Joseph W.; ...

1995-01-01

In this paper we introduce a new method for numerically solving the equations of the hydrodynamic model for semiconductor devices in two space dimensions. The method combines a standard mixed finite element method, used to obtain directly an approximation to the electric field, with the so-called Runge-Kutta Discontinuous Galerkin (RKDG) method, originally devised for numerically solving multi-dimensional hyperbolic systems of conservation laws, which is applied here to the convective part of the equations. Numerical simulations showing the performance of the new method are displayed, and the results compared with those obtained by using Essentially Nonoscillatory (ENO) finite difference schemes. Frommore » the perspective of device modeling, these methods are robust, since they are capable of encompassing broad parameter ranges, including those for which shock formation is possible. The simulations presented here are for Gallium Arsenide at room temperature, but we have tested them much more generally with considerable success.« less

III-V aresenide-nitride semiconductor materials and devices

NASA Technical Reports Server (NTRS)

Major, Jo S. (Inventor); Welch, David F. (Inventor); Scifres, Donald R. (Inventor)

1997-01-01

III-V arsenide-nitride semiconductor crystals, methods for producing such crystals and devices employing such crystals. Group III elements are combined with group V elements, including at least nitrogen and arsenic, in concentrations chosen to lattice match commercially available crystalline substrates. Epitaxial growth of these III-V crystals results in direct bandgap materials, which can be used in applications such as light emitting diodes and lasers. Varying the concentrations of the elements in the III-V crystals varies the bandgaps, such that materials emitting light spanning the visible spectra, as well as mid-IR and near-UV emitters, can be created. Conversely, such material can be used to create devices that acquire light and convert the light to electricity, for applications such as full color photodetectors and solar energy collectors. The growth of the III-V crystals can be accomplished by growing thin layers of elements or compounds in sequences that result in the overall lattice match and bandgap desired.

Power SEMICONDUCTORS—STATE of Art and Future Trends

NASA Astrophysics Data System (ADS)

Benda, Vitezslav

2011-06-01

The importance of effective energy conversion control, including power generation from renewable and environmentally clean energy sources, increases due to rising energy demand. Power electronic systems for controlling and converting electrical energy have become the workhorse of modern society in many applications, both in industry and at home. Power electronics plays a very important role in traction and can be considered as brawns of robotics and automated manufacturing systems. Power semiconductor devices are the key electronic components used in power electronic systems. Advances in power semiconductor technology have improved the efficiency, size, weight and cost of power electronic systems. At present, IGCTs, IGBTs, and MOSFETs represent modern switching devices. Power integrated circuits (PIC) have been developed for the use of power converters for portable, automotive and aerospace applications. For advanced applications, new materials (SiC and GaN) have been introduced. This paper reviews the state of these devices and elaborates on their potentials in terms of higher voltages, higher power density, and better switching performance.

Silicon and germanium nanowire electronics: physics of conventional and unconventional transistors

NASA Astrophysics Data System (ADS)

Weber, Walter M.; Mikolajick, Thomas

2017-06-01

Research in the field of electronics of 1D group-IV semiconductor structures has attracted increasing attention over the past 15 years. The exceptional combination of the unique 1D electronic transport properties with the mature material know-how of highly integrated silicon and germanium technology holds the promise of enhancing state-of-the-art electronics. In addition of providing conduction channels that can bring conventional field effect transistors to the uttermost scaling limits, the physics of 1D group IV nanowires endows new device principles. Such unconventional silicon and germanium nanowire devices are contenders for beyond complementary metal oxide semiconductor (CMOS) computing by virtue of their distinct switching behavior and higher expressive value. This review conveys to the reader a systematic recapitulation and analysis of the physics of silicon and germanium nanowires and the most relevant CMOS and CMOS-like devices built from silicon and germanium nanowires, including inversion mode, junctionless, steep-slope, quantum well and reconfigurable transistors.

Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications

PubMed Central

Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

2016-01-01

Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm2 V−1 sec−1, and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity. PMID:27157914

Spin transport in lateral structures with semiconducting channel

NASA Astrophysics Data System (ADS)

Zainuddin, Abu Naser

Spintronics is an emerging field of electronics with the potential to be used in future integrated circuits. Spintronic devices are already making their mark in storage technologies in recent times and there are proposals for using spintronic effects in logic technologies as well. So far, major improvement in spintronic effects, for example, the `spin-valve' effect, is being achieved in metals or insulators as channel materials. But not much progress is made in semiconductors owing to the difficulty in injecting spins into them, which has only very recently been overcome with the combined efforts of many research groups around the world. The key motivations for semiconductor spintronics are their ease in integration with the existing semiconductor technology along with the gate controllability. At present semiconductor based spintronic devices are mostly lateral and are showing a very poor performance compared to their metal or insulator based vertical counterparts. The objective of this thesis is to analyze these devices based on spin-transport models and simulations. At first a lateral spin-valve device is modeled with the spin-diffusion equation based semiclassical approach. Identifying the important issues regarding the device performance, a compact circuit equivalent model is presented which would help to improve the device design. It is found that the regions outside the current path also have a significant influence on the device performance under certain conditions, which is ordinarily neglected when only charge transport is considered. Next, a modified spin-valve structure is studied where the spin signal is controlled with a gate in between the injecting and detecting contacts. The gate is used to modulate the rashba spin-orbit coupling of the channel which, in turn, modulates the spin-valve signal. The idea of gate controlled spin manipulation was originally proposed by Datta and Das back in 1990 and is called 'Datta-Das' effect. In this thesis, we have extended the model described in the original proposal to include the influence of channel dimensions on the nature of electron flow and the contact dimensions on the magnitude and phase of the spin-valve signal. In order to capture the spin-orbit effect a non-equilibrium Green's function (NEGF) based quantum transport model for spin-valve device have been developed which is also explained with simple theoretical treatment based on stationary phase approximation. The model is also compared against a recent experiment that demonstrated such gate modulated spin-valve effect. This thesis also evaluates the possibility of gate controlled magnetization reversal or spin-torque effect as a means to validate this, so called, 'Datta-Das' effect on a more solid footing. Finally, the scope for utilizing topological insulator material in semiconductor spintronics is discussed as a possible future work for this thesis.

Transparent Oxide Thin-Film Transistors: Production, Characterization and Integration

NASA Astrophysics Data System (ADS)

Barquinha, Pedro Miguel Candido

This dissertation is devoted to the study of the emerging area of transparent electronics, summarizing research work regarding the development of n-type thin-film transistors (TFTs) based on sputtered oxide semiconductors. All the materials are produced without intentional substrate heating, with annealing temperatures of only 150-200 °C being used to optimize transistor performance. The work is based on the study and optimization of active semiconductors from the gallium-indium-zinc oxide system, including both the binary compounds Ga2O3, In2O3 and ZnO, as well as ternary and quaternary oxides based on mixtures of those, such as IZO and GIZO with different atomic ratios. Several topics are explored, including the study and optimization of the oxide semiconductor thin films, their application as channel layers on TFTs and finally the implementation of the optimized processes to fabricate active matrix backplanes to be integrated in liquid crystal display (LCD) prototypes. Sputtered amorphous dielectrics with high dielectric constant (high-kappa) based on mixtures of tantalum-silicon or tantalum-aluminum oxides are also studied and used as the dielectric layers on fully transparent TFTs. These devices also include transparent and highly conducting IZO thin films as source, drain and gate electrodes. Given the flexibility of the sputtering technique, oxide semiconductors are analyzed regarding several deposition parameters, such as oxygen partial pressure and deposition pressure, as well as target composition. One of the most interesting features of multicomponent oxides such as IZO and GIZO is that, due to their unique electronic configuration and carrier transport mechanism, they allow to obtain amorphous structures with remarkable electrical properties, such as high hall-effect mobility that exceeds 60 cm2 V -1 s-1 for IZO. These properties can be easily tuned by changing the processing conditions and the atomic ratios of the multicomponent oxides, allowing to have amorphous oxides suitable to be used either as transparent semiconductors or as highly conducting electrodes. The amorphous structure, which is maintained even if the thin films are annealed at 500 °C, brings great advantages concerning interface quality and uniformity in large areas. A complete study comprising different deposition conditions of the semiconductor layer is also made regarding TFT electrical performance. Optimized devices present outstanding electrical performance, such as field-effect mobility (muFE) exceeding 20 cm2 V -1 s-1, turn-on voltage (Von) between -1 and 1 V, subthreshold slope (S) lower than 0.25 V dec-1 and On-Off ratio above 107 . Devices employing amorphous multicomponent oxides present largely improved properties when compared with the ones based on polycrystalline ZnO, mostly in terms of muFE. Within the compositional range where IZO and GIZO films are amorphous, TFT performance can be largely adjusted: for instance, high indium contents favor large mu FE but also highly negative Von, which can be compensated by proper amounts of zinc and gallium. Large oxygen concentrations during oxide semiconductor sputtering are found to be deleterious, decreasing muFE, shifting Von towards high values and turning the devices electrically unstable. It is also shown that semiconductor thickness (ds) has a very important role: for instance, by reducing ds to 10 nm it is possible to produce TFTs with Von≈0 V even using deposition conditions and/or target compositions that normally yield highly conducting films. Given the low ds of the films, this behavior is mostly related with surface states existent at the oxide semiconductor air-exposed back-surface, where depletion layers that can extend towards the dielectric/semiconductor interface are created due to the interaction with atmospheric oxygen. Different passivation layers on top of this air-exposed surface are studied, with SU-8 revealing to be to most effective one. Other important topics are source-drain contact resistance assessment and the effect of different annealing temperatures ( TA), being the properties of the TFTs dominated by TA rather than by the deposition conditions as TA increases. Fully transparent TFTs employing sputtered amorphous multicomponent dielectrics produced without intentional substrate heating present excellent electrical properties, that approach those exhibited by devices using PECVD SiO2 produced at 400 °C. Gate leakage current can be greatly reduced by using tantalum-silicon or tantalum-aluminum oxides rather than Ta2O5. A section of this dissertation is also devoted to the analysis of current stress stability and aging effects of the TFTs, being found that optimal devices exhibit recoverable threshold voltage shifts lower than 0.50 V after 24 h stress with constant drain current of 10 muA, as well as negligible aging effects during 18 months. The research work of this dissertation culminates in the fabrication of a backplane employing transparent TFTs and subsequent integration with a LCD frontplane by Hewlett-Packard. The successful operation of this initial 2.8h prototype with 128x128 pixels provides a solid demonstration that oxide semiconductor-based TFTs have the potential to largely contribute to a novel electronics era, where semiconductor materials away from conventional silicon are used to create fascinating applications, such as transparent electronic products.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

University of Illinois

2009-04-21

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A [Champaign, IL; Khang, Dahl-Young [Seoul, KR; Sun, Yugang [Naperville, IL; Menard, Etienne [Durham, NC

2012-06-12

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A.; Khang, Dahl-Young; Sun, Yugang; Menard, Etienne

2014-06-17

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A.; Khang, Dahl-Young; Sun, Yugang; Menard, Etienne

2016-12-06

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A.; Khang, Dahl -Young; Sun, Yugang; Menard, Etienne

2015-08-11

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Mechanical Properties of Organic Semiconductors for Stretchable, Highly Flexible, and Mechanically Robust Electronics.

PubMed

Root, Samuel E; Savagatrup, Suchol; Printz, Adam D; Rodriquez, Daniel; Lipomi, Darren J

2017-05-10

Mechanical deformability underpins many of the advantages of organic semiconductors. The mechanical properties of these materials are, however, diverse, and the molecular characteristics that permit charge transport can render the materials stiff and brittle. This review is a comprehensive description of the molecular and morphological parameters that govern the mechanical properties of organic semiconductors. Particular attention is paid to ways in which mechanical deformability and electronic performance can coexist. The review begins with a discussion of flexible and stretchable devices of all types, and in particular the unique characteristics of organic semiconductors. It then discusses the mechanical properties most relevant to deformable devices. In particular, it describes how low modulus, good adhesion, and absolute extensibility prior to fracture enable robust performance, along with mechanical "imperceptibility" if worn on the skin. A description of techniques of metrology precedes a discussion of the mechanical properties of three classes of organic semiconductors: π-conjugated polymers, small molecules, and composites. The discussion of each class of materials focuses on molecular structure and how this structure (and postdeposition processing) influences the solid-state packing structure and thus the mechanical properties. The review concludes with applications of organic semiconductor devices in which every component is intrinsically stretchable or highly flexible.

A pattern recognition approach to transistor array parameter variance

NASA Astrophysics Data System (ADS)

da F. Costa, Luciano; Silva, Filipi N.; Comin, Cesar H.

2018-06-01

The properties of semiconductor devices, including bipolar junction transistors (BJTs), are known to vary substantially in terms of their parameters. In this work, an experimental approach, including pattern recognition concepts and methods such as principal component analysis (PCA) and linear discriminant analysis (LDA), was used to experimentally investigate the variation among BJTs belonging to integrated circuits known as transistor arrays. It was shown that a good deal of the devices variance can be captured using only two PCA axes. It was also verified that, though substantially small variation of parameters is observed for BJT from the same array, larger variation arises between BJTs from distinct arrays, suggesting the consideration of device characteristics in more critical analog designs. As a consequence of its supervised nature, LDA was able to provide a substantial separation of the BJT into clusters, corresponding to each transistor array. In addition, the LDA mapping into two dimensions revealed a clear relationship between the considered measurements. Interestingly, a specific mapping suggested by the PCA, involving the total harmonic distortion variation expressed in terms of the average voltage gain, yielded an even better separation between the transistor array clusters. All in all, this work yielded interesting results from both semiconductor engineering and pattern recognition perspectives.

Method for sputtering a PIN amorphous silicon semi-conductor device having partially crystallized P and N-layers

DOEpatents

Moustakas, Theodore D.; Maruska, H. Paul

1985-07-09

A high efficiency amorphous silicon PIN semiconductor device having partially crystallized (microcrystalline) P and N layers is constructed by the sequential sputtering of N, I and P layers and at least one semi-transparent ohmic electrode. The method of construction produces a PIN device, exhibiting enhanced electrical and optical properties, improved physical integrity, and facilitates the preparation in a singular vacuum system and vacuum pump down procedure.

Semiconductor superlattice photodetectors

NASA Technical Reports Server (NTRS)

Chuang, S. L.; Hess, K.; Coleman, J. J.; Leburton, J. P.

1984-01-01

A superlattice photomultiplier and a photodetector based on the real space transfer mechanism were studied. The wavelength for the first device is of the order of a micron or flexible corresponding to the bandgap absorption in a semiconductor. The wavelength for the second device is in the micron range (about 2 to 12 microns) corresponding to the energy of the conduction band edge discontinuity between an Al/(sub x)Ga(sub 1-x)As and GaAs interface. Both devices are described.

Read-noise characterization of focal plane array detectors via mean-variance analysis.

PubMed

Sperline, R P; Knight, A K; Gresham, C A; Koppenaal, D W; Hieftje, G M; Denton, M B

2005-11-01

Mean-variance analysis is described as a method for characterization of the read-noise and gain of focal plane array (FPA) detectors, including charge-coupled devices (CCDs), charge-injection devices (CIDs), and complementary metal-oxide-semiconductor (CMOS) multiplexers (infrared arrays). Practical FPA detector characterization is outlined. The nondestructive readout capability available in some CIDs and FPA devices is discussed as a means for signal-to-noise ratio improvement. Derivations of the equations are fully presented to unify understanding of this method by the spectroscopic community.

Optical switching system and method

DOEpatents

Ranganathan, Radha; Gal, Michael; Taylor, P. Craig

1992-01-01

An optically bistable device is disclosed. The device includes a uniformly thick layer of amorphous silicon to constitute a Fabry-Perot chamber positioned to provide a target area for a probe beam. The probe beam has a maximum energy less than the energy band gap of the amorphous semiconductor. In a preferred embodiment, a multilayer dielectric mirror is positioned on the Fabry-Perot chamber to increase the finesse of switching of the device. The index of refraction of the amorphous material is thermally altered to alter the transmission of the probe beam.

Acoustic charge transport technology investigation for advanced development transponder

NASA Technical Reports Server (NTRS)

Kayalar, S.

1993-01-01

Acoustic charge transport (ACT) technology has provided a basis for a new family of analog signal processors, including a programmable transversal filter (PTF). Through monolithic integration of ACT delay lines with GaAs metal semiconductor field effect transistor (MESFET) digital memory and controllers, these devices significantly extend the performance of PTF's. This article introduces the basic operation of these devices and summarizes their present and future specifications. The production and testing of these devices indicate that this new technology is a promising one for future space applications.

Advanced development of double-injection, deep-impurity semiconductor switches

NASA Technical Reports Server (NTRS)

Hanes, M. H.

1987-01-01

Deep-impurity, double-injection devices, commonly refered to as (DI) squared devices, represent a class of semiconductor switches possessing a very high degree of tolerance to electron and neutron irradiation and to elevated temperature operation. These properties have caused them to be considered as attractive candidates for space power applications. The design, fabrication, and testing of several varieties of (DI) squared devices intended for power switching are described. All of these designs were based upon gold-doped silicon material. Test results, along with results of computer simulations of device operation, other calculations based upon the assumed mode of operation of (DI) squared devices, and empirical information regarding power semiconductor device operation and limitations, have led to the conculsion that these devices are not well suited to high-power applications. When operated in power circuitry configurations, they exhibit high-power losses in both the off-state and on-state modes. These losses are caused by phenomena inherent to the physics and material of the devices and cannot be much reduced by device design optimizations. The (DI) squared technology may, however, find application in low-power functions such as sensing, logic, and memory, when tolerance to radiation and temperature are desirable (especially is device performance is improved by incorporation of deep-level impurities other than gold.

Development of a Handmade Conductivity Measurement Device for a Thin-Film Semiconductor and Its Application to Polypyrrole

ERIC Educational Resources Information Center

Seng, Set; Shinpei, Tomita; Yoshihiko, Inada; Masakazu, Kita

2014-01-01

The precise measurement of conductivity of a semiconductor film such as polypyrrole (Ppy) should be carried out by the four-point probe method; however, this is difficult for classroom application. This article describes the development of a new, convenient, handmade conductivity device from inexpensive materials that can measure the conductivity…

Method for sputtering a PIN microcrystalline/amorphous silicon semiconductor device with the P and N-layers sputtered from boron and phosphorous heavily doped targets

DOEpatents

Moustakas, Theodore D.; Maruska, H. Paul

1985-04-02

A silicon PIN microcrystalline/amorphous silicon semiconductor device is constructed by the sputtering of N, and P layers of silicon from silicon doped targets and the I layer from an undoped target, and at least one semi-transparent ohmic electrode.

Mechanical scriber for semiconductor devices

DOEpatents

Lin, P.T.

1985-03-05

A mechanical scriber using a scribing tip, such as a diamond, provides controlled scriber forces with a spring-loaded compound lever arrangement. The scribing force and range of scribing depth are adjusted by a pair of adjustable micrometer heads. A semiconductor device, such as a multilayer solar cell, can be formed into scribed strips at each layer. 5 figs.

JESD57 Test Standard, Procedures for the Measurement of Single-Event Effects in Semiconductor Devices from Heavy-Ion Irradiation Revision Update

NASA Technical Reports Server (NTRS)

Lauenstein, Jean-Marie

2016-01-01

The JEDEC JESD57 test standard, Procedures for the Measurement of Single-Event Effects in Semiconductor Devices from Heavy-Ion Irradiation, is undergoing its first revision since 1996. This presentation will provide an overview of some of the key proposed updates to the document.

Multilevel metallization method for fabricating a metal oxide semiconductor device

NASA Technical Reports Server (NTRS)

Hollis, B. R., Jr.; Feltner, W. R.; Bouldin, D. L.; Routh, D. E. (Inventor)

1978-01-01

An improved method is described of constructing a metal oxide semiconductor device having multiple layers of metal deposited by dc magnetron sputtering at low dc voltages and low substrate temperatures. The method provides multilevel interconnections and cross over between individual circuit elements in integrated circuits without significantly reducing the reliability or seriously affecting the yield.

Monolayer graphene-insulator-semiconductor emitter for large-area electron lithography

NASA Astrophysics Data System (ADS)

Kirley, Matthew P.; Aloui, Tanouir; Glass, Jeffrey T.

2017-06-01

The rapid adoption of nanotechnology in fields as varied as semiconductors, energy, and medicine requires the continual improvement of nanopatterning tools. Lithography is central to this evolving nanotechnology landscape, but current production systems are subject to high costs, low throughput, or low resolution. Herein, we present a solution to these problems with the use of monolayer graphene in a graphene-insulator-semiconductor (GIS) electron emitter device for large-area electron lithography. Our GIS device displayed high emission efficiency (up to 13%) and transferred large patterns (500 × 500 μm) with high fidelity (<50% spread). The performance of our device demonstrates a feasible path to dramatic improvements in lithographic patterning systems, enabling continued progress in existing industries and opening opportunities in nanomanufacturing.

Recent progress in high-mobility thin-film transistors based on multilayer 2D materials

NASA Astrophysics Data System (ADS)

Hong, Young Ki; Liu, Na; Yin, Demin; Hong, Seongin; Kim, Dong Hak; Kim, Sunkook; Choi, Woong; Yoon, Youngki

2017-04-01

Two-dimensional (2D) layered semiconductors are emerging as promising candidates for next-generation thin-film electronics because of their high mobility, relatively large bandgap, low-power switching, and the availability of large-area growth methods. Thin-film transistors (TFTs) based on multilayer transition metal dichalcogenides or black phosphorus offer unique opportunities for next-generation electronic and optoelectronic devices. Here, we review recent progress in high-mobility transistors based on multilayer 2D semiconductors. We describe the theoretical background on characterizing methods of TFT performance and material properties, followed by their applications in flexible, transparent, and optoelectronic devices. Finally, we highlight some of the methods used in metal-semiconductor contacts, hybrid structures, heterostructures, and chemical doping to improve device performance.

Thermally robust semiconductor optical amplifiers and laser diodes

DOEpatents

Dijaili, Sol P.; Patterson, Frank G.; Walker, Jeffrey D.; Deri, Robert J.; Petersen, Holly; Goward, William

2002-01-01

A highly heat conductive layer is combined with or placed in the vicinity of the optical waveguide region of active semiconductor components. The thermally conductive layer enhances the conduction of heat away from the active region, which is where the heat is generated in active semiconductor components. This layer is placed so close to the optical region that it must also function as a waveguide and causes the active region to be nearly the same temperature as the ambient or heat sink. However, the semiconductor material itself should be as temperature insensitive as possible and therefore the invention combines a highly thermally conductive dielectric layer with improved semiconductor materials to achieve an overall package that offers improved thermal performance. The highly thermally conductive layer serves two basic functions. First, it provides a lower index material than the semiconductor device so that certain kinds of optical waveguides may be formed, e.g., a ridge waveguide. The second and most important function, as it relates to this invention, is that it provides a significantly higher thermal conductivity than the semiconductor material, which is the principal material in the fabrication of various optoelectronic devices.

Effect of Pentacene-dielectric Affinity on Pentacene Thin Film Growth Morphology in Organic Field-effect Transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

S Kim; M Jang; H Yang

2011-12-31

Organic field-effect transistors (OFETs) are fabricated by depositing a thin film of semiconductor on the functionalized surface of a SiO{sub 2} dielectric. The chemical and morphological structures of the interface between the semiconductor and the functionalized dielectric are critical for OFET performance. We have characterized the effect of the affinity between semiconductor and functionalized dielectric on the properties of the semiconductor-dielectric interface. The crystalline microstructure/nanostructure of the pentacene semiconductor layers, grown on a dielectric substrate that had been functionalized with either poly(4-vinyl pyridine) or polystyrene (to control hydrophobicity), and grown under a series of substrate temperatures and deposition rates, weremore » characterized by X-ray diffraction, photoemission spectroscopy, and atomic force microscopy. By comparing the morphological features of the semiconductor thin films with the device characteristics (field-effect mobility, threshold voltage, and hysteresis) of the OFET devices, the effect of affinity-driven properties on charge modulation, charge trapping, and charge carrier transport could be described.« less

A stable solution-processed polymer semiconductor with record high-mobility for printed transistors

PubMed Central

Li, Jun; Zhao, Yan; Tan, Huei Shuan; Guo, Yunlong; Di, Chong-An; Yu, Gui; Liu, Yunqi; Lin, Ming; Lim, Suo Hon; Zhou, Yuhua; Su, Haibin; Ong, Beng S.

2012-01-01

Microelectronic circuits/arrays produced via high-speed printing instead of traditional photolithographic processes offer an appealing approach to creating the long-sought after, low-cost, large-area flexible electronics. Foremost among critical enablers to propel this paradigm shift in manufacturing is a stable, solution-processable, high-performance semiconductor for printing functionally capable thin-film transistors — fundamental building blocks of microelectronics. We report herein the processing and optimisation of solution-processable polymer semiconductors for thin-film transistors, demonstrating very high field-effect mobility, high on/off ratio, and excellent shelf-life and operating stabilities under ambient conditions. Exceptionally high-gain inverters and functional ring oscillator devices on flexible substrates have been demonstrated. This optimised polymer semiconductor represents a significant progress in semiconductor development, dispelling prevalent skepticism surrounding practical usability of organic semiconductors for high-performance microelectronic devices, opening up application opportunities hitherto functionally or economically inaccessible with silicon technologies, and providing an excellent structural framework for fundamental studies of charge transport in organic systems. PMID:23082244

Strain-compensated infrared photodetector and photodetector array

DOEpatents

Kim, Jin K; Hawkins, Samuel D; Klem, John F; Cich, Michael J

2013-05-28

A photodetector is disclosed for the detection of infrared light with a long cutoff wavelength in the range of about 4.5-10 microns. The photodetector, which can be formed on a semiconductor substrate as an nBn device, has a light absorbing region which includes InAsSb light-absorbing layers and tensile-strained layers interspersed between the InAsSb light-absorbing layers. The tensile-strained layers can be formed from GaAs, InAs, InGaAs or a combination of these III-V compound semiconductor materials. A barrier layer in the photodetector can be formed from AlAsSb or AlGaAsSb; and a contact layer in the photodetector can be formed from InAs, GaSb or InAsSb. The photodetector is useful as an individual device, or to form a focal plane array.

Proton Nonionizing Energy Loss (NIEL) for Device Applications

NASA Technical Reports Server (NTRS)

Jun, Insoo; Xapsos, Michael A.; Messenger, Scott R.; Burke, Edward A.; Walters, Robert J.; Summers, Geoff; Jordan, Thomas

2003-01-01

Nonionizing energy loss (NIEL) is a quantity that describes the rate of energy loss due to atomic displacements as a particle traverses a material. The product of the NIEL and the particle fluence (time integrated flux) gives the displacement damage energy deposition per unit mass of material. NIEL plays the same role to the displacement damage energy deposition as the stopping power to the total ionizing dose (TID). The concept of NIEL has been very useful for correlating particle induced displacement damage effects in semiconductor and optical devices. Many studies have successfully demonstrated that the degradation of semiconductor devices or optical sensors in a radiation field can be linearly correlated to the displacement damage energy, and subsequently to the NIEL deposited in the semiconductor devices or optical sensors. In addition, the NIEL concept was also useful in the study of both Si and GaAs solar cells and of high temperature superconductors, and at predicting the survivability of detectors used at the LHC at CERN. On the other hand, there are some instances where discrepancies are observed in the application of NIEL, most notably in GaAs semiconductor devices. However, NIEL is still a valuable tool, and can be used to scale damages produced by different particles and in different environments, even though this is not understood at the microscopic level.

Gate tunneling current and quantum capacitance in metal-oxide-semiconductor devices with graphene gate electrodes

NASA Astrophysics Data System (ADS)

An, Yanbin; Shekhawat, Aniruddh; Behnam, Ashkan; Pop, Eric; Ural, Ant

2016-11-01

Metal-oxide-semiconductor (MOS) devices with graphene as the metal gate electrode, silicon dioxide with thicknesses ranging from 5 to 20 nm as the dielectric, and p-type silicon as the semiconductor are fabricated and characterized. It is found that Fowler-Nordheim (F-N) tunneling dominates the gate tunneling current in these devices for oxide thicknesses of 10 nm and larger, whereas for devices with 5 nm oxide, direct tunneling starts to play a role in determining the total gate current. Furthermore, the temperature dependences of the F-N tunneling current for the 10 nm devices are characterized in the temperature range 77-300 K. The F-N coefficients and the effective tunneling barrier height are extracted as a function of temperature. It is found that the effective barrier height decreases with increasing temperature, which is in agreement with the results previously reported for conventional MOS devices with polysilicon or metal gate electrodes. In addition, high frequency capacitance-voltage measurements of these MOS devices are performed, which depict a local capacitance minimum under accumulation for thin oxides. By analyzing the data using numerical calculations based on the modified density of states of graphene in the presence of charged impurities, it is shown that this local minimum is due to the contribution of the quantum capacitance of graphene. Finally, the workfunction of the graphene gate electrode is extracted by determining the flat-band voltage as a function of oxide thickness. These results show that graphene is a promising candidate as the gate electrode in metal-oxide-semiconductor devices.

Advances in nanowire bioelectronics

NASA Astrophysics Data System (ADS)

Zhou, Wei; Dai, Xiaochuan; Lieber, Charles M.

2017-01-01

Semiconductor nanowires represent powerful building blocks for next generation bioelectronics given their attractive properties, including nanometer-scale footprint comparable to subcellular structures and bio-molecules, configurable in nonstandard device geometries readily interfaced with biological systems, high surface-to-volume ratios, fast signal responses, and minimum consumption of energy. In this review article, we summarize recent progress in the field of nanowire bioelectronics with a focus primarily on silicon nanowire field-effect transistor biosensors. First, the synthesis and assembly of semiconductor nanowires will be described, including the basics of nanowire FETs crucial to their configuration as biosensors. Second, we will introduce and review recent results in nanowire bioelectronics for biomedical applications ranging from label-free sensing of biomolecules, to extracellular and intracellular electrophysiological recording.

Visible light laser voltage probing on thinned substrates

DOEpatents

Beutler, Joshua; Clement, John Joseph; Miller, Mary A.; Stevens, Jeffrey; Cole, Jr., Edward I.

2017-03-21

The various technologies presented herein relate to utilizing visible light in conjunction with a thinned structure to enable characterization of operation of one or more features included in an integrated circuit (IC). Short wavelength illumination (e.g., visible light) is applied to thinned samples (e.g., ultra-thinned samples) to achieve a spatial resolution for laser voltage probing (LVP) analysis to be performed on smaller technology node silicon-on-insulator (SOI) and bulk devices. Thinning of a semiconductor material included in the IC (e.g., backside material) can be controlled such that the thinned semiconductor material has sufficient thickness to enable operation of one or more features comprising the IC during LVP investigation.

Excitons and the lifetime of organic semiconductor devices.

PubMed

Forrest, Stephen R

2015-06-28

While excitons are responsible for the many beneficial optical properties of organic semiconductors, their non-radiative recombination within the material can result in material degradation due to the dumping of energy onto localized molecular bonds. This presents a challenge in developing strategies to exploit the benefits of excitons without negatively impacting the device operational stability. Here, we will briefly review the fundamental mechanisms leading to excitonic energy-driven device ageing in two example devices: blue emitting electrophosphorescent organic light emitting devices (PHOLEDs) and organic photovoltaic (OPV) cells. We describe strategies used to minimize or even eliminate this fundamental device degradation pathway. © 2015 The Author(s) Published by the Royal Society. All rights reserved.

Resonant Tunneling Spin Pump

NASA Technical Reports Server (NTRS)

Ting, David Z.

2007-01-01

The resonant tunneling spin pump is a proposed semiconductor device that would generate spin-polarized electron currents. The resonant tunneling spin pump would be a purely electrical device in the sense that it would not contain any magnetic material and would not rely on an applied magnetic field. Also, unlike prior sources of spin-polarized electron currents, the proposed device would not depend on a source of circularly polarized light. The proposed semiconductor electron-spin filters would exploit the Rashba effect, which can induce energy splitting in what would otherwise be degenerate quantum states, caused by a spin-orbit interaction in conjunction with a structural-inversion asymmetry in the presence of interfacial electric fields in a semiconductor heterostructure. The magnitude of the energy split is proportional to the electron wave number. Theoretical studies have suggested the possibility of devices in which electron energy states would be split by the Rashba effect and spin-polarized currents would be extracted by resonant quantum-mechanical tunneling.

High Performance Molybdenum Disulfide Amorphous Silicon Heterojunction Photodetector

PubMed Central

Esmaeili-Rad, Mohammad R.; Salahuddin, Sayeef

2013-01-01

One important use of layered semiconductors such as molybdenum disulfide (MoS2) could be in making novel heterojunction devices leading to functionalities unachievable using conventional semiconductors. Here we demonstrate a metal-semiconductor-metal heterojunction photodetector, made of MoS2 and amorphous silicon (a-Si), with rise and fall times of about 0.3 ms. The transient response does not show persistent (residual) photoconductivity, unlike conventional a-Si devices where it may last 3–5 ms, thus making this heterojunction roughly 10X faster. A photoresponsivity of 210 mA/W is measured at green light, the wavelength used in commercial imaging systems, which is 2−4X larger than that of a-Si and best reported MoS2 devices. The device could find applications in large area electronics, such as biomedical imaging, where a fast response is critical. PMID:23907598

Titanium-dioxide nanotube p-n homojunction diode

NASA Astrophysics Data System (ADS)

Alivov, Yahya; Ding, Yuchen; Singh, Vivek; Nagpal, Prashant

2014-12-01

Application of semiconductors in functional optoelectronic devices requires precise control over their doping and formation of junction between p- and n-doped semiconductors. While doped thin films have led to several semiconductor devices, need for high-surface area nanostructured devices for photovoltaic, photoelectrochemical, and photocatalytic applications has been hindered by lack of desired doping in nanostructures. Here, we show titanium-dioxide (TiO2) nanotubes doped with nitrogen (N) and niobium (Nb) as acceptors and donors, respectively, and formation of TiO2 nanotubes p-n homojunction. This TiO2:N/TiO2:Nb homojunction showed distinct diode-like behaviour with rectification ratio of 1115 at ±5 V and exhibited good photoresponse for ultraviolet light (λ = 365 nm) with sensitivity of 0.19 A/W at reverse bias of -5 V. These results can have important implications for development of nanostructured metal-oxide solar-cells, photodiodes, LED's, photocatalysts, and photoelectrochemical devices.

Tunable surface plasmon devices

DOEpatents

Shaner, Eric A [Rio Rancho, NM; Wasserman, Daniel [Lowell, MA

2011-08-30

A tunable extraordinary optical transmission (EOT) device wherein the tunability derives from controlled variation of the dielectric constant of a semiconducting material (semiconductor) in evanescent-field contact with a metallic array of sub-wavelength apertures. The surface plasmon resonance wavelength can be changed by changing the dielectric constant of the dielectric material. In embodiments of this invention, the dielectric material is a semiconducting material. The dielectric constant of the semiconducting material in the metal/semiconductor interfacial region is controllably adjusted by adjusting one or more of the semiconductor plasma frequency, the concentration and effective mass of free carriers, and the background high-frequency dielectric constant in the interfacial region. Thermal heating and/or voltage-gated carrier-concentration changes may be used to variably adjust the value of the semiconductor dielectric constant.

Screenable contact structure and method for semiconductor devices

DOEpatents

Ross, Bernd

1980-08-26

An ink composition for deposition upon the surface of a semiconductor device to provide a contact area for connection to external circuitry is disclosed, the composition comprising an ink system containing a metal powder, a binder and vehicle, and a metal frit. The ink is screened onto the semiconductor surface in the desired pattern and is heated to a temperature sufficient to cause the metal frit to become liquid. The metal frit dissolves some of the metal powder and densifies the structure by transporting the dissolved metal powder in a liquid sintering process. The sintering process typically may be carried out in any type of atmosphere. A small amount of dopant or semiconductor material may be added to the ink systems to achieve particular results if desired.

Large Bandgap Shrinkage from Doping and Dielectric Interface in Semiconducting Carbon Nanotubes

NASA Astrophysics Data System (ADS)

Comfort, Everett; Lee, Ji Ung

2016-06-01

The bandgap of a semiconductor is one of its most important electronic properties. It is often considered to be a fixed property of the semiconductor. As the dimensions of semiconductors reduce, however, many-body effects become dominant. Here, we show that doping and dielectric, two critical features of semiconductor device manufacturing, can dramatically shrink (renormalize) the bandgap. We demonstrate this in quasi-one-dimensional semiconducting carbon nanotubes. Specifically, we use a four-gated device, configured as a p-n diode, to investigate the fundamental electronic structure of individual, partially supported nanotubes of varying diameter. The four-gated construction allows us to combine both electrical and optical spectroscopic techniques to measure the bandgap over a wide doping range.

Estimation of carrier mobility and charge behaviors of organic semiconductor films in metal-insulator-semiconductor diodes consisting of high-k oxide/organic semiconductor double layers

NASA Astrophysics Data System (ADS)

Chosei, Naoya; Itoh, Eiji

2018-02-01

We have comparatively studied the charge behaviors of organic semiconductor films based on charge extraction by linearly increasing voltage in a metal-insulator-semiconductor (MIS) diode structure (MIS-CELIV) and by classical capacitance-voltage measurement. The MIS-CELIV technique allows the selective measurement of electron and hole mobilities of n- and p-type organic films with thicknesses representative of those of actual devices. We used an anodic oxidized sputtered Ta or Hf electrode as a high-k layer, and it effectively blocked holes at the insulator/semiconductor interface. We estimated the hole mobilities of the polythiophene derivatives regioregular poly(3-hexylthiophene) (P3HT) and poly(3,3‧‧‧-didodecylquarterthiophene) (PQT-12) before and after heat treatment in the ITO/high-k/(thin polymer insulator)/semiconductor/MoO3/Ag device structure. The hole mobility of PQT-12 was improved from 1.1 × 10-5 to 2.1 × 10-5 cm2 V-1 s-1 by the heat treatment of the device at 100 °C for 30 min. An almost two orders of magnitude higher mobility was obtained in MIS diodes with P3HT as the p-type layer. We also determined the capacitance from the displacement current in MIS diodes at a relatively low-voltage sweep, and it corresponded well to the classical capacitance-voltage and frequency measurement results.

15 CFR Supplement No. 3 to Part 752 - Instructions on Completing Form BIS-752 “Statement by Consignee In Support of Special...

Code of Federal Regulations, 2010 CFR

2010-01-01

... OF INDUSTRY AND SECURITY, DEPARTMENT OF COMMERCE EXPORT ADMINISTRATION REGULATIONS SPECIAL... results in a change of identity of the U.S.-item (e.g., U.S.-origin semiconductor devices are included in...

Evaluation of Intrinsic Charge Carrier Transport at Insulator-Semiconductor Interfaces Probed by a Non-Contact Microwave-Based Technique

PubMed Central

Honsho, Yoshihito; Miyakai, Tomoyo; Sakurai, Tsuneaki; Saeki, Akinori; Seki, Shu

2013-01-01

We have successfully designed the geometry of the microwave cavity and the thin metal electrode, achieving resonance of the microwave cavity with the metal-insulator-semiconductor (MIS) device structure. This very simple MIS device operates in the cavity, where charge carriers are injected quantitatively by an applied bias at the insulator-semiconductor interface. The local motion of the charge carriers was clearly probed through the applied external microwave field, also giving the quantitative responses to the injected charge carrier density and charge/discharge characteristics. By means of the present measurement system named field-induced time-resolved microwave conductivity (FI-TRMC), the pentacene thin film in the MIS device allowed the evaluation of the hole and electron mobility at the insulator-semiconductor interface of 6.3 and 0.34 cm2 V−1 s−1, respectively. This is the first report on the direct, intrinsic, non-contact measurement of charge carrier mobility at interfaces that has been fully experimentally verified. PMID:24212382

76 FR 65751 - Notice of intent to grant exclusive license

Federal Register 2010, 2011, 2012, 2013, 2014

2011-10-24

... Crystalline Semiconductor Alloys on Basal Plane of Trigonal or Hexagonal Crystal,'' U.S. Patent Application No. 12/254,134 entitled ``Hybrid Bandgap Engineering for Super-Hetero- Epitaxial Semiconductor Materials... Semiconductor Materials on Trigonal Substrate with Single Crystal Properties and Devices Based on Such Materials...

Method for photolithographic definition of recessed features on a semiconductor wafer utilizing auto-focusing alignment

DOEpatents

Farino, A.J.; Montague, S.; Sniegowski, J.J.; Smith, J.H.; McWhorter, P.J.

1998-07-21

A method is disclosed for photolithographically defining device features up to the resolution limit of an auto-focusing projection stepper when the device features are to be formed in a wafer cavity at a depth exceeding the depth of focus of the stepper. The method uses a focusing cavity located in a die field at the position of a focusing light beam from the auto-focusing projection stepper, with the focusing cavity being of the same depth as one or more adjacent cavities wherein a semiconductor device is to be formed. The focusing cavity provides a bottom surface for referencing the focusing light beam and focusing the stepper at a predetermined depth below the surface of the wafer, whereat the device features are to be defined. As material layers are deposited in each device cavity to build up a semiconductor structure such as a microelectromechanical system (MEMS) device, the same material layers are deposited in the focusing cavity, raising the bottom surface and re-focusing the stepper for accurately defining additional device features in each succeeding material layer. The method is especially applicable for forming MEMS devices within a cavity or trench and integrating the MEMS devices with electronic circuitry fabricated on the wafer surface. 15 figs.

Method for photolithographic definition of recessed features on a semiconductor wafer utilizing auto-focusing alignment

DOEpatents

Farino, Anthony J.; Montague, Stephen; Sniegowski, Jeffry J.; Smith, James H.; McWhorter, Paul J.

1998-01-01

A method is disclosed for photolithographically defining device features up to the resolution limit of an auto-focusing projection stepper when the device features are to be formed in a wafer cavity at a depth exceeding the depth of focus of the stepper. The method uses a focusing cavity located in a die field at the position of a focusing light beam from the auto-focusing projection stepper, with the focusing cavity being of the same depth as one or more adjacent cavities wherein a semiconductor device is to be formed. The focusing cavity provides a bottom surface for referencing the focusing light beam and focusing the stepper at a predetermined depth below the surface of the wafer, whereat the device features are to be defined. As material layers are deposited in each device cavity to build up a semiconductor structure such as a microelectromechanical system (MEMS) device, the same material layers are deposited in the focusing cavity, raising the bottom surface and re-focusing the stepper for accurately defining additional device features in each succeeding material layer. The method is especially applicable for forming MEMS devices within a cavity or trench and integrating the MEMS devices with electronic circuitry fabricated on the wafer surface.

A review of the physics and response models for burnout of semiconductor devices

NASA Astrophysics Data System (ADS)

Orvis, W. J.; Khanaka, G. H.; Yee, J. H.

1984-12-01

Physical mechanisms that cause semiconductor devices to fail from electrical overstress--particularly, EMP-induced electrical stress--are described in light of the current literature and the authors' own research. A major concern is the cause and effects of second breakdown phenomena in p-n junction devices. Models of failure thresholds are evaluated for their inherent errors and for their ability to represent the relevant physics. Finally, the response models that relate electromagnetic stress parameters to appropriate failure-threshold parameters are discussed.

Bi-Se doped with Cu, p-type semiconductor

DOEpatents

Bhattacharya, Raghu Nath; Phok, Sovannary; Parilla, Philip Anthony

2013-08-20

A Bi--Se doped with Cu, p-type semiconductor, preferably used as an absorber material in a photovoltaic device. Preferably the semiconductor has at least 20 molar percent Cu. In a preferred embodiment, the semiconductor comprises at least 28 molar percent of Cu. In one embodiment, the semiconductor comprises a molar percentage of Cu and Bi whereby the molar percentage of Cu divided by the molar percentage of Bi is greater than 1.2. In a preferred embodiment, the semiconductor is manufactured as a thin film having a thickness less than 600 nm.

Single-mode very wide tunability in laterally coupled semiconductor lasers with electrically controlled reflectivities

NASA Astrophysics Data System (ADS)

Griffel, Giora; Chen, Howard Z.; Grave, Ilan; Yariv, Amnon

1991-04-01

The operation of a novel multisection structure comprised of laterally coupled gain-guided semiconductor lasers is demonstrated. It is shown that tunable single longitudinal mode operation can be achieved with a high degree of frequency selectivity. The device has a tuning range of 14.5 nm, the widest observed to date in a monolithic device.

Total-dose radiation effects data for semiconductor devices (1989 supplement)

NASA Technical Reports Server (NTRS)

Martin, Keith E.; Coss, James R.; Goben, Charles A.; Shaw, David C.; Farmanesh, Sam; Davarpanah, Michael M.; Craft, Leroy H.; Price, William E.

1990-01-01

Steady state, total dose radiation test data are provided for electronic designers and other personnel using semiconductor devices in a radiation environment. The data are presented in graphic and narrative formats. Two primary radiation source types were used: Cobalt-60 gamma rays and a Dynamitron electron accelerator capable of delivering 2.5 MeV electrons at a steady rate.

Voyager electronic parts radiation program, volume 1

NASA Technical Reports Server (NTRS)

Stanley, A. G.; Martin, K. E.; Price, W. E.

1977-01-01

The Voyager spacecraft is subject to radiation from external natural space, from radioisotope thermoelectric generators and heater units, and from the internal environment where penetrating electrons generate surface ionization effects in semiconductor devices. Methods for radiation hardening and tests for radiation sensitivity are described. Results of characterization testing and sample screening of over 200 semiconductor devices in a radiation environment are summarized.

Semiconductor diode with external field modulation

DOEpatents

Nasby, Robert D.

2000-01-01

A non-destructive-readout nonvolatile semiconductor diode switching device that may be used as a memory element is disclosed. The diode switching device is formed with a ferroelectric material disposed above a rectifying junction to control the conduction characteristics therein by means of a remanent polarization. The invention may be used for the formation of integrated circuit memories for the storage of information.

Improvement of screening methods for silicon planar semiconductor devices

NASA Technical Reports Server (NTRS)

Berger, W. M.

1972-01-01

The results of the program for the development of a more sensitive method for selecting silicon planar semiconductor devices for long life applications are reported. The manufacturing technologies (MOS and Bipolar) are discussed along with the screening procedures developed as a result of the tests and evaluations, and the effectiveness of the MOS and Bilayer screening procedures are evaluated.

Tuning charge carrier transport and optical birefringence in liquid-crystalline thin films: A new design space for organic light-emitting diodes.

PubMed

Keum, Chang-Min; Liu, Shiyi; Al-Shadeedi, Akram; Kaphle, Vikash; Callens, Michiel Koen; Han, Lu; Neyts, Kristiaan; Zhao, Hongping; Gather, Malte C; Bunge, Scott D; Twieg, Robert J; Jakli, Antal; Lüssem, Björn

2018-01-15

Liquid-crystalline organic semiconductors exhibit unique properties that make them highly interesting for organic optoelectronic applications. Their optical and electrical anisotropies and the possibility to control the alignment of the liquid-crystalline semiconductor allow not only to optimize charge carrier transport, but to tune the optical property of organic thin-film devices as well. In this study, the molecular orientation in a liquid-crystalline semiconductor film is tuned by a novel blading process as well as by different annealing protocols. The altered alignment is verified by cross-polarized optical microscopy and spectroscopic ellipsometry. It is shown that a change in alignment of the liquid-crystalline semiconductor improves charge transport in single charge carrier devices profoundly. Comparing the current-voltage characteristics of single charge carrier devices with simulations shows an excellent agreement and from this an in-depth understanding of single charge carrier transport in two-terminal devices is obtained. Finally, p-i-n type organic light-emitting diodes (OLEDs) compatible with vacuum processing techniques used in state-of-the-art OLEDs are demonstrated employing liquid-crystalline host matrix in the emission layer.

Design of Contact Electrodes for Semiconductor Nanowire Solar Energy Harvesting Devices.

PubMed

Lin, Tzuging; Ramadurgam, Sarath; Yang, Chen

2017-04-12

Transparent, low-resistive contacts are critical for efficient solar energy harvesting devices. It is important to reconsider the material choices and electrode design as devices move from 2D films to 1D nanostructures. In this paper, we study the effectiveness of indium tin oxide (ITO) and metals, such as Ag and Cu, as contacts in 2D and 1D systems. Although ITO has been studied extensively and developed into an effective transparent contact for 2D devices, our results show that effectiveness does not translate to 1D systems. Particularly with consideration of resistance requirement, nanowires with metal shells as contacts enable better absorption within the semiconductor as compared to ITO. Furthermore, there is a strong dependence of contact performance on the semiconductor band gap and diameter of nanowires. We found that metal contacts outperform ITO for nanowire devices, regardless of the sheet resistance constraint, in the regime of diameters less than 100 nm and band-gaps greater than 1 eV. These metal shells optimized for best absorption are significantly thinner than ITO, which enables for the design of devices with high nanowire number density and consequently higher device efficiencies.

Process for fabricating polycrystalline semiconductor thin-film solar cells, and cells produced thereby

DOEpatents

Wu, Xuanzhi; Sheldon, Peter

2000-01-01

A novel, simplified method for fabricating a thin-film semiconductor heterojunction photovoltaic device includes initial steps of depositing a layer of cadmium stannate and a layer of zinc stannate on a transparent substrate, both by radio frequency sputtering at ambient temperature, followed by the depositing of dissimilar layers of semiconductors such as cadmium sulfide and cadmium telluride, and heat treatment to convert the cadmium stannate to a substantially single-phase material of a spinel crystal structure. Preferably, the cadmium sulfide layer is also deposited by radio frequency sputtering at ambient temperature, and the cadmium telluride layer is deposited by close space sublimation at an elevated temperature effective to convert the amorphous cadmium stannate to the polycrystalline cadmium stannate with single-phase spinel structure.

Semiconductor laser devices having lateral refractive index tailoring

DOEpatents

Ashby, Carol I. H.; Hadley, G. Ronald; Hohimer, John P.; Owyoung, Adelbert

1990-01-01

A broad-area semiconductor laser diode includes an active lasing region interposed between an upper and a lower cladding layer, the laser diode further comprising structure for controllably varying a lateral refractive index profile of the diode to substantially compensate for an effect of junction heating during operation. In embodiments disclosed the controlling structure comprises resistive heating strips or non-radiative linear junctions disposed parallel to the active region. Another embodiment discloses a multi-layered upper cladding region selectively disordered by implanted or diffused dopant impurities. Still another embodiment discloses an upper cladding layer of variable thickness that is convex in shape and symmetrically disposed about a central axis of the active region. The teaching of the invention is also shown to be applicable to arrays of semiconductor laser diodes.

Is DNA a metal, semiconductor or insulator? A theoretical approach

NASA Astrophysics Data System (ADS)

Rey-Gonzalez, Rafael; Fonseca-Romero, Karen; Plazas, Carlos; Grupo de Óptica e Información Cuántica Team

Over the last years, scientific interest for designing and making low dimensional electronic devices with traditional or novel materials has been increased. These experimental and theoretical researches in electronic properties at molecular scale are looking for developing efficient devices able to carry out tasks which are currently done by silicon transistors and devices. Among the new materials DNA strands are highlighted, but the experimental results have been contradictories pointing to behaviors as conductor, semiconductor or insulator. To contribute to the understanding of the origin of the disparity of the measurements, we perform a numerical calculation of the electrical conductance of DNA segments, modeled as 1D disordered finite chains. The system is described into a Tight binding model with nearest neighbor interactions and a s orbital per site. Hydration effects are included as random variations of self-energies. The electronic current as a function of applied bias is calculated using Launder formalism, where the transmission probability is determined into the transfer matrix formalism. We find a conductor-to-semiconductor-to-insulator transition as a function of the three effects taken into account: chain size, intrinsic disorder, and hydration We thank Fundación para la Promoción de la Investigación y la Tecnología, Colombia, and Dirección de Investigación de Bogotá, Universidad Nacional de Colombia, for partial financial support.

Charge collection efficiency degradation induced by MeV ions in semiconductor devices: Model and experiment

DOE PAGES

Vittone, Ettore; Pastuovic, Zeljko; Breese, Mark B. H.; ...

2016-02-08

This study investigates both theoretically and experimentally the charge collection efficiency (CCE) degradation in silicon diodes induced by energetic ions. Ion Beam Induced Charge (IBIC) measurements carried out on n- and p-type silicon diodes which were previously irradiated with MeV He ions show evidence that the CCE degradation does not only depend on the mass, energy and fluence of the damaging ion, but also depends on the ion probe species and on the polarization state of the device. A general one-dimensional model is derived, which accounts for the ion-induced defect distribution, the ionization profile of the probing ion and themore » charge induction mechanism. Using the ionizing and non-ionizing energy loss profiles resulting from simulations based on the binary collision approximation and on the electrostatic/transport parameters of the diode under study as input, the model is able to accurately reproduce the experimental CCE degradation curves without introducing any phenomenological additional term or formula. Although limited to low level of damage, the model is quite general, including the displacement damage approach as a special case and can be applied to any semiconductor device. It provides a method to measure the capture coefficients of the radiation induced recombination centres. They can be considered indexes, which can contribute to assessing the relative radiation hardness of semiconductor materials.« less

Deformable inorganic semiconductor

NASA Astrophysics Data System (ADS)

Kim, Dae-Hyeong; Cha, Gi Doo

2018-05-01

Unlike conventional inorganic semiconductors, which are typically brittle, α-Ag2S exhibits room-temperature ductility with favourable electrical properties, offering promise for use in high-performance flexible and stretchable devices.