Exact solution of three-dimensional transport problems using one-dimensional models. [in semiconductor devices

NASA Technical Reports Server (NTRS)

Misiakos, K.; Lindholm, F. A.

1986-01-01

Several parameters of certain three-dimensional semiconductor devices including diodes, transistors, and solar cells can be determined without solving the actual boundary-value problem. The recombination current, transit time, and open-circuit voltage of planar diodes are emphasized here. The resulting analytical expressions enable determination of the surface recombination velocity of shallow planar diodes. The method involves introducing corresponding one-dimensional models having the same values of these parameters.

Unitary lens semiconductor device

DOEpatents

Lear, K.L.

1997-05-27

A unitary lens semiconductor device and method are disclosed. The unitary lens semiconductor device is provided with at least one semiconductor layer having a composition varying in the growth direction for unitarily forming one or more lenses in the semiconductor layer. Unitary lens semiconductor devices may be formed as light-processing devices such as microlenses, and as light-active devices such as light-emitting diodes, photodetectors, resonant-cavity light-emitting diodes, vertical-cavity surface-emitting lasers, and resonant cavity photodetectors. 9 figs.

Computational Modeling of Ultrafast Pulse Propagation in Nonlinear Optical Materials

NASA Technical Reports Server (NTRS)

Goorjian, Peter M.; Agrawal, Govind P.; Kwak, Dochan (Technical Monitor)

1996-01-01

There is an emerging technology of photonic (or optoelectronic) integrated circuits (PICs or OEICs). In PICs, optical and electronic components are grown together on the same chip. rib build such devices and subsystems, one needs to model the entire chip. Accurate computer modeling of electromagnetic wave propagation in semiconductors is necessary for the successful development of PICs. More specifically, these computer codes would enable the modeling of such devices, including their subsystems, such as semiconductor lasers and semiconductor amplifiers in which there is femtosecond pulse propagation. Here, the computer simulations are made by solving the full vector, nonlinear, Maxwell's equations, coupled with the semiconductor Bloch equations, without any approximations. The carrier is retained in the description of the optical pulse, (i.e. the envelope approximation is not made in the Maxwell's equations), and the rotating wave approximation is not made in the Bloch equations. These coupled equations are solved to simulate the propagation of femtosecond optical pulses in semiconductor materials. The simulations describe the dynamics of the optical pulses, as well as the interband and intraband.

Andreev reflection enhancement in semiconductor-superconductor structures

NASA Astrophysics Data System (ADS)

Bouscher, Shlomi; Winik, Roni; Hayat, Alex

2018-02-01

We develop a theoretical approach for modeling a wide range of semiconductor-superconductor structures with arbitrary potential barriers and a spatially dependent superconducting order parameter. We demonstrate asymmetry in the conductance spectrum as a result of a Schottky barrier shape. We further show that the Andreev reflection process can be significantly enhanced through resonant tunneling with appropriate barrier configuration, which can incorporate the Schottky barrier as a contributing component of the device. Moreover, we show that resonant tunneling can be achieved in superlattice structures as well. These theoretically demonstrated effects along with our modeling approach enable much more efficient Cooper pair injection into semiconductor-superconductor structures, including superconducting optoelectronic devices.

Center for Semiconductor Materials and Device Modeling: expanding collaborative research opportunities between government, academia, and industry

NASA Astrophysics Data System (ADS)

Perconti, Philip; Bedair, Sarah S.; Bajaj, Jagmohan; Schuster, Jonathan; Reed, Meredith

2016-09-01

To increase Soldier readiness and enhance situational understanding in ever-changing and complex environments, there is a need for rapid development and deployment of Army technologies utilizing sensors, photonics, and electronics. Fundamental aspects of these technologies include the research and development of semiconductor materials and devices which are ubiquitous in numerous applications. Since many Army technologies are considered niche, there is a lack of significant industry investment in the fundamental research and understanding of semiconductor technologies relevant to the Army. To address this issue, the US Army Research Laboratory is establishing a Center for Semiconductor Materials and Device Modeling and seeks to leverage expertise and resources across academia, government and industry. Several key research areas—highlighted and addressed in this paper—have been identified by ARL and external partners and will be pursued in a collaborative fashion by this Center. This paper will also address the mechanisms by which the Center is being established and will operate.

Semiconductor Quantum Electron Wave Transport, Diffraction, and Interference: Analysis, Device, and Measurement.

NASA Astrophysics Data System (ADS)

Henderson, Gregory Newell

Semiconductor device dimensions are rapidly approaching a fundamental limit where drift-diffusion equations and the depletion approximation are no longer valid. In this regime, quantum effects can dominate device response. To increase further device density and speed, new devices must be designed that use these phenomena to positive advantage. In addition, quantum effects provide opportunities for a new class of devices which can perform functions previously unattainable with "conventional" semiconductor devices. This thesis has described research in the analysis of electron wave effects in semiconductors and the development of methods for the design, fabrication, and characterization of quantum devices based on these effects. First, an exact set of quantitative analogies are presented which allow the use of well understood optical design and analysis tools for the development of electron wave semiconductor devices. Motivated by these analogies, methods are presented for modeling electron wave grating diffraction using both an exact rigorous coupled-wave analysis and approximate analyses which are useful for grating design. Example electron wave grating switch and multiplexer designs are presented. In analogy to thin-film optics, the design and analysis of electron wave Fabry-Perot interference filters are also discussed. An innovative technique has been developed for testing these (and other) electron wave structures using Ballistic Electron Emission Microscopy (BEEM). This technique uses a liquid-helium temperature scanning tunneling microscope (STM) to perform spectroscopy of the electron transmittance as a function of electron energy. Experimental results show that BEEM can resolve even weak quantum effects, such as the reflectivity of a single interface between materials. Finally, methods are discussed for incorporating asymmetric electron wave Fabry-Perot filters into optoelectronic devices. Theoretical and experimental results show that such structures could be the basis for a new type of electrically pumped mid - to far-infrared semiconductor laser.

Sintered silver joints via controlled topography of electronic packaging subcomponents

DOEpatents

Wereszczak, Andrew A.

2014-09-02

Disclosed are sintered silver bonded electronic package subcomponents and methods for making the same. Embodiments of the sintered silver bonded EPSs include topography modification of one or more metal surfaces of semiconductor devices bonded together by the sintered silver joint. The sintered silver bonded EPSs include a first semiconductor device having a first metal surface, the first metal surface having a modified topography that has been chemically etched, grit blasted, uniaxial ground and/or grid sliced connected to a second semiconductor device which may also include a first metal surface with a modified topography, a silver plating layer on the first metal surface of the first semiconductor device and a silver plating layer on the first metal surface of the second semiconductor device and a sintered silver joint between the silver plating layers of the first and second semiconductor devices which bonds the first semiconductor device to the second semiconductor device.

Reducing leakage current in semiconductor devices

DOEpatents

Lu, Bin; Matioli, Elison de Nazareth; Palacios, Tomas Apostol

2018-03-06

A semiconductor device includes a first region having a first semiconductor material and a second region having a second semiconductor material. The second region is formed over the first region. The semiconductor device also includes a current blocking structure formed in the first region between first and second terminals of the semiconductor device. The current blocking structure is configured to reduce current flow in the first region between the first and second terminals.

Methods and devices for fabricating and assembling printable semiconductor elements

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nuzzo, Ralph G.; Rogers, John A.; Menard, Etienne

The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.

Methods and devices for fabricating and assembling printable semiconductor elements

DOEpatents

Nuzzo, Ralph G; Rogers, John A; Menard, Etienne; Lee, Keon Jae; Khang, Dahl-Young; Sun, Yugang; Meitl, Matthew; Zhu, Zhengtao

2014-03-04

The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.

The impact of the Fermi-Dirac distribution on charge injection at metal/organic interfaces.

PubMed

Wang, Z B; Helander, M G; Greiner, M T; Lu, Z H

2010-05-07

The Fermi level has historically been assumed to be the only energy-level from which carriers are injected at metal/semiconductor interfaces. In traditional semiconductor device physics, this approximation is reasonable as the thermal distribution of delocalized states in the semiconductor tends to dominate device characteristics. However, in the case of organic semiconductors the weak intermolecular interactions results in highly localized electronic states, such that the thermal distribution of carriers in the metal may also influence device characteristics. In this work we demonstrate that the Fermi-Dirac distribution of carriers in the metal has a much more significant impact on charge injection at metal/organic interfaces than has previously been assumed. An injection model which includes the effect of the Fermi-Dirac electron distribution was proposed. This model has been tested against experimental data and was found to provide a better physical description of charge injection. This finding indicates that the thermal distribution of electronic states in the metal should, in general, be considered in the study of metal/organic interfaces.

Methods of producing free-standing semiconductors using sacrificial buffer layers and recyclable substrates

DOEpatents

Ptak, Aaron Joseph; Lin, Yong; Norman, Andrew; Alberi, Kirstin

2015-05-26

A method of producing semiconductor materials and devices that incorporate the semiconductor materials are provided. In particular, a method is provided of producing a semiconductor material, such as a III-V semiconductor, on a spinel substrate using a sacrificial buffer layer, and devices such as photovoltaic cells that incorporate the semiconductor materials. The sacrificial buffer material and semiconductor materials may be deposited using lattice-matching epitaxy or coincident site lattice-matching epitaxy, resulting in a close degree of lattice matching between the substrate material and deposited material for a wide variety of material compositions. The sacrificial buffer layer may be dissolved using an epitaxial liftoff technique in order to separate the semiconductor device from the spinel substrate, and the spinel substrate may be reused in the subsequent fabrication of other semiconductor devices. The low-defect density semiconductor materials produced using this method result in the enhanced performance of the semiconductor devices that incorporate the semiconductor materials.

Active Control of Charge Density Waves at Degenerate Semiconductor Interfaces

NASA Astrophysics Data System (ADS)

Vinnakota, Raj; Genov, Dentcho

We present numerical modeling of an active electronically controlled highly confined charge-density waves, i.e. surface plasmon polaritons (SPPs) at the metallurgic interfaces of degenerate semiconductor materials. An electro-optic switching element for fully-functional plasmonic circuits based on p-n junction semiconductor Surface Plasmon Polariton (SPP) waveguide is shown. Two figures of merits are introduced and parametric study has been performed identifying the device optimal operation range. The Indium Gallium Arsenide (In0.53Ga0.47As) is identified as the best semiconductor material for the device providing high optical confinement, reduced system size and fast operation. The electro-optic SPP switching element is shown to operate at signal modulation up to -24dB and switching rates surpassing 100GHz, thus potentially providing a new pathway toward bridging the gap between electronic and photonic devices. The current work is funded by the NSF EPSCoR CIMM project under award #OIA-1541079.

Investigation of Surface Breakdown on Semiconductor Devices Using Optical Probing Techniques.

DTIC Science & Technology

1990-01-01

18] L. Bovino , T. Burke, R. Youmans, M. Weiner, and J. Car, r, "Recent Advances in Optically C’ntrolled Bulk Semiconductor Switches," Digest of...Comp. Simul. 5 (3), 175 (1988). [321 M. Weiner, L. Bovino , R. Youmans, and T. Burke, "Modeling of the Optically Conrolled Semiconductor Switch," J

Verification of Fowler-Nordheim electron tunneling mechanism in Ni/SiO2/n-4H SiC and n+ poly-Si/SiO2/n-4H SiC MOS devices by different models

NASA Astrophysics Data System (ADS)

Kodigala, Subba Ramaiah

2016-11-01

This article emphasizes verification of Fowler-Nordheim electron tunneling mechanism in the Ni/SiO2/n-4H SiC MOS devices by developing three different kinds of models. The standard semiconductor equations are categorically solved to obtain the change in Fermi energy level of semiconductor with effect of temperature and field that extend support to determine sustainable and accurate tunneling current through the oxide layer. The forward and reverse bias currents with variation of electric field are simulated with help of different models developed by us for MOS devices by applying adequate conditions. The latter is quite different from former in terms of tunneling mechanism in the MOS devices. The variation of barrier height with effect of quantum mechanical, temperature, and fields is considered as effective barrier height for the generation of current-field (J-F) curves under forward and reverse biases but quantum mechanical effect is void in the latter. In addition, the J-F curves are also simulated with variation of carrier concentration in the n-type 4H SiC semiconductor of MOS devices and the relation between them is established.

Imaging the motion of electrons in 2D semiconductor heterostructures

NASA Astrophysics Data System (ADS)

Dani, Keshav

Technological progress since the late 20th century has centered on semiconductor devices, such as transistors, diodes, and solar cells. At the heart of these devices, is the internal motion of electrons through semiconductor materials due to applied electric fields or by the excitation of photocarriers. Imaging the motion of these electrons would provide unprecedented insight into this important phenomenon, but requires high spatial and temporal resolution. Current studies of electron dynamics in semiconductors are generally limited by the spatial resolution of optical probes, or by the temporal resolution of electronic probes. In this talk, we combine femtosecond pump-probe techniques with spectroscopic photoemission electron microscopy to image the motion of photoexcited electrons from high-energy to low-energy states in a 2D InSe/GaAs heterostructure exhibiting a type-II band alignment. At the instant of photoexcitation, energy-resolved photoelectron images reveal a highly non-equilibrium distribution of photocarriers in space and energy. Thereafter, in response to the out-of-equilibrium photocarriers, we observe the spatial redistribution of charges, thus forming internal electric fields, bending the semiconductor bands, and finally impeding further charge transfer. By assembling images taken at different time-delays, we make a movie lasting a few tens of picoseconds of the electron transfer process in the photoexcited type-II heterostructure - a fundamental phenomenon in semiconductor devices like solar cells. Quantitative analysis and theoretical modeling of spatial variations in the video provide insight into future solar cells, electron dynamics in 2D materials, and other semiconductor devices.

Imaging the motion of electrons across semiconductor heterojunctions.

PubMed

Man, Michael K L; Margiolakis, Athanasios; Deckoff-Jones, Skylar; Harada, Takaaki; Wong, E Laine; Krishna, M Bala Murali; Madéo, Julien; Winchester, Andrew; Lei, Sidong; Vajtai, Robert; Ajayan, Pulickel M; Dani, Keshav M

2017-01-01

Technological progress since the late twentieth century has centred on semiconductor devices, such as transistors, diodes and solar cells. At the heart of these devices is the internal motion of electrons through semiconductor materials due to applied electric fields or by the excitation of photocarriers. Imaging the motion of these electrons would provide unprecedented insight into this important phenomenon, but requires high spatial and temporal resolution. Current studies of electron dynamics in semiconductors are generally limited by the spatial resolution of optical probes, or by the temporal resolution of electronic probes. Here, by combining femtosecond pump-probe techniques with spectroscopic photoemission electron microscopy, we imaged the motion of photoexcited electrons from high-energy to low-energy states in a type-II 2D InSe/GaAs heterostructure. At the instant of photoexcitation, energy-resolved photoelectron images revealed a highly non-equilibrium distribution of photocarriers in space and energy. Thereafter, in response to the out-of-equilibrium photocarriers, we observed the spatial redistribution of charges, thus forming internal electric fields, bending the semiconductor bands, and finally impeding further charge transfer. By assembling images taken at different time-delays, we produced a movie lasting a few trillionths of a second of the electron-transfer process in the photoexcited type-II heterostructure-a fundamental phenomenon in semiconductor devices such as solar cells. Quantitative analysis and theoretical modelling of spatial variations in the movie provide insight into future solar cells, 2D materials and other semiconductor devices.

Imaging the motion of electrons across semiconductor heterojunctions

NASA Astrophysics Data System (ADS)

Man, Michael K. L.; Margiolakis, Athanasios; Deckoff-Jones, Skylar; Harada, Takaaki; Wong, E. Laine; Krishna, M. Bala Murali; Madéo, Julien; Winchester, Andrew; Lei, Sidong; Vajtai, Robert; Ajayan, Pulickel M.; Dani, Keshav M.

2017-01-01

Technological progress since the late twentieth century has centred on semiconductor devices, such as transistors, diodes and solar cells. At the heart of these devices is the internal motion of electrons through semiconductor materials due to applied electric fields or by the excitation of photocarriers. Imaging the motion of these electrons would provide unprecedented insight into this important phenomenon, but requires high spatial and temporal resolution. Current studies of electron dynamics in semiconductors are generally limited by the spatial resolution of optical probes, or by the temporal resolution of electronic probes. Here, by combining femtosecond pump-probe techniques with spectroscopic photoemission electron microscopy, we imaged the motion of photoexcited electrons from high-energy to low-energy states in a type-II 2D InSe/GaAs heterostructure. At the instant of photoexcitation, energy-resolved photoelectron images revealed a highly non-equilibrium distribution of photocarriers in space and energy. Thereafter, in response to the out-of-equilibrium photocarriers, we observed the spatial redistribution of charges, thus forming internal electric fields, bending the semiconductor bands, and finally impeding further charge transfer. By assembling images taken at different time-delays, we produced a movie lasting a few trillionths of a second of the electron-transfer process in the photoexcited type-II heterostructure—a fundamental phenomenon in semiconductor devices such as solar cells. Quantitative analysis and theoretical modelling of spatial variations in the movie provide insight into future solar cells, 2D materials and other semiconductor devices.

Research and Development Strategies in the Semiconductor Industry

NASA Astrophysics Data System (ADS)

Bowling, Allen

2003-03-01

In the 21st Century semiconductor industry, there is a critical balance between internally funded semiconductor research and development (R) and externally funded R. External R may include jointly-funded research collaborations/partnerships with other device manufacturers, jointly-funded consortia-based R, and individually-funded research programs at universities and other contract research locations. Each of these approaches has merits and each has costs. There is a critical balance between keeping the internal research and development pipeline filled and keeping it from being overspent. To meet both competitive schedule and cost goals, a semiconductor device manufacturer must decide on a model for selection of internal versus external R. Today, one of the most critical decisions is whether or not to do semiconductor research and development on 300 mm silicon wafers. Equipment suppliers are doing first development on 300 mm equipment. So, for the device manufacturer, there is a balance between the cost of doing development on 300 mm wafers and the development time schedule driven by equipment availability. In the face of these cost and schedule elements, device manufacturers are looking to consortia such as SEMATECH, SRC, and SRC MARCO for early development and screening of new materials and device structure approaches. This also causes much more close development collaboration between device manufacturer and equipment supplier. Many device manufacturers are also making use of direct contract research with universities and other contract-research organizations, such as IMEC, LETI, and other government-funded research organizations around the world. To get the most out of these external research interactions, the company must develop a strategy for management and technology integration of external R.

Operation and biasing for single device equivalent to CMOS

DOEpatents

Welch, James D.

2001-01-01

Disclosed are semiconductor devices including at least one junction which is rectifying whether the semiconductor is caused to be N or P-type, by the presence of field induced carriers. In particular, inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to conventional multiple device CMOS systems, which can be operated as modulators, are disclosed as are a non-latching SCR and an approach to blocking parasitic currents. Operation of the gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems under typical bias schemes is described, and simple demonstrative five mask fabrication procedures for the inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems are also presented.

Chemical Defects and Electronics States in Organic Semiconductors

DTIC Science & Technology

2008-05-31

from interacting with organic semiconductor devices. An expt./theoretical study of 0 2 in pentacene indicated that a positive gate voltage can cause...dissociative interaction of02 with pentacene . 1S. SUBJECT TERMS organic semiconductors, PBTIT, P3HT, PQT, polythiophenes, pentacene , defects...investigations of the interaction of02 molecules with pentacene were performed. Based on calculations of formation energies of charged defects a model was

Analysis of fluctuations in semiconductor devices

NASA Astrophysics Data System (ADS)

Andrei, Petru

The random nature of ion implantation and diffusion processes as well as inevitable tolerances in fabrication result in random fluctuations of doping concentrations and oxide thickness in semiconductor devices. These fluctuations are especially pronounced in ultrasmall (nanoscale) semiconductor devices when the spatial scale of doping and oxide thickness variations become comparable with the geometric dimensions of devices. In the dissertation, the effects of these fluctuations on device characteristics are analyzed by using a new technique for the analysis of random doping and oxide thickness induced fluctuations. This technique is universal in nature in the sense that it is applicable to any transport model (drift-diffusion, semiclassical transport, quantum transport etc.) and it can be naturally extended to take into account random fluctuations of the oxide (trapped) charges and channel length. The technique is based on linearization of the transport equations with respect to the fluctuating quantities. It is computationally much (a few orders of magnitude) more efficient than the traditional Monte-Carlo approach and it yields information on the sensitivity of fluctuations of parameters of interest (e.g. threshold voltage, small-signal parameters, cut-off frequencies, etc.) to the locations of doping and oxide thickness fluctuations. For this reason, it can be very instrumental in the design of fluctuation-resistant structures of semiconductor devices. Quantum mechanical effects are taken into account by using the density-gradient model as well as through self-consistent Poisson-Schrodinger computations. Special attention is paid to the presenting of the technique in a form that is suitable for implementation on commercial device simulators. The numerical implementation of the technique is discussed in detail and numerous computational results are presented and compared with those previously published in literature.

Strongly exchange-coupled triplet pairs in an organic semiconductor

NASA Astrophysics Data System (ADS)

Weiss, Leah R.; Bayliss, Sam L.; Kraffert, Felix; Thorley, Karl J.; Anthony, John E.; Bittl, Robert; Friend, Richard H.; Rao, Akshay; Greenham, Neil C.; Behrends, Jan

2017-02-01

From biological complexes to devices based on organic semiconductors, spin interactions play a key role in the function of molecular systems. For instance, triplet-pair reactions impact operation of organic light-emitting diodes as well as photovoltaic devices. Conventional models for triplet pairs assume they interact only weakly. Here, using electron spin resonance, we observe long-lived, strongly interacting triplet pairs in an organic semiconductor, generated via singlet fission. Using coherent spin manipulation of these two-triplet states, we identify exchange-coupled (spin-2) quintet complexes coexisting with weakly coupled (spin-1) triplets. We measure strongly coupled pairs with a lifetime approaching 3 μs and a spin coherence time approaching 1 μs, at 10 K. Our results pave the way for the utilization of high-spin systems in organic semiconductors.

Spin injection and transport in semiconductor and metal nanostructures

NASA Astrophysics Data System (ADS)

Zhu, Lei

In this thesis we investigate spin injection and transport in semiconductor and metal nanostructures. To overcome the limitation imposed by the low efficiency of spin injection and extraction and strict requirements for retention of spin polarization within the semiconductor, novel device structures with additional logic functionality and optimized device performance have been developed. Weak localization/antilocalization measurements and analysis are used to assess the influence of surface treatments on elastic, inelastic and spin-orbit scatterings during the electron transport within the two-dimensional electron layer at the InAs surface. Furthermore, we have used spin-valve and scanned probe microscopy measurements to investigate the influence of sulfur-based surface treatments and electrically insulating barrier layers on spin injection into, and spin transport within, the two-dimensional electron layer at the surface of p-type InAs. We also demonstrate and analyze a three-terminal, all-electrical spintronic switching device, combining charge current cancellation by appropriate device biasing and ballistic electron transport. The device yields a robust, electrically amplified spin-dependent current signal despite modest efficiency in electrical injection of spin-polarized electrons. Detailed analyses provide insight into the advantages of ballistic, as opposed to diffusive, transport in device operation, as well as scalability to smaller dimensions, and allow us to eliminate the possibility of phenomena unrelated to spin transport contributing to the observed device functionality. The influence of the device geometry on magnetoresistance of nanoscale spin-valve structures is also demonstrated and discussed. Shortcomings of the simplified one-dimensional spin diffusion model for spin valve are elucidated, with comparison of the thickness and the spin diffusion length in the nonmagnetic channel as the criterion for validity of the 1D model. Our work contributes directly to the realization of spin valve and spin transistor devices based on III-V semiconductors, and offers new opportunities to engineer the behavior of spintronic devices at the nanoscale.

A hybrid life cycle inventory of nano-scale semiconductor manufacturing.

PubMed

Krishnan, Nikhil; Boyd, Sarah; Somani, Ajay; Raoux, Sebastien; Clark, Daniel; Dornfeld, David

2008-04-15

The manufacturing of modern semiconductor devices involves a complex set of nanoscale fabrication processes that are energy and resource intensive, and generate significant waste. It is important to understand and reduce the environmental impacts of semiconductor manufacturing because these devices are ubiquitous components in electronics. Furthermore, the fabrication processes used in the semiconductor industry are finding increasing application in other products, such as microelectromechanical systems (MEMS), flat panel displays, and photovoltaics. In this work we develop a library of typical gate-to-gate materials and energy requirements, as well as emissions associated with a complete set of fabrication process models used in manufacturing a modern microprocessor. In addition, we evaluate upstream energy requirements associated with chemicals and materials using both existing process life cycle assessment (LCA) databases and an economic input-output (EIO) model. The result is a comprehensive data set and methodology that may be used to estimate and improve the environmental performance of a broad range of electronics and other emerging applications that involve nano and micro fabrication.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nuzzo, Ralph G.; Rogers, John A.; Menard, Etienne

The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.

Optically switched graphene/4H-SiC junction bipolar transistor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chandrashekhar, MVS; Sudarshan, Tangali S.; Omar, Sabih U.

A bi-polar device is provided, along with methods of making the same. The bi-polar device can include a semiconductor substrate doped with a first dopant, a semiconductor layer on the first surface of the semiconductor substrate, and a Schottky barrier layer on the semiconductor layer. The method of forming a bi-polar device can include: forming a semiconductor layer on a first surface of a semiconductor substrate, where the semiconductor substrate comprises a first dopant and where the semiconductor layer comprises a second dopant that has an opposite polarity than the first dopant; and forming a Schottky barrier layer on amore » first portion of the semiconductor layer while leaving a second portion of the semiconductor layer exposed.« less

Semiconductor devices having a recessed electrode structure

DOEpatents

Palacios, Tomas Apostol; Lu, Bin; Matioli, Elison de Nazareth

2015-05-26

An electrode structure is described in which conductive regions are recessed into a semiconductor region. Trenches may be formed in a semiconductor region, such that conductive regions can be formed in the trenches. The electrode structure may be used in semiconductor devices such as field effect transistors or diodes. Nitride-based power semiconductor devices are described including such an electrode structure, which can reduce leakage current and otherwise improve performance.

Spin transport in lateral structures with semiconducting channel

NASA Astrophysics Data System (ADS)

Zainuddin, Abu Naser

Spintronics is an emerging field of electronics with the potential to be used in future integrated circuits. Spintronic devices are already making their mark in storage technologies in recent times and there are proposals for using spintronic effects in logic technologies as well. So far, major improvement in spintronic effects, for example, the `spin-valve' effect, is being achieved in metals or insulators as channel materials. But not much progress is made in semiconductors owing to the difficulty in injecting spins into them, which has only very recently been overcome with the combined efforts of many research groups around the world. The key motivations for semiconductor spintronics are their ease in integration with the existing semiconductor technology along with the gate controllability. At present semiconductor based spintronic devices are mostly lateral and are showing a very poor performance compared to their metal or insulator based vertical counterparts. The objective of this thesis is to analyze these devices based on spin-transport models and simulations. At first a lateral spin-valve device is modeled with the spin-diffusion equation based semiclassical approach. Identifying the important issues regarding the device performance, a compact circuit equivalent model is presented which would help to improve the device design. It is found that the regions outside the current path also have a significant influence on the device performance under certain conditions, which is ordinarily neglected when only charge transport is considered. Next, a modified spin-valve structure is studied where the spin signal is controlled with a gate in between the injecting and detecting contacts. The gate is used to modulate the rashba spin-orbit coupling of the channel which, in turn, modulates the spin-valve signal. The idea of gate controlled spin manipulation was originally proposed by Datta and Das back in 1990 and is called 'Datta-Das' effect. In this thesis, we have extended the model described in the original proposal to include the influence of channel dimensions on the nature of electron flow and the contact dimensions on the magnitude and phase of the spin-valve signal. In order to capture the spin-orbit effect a non-equilibrium Green's function (NEGF) based quantum transport model for spin-valve device have been developed which is also explained with simple theoretical treatment based on stationary phase approximation. The model is also compared against a recent experiment that demonstrated such gate modulated spin-valve effect. This thesis also evaluates the possibility of gate controlled magnetization reversal or spin-torque effect as a means to validate this, so called, 'Datta-Das' effect on a more solid footing. Finally, the scope for utilizing topological insulator material in semiconductor spintronics is discussed as a possible future work for this thesis.

H+-type and OH--type biological protonic semiconductors and complementary devices

NASA Astrophysics Data System (ADS)

Deng, Yingxin; Josberger, Erik; Jin, Jungho; Rousdari, Anita Fadavi; Helms, Brett A.; Zhong, Chao; Anantram, M. P.; Rolandi, Marco

2013-10-01

Proton conduction is essential in biological systems. Oxidative phosphorylation in mitochondria, proton pumping in bacteriorhodopsin, and uncoupling membrane potentials by the antibiotic Gramicidin are examples. In these systems, H+ hop along chains of hydrogen bonds between water molecules and hydrophilic residues - proton wires. These wires also support the transport of OH- as proton holes. Discriminating between H+ and OH- transport has been elusive. Here, H+ and OH- transport is achieved in polysaccharide- based proton wires and devices. A H+- OH- junction with rectifying behaviour and H+-type and OH--type complementary field effect transistors are demonstrated. We describe these devices with a model that relates H+ and OH- to electron and hole transport in semiconductors. In turn, the model developed for these devices may provide additional insights into proton conduction in biological systems.

H+-type and OH−-type biological protonic semiconductors and complementary devices

PubMed Central

Deng, Yingxin; Josberger, Erik; Jin, Jungho; Rousdari, Anita Fadavi; Helms, Brett A.; Zhong, Chao; Anantram, M. P.; Rolandi, Marco

2013-01-01

Proton conduction is essential in biological systems. Oxidative phosphorylation in mitochondria, proton pumping in bacteriorhodopsin, and uncoupling membrane potentials by the antibiotic Gramicidin are examples. In these systems, H+ hop along chains of hydrogen bonds between water molecules and hydrophilic residues – proton wires. These wires also support the transport of OH− as proton holes. Discriminating between H+ and OH− transport has been elusive. Here, H+ and OH− transport is achieved in polysaccharide- based proton wires and devices. A H+- OH− junction with rectifying behaviour and H+-type and OH−-type complementary field effect transistors are demonstrated. We describe these devices with a model that relates H+ and OH− to electron and hole transport in semiconductors. In turn, the model developed for these devices may provide additional insights into proton conduction in biological systems. PMID:24089083

T-gate geometric (solution for submicrometer gate length) HEMT: Physical analysis, modeling and implementation as parasitic elements and its usage as dual gate for variable gain amplifiers

NASA Astrophysics Data System (ADS)

Gupta, Ritesh; Rathi, Servin; Kaur, Ravneet; Gupta, Mridula; Gupta, R. S.

2009-03-01

In order to achieve superior RF performance, short gate length is required for the compound semiconductor field effect transistors, but the limitation in lithography for submicrometer gate lengths leads to the formation of various metal-insulator geometries like T-gate [Sandeep R. Bahl, Jesus A. del Alamo, Physics of breakdown in InAlAs/ n +-InGaAs heterostructure field-effect transistors, IEEE Trans. Electron Devices 41 (12) (1994) 2268-2275]. These geometries are the combination of various Metal-Semiconductor (MS)/Metal-Air-Semiconductor (MAS) contacts. Moreover, field plates [S. Karmalkar, M.S. Shur, G. Simin, M. Asif Khan, Field-plate engineering for HFETs, IEEE Trans. Electron Devices 52 (2005) 2534-2540] are also being fabricated these days, mainly at the drain end ( Γ-gate) having Metal-Insulator-Semiconductor (MIS) instead of MAS contact with the intention of increasing the breakdown voltage of the device. To realize the effect of upper gate electrode in the T-gate structure and field plates, an analytical model has been proposed in the present article by dividing the whole structure into MS/MIS contact regions, applying current continuity among them and solving iteratively. The model proposed for Metal-Insulator Semiconductor High Electron Mobility Transistor (MISHEMT) [R. Gupta, S.K. Aggarwal, M. Gupta, R.S. Gupta, Analytical model for metal insulator semiconductor high electron mobility transistor (MISHEMT) for its high frequency and high power applications, J. Semicond. Technol. Sci. 6 (3) (2006) 189-198], is equally applicable to High Electron Mobility Transistors (HEMT) and has been used to formulate this model. In this paper, various structures and geometries have been compared to anticipate the need of T-gate modeling. The effect of MIS contacts has been implemented as parasitic resistance and capacitance and has also been studied to control the middle conventional gate as in dual gate technology by applying separate voltages across it. The results obtained using the proposed analytical scheme has been compared with simulated and experimental results, to prove the validity of our model.

Plasma Properties of an Exploding Semiconductor Igniter

NASA Astrophysics Data System (ADS)

McGuirk, J. S.; Thomas, K. A.; Shaffer, E.; Malone, A. L.; Baginski, T.; Baginski, M. E.

1997-11-01

Requirements by the automotive industry for low-cost, pyrotechnic igniters for automotive airbags have led to the development of several semiconductor devices. The properties of the plasma produced by the vaporization of an exploding semiconductor are necessary in order to minimize the electrical energy requirements. This work considers two silicon-based semiconductor devices: the semiconductor bridge (SCB) and the semiconductor junction igniter both consisting of etched silicon with vapor deposited aluminum structures. Electrical current passing through the device heats a narrow junction region to the point of vaporization creating an aluminum and silicon low-temperature plasma. This work will investigate the electrical characteristics of both devices and infer the plasma properties. Furthermore optical spectral measurements will be taken of the exploding devices to estimate the temperature and density of the plasma.

THz semiconductor-based front-end receiver technology for space applications

NASA Technical Reports Server (NTRS)

Mehdi, Imran; Siegel, Peter

2004-01-01

Advances in the design and fabrication of very low capacitance planar Schottky diodes and millimeter-wave power amplifiers, more accurate device and circuit models for commercial 3-D electromagnetic simulators, and the availability of both MEMS and high precision metal machining, have enabled RF engineers to extend traditional waveguide-based sensor and source technologies well into the TI-Iz frequency regime. This short paper will highlight recent progress in realizing THz space-qualified receiver front-ends based on room temperature semiconductor devices.

High Temperature Superconductor/Semiconductor Hybrid Microwave Devices and Circuits

NASA Technical Reports Server (NTRS)

Romanofsky, Robert R.; Miranda, Felix A.

1999-01-01

Contents include following: film deposition technique; laser ablation; magnetron sputtering; sequential evaporation; microwave substrates; film characterization at microwave frequencies; complex conductivity; magnetic penetration depth; surface impedance; planar single-mode filters; small antennas; antenna arrays phase noise; tunable oscillations; hybrid superconductor/semiconductor receiver front ends; and noise modeling.

Polar semiconductor heterojunction structure energy band diagram considerations

NASA Astrophysics Data System (ADS)

Lin, Shuxun; Wen, Cheng P.; Wang, Maojun; Hao, Yilong

2016-03-01

The unique nature of built-in electric field induced positive/negative charge pairs of polar semiconductor heterojunction structure has led to a more realistic device model for hexagonal III-nitride HEMT. In this modeling approach, the distribution of charge carriers is dictated by the electrostatic potential profile instead of Femi statistics. The proposed device model is found suitable to explain peculiar properties of GaN HEMT structures, including: (1) Discrepancy in measured conventional linear transmission line model (LTLM) sheet resistance and contactless sheet resistance of GaN HEMT with thin barrier layer. (2) Below bandgap radiation from forward biased Nickel Schottky barrier diode on GaN HEMT structure. (3) GaN HEMT barrier layer doping has negligible effect on transistor channel sheet charge density.

Contact formation and gettering of precipitated impurities by multiple firing during semiconductor device fabrication

DOEpatents

Sopori, Bhushan

2014-05-27

Methods for contact formation and gettering of precipitated impurities by multiple firing during semiconductor device fabrication are provided. In one embodiment, a method for fabricating an electrical semiconductor device comprises: a first step that includes gettering of impurities from a semiconductor wafer and forming a backsurface field; and a second step that includes forming a front contact for the semiconductor wafer, wherein the second step is performed after completion of the first step.

Hybrid semiconductor nanomagnetoelectronic devices

NASA Astrophysics Data System (ADS)

Bae, Jong Uk

2007-12-01

The subject of this dissertation is the exploration of a new class of hybrid semiconductor nanomagnetoelectronic devices. In these studies, single-domain nanomagnets are used as the gate in a transistor structure, and the spatially non-uniform magnetic fields that they generate provide an additional means to modulate the channel conductance. A quantum wire etched in a high-mobility GaAs/AlGaAs quantum well serves as the channel of this device and the current flow through it is modulated by a high-aspect-ratio Co nanomagnet. The conductance of this device exhibits clear hysteresis in a magnetic field, which is significantly enhanced when the nanomagnet is used as a gate to form a local tunnel barrier in the semiconductor channel. A simple theoretical model, which models the tunnel barrier as a simple harmonic saddle, is able to account for the experimentallyobserved behavior. Further improvements in the tunneling magneto-resistance of this device should be possible in the future by optimizing the gate and channel geometries. In addition to these investigations, we have also explored the hysteretic magnetoresistance of devices in which the tunnel barrier is absent and the behavior is instead dominated by the properties of the magnetic barrier alone. We show experimentally how quantum corrections to the conductance of the quantum wire compete against the magneto-transport effects induced by the non-uniform magnetic field.

Semiconductor photoelectrochemistry

NASA Technical Reports Server (NTRS)

Buoncristiani, A. M.; Byvik, C. E.

1983-01-01

Semiconductor photoelectrochemical reactions are investigated. A model of the charge transport processes in the semiconductor, based on semiconductor device theory, is presented. It incorporates the nonlinear processes characterizing the diffusion and reaction of charge carriers in the semiconductor. The model is used to study conditions limiting useful energy conversion, specifically the saturation of current flow due to high light intensity. Numerical results describing charge distributions in the semiconductor and its effects on the electrolyte are obtained. Experimental results include: an estimate rate at which a semiconductor photoelectrode is capable of converting electromagnetic energy into chemical energy; the effect of cell temperature on the efficiency; a method for determining the point of zero zeta potential for macroscopic semiconductor samples; a technique using platinized titanium dioxide powders and ultraviolet radiation to produce chlorine, bromine, and iodine from solutions containing their respective ions; the photoelectrochemical properties of a class of layered compounds called transition metal thiophosphates; and a technique used to produce high conversion efficiency from laser radiation to chemical energy.

Efficient semiconductor light-emitting device and method

DOEpatents

Choquette, Kent D.; Lear, Kevin L.; Schneider, Jr., Richard P.

1996-01-01

A semiconductor light-emitting device and method. The semiconductor light-emitting device is provided with at least one control layer or control region which includes an annular oxidized portion thereof to channel an injection current into the active region, and to provide a lateral refractive index profile for index guiding the light generated within the device. A periodic composition grading of at least one of the mirror stacks in the device provides a reduced operating voltage of the device. The semiconductor light-emitting device has a high efficiency for light generation, and may be formed either as a resonant-cavity light-emitting diode (RCLED) or as a vertical-cavity surface-emitting laser (VCSEL).

Efficient semiconductor light-emitting device and method

DOEpatents

Choquette, K.D.; Lear, K.L.; Schneider, R.P. Jr.

1996-02-20

A semiconductor light-emitting device and method are disclosed. The semiconductor light-emitting device is provided with at least one control layer or control region which includes an annular oxidized portion thereof to channel an injection current into the active region, and to provide a lateral refractive index profile for index guiding the light generated within the device. A periodic composition grading of at least one of the mirror stacks in the device provides a reduced operating voltage of the device. The semiconductor light-emitting device has a high efficiency for light generation, and may be formed either as a resonant-cavity light-emitting diode (RCLED) or as a vertical-cavity surface-emitting laser (VCSEL). 12 figs.

Environmentally benign semiconductor processing for dielectric etch

NASA Astrophysics Data System (ADS)

Liao, Marci Yi-Ting

Semiconductor processing requires intensive usage of chemicals, electricity, and water. Such intensive resource usage leaves a large impact on the environment. For instance, in Silicon Valley, the semiconductor industry is responsible for 80% of the hazardous waste sites contaminated enough to require government assistance. Research on environmentally benign semiconductor processing is needed to reduce the environmental impact of the semiconductor industry. The focus of this dissertation is on the environmental impact of one aspect of semiconductor processing: patterning of dielectric materials. Plasma etching of silicon dioxide emits perfluorocarbons (PFCs) gases, like C2F6 and CF4, into the atmosphere. These gases are super global warming/greenhouse gases because of their extremely long atmospheric lifetimes and excellent infrared absorption properties. We developed the first inductively coupled plasma (ICP) abatement device for destroying PFCs downstream of a plasma etcher. Destruction efficiencies of 99% and 94% can be obtained for the above mentioned PFCs, by using O 2 as an additive gas. Our results have lead to extensive modeling in academia as well as commercialization of the ICP abatement system. Dielectric patterning of hi-k materials for future device technology brings different environment challenges. The uncertainty of the hi-k material selection and the patterning method need to be addressed. We have evaluated the environmental impact of three different dielectric patterning methods (plasma etch, wet etch and chemical-mechanical polishing), as well as, the transistor device performances associated with the patterning methods. Plasma etching was found to be the most environmentally benign patterning method, which also gives the best device performance. However, the environmental concern for plasma etching is the possibility of cross-contamination from low volatility etch by-products. Therefore, mass transfer in a plasma etcher for a promising hi-k dielectric material, ZrO2, was studied. A novel cross-contamination sampling technique was developed, along with a mass transfer model.

Complex-envelope alternating-direction-implicit FDTD method for simulating active photonic devices with semiconductor/solid-state media.

PubMed

Singh, Gurpreet; Ravi, Koustuban; Wang, Qian; Ho, Seng-Tiong

2012-06-15

A complex-envelope (CE) alternating-direction-implicit (ADI) finite-difference time-domain (FDTD) approach to treat light-matter interaction self-consistently with electromagnetic field evolution for efficient simulations of active photonic devices is presented for the first time (to our best knowledge). The active medium (AM) is modeled using an efficient multilevel system of carrier rate equations to yield the correct carrier distributions, suitable for modeling semiconductor/solid-state media accurately. To include the AM in the CE-ADI-FDTD method, a first-order differential system involving CE fields in the AM is first set up. The system matrix that includes AM parameters is then split into two time-dependent submatrices that are then used in an efficient ADI splitting formula. The proposed CE-ADI-FDTD approach with AM takes 22% of the time as the approach of the corresponding explicit FDTD, as validated by semiconductor microdisk laser simulations.

Electroluminescent devices formed using semiconductor nanocrystals as an electron transport media and method of making such electroluminescent devices

DOEpatents

Alivisatos, A. Paul; Colvin, Vickie

1996-01-01

An electroluminescent device is described, as well as a method of making same, wherein the device is characterized by a semiconductor nanocrystal electron transport layer capable of emitting visible light in response to a voltage applied to the device. The wavelength of the light emitted by the device may be changed by changing either the size or the type of semiconductor nanocrystals used in forming the electron transport layer. In a preferred embodiment the device is further characterized by the capability of emitting visible light of varying wavelengths in response to changes in the voltage applied to the device. The device comprises a hole processing structure capable of injecting and transporting holes, and usually comprising a hole injecting layer and a hole transporting layer; an electron transport layer in contact with the hole processing structure and comprising one or more layers of semiconductor nanocrystals; and an electron injecting layer in contact with the electron transport layer for injecting electrons into the electron transport layer. The capability of emitting visible light of various wavelengths is principally based on the variations in voltage applied thereto, but the type of semiconductor nanocrystals used and the size of the semiconductor nanocrystals in the layers of semiconductor nanometer crystals may also play a role in color change, in combination with the change in voltage.

Hybrid quantum-classical modeling of quantum dot devices

NASA Astrophysics Data System (ADS)

Kantner, Markus; Mittnenzweig, Markus; Koprucki, Thomas

2017-11-01

The design of electrically driven quantum dot devices for quantum optical applications asks for modeling approaches combining classical device physics with quantum mechanics. We connect the well-established fields of semiclassical semiconductor transport theory and the theory of open quantum systems to meet this requirement. By coupling the van Roosbroeck system with a quantum master equation in Lindblad form, we introduce a new hybrid quantum-classical modeling approach, which provides a comprehensive description of quantum dot devices on multiple scales: it enables the calculation of quantum optical figures of merit and the spatially resolved simulation of the current flow in realistic semiconductor device geometries in a unified way. We construct the interface between both theories in such a way, that the resulting hybrid system obeys the fundamental axioms of (non)equilibrium thermodynamics. We show that our approach guarantees the conservation of charge, consistency with the thermodynamic equilibrium and the second law of thermodynamics. The feasibility of the approach is demonstrated by numerical simulations of an electrically driven single-photon source based on a single quantum dot in the stationary and transient operation regime.

Basic Equations for the Modeling of Gallium Nitride (gan) High Electron Mobility Transistors (hemts)

NASA Technical Reports Server (NTRS)

Freeman, Jon C.

2003-01-01

Gallium nitride (GaN) is a most promising wide band-gap semiconductor for use in high-power microwave devices. It has functioned at 320 C, and higher values are well within theoretical limits. By combining four devices, 20 W has been developed at X-band. GaN High Electron Mobility Transistors (HEMTs) are unique in that the two-dimensional electron gas (2DEG) is supported not by intentional doping, but instead by polarization charge developed at the interface between the bulk GaN region and the AlGaN epitaxial layer. The polarization charge is composed of two parts: spontaneous and piezoelectric. This behavior is unlike other semiconductors, and for that reason, no commercially available modeling software exists. The theme of this document is to develop a self-consistent approach to developing the pertinent equations to be solved. A Space Act Agreement, "Effects in AlGaN/GaN HEMT Semiconductors" with Silvaco Data Systems to implement this approach into their existing software for III-V semiconductors, is in place (summer of 2002).

Method and apparatus for use of III-nitride wide bandgap semiconductors in optical communications

DOEpatents

Hui, Rongqing [Lenexa, KS; Jiang, Hong-Xing [Manhattan, KS; Lin, Jing-Yu [Manhattan, KS

2008-03-18

The present disclosure relates to the use of III-nitride wide bandgap semiconductor materials for optical communications. In one embodiment, an optical device includes an optical waveguide device fabricated using a III-nitride semiconductor material. The III-nitride semiconductor material provides for an electrically controllable refractive index. The optical waveguide device provides for high speed optical communications in an infrared wavelength region. In one embodiment, an optical amplifier is provided using optical coatings at the facet ends of a waveguide formed of erbium-doped III-nitride semiconductor materials.

European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (5th)

DTIC Science & Technology

1994-10-07

Characterisation and Modelling WEDNESDAY 5th OCTOBER Session C Hot Carriers Session D Oxide States Session E Power Devices Workshop 2 Power Devices Session F...Medium Enterprises .......... 17 W2 Power Devices Workshop "Reliability of Power Semiconductors for Traction Applications...New Mexico, USA Sandia National Laboratories, Albuquerque, New Mexico, USA SESSION E Power Devices El Reliability Issues in New Technology

Non-Parabolic Hydrodynamic Formulations for the Simulation of Inhomogeneous Semiconductor Devices

NASA Technical Reports Server (NTRS)

Smith, A. W.; Brennan, K. F.

1996-01-01

Hydrodynamic models are becoming prevalent design tools for small scale devices and other devices in which high energy effects can dominate transport. Most current hydrodynamic models use a parabolic band approximation to obtain fairly simple conservation equations. Interest in accounting for band structure effects in hydrodynamic device simulation has begun to grow since parabolic models cannot fully describe the transport in state of the art devices due to the distribution populating non-parabolic states within the band. This paper presents two different non-parabolic formulations or the hydrodynamic model suitable for the simulation of inhomogeneous semiconductor devices. The first formulation uses the Kane dispersion relationship ((hk)(exp 2)/2m = W(1 + alphaW). The second formulation makes use of a power law ((hk)(exp 2)/2m = xW(exp y)) for the dispersion relation. Hydrodynamic models which use the first formulation rely on the binomial expansion to obtain moment equations with closed form coefficients. This limits the energy range over which the model is valid. The power law formulation readily produces closed form coefficients similar to those obtained using the parabolic band approximation. However, the fitting parameters (x,y) are only valid over a limited energy range. The physical significance of the band non-parabolicity is discussed as well as the advantages/disadvantages and approximations of the two non-parabolic models. A companion paper describes device simulations based on the three dispersion relationships; parabolic, Kane dispersion and power law dispersion.

Non-parabolic hydrodynamic formulations for the simulation of inhomogeneous semiconductor devices

NASA Technical Reports Server (NTRS)

Smith, Arlynn W.; Brennan, Kevin F.

1995-01-01

Hydrodynamic models are becoming prevalent design tools for small scale devices and other devices in which high energy effects can dominate transport. Most current hydrodynamic models use a parabolic band approximation to obtain fairly simple conservation equations. Interest in accounting for band structure effects in hydrodynamic device simulation has begun to grow since parabolic models can not fully describe the transport in state of the art devices due to the distribution populating non-parabolic states within the band. This paper presents two different non-parabolic formulations of the hydrodynamic model suitable for the simulation of inhomogeneous semiconductor devices. The first formulation uses the Kane dispersion relationship (hk)(exp 2)/2m = W(1 + alpha(W)). The second formulation makes use of a power law ((hk)(exp 2)/2m = xW(sup y)) for the dispersion relation. Hydrodynamic models which use the first formulation rely on the binomial expansion to obtain moment equations with closed form coefficients. This limits the energy range over which the model is valid. The power law formulation readily produces closed form coefficients similar to those obtained using the parabolic band approximation. However, the fitting parameters (x,y) are only valid over a limited energy range. The physical significance of the band non-parabolicity is discussed as well as the advantages/disadvantages and approximations of the two non-parabolic models. A companion paper describes device simulations based on the three dispersion relationships: parabolic, Kane dispersion, and power low dispersion.

Methods of forming semiconductor devices and devices formed using such methods

DOEpatents

Fox, Robert V; Rodriguez, Rene G; Pak, Joshua

2013-05-21

Single source precursors are subjected to carbon dioxide to form particles of material. The carbon dioxide may be in a supercritical state. Single source precursors also may be subjected to supercritical fluids other than supercritical carbon dioxide to form particles of material. The methods may be used to form nanoparticles. In some embodiments, the methods are used to form chalcopyrite materials. Devices such as, for example, semiconductor devices may be fabricated that include such particles. Methods of forming semiconductor devices include subjecting single source precursors to carbon dioxide to form particles of semiconductor material, and establishing electrical contact between the particles and an electrode.

Tunneling effect on double potential barriers GaAs and PbS

NASA Astrophysics Data System (ADS)

Prastowo, S. H. B.; Supriadi, B.; Ridlo, Z. R.; Prihandono, T.

2018-04-01

A simple model of transport phenomenon tunnelling effect through double barrier structure was developed. In this research we concentrate on the variation of electron energy which entering double potential barriers to transmission coefficient. The barriers using semiconductor materials GaAs (Galium Arsenide) with band-gap energy 1.424 eV, distance of lattice 0.565 nm, and PbS (Lead Sulphide) with band gap energy 0.41 eV distance of lattice is 18 nm. The Analysisof tunnelling effect on double potentials GaAs and PbS using Schrodinger’s equation, continuity, and matrix propagation to get transmission coefficient. The maximum energy of electron that we use is 1.0 eV, and observable from 0.0025 eV- 1.0 eV. The shows the highest transmission coefficient is0.9982 from electron energy 0.5123eV means electron can pass the barriers with probability 99.82%. Semiconductor from materials GaAs and PbS is one of selected material to design semiconductor device because of transmission coefficient directly proportional to bias the voltage of semiconductor device. Application of the theoretical analysis of resonant tunnelling effect on double barriers was used to design and develop new structure and combination of materials for semiconductor device (diode, transistor, and integrated circuit).

Radiation hardening of metal-oxide semi-conductor (MOS) devices by boron

NASA Technical Reports Server (NTRS)

Danchenko, V.

1974-01-01

Technique using boron effectively protects metal-oxide semiconductor devices from ionizing radiation without using shielding materials. Boron is introduced into insulating gate oxide layer at semiconductor-insulator interface.

Coincident site lattice-matched growth of semiconductors on substrates using compliant buffer layers

DOEpatents

Norman, Andrew

2016-08-23

A method of producing semiconductor materials and devices that incorporate the semiconductor materials are provided. In particular, a method is provided of producing a semiconductor material, such as a III-V semiconductor, on a silicon substrate using a compliant buffer layer, and devices such as photovoltaic cells that incorporate the semiconductor materials. The compliant buffer material and semiconductor materials may be deposited using coincident site lattice-matching epitaxy, resulting in a close degree of lattice matching between the substrate material and deposited material for a wide variety of material compositions. The coincident site lattice matching epitaxial process, as well as the use of a ductile buffer material, reduce the internal stresses and associated crystal defects within the deposited semiconductor materials fabricated using the disclosed method. As a result, the semiconductor devices provided herein possess enhanced performance characteristics due to a relatively low density of crystal defects.

Verilog-A Device Models for Cryogenic Temperature Operation of Bulk Silicon CMOS Devices

NASA Technical Reports Server (NTRS)

Akturk, Akin; Potbhare, Siddharth; Goldsman, Neil; Holloway, Michael

2012-01-01

Verilog-A based cryogenic bulk CMOS (complementary metal oxide semiconductor) compact models are built for state-of-the-art silicon CMOS processes. These models accurately predict device operation at cryogenic temperatures down to 4 K. The models are compatible with commercial circuit simulators. The models extend the standard BSIM4 [Berkeley Short-channel IGFET (insulated-gate field-effect transistor ) Model] type compact models by re-parameterizing existing equations, as well as adding new equations that capture the physics of device operation at cryogenic temperatures. These models will allow circuit designers to create optimized, reliable, and robust circuits operating at cryogenic temperatures.

40 CFR 63.7195 - What definitions apply to this subpart?

Code of Federal Regulations, 2012 CFR

2012-07-01

... units used to manufacture p-type and n-type semiconductors or active solid state devices from a wafer.... Examples of semiconductor or related solid state devices include semiconductor diodes, semiconductor stacks... permanently attached to motor vehicles such as trucks, railcars, barges, or ships; (2) Flow-through tanks...

40 CFR 63.7195 - What definitions apply to this subpart?

Code of Federal Regulations, 2013 CFR

2013-07-01

... units used to manufacture p-type and n-type semiconductors or active solid state devices from a wafer.... Examples of semiconductor or related solid state devices include semiconductor diodes, semiconductor stacks... permanently attached to motor vehicles such as trucks, railcars, barges, or ships; (2) Flow-through tanks...

40 CFR 63.7195 - What definitions apply to this subpart?

Code of Federal Regulations, 2014 CFR

2014-07-01

... units used to manufacture p-type and n-type semiconductors or active solid state devices from a wafer.... Examples of semiconductor or related solid state devices include semiconductor diodes, semiconductor stacks... permanently attached to motor vehicles such as trucks, railcars, barges, or ships; (2) Flow-through tanks...

Transferable tight binding model for strained group IV and III-V heterostructures

NASA Astrophysics Data System (ADS)

Tan, Yaohua; Povolotskyi, Micheal; Kubis, Tillmann; Boykin, Timothy; Klimeck, Gerhard

Modern semiconductor devices have reached critical device dimensions in the range of several nanometers. For reliable prediction of device performance, it is critical to have a numerical efficient model that are transferable to material interfaces. In this work, we present an empirical tight binding (ETB) model with transferable parameters for strained IV and III-V group semiconductors. The ETB model is numerically highly efficient as it make use of an orthogonal sp3d5s* basis set with nearest neighbor inter-atomic interactions. The ETB parameters are generated from HSE06 hybrid functional calculations. Band structures of strained group IV and III-V materials by ETB model are in good agreement with corresponding HSE06 calculations. Furthermore, the ETB model is applied to strained superlattices which consist of group IV and III-V elements. The ETB model turns out to be transferable to nano-scale hetero-structure. The ETB band structures agree with the corresponding HSE06 results in the whole Brillouin zone. The ETB band gaps of superlattices with common cations or common anions have discrepancies within 0.05eV.

Low-voltage organic electronics based on a gate-tunable injection barrier in vertical graphene-organic semiconductor heterostructures.

PubMed

Hlaing, Htay; Kim, Chang-Hyun; Carta, Fabio; Nam, Chang-Yong; Barton, Rob A; Petrone, Nicholas; Hone, James; Kymissis, Ioannis

2015-01-14

The vertical integration of graphene with inorganic semiconductors, oxide semiconductors, and newly emerging layered materials has recently been demonstrated as a promising route toward novel electronic and optoelectronic devices. Here, we report organic thin film transistors based on vertical heterojunctions of graphene and organic semiconductors. In these thin heterostructure devices, current modulation is accomplished by tuning of the injection barriers at the semiconductor/graphene interface with the application of a gate voltage. N-channel devices fabricated with a thin layer of C60 show a room temperature on/off ratio >10(4) and current density of up to 44 mAcm(-2). Because of the ultrashort channel intrinsic to the vertical structure, the device is fully operational at a driving voltage of 200 mV. A complementary p-channel device is also investigated, and a logic inverter based on two complementary transistors is demonstrated. The vertical integration of graphene with organic semiconductors via simple, scalable, and low-temperature fabrication processes opens up new opportunities to realize flexible, transparent organic electronic, and optoelectronic devices.

Photoemission-based microelectronic devices

PubMed Central

Forati, Ebrahim; Dill, Tyler J.; Tao, Andrea R.; Sievenpiper, Dan

2016-01-01

The vast majority of modern microelectronic devices rely on carriers within semiconductors due to their integrability. Therefore, the performance of these devices is limited due to natural semiconductor properties such as band gap and electron velocity. Replacing the semiconductor channel in conventional microelectronic devices with a gas or vacuum channel may scale their speed, wavelength and power beyond what is available today. However, liberating electrons into gas/vacuum in a practical microelectronic device is quite challenging. It often requires heating, applying high voltages, or using lasers with short wavelengths or high powers. Here, we show that the interaction between an engineered resonant surface and a low-power infrared laser can cause enough photoemission via electron tunnelling to implement feasible microelectronic devices such as transistors, switches and modulators. The proposed photoemission-based devices benefit from the advantages of gas-plasma/vacuum electronic devices while preserving the integrability of semiconductor-based devices. PMID:27811946

Current injection and transport in polyfluorene

NASA Astrophysics Data System (ADS)

Yang, Chieh-Kai; Yang, Chia-Ming; Liao, Hua-Hsien; Horng, Sheng-Fu; Meng, Hsin-Fei

2007-08-01

A comprehensive numerical model is established for the electrical processes in a sandwich organic semiconductor device with high carrier injection barrier. The charge injection at the anode interface with 0.8eV energy barrier is dominated by the hopping among the gap states of the semiconductor caused by disorders. The Ohmic behavior at low voltage is demonstrated to be not due to the background doping but the filaments formed by conductive clusters. In bipolar devices with low work function cathode it is shown that near the anode the electron traps significantly enhance hole injection through Fowler-Nordheim tunneling, resulting in rapid increases of the hole carrier and current in comparison with the hole-only devices.

Near-infrared light emitting device using semiconductor nanocrystals

DOE Office of Scientific and Technical Information (OSTI.GOV)

Supran, Geoffrey J.S.; Song, Katherine W.; Hwang, Gyuweon

A near-infrared light emitting device can include semiconductor nanocrystals that emit at wavelengths beyond 1 .mu.m. The semiconductor nanocrystals can include a core and an overcoating on a surface of the core.

Introduction to Semiconductor Devices

NASA Astrophysics Data System (ADS)

Brennan, Kevin F.

2005-03-01

This volume offers a solid foundation for understanding the most important devices used in the hottest areas of electronic engineering today, from semiconductor fundamentals to state-of-the-art semiconductor devices in the telecommunications and computing industries. Kevin Brennan describes future approaches to computing hardware and RF power amplifiers, and explains how emerging trends and system demands of computing and telecommunications systems influence the choice, design and operation of semiconductor devices. In addition, he covers MODFETs and MOSFETs, short channel effects, and the challenges faced by continuing miniaturization. His book is both an excellent senior/graduate text and a valuable reference for practicing engineers and researchers.

Dynamic detection of spin accumulation in ferromagnet-semiconductor devices by ferromagnetic resonance (Conference Presentation)

NASA Astrophysics Data System (ADS)

Crowell, Paul A.; Liu, Changjiang; Patel, Sahil; Peterson, Tim; Geppert, Chad C.; Christie, Kevin; Stecklein, Gordon; Palmstrøm, Chris J.

2016-10-01

A distinguishing feature of spin accumulation in ferromagnet-semiconductor devices is its precession in a magnetic field. This is the basis for detection techniques such as the Hanle effect, but these approaches become ineffective as the spin lifetime in the semiconductor decreases. For this reason, no electrical Hanle measurement has been demonstrated in GaAs at room temperature. We show here that by forcing the magnetization in the ferromagnet to precess at resonance instead of relying only on the Larmor precession of the spin accumulation in the semiconductor, an electrically generated spin accumulation can be detected up to 300 K. The injection bias and temperature dependence of the measured spin signal agree with those obtained using traditional methods. We further show that this new approach enables a measurement of short spin lifetimes (< 100 psec), a regime that is not accessible in semiconductors using traditional Hanle techniques. The measurements were carried out on epitaxial Heusler alloy (Co2FeSi or Co2MnSi)/n-GaAs heterostructures. Lateral spin valve devices were fabricated by electron beam and photolithography. We compare measurements carried out by the new FMR-based technique with traditional non-local and three-terminal Hanle measurements. A full model appropriate for the measurements will be introduced, and a broader discussion in the context of spin pumping experimenments will be included in the talk. The new technique provides a simple and powerful means for detecting spin accumulation at high temperatures. Reference: C. Liu, S. J. Patel, T. A. Peterson, C. C. Geppert, K. D. Christie, C. J. Palmstrøm, and P. A. Crowell, "Dynamic detection of electron spin accumulation in ferromagnet-semiconductor devices by ferromagnetic resonance," Nature Communications 7, 10296 (2016). http://dx.doi.org/10.1038/ncomms10296

Long-Term Stability of Mold Compounds and the Influence on Semiconductor Device Reliability

NASA Astrophysics Data System (ADS)

Mahler, Joachim; Mengel, Manfred

2012-07-01

Lifetimes of semiconductor devices are specified according to the products and their applications to ensure safe operation, for instance as part of an automobile product. The long-term stability of the device is strongly dependent on the chip encapsulation and its adhesion to the chip and substrate. Molded silicon strips that act as a model system for molded chips inside semiconductor devices were investigated. Four commercially available mold compounds were applied on silicon strips and stored over 5 years at room temperature (RT), and changes in the thermomechanical behavior were analyzed. After storage, all molded strips exhibited warpage reduction in the range of 11% to 14% at RT with respect to the initial warpage. The temperatures for the stress-free state also changed during storage and were located between 228°C and 235°C for each mold. Additional stress applied to the stored modules, by temperature cycling as well as high-temperature storage, increased the warpage of the molded silicon samples. For further interpretation of measured results, finite-element method calculations were performed.

Energy storage device with large charge separation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Holme, Timothy P.; Prinz, Friedrich B.; Iancu, Andrei T.

High density energy storage in semiconductor devices is provided. There are two main aspects of the present approach. The first aspect is to provide high density energy storage in semiconductor devices based on formation of a plasma in the semiconductor. The second aspect is to provide high density energy storage based on charge separation in a p-n junction.

Energy storage device with large charge separation

DOEpatents

Holme, Timothy P.; Prinz, Friedrich B.; Iancu, Andrei

2016-04-12

High density energy storage in semiconductor devices is provided. There are two main aspects of the present approach. The first aspect is to provide high density energy storage in semiconductor devices based on formation of a plasma in the semiconductor. The second aspect is to provide high density energy storage based on charge separation in a p-n junction.

Charge transport in nanoscale "all-inorganic" networks of semiconductor nanorods linked by metal domains.

PubMed

Lavieville, Romain; Zhang, Yang; Casu, Alberto; Genovese, Alessandro; Manna, Liberato; Di Fabrizio, Enzo; Krahne, Roman

2012-04-24

Charge transport across metal-semiconductor interfaces at the nanoscale is a crucial issue in nanoelectronics. Chains of semiconductor nanorods linked by Au particles represent an ideal model system in this respect, because the metal-semiconductor interface is an intrinsic feature of the nanosystem and does not manifest solely as the contact to the macroscopic external electrodes. Here we investigate charge transport mechanisms in all-inorganic hybrid metal-semiconductor networks fabricated via self-assembly in solution, in which CdSe nanorods were linked to each other by Au nanoparticles. Thermal annealing of our devices changed the morphology of the networks and resulted in the removal of small Au domains that were present on the lateral nanorod facets, and in ripening of the Au nanoparticles in the nanorod junctions with more homogeneous metal-semiconductor interfaces. In such thermally annealed devices the voltage dependence of the current at room temperature can be well described by a Schottky barrier lowering at a metal semiconductor contact under reverse bias, if the spherical shape of the gold nanoparticles is considered. In this case the natural logarithm of the current does not follow the square-root dependence of the voltage as in the bulk, but that of V(2/3). From our fitting with this model we extract the effective permittivity that agrees well with theoretical predictions for the permittivity near the surface of CdSe nanorods. Furthermore, the annealing improved the network conductance at cryogenic temperatures, which could be related to the reduction of the number of trap states.

Diode having trenches in a semiconductor region

DOEpatents

Palacios, Tomas Apostol; Lu, Bin; Matioli, Elison de Nazareth

2016-03-22

An electrode structure is described in which conductive regions are recessed into a semiconductor region. Trenches may be formed in a semiconductor region, such that conductive regions can be formed in the trenches. The electrode structure may be used in semiconductor devices such as field effect transistors or diodes. Nitride-based power semiconductor devices are described including such an electrode structure, which can reduce leakage current and otherwise improve performance.

Charge collection efficiency degradation induced by MeV ions in semiconductor devices: Model and experiment

DOE PAGES

Vittone, Ettore; Pastuovic, Zeljko; Breese, Mark B. H.; ...

2016-02-08

This study investigates both theoretically and experimentally the charge collection efficiency (CCE) degradation in silicon diodes induced by energetic ions. Ion Beam Induced Charge (IBIC) measurements carried out on n- and p-type silicon diodes which were previously irradiated with MeV He ions show evidence that the CCE degradation does not only depend on the mass, energy and fluence of the damaging ion, but also depends on the ion probe species and on the polarization state of the device. A general one-dimensional model is derived, which accounts for the ion-induced defect distribution, the ionization profile of the probing ion and themore » charge induction mechanism. Using the ionizing and non-ionizing energy loss profiles resulting from simulations based on the binary collision approximation and on the electrostatic/transport parameters of the diode under study as input, the model is able to accurately reproduce the experimental CCE degradation curves without introducing any phenomenological additional term or formula. Although limited to low level of damage, the model is quite general, including the displacement damage approach as a special case and can be applied to any semiconductor device. It provides a method to measure the capture coefficients of the radiation induced recombination centres. They can be considered indexes, which can contribute to assessing the relative radiation hardness of semiconductor materials.« less

Device considerations for development of conductance-based biosensors

PubMed Central

Lee, Kangho; Nair, Pradeep R.; Scott, Adina; Alam, Muhammad A.; Janes, David B.

2009-01-01

Design and fabrication of electronic biosensors based on field-effect-transistor (FET) devices require understanding of interactions between semiconductor surfaces and organic biomolecules. From this perspective, we review practical considerations for electronic biosensors with emphasis on molecular passivation effects on FET device characteristics upon immobilization of organic molecules and an electrostatic model for FET-based biosensors. PMID:24753627

Monolayer-Mediated Growth of Organic Semiconductor Films with Improved Device Performance.

PubMed

Huang, Lizhen; Hu, Xiaorong; Chi, Lifeng

2015-09-15

Increased interest in wearable and smart electronics is driving numerous research works on organic electronics. The control of film growth and patterning is of great importance when targeting high-performance organic semiconductor devices. In this Feature Article, we summarize our recent work focusing on the growth, crystallization, and device operation of organic semiconductors intermediated by ultrathin organic films (in most cases, only a monolayer). The site-selective growth, modified crystallization and morphology, and improved device performance of organic semiconductor films are demonstrated with the help of the inducing layers, including patterned and uniform Langmuir-Blodgett monolayers, crystalline ultrathin organic films, and self-assembled polymer brush films. The introduction of the inducing layers could dramatically change the diffusion of the organic semiconductors on the surface and the interactions between the active layer with the inducing layer, leading to improved aggregation/crystallization behavior and device performance.

Semiconductor systems utilizing materials that form rectifying junctions in both N and P-type doping regions, whether metallurgically or field induced, and methods of use

DOEpatents

Welch, James D.

2000-01-01

Disclosed are semiconductor systems, such as integrated circuits utilizing Schotky barrier and/or diffused junction technology, which semiconductor systems incorporate material(s) that form rectifying junctions in both metallurgically and/or field induced N and P-type doping regions, and methods of their use. Disclosed are Schottky barrier based inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems and which can be operated as modulators, N and P-channel MOSFETS and CMOS formed therefrom, and (MOS) gate voltage controlled rectification direction and gate voltage controlled switching devices, and use of such material(s) to block parasitic current flow pathways. Simple demonstrative five mask fabrication procedures for inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems are also presented.

Observation of spontaneous spin-splitting in the band structure of an n-type zinc-blende ferromagnetic semiconductor

PubMed Central

Anh, Le Duc; Hai, Pham Nam; Tanaka, Masaaki

2016-01-01

Large spin-splitting in the conduction band and valence band of ferromagnetic semiconductors, predicted by the influential mean-field Zener model and assumed in many spintronic device proposals, has never been observed in the mainstream p-type Mn-doped ferromagnetic semiconductors. Here, using tunnelling spectroscopy in Esaki-diode structures, we report the observation of such a large spontaneous spin-splitting energy (31.7–50 meV) in the conduction band bottom of n-type ferromagnetic semiconductor (In,Fe)As, which is surprising considering the very weak s-d exchange interaction reported in several zinc-blende type semiconductors. The mean-field Zener model also fails to explain consistently the ferromagnetism and the spin-splitting energy of (In,Fe)As, because we found that the Curie temperature values calculated using the observed spin-splitting energies are much lower than the experimental ones by a factor of 400. These results urge the need for a more sophisticated theory of ferromagnetic semiconductors. PMID:27991502

Probing dynamic behavior of electric fields and band diagrams in complex semiconductor heterostructures

NASA Astrophysics Data System (ADS)

Turkulets, Yury; Shalish, Ilan

2018-01-01

Modern bandgap engineered electronic devices are typically made of multi-semiconductor multi-layer heterostructures that pose a major challenge to silicon-era characterization methods. As a result, contemporary bandgap engineering relies mostly on simulated band structures that are hardly ever verified experimentally. Here, we present a method that experimentally evaluates bandgap, band offsets, and electric fields, in complex multi-semiconductor layered structures, and it does so simultaneously in all the layers. The method uses a modest optical photocurrent spectroscopy setup at ambient conditions. The results are analyzed using a simple model for electro-absorption. As an example, we apply the method to a typical GaN high electron mobility transistor structure. Measurements under various external electric fields allow us to experimentally construct band diagrams, not only at equilibrium but also under any other working conditions of the device. The electric fields are then used to obtain the charge carrier density and mobility in the quantum well as a function of the gate voltage over the entire range of operating conditions of the device. The principles exemplified here may serve as guidelines for the development of methods for simultaneous characterization of all the layers in complex, multi-semiconductor structures.

Photoelectrochemical cell including Ga(Sb.sub.x)N.sub.1-x semiconductor electrode

DOEpatents

Menon, Madhu; Sheetz, Michael; Sunkara, Mahendra Kumar; Pendyala, Chandrashekhar; Sunkara, Swathi; Jasinski, Jacek B.

2017-09-05

The composition of matter comprising Ga(Sb.sub.x)N.sub.1-x where x=0.01 to 0.06 is characterized by a band gap between 2.4 and 1.7 eV. A semiconductor device includes a semiconductor layer of that composition. A photoelectric cell includes that semiconductor device.

Inhomogeneous Oxygen Vacancy Distribution in Semiconductor Gas Sensors: Formation, Migration and Determination on Gas Sensing Characteristics

PubMed Central

Liu, Jianqiao; Gao, Yinglin; Wu, Xu; Jin, Guohua; Zhai, Zhaoxia; Liu, Huan

2017-01-01

The density of oxygen vacancies in semiconductor gas sensors was often assumed to be identical throughout the grain in the numerical discussion of the gas-sensing mechanism of the devices. In contrast, the actual devices had grains with inhomogeneous distribution of oxygen vacancy under non-ideal conditions. This conflict between reality and discussion drove us to study the formation and migration of the oxygen defects in semiconductor grains. A model of the gradient-distributed oxygen vacancy was proposed based on the effects of cooling rate and re-annealing on semiconductive thin films. The model established the diffusion equations of oxygen vacancy according to the defect kinetics of diffusion and exclusion. We described that the steady-state and transient-state oxygen vacancy distributions, which were used to calculate the gas-sensing characteristics of the sensor resistance and response to reducing gases under two different conditions. The gradient-distributed oxygen vacancy model had the applications in simulating the sensor performances, such as the power law, the grain size effect and the effect of depletion layer width. PMID:28796167

Inhomogeneous Oxygen Vacancy Distribution in Semiconductor Gas Sensors: Formation, Migration and Determination on Gas Sensing Characteristics.

PubMed

Liu, Jianqiao; Gao, Yinglin; Wu, Xu; Jin, Guohua; Zhai, Zhaoxia; Liu, Huan

2017-08-10

The density of oxygen vacancies in semiconductor gas sensors was often assumed to be identical throughout the grain in the numerical discussion of the gas-sensing mechanism of the devices. In contrast, the actual devices had grains with inhomogeneous distribution of oxygen vacancy under non-ideal conditions. This conflict between reality and discussion drove us to study the formation and migration of the oxygen defects in semiconductor grains. A model of the gradient-distributed oxygen vacancy was proposed based on the effects of cooling rate and re-annealing on semiconductive thin films. The model established the diffusion equations of oxygen vacancy according to the defect kinetics of diffusion and exclusion. We described that the steady-state and transient-state oxygen vacancy distributions, which were used to calculate the gas-sensing characteristics of the sensor resistance and response to reducing gases under two different conditions. The gradient-distributed oxygen vacancy model had the applications in simulating the sensor performances, such as the power law, the grain size effect and the effect of depletion layer width.

Delay induced high order locking effects in semiconductor lasers.

PubMed

Kelleher, B; Wishon, M J; Locquet, A; Goulding, D; Tykalewicz, B; Huyet, G; Viktorov, E A

2017-11-01

Multiple time scales appear in many nonlinear dynamical systems. Semiconductor lasers, in particular, provide a fertile testing ground for multiple time scale dynamics. For solitary semiconductor lasers, the two fundamental time scales are the cavity repetition rate and the relaxation oscillation frequency which is a characteristic of the field-matter interaction in the cavity. Typically, these two time scales are of very different orders, and mutual resonances do not occur. Optical feedback endows the system with a third time scale: the external cavity repetition rate. This is typically much longer than the device cavity repetition rate and suggests the possibility of resonances with the relaxation oscillations. We show that for lasers with highly damped relaxation oscillations, such resonances can be obtained and lead to spontaneous mode-locking. Two different laser types--a quantum dot based device and a quantum well based device-are analysed experimentally yielding qualitatively identical dynamics. A rate equation model is also employed showing an excellent agreement with the experimental results.

Monolithic integrated high-T.sub.c superconductor-semiconductor structure

NASA Technical Reports Server (NTRS)

Barfknecht, Andrew T. (Inventor); Garcia, Graham A. (Inventor); Russell, Stephen D. (Inventor); Burns, Michael J. (Inventor); de la Houssaye, Paul R. (Inventor); Clayton, Stanley R. (Inventor)

2000-01-01

A method for the fabrication of active semiconductor and high-temperature superconducting device of the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.

A new approximation of Fermi-Dirac integrals of order 1/2 for degenerate semiconductor devices

NASA Astrophysics Data System (ADS)

AlQurashi, Ahmed; Selvakumar, C. R.

2018-06-01

There had been tremendous growth in the field of Integrated circuits (ICs) in the past fifty years. Scaling laws mandated both lateral and vertical dimensions to be reduced and a steady increase in doping densities. Most of the modern semiconductor devices have invariably heavily doped regions where Fermi-Dirac Integrals are required. Several attempts have been devoted to developing analytical approximations for Fermi-Dirac Integrals since numerical computations of Fermi-Dirac Integrals are difficult to use in semiconductor devices, although there are several highly accurate tabulated functions available. Most of these analytical expressions are not sufficiently suitable to be employed in semiconductor device applications due to their poor accuracy, the requirement of complicated calculations, and difficulties in differentiating and integrating. A new approximation has been developed for the Fermi-Dirac integrals of the order 1/2 by using Prony's method and discussed in this paper. The approximation is accurate enough (Mean Absolute Error (MAE) = 0.38%) and easy enough to be used in semiconductor device equations. The new approximation of Fermi-Dirac Integrals is applied to a more generalized Einstein Relation which is an important relation in semiconductor devices.

Uncertain behaviours of integrated circuits improve computational performance.

PubMed

Yoshimura, Chihiro; Yamaoka, Masanao; Hayashi, Masato; Okuyama, Takuya; Aoki, Hidetaka; Kawarabayashi, Ken-ichi; Mizuno, Hiroyuki

2015-11-20

Improvements to the performance of conventional computers have mainly been achieved through semiconductor scaling; however, scaling is reaching its limitations. Natural phenomena, such as quantum superposition and stochastic resonance, have been introduced into new computing paradigms to improve performance beyond these limitations. Here, we explain that the uncertain behaviours of devices due to semiconductor scaling can improve the performance of computers. We prototyped an integrated circuit by performing a ground-state search of the Ising model. The bit errors of memory cell devices holding the current state of search occur probabilistically by inserting fluctuations into dynamic device characteristics, which will be actualised in the future to the chip. As a result, we observed more improvements in solution accuracy than that without fluctuations. Although the uncertain behaviours of devices had been intended to be eliminated in conventional devices, we demonstrate that uncertain behaviours has become the key to improving computational performance.

Mixed-RKDG Finite Element Methods for the 2-D Hydrodynamic Model for Semiconductor Device Simulation

DOE PAGES

Chen, Zhangxin; Cockburn, Bernardo; Jerome, Joseph W.; ...

1995-01-01

In this paper we introduce a new method for numerically solving the equations of the hydrodynamic model for semiconductor devices in two space dimensions. The method combines a standard mixed finite element method, used to obtain directly an approximation to the electric field, with the so-called Runge-Kutta Discontinuous Galerkin (RKDG) method, originally devised for numerically solving multi-dimensional hyperbolic systems of conservation laws, which is applied here to the convective part of the equations. Numerical simulations showing the performance of the new method are displayed, and the results compared with those obtained by using Essentially Nonoscillatory (ENO) finite difference schemes. Frommore » the perspective of device modeling, these methods are robust, since they are capable of encompassing broad parameter ranges, including those for which shock formation is possible. The simulations presented here are for Gallium Arsenide at room temperature, but we have tested them much more generally with considerable success.« less

Total-dose radiation effects data for semiconductor devices, volume 1. [radiation resistance of components for the Galileo Project

NASA Technical Reports Server (NTRS)

Price, W. E.; Martin, K. E.; Nichols, D. K.; Gauthier, M. K.; Brown, S. F.

1981-01-01

Steady-state, total-dose radiation test data are provided in graphic format, for use by electronic designers and other personnel using semiconductor devices in a radiation environment. Data are presented by JPL for various NASA space programs on diodes, bipolar transistors, field effect transistors, silicon-controlled rectifiers, and optical devices. A vendor identification code list is included along with semiconductor device electrical parameter symbols and abbreviations.

Fabrication and performance of pressure-sensing device consisting of electret film and organic semiconductor

NASA Astrophysics Data System (ADS)

Kodzasa, Takehito; Nobeshima, Daiki; Kuribara, Kazunori; Uemura, Sei; Yoshida, Manabu

2017-04-01

We propose a new concept of a pressure-sensitive device that consists of an organic electret film and an organic semiconductor. This device exhibits high sensitivity and selectivity against various types of pressure. The sensing mechanism of this device originates from a modulation of the electric conductivity of the organic semiconductor film induced by the interaction between the semiconductor film and the charged electret film placed face to face. It is expected that a complicated sensor array will be fabricated by using a roll-to-roll manufacturing system, because this device can be prepared by an all-printing and simple lamination process without high-level positional adjustment for printing processes. This also shows that this device with a simple structure is suitable for application to a highly flexible device array sheet for an Internet of Things (IoT) or wearable sensing system.

Semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit [Knoxville, TN

2011-03-15

Novel articles and methods to fabricate the same resulting in flexible, large-area, triaxially textured, single-crystal or single-crystal-like, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Semiconductor-based, large-area, flexible, electronic devices on {110}<100> oriented substrates

DOEpatents

Goyal, Amit

2014-08-05

Novel articles and methods to fabricate the same resulting in flexible, oriented, semiconductor-based, electronic devices on {110}<100> textured substrates are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

[100] or [110] aligned, semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit

2015-03-24

Novel articles and methods to fabricate the same resulting in flexible, large-area, [100] or [110] textured, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Processes for multi-layer devices utilizing layer transfer

DOEpatents

Nielson, Gregory N; Sanchez, Carlos Anthony; Tauke-Pedretti, Anna; Kim, Bongsang; Cederberg, Jeffrey; Okandan, Murat; Cruz-Campa, Jose Luis; Resnick, Paul J

2015-02-03

A method includes forming a release layer over a donor substrate. A plurality of devices made of a first semiconductor material are formed over the release layer. A first dielectric layer is formed over the plurality of devices such that all exposed surfaces of the plurality of devices are covered by the first dielectric layer. The plurality of devices are chemically attached to a receiving device made of a second semiconductor material different than the first semiconductor material, the receiving device having a receiving substrate attached to a surface of the receiving device opposite the plurality of devices. The release layer is etched to release the donor substrate from the plurality of devices. A second dielectric layer is applied over the plurality of devices and the receiving device to mechanically attach the plurality of devices to the receiving device.

Measuring the lateral charge-carrier mobility in metal-insulator-semiconductor capacitors via Kelvin-probe.

PubMed

Milotti, Valeria; Pietsch, Manuel; Strunk, Karl-Philipp; Melzer, Christian

2018-01-01

We report a Kelvin-probe method to investigate the lateral charge-transport properties of semiconductors, most notably the charge-carrier mobility. The method is based on successive charging and discharging of a pre-biased metal-insulator-semiconductor stack by an alternating voltage applied to one edge of a laterally confined semiconductor layer. The charge carriers spreading along the insulator-semiconductor interface are directly measured by a Kelvin-probe, following the time evolution of the surface potential. A model is presented, describing the device response for arbitrary applied biases allowing the extraction of the lateral charge-carrier mobility from experimentally measured surface potentials. The method is tested using the organic semiconductor poly(3-hexylthiophene), and the extracted mobilities are validated through current voltage measurements on respective field-effect transistors. Our widely applicable approach enables robust measurements of the lateral charge-carrier mobility in semiconductors with weak impact from the utilized contact materials.

Measuring the lateral charge-carrier mobility in metal-insulator-semiconductor capacitors via Kelvin-probe

NASA Astrophysics Data System (ADS)

Milotti, Valeria; Pietsch, Manuel; Strunk, Karl-Philipp; Melzer, Christian

2018-01-01

We report a Kelvin-probe method to investigate the lateral charge-transport properties of semiconductors, most notably the charge-carrier mobility. The method is based on successive charging and discharging of a pre-biased metal-insulator-semiconductor stack by an alternating voltage applied to one edge of a laterally confined semiconductor layer. The charge carriers spreading along the insulator-semiconductor interface are directly measured by a Kelvin-probe, following the time evolution of the surface potential. A model is presented, describing the device response for arbitrary applied biases allowing the extraction of the lateral charge-carrier mobility from experimentally measured surface potentials. The method is tested using the organic semiconductor poly(3-hexylthiophene), and the extracted mobilities are validated through current voltage measurements on respective field-effect transistors. Our widely applicable approach enables robust measurements of the lateral charge-carrier mobility in semiconductors with weak impact from the utilized contact materials.

Photovoltaic healing of non-uniformities in semiconductor devices

DOEpatents

Karpov, Victor G.; Roussillon, Yann; Shvydka, Diana; Compaan, Alvin D.; Giolando, Dean M.

2006-08-29

A method of making a photovoltaic device using light energy and a solution to normalize electric potential variations in the device. A semiconductor layer having nonuniformities comprising areas of aberrant electric potential deviating from the electric potential of the top surface of the semiconductor is deposited onto a substrate layer. A solution containing an electrolyte, at least one bonding material, and positive and negative ions is applied over the top surface of the semiconductor. Light energy is applied to generate photovoltage in the semiconductor, causing a redistribution of the ions and the bonding material to the areas of aberrant electric potential. The bonding material selectively bonds to the nonuniformities in a manner such that the electric potential of the nonuniformities is normalized relative to the electric potential of the top surface of the semiconductor layer. A conductive electrode layer is then deposited over the top surface of the semiconductor layer.

Room-temperature ballistic transport in III-nitride heterostructures.

PubMed

Matioli, Elison; Palacios, Tomás

2015-02-11

Room-temperature (RT) ballistic transport of electrons is experimentally observed and theoretically investigated in III-nitrides. This has been largely investigated at low temperatures in low band gap III-V materials due to their high electron mobilities. However, their application to RT ballistic devices is limited by their low optical phonon energies, close to KT at 300 K. In addition, the short electron mean-free-path at RT requires nanoscale devices for which surface effects are a limitation in these materials. We explore the unique properties of wide band-gap III-nitride semiconductors to demonstrate RT ballistic devices. A theoretical model is proposed to corroborate experimentally their optical phonon energy of 92 meV, which is ∼4× larger than in other III-V semiconductors. This allows RT ballistic devices operating at larger voltages and currents. An additional model is described to determine experimentally a characteristic dimension for ballistic transport of 188 nm. Another remarkable property is their short carrier depletion at device sidewalls, down to 13 nm, which allows top-down nanofabrication of very narrow ballistic devices. These results open a wealth of new systems and basic transport studies possible at RT.

{100}<100> or 45.degree.-rotated {100}<100>, semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit [Knoxville, TN

2012-05-15

Novel articles and methods to fabricate the same resulting in flexible, {100}<100> or 45.degree.-rotated {100}<100> oriented, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Dynamic carrier transport modulation for constructing advanced devices with improved performance by piezotronic and piezo-phototronic effects: a brief review

NASA Astrophysics Data System (ADS)

Guo, Zhen; Pan, Haixi; Li, Chuanyu; Zhang, Lili; Yan, Shuai; Zhang, Wei; Yao, Jia; Tang, Yuguo; Yang, Hongbo; Wu, Yihui; Feng, Liping; Zhou, Lianqun

2017-08-01

Carrier generation, transport, separation, and recombination behaviors can be modulated for improving the performance of semiconductor devices by using piezotronic and piezo-phototronic effects with creating piezopotential in crystals based on non-centrosymmetric semiconductor materials such as group II-VI and III-V semiconductors and transition metal dichalcogenides (TMDCs), which have emerged as attractive materials for electronic/photonic applications because of their novel properties. Until now, much effort has been devoted to improving the performance of devices based on the aforementioned materials through modulation of the carrier behavior. However, due to existing drawbacks, it has been difficult to further enhance the device performance for a built structure. However, effective exploration of the piezotronic and piezo-phototronic effects in these semiconducting materials could pave the way to the realization of high-performance devices. In general, the effective modulation of carrier behavior dynamically in devices such as light-emitting diodes, photodetectors, solar cells, nanogenerators, and so on, remains a key challenge. Due to the polarization of ions in semiconductor materials with noncentral symmetry under external strain, a piezopotential is created considering piezotronic and piezo-photoronic effects, which could dynamically modulate charge carrier transport behaviors across p-n junctions or metal-semiconductor interfaces. Through a combination of these effects and semiconductor properties, the performance of the related devices could be improved and new types of devices such as piezoelectric field-effect transistors and sensors have emerged, with potential applications in self-driven devices for effective energy harvesting and biosensing with high sensitivity, which are different from those traditionally designed and may have potential applications in strained triggered devices. The objective of this review is to briefly introduce the corresponding mechanisms for modulating carrier behavior on the basis of piezotronic and piezo-phototronic effects in materials such as group II-VI and group III-V semiconductors and TMDCs, as well as to discuss possible solutions to effectively enhance the performance of the devices via carrier modulation.

Solid state photosensitive devices which employ isolated photosynthetic complexes

DOEpatents

Peumans, Peter; Forrest, Stephen R.

2009-09-22

Solid state photosensitive devices including photovoltaic devices are provided which comprise a first electrode and a second electrode in superposed relation; and at least one isolated Light Harvesting Complex (LHC) between the electrodes. Preferred photosensitive devices comprise an electron transport layer formed of a first photoconductive organic semiconductor material, adjacent to the LHC, disposed between the first electrode and the LHC; and a hole transport layer formed of a second photoconductive organic semiconductor material, adjacent to the LHC, disposed between the second electrode and the LHC. Solid state photosensitive devices of the present invention may comprise at least one additional layer of photoconductive organic semiconductor material disposed between the first electrode and the electron transport layer; and at least one additional layer of photoconductive organic semiconductor material, disposed between the second electrode and the hole transport layer. Methods of generating photocurrent are provided which comprise exposing a photovoltaic device of the present invention to light. Electronic devices are provided which comprise a solid state photosensitive device of the present invention.

Method for making a monolithic integrated high-T.sub.c superconductor-semiconductor structure

NASA Technical Reports Server (NTRS)

Burns, Michael J. (Inventor); de la Houssaye, Paul R. (Inventor); Russell, Stephen D. (Inventor); Garcia, Graham A. (Inventor); Barfknecht, Andrew T. (Inventor); Clayton, Stanley R. (Inventor)

2000-01-01

A method for the fabrication of active semiconductor and high-temperature perconducting devices on the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.

Tapered rib fiber coupler for semiconductor optical devices

DOEpatents

Vawter, Gregory A.; Smith, Robert Edward

2001-01-01

A monolithic tapered rib waveguide for transformation of the spot size of light between a semiconductor optical device and an optical fiber or from the fiber into the optical device. The tapered rib waveguide is integrated into the guiding rib atop a cutoff mesa type semiconductor device such as an expanded mode optical modulator or and expanded mode laser. The tapered rib acts to force the guided light down into the mesa structure of the semiconductor optical device instead of being bound to the interface between the bottom of the guiding rib and the top of the cutoff mesa. The single mode light leaving or entering the output face of the mesa structure then can couple to the optical fiber at coupling losses of 1.0 dB or less.

Silicon superlattices: Theory and application to semiconductor devices

NASA Technical Reports Server (NTRS)

Moriarty, J. A.

1981-01-01

Silicon superlattices and their applicability to improved semiconductor devices were studied. The device application potential of the atomic like dimension of III-V semiconductor superlattices fabricated in the form of ultrathin periodically layered heterostructures was examined. Whether this leads to quantum size effects and creates the possibility to alter familiar transport and optical properties over broad physical ranges was studied. Applications to improved semiconductor lasers and electrondevices were achieved. Possible application of silicon sperlattices to faster high speed computing devices was examined. It was found that the silicon lattices show features of smaller fundamental energyband gaps and reduced effective masses. The effects correlate strongly with both the chemical and geometrical nature of the superlattice.

Semiconductor structures having electrically insulating and conducting portions formed from an AlSb-alloy layer

DOEpatents

Spahn, Olga B.; Lear, Kevin L.

1998-01-01

A semiconductor structure. The semiconductor structure comprises a plurality of semiconductor layers formed on a substrate including at least one layer of a III-V compound semiconductor alloy comprising aluminum (Al) and antimony (Sb), with at least a part of the AlSb-alloy layer being chemically converted by an oxidation process to form superposed electrically insulating and electrically conducting portions. The electrically insulating portion formed from the AlSb-alloy layer comprises an oxide of aluminum (e.g. Al.sub.2 O.sub.3), while the electrically conducting portion comprises Sb. A lateral oxidation process allows formation of the superposed insulating and conducting portions below monocrystalline semiconductor layers for forming many different types of semiconductor structures having particular utility for optoelectronic devices such as light-emitting diodes, edge-emitting lasers, vertical-cavity surface-emitting lasers, photodetectors and optical modulators (waveguide and surface normal), and for electronic devices such as heterojunction bipolar transistors, field-effect transistors and quantum-effect devices. The invention is expected to be particularly useful for forming light-emitting devices for use in the 1.3-1.6 .mu.m wavelength range, with the AlSb-alloy layer acting to define an active region of the device and to effectively channel an electrical current therein for efficient light generation.

Three-dimensional charge transport in organic semiconductor single crystals.

PubMed

He, Tao; Zhang, Xiying; Jia, Jiong; Li, Yexin; Tao, Xutang

2012-04-24

Three-dimensional charge transport anisotropy in organic semiconductor single crystals - both plates and rods (above and below, respectively, in the figure) - is measured in well-performing organic field-effect transistors for the first time. The results provide an excellent model for molecular design and device preparation that leads to good performance. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Evolution of corundum-structured III-oxide semiconductors: Growth, properties, and devices

NASA Astrophysics Data System (ADS)

Fujita, Shizuo; Oda, Masaya; Kaneko, Kentaro; Hitora, Toshimi

2016-12-01

The recent progress and development of corundum-structured III-oxide semiconductors are reviewed. They allow bandgap engineering from 3.7 to ∼9 eV and function engineering, leading to highly durable electronic devices and deep ultraviolet optical devices as well as multifunctional devices. Mist chemical vapor deposition can be a simple and safe growth technology and is advantageous for reducing energy and cost for the growth. This is favorable for the wide commercial use of devices at low cost. The III-oxide semiconductors are promising candidates for new devices contributing to sustainable social, economic, and technological development for the future.

Epitaxial Growth of Cubic Crystalline Semiconductor Alloys on Basal Plane of Trigonal or Hexagonal Crystal

NASA Technical Reports Server (NTRS)

Park, Yeonjoon (Inventor); Choi, Sang H. (Inventor); King, Glen C. (Inventor)

2011-01-01

Hetero-epitaxial semiconductor materials comprising cubic crystalline semiconductor alloys grown on the basal plane of trigonal and hexagonal substrates, in which misfit dislocations are reduced by approximate lattice matching of the cubic crystal structure to underlying trigonal or hexagonal substrate structure, enabling the development of alloyed semiconductor layers of greater thickness, resulting in a new class of semiconductor materials and corresponding devices, including improved hetero-bipolar and high-electron mobility transistors, and high-mobility thermoelectric devices.

Interconnected semiconductor devices

DOEpatents

Grimmer, Derrick P.; Paulson, Kenneth R.; Gilbert, James R.

1990-10-23

Semiconductor layer and conductive layer formed on a flexible substrate, divided into individual devices and interconnected with one another in series by interconnection layers and penetrating terminals.

Extremely high frequency RF effects on electronics.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Loubriel, Guillermo Manuel; Vigliano, David; Coleman, Phillip Dale

The objective of this work was to understand the fundamental physics of extremely high frequency RF effects on electronics. To accomplish this objective, we produced models, conducted simulations, and performed measurements to identify the mechanisms of effects as frequency increases into the millimeter-wave regime. Our purpose was to answer the questions, 'What are the tradeoffs between coupling, transmission losses, and device responses as frequency increases?', and, 'How high in frequency do effects on electronic systems continue to occur?' Using full wave electromagnetics codes and a transmission-line/circuit code, we investigated how extremely high-frequency RF propagates on wires and printed circuit boardmore » traces. We investigated both field-to-wire coupling and direct illumination of printed circuit boards to determine the significant mechanisms for inducing currents at device terminals. We measured coupling to wires and attenuation along wires for comparison to the simulations, looking at plane-wave coupling as it launches modes onto single and multiconductor structures. We simulated the response of discrete and integrated circuit semiconductor devices to those high-frequency currents and voltages, using SGFramework, the open-source General-purpose Semiconductor Simulator (gss), and Sandia's Charon semiconductor device physics codes. This report documents our findings.« less

Mesoscopic Elastic Distortions in GaAs Quantum Dot Heterostructures.

PubMed

Pateras, Anastasios; Park, Joonkyu; Ahn, Youngjun; Tilka, Jack A; Holt, Martin V; Reichl, Christian; Wegscheider, Werner; Baart, Timothy A; Dehollain, Juan Pablo; Mukhopadhyay, Uditendu; Vandersypen, Lieven M K; Evans, Paul G

2018-05-09

Quantum devices formed in high-electron-mobility semiconductor heterostructures provide a route through which quantum mechanical effects can be exploited on length scales accessible to lithography and integrated electronics. The electrostatic definition of quantum dots in semiconductor heterostructure devices intrinsically involves the lithographic fabrication of intricate patterns of metallic electrodes. The formation of metal/semiconductor interfaces, growth processes associated with polycrystalline metallic layers, and differential thermal expansion produce elastic distortion in the active areas of quantum devices. Understanding and controlling these distortions present a significant challenge in quantum device development. We report synchrotron X-ray nanodiffraction measurements combined with dynamical X-ray diffraction modeling that reveal lattice tilts with a depth-averaged value up to 0.04° and strain on the order of 10 -4 in the two-dimensional electron gas (2DEG) in a GaAs/AlGaAs heterostructure. Elastic distortions in GaAs/AlGaAs heterostructures modify the potential energy landscape in the 2DEG due to the generation of a deformation potential and an electric field through the piezoelectric effect. The stress induced by metal electrodes directly impacts the ability to control the positions of the potential minima where quantum dots form and the coupling between neighboring quantum dots.

Structural defects in cubic semiconductors characterized by aberration-corrected scanning transmission electron microscopy.

PubMed

Arroyo Rojas Dasilva, Yadira; Kozak, Roksolana; Erni, Rolf; Rossell, Marta D

2017-05-01

The development of new electro-optical devices and the realization of novel types of transistors require a profound understanding of the structural characteristics of new semiconductor heterostructures. This article provides a concise review about structural defects which occur in semiconductor heterostructures on the basis of micro-patterned Si substrates. In particular, one- and two-dimensional crystal defects are being discussed which are due to the plastic relaxation of epitaxial strain caused by the misfit of crystal lattices. Besides a few selected examples from literature, we treat in particular crystal defects occurring in GaAs/Si, Ge/Si and β-SiC/Si structures which are studied by high-resolution annular dark-field scanning transmission electron microscopy. The relevance of this article is twofold; firstly, it should provide a collection of data which are of help for the identification and characterization of defects in cubic semiconductors by means of atomic-resolution imaging, and secondly, the experimental data shall provide a basis for advancing the understanding of device characteristics with the aid of theoretical modelling by considering the defective nature of strained semiconductor heterostructures. Copyright © 2016 Elsevier B.V. All rights reserved.

Room-temperature semiconductor heterostructure refrigeration

NASA Astrophysics Data System (ADS)

Chao, K. A.; Larsson, Magnus; Mal'shukov, A. G.

2005-07-01

With the proper design of semiconductor tunneling barrier structures, we can inject low-energy electrons via resonant tunneling, and take out high-energy electrons via a thermionic process. This is the operation principle of our semiconductor heterostructure refrigerator (SHR) without the need of applying a temperature gradient across the device. Even for the bad thermoelectric material AlGaAs, our calculation shows that at room temperature, the SHR can easily lower the temperature by 5-7K. Such devices can be fabricated with the present semiconductor technology. Besides its use as a kitchen refrigerator, the SHR can efficiently cool microelectronic devices.

Biasing, operation and parasitic current limitation in single device equivalent to CMOS, and other semiconductor systems

DOEpatents

Welch, James D.

2003-09-23

Disclosed are semiconductor devices including at least one junction which is rectifying whether the semiconductor is caused to be N or P-type, by the presence of applied gate voltage field induced carriers in essentially intrinsic, essentially homogeneously simultaneously containing both N and P-type metallurgical dopants at substantially equal doping levels, essentially homogeneously simultaneously containing both N and P-type metallurgical dopants at different doping levels, and containing a single metallurgical doping type, and functional combinations thereof. In particular, inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to conventional multiple device CMOS systems, which can be operated as modulators, are disclosed as are a non-latching SCR and an approach to blocking parasitic currents utilizing material(s) which form rectifying junctions with both N and P-type semiconductor whether metallurigically or field induced.

A Thermal and Electrical Analysis of Power Semiconductor Devices

NASA Technical Reports Server (NTRS)

Vafai, Kambiz

1997-01-01

The state-of-art power semiconductor devices require a thorough understanding of the thermal behavior for these devices. Traditional thermal analysis have (1) failed to account for the thermo-electrical interaction which is significant for power semiconductor devices operating at high temperature, and (2) failed to account for the thermal interactions among all the levels involved in, from the entire device to the gate micro-structure. Furthermore there is a lack of quantitative studies of the thermal breakdown phenomenon which is one of the major failure mechanisms for power electronics. This research work is directed towards addressing. Using a coupled thermal and electrical simulation, in which the drift-diffusion equations for the semiconductor and the energy equation for temperature are solved simultaneously, the thermo-electrical interactions at the micron scale of various junction structures are thoroughly investigated. The optimization of gate structure designs and doping designs is then addressed. An iterative numerical procedure which incorporates the thermal analysis at the device, chip and junction levels of the power device is proposed for the first time and utilized in a BJT power semiconductor device. In this procedure, interactions of different levels are fully considered. The thermal stability issue is studied both analytically and numerically in this research work in order to understand the mechanism for thermal breakdown.

P and n-type microcrystalline semiconductor alloy material including band gap widening elements, devices utilizing same

DOEpatents

Guha, Subhendu; Ovshinsky, Stanford R.

1988-10-04

An n-type microcrystalline semiconductor alloy material including a band gap widening element; a method of fabricating p-type microcrystalline semiconductor alloy material including a band gap widening element; and electronic and photovoltaic devices incorporating said n-type and p-type materials.

neutron-Induced Failures in semiconductor Devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wender, Stephen Arthur

2017-03-13

Single Event Effects are a very significant failure mode in modern semiconductor devices that may limit their reliability. Accelerated testing is important for semiconductor industry. Considerable more work is needed in this field to mitigate the problem. Mitigation of this problem will probably come from Physicists and Electrical Engineers working together

77 FR 25747 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Institution of...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-05-01

... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-840] Certain Semiconductor Integrated Circuit... States after importation of certain semiconductor integrated circuit devices and products containing same... No. 6,847,904 (``the '904 patent''). The complaint further alleges that an industry in the United...

Rainflow Algorithm-Based Lifetime Estimation of Power Semiconductors in Utility Applications

DOE Office of Scientific and Technical Information (OSTI.GOV)

GopiReddy, Lakshmi Reddy; Tolbert, Leon M.; Ozpineci, Burak

Rainflow algorithms are one of the popular counting methods used in fatigue and failure analysis in conjunction with semiconductor lifetime estimation models. However, the rain-flow algorithm used in power semiconductor reliability does not consider the time-dependent mean temperature calculation. The equivalent temperature calculation proposed by Nagode et al. is applied to semiconductor lifetime estimation in this paper. A month-long arc furnace load profile is used as a test profile to estimate temperatures in insulated-gate bipolar transistors (IGBTs) in a STATCOM for reactive compensation of load. In conclusion, the degradation in the life of the IGBT power device is predicted basedmore » on time-dependent temperature calculation.« less

Rainflow Algorithm-Based Lifetime Estimation of Power Semiconductors in Utility Applications

DOE PAGES

GopiReddy, Lakshmi Reddy; Tolbert, Leon M.; Ozpineci, Burak; ...

2015-07-15

Rainflow algorithms are one of the popular counting methods used in fatigue and failure analysis in conjunction with semiconductor lifetime estimation models. However, the rain-flow algorithm used in power semiconductor reliability does not consider the time-dependent mean temperature calculation. The equivalent temperature calculation proposed by Nagode et al. is applied to semiconductor lifetime estimation in this paper. A month-long arc furnace load profile is used as a test profile to estimate temperatures in insulated-gate bipolar transistors (IGBTs) in a STATCOM for reactive compensation of load. In conclusion, the degradation in the life of the IGBT power device is predicted basedmore » on time-dependent temperature calculation.« less

Ferroelectric switching of poly(vinylidene difluoride-trifluoroethylene) in metal-ferroelectric-semiconductor non-volatile memories with an amorphous oxide semiconductor

NASA Astrophysics Data System (ADS)

Gelinck, G. H.; van Breemen, A. J. J. M.; Cobb, B.

2015-03-01

Ferroelectric polarization switching of poly(vinylidene difluoride-trifluoroethylene) is investigated in different thin-film device structures, ranging from simple capacitors to dual-gate thin-film transistors (TFT). Indium gallium zinc oxide, a high mobility amorphous oxide material, is used as semiconductor. We find that the ferroelectric can be polarized in both directions in the metal-ferroelectric-semiconductor (MFS) structure and in the dual-gate TFT under certain biasing conditions, but not in the single-gate thin-film transistors. These results disprove the common belief that MFS structures serve as a good model system for ferroelectric polarization switching in thin-film transistors.

An X-Band SOS Resistive Gate-Insulator-Semiconductor /RIS/ switch

NASA Astrophysics Data System (ADS)

Kwok, S. P.

1980-02-01

The new X-Band Resistive Gate-Insulator-Semiconductor (RIS) switch has been fabricated on silicon-on-sapphire, and its equivalent circuit model characterized. An RIS SPST switch with 20-dB on/off isolation, 1.2-dB insertion loss, and power handling capacity in excess of 20-W peak has been achieved at X band. The device switching time is on the order of 600 ns, and it requires negligible control holding current in both on and off states. The device is compatible with monolithic integrated-circuit technology and thus is suitable for integration into low-cost monolithic phase shifters or other microwave integrated circuits.

Electric field induced spin-polarized current

DOEpatents

Murakami, Shuichi; Nagaosa, Naoto; Zhang, Shoucheng

2006-05-02

A device and a method for generating an electric-field-induced spin current are disclosed. A highly spin-polarized electric current is generated using a semiconductor structure and an applied electric field across the semiconductor structure. The semiconductor structure can be a hole-doped semiconductor having finite or zero bandgap or an undoped semiconductor of zero bandgap. In one embodiment, a device for injecting spin-polarized current into a current output terminal includes a semiconductor structure including first and second electrodes, along a first axis, receiving an applied electric field and a third electrode, along a direction perpendicular to the first axis, providing the spin-polarized current. The semiconductor structure includes a semiconductor material whose spin orbit coupling energy is greater than room temperature (300 Kelvin) times the Boltzmann constant. In one embodiment, the semiconductor structure is a hole-doped semiconductor structure, such as a p-type GaAs semiconductor layer.

Liquid crystal cells with built-in CdSe nanotubes for chromogenic smart emission devices.

PubMed

Lin, Tsung Ju; Chen, Chin-Chang; Cheng, Soofin; Chen, Yang Fang

2008-01-21

A simple and general approach for controlling optical anisotropy of nanostructured semiconductors is reported. Our design involves the fabrication of liquid crystal devices with built-in semiconductor nanotubes. Quite interestingly, it is found that semiconductor nanotubes can be well aligned along the orientation of liquid crystals molecules automatically, resulting in a very large emission anisotropy with the degree of polarization up to 72%. This intriguing result manifests a way to obtain well aligned semiconductor nanotubes and the emission anisotropy can be easily manipulated by an external bias. The ability to well control the emission anisotropy should open up new opportunities for nanostructured semiconductors, including optical filters, polarized light emitting diodes, flat panel displays, and many other chromogenic smart devices.

Semiconductor with protective surface coating and method of manufacture thereof. [Patent application

DOEpatents

Hansen, W.L.; Haller, E.E.

1980-09-19

Passivation of predominantly crystalline semiconductor devices is provided for by a surface coating of sputtered hydrogenated amorphous semiconductor material. Passivation of a radiation detector germanium diode, for example, is realized by sputtering a coating of amorphous germanium onto the etched and quenched diode surface in a low pressure atmosphere of hydrogen and argon. Unlike prior germanium diode semiconductor devices, which must be maintained in vacuum at cryogenic temperatures to avoid deterioration, a diode processed in the described manner may be stored in air at room temperature or otherwise exposed to a variety of environmental conditions. The coating compensates for pre-existing undesirable surface states as well as protecting the semiconductor device against future impregnation with impurities.

Ferrite film growth on semiconductor substrates towards microwave and millimeter wave integrated circuits

NASA Astrophysics Data System (ADS)

Chen, Z.; Harris, V. G.

2012-10-01

It is widely recognized that as electronic systems' operating frequency shifts to microwave and millimeter wave bands, the integration of ferrite passive devices with semiconductor solid state active devices holds significant advantages in improved miniaturization, bandwidth, speed, power and production costs, among others. Traditionally, ferrites have been employed in discrete bulk form, despite attempts to integrate ferrite as films within microwave integrated circuits. Technical barriers remain centric to the incompatibility between ferrite and semiconductor materials and their processing protocols. In this review, we present past and present efforts at ferrite integration with semiconductor platforms with the aim to identify the most promising paths to realizing the complete integration of on-chip ferrite and semiconductor devices, assemblies and systems.

Growth of coincident site lattice matched semiconductor layers and devices on crystalline substrates

DOEpatents

Norman, Andrew G; Ptak, Aaron J

2013-08-13

Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a substrate having a crystalline surface with a known lattice parameter (a). The method further includes growing a crystalline semiconductor layer on the crystalline substrate surface by coincident site lattice matched epitaxy, without any buffer layer between the crystalline semiconductor layer and the crystalline surface of the substrate. The crystalline semiconductor layer will be prepared to have a lattice parameter (a') that is related to the substrate lattice parameter (a). The lattice parameter (a') maybe related to the lattice parameter (a) by a scaling factor derived from a geometric relationship between the respective crystal lattices.

Design and fabrication of 6.1-.ANG. family semiconductor devices using semi-insulating A1Sb substrate

DOEpatents

Sherohman, John W [Livermore, CA; Coombs, III, Arthur W.; Yee, Jick Hong [Livermore, CA; Wu, Kuang Jen J [Cupertino, CA

2007-05-29

For the first time, an aluminum antimonide (AlSb) single crystal substrate is utilized to lattice-match to overlying semiconductor layers. The AlSb substrate establishes a new design and fabrication approach to construct high-speed, low-power electronic devices while establishing inter-device isolation. Such lattice matching between the substrate and overlying semiconductor layers minimizes the formation of defects, such as threaded dislocations, which can decrease the production yield and operational life-time of 6.1-.ANG. family heterostructure devices.

Hybrid Molecular and Spin-Semiconductor Based Research

DTIC Science & Technology

2005-02-02

thick layers of low- temperature-grown (LTG) GaAs, i.e. GaAs grown at lower than normal substrate temperatures in a molecular beam epitaxy system...1999 – Oct.31, 2004 4. TITLE AND SUBTITLE Hybrid Molecular and Spin-Semiconductor Based research 5. FUNDING NUMBERS DAAD19-99-1-0198...spintronic devices. Thrust III is entitled “ Molecular Electronics” and its objective is to develop, characterize and model organic/inorganic

Prospects and fundamental limitations of room temperature, non-avalanche, semiconductor photon-counting sensors (Conference Presentation)

NASA Astrophysics Data System (ADS)

Ma, Jiaju; Zhang, Yang; Wang, Xiaoxin; Ying, Lei; Masoodian, Saleh; Wang, Zhiyuan; Starkey, Dakota A.; Deng, Wei; Kumar, Rahul; Wu, Yang; Ghetmiri, Seyed Amir; Yu, Zongfu; Yu, Shui-Qing; Salamo, Gregory J.; Fossum, Eric R.; Liu, Jifeng

2017-05-01

This research investigates the fundamental limits and trade-space of quantum semiconductor photodetectors using the Schrödinger equation and the laws of thermodynamics.We envision that, to optimize the metrics of single photon detection, it is critical to maximize the optical absorption in the minimal volume and minimize the carrier transit process simultaneously. Integration of photon management with quantum charge transport/redistribution upon optical excitation can be engineered to maximize the quantum efficiency (QE) and data rate and minimize timing jitter at the same time. Due to the ultra-low capacitance of these quantum devices, even a single photoelectron transfer can induce a notable change in the voltage, enabling non-avalanche single photon detection at room temperature as has been recently demonstrated in Si quanta image sensors (QIS). In this research, uniform III-V quantum dots (QDs) and Si QIS are used as model systems to test the theory experimentally. Based on the fundamental understanding, we also propose proof-of-concept, photon-managed quantum capacitance photodetectors. Built upon the concepts of QIS and single electron transistor (SET), this novel device structure provides a model system to synergistically test the fundamental limits and tradespace predicted by the theory for semiconductor detectors. This project is sponsored under DARPA/ARO's DETECT Program: Fundamental Limits of Quantum Semiconductor Photodetectors.

Architectures for Improved Organic Semiconductor Devices

NASA Astrophysics Data System (ADS)

Beck, Jonathan H.

Advancements in the microelectronics industry have brought increasing performance and decreasing prices to a wide range of users. Conventional silicon-based electronics have followed Moore's law to provide an ever-increasing integrated circuit transistor density, which drives processing power, solid-state memory density, and sensor technologies. As shrinking conventional integrated circuits became more challenging, researchers began exploring electronics with the potential to penetrate new applications with a low price of entry: "Electronics everywhere." The new generation of electronics is thin, light, flexible, and inexpensive. Organic electronics are part of the new generation of thin-film electronics, relying on the synthetic flexibility of carbon molecules to create organic semiconductors, absorbers, and emitters which perform useful tasks. Organic electronics can be fabricated with low energy input on a variety of novel substrates, including inexpensive plastic sheets. The potential ease of synthesis and fabrication of organic-based devices means that organic electronics can be made at very low cost. Successfully demonstrated organic semiconductor devices include photovoltaics, photodetectors, transistors, and light emitting diodes. Several challenges that face organic semiconductor devices are low performance relative to conventional devices, long-term device stability, and development of new organic-compatible processes and materials. While the absorption and emission performance of organic materials in photovoltaics and light emitting diodes is extraordinarily high for thin films, the charge conduction mobilities are generally low. Building highly efficient devices with low-mobility materials is one challenge. Many organic semiconductor films are unstable during fabrication, storage, and operation due to reactions with water, oxygen and hydroxide. A final challenge facing organic electronics is the need for new processes and materials for electrodes, semiconductors and substrates compatible with low-temperature, flexible, and oxygenated and aromatic solvent-free fabrication. Materials and processes must be capable of future high volume production in order to enable low costs. In this thesis we explore several techniques to improve organic semiconductor device performance and enable new fabrication processes. In Chapter 2, I describe the integration of sub-optical-wavelength nanostructured electrodes that improve fill factor and power conversion efficiency in organic photovoltaic devices. Photovoltaic fill factor performance is one of the primary challenges facing organic photovoltaics because most organic semiconductors have poor charge mobility. Our electrical and optical measurements and simulations indicate that nanostructured electrodes improve charge extraction in organic photovoltaics. In Chapter 3, I describe a general method for maximizing the efficiency of organic photovoltaic devices by simultaneously optimizing light absorption and charge carrier collection. We analyze the potential benefits of light trapping strategies for maximizing the overall power conversion efficiency of organic photovoltaic devices. This technique may be used to improve organic photovoltaic materials with low absorption, or short exciton diffusion and carrier-recombination lengths, opening up the device design space. In Chapter 4, I describe a process for high-quality graphene transfer onto chemically sensitive, weakly interacting organic semiconductor thin-films. Graphene is a promising flexible and highly transparent electrode for organic electronics; however, transferring graphene films onto organic semiconductor devices was previously impossible. We demonstrate a new transfer technique based on an elastomeric stamp coated with an fluorinated polymer release layer. We fabricate three classes of organic semiconductor devices: field effect transistors without high temperature annealing, transparent organic light-emitting diodes, and transparent small-molecule organic photovoltaic devices.

Memory effects in a Al/Ti:HfO2/CuPc metal-oxide-semiconductor device

NASA Astrophysics Data System (ADS)

Tripathi, Udbhav; Kaur, Ramneek

2016-05-01

Metal oxide semiconductor structured organic memory device has been successfully fabricated. Ti doped hafnium oxide (Ti:HfO2) nanoparticles has been fabricated by precipitation method and further calcinated at 800 °C. Copper phthalocyanine, a hole transporting material has been utilized as an organic semiconductor. The electrical properties of the fabricated device have been studied by measuring the current-voltage and capacitance-voltage characteristics. The amount of charge stored in the nanoparticles has been calculated by using flat band condition. This simple approach for fabricating MOS memory device has opens up opportunities for the development of next generation memory devices.

Porous silicon carbide (SiC) semiconductor device

NASA Technical Reports Server (NTRS)

Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)

1994-01-01

A semiconductor device employs at least one layer of semiconducting porous silicon carbide (SiC). The porous SiC layer has a monocrystalline structure wherein the pore sizes, shapes, and spacing are determined by the processing conditions. In one embodiment, the semiconductor device is a p-n junction diode in which a layer of n-type SiC is positioned on a p-type layer of SiC, with the p-type layer positioned on a layer of silicon dioxide. Because of the UV luminescent properties of the semiconducting porous SiC layer, it may also be utilized for other devices such as LEDs and optoelectronic devices.

Organic semiconductor density of states controls the energy level alignment at electrode interfaces

PubMed Central

Oehzelt, Martin; Koch, Norbert; Heimel, Georg

2014-01-01

Minimizing charge carrier injection barriers and extraction losses at interfaces between organic semiconductors and metallic electrodes is critical for optimizing the performance of organic (opto-) electronic devices. Here, we implement a detailed electrostatic model, capable of reproducing the alignment between the electrode Fermi energy and the transport states in the organic semiconductor both qualitatively and quantitatively. Covering the full phenomenological range of interfacial energy level alignment regimes within a single, consistent framework and continuously connecting the limiting cases described by previously proposed models allows us to resolve conflicting views in the literature. Our results highlight the density of states in the organic semiconductor as a key factor. Its shape and, in particular, the energy distribution of electronic states tailing into the fundamental gap is found to determine both the minimum value of practically achievable injection barriers as well as their spatial profile, ranging from abrupt interface dipoles to extended band-bending regions. PMID:24938867

Plasma Processes for Semiconductor Fabrication

NASA Astrophysics Data System (ADS)

Hitchon, W. N. G.

1999-01-01

Plasma processing is a central technique in the fabrication of semiconductor devices. This self-contained book provides an up-to-date description of plasma etching and deposition in semiconductor fabrication. It presents the basic physics and chemistry of these processes, and shows how they can be accurately modeled. The author begins with an overview of plasma reactors and discusses the various models for understanding plasma processes. He then covers plasma chemistry, addressing the effects of different chemicals on the features being etched. Having presented the relevant background material, he then describes in detail the modeling of complex plasma systems, with reference to experimental results. The book closes with a useful glossary of technical terms. No prior knowledge of plasma physics is assumed in the book. It contains many homework exercises and serves as an ideal introduction to plasma processing and technology for graduate students of electrical engineering and materials science. It will also be a useful reference for practicing engineers in the semiconductor industry.

Over-voltage protection system and method

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chi, Song; Dong, Dong; Lai, Rixin

An over-voltage protection system includes an electronic valve connected across two terminals of a circuit and an over-voltage detection circuit connected across one of the plurality of semiconductor devices for detecting an over-voltage across the circuit. The electronic valve includes a plurality of semiconductor devices connected in series. The over-voltage detection circuit includes a voltage divider circuit connected to a break-over diode in a way to provide a representative low voltage to the break-over diode and an optocoupler configured to receive a current from the break-over diode when the representative low voltage exceeds a threshold voltage of the break-over diodemore » indicating an over-voltage condition. The representative low voltage provided to the break-over diode represents a voltage across the one semiconductor device. A plurality of self-powered gate drive circuits are connected to the plurality of semiconductor devices, wherein the plurality of self-powered gate drive circuits receive over-voltage triggering pulses from the optocoupler during the over-voltage condition and switch on the plurality of semiconductor devices to bypass the circuit.« less

The preparation method of terahertz monolithic integrated device

NASA Astrophysics Data System (ADS)

Zhang, Cong; Su, Bo; He, Jingsuo; Zhang, Hongfei; Wu, Yaxiong; Zhang, Shengbo; Zhang, Cunlin

2018-01-01

The terahertz monolithic integrated device is to integrate the pumping area of the terahertz generation, the detection area of the terahertz receiving and the metal waveguide of terahertz transmission on the same substrate. The terahertz generation and detection device use a photoconductive antenna structure the metal waveguide use a microstrip line structure. The evanescent terahertz-bandwidth electric field extending above the terahertz transmission line interacts with, and is modified by, overlaid dielectric samples, thus enabling the characteristic vibrational absorption resonances in the sample to be probed. In this device structure, since the semiconductor substrate of the photoconductive antenna is located between the strip conductor and the dielectric layer of the microstrip line, and the semiconductor substrate cannot grow on the dielectric layer directly. So how to prepare the semiconductor substrate of the photoconductive antenna and how to bond the semiconductor substrate to the dielectric layer of the microstrip line is a key step in the terahertz monolithic integrated device. In order to solve this critical problem, the epitaxial wafer structure of the two semiconductor substrates is given and transferred to the desired substrate by two methods, respectively.

Interconnect assembly for an electronic assembly and assembly method therefor

DOEpatents

Gerbsch, Erich William

2003-06-10

An interconnect assembly and method for a semiconductor device, in which the interconnect assembly can be used in lieu of wirebond connections to form an electronic assembly. The interconnect assembly includes first and second interconnect members. The first interconnect member has a first surface with a first contact and a second surface with a second contact electrically connected to the first contact, while the second interconnect member has a flexible finger contacting the second contact of the first interconnect member. The first interconnect member is adapted to be aligned and registered with a semiconductor device having a contact on a first surface thereof, so that the first contact of the first interconnect member electrically contacts the contact of the semiconductor device. Consequently, the assembly method does not require any wirebonds, but instead merely entails aligning and registering the first interconnect member with the semiconductor device so that the contacts of the first interconnect member and the semiconductor device make electrically contact, and then contacting the second contact of the first interconnect member with the flexible finger of the second interconnect member.

Semiconductor technology program. Progress briefs

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1979-01-01

The current status of NBS work on measurement technology for semiconductor materials, process control, and devices is reported. Results of both in-house and contract research are covered. Highlighted activities include modeling of diffusion processes, analysis of model spreading resistance data, and studies of resonance ionization spectroscopy, resistivity-dopant density relationships in p-type silicon, deep level measurements, photoresist sensitometry, random fault measurements, power MOSFET thermal characteristics, power transistor switching characteristics, and gross leak testing. New and selected on-going projects are described. Compilations of recent publications and publications in press are included.

Electrically driven deep ultraviolet MgZnO lasers at room temperature

DOE Office of Scientific and Technical Information (OSTI.GOV)

Suja, Mohammad; Bashar, Sunayna Binte; Debnath, Bishwajit

Semiconductor lasers in the deep ultraviolet (UV) range have numerous potential applications ranging from water purification and medical diagnosis to high-density data storage and flexible displays. Nevertheless, very little success was achieved in the realization of electrically driven deep UV semiconductor lasers to date. Here, we report the fabrication and characterization of deep UV MgZnO semiconductor lasers. These lasers are operated with continuous current mode at room temperature and the shortest wavelength reaches 284 nm. The wide bandgap MgZnO thin films with various Mg mole fractions were grown on c-sapphire substrate using radio-frequency plasma assisted molecular beam epitaxy. Metal-semiconductor-metal (MSM)more » random laser devices were fabricated using lithography and metallization processes. Besides the demonstration of scalable emission wavelength, very low threshold current densities of 29-33 A/cm 2 are achieved. Furthermore, numerical modeling reveals that impact ionization process is responsible for the generation of hole carriers in the MgZnO MSM devices. The interaction of electrons and holes leads to radiative excitonic recombination and subsequent coherent random lasing.« less

Electrically driven deep ultraviolet MgZnO lasers at room temperature

DOE PAGES

Suja, Mohammad; Bashar, Sunayna Binte; Debnath, Bishwajit; ...

2017-06-01

Semiconductor lasers in the deep ultraviolet (UV) range have numerous potential applications ranging from water purification and medical diagnosis to high-density data storage and flexible displays. Nevertheless, very little success was achieved in the realization of electrically driven deep UV semiconductor lasers to date. Here, we report the fabrication and characterization of deep UV MgZnO semiconductor lasers. These lasers are operated with continuous current mode at room temperature and the shortest wavelength reaches 284 nm. The wide bandgap MgZnO thin films with various Mg mole fractions were grown on c-sapphire substrate using radio-frequency plasma assisted molecular beam epitaxy. Metal-semiconductor-metal (MSM)more » random laser devices were fabricated using lithography and metallization processes. Besides the demonstration of scalable emission wavelength, very low threshold current densities of 29-33 A/cm 2 are achieved. Furthermore, numerical modeling reveals that impact ionization process is responsible for the generation of hole carriers in the MgZnO MSM devices. The interaction of electrons and holes leads to radiative excitonic recombination and subsequent coherent random lasing.« less

Strain-engineered growth of two-dimensional materials

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ahn, Geun Ho; Amani, Matin; Rasool, Haider

The application of strain to semiconductors allows for controlled modification of their band structure. This principle is employed for the manufacturing of devices ranging from high-performance transistors to solid-state lasers. Traditionally, strain is typically achieved via growth on lattice-mismatched substrates. For two-dimensional (2D) semiconductors, this is not feasible as they typically do not interact epitaxially with the substrate. Here in this paper, we demonstrate controlled strain engineering of 2D semiconductors during synthesis by utilizing the thermal coefficient of expansion mismatch between the substrate and semiconductor. Using WSe 2 as a model system, we demonstrate stable built-in strains ranging from 1%more » tensile to 0.2% compressive on substrates with different thermal coefficient of expansion. Consequently, we observe a dramatic modulation of the band structure, manifested by a strain-driven indirect-to-direct bandgap transition and brightening of the dark exciton in bilayer and monolayer WSe 2, respectively. The growth method developed here should enable flexibility in design of more sophisticated devices based on 2D materials.« less

Strain-engineered growth of two-dimensional materials

DOE PAGES

Ahn, Geun Ho; Amani, Matin; Rasool, Haider; ...

2017-09-20

The application of strain to semiconductors allows for controlled modification of their band structure. This principle is employed for the manufacturing of devices ranging from high-performance transistors to solid-state lasers. Traditionally, strain is typically achieved via growth on lattice-mismatched substrates. For two-dimensional (2D) semiconductors, this is not feasible as they typically do not interact epitaxially with the substrate. Here in this paper, we demonstrate controlled strain engineering of 2D semiconductors during synthesis by utilizing the thermal coefficient of expansion mismatch between the substrate and semiconductor. Using WSe 2 as a model system, we demonstrate stable built-in strains ranging from 1%more » tensile to 0.2% compressive on substrates with different thermal coefficient of expansion. Consequently, we observe a dramatic modulation of the band structure, manifested by a strain-driven indirect-to-direct bandgap transition and brightening of the dark exciton in bilayer and monolayer WSe 2, respectively. The growth method developed here should enable flexibility in design of more sophisticated devices based on 2D materials.« less

Method for fabricating an interconnected array of semiconductor devices

DOEpatents

Grimmer, Derrick P.; Paulson, Kenneth R.; Gilbert, James R.

1989-10-10

Semiconductor layer and conductive layer formed on a flexible substrate, divided into individual devices and interconnected with one another in series by interconnection layers and penetrating terminals.

Methods of Measurement for Semiconductor Materials, Process Control, and Devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1973-01-01

The development of methods of measurement for semiconductor materials, process control, and devices is reported. Significant accomplishments include: (1) Completion of an initial identification of the more important problems in process control for integrated circuit fabrication and assembly; (2) preparations for making silicon bulk resistivity wafer standards available to the industry; and (3) establishment of the relationship between carrier mobility and impurity density in silicon. Work is continuing on measurement of resistivity of semiconductor crystals; characterization of generation-recombination-trapping centers, including gold, in silicon; evaluation of wire bonds and die attachment; study of scanning electron microscopy for wafer inspection and test; measurement of thermal properties of semiconductor devices; determination of S-parameters and delay time in junction devices; and characterization of noise and conversion loss of microwave detector diodes.

Comparison of Non-Parabolic Hydrodynamic Simulations for Semiconductor Devices

NASA Technical Reports Server (NTRS)

Smith, A. W.; Brennan, K. F.

1996-01-01

Parabolic drift-diffusion simulators are common engineering level design tools for semiconductor devices. Hydrodynamic simulators, based on the parabolic band approximation, are becoming more prevalent as device dimensions shrink and energy transport effects begin to dominate device characteristic. However, band structure effects present in state-of-the-art devices necessitate relaxing the parabolic band approximation. This paper presents simulations of ballistic diodes, a benchmark device, of Si and GaAs using two different non-parabolic hydrodynamic formulations. The first formulation uses the Kane dispersion relationship in the derivation of the conservation equations. The second model uses a power law dispersion relation {(hk)(exp 2)/2m = xW(exp Y)}. Current-voltage relations show that for the ballistic diodes considered. the non-parabolic formulations predict less current than the parabolic case. Explanations of this will be provided by examination of velocity and energy profiles. At low bias, the simulations based on the Kane formulation predict greater current flow than the power law formulation. As the bias is increased this trend changes and the power law predicts greater current than the Kane formulation. It will be shown that the non-parabolicity and energy range of the hydrodynamic model based on the Kane dispersion relation are limited due to the binomial approximation which was utilized in the derivation.

Semiconductor structures having electrically insulating and conducting portions formed from an AlSb-alloy layer

DOEpatents

Spahn, O.B.; Lear, K.L.

1998-03-10

The semiconductor structure comprises a plurality of semiconductor layers formed on a substrate including at least one layer of a III-V compound semiconductor alloy comprising aluminum (Al) and antimony (Sb), with at least a part of the AlSb-alloy layer being chemically converted by an oxidation process to form superposed electrically insulating and electrically conducting portions. The electrically insulating portion formed from the AlSb-alloy layer comprises an oxide of aluminum (e.g., Al{sub 2}O{sub 3}), while the electrically conducting portion comprises Sb. A lateral oxidation process allows formation of the superposed insulating and conducting portions below monocrystalline semiconductor layers for forming many different types of semiconductor structures having particular utility for optoelectronic devices such as light-emitting diodes, edge-emitting lasers, vertical-cavity surface-emitting lasers, photodetectors and optical modulators (waveguide and surface normal), and for electronic devices such as heterojunction bipolar transistors, field-effect transistors and quantum-effect devices. The invention is expected to be particularly useful for forming light-emitting devices for use in the 1.3--1.6 {mu}m wavelength range, with the AlSb-alloy layer acting to define an active region of the device and to effectively channel an electrical current therein for efficient light generation. 10 figs.

Optical processing for semiconductor device fabrication

NASA Technical Reports Server (NTRS)

Sopori, Bhushan L.

1994-01-01

A new technique for semiconductor device processing is described that uses optical energy to produce local heating/melting in the vicinity of a preselected interface of the device. This process, called optical processing, invokes assistance of photons to enhance interface reactions such as diffusion and melting, as compared to the use of thermal heating alone. Optical processing is performed in a 'cold wall' furnace, and requires considerably lower energies than furnace or rapid thermal annealing. This technique can produce some device structures with unique properties that cannot be produced by conventional thermal processing. Some applications of optical processing involving semiconductor-metal interfaces are described.

New developments in power semiconductors

NASA Technical Reports Server (NTRS)

Sundberg, G. R.

1983-01-01

This paper represents an overview of some recent power semiconductor developments and spotlights new technologies that may have significant impact for aircraft electric secondary power. Primary emphasis will be on NASA-Lewis-supported developments in transistors, diodes, a new family of semiconductors, and solid-state remote power controllers. Several semiconductor companies that are moving into the power arena with devices rated at 400 V and 50 A and above are listed, with a brief look at a few devices.

Semiconductor devices incorporating multilayer interference regions

DOEpatents

Biefeld, Robert M.; Drummond, Timothy J.; Gourley, Paul L.; Zipperian, Thomas E.

1990-01-01

A semiconductor high reflector comprising a number of thin alternating layers of semiconductor materials is electrically tunable and may be used as a temperature insensitive semiconductor laser in a Fabry-Perot configuration.

Thin film photovoltaic device with multilayer substrate

DOEpatents

Catalano, Anthony W.; Bhushan, Manjul

1984-01-01

A thin film photovoltaic device which utilizes at least one compound semiconductor layer chosen from Groups IIB and VA of the Periodic Table is formed on a multilayer substrate The substrate includes a lowermost support layer on which all of the other layers of the device are formed. Additionally, an uppermost carbide or silicon layer is adjacent to the semiconductor layer. Below the carbide or silicon layer is a metal layer of high conductivity and expansion coefficient equal to or slightly greater than that of the semiconductor layer.

Chalcopyrite and Orientation-Patterned Semiconductors for Mid-IR Sources: Modeling, Growth, and Characterization

DTIC Science & Technology

2006-11-01

shallow 120-meV acceptor and residual donor impurities. To produce low -absorption material for use in nonlinear optical devices, it is necessary to reduce...our knowledge, -20x higher than in previously reported works. This is accomplished by simply inserting a layer of low - index material (AlxOy) in the...and thin - film ferromagnetic semiconductors with Curie points above room temperature, and characterization of their magnetic and transport properties

Hole-cyclotron instability in semiconductor quantum plasmas

NASA Astrophysics Data System (ADS)

Areeb, F.; Rasheed, A.; Jamil, M.; Siddique, M.; Sumera, P.

2018-01-01

The excitation of electrostatic hole-cyclotron waves generated by an externally injected electron beam in semiconductor plasmas is examined using a quantum hydrodynamic model. The quantum effects such as tunneling potential, Fermi degenerate pressure, and exchange-correlation potential are taken care of. The growth rate of the wave is analyzed on varying the parameters normalized by hole-plasma frequency, like the angle θ between propagation vector and B0∥z ̂ , speed of the externally injected electron beam v0∥k , thermal temperature of the electron beam τ, external magnetic field B0∥z ̂ that modifies the hole-cyclotron frequency, and finally, the semiconductor electron number density. The instability of the hole-cyclotron wave seeks its applications in semiconductor devices.

Temperature-dependent mechanical behavior of silicon dioxide, gold and gold-vanadium thin films for VLSI integrated circuits and MicroElectroMechanical systems (MEMs)

NASA Astrophysics Data System (ADS)

Lin, Ming-Tzer

The Semiconductor Industry has grown rapidly in the last twenty years. The national technology roadmap for semiconductors plans for developing the complexity and packing density of semiconductor devices into the next decade, allowing ever smaller and more densely packed structures to be fabricated. Recently, MEMS (Micro-Electro-Mechanical Systems) have become important in modern technology. The goal of MEMs is to integrate many types of miniature devices on a single chip, creating a new micro-world. The oxidation of silicon is one of the most important processes in semiconductor technology. Producing high-quality IC's and MEMS devices requires an understanding of the basic oxidation mechanism. In addition, for the reliability of IC's and MEMS devices, the mechanical properties of the oxide play a critical role. There has been an apparent convergence of opinion on the relevant mechanism leading to the "standard computational model" for stress effects on silicon oxidation. This model has recently become suspect. Most of the reasonably direct experimental data on the flow properties of SiO 2 thin film do not support a stress-dependent viscosity of the sort envisioned by the model. Gold and gold vanadium alloys are used in electrical interconnections and in radio frequency switch contacts for the semiconductor industry, MEMs sensors for the aerospace industry and also in brain probes by the bioelectronics mechanical industry. Despite the strong potential usage of gold and gold vanadium thin films at the small scale, very little is known about their mechanical properties. Our goal was to experimentally investigate stress and its influence on SiO2 thin films and the mechanical properties of gold and gold vanadium thin films at room temperature and at elevated temperature of different vanadium concentration. We found that the application of relatively small amounts of bending to an oxidizing silicon substrate leads to significant decreases in oxide thickness in the ultrathin oxide regime. Both tensile and compressive bending retard oxide growth, although compressive bending results in somewhat thinner oxides than does tensile bending. We also determined the modulus of gold and gold vanadium, and discovered that there is some evidence for a vanadium concentration dependence of the mechanical properties.

Optical systems fabricated by printing-based assembly

DOEpatents

Rogers, John; Nuzzo, Ralph; Meitl, Matthew; Menard, Etienne; Baca, Alfred J; Motala, Michael; Ahn, Jong-Hyun; Park, Sang-Il; Yu, Chang-Jae; Ko, Heung Cho; Stoykovich, Mark; Yoon, Jongseung

2014-05-13

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

Optical systems fabricated by printing-based assembly

DOEpatents

Rogers, John [Champaign, IL; Nuzzo, Ralph [Champaign, IL; Meitl, Matthew [Durham, NC; Menard, Etienne [Durham, NC; Baca, Alfred J [Urbana, IL; Motala, Michael [Champaign, IL; Ahn, Jong-Hyun [Suwon, KR; Park, Sang-II [Savoy, IL; Yu,; Chang-Jae, [Urbana, IL; Ko, Heung-Cho [Gwangju, KR; Stoykovich,; Mark, [Dover, NH; Yoon, Jongseung [Urbana, IL

2011-07-05

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

Optical systems fabricated by printing-based assembly

DOEpatents

Rogers, John; Nuzzo, Ralph; Meitl, Matthew; Menard, Etienne; Baca, Alfred; Motala, Michael; Ahn, Jong -Hyun; Park, Sang -Il; Yu, Chang -Jae; Ko, Heung Cho; Stoykovich, Mark; Yoon, Jongseung

2015-08-25

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

Optical systems fabricated by printing-based assembly

DOEpatents

Rogers, John; Nuzzo, Ralph; Meitl, Matthew; Menard, Etienne; Baca, Alfred; Motala, Michael; Ahn, Jong-Hyun; Park, Sang-Il; Yu, Chang-Jae; Ko, Heung Cho; Stoykovich, Mark; Yoon, Jongseung

2017-03-21

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

Air-gating and chemical-gating in transistors and sensing devices made from hollow TiO2 semiconductor nanotubes

NASA Astrophysics Data System (ADS)

Alivov, Yahya; Funke, Hans; Nagpal, Prashant

2015-07-01

Rapid miniaturization of electronic devices down to the nanoscale, according to Moore’s law, has led to some undesirable effects like high leakage current in transistors, which can offset additional benefits from scaling down. Development of three-dimensional transistors, by spatial extension in the third dimension, has allowed higher contact area with a gate electrode and better control over conductivity in the semiconductor channel. However, these devices do not utilize the large surface area and interfaces for new electronic functionality. Here, we demonstrate air gating and chemical gating in hollow semiconductor nanotube devices and highlight the potential for development of novel transistors that can be modulated using channel bias, gate voltage, chemical composition, and concentration. Using chemical gating, we reversibly altered the conductivity of nanoscaled semiconductor nanotubes (10-500 nm TiO2 nanotubes) by six orders of magnitude, with a tunable rectification factor (ON/OFF ratio) ranging from 1-106. While demonstrated air- and chemical-gating speeds were slow here (˜seconds) due to the mechanical-evacuation rate and size of our chamber, the small nanoscale volume of these hollow semiconductors can enable much higher switching speeds, limited by the rate of adsorption/desorption of molecules at semiconductor interfaces. These chemical-gating effects are completely reversible, additive between different chemical compositions, and can enable semiconductor nanoelectronic devices for ‘chemical transistors’, ‘chemical diodes’, and very high-efficiency sensing applications.

Semiconductor devices incorporating multilayer interference regions

DOEpatents

Biefeld, R.M.; Drummond, T.J.; Gourley, P.L.; Zipperian, T.E.

1987-08-31

A semiconductor high reflector comprising a number of thin alternating layers of semiconductor materials is electrically tunable and may be used as a temperature insensitive semiconductor laser in a Fabry-Perot configuration. 8 figs.

Lattice matched semiconductor growth on crystalline metallic substrates

DOEpatents

Norman, Andrew G; Ptak, Aaron J; McMahon, William E

2013-11-05

Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a metal or metal alloy substrate having a crystalline surface with a known lattice parameter (a). The methods further include growing a crystalline semiconductor alloy layer on the crystalline substrate surface by coincident site lattice matched epitaxy. The semiconductor layer may be grown without any buffer layer between the alloy and the crystalline surface of the substrate. The semiconductor alloy may be prepared to have a lattice parameter (a') that is related to the lattice parameter (a). The semiconductor alloy may further be prepared to have a selected band gap.

77 FR 60721 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Notice of...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-10-04

... Circuit Devices and Products Containing Same; Notice of Commission Determination Not To Review an Initial... public record for this investigation may be viewed on the Commission's electronic docket (EDIS) at http... certain semiconductor integrated circuit devices and products containing same by reason of infringement of...

77 FR 19032 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same Notice of Receipt...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-03-29

... INTERNATIONAL TRADE COMMISSION [DN 2888] Certain Semiconductor Integrated Circuit Devices and... Integrated Circuit Devices and Products Containing Same, DN 2888; the Commission is soliciting comments on... Commission's electronic docket (EDIS) at http://edis.usitc.gov , and will be available for inspection during...

Non- contacting capacitive diagnostic device

DOEpatents

Ellison, Timothy

2005-07-12

A non-contacting capacitive diagnostic device includes a pulsed light source for producing an electric field in a semiconductor or photovoltaic device or material to be evaluated and a circuit responsive to the electric field. The circuit is not in physical contact with the device or material being evaluated and produces an electrical signal characteristic of the electric field produced in the device or material. The diagnostic device permits quality control and evaluation of semiconductor or photovoltaic device properties in continuous manufacturing processes.

Insulator Charging in RF MEMS Capacitive Switches

DTIC Science & Technology

2005-06-01

and Simulations,” Journal of Microelectromechanical Systems, 8: 208-217 (June 1999). 5. Neaman , Donald. Semiconductor Physics & Devices. Boston...227-230 (2001). 5. Sze, S.M. Semiconductor Devices: Physics and Technology. New York: Wiley, 1985. 6. Neaman , Donald A. Semiconductor Physics...Radiation Response of Hafnium-Silicate Capacitors,” IEEE Transactions on Nuclear Science, 49: 3191-3196 (December 2002). 3. Neaman , D.A

Compact modeling of total ionizing dose and aging effects in MOS technologies

DOE PAGES

Esqueda, Ivan S.; Barnaby, Hugh J.; King, Michael Patrick

2015-06-18

This paper presents a physics-based compact modeling approach that incorporates the impact of total ionizing dose (TID) and stress-induced defects into simulations of metal-oxide-semiconductor (MOS) devices and integrated circuits (ICs). This approach utilizes calculations of surface potential (ψs) to capture the charge contribution from oxide trapped charge and interface traps and to describe their impact on MOS electrostatics and device operating characteristics as a function of ionizing radiation exposure and aging effects. The modeling approach is demonstrated for bulk and silicon-on-insulator (SOI) MOS device. The formulation is verified using TCAD simulations and through the comparison of model calculations and experimentalmore » I-V characteristics from irradiated devices. The presented approach is suitable for modeling TID and aging effects in advanced MOS devices and ICs.« less

Charge dissipative dielectric for cryogenic devices

NASA Technical Reports Server (NTRS)

Cantor, Robin Harold (Inventor); Hall, John Addison (Inventor)

2007-01-01

A Superconducting Quantum Interference Device (SQUID) is disclosed comprising a pair of resistively shunted Josephson junctions connected in parallel within a superconducting loop and biased by an external direct current (dc) source. The SQUID comprises a semiconductor substrate and at least one superconducting layer. The metal layer(s) are separated by or covered with a semiconductor material layer having the properties of a conductor at room temperature and the properties of an insulator at operating temperatures (generally less than 100 Kelvins). The properties of the semiconductor material layer greatly reduces the risk of electrostatic discharge that can damage the device during normal handling of the device at room temperature, while still providing the insulating properties desired to allow normal functioning of the device at its operating temperature. A method of manufacturing the SQUID device is also disclosed.

Anisotropy-based crystalline oxide-on-semiconductor material

DOEpatents

McKee, Rodney Allen; Walker, Frederick Joseph

2000-01-01

A semiconductor structure and device for use in a semiconductor application utilizes a substrate of semiconductor-based material, such as silicon, and a thin film of a crystalline oxide whose unit cells are capable of exhibiting anisotropic behavior overlying the substrate surface. Within the structure, the unit cells of the crystalline oxide are exposed to an in-plane stain which influences the geometric shape of the unit cells and thereby arranges a directional-dependent quality of the unit cells in a predisposed orientation relative to the substrate. This predisposition of the directional-dependent quality of the unit cells enables the device to take beneficial advantage of characteristics of the structure during operation. For example, in the instance in which the crystalline oxide of the structure is a perovskite, a spinel or an oxide of similarly-related cubic structure, the structure can, within an appropriate semiconductor device, exhibit ferroelectric, piezoelectric, pyroelectric, electro-optic, ferromagnetic, antiferromagnetic, magneto-optic or large dielectric properties that synergistically couple to the underlying semiconductor substrate.

Suppressing molecular vibrations in organic semiconductors by inducing strain

PubMed Central

Kubo, Takayoshi; Häusermann, Roger; Tsurumi, Junto; Soeda, Junshi; Okada, Yugo; Yamashita, Yu; Akamatsu, Norihisa; Shishido, Atsushi; Mitsui, Chikahiko; Okamoto, Toshihiro; Yanagisawa, Susumu; Matsui, Hiroyuki; Takeya, Jun

2016-01-01

Organic molecular semiconductors are solution processable, enabling the growth of large-area single-crystal semiconductors. Improving the performance of organic semiconductor devices by increasing the charge mobility is an ongoing quest, which calls for novel molecular and material design, and improved processing conditions. Here we show a method to increase the charge mobility in organic single-crystal field-effect transistors, by taking advantage of the inherent softness of organic semiconductors. We compress the crystal lattice uniaxially by bending the flexible devices, leading to an improved charge transport. The mobility increases from 9.7 to 16.5 cm2 V−1 s−1 by 70% under 3% strain. In-depth analysis indicates that compressing the crystal structure directly restricts the vibration of the molecules, thus suppresses dynamic disorder, a unique mechanism in organic semiconductors. Since strain can be easily induced during the fabrication process, we expect our method to be exploited to build high-performance organic devices. PMID:27040501

Suppressing molecular vibrations in organic semiconductors by inducing strain.

PubMed

Kubo, Takayoshi; Häusermann, Roger; Tsurumi, Junto; Soeda, Junshi; Okada, Yugo; Yamashita, Yu; Akamatsu, Norihisa; Shishido, Atsushi; Mitsui, Chikahiko; Okamoto, Toshihiro; Yanagisawa, Susumu; Matsui, Hiroyuki; Takeya, Jun

2016-04-04

Organic molecular semiconductors are solution processable, enabling the growth of large-area single-crystal semiconductors. Improving the performance of organic semiconductor devices by increasing the charge mobility is an ongoing quest, which calls for novel molecular and material design, and improved processing conditions. Here we show a method to increase the charge mobility in organic single-crystal field-effect transistors, by taking advantage of the inherent softness of organic semiconductors. We compress the crystal lattice uniaxially by bending the flexible devices, leading to an improved charge transport. The mobility increases from 9.7 to 16.5 cm(2) V(-1) s(-1) by 70% under 3% strain. In-depth analysis indicates that compressing the crystal structure directly restricts the vibration of the molecules, thus suppresses dynamic disorder, a unique mechanism in organic semiconductors. Since strain can be easily induced during the fabrication process, we expect our method to be exploited to build high-performance organic devices.

EDITORIAL The 23rd Nordic Semiconductor Meeting The 23rd Nordic Semiconductor Meeting

NASA Astrophysics Data System (ADS)

Ólafsson, Sveinn; Sveinbjörnsson, Einar

2010-12-01

A Nordic Semiconductor Meeting is held every other year with the venue rotating amongst the Nordic countries of Denmark, Finland, Iceland, Norway and Sweden. The focus of these meetings remains 'original research and science being carried out on semiconductor materials, devices and systems'. Reports on industrial activity have usually featured. The topics have ranged from fundamental research on point defects in a semiconductor to system architecture of semiconductor electronic devices. Proceedings from these events are regularly published as a topical issue of Physica Scripta. All of the papers in this topical issue have undergone critical peer review and we wish to thank the reviewers and the authors for their cooperation, which has been instrumental in meeting the high scientific standards and quality of the series. This meeting of the 23rd Nordic Semiconductor community, NSM 2009, was held at Háskólatorg at the campus of the University of Iceland, Reykjavik, Iceland, 14-17 June 2009. Support was provided by the University of Iceland. Almost 50 participants presented a broad range of topics covering semiconductor materials and devices as well as related material science interests. The conference provided a forum for Nordic and international scientists to present and discuss new results and ideas concerning the fundamentals and applications of semiconductor materials. The meeting aim was to advance the progress of Nordic science and thus aid in future worldwide technological advances concerning technology, education, energy and the environment. Topics Theory and fundamental physics of semiconductors Emerging semiconductor technologies (for example III-V integration on Si, novel Si devices, graphene) Energy and semiconductors Optical phenomena and optical devices MEMS and sensors Program 14 June Registration 13:00-17:00 15 June Meeting program 09:30-17:00 and Poster Session I 16 June Meeting program 09:30-17:00 and Poster Session II 17 June Excursion and dinner on Icelandic National Day In connection with the conference, a summer school for 40 research students was organized by the Nordic LENS network. The summer school took place in Reykjavik on 11-14 June. For more information on the school please visit the website. The next Nordic Semiconductor meeting, NSM 2011, is scheduled to take place in Aarhus, Denmark, 19-22 June 2011. A full participant list is available in the PDF of this article.

Self bleaching photoelectrochemical-electrochromic device

DOEpatents

Bechinger, Clemens S.; Gregg, Brian A.

2002-04-09

A photoelectrochemical-electrochromic device comprising a first transparent electrode and a second transparent electrode in parallel, spaced relation to each other. The first transparent electrode is electrically connected to the second transparent electrode. An electrochromic material is applied to the first transparent electrode and a nanoporous semiconductor film having a dye adsorbed therein is applied to the second transparent electrode. An electrolyte layer contacts the electrochromic material and the nanoporous semiconductor film. The electrolyte layer has a redox couple whereby upon application of light, the nanoporous semiconductor layer dye absorbs the light and the redox couple oxidizes producing an electric field across the device modulating the effective light transmittance through the device.

Tungsten coating for improved wear resistance and reliability of microelectromechanical devices

DOEpatents

Fleming, James G.; Mani, Seethambal S.; Sniegowski, Jeffry J.; Blewer, Robert S.

2001-01-01

A process is disclosed whereby a 5-50-nanometer-thick conformal tungsten coating can be formed over exposed semiconductor surfaces (e.g. silicon, germanium or silicon carbide) within a microelectromechanical (MEM) device for improved wear resistance and reliability. The tungsten coating is formed after cleaning the semiconductor surfaces to remove any organic material and oxide film from the surface. A final in situ cleaning step is performed by heating a substrate containing the MEM device to a temperature in the range of 200-600 .degree. C. in the presence of gaseous nitrogen trifluoride (NF.sub.3). The tungsten coating can then be formed by a chemical reaction between the semiconductor surfaces and tungsten hexafluoride (WF.sub.6) at an elevated temperature, preferably about 450.degree. C. The tungsten deposition process is self-limiting and covers all exposed semiconductor surfaces including surfaces in close contact. The present invention can be applied to many different types of MEM devices including microrelays, micromirrors and microengines. Additionally, the tungsten wear-resistant coating of the present invention can be used to enhance the hardness, wear resistance, electrical conductivity, optical reflectivity and chemical inertness of one or more semiconductor surfaces within a MEM device.

Is DNA a metal, semiconductor or insulator? A theoretical approach

NASA Astrophysics Data System (ADS)

Rey-Gonzalez, Rafael; Fonseca-Romero, Karen; Plazas, Carlos; Grupo de Óptica e Información Cuántica Team

Over the last years, scientific interest for designing and making low dimensional electronic devices with traditional or novel materials has been increased. These experimental and theoretical researches in electronic properties at molecular scale are looking for developing efficient devices able to carry out tasks which are currently done by silicon transistors and devices. Among the new materials DNA strands are highlighted, but the experimental results have been contradictories pointing to behaviors as conductor, semiconductor or insulator. To contribute to the understanding of the origin of the disparity of the measurements, we perform a numerical calculation of the electrical conductance of DNA segments, modeled as 1D disordered finite chains. The system is described into a Tight binding model with nearest neighbor interactions and a s orbital per site. Hydration effects are included as random variations of self-energies. The electronic current as a function of applied bias is calculated using Launder formalism, where the transmission probability is determined into the transfer matrix formalism. We find a conductor-to-semiconductor-to-insulator transition as a function of the three effects taken into account: chain size, intrinsic disorder, and hydration We thank Fundación para la Promoción de la Investigación y la Tecnología, Colombia, and Dirección de Investigación de Bogotá, Universidad Nacional de Colombia, for partial financial support.

Modeling of phase velocity and frequency spectrum of guided Lamb waves in piezoelectric-semiconductor multilayered structures made of AlAs and GaAs

NASA Astrophysics Data System (ADS)

Othmani, Cherif; Takali, Farid; Njeh, Anouar

2017-11-01

Modeling of guided Lamb waves propagation in piezoelectric-semiconductor multilayered structures made of AlAs and GaAs is evaluated in this paper. Here, the Legendre polynomial method is used to calculate dispersion curves, frequency spectrum and field distributions of guided Lamb waves propagation modes in AlAs, GaAs, AlAs/GaAs and AlAs/GaAs/AlAs-1/2/1 structures. In fact, formulations are given for open-circuit surface. Consequently, the polynomial method is numerically stable according to the total number of layers and the frequency range. This analysis is meaningful for the applications of the piezoelectric-semiconductor multilayered structures made of AlAs and GaAs such as in novel acoustic devices.

Optoelectronic Devices and Materials

NASA Astrophysics Data System (ADS)

Sweeney, Stephen; Adams, Alfred

Unlike the majority of electronic devices, which are silicon based, optoelectronic devices are predominantly made using III-V semiconductor compounds such as GaAs, InP, GaN and GaSb and their alloys due to their direct band gap. Understanding the properties of these materials has been of vital importance in the development of optoelectronic devices. Since the first demonstration of a semiconductor laser in the early 1960s, optoelectronic devices have been produced in their millions, pervading our everyday lives in communications, computing, entertainment, lighting and medicine. It is perhaps their use in optical-fibre communications that has had the greatest impact on humankind, enabling high-quality and inexpensive voice and data transmission across the globe. Optical communications spawned a number of developments in optoelectronics, leading to devices such as vertical-cavity surface-emitting lasers, semiconductor optical amplifiers, optical modulators and avalanche photodiodes. In this chapter we discuss the underlying theory of operation of the most important optoelectronic devices. The influence of carrier-photon interactions is discussed in the context of producing efficient emitters and detectors. Finally we discuss how the semiconductor band structure can be manipulated to enhance device properties using quantum confinement and strain effects, and how the addition of dilute amounts of elements such as nitrogen is having a profound effect on the next generation of optoelectronic devices.

Release strategies for making transferable semiconductor structures, devices and device components

DOEpatents

Rogers, John A; Nuzzo, Ralph G; Meitl, Matthew; Ko, Heung Cho; Yoon, Jongseung; Menard, Etienne; Baca, Alfred J

2014-11-25

Provided are methods for making a device or device component by providing a multilayer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.

Release strategies for making transferable semiconductor structures, devices and device components

DOEpatents

Rogers, John A [Champaign, IL; Nuzzo, Ralph G [Champaign, IL; Meitl, Matthew [Raleigh, NC; Ko, Heung Cho [Urbana, IL; Yoon, Jongseung [Urbana, IL; Menard, Etienne [Durham, NC; Baca, Alfred J [Urbana, IL

2011-04-26

Provided are methods for making a device or device component by providing a multilayer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.

Release strategies for making transferable semiconductor structures, devices and device components

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rogers, John A.; Nuzzo, Ralph G.; Meitl, Matthew

2016-05-24

Provided are methods for making a device or device component by providing a multi layer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.

Modelling of optoelectronic circuits based on resonant tunneling diodes

NASA Astrophysics Data System (ADS)

Rei, João. F. M.; Foot, James A.; Rodrigues, Gil C.; Figueiredo, José M. L.

2017-08-01

Resonant tunneling diodes (RTDs) are the fastest pure electronic semiconductor devices at room temperature. When integrated with optoelectronic devices they can give rise to new devices with novel functionalities due to their highly nonlinear properties and electrical gain, with potential applications in future ultra-wide-band communication systems (see e.g. EU H2020 iBROW Project). The recent coverage on these devices led to the need to have appropriated simulation tools. In this work, we present RTD based optoelectronic circuits simulation packages to provide circuit signal level analysis such as transient and frequency responses. We will present and discuss the models, and evaluate the simulation packages.

Bulk semiconducting scintillator device for radiation detection

DOEpatents

Stowe, Ashley C.; Burger, Arnold; Groza, Michael

2016-08-30

A bulk semiconducting scintillator device, including: a Li-containing semiconductor compound of general composition Li-III-VI.sub.2, wherein III is a Group III element and VI is a Group VI element; wherein the Li-containing semiconductor compound is used in one or more of a first mode and a second mode, wherein: in the first mode, the Li-containing semiconductor compound is coupled to an electrical circuit under bias operable for measuring electron-hole pairs in the Li-containing semiconductor compound in the presence of neutrons and the Li-containing semiconductor compound is also coupled to current detection electronics operable for detecting a corresponding current in the Li-containing semiconductor compound; and, in the second mode, the Li-containing semiconductor compound is coupled to a photodetector operable for detecting photons generated in the Li-containing semiconductor compound in the presence of the neutrons.

Multiphysics modeling of non-linear laser-matter interactions for optically active semiconductors

NASA Astrophysics Data System (ADS)

Kraczek, Brent; Kanp, Jaroslaw

Development of photonic devices for sensors and communications devices has been significantly enhanced by computational modeling. We present a new computational method for modelling laser propagation in optically-active semiconductors within the paraxial wave approximation (PWA). Light propagation is modeled using the Streamline-upwind/Petrov-Galerkin finite element method (FEM). Material response enters through the non-linear polarization, which serves as the right-hand side of the FEM calculation. Maxwell's equations for classical light propagation within the PWA can be written solely in terms of the electric field, producing a wave equation that is a form of the advection-diffusion-reaction equations (ADREs). This allows adaptation of the computational machinery developed for solving ADREs in fluid dynamics to light-propagation modeling. The non-linear polarization is incorporated using a flexible framework to enable the use of multiple methods for carrier-carrier interactions (e.g. relaxation-time-based or Monte Carlo) to enter through the non-linear polarization, as appropriate to the material type. We demonstrate using a simple carrier-carrier model approximating the response of GaN. Supported by ARL Materials Enterprise.

Spectroscopic Studies of the Electronic Structure of Metal-Semiconductor and Vacuum-Semiconductor Interfaces.

DTIC Science & Technology

1982-12-31

interfaces which are of importance in such semi- conductor devices as MOSFETS, CCD devices, photovoltaic devices, DD I jAN 73 1473 EDITION OF INOV 66 if...interfaces is interesting for the study of electrolytic cells . Our photoemission study reveals for the first time how the electronic structure of water

Surface breakdown igniter for mercury arc devices

DOEpatents

Bayless, John R.

1977-01-01

Surface breakdown igniter comprises a semiconductor of medium resistivity which has the arc device cathode as one electrode and has an igniter anode electrode so that when voltage is applied between the electrodes a spark is generated when electrical breakdown occurs over the surface of the semiconductor. The geometry of the igniter anode and cathode electrodes causes the igniter discharge to be forced away from the semiconductor surface.

Photovoltaic devices comprising zinc stannate buffer layer and method for making

DOEpatents

Wu, Xuanzhi; Sheldon, Peter; Coutts, Timothy J.

2001-01-01

A photovoltaic device has a buffer layer zinc stannate Zn.sub.2 SnO.sub.4 disposed between the semiconductor junction structure and the transparent conducting oxide (TCO) layer to prevent formation of localized junctions with the TCO through a thin window semiconductor layer, to prevent shunting through etched grain boundaries of semiconductors, and to relieve stresses and improve adhesion between these layers.

Semiconductor Materials for High Frequency Solid State Sources.

DTIC Science & Technology

1985-01-18

saturation on near and submicron-scale device performance. The motivation for this is as follows: Presently, individual semiconductors are accepted or...basis of all FET scaling procedures; and is a major motivating factor for going to submicron structures. This scaling was tested with the 4 following...performance. The motivation for this is as follows: Presently, individual semiconductors are accepted or rejected as candidate device materials based, in

Technological and organizational diversity and technical advance in the early history of the American semiconductor industry

NASA Astrophysics Data System (ADS)

Cohen, W.; Holbrook, D.; Klepper, S.

1994-06-01

This study examines the early years of the semiconductor industry and focuses on the roles played by different size firms in technologically innovative processes. A large and diverse pool of firms participated in the growth of the industry. Three related technological areas were chosen for in-depth analysis: integrated circuits, materials technology, and device packaging. Large business producing vacuum tubes dominated the early production of semiconductor devices. As the market for new devices grew during the 1950's, new firms were founded and existing firms from other industries, e.g. aircraft builders and instrument makers, began to pursue semiconductor electronics. Small firms began to cater to the emerging industry by supplying materials and equipment. These firms contributed to the development of certain aspects of one thousand firms that were playing some part in the semiconductor industry.

One-Dimensional Nanostructures and Devices of II–V Group Semiconductors

PubMed Central

2009-01-01

The II–V group semiconductors, with narrow band gaps, are important materials with many applications in infrared detectors, lasers, solar cells, ultrasonic multipliers, and Hall generators. Since the first report on trumpet-like Zn3P2nanowires, one-dimensional (1-D) nanostructures of II–V group semiconductors have attracted great research attention recently because these special 1-D nanostructures may find applications in fabricating new electronic and optoelectronic nanoscale devices. This article covers the 1-D II–V semiconducting nanostructures that have been synthesized till now, focusing on nanotubes, nanowires, nanobelts, and special nanostructures like heterostructured nanowires. Novel electronic and optoelectronic devices built on 1-D II–V semiconducting nanostructures will also be discussed, which include metal–insulator-semiconductor field-effect transistors, metal-semiconductor field-effect transistors, andp–nheterojunction photodiode. We intent to provide the readers a brief account of these exciting research activities. PMID:20596452

Hetero-junction photovoltaic device and method of fabricating the device

DOEpatents

Aytug, Tolga; Christen, David K; Paranthaman, Mariappan Parans; Polat, Ozgur

2014-02-10

A hetero-junction device and fabrication method in which phase-separated n-type and p-type semiconductor pillars define vertically-oriented p-n junctions extending above a substrate. Semiconductor materials are selected for the p-type and n-type pillars that are thermodynamically stable and substantially insoluble in one another. An epitaxial deposition process is employed to form the pillars on a nucleation layer and the mutual insolubility drives phase separation of the materials. During the epitaxial deposition process, the orientation is such that the nucleation layer initiates propagation of vertical columns resulting in a substantially ordered, three-dimensional structure throughout the deposited material. An oxidation state of at least a portion of one of the p-type or the n-type semiconductor materials is altered relative to the other, such that the band-gap energy of the semiconductor materials differ with respect to stoichiometric compositions and the device preferentially absorbs particular selected bands of radiation.

The Physics of Semiconductors

NASA Astrophysics Data System (ADS)

Brennan, Kevin F.

1999-02-01

Modern fabrication techniques have made it possible to produce semiconductor devices whose dimensions are so small that quantum mechanical effects dominate their behavior. This book describes the key elements of quantum mechanics, statistical mechanics, and solid-state physics that are necessary in understanding these modern semiconductor devices. The author begins with a review of elementary quantum mechanics, and then describes more advanced topics, such as multiple quantum wells. He then disusses equilibrium and nonequilibrium statistical mechanics. Following this introduction, he provides a thorough treatment of solid-state physics, covering electron motion in periodic potentials, electron-phonon interaction, and recombination processes. The final four chapters deal exclusively with real devices, such as semiconductor lasers, photodiodes, flat panel displays, and MOSFETs. The book contains many homework exercises and is suitable as a textbook for electrical engineering, materials science, or physics students taking courses in solid-state device physics. It will also be a valuable reference for practicing engineers in optoelectronics and related areas.

Surface Conduction in III-V Semiconductor Infrared Detector Materials

NASA Astrophysics Data System (ADS)

Sidor, Daniel Evan

III-V semiconductors are increasingly used to produce high performance infrared photodetectors; however a significant challenge inherent to working with these materials is presented by unintended electrical conduction pathways that form along their surfaces. Resulting leakage currents contribute to system noise and are ineffectively mitigated by device cooling, and therefore limit ultimate performance. When the mechanism of surface conduction is understood, the unipolar barrier device architecture offers a potential solution. III-V bulk unipolar barrier detectors that effectively suppress surface leakage have approached the performance of the best II-VI pn-based structures. This thesis begins with a review of empirically determined Schottky barrier heights and uses this information to present a simple model of semiconductor surface conductivity. The model is validated through measurements of degenerate n-type surface conductivity on InAs pn junctions, and non-degenerate surface conductivity on GaSb pn junctions. It is then extended, along with design principles inspired by the InAs-based nBn detector, to create a flat-band pn-based unipolar barrier detector possessing a conductive surface but free of detrimental surface leakage current. Consideration is then given to the relative success of these and related bulk detectors in suppressing surface leakage when compared to analogous superlattice-based designs, and general limitations of unipolar barriers in suppressing surface leakage are proposed. Finally, refinements to the molecular beam epitaxy crystal growth techniques used to produce InAs-based unipolar barrier heterostructure devices are discussed. Improvements leading to III-V device performance well within an order of magnitude of the state-of-the-art are demonstrated.

Germanium detector passivated with hydrogenated amorphous germanium

DOEpatents

Hansen, William L.; Haller, Eugene E.

1986-01-01

Passivation of predominantly crystalline semiconductor devices (12) is provided for by a surface coating (21) of sputtered hydrogenated amorphous semiconductor material. Passivation of a radiation detector germanium diode, for example, is realized by sputtering a coating (21) of amorphous germanium onto the etched and quenched diode surface (11) in a low pressure atmosphere of hydrogen and argon. Unlike prior germanium diode semiconductor devices (12), which must be maintained in vacuum at cryogenic temperatures to avoid deterioration, a diode processed in the described manner may be stored in air at room temperature or otherwise exposed to a variety of environmental conditions. The coating (21) compensates for pre-existing undesirable surface states as well as protecting the semiconductor device (12) against future impregnation with impurities.

Photovoltaic devices comprising cadmium stannate transparent conducting films and method for making

DOEpatents

Wu, Xuanzhi; Coutts, Timothy J.; Sheldon, Peter; Rose, Douglas H.

1999-01-01

A photovoltaic device having a substrate, a layer of Cd.sub.2 SnO.sub.4 disposed on said substrate as a front contact, a thin film comprising two or more layers of semiconductor materials disposed on said layer of Cd.sub.2 SnO.sub.4, and an electrically conductive film disposed on said thin film of semiconductor materials to form a rear electrical contact to said thin film. The device is formed by RF sputter coating a Cd.sub.2 SnO.sub.4 layer onto a substrate, depositing a thin film of semiconductor materials onto the layer of Cd.sub.2 SnO.sub.4, and depositing an electrically conductive film onto the thin film of semiconductor materials.

Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

PubMed Central

Long, Rathnait D.; McIntyre, Paul C.

2012-01-01

The literature on polar Gallium Nitride (GaN) surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS) devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

Analysis of quantum semiconductor heterostructures by ballistic electron emission spectroscopy

NASA Astrophysics Data System (ADS)

Guthrie, Daniel K.

1998-09-01

The microelectronics industry is diligently working to achieve the goal of gigascale integration (GSI) by early in the 21st century. For the past twenty-five years, progress toward this goal has been made by continually scaling down device technology. Unfortunately, this trend cannot continue to the point of producing arbitrarily small device sizes. One possible solution to this problem that is currently under intensive study is the relatively new area of quantum devices. Quantum devices represent a new class of microelectronic devices that operate by utilizing the wave-like nature (reflection, refraction, and confinement) of electrons together with the laws of quantum mechanics to construct useful devices. One difficulty associated with these structures is the absence of measurement techniques that can fully characterize carrier transport in such devices. This thesis addresses this need by focusing on the study of carrier transport in quantum semiconductor heterostructures using a relatively new and versatile measurement technique known as ballistic electron emission spectroscopy (BEES). To achieve this goal, a systematic approach that encompasses a set of progressively more complex structures is utilized. First, the simplest BEES structure possible, the metal/semiconductor interface, is thoroughly investigated in order to provide a foundation for measurements on more the complex structures. By modifying the semiclassical model commonly used to describe the experimental BEES spectrum, a very complete and accurate description of the basic structure has been achieved. Next, a very simple semiconductor heterostructure, a Ga1-xAlxAs single-barrier structure, was measured and analyzed. Low-temperature measurements on this structure were used to investigate the band structure and electron-wave interference effects in the Ga1-xAlxAs single barrier structure. These measurements are extended to a simple quantum device by designing, measuring, and analyzing a set of complementary electron-wave Fabry-Perot quantum interference filters which included both a half- and a quarter-electron-wavelength resonant device. High-resolution, low noise, BEES spectra obtained on these devices at low-temperature were used to measure the zero-bias electron transmittance as a function of injected energy for these resonant devices. Finally, by analyzing BEES spectra taken at various spatial locations, one monolayer variations in the thickness of a buried quantum well have been detected.

An evaluation of radiation damage to solid state components flown in low earth orbit satellites.

PubMed

Shin, Myung-Won; Kim, Myung-Hyun

2004-01-01

The effects of total ionising radiation dose upon commercial off-the-shelf semiconductors fitted to satellites operating in low Earth orbit (LEO) conditions was evaluated. The evaluation was performed for the Korea Institute of Technology SATellite-1, (KITSAT-1) which was equipped with commercial solid state components. Two approximate calculation models for space radiation shielding were developed. Verification was performed by comparing the results with detailed three-dimensional calculations using the Monte-Carlo method and measured data from KITSAT-1. It was confirmed that the developed approximate models were reliable for satellite shielding calculations. It was also found that commercial semiconductor devices, which were not radiation hardened, could be damaged within their lifetime due to the total ionising dose they are subject to in the LEO environment. To conclude, an intensive shielding analysis should be considered when commercial devices are used.

Spin-dependent transport phenomena in organic semiconductors

NASA Astrophysics Data System (ADS)

Bergeson, Jeremy D.

Thin-film organic semiconductors transport can have an anomalously high sensitivity to low magnetic fields. Such a response is unexpected considering that thermal fluctuation energies are greater than the energy associated with the intrinsic spin of charge carriers at a modest magnetic field of 100 Oe by a factor of more than 104 at room temperature and is still greater by 102 even at liquid helium temperatures. Nevertheless, we report experimental characterization of (1) spin-dependent injection, detection and transport of spin-polarized current through organic semiconductors and (2) the influence of a magnetic field on the spin dynamics of recombination-limited transport. The first focus of this work was accomplished by fabricating basic spin-valve devices consisting of two magnetic layers spatially separated by a nonmagnetic organic semiconductor. The spin-valve effect is a change in electrical resistance due to the magnetizations of the magnetic layers changing from parallel to antiparallel alignment, or vice versa. The conductivities of the metallic contacts and that of the semiconductor differed by many orders of magnitude, which inhibited the injection of a spin-polarized current from the magnet into the nonmagnet. We successfully overcame the problem of conductivity mismatch by inserting ultra-thin tunnel barriers at the metal/semiconductor interfaces which aided in yielding a ˜20% spin-valve effect at liquid helium temperatures and the effect persisted up to 150 K. We built on this achievement by constructing spin valves where one of the metallic contacts was replaced by the organic-based magnetic semiconductor vanadium tetracyanoethylene (V[TCNE]2). At 10 K these devices produced the switching behavior of the spin-valve effect. The second focus of this work was the bulk magnetoresistance (MR) of small molecule, oligomer and polymer organic semiconductors in thin-film structures. At room temperature the resistance can change up to 8% at 100 Oe and 15% at 1000 Oe. Depending on parameters such as temperature, layer thickness, or applied voltage, the resistance of these materials may increase or decrease as a function of field. A model for this phenomenon, termed magnetoresistance by the interconversion of singlets and triplets (MIST), is developed to account for this anomalous behavior. This model predicts that increasing the spin-orbit coupling in the organic semiconductor should decrease the magnitude of the MR. In an experiment where the small molecule Alq3 was doped with phosphorescent sensitizers, to increase the spin-orbit coupling, the MR was observed to decrease by an order of magnitude or more, depending on the doping. In addition to low-magnetic-field effects, we show the experimental observation of high-field MR in devices with and without magnetic contacts. To the best of our knowledge, we are the first to report (1) a tunnel-barrier-assisted spin-valve effect into an organic semiconductor using partially polarized metallic magnetic electrodes and (2) an experimental characterization of the central impact of the hyperfine interaction and spin-orbit coupling on MR in organic semiconductors.

High voltage semiconductor devices and methods of making the devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Matocha, Kevin; Chatty, Kiran; Banerjee, Sujit

A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type well regions which are formed in an n-type drift layer. A p-type body contact region is formed on the periphery of the MOSFET. The source metallization of the device forms a Schottky contact with an n-type semiconductor region adjacent the p-type body contact region of the device. Vias can be formed through a dielectric material covering the source ohmic contacts and/or Schottky region of the device and the source metallization can be formed in the vias.more » The n-type semiconductor region forming the Schottky contact and/or the n-type source regions can be a single continuous region or a plurality of discontinuous regions alternating with discontinuous p-type body contact regions. The device can be a SiC device. Methods of making the device are also provided.« less

High voltage semiconductor devices and methods of making the devices

DOEpatents

Matocha, Kevin; Chatty, Kiran; Banerjee, Sujit

2017-02-28

A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type well regions which are formed in an n-type drift layer. A p-type body contact region is formed on the periphery of the MOSFET. The source metallization of the device forms a Schottky contact with an n-type semiconductor region adjacent the p-type body contact region of the device. Vias can be formed through a dielectric material covering the source ohmic contacts and/or Schottky region of the device and the source metallization can be formed in the vias. The n-type semiconductor region forming the Schottky contact and/or the n-type source regions can be a single continuous region or a plurality of discontinuous regions alternating with discontinuous p-type body contact regions. The device can be a SiC device. Methods of making the device are also provided.

Energy Models for One-Carrier Transport in Semiconductor Devices

DTIC Science & Technology

1991-10-01

nonstandard high order Runge-Kutta methods exist [24] which preserve nonlinear stability of the first order Euler forward version under suitable CFL time...REPORT TYPE AND DATES COVERED I October 1991 Contrato Report 4. TITLE AND SUBTITLE 5. FUNDING NUMBERS ENERGY MODELS FOR ONE-CARRIER TRANSPORT IN

Delay induced high order locking effects in semiconductor lasers

NASA Astrophysics Data System (ADS)

Kelleher, B.; Wishon, M. J.; Locquet, A.; Goulding, D.; Tykalewicz, B.; Huyet, G.; Viktorov, E. A.

2017-11-01

Multiple time scales appear in many nonlinear dynamical systems. Semiconductor lasers, in particular, provide a fertile testing ground for multiple time scale dynamics. For solitary semiconductor lasers, the two fundamental time scales are the cavity repetition rate and the relaxation oscillation frequency which is a characteristic of the field-matter interaction in the cavity. Typically, these two time scales are of very different orders, and mutual resonances do not occur. Optical feedback endows the system with a third time scale: the external cavity repetition rate. This is typically much longer than the device cavity repetition rate and suggests the possibility of resonances with the relaxation oscillations. We show that for lasers with highly damped relaxation oscillations, such resonances can be obtained and lead to spontaneous mode-locking. Two different laser types-—a quantum dot based device and a quantum well based device—are analysed experimentally yielding qualitatively identical dynamics. A rate equation model is also employed showing an excellent agreement with the experimental results.

Regulation of depletion layer width in Pb(Zr,Ti)O3/Nb:SrTiO3 heterostructures

NASA Astrophysics Data System (ADS)

Bai, Yu; Jie Wang, Zhan; Cui, Jian Zhong; Zhang, Zhi Dong

2018-05-01

Improving the tunability of depletion layer width (DLW) in ferroelectric/semiconductor heterostructures is important for the performance of some devices. In this work, 200-nm-thick Pb(Zr0.4Ti0.6)O3 (PZT) films were deposited on different Nb-doped SrTiO3 (NSTO) substrates, and the tunability of DLW at PZT/NSTO interfaces were studied. Our results showed that the maximum tunability of the DLW was achieved at the NSTO substrate with 0.5 wt% Nb. On the basis of the modified capacitance model and the ferroelectric semiconductor theory, we suggest that the tunability of the DLW in PZT/NSTO heterostructures can be attributed to a delicate balance of the depletion layer charge and the ferroelectric polarization charge. Therefore, the performance of some devices related to the tunability of DLW in ferroelectric/semiconductor heterostructures can be improved by modulating the doping concentration in semiconducting electrode materials.

Graphene-Mesoporous Si Nanocomposite as a Compliant Substrate for Heteroepitaxy.

PubMed

Boucherif, Abderrahim Rahim; Boucherif, Abderraouf; Kolhatkar, Gitanjali; Ruediger, Andreas; Arès, Richard

2017-05-01

The ultimate performance of a solid state device is limited by the restricted number of crystalline substrates that are available for epitaxial growth. As a result, only a small fraction of semiconductors are usable. This study describes a novel concept for a tunable compliant substrate for epitaxy, based on a graphene-porous silicon nanocomposite, which extends the range of available lattice constants for epitaxial semiconductor alloys. The presence of graphene and its effect on the strain of the porous layer lattice parameter are discussed in detail and new remarkable properties are demonstrated. These include thermal stability up to 900 °C, lattice tuning up to 0.9 % mismatch, and compliance under stress for virtual substrate thicknesses of several micrometers. A theoretical model is proposed to define the compliant substrate design rules. These advances lay the foundation for the fabrication of a compliant substrate that could unlock the lattice constant restrictions for defect-free new epitaxial semiconductor alloys and devices. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Tunable molecular orientation and elevated thermal stability of vapor-deposited organic semiconductors

PubMed Central

Walters, Diane M.; Lyubimov, Ivan; de Pablo, Juan J.; Ediger, M. D.

2015-01-01

Physical vapor deposition is commonly used to prepare organic glasses that serve as the active layers in light-emitting diodes, photovoltaics, and other devices. Recent work has shown that orienting the molecules in such organic semiconductors can significantly enhance device performance. We apply a high-throughput characterization scheme to investigate the effect of the substrate temperature (Tsubstrate) on glasses of three organic molecules used as semiconductors. The optical and material properties are evaluated with spectroscopic ellipsometry. We find that molecular orientation in these glasses is continuously tunable and controlled by Tsubstrate/Tg, where Tg is the glass transition temperature. All three molecules can produce highly anisotropic glasses; the dependence of molecular orientation upon substrate temperature is remarkably similar and nearly independent of molecular length. All three compounds form “stable glasses” with high density and thermal stability, and have properties similar to stable glasses prepared from model glass formers. Simulations reproduce the experimental trends and explain molecular orientation in the deposited glasses in terms of the surface properties of the equilibrium liquid. By showing that organic semiconductors form stable glasses, these results provide an avenue for systematic performance optimization of active layers in organic electronics. PMID:25831545

Modelling short channel mosfets for use in VLSI

NASA Technical Reports Server (NTRS)

Klafter, Alex; Pilorz, Stuart; Polosa, Rosa Loguercio; Ruddock, Guy; Smith, Andrew

1986-01-01

In an investigation of metal oxide semiconductor field effect transistor (MOFSET) devices, a one-dimensional mathematical model of device dynamics was prepared, from which an accurate and computationally efficient drain current expression could be derived for subsequent parameter extraction. While a critical review revealed weaknesses in existing 1-D models (Pao-Sah, Pierret-Shields, Brews, and Van de Wiele), this new model in contrast was found to allow all the charge distributions to be continuous, to retain the inversion layer structure, and to include the contribution of current from the pinched-off part of the device. The model allows the source and drain to operate in different regimes. Numerical algorithms used for the evaluation of surface potentials in the various models are presented.

The influence of interfacial defects on fast charge trapping in nanocrystalline oxide-semiconductor thin film transistors

NASA Astrophysics Data System (ADS)

Kim, Taeho; Hur, Jihyun; Jeon, Sanghun

2016-05-01

Defects in oxide semiconductors not only influence the initial device performance but also affect device reliability. The front channel is the major carrier transport region during the transistor turn-on stage, therefore an understanding of defects located in the vicinity of the interface is very important. In this study, we investigated the dynamics of charge transport in a nanocrystalline hafnium-indium-zinc-oxide thin-film transistor (TFT) by short pulse I-V, transient current and 1/f noise measurement methods. We found that the fast charging behavior of the tested device stems from defects located in both the front channel and the interface, following a multi-trapping mechanism. We found that a silicon-nitride stacked hafnium-indium-zinc-oxide TFT is vulnerable to interfacial charge trapping compared with silicon-oxide counterpart, causing significant mobility degradation and threshold voltage instability. The 1/f noise measurement data indicate that the carrier transport in a silicon-nitride stacked TFT device is governed by trapping/de-trapping processes via defects in the interface, while the silicon-oxide device follows the mobility fluctuation model.

Wide Bandgap Extrinsic Photoconductive Switches

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sullivan, James S.

2012-01-20

Photoconductive semiconductor switches (PCSS) have been investigated since the late 1970s. Some devices have been developed that withstand tens of kilovolts and others that switch hundreds of amperes. However, no single device has been developed that can reliably withstand both high voltage and switch high current. Yet, photoconductive switches still hold the promise of reliable high voltage and high current operation with subnanosecond risetimes. Particularly since good quality, bulk, single crystal, wide bandgap semiconductor materials have recently become available. In this chapter we will review the basic operation of PCSS devices, status of PCSS devices and properties of the widemore » bandgap semiconductors 4H-SiC, 6H-SiC and 2H-GaN.« less

NREL Finds Nanotube Semiconductors Well-suited for PV Systems | News | NREL

Science.gov Websites

photoinduced electron transfer for emerging organic semiconductors such as single-walled carbon nanotubes (SWCNT) that can be used in organic PV devices. In organic PV devices, after a photon is absorbed Larson, and Steven Strauss from Colorado State University. Organic PV devices involve an interface

Hybrid method of making an amorphous silicon P-I-N semiconductor device

DOEpatents

Moustakas, Theodore D.; Morel, Don L.; Abeles, Benjamin

1983-10-04

The invention is directed to a hydrogenated amorphous silicon PIN semiconductor device of hybrid glow discharge/reactive sputtering fabrication. The hybrid fabrication method is of advantage in providing an ability to control the optical band gap of the P and N layers, resulting in increased photogeneration of charge carriers and device output.

High-Frequency Switching Transients and Power Loss Estimation in Electric Drive Systems that Utilize Wide-Bandgap Semiconductors

NASA Astrophysics Data System (ADS)

Fulani, Olatunji T.

Development of electric drive systems for transportation and industrial applications is rapidly seeing the use of wide-bandgap (WBG) based power semiconductor devices. These devices, such as SiC MOSFETs, enable high switching frequencies and are becoming the preferred choice in inverters because of their lower switching losses and higher allowable operating temperatures. Due to the much shorter turn-on and turn-off times and correspondingly larger output voltage edge rates, traditional models and methods previously used to estimate inverter and motor power losses, based upon a triangular power loss waveform, are no longer justifiable from a physical perspective. In this thesis, more appropriate models and a power loss calculation approach are described with the goal of more accurately estimating the power losses in WBG-based electric drive systems. Sine-triangle modulation with third harmonic injection is used to control the switching of the inverter. The motor and inverter models are implemented using Simulink and computer studies are shown illustrating the application of the new approach.

Computer-aided engineering of semiconductor integrated circuits

NASA Astrophysics Data System (ADS)

Meindl, J. D.; Dutton, R. W.; Gibbons, J. F.; Helms, C. R.; Plummer, J. D.; Tiller, W. A.; Ho, C. P.; Saraswat, K. C.; Deal, B. E.; Kamins, T. I.

1980-07-01

Economical procurement of small quantities of high performance custom integrated circuits for military systems is impeded by inadequate process, device and circuit models that handicap low cost computer aided design. The principal objective of this program is to formulate physical models of fabrication processes, devices and circuits to allow total computer-aided design of custom large-scale integrated circuits. The basic areas under investigation are (1) thermal oxidation, (2) ion implantation and diffusion, (3) chemical vapor deposition of silicon and refractory metal silicides, (4) device simulation and analytic measurements. This report discusses the fourth year of the program.

Field enhancement in plasmonic nanostructures

NASA Astrophysics Data System (ADS)

Piltan, Shiva; Sievenpiper, Dan

2018-05-01

Efficient generation of charge carriers from a metallic surface is a critical challenge in a wide variety of applications including vacuum microelectronics and photo-electrochemical devices. Replacing semiconductors with vacuum/gas as the medium of electron transport offers superior speed, power, and robustness to radiation and temperature. We propose a metallic resonant surface combining optical and electrical excitations of electrons and significantly reducing powers required using plasmon-induced enhancement of confined electric field. The properties of the device are modeled using the exact solution of the time-dependent Schrödinger equation at the barrier. Measurement results exhibit strong agreement with an analytical solution, and allow us to extract the field enhancement factor at the surface. Significant photocurrents are observed using combination of {{W}} {{{c}}{{m}}}-2 optical power and 10 V DC excitation on the surface. The model suggests optical field enhancement of 3 orders of magnitude at the metal interface due to plasmonic resonance. This simple planar structure provides valuable evidence on the electron emission mechanisms involved and it can be used for implementation of semiconductor compatible vacuum devices.

Investigation of the DSMC Approach for Ion/neutral Species in Modeling Low Pressure Plasma Reactor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Deng Hao; Li, Z.; Levin, D.

2011-05-20

Low pressure plasma reactors are important tools for ionized metal physical vapor deposition (IMPVD), a semiconductor plasma processing technology that is increasingly being applied to deposit Cu seed layers on semiconductor surfaces of trenches and vias with the high aspect ratio (e.g., >5:1). A large fraction of ionized atoms produced by the IMPVD process leads to an anisotropic deposition flux towards the substrate, a feature which is critical for attaining a void-free and uniform fill. Modeling such devices is challenging due to their high plasma density, reactive environment, but low gas pressure. A modular code developed by the Computational Opticalmore » and Discharge Physics Group, the Hybrid Plasma Equipment Model (HPEM), has been successfully applied to the numerical investigations of IMPVD by modeling a hollow cathode magnetron (HCM) device. However, as the development of semiconductor devices progresses towards the lower pressure regime (e.g., <5 mTorr), the breakdown of the continuum assumption limits the application of the fluid model in HPEM and suggests the incorporation of the kinetic method, such as the direct simulation Monte Carlo (DSMC), in the plasma simulation.The DSMC method, which solves the Boltzmann equation of transport, has been successfully applied in modeling micro-fluidic flows in MEMS devices with low Reynolds numbers, a feature shared with the HCM. Modeling of the basic physical and chemical processes for ion/neutral species in plasma have been developed and implemented in DSMC, which include ion particle motion due to the Lorentz force, electron impact reactions, charge exchange reactions, and charge recombination at the surface. The heating of neutrals due to collisions with ions and the heating of ions due to the electrostatic field will be shown to be captured by the DSMC simulations. In this work, DSMC calculations were coupled with the modules from HPEM so that the plasma can be self-consistently solved. Differences in the Ar results, the dominant species in the reactor, produced by the DSMC-HPEM coupled simulation will be shown in comparison with the original HPEM results. The effects of the DSMC calculations for ion/neutral species on HPEM plasma simulation will be further analyzed.« less

Nature of size effects in compact models of field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Torkhov, N. A., E-mail: trkf@mail.ru; Scientific-Research Institute of Semiconductor Devices, Tomsk 634050; Tomsk State University of Control Systems and Radioelectronics, Tomsk 634050

Investigations have shown that in the local approximation (for sizes L < 100 μm), AlGaN/GaN high electron mobility transistor (HEMT) structures satisfy to all properties of chaotic systems and can be described in the language of fractal geometry of fractional dimensions. For such objects, values of their electrophysical characteristics depend on the linear sizes of the examined regions, which explain the presence of the so-called size effects—dependences of the electrophysical and instrumental characteristics on the linear sizes of the active elements of semiconductor devices. In the present work, a relationship has been established for the linear model parameters of themore » equivalent circuit elements of internal transistors with fractal geometry of the heteroepitaxial structure manifested through a dependence of its relative electrophysical characteristics on the linear sizes of the examined surface areas. For the HEMTs, this implies dependences of their relative static (A/mm, mA/V/mm, Ω/mm, etc.) and microwave characteristics (W/mm) on the width d of the sink-source channel and on the number of sections n that leads to a nonlinear dependence of the retrieved parameter values of equivalent circuit elements of linear internal transistor models on n and d. Thus, it has been demonstrated that the size effects in semiconductors determined by the fractal geometry must be taken into account when investigating the properties of semiconductor objects on the levels less than the local approximation limit and designing and manufacturing field effect transistors. In general, the suggested approach allows a complex of problems to be solved on designing, optimizing, and retrieving the parameters of equivalent circuits of linear and nonlinear models of not only field effect transistors but also any arbitrary semiconductor devices with nonlinear instrumental characteristics.« less

Thermovoltaic semiconductor device including a plasma filter

DOEpatents

Baldasaro, Paul F.

1999-01-01

A thermovoltaic energy conversion device and related method for converting thermal energy into an electrical potential. An interference filter is provided on a semiconductor thermovoltaic cell to pre-filter black body radiation. The semiconductor thermovoltaic cell includes a P/N junction supported on a substrate which converts incident thermal energy below the semiconductor junction band gap into electrical potential. The semiconductor substrate is doped to provide a plasma filter which reflects back energy having a wavelength which is above the band gap and which is ineffectively filtered by the interference filter, through the P/N junction to the source of radiation thereby avoiding parasitic absorption of the unusable portion of the thermal radiation energy.

Semiconductor cooling by thin-film thermocouples

NASA Technical Reports Server (NTRS)

Tick, P. A.; Vilcans, J.

1970-01-01

Thin-film, metal alloy thermocouple junctions do not rectify, change circuit impedance only slightly, and require very little increase in space. Although they are less efficient cooling devices than semiconductor junctions, they may be applied to assist conventional cooling techniques for electronic devices.

Multiple gap photovoltaic device

DOEpatents

Dalal, Vikram L.

1981-01-01

A multiple gap photovoltaic device having a transparent electrical contact adjacent a first cell which in turn is adjacent a second cell on an opaque electrical contact, includes utilizing an amorphous semiconductor as the first cell and a crystalline semiconductor as the second cell.

High efficiency photovoltaic device

DOEpatents

Guha, Subhendu; Yang, Chi C.; Xu, Xi Xiang

1999-11-02

An N-I-P type photovoltaic device includes a multi-layered body of N-doped semiconductor material which has an amorphous, N doped layer in contact with the amorphous body of intrinsic semiconductor material, and a microcrystalline, N doped layer overlying the amorphous, N doped material. A tandem device comprising stacked N-I-P cells may further include a second amorphous, N doped layer interposed between the microcrystalline, N doped layer and a microcrystalline P doped layer. Photovoltaic devices thus configured manifest improved performance, particularly when configured as tandem devices.

New Concentric Electrode Metal-Semiconductor-Metal Photodetectors

NASA Technical Reports Server (NTRS)

Towe, Elias

1996-01-01

A new metal-semiconductor-metal (MSM) photodetector geometry is proposed. The new device has concentric metal electrodes which exhibit a high degree of symmetry and a design flexibility absent in the conventional MSM device. The concentric electrodes are biased to alternating potentials as in the conventional interdigitated device. Because of the high symmetry configuration, however, the new device also has a lower effective capacitance. This device and the conventional MSM structure are analyzed within a common theoretical framework which allows for the comparison of the important performance characteristics.

Effects of surface plasma treatment on threshold voltage hysteresis and instability in metal-insulator-semiconductor (MIS) AlGaN/GaN heterostructure HEMTs

NASA Astrophysics Data System (ADS)

Zaidi, Z. H.; Lee, K. B.; Roberts, J. W.; Guiney, I.; Qian, H.; Jiang, S.; Cheong, J. S.; Li, P.; Wallis, D. J.; Humphreys, C. J.; Chalker, P. R.; Houston, P. A.

2018-05-01

In a bid to understand the commonly observed hysteresis in the threshold voltage (VTH) in AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors during forward gate bias stress, we have analyzed a series of measurements on devices with no surface treatment and with two different plasma treatments before the in-situ Al2O3 deposition. The observed changes between samples were quasi-equilibrium VTH, forward bias related VTH hysteresis, and electrical response to reverse bias stress. To explain these effects, a disorder induced gap state model, combined with a discrete level donor, at the dielectric/semiconductor interface was employed. Technology Computer-Aided Design modeling demonstrated the possible differences in the interface state distributions that could give a consistent explanation for the observations.

Organic photosensitive cells grown on rough electrode with nano-scale morphology control

DOEpatents

Yang, Fan [Piscataway, NJ; Forrest, Stephen R [Ann Arbor, MI

2011-06-07

An optoelectronic device and a method for fabricating the optoelectronic device includes a first electrode disposed on a substrate, an exposed surface of the first electrode having a root mean square roughness of at least 30 nm and a height variation of at least 200 nm, the first electrode being transparent. A conformal layer of a first organic semiconductor material is deposited onto the first electrode by organic vapor phase deposition, the first organic semiconductor material being a small molecule material. A layer of a second organic semiconductor material is deposited over the conformal layer. At least some of the layer of the second organic semiconductor material directly contacts the conformal layer. A second electrode is deposited over the layer of the second organic semiconductor material. The first organic semiconductor material is of a donor-type or an acceptor-type relative to the second organic semiconductor material, which is of the other material type.

Photovoltaic devices comprising cadmium stannate transparent conducting films and method for making

DOEpatents

Wu, X.; Coutts, T.J.; Sheldon, P.; Rose, D.H.

1999-07-13

A photovoltaic device is disclosed having a substrate, a layer of Cd[sub 2]SnO[sub 4] disposed on said substrate as a front contact, a thin film comprising two or more layers of semiconductor materials disposed on said layer of Cd[sub 2]SnO[sub 4], and an electrically conductive film disposed on said thin film of semiconductor materials to form a rear electrical contact to said thin film. The device is formed by RF sputter coating a Cd[sub 2]SnO[sub 4] layer onto a substrate, depositing a thin film of semiconductor materials onto the layer of Cd[sub 2]SnO[sub 4], and depositing an electrically conductive film onto the thin film of semiconductor materials. 10 figs.

Theoretical evaluation of maximum electric field approximation of direct band-to-band tunneling Kane model for low bandgap semiconductors

NASA Astrophysics Data System (ADS)

Dang Chien, Nguyen; Shih, Chun-Hsing; Hoa, Phu Chi; Minh, Nguyen Hong; Thi Thanh Hien, Duong; Nhung, Le Hong

2016-06-01

The two-band Kane model has been popularly used to calculate the band-to-band tunneling (BTBT) current in tunnel field-effect transistor (TFET) which is currently considered as a promising candidate for low power applications. This study theoretically clarifies the maximum electric field approximation (MEFA) of direct BTBT Kane model and evaluates its appropriateness for low bandgap semiconductors. By analysing the physical origin of each electric field term in the Kane model, it has been elucidated in the MEFA that the local electric field term must be remained while the nonlocal electric field terms are assigned by the maximum value of electric field at the tunnel junction. Mathematical investigations have showed that the MEFA is more appropriate for low bandgap semiconductors compared to high bandgap materials because of enhanced tunneling probability in low field regions. The appropriateness of the MEFA is very useful for practical uses in quickly estimating the direct BTBT current in low bandgap TFET devices.

Two dimensional thermal and charge mapping of power thyristors

NASA Technical Reports Server (NTRS)

Hu, S. P.; Rabinovici, B. M.

1975-01-01

The two dimensional static and dynamic current density distributions within the junction of semiconductor power switching devices and in particular the thyristors were obtained. A method for mapping the thermal profile of the device junctions with fine resolution using an infrared beam and measuring the attenuation through the device as a function of temperature were developed. The results obtained are useful in the design and quality control of high power semiconductor switching devices.

Multi-junction, monolithic solar cell using low-band-gap materials lattice matched to GaAs or Ge

DOEpatents

Olson, Jerry M.; Kurtz, Sarah R.; Friedman, Daniel J.

2001-01-01

A multi-junction, monolithic, photovoltaic solar cell device is provided for converting solar radiation to photocurrent and photovoltage with improved efficiency. The solar cell device comprises a plurality of semiconductor cells, i.e., active p/n junctions, connected in tandem and deposited on a substrate fabricated from GaAs or Ge. To increase efficiency, each semiconductor cell is fabricated from a crystalline material with a lattice constant substantially equivalent to the lattice constant of the substrate material. Additionally, the semiconductor cells are selected with appropriate band gaps to efficiently create photovoltage from a larger portion of the solar spectrum. In this regard, one semiconductor cell in each embodiment of the solar cell device has a band gap between that of Ge and GaAs. To achieve desired band gaps and lattice constants, the semiconductor cells may be fabricated from a number of materials including Ge, GaInP, GaAs, GaInAsP, GaInAsN, GaAsGe, BGaInAs, (GaAs)Ge, CuInSSe, CuAsSSe, and GaInAsNP. To further increase efficiency, the thickness of each semiconductor cell is controlled to match the photocurrent generated in each cell. To facilitate photocurrent flow, a plurality of tunnel junctions of low-resistivity material are included between each adjacent semiconductor cell. The conductivity or direction of photocurrent in the solar cell device may be selected by controlling the specific p-type or n-type characteristics for each active junction.

Ferroelectrics for semiconductor devices

NASA Astrophysics Data System (ADS)

Sayer, M.; Wu, Z.; Vasant Kumar, C. V. R.; Amm, D. T.; Griswold, E. M.

1992-11-01

The technology for the implementation of the integration of thin film ferroelectrics with silicon processing for various devices is described, and factors affecting the integration of ferroelectric films with semiconductor processing are discussed. Consideration is also given to film properties, the properties of electrode materials and structures, and the phenomena of ferroelectric fatigue and aging. Particular attention is given to the nonmemory device application of ferroelectrics.

Optical devices integrated with semiconductor optical amplifier

NASA Astrophysics Data System (ADS)

Oh, Kwang R.; Park, Moon S.; Jeong, Jong S.; Baek, Yongsoon; Oh, Dae-Kon

2000-07-01

Semiconductor optical amplifiers (SOA's) have been used as a key optical component for the high capacity communication systems. The monolithic integration is necessary for the stable operation of these devices and the wider applications. In this paper, the coupling technique between different waveguides and the integration of SSC's are discussed and the research results of optical devices integrated with SOA's are presented.

Sputtered pin amorphous silicon semi-conductor device and method therefor

DOEpatents

Moustakas, Theodore D.; Friedman, Robert A.

1983-11-22

A high efficiency amorphous silicon PIN semi-conductor device is constructed by the sequential sputtering of N, I and P layers of amorphous silicon and at least one semi-transparent ohmic electrode. A method of construction produces a PIN device, exhibiting enhanced physical integrity and facilitates ease of construction in a singular vacuum system and vacuum pump down procedure.

Semiconductor crystal high resolution imager

NASA Technical Reports Server (NTRS)

Matteson, James (Inventor); Levin, Craig S. (Inventor)

2011-01-01

A radiation imaging device (10). The radiation image device (10) comprises a subject radiation station (12) producing photon emissions (14), and at least one semiconductor crystal detector (16) arranged in an edge-on orientation with respect to the emitted photons (14) to directly receive the emitted photons (14) and produce a signal. The semiconductor crystal detector (16) comprises at least one anode and at least one cathode that produces the signal in response to the emitted photons (14).

Semiconductor/High-Tc-Superconductor Hybrid ICs

NASA Technical Reports Server (NTRS)

Burns, Michael J.

1995-01-01

Hybrid integrated circuits (ICs) containing both Si-based semiconducting and YBa(2)Cu(3)O(7-x) superconducting circuit elements on sapphire substrates developed. Help to prevent diffusion of Cu from superconductors into semiconductors. These hybrid ICs combine superconducting and semiconducting features unavailable in superconducting or semiconducting circuitry alone. For example, complementary metal oxide/semiconductor (CMOS) readout and memory devices integrated with fast-switching Josephson-junction super-conducting logic devices and zero-resistance interconnections.

Optical devices featuring nonpolar textured semiconductor layers

DOEpatents

Moustakas, Theodore D; Moldawer, Adam; Bhattacharyya, Anirban; Abell, Joshua

2013-11-26

A semiconductor emitter, or precursor therefor, has a substrate and one or more textured semiconductor layers deposited onto the substrate in a nonpolar orientation. The textured layers enhance light extraction, and the use of nonpolar orientation greatly enhances internal quantum efficiency compared to conventional devices. Both the internal and external quantum efficiencies of emitters of the invention can be 70-80% or higher. The invention provides highly efficient light emitting diodes suitable for solid state lighting.

Controlled buckling structures in semiconductor interconnects and nanomembranes for stretchable electronics

DOEpatents

Rogers, John A; Meitl, Matthew; Sun, Yugang; Ko, Heung Cho; Carlson, Andrew; Choi, Won Mook; Stoykovich, Mark; Jiang, Hanqing; Huang, Yonggang; Nuzzo, Ralph G; Zhu, Zhengtao; Menard, Etienne; Khang, Dahl-Young

2014-05-20

In an aspect, the present invention provides stretchable, and optionally printable, components such as semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed, and related methods of making or tuning such stretchable components. Stretchable semiconductors and electronic circuits preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention are adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Controlled buckling structures in semiconductor interconnects and nanomembranes for stretchable electronics

DOEpatents

Rogers, John A [Champaign, IL; Meitl, Matthew [Raleigh, NC; Sun, Yugang [Naperville, IL; Ko, Heung Cho [Urbana, IL; Carlson, Andrew [Urbana, IL; Choi, Won Mook [Champaign, IL; Stoykovich, Mark [Dover, NH; Jiang, Hanqing [Urbana, IL; Huang, Yonggang [Glencoe, IL; Nuzzo, Ralph G [Champaign, IL; Lee, Keon Jae [Tokyo, JP; Zhu, Zhengtao [Rapid City, SD; Menard, Etienne [Durham, NC; Khang, Dahl-Young [Seoul, KR; Kan, Seong Jun [Daejeon, KR; Ahn, Jong Hyun [Suwon, KR; Kim, Hoon-sik [Champaign, IL

2012-07-10

In an aspect, the present invention provides stretchable, and optionally printable, components such as semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed, and related methods of making or tuning such stretchable components. Stretchable semiconductors and electronic circuits preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention are adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Fabrication of eco-friendly PNP transistor using RF magnetron sputtering

NASA Astrophysics Data System (ADS)

Kumar, B. Santhosh; Harinee, N.; Purvaja, K.; Shanker, N. Praveen; Manikandan, M.; Aparnadevi, N.; Mukilraj, T.; Venkateswaran, C.

2018-05-01

An effort has been made to fabricate a thin film transistor using eco-friendly oxide semiconductor materials. Oxide semiconductor materials are cost - effective, thermally and chemically stable with high electron/hole mobility. Copper (II) oxide is a p-type semiconductor and zinc oxide is an n-type semiconductor. A pnp thin film transistor was fabricated using RF magnetron sputtering. The films deposited have been subjected to structural characterization using AFM. I-V characterization of the fabricated device, Ag/CuO/ZnO/CuO/Ag, confirms transistor behaviour. The mechanism of electron/hole transport of the device is discussed below.

Near-Unity Absorption in van der Waals Semiconductors for Ultrathin Optoelectronics.

PubMed

Jariwala, Deep; Davoyan, Artur R; Tagliabue, Giulia; Sherrott, Michelle C; Wong, Joeson; Atwater, Harry A

2016-09-14

We demonstrate near-unity, broadband absorbing optoelectronic devices using sub-15 nm thick transition metal dichalcogenides (TMDCs) of molybdenum and tungsten as van der Waals semiconductor active layers. Specifically, we report that near-unity light absorption is possible in extremely thin (<15 nm) van der Waals semiconductor structures by coupling to strongly damped optical modes of semiconductor/metal heterostructures. We further fabricate Schottky junction devices using these highly absorbing heterostructures and characterize their optoelectronic performance. Our work addresses one of the key criteria to enable TMDCs as potential candidates to achieve high optoelectronic efficiency.

Noise And Charge Transport In Carbon Nanotube Devices

NASA Astrophysics Data System (ADS)

Reza, Shahed; Huynh, Quyen T.; Bosman, Gijs; Sippel, Jennifer; Rinzler, Andrew G.

2005-11-01

The charge transport and noise properties of three terminal, gated devices containing multiple, single wall, metallic and semiconductor carbon nanotubes have been measured as a function of gate and drain bias at 300K. Using pulsed bias the metallic tubes could be burned sequentially enabling the separation of measured conductance and low frequency excess noise into metallic and semiconductor contributions. The relative low frequency excess noise of the metallic tubes was about a factor 100 lower than that of the semiconductor tubes, whereas the conductance of the metallic tubes was significantly higher (10 to 50 times) than that of the semiconductor tubes.

Gate bias stress in pentacene field-effect-transistors: Charge trapping in the dielectric or semiconductor

NASA Astrophysics Data System (ADS)

Häusermann, R.; Batlogg, B.

2011-08-01

Gate bias stress instability in organic field-effect transistors (OFETs) is a major conceptual and device issue. This effect manifests itself by an undesirable shift of the transfer characteristics and is associated with long term charge trapping. We study the role of the dielectric and the semiconductor separately by producing OFETs with the same semiconductor (pentacene) combined with different dielectrics (SiO2 and Cytop). We show that it is possible to fabricate devices which are immune to gate bias stress. For other material combinations, charge trapping occurs in the semiconductor alone or in the dielectric.

Monolayer borophene electrode for effective elimination of both the Schottky barrier and strong electric field effect

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, L. Z., E-mail: lzliu@nju.edu.cn, E-mail: hkxlwu@nju.edu.cn; Xiong, S. J.; Wu, X. L., E-mail: lzliu@nju.edu.cn, E-mail: hkxlwu@nju.edu.cn

2016-08-08

The formation of Schottky barriers between 2D semiconductors and traditional metallic electrodes has greatly limited the application of 2D semiconductors in nanoelectronic and optoelectronic devices. In this study, metallic borophene was used as a substitute for the traditional noble metal electrode to contact with the 2D semiconductor. Theoretical calculations demonstrated that no Schottky barrier exists in the borophene/2D semiconductor heterostructure. The contact remains ohmic even with a strong electric field applied. This finding provides a way to construct 2D electronic devices and sensors with greatly enhanced performance.

Light-matter Interactions in Semiconductors and Metals: From Nitride Optoelectronics to Quantum Plasmonics

NASA Astrophysics Data System (ADS)

Narang, Prineha

This thesis puts forth a theory-directed approach coupled with spectroscopy aimed at the discovery and understanding of light-matter interactions in semiconductors and metals. The first part of the thesis presents the discovery and development of Zn-IV nitride materials. The commercial prominence in the optoelectronics industry of tunable semiconductor alloy materials based on nitride semiconductor devices, specifically InGaN, motivates the search for earth-abundant alternatives for use in efficient, high-quality optoelectronic devices. II-IV-N2 compounds, which are closely related to the wurtzite-structured III-N semiconductors, have similar electronic and optical properties to InGaN namely direct band gaps, high quantum efficiencies and large optical absorption coefficients. The choice of different group II and group IV elements provides chemical diversity that can be exploited to tune the structural and electronic properties through the series of alloys. The first theoretical and experimental investigation of the ZnSnxGe1--xN2 series as a replacement for III-nitrides is discussed here. The second half of the thesis shows ab-initio calculations for surface plasmons and plasmonic hot carrier dynamics. Surface plasmons, electromagnetic modes confined to the surface of a conductor-dielectric interface, have sparked renewed interest because of their quantum nature and their broad range of applications. The decay of surface plasmons is usually a detriment in the field of plasmonics, but the possibility to capture the energy normally lost to heat would open new opportunities in photon sensors, energy conversion devices and switching. A theoretical understanding of plasmon-driven hot carrier generation and relaxation dynamics in the ultrafast regime is presented here. Additionally calculations for plasmon-mediated upconversion as well as an energy-dependent transport model for these non-equilibrium carriers are shown. Finally, this thesis gives an outlook on the potential of non-equilibrium phenomena in metals and semiconductors for future light-based technologies.

Outline and comparison of the possible effects present in a metal-thin-film-insulator-semiconductor solar cell

NASA Technical Reports Server (NTRS)

Fonash, S. J.

1976-01-01

The advantages possible with the insertion of a thin-film insulating or semi-insulating layer between a metal and a semiconductor to form the MIS photovoltaic device have been presented previously in the literature. This MIS configuration may be considered as a specific example of a more general class of photovoltaic devices: electrode-thin-film-insulator-semiconductor devices. Since the advantages of the configuration were pointed out, there has been considerable experimental interest in these photovoltaic devices. Because the previous analysis showed that the introduction of the insulator layer could produce several different but advantageous effects, this paper presents a further outline giving a comparison of these effects together with their ramifications.

A comprehensive study of charge trapping in organic field-effect devices with promising semiconductors and different contact metals by displacement current measurements

NASA Astrophysics Data System (ADS)

Bisoyi, Sibani; Rödel, Reinhold; Zschieschang, Ute; Kang, Myeong Jin; Takimiya, Kazuo; Klauk, Hagen; Tiwari, Shree Prakash

2016-02-01

A systematic and comprehensive study on the charge-carrier injection and trapping behavior was performed using displacement current measurements in long-channel capacitors based on four promising small-molecule organic semiconductors (pentacene, DNTT, C10-DNTT and DPh-DNTT). In thin-film transistors, these semiconductors showed charge-carrier mobilities ranging from 1.0 to 7.8 cm2 V-1 s-1. The number of charges injected into and extracted from the semiconductor and the density of charges trapped in the device during each measurement were calculated from the displacement current characteristics and it was found that the density of trapped charges is very similar in all devices and of the order 1012 cm-2, despite the fact that the four semiconductors show significantly different charge-carrier mobilities. The choice of the contact metal (Au, Ag, Cu, Pd) was also found to have no significant effect on the trapping behavior.

An Ultrathin Single Crystalline Relaxor Ferroelectric Integrated on a High Mobility Semiconductor.

PubMed

Moghadam, Reza M; Xiao, Zhiyong; Ahmadi-Majlan, Kamyar; Grimley, Everett D; Bowden, Mark; Ong, Phuong-Vu; Chambers, Scott A; Lebeau, James M; Hong, Xia; Sushko, Peter V; Ngai, Joseph H

2017-10-11

The epitaxial growth of multifunctional oxides on semiconductors has opened a pathway to introduce new functionalities to semiconductor device technologies. In particular, the integration of gate materials that enable nonvolatile or hysteretic functionality in field-effect transistors could lead to device technologies that consume less power or allow for novel modalities in computing. Here we present electrical characterization of ultrathin single crystalline SrZr x Ti 1-x O 3 (x = 0.7) films epitaxially grown on a high mobility semiconductor, Ge. Epitaxial films of SrZr x Ti 1-x O 3 exhibit relaxor behavior, characterized by a hysteretic polarization that can modulate the surface potential of Ge. We find that gate layers as thin as 5 nm corresponding to an equivalent-oxide thickness of just 1.0 nm exhibit a ∼2 V hysteretic window in the capacitance-voltage characteristics. The development of hysteretic metal-oxide-semiconductor capacitors with nanoscale gate thicknesses opens new vistas for nanoelectronic devices.

Researchers Validate UV Light's Use in Improving Semiconductors | News |

Science.gov Websites

device. The ability to use different classes of semiconductors could create additional possibilities for integrating a variety of different semiconductors in the future," Park said. The researchers explored

First-principles calculations reveal controlling principles for carrier mobilities in semiconductors

DOE PAGES

Wu, Yu -Ning; Zhang, Xiaoguang; Pantelides, Sokrates T.; ...

2016-10-11

It has long been believed that carrier mobilities in semiconductors can be calculated by Fermi s golden rule (Born approximation). Phenomenological models for scattering amplitudes are typically used for engineering- level device modeling. Here we introduce a parameter-free, first-principles approach based on complex- wavevector energy bands that does not invoke the Born approximation. We show that phonon-limited mobility is controlled by low-resistivity percolation paths and that in ionized-impurity scattering one must account for the effect of the screening charge, which cancels most of the Coulomb tail.Finally, calculated electron mobilities in silicon are in agreement with experimental data.

Models of second-order effects in metal-oxide-semiconductor field-effect transistors for computer applications

NASA Technical Reports Server (NTRS)

Benumof, Reuben; Zoutendyk, John; Coss, James

1988-01-01

Second-order effects in metal-oxide-semiconductor field-effect transistors (MOSFETs) are important for devices with dimensions of 2 microns or less. The short and narrow channel effects and drain-induced barrier lowering primarily affect threshold voltage, but formulas for drain current must also take these effects into account. In addition, the drain current is sensitive to channel length modulation due to pinch-off or velocity saturation and is diminished by electron mobility degradation due to normal and lateral electric fields in the channel. A model of a MOSFET including these considerations and emphasizing charge conservation is discussed.

78 FR 40427 - Foreign-Trade Zone (FTZ) 183-Austin, Texas; Notification of Proposed Production Activity; Samsung...

Federal Register 2010, 2011, 2012, 2013, 2014

2013-07-05

..., Texas; Notification of Proposed Production Activity; Samsung Austin Semiconductor, LLC (Semiconductors); Austin, Texas Samsung Austin Semiconductor, LLC (Samsung), operator of Subzone 183B, submitted a... June 26, 2013. Samsung currently has authority to produce semiconductor memory devices for export...

Semiconductor Laser Low Frequency Noise Characterization

NASA Technical Reports Server (NTRS)

Maleki, Lute; Logan, Ronald T.

1996-01-01

This work summarizes the efforts in identifying the fundamental noise limit in semiconductor optical sources (lasers) to determine the source of 1/F noise and it's associated behavior. In addition, the study also addresses the effects of this 1/F noise on RF phased arrays. The study showed that the 1/F noise in semiconductor lasers has an ultimate physical limit based upon similar factors to fundamental noise generated in other semiconductor and solid state devices. The study also showed that both additive and multiplicative noise can be a significant detriment to the performance of RF phased arrays especially in regard to very low sidelobe performance and ultimate beam steering accuracy. The final result is that a noise power related term must be included in a complete analysis of the noise spectrum of any semiconductor device including semiconductor lasers.

Method for altering the luminescence of a semiconductor

DOEpatents

Barbour, J. Charles; Dimos, Duane B.

1999-01-01

A method is described for altering the luminescence of a light emitting semiconductor (LES) device. In particular, a method is described whereby a silicon LES device can be selectively irradiated with a radiation source effective for altering the intensity of luminescence of the irradiated region.

Power semiconductor device with negative thermal feedback

NASA Technical Reports Server (NTRS)

Borky, J. M.; Thornton, R. D.

1970-01-01

Composite power semiconductor avoids second breakdown and provides stable operation. It consists of an array of parallel-connected integrated circuits fabricated in a single chip. The output power device and associated low-level amplifier are closely coupled thermally, so that they have a predetermined temperature relationship.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Moghadam, Reza M.; Xiao, Zhiyong; Ahmadi-Majlan, Kamyar

The epitaxial growth of multifunctional oxides on semiconductors has opened a pathway to introduce new functionalities to semiconductor device technologies. In particular, ferroelectric materials integrated on semiconductors could lead to low-power field-effect devices that can be used for logic or memory. Essential to realizing such field-effect devices is the development of ferroelectric metal-oxide-semiconductor (MOS) capacitors, in which the polarization of a ferroelectric gate is coupled to the surface potential of a semiconducting channel. Here we demonstrate that ferroelectric MOS capacitors can be realized using single crystalline SrZrxTi1-xO3 (x= 0.7) that has been epitaxially grown on Ge. We find that themore » ferroelectric properties of SrZrxTi1-xO3 are exceptionally robust, as gate layers as thin as 5 nm give rise to hysteretic capacitance-voltage characteristics that are 2 V in width. The development of ferroelectric MOS capacitors with gate thicknesses that are technologically relevant opens a pathway to realize scalable ferroelectric field-effect devices.« less

Methods of measurement for semiconductor materials, process control, and devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1973-01-01

This progress report describes NBS activities directed toward the development of methods of measurement for semiconductor materials, process control, and devices. Significant accomplishments during this reporting period include design of a plan to provide standard silicon wafers for four-probe resistivity measurements for the industry, publication of a summary report on the photoconductive decay method for measuring carrier lifetime, publication of a comprehensive review of the field of wire bond fabrication and testing, and successful completion of organizational activity leading to the establishment of a new group on quality and hardness assurance in ASTM Committee F-1 on Electronics. Work is continuing on measurement of resistivity of semiconductor crystals; characterization of generation-recombination-trapping centers in silicon; study of gold-doped silicon; development of the infrared response technique; evaluation of wire bonds and die attachment; and measurement of thermal properties of semiconductor devices, delay time and related carrier transport properties in junction devices, and noise properties of microwave diodes.

Single photon detection with self-quenching multiplication

NASA Technical Reports Server (NTRS)

Zheng, Xinyu (Inventor); Cunningham, Thomas J. (Inventor); Pain, Bedabrata (Inventor)

2011-01-01

A photoelectronic device and an avalanche self-quenching process for a photoelectronic device are described. The photoelectronic device comprises a nanoscale semiconductor multiplication region and a nanoscale doped semiconductor quenching structure including a depletion region and an undepletion region. The photoelectronic device can act as a single photon detector or a single carrier multiplier. The avalanche self-quenching process allows electrical field reduction in the multiplication region by movement of the multiplication carriers, thus quenching the avalanche.

A full time-domain approach to spatio-temporal dynamics of semiconductor lasers. II. Spatio-temporal dynamics

NASA Astrophysics Data System (ADS)

Böhringer, Klaus; Hess, Ortwin

The spatio-temporal dynamics of novel semiconductor lasers is discussed on the basis of a space- and momentum-dependent full time-domain approach. To this means the space-, time-, and momentum-dependent Full-Time Domain Maxwell Semiconductor Bloch equations, derived and discussed in our preceding paper I [K. Böhringer, O. Hess, A full time-domain approach to spatio-temporal dynamics of semiconductor lasers. I. Theoretical formulation], are solved by direct numerical integration. Focussing on the device physics of novel semiconductor lasers that profit, in particular, from recent advances in nanoscience and nanotechnology, we discuss the examples of photonic band edge surface emitting lasers (PBE-SEL) and semiconductor disc lasers (SDLs). It is demonstrated that photonic crystal effects can be obtained for finite crystal structures, and leading to a significant improvement in laser performance such as reduced lasing thresholds. In SDLs, a modern device concept designed to increase the power output of surface-emitters in combination with near-diffraction-limited beam quality, we explore the complex interplay between the intracavity optical fields and the quantum well gain material in SDL structures. Our simulations reveal the dynamical balance between carrier generation due to pumping into high energy states, momentum relaxation of carriers, and stimulated recombination from states near the band edge. Our full time-domain approach is shown to also be an excellent framework for the modelling of the interaction of high-intensity femtosecond and picosecond pulses with semiconductor nanostructures. It is demonstrated that group velocity dispersion, dynamical gain saturation and fast self-phase modulation (SPM) are the main causes for the induced changes and asymmetries in the amplified pulse shape and spectrum of an ultrashort high-intensity pulse. We attest that the time constants of the intraband scattering processes are critical to gain recovery. Moreover, we present new insight into the physics of nonlinear coherent pulse propagation phenomena in active (semiconductor) gain media. Our numerical full time-domain simulations are shown to generally agree well with analytical predictions, while in the case of optical pulses with large pulse areas or few-cycle pulses they reveal the limits of analytic approaches. Finally, it is demonstrated that coherent ultrafast nonlinear propagation effects become less distinctive if we apply a realistic model of the quantum well semiconductor gain material, consider characteristic loss channels and take into account de-phasing processes and homogeneous broadening.

Investigation of semiconductor clad optical waveguides

NASA Technical Reports Server (NTRS)

Batchman, T. E.; Carson, R. F.

1985-01-01

A variety of techniques have been proposed for fabricating integrated optical devices using semiconductors, lithium niobate, and glasses as waveguides and substrates. The use of glass waveguides and their interaction with thin semiconductor cladding layers was studied. Though the interactions of these multilayer waveguide structures have been analyzed here using glass, they may be applicable to other types of materials as well. The primary reason for using glass is that it provides a simple, inexpensive way to construct waveguides and devices.

Rocksalt nitride metal/semiconductor superlattices: A new class of artificially structured materials

NASA Astrophysics Data System (ADS)

Saha, Bivas; Shakouri, Ali; Sands, Timothy D.

2018-06-01

Artificially structured materials in the form of superlattice heterostructures enable the search for exotic new physics and novel device functionalities, and serve as tools to push the fundamentals of scientific and engineering knowledge. Semiconductor heterostructures are the most celebrated and widely studied artificially structured materials, having led to the development of quantum well lasers, quantum cascade lasers, measurements of the fractional quantum Hall effect, and numerous other scientific concepts and practical device technologies. However, combining metals with semiconductors at the atomic scale to develop metal/semiconductor superlattices and heterostructures has remained a profoundly difficult scientific and engineering challenge. Though the potential applications of metal/semiconductor heterostructures could range from energy conversion to photonic computing to high-temperature electronics, materials challenges primarily had severely limited progress in this pursuit until very recently. In this article, we detail the progress that has taken place over the last decade to overcome the materials engineering challenges to grow high quality epitaxial, nominally single crystalline metal/semiconductor superlattices based on transition metal nitrides (TMN). The epitaxial rocksalt TiN/(Al,Sc)N metamaterials are the first pseudomorphic metal/semiconductor superlattices to the best of our knowledge, and their physical properties promise a new era in superlattice physics and device engineering.

Frequency and time domain studies of magneto-transport and charge trapping in amorphous organic semiconductors

NASA Astrophysics Data System (ADS)

Rybicki, James Edward

The focus of this thesis is a recently discovered organic magnetoresistance (OMAR) whose underlying mechanism remains much debated. As an introduction, the field of organic electronic is briefly discussed focusing mainly on organic light emitting diodes, the devices in which OMAR was first discovered. Important findings related to OMAR from prior work are highlighted and several proposed models for the underlying mechanism are discussed. The frequency dependence of OMAR along with capacitance spectroscopy are studied to help distinguish between proposed models. The limit frequency for OMAR devices is obtained. Magnetic field dependent time-of-flight spectroscopy is used to determine whether applied magnetic fields modify the photocarrier generation efficiency in OMAR devices, their mobility, or both. These results are used to compare the bipolaron model and the triplet-polaron scattering mechanism. As it is generally agreed that OMAR is a spintronic effect, the role of spin-orbit coupling in polymers was studied to help understand its importance in the spin-transport of organic semiconductors. The possibility of spin-orbit induced spin precession is examined and a phonon assisted spin-flip process is proposed. We show OMAR may be enhanced by exposure to x-ray radiation. This is shown to be related to the production of traps. The effect on other device characteristics including turn-voltage and quantum efficiency is also examined. The role of trap production in enhancing OMAR is explained using the biopolaron model.

Methods for forming particles from single source precursors

DOEpatents

Fox, Robert V [Idaho Falls, ID; Rodriguez, Rene G [Pocatello, ID; Pak, Joshua [Pocatello, ID

2011-08-23

Single source precursors are subjected to carbon dioxide to form particles of material. The carbon dioxide may be in a supercritical state. Single source precursors also may be subjected to supercritical fluids other than supercritical carbon dioxide to form particles of material. The methods may be used to form nanoparticles. In some embodiments, the methods are used to form chalcopyrite materials. Devices such as, for example, semiconductor devices may be fabricated that include such particles. Methods of forming semiconductor devices include subjecting single source precursors to carbon dioxide to form particles of semiconductor material, and establishing electrical contact between the particles and an electrode.

Integrated semiconductor optical sensors for chronic, minimally-invasive imaging of brain function.

PubMed

Lee, Thomas T; Levi, Ofer; Cang, Jianhua; Kaneko, Megumi; Stryker, Michael P; Smith, Stephen J; Shenoy, Krishna V; Harris, James S

2006-01-01

Intrinsic optical signal (IOS) imaging is a widely accepted technique for imaging brain activity. We propose an integrated device consisting of interleaved arrays of gallium arsenide (GaAs) based semiconductor light sources and detectors operating at telecommunications wavelengths in the near-infrared. Such a device will allow for long-term, minimally invasive monitoring of neural activity in freely behaving subjects, and will enable the use of structured illumination patterns to improve system performance. In this work we describe the proposed system and show that near-infrared IOS imaging at wavelengths compatible with semiconductor devices can produce physiologically significant images in mice, even through skull.

Semiconductor technology program: Progress briefs

NASA Technical Reports Server (NTRS)

Galloway, K. F.; Scace, R. I.; Walters, E. J.

1981-01-01

Measurement technology for semiconductor materials, process control, and devices, is discussed. Silicon and silicon based devices are emphasized. Highlighted activities include semiinsulating GaAs characterization, an automatic scanning spectroscopic ellipsometer, linewidth measurement and coherence, bandgap narrowing effects in silicon, the evaluation of electrical linewidth uniformity, and arsenicomplanted profiles in silicon.

Method for altering the luminescence of a semiconductor

DOEpatents

Barbour, J.C.; Dimos, D.B.

1999-01-12

A method is described for altering the luminescence of a light emitting semiconductor (LES) device. In particular, a method is described whereby a silicon LES device can be selectively irradiated with a radiation source effective for altering the intensity of luminescence of the irradiated region. 4 figs.

General Electronics Technician: Semiconductor Devices and Circuits.

ERIC Educational Resources Information Center

Hilley, Robert

These instructional materials include a teacher's guide designed to assist instructors in organizing and presenting an introductory course in general electronics focusing on semiconductor devices and circuits and a student guide. The materials are based on the curriculum-alignment concept of first stating the objectives, developing instructional…

Simulation of Devices with Molecular Potentials

DTIC Science & Technology

2013-12-22

10] W. R. Frensley, Wigner - function model of a resonant-tunneling semiconductor de- vice, Phys. Rev. B, 36 (1987), pp. 1570–1580. 6 [11] M. J...develop the principal investigator’s Wigner -Poisson code and extend that code to deal with longer devices and more complex barrier profiles. Over...Research Triangle Park, NC 27709-2211 Molecular Confirmation, Sparse Interpolation, Wigner -Poisson Equation, Parallel Algorithms REPORT DOCUMENTATION PAGE 11

Crystal step edges can trap electrons on the surfaces of n-type organic semiconductors.

PubMed

He, Tao; Wu, Yanfei; D'Avino, Gabriele; Schmidt, Elliot; Stolte, Matthias; Cornil, Jérôme; Beljonne, David; Ruden, P Paul; Würthner, Frank; Frisbie, C Daniel

2018-05-30

Understanding relationships between microstructure and electrical transport is an important goal for the materials science of organic semiconductors. Combining high-resolution surface potential mapping by scanning Kelvin probe microscopy (SKPM) with systematic field effect transport measurements, we show that step edges can trap electrons on the surfaces of single crystal organic semiconductors. n-type organic semiconductor crystals exhibiting positive step edge surface potentials display threshold voltages that increase and carrier mobilities that decrease with increasing step density, characteristic of trapping, whereas crystals that do not have positive step edge surface potentials do not have strongly step density dependent transport. A device model and microelectrostatics calculations suggest that trapping can be intrinsic to step edges for crystals of molecules with polar substituents. The results provide a unique example of a specific microstructure-charge trapping relationship and highlight the utility of surface potential imaging in combination with transport measurements as a productive strategy for uncovering microscopic structure-property relationships in organic semiconductors.

Performance of an MPI-only semiconductor device simulator on a quad socket/quad core InfiniBand platform.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shadid, John Nicolas; Lin, Paul Tinphone

2009-01-01

This preliminary study considers the scaling and performance of a finite element (FE) semiconductor device simulator on a capacity cluster with 272 compute nodes based on a homogeneous multicore node architecture utilizing 16 cores. The inter-node communication backbone for this Tri-Lab Linux Capacity Cluster (TLCC) machine is comprised of an InfiniBand interconnect. The nonuniform memory access (NUMA) nodes consist of 2.2 GHz quad socket/quad core AMD Opteron processors. The performance results for this study are obtained with a FE semiconductor device simulation code (Charon) that is based on a fully-coupled Newton-Krylov solver with domain decomposition and multilevel preconditioners. Scaling andmore » multicore performance results are presented for large-scale problems of 100+ million unknowns on up to 4096 cores. A parallel scaling comparison is also presented with the Cray XT3/4 Red Storm capability platform. The results indicate that an MPI-only programming model for utilizing the multicore nodes is reasonably efficient on all 16 cores per compute node. However, the results also indicated that the multilevel preconditioner, which is critical for large-scale capability type simulations, scales better on the Red Storm machine than the TLCC machine.« less

Temperature effects in contacts between a metal and a semiconductor nanowire near the degenerate doping

NASA Astrophysics Data System (ADS)

Sun, Zhuting; Burgess, Tim; Tan, H. H.; Jagadish, Chennupati; Kogan, Andrei

2018-04-01

We have investigated the nonlinear conductance in diffusion-doped Si:GaAs nanowires contacted by patterned metal films in a wide range of temperatures T. The wire resistance R W and the zero bias resistance R C, dominated by the contacts, exhibit very different responses to temperature changes. While R W shows almost no dependence on T, R C varies by several orders of magnitude as the devices are cooled from room temperature to T = 5 K. We develop a model that employs a sharp donor level very low in the GaAs conduction band and show that our observations are consistent with the model predictions. We then demonstrate that such measurements can be used to estimate carrier properties in nanostructured semiconductors and obtain an estimate for N D, the doping density in our samples. We also discuss the effects of surface states and dielectric confinement on carrier density in semiconductor nanowires.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shi, Zhemin; Department of Physical Electronics, Tokyo Institute of Technology, 2-12-1 O-okayama, Meguro-ku, Tokyo 152-8552; Taguchi, Dai

The details of turnover process of spontaneous polarization and associated carrier motions in indium-tin oxide/poly-(vinylidene-trifluoroethylene)/pentacene/Au capacitor were analyzed by coupling displacement current measurement (DCM) and electric-field-induced optical second-harmonic generation (EFISHG) measurement. A model was set up from DCM results to depict the relationship between electric field in semiconductor layer and applied external voltage, proving that photo illumination effect on the spontaneous polarization process lied in variation of semiconductor conductivity. The EFISHG measurement directly and selectively probed the electric field distribution in semiconductor layer, modifying the model and revealing detailed carrier behaviors involving photo illumination effect, dipole reversal, and interfacial chargingmore » in the device. A further decrease of DCM current in the low voltage region under illumination was found as the result of illumination effect, and the result was argued based on the changing of the total capacitance of the double-layer capacitors.« less

Precise, Self-Limited Epitaxy of Ultrathin Organic Semiconductors and Heterojunctions Tailored by van der Waals Interactions.

PubMed

Wu, Bing; Zhao, Yinghe; Nan, Haiyan; Yang, Ziyi; Zhang, Yuhan; Zhao, Huijuan; He, Daowei; Jiang, Zonglin; Liu, Xiaolong; Li, Yun; Shi, Yi; Ni, Zhenhua; Wang, Jinlan; Xu, Jian-Bin; Wang, Xinran

2016-06-08

Precise assembly of semiconductor heterojunctions is the key to realize many optoelectronic devices. By exploiting the strong and tunable van der Waals (vdW) forces between graphene and organic small molecules, we demonstrate layer-by-layer epitaxy of ultrathin organic semiconductors and heterostructures with unprecedented precision with well-defined number of layers and self-limited characteristics. We further demonstrate organic p-n heterojunctions with molecularly flat interface, which exhibit excellent rectifying behavior and photovoltaic responses. The self-limited organic molecular beam epitaxy (SLOMBE) is generically applicable for many layered small-molecule semiconductors and may lead to advanced organic optoelectronic devices beyond bulk heterojunctions.

Microsensors based on GaN semiconductors covalently functionalized with luminescent Ru(II) complexes.

PubMed

López-Gejo, Juan; Arranz, Antonio; Navarro, Alvaro; Palacio, Carlos; Muñoz, Elías; Orellana, Guillermo

2010-02-17

Covalent tethering of a Ru(II) dye to gallium nitride surfaces has been accomplished as a key step in the development of innovative sensing devices in which the indicator support (semiconductor) plays the role of both support and excitation source. Luminescence emission decays and time-resolved emission spectra confirm the presence of the dye on the semiconductor surfaces, while X-ray photoelectron spectroscopy proves its covalent bonding. The O(2) sensitivity of the new device is comparable to those of other ruthenium-based sensor systems. This achievement paves the way to a new generation of integrable ultracompact microsensors that combine semiconductor emitter-probe assemblies.

Fabrication of optically reflecting ohmic contacts for semiconductor devices

DOEpatents

Sopori, Bhushan L.

1995-01-01

A method is provided to produce a low-resistivity ohmic contact having high optical reflectivity on one side of a semiconductor device. The contact is formed by coating the semiconductor substrate with a thin metal film on the back reflecting side and then optically processing the wafer by illuminating it with electromagnetic radiation of a predetermined wavelength and energy level through the front side of the wafer for a predetermined period of time. This method produces a thin epitaxial alloy layer between the semiconductor substrate and the metal layer when a crystalline substrate is used. The alloy layer provides both a low-resistivity ohmic contact and high optical reflectance.

Editorial

NASA Astrophysics Data System (ADS)

Bruzzi, Mara; Cartiglia, Nicolo; Pace, Emanuele; Talamonti, Cinzia

2015-10-01

The 10th edition of the International Conference on Radiation Effects on Semiconductor Materials, Detectors and Devices (RESMDD) was held in Florence, at Dipartimento di Fisica ed Astronomia on October 8-10, 2014. It has been aimed at discussing frontier research activities in several application fields as nuclear and particle physics, astrophysics, medical and solid-state physics. Main topics discussed in this conference concern performance of heavily irradiated silicon detectors, developments required for the luminosity upgrade of the Large Hadron Collider (HL-LHC), ultra-fast silicon detectors design and manufacturing, high-band gap semiconductor detectors, novel semiconductor-based devices for medical applications, radiation damage issues in semiconductors and related radiation-hardening technologies.

Controlled growth of larger heterojunction interface area for organic photosensitive devices

DOEpatents

Yang, Fan [Somerset, NJ; Forrest, Stephen R [Ann Arbor, MI

2009-12-29

An optoelectronic device and a method of fabricating a photosensitive optoelectronic device includes depositing a first organic semiconductor material on a first electrode to form a continuous first layer having protrusions, a side of the first layer opposite the first electrode having a surface area at least three times greater than an underlying lateral cross-sectional area; depositing a second organic semiconductor material directly on the first layer to form a discontinuous second layer, portions of the first layer remaining exposed; depositing a third organic semiconductor material directly on the second layer to form a discontinuous third layer, portions of at least the second layer remaining exposed; depositing a fourth organic semiconductor material on the third layer to form a continuous fourth layer, filling any exposed gaps and recesses in the first, second, and third layers; and depositing a second electrode on the fourth layer, wherein at least one of the first electrode and the second electrode is transparent, and the first and third organic semiconductor materials are both of a donor-type or an acceptor-type relative to second and fourth organic semiconductor materials, which are of the other material type.

Whatever happened to silicon carbide. [semiconductor devices

NASA Technical Reports Server (NTRS)

Campbell, R. B.

1981-01-01

The progress made in silicon carbide semiconductor devices in the 1955 to 1975 time frame is examined and reasons are given for the present lack of interest in the material. Its physical and chemical properties and methods of preparation are discussed. Fabrication techniques and the characteristics of silicon carbide devices are reviewed. It is concluded that a combination of economic factors and the lack of progress in fabrication techniques leaves no viable market for SiC devices in the near future.

Microscopic studies of the fate of charges in organic semiconductors: Scanning Kelvin probe measurements of charge trapping, transport, and electric fields in p- and n-type devices

NASA Astrophysics Data System (ADS)

Smieska, Louisa Marion

Organic semiconductors could have wide-ranging applications in lightweight, efficient electronic circuits. However, several fundamental questions regarding organic electronic device behavior have not yet been fully addressed, including the nature of chemical charge traps, and robust models for injection and transport. Many studies focus on engineering devices through bulk transport measurements, but it is not always possible to infer the microscopic behavior leading to the observed measurements. In this thesis, we present scanning-probe microscope studies of organic semiconductor devices in an effort to connect local properties with local device behavior. First, we study the chemistry of charge trapping in pentacene transistors. Working devices are doped with known pentacene impurities and the extent of charge trap formation is mapped across the transistor channel. Trap-clearing spectroscopy is employed to measure an excitation of the pentacene charge trap species, enabling identification of the degradationrelated chemical trap in pentacene. Second, we examine transport and trapping in peryelene diimide (PDI) transistors. Local mobilities are extracted from surface potential profiles across a transistor channel, and charge injection kinetics are found to be highly sensitive to electrode cleanliness. Trap-clearing spectra generally resemble PDI absorption spectra, but one derivative yields evidence indicating variation in trap-clearing mechanisms for different surface chemistries. Trap formation rates are measured and found to be independent of surface chemistry, contradicting a proposed silanol trapping mechanism. Finally, we develop a variation of scanning Kelvin probe microscopy that enables measurement of electric fields through a position modulation. This method avoids taking a numeric derivative of potential, which can introduce high-frequency noise into the electric field signal. Preliminary data is presented, and the theoretical basis for electric field noise in both methods is examined.

Metal-insulator-semiconductor heterostructures for plasmonic hot-carrier optoelectronics.

PubMed

García de Arquer, F Pelayo; Konstantatos, Gerasimos

2015-06-01

Plasmonic hot-electron devices are attractive candidates for light-energy harvesting and photodetection applications. For solid state devices, the most compact and straightforward architecture is the metal-semiconductor Schottky junction. However convenient, this structure introduces limitations such as the elevated dark current associated to thermionic emission, or constraints for device design due to the finite choice of materials. In this work we theoretically consider the metal-insulator-semiconductor heterojunction as a candidate for plasmonic hot-carrier photodetection and solar cells. The presence of the insulating layer can significantly reduce the dark current, resulting in increased device performance with predicted solar power conversion efficiencies up to 9%. For photodetection, the sensitivity can be extended well into the infrared by a judicious choice of the insulating layer, with up to 300-fold expected enhancement in detectivity.

Method to determine the position-dependant metal correction factor for dose-rate equivalent laser testing of semiconductor devices

DOEpatents

Horn, Kevin M.

2013-07-09

A method reconstructs the charge collection from regions beneath opaque metallization of a semiconductor device, as determined from focused laser charge collection response images, and thereby derives a dose-rate dependent correction factor for subsequent broad-area, dose-rate equivalent, laser measurements. The position- and dose-rate dependencies of the charge-collection magnitude of the device are determined empirically and can be combined with a digital reconstruction methodology to derive an accurate metal-correction factor that permits subsequent absolute dose-rate response measurements to be derived from laser measurements alone. Broad-area laser dose-rate testing can thereby be used to accurately determine the peak transient current, dose-rate response of semiconductor devices to penetrating electron, gamma- and x-ray irradiation.

High performance low voltage organic field effect transistors on plastic substrate for amplifier circuits

NASA Astrophysics Data System (ADS)

Houin, G.; Duez, F.; Garcia, L.; Cantatore, E.; Torricelli, F.; Hirsch, L.; Belot, D.; Pellet, C.; Abbas, M.

2016-09-01

The high performance air stable organic semiconductor small molecule dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT) was chosen as active layer for field effect transistors built to realize flexible amplifier circuits. Initial device on rigid Si/SiO2 substrate showed appreciable performance with hysteresis-free characteristics. A number of approaches were applied to simplify the process, improve device performance and decrease the operating voltage: they include an oxide interfacial layer to decrease contact resistance; a polymer passivation layer to optimize semiconductor/dielectric interface and an anodized high-k oxide as dielectric layer for low voltage operation. The devices fabricated on plastic substrate yielded excellent electrical characteristics, showing mobility of 1.6 cm2/Vs, lack of hysteresis, operation below 5 V and on/off current ratio above 105. An OFET model based on variable ranging hopping theory was used to extract the relevant parameters from the transfer and output characteristics, which enabled us to simulate our devices achieving reasonable agreement with the measurements

Ordered materials for organic electronics and photonics.

PubMed

O'Neill, Mary; Kelly, Stephen M

2011-02-01

We present a critical review of semiconducting/light emitting, liquid crystalline materials and their use in electronic and photonic devices such as transistors, photovoltaics, OLEDs and lasers. We report that annealing from the mesophase improves the order and packing of organic semiconductors to produce state-of-the-art transistors. We discuss theoretical models which predict how charge transport and light emission is affected by the liquid crystalline phase. Organic photovoltaics and OLEDs require optimization of both charge transport and optical properties and we identify the various trade-offs involved for ordered materials. We report the crosslinking of reactive mesogens to give pixellated full-colour OLEDs and distributed bi-layer photovoltaics. We show how the molecular organization inherent to the mesophase can control the polarization of light-emitting devices and the gain in organic, thin-film lasers and can also provide distributed feedback in chiral nematic mirrorless lasers. We update progress on the surface alignment of liquid crystalline semiconductors to obtain monodomain devices without defects or devices with spatially varying properties. Finally the significance of all of these developments is assessed. Copyright © 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Tunable molecular orientation and elevated thermal stability of vapor-deposited organic semiconductors

DOE PAGES

Dalal, Shakeel S.; Walters, Diane M.; Lyubimov, Ivan; ...

2015-03-23

Physical vapor deposition is commonly used to prepare organic glasses that serve as the active layers in light-emitting diodes, photovoltaics, and other devices. Recent work has shown that orienting the molecules in such organic semiconductors can significantly enhance device performance. In this paper, we apply a high-throughput characterization scheme to investigate the effect of the substrate temperature (T substrate) on glasses of three organic molecules used as semiconductors. The optical and material properties are evaluated with spectroscopic ellipsometry. We find that molecular orientation in these glasses is continuously tunable and controlled by T substrate/T g, where T g is themore » glass transition temperature. All three molecules can produce highly anisotropic glasses; the dependence of molecular orientation upon substrate temperature is remarkably similar and nearly independent of molecular length. All three compounds form “stable glasses” with high density and thermal stability, and have properties similar to stable glasses prepared from model glass formers. Simulations reproduce the experimental trends and explain molecular orientation in the deposited glasses in terms of the surface properties of the equilibrium liquid. Finally, by showing that organic semiconductors form stable glasses, these results provide an avenue for systematic performance optimization of active layers in organic electronics.« less

Conservation of quantum efficiency in quantum well intermixing by stress engineering with dielectric bilayers

NASA Astrophysics Data System (ADS)

Arslan, Seval; Demir, Abdullah; Şahin, Seval; Aydınlı, Atilla

2018-02-01

In semiconductor lasers, quantum well intermixing (QWI) with high selectivity using dielectrics often results in lower quantum efficiency. In this paper, we report on an investigation regarding the effect of thermally induced dielectric stress on the quantum efficiency of quantum well structures in impurity-free vacancy disordering (IFVD) process using photoluminescence and device characterization in conjunction with microscopy. SiO2 and Si x O2/SrF2 (versus SrF2) films were employed for the enhancement and suppression of QWI, respectively. Large intermixing selectivity of 75 nm (125 meV), consistent with the theoretical modeling results, with negligible effect on the suppression region characteristics, was obtained. Si x O2 layer compensates for the large thermal expansion coefficient mismatch of SrF2 with the semiconductor and mitigates the detrimental effects of SrF2 without sacrificing its QWI benefits. The bilayer dielectric approach dramatically improved the dielectric-semiconductor interface quality. Fabricated high power semiconductor lasers demonstrated high quantum efficiency in the lasing region using the bilayer dielectric film during the intermixing process. Our results reveal that stress engineering in IFVD is essential and the thermal stress can be controlled by engineering the dielectric strain opening new perspectives for QWI of photonic devices.

Progress in silicon carbide semiconductor technology

NASA Technical Reports Server (NTRS)

Powell, J. A.; Neudeck, P. G.; Matus, L. G.; Petit, J. B.

1992-01-01

Silicon carbide semiconductor technology has been advancing rapidly over the last several years. Advances have been made in boule growth, thin film growth, and device fabrication. This paper wi11 review reasons for the renewed interest in SiC, and will review recent developments in both crystal growth and device fabrication.

Spatially Mapping Energy Transfer from Single Plasmonic Particles to Semiconductor Substrates via STEM/EELS.

PubMed

Li, Guoliang; Cherqui, Charles; Bigelow, Nicholas W; Duscher, Gerd; Straney, Patrick J; Millstone, Jill E; Masiello, David J; Camden, Jon P

2015-05-13

Energy transfer from plasmonic nanoparticles to semiconductors can expand the available spectrum of solar energy-harvesting devices. Here, we spatially and spectrally resolve the interaction between single Ag nanocubes with insulating and semiconducting substrates using electron energy-loss spectroscopy, electrodynamics simulations, and extended plasmon hybridization theory. Our results illustrate a new way to characterize plasmon-semiconductor energy transfer at the nanoscale and bear impact upon the design of next-generation solar energy-harvesting devices.

Programme and Abstracts. Workshop on Expert Evaluation and Control of Compound Semiconductor Materials and Technologies (1st) Held in Ecole Centrale De Lyon, France on 19 -22 May 1992. (EXAMTEC’ 92)

DTIC Science & Technology

1992-05-22

Evaluation and Control of Compound Semiconductor Materials and Technologies (EXMATEC󈨠) at Ecole Centrale de Lyon (Ecully, France, 19th to 22nd May...semiconductor technologies to manufacture advanced devices with improved reproducibility, better reliability and lower cost. -’Device structures...concepts are required for expert evaluation and control of still developing technologies . In this context, the EXMATEC series will constitute a major

Photovoltaic Device Including A Boron Doping Profile In An I-Type Layer

DOEpatents

Yang, Liyou

1993-10-26

A photovoltaic cell for use in a single junction or multijunction photovoltaic device, which includes a p-type layer of a semiconductor compound including silicon, an i-type layer of an amorphous semiconductor compound including silicon, and an n-type layer of a semiconductor compound including silicon formed on the i-type layer. The i-type layer including an undoped first sublayer formed on the p-type layer, and a boron-doped second sublayer formed on the first sublayer.

Organic semiconductor crystals.

PubMed

Wang, Chengliang; Dong, Huanli; Jiang, Lang; Hu, Wenping

2018-01-22

Organic semiconductors have attracted a lot of attention since the discovery of highly doped conductive polymers, due to the potential application in field-effect transistors (OFETs), light-emitting diodes (OLEDs) and photovoltaic cells (OPVs). Single crystals of organic semiconductors are particularly intriguing because they are free of grain boundaries and have long-range periodic order as well as minimal traps and defects. Hence, organic semiconductor crystals provide a powerful tool for revealing the intrinsic properties, examining the structure-property relationships, demonstrating the important factors for high performance devices and uncovering fundamental physics in organic semiconductors. This review provides a comprehensive overview of the molecular packing, morphology and charge transport features of organic semiconductor crystals, the control of crystallization for achieving high quality crystals and the device physics in the three main applications. We hope that this comprehensive summary can give a clear picture of the state-of-art status and guide future work in this area.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gelinck, G. H., E-mail: Gerwin.Gelinck@tno.nl; Department of Applied Physics, Eindhoven University of Technology, P.O. Box 513, 5600 MB Eindhoven; Breemen, A. J. J. M. van

Ferroelectric polarization switching of poly(vinylidene difluoride-trifluoroethylene) is investigated in different thin-film device structures, ranging from simple capacitors to dual-gate thin-film transistors (TFT). Indium gallium zinc oxide, a high mobility amorphous oxide material, is used as semiconductor. We find that the ferroelectric can be polarized in both directions in the metal-ferroelectric-semiconductor (MFS) structure and in the dual-gate TFT under certain biasing conditions, but not in the single-gate thin-film transistors. These results disprove the common belief that MFS structures serve as a good model system for ferroelectric polarization switching in thin-film transistors.

Device having two optical ports for switching applications

DOEpatents

Rosen, Ayre; Stabile, Paul J.

1991-09-24

A two-sided light-activatable semiconductor switch device having an optical port on each side thereof. The semiconductor device may be a p-i-n diode or of bulk intrinsic material. A two ported p-i-n diode, reverse-biased to "off" by a 1.3 kV dc power supply, conducted 192 A when activated by two 1 kW laser diode arrays, one for each optical port.

Comprehensive capacitance-voltage analysis including quantum effects for high-k interfaces on germanium and other alternative channel materials

NASA Astrophysics Data System (ADS)

Anwar, Sarkar R. M.

High mobility alternative channel materials to silicon are critical to the continued scaling of metal oxide semiconductor (MOS) devices. However, before they can be incorporated into advanced devices, some major issues need to be solved. The high mobility materials suffer from lower allowable thermal budgets compared to Si (before desorption and defect formation becomes an issue) and the absence of a good quality native oxide has further increased the interest in the use of high-k dielectrics. However, the high interface state density and high electric fields at these semiconductor/high-k interfaces can significantly impact the capacitance-voltage (C-V) profile, and current C-V modeling software cannot account for these effects. This in turn affects the parameters extracted from the C-V data of the high mobility semiconductor/high-k interface, which are crucial to fully understand the interface properties and expedite process development. To address this issue, we developed a model which takes into account quantum corrections which can be applied to a number of these alternative channel materials including SixGe1-x, Ge, InGaAs, and GaAs. The C-V simulation using this QM correction model is orders of magnitude faster compared to a full band Schrodinger-Poisson solver. The simulated C-V is directly benchmarked to a self consistent Schrodinger-Poisson solution for each bulk semiconductor material, and from the benchmarking process the QM correction parameters are extracted. The full program, C-V Alternative Channel Extraction (CV ACE), incorporates a quantum mechanical correction model, along with the interface state density model, and can extract device parameters such as equivalent oxide thickness (EOT), doping density and flat band voltage (Vfb) as well as the interface state density profile using multiple measurements performed at different frequencies and temperatures, simultaneously. The program was used to analyze experimentally measured C-V profiles and the extracted device parameters show excellent agreement with the known device structure and previously published results. CV ACE has been applied in the development of a process flow for germanium interface passivation in Ge based MOS devices using a GeOx interlayer. A post atomic layer deposition (ALD) plasma oxidation (PPO) process was developed using radio frequency (RF) plasma in a plasma enhanced chemical vapor deposition (PECVD) chamber and demonstrated significant surface passivation. Various gases were investigated and 1% O2/Ar was found to reduce the growth rate and provide excellent control over the degradation of EOT. A 100 W plasma with 1% O2/Ar was found to provide the best combination of EOT and low Dit and is concluded to be the optimum process for PPO of germanium surfaces. CV ACE and PPO were also utilized to investigate other process development challenges. A study of the impact of low temperature anneals on Ge-based MOS devices was found to result in a degradation of the electrical thickness and a change in fixed charge, indicating that the process window is very narrow and at much lower temperatures than for Si.

Implantable biomedical devices on bioresorbable substrates

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rogers, John A; Kim, Dae-Hyeong; Omenetto, Fiorenzo

Provided herein are implantable biomedical devices, methods of administering implantable biomedical devices, methods of making implantable biomedical devices, and methods of using implantable biomedical devices to actuate a target tissue or sense a parameter associated with the target tissue in a biological environment. Each implantable biomedical device comprises a bioresorbable substrate, an electronic device having a plurality of inorganic semiconductor components supported by the bioresorbable substrate, and a barrier layer encapsulating at least a portion of the inorganic semiconductor components. Upon contact with a biological environment the bioresorbable substrate is at least partially resorbed, thereby establishing conformal contact between themore » implantable biomedical device and the target tissue in the biological environment.« less

Electronic structure and relative stability of the coherent and semi-coherent HfO2/III-V interfaces

NASA Astrophysics Data System (ADS)

Lahti, A.; Levämäki, H.; Mäkelä, J.; Tuominen, M.; Yasir, M.; Dahl, J.; Kuzmin, M.; Laukkanen, P.; Kokko, K.; Punkkinen, M. P. J.

2018-01-01

III-V semiconductors are prominent alternatives to silicon in metal oxide semiconductor devices. Hafnium dioxide (HfO2) is a promising oxide with a high dielectric constant to replace silicon dioxide (SiO2). The potentiality of the oxide/III-V semiconductor interfaces is diminished due to high density of defects leading to the Fermi level pinning. The character of the harmful defects has been intensively debated. It is very important to understand thermodynamics and atomic structures of the interfaces to interpret experiments and design methods to reduce the defect density. Various realistic gap defect state free models for the HfO2/III-V(100) interfaces are presented. Relative energies of several coherent and semi-coherent oxide/III-V semiconductor interfaces are determined for the first time. The coherent and semi-coherent interfaces represent the main interface types, based on the Ga-O bridges and As (P) dimers, respectively.

Electrons and Phonons in Semiconductor Multilayers

NASA Astrophysics Data System (ADS)

Ridley, B. K.

1996-11-01

This book provides a detailed description of the quantum confinement of electrons and phonons in semiconductor wells, superlattices and quantum wires, and shows how this affects their mutual interactions. It discusses the transition from microscopic to continuum models, emphasizing the use of quasi-continuum theory to describe the confinement of optical phonons and electrons. The hybridization of optical phonons and their interactions with electrons are treated, as are other electron scattering mechanisms. The book concludes with an account of the electron distribution function in three-, two- and one-dimensional systems, in the presence of electrical or optical excitation. This text will be of great use to graduate students and researchers investigating low-dimensional semiconductor structures, as well as to those developing new devices based on these systems.

Electro-Thermo-Mechanical Transient Modeling of Stress Development in AlGaN/GaN High Electron Mobility Transistors (HEMTs) (Postprint)

DTIC Science & Technology

2014-02-01

Applied Drain Voltage Ids Drain-to-Source current MPa Megapascals σxx x-Component of Stress INTRODUCTION Gallium nitride (GaN) based high electron...the thermodynamic model to obtain the current densities within a semiconductor device. In doing so, it is possible to determine the electric

Defect Characterization, Imaging, and Control in Wide-Bandgap Semiconductors and Devices

NASA Astrophysics Data System (ADS)

Brillson, L. J.; Foster, G. M.; Cox, J.; Ruane, W. T.; Jarjour, A. B.; Gao, H.; von Wenckstern, H.; Grundmann, M.; Wang, B.; Look, D. C.; Hyland, A.; Allen, M. W.

2018-03-01

Wide-bandgap semiconductors are now leading the way to new physical phenomena and device applications at nanoscale dimensions. The impact of defects on the electronic properties of these materials increases as their size decreases, motivating new techniques to characterize and begin to control these electronic states. Leading these advances have been the semiconductors ZnO, GaN, and related materials. This paper highlights the importance of native point defects in these semiconductors and describes how a complement of spatially localized surface science and spectroscopy techniques in three dimensions can characterize, image, and begin to control these electronic states at the nanoscale. A combination of characterization techniques including depth-resolved cathodoluminescence spectroscopy, surface photovoltage spectroscopy, and hyperspectral imaging can describe the nature and distribution of defects at interfaces at both bulk and nanoscale surfaces, their metal interfaces, and inside nanostructures themselves. These features as well as temperature and mechanical strain inside wide-bandgap device structures at the nanoscale can be measured even while these devices are operating. These advanced capabilities enable several new directions for describing defects at the nanoscale, showing how they contribute to device degradation, and guiding growth processes to control them.

Two-Dimensional Semiconductor Optoelectronics Based on van der Waals Heterostructures.

PubMed

Lee, Jae Yoon; Shin, Jun-Hwan; Lee, Gwan-Hyoung; Lee, Chul-Ho

2016-10-27

Two-dimensional (2D) semiconductors such as transition metal dichalcogenides (TMDCs) and black phosphorous have drawn tremendous attention as an emerging optical material due to their unique and remarkable optical properties. In addition, the ability to create the atomically-controlled van der Waals (vdW) heterostructures enables realizing novel optoelectronic devices that are distinct from conventional bulk counterparts. In this short review, we first present the atomic and electronic structures of 2D semiconducting TMDCs and their exceptional optical properties, and further discuss the fabrication and distinctive features of vdW heterostructures assembled from different kinds of 2D materials with various physical properties. We then focus on reviewing the recent progress on the fabrication of 2D semiconductor optoelectronic devices based on vdW heterostructures including photodetectors, solar cells, and light-emitting devices. Finally, we highlight the perspectives and challenges of optoelectronics based on 2D semiconductor heterostructures.

Flat-lying semiconductor-insulator interfacial layer in DNTT thin films.

PubMed

Jung, Min-Cherl; Leyden, Matthew R; Nikiforov, Gueorgui O; Lee, Michael V; Lee, Han-Koo; Shin, Tae Joo; Takimiya, Kazuo; Qi, Yabing

2015-01-28

The molecular order of organic semiconductors at the gate dielectric is the most critical factor determining carrier mobility in thin film transistors since the conducting channel forms at the dielectric interface. Despite its fundamental importance, this semiconductor-insulator interface is not well understood, primarily because it is buried within the device. We fabricated dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT) thin film transistors by thermal evaporation in vacuum onto substrates held at different temperatures and systematically correlated the extracted charge mobility to the crystal grain size and crystal orientation. As a result, we identify a molecular layer of flat-lying DNTT molecules at the semiconductor-insulator interface. It is likely that such a layer might form in other material systems as well, and could be one of the factors reducing charge transport. Controlling this interfacial flat-lying layer may raise the ultimate possible device performance for thin film devices.

Two-Dimensional Semiconductor Optoelectronics Based on van der Waals Heterostructures

PubMed Central

Lee, Jae Yoon; Shin, Jun-Hwan; Lee, Gwan-Hyoung; Lee, Chul-Ho

2016-01-01

Two-dimensional (2D) semiconductors such as transition metal dichalcogenides (TMDCs) and black phosphorous have drawn tremendous attention as an emerging optical material due to their unique and remarkable optical properties. In addition, the ability to create the atomically-controlled van der Waals (vdW) heterostructures enables realizing novel optoelectronic devices that are distinct from conventional bulk counterparts. In this short review, we first present the atomic and electronic structures of 2D semiconducting TMDCs and their exceptional optical properties, and further discuss the fabrication and distinctive features of vdW heterostructures assembled from different kinds of 2D materials with various physical properties. We then focus on reviewing the recent progress on the fabrication of 2D semiconductor optoelectronic devices based on vdW heterostructures including photodetectors, solar cells, and light-emitting devices. Finally, we highlight the perspectives and challenges of optoelectronics based on 2D semiconductor heterostructures. PMID:28335321

Achieving Optimal Self-Adaptivity for Dynamic Tuning of Organic Semiconductors through Resonance Engineering.

PubMed

Tao, Ye; Xu, Lijia; Zhang, Zhen; Chen, Runfeng; Li, Huanhuan; Xu, Hui; Zheng, Chao; Huang, Wei

2016-08-03

Current static-state explorations of organic semiconductors for optimal material properties and device performance are hindered by limited insights into the dynamically changed molecular states and charge transport and energy transfer processes upon device operation. Here, we propose a simple yet successful strategy, resonance variation-based dynamic adaptation (RVDA), to realize optimized self-adaptive properties in donor-resonance-acceptor molecules by engineering the resonance variation for dynamic tuning of organic semiconductors. Organic light-emitting diodes hosted by these RVDA materials exhibit remarkably high performance, with external quantum efficiencies up to 21.7% and favorable device stability. Our approach, which supports simultaneous realization of dynamically adapted and selectively enhanced properties via resonance engineering, illustrates a feasible design map for the preparation of smart organic semiconductors capable of dynamic structure and property modulations, promoting the studies of organic electronics from static to dynamic.

Exchanging Ohmic Losses in Metamaterial Absorbers with Useful Optical Absorption for Photovoltaics

PubMed Central

Vora, Ankit; Gwamuri, Jephias; Pala, Nezih; Kulkarni, Anand; Pearce, Joshua M.; Güney, Durdu Ö.

2014-01-01

Using metamaterial absorbers, we have shown that metallic layers in the absorbers do not necessarily constitute undesired resistive heating problem for photovoltaics. Tailoring the geometric skin depth of metals and employing the natural bulk absorbance characteristics of the semiconductors in those absorbers can enable the exchange of undesired resistive losses with the useful optical absorbance in the active semiconductors. Thus, Ohmic loss dominated metamaterial absorbers can be converted into photovoltaic near-perfect absorbers with the advantage of harvesting the full potential of light management offered by the metamaterial absorbers. Based on experimental permittivity data for indium gallium nitride, we have shown that between 75%–95% absorbance can be achieved in the semiconductor layers of the converted metamaterial absorbers. Besides other metamaterial and plasmonic devices, our results may also apply to photodectors and other metal or semiconductor based optical devices where resistive losses and power consumption are important pertaining to the device performance. PMID:24811322

Modeling, design, fabrication and experimentation of a GaN-based, 63Ni betavoltaic battery

NASA Astrophysics Data System (ADS)

E Munson, C., IV; Gaimard, Q.; Merghem, K.; Sundaram, S.; Rogers, D. J.; de Sanoit, J.; Voss, P. L.; Ramdane, A.; Salvestrini, J. P.; Ougazzaden, A.

2018-01-01

GaN is a durable, radiation hard and wide-bandgap semiconductor material, making it ideal for usage with betavoltaic batteries. This paper describes the design, fabrication and experimental testing of 1 cm2 GaN-based betavoltaic batteries (that achieve an output power of 2.23 nW) along with a full model that accurately simulates the device performance which is the highest to date (to the best of our knowledge) for GaN-based devices with a 63Ni source.

Rational design of metal-organic electronic devices: A computational perspective

NASA Astrophysics Data System (ADS)

Chilukuri, Bhaskar

Organic and organometallic electronic materials continue to attract considerable attention among researchers due to their cost effectiveness, high flexibility, low temperature processing conditions and the continuous emergence of new semiconducting materials with tailored electronic properties. In addition, organic semiconductors can be used in a variety of important technological devices such as solar cells, field-effect transistors (FETs), flash memory, radio frequency identification (RFID) tags, light emitting diodes (LEDs), etc. However, organic materials have thus far not achieved the reliability and carrier mobility obtainable with inorganic silicon-based devices. Hence, there is a need for finding alternative electronic materials other than organic semiconductors to overcome the problems of inferior stability and performance. In this dissertation, I research the development of new transition metal based electronic materials which due to the presence of metal-metal, metal-pi, and pi-pi interactions may give rise to superior electronic and chemical properties versus their organic counterparts. Specifically, I performed computational modeling studies on platinum based charge transfer complexes and d 10 cyclo-[M(mu-L)]3 trimers (M = Ag, Au and L = monoanionic bidentate bridging (C/N~C/N) ligand). The research done is aimed to guide experimental chemists to make rational choices of metals, ligands, substituents in synthesizing novel organometallic electronic materials. Furthermore, the calculations presented here propose novel ways to tune the geometric, electronic, spectroscopic, and conduction properties in semiconducting materials. In addition to novel material development, electronic device performance can be improved by making a judicious choice of device components. I have studied the interfaces of a p-type metal-organic semiconductor viz cyclo-[Au(mu-Pz)] 3 trimer with metal electrodes at atomic and surface levels. This work was aimed to guide the device engineers to choose the appropriate metal electrodes considering the chemical interactions at the interface. Additionally, the calculations performed on the interfaces provided valuable insight into binding energies, charge redistribution, change in the energy levels, dipole formation, etc., which are important parameters to consider while fabricating an electronic device. The research described in this dissertation highlights the application of unique computational modeling methods at different levels of theory to guide the experimental chemists and device engineers toward a rational design of transition metal based electronic devices with low cost and high performance.

Semiconductor wire array structures, and solar cells and photodetectors based on such structures

DOEpatents

Kelzenberg, Michael D.; Atwater, Harry A.; Briggs, Ryan M.; Boettcher, Shannon W.; Lewis, Nathan S.; Petykiewicz, Jan A.

2014-08-19

A structure comprising an array of semiconductor structures, an infill material between the semiconductor materials, and one or more light-trapping elements is described. Photoconverters and photoelectrochemical devices based on such structure also described.

Ferroelectricity in Covalently functionalized Two-dimensional Materials: Integration of High-mobility Semiconductors and Nonvolatile Memory.

PubMed

Wu, Menghao; Dong, Shuai; Yao, Kailun; Liu, Junming; Zeng, Xiao Cheng

2016-11-09

Realization of ferroelectric semiconductors by conjoining ferroelectricity with semiconductors remains a challenging task because most present-day ferroelectric materials are unsuitable for such a combination due to their wide bandgaps. Herein, we show first-principles evidence toward the realization of a new class of two-dimensional (2D) ferroelectric semiconductors through covalent functionalization of many prevailing 2D materials. Members in this new class of 2D ferroelectric semiconductors include covalently functionalized germanene, and stanene (Nat. Commun. 2014, 5, 3389), as well as MoS 2 monolayer (Nat. Chem. 2015, 7, 45), covalent functionalization of the surface of bulk semiconductors such as silicon (111) (J. Phys. Chem. B 2006, 110 , 23898), and the substrates of oxides such as silica with self-assembly monolayers (Nano Lett. 2014, 14, 1354). The newly predicted 2D ferroelectric semiconductors possess high mobility, modest bandgaps, and distinct ferroelectricity that can be exploited for developing various heterostructural devices with desired functionalities. For example, we propose applications of the 2D materials as 2D ferroelectric field-effect transistors with ultrahigh on/off ratio, topological transistors with Dirac Fermions switchable between holes and electrons, ferroelectric junctions with ultrahigh electro-resistance, and multiferroic junctions for controlling spin by electric fields. All these heterostructural devices take advantage of the combination of high-mobility semiconductors with fast writing and nondestructive reading capability of nonvolatile memory, thereby holding great potential for the development of future multifunctional devices.

Infrared spectroscopic near-field mapping of single nanotransistors.

PubMed

Huber, A J; Wittborn, J; Hillenbrand, R

2010-06-11

We demonstrate the application of scattering-type scanning near-field optical microscopy (s-SNOM) for infrared (IR) spectroscopic material recognition in state-of-the-art semiconductor devices. In particular, we employ s-SNOM for imaging of industrial CMOS transistors with a resolution better than 20 nm, which allows for the first time IR spectroscopic recognition of amorphous SiO(2) and Si(3)N(4) components in a single transistor device. The experimentally recorded near-field spectral signature of amorphous SiO(2) shows excellent agreement with model calculations based on literature dielectric values, verifying that the characteristic near-field contrasts of SiO(2) stem from a phonon-polariton resonant near-field interaction between the probing tip and the SiO(2) nanostructures. Local material recognition by s-SNOM in combination with its capabilities of contact-free and non-invasive conductivity- and strain-mapping makes IR near-field microscopy a versatile metrology technique for nanoscale material characterization and semiconductor device analysis with application potential in research and development, failure analysis and reverse engineering.

A numerical study of steady crystal growth in a vertical Bridgman device

NASA Astrophysics Data System (ADS)

Jalics, Miklos Kalman

Electronics based on semiconductors creates an enormous demand for high quality semiconductor single crystals. The vertical Bridgman device is commonly used for growing single crystals for a variety of materials such as GaAs, InP and HgCdTe. A mathematical model is presented for steady crystal growth under conditions where crystal growth is determined strictly by heat transfer. The ends of the ampoule are chosen far away from the insulation zone to allow for steady growth. A numerical solution is sought for this mathematical model. The equations are transformed into a rectangular geometry and appropriate finite difference techniques are applied on the transformed equations. Newton's method solves the nonlinear problem. To improve efficiency GMRES with preconditioning is used to compute the Newton iterates. The numerical results are used to compare with two current asymptotic theories that assume small Biot numbers. Results indicate that one of the asymptotic theories is accurate for even moderate Biot numbers.

Magneto-electronic properties and spin-resolved I-V curves of a Co/GeSe heterojunction diode: an ab initio study

NASA Astrophysics Data System (ADS)

Makinistian, Leonardo; Albanesi, Eduardo A.

2013-06-01

We present ab initio calculations of magnetoelectronic and transport properties of the interface of hcp Cobalt (001) and the intrinsic narrow-gap semiconductor germanium selenide (GeSe). Using a norm-conserving pseudopotentials scheme within DFT, we first model the interface with a supercell approach and focus on the spin-resolved densities of states and the magnetic moment (spin and orbital components) at the different atomic layers that form the device. We also report a series of cuts (perpendicular to the plane of the heterojunction) of the electronic and spin densities showing a slight magnetization of the first layers of the semiconductor. Finally, we model the device with a different scheme: using semiinfinite electrodes connected to the heterojunction. These latter calculations are based upon a nonequilibrium Green's function approach that allows us to explore the spin-resolved electronic transport under a bias voltage (spin-resolved I-V curves), revealing features of potential applicability in spintronics.

Semiconductor diode laser device adjuvanting intradermal vaccine

PubMed Central

Kimizuka, Yoshifumi; Callahan, John J.; Huang, Zilong; Morse, Kaitlyn; Katagiri, Wataru; Shigeta, Ayako; Bronson, Roderick; Takeuchi, Shu; Shimaoka, Yusuke; Chan, Megan P. K.; Zeng, Yang; Li, Binghao; Chen, Huabiao; Tan, Rhea Y. Y.; Dwyer, Conor; Mulley, Tyler; Leblanc, Pierre; Goudie, Calum; Gelfand, Jeffrey; Tsukada, Kosuke; Brauns, Timothy; Poznansky, Mark C.; Bean, David; Kashiwagi, Satoshi

2017-01-01

A brief exposure of skin to a low-power, non-tissue damaging laser light has been demonstrated to augment immune responses to intradermal vaccination. Both preclinical and clinical studies show that this approach is simple, effective, safe and well tolerated compared to standard chemical or biological adjuvants. Until now, these laser exposures have been performed using a diode-pumped solid-state laser (DPSSL) devices, which are expensive and require labor-intensive maintenance and special training. Development of an inexpensive, easy-to-use and small device would form an important step in translating this technology toward clinical application Here we report that we have established a handheld, near-infrared (NIR) laser device using semiconductor diodes emitting either 1061, 1258, or 1301 nm light that costs less than $4,000, and that this device replicates the adjuvant effect of a DPSSL system in a mouse model of influenza vaccination. Our results also indicate that a broader range of NIR laser wavelengths possess the ability to enhance vaccine immune responses, allowing engineering options for the device design. This small, low-cost device establishes the feasibility of using a laser adjuvant approach for mass-vaccination programs in a clinical setting, opens the door for broader testing of this technology with a variety of vaccines and forms the foundation for development of devices ready for use in the clinic. PMID:28365253

Semiconductor diode laser device adjuvanting intradermal vaccine.

PubMed

Kimizuka, Yoshifumi; Callahan, John J; Huang, Zilong; Morse, Kaitlyn; Katagiri, Wataru; Shigeta, Ayako; Bronson, Roderick; Takeuchi, Shu; Shimaoka, Yusuke; Chan, Megan P K; Zeng, Yang; Li, Binghao; Chen, Huabiao; Tan, Rhea Y Y; Dwyer, Conor; Mulley, Tyler; Leblanc, Pierre; Goudie, Calum; Gelfand, Jeffrey; Tsukada, Kosuke; Brauns, Timothy; Poznansky, Mark C; Bean, David; Kashiwagi, Satoshi

2017-04-25

A brief exposure of skin to a low-power, non-tissue damaging laser light has been demonstrated to augment immune responses to intradermal vaccination. Both preclinical and clinical studies show that this approach is simple, effective, safe and well tolerated compared to standard chemical or biological adjuvants. Until now, these laser exposures have been performed using a diode-pumped solid-state laser (DPSSL) devices, which are expensive and require labor-intensive maintenance and special training. Development of an inexpensive, easy-to-use and small device would form an important step in translating this technology toward clinical application. Here we report that we have established a handheld, near-infrared (NIR) laser device using semiconductor diodes emitting either 1061, 1258, or 1301nm light that costs less than $4000, and that this device replicates the adjuvant effect of a DPSSL system in a mouse model of influenza vaccination. Our results also indicate that a broader range of NIR laser wavelengths possess the ability to enhance vaccine immune responses, allowing engineering options for the device design. This small, low-cost device establishes the feasibility of using a laser adjuvant approach for mass-vaccination programs in a clinical setting, opens the door for broader testing of this technology with a variety of vaccines and forms the foundation for development of devices ready for use in the clinic. Copyright © 2017 Elsevier Ltd. All rights reserved.

Resistive field structures for semiconductor devices and uses therof

DOE Office of Scientific and Technical Information (OSTI.GOV)

Marinella, Matthew; DasGupta, Sandeepan; Kaplar, Robert

The present disclosure relates to resistive field structures that provide improved electric field profiles when used with a semiconductor device. In particular, the resistive field structures provide a uniform electric field profile, thereby enhancing breakdown voltage and improving reliability. In example, the structure is a field cage that is configured to be resistive, in which the potential changes significantly over the distance of the cage. In another example, the structure is a resistive field plate. Using these resistive field structures, the characteristics of the electric field profile can be independently modulated from the physical parameters of the semiconductor device. Additionalmore » methods and architectures are described herein.« less

Electrical Characterization of Semiconductor Materials and Devices

NASA Astrophysics Data System (ADS)

Deen, M.; Pascal, Fabien

Semiconductor materials and devices continue to occupy a preeminent technological position due to their importance when building integrated electronic systems used in a wide range of applications from computers, cell-phones, personal digital assistants, digital cameras and electronic entertainment systems, to electronic instrumentation for medical diagnositics and environmental monitoring. Key ingredients of this technological dominance have been the rapid advances made in the quality and processing of materials - semiconductors, conductors and dielectrics - which have given metal oxide semiconductor device technology its important characteristics of negligible standby power dissipation, good input-output isolation, surface potential control and reliable operation. However, when assessing material quality and device reliability, it is important to have fast, nondestructive, accurate and easy-to-use electrical characterization techniques available, so that important parameters such as carrier doping density, type and mobility of carriers, interface quality, oxide trap density, semiconductor bulk defect density, contact and other parasitic resistances and oxide electrical integrity can be determined. This chapter describes some of the more widely employed and popular techniques that are used to determine these important parameters. The techniques presented in this chapter range in both complexity and test structure requirements from simple current-voltage measurements to more sophisticated low-frequency noise, charge pumping and deep-level transient spectroscopy techniques.

Theoretical discovery of stable structures of group III-V monolayers: The materials for semiconductor devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Suzuki, Tatsuo, E-mail: dr.tatsuosuzuki@gmail.com

Group III-V compounds are very important as the materials of semiconductor devices. Stable structures of the monolayers of group III-V binary compounds have been discovered by using first-principles calculations. The primitive unit cell of the discovered structures is a rectangle, which includes four group-III atoms and four group-V atoms. A group-III atom and its three nearest-neighbor group-V atoms are placed on the same plane; however, these connections are not the sp{sup 2} hybridization. The bond angles around the group-V atoms are less than the bond angle of sp{sup 3} hybridization. The discovered structure of GaP is an indirect transition semiconductor,more » while the discovered structures of GaAs, InP, and InAs are direct transition semiconductors. Therefore, the discovered structures of these compounds have the potential of the materials for semiconductor devices, for example, water splitting photocatalysts. The discovered structures may become the most stable structures of monolayers which consist of other materials.« less

Electroless silver plating of the surface of organic semiconductors.

PubMed

Campione, Marcello; Parravicini, Matteo; Moret, Massimo; Papagni, Antonio; Schröter, Bernd; Fritz, Torsten

2011-10-04

The integration of nanoscale processes and devices demands fabrication routes involving rapid, cost-effective steps, preferably carried out under ambient conditions. The realization of the metal/organic semiconductor interface is one of the most demanding steps of device fabrication, since it requires mechanical and/or thermal treatments which increment costs and are often harmful in respect to the active layer. Here, we provide a microscopic analysis of a room temperature, electroless process aimed at the deposition of a nanostructured metallic silver layer with controlled coverage atop the surface of single crystals and thin films of organic semiconductors. This process relies on the reaction of aqueous AgF solutions with the nonwettable crystalline surface of donor-type organic semiconductors. It is observed that the formation of a uniform layer of silver nanoparticles can be accomplished within 20 min contact time. The electrical characterization of two-terminal devices performed before and after the aforementioned treatment shows that the metal deposition process is associated with a redox reaction causing the p-doping of the semiconductor. © 2011 American Chemical Society

Study on the photoresponse of amorphous In-Ga-Zn-O and zinc oxynitride semiconductor devices by the extraction of sub-gap-state distribution and device simulation.

PubMed

Jang, Jun Tae; Park, Jozeph; Ahn, Byung Du; Kim, Dong Myong; Choi, Sung-Jin; Kim, Hyun-Suk; Kim, Dae Hwan

2015-07-22

Persistent photoconduction (PPC) is a phenomenon that limits the application of oxide semiconductor thin-film transistors (TFTs) in optical sensor-embedded displays. In the present work, a study on zinc oxynitride (ZnON) semiconductor TFTs based on the combination of experimental results and device simulation is presented. Devices incorporating ZnON semiconductors exhibit negligible PPC effects compared with amorphous In-Ga-Zn-O (a-IGZO) TFTs, and the difference between the two types of materials are examined by monochromatic photonic C-V spectroscopy (MPCVS). The latter method allows the estimation of the density of subgap states in the semiconductor, which may account for the different behavior of ZnON and IGZO materials with respect to illumination and the associated PPC. In the case of a-IGZO TFTs, the oxygen flow rate during the sputter deposition of a-IGZO is found to influence the amount of PPC. Small oxygen flow rates result in pronounced PPC, and large densities of valence band tail (VBT) states are observed in the corresponding devices. This implies a dependence of PPC on the amount of oxygen vacancies (VO). On the other hand, ZnON has a smaller bandgap than a-IGZO and contains a smaller density of VBT states over the entire range of its bandgap energy. Here, the concept of activation energy window (AEW) is introduced to explain the occurrence of PPC effects by photoinduced electron doping, which is likely to be associated with the formation of peroxides in the semiconductor. The analytical methodology presented in this report accounts well for the reduction of PPC in ZnON TFTs, and provides a quantitative tool for the systematic development of phototransistors for optical sensor-embedded interactive displays.

High efficiency, low cost, thin film silicon solar cell design and method for making

DOEpatents

Sopori, Bhushan L.

2001-01-01

A semiconductor device having a substrate, a conductive intermediate layer deposited onto said substrate, wherein the intermediate layer serves as a back electrode, an optical reflector, and an interface for impurity gettering, and a semiconductor layer deposited onto said intermediate layer, wherein the semiconductor layer has a grain size at least as large as the layer thickness, and preferably about ten times the layer thickness. The device is formed by depositing a metal layer on a substrate, depositing a semiconductive material on the metal-coated substrate to produce a composite structure, and then optically processing the composite structure by illuminating it with infrared electromagnetic radiation according to a unique time-energy profile that first produces pits in the backside surface of the semiconductor material, then produces a thin, highly reflective, low resistivity alloy layer over the entire area of the interface between the semiconductor material and the metal layer, and finally produces a grain-enhanced semiconductor layer. The time-energy profile includes increasing the energy to a first energy level to initiate pit formation and create the desired pit size and density, then ramping up to a second energy level in which the entire device is heated to produce an interfacial melt, and finally reducing the energy to a third energy level and holding for a period of time to allow enhancement in the grain size of the semiconductor layer.

High efficiency low cost thin film silicon solar cell design and method for making

DOEpatents

Sopori, Bhushan L.

1999-01-01

A semiconductor device having a substrate, a conductive intermediate layer deposited onto said substrate, wherein the intermediate layer serves as a back electrode, an optical reflector, and an interface for impurity gettering, and a semiconductor layer deposited onto said intermediate layer, wherein the semiconductor layer has a grain size at least as large as the layer thickness, and preferably about ten times the layer thickness. The device is formed by depositing a metal layer on a substrate, depositing a semiconductive material on the metal-coated substrate to produce a composite structure, and then optically processing the composite structure by illuminating it with infrared electromagnetic radiation according to a unique time-energy profile that first produces pits in the backside surface of the semiconductor material, then produces a thin, highly reflective, low resistivity alloy layer over the entire area of the interface between the semiconductor material and the metal layer, and finally produces a grain-enhanced semiconductor layer. The time-energy profile includes increasing the energy to a first energy level to initiate pit formation and create the desired pit size and density, then ramping up to a second energy level in which the entire device is heated to produce an interfacial melt, and finally reducing the energy to a third energy level and holding for a period of time to allow enhancement in the grain size of the semiconductor layer.

Graded junction termination extensions for electronic devices

NASA Technical Reports Server (NTRS)

Merrett, J. Neil (Inventor); Isaacs-Smith, Tamara (Inventor); Sheridan, David C. (Inventor); Williams, John R. (Inventor)

2006-01-01

A graded junction termination extension in a silicon carbide (SiC) semiconductor device and method of its fabrication using ion implementation techniques is provided for high power devices. The properties of silicon carbide (SiC) make this wide band gap semiconductor a promising material for high power devices. This potential is demonstrated in various devices such as p-n diodes, Schottky diodes, bipolar junction transistors, thyristors, etc. These devices require adequate and affordable termination techniques to reduce leakage current and increase breakdown voltage in order to maximize power handling capabilities. The graded junction termination extension disclosed is effective, self-aligned, and simplifies the implementation process.

Graded junction termination extensions for electronic devices

NASA Technical Reports Server (NTRS)

Merrett, J. Neil (Inventor); Isaacs-Smith, Tamara (Inventor); Sheridan, David C. (Inventor); Williams, John R. (Inventor)

2007-01-01

A graded junction termination extension in a silicon carbide (SiC) semiconductor device and method of its fabrication using ion implementation techniques is provided for high power devices. The properties of silicon carbide (SiC) make this wide band gap semiconductor a promising material for high power devices. This potential is demonstrated in various devices such as p-n diodes, Schottky diodes, bipolar junction transistors, thyristors, etc. These devices require adequate and affordable termination techniques to reduce leakage current and increase breakdown voltage in order to maximize power handling capabilities. The graded junction termination extension disclosed is effective, self-aligned, and simplifies the implementation process.

Low temperature junction growth using hot-wire chemical vapor deposition

DOEpatents

Wang, Qi; Page, Matthew; Iwaniczko, Eugene; Wang, Tihu; Yan, Yanfa

2014-02-04

A system and a process for forming a semi-conductor device, and solar cells (10) formed thereby. The process includes preparing a substrate (12) for deposition of a junction layer (14); forming the junction layer (14) on the substrate (12) using hot wire chemical vapor deposition; and, finishing the semi-conductor device.

Mechanical scriber for semiconductor devices

DOEpatents

Lin, Peter T.

1985-01-01

A mechanical scriber using a scribing tip, such as a diamond, provides controlled scriber forces with a spring-loaded compound lever arrangement. The scribing force and range of scribing depth are adjusted by a pair of adjustable micrometer heads. A semiconductor device, such as a multilayer solar cell, can be formed into scribed strips at each layer.

Semiconductors: In Situ Processing of Photovoltaic Devices

NASA Technical Reports Server (NTRS)

Curreri, Peter A.

1998-01-01

The possible processing of semiconductor photovoltaic devices is discussed. The requirements for lunar PV cells is reviewed, and the key challenges involved in their manufacturing are investigated. A schematic diagram of a passivated emitter and rear cell (PERC) is presented. The possible fabrication of large photovoltaic arrays in space from lunar materials is also discussed.

Methods to Account for Accelerated Semi-Conductor Device Wearout in Longlife Aerospace Applications

DTIC Science & Technology

2003-01-01

Vasi, “Device scalling effects on hot-carrier induced interface and oxide-trappoing charge distributions in MOSFETs,” IEEE Transactions on Electron...Symposium Proceedings, pp. 248–254, 2002. [104] S. I. A. ( SIA ), “International technology roadmap for semiconductors.” <www.semichips.org>, 1999. 113

Circuit For Current-vs.-Voltage Tests Of Semiconductors

NASA Technical Reports Server (NTRS)

Huston, Steven W.

1991-01-01

Circuit designed for measurement of dc current-versus-voltage characteristics of semiconductor devices. Operates in conjunction with x-y pen plotter or digital storage oscilloscope, which records data. Includes large feedback resistors to prevent high currents damaging device under test. Principal virtues: low cost, simplicity, and compactness. Also used to evaluate diodes and transistors.

Metal-oxide-semiconductor devices using Ga2O3 dielectrics on n-type GaN

NASA Astrophysics Data System (ADS)

Lee, Ching-Ting; Chen, Hong-Wei; Lee, Hsin-Ying

2003-06-01

Using a photoelectrochemical method involving a He-Cd laser, Ga2O3 oxide layers were directly grown on n-type GaN. We demonstrated the performance of the resultant metal-oxide-semiconductor devices based on the grown Ga2O3 layer. An extremely low reverse leakage current of 200 pA was achieved when devices operated at -20 V. Furthermore, high forward and reverse breakdown electric fields of 2.80 MV/cm and 5.70 MV/cm, respectively, were obtained. Using a photoassisted current-voltage method, a low interface state density of 2.53×1011 cm-2 eV-1 was estimated. The varactor devices permit formation of inversion layers, so that they may be applied for the fabrication of metal-oxide-semiconductor field-effect transistors.

Fabrication of optically reflecting ohmic contacts for semiconductor devices

DOEpatents

Sopori, B.L.

1995-07-04

A method is provided to produce a low-resistivity ohmic contact having high optical reflectivity on one side of a semiconductor device. The contact is formed by coating the semiconductor substrate with a thin metal film on the back reflecting side and then optically processing the wafer by illuminating it with electromagnetic radiation of a predetermined wavelength and energy level through the front side of the wafer for a predetermined period of time. This method produces a thin epitaxial alloy layer between the semiconductor substrate and the metal layer when a crystalline substrate is used. The alloy layer provides both a low-resistivity ohmic contact and high optical reflectance. 5 figs.

Enhanced thermaly managed packaging for III-nitride light emitters

NASA Astrophysics Data System (ADS)

Kudsieh, Nicolas

In this Dissertation our work on `enhanced thermally managed packaging of high power semiconductor light sources for solid state lighting (SSL)' is presented. The motivation of this research and development is to design thermally high stable cost-efficient packaging of single and multi-chip arrays of III-nitrides wide bandgap semiconductor light sources through mathematical modeling and simulations. Major issues linked with this technology are device overheating which causes serious degradation in their illumination intensity and decrease in the lifetime. In the introduction the basics of III-nitrides WBG semiconductor light emitters are presented along with necessary thermal management of high power cingulated and multi-chip LEDs and laser diodes. This work starts at chip level followed by its extension to fully packaged lighting modules and devices. Different III-nitride structures of multi-quantum well InGaN/GaN and AlGaN/GaN based LEDs and LDs were analyzed using advanced modeling and simulation for different packaging designs and high thermal conductivity materials. Study started with basic surface mounted devices using conventional packaging strategies and was concluded with the latest thermal management of chip-on-plate (COP) method. Newly discovered high thermal conductivity materials have also been incorporated for this work. Our study also presents the new approach of 2D heat spreaders using such materials for SSL and micro LED array packaging. Most of the work has been presented in international conferences proceedings and peer review journals. Some of the latest work has also been submitted to well reputed international journals which are currently been reviewed for publication. .

Ultrafast Three-Dimensional Integrated Imaging of Strain in Core/Shell Semiconductor/Metal Nanostructures

DOE PAGES

Cherukara, Mathew J.; Sasikumar, Kiran; DiChiara, Anthony; ...

2017-11-07

Visualizing the dynamical response of material heterointerfaces is increasingly important for the design of hybrid materials and structures with tailored properties for use in functional devices. In situ characterization of nanoscale heterointerfaces such as metal-semiconductor interfaces, which exhibit a complex interplay between lattice strain, electric potential, and heat transport at subnanosecond time scales, is particularly challenging. Here in this work, we use a laser pump/X-ray probe form of Bragg coherent diffraction imaging (BCDI) to visualize in three-dimension the deformation of the core of a model core/shell semiconductor-metal (ZnO/Ni) nanorod following laser heating of the shell. We observe a rich interplaymore » of radial, axial, and shear deformation modes acting at different time scales that are induced by the strain from the Ni shell. We construct experimentally informed models by directly importing the reconstructed crystal from the ultrafast experiment into a thermo-electromechanical continuum model. The model elucidates the origin of the deformation modes observed experimentally. Our integrated imaging approach represents an invaluable tool to probe strain dynamics across mixed interfaces under operando conditions.« less

Ultrafast Three-Dimensional Integrated Imaging of Strain in Core/Shell Semiconductor/Metal Nanostructures

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cherukara, Mathew J.; Sasikumar, Kiran; DiChiara, Anthony

Visualizing the dynamical response of material heterointerfaces is increasingly important for the design of hybrid materials and structures with tailored properties for use in functional devices. In situ characterization of nanoscale heterointerfaces such as metal-semiconductor interfaces, which exhibit a complex interplay between lattice strain, electric potential, and heat transport at subnanosecond time scales, is particularly challenging. Here in this work, we use a laser pump/X-ray probe form of Bragg coherent diffraction imaging (BCDI) to visualize in three-dimension the deformation of the core of a model core/shell semiconductor-metal (ZnO/Ni) nanorod following laser heating of the shell. We observe a rich interplaymore » of radial, axial, and shear deformation modes acting at different time scales that are induced by the strain from the Ni shell. We construct experimentally informed models by directly importing the reconstructed crystal from the ultrafast experiment into a thermo-electromechanical continuum model. The model elucidates the origin of the deformation modes observed experimentally. Our integrated imaging approach represents an invaluable tool to probe strain dynamics across mixed interfaces under operando conditions.« less

Ultrafast Three-Dimensional Integrated Imaging of Strain in Core/Shell Semiconductor/Metal Nanostructures.

PubMed

Cherukara, Mathew J; Sasikumar, Kiran; DiChiara, Anthony; Leake, Steven J; Cha, Wonsuk; Dufresne, Eric M; Peterka, Tom; McNulty, Ian; Walko, Donald A; Wen, Haidan; Sankaranarayanan, Subramanian K R S; Harder, Ross J

2017-12-13

Visualizing the dynamical response of material heterointerfaces is increasingly important for the design of hybrid materials and structures with tailored properties for use in functional devices. In situ characterization of nanoscale heterointerfaces such as metal-semiconductor interfaces, which exhibit a complex interplay between lattice strain, electric potential, and heat transport at subnanosecond time scales, is particularly challenging. In this work, we use a laser pump/X-ray probe form of Bragg coherent diffraction imaging (BCDI) to visualize in three-dimension the deformation of the core of a model core/shell semiconductor-metal (ZnO/Ni) nanorod following laser heating of the shell. We observe a rich interplay of radial, axial, and shear deformation modes acting at different time scales that are induced by the strain from the Ni shell. We construct experimentally informed models by directly importing the reconstructed crystal from the ultrafast experiment into a thermo-electromechanical continuum model. The model elucidates the origin of the deformation modes observed experimentally. Our integrated imaging approach represents an invaluable tool to probe strain dynamics across mixed interfaces under operando conditions.

Photonic Switching Devices Using Light Bullets

NASA Technical Reports Server (NTRS)

Goorjian, Peter M. (Inventor)

1999-01-01

A unique ultra-fast, all-optical switching device or switch is made with readily available, relatively inexpensive, highly nonlinear optical materials. which includes highly nonlinear optical glasses, semiconductor crystals and/or multiple quantum well semiconductor materials. At the specified wavelengths. these optical materials have a sufficiently negative group velocity dispersion and high nonlinear index of refraction to support stable light bullets. The light bullets counter-propagate through, and interact within the waveguide to selectively change each others' directions of propagation into predetermined channels. In one embodiment, the switch utilizes a rectangularly planar slab waveguide. and further includes two central channels and a plurality of lateral channels for guiding the light bullets into and out of the waveguide. An advantage of the present all-optical switching device lies in its practical use of light bullets, thus preventing the degeneration of the pulses due to dispersion and diffraction at the front and back of the pulses. Another advantage of the switching device is the relative insensitivity of the collision process to the time difference in which the counter-propagating pulses enter the waveguide. since. contrary to conventional co-propagating spatial solitons, the relative phase of the colliding pulses does not affect the interaction of these pulses. Yet another feature of the present all-optical switching device is the selection of the light pulse parameters which enables the generation of light bullets in nonlinear optical materials. including highly nonlinear optical glasses and semiconductor materials such as semiconductor crystals and/or multiple quantum well semiconductor materials.

Modeling and simulation of floating gate nanocrystal FET devices and circuits

NASA Astrophysics Data System (ADS)

Hasaneen, El-Sayed A. M.

The nonvolatile memory market has been growing very fast during the last decade, especially for mobile communication systems. The Semiconductor Industry Association International Technology Roadmap for Semiconductors states that the difficult challenge for nonvolatile semiconductor memories is to achieve reliable, low power, low voltage performance and high-speed write/erase. This can be achieved by aggressive scaling of the nonvolatile memory cells. Unfortunately, scaling down of conventional nonvolatile memory will further degrade the retention time due to the charge loss between the floating gate and drain/source contacts and substrate which makes conventional nonvolatile memory unattractive. Using nanocrystals as charge storage sites reduces dramatically the charge leakage through oxide defects and drain/source contacts. Floating gate nanocrystal nonvolatile memory, FG-NCNVM, is a candidate for future memory because it is advantageous in terms of high-speed write/erase, small size, good scalability, low-voltage, low-power applications, and the capability to store multiple bits per cell. Many studies regarding FG-NCNVMs have been published. Most of them have dealt with fabrication improvements of the devices and device characterizations. Due to the promising FG-NCNVM applications in integrated circuits, there is a need for circuit a simulation model to simulate the electrical characteristics of the floating gate devices. In this thesis, a FG-NCNVM circuit simulation model has been proposed. It is based on the SPICE BSIM simulation model. This model simulates the cell behavior during normal operation. Model validation results have been presented. The SPICE model shows good agreement with experimental results. Current-voltage characteristics, transconductance and unity gain frequency (fT) have been studied showing the effect of the threshold voltage shift (DeltaVth) due to nanocrystal charge on the device characteristics. The threshold voltage shift due to nanocrystal charge has a strong effect on the memory characteristics. Also, the programming operation of the memory cell has been investigated. The tunneling rate from quantum well channel to quantum dot (nanocrystal) gate is calculated. The calculations include various memory parameters, wavefunctions, and energies of quantum well channel and quantum dot gate. The use of floating gate nanocrystal memory as a transistor with a programmable threshold voltage has been demonstrated. The incorporation of FG-NCFETs to design programmable integrated circuit building blocks has been discussed. This includes the design of programmable current and voltage reference circuits. Finally, we demonstrated the design of tunable gain op-amp incorporating FG-NCFETs. Programmable integrated circuit building blocks can be used in intelligent analog and digital systems.

Pseudo-Boltzmann model for modeling the junctionless transistors

NASA Astrophysics Data System (ADS)

Avila-Herrera, F.; Cerdeira, A.; Roldan, J. B.; Sánchez-Moreno, P.; Tienda-Luna, I. M.; Iñiguez, B.

2014-05-01

Calculation of the carrier concentrations in semiconductors using the Fermi-Dirac integral requires complex numerical calculations; in this context, practically all analytical device models are based on Boltzmann statistics, even though it is known that it leads to an over-estimation of carriers densities for high doping concentrations. In this paper, a new approximation to Fermi-Dirac integral, called Pseudo-Boltzmann model, is presented for modeling junctionless transistors with high doping concentrations.

Neutron Detection Using Gadolinium-Based Diodes

DTIC Science & Technology

2011-03-01

electronic device in use today [10]. A semiconductor material that has an excess of acceptor dopants , typically from column III of the periodic table...strontium-90 or cobalt -57 [3]. The results from the CASINO modeling effort indicate that a very small percentage of the IC electrons would fully

CIRCUS--A digital computer program for transient analysis of electronic circuits

NASA Technical Reports Server (NTRS)

Moore, W. T.; Steinbert, L. L.

1968-01-01

Computer program simulates the time domain response of an electronic circuit to an arbitrary forcing function. CIRCUS uses a charge-control parameter model to represent each semiconductor device. Given the primary photocurrent, the transient behavior of a circuit in a radiation environment is determined.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

University of Illinois

2009-04-21

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A [Champaign, IL; Khang, Dahl-Young [Seoul, KR; Sun, Yugang [Naperville, IL; Menard, Etienne [Durham, NC

2012-06-12

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A.; Khang, Dahl-Young; Sun, Yugang; Menard, Etienne

2014-06-17

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A.; Khang, Dahl-Young; Sun, Yugang; Menard, Etienne

2016-12-06

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A.; Khang, Dahl -Young; Sun, Yugang; Menard, Etienne

2015-08-11

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Dry etching method for compound semiconductors

DOEpatents

Shul, Randy J.; Constantine, Christopher

1997-01-01

A dry etching method. According to the present invention, a gaseous plasma comprising, at least in part, boron trichloride, methane, and hydrogen may be used for dry etching of a compound semiconductor material containing layers including aluminum, or indium, or both. Material layers of a compound semiconductor alloy such as AlGaInP or the like may be anisotropically etched for forming electronic devices including field-effect transistors and heterojunction bipolar transistors and for forming photonic devices including vertical-cavity surface-emitting lasers, edge-emitting lasers, and reflectance modulators.

Dry etching method for compound semiconductors

DOEpatents

Shul, R.J.; Constantine, C.

1997-04-29

A dry etching method is disclosed. According to the present invention, a gaseous plasma comprising, at least in part, boron trichloride, methane, and hydrogen may be used for dry etching of a compound semiconductor material containing layers including aluminum, or indium, or both. Material layers of a compound semiconductor alloy such as AlGaInP or the like may be anisotropically etched for forming electronic devices including field-effect transistors and heterojunction bipolar transistors and for forming photonic devices including vertical-cavity surface-emitting lasers, edge-emitting lasers, and reflectance modulators. 1 fig.

Mechanical Properties of Organic Semiconductors for Stretchable, Highly Flexible, and Mechanically Robust Electronics.

PubMed

Root, Samuel E; Savagatrup, Suchol; Printz, Adam D; Rodriquez, Daniel; Lipomi, Darren J

2017-05-10

Mechanical deformability underpins many of the advantages of organic semiconductors. The mechanical properties of these materials are, however, diverse, and the molecular characteristics that permit charge transport can render the materials stiff and brittle. This review is a comprehensive description of the molecular and morphological parameters that govern the mechanical properties of organic semiconductors. Particular attention is paid to ways in which mechanical deformability and electronic performance can coexist. The review begins with a discussion of flexible and stretchable devices of all types, and in particular the unique characteristics of organic semiconductors. It then discusses the mechanical properties most relevant to deformable devices. In particular, it describes how low modulus, good adhesion, and absolute extensibility prior to fracture enable robust performance, along with mechanical "imperceptibility" if worn on the skin. A description of techniques of metrology precedes a discussion of the mechanical properties of three classes of organic semiconductors: π-conjugated polymers, small molecules, and composites. The discussion of each class of materials focuses on molecular structure and how this structure (and postdeposition processing) influences the solid-state packing structure and thus the mechanical properties. The review concludes with applications of organic semiconductor devices in which every component is intrinsically stretchable or highly flexible.

Finite Element Modeling of Micromachined MEMS Photon Devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Datskos, P.G.; Evans, B.M.; Schonberger, D.

1999-09-20

The technology of microelectronics that has evolved over the past half century is one of great power and sophistication and can now be extended to many applications (MEMS and MOEMS) other than electronics. An interesting application of MEMS quantum devices is the detection of electromagnetic radiation. The operation principle of MEMS quantum devices is based on the photoinduced stress in semiconductors, and the photon detection results from the measurement of the photoinduced bending. These devices can be described as micromechanical photon detectors. In this work, we have developed a technique for simulating electronic stresses using finite element analysis. We havemore » used our technique to model the response of micromechanical photon devices to external stimuli and compared these results with experimental data. Material properties, geometry, and bimaterial design play an important role in the performance of micromechanical photon detectors. We have modeled these effects using finite element analysis and included the effects of bimaterial thickness coating, effective length of the device, width, and thickness.« less

Finite element modeling of micromachined MEMS photon devices

NASA Astrophysics Data System (ADS)

Evans, Boyd M., III; Schonberger, D. W.; Datskos, Panos G.

1999-09-01

The technology of microelectronics that has evolved over the past half century is one of great power and sophistication and can now be extended to many applications (MEMS and MOEMS) other than electronics. An interesting application of MEMS quantum devices is the detection of electromagnetic radiation. The operation principle of MEMS quantum devices is based on the photoinduced stress in semiconductors, and the photon detection results from the measurement of the photoinduced bending. These devices can be described as micromechanical photon detectors. In this work, we have developed a technique for simulating electronic stresses using finite element analysis. We have used our technique to model the response of micromechanical photon devices to external stimuli and compared these results with experimental data. Material properties, geometry, and bimaterial design play an important role in the performance of micromechanical photon detectors. We have modeled these effects using finite element analysis and included the effects of bimaterial thickness coating, effective length of the device, width, and thickness.

Method for sputtering a PIN amorphous silicon semi-conductor device having partially crystallized P and N-layers

DOEpatents

Moustakas, Theodore D.; Maruska, H. Paul

1985-07-09

A high efficiency amorphous silicon PIN semiconductor device having partially crystallized (microcrystalline) P and N layers is constructed by the sequential sputtering of N, I and P layers and at least one semi-transparent ohmic electrode. The method of construction produces a PIN device, exhibiting enhanced electrical and optical properties, improved physical integrity, and facilitates the preparation in a singular vacuum system and vacuum pump down procedure.

Semiconductor superlattice photodetectors

NASA Technical Reports Server (NTRS)

Chuang, S. L.; Hess, K.; Coleman, J. J.; Leburton, J. P.

1984-01-01

A superlattice photomultiplier and a photodetector based on the real space transfer mechanism were studied. The wavelength for the first device is of the order of a micron or flexible corresponding to the bandgap absorption in a semiconductor. The wavelength for the second device is in the micron range (about 2 to 12 microns) corresponding to the energy of the conduction band edge discontinuity between an Al/(sub x)Ga(sub 1-x)As and GaAs interface. Both devices are described.

Advanced development of double-injection, deep-impurity semiconductor switches

NASA Technical Reports Server (NTRS)

Hanes, M. H.

1987-01-01

Deep-impurity, double-injection devices, commonly refered to as (DI) squared devices, represent a class of semiconductor switches possessing a very high degree of tolerance to electron and neutron irradiation and to elevated temperature operation. These properties have caused them to be considered as attractive candidates for space power applications. The design, fabrication, and testing of several varieties of (DI) squared devices intended for power switching are described. All of these designs were based upon gold-doped silicon material. Test results, along with results of computer simulations of device operation, other calculations based upon the assumed mode of operation of (DI) squared devices, and empirical information regarding power semiconductor device operation and limitations, have led to the conculsion that these devices are not well suited to high-power applications. When operated in power circuitry configurations, they exhibit high-power losses in both the off-state and on-state modes. These losses are caused by phenomena inherent to the physics and material of the devices and cannot be much reduced by device design optimizations. The (DI) squared technology may, however, find application in low-power functions such as sensing, logic, and memory, when tolerance to radiation and temperature are desirable (especially is device performance is improved by incorporation of deep-level impurities other than gold.

Development of a Handmade Conductivity Measurement Device for a Thin-Film Semiconductor and Its Application to Polypyrrole

ERIC Educational Resources Information Center

Seng, Set; Shinpei, Tomita; Yoshihiko, Inada; Masakazu, Kita

2014-01-01

The precise measurement of conductivity of a semiconductor film such as polypyrrole (Ppy) should be carried out by the four-point probe method; however, this is difficult for classroom application. This article describes the development of a new, convenient, handmade conductivity device from inexpensive materials that can measure the conductivity…

Color selective photodetector and methods of making

DOEpatents

Walker, Brian J.; Dorn, August; Bulovic, Vladimir; Bawendi, Moungi G.

2013-03-19

A photoelectric device, such as a photodetector, can include a semiconductor nanowire electrostatically associated with a J-aggregate. The J-aggregate can facilitate absorption of a desired wavelength of light, and the semiconductor nanowire can facilitate charge transport. The color of light detected by the device can be chosen by selecting a J-aggregate with a corresponding peak absorption wavelength.

Method for sputtering a PIN microcrystalline/amorphous silicon semiconductor device with the P and N-layers sputtered from boron and phosphorous heavily doped targets

DOEpatents

Moustakas, Theodore D.; Maruska, H. Paul

1985-04-02

A silicon PIN microcrystalline/amorphous silicon semiconductor device is constructed by the sputtering of N, and P layers of silicon from silicon doped targets and the I layer from an undoped target, and at least one semi-transparent ohmic electrode.

Mechanical scriber for semiconductor devices

DOEpatents

Lin, P.T.

1985-03-05

A mechanical scriber using a scribing tip, such as a diamond, provides controlled scriber forces with a spring-loaded compound lever arrangement. The scribing force and range of scribing depth are adjusted by a pair of adjustable micrometer heads. A semiconductor device, such as a multilayer solar cell, can be formed into scribed strips at each layer. 5 figs.

JESD57 Test Standard, Procedures for the Measurement of Single-Event Effects in Semiconductor Devices from Heavy-Ion Irradiation Revision Update

NASA Technical Reports Server (NTRS)

Lauenstein, Jean-Marie

2016-01-01

The JEDEC JESD57 test standard, Procedures for the Measurement of Single-Event Effects in Semiconductor Devices from Heavy-Ion Irradiation, is undergoing its first revision since 1996. This presentation will provide an overview of some of the key proposed updates to the document.

Multilevel metallization method for fabricating a metal oxide semiconductor device

NASA Technical Reports Server (NTRS)

Hollis, B. R., Jr.; Feltner, W. R.; Bouldin, D. L.; Routh, D. E. (Inventor)

1978-01-01

An improved method is described of constructing a metal oxide semiconductor device having multiple layers of metal deposited by dc magnetron sputtering at low dc voltages and low substrate temperatures. The method provides multilevel interconnections and cross over between individual circuit elements in integrated circuits without significantly reducing the reliability or seriously affecting the yield.

Monolayer graphene-insulator-semiconductor emitter for large-area electron lithography

NASA Astrophysics Data System (ADS)

Kirley, Matthew P.; Aloui, Tanouir; Glass, Jeffrey T.

2017-06-01

The rapid adoption of nanotechnology in fields as varied as semiconductors, energy, and medicine requires the continual improvement of nanopatterning tools. Lithography is central to this evolving nanotechnology landscape, but current production systems are subject to high costs, low throughput, or low resolution. Herein, we present a solution to these problems with the use of monolayer graphene in a graphene-insulator-semiconductor (GIS) electron emitter device for large-area electron lithography. Our GIS device displayed high emission efficiency (up to 13%) and transferred large patterns (500 × 500 μm) with high fidelity (<50% spread). The performance of our device demonstrates a feasible path to dramatic improvements in lithographic patterning systems, enabling continued progress in existing industries and opening opportunities in nanomanufacturing.

Recent progress in high-mobility thin-film transistors based on multilayer 2D materials

NASA Astrophysics Data System (ADS)

Hong, Young Ki; Liu, Na; Yin, Demin; Hong, Seongin; Kim, Dong Hak; Kim, Sunkook; Choi, Woong; Yoon, Youngki

2017-04-01

Two-dimensional (2D) layered semiconductors are emerging as promising candidates for next-generation thin-film electronics because of their high mobility, relatively large bandgap, low-power switching, and the availability of large-area growth methods. Thin-film transistors (TFTs) based on multilayer transition metal dichalcogenides or black phosphorus offer unique opportunities for next-generation electronic and optoelectronic devices. Here, we review recent progress in high-mobility transistors based on multilayer 2D semiconductors. We describe the theoretical background on characterizing methods of TFT performance and material properties, followed by their applications in flexible, transparent, and optoelectronic devices. Finally, we highlight some of the methods used in metal-semiconductor contacts, hybrid structures, heterostructures, and chemical doping to improve device performance.

Thermally robust semiconductor optical amplifiers and laser diodes

DOEpatents

Dijaili, Sol P.; Patterson, Frank G.; Walker, Jeffrey D.; Deri, Robert J.; Petersen, Holly; Goward, William

2002-01-01

A highly heat conductive layer is combined with or placed in the vicinity of the optical waveguide region of active semiconductor components. The thermally conductive layer enhances the conduction of heat away from the active region, which is where the heat is generated in active semiconductor components. This layer is placed so close to the optical region that it must also function as a waveguide and causes the active region to be nearly the same temperature as the ambient or heat sink. However, the semiconductor material itself should be as temperature insensitive as possible and therefore the invention combines a highly thermally conductive dielectric layer with improved semiconductor materials to achieve an overall package that offers improved thermal performance. The highly thermally conductive layer serves two basic functions. First, it provides a lower index material than the semiconductor device so that certain kinds of optical waveguides may be formed, e.g., a ridge waveguide. The second and most important function, as it relates to this invention, is that it provides a significantly higher thermal conductivity than the semiconductor material, which is the principal material in the fabrication of various optoelectronic devices.

Extended behavioural device modelling and circuit simulation with Qucs-S

NASA Astrophysics Data System (ADS)

Brinson, M. E.; Kuznetsov, V.

2018-03-01

Current trends in circuit simulation suggest a growing interest in open source software that allows access to more than one simulation engine while simultaneously supporting schematic drawing tools, behavioural Verilog-A and XSPICE component modelling, and output data post-processing. This article introduces a number of new features recently implemented in the 'Quite universal circuit simulator - SPICE variant' (Qucs-S), including structure and fundamental schematic capture algorithms, at the same time highlighting their use in behavioural semiconductor device modelling. Particular importance is placed on the interaction between Qucs-S schematics, equation-defined devices, SPICE B behavioural sources and hardware description language (HDL) scripts. The multi-simulator version of Qucs is a freely available tool that offers extended modelling and simulation features compared to those provided by legacy circuit simulators. The performance of a number of Qucs-S modelling extensions are demonstrated with a GaN HEMT compact device model and data obtained from tests using the Qucs-S/Ngspice/Xyce ©/SPICE OPUS multi-engine circuit simulator.

Effect of Pentacene-dielectric Affinity on Pentacene Thin Film Growth Morphology in Organic Field-effect Transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

S Kim; M Jang; H Yang

2011-12-31

Organic field-effect transistors (OFETs) are fabricated by depositing a thin film of semiconductor on the functionalized surface of a SiO{sub 2} dielectric. The chemical and morphological structures of the interface between the semiconductor and the functionalized dielectric are critical for OFET performance. We have characterized the effect of the affinity between semiconductor and functionalized dielectric on the properties of the semiconductor-dielectric interface. The crystalline microstructure/nanostructure of the pentacene semiconductor layers, grown on a dielectric substrate that had been functionalized with either poly(4-vinyl pyridine) or polystyrene (to control hydrophobicity), and grown under a series of substrate temperatures and deposition rates, weremore » characterized by X-ray diffraction, photoemission spectroscopy, and atomic force microscopy. By comparing the morphological features of the semiconductor thin films with the device characteristics (field-effect mobility, threshold voltage, and hysteresis) of the OFET devices, the effect of affinity-driven properties on charge modulation, charge trapping, and charge carrier transport could be described.« less

Electronic-carrier-controlled photochemical etching process in semiconductor device fabrication

DOEpatents

Ashby, C.I.H.; Myers, D.R.; Vook, F.L.

1988-06-16

An electronic-carrier-controlled photochemical etching process for carrying out patterning and selective removing of material in semiconductor device fabrication includes the steps of selective ion implanting, photochemical dry etching, and thermal annealing, in that order. In the selective ion implanting step, regions of the semiconductor material in a desired pattern are damaged and the remainder of the regions of the material not implanted are left undamaged. The rate of recombination of electrons and holes is increased in the damaged regions of the pattern compared to undamaged regions. In the photochemical dry etching step which follows ion implanting step, the material in the undamaged regions of the semiconductor are removed substantially faster than in the damaged regions representing the pattern, leaving the ion-implanted, damaged regions as raised surface structures on the semiconductor material. After completion of photochemical dry etching step, the thermal annealing step is used to restore the electrical conductivity of the damaged regions of the semiconductor material.

Electronic-carrier-controlled photochemical etching process in semiconductor device fabrication

DOEpatents

Ashby, Carol I. H.; Myers, David R.; Vook, Frederick L.

1989-01-01

An electronic-carrier-controlled photochemical etching process for carrying out patterning and selective removing of material in semiconductor device fabrication includes the steps of selective ion implanting, photochemical dry etching, and thermal annealing, in that order. In the selective ion implanting step, regions of the semiconductor material in a desired pattern are damaged and the remainder of the regions of the material not implanted are left undamaged. The rate of recombination of electrons and holes is increased in the damaged regions of the pattern compared to undamaged regions. In the photochemical dry etching step which follows ion implanting step, the material in the undamaged regions of the semiconductor are removed substantially faster than in the damaged regions representing the pattern, leaving the ion-implanted, damaged regions as raised surface structures on the semiconductor material. After completion of photochemical dry etching step, the thermal annealing step is used to restore the electrical conductivity of the damaged regions of the semiconductor material.

A stable solution-processed polymer semiconductor with record high-mobility for printed transistors

PubMed Central

Li, Jun; Zhao, Yan; Tan, Huei Shuan; Guo, Yunlong; Di, Chong-An; Yu, Gui; Liu, Yunqi; Lin, Ming; Lim, Suo Hon; Zhou, Yuhua; Su, Haibin; Ong, Beng S.

2012-01-01

Microelectronic circuits/arrays produced via high-speed printing instead of traditional photolithographic processes offer an appealing approach to creating the long-sought after, low-cost, large-area flexible electronics. Foremost among critical enablers to propel this paradigm shift in manufacturing is a stable, solution-processable, high-performance semiconductor for printing functionally capable thin-film transistors — fundamental building blocks of microelectronics. We report herein the processing and optimisation of solution-processable polymer semiconductors for thin-film transistors, demonstrating very high field-effect mobility, high on/off ratio, and excellent shelf-life and operating stabilities under ambient conditions. Exceptionally high-gain inverters and functional ring oscillator devices on flexible substrates have been demonstrated. This optimised polymer semiconductor represents a significant progress in semiconductor development, dispelling prevalent skepticism surrounding practical usability of organic semiconductors for high-performance microelectronic devices, opening up application opportunities hitherto functionally or economically inaccessible with silicon technologies, and providing an excellent structural framework for fundamental studies of charge transport in organic systems. PMID:23082244

Development of Room Temperature Excitonic Lasing From ZnO and MgZnO Thin Film Based Metal-Semiconductor-Metal Devices

NASA Astrophysics Data System (ADS)

Suja, Mohammad Zahir Uddin

Room temperature excitonic lasing is demonstrated and developed by utilizing metal-semiconductor-metal devices based on ZnO and MgZnO materials. At first, Cu-doped p-type ZnO films are grown on c-sapphire substrates by plasma-assisted molecular beam epitaxy. Photoluminescence (PL) experiments reveal a shallow acceptor state at 0.15 eV above the valence band edge. Hall effect results indicate that a growth condition window is found for the formation of p-type ZnO thin films and the best conductivity is achieved with a high hole concentration of 1.54x1018 cm-3, a low resistivity of 0.6 O cm and a moderate mobility of 6.65 cm2 V -1 s-1 at room temperature. Metal oxide semiconductor (MOS) capacitor devices have been fabricated on the Cu-doped ZnO films and the characteristics of capacitance-voltage measurements demonstrate that the Cu-doped ZnO thin films under proper growth conditions are p-type. Seebeck measurements on these Cu-doped ZnO samples lead to positive Seebeck coefficients and further confirm the p-type conductivity. Other measurements such as XRD, XPS, Raman and absorption are also performed to elucidate the structural and optical characteristics of the Cu-doped p-type ZnO films. The p-type conductivity is explained to originate from Cu substitution of Zn with a valency of +1 state. However, all p-type samples are converted to n-type over time, which is mostly due to the carrier compensation from extrinsic defects of ZnO. To overcome the stability issue of p-type ZnO film, alternate devices other than p-n junction has been developed. Electrically driven plasmon-exciton coupled random lasing is demonstrated by incorporating Ag nanoparticles on Cu-doped ZnO metal-semiconductor-metal (MSM) devices. Both photoluminescence and electroluminescence studies show that emission efficiencies have been enhanced significantly due to coupling between ZnO excitons and Ag surface plasmons. With the incorporation of Ag nanoparticles on ZnO MSM structures, internal quantum efficiency up to 6 times is demonstrated. Threshold current for lasing is decreased by as much as 30% while the output power is increased up to 350% at an injection current of 40 mA. A numerical simulation study reveals that hole carriers are generated in the ZnO MSM devices from impact ionization processes for subsequent plasmon-exciton coupled lasing. Our results suggest that plasmon-enhanced ZnO MSM random lasers can become a competitive candidate of efficient ultraviolet light sources. Semiconductor lasers in the deep ultraviolet (UV) range have numerous potential applications ranging from water purification and medical diagnosis to high-density data storage and flexible displays. Nevertheless, very little success was achieved in the realization of electrically driven deep UV semiconductor lasers to date. In this thesis, we report the fabrication and characterization of deep UV MgZnO semiconductor lasers. These lasers are operated with continuous current mode at room temperature and the shortest wavelength reaches 284 nm. The wide bandgap MgZnO thin films with various Mg mole fractions were grown on c-sapphire substrate using radio-frequency plasma assisted molecular beam epitaxy. Metal-semiconductor-metal (MSM) random laser devices were fabricated using lithography and metallization processes. Besides the demonstration of scalable emission wavelength, very low threshold current densities of 29 33 A/cm2 are achieved. Numerical modeling reveals that impact ionization process is responsible for the generation of hole carriers in the MgZnO MSM devices. The interaction of electrons and holes leads to radiative excitonic recombination and subsequent coherent random lasing.

Proton Nonionizing Energy Loss (NIEL) for Device Applications

NASA Technical Reports Server (NTRS)

Jun, Insoo; Xapsos, Michael A.; Messenger, Scott R.; Burke, Edward A.; Walters, Robert J.; Summers, Geoff; Jordan, Thomas

2003-01-01

Nonionizing energy loss (NIEL) is a quantity that describes the rate of energy loss due to atomic displacements as a particle traverses a material. The product of the NIEL and the particle fluence (time integrated flux) gives the displacement damage energy deposition per unit mass of material. NIEL plays the same role to the displacement damage energy deposition as the stopping power to the total ionizing dose (TID). The concept of NIEL has been very useful for correlating particle induced displacement damage effects in semiconductor and optical devices. Many studies have successfully demonstrated that the degradation of semiconductor devices or optical sensors in a radiation field can be linearly correlated to the displacement damage energy, and subsequently to the NIEL deposited in the semiconductor devices or optical sensors. In addition, the NIEL concept was also useful in the study of both Si and GaAs solar cells and of high temperature superconductors, and at predicting the survivability of detectors used at the LHC at CERN. On the other hand, there are some instances where discrepancies are observed in the application of NIEL, most notably in GaAs semiconductor devices. However, NIEL is still a valuable tool, and can be used to scale damages produced by different particles and in different environments, even though this is not understood at the microscopic level.

Gate tunneling current and quantum capacitance in metal-oxide-semiconductor devices with graphene gate electrodes

NASA Astrophysics Data System (ADS)

An, Yanbin; Shekhawat, Aniruddh; Behnam, Ashkan; Pop, Eric; Ural, Ant

2016-11-01

Metal-oxide-semiconductor (MOS) devices with graphene as the metal gate electrode, silicon dioxide with thicknesses ranging from 5 to 20 nm as the dielectric, and p-type silicon as the semiconductor are fabricated and characterized. It is found that Fowler-Nordheim (F-N) tunneling dominates the gate tunneling current in these devices for oxide thicknesses of 10 nm and larger, whereas for devices with 5 nm oxide, direct tunneling starts to play a role in determining the total gate current. Furthermore, the temperature dependences of the F-N tunneling current for the 10 nm devices are characterized in the temperature range 77-300 K. The F-N coefficients and the effective tunneling barrier height are extracted as a function of temperature. It is found that the effective barrier height decreases with increasing temperature, which is in agreement with the results previously reported for conventional MOS devices with polysilicon or metal gate electrodes. In addition, high frequency capacitance-voltage measurements of these MOS devices are performed, which depict a local capacitance minimum under accumulation for thin oxides. By analyzing the data using numerical calculations based on the modified density of states of graphene in the presence of charged impurities, it is shown that this local minimum is due to the contribution of the quantum capacitance of graphene. Finally, the workfunction of the graphene gate electrode is extracted by determining the flat-band voltage as a function of oxide thickness. These results show that graphene is a promising candidate as the gate electrode in metal-oxide-semiconductor devices.

Electromagnetic field enhancement effects in group IV semiconductor nanowires. A Raman spectroscopy approach

NASA Astrophysics Data System (ADS)

Pura, J. L.; Anaya, J.; Souto, J.; Prieto, A. C.; Rodríguez, A.; Rodríguez, T.; Periwal, P.; Baron, T.; Jiménez, J.

2018-03-01

Semiconductor nanowires (NWs) are the building blocks of future nanoelectronic devices. Furthermore, their large refractive index and reduced dimension make them suitable for nanophotonics. The study of the interaction between nanowires and visible light reveals resonances that promise light absorption/scattering engineering for photonic applications. Micro-Raman spectroscopy has been used as a characterization tool for semiconductor nanowires. The light/nanowire interaction can be experimentally assessed through the micro-Raman spectra of individual nanowires. As compared to both metallic and dielectric nanowires, semiconductor nanowires add additional tools for photon engineering. In particular, one can grow heterostructured nanowires, both axial and radial, and also one could modulate the doping level and the surface condition among other factors than can affect the light/NW interaction. We present herein a study of the optical response of group IV semiconductor nanowires to visible photons. The study is experimentally carried out through micro-Raman spectroscopy of different group IV nanowires, both homogeneous and axially heterostructured (SiGe/Si). The results are analyzed in terms of the electromagnetic modelling of the light/nanowire interaction using finite element methods. The presence of axial heterostructures is shown to produce electromagnetic resonances promising new photon engineering capabilities of semiconductor nanowires.

Closed-form breakdown voltage/specific on-resistance model using charge superposition technique for vertical power double-diffused metal–oxide–semiconductor device with high-κ insulator

NASA Astrophysics Data System (ADS)

Chen, Xue; Wang, Zhi-Gang; Wang, Xi; Kuo, James B.

2018-04-01

Not Available Project supported by the National Natural Science Foundation of China (Grant No. 61404110) and the National Higher-education Institution General Research and Development Project, China (Grant No. 2682014CX097).

Excitons and the lifetime of organic semiconductor devices.

PubMed

Forrest, Stephen R

2015-06-28

While excitons are responsible for the many beneficial optical properties of organic semiconductors, their non-radiative recombination within the material can result in material degradation due to the dumping of energy onto localized molecular bonds. This presents a challenge in developing strategies to exploit the benefits of excitons without negatively impacting the device operational stability. Here, we will briefly review the fundamental mechanisms leading to excitonic energy-driven device ageing in two example devices: blue emitting electrophosphorescent organic light emitting devices (PHOLEDs) and organic photovoltaic (OPV) cells. We describe strategies used to minimize or even eliminate this fundamental device degradation pathway. © 2015 The Author(s) Published by the Royal Society. All rights reserved.

Monolithic integration of SOI waveguide photodetectors and transimpedance amplifiers

NASA Astrophysics Data System (ADS)

Li, Shuxia; Tarr, N. Garry; Ye, Winnie N.

2018-02-01

In the absence of commercial foundry technologies offering silicon-on-insulator (SOI) photonics combined with Complementary Metal Oxide Semiconductor (CMOS) transistors, monolithic integration of conventional electronics with SOI photonics is difficult. Here we explore the implementation of lateral bipolar junction transistors (LBJTs) and Junction Field Effect Transistors (JFETs) in a commercial SOI photonics technology lacking MOS devices but offering a variety of n- and p-type ion implants intended to provide waveguide modulators and photodetectors. The fabrication makes use of the commercial Institute of Microelectronics (IME) SOI photonics technology. Based on knowledge of device doping and geometry, simple compact LBJT and JFET device models are developed. These models are then used to design basic transimpedance amplifiers integrated with optical waveguides. The devices' experimental current-voltage characteristics results are reported.

Analytical model of threshold voltage degradation due to localized charges in gate material engineered Schottky barrier cylindrical GAA MOSFETs

NASA Astrophysics Data System (ADS)

Kumar, Manoj; Haldar, Subhasis; Gupta, Mridula; Gupta, R. S.

2016-10-01

The threshold voltage degradation due to the hot carrier induced localized charges (LC) is a major reliability concern for nanoscale Schottky barrier (SB) cylindrical gate all around (GAA) metal-oxide-semiconductor field-effect transistors (MOSFETs). The degradation physics of gate material engineered (GME)-SB-GAA MOSFETs due to LC is still unexplored. An explicit threshold voltage degradation model for GME-SB-GAA-MOSFETs with the incorporation of localized charges (N it) is developed. To accurately model the threshold voltage the minimum channel carrier density has been taken into account. The model renders how +/- LC affects the device subthreshold performance. One-dimensional (1D) Poisson’s and 2D Laplace equations have been solved for two different regions (fresh and damaged) with two different gate metal work-functions. LCs are considered at the drain side with low gate metal work-function as N it is more vulnerable towards the drain. For the reduction of carrier mobility degradation, a lightly doped channel has been considered. The proposed model also includes the effect of barrier height lowering at the metal-semiconductor interface. The developed model results have been verified using numerical simulation data obtained by the ATLAS-3D device simulator and excellent agreement is observed between analytical and simulation results.

Resonant Tunneling Spin Pump

NASA Technical Reports Server (NTRS)

Ting, David Z.

2007-01-01

The resonant tunneling spin pump is a proposed semiconductor device that would generate spin-polarized electron currents. The resonant tunneling spin pump would be a purely electrical device in the sense that it would not contain any magnetic material and would not rely on an applied magnetic field. Also, unlike prior sources of spin-polarized electron currents, the proposed device would not depend on a source of circularly polarized light. The proposed semiconductor electron-spin filters would exploit the Rashba effect, which can induce energy splitting in what would otherwise be degenerate quantum states, caused by a spin-orbit interaction in conjunction with a structural-inversion asymmetry in the presence of interfacial electric fields in a semiconductor heterostructure. The magnitude of the energy split is proportional to the electron wave number. Theoretical studies have suggested the possibility of devices in which electron energy states would be split by the Rashba effect and spin-polarized currents would be extracted by resonant quantum-mechanical tunneling.

Carrier transport and collection in fully depleted semiconductors by a combined action of the space charge field and the field due to electrode voltages

DOEpatents

Rehak, P.; Gatti, E.

1984-02-24

A semiconductor charge transport device and method for making same, characterized by providing a thin semiconductor wafer having rectifying functions on its opposing major surfaces and including a small capacitance ohmic contact, in combination with bias voltage means and associated circuit means for applying a predetermined voltage to effectively deplete the wafer in regions thereof between the rectifying junctions and the ohmic contact. A charge transport device of the invention is usable as a drift chamber, a low capacitance detector, or a charge coupled device each constructed according to the methods of the invention for making such devices. Detectors constructed according to the principles of the invention are characterized by having significantly higher particle position indicating resolution than is attainable with prior art detectors, while at the same time requiring substantially fewer readout channels to realize such high resolution.

Carrier transport and collection in fully depleted semiconductors by a combined action of the space charge field and the field due to electrode voltages

DOEpatents

Rehak, Pavel; Gatti, Emilio

1987-01-01

A semiconductor charge transport device and method for making same, characterized by providing a thin semiconductor wafer having rectifying junctions on its opposing major surfaces and including a small capacitance ohmic contact, in combination with bias voltage means and associated circuit means for applying a predetermined voltage to effectively deplete the wafer in regions thereof between the rectifying junctions and the ohmic contact. A charge transport device of the invention is usable as a drift chamber, a low capacitance detector, or a charge coupled device each constructed according to the methods of the invention for making such devices. Detectors constructed according to the principles of the invention are characterized by having significantly higher particle position indicating resolution than is attainable with prior art detectors, while at the same time requiring substantially fewer readout channels to realize such high resolution.

Carrier transport and collection in fully depleted semiconductors by a combined action of the space charge field and the field due to electrode voltages

DOEpatents

Rehak, P.; Gatti, E.

1987-08-18

A semiconductor charge transport device and method for making same are disclosed, characterized by providing a thin semiconductor wafer having rectifying junctions on its opposing major surfaces and including a small capacitance ohmic contact, in combination with bias voltage means and associated circuit means for applying a predetermined voltage to effectively deplete the wafer in regions thereof between the rectifying junctions and the ohmic contact. A charge transport device of the invention is usable as a drift chamber, a low capacitance detector, or a charge coupled device each constructed according to the methods of the invention for making such devices. Detectors constructed according to the principles of the invention are characterized by having significantly higher particle position indicating resolution than is attainable with prior art detectors, while at the same time requiring substantially fewer readout channels to realize such high resolution. 16 figs.

High Performance Molybdenum Disulfide Amorphous Silicon Heterojunction Photodetector

PubMed Central

Esmaeili-Rad, Mohammad R.; Salahuddin, Sayeef

2013-01-01

One important use of layered semiconductors such as molybdenum disulfide (MoS2) could be in making novel heterojunction devices leading to functionalities unachievable using conventional semiconductors. Here we demonstrate a metal-semiconductor-metal heterojunction photodetector, made of MoS2 and amorphous silicon (a-Si), with rise and fall times of about 0.3 ms. The transient response does not show persistent (residual) photoconductivity, unlike conventional a-Si devices where it may last 3–5 ms, thus making this heterojunction roughly 10X faster. A photoresponsivity of 210 mA/W is measured at green light, the wavelength used in commercial imaging systems, which is 2−4X larger than that of a-Si and best reported MoS2 devices. The device could find applications in large area electronics, such as biomedical imaging, where a fast response is critical. PMID:23907598

Titanium-dioxide nanotube p-n homojunction diode

NASA Astrophysics Data System (ADS)

Alivov, Yahya; Ding, Yuchen; Singh, Vivek; Nagpal, Prashant

2014-12-01

Application of semiconductors in functional optoelectronic devices requires precise control over their doping and formation of junction between p- and n-doped semiconductors. While doped thin films have led to several semiconductor devices, need for high-surface area nanostructured devices for photovoltaic, photoelectrochemical, and photocatalytic applications has been hindered by lack of desired doping in nanostructures. Here, we show titanium-dioxide (TiO2) nanotubes doped with nitrogen (N) and niobium (Nb) as acceptors and donors, respectively, and formation of TiO2 nanotubes p-n homojunction. This TiO2:N/TiO2:Nb homojunction showed distinct diode-like behaviour with rectification ratio of 1115 at ±5 V and exhibited good photoresponse for ultraviolet light (λ = 365 nm) with sensitivity of 0.19 A/W at reverse bias of -5 V. These results can have important implications for development of nanostructured metal-oxide solar-cells, photodiodes, LED's, photocatalysts, and photoelectrochemical devices.

Thermally Generated Spin Signals in a Nondegenerate Silicon Spin Valve

NASA Astrophysics Data System (ADS)

Yamashita, Naoto; Ando, Yuichiro; Koike, Hayato; Miwa, Shinji; Suzuki, Yoshishige; Shiraishi, Masashi

2018-05-01

Thermally generated spin signals are observed in a nondegenerate Si spin valve. The spin-dependent Seebeck effect is used for thermal spin-signal generation. A thermal gradient of about 200 mK at the interface of Fe and Si enables the generation of a spin voltage of 8 μ V at room temperature. A simple expansion of the conventional spin-drift-diffusion model that takes into account the spin-dependent Seebeck effect shows that semiconductor materials are more promising for thermal spin-signal generation comparing than metallic materials, and thus enable efficient heat recycling in semiconductor spin devices.

Semiconductor optoelectronic devices for free-space optical communications

NASA Technical Reports Server (NTRS)

Katz, J.

1983-01-01

The properties of individual injection lasers are reviewed, and devices of greater complexity are described. These either include or are relevant to monolithic integration configurations of the lasers with their electronic driving circuitry, power combining methods of semiconductor lasers, and electronic methods of steering the radiation patterns of semiconductor lasers and laser arrays. The potential of AlGaAs laser technology for free-space optical communications systems is demonstrated. These solid-state components, which can generate and modulate light, combine the power of a number of sources and perform at least part of the beam pointing functions. Methods are proposed for overcoming the main drawback of semiconductor lasers, that is, their inability to emit the needed amount of optical power in a single-mode operation.

Tunable surface plasmon devices

DOEpatents

Shaner, Eric A [Rio Rancho, NM; Wasserman, Daniel [Lowell, MA

2011-08-30

A tunable extraordinary optical transmission (EOT) device wherein the tunability derives from controlled variation of the dielectric constant of a semiconducting material (semiconductor) in evanescent-field contact with a metallic array of sub-wavelength apertures. The surface plasmon resonance wavelength can be changed by changing the dielectric constant of the dielectric material. In embodiments of this invention, the dielectric material is a semiconducting material. The dielectric constant of the semiconducting material in the metal/semiconductor interfacial region is controllably adjusted by adjusting one or more of the semiconductor plasma frequency, the concentration and effective mass of free carriers, and the background high-frequency dielectric constant in the interfacial region. Thermal heating and/or voltage-gated carrier-concentration changes may be used to variably adjust the value of the semiconductor dielectric constant.

Screenable contact structure and method for semiconductor devices

DOEpatents

Ross, Bernd

1980-08-26

An ink composition for deposition upon the surface of a semiconductor device to provide a contact area for connection to external circuitry is disclosed, the composition comprising an ink system containing a metal powder, a binder and vehicle, and a metal frit. The ink is screened onto the semiconductor surface in the desired pattern and is heated to a temperature sufficient to cause the metal frit to become liquid. The metal frit dissolves some of the metal powder and densifies the structure by transporting the dissolved metal powder in a liquid sintering process. The sintering process typically may be carried out in any type of atmosphere. A small amount of dopant or semiconductor material may be added to the ink systems to achieve particular results if desired.

Large Bandgap Shrinkage from Doping and Dielectric Interface in Semiconducting Carbon Nanotubes

NASA Astrophysics Data System (ADS)

Comfort, Everett; Lee, Ji Ung

2016-06-01

The bandgap of a semiconductor is one of its most important electronic properties. It is often considered to be a fixed property of the semiconductor. As the dimensions of semiconductors reduce, however, many-body effects become dominant. Here, we show that doping and dielectric, two critical features of semiconductor device manufacturing, can dramatically shrink (renormalize) the bandgap. We demonstrate this in quasi-one-dimensional semiconducting carbon nanotubes. Specifically, we use a four-gated device, configured as a p-n diode, to investigate the fundamental electronic structure of individual, partially supported nanotubes of varying diameter. The four-gated construction allows us to combine both electrical and optical spectroscopic techniques to measure the bandgap over a wide doping range.

A graphene solution to conductivity mismatch: spin injection from ferromagnetic metal/graphene tunnel contacts into silicon

NASA Astrophysics Data System (ADS)

van't Erve, Olaf

2014-03-01

New paradigms for spin-based devices, such as spin-FETs and reconfigurable logic, have been proposed and modeled. These devices rely on electron spin being injected, transported, manipulated and detected in a semiconductor channel. This work is the first demonstration on how a single layer of graphene can be used as a low resistance tunnel barrier solution for electrical spin injection into Silicon at room temperature. We will show that a FM metal / monolayer graphene contact serves as a spin-polarized tunnel barrier which successfully circumvents the classic metal / semiconductor conductivity mismatch issue for electrical spin injection. We demonstrate electrical injection and detection of spin accumulation in Si above room temperature, and show that the corresponding spin lifetimes correlate with the Si carrier concentration, confirming that the spin accumulation measured occurs in the Si and not in interface trap states. An ideal tunnel barrier should exhibit several key material characteristics: a uniform and planar habit with well-controlled thickness, minimal defect / trapped charge density, a low resistance-area product for minimal power consumption, and compatibility with both the FM metal and semiconductor, insuring minimal diffusion to/from the surrounding materials at temperatures required for device processing. Graphene, offers all of the above, while preserving spin injection properties, making it a compelling solution to the conductivity mismatch for spin injection into Si. Although Graphene is very conductive in plane, it exhibits poor conductivity perpendicular to the plane. Its sp2 bonding results in a highly uniform, defect free layer, which is chemically inert, thermally robust, and essentially impervious to diffusion. The use of a single monolayer of graphene at the Si interface provides a much lower RA product than any film of an oxide thick enough to prevent pinholes (1 nm). Our results identify a new route to low resistance-area product spin-polarized contacts, a crucial requirement enabling future semiconductor spintronic devices, which rely upon two-terminal magnetoresistance, including spin-based transistors, logic and memory.

Mechanical properties of organic semiconductors for mechanically stable and intrinsically stretchable solar cells (Conference Presentation)

NASA Astrophysics Data System (ADS)

Lipomi, Darren J.

2016-09-01

This presentation describes my group's efforts to understand the molecular and microstructural basis for the mechanical properties of organic semiconductors for organic photovoltaic (OPV) devices. Our work is motivated by two goals. The first goal is to mitigate mechanical forms of degradation of printed modules during roll-to-roll fabrication, installation, and environmental forces—i.e., wind, rain, snow, and thermal expansion and contraction. Mechanical stability is a prerequisite for inexpensive processing on flexible substrates: to encapsulate devices in glass is to surrender this advantage. The second goal is to enable the next generation of ultra-flexible and stretchable solar cells for collapsible, portable, and wearable applications, and as low-cost sources of energy—"solar tarps"—for disaster relief and for the developing world. It may seem that organic semiconductors, due to their carbon framework, are already sufficiently compliant for these applications. We have found, however, that the mechanical properties (stiffness and brittleness) occupy a wide range of values, and can be difficult to predict from molecular structure alone. We are developing an experimental and theoretical framework for how one can combine favorable charge-transport properties and mechanical compliance in organic semiconductor films. In particular, we have explored the roles of the backbone, alkyl side chain, microstructural order, the glass transition, molecular packing with fullerenes, plasticizing effects of additives, extent of separation of [60]PCBM and [70]PCBM, structural randomness in low-bandgap polymers, and reinforcement by encapsulation, on the mechanical compliance. We are exploring the applicability of semi-empirical "back-of-the-envelope" models, along with multi-scale molecular dynamics simulations, with the ultimate goal of designing electroactive organic materials whose mechanical properties can be dialed-in. We have used the insights we have developed to demonstrate several new applications for OPV that demand extreme compliance, including biaxial stretching and conformal bonding of whole devices to hemispheres, and devices with ultrathin encapsulation mounted on human skin that survive significant cyclic mechanical deformation in the outdoor environment.

Prediction and measurement results of radiation damage to CMOS devices on board spacecraft

NASA Technical Reports Server (NTRS)

Stassinopoulos, E. G.; Danchenko, V.; Cliff, R. A.; Sing, M.; Brucker, G. J.; Ohanian, R. S.

1977-01-01

Final results from the CMOS Radiation Effects Measurement (CREM) experiment flown on Explorer 55 are presented and discussed, based on about 15 months of observations and measurements. Conclusions are given relating to long-range annealing, effects of operating temperature on semiconductor performance in space, biased and unbiased P-MOS device degradation, unbiased n-channel device performance, changes in device transconductance, and the difference in ionization efficiency between Co-60 gamma rays and 1-Mev Van de Graaff electrons. The performance of devices in a heavily shielded electronic subsystem box within the spacecraft is evaluated and compared. Environment models and computational methods and their impact on device-degradation estimates are being reviewed to determine whether they permit cost-effective design of spacecraft.

High efficiency low cost thin film silicon solar cell design and method for making

DOEpatents

Sopori, B.L.

1999-04-27

A semiconductor device is described having a substrate, a conductive intermediate layer deposited onto said substrate, wherein the intermediate layer serves as a back electrode, an optical reflector, and an interface for impurity gettering, and a semiconductor layer deposited onto said intermediate layer, wherein the semiconductor layer has a grain size at least as large as the layer thickness, and preferably about ten times the layer thickness. The device is formed by depositing a metal layer on a substrate, depositing a semiconductive material on the metal-coated substrate to produce a composite structure, and then optically processing the composite structure by illuminating it with infrared electromagnetic radiation according to a unique time-energy profile that first produces pits in the backside surface of the semiconductor material, then produces a thin, highly reflective, low resistivity alloy layer over the entire area of the interface between the semiconductor material and the metal layer, and finally produces a grain-enhanced semiconductor layer. The time-energy profile includes increasing the energy to a first energy level to initiate pit formation and create the desired pit size and density, then ramping up to a second energy level in which the entire device is heated to produce an interfacial melt, and finally reducing the energy to a third energy level and holding for a period of time to allow enhancement in the grain size of the semiconductor layer. 9 figs.

Estimation of carrier mobility and charge behaviors of organic semiconductor films in metal-insulator-semiconductor diodes consisting of high-k oxide/organic semiconductor double layers

NASA Astrophysics Data System (ADS)

Chosei, Naoya; Itoh, Eiji

2018-02-01

We have comparatively studied the charge behaviors of organic semiconductor films based on charge extraction by linearly increasing voltage in a metal-insulator-semiconductor (MIS) diode structure (MIS-CELIV) and by classical capacitance-voltage measurement. The MIS-CELIV technique allows the selective measurement of electron and hole mobilities of n- and p-type organic films with thicknesses representative of those of actual devices. We used an anodic oxidized sputtered Ta or Hf electrode as a high-k layer, and it effectively blocked holes at the insulator/semiconductor interface. We estimated the hole mobilities of the polythiophene derivatives regioregular poly(3-hexylthiophene) (P3HT) and poly(3,3‧‧‧-didodecylquarterthiophene) (PQT-12) before and after heat treatment in the ITO/high-k/(thin polymer insulator)/semiconductor/MoO3/Ag device structure. The hole mobility of PQT-12 was improved from 1.1 × 10-5 to 2.1 × 10-5 cm2 V-1 s-1 by the heat treatment of the device at 100 °C for 30 min. An almost two orders of magnitude higher mobility was obtained in MIS diodes with P3HT as the p-type layer. We also determined the capacitance from the displacement current in MIS diodes at a relatively low-voltage sweep, and it corresponded well to the classical capacitance-voltage and frequency measurement results.

On the Effect of Confinement on the Structure and Properties of Small-Molecular Organic Semiconductors

DOE PAGES

Martín, Jaime; Dyson, Matthew; Reid, Obadiah G.; ...

2017-12-11

Many typical organic optoelectronic devices, such as light-emitting diodes, field-effect transistors, and photovoltaic cells, use an ultrathin active layer where the organic semiconductor is confined within nanoscale dimensions. However, the question of how this spatial constraint impacts the active material is rarely addressed, although it may have a drastic influence on the phase behavior and microstructure of the active layer and hence the final performance. Here, the small-molecule semiconductor p-DTS(FBTTh 2) 2 is used as a model system to illustrate how sensitive this class of material can be to spatial confinement on device-relevant length scales. It is also shown thatmore » this effect can be exploited; it is demonstrated, for instance, that spatial confinement is an efficient tool to direct the crystal orientation and overall texture of p-DTS(FBTTh 2) 2 structures in a controlled manner, allowing for the manipulation of properties including photoluminescence and charge transport characteristics. This insight should be widely applicable as the temperature/confinement phase diagrams established via differential scanning calorimetry and grazing-incidence X-ray diffraction are used to identify specific processing routes that can be directly extrapolated to other functional organic materials, such as polymeric semiconductors, ferroelectrics or high-refractive-index polymers, to induce desired crystal textures or specific (potentially new) polymorphs.« less

On the Effect of Confinement on the Structure and Properties of Small-Molecular Organic Semiconductors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Martín, Jaime; Dyson, Matthew; Reid, Obadiah G.

Many typical organic optoelectronic devices, such as light-emitting diodes, field-effect transistors, and photovoltaic cells, use an ultrathin active layer where the organic semiconductor is confined within nanoscale dimensions. However, the question of how this spatial constraint impacts the active material is rarely addressed, although it may have a drastic influence on the phase behavior and microstructure of the active layer and hence the final performance. Here, the small-molecule semiconductor p-DTS(FBTTh 2) 2 is used as a model system to illustrate how sensitive this class of material can be to spatial confinement on device-relevant length scales. It is also shown thatmore » this effect can be exploited; it is demonstrated, for instance, that spatial confinement is an efficient tool to direct the crystal orientation and overall texture of p-DTS(FBTTh 2) 2 structures in a controlled manner, allowing for the manipulation of properties including photoluminescence and charge transport characteristics. This insight should be widely applicable as the temperature/confinement phase diagrams established via differential scanning calorimetry and grazing-incidence X-ray diffraction are used to identify specific processing routes that can be directly extrapolated to other functional organic materials, such as polymeric semiconductors, ferroelectrics or high-refractive-index polymers, to induce desired crystal textures or specific (potentially new) polymorphs.« less

A theoretical search for supervelocity semiconductors

NASA Astrophysics Data System (ADS)

Littlejohn, M. A.; Kim, K. W.

1991-10-01

This document presents an annual report to the Office of Naval Research for a research program entitled 'A Theoretical Search for Supervelocity Semiconductors.' This program has been funded by ONR since 1974 in the Department of Electrical and Computer Engineering at N.C. State University. The research has resulted in more than 75 refereed publications and numerous conference presentations from its inception. Major contributions to the field of hot electron transport and semiconductor device modeling have been achieved, new computational methods have been developed (e.g., path integral Monte Carlo techniques), and the work has helped stimulate commercial ventures in the applications of quaternary semiconductor materials to electronic and optical devices. In addition, there have been twenty-six Ph.D. and M.S. students who have received degrees at N.C. State University with research support from this contract. Three visiting faculty members from Japan came to the university to work with the faculty investigators supported under this ONR contract during the 1979-1983 time period. A visiting professor from the French CNRS Microstructures and Microelectronics Laboratory in Bagneux (near Paris) spent a sabbatical year at N.C. State during 1988-89, and he devoted full-time working on this program at no cost to ONR. During the current funding period, a visiting scholar from China is a member of our research group working on projects which directly impact this ONR program.

Method of Manufacturing a Light Emitting, Photovoltaic or Other Electronic Apparatus and System

NASA Technical Reports Server (NTRS)

Blanchard, Richard A. (Inventor); Lewandowski, Mark Allan (Inventor); Frazier, Donald Odell (Inventor); Ray, William Johnstone (Inventor); Fuller, Kirk A. (Inventor); Lowenthal, Mark David (Inventor); Shotton, Neil O. (Inventor)

2014-01-01

The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.

Method of manufacturing a light emitting, photovoltaic or other electronic apparatus and system

NASA Technical Reports Server (NTRS)

Fuller, Kirk A. (Inventor); Frazier, Donald Odell (Inventor); Blanchard, Richard A. (Inventor); Lowenthal, Mark D. (Inventor); Lewandowski, Mark Allan (Inventor); Ray, William Johnstone (Inventor); Shotton, Neil O. (Inventor)

2012-01-01

The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.

Evaluation of Intrinsic Charge Carrier Transport at Insulator-Semiconductor Interfaces Probed by a Non-Contact Microwave-Based Technique

PubMed Central

Honsho, Yoshihito; Miyakai, Tomoyo; Sakurai, Tsuneaki; Saeki, Akinori; Seki, Shu

2013-01-01

We have successfully designed the geometry of the microwave cavity and the thin metal electrode, achieving resonance of the microwave cavity with the metal-insulator-semiconductor (MIS) device structure. This very simple MIS device operates in the cavity, where charge carriers are injected quantitatively by an applied bias at the insulator-semiconductor interface. The local motion of the charge carriers was clearly probed through the applied external microwave field, also giving the quantitative responses to the injected charge carrier density and charge/discharge characteristics. By means of the present measurement system named field-induced time-resolved microwave conductivity (FI-TRMC), the pentacene thin film in the MIS device allowed the evaluation of the hole and electron mobility at the insulator-semiconductor interface of 6.3 and 0.34 cm2 V−1 s−1, respectively. This is the first report on the direct, intrinsic, non-contact measurement of charge carrier mobility at interfaces that has been fully experimentally verified. PMID:24212382

76 FR 65751 - Notice of intent to grant exclusive license

Federal Register 2010, 2011, 2012, 2013, 2014

2011-10-24

... Crystalline Semiconductor Alloys on Basal Plane of Trigonal or Hexagonal Crystal,'' U.S. Patent Application No. 12/254,134 entitled ``Hybrid Bandgap Engineering for Super-Hetero- Epitaxial Semiconductor Materials... Semiconductor Materials on Trigonal Substrate with Single Crystal Properties and Devices Based on Such Materials...

The simulation of air recirculation and fire/explosion phenomena within a semiconductor factory.

PubMed

I, Yet-Pole; Chiu, Yi-Long; Wu, Shi-Jen

2009-04-30

The semiconductor industry is the collection of capital-intensive firms that employ a variety of hazardous chemicals and engage in the design and fabrication of semiconductor devices. Owing to its processing characteristics, the fully confined structure of the fabrication area (fab) and the vertical airflow ventilation design restrict the applications of traditional consequence analysis techniques that are commonly used in other industries. The adverse situation also limits the advancement of a fire/explosion prevention design for the industry. In this research, a realistic model of a semiconductor factory with a fab, sub-fabrication area, supply air plenum, and return air plenum structures was constructed and the computational fluid dynamics algorithm was employed to simulate the possible fire/explosion range and its severity. The semiconductor factory has fan module units with high efficiency particulate air filters that can keep the airflow uniform within the cleanroom. This condition was modeled by 25 fans, three layers of porous ceiling, and one layer of porous floor. The obtained results predicted very well the real airflow pattern in the semiconductor factory. Different released gases, leak locations, and leak rates were applied to investigate their influence on the hazard range and severity. Common mitigation measures such as a water spray system and a pressure relief panel were also provided to study their potential effectiveness to relieve thermal radiation and overpressure hazards within a fab. The semiconductor industry can use this simulation procedure as a reference on how to implement a consequence analysis for a flammable gas release accident within an air recirculation cleanroom.

Method for photolithographic definition of recessed features on a semiconductor wafer utilizing auto-focusing alignment

DOEpatents

Farino, A.J.; Montague, S.; Sniegowski, J.J.; Smith, J.H.; McWhorter, P.J.

1998-07-21

A method is disclosed for photolithographically defining device features up to the resolution limit of an auto-focusing projection stepper when the device features are to be formed in a wafer cavity at a depth exceeding the depth of focus of the stepper. The method uses a focusing cavity located in a die field at the position of a focusing light beam from the auto-focusing projection stepper, with the focusing cavity being of the same depth as one or more adjacent cavities wherein a semiconductor device is to be formed. The focusing cavity provides a bottom surface for referencing the focusing light beam and focusing the stepper at a predetermined depth below the surface of the wafer, whereat the device features are to be defined. As material layers are deposited in each device cavity to build up a semiconductor structure such as a microelectromechanical system (MEMS) device, the same material layers are deposited in the focusing cavity, raising the bottom surface and re-focusing the stepper for accurately defining additional device features in each succeeding material layer. The method is especially applicable for forming MEMS devices within a cavity or trench and integrating the MEMS devices with electronic circuitry fabricated on the wafer surface. 15 figs.

Method for photolithographic definition of recessed features on a semiconductor wafer utilizing auto-focusing alignment

DOEpatents

Farino, Anthony J.; Montague, Stephen; Sniegowski, Jeffry J.; Smith, James H.; McWhorter, Paul J.

1998-01-01

A method is disclosed for photolithographically defining device features up to the resolution limit of an auto-focusing projection stepper when the device features are to be formed in a wafer cavity at a depth exceeding the depth of focus of the stepper. The method uses a focusing cavity located in a die field at the position of a focusing light beam from the auto-focusing projection stepper, with the focusing cavity being of the same depth as one or more adjacent cavities wherein a semiconductor device is to be formed. The focusing cavity provides a bottom surface for referencing the focusing light beam and focusing the stepper at a predetermined depth below the surface of the wafer, whereat the device features are to be defined. As material layers are deposited in each device cavity to build up a semiconductor structure such as a microelectromechanical system (MEMS) device, the same material layers are deposited in the focusing cavity, raising the bottom surface and re-focusing the stepper for accurately defining additional device features in each succeeding material layer. The method is especially applicable for forming MEMS devices within a cavity or trench and integrating the MEMS devices with electronic circuitry fabricated on the wafer surface.

An Assessment of Critical Dimension Small Angle X-ray Scattering Metrology for Advanced Semiconductor Manufacturing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Settens, Charles M.

2015-01-01

Simultaneous migration of planar transistors to FinFET architectures, the introduction of a plurality of materials to ensure suitable electrical characteristics, and the establishment of reliable multiple patterning lithography schemes to pattern sub-10 nm feature sizes imposes formidable challenges to current in-line dimensional metrologies. Because the shape of a FinFET channel cross-section immediately influences the electrical characteristics, the evaluation of 3D device structures requires measurement of parameters beyond traditional critical dimension (CD), including their sidewall angles, top corner rounding and footing, roughness, recesses and undercuts at single nanometer dimensions; thus, metrologies require sub-nm and approaching atomic level measurement uncertainty. Synchrotron criticalmore » dimension small angle X-ray scattering (CD-SAXS) has unique capabilities to non-destructively monitor the cross-section shape of surface structures with single nanometer uncertainty and can perform overlay metrology to sub-nm uncertainty. In this dissertation, we perform a systematic experimental investigation using CD-SAXS metrology on a hierarchy of semiconductor 3D device architectures including, high-aspect-ratio contact holes, H2 annealed Si fins, and a series of grating type samples at multiple points along a FinFET fabrication process increasing in structural intricacy and ending with fully fabricated FinFET. Comparative studies between CD-SAXS metrology and other relevant semiconductor dimensional metrologies, particularly CDSEM, CD-AFM and TEM are used to determine physical limits of CD-SAXS approach for advanced semiconductor samples. CD-SAXS experimental tradeoffs, advice for model-dependent analysis and thoughts on the compatibility with a semiconductor manufacturing environment are discussed.« less

Modelling switching-time effects in high-frequency power conditioning networks

NASA Technical Reports Server (NTRS)

Owen, H. A.; Sloane, T. H.; Rimer, B. H.; Wilson, T. G.

1979-01-01

Power transistor networks which switch large currents in highly inductive environments are beginning to find application in the hundred kilohertz switching frequency range. Recent developments in the fabrication of metal-oxide-semiconductor field-effect transistors in the power device category have enhanced the movement toward higher switching frequencies. Models for switching devices and of the circuits in which they are imbedded are required to properly characterize the mechanisms responsible for turning on and turning off effects. Easily interpreted results in the form of oscilloscope-like plots assist in understanding the effects of parametric studies using topology oriented computer-aided analysis methods.

Modeling of Nano-Scale Transistors and Memory Devices for Low Power Applications

NASA Astrophysics Data System (ADS)

Cao, Xi

As the featuring size of transistors scaled down to sub-20 nm, the continuous scaling of power has become one of the main challenges of the semiconductor industry. The power issue is raised by the barely scalable supply voltage and a limitation on the subthreshold swing (SS) of conventional metal-oxide-semiconductor field-effect transistor (MOSFET). In this work, self-consistent quantum transport device simulators are developed to examine the nanoscale transistors based on black phosphorus (BP) materials. The scaling limit of double-gated BP MOSFETs is assessed. To reduce the SS below the thermionic limit for ultra-steep switching, tunnel FETs (TFETs) and vertical ballistic impact ionization FETs based on BP and its heterojunctions are investigated. Furthermore, the ferroelectric tunneling junction (FTJ) is modeled and examined for potential low power memory applications. For BP MOSFETs, the device physics at the ultimate scaling limit are examined. The performance of monolayer BP MOSFETs is projected to sub-10 nm and compared with the International Technology Roadmap for Semiconductors (ITRS) requirements. And the interplay of quantum mechanical effects and the highly anisotropic bandstructure of BP at this scale is investigated. By choice of layer number and crystalline direction, BP materials can offer a range of bandgap and effective mass values, which is attractive for TFET applications. Therefore, scaling behaviors of BP TFETs near and below the 10 nm scale are studied. The gate oxide thickness scaling and the effect of high-k dielectric are compared between the TFETs and the MOSFETs. For the TFETs with the gate lengths beyond 10 nm and at the sub-10 nm scale, the direct-source-to-drain tunneling issues are evaluated, and different strategies to achieve ultra-steep switching are specified. In a sub-10 nm graphene-BP-graphene heterojunction transistor, the sharp turnon behavior was observed, under a small source-drain bias of 0.1 V. The fast switch is attributed to a ballistic energy-dependent impact ionization mechanism. A device model is developed, which shows agreement with experiment results. The model is applied to explore the gate oxide scaling behavior and the effect of graphene doping, and to optimize the device for low power applications. Finally, to keep the integrity of the computing system, the FTJ is studied for its possible use as a low power memory device. A compact model for FTJ, dealing with both static and dynamic behaviors, is developed and compared with experimental data. The write energy consumed by the memory cell, comprising one transistor and one FTJ, is estimated by applying the compact model to circuit simulation. And a way to reduce the write energy is suggested.

Physical aspects of ferroelectric semiconductors for photovoltaic solar energy conversion

NASA Astrophysics Data System (ADS)

Lopez-Varo, Pilar; Bertoluzzi, Luca; Bisquert, Juan; Alexe, Marin; Coll, Mariona; Huang, Jinsong; Jimenez-Tejada, Juan Antonio; Kirchartz, Thomas; Nechache, Riad; Rosei, Federico; Yuan, Yongbo

2016-10-01

Solar energy conversion using semiconductors to fabricate photovoltaic devices relies on efficient light absorption, charge separation of electron-hole pair carriers or excitons, and fast transport and charge extraction to counter recombination processes. Ferroelectric materials are able to host a permanent electrical polarization which provides control over electrical field distribution in bulk and interfacial regions. In this review, we provide a critical overview of the physical principles and mechanisms of solar energy conversion using ferroelectric semiconductors and contact layers, as well as the main achievements reported so far. In a ferroelectric semiconductor film with ideal contacts, the polarization charge would be totally screened by the metal layers and no charge collection field would exist. However, real materials show a depolarization field, smooth termination of polarization, and interfacial energy barriers that do provide the control of interface and bulk electric field by switchable spontaneous polarization. We explore different phenomena as the polarization-modulated Schottky-like barriers at metal/ferroelectric interfaces, depolarization fields, vacancy migration, and the switchable rectifying behavior of ferroelectric thin films. Using a basic physical model of a solar cell, our analysis provides a general picture of the influence of ferroelectric effects on the actual power conversion efficiency of the solar cell device, and we are able to assess whether these effects or their combinations are beneficial or counterproductive. We describe in detail the bulk photovoltaic effect and the contact layers that modify the built-in field and the charge injection and separation in bulk heterojunction organic cells as well as in photocatalytic and water splitting devices. We also review the dominant families of ferroelectric materials that have been most extensively investigated and have provided the best photovoltaic performance.

Exploring the Short-Channel Characteristics of Asymmetric Junctionless Double-Gate Silicon-on-Nothing MOSFET

NASA Astrophysics Data System (ADS)

Saha, Priyanka; Banerjee, Pritha; Dash, Dinesh Kumar; Sarkar, Subir Kumar

2018-03-01

This paper presents an analytical model of an asymmetric junctionless double-gate (asymmetric DGJL) silicon-on-nothing metal-oxide-semiconductor field-effect transistor (MOSFET). Solving the 2-D Poisson's equation, the expressions for center potential and threshold voltage are calculated. In addition, the response of the device toward the various short-channel effects like hot carrier effect, drain-induced barrier lowering and threshold voltage roll-off has also been examined along with subthreshold swing and drain current characteristics. Performance analysis of the present model is also demonstrated by comparing its short-channel behavior with conventional DGJL MOSFET. The effect of variation of the device features due to the variation of device parameters is also studied. The simulated results obtained using 2D device simulator, namely ATLAS, are in good agreement with the analytical results, hence validating our derived model.

PREFACE: Euro-TMCS I: Theory, Modelling and Computational Methods for Semiconductors

NASA Astrophysics Data System (ADS)

Gómez-Campos, F. M.; Rodríguez-Bolívar, S.; Tomić, S.

2015-05-01

The present issue contains a selection of the best contributed works presented at the first Euro-TMCS conference (Theory, Modelling and Computational Methods for Semiconductors, European Session). The conference was held at Faculty of Sciences, Universidad de Granada, Spain on 28st-30st January 2015. This conference is the first European edition of the TMCS conference series which started in 2008 at the University of Manchester and has always been held in the United Kingdom. Four previous conferences have been previously carried out (Manchester 2008, York 2010, Leeds 2012 and Salford 2014). Euro-TMCS is run for three days; the first one devoted to giving invited tutorials, aimed particularly at students, on recent development of theoretical methods. On this occasion the session was focused on the presentation of widely-used computational methods for the modelling of physical processes in semiconductor materials. Freely available simulation software (SIESTA, Quantum Espresso and Yambo) as well as commercial software (TiberCad and MedeA) were presented in the conference by members of their development team, offering to the audience an overview of their capabilities for research. The second part of the conference showcased prestigious invited and contributed oral presentations, alongside poster sessions, in which direct discussion with authors was promoted. The scope of this conference embraces modelling, theory and the use of sophisticated computational tools in semiconductor science and technology. Theoretical approaches represented in this meeting included: Density Functional Theory, Semi-empirical Electronic Structure Methods, Multi-scale Approaches, Modelling of PV devices, Electron Transport, and Graphene. Topics included, but were not limited to: Optical Properties of Quantum Nanostructures including Colloids and Nanotubes, Plasmonics, Magnetic Semiconductors, Photonic Structures, and Electronic Devices. The Editors Acknowledgments: We would like to thank all participants for making this a very successful meeting and for their contribution to the conference programme and these proceedings. We would also like to acknowledge the financial support from Universidad de Granada, the CECAM UK-Hartree Node, project TEC2013-47283-R of Ministerio de Economía y Competitividad, and the company Materials Design (distributors of MedeA Software). Conference Organising Committee: Francisco M. Gómez-Campos (Co-chair, Universidad de Granada) Salvador Rodríguez-Bolívar (Co-chair, Universidad de Granada) Stanko Tomić (Co-chair, University of Salford)

Ge/IIIV fin field-effect transistor common gate process and numerical simulations

NASA Astrophysics Data System (ADS)

Chen, Bo-Yuan; Chen, Jiann-Lin; Chu, Chun-Lin; Luo, Guang-Li; Lee, Shyong; Chang, Edward Yi

2017-04-01

This study investigates the manufacturing process of thermal atomic layer deposition (ALD) and analyzes its thermal and physical mechanisms. Moreover, experimental observations and computational fluid dynamics (CFD) are both used to investigate the formation and deposition rate of a film for precisely controlling the thickness and structure of the deposited material. First, the design of the TALD system model is analyzed, and then CFD is used to simulate the optimal parameters, such as gas flow and the thermal, pressure, and concentration fields, in the manufacturing process to assist the fabrication of oxide-semiconductors and devices based on them, and to improve their characteristics. In addition, the experiment applies ALD to grow films on Ge and GaAs substrates with three-dimensional (3-D) transistors having high electric performance. The electrical analysis of dielectric properties, leakage current density, and trapped charges for the transistors is conducted by high- and low-frequency measurement instruments to determine the optimal conditions for 3-D device fabrication. It is anticipated that the competitive strength of such devices in the semiconductor industry will be enhanced by the reduction of cost and improvement of device performance through these optimizations.

Bi-Se doped with Cu, p-type semiconductor

DOEpatents

Bhattacharya, Raghu Nath; Phok, Sovannary; Parilla, Philip Anthony

2013-08-20

A Bi--Se doped with Cu, p-type semiconductor, preferably used as an absorber material in a photovoltaic device. Preferably the semiconductor has at least 20 molar percent Cu. In a preferred embodiment, the semiconductor comprises at least 28 molar percent of Cu. In one embodiment, the semiconductor comprises a molar percentage of Cu and Bi whereby the molar percentage of Cu divided by the molar percentage of Bi is greater than 1.2. In a preferred embodiment, the semiconductor is manufactured as a thin film having a thickness less than 600 nm.

Single-mode very wide tunability in laterally coupled semiconductor lasers with electrically controlled reflectivities

NASA Astrophysics Data System (ADS)

Griffel, Giora; Chen, Howard Z.; Grave, Ilan; Yariv, Amnon

1991-04-01

The operation of a novel multisection structure comprised of laterally coupled gain-guided semiconductor lasers is demonstrated. It is shown that tunable single longitudinal mode operation can be achieved with a high degree of frequency selectivity. The device has a tuning range of 14.5 nm, the widest observed to date in a monolithic device.

Total-dose radiation effects data for semiconductor devices (1989 supplement)

NASA Technical Reports Server (NTRS)

Martin, Keith E.; Coss, James R.; Goben, Charles A.; Shaw, David C.; Farmanesh, Sam; Davarpanah, Michael M.; Craft, Leroy H.; Price, William E.

1990-01-01

Steady state, total dose radiation test data are provided for electronic designers and other personnel using semiconductor devices in a radiation environment. The data are presented in graphic and narrative formats. Two primary radiation source types were used: Cobalt-60 gamma rays and a Dynamitron electron accelerator capable of delivering 2.5 MeV electrons at a steady rate.

Voyager electronic parts radiation program, volume 1

NASA Technical Reports Server (NTRS)

Stanley, A. G.; Martin, K. E.; Price, W. E.

1977-01-01

The Voyager spacecraft is subject to radiation from external natural space, from radioisotope thermoelectric generators and heater units, and from the internal environment where penetrating electrons generate surface ionization effects in semiconductor devices. Methods for radiation hardening and tests for radiation sensitivity are described. Results of characterization testing and sample screening of over 200 semiconductor devices in a radiation environment are summarized.

Semiconductor diode with external field modulation

DOEpatents

Nasby, Robert D.

2000-01-01

A non-destructive-readout nonvolatile semiconductor diode switching device that may be used as a memory element is disclosed. The diode switching device is formed with a ferroelectric material disposed above a rectifying junction to control the conduction characteristics therein by means of a remanent polarization. The invention may be used for the formation of integrated circuit memories for the storage of information.

Improvement of screening methods for silicon planar semiconductor devices

NASA Technical Reports Server (NTRS)

Berger, W. M.

1972-01-01

The results of the program for the development of a more sensitive method for selecting silicon planar semiconductor devices for long life applications are reported. The manufacturing technologies (MOS and Bipolar) are discussed along with the screening procedures developed as a result of the tests and evaluations, and the effectiveness of the MOS and Bilayer screening procedures are evaluated.

High-Temperature Electronics: A Role for Wide Bandgap Semiconductors?

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Okojie, Robert S.; Chen, Liang-Yu

2002-01-01

It is increasingly recognized that semiconductor based electronics that can function at ambient temperatures higher than 150 C without external cooling could greatly benefit a variety of important applications, especially-in the automotive, aerospace, and energy production industries. The fact that wide bandgap semiconductors are capable of electronic functionality at much higher temperatures than silicon has partially fueled their development, particularly in the case of SiC. It appears unlikely that wide bandgap semiconductor devices will find much use in low-power transistor applications until the ambient temperature exceeds approximately 300 C, as commercially available silicon and silicon-on-insulator technologies are already satisfying requirements for digital and analog very large scale integrated circuits in this temperature range. However, practical operation of silicon power devices at ambient temperatures above 200 C appears problematic, as self-heating at higher power levels results in high internal junction temperatures and leakages. Thus, most electronic subsystems that simultaneously require high-temperature and high-power operation will necessarily be realized using wide bandgap devices, once the technology for realizing these devices become sufficiently developed that they become widely available. Technological challenges impeding the realization of beneficial wide bandgap high ambient temperature electronics, including material growth, contacts, and packaging, are briefly discussed.

Tuning charge carrier transport and optical birefringence in liquid-crystalline thin films: A new design space for organic light-emitting diodes.

PubMed

Keum, Chang-Min; Liu, Shiyi; Al-Shadeedi, Akram; Kaphle, Vikash; Callens, Michiel Koen; Han, Lu; Neyts, Kristiaan; Zhao, Hongping; Gather, Malte C; Bunge, Scott D; Twieg, Robert J; Jakli, Antal; Lüssem, Björn

2018-01-15

Liquid-crystalline organic semiconductors exhibit unique properties that make them highly interesting for organic optoelectronic applications. Their optical and electrical anisotropies and the possibility to control the alignment of the liquid-crystalline semiconductor allow not only to optimize charge carrier transport, but to tune the optical property of organic thin-film devices as well. In this study, the molecular orientation in a liquid-crystalline semiconductor film is tuned by a novel blading process as well as by different annealing protocols. The altered alignment is verified by cross-polarized optical microscopy and spectroscopic ellipsometry. It is shown that a change in alignment of the liquid-crystalline semiconductor improves charge transport in single charge carrier devices profoundly. Comparing the current-voltage characteristics of single charge carrier devices with simulations shows an excellent agreement and from this an in-depth understanding of single charge carrier transport in two-terminal devices is obtained. Finally, p-i-n type organic light-emitting diodes (OLEDs) compatible with vacuum processing techniques used in state-of-the-art OLEDs are demonstrated employing liquid-crystalline host matrix in the emission layer.

Design of Contact Electrodes for Semiconductor Nanowire Solar Energy Harvesting Devices.

PubMed

Lin, Tzuging; Ramadurgam, Sarath; Yang, Chen

2017-04-12

Transparent, low-resistive contacts are critical for efficient solar energy harvesting devices. It is important to reconsider the material choices and electrode design as devices move from 2D films to 1D nanostructures. In this paper, we study the effectiveness of indium tin oxide (ITO) and metals, such as Ag and Cu, as contacts in 2D and 1D systems. Although ITO has been studied extensively and developed into an effective transparent contact for 2D devices, our results show that effectiveness does not translate to 1D systems. Particularly with consideration of resistance requirement, nanowires with metal shells as contacts enable better absorption within the semiconductor as compared to ITO. Furthermore, there is a strong dependence of contact performance on the semiconductor band gap and diameter of nanowires. We found that metal contacts outperform ITO for nanowire devices, regardless of the sheet resistance constraint, in the regime of diameters less than 100 nm and band-gaps greater than 1 eV. These metal shells optimized for best absorption are significantly thinner than ITO, which enables for the design of devices with high nanowire number density and consequently higher device efficiencies.

Development of a physical and electronic model for RuO 2 nanorod rectenna devices

NASA Astrophysics Data System (ADS)

Dao, Justin

Ruthenium oxide (RuO2) nanorods are an emergent technology in nanostructure devices. As the physical size of electronics approaches a critical lower limit, alternative solutions to further device miniaturization are currently under investigation. Thin-film nanorod growth is an interesting technology, being investigated for use in wireless communications, sensor systems, and alternative energy applications. In this investigation, self-assembled RuO2 nanorods are grown on a variety of substrates via a high density plasma, reactive sputtering process. Nanorods have been found to grow on substrates that form native oxide layers when exposed to air, namely silicon, aluminum, and titanium. Samples were analyzed with Scanning Electron Microscopy (SEM) and Transmission Electron Microscopy (TEM) techniques. Conductive Atomic Force Microscopy (C-AFM) measurements were performed on single nanorods to characterize structure and electrical conductivity. The C-AFM probe tip is placed on a single nanorod and I-V characteristics are measured, potentially exhibiting rectifying capabilities. An analysis of these results using fundamental semiconductor physics principles is presented. Experimental data for silicon substrates was most closely approximated by the Simmons model for direct electron tunneling, whereas that of aluminum substrates was well approximated by Fowler-Nordheim tunneling. The native oxide of titanium is regarded as a semiconductor rather than an insulator and its ability to function as a rectifier is not strong. An electronic model for these nanorods is described herein.

Observation of turnover of spontaneous polarization in ferroelectric layer of pentacene/poly-(vinylidene-trifluoroethylene) double-layer capacitor under photo illumination by optical second-harmonic generation measurement

NASA Astrophysics Data System (ADS)

Shi, Zhemin; Taguchi, Dai; Manaka, Takaaki; Iwamoto, Mitsumasa

2016-04-01

The details of turnover process of spontaneous polarization and associated carrier motions in indium-tin oxide/poly-(vinylidene-trifluoroethylene)/pentacene/Au capacitor were analyzed by coupling displacement current measurement (DCM) and electric-field-induced optical second-harmonic generation (EFISHG) measurement. A model was set up from DCM results to depict the relationship between electric field in semiconductor layer and applied external voltage, proving that photo illumination effect on the spontaneous polarization process lied in variation of semiconductor conductivity. The EFISHG measurement directly and selectively probed the electric field distribution in semiconductor layer, modifying the model and revealing detailed carrier behaviors involving photo illumination effect, dipole reversal, and interfacial charging in the device. A further decrease of DCM current in the low voltage region under illumination was found as the result of illumination effect, and the result was argued based on the changing of the total capacitance of the double-layer capacitors.

A new coupling mechanism between two graphene electron waveguides for ultrafast switching

NASA Astrophysics Data System (ADS)

Huang, Wei; Liang, Shi-Jun; Kyoseva, Elica; Ang, Lay Kee

2018-03-01

In this paper, we report a novel coupling between two graphene electron waveguides, in analogy the optical waveguides. The design is based on the coherent quantum mechanical tunneling of Rabi oscillation between the two graphene electron waveguides. Based on this coupling mechanism, we propose that it can be used as an ultrafast electronic switching device. Based on a modified coupled mode theory, we construct a theoretical model to analyze the device characteristics, and predict that the switching speed is faster than 1 ps and the on-off ratio exceeds 106. Due to the long mean free path of electrons in graphene at room temperature, the proposed design avoids the limitation of low temperature operation required in the traditional design by using semiconductor quantum-well structure. The layout of our design is similar to that of a standard complementary metal-oxide-semiconductor transistor that should be readily fabricated with current state-of-art nanotechnology.

Shockwave generation by a semiconductor bridge operation in water

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zvulun, E.; Toker, G.; Gurovich, V. Tz.

2014-05-28

A semiconductor bridge (SCB) is a silicon device, used in explosive systems as the electrical initiator element. In recent years, SCB plasma has been extensively studied, both electrically and using fast photography and spectroscopic imaging. However, the value of the pressure buildup at the bridge remains unknown. In this study, we operated SCB devices in water and, using shadow imaging and reference beam interferometry, obtained the velocity of the shock wave propagation and distribution of the density of water. These results, together with a self-similar hydrodynamic model, were used to calculate the pressure generated by the exploding SCB. In addition,more » the results obtained showed that the energy of the water flow exceeds significantly the energy deposited into the exploded SCB. The latter can be explained by the combustion of the aluminum and silicon atoms released in water, which acts as an oxidizing medium.« less

Deformable inorganic semiconductor

NASA Astrophysics Data System (ADS)

Kim, Dae-Hyeong; Cha, Gi Doo

2018-05-01

Unlike conventional inorganic semiconductors, which are typically brittle, α-Ag2S exhibits room-temperature ductility with favourable electrical properties, offering promise for use in high-performance flexible and stretchable devices.

Predictive Models for Semiconductor Device Design and Processing

NASA Technical Reports Server (NTRS)

Meyyappan, Meyya; Arnold, James O. (Technical Monitor)

1998-01-01

The device feature size continues to be on a downward trend with a simultaneous upward trend in wafer size to 300 mm. Predictive models are needed more than ever before for this reason. At NASA Ames, a Device and Process Modeling effort has been initiated recently with a view to address these issues. Our activities cover sub-micron device physics, process and equipment modeling, computational chemistry and material science. This talk would outline these efforts and emphasize the interaction among various components. The device physics component is largely based on integrating quantum effects into device simulators. We have two parallel efforts, one based on a quantum mechanics approach and the second, a semiclassical hydrodynamics approach with quantum correction terms. Under the first approach, three different quantum simulators are being developed and compared: a nonequlibrium Green's function (NEGF) approach, Wigner function approach, and a density matrix approach. In this talk, results using various codes will be presented. Our process modeling work focuses primarily on epitaxy and etching using first-principles models coupling reactor level and wafer level features. For the latter, we are using a novel approach based on Level Set theory. Sample results from this effort will also be presented.

Methods of measurement for semiconductor materials, process control, and devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1972-01-01

Significant accomplishments include development of a procedure to correct for the substantial differences of transistor delay time as measured with different instruments or with the same instrument at different frequencies; association of infrared response spectra of poor quality germanium gamma ray detectors with spectra of detectors fabricated from portions of a good crystal that had been degraded in known ways; and confirmation of the excellent quality and cosmetic appearance of ultrasonic bonds made with aluminum ribbon wire. Work is continuing on measurement of resistivity of semiconductor crystals; study of gold-doped silicon, development of the infrared response technique; evaluation of wire bonds and die attachment; and measurement of thermal properties of semiconductor devices, delay time and related carrier transport properties in junction devices, and noise properties of microwave diodes.

Physical Modeling of Activation Energy in Organic Semiconductor Devices based on Energy and Momentum Conservations

PubMed Central

Mao, Ling-Feng; Ning, H.; Hu, Changjun; Lu, Zhaolin; Wang, Gaofeng

2016-01-01

Field effect mobility in an organic device is determined by the activation energy. A new physical model of the activation energy is proposed by virtue of the energy and momentum conservation equations. The dependencies of the activation energy on the gate voltage and the drain voltage, which were observed in the experiments in the previous independent literature, can be well explained using the proposed model. Moreover, the expression in the proposed model, which has clear physical meanings in all parameters, can have the same mathematical form as the well-known Meyer-Neldel relation, which lacks of clear physical meanings in some of its parameters since it is a phenomenological model. Thus it not only describes a physical mechanism but also offers a possibility to design the next generation of high-performance optoelectronics and integrated flexible circuits by optimizing device physical parameter. PMID:27103586

Self-cleaning and surface chemical reactions during hafnium dioxide atomic layer deposition on indium arsenide.

PubMed

Timm, Rainer; Head, Ashley R; Yngman, Sofie; Knutsson, Johan V; Hjort, Martin; McKibbin, Sarah R; Troian, Andrea; Persson, Olof; Urpelainen, Samuli; Knudsen, Jan; Schnadt, Joachim; Mikkelsen, Anders

2018-04-12

Atomic layer deposition (ALD) enables the ultrathin high-quality oxide layers that are central to all modern metal-oxide-semiconductor circuits. Crucial to achieving superior device performance are the chemical reactions during the first deposition cycle, which could ultimately result in atomic-scale perfection of the semiconductor-oxide interface. Here, we directly observe the chemical reactions at the surface during the first cycle of hafnium dioxide deposition on indium arsenide under realistic synthesis conditions using photoelectron spectroscopy. We find that the widely used ligand exchange model of the ALD process for the removal of native oxide on the semiconductor and the simultaneous formation of the first hafnium dioxide layer must be significantly revised. Our study provides substantial evidence that the efficiency of the self-cleaning process and the quality of the resulting semiconductor-oxide interface can be controlled by the molecular adsorption process of the ALD precursors, rather than the subsequent oxide formation.

Non-contact, non-destructive, quantitative probing of interfacial trap sites for charge carrier transport at semiconductor-insulator boundary

NASA Astrophysics Data System (ADS)

Choi, Wookjin; Miyakai, Tomoyo; Sakurai, Tsuneaki; Saeki, Akinori; Yokoyama, Masaaki; Seki, Shu

2014-07-01

The density of traps at semiconductor-insulator interfaces was successfully estimated using microwave dielectric loss spectroscopy with model thin-film organic field-effect transistors. The non-contact, non-destructive analysis technique is referred to as field-induced time-resolved microwave conductivity (FI-TRMC) at interfaces. Kinetic traces of FI-TRMC transients clearly distinguished the mobile charge carriers at the interfaces from the immobile charges trapped at defects, allowing both the mobility of charge carriers and the number density of trap sites to be determined at the semiconductor-insulator interfaces. The number density of defects at the interface between evaporated pentacene on a poly(methylmethacrylate) insulating layer was determined to be 1012 cm-2, and the hole mobility was up to 6.5 cm2 V-1 s-1 after filling the defects with trapped carriers. The FI-TRMC at interfaces technique has the potential to provide rapid screening for the assessment of interfacial electronic states in a variety of semiconductor devices.

N-type molecular electrical doping in organic semiconductors: formation and dissociation efficiencies of charge transfer complex

NASA Astrophysics Data System (ADS)

Kim, Jae-Min; Yoo, Seung-Jun; Moon, Chang-Ki; Sim, Bomi; Lee, Jae-Hyun; Lim, Heeseon; Kim, Jeong Won; Kim, Jang-Joo

2016-09-01

Electrical doping is an important method in organic electronics to enhance device efficiency by controlling Fermi level, increasing conductivity, and reducing injection barrier from electrode. To understand the charge generation process of dopant in doped organic semiconductors, it is important to analyze the charge transfer complex (CTC) formation and dissociation into free charge carrier. In this paper, we correlate charge generation efficiency with the CTC formation and dissociation efficiency of n-dopant in organic semiconductors (OSs). The CTC formation efficiency of Rb2CO3 linearly decreases from 82.8% to 47.0% as the doping concentration increases from 2.5 mol% to 20 mol%. The CTC formation efficiency and its linear decrease with doping concentration are analytically correlated with the concentration-dependent size and number of dopant agglomerates by introducing the degree of reduced CTC formation. Lastly, the behavior of dissociation efficiency is discussed based on the picture of the statistical semiconductor theory and the frontier orbital hybridization model.

Characterization of the Hole Transport and Electrical Properties in the Small-Molecule Organic Semiconductors

NASA Astrophysics Data System (ADS)

Wang, L. G.; Zhu, J. J.; Liu, X. L.; Cheng, L. F.

2017-10-01

In this paper, we investigate the hole transport and electrical properties in a small-molecule organic material N, N'-bis(1-naphthyl)- N, N'-diphenyl-1,1'-biphenyl-4,4'-diamine (NPB), which is frequently used in organic light-emitting diodes. It is shown that the thickness-dependent current density versus voltage ( J- V) characteristics of sandwich-type NPB-based hole-only devices cannot be described well using the conventional mobility model without carrier density or electric field dependence. However, a consistent and excellent description of the thickness-dependent and temperature-dependent J- V characteristics of NPB hole-only devices can be obtained with a single set of parameters by using our recently introduced improved model that take into account the temperature, carrier density, and electric field dependence of the mobility. For the small-molecule organic semiconductor studied, we find that the width of the Gaussian distribution of density of states σ and the lattice constant a are similar to the values reported for conjugated polymers. Furthermore, we show that the boundary carrier density has an important effect on the J- V characteristics. Both the maximum of carrier density and the minimum of electric field appear near the interface of NPB hole-only devices.

Laser-based irradiation apparatus and method to measure the functional dose-rate response of semiconductor devices

DOEpatents

Horn, Kevin M [Albuquerque, NM

2008-05-20

A broad-beam laser irradiation apparatus can measure the parametric or functional response of a semiconductor device to exposure to dose-rate equivalent infrared laser light. Comparisons of dose-rate response from before, during, and after accelerated aging of a device, or from periodic sampling of devices from fielded operational systems can determine if aging has affected the device's overall functionality. The dependence of these changes on equivalent dose-rate pulse intensity and/or duration can be measured with the apparatus. The synchronized introduction of external electrical transients into the device under test can be used to simulate the electrical effects of the surrounding circuitry's response to a radiation exposure while exposing the device to dose-rate equivalent infrared laser light.

Effect of traps on the charge transport in semiconducting polymer PCDTBT

NASA Astrophysics Data System (ADS)

Khan, Mohd Taukeer; Agrawal, Vikash; Almohammedi, Abdullah; Gupta, Vinay

2018-07-01

Organic semiconductors (OSCs) are nowadays called upon as promising candidates for next generation electronics devices. Due to disorder structure of these materials, a high density of traps are present in their energy band gap which affect the performance of these devices. In the present manuscript, we have investigated the role of traps on charge transport in PCDTBT thin film by measuring the temperature dependent J(V) characteristics in hole only device configuration. The obtained results were analyzed by space charge limited (SCL) conduction model. It has been found that the room temperature J(V) characteristics follow Mott-Gurney square law for trap-free SCL conduction. But below 278 K, the current increases according to trap-filling SCL law with traps distributed exponentially in the band gap of semiconductor. Furthermore, after reaching a crossover voltage of VC ∽ 12 V, all the traps filled by injected carriers and the trap-filling SCL current switch to trap-free SCL current. The hole mobility of trap-free SCL current is about one order higher as compared trap-filling SCL current and remains constant with temperature.

Investigation of Short Channel Effects on Device Performance for 60nm NMOS Transistor

NASA Astrophysics Data System (ADS)

Chinnappan, U.; Sanudin, R.

2017-08-01

In the aggressively scaled complementary metal oxide semiconductor (CMOS) devices, shallower p-n junctions and low sheet resistances are essential for short-channel effect (SCE) control and high device performance. The SCE are attributed to two physical phenomena that are the limitation imposed on electron drift characteristics in channel and the modification of the threshold voltage (Vth) due to the shortening channel length. The decrement of Vth with decrement in gate length is a well-known attribute in SCE known as “threshold voltage roll-off’. In this research, the Technology Computer Aided Design (TCAD) was used to model the SCE phenomenon effect on 60nm n-type metal oxide semiconductor (NMOS) transistor. There are three parameters being investigated, which are the oxide thickness (Tox), gate length (L), acceptor concentration (Na). The simulation data were used to visualise the effect of SCE on the 60nm NMOS transistor. Simulation data suggest that all three parameters have significant effect on Vth, and hence on the transistor performance. It is concluded that there is a trade-off among these three parameters to obtain an optimized transistor performance.

Charge Separation at Mixed-Dimensional Single and Multilayer MoS2/Silicon Nanowire Heterojunctions.

PubMed

Henning, Alex; Sangwan, Vinod K; Bergeron, Hadallia; Balla, Itamar; Sun, Zhiyuan; Hersam, Mark C; Lauhon, Lincoln J

2018-05-16

Layered two-dimensional (2-D) semiconductors can be combined with other low-dimensional semiconductors to form nonplanar mixed-dimensional van der Waals (vdW) heterojunctions whose charge transport behavior is influenced by the heterojunction geometry, providing a new degree of freedom to engineer device functions. Toward that end, we investigated the photoresponse of Si nanowire/MoS 2 heterojunction diodes with scanning photocurrent microscopy and time-resolved photocurrent measurements. Comparison of n-Si/MoS 2 isotype heterojunctions with p-Si/MoS 2 heterojunction diodes under varying biases shows that the depletion region in the p-n heterojunction promotes exciton dissociation and carrier collection. We measure an instrument-limited response time of 1 μs, which is 10 times faster than the previously reported response times for planar Si/MoS 2 devices, highlighting the advantages of the 1-D/2-D heterojunction. Finite element simulations of device models provide a detailed understanding of how the electrostatics affect charge transport in nanowire/vdW heterojunctions and inform the design of future vdW heterojunction photodetectors and transistors.

Use of layer strains in strained-layer superlattices to make devices for operation in new wavelength ranges, E. G. , InAsSb at 8 to 12. mu. m. [InAs/sub 1-x/Sb/sub x/

DOEpatents

Osbourn, G.C.

1983-10-06

An intrinsic semiconductor electro-optical device comprises a p-n junction intrinsically responsive, when cooled, to electromagnetic radiation in the wavelength range of 8 to 12 ..mu..m. This radiation responsive p-n junction comprises a strained-layer superlattice (SLS) of alternating layers of two different III-V semiconductors. The lattice constants of the two semiconductors are mismatched, whereby a total strain is imposed on each pair of alternating semiconductor layers in the SLS structure, the proportion of the total strain which acts on each layer of the pair being proportional to the ratio of the layer thicknesses of each layer in the pair.

Solution processed molecular floating gate for flexible flash memories

NASA Astrophysics Data System (ADS)

Zhou, Ye; Han, Su-Ting; Yan, Yan; Huang, Long-Biao; Zhou, Li; Huang, Jing; Roy, V. A. L.

2013-10-01

Solution processed fullerene (C60) molecular floating gate layer has been employed in low voltage nonvolatile memory device on flexible substrates. We systematically studied the charge trapping mechanism of the fullerene floating gate for both p-type pentacene and n-type copper hexadecafluorophthalocyanine (F16CuPc) semiconductor in a transistor based flash memory architecture. The devices based on pentacene as semiconductor exhibited both hole and electron trapping ability, whereas devices with F16CuPc trapped electrons alone due to abundant electron density. All the devices exhibited large memory window, long charge retention time, good endurance property and excellent flexibility. The obtained results have great potential for application in large area flexible electronic devices.

Solution processed molecular floating gate for flexible flash memories

PubMed Central

Zhou, Ye; Han, Su-Ting; Yan, Yan; Huang, Long-Biao; Zhou, Li; Huang, Jing; Roy, V. A. L.

2013-01-01

Solution processed fullerene (C60) molecular floating gate layer has been employed in low voltage nonvolatile memory device on flexible substrates. We systematically studied the charge trapping mechanism of the fullerene floating gate for both p-type pentacene and n-type copper hexadecafluorophthalocyanine (F16CuPc) semiconductor in a transistor based flash memory architecture. The devices based on pentacene as semiconductor exhibited both hole and electron trapping ability, whereas devices with F16CuPc trapped electrons alone due to abundant electron density. All the devices exhibited large memory window, long charge retention time, good endurance property and excellent flexibility. The obtained results have great potential for application in large area flexible electronic devices. PMID:24172758

Roadmap on semiconductor-cell biointerfaces

NASA Astrophysics Data System (ADS)

Tian, Bozhi; Xu, Shuai; Rogers, John A.; Cestellos-Blanco, Stefano; Yang, Peidong; Carvalho-de-Souza, João L.; Bezanilla, Francisco; Liu, Jia; Bao, Zhenan; Hjort, Martin; Cao, Yuhong; Melosh, Nicholas; Lanzani, Guglielmo; Benfenati, Fabio; Galli, Giulia; Gygi, Francois; Kautz, Rylan; Gorodetsky, Alon A.; Kim, Samuel S.; Lu, Timothy K.; Anikeeva, Polina; Cifra, Michal; Krivosudský, Ondrej; Havelka, Daniel; Jiang, Yuanwen

2018-05-01

This roadmap outlines the role semiconductor-based materials play in understanding the complex biophysical dynamics at multiple length scales, as well as the design and implementation of next-generation electronic, optoelectronic, and mechanical devices for biointerfaces. The roadmap emphasizes the advantages of semiconductor building blocks in interfacing, monitoring, and manipulating the activity of biological components, and discusses the possibility of using active semiconductor-cell interfaces for discovering new signaling processes in the biological world.

Plausible carrier transport model in organic-inorganic hybrid perovskite resistive memory devices

NASA Astrophysics Data System (ADS)

Park, Nayoung; Kwon, Yongwoo; Choi, Jaeho; Jang, Ho Won; Cha, Pil-Ryung

2018-04-01

We demonstrate thermally assisted hopping (TAH) as an appropriate carrier transport model for CH3NH3PbI3 resistive memories. Organic semiconductors, including organic-inorganic hybrid perovskites, have been previously speculated to follow the space-charge-limited conduction (SCLC) model. However, the SCLC model cannot reproduce the temperature dependence of experimental current-voltage curves. Instead, the TAH model with temperature-dependent trap densities and a constant trap level are demonstrated to well reproduce the experimental results.

Investigation of Gallium Nitride Transistor Reliability through Accelerated Life Testing and Modeling

DTIC Science & Technology

2011-12-01

Carbon Cd Cadmium CdS Cadmium Sulfide CMOS Complementary Metal Oxide Semiconductor DC Direct Current DoD Department of Defense EBL Electron...Crane Division [NAVSEA Crane], Crane, Indiana ) are Section 4.1and Section 4.3, Condition 2. Eight devices were stressed for over 1000 hours each and

Büttiker probes for dissipative phonon quantum transport in semiconductor nanostructures

NASA Astrophysics Data System (ADS)

Miao, K.; Sadasivam, S.; Charles, J.; Klimeck, G.; Fisher, T. S.; Kubis, T.

2016-03-01

Theoretical prediction of phonon transport in modern semiconductor nanodevices requires atomic resolution of device features and quantum transport models covering coherent and incoherent effects. The nonequilibrium Green's function method is known to serve this purpose well but is numerically expensive in simulating incoherent scattering processes. This work extends the efficient Büttiker probe approach widely used in electron transport to phonons and considers salient implications of the method. Different scattering mechanisms such as impurity, boundary, and Umklapp scattering are included, and the method is shown to reproduce the experimental thermal conductivity of bulk Si and Ge over a wide temperature range. Temperature jumps at the lead/device interface are captured in the quasi-ballistic transport regime consistent with results from the Boltzmann transport equation. Results of this method in Si/Ge heterojunctions illustrate the impact of atomic relaxation on the thermal interface conductance and the importance of inelastic scattering to activate high-energy channels for phonon transport. The resultant phonon transport model is capable of predicting the thermal performance in the heterostructure efficiently.

Extended Abstracts of the U.S. Workshop on the Physics and Chemistry of Mercury Cadmium Telluride Held in Orlando, Florida on October 11-13, 1988

DTIC Science & Technology

1988-12-01

Mainzer SCD - Semi-Conductor Devices A Tadiran-Rafael Partnership, Misgav Mobile Post, 20179,ISRAEL The effect of strain and stress on the performance of...Nili Mainzer and Eliezer Weiss SCD - Semi-Conductor Devices A Tadiran-Rafael Partnership, Misgav Mobile Post, 20179, ISRAEL In the 1987 workshop we have

Analysis of Time Dependent Electric Field Degradation in AlGaN/GaN HEMTs (POSTPRINT)

DTIC Science & Technology

2014-10-01

identifying and understanding the failure mechanisms that limit the safe operating area of GaN HEMTs. 15. SUBJECT TERMS aluminum gallium nitride... gallium nitride, HEMTs, semiconductor device reliability, transistors 16. SECURITY CLASSIFICATION OF: 17. LIMITATION OF ABSTRACT SAR 18. NUMBER...area of GaN HEMTs. Index Terms— Aluminum gallium nitride, gallium nitride, HEMTs, semiconductor device reliability, transistors. I. INTRODUCTION A

Investigation of Optical Properties of Zinc Oxide Photodetector

NASA Astrophysics Data System (ADS)

Chism, Tyler

UV photodetection devices have many important applications for uses in biological detection, gas sensing, weaponry detection, fire detection, chemical analysis, and many others. Today's photodetectors often utilize semiconductors such as GaAs to achieve high responsivity and sensitivity. Zinc oxide, unlike many other semiconductors, is cheap, abundant, non-toxic, and easy to grow different morphologies at the micro and nano scale. With the proliferation of these devices also comes the impending need to further study optics and photonics in relation to phononics and plasmonics, and the general principles underlying the interaction of photons with solid state matter and, specifically, semiconductors. For this research a metal-semiconductor-metal UV photodetector has been fabricated by using a quartz substrate on top of which was deposited micropatterned gold in an interdigitated electrode design. On this, sparsely coated zinc oxide nano trees were hydrothermally grown. The UV photodetection device showed promise for detection applications, especially because zinc oxide is also very thermally stable, a quality which is highly sought after in today's UV photodetectors. Furthermore, the newly synthesized photodetector was used to investigate optical properties and how they respond to different stimuli. It was discovered that the photons transmitted through the sparsely coated zinc oxide nano trees decreased as the voltage across the device increased. This research is aimed at better understanding photons interaction with matter and also to open the door for new devices with tunable optical properties such as transmission.

A photovoltaic device structure based on internal electron emission.

PubMed

McFarland, Eric W; Tang, Jing

2003-02-06

There has been an active search for cost-effective photovoltaic devices since the development of the first solar cells in the 1950s (refs 1-3). In conventional solid-state solar cells, electron-hole pairs are created by light absorption in a semiconductor, with charge separation and collection accomplished under the influence of electric fields within the semiconductor. Here we report a multilayer photovoltaic device structure in which photon absorption instead occurs in photoreceptors deposited on the surface of an ultrathin metal-semiconductor junction Schottky diode. Photoexcited electrons are transferred to the metal and travel ballistically to--and over--the Schottky barrier, so providing the photocurrent output. Low-energy (approximately 1 eV) electrons have surprisingly long ballistic path lengths in noble metals, allowing a large fraction of the electrons to be collected. Unlike conventional cells, the semiconductor in this device serves only for majority charge transport and separation. Devices fabricated using a fluorescein photoreceptor on an Au/TiO2/Ti multilayer structure had typical open-circuit photovoltages of 600-800 mV and short-circuit photocurrents of 10-18 micro A cm(-2) under 100 mW cm(-2) visible band illumination: the internal quantum efficiency (electrons measured per photon absorbed) was 10 per cent. This alternative approach to photovoltaic energy conversion might provide the basis for durable low-cost solar cells using a variety of materials.

Rhombohedral cubic semiconductor materials on trigonal substrate with single crystal properties and devices based on such materials

NASA Technical Reports Server (NTRS)

Park, Yeonjoon (Inventor); Choi, Sang Hyouk (Inventor); King, Glen C. (Inventor); Elliott, James R. (Inventor)

2012-01-01

Growth conditions are developed, based on a temperature-dependent alignment model, to enable formation of cubic group IV, group II-V and group II-VI crystals in the [111] orientation on the basal (0001) plane of trigonal crystal substrates, controlled such that the volume percentage of primary twin crystal is reduced from about 40% to about 0.3%, compared to the majority single crystal. The control of stacking faults in this and other embodiments can yield single crystalline semiconductors based on these materials that are substantially without defects, or improved thermoelectric materials with twinned crystals for phonon scattering while maintaining electrical integrity. These methods can selectively yield a cubic-on-trigonal epitaxial semiconductor material in which the cubic layer is substantially either directly aligned, or 60 degrees-rotated from, the underlying trigonal material.

Modeling of Optoelectronic Devices

NASA Technical Reports Server (NTRS)

Li, Jian-Zhong; Woo, Alex C. (Technical Monitor)

2000-01-01

Ultrafast modulation of semiconductor quantum well (QW) laser is of technological importance for information technology. Improvement by order(s) of magnitude in data transfer rate is possible as terahertz (THz) radiation is available for heating the laser at picosecond time scale. Optical gain modulation in the QW is achieved via temperature modulation of electron-hole plasma (EHP). Applications include free-space THz communication, optical switching, and pulse generation. The EHP in the semiconductor QW is described with a two-band model. Semiconductor Bloch equations with many-body effects are used to derive a hydrodynamical model for the active QW region. Because of ultrafast carrier-carrier scatterings in the order of 50 fs, EHP follows quasiequilibrium Fermi-Dirac distributions and THz field interacts incoherently with it. Carrier-longitudinal optical (LO) phonon scatterings and coherent laser-EHP interaction are treated microscopically in our physical model. A set of hydrodynamical equations for plasma density, temperature, and laser envelop amplitude are derived and Runge-Kutta method is adopted for numerical simulation. A typical 8 nm GaAs/Al(0.3)Ga(0.7) As single QW at 300 K is used. Additional information is contained in the original extended abstract.

Modeling direct interband tunneling. I. Bulk semiconductors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pan, Andrew, E-mail: pandrew@ucla.edu; Chui, Chi On; California NanoSystems Institute, University of California, Los Angeles, Los Angeles, California 90095

Interband tunneling is frequently studied using the semiclassical Kane model, despite uncertainty about its validity. Revisiting the physical basis of this formula, we find that it neglects coupling to other bands and underestimates transverse tunneling. As a result, significant errors can arise at low and high fields for small and large gap materials, respectively. We derive a simple multiband tunneling model to correct these defects analytically without arbitrary parameters. Through extensive comparison with band structure and quantum transport calculations for bulk InGaAs, InAs, and InSb, we probe the accuracy of the Kane and multiband formulas and establish the superiority ofmore » the latter. We also show that the nonlocal average electric field should be used when applying either of these models to nonuniform potentials. Our findings are important for efficient analysis and simulation of bulk semiconductor devices involving tunneling.« less

MBE Growth of Ferromagnetic Metal/Compound Semiconductor Heterostructures for Spintronics

ScienceCinema

Palmstrom, Chris [University of California, Santa Barbara, California, United States

2017-12-09

Electrical transport and spin-dependent transport across ferromagnet/semiconductor contacts is crucial in the realization of spintronic devices. Interfacial reactions, the formation of non-magnetic interlayers, and conductivity mismatch have been attributed to low spin injection efficiency. MBE has been used to grow epitaxial ferromagnetic metal/GA(1-x)AL(x)As heterostructures with the aim of controlling the interfacial structural, electronic, and magnetic properties. In situ, STM, XPS, RHEED and LEED, and ex situ XRD, RBS, TEM, magnetotransport, and magnetic characterization have been used to develop ferromagnetic elemental and metallic compound/compound semiconductor tunneling contacts for spin injection. The efficiency of the spin polarized current injected from the ferromagnetic contact has been determined by measuring the electroluminescence polarization of the light emitted from/GA(1-x)AL(x)As light-emitting diodes as a function of applied magnetic field and temperature. Interfacial reactions during MBE growth and post-growth anneal, as well as the semiconductor device band structure, were found to have a dramatic influence on the measured spin injection, including sign reversal. Lateral spin-transport devices with epitaxial ferromagnetic metal source and drain tunnel barrier contacts have been fabricated with the demonstration of electrical detection and the bias dependence of spin-polarized electron injection and accumulation at the contacts. This talk emphasizes the progress and achievements in the epitaxial growth of a number of ferromagnetic compounds/III-V semiconductor heterostructures and the progress towards spintronic devices.

Measurement and Modeling of Blocking Contacts for Cadmium Telluride Gamma Ray Detectors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Beck, Patrick R.

2010-01-07

Gamma ray detectors are important in national security applications, medicine, and astronomy. Semiconductor materials with high density and atomic number, such as Cadmium Telluride (CdTe), offer a small device footprint, but their performance is limited by noise at room temperature; however, improved device design can decrease detector noise by reducing leakage current. This thesis characterizes and models two unique Schottky devices: one with an argon ion sputter etch before Schottky contact deposition and one without. Analysis of current versus voltage characteristics shows that thermionic emission alone does not describe these devices. This analysis points to reverse bias generation current ormore » leakage through an inhomogeneous barrier. Modeling the devices in reverse bias with thermionic field emission and a leaky Schottky barrier yields good agreement with measurements. Also numerical modeling with a finite-element physics-based simulator suggests that reverse bias current is a combination of thermionic emission and generation. This thesis proposes further experiments to determine the correct model for reverse bias conduction. Understanding conduction mechanisms in these devices will help develop more reproducible contacts, reduce leakage current, and ultimately improve detector performance.« less

Astronaut Peggy Whitson Installs SUBSA Experiment

NASA Technical Reports Server (NTRS)

2002-01-01

Expedition Five flight engineer Peggy Whitson is shown installing the Solidification Using a Baffle in Sealed Ampoules (SUBSA) experiment in the Microgravity Science Glovebox (MSG) in the Destiny laboratory aboard the International Space Station (ISS). SUBSA examines the solidification of semiconductor crystals from a melted material. Semiconductor crystals are used for many products that touch our everyday lives. They are found in computer chips, integrated circuits, and a multitude of other electronic devices, such as sensors for medical imaging equipment and detectors of nuclear radiation. Materials scientists want to make better semiconductor crystals to be able to further reduce the size of high-tech devices. In the microgravity environment, convection and sedimentation are reduced, so fluids do not remove and deform. Thus, space laboratories provide an ideal environment of studying solidification from the melt. This investigation is expected to determine the mechanism causing fluid motion during production of semiconductors in space. It will provide insight into the role of the melt motion in production of semiconductor crystals, advancing our knowledge of the crystal growth process. This could lead to a reduction of defects in semiconductor crystals produced in space and on Earth.

International Space Station (ISS)

NASA Image and Video Library

2002-07-05

Expedition Five flight engineer Peggy Whitson is shown installing the Solidification Using a Baffle in Sealed Ampoules (SUBSA) experiment in the Microgravity Science Glovebox (MSG) in the Destiny laboratory aboard the International Space Station (ISS). SUBSA examines the solidification of semiconductor crystals from a melted material. Semiconductor crystals are used for many products that touch our everyday lives. They are found in computer chips, integrated circuits, and a multitude of other electronic devices, such as sensors for medical imaging equipment and detectors of nuclear radiation. Materials scientists want to make better semiconductor crystals to be able to further reduce the size of high-tech devices. In the microgravity environment, convection and sedimentation are reduced, so fluids do not remove and deform. Thus, space laboratories provide an ideal environment of studying solidification from the melt. This investigation is expected to determine the mechanism causing fluid motion during production of semiconductors in space. It will provide insight into the role of the melt motion in production of semiconductor crystals, advancing our knowledge of the crystal growth process. This could lead to a reduction of defects in semiconductor crystals produced in space and on Earth.

Review of - SiC wide-bandgap heterostructure properties as an alternate semiconductor material

NASA Astrophysics Data System (ADS)

Rajput Priti, J.; Patankar, Udayan S.; Koel, Ants; Nitnaware, V. N.

2018-05-01

Silicon substance (is also known as Quartz) is an abundant in nature and the electrical properties it exhibits, plays a vital role in developing its usage in the field of semiconductor. More than decades we can say that Silicon has shown desirable signs but at the later parts it has shown some research potential for development of alternative material as semiconductor devices. This need has come to light as we started scaling down in size of the Silicon material and up in speed. This semiconductor material started exhibiting several fundamental physical limits that include the minimum gate oxide thickness and the maximum saturation velocity of carriers which determines the operation frequency. Though the alternative semiconductors provide some answers (such as III-V's for high speed devices) for a path to skirt these problems, there also may be some ways to extend the life of silicon itself. Two paths are used as for alternative semiconductors i.e alternative gate dielectrics and silicon-based heterostructures. The SiC material has some strength properties under different conditions and find out the defects available in the material.

Clean graphene electrodes on organic thin-film devices via orthogonal fluorinated chemistry.

PubMed

Beck, Jonathan H; Barton, Robert A; Cox, Marshall P; Alexandrou, Konstantinos; Petrone, Nicholas; Olivieri, Giorgia; Yang, Shyuan; Hone, James; Kymissis, Ioannis

2015-04-08

Graphene is a promising flexible, highly transparent, and elementally abundant electrode for organic electronics. Typical methods utilized to transfer large-area films of graphene synthesized by chemical vapor deposition on metal catalysts are not compatible with organic thin-films, limiting the integration of graphene into organic optoelectronic devices. This article describes a graphene transfer process onto chemically sensitive organic semiconductor thin-films. The process incorporates an elastomeric stamp with a fluorinated polymer release layer that can be removed, post-transfer, via a fluorinated solvent; neither fluorinated material adversely affects the organic semiconductor materials. We used Raman spectroscopy, atomic force microscopy, and scanning electron microscopy to show that chemical vapor deposition graphene can be successfully transferred without inducing defects in the graphene film. To demonstrate our transfer method's compatibility with organic semiconductors, we fabricate three classes of organic thin-film devices: graphene field effect transistors without additional cleaning processes, transparent organic light-emitting diodes, and transparent small-molecule organic photovoltaic devices. These experiments demonstrate the potential of hybrid graphene/organic devices in which graphene is deposited directly onto underlying organic thin-film structures.

Atomic-scale investigations of current and future devices: from nitride-based transistors to quantum computing

NASA Astrophysics Data System (ADS)

Gordon, Luke

Our era is defined by its technology, and our future is dependent on its continued evolution. Over the past few decades, we have witnessed the expansion of advanced technology into all walks of life and all industries, driven by the exponential increase in the speed and power of semiconductor-based devices. However, as the length scale of devices reaches the atomic scale, a deep understanding of atomistic theory and its application is increasingly crucial. In order to illustrate the power of an atomistic approach to understanding devices, we will present results and conclusions from three interlinked projects: n-type doping of III-nitride semiconductors, defects for quantum computing, and macroscopic simulations of devices. First, we will study effective n-type doping of III-nitride semiconductors and their alloys, and analyze the barriers to effective n-type doping of III-nitrides and their alloys. In particular, we will study the formation of DX centers, and predict alloy composition onsets for various III-nitride alloys. In addition, we will perform a comprehensive study of alternative dopants, and provide potential alternative dopants to improve n-type conductivity in AlN and wide-band-gap nitride alloys. Next, we will discuss how atomic-scale defects can act as a curse for the development of quantum computers by contributing to decoherence at an atomic scale, specifically investigating the effect of two-level state defects (TLS) systems in alumina as a source of decoherence in superconducting qubits based on Josephson junctions; and also as a blessing, by allowing the identification of wholly new qubits in different materials, specifically showing calculations on defects in SiC for quantum computing applications. Finally, we will provide examples of recent calculations we have performed for devices using macrosopic device simulations, largely in conjunction with first-principles calculations. Specifically, we will discuss the power of using a multi-scale approach to accurately model oxide and nitride-based heterostructures, and thereby illustrate our ability to predict device performance on scales unreachable using a purely first-principles approach.

PREFACE: Semiconductor Nanostructures towards Electronic and Optoelectronic Device Applications II (Symposium K, E-MRS 2009 Spring Meeting)

NASA Astrophysics Data System (ADS)

Nötzel, Richard

2009-07-01

This volume of IOP Conference Series: Materials Science and Engineering contains papers that were presented at the special symposium K at the EMRS 2009 Spring Meeting held 8-12 June in Strasbourg, France, which was entitled 'Semiconductor Nanostructures towards Electronic and Optoelectronic Device Applications II'. Thanks to the broad interest a large variety of quantum dots and quantum wires and related nanostructures and their application in devices could be covered. There was significant progress in the epitaxial growth of semiconductor quantum dots seen in the operation of high-power, as well as mode locked laser diodes and the lateral positioning of quantum dots on patterned substrates or by selective area growth for future single quantum dot based optoelectronic and electronic devices. In the field of semiconductor nanowires high quality, almost twin free structures are now available together with a new degree of freedom for band structure engineering based on alternation of the crystal structure. In the search for Si based light emitting structures, nanocrystals and miniband-related near infrared luminescence of Si/Ge quantum dot superlattices with high quantum efficiency were reported. These highlights, among others, and the engaged discussions of the scientists, engineers and students brought together at the symposium emphasize how active the field of semiconductor nanostructures and their applications in devices is, so that we can look forward to the progress to come. Guest Editor Richard Nötzel COBRA Research Institute Department of Applied Physics Eindhoven University of Technology 5600 MB Eindhoven The Netherlands Tel.: +31 40 247 2047; fax: +31 40 246 1339 E-mail address: r.noetzel@tue.nl

Trends in solid state electronics, part 2

NASA Technical Reports Server (NTRS)

Gassaway, J. D.

1972-01-01

Developments in the fields of semiconductors and magnetics are surveyed. Materials, devices, theory, and fabrication technology are discussed. Important events up until the present time are reported, and events are interpreted through historical perspective. A brief analysis of forces which have driven the development of today's electronic technology and some projections of present trends are given. More detailed discussions are presented for four areas of contemporary interest: amorphous semiconductors, bubble domain devices, charge-coupled devices, and electron and ion beam techniques. Beam addressed magnetic memories are reviewed to a lesser extent.

Hydrogen ion microlithography

DOEpatents

Tsuo, Y. Simon; Deb, Satyen K.

1990-01-01

Disclosed is a hydrogen ion microlithography process for use in microelectronic fabrication and semiconductor device processing. The process comprises the steps of providing a single layer of either an amorphous silicon or hydrogenated amorphous silicon material. A pattern is recorded in a selected layer of amorphous silicon or hydrogenated amorphous silicon materials by preferentially implanting hydrogen ions therein so as to permit the selected layer to serve as a mask-resist wafer suitable for subsequent development and device fabrication. The layer is developed to provide a surface pattern therein adaptable for subsequent use in microelectronic fabrication and semiconductor device processing.

GaAs photoconductive semiconductor switch

DOEpatents

Loubriel, Guillermo M.; Baca, Albert G.; Zutavern, Fred J.

1998-01-01

A high gain, optically triggered, photoconductive semiconductor switch (PCSS) implemented in GaAs as a reverse-biased pin structure with a passivation layer above the intrinsic GaAs substrate in the gap between the two electrodes of the device. The reverse-biased configuration in combination with the addition of the passivation layer greatly reduces surface current leakage that has been a problem for prior PCSS devices and enables employment of the much less expensive and more reliable DC charging systems instead of the pulsed charging systems that needed to be used with prior PCSS devices.

Device and method for luminescence enhancement by resonant energy transfer from an absorptive thin film

DOE Office of Scientific and Technical Information (OSTI.GOV)

Akselrod, Gleb M.; Bawendi, Moungi G.; Bulovic, Vladimir

Disclosed are a device and a method for the design and fabrication of the device for enhancing the brightness of luminescent molecules, nanostructures, and thin films. The device includes a mirror, a dielectric medium or spacer, an absorptive layer, and a luminescent layer. The absorptive layer is a continuous thin film of a strongly absorbing organic or inorganic material. The luminescent layer may be a continuous luminescent thin film or an arrangement of isolated luminescent species, e.g., organic or metal-organic dye molecules, semiconductor quantum dots, or other semiconductor nanostructures, supported on top of the absorptive layer.

Boron selenide semiconductor detectors for thermal neutron counting

NASA Astrophysics Data System (ADS)

Kargar, Alireza; Tower, Joshua; Cirignano, Leonard; Shah, Kanai

2013-09-01

Thermal neutron detectors in planar configuration were fabricated from B2Se3 (Boron Selenide) crystals grown at RMD Inc. All fabricated semiconductor devices were characterized for the current-voltage (I-V) characteristic and neutron counting measurement. In this study, the resistivity of crystals is reported and the collected pulse height spectra are presented for devices irradiated with the 241AmBe neutron source. Long-term stability of the B2Se3 devices for neutron detection under continuous bias and without being under continuous bias was investigated and the results are reported. The B2Se3 devices showed response to thermal neutrons of the 241AmBe source.

Zinc Alloys for the Fabrication of Semiconductor Devices

NASA Technical Reports Server (NTRS)

Ryu, Yungryel; Lee, Tae S.

2009-01-01

ZnBeO and ZnCdSeO alloys have been disclosed as materials for the improvement in performance, function, and capability of semiconductor devices. The alloys can be used alone or in combination to form active photonic layers that can emit over a range of wavelength values. Materials with both larger and smaller band gaps would allow for the fabrication of semiconductor heterostructures that have increased function in the ultraviolet (UV) region of the spectrum. ZnO is a wide band-gap material possessing good radiation-resistance properties. It is desirable to modify the energy band gap of ZnO to smaller values than that for ZnO and to larger values than that for ZnO for use in semiconductor devices. A material with band gap energy larger than that of ZnO would allow for the emission at shorter wavelengths for LED (light emitting diode) and LD (laser diode) devices, while a material with band gap energy smaller than that of ZnO would allow for emission at longer wavelengths for LED and LD devices. The amount of Be in the ZnBeO alloy system can be varied to increase the energy bandgap of ZnO to values larger than that of ZnO. The amount of Cd and Se in the ZnCdSeO alloy system can be varied to decrease the energy band gap of ZnO to values smaller than that of ZnO. Each alloy formed can be undoped or can be p-type doped using selected dopant elements, or can be n-type doped using selected dopant elements. The layers and structures formed with both the ZnBeO and ZnCdSeO semiconductor alloys - including undoped, p-type-doped, and n-type-doped types - can be used for fabricating photonic and electronic semiconductor devices for use in photonic and electronic applications. These devices can be used in LEDs, LDs, FETs (field effect transistors), PN junctions, PIN junctions, Schottky barrier diodes, UV detectors and transmitters, and transistors and transparent transistors. They also can be used in applications for lightemitting display, backlighting for displays, UV and visible transmitters and detectors, high-frequency radar, biomedical imaging, chemical compound identification, molecular identification and structure, gas sensors, imaging systems, and for the fundamental studies of atoms, molecules, gases, vapors, and solids.

Observation of quantum oscillation of work function in ultrathin-metal/semiconductor junctions

DOE Office of Scientific and Technical Information (OSTI.GOV)

Takhar, Kuldeep; Meer, Mudassar; Khachariya, Dolar

2015-09-15

Quantization in energy level due to confinement is generally observed for semiconductors. This property is used for various quantum devices, and it helps to improve the characteristics of conventional devices. Here, the authors have demonstrated the quantum size effects in ultrathin metal (Ni) layers sandwiched between two large band-gap materials. The metal work function is found to oscillate as a function of its thickness. The thermionic emission current bears the signature of the oscillating work function, which has a linear relationship with barrier heights. This methodology allows direct observation of quantum oscillations in metals at room temperature using a Schottkymore » diode and electrical measurements using source-measure-units. The observed phenomena can provide additional mechanism to tune the barrier height of metal/semiconductor junctions, which are used for various electronic devices.« less

Apparatus and methods for memory using in-plane polarization

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, Junwei; Chang, Kai; Ji, Shuai-Hua

A memory device includes a semiconductor layer with an in-plane polarization component switchable between a first direction and a second direction. A writing electrode is employed to apply a writing voltage to the semiconductor layer to change the in-plane polarization component between the first direction and the second direction. A reading electrode is employed to apply a reading voltage to the semiconductor layer to measure a tunneling current substantially perpendicular to the polarization direction of the in-plane polarization component. The directions of the reading voltage and the writing voltage are substantially perpendicular to each other. Therefore, the reading process ismore » non-destructive. Thin films (e.g., one unit cell thick) of ferroelectric material can be used in the memory device to increase the miniaturization of the device.« less

Selective etchant for oxide sacrificial material in semiconductor device fabrication

DOEpatents

Clews, Peggy J.; Mani, Seethambal S.

2005-05-17

An etching composition and method is disclosed for removing an oxide sacrificial material during manufacture of semiconductor devices including micromechanical, microelectromechanical or microfluidic devices. The etching composition and method are based on the combination of hydrofluoric acid (HF) and sulfuric acid (H.sub.2 SO.sub.4). These acids can be used in the ratio of 1:3 to 3:1 HF:H.sub.2 SO.sub.4 to remove all or part of the oxide sacrificial material while providing a high etch selectivity for non-oxide materials including polysilicon, silicon nitride and metals comprising aluminum. Both the HF and H.sub.2 SO.sub.4 can be provided as "semiconductor grade" acids in concentrations of generally 40-50% by weight HF, and at least 90% by weight H.sub.2 SO.sub.4.

A nanocryotron comparator can connect single-flux-quantum circuits to conventional electronics

NASA Astrophysics Data System (ADS)

Zhao, Qing-Yuan; McCaughan, Adam N.; Dane, Andrew E.; Berggren, Karl K.; Ortlepp, Thomas

2017-04-01

Integration with conventional electronics offers a straightforward and economical approach to upgrading existing superconducting technologies, such as scaling up superconducting detectors into large arrays and combining single flux quantum (SFQ) digital circuits with semiconductor logic gates and memories. However, direct output signals from superconducting devices (e.g., Josephson junctions) are usually not compatible with the input requirements of conventional devices (e.g., transistors). Here, we demonstrate the use of a single three-terminal superconducting-nanowire device, called the nanocryotron (nTron), as a digital comparator to combine SFQ circuits with mature semiconductor circuits such as complementary metal oxide semiconductor (CMOS) circuits. Since SFQ circuits can digitize output signals from general superconducting devices and CMOS circuits can interface existing CMOS-compatible electronics, our results demonstrate the feasibility of a general architecture that uses an nTron as an interface to realize a ‘super-hybrid’ system consisting of superconducting detectors, superconducting quantum electronics, CMOS logic gates and memories, and other conventional electronics.

Mechanics and thermal management of stretchable inorganic electronics.

PubMed

Song, Jizhou; Feng, Xue; Huang, Yonggang

2016-03-01

Stretchable electronics enables lots of novel applications ranging from wearable electronics, curvilinear electronics to bio-integrated therapeutic devices that are not possible through conventional electronics that is rigid and flat in nature. One effective strategy to realize stretchable electronics exploits the design of inorganic semiconductor material in a stretchable format on an elastomeric substrate. In this review, we summarize the advances in mechanics and thermal management of stretchable electronics based on inorganic semiconductor materials. The mechanics and thermal models are very helpful in understanding the underlying physics associated with these systems, and they also provide design guidelines for the development of stretchable inorganic electronics.

Low temperature mobility in hafnium-oxide gated germanium p-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Beer, Chris; Whall, Terry; Parker, Evan; Leadley, David; De Jaeger, Brice; Nicholas, Gareth; Zimmerman, Paul; Meuris, Marc; Szostak, Slawomir; Gluszko, Grzegorz; Lukasiak, Lidia

2007-12-01

Effective mobility measurements have been made at 4.2K on high performance high-k gated germanium p-type metal-oxide-semiconductor field effect transistors with a range of Ge/gate dielectric interface state densities. The mobility is successfully modelled by assuming surface roughness and interface charge scattering at the SiO2 interlayer/Ge interface. The deduced interface charge density is approximately equal to the values obtained from the threshold voltage and subthreshold slope measurements on each device. A hydrogen anneal reduces both the interface state density and the surface root mean square roughness by 20%.

Strain Imaging of Nanoscale Semiconductor Heterostructures with X-Ray Bragg Projection Ptychography

NASA Astrophysics Data System (ADS)

Holt, Martin V.; Hruszkewycz, Stephan O.; Murray, Conal E.; Holt, Judson R.; Paskiewicz, Deborah M.; Fuoss, Paul H.

2014-04-01

We report the imaging of nanoscale distributions of lattice strain and rotation in complementary components of lithographically engineered epitaxial thin film semiconductor heterostructures using synchrotron x-ray Bragg projection ptychography (BPP). We introduce a new analysis method that enables lattice rotation and out-of-plane strain to be determined independently from a single BPP phase reconstruction, and we apply it to two laterally adjacent, multiaxially stressed materials in a prototype channel device. These results quantitatively agree with mechanical modeling and demonstrate the ability of BPP to map out-of-plane lattice dilatation, a parameter critical to the performance of electronic materials.

Mechanics and thermal management of stretchable inorganic electronics

PubMed Central

Song, Jizhou; Feng, Xue; Huang, Yonggang

2016-01-01

Stretchable electronics enables lots of novel applications ranging from wearable electronics, curvilinear electronics to bio-integrated therapeutic devices that are not possible through conventional electronics that is rigid and flat in nature. One effective strategy to realize stretchable electronics exploits the design of inorganic semiconductor material in a stretchable format on an elastomeric substrate. In this review, we summarize the advances in mechanics and thermal management of stretchable electronics based on inorganic semiconductor materials. The mechanics and thermal models are very helpful in understanding the underlying physics associated with these systems, and they also provide design guidelines for the development of stretchable inorganic electronics. PMID:27547485

Nondestructive Memory Elements Based on Polymeric Langmuir-Blodgett Thin Films

NASA Astrophysics Data System (ADS)

Reece, T. J.; Ducharme, S.

2007-03-01

Ferroelectric field effect transistors (FeFETs) have attracted much attention recently because of their low power consumption and fast nondestructive readout. Among the ferroelectric thin films used in FET devices; the ferroelectric copolymer of polyvinylidene fluoride, PVDF (C2H2F2), with trifluoroethylene, TrFE (C2HF3), has distinct advantages, including low dielectric constant, low processing temperature, low cost and compatibility with organic semiconductors. By employing the Langmuir-Blodgett technique, we are able to deposit films as thin as 1.8 nm. We discuss the characterization, modeling and fabrication of metal-ferroelectric-insulator-semiconductor (MFIS) structures incorporating these films.

Electromagnetic radiation screening of semiconductor devices for long life applications

NASA Technical Reports Server (NTRS)

Hall, T. C.; Brammer, W. G.

1972-01-01

A review is presented of the mechanism of interaction of electromagnetic radiation in various spectral ranges, with various semiconductor device defects. Previous work conducted in this area was analyzed as to its pertinence to the current problem. The task was studied of implementing electromagnetic screening methods in the wavelength region determined to be most effective. Both scanning and flooding type stimulation techniques are discussed. While the scanning technique offers a considerably higher yield of useful information, a preliminary investigation utilizing the flooding approach is first recommended because of the ease of implementation, lower cost and ability to provide go-no-go information in semiconductor screening.

Substrate induced changes in atomically thin 2-dimensional semiconductors: Fundamentals, engineering, and applications

NASA Astrophysics Data System (ADS)

Sun, Yinghui; Wang, Rongming; Liu, Kai

2017-03-01

Substrate has great influences on materials syntheses, properties, and applications. The influences are particularly crucial for atomically thin 2-dimensional (2D) semiconductors. Their thicknesses are less than 1 nm; however, the lateral sizes can reach up to several inches or more. Therefore, these materials must be placed onto a variety of substrates before subsequent post-processing techniques for final electronic or optoelectronic devices. Recent studies reveal that substrates have been employed as ways to modulate the optical, electrical, mechanical, and chemical properties of 2D semiconductors. In this review, we summarize recent progress upon the effects of substrates on properties of 2D semiconductors, mostly focused on 2D transition metal dichalcogenides, through viewpoints of both fundamental physics and device applications. First, we discuss various effects of substrates, including interface strain, charge transfer, dielectric screening, and optical interference. Second, we show the modulation of 2D semiconductors by substrate engineering, including novel substrates (patterned substrates, 2D-material substrates, etc.) and active substrates (phase transition materials, ferroelectric materials, flexible substrates, etc.). Last, we present prospectives and challenges in this research field. This review provides a comprehensive understanding of the substrate effects, and may inspire new ideas of novel 2D devices based on substrate engineering.

The MSFC complementary metal oxide semiconductor (including multilevel interconnect metallization) process handbook

NASA Technical Reports Server (NTRS)

Bouldin, D. L.; Eastes, R. W.; Feltner, W. R.; Hollis, B. R.; Routh, D. E.

1979-01-01

The fabrication techniques for creation of complementary metal oxide semiconductor integrated circuits at George C. Marshall Space Flight Center are described. Examples of C-MOS integrated circuits manufactured at MSFC are presented with functional descriptions of each. Typical electrical characteristics of both p-channel metal oxide semiconductor and n-channel metal oxide semiconductor discrete devices under given conditions are provided. Procedures design, mask making, packaging, and testing are included.

Three fundamental devices in one: a reconfigurable multifunctional device in two-dimensional WSe2

NASA Astrophysics Data System (ADS)

Dhakras, Prathamesh; Agnihotri, Pratik; Lee, Ji Ung

2017-06-01

The three pillars of semiconductor device technologies are (1) the p-n diode, (2) the metal-oxide-semiconductor field-effect transistor and (3) the bipolar junction transistor. They have enabled the unprecedented growth in the field of information technology that we see today. Until recently, the technological revolution for better, faster and more efficient devices has been governed by scaling down the device dimensions following Moore’s Law. With the slowing of Moore’s law, there is a need for alternative materials and computing technologies that can continue the advancement in functionality. Here, we describe a single, dynamically reconfigurable device that implements these three fundamental device functions. The device uses buried gates to achieve n- and p-channels and fits into a larger effort to develop devices with enhanced functionalities, including logic functions, over device scaling. As they are all surface conducting devices, we use one material parameter, the interface trap density of states, to describe the key figure-of-merit of each device.

An integrated semiconductor device enabling non-optical genome sequencing.

PubMed

Rothberg, Jonathan M; Hinz, Wolfgang; Rearick, Todd M; Schultz, Jonathan; Mileski, William; Davey, Mel; Leamon, John H; Johnson, Kim; Milgrew, Mark J; Edwards, Matthew; Hoon, Jeremy; Simons, Jan F; Marran, David; Myers, Jason W; Davidson, John F; Branting, Annika; Nobile, John R; Puc, Bernard P; Light, David; Clark, Travis A; Huber, Martin; Branciforte, Jeffrey T; Stoner, Isaac B; Cawley, Simon E; Lyons, Michael; Fu, Yutao; Homer, Nils; Sedova, Marina; Miao, Xin; Reed, Brian; Sabina, Jeffrey; Feierstein, Erika; Schorn, Michelle; Alanjary, Mohammad; Dimalanta, Eileen; Dressman, Devin; Kasinskas, Rachel; Sokolsky, Tanya; Fidanza, Jacqueline A; Namsaraev, Eugeni; McKernan, Kevin J; Williams, Alan; Roth, G Thomas; Bustillo, James

2011-07-20

The seminal importance of DNA sequencing to the life sciences, biotechnology and medicine has driven the search for more scalable and lower-cost solutions. Here we describe a DNA sequencing technology in which scalable, low-cost semiconductor manufacturing techniques are used to make an integrated circuit able to directly perform non-optical DNA sequencing of genomes. Sequence data are obtained by directly sensing the ions produced by template-directed DNA polymerase synthesis using all-natural nucleotides on this massively parallel semiconductor-sensing device or ion chip. The ion chip contains ion-sensitive, field-effect transistor-based sensors in perfect register with 1.2 million wells, which provide confinement and allow parallel, simultaneous detection of independent sequencing reactions. Use of the most widely used technology for constructing integrated circuits, the complementary metal-oxide semiconductor (CMOS) process, allows for low-cost, large-scale production and scaling of the device to higher densities and larger array sizes. We show the performance of the system by sequencing three bacterial genomes, its robustness and scalability by producing ion chips with up to 10 times as many sensors and sequencing a human genome.

Ionic Liquid Activation of Amorphous Metal-Oxide Semiconductors for Flexible Transparent Electronic Devices

DOE PAGES

Pudasaini, Pushpa Raj; Noh, Joo Hyon; Wong, Anthony T.; ...

2016-02-09

To begin this abstract, amorphous metal-oxide semiconductors offer the high carrier mobilities and excellent large-area uniformity required for high performance, transparent, flexible electronic devices; however, a critical bottleneck to their widespread implementation is the need to activate these materials at high temperatures which are not compatible with flexible polymer substrates. The highly controllable activation of amorphous indium gallium zinc oxide semiconductor channels using ionic liquid gating at room temperature is reported. Activation is controlled by electric field-induced oxygen migration across the ionic liquid-semiconductor interface. In addition to activation of unannealed devices, it is shown that threshold voltages of a transistormore » can be linearly tuned between the enhancement and depletion modes. Finally, the first ever example of transparent flexible thin film metal oxide transistor on a polyamide substrate created using this simple technique is demonstrated. Finally, this study demonstrates the potential of field-induced activation as a promising alternative to traditional postdeposition thermal annealing which opens the door to wide scale implementation into flexible electronic applications.« less

All-Graphene Planar Self-Switching MISFEDs, Metal-Insulator-Semiconductor Field-Effect Diodes

PubMed Central

Al-Dirini, Feras; Hossain, Faruque M.; Nirmalathas, Ampalavanapillai; Skafidas, Efstratios

2014-01-01

Graphene normally behaves as a semimetal because it lacks a bandgap, but when it is patterned into nanoribbons a bandgap can be introduced. By varying the width of these nanoribbons this band gap can be tuned from semiconducting to metallic. This property allows metallic and semiconducting regions within a single Graphene monolayer, which can be used in realising two-dimensional (2D) planar Metal-Insulator-Semiconductor field effect devices. Based on this concept, we present a new class of nano-scale planar devices named Graphene Self-Switching MISFEDs (Metal-Insulator-Semiconductor Field-Effect Diodes), in which Graphene is used as the metal and the semiconductor concurrently. The presented devices exhibit excellent current-voltage characteristics while occupying an ultra-small area with sub-10 nm dimensions and an ultimate thinness of a single atom. Quantum mechanical simulation results, based on the Extended Huckel method and Nonequilibrium Green's Function Formalism, show that a Graphene Self-Switching MISFED with a channel as short as 5 nm can achieve forward-to-reverse current rectification ratios exceeding 5000. PMID:24496307

High-frequency high-voltage high-power DC-to-DC converters

NASA Astrophysics Data System (ADS)

Wilson, T. G.; Owen, H. A., Jr.; Wilson, P. M.

1981-07-01

The current and voltage waveshapes associated with the power transitor and the power diode in an example current-or-voltage step-up (buck-boost) converter were analyzed to highlight the problems and possible tradeoffs involved in the design of high voltage high power converters operating at switching frequencies in the range of 100 Khz. Although the fast switching speeds of currently available power diodes and transistors permit converter operation at high switching frequencies, the resulting time rates of changes of current coupled with parasitic inductances in series with the semiconductor switches, produce large repetitive voltage transients across the semiconductor switches, potentially far in excess of the device voltage ratings. The need is established for semiconductor switch protection circuitry to control the peak voltages appearing across the semiconductor switches, as well as to provide the waveshaping action require for a given semiconductor device. The possible tradeoffs, as well as the factors affecting the tradeoffs that must be considered in order to maximize the efficiency of the converters are enumerated.

Epitaxy of semiconductor-superconductor nanowires

NASA Astrophysics Data System (ADS)

Krogstrup, P.; Ziino, N. L. B.; Chang, W.; Albrecht, S. M.; Madsen, M. H.; Johnson, E.; Nygård, J.; Marcus, C. M.; Jespersen, T. S.

2015-04-01

Controlling the properties of semiconductor/metal interfaces is a powerful method for designing functionality and improving the performance of electrical devices. Recently semiconductor/superconductor hybrids have appeared as an important example where the atomic scale uniformity of the interface plays a key role in determining the quality of the induced superconducting gap. Here we present epitaxial growth of semiconductor-metal core-shell nanowires by molecular beam epitaxy, a method that provides a conceptually new route to controlled electrical contacting of nanostructures and the design of devices for specialized applications such as topological and gate-controlled superconducting electronics. Our materials of choice, InAs/Al grown with epitaxially matched single-plane interfaces, and alternative semiconductor/metal combinations allowing epitaxial interface matching in nanowires are discussed. We formulate the grain growth kinetics of the metal phase in general terms of continuum parameters and bicrystal symmetries. The method realizes the ultimate limit of uniform interfaces and seems to solve the soft-gap problem in superconducting hybrid structures.

Plastic Deformation as a Means to Achieve Stretchable Polymer Semiconductors

NASA Astrophysics Data System (ADS)

O'Connor, Brendan

Developing intrinsically stretchable semiconductors will seamlessly transition traditional devices into a stretchable platform. Polymer semiconductors are inherently soft materials due to the weak van der Waal intermolecular bonding allowing for flexible devices. However, these materials are not typically stretchable and when large strains are applied they either crack or plastically deform. Here, we study the use of repeated plastic deformation as a means of achieving stretchable films. In this talk, critical aspects of polymer semiconductor material selection, morphology and interface properties will be discussed that enable this approach of achieving stretchable films. We show that one can employ high performance donor-acceptor polymer semiconductors that are typically brittle through proper polymer blending to significantly increase ductility to achieve stretchable films. We demonstrate a polymer blend film that can be repeatedly deformed over 65%, while maintaining charge mobility consistently above 0.15 cm2/Vs. During the stretching process we show that the films follow a well-controlled repeated deformation pattern for over 100 stretching cycles.

High-frequency high-voltage high-power DC-to-DC converters

NASA Technical Reports Server (NTRS)

Wilson, T. G.; Owen, H. A., Jr.; Wilson, P. M.

1981-01-01

The current and voltage waveshapes associated with the power transitor and the power diode in an example current-or-voltage step-up (buck-boost) converter were analyzed to highlight the problems and possible tradeoffs involved in the design of high voltage high power converters operating at switching frequencies in the range of 100 Khz. Although the fast switching speeds of currently available power diodes and transistors permit converter operation at high switching frequencies, the resulting time rates of changes of current coupled with parasitic inductances in series with the semiconductor switches, produce large repetitive voltage transients across the semiconductor switches, potentially far in excess of the device voltage ratings. The need is established for semiconductor switch protection circuitry to control the peak voltages appearing across the semiconductor switches, as well as to provide the waveshaping action require for a given semiconductor device. The possible tradeoffs, as well as the factors affecting the tradeoffs that must be considered in order to maximize the efficiency of the converters are enumerated.

Integrated Multi-Color Light Emitting Device Made with Hybrid Crystal Structure

NASA Technical Reports Server (NTRS)

Park, Yeonjoon (Inventor); Choi, Sang Hyouk (Inventor)

2017-01-01

An integrated hybrid crystal Light Emitting Diode ("LED") display device that may emit red, green, and blue colors on a single wafer. The various embodiments may provide double-sided hetero crystal growth with hexagonal wurtzite III-Nitride compound semiconductor on one side of (0001) c-plane sapphire media and cubic zinc-blended III-V or II-VI compound semiconductor on the opposite side of c-plane sapphire media. The c-plane sapphire media may be a bulk single crystalline c-plane sapphire wafer, a thin free standing c-plane sapphire layer, or crack-and-bonded c-plane sapphire layer on any substrate. The bandgap energies and lattice constants of the compound semiconductor alloys may be changed by mixing different amounts of ingredients of the same group into the compound semiconductor. The bandgap energy and lattice constant may be engineered by changing the alloy composition within the cubic group IV, group III-V, and group II-VI semiconductors and within the hexagonal III-Nitrides.

Integrated Multi-Color Light Emitting Device Made with Hybrid Crystal Structure

NASA Technical Reports Server (NTRS)

Park, Yeonjoon (Inventor); Choi, Sang Hyouk (Inventor)

2016-01-01

An integrated hybrid crystal Light Emitting Diode ("LED") display device that may emit red, green, and blue colors on a single wafer. The various embodiments may provide double-sided hetero crystal growth with hexagonal wurtzite III-Nitride compound semiconductor on one side of (0001) c-plane sapphire media and cubic zinc-blended III-V or II-VI compound semiconductor on the opposite side of c-plane sapphire media. The c-plane sapphire media may be a bulk single crystalline c-plane sapphire wafer, a thin free standing c-plane sapphire layer, or crack-and-bonded c-plane sapphire layer on any substrate. The bandgap energies and lattice constants of the compound semiconductor alloys may be changed by mixing different amounts of ingredients of the same group into the compound semiconductor. The bandgap energy and lattice constant may be engineered by changing the alloy composition within the cubic group IV, group III-V, and group II-VI semiconductors and within the hexagonal III-Nitrides.

Method and apparatus for increasing the durability and yield of thin film photovoltaic devices

DOEpatents

Phillips, J.E.; Lasswell, P.G.

1987-02-03

Thin film photovoltaic cells having a pair of semiconductor layers between an opaque and a transparent electrical contact are manufactured in a method which includes the step of scanning one of the semiconductor layers to determine the location of any possible shorting defect. Upon the detection of such defect, the defect is eliminated to increase the durability and yield of the photovoltaic device. 10 figs.

Wide Bandgap Semiconductor Nanowires for Electronic, Photonic and Sensing Devices

DTIC Science & Technology

2012-01-05

oxide -based thin film transistors ( TFTs ) have attracted much attention for applications like flexible electronic devices. The...crystals, and ~ 1.5 cm2.V-1.s-1 for pentacene thin films ). A number of groups have demonstrated TFTs based on α- oxide semiconductors such as zinc oxide ...show excellent long-term stability at room temperature. Results: High-performance amorphous (α-) InGaZnO-based thin film transistors ( TFTs )

Spiking Excitable Semiconductor Laser as Optical Neurons: Dynamics, Clustering and Global Emerging Behaviors

DTIC Science & Technology

2014-06-28

constructed from inexpensive semiconductor lasers could lead to the development of novel neuro-inspired optical computing devices (threshold detectors ...optical computing devices (threshold detectors , logic gates, signal recognition, etc.). Other topics of research included the analysis of extreme events in...Extreme events is nowadays a highly active field of research. Rogue waves, earthquakes of high magnitude and financial crises are all rare and

Method and apparatus for increasing the durability and yield of thin film photovoltaic devices

DOEpatents

Phillips, James E.; Lasswell, Patrick G.

1987-01-01

Thin film photovoltaic cells having a pair of semiconductor layers between an opaque and a transparent electrical contact are manufactured in a method which includes the step of scanning one of the semiconductor layers to determine the location of any possible shorting defect. Upon the detection of such defect, the defect is eliminated to increase the durability and yield of the photovoltaic device.

Strategies for Radiation Hardness Testing of Power Semiconductor Devices

NASA Technical Reports Server (NTRS)

Soltis, James V. (Technical Monitor); Patton, Martin O.; Harris, Richard D.; Rohal, Robert G.; Blue, Thomas E.; Kauffman, Andrew C.; Frasca, Albert J.

2005-01-01

Plans on the drawing board for future space missions call for much larger power systems than have been flown in the past. These systems would employ much higher voltages and currents to enable more powerful electric propulsion engines and other improvements on what will also be much larger spacecraft. Long term human outposts on the moon and planets would also require high voltage, high current and long life power sources. Only hundreds of watts are produced and controlled on a typical robotic exploration spacecraft today. Megawatt systems are required for tomorrow. Semiconductor devices used to control and convert electrical energy in large space power systems will be exposed to electromagnetic and particle radiation of many types, depending on the trajectory and duration of the mission and on the power source. It is necessary to understand the often very different effects of the radiations on the control and conversion systems. Power semiconductor test strategies that we have developed and employed will be presented, along with selected results. The early results that we have obtained in testing large power semiconductor devices give a good indication of the degradation in electrical performance that can be expected in response to a given dose. We are also able to highlight differences in radiation hardness that may be device or material specific.

Epitaxy of advanced nanowire quantum devices

NASA Astrophysics Data System (ADS)

Gazibegovic, Sasa; Car, Diana; Zhang, Hao; Balk, Stijn C.; Logan, John A.; de Moor, Michiel W. A.; Cassidy, Maja C.; Schmits, Rudi; Xu, Di; Wang, Guanzhong; Krogstrup, Peter; Op Het Veld, Roy L. M.; Zuo, Kun; Vos, Yoram; Shen, Jie; Bouman, Daniël; Shojaei, Borzoyeh; Pennachio, Daniel; Lee, Joon Sue; van Veldhoven, Petrus J.; Koelling, Sebastian; Verheijen, Marcel A.; Kouwenhoven, Leo P.; Palmstrøm, Chris J.; Bakkers, Erik P. A. M.

2017-08-01

Semiconductor nanowires are ideal for realizing various low-dimensional quantum devices. In particular, topological phases of matter hosting non-Abelian quasiparticles (such as anyons) can emerge when a semiconductor nanowire with strong spin-orbit coupling is brought into contact with a superconductor. To exploit the potential of non-Abelian anyons—which are key elements of topological quantum computing—fully, they need to be exchanged in a well-controlled braiding operation. Essential hardware for braiding is a network of crystalline nanowires coupled to superconducting islands. Here we demonstrate a technique for generic bottom-up synthesis of complex quantum devices with a special focus on nanowire networks with a predefined number of superconducting islands. Structural analysis confirms the high crystalline quality of the nanowire junctions, as well as an epitaxial superconductor-semiconductor interface. Quantum transport measurements of nanowire ‘hashtags’ reveal Aharonov-Bohm and weak-antilocalization effects, indicating a phase-coherent system with strong spin-orbit coupling. In addition, a proximity-induced hard superconducting gap (with vanishing sub-gap conductance) is demonstrated in these hybrid superconductor-semiconductor nanowires, highlighting the successful materials development necessary for a first braiding experiment. Our approach opens up new avenues for the realization of epitaxial three-dimensional quantum architectures which have the potential to become key components of various quantum devices.

Defect-Rich Dopant-Free ZrO2 Nanostructures with Superior Dilute Ferromagnetic Semiconductor Properties.

PubMed

Rahman, Md Anisur; Rout, S; Thomas, Joseph P; McGillivray, Donald; Leung, Kam Tong

2016-09-14

Control of the spin degree of freedom of an electron has brought about a new era in spin-based applications, particularly spin-based electronics, with the potential to outperform the traditional charge-based semiconductor technology for data storage and information processing. However, the realization of functional spin-based devices for information processing remains elusive due to several fundamental challenges such as the low Curie temperature of group III-V and II-VI semiconductors (<200 K), and the low spin-injection efficiencies of existing III-V, II-VI, and transparent conductive oxide semiconductors in a multilayer device structure, which are caused by precipitation and migration of dopants from the host layer to the adjacent layers. Here, we use catalyst-assisted pulsed laser deposition to grow, for the first time, oxygen vacancy defect-rich, dopant-free ZrO2 nanostructures with high TC (700 K) and high magnetization (5.9 emu/g). The observed magnetization is significantly greater than both doped and defect-rich transparent conductive oxide nanomaterials reported to date. We also provide the first experimental evidence that it is the amounts and types of oxygen vacancy defects in, and not the phase of ZrO2 that control the ferromagnetic order in undoped ZrO2 nanostructures. To explain the origin of ferromagnetism in these ZrO2 nanostructures, we hypothesize a new defect-induced bound polaron model, which is generally applicable to other defect-rich, dopant-free transparent conductive oxide nanostructures. These results provide new insights into magnetic ordering in undoped dilute ferromagnetic semiconductor oxides and contribute to the design of exotic magnetic and novel multifunctional materials.

Atomic layer deposition: an enabling technology for the growth of functional nanoscale semiconductors

NASA Astrophysics Data System (ADS)

Biyikli, Necmi; Haider, Ali

2017-09-01

In this paper, we present the progress in the growth of nanoscale semiconductors grown via atomic layer deposition (ALD). After the adoption by semiconductor chip industry, ALD became a widespread tool to grow functional films and conformal ultra-thin coatings for various applications. Based on self-limiting and ligand-exchange-based surface reactions, ALD enabled the low-temperature growth of nanoscale dielectric, metal, and semiconductor materials. Being able to deposit wafer-scale uniform semiconductor films at relatively low-temperatures, with sub-monolayer thickness control and ultimate conformality, makes ALD attractive for semiconductor device applications. Towards this end, precursors and low-temperature growth recipes are developed to deposit crystalline thin films for compound and elemental semiconductors. Conventional thermal ALD as well as plasma-assisted and radical-enhanced techniques have been exploited to achieve device-compatible film quality. Metal-oxides, III-nitrides, sulfides, and selenides are among the most popular semiconductor material families studied via ALD technology. Besides thin films, ALD can grow nanostructured semiconductors as well using either template-assisted growth methods or bottom-up controlled nucleation mechanisms. Among the demonstrated semiconductor nanostructures are nanoparticles, nano/quantum-dots, nanowires, nanotubes, nanofibers, nanopillars, hollow and core-shell versions of the afore-mentioned nanostructures, and 2D materials including transition metal dichalcogenides and graphene. ALD-grown nanoscale semiconductor materials find applications in a vast amount of applications including functional coatings, catalysis and photocatalysis, renewable energy conversion and storage, chemical sensing, opto-electronics, and flexible electronics. In this review, we give an overview of the current state-of-the-art in ALD-based nanoscale semiconductor research including the already demonstrated and future applications.

Study and modeling of the transport mechanism in a Schottky diode on the basis of a GaAs semiinsulator

NASA Astrophysics Data System (ADS)

Resfa, A.; Smahi, Bourzig Y.; Menezla, Brahimi R.

2011-12-01

The current through a metal—semiconductor junction is mainly due to the majority carriers. Three distinctly different mechanisms exist in a Schottky diode: diffusion of the semiconductor carriers in metal, thermionic emission-diffusion (TED) of carriers through a Schottky gate, and a mechanical quantum that pierces a tunnel through the gate. The system was solved by using a coupled Poisson—Boltzmann algorithm. Schottky BH is defined as the difference in energy between the Fermi level and the metal band carrier majority of the metal—semiconductor junction to the semiconductor contacts. The insulating layer converts the MS device in an MIS device and has a strong influence on its current—voltage (I—V) and the parameters of a Schottky barrier from 3.7 to 15 eV. There are several possible reasons for the error that causes a deviation of the ideal behaviour of Schottky diodes with and without an interfacial insulator layer. These include the particular distribution of interface states, the series resistance, bias voltage and temperature. The GaAs and its large concentration values of trap centers will participate in an increase in the process of thermionic electrons and holes, which will in turn act on the I—V characteristic of the diode, and an overflow maximum value [NT = 3 × 1020] is obtained. The I—V characteristics of Schottky diodes are in the hypothesis of a parabolic summit.

Method of passivating semiconductor surfaces

DOEpatents

Wanlass, M.W.

1990-06-19

A method is described for passivating Group III-V or II-VI semiconductor compound surfaces. The method includes selecting a passivating material having a lattice constant substantially mismatched to the lattice constant of the semiconductor compound. The passivating material is then grown as an ultrathin layer of passivating material on the surface of the Group III-V or II-VI semiconductor compound. The passivating material is grown to a thickness sufficient to maintain a coherent interface between the ultrathin passivating material and the semiconductor compound. In addition, a device formed from such method is also disclosed.