Fabrication and performance of pressure-sensing device consisting of electret film and organic semiconductor

NASA Astrophysics Data System (ADS)

Kodzasa, Takehito; Nobeshima, Daiki; Kuribara, Kazunori; Uemura, Sei; Yoshida, Manabu

2017-04-01

We propose a new concept of a pressure-sensitive device that consists of an organic electret film and an organic semiconductor. This device exhibits high sensitivity and selectivity against various types of pressure. The sensing mechanism of this device originates from a modulation of the electric conductivity of the organic semiconductor film induced by the interaction between the semiconductor film and the charged electret film placed face to face. It is expected that a complicated sensor array will be fabricated by using a roll-to-roll manufacturing system, because this device can be prepared by an all-printing and simple lamination process without high-level positional adjustment for printing processes. This also shows that this device with a simple structure is suitable for application to a highly flexible device array sheet for an Internet of Things (IoT) or wearable sensing system.

Semiconductor Laser Low Frequency Noise Characterization

NASA Technical Reports Server (NTRS)

Maleki, Lute; Logan, Ronald T.

1996-01-01

This work summarizes the efforts in identifying the fundamental noise limit in semiconductor optical sources (lasers) to determine the source of 1/F noise and it's associated behavior. In addition, the study also addresses the effects of this 1/F noise on RF phased arrays. The study showed that the 1/F noise in semiconductor lasers has an ultimate physical limit based upon similar factors to fundamental noise generated in other semiconductor and solid state devices. The study also showed that both additive and multiplicative noise can be a significant detriment to the performance of RF phased arrays especially in regard to very low sidelobe performance and ultimate beam steering accuracy. The final result is that a noise power related term must be included in a complete analysis of the noise spectrum of any semiconductor device including semiconductor lasers.

Optical processing for semiconductor device fabrication

NASA Technical Reports Server (NTRS)

Sopori, Bhushan L.

1994-01-01

A new technique for semiconductor device processing is described that uses optical energy to produce local heating/melting in the vicinity of a preselected interface of the device. This process, called optical processing, invokes assistance of photons to enhance interface reactions such as diffusion and melting, as compared to the use of thermal heating alone. Optical processing is performed in a 'cold wall' furnace, and requires considerably lower energies than furnace or rapid thermal annealing. This technique can produce some device structures with unique properties that cannot be produced by conventional thermal processing. Some applications of optical processing involving semiconductor-metal interfaces are described.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

University of Illinois

2009-04-21

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A [Champaign, IL; Khang, Dahl-Young [Seoul, KR; Sun, Yugang [Naperville, IL; Menard, Etienne [Durham, NC

2012-06-12

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A.; Khang, Dahl-Young; Sun, Yugang; Menard, Etienne

2014-06-17

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A.; Khang, Dahl-Young; Sun, Yugang; Menard, Etienne

2016-12-06

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A.; Khang, Dahl -Young; Sun, Yugang; Menard, Etienne

2015-08-11

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Achieving Optimal Self-Adaptivity for Dynamic Tuning of Organic Semiconductors through Resonance Engineering.

PubMed

Tao, Ye; Xu, Lijia; Zhang, Zhen; Chen, Runfeng; Li, Huanhuan; Xu, Hui; Zheng, Chao; Huang, Wei

2016-08-03

Current static-state explorations of organic semiconductors for optimal material properties and device performance are hindered by limited insights into the dynamically changed molecular states and charge transport and energy transfer processes upon device operation. Here, we propose a simple yet successful strategy, resonance variation-based dynamic adaptation (RVDA), to realize optimized self-adaptive properties in donor-resonance-acceptor molecules by engineering the resonance variation for dynamic tuning of organic semiconductors. Organic light-emitting diodes hosted by these RVDA materials exhibit remarkably high performance, with external quantum efficiencies up to 21.7% and favorable device stability. Our approach, which supports simultaneous realization of dynamically adapted and selectively enhanced properties via resonance engineering, illustrates a feasible design map for the preparation of smart organic semiconductors capable of dynamic structure and property modulations, promoting the studies of organic electronics from static to dynamic.

Recent progress in high-mobility thin-film transistors based on multilayer 2D materials

NASA Astrophysics Data System (ADS)

Hong, Young Ki; Liu, Na; Yin, Demin; Hong, Seongin; Kim, Dong Hak; Kim, Sunkook; Choi, Woong; Yoon, Youngki

2017-04-01

Two-dimensional (2D) layered semiconductors are emerging as promising candidates for next-generation thin-film electronics because of their high mobility, relatively large bandgap, low-power switching, and the availability of large-area growth methods. Thin-film transistors (TFTs) based on multilayer transition metal dichalcogenides or black phosphorus offer unique opportunities for next-generation electronic and optoelectronic devices. Here, we review recent progress in high-mobility transistors based on multilayer 2D semiconductors. We describe the theoretical background on characterizing methods of TFT performance and material properties, followed by their applications in flexible, transparent, and optoelectronic devices. Finally, we highlight some of the methods used in metal-semiconductor contacts, hybrid structures, heterostructures, and chemical doping to improve device performance.

High mobility and high stability glassy metal-oxynitride materials and devices

NASA Astrophysics Data System (ADS)

Lee, Eunha; Kim, Taeho; Benayad, Anass; Hur, Jihyun; Park, Gyeong-Su; Jeon, Sanghun

2016-04-01

In thin film technology, future semiconductor and display products with high performance, high density, large area, and ultra high definition with three-dimensional functionalities require high performance thin film transistors (TFTs) with high stability. Zinc oxynitride, a composite of zinc oxide and zinc nitride, has been conceded as a strong substitute to conventional semiconductor film such as silicon and indium gallium zinc oxide due to high mobility value. However, zinc oxynitride has been suffered from poor reproducibility due to relatively low binding energy of nitrogen with zinc, resulting in the instability of composition and its device performance. Here we performed post argon plasma process on zinc oxynitride film, forming nano-crystalline structure in stable amorphous matrix which hampers the reaction of oxygen with zinc. Therefore, material properties and device performance of zinc oxynitride are greatly enhanced, exhibiting robust compositional stability even exposure to air, uniform phase, high electron mobility, negligible fast transient charging and low noise characteristics. Furthermore, We expect high mobility and high stability zinc oxynitride customized by plasma process to be applicable to a broad range of semiconductor and display devices.

High efficiency photovoltaic device

DOEpatents

Guha, Subhendu; Yang, Chi C.; Xu, Xi Xiang

1999-11-02

An N-I-P type photovoltaic device includes a multi-layered body of N-doped semiconductor material which has an amorphous, N doped layer in contact with the amorphous body of intrinsic semiconductor material, and a microcrystalline, N doped layer overlying the amorphous, N doped material. A tandem device comprising stacked N-I-P cells may further include a second amorphous, N doped layer interposed between the microcrystalline, N doped layer and a microcrystalline P doped layer. Photovoltaic devices thus configured manifest improved performance, particularly when configured as tandem devices.

New Concentric Electrode Metal-Semiconductor-Metal Photodetectors

NASA Technical Reports Server (NTRS)

Towe, Elias

1996-01-01

A new metal-semiconductor-metal (MSM) photodetector geometry is proposed. The new device has concentric metal electrodes which exhibit a high degree of symmetry and a design flexibility absent in the conventional MSM device. The concentric electrodes are biased to alternating potentials as in the conventional interdigitated device. Because of the high symmetry configuration, however, the new device also has a lower effective capacitance. This device and the conventional MSM structure are analyzed within a common theoretical framework which allows for the comparison of the important performance characteristics.

Uncertain behaviours of integrated circuits improve computational performance.

PubMed

Yoshimura, Chihiro; Yamaoka, Masanao; Hayashi, Masato; Okuyama, Takuya; Aoki, Hidetaka; Kawarabayashi, Ken-ichi; Mizuno, Hiroyuki

2015-11-20

Improvements to the performance of conventional computers have mainly been achieved through semiconductor scaling; however, scaling is reaching its limitations. Natural phenomena, such as quantum superposition and stochastic resonance, have been introduced into new computing paradigms to improve performance beyond these limitations. Here, we explain that the uncertain behaviours of devices due to semiconductor scaling can improve the performance of computers. We prototyped an integrated circuit by performing a ground-state search of the Ising model. The bit errors of memory cell devices holding the current state of search occur probabilistically by inserting fluctuations into dynamic device characteristics, which will be actualised in the future to the chip. As a result, we observed more improvements in solution accuracy than that without fluctuations. Although the uncertain behaviours of devices had been intended to be eliminated in conventional devices, we demonstrate that uncertain behaviours has become the key to improving computational performance.

Deformable inorganic semiconductor

NASA Astrophysics Data System (ADS)

Kim, Dae-Hyeong; Cha, Gi Doo

2018-05-01

Unlike conventional inorganic semiconductors, which are typically brittle, α-Ag2S exhibits room-temperature ductility with favourable electrical properties, offering promise for use in high-performance flexible and stretchable devices.

Controlled buckling structures in semiconductor interconnects and nanomembranes for stretchable electronics

DOEpatents

Rogers, John A; Meitl, Matthew; Sun, Yugang; Ko, Heung Cho; Carlson, Andrew; Choi, Won Mook; Stoykovich, Mark; Jiang, Hanqing; Huang, Yonggang; Nuzzo, Ralph G; Zhu, Zhengtao; Menard, Etienne; Khang, Dahl-Young

2014-05-20

In an aspect, the present invention provides stretchable, and optionally printable, components such as semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed, and related methods of making or tuning such stretchable components. Stretchable semiconductors and electronic circuits preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention are adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Controlled buckling structures in semiconductor interconnects and nanomembranes for stretchable electronics

DOEpatents

Rogers, John A [Champaign, IL; Meitl, Matthew [Raleigh, NC; Sun, Yugang [Naperville, IL; Ko, Heung Cho [Urbana, IL; Carlson, Andrew [Urbana, IL; Choi, Won Mook [Champaign, IL; Stoykovich, Mark [Dover, NH; Jiang, Hanqing [Urbana, IL; Huang, Yonggang [Glencoe, IL; Nuzzo, Ralph G [Champaign, IL; Lee, Keon Jae [Tokyo, JP; Zhu, Zhengtao [Rapid City, SD; Menard, Etienne [Durham, NC; Khang, Dahl-Young [Seoul, KR; Kan, Seong Jun [Daejeon, KR; Ahn, Jong Hyun [Suwon, KR; Kim, Hoon-sik [Champaign, IL

2012-07-10

In an aspect, the present invention provides stretchable, and optionally printable, components such as semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed, and related methods of making or tuning such stretchable components. Stretchable semiconductors and electronic circuits preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention are adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Near-Unity Absorption in van der Waals Semiconductors for Ultrathin Optoelectronics.

PubMed

Jariwala, Deep; Davoyan, Artur R; Tagliabue, Giulia; Sherrott, Michelle C; Wong, Joeson; Atwater, Harry A

2016-09-14

We demonstrate near-unity, broadband absorbing optoelectronic devices using sub-15 nm thick transition metal dichalcogenides (TMDCs) of molybdenum and tungsten as van der Waals semiconductor active layers. Specifically, we report that near-unity light absorption is possible in extremely thin (<15 nm) van der Waals semiconductor structures by coupling to strongly damped optical modes of semiconductor/metal heterostructures. We further fabricate Schottky junction devices using these highly absorbing heterostructures and characterize their optoelectronic performance. Our work addresses one of the key criteria to enable TMDCs as potential candidates to achieve high optoelectronic efficiency.

Monolayer borophene electrode for effective elimination of both the Schottky barrier and strong electric field effect

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, L. Z., E-mail: lzliu@nju.edu.cn, E-mail: hkxlwu@nju.edu.cn; Xiong, S. J.; Wu, X. L., E-mail: lzliu@nju.edu.cn, E-mail: hkxlwu@nju.edu.cn

2016-08-08

The formation of Schottky barriers between 2D semiconductors and traditional metallic electrodes has greatly limited the application of 2D semiconductors in nanoelectronic and optoelectronic devices. In this study, metallic borophene was used as a substitute for the traditional noble metal electrode to contact with the 2D semiconductor. Theoretical calculations demonstrated that no Schottky barrier exists in the borophene/2D semiconductor heterostructure. The contact remains ohmic even with a strong electric field applied. This finding provides a way to construct 2D electronic devices and sensors with greatly enhanced performance.

A stable solution-processed polymer semiconductor with record high-mobility for printed transistors

PubMed Central

Li, Jun; Zhao, Yan; Tan, Huei Shuan; Guo, Yunlong; Di, Chong-An; Yu, Gui; Liu, Yunqi; Lin, Ming; Lim, Suo Hon; Zhou, Yuhua; Su, Haibin; Ong, Beng S.

2012-01-01

Microelectronic circuits/arrays produced via high-speed printing instead of traditional photolithographic processes offer an appealing approach to creating the long-sought after, low-cost, large-area flexible electronics. Foremost among critical enablers to propel this paradigm shift in manufacturing is a stable, solution-processable, high-performance semiconductor for printing functionally capable thin-film transistors — fundamental building blocks of microelectronics. We report herein the processing and optimisation of solution-processable polymer semiconductors for thin-film transistors, demonstrating very high field-effect mobility, high on/off ratio, and excellent shelf-life and operating stabilities under ambient conditions. Exceptionally high-gain inverters and functional ring oscillator devices on flexible substrates have been demonstrated. This optimised polymer semiconductor represents a significant progress in semiconductor development, dispelling prevalent skepticism surrounding practical usability of organic semiconductors for high-performance microelectronic devices, opening up application opportunities hitherto functionally or economically inaccessible with silicon technologies, and providing an excellent structural framework for fundamental studies of charge transport in organic systems. PMID:23082244

Integrated semiconductor optical sensors for chronic, minimally-invasive imaging of brain function.

PubMed

Lee, Thomas T; Levi, Ofer; Cang, Jianhua; Kaneko, Megumi; Stryker, Michael P; Smith, Stephen J; Shenoy, Krishna V; Harris, James S

2006-01-01

Intrinsic optical signal (IOS) imaging is a widely accepted technique for imaging brain activity. We propose an integrated device consisting of interleaved arrays of gallium arsenide (GaAs) based semiconductor light sources and detectors operating at telecommunications wavelengths in the near-infrared. Such a device will allow for long-term, minimally invasive monitoring of neural activity in freely behaving subjects, and will enable the use of structured illumination patterns to improve system performance. In this work we describe the proposed system and show that near-infrared IOS imaging at wavelengths compatible with semiconductor devices can produce physiologically significant images in mice, even through skull.

Mechanical Properties of Organic Semiconductors for Stretchable, Highly Flexible, and Mechanically Robust Electronics.

PubMed

Root, Samuel E; Savagatrup, Suchol; Printz, Adam D; Rodriquez, Daniel; Lipomi, Darren J

2017-05-10

Mechanical deformability underpins many of the advantages of organic semiconductors. The mechanical properties of these materials are, however, diverse, and the molecular characteristics that permit charge transport can render the materials stiff and brittle. This review is a comprehensive description of the molecular and morphological parameters that govern the mechanical properties of organic semiconductors. Particular attention is paid to ways in which mechanical deformability and electronic performance can coexist. The review begins with a discussion of flexible and stretchable devices of all types, and in particular the unique characteristics of organic semiconductors. It then discusses the mechanical properties most relevant to deformable devices. In particular, it describes how low modulus, good adhesion, and absolute extensibility prior to fracture enable robust performance, along with mechanical "imperceptibility" if worn on the skin. A description of techniques of metrology precedes a discussion of the mechanical properties of three classes of organic semiconductors: π-conjugated polymers, small molecules, and composites. The discussion of each class of materials focuses on molecular structure and how this structure (and postdeposition processing) influences the solid-state packing structure and thus the mechanical properties. The review concludes with applications of organic semiconductor devices in which every component is intrinsically stretchable or highly flexible.

Separating semiconductor devices from substrate by etching graded composition release layer disposed between semiconductor devices and substrate including forming protuberances that reduce stiction

DOEpatents

Tauke-Pedretti, Anna; Nielson, Gregory N; Cederberg, Jeffrey G; Cruz-Campa, Jose Luis

2015-05-12

A method includes etching a release layer that is coupled between a plurality of semiconductor devices and a substrate with an etch. The etching includes etching the release layer between the semiconductor devices and the substrate until the semiconductor devices are at least substantially released from the substrate. The etching also includes etching a protuberance in the release layer between each of the semiconductor devices and the substrate. The etch is stopped while the protuberances remain between each of the semiconductor devices and the substrate. The method also includes separating the semiconductor devices from the substrate. Other methods and apparatus are also disclosed.

Editorial

NASA Astrophysics Data System (ADS)

Bruzzi, Mara; Cartiglia, Nicolo; Pace, Emanuele; Talamonti, Cinzia

2015-10-01

The 10th edition of the International Conference on Radiation Effects on Semiconductor Materials, Detectors and Devices (RESMDD) was held in Florence, at Dipartimento di Fisica ed Astronomia on October 8-10, 2014. It has been aimed at discussing frontier research activities in several application fields as nuclear and particle physics, astrophysics, medical and solid-state physics. Main topics discussed in this conference concern performance of heavily irradiated silicon detectors, developments required for the luminosity upgrade of the Large Hadron Collider (HL-LHC), ultra-fast silicon detectors design and manufacturing, high-band gap semiconductor detectors, novel semiconductor-based devices for medical applications, radiation damage issues in semiconductors and related radiation-hardening technologies.

Method for manufacturing compound semiconductor field-effect transistors with improved DC and high frequency performance

DOEpatents

Zolper, John C.; Sherwin, Marc E.; Baca, Albert G.

2000-01-01

A method for making compound semiconductor devices including the use of a p-type dopant is disclosed wherein the dopant is co-implanted with an n-type donor species at the time the n-channel is formed and a single anneal at moderate temperature is then performed. Also disclosed are devices manufactured using the method. In the preferred embodiment n-MESFETs and other similar field effect transistor devices are manufactured using C ions co-implanted with Si atoms in GaAs to form an n-channel. C exhibits a unique characteristic in the context of the invention in that it exhibits a low activation efficiency (typically, 50% or less) as a p-type dopant, and consequently, it acts to sharpen the Si n-channel by compensating Si donors in the region of the Si-channel tail, but does not contribute substantially to the acceptor concentration in the buried p region. As a result, the invention provides for improved field effect semiconductor and related devices with enhancement of both DC and high-frequency performance.

Tungsten coating for improved wear resistance and reliability of microelectromechanical devices

DOEpatents

Fleming, James G.; Mani, Seethambal S.; Sniegowski, Jeffry J.; Blewer, Robert S.

2001-01-01

A process is disclosed whereby a 5-50-nanometer-thick conformal tungsten coating can be formed over exposed semiconductor surfaces (e.g. silicon, germanium or silicon carbide) within a microelectromechanical (MEM) device for improved wear resistance and reliability. The tungsten coating is formed after cleaning the semiconductor surfaces to remove any organic material and oxide film from the surface. A final in situ cleaning step is performed by heating a substrate containing the MEM device to a temperature in the range of 200-600 .degree. C. in the presence of gaseous nitrogen trifluoride (NF.sub.3). The tungsten coating can then be formed by a chemical reaction between the semiconductor surfaces and tungsten hexafluoride (WF.sub.6) at an elevated temperature, preferably about 450.degree. C. The tungsten deposition process is self-limiting and covers all exposed semiconductor surfaces including surfaces in close contact. The present invention can be applied to many different types of MEM devices including microrelays, micromirrors and microengines. Additionally, the tungsten wear-resistant coating of the present invention can be used to enhance the hardness, wear resistance, electrical conductivity, optical reflectivity and chemical inertness of one or more semiconductor surfaces within a MEM device.

Unitary lens semiconductor device

DOEpatents

Lear, Kevin L.

1997-01-01

A unitary lens semiconductor device and method. The unitary lens semiconductor device is provided with at least one semiconductor layer having a composition varying in the growth direction for unitarily forming one or more lenses in the semiconductor layer. Unitary lens semiconductor devices may be formed as light-processing devices such as microlenses, and as light-active devices such as light-emitting diodes, photodetectors, resonant-cavity light-emitting diodes, vertical-cavity surface-emitting lasers, and resonant cavity photodetectors.

Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

PubMed Central

Long, Rathnait D.; McIntyre, Paul C.

2012-01-01

The literature on polar Gallium Nitride (GaN) surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS) devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

Method of producing strained-layer semiconductor devices via subsurface-patterning

DOEpatents

Dodson, Brian W.

1993-01-01

A method is described for patterning subsurface features in a semiconductor device, wherein the semiconductor device includes an internal strained layer. The method comprises creating a pattern of semiconductor material over the semiconductor device, the semiconductor material having a predetermined thickness which stabilizes areas of the strained semiconductor layer that lie beneath the pattern. Subsequently, a heating step is applied to the semiconductor device to cause a relaxation in areas of the strained layer which do not lie beneath the semiconductor material pattern, whereby dislocations result in the relaxed areas and impair electrical transport therethrough.

Solid state technology: A compilation. [on semiconductor devices

NASA Technical Reports Server (NTRS)

1973-01-01

A compilation, covering selected solid state devices developed and integrated into systems by NASA to improve performance, is presented. Data are also given on device shielding in hostile radiation environments.

Unitary lens semiconductor device

DOEpatents

Lear, K.L.

1997-05-27

A unitary lens semiconductor device and method are disclosed. The unitary lens semiconductor device is provided with at least one semiconductor layer having a composition varying in the growth direction for unitarily forming one or more lenses in the semiconductor layer. Unitary lens semiconductor devices may be formed as light-processing devices such as microlenses, and as light-active devices such as light-emitting diodes, photodetectors, resonant-cavity light-emitting diodes, vertical-cavity surface-emitting lasers, and resonant cavity photodetectors. 9 figs.

High-Performance Nonvolatile Organic Field-Effect Transistor Memory Based on Organic Semiconductor Heterostructures of Pentacene/P13/Pentacene as Both Charge Transport and Trapping Layers.

PubMed

Li, Wen; Guo, Fengning; Ling, Haifeng; Zhang, Peng; Yi, Mingdong; Wang, Laiyuan; Wu, Dequn; Xie, Linghai; Huang, Wei

2017-08-01

Nonvolatile organic field-effect transistor (OFET) memory devices based on pentacene/ N , N '-ditridecylperylene-3,4,9,10-tetracarboxylic diimide (P13)/pentacene trilayer organic heterostructures have been proposed. The discontinuous n-type P13 embedded in p-type pentacene layers can not only provide electrons in the semiconductor layer that facilitates electron trapping process; it also works as charge trapping sites, which is attributed to the quantum well-like pentacene/P13/pentacene organic heterostructures. The synergistic effects of charge trapping in the discontinuous P13 and the charge-trapping property of the poly(4-vinylphenol) (PVP) layer remarkably improve the memory performance. In addition, the trilayer organic heterostructures have also been successfully applied to multilevel and flexible nonvolatile memory devices. The results provide a novel design strategy to achieve high-performance nonvolatile OFET memory devices and allow potential applications for different combinations of various organic semiconductor materials in OFET memory.

High‐Performance Nonvolatile Organic Field‐Effect Transistor Memory Based on Organic Semiconductor Heterostructures of Pentacene/P13/Pentacene as Both Charge Transport and Trapping Layers

PubMed Central

Li, Wen; Guo, Fengning; Ling, Haifeng; Zhang, Peng; Wang, Laiyuan; Wu, Dequn

2017-01-01

Nonvolatile organic field‐effect transistor (OFET) memory devices based on pentacene/N,N′‐ditridecylperylene‐3,4,9,10‐tetracarboxylic diimide (P13)/pentacene trilayer organic heterostructures have been proposed. The discontinuous n‐type P13 embedded in p‐type pentacene layers can not only provide electrons in the semiconductor layer that facilitates electron trapping process; it also works as charge trapping sites, which is attributed to the quantum well‐like pentacene/P13/pentacene organic heterostructures. The synergistic effects of charge trapping in the discontinuous P13 and the charge‐trapping property of the poly(4‐vinylphenol) (PVP) layer remarkably improve the memory performance. In addition, the trilayer organic heterostructures have also been successfully applied to multilevel and flexible nonvolatile memory devices. The results provide a novel design strategy to achieve high‐performance nonvolatile OFET memory devices and allow potential applications for different combinations of various organic semiconductor materials in OFET memory. PMID:28852619

Metal-insulator-semiconductor heterostructures for plasmonic hot-carrier optoelectronics.

PubMed

García de Arquer, F Pelayo; Konstantatos, Gerasimos

2015-06-01

Plasmonic hot-electron devices are attractive candidates for light-energy harvesting and photodetection applications. For solid state devices, the most compact and straightforward architecture is the metal-semiconductor Schottky junction. However convenient, this structure introduces limitations such as the elevated dark current associated to thermionic emission, or constraints for device design due to the finite choice of materials. In this work we theoretically consider the metal-insulator-semiconductor heterojunction as a candidate for plasmonic hot-carrier photodetection and solar cells. The presence of the insulating layer can significantly reduce the dark current, resulting in increased device performance with predicted solar power conversion efficiencies up to 9%. For photodetection, the sensitivity can be extended well into the infrared by a judicious choice of the insulating layer, with up to 300-fold expected enhancement in detectivity.

Photo-Detection on Narrow-Bandgap High-Mobility 2D Semiconductors

NASA Astrophysics Data System (ADS)

Charnas, Adam; Qiu, Gang; Deng, Yexin; Wang, Yixiu; Du, Yuchen; Yang, Lingming; Wu, Wenzhuo; Ye, Peide

Photo-detection and energy harvesting device concepts have been demonstrated widely in 2D materials such as graphene, TMDs, and black phosphorus. In this work, we demonstrate anisotropic photo-detection achieved using devices fabricated from hydrothermally grown narrow-bandgap high-mobility 2D semiconductor. Back-gated FETs were fabricated by transferring the 2D flakes onto a Si/SiO2 substrate and depositing various metal contacts across the flakes to optimize the access resistance for optoelectronic devices. Photo-responsivity was measured and mapped by slightly biasing the devices and shining a laser spot at different locations of the device to observe and map the resulting photo-generated current. Optimization of the Schottky barrier height for both n and p at the metal-2D interfaces using asymmetric contact engineering was performed to improve device performance.

Extended Abstracts of the U.S. Workshop on the Physics and Chemistry of Mercury Cadmium Telluride Held in Orlando, Florida on October 11-13, 1988

DTIC Science & Technology

1988-12-01

Mainzer SCD - Semi-Conductor Devices A Tadiran-Rafael Partnership, Misgav Mobile Post, 20179,ISRAEL The effect of strain and stress on the performance of...Nili Mainzer and Eliezer Weiss SCD - Semi-Conductor Devices A Tadiran-Rafael Partnership, Misgav Mobile Post, 20179, ISRAEL In the 1987 workshop we have

An integrated semiconductor device enabling non-optical genome sequencing.

PubMed

Rothberg, Jonathan M; Hinz, Wolfgang; Rearick, Todd M; Schultz, Jonathan; Mileski, William; Davey, Mel; Leamon, John H; Johnson, Kim; Milgrew, Mark J; Edwards, Matthew; Hoon, Jeremy; Simons, Jan F; Marran, David; Myers, Jason W; Davidson, John F; Branting, Annika; Nobile, John R; Puc, Bernard P; Light, David; Clark, Travis A; Huber, Martin; Branciforte, Jeffrey T; Stoner, Isaac B; Cawley, Simon E; Lyons, Michael; Fu, Yutao; Homer, Nils; Sedova, Marina; Miao, Xin; Reed, Brian; Sabina, Jeffrey; Feierstein, Erika; Schorn, Michelle; Alanjary, Mohammad; Dimalanta, Eileen; Dressman, Devin; Kasinskas, Rachel; Sokolsky, Tanya; Fidanza, Jacqueline A; Namsaraev, Eugeni; McKernan, Kevin J; Williams, Alan; Roth, G Thomas; Bustillo, James

2011-07-20

The seminal importance of DNA sequencing to the life sciences, biotechnology and medicine has driven the search for more scalable and lower-cost solutions. Here we describe a DNA sequencing technology in which scalable, low-cost semiconductor manufacturing techniques are used to make an integrated circuit able to directly perform non-optical DNA sequencing of genomes. Sequence data are obtained by directly sensing the ions produced by template-directed DNA polymerase synthesis using all-natural nucleotides on this massively parallel semiconductor-sensing device or ion chip. The ion chip contains ion-sensitive, field-effect transistor-based sensors in perfect register with 1.2 million wells, which provide confinement and allow parallel, simultaneous detection of independent sequencing reactions. Use of the most widely used technology for constructing integrated circuits, the complementary metal-oxide semiconductor (CMOS) process, allows for low-cost, large-scale production and scaling of the device to higher densities and larger array sizes. We show the performance of the system by sequencing three bacterial genomes, its robustness and scalability by producing ion chips with up to 10 times as many sensors and sequencing a human genome.

A comprehensive study of charge trapping in organic field-effect devices with promising semiconductors and different contact metals by displacement current measurements

NASA Astrophysics Data System (ADS)

Bisoyi, Sibani; Rödel, Reinhold; Zschieschang, Ute; Kang, Myeong Jin; Takimiya, Kazuo; Klauk, Hagen; Tiwari, Shree Prakash

2016-02-01

A systematic and comprehensive study on the charge-carrier injection and trapping behavior was performed using displacement current measurements in long-channel capacitors based on four promising small-molecule organic semiconductors (pentacene, DNTT, C10-DNTT and DPh-DNTT). In thin-film transistors, these semiconductors showed charge-carrier mobilities ranging from 1.0 to 7.8 cm2 V-1 s-1. The number of charges injected into and extracted from the semiconductor and the density of charges trapped in the device during each measurement were calculated from the displacement current characteristics and it was found that the density of trapped charges is very similar in all devices and of the order 1012 cm-2, despite the fact that the four semiconductors show significantly different charge-carrier mobilities. The choice of the contact metal (Au, Ag, Cu, Pd) was also found to have no significant effect on the trapping behavior.

Organic semiconductor crystals.

PubMed

Wang, Chengliang; Dong, Huanli; Jiang, Lang; Hu, Wenping

2018-01-22

Organic semiconductors have attracted a lot of attention since the discovery of highly doped conductive polymers, due to the potential application in field-effect transistors (OFETs), light-emitting diodes (OLEDs) and photovoltaic cells (OPVs). Single crystals of organic semiconductors are particularly intriguing because they are free of grain boundaries and have long-range periodic order as well as minimal traps and defects. Hence, organic semiconductor crystals provide a powerful tool for revealing the intrinsic properties, examining the structure-property relationships, demonstrating the important factors for high performance devices and uncovering fundamental physics in organic semiconductors. This review provides a comprehensive overview of the molecular packing, morphology and charge transport features of organic semiconductor crystals, the control of crystallization for achieving high quality crystals and the device physics in the three main applications. We hope that this comprehensive summary can give a clear picture of the state-of-art status and guide future work in this area.

High-performance all-printed amorphous oxide FETs and logics with electronically compatible electrode/ channel interface.

PubMed

Sharma, Bhupendra Kumar; Stoesser, Anna; Mondal, Sandeep Kumar; Garlapati, Suresh K; Fawey, Mohammed H; Chakravadhanula, Venkata Sai Kiran; Kruk, Robert; Hahn, Horst; Dasgupta, Subho

2018-06-12

Oxide semiconductors typically show superior device performance compared to amorphous silicon or organic counterparts, especially, when they are physical vapor deposited. However, it is not easy to reproduce identical device characteristics when the oxide field-effect transistors (FETs) are solution-processed/ printed; the level of complexity further intensifies with the need to print the passive elements as well. Here, we developed a protocol for designing the most electronically compatible electrode/ channel interface based on the judicious material selection. Exploiting this newly developed fabrication schemes, we are now able to demonstrate high-performance all-printed FETs and logic circuits using amorphous indium-gallium-zinc oxide (a-IGZO) semiconductor, indium tin oxide (ITO) as electrodes and composite solid polymer electrolyte as the gate insulator. Interestingly, all-printed FETs demonstrate an optimal electrical performance in terms of threshold voltages and device mobility and may very well be compared with devices fabricated using sputtered ITO electrodes. This observation originates from the selection of electrode/ channel materials from the same transparent semiconductor oxide family, resulting in the formation of In-Sn-Zn-O (ITZO) based diffused a-IGZO/ ITO interface that controls doping density while ensuring high electrical performance. Compressive spectroscopic studies reveal that Sn doping mediated excellent band alignment of IGZO with ITO electrodes is responsible for the excellent device performance observed. All-printed n-MOS based logic circuits have also been demonstrated towards new-generation portable electronics.

Sintered silver joints via controlled topography of electronic packaging subcomponents

DOEpatents

Wereszczak, Andrew A.

2014-09-02

Disclosed are sintered silver bonded electronic package subcomponents and methods for making the same. Embodiments of the sintered silver bonded EPSs include topography modification of one or more metal surfaces of semiconductor devices bonded together by the sintered silver joint. The sintered silver bonded EPSs include a first semiconductor device having a first metal surface, the first metal surface having a modified topography that has been chemically etched, grit blasted, uniaxial ground and/or grid sliced connected to a second semiconductor device which may also include a first metal surface with a modified topography, a silver plating layer on the first metal surface of the first semiconductor device and a silver plating layer on the first metal surface of the second semiconductor device and a sintered silver joint between the silver plating layers of the first and second semiconductor devices which bonds the first semiconductor device to the second semiconductor device.

Flat-lying semiconductor-insulator interfacial layer in DNTT thin films.

PubMed

Jung, Min-Cherl; Leyden, Matthew R; Nikiforov, Gueorgui O; Lee, Michael V; Lee, Han-Koo; Shin, Tae Joo; Takimiya, Kazuo; Qi, Yabing

2015-01-28

The molecular order of organic semiconductors at the gate dielectric is the most critical factor determining carrier mobility in thin film transistors since the conducting channel forms at the dielectric interface. Despite its fundamental importance, this semiconductor-insulator interface is not well understood, primarily because it is buried within the device. We fabricated dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT) thin film transistors by thermal evaporation in vacuum onto substrates held at different temperatures and systematically correlated the extracted charge mobility to the crystal grain size and crystal orientation. As a result, we identify a molecular layer of flat-lying DNTT molecules at the semiconductor-insulator interface. It is likely that such a layer might form in other material systems as well, and could be one of the factors reducing charge transport. Controlling this interfacial flat-lying layer may raise the ultimate possible device performance for thin film devices.

Active Control of Charge Density Waves at Degenerate Semiconductor Interfaces

NASA Astrophysics Data System (ADS)

Vinnakota, Raj; Genov, Dentcho

We present numerical modeling of an active electronically controlled highly confined charge-density waves, i.e. surface plasmon polaritons (SPPs) at the metallurgic interfaces of degenerate semiconductor materials. An electro-optic switching element for fully-functional plasmonic circuits based on p-n junction semiconductor Surface Plasmon Polariton (SPP) waveguide is shown. Two figures of merits are introduced and parametric study has been performed identifying the device optimal operation range. The Indium Gallium Arsenide (In0.53Ga0.47As) is identified as the best semiconductor material for the device providing high optical confinement, reduced system size and fast operation. The electro-optic SPP switching element is shown to operate at signal modulation up to -24dB and switching rates surpassing 100GHz, thus potentially providing a new pathway toward bridging the gap between electronic and photonic devices. The current work is funded by the NSF EPSCoR CIMM project under award #OIA-1541079.

Exchanging Ohmic Losses in Metamaterial Absorbers with Useful Optical Absorption for Photovoltaics

PubMed Central

Vora, Ankit; Gwamuri, Jephias; Pala, Nezih; Kulkarni, Anand; Pearce, Joshua M.; Güney, Durdu Ö.

2014-01-01

Using metamaterial absorbers, we have shown that metallic layers in the absorbers do not necessarily constitute undesired resistive heating problem for photovoltaics. Tailoring the geometric skin depth of metals and employing the natural bulk absorbance characteristics of the semiconductors in those absorbers can enable the exchange of undesired resistive losses with the useful optical absorbance in the active semiconductors. Thus, Ohmic loss dominated metamaterial absorbers can be converted into photovoltaic near-perfect absorbers with the advantage of harvesting the full potential of light management offered by the metamaterial absorbers. Based on experimental permittivity data for indium gallium nitride, we have shown that between 75%–95% absorbance can be achieved in the semiconductor layers of the converted metamaterial absorbers. Besides other metamaterial and plasmonic devices, our results may also apply to photodectors and other metal or semiconductor based optical devices where resistive losses and power consumption are important pertaining to the device performance. PMID:24811322

Collection-limited theory interprets the extraordinary response of single semiconductor organic solar cells

PubMed Central

Ray, Biswajit; Baradwaj, Aditya G.; Khan, Mohammad Ryyan; Boudouris, Bryan W.; Alam, Muhammad Ashraful

2015-01-01

The bulk heterojunction (BHJ) organic photovoltaic (OPV) architecture has dominated the literature due to its ability to be implemented in devices with relatively high efficiency values. However, a simpler device architecture based on a single organic semiconductor (SS-OPV) offers several advantages: it obviates the need to control the highly system-dependent nanoscale BHJ morphology, and therefore, would allow the use of broader range of organic semiconductors. Unfortunately, the photocurrent in standard SS-OPV devices is typically very low, which generally is attributed to inefficient charge separation of the photogenerated excitons. Here we show that the short-circuit current density from SS-OPV devices can be enhanced significantly (∼100-fold) through the use of inverted device configurations, relative to a standard OPV device architecture. This result suggests that charge generation may not be the performance bottleneck in OPV device operation. Instead, poor charge collection, caused by defect-induced electric field screening, is most likely the primary performance bottleneck in regular-geometry SS-OPV cells. We justify this hypothesis by: (i) detailed numerical simulations, (ii) electrical characterization experiments of functional SS-OPV devices using multiple polymers as active layer materials, and (iii) impedance spectroscopy measurements. Furthermore, we show that the collection-limited photocurrent theory consistently interprets typical characteristics of regular SS-OPV devices. These insights should encourage the design and OPV implementation of high-purity, high-mobility polymers, and other soft materials that have shown promise in organic field-effect transistor applications, but have not performed well in BHJ OPV devices, wherein they adopt less-than-ideal nanostructures when blended with electron-accepting materials. PMID:26290582

Collection-limited theory interprets the extraordinary response of single semiconductor organic solar cells.

PubMed

Ray, Biswajit; Baradwaj, Aditya G; Khan, Mohammad Ryyan; Boudouris, Bryan W; Alam, Muhammad Ashraful

2015-09-08

The bulk heterojunction (BHJ) organic photovoltaic (OPV) architecture has dominated the literature due to its ability to be implemented in devices with relatively high efficiency values. However, a simpler device architecture based on a single organic semiconductor (SS-OPV) offers several advantages: it obviates the need to control the highly system-dependent nanoscale BHJ morphology, and therefore, would allow the use of broader range of organic semiconductors. Unfortunately, the photocurrent in standard SS-OPV devices is typically very low, which generally is attributed to inefficient charge separation of the photogenerated excitons. Here we show that the short-circuit current density from SS-OPV devices can be enhanced significantly (∼100-fold) through the use of inverted device configurations, relative to a standard OPV device architecture. This result suggests that charge generation may not be the performance bottleneck in OPV device operation. Instead, poor charge collection, caused by defect-induced electric field screening, is most likely the primary performance bottleneck in regular-geometry SS-OPV cells. We justify this hypothesis by: (i) detailed numerical simulations, (ii) electrical characterization experiments of functional SS-OPV devices using multiple polymers as active layer materials, and (iii) impedance spectroscopy measurements. Furthermore, we show that the collection-limited photocurrent theory consistently interprets typical characteristics of regular SS-OPV devices. These insights should encourage the design and OPV implementation of high-purity, high-mobility polymers, and other soft materials that have shown promise in organic field-effect transistor applications, but have not performed well in BHJ OPV devices, wherein they adopt less-than-ideal nanostructures when blended with electron-accepting materials.

Solution-Processed Wide-Bandgap Organic Semiconductor Nanostructures Arrays for Nonvolatile Organic Field-Effect Transistor Memory.

PubMed

Li, Wen; Guo, Fengning; Ling, Haifeng; Liu, Hui; Yi, Mingdong; Zhang, Peng; Wang, Wenjun; Xie, Linghai; Huang, Wei

2018-01-01

In this paper, the development of organic field-effect transistor (OFET) memory device based on isolated and ordered nanostructures (NSs) arrays of wide-bandgap (WBG) small-molecule organic semiconductor material [2-(9-(4-(octyloxy)phenyl)-9H-fluoren-2-yl)thiophene]3 (WG 3 ) is reported. The WG 3 NSs are prepared from phase separation by spin-coating blend solutions of WG 3 /trimethylolpropane (TMP), and then introduced as charge storage elements for nonvolatile OFET memory devices. Compared to the OFET memory device with smooth WG 3 film, the device based on WG 3 NSs arrays exhibits significant improvements in memory performance including larger memory window (≈45 V), faster switching speed (≈1 s), stable retention capability (>10 4 s), and reliable switching properties. A quantitative study of the WG 3 NSs morphology reveals that enhanced memory performance is attributed to the improved charge trapping/charge-exciton annihilation efficiency induced by increased contact area between the WG 3 NSs and pentacene layer. This versatile solution-processing approach to preparing WG 3 NSs arrays as charge trapping sites allows for fabrication of high-performance nonvolatile OFET memory devices, which could be applicable to a wide range of WBG organic semiconductor materials. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Wide Bandgap Semiconductor Nanowires for Electronic, Photonic and Sensing Devices

DTIC Science & Technology

2012-01-05

oxide -based thin film transistors ( TFTs ) have attracted much attention for applications like flexible electronic devices. The...crystals, and ~ 1.5 cm2.V-1.s-1 for pentacene thin films ). A number of groups have demonstrated TFTs based on α- oxide semiconductors such as zinc oxide ...show excellent long-term stability at room temperature. Results: High-performance amorphous (α-) InGaZnO-based thin film transistors ( TFTs )

Reducing leakage current in semiconductor devices

DOEpatents

Lu, Bin; Matioli, Elison de Nazareth; Palacios, Tomas Apostol

2018-03-06

A semiconductor device includes a first region having a first semiconductor material and a second region having a second semiconductor material. The second region is formed over the first region. The semiconductor device also includes a current blocking structure formed in the first region between first and second terminals of the semiconductor device. The current blocking structure is configured to reduce current flow in the first region between the first and second terminals.

Metal-oxide-semiconductor devices using Ga2O3 dielectrics on n-type GaN

NASA Astrophysics Data System (ADS)

Lee, Ching-Ting; Chen, Hong-Wei; Lee, Hsin-Ying

2003-06-01

Using a photoelectrochemical method involving a He-Cd laser, Ga2O3 oxide layers were directly grown on n-type GaN. We demonstrated the performance of the resultant metal-oxide-semiconductor devices based on the grown Ga2O3 layer. An extremely low reverse leakage current of 200 pA was achieved when devices operated at -20 V. Furthermore, high forward and reverse breakdown electric fields of 2.80 MV/cm and 5.70 MV/cm, respectively, were obtained. Using a photoassisted current-voltage method, a low interface state density of 2.53×1011 cm-2 eV-1 was estimated. The varactor devices permit formation of inversion layers, so that they may be applied for the fabrication of metal-oxide-semiconductor field-effect transistors.

Monolayer graphene-insulator-semiconductor emitter for large-area electron lithography

NASA Astrophysics Data System (ADS)

Kirley, Matthew P.; Aloui, Tanouir; Glass, Jeffrey T.

2017-06-01

The rapid adoption of nanotechnology in fields as varied as semiconductors, energy, and medicine requires the continual improvement of nanopatterning tools. Lithography is central to this evolving nanotechnology landscape, but current production systems are subject to high costs, low throughput, or low resolution. Herein, we present a solution to these problems with the use of monolayer graphene in a graphene-insulator-semiconductor (GIS) electron emitter device for large-area electron lithography. Our GIS device displayed high emission efficiency (up to 13%) and transferred large patterns (500 × 500 μm) with high fidelity (<50% spread). The performance of our device demonstrates a feasible path to dramatic improvements in lithographic patterning systems, enabling continued progress in existing industries and opening opportunities in nanomanufacturing.

Semiconductor optoelectronic devices for free-space optical communications

NASA Technical Reports Server (NTRS)

Katz, J.

1983-01-01

The properties of individual injection lasers are reviewed, and devices of greater complexity are described. These either include or are relevant to monolithic integration configurations of the lasers with their electronic driving circuitry, power combining methods of semiconductor lasers, and electronic methods of steering the radiation patterns of semiconductor lasers and laser arrays. The potential of AlGaAs laser technology for free-space optical communications systems is demonstrated. These solid-state components, which can generate and modulate light, combine the power of a number of sources and perform at least part of the beam pointing functions. Methods are proposed for overcoming the main drawback of semiconductor lasers, that is, their inability to emit the needed amount of optical power in a single-mode operation.

High performance Si nanowire field-effect-transistors based on a CMOS inverter with tunable threshold voltage.

PubMed

Van, Ngoc Huynh; Lee, Jae-Hyun; Sohn, Jung Inn; Cha, Seung Nam; Whang, Dongmok; Kim, Jong Min; Kang, Dae Joon

2014-05-21

We successfully fabricated nanowire-based complementary metal-oxide semiconductor (NWCMOS) inverter devices by utilizing n- and p-type Si nanowire field-effect-transistors (NWFETs) via a low-temperature fabrication processing technique. We demonstrate that NWCMOS inverter devices can be operated at less than 1 V, a significantly lower voltage than that of typical thin-film based complementary metal-oxide semiconductor (CMOS) inverter devices. This low-voltage operation was accomplished by controlling the threshold voltage of the n-type Si NWFETs through effective management of the nanowire (NW) doping concentration, while realizing high voltage gain (>10) and ultra-low static power dissipation (≤3 pW) for high-performance digital inverter devices. This result offers a viable means of fabricating high-performance, low-operation voltage, and high-density digital logic circuits using a low-temperature fabrication processing technique suitable for next-generation flexible electronics.

Influence of material quality and process-induced defects on semiconductor device performance and yield

NASA Technical Reports Server (NTRS)

Porter, W. A.; Mckee, W. R.

1974-01-01

An overview of major causes of device yield degradation is presented. The relationships of device types to critical processes and typical defects are discussed, and the influence of the defect on device yield and performance is demonstrated. Various defect characterization techniques are described and applied. A correlation of device failure, defect type, and cause of defect is presented in tabular form with accompanying illustrations.

Crossover from band-like to thermally activated charge transport in organic transistors due to strain-induced traps

PubMed Central

Mei, Yaochuan; Diemer, Peter J.; Niazi, Muhammad R.; Hallani, Rawad K.; Jarolimek, Karol; Day, Cynthia S.; Risko, Chad; Anthony, John E.; Amassian, Aram

2017-01-01

The temperature dependence of the charge-carrier mobility provides essential insight into the charge transport mechanisms in organic semiconductors. Such knowledge imparts critical understanding of the electrical properties of these materials, leading to better design of high-performance materials for consumer applications. Here, we present experimental results that suggest that the inhomogeneous strain induced in organic semiconductor layers by the mismatch between the coefficients of thermal expansion (CTE) of the consecutive device layers of field-effect transistors generates trapping states that localize charge carriers. We observe a universal scaling between the activation energy of the transistors and the interfacial thermal expansion mismatch, in which band-like transport is observed for similar CTEs, and activated transport otherwise. Our results provide evidence that a high-quality semiconductor layer is necessary, but not sufficient, to obtain efficient charge-carrier transport in devices, and underline the importance of holistic device design to achieve the intrinsic performance limits of a given organic semiconductor. We go on to show that insertion of an ultrathin CTE buffer layer mitigates this problem and can help achieve band-like transport on a wide range of substrate platforms. PMID:28739934

Crossover from band-like to thermally activated charge transport in organic transistors due to strain-induced traps.

PubMed

Mei, Yaochuan; Diemer, Peter J; Niazi, Muhammad R; Hallani, Rawad K; Jarolimek, Karol; Day, Cynthia S; Risko, Chad; Anthony, John E; Amassian, Aram; Jurchescu, Oana D

2017-08-15

The temperature dependence of the charge-carrier mobility provides essential insight into the charge transport mechanisms in organic semiconductors. Such knowledge imparts critical understanding of the electrical properties of these materials, leading to better design of high-performance materials for consumer applications. Here, we present experimental results that suggest that the inhomogeneous strain induced in organic semiconductor layers by the mismatch between the coefficients of thermal expansion (CTE) of the consecutive device layers of field-effect transistors generates trapping states that localize charge carriers. We observe a universal scaling between the activation energy of the transistors and the interfacial thermal expansion mismatch, in which band-like transport is observed for similar CTEs, and activated transport otherwise. Our results provide evidence that a high-quality semiconductor layer is necessary, but not sufficient, to obtain efficient charge-carrier transport in devices, and underline the importance of holistic device design to achieve the intrinsic performance limits of a given organic semiconductor. We go on to show that insertion of an ultrathin CTE buffer layer mitigates this problem and can help achieve band-like transport on a wide range of substrate platforms.

Electroless silver plating of the surface of organic semiconductors.

PubMed

Campione, Marcello; Parravicini, Matteo; Moret, Massimo; Papagni, Antonio; Schröter, Bernd; Fritz, Torsten

2011-10-04

The integration of nanoscale processes and devices demands fabrication routes involving rapid, cost-effective steps, preferably carried out under ambient conditions. The realization of the metal/organic semiconductor interface is one of the most demanding steps of device fabrication, since it requires mechanical and/or thermal treatments which increment costs and are often harmful in respect to the active layer. Here, we provide a microscopic analysis of a room temperature, electroless process aimed at the deposition of a nanostructured metallic silver layer with controlled coverage atop the surface of single crystals and thin films of organic semiconductors. This process relies on the reaction of aqueous AgF solutions with the nonwettable crystalline surface of donor-type organic semiconductors. It is observed that the formation of a uniform layer of silver nanoparticles can be accomplished within 20 min contact time. The electrical characterization of two-terminal devices performed before and after the aforementioned treatment shows that the metal deposition process is associated with a redox reaction causing the p-doping of the semiconductor. © 2011 American Chemical Society

High Performance Molybdenum Disulfide Amorphous Silicon Heterojunction Photodetector

PubMed Central

Esmaeili-Rad, Mohammad R.; Salahuddin, Sayeef

2013-01-01

One important use of layered semiconductors such as molybdenum disulfide (MoS2) could be in making novel heterojunction devices leading to functionalities unachievable using conventional semiconductors. Here we demonstrate a metal-semiconductor-metal heterojunction photodetector, made of MoS2 and amorphous silicon (a-Si), with rise and fall times of about 0.3 ms. The transient response does not show persistent (residual) photoconductivity, unlike conventional a-Si devices where it may last 3–5 ms, thus making this heterojunction roughly 10X faster. A photoresponsivity of 210 mA/W is measured at green light, the wavelength used in commercial imaging systems, which is 2−4X larger than that of a-Si and best reported MoS2 devices. The device could find applications in large area electronics, such as biomedical imaging, where a fast response is critical. PMID:23907598

Development of UItra-Low Temperature Motor Controllers: Ultra Low Temperatures Evaluation and Characterization of Semiconductor Technologies For The Next Generation Space Telescope

NASA Technical Reports Server (NTRS)

Elbuluk, Malik E.

2003-01-01

Electronics designed for low temperature operation will result in more efficient systems than room temperature. This improvement is a result of better electronic, electrical, and thermal properties of materials at low temperatures. In particular, the performance of certain semiconductor devices improves with decreasing temperature down to ultra-low temperature (-273 'C). The Low Temperature Electronics Program at the NASA Glenn Research Center focuses on research and development of electrical components and systems suitable for applications in deep space missions. Research is being conducted on devices and systems for use down to liquid helium temperatures (-273 'C). Some of the components that are being characterized include semiconductor switching devices, resistors, magnetics, and capacitors. The work performed this summer has focused on the evaluation of silicon-, silicon-germanium- and gallium-Arsenide-based (GaAs) bipolar, MOS and CMOS discrete components and integrated circuits (ICs), from room temperature (23 'C) down to ultra low temperatures (-263 'C).

Collection-limited theory interprets the extraordinary response of single semiconductor organic solar cells

DOE PAGES

Ray, Biswajit; Baradwaj, Aditya G.; Khan, Mohammad Ryyan; ...

2015-08-19

The bulk heterojunction (BHJ) organic photovoltaic (OPV) architecture has dominated the literature due to its ability to be implemented in devices with relatively high efficiency values. However, a simpler device architecture based on a single organic semiconductor (SS-OPV) offers several advantages: it obviates the need to control the highly system-dependent nanoscale BHJ morphology, and therefore, would allow the use of broader range of organic semiconductors. Unfortunately, the photocurrent in standard SS-OPV devices is typically very low, which generally is attributed to inefficient charge separation of the photogenerated excitons. In this paper, we show that the short-circuit current density from SS-OPVmore » devices can be enhanced significantly (~100-fold) through the use of inverted device configurations, relative to a standard OPV device architecture. This result suggests that charge generation may not be the performance bottleneck in OPV device operation. Instead, poor charge collection, caused by defect-induced electric field screening, is most likely the primary performance bottleneck in regular-geometry SS-OPV cells. We justify this hypothesis by: ( i) detailed numerical simulations, ( ii) electrical characterization experiments of functional SS-OPV devices using multiple polymers as active layer materials, and ( iii) impedance spectroscopy measurements. Furthermore, we show that the collection-limited photocurrent theory consistently interprets typical characteristics of regular SS-OPV devices. Finally, these insights should encourage the design and OPV implementation of high-purity, high-mobility polymers, and other soft materials that have shown promise in organic field-effect transistor applications, but have not performed well in BHJ OPV devices, wherein they adopt less-than-ideal nanostructures when blended with electron-accepting materials.« less

Method of Manufacturing a Light Emitting, Photovoltaic or Other Electronic Apparatus and System

NASA Technical Reports Server (NTRS)

Blanchard, Richard A. (Inventor); Lewandowski, Mark Allan (Inventor); Frazier, Donald Odell (Inventor); Ray, William Johnstone (Inventor); Fuller, Kirk A. (Inventor); Lowenthal, Mark David (Inventor); Shotton, Neil O. (Inventor)

2014-01-01

The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.

Method of manufacturing a light emitting, photovoltaic or other electronic apparatus and system

NASA Technical Reports Server (NTRS)

Fuller, Kirk A. (Inventor); Frazier, Donald Odell (Inventor); Blanchard, Richard A. (Inventor); Lowenthal, Mark D. (Inventor); Lewandowski, Mark Allan (Inventor); Ray, William Johnstone (Inventor); Shotton, Neil O. (Inventor)

2012-01-01

The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.

Chemical Defects and Electronics States in Organic Semiconductors

DTIC Science & Technology

2008-05-31

from interacting with organic semiconductor devices. An expt./theoretical study of 0 2 in pentacene indicated that a positive gate voltage can cause...dissociative interaction of02 with pentacene . 1S. SUBJECT TERMS organic semiconductors, PBTIT, P3HT, PQT, polythiophenes, pentacene , defects...investigations of the interaction of02 molecules with pentacene were performed. Based on calculations of formation energies of charged defects a model was

High performance printed oxide field-effect transistors processed using photonic curing.

PubMed

Garlapati, Suresh Kumar; Marques, Gabriel Cadilha; Gebauer, Julia Susanne; Dehm, Simone; Bruns, Michael; Winterer, Markus; Tahoori, Mehdi Baradaran; Aghassi-Hagmann, Jasmin; Hahn, Horst; Dasgupta, Subho

2018-06-08

Oxide semiconductors are highly promising candidates for the most awaited, next-generation electronics, namely, printed electronics. As a fabrication route for the solution-processed/printed oxide semiconductors, photonic curing is becoming increasingly popular, as compared to the conventional thermal curing method; the former offers numerous advantages over the latter, such as low process temperatures and short exposure time and thereby, high throughput compatibility. Here, using dissimilar photonic curing concepts (UV-visible light and UV-laser), we demonstrate facile fabrication of high performance In 2 O 3 field-effect transistors (FETs). Beside the processing related issues (temperature, time etc.), the other known limitation of oxide electronics is the lack of high performance p-type semiconductors, which can be bypassed using unipolar logics from high mobility n-type semiconductors alone. Interestingly, here we have found that our chosen distinct photonic curing methods can offer a large variation in threshold voltage, when they are fabricated from the same precursor ink. Consequently, both depletion and enhancement-mode devices have been achieved which can be used as the pull-up and pull-down transistors in unipolar inverters. The present device fabrication recipe demonstrates fast processing of low operation voltage, high performance FETs with large threshold voltage tunability.

High performance printed oxide field-effect transistors processed using photonic curing

NASA Astrophysics Data System (ADS)

Garlapati, Suresh Kumar; Cadilha Marques, Gabriel; Gebauer, Julia Susanne; Dehm, Simone; Bruns, Michael; Winterer, Markus; Baradaran Tahoori, Mehdi; Aghassi-Hagmann, Jasmin; Hahn, Horst; Dasgupta, Subho

2018-06-01

Oxide semiconductors are highly promising candidates for the most awaited, next-generation electronics, namely, printed electronics. As a fabrication route for the solution-processed/printed oxide semiconductors, photonic curing is becoming increasingly popular, as compared to the conventional thermal curing method; the former offers numerous advantages over the latter, such as low process temperatures and short exposure time and thereby, high throughput compatibility. Here, using dissimilar photonic curing concepts (UV–visible light and UV-laser), we demonstrate facile fabrication of high performance In2O3 field-effect transistors (FETs). Beside the processing related issues (temperature, time etc.), the other known limitation of oxide electronics is the lack of high performance p-type semiconductors, which can be bypassed using unipolar logics from high mobility n-type semiconductors alone. Interestingly, here we have found that our chosen distinct photonic curing methods can offer a large variation in threshold voltage, when they are fabricated from the same precursor ink. Consequently, both depletion and enhancement-mode devices have been achieved which can be used as the pull-up and pull-down transistors in unipolar inverters. The present device fabrication recipe demonstrates fast processing of low operation voltage, high performance FETs with large threshold voltage tunability.

Effect of Pentacene-dielectric Affinity on Pentacene Thin Film Growth Morphology in Organic Field-effect Transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

S Kim; M Jang; H Yang

2011-12-31

Organic field-effect transistors (OFETs) are fabricated by depositing a thin film of semiconductor on the functionalized surface of a SiO{sub 2} dielectric. The chemical and morphological structures of the interface between the semiconductor and the functionalized dielectric are critical for OFET performance. We have characterized the effect of the affinity between semiconductor and functionalized dielectric on the properties of the semiconductor-dielectric interface. The crystalline microstructure/nanostructure of the pentacene semiconductor layers, grown on a dielectric substrate that had been functionalized with either poly(4-vinyl pyridine) or polystyrene (to control hydrophobicity), and grown under a series of substrate temperatures and deposition rates, weremore » characterized by X-ray diffraction, photoemission spectroscopy, and atomic force microscopy. By comparing the morphological features of the semiconductor thin films with the device characteristics (field-effect mobility, threshold voltage, and hysteresis) of the OFET devices, the effect of affinity-driven properties on charge modulation, charge trapping, and charge carrier transport could be described.« less

Heteroepitaxial growth of 3-5 semiconductor compounds by metal-organic chemical vapor deposition for device applications

NASA Technical Reports Server (NTRS)

Collis, Ward J.; Abul-Fadl, Ali

1988-01-01

The purpose of this research is to design, install and operate a metal-organic chemical vapor deposition system which is to be used for the epitaxial growth of 3-5 semiconductor binary compounds, and ternary and quaternary alloys. The long-term goal is to utilize this vapor phase deposition in conjunction with existing current controlled liquid phase epitaxy facilities to perform hybrid growth sequences for fabricating integrated optoelectronic devices.

Nanocrystalline ZnON; High mobility and low band gap semiconductor material for high performance switch transistor and image sensor application

PubMed Central

Lee, Eunha; Benayad, Anass; Shin, Taeho; Lee, HyungIk; Ko, Dong-Su; Kim, Tae Sang; Son, Kyoung Seok; Ryu, Myungkwan; Jeon, Sanghun; Park, Gyeong-Su

2014-01-01

Interest in oxide semiconductors stems from benefits, primarily their ease of process, relatively high mobility (0.3–10 cm2/vs), and wide-bandgap. However, for practical future electronic devices, the channel mobility should be further increased over 50 cm2/vs and wide-bandgap is not suitable for photo/image sensor applications. The incorporation of nitrogen into ZnO semiconductor can be tailored to increase channel mobility, enhance the optical absorption for whole visible light and form uniform micro-structure, satisfying the desirable attributes essential for high performance transistor and visible light photo-sensors on large area platform. Here, we present electronic, optical and microstructural properties of ZnON, a composite of Zn3N2 and ZnO. Well-optimized ZnON material presents high mobility exceeding 100 cm2V−1s−1, the band-gap of 1.3 eV and nanocrystalline structure with multiphase. We found that mobility, microstructure, electronic structure, band-gap and trap properties of ZnON are varied with nitrogen concentration in ZnO. Accordingly, the performance of ZnON-based device can be adjustable to meet the requisite of both switch device and image-sensor potentials. These results demonstrate how device and material attributes of ZnON can be optimized for new device strategies in display technology and we expect the ZnON will be applicable to a wide range of imaging/display devices. PMID:24824778

Features of the piezo-phototronic effect on optoelectronic devices based on wurtzite semiconductor nanowires.

PubMed

Yang, Qing; Wu, Yuanpeng; Liu, Ying; Pan, Caofeng; Wang, Zhong Lin

2014-02-21

The piezo-phototronic effect, a three way coupling effect of piezoelectric, semiconductor and photonic properties in non-central symmetric semiconductor materials, utilizing the piezo-potential as a "gate" voltage to tune the charge transport/generation/recombination and modulate the performance of optoelectronic devices, has formed a new field and attracted lots of interest recently. The mechanism was verified in various optoelectronic devices such as light emitting diodes (LEDs), photodetectors and solar cells etc. The fast development and dramatic increasing interest in the piezo-phototronic field not only demonstrate the way the piezo-phototronic effects work, but also indicate the strong need for further research in the physical mechanism and potential applications. Furthermore, it is important to distinguish the contribution of the piezo-phototronic effect from other factors induced by external strain such as piezoresistance, band shifting or contact area change, which also affect the carrier behaviour and device performance. In this perspective, we review our recent progress on piezo-phototronics and especially focus on pointing out the features of piezo-phototronic effect in four aspects: I-V characteristics; c-axis orientation; influence of illumination; and modulation of carrier behaviour. Finally we proposed several criteria for describing the contribution made by the piezo-phototronic effect to the performance of optoelectronic devices. This systematic analysis and comparison will not only help give an in-depth understanding of the piezo-phototronic effect, but also work as guide for the design of devices in related areas.

Contributive research in compound semiconductor material and related devices

NASA Astrophysics Data System (ADS)

Twist, James R.

1988-05-01

The objective of this program was to provide the Electronic Device Branch (AFWAL/AADR) with the support needed to perform state of the art electronic device research. In the process of managing and performing on the project, UES has provided a wide variety of scientific and engineering talent who worked in-house for the Avionics Laboratory. These personnel worked on many different types of research programs from gas phase microwave driven lasers, CVD and MOCVD of electronic materials to Electronic Device Technology for new devices. The fields of research included MBE and theoretical research in this novel growth technique. Much of the work was slanted towards the rapidly developing technology of GaAs and the general thrust of the research that these tasks started has remained constant. This work was started because the Avionics Laboratory saw a chance to advance the knowledge and level of the current device technology by working in the compounds semiconductor field. UES is pleased to have had the opportunity to perform on this program and is looking forward to future efforts with the Avionics Laboratory.

Thermally robust semiconductor optical amplifiers and laser diodes

DOEpatents

Dijaili, Sol P.; Patterson, Frank G.; Walker, Jeffrey D.; Deri, Robert J.; Petersen, Holly; Goward, William

2002-01-01

A highly heat conductive layer is combined with or placed in the vicinity of the optical waveguide region of active semiconductor components. The thermally conductive layer enhances the conduction of heat away from the active region, which is where the heat is generated in active semiconductor components. This layer is placed so close to the optical region that it must also function as a waveguide and causes the active region to be nearly the same temperature as the ambient or heat sink. However, the semiconductor material itself should be as temperature insensitive as possible and therefore the invention combines a highly thermally conductive dielectric layer with improved semiconductor materials to achieve an overall package that offers improved thermal performance. The highly thermally conductive layer serves two basic functions. First, it provides a lower index material than the semiconductor device so that certain kinds of optical waveguides may be formed, e.g., a ridge waveguide. The second and most important function, as it relates to this invention, is that it provides a significantly higher thermal conductivity than the semiconductor material, which is the principal material in the fabrication of various optoelectronic devices.

Effect of dielectric layers on device stability of pentacene-based field-effect transistors.

PubMed

Di, Chong-an; Yu, Gui; Liu, Yunqi; Guo, Yunlong; Sun, Xiangnan; Zheng, Jian; Wen, Yugeng; Wang, Ying; Wu, Weiping; Zhu, Daoben

2009-09-07

We report stable organic field-effect transistors (OFETs) based on pentacene. It was found that device stability strongly depends on the dielectric layer. Pentacene thin-film transistors based on the bare or polystyrene-modified SiO(2) gate dielectrics exhibit excellent electrical stabilities. In contrast, the devices with the octadecyltrichlorosilane (OTS)-treated SiO(2) dielectric layer showed the worst stabilities. The effects of the different dielectrics on the device stabilities were investigated. We found that the surface energy of the gate dielectric plays a crucial role in determining the stability of the pentacene thin film, device performance and degradation of electrical properties. Pentacene aggregation, phase transfer and film morphology are also important factors that influence the device stability of pentacene devices. As a result of the surface energy mismatch between the dielectric layer and organic semiconductor, the electronic performance was degraded. Moreover, when pentacene was deposited on the OTS-treated SiO(2) dielectric layer with very low surface energy, pentacene aggregation occurred and resulted in a dramatic decrease of device performance. These results demonstrated that the stable OFETs could be obtained by using pentacene as a semiconductor layer.

Process waste assessment: Petroleum jelly removal from semiconductor die using trichloroethylene

DOE Office of Scientific and Technical Information (OSTI.GOV)

Curtin, D.P.

The process analyzed involves non-production, laboratory environment use of trichloroethylene for the cleaning of semiconductor devices. The option selection centered on the replacement of the trichloroethylene with a non-hazardous material. This process waste assessment was performed as part of a pilot project.

Performance issues for iterative solvers in device simulation

NASA Technical Reports Server (NTRS)

Fan, Qing; Forsyth, P. A.; Mcmacken, J. R. F.; Tang, Wei-Pai

1994-01-01

Due to memory limitations, iterative methods have become the method of choice for large scale semiconductor device simulation. However, it is well known that these methods still suffer from reliability problems. The linear systems which appear in numerical simulation of semiconductor devices are notoriously ill-conditioned. In order to produce robust algorithms for practical problems, careful attention must be given to many implementation issues. This paper concentrates on strategies for developing robust preconditioners. In addition, effective data structures and convergence check issues are also discussed. These algorithms are compared with a standard direct sparse matrix solver on a variety of problems.

Control of Spin Wave Dynamics in Spatially Twisted Magnetic Structures

DTIC Science & Technology

2017-06-27

realize high-performance spintronic and magnetic storage devices. 15. SUBJECT TERMS nano- electronics , spin, wave, magnetic, multi-functional, device 16... electronics has required us to develop high-performance and multi-functional electronic devices driven with extremely low power consumption...Spintronics”, simultaneously utilizing the charge and the spin of electrons , provides us with solutions to essential problems for semiconductor-based

Three-dimensional charge transport in organic semiconductor single crystals.

PubMed

He, Tao; Zhang, Xiying; Jia, Jiong; Li, Yexin; Tao, Xutang

2012-04-24

Three-dimensional charge transport anisotropy in organic semiconductor single crystals - both plates and rods (above and below, respectively, in the figure) - is measured in well-performing organic field-effect transistors for the first time. The results provide an excellent model for molecular design and device preparation that leads to good performance. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Multifunctional Self-Assembled Monolayers for Organic Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Cernetic, Nathan

Organic field effect transistors (OFETs) have the potential to reach commercialization for a wide variety of applications such as active matrix display circuitry, chemical and biological sensing, radio-frequency identification devices and flexible electronics. In order to be commercially competitive with already at-market amorphous silicon devices, OFETs need to approach similar performance levels. Significant progress has been made in developing high performance organic semiconductors and dielectric materials. Additionally, a common route to improve the performance metric of OFETs is via interface modification at the critical dielectric/semiconductor and electrode/semiconductor interface which often play a significant role in charge transport properties. These metal oxide interfaces are typically modified with rationally designed multifunctional self-assembled monolayers. As means toward improving the performance metrics of OFETs, rationally designed multifunctional self-assembled monolayers are used to explore the relationship between surface energy, SAM order, and SAM dipole on OFET performance. The studies presented within are (1) development of a multifunctional SAM capable of simultaneously modifying dielectric and metal surface while maintaining compatibility with solution processed techniques (2) exploration of the relationship between SAM dipole and anchor group on graphene transistors, and (3) development of self-assembled monolayer field-effect transistor in which the traditional thick organic semiconductor is replaced by a rationally designed self-assembled monolayer semiconductor. The findings presented within represent advancement in the understanding of the influence of self-assembled monolayers on OFETs as well as progress towards rationally designed monolayer transistors.

Review of betavoltaic energy conversion

NASA Astrophysics Data System (ADS)

Olsen, Larry C.

1993-05-01

Betavoltaic energy conversion refers to the generation of power by coupling a beta source to a semiconductor junction device. The theory of betavoltaic energy conversion and some past studies of the subject are briefly reviewed. Calculations of limiting efficiencies for semiconductor cells versus bandgap are presented along with specific studies for Pm-147 and Ni-63 fueled devices. The approach used for fabricating Pm-147 fueled batteries by the author in the early 1970's is reviewed. Finally, the potential performance of advanced betavoltaic power sources is considered.

Review of betavoltaic energy conversion

NASA Technical Reports Server (NTRS)

Olsen, Larry C.

1993-01-01

Betavoltaic energy conversion refers to the generation of power by coupling a beta source to a semiconductor junction device. The theory of betavoltaic energy conversion and some past studies of the subject are briefly reviewed. Calculations of limiting efficiencies for semiconductor cells versus bandgap are presented along with specific studies for Pm-147 and Ni-63 fueled devices. The approach used for fabricating Pm-147 fueled batteries by the author in the early 1970's is reviewed. Finally, the potential performance of advanced betavoltaic power sources is considered.

Analysis of field usage failure rate data for plastic encapsulated solid state devices

NASA Technical Reports Server (NTRS)

1981-01-01

Survey and questionnaire techniques were used to gather data from users and manufacturers on the failure rates in the field of plastic encapsulated semiconductors. It was found that such solid state devices are being successfully used by commercial companies which impose certain screening and qualification procedures. The reliability of these semiconductors is now adequate to support their consideration in NASA systems, particularly in low cost systems. The cost of performing necessary screening for NASA applications was assessed.

Advanced development of double-injection, deep-impurity semiconductor switches

NASA Technical Reports Server (NTRS)

Hanes, M. H.

1987-01-01

Deep-impurity, double-injection devices, commonly refered to as (DI) squared devices, represent a class of semiconductor switches possessing a very high degree of tolerance to electron and neutron irradiation and to elevated temperature operation. These properties have caused them to be considered as attractive candidates for space power applications. The design, fabrication, and testing of several varieties of (DI) squared devices intended for power switching are described. All of these designs were based upon gold-doped silicon material. Test results, along with results of computer simulations of device operation, other calculations based upon the assumed mode of operation of (DI) squared devices, and empirical information regarding power semiconductor device operation and limitations, have led to the conculsion that these devices are not well suited to high-power applications. When operated in power circuitry configurations, they exhibit high-power losses in both the off-state and on-state modes. These losses are caused by phenomena inherent to the physics and material of the devices and cannot be much reduced by device design optimizations. The (DI) squared technology may, however, find application in low-power functions such as sensing, logic, and memory, when tolerance to radiation and temperature are desirable (especially is device performance is improved by incorporation of deep-level impurities other than gold.

Testing methodologies and systems for semiconductor optical amplifiers

NASA Astrophysics Data System (ADS)

Wieckowski, Michael

Semiconductor optical amplifiers (SOA's) are gaining increased prominence in both optical communication systems and high-speed optical processing systems, due primarily to their unique nonlinear characteristics. This in turn, has raised questions regarding their lifetime performance reliability and has generated a demand for effective testing techniques. This is especially critical for industries utilizing SOA's as components for system-in-package products. It is important to note that very little research to date has been conducted in this area, even though production volume and market demand has continued to increase. In this thesis, the reliability of dilute-mode InP semiconductor optical amplifiers is studied experimentally and theoretically. The aging characteristics of the production level devices are demonstrated and the necessary techniques to accurately characterize them are presented. In addition, this work proposes a new methodology for characterizing the optical performance of these devices using measurements in the electrical domain. It is shown that optical performance degradation, specifically with respect to gain, can be directly qualified through measurements of electrical subthreshold differential resistance. This metric exhibits a linear proportionality to the defect concentration in the active region, and as such, can be used for prescreening devices before employing traditional optical testing methods. A complete theoretical analysis is developed in this work to explain this relationship based upon the device's current-voltage curve and its associated leakage and recombination currents. These results are then extended to realize new techniques for testing semiconductor optical amplifiers and other similarly structured devices. These techniques can be employed after fabrication and during packaged operation through the use of a proposed stand-alone testing system, or using a proposed integrated CMOS self-testing circuit. Both methods are capable of ascertaining SOA performance based solely on the subthreshold differential resistance signature, and are a first step toward the inevitable integration of self-testing circuits into complex optoelectronic systems.

Ultra-high heat flux cooling characteristics of cryogenic micro-solid nitrogen particles and its application to semiconductor wafer cleaning technology

NASA Astrophysics Data System (ADS)

Ishimoto, Jun; Oh, U.; Guanghan, Zhao; Koike, Tomoki; Ochiai, Naoya

2014-01-01

The ultra-high heat flux cooling characteristics and impingement behavior of cryogenic micro-solid nitrogen (SN2) particles in relation to a heated wafer substrate were investigated for application to next generation semiconductor wafer cleaning technology. The fundamental characteristics of cooling heat transfer and photoresist removal-cleaning performance using micro-solid nitrogen particulate spray impinging on a heated substrate were numerically investigated and experimentally measured by a new type of integrated computational-experimental technique. This study contributes not only advanced cryogenic cooling technology for high thermal emission devices, but also to the field of nano device engineering including the semiconductor wafer cleaning technology.

Operation and biasing for single device equivalent to CMOS

DOEpatents

Welch, James D.

2001-01-01

Disclosed are semiconductor devices including at least one junction which is rectifying whether the semiconductor is caused to be N or P-type, by the presence of field induced carriers. In particular, inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to conventional multiple device CMOS systems, which can be operated as modulators, are disclosed as are a non-latching SCR and an approach to blocking parasitic currents. Operation of the gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems under typical bias schemes is described, and simple demonstrative five mask fabrication procedures for the inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems are also presented.

Study of various n-type organic semiconductors on ultraviolet detective and electroluminescent properties of optoelectronic integrated device

NASA Astrophysics Data System (ADS)

Deng, Chaoxu; Shao, Bingyao; Zhao, Dan; Zhou, Dianli; Yu, Junsheng

2017-11-01

Organic optoelectronic integrated device (OID) with both ultraviolet (UV) detective and electroluminescent (EL) properties was fabricated by using a thermally activated delayed fluorescence (TADF) semiconductor of (4s, 6s)-2,4,5,6-tetra(9H-carbazol-9-yl)isophthalonitrile (4CzIPN) as an emitter. The effect of five kinds of n-type organic semiconductors (OSCs) on the enhancement of UV detective and EL properties of OID was systematically studied. The result shows that two orders of magnitude in UV detectivity from 109 to 1011 Jones and 3.3 folds of luminance from 2499 to 8233 cd m-2 could be achieved. The result shows that not only the difference of lowest unoccupied molecular orbital (LUMO) between active layer and OSC but also the variety of electron mobility have a significant effect on the UV detective and EL performance through adjusting electron injection/transport. Additionally, the optimized OSC thickness is beneficial to confine the leaking of holes from the active layer to cathode, leading to the decrease of dark current for high detective performance. This work provides a useful method on broadening OSC material selection and device architecture construction for the realization of high performance OID.

Design of Contact Electrodes for Semiconductor Nanowire Solar Energy Harvesting Devices.

PubMed

Lin, Tzuging; Ramadurgam, Sarath; Yang, Chen

2017-04-12

Transparent, low-resistive contacts are critical for efficient solar energy harvesting devices. It is important to reconsider the material choices and electrode design as devices move from 2D films to 1D nanostructures. In this paper, we study the effectiveness of indium tin oxide (ITO) and metals, such as Ag and Cu, as contacts in 2D and 1D systems. Although ITO has been studied extensively and developed into an effective transparent contact for 2D devices, our results show that effectiveness does not translate to 1D systems. Particularly with consideration of resistance requirement, nanowires with metal shells as contacts enable better absorption within the semiconductor as compared to ITO. Furthermore, there is a strong dependence of contact performance on the semiconductor band gap and diameter of nanowires. We found that metal contacts outperform ITO for nanowire devices, regardless of the sheet resistance constraint, in the regime of diameters less than 100 nm and band-gaps greater than 1 eV. These metal shells optimized for best absorption are significantly thinner than ITO, which enables for the design of devices with high nanowire number density and consequently higher device efficiencies.

Functionalized organic semiconductor molecules to enhance charge carrier injection in electroluminescent cell

NASA Astrophysics Data System (ADS)

Yalcin, Eyyup; Kara, Duygu Akin; Karakaya, Caner; Yigit, Mesude Zeliha; Havare, Ali Kemal; Can, Mustafa; Tozlu, Cem; Demic, Serafettin; Kus, Mahmut; Aboulouard, Abdelkhalk

2017-07-01

Organic semiconductor (OSC) materials as a charge carrier interface play an important role to improve the device performance of organic electroluminescent cells. In this study, 4,4″-bis(diphenyl amino)-1,1':3‧,1″-terphenyl-5'-carboxylic acid (TPA) and 4,4″-di-9H-carbazol-9-yl-1,1':3‧,1″-terphenyl-5'-carboxylic acid (CAR) has been designed and synthesized to modify indium tin oxide (ITO) layer as interface. Bare ITO and PEDOT:PSS coated on ITO was used as reference anode electrodes for comparison. Furthermore, PEDOT:PSS coated over CAR/ITO and TPA/ITO to observe stability of OSC molecules and to completely cover the ITO surface. Electrical, optical and surface characterizations were performed for each device. Almost all modified devices showed around 36% decrease at the turn on voltage with respect to bare ITO. The current density of bare ITO, ITO/CAR and ITO/TPA were measured as 288, 1525 and 1869 A/m2, respectively. By increasing current density, luminance of modified devices showed much better performance with respect to unmodified devices.

Performance of an MPI-only semiconductor device simulator on a quad socket/quad core InfiniBand platform.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shadid, John Nicolas; Lin, Paul Tinphone

2009-01-01

This preliminary study considers the scaling and performance of a finite element (FE) semiconductor device simulator on a capacity cluster with 272 compute nodes based on a homogeneous multicore node architecture utilizing 16 cores. The inter-node communication backbone for this Tri-Lab Linux Capacity Cluster (TLCC) machine is comprised of an InfiniBand interconnect. The nonuniform memory access (NUMA) nodes consist of 2.2 GHz quad socket/quad core AMD Opteron processors. The performance results for this study are obtained with a FE semiconductor device simulation code (Charon) that is based on a fully-coupled Newton-Krylov solver with domain decomposition and multilevel preconditioners. Scaling andmore » multicore performance results are presented for large-scale problems of 100+ million unknowns on up to 4096 cores. A parallel scaling comparison is also presented with the Cray XT3/4 Red Storm capability platform. The results indicate that an MPI-only programming model for utilizing the multicore nodes is reasonably efficient on all 16 cores per compute node. However, the results also indicated that the multilevel preconditioner, which is critical for large-scale capability type simulations, scales better on the Red Storm machine than the TLCC machine.« less

A microprocessor based on a two-dimensional semiconductor.

PubMed

Wachter, Stefan; Polyushkin, Dmitry K; Bethge, Ole; Mueller, Thomas

2017-04-11

The advent of microcomputers in the 1970s has dramatically changed our society. Since then, microprocessors have been made almost exclusively from silicon, but the ever-increasing demand for higher integration density and speed, lower power consumption and better integrability with everyday goods has prompted the search for alternatives. Germanium and III-V compound semiconductors are being considered promising candidates for future high-performance processor generations and chips based on thin-film plastic technology or carbon nanotubes could allow for embedding electronic intelligence into arbitrary objects for the Internet-of-Things. Here, we present a 1-bit implementation of a microprocessor using a two-dimensional semiconductor-molybdenum disulfide. The device can execute user-defined programs stored in an external memory, perform logical operations and communicate with its periphery. Our 1-bit design is readily scalable to multi-bit data. The device consists of 115 transistors and constitutes the most complex circuitry so far made from a two-dimensional material.

A microprocessor based on a two-dimensional semiconductor

NASA Astrophysics Data System (ADS)

Wachter, Stefan; Polyushkin, Dmitry K.; Bethge, Ole; Mueller, Thomas

2017-04-01

The advent of microcomputers in the 1970s has dramatically changed our society. Since then, microprocessors have been made almost exclusively from silicon, but the ever-increasing demand for higher integration density and speed, lower power consumption and better integrability with everyday goods has prompted the search for alternatives. Germanium and III-V compound semiconductors are being considered promising candidates for future high-performance processor generations and chips based on thin-film plastic technology or carbon nanotubes could allow for embedding electronic intelligence into arbitrary objects for the Internet-of-Things. Here, we present a 1-bit implementation of a microprocessor using a two-dimensional semiconductor--molybdenum disulfide. The device can execute user-defined programs stored in an external memory, perform logical operations and communicate with its periphery. Our 1-bit design is readily scalable to multi-bit data. The device consists of 115 transistors and constitutes the most complex circuitry so far made from a two-dimensional material.

Intermediate-band photosensitive device with quantum dots embedded in energy fence barrier

DOEpatents

Forrest, Stephen R.; Wei, Guodan

2010-07-06

A plurality of layers of a first semiconductor material and a plurality of dots-in-a-fence barriers disposed in a stack between a first electrode and a second electrode. Each dots-in-a-fence barrier consists essentially of a plurality of quantum dots of a second semiconductor material embedded between and in direct contact with two layers of a third semiconductor material. Wave functions of the quantum dots overlap as at least one intermediate band. The layers of the third semiconductor material are arranged as tunneling barriers to require a first electron and/or a first hole in a layer of the first material to perform quantum mechanical tunneling to reach the second material within a respective quantum dot, and to require a second electron and/or a second hole in a layer of the first semiconductor material to perform quantum mechanical tunneling to reach another layer of the first semiconductor material.

Electronic Raman scattering as an ultra-sensitive probe of strain effects in semiconductors.

PubMed

Fluegel, Brian; Mialitsin, Aleksej V; Beaton, Daniel A; Reno, John L; Mascarenhas, Angelo

2015-05-28

Semiconductor strain engineering has become a critical feature of high-performance electronics because of the significant device performance enhancements that it enables. These improvements, which emerge from strain-induced modifications to the electronic band structure, necessitate new ultra-sensitive tools to probe the strain in semiconductors. Here, we demonstrate that minute amounts of strain in thin semiconductor epilayers can be measured using electronic Raman scattering. We applied this strain measurement technique to two different semiconductor alloy systems using coherently strained epitaxial thin films specifically designed to produce lattice-mismatch strains as small as 10(-4). Comparing our strain sensitivity and signal strength in Al(x)Ga(1-x)As with those obtained using the industry-standard technique of phonon Raman scattering, we found that there was a sensitivity improvement of 200-fold and a signal enhancement of 4 × 10(3), thus obviating key constraints in semiconductor strain metrology.

Electronic Raman scattering as an ultra-sensitive probe of strain effects in semiconductors

PubMed Central

Fluegel, Brian; Mialitsin, Aleksej V.; Beaton, Daniel A.; Reno, John L.; Mascarenhas, Angelo

2015-01-01

Semiconductor strain engineering has become a critical feature of high-performance electronics because of the significant device performance enhancements that it enables. These improvements, which emerge from strain-induced modifications to the electronic band structure, necessitate new ultra-sensitive tools to probe the strain in semiconductors. Here, we demonstrate that minute amounts of strain in thin semiconductor epilayers can be measured using electronic Raman scattering. We applied this strain measurement technique to two different semiconductor alloy systems using coherently strained epitaxial thin films specifically designed to produce lattice-mismatch strains as small as 10−4. Comparing our strain sensitivity and signal strength in AlxGa1−xAs with those obtained using the industry-standard technique of phonon Raman scattering, we found that there was a sensitivity improvement of 200-fold and a signal enhancement of 4 × 103, thus obviating key constraints in semiconductor strain metrology. PMID:26017853

Magnetic-field-controlled reconfigurable semiconductor logic.

PubMed

Joo, Sungjung; Kim, Taeyueb; Shin, Sang Hoon; Lim, Ju Young; Hong, Jinki; Song, Jin Dong; Chang, Joonyeon; Lee, Hyun-Woo; Rhie, Kungwon; Han, Suk Hee; Shin, Kyung-Ho; Johnson, Mark

2013-02-07

Logic devices based on magnetism show promise for increasing computational efficiency while decreasing consumed power. They offer zero quiescent power and yet combine novel functions such as programmable logic operation and non-volatile built-in memory. However, practical efforts to adapt a magnetic device to logic suffer from a low signal-to-noise ratio and other performance attributes that are not adequate for logic gates. Rather than exploiting magnetoresistive effects that result from spin-dependent transport of carriers, we have approached the development of a magnetic logic device in a different way: we use the phenomenon of large magnetoresistance found in non-magnetic semiconductors in high electric fields. Here we report a device showing a strong diode characteristic that is highly sensitive to both the sign and the magnitude of an external magnetic field, offering a reversible change between two different characteristic states by the application of a magnetic field. This feature results from magnetic control of carrier generation and recombination in an InSb p-n bilayer channel. Simple circuits combining such elementary devices are fabricated and tested, and Boolean logic functions including AND, OR, NAND and NOR are performed. They are programmed dynamically by external electric or magnetic signals, demonstrating magnetic-field-controlled semiconductor reconfigurable logic at room temperature. This magnetic technology permits a new kind of spintronic device, characterized as a current switch rather than a voltage switch, and provides a simple and compact platform for non-volatile reconfigurable logic devices.

Optically switched graphene/4H-SiC junction bipolar transistor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chandrashekhar, MVS; Sudarshan, Tangali S.; Omar, Sabih U.

A bi-polar device is provided, along with methods of making the same. The bi-polar device can include a semiconductor substrate doped with a first dopant, a semiconductor layer on the first surface of the semiconductor substrate, and a Schottky barrier layer on the semiconductor layer. The method of forming a bi-polar device can include: forming a semiconductor layer on a first surface of a semiconductor substrate, where the semiconductor substrate comprises a first dopant and where the semiconductor layer comprises a second dopant that has an opposite polarity than the first dopant; and forming a Schottky barrier layer on amore » first portion of the semiconductor layer while leaving a second portion of the semiconductor layer exposed.« less

Ionic behavior of organic-inorganic metal halide perovskite based metal-oxide-semiconductor capacitors.

PubMed

Wang, Yucheng; Zhang, Yuming; Pang, Tiqiang; Xu, Jie; Hu, Ziyang; Zhu, Yuejin; Tang, Xiaoyan; Luan, Suzhen; Jia, Renxu

2017-05-24

Organic-inorganic metal halide perovskites are promising semiconductors for optoelectronic applications. Despite the achievements in device performance, the electrical properties of perovskites have stagnated. Ion migration is speculated to be the main contributing factor for the many unusual electrical phenomena in perovskite-based devices. Here, to understand the intrinsic electrical behavior of perovskites, we constructed metal-oxide-semiconductor (MOS) capacitors based on perovskite films and performed capacitance-voltage (C-V) and current-voltage (I-V) measurements of the capacitors. The results provide direct evidence for the mixed ionic-electronic transport behavior within perovskite films. In the dark, there is electrical hysteresis in both the C-V and I-V curves because the mobile negative ions take part in charge transport despite frequency modulation. However, under illumination, the large amount of photoexcited free carriers screens the influence of the mobile ions with a low concentration, which is responsible for the normal C-V properties. Validation of ion migration for the gate-control ability of MOS capacitors is also helpful for the investigation of perovskite MOS transistors and other gate-control photovoltaic devices.

Highly Crystalline C8-BTBT Thin-Film Transistors by Lateral Homo-Epitaxial Growth on Printed Templates.

PubMed

Janneck, Robby; Pilet, Nicolas; Bommanaboyena, Satya Prakash; Watts, Benjamin; Heremans, Paul; Genoe, Jan; Rolin, Cedric

2017-11-01

Highly crystalline thin films of organic semiconductors offer great potential for fundamental material studies as well as for realizing high-performance, low-cost flexible electronics. The fabrication of these films directly on inert substrates is typically done by meniscus-guided coating techniques. The resulting layers show morphological defects that hinder charge transport and induce large device-to-device variability. Here, a double-step method for organic semiconductor layers combining a solution-processed templating layer and a lateral homo-epitaxial growth by a thermal evaporation step is reported. The epitaxial regrowth repairs most of the morphological defects inherent to meniscus-guided coatings. The resulting film is highly crystalline and features a mobility increased by a factor of three and a relative spread in device characteristics improved by almost half an order of magnitude. This method is easily adaptable to other coating techniques and offers a route toward the fabrication of high-performance, large-area electronics based on highly crystalline thin films of organic semiconductors. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

SiC Technology

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.

1998-01-01

Silicon carbide (SiC)-based semiconductor electronic devices and circuits are presently being developed for use in high-temperature, high-power, and/or high-radiation conditions under which conventional semiconductors cannot adequately perform. Silicon carbide's ability to function under such extreme conditions is expected to enable significant improvements to a far-ranging variety of applications and systems. These range from greatly improved high-voltage switching [1- 4] for energy savings in public electric power distribution and electric motor drives to more powerful microwave electronics for radar and communications [5-7] to sensors and controls for cleaner-burning more fuel-efficient jet aircraft and automobile engines. In the particular area of power devices, theoretical appraisals have indicated that SiC power MOSFET's and diode rectifiers would operate over higher voltage and temperature ranges, have superior switching characteristics, and yet have die sizes nearly 20 times smaller than correspondingly rated silicon-based devices [8]. However, these tremendous theoretical advantages have yet to be realized in experimental SiC devices, primarily due to the fact that SiC's relatively immature crystal growth and device fabrication technologies are not yet sufficiently developed to the degree required for reliable incorporation into most electronic systems [9]. This chapter briefly surveys the SiC semiconductor electronics technology. In particular, the differences (both good and bad) between SiC electronics technology and well-known silicon VLSI technology are highlighted. Projected performance benefits of SiC electronics are highlighted for several large-scale applications. Key crystal growth and device-fabrication issues that presently limit the performance and capability of high temperature and/or high power SiC electronics are identified.

Silicon Carbide Technology

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.

2006-01-01

Silicon carbide based semiconductor electronic devices and circuits are presently being developed for use in high-temperature, high-power, and high-radiation conditions under which conventional semiconductors cannot adequately perform. Silicon carbide's ability to function under such extreme conditions is expected to enable significant improvements to a far-ranging variety of applications and systems. These range from greatly improved high-voltage switching for energy savings in public electric power distribution and electric motor drives to more powerful microwave electronics for radar and communications to sensors and controls for cleaner-burning more fuel-efficient jet aircraft and automobile engines. In the particular area of power devices, theoretical appraisals have indicated that SiC power MOSFET's and diode rectifiers would operate over higher voltage and temperature ranges, have superior switching characteristics, and yet have die sizes nearly 20 times smaller than correspondingly rated silicon-based devices [8]. However, these tremendous theoretical advantages have yet to be widely realized in commercially available SiC devices, primarily owing to the fact that SiC's relatively immature crystal growth and device fabrication technologies are not yet sufficiently developed to the degree required for reliable incorporation into most electronic systems. This chapter briefly surveys the SiC semiconductor electronics technology. In particular, the differences (both good and bad) between SiC electronics technology and the well-known silicon VLSI technology are highlighted. Projected performance benefits of SiC electronics are highlighted for several large-scale applications. Key crystal growth and device-fabrication issues that presently limit the performance and capability of high-temperature and high-power SiC electronics are identified.

Environmentally benign semiconductor processing for dielectric etch

NASA Astrophysics Data System (ADS)

Liao, Marci Yi-Ting

Semiconductor processing requires intensive usage of chemicals, electricity, and water. Such intensive resource usage leaves a large impact on the environment. For instance, in Silicon Valley, the semiconductor industry is responsible for 80% of the hazardous waste sites contaminated enough to require government assistance. Research on environmentally benign semiconductor processing is needed to reduce the environmental impact of the semiconductor industry. The focus of this dissertation is on the environmental impact of one aspect of semiconductor processing: patterning of dielectric materials. Plasma etching of silicon dioxide emits perfluorocarbons (PFCs) gases, like C2F6 and CF4, into the atmosphere. These gases are super global warming/greenhouse gases because of their extremely long atmospheric lifetimes and excellent infrared absorption properties. We developed the first inductively coupled plasma (ICP) abatement device for destroying PFCs downstream of a plasma etcher. Destruction efficiencies of 99% and 94% can be obtained for the above mentioned PFCs, by using O 2 as an additive gas. Our results have lead to extensive modeling in academia as well as commercialization of the ICP abatement system. Dielectric patterning of hi-k materials for future device technology brings different environment challenges. The uncertainty of the hi-k material selection and the patterning method need to be addressed. We have evaluated the environmental impact of three different dielectric patterning methods (plasma etch, wet etch and chemical-mechanical polishing), as well as, the transistor device performances associated with the patterning methods. Plasma etching was found to be the most environmentally benign patterning method, which also gives the best device performance. However, the environmental concern for plasma etching is the possibility of cross-contamination from low volatility etch by-products. Therefore, mass transfer in a plasma etcher for a promising hi-k dielectric material, ZrO2, was studied. A novel cross-contamination sampling technique was developed, along with a mass transfer model.

Epitaxy of semiconductor-superconductor nanowires

NASA Astrophysics Data System (ADS)

Krogstrup, P.; Ziino, N. L. B.; Chang, W.; Albrecht, S. M.; Madsen, M. H.; Johnson, E.; Nygård, J.; Marcus, C. M.; Jespersen, T. S.

2015-04-01

Controlling the properties of semiconductor/metal interfaces is a powerful method for designing functionality and improving the performance of electrical devices. Recently semiconductor/superconductor hybrids have appeared as an important example where the atomic scale uniformity of the interface plays a key role in determining the quality of the induced superconducting gap. Here we present epitaxial growth of semiconductor-metal core-shell nanowires by molecular beam epitaxy, a method that provides a conceptually new route to controlled electrical contacting of nanostructures and the design of devices for specialized applications such as topological and gate-controlled superconducting electronics. Our materials of choice, InAs/Al grown with epitaxially matched single-plane interfaces, and alternative semiconductor/metal combinations allowing epitaxial interface matching in nanowires are discussed. We formulate the grain growth kinetics of the metal phase in general terms of continuum parameters and bicrystal symmetries. The method realizes the ultimate limit of uniform interfaces and seems to solve the soft-gap problem in superconducting hybrid structures.

Plastic Deformation as a Means to Achieve Stretchable Polymer Semiconductors

NASA Astrophysics Data System (ADS)

O'Connor, Brendan

Developing intrinsically stretchable semiconductors will seamlessly transition traditional devices into a stretchable platform. Polymer semiconductors are inherently soft materials due to the weak van der Waal intermolecular bonding allowing for flexible devices. However, these materials are not typically stretchable and when large strains are applied they either crack or plastically deform. Here, we study the use of repeated plastic deformation as a means of achieving stretchable films. In this talk, critical aspects of polymer semiconductor material selection, morphology and interface properties will be discussed that enable this approach of achieving stretchable films. We show that one can employ high performance donor-acceptor polymer semiconductors that are typically brittle through proper polymer blending to significantly increase ductility to achieve stretchable films. We demonstrate a polymer blend film that can be repeatedly deformed over 65%, while maintaining charge mobility consistently above 0.15 cm2/Vs. During the stretching process we show that the films follow a well-controlled repeated deformation pattern for over 100 stretching cycles.

High performance low voltage organic field effect transistors on plastic substrate for amplifier circuits

NASA Astrophysics Data System (ADS)

Houin, G.; Duez, F.; Garcia, L.; Cantatore, E.; Torricelli, F.; Hirsch, L.; Belot, D.; Pellet, C.; Abbas, M.

2016-09-01

The high performance air stable organic semiconductor small molecule dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT) was chosen as active layer for field effect transistors built to realize flexible amplifier circuits. Initial device on rigid Si/SiO2 substrate showed appreciable performance with hysteresis-free characteristics. A number of approaches were applied to simplify the process, improve device performance and decrease the operating voltage: they include an oxide interfacial layer to decrease contact resistance; a polymer passivation layer to optimize semiconductor/dielectric interface and an anodized high-k oxide as dielectric layer for low voltage operation. The devices fabricated on plastic substrate yielded excellent electrical characteristics, showing mobility of 1.6 cm2/Vs, lack of hysteresis, operation below 5 V and on/off current ratio above 105. An OFET model based on variable ranging hopping theory was used to extract the relevant parameters from the transfer and output characteristics, which enabled us to simulate our devices achieving reasonable agreement with the measurements

Reproducible Growth of High-Quality Cubic-SiC Layers

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Powell, J. Anthony

2004-01-01

Semiconductor electronic devices and circuits based on silicon carbide (SiC) are being developed for use in high-temperature, high-power, and/or high-radiation conditions under which devices made from conventional semiconductors cannot adequately perform. The ability of SiC-based devices to function under such extreme conditions is expected to enable significant improvements in a variety of applications and systems. These include greatly improved high-voltage switching for saving energy in public electric power distribution and electric motor drives; more powerful microwave electronic circuits for radar and communications; and sensors and controls for cleaner-burning, more fuel-efficient jet aircraft and automobile engines.

Room temperature triplet state spectroscopy of organic semiconductors.

PubMed

Reineke, Sebastian; Baldo, Marc A

2014-01-21

Organic light-emitting devices and solar cells are devices that create, manipulate, and convert excited states in organic semiconductors. It is crucial to characterize these excited states, or excitons, to optimize device performance in applications like displays and solar energy harvesting. This is complicated if the excited state is a triplet because the electronic transition is 'dark' with a vanishing oscillator strength. As a consequence, triplet state spectroscopy must usually be performed at cryogenic temperatures to reduce competition from non-radiative rates. Here, we control non-radiative rates by engineering a solid-state host matrix containing the target molecule, allowing the observation of phosphorescence at room temperature and alleviating constraints of cryogenic experiments. We test these techniques on a wide range of materials with functionalities spanning multi-exciton generation (singlet exciton fission), organic light emitting device host materials, and thermally activated delayed fluorescence type emitters. Control of non-radiative modes in the matrix surrounding a target molecule may also have broader applications in light-emitting and photovoltaic devices.

Efficient Suppression of Defects and Charge Trapping in High Density In-Sn-Zn-O Thin Film Transistor Prepared using Microwave-Assisted Sputter.

PubMed

Goh, Youngin; Ahn, Jaehan; Lee, Jeong Rak; Park, Wan Woo; Ko Park, Sang-Hee; Jeon, Sanghun

2017-10-25

Amorphous oxide semiconductor-based thin film transistors (TFTs) have been considered as excellent switching elements for driving active-matrix organic light-emitting diodes (AMOLED) owing to their high mobility and process compatibility. However, oxide semiconductors have inherent defects, causing fast transient charge trapping and device instability. For the next-generation displays such as flexible, wearable, or transparent displays, an active semiconductor layer with ultrahigh mobility and high reliability at low deposition temperature is required. Therefore, we introduced high density plasma microwave-assisted (MWA) sputtering method as a promising deposition tool for the formation of high density and high-performance oxide semiconductor films. In this paper, we present the effect of the MWA sputtering method on the defects and fast charge trapping in In-Sn-Zn-O (ITZO) TFTs using various AC device characterization methodologies including fast I-V, pulsed I-V, transient current, low frequency noise, and discharge current analysis. Using these methods, we were able to analyze the charge trapping mechanism and intrinsic electrical characteristics, and extract the subgap density of the states of oxide TFTs quantitatively. In comparison to conventional sputtered ITZO, high density plasma MWA-sputtered ITZO exhibits outstanding electrical performance, negligible charge trapping characteristics and low subgap density of states. High-density plasma MWA sputtering method has high deposition rate even at low working pressure and control the ion bombardment energy, resulting in forming low defect generation in ITZO and presenting high performance ITZO TFT. We expect the proposed high density plasma sputtering method to be applicable to a wide range of oxide semiconductor device applications.

Three- and Two-Dimensional Tin and Lead Halide Perovskite Semiconductors: Synthesis and Application in Photovoltaics

NASA Astrophysics Data System (ADS)

Cao, Duyen Hanh

Halide perovskites, AMX3 (A = monocation, B = Ge, Sn, or Pb, and X = halogen), present a versatile class of solution-processable semiconductors made from earth abundant materials with outstanding electrical and optical properties. Their solar cell efficiencies have dramatically increased from 9% to 22% in less than five years since 2012, a rate that has never been seen before in photovoltaic research. Critical to the final goal of commercializing perovskite solar cell technology is achieving device long-term stability and eliminating toxic elements in device components. This thesis uses 3D AMX 3 perovskites as a stand-in to develop a new class of lead-free, moisture stable, functional and highly tunable 2D Ruddlesden-Popper (BA) 2(MA)n-1SnnI3n+1 (n is an integer) perovskite semiconductors. Synthesis, thin film fabrication, extensive characterization, and solar cell device structure-performance relationships are presented throughout the entire thesis.

Monolithic integration of GaN-based light-emitting diodes and metal-oxide-semiconductor field-effect transistors.

PubMed

Lee, Ya-Ju; Yang, Zu-Po; Chen, Pin-Guang; Hsieh, Yung-An; Yao, Yung-Chi; Liao, Ming-Han; Lee, Min-Hung; Wang, Mei-Tan; Hwang, Jung-Min

2014-10-20

In this study, we report a novel monolithically integrated GaN-based light-emitting diode (LED) with metal-oxide-semiconductor field-effect transistor (MOSFET). Without additionally introducing complicated epitaxial structures for transistors, the MOSFET is directly fabricated on the exposed n-type GaN layer of the LED after dry etching, and serially connected to the LED through standard semiconductor-manufacturing technologies. Such monolithically integrated LED/MOSFET device is able to circumvent undesirable issues that might be faced by other kinds of integration schemes by growing a transistor on an LED or vice versa. For the performances of resulting device, our monolithically integrated LED/MOSFET device exhibits good characteristics in the modulation of gate voltage and good capability of driving injected current, which are essential for the important applications such as smart lighting, interconnection, and optical communication.

Growth and device processing of hexagonal boron nitride epilayers for thermal neutron and deep ultraviolet detectors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Doan, T. C.; Li, J.; Lin, J. Y.

2016-07-15

Solid-state neutron detectors with high performance are highly sought after for the detection of fissile materials. However, direct-conversion neutron detectors based on semiconductors with a measureable efficiency have not been realized. We report here the first successful demonstration of a direct-conversion semiconductor neutron detector with an overall detection efficiency for thermal neutrons of 4% and a charge collection efficiency as high as 83%. The detector is based on a 2.7 μm thick {sup 10}B-enriched hexagonal boron nitride (h-BN) epitaxial layer. The results represent a significant step towards the realization of practical neutron detectors based on h-BN epilayers. Neutron detectors basedmore » on h-BN are expected to possess all the advantages of semiconductor devices including wafer-scale processing, compact size, light weight, and ability to integrate with other functional devices.« less

Plasma Properties of an Exploding Semiconductor Igniter

NASA Astrophysics Data System (ADS)

McGuirk, J. S.; Thomas, K. A.; Shaffer, E.; Malone, A. L.; Baginski, T.; Baginski, M. E.

1997-11-01

Requirements by the automotive industry for low-cost, pyrotechnic igniters for automotive airbags have led to the development of several semiconductor devices. The properties of the plasma produced by the vaporization of an exploding semiconductor are necessary in order to minimize the electrical energy requirements. This work considers two silicon-based semiconductor devices: the semiconductor bridge (SCB) and the semiconductor junction igniter both consisting of etched silicon with vapor deposited aluminum structures. Electrical current passing through the device heats a narrow junction region to the point of vaporization creating an aluminum and silicon low-temperature plasma. This work will investigate the electrical characteristics of both devices and infer the plasma properties. Furthermore optical spectral measurements will be taken of the exploding devices to estimate the temperature and density of the plasma.

Ionic Liquid Activation of Amorphous Metal-Oxide Semiconductors for Flexible Transparent Electronic Devices

DOE PAGES

Pudasaini, Pushpa Raj; Noh, Joo Hyon; Wong, Anthony T.; ...

2016-02-09

To begin this abstract, amorphous metal-oxide semiconductors offer the high carrier mobilities and excellent large-area uniformity required for high performance, transparent, flexible electronic devices; however, a critical bottleneck to their widespread implementation is the need to activate these materials at high temperatures which are not compatible with flexible polymer substrates. The highly controllable activation of amorphous indium gallium zinc oxide semiconductor channels using ionic liquid gating at room temperature is reported. Activation is controlled by electric field-induced oxygen migration across the ionic liquid-semiconductor interface. In addition to activation of unannealed devices, it is shown that threshold voltages of a transistormore » can be linearly tuned between the enhancement and depletion modes. Finally, the first ever example of transparent flexible thin film metal oxide transistor on a polyamide substrate created using this simple technique is demonstrated. Finally, this study demonstrates the potential of field-induced activation as a promising alternative to traditional postdeposition thermal annealing which opens the door to wide scale implementation into flexible electronic applications.« less

Gate tunneling current and quantum capacitance in metal-oxide-semiconductor devices with graphene gate electrodes

NASA Astrophysics Data System (ADS)

An, Yanbin; Shekhawat, Aniruddh; Behnam, Ashkan; Pop, Eric; Ural, Ant

2016-11-01

Metal-oxide-semiconductor (MOS) devices with graphene as the metal gate electrode, silicon dioxide with thicknesses ranging from 5 to 20 nm as the dielectric, and p-type silicon as the semiconductor are fabricated and characterized. It is found that Fowler-Nordheim (F-N) tunneling dominates the gate tunneling current in these devices for oxide thicknesses of 10 nm and larger, whereas for devices with 5 nm oxide, direct tunneling starts to play a role in determining the total gate current. Furthermore, the temperature dependences of the F-N tunneling current for the 10 nm devices are characterized in the temperature range 77-300 K. The F-N coefficients and the effective tunneling barrier height are extracted as a function of temperature. It is found that the effective barrier height decreases with increasing temperature, which is in agreement with the results previously reported for conventional MOS devices with polysilicon or metal gate electrodes. In addition, high frequency capacitance-voltage measurements of these MOS devices are performed, which depict a local capacitance minimum under accumulation for thin oxides. By analyzing the data using numerical calculations based on the modified density of states of graphene in the presence of charged impurities, it is shown that this local minimum is due to the contribution of the quantum capacitance of graphene. Finally, the workfunction of the graphene gate electrode is extracted by determining the flat-band voltage as a function of oxide thickness. These results show that graphene is a promising candidate as the gate electrode in metal-oxide-semiconductor devices.

SLS complementary logic devices with increase carrier mobility

DOEpatents

Chaffin, R.J.; Osbourn, G.C.; Zipperian, T.E.

1991-07-09

In an electronic device comprising a semiconductor material and having at least one performance characteristic which is limited by the mobility of holes in the semiconductor material, said mobility being limited because of a valence band degeneracy among high-mobility and low-mobility energy levels accessible to said holes at the energy-momentum space maximum, an improvement is provided wherein the semiconductor material is a strained layer superlattice (SLS) whose layer compositions and layer thicknesses are selected so that the strain on the layers predominantly containing said at least one carrier type splits said degeneracy and modifies said energy levels around said energy-momentum space maximum in a manner whereby said limitation on the mobility of said holes is alleviated. 5 figures.

SLS complementary logic devices with increase carrier mobility

DOEpatents

Chaffin, Roger J.; Osbourn, Gordon C.; Zipperian, Thomas E.

1991-01-01

In an electronic device comprising a semiconductor material and having at least one performance characteristic which is limited by the mobility of holes in the semiconductor material, said mobility being limited because of a valence band degeneracy among high-mobility and low-mobility energy levels accessible to said holes at the energy-momentum space maximum, an improvement is provided wherein the semiconductor material is a strained layer superlattice (SLS) whose layer compositions and layer thicknesses are selected so that the strain on the layers predominantly containing said at least one carrier type splits said degeneracy and modifies said energy levels around said energy-momentum space maximum in a manner whereby said limitation on the mobility of said holes is alleviated.

BNLs Synchrotron-radiation Research Hub for Characterizing Detection Materials and Devices for the NA-22 Community

DOE Office of Scientific and Technical Information (OSTI.GOV)

Camarda, G. S.; Bolotnikov, A. E.; Cui, Y.

The goal of this project is to obtain and characterize scintillators, emerging- and commercial-compoundsemiconductor radiation- detection materials and devices provided by vendors and research organizations. The focus of our proposed research is to clarify the role of the deleterious defects and impurities responsible for the detectors' non-uniformity in scintillating crystals, commercial semiconductor radiation-detector materials, and in emerging R&D ones. Some benefits of this project addresses the need for fabricating high-performance scintillators and compound-semiconductor radiation-detectors with the proven potential for large-scale manufacturing. The findings help researchers to resolve the problems of non-uniformities in scintillating crystals, commercial semiconductor radiation-detector materials, and inmore » emerging R&D ones.« less

Electrical characterization of organic thin film transistors and alternative device architectures

NASA Astrophysics Data System (ADS)

Newman, Christopher R.

In the last 10--15 years, organic semiconductors have evolved from experimental curiosities into viable alternatives for practical applications involving large-area and low-cost electronics such as display backplanes, electronic paper, radio frequency identification (RFID) tags, and solar cells. Many of the initially-stated goals in this field have been achieved; organic semconductors have demonstrated performance comparable to or greater than amorphous silicon (a-Si), the entrenched technology for most of the applications listed above. At present, the major obstacles remaining to commercialization of devices based on organic semiconductors involve material stability, processing considerations and optimization of the other device components (e.g. metal contacts and dielectric materials). Despite these technical achievements, significant gaps remain in our understanding of the underlying transport physics in these devices. This thesis summarizes experiments performed on organic field-effect transistors (OFETs) in an attempt to address some of these knowledge gaps. The FET, in addition to being a very useful device for practical applications (such as the driving elements in pixel backplanes), is also a very flexible architecture from an experimental standpoint. The presence of a capacitively-coupled gate electrode allows the investigation of transport physics as a function of carrier concentration. For devices in which non-idealities (i.e. carrier traps) largely dictate the observed characteristics, this is a very useful feature. Although practical OFETs are fabricated as conventional single-gate structures on an organic thin film (OTFTs), more exotic structures can often provide insights that standard OTFTs cannot. Specifically, single-crystal OFETs allow the investigation of carrier transport in the absence of grain boundaries, and double-gated OTFTs facilitate the investigation and comparison of properties across two discrete interfaces. One of the remaining challenges in terms of achieving stability inorganic semiconductors involves understanding, and hopefully minimizing, the bias stress effect of operating OTFTs. Largely ignored during the years in which research groups sought to optimize the standard device metrics of field-effect mobility, current on/off ratio, and threshold voltage, operational stability is emerging as a dominant consideration in these materials. Experiments performed with the goal of quantifying and understanding the bias-stress effect in organic semiconductors are described at the end of this thesis.

Tuning the Performance of Organic Spintronic Devices Using X-Ray Generated Traps

DTIC Science & Technology

2012-08-16

observed in organic devices using the same organic semiconductor, namely tris(8-hydroxyquinoli- nato)aluminium ( Alq3 ) [5,15]. Here we will show that the...manufacturing steps were carried out in a deposition chamber located inside a nitrogen glovebox. Next, the organic layer Alq3 (70 to 100 nm) followed by the...As the organic semiconductor spacer layer, the Alq3 layer was fabricated by thermal evaporation in a vacuum of 10Ś mbar at a rate of 0:1 nm=s. The Fe

Sensor development at the semiconductor laboratory of the Max-Planck-Society

NASA Astrophysics Data System (ADS)

Bähr, A.; Lechner, P.; Ninkovic, J.

2017-12-01

For more than twenty years the semiconductor laboratory of the Max-Planck Society (MPG-HLL) is developing high-performing, specialised, scientific silicon sensors including the integration of amplifying electronics on the sensor chip. This paper summarises the actual status of these devices like pnCCDs and DePFET Active Pixel Sensors and their applications.

Efficient semiconductor light-emitting device and method

DOEpatents

Choquette, Kent D.; Lear, Kevin L.; Schneider, Jr., Richard P.

1996-01-01

A semiconductor light-emitting device and method. The semiconductor light-emitting device is provided with at least one control layer or control region which includes an annular oxidized portion thereof to channel an injection current into the active region, and to provide a lateral refractive index profile for index guiding the light generated within the device. A periodic composition grading of at least one of the mirror stacks in the device provides a reduced operating voltage of the device. The semiconductor light-emitting device has a high efficiency for light generation, and may be formed either as a resonant-cavity light-emitting diode (RCLED) or as a vertical-cavity surface-emitting laser (VCSEL).

Efficient semiconductor light-emitting device and method

DOEpatents

Choquette, K.D.; Lear, K.L.; Schneider, R.P. Jr.

1996-02-20

A semiconductor light-emitting device and method are disclosed. The semiconductor light-emitting device is provided with at least one control layer or control region which includes an annular oxidized portion thereof to channel an injection current into the active region, and to provide a lateral refractive index profile for index guiding the light generated within the device. A periodic composition grading of at least one of the mirror stacks in the device provides a reduced operating voltage of the device. The semiconductor light-emitting device has a high efficiency for light generation, and may be formed either as a resonant-cavity light-emitting diode (RCLED) or as a vertical-cavity surface-emitting laser (VCSEL). 12 figs.

Application of kinetic flux vector splitting scheme for solving multi-dimensional hydrodynamical models of semiconductor devices

NASA Astrophysics Data System (ADS)

Nisar, Ubaid Ahmed; Ashraf, Waqas; Qamar, Shamsul

In this article, one and two-dimensional hydrodynamical models of semiconductor devices are numerically investigated. The models treat the propagation of electrons in a semiconductor device as the flow of a charged compressible fluid. It plays an important role in predicting the behavior of electron flow in semiconductor devices. Mathematically, the governing equations form a convection-diffusion type system with a right hand side describing the relaxation effects and interaction with a self consistent electric field. The proposed numerical scheme is a splitting scheme based on the kinetic flux-vector splitting (KFVS) method for the hyperbolic step, and a semi-implicit Runge-Kutta method for the relaxation step. The KFVS method is based on the direct splitting of macroscopic flux functions of the system on the cell interfaces. The second order accuracy of the scheme is achieved by using MUSCL-type initial reconstruction and Runge-Kutta time stepping method. Several case studies are considered. For validation, the results of current scheme are compared with those obtained from the splitting scheme based on the NT central scheme. The effects of various parameters such as low field mobility, device length, lattice temperature and voltage are analyzed. The accuracy, efficiency and simplicity of the proposed KFVS scheme validates its generic applicability to the given model equations. A two dimensional simulation is also performed by KFVS method for a MESFET device, producing results in good agreement with those obtained by NT-central scheme.

Strategies for Radiation Hardness Testing of Power Semiconductor Devices

NASA Technical Reports Server (NTRS)

Soltis, James V. (Technical Monitor); Patton, Martin O.; Harris, Richard D.; Rohal, Robert G.; Blue, Thomas E.; Kauffman, Andrew C.; Frasca, Albert J.

2005-01-01

Plans on the drawing board for future space missions call for much larger power systems than have been flown in the past. These systems would employ much higher voltages and currents to enable more powerful electric propulsion engines and other improvements on what will also be much larger spacecraft. Long term human outposts on the moon and planets would also require high voltage, high current and long life power sources. Only hundreds of watts are produced and controlled on a typical robotic exploration spacecraft today. Megawatt systems are required for tomorrow. Semiconductor devices used to control and convert electrical energy in large space power systems will be exposed to electromagnetic and particle radiation of many types, depending on the trajectory and duration of the mission and on the power source. It is necessary to understand the often very different effects of the radiations on the control and conversion systems. Power semiconductor test strategies that we have developed and employed will be presented, along with selected results. The early results that we have obtained in testing large power semiconductor devices give a good indication of the degradation in electrical performance that can be expected in response to a given dose. We are also able to highlight differences in radiation hardness that may be device or material specific.

Electroluminescent devices formed using semiconductor nanocrystals as an electron transport media and method of making such electroluminescent devices

DOEpatents

Alivisatos, A. Paul; Colvin, Vickie

1996-01-01

An electroluminescent device is described, as well as a method of making same, wherein the device is characterized by a semiconductor nanocrystal electron transport layer capable of emitting visible light in response to a voltage applied to the device. The wavelength of the light emitted by the device may be changed by changing either the size or the type of semiconductor nanocrystals used in forming the electron transport layer. In a preferred embodiment the device is further characterized by the capability of emitting visible light of varying wavelengths in response to changes in the voltage applied to the device. The device comprises a hole processing structure capable of injecting and transporting holes, and usually comprising a hole injecting layer and a hole transporting layer; an electron transport layer in contact with the hole processing structure and comprising one or more layers of semiconductor nanocrystals; and an electron injecting layer in contact with the electron transport layer for injecting electrons into the electron transport layer. The capability of emitting visible light of various wavelengths is principally based on the variations in voltage applied thereto, but the type of semiconductor nanocrystals used and the size of the semiconductor nanocrystals in the layers of semiconductor nanometer crystals may also play a role in color change, in combination with the change in voltage.

Towards highly stable polymer electronics (Conference Presentation)

NASA Astrophysics Data System (ADS)

Nikolka, Mark; Nasrallah, Iyad; Broch, Katharina; Sadhanala, Aditya; Hurhangee, Michael; McCulloch, Iain; Sirringhaus, Henning

2016-11-01

Due to their ease of processing, organic semiconductors are promising candidates for applications in high performance flexible displays and fast organic electronic circuitry. Recently, a lot of advances have been made on organic semiconductors exhibiting surprisingly high performance and carrier mobilities exceeding those of amorphous silicon. However, there remain significant concerns about their operational and environmental stability, particularly in the context of applications that require a very high level of threshold voltage stability, such as active-matrix addressing of organic light-emitting diode (OLED) displays. Here, we report a novel technique for dramatically improving the operational stress stability, performance and uniformity of high mobility polymer field-effect transistors by the addition of specific small molecule additives to the polymer semiconductor film. We demonstrate for the first time polymer FETs that exhibit stable threshold voltages with threshold voltage shifts of less than 1V when subjected to a constant current operational stress for 1 day under conditions that are representative for applications in OLED active matrix displays. The approach constitutes in our view a technological breakthrough; it also makes the device characteristics independent of the atmosphere in which it is operated, causes a significant reduction in contact resistance and significantly improves device uniformity. We will discuss in detail the microscopic mechanism by which the molecular additives lead to this significant improvement in device performance and stability.

Effects of ultrathin oxides in conducting MIS structures on GaAs

NASA Technical Reports Server (NTRS)

Childs, R. B.; Ruths, J. M.; Sullivan, T. E.; Fonash, S. J.

1978-01-01

Schottky barrier-type GaAs baseline devices (semiconductor surface etched and then immediately metalized) and GaAs conducting metal oxide-semiconductor devices are fabricated and characterized. The baseline surfaces (no purposeful oxide) are prepared by a basic or an acidic etch, while the surface for the MIS devices are prepared by oxidizing after the etch step. The metallizations used are thin-film Au, Ag, Pd, and Al. It is shown that the introduction of purposeful oxide into these Schottky barrier-type structures examined on n-type GaAs modifies the barrier formation, and that thin interfacial layers can modify barrier formation through trapping and perhaps chemical reactions. For Au- and Pd-devices, enhanced photovoltaic performance of the MIS configuration is due to increased barrier height.

Electronic Raman scattering as an ultra-sensitive probe of strain effects in semiconductors

DOE PAGES

Fluegel., Brian; Mialitsin, Aleksej V.; Beaton, Daniel A.; ...

2015-05-28

In this study, the semiconductor strain engineering has become a critical feature of high-performance electronics because of the significant device performance enhancements that it enables. These improvements, which emerge from strain-induced modifications to the electronic band structure, necessitate new ultra-sensitive tools to probe the strain in semiconductors. Here, we demonstrate that minute amounts of strain in thin semiconductor epilayers can be measured using electronic Raman scattering. We applied this strain measurement technique to two different semiconductor alloy systems using coherently strained epitaxial thin films specifically designed to produce lattice-mismatch strains as small as 10 –4. Comparing our strain sensitivity andmore » signal strength in Al xGa 1–xAs with those obtained using the industry-standard technique of phonon Raman scattering, we found that there was a sensitivity improvement of 200-fold and a signal enhancement of 4 × 10 3, thus obviating key constraints in semiconductor strain metrology.« less

Surface Conduction in III-V Semiconductor Infrared Detector Materials

NASA Astrophysics Data System (ADS)

Sidor, Daniel Evan

III-V semiconductors are increasingly used to produce high performance infrared photodetectors; however a significant challenge inherent to working with these materials is presented by unintended electrical conduction pathways that form along their surfaces. Resulting leakage currents contribute to system noise and are ineffectively mitigated by device cooling, and therefore limit ultimate performance. When the mechanism of surface conduction is understood, the unipolar barrier device architecture offers a potential solution. III-V bulk unipolar barrier detectors that effectively suppress surface leakage have approached the performance of the best II-VI pn-based structures. This thesis begins with a review of empirically determined Schottky barrier heights and uses this information to present a simple model of semiconductor surface conductivity. The model is validated through measurements of degenerate n-type surface conductivity on InAs pn junctions, and non-degenerate surface conductivity on GaSb pn junctions. It is then extended, along with design principles inspired by the InAs-based nBn detector, to create a flat-band pn-based unipolar barrier detector possessing a conductive surface but free of detrimental surface leakage current. Consideration is then given to the relative success of these and related bulk detectors in suppressing surface leakage when compared to analogous superlattice-based designs, and general limitations of unipolar barriers in suppressing surface leakage are proposed. Finally, refinements to the molecular beam epitaxy crystal growth techniques used to produce InAs-based unipolar barrier heterostructure devices are discussed. Improvements leading to III-V device performance well within an order of magnitude of the state-of-the-art are demonstrated.

Long-Term Stability of Mold Compounds and the Influence on Semiconductor Device Reliability

NASA Astrophysics Data System (ADS)

Mahler, Joachim; Mengel, Manfred

2012-07-01

Lifetimes of semiconductor devices are specified according to the products and their applications to ensure safe operation, for instance as part of an automobile product. The long-term stability of the device is strongly dependent on the chip encapsulation and its adhesion to the chip and substrate. Molded silicon strips that act as a model system for molded chips inside semiconductor devices were investigated. Four commercially available mold compounds were applied on silicon strips and stored over 5 years at room temperature (RT), and changes in the thermomechanical behavior were analyzed. After storage, all molded strips exhibited warpage reduction in the range of 11% to 14% at RT with respect to the initial warpage. The temperatures for the stress-free state also changed during storage and were located between 228°C and 235°C for each mold. Additional stress applied to the stored modules, by temperature cycling as well as high-temperature storage, increased the warpage of the molded silicon samples. For further interpretation of measured results, finite-element method calculations were performed.

Ultrathin metal-semiconductor-metal resonator for angle invariant visible band transmission filters

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lee, Kyu-Tae; Seo, Sungyong; Yong Lee, Jae

We present transmission visible wavelength filters based on strong interference behaviors in an ultrathin semiconductor material between two metal layers. The proposed devices were fabricated on 2 cm × 2 cm glass substrate, and the transmission characteristics show good agreement with the design. Due to a significantly reduced light propagation phase change associated with the ultrathin semiconductor layer and the compensation in phase shift of light reflecting from the metal surface, the filters show an angle insensitive performance up to ±70°, thus, addressing one of the key challenges facing the previously reported photonic and plasmonic color filters. This principle, described in this paper, canmore » have potential for diverse applications ranging from color display devices to the image sensors.« less

A splitting scheme based on the space-time CE/SE method for solving multi-dimensional hydrodynamical models of semiconductor devices

NASA Astrophysics Data System (ADS)

Nisar, Ubaid Ahmed; Ashraf, Waqas; Qamar, Shamsul

2016-08-01

Numerical solutions of the hydrodynamical model of semiconductor devices are presented in one and two-space dimension. The model describes the charge transport in semiconductor devices. Mathematically, the models can be written as a convection-diffusion type system with a right hand side describing the relaxation effects and interaction with a self consistent electric field. The proposed numerical scheme is a splitting scheme based on the conservation element and solution element (CE/SE) method for hyperbolic step, and a semi-implicit scheme for the relaxation step. The numerical results of the suggested scheme are compared with the splitting scheme based on Nessyahu-Tadmor (NT) central scheme for convection step and the same semi-implicit scheme for the relaxation step. The effects of various parameters such as low field mobility, device length, lattice temperature and voltages for one-space dimensional hydrodynamic model are explored to further validate the generic applicability of the CE/SE method for the current model equations. A two dimensional simulation is also performed by CE/SE method for a MESFET device, producing results in good agreement with those obtained by NT-central scheme.

Method and apparatus for use of III-nitride wide bandgap semiconductors in optical communications

DOEpatents

Hui, Rongqing [Lenexa, KS; Jiang, Hong-Xing [Manhattan, KS; Lin, Jing-Yu [Manhattan, KS

2008-03-18

The present disclosure relates to the use of III-nitride wide bandgap semiconductor materials for optical communications. In one embodiment, an optical device includes an optical waveguide device fabricated using a III-nitride semiconductor material. The III-nitride semiconductor material provides for an electrically controllable refractive index. The optical waveguide device provides for high speed optical communications in an infrared wavelength region. In one embodiment, an optical amplifier is provided using optical coatings at the facet ends of a waveguide formed of erbium-doped III-nitride semiconductor materials.

Reliability Prediction Models for Discrete Semiconductor Devices

DTIC Science & Technology

1988-07-01

influence failure rate were device construction, semiconductor material, junction temperature, electrical stress, circuit application., a plication...found to influence failure rate were device construction, semiconductor material, junction temperature, electrical stress, circuit application...MFA Airbreathlng 14issile, Flight MFF Missile, Free Flight ML Missile, Launch MMIC Monolithic Microwave Integrated Circuits MOS Metal-Oxide

Measuring the local mobility of graphene on semiconductors

NASA Astrophysics Data System (ADS)

Zhong, Haijian; Liu, Zhenghui; Wang, Jianfeng; Pan, Anlian; Xu, Gengzhao; Xu, Ke

2018-04-01

Mobility is an important parameter to gauge the performance of graphene devices, which is usually measured by FET or Hall methods relying on the use of insulating substrates. However, these methods are not applicable for the case of graphene on semiconductors, because some current will inevitably cross their junctions and flow through the semiconductors except directly traversing the graphene surface. Here we demonstrate a method for measuring the local mobility of graphene on gallium nitrides combining Kelvin probe force microscopy (KPFM) and conductive atomic force microscopy (C-AFM). The carrier density related to Fermi level shifts in graphene can be acquired from KPFM. The local mobility of graphene is calculated from the carrier mean free path available from the effective contact area, which can be fitted from the local I-V curves in graphene/GaN junctions by C-AFM. Our method can be used to investigate an arbitrary region in graphene and also be applied to other semiconductor substrates and do not introduce damages. These results will benefit recent topical application researches for graphene integration in various semiconductor devices.

A solution for exposure tool optimization at the 65-nm node and beyond

NASA Astrophysics Data System (ADS)

Itai, Daisuke

2007-03-01

As device geometries shrink, tolerances for critical dimension, focus, and overlay control decrease. For the stable manufacture of semiconductor devices at (and beyond) the 65nm node, both performance variability and drift in exposure tools are no longer negligible factors. With EES (Equipment Engineering System) as a guidepost, hopes of improving productivity of semiconductor manufacturing are growing. We are developing a system, EESP (Equipment Engineering Support Program), based on the concept of EES. The EESP system collects and stores large volumes of detailed data generated from Canon lithographic equipment while product is being manufactured. It uses that data to monitor both equipment characteristics and process characteristics, which cannot be examined without this system. The goal of EESP is to maximize equipment capabilities, by feeding the result back to APC/FDC and the equipment maintenance list. This was a collaborative study of the system's effectiveness at the device maker's factories. We analyzed the performance variability of exposure tools by using focus residual data. We also attempted to optimize tool performance using the analyzed results. The EESP system can make the optimum performance of exposure tools available to the device maker.

Removing the current-limit of vertical organic field effect transistors

NASA Astrophysics Data System (ADS)

Sheleg, Gil; Greenman, Michael; Lussem, Bjorn; Tessler, Nir

2017-11-01

The reported Vertical Organic Field Effect Transistors (VOFETs) show either superior current and switching speeds or well-behaved transistor performance, especially saturation in the output characteristics. Through the study of the relationship between the device architecture or dimensions and the device performance, we find that achieving a saturation regime in the output characteristics requires that the device operates in the injection limited regime. In current structures, the existence of the injection limited regime depends on the source's injection barrier as well as on the buried semiconductor layer thickness. To overcome the injection limit imposed by the necessity of injection barrier, we suggest a new architecture to realize VOFETs. This architecture shows better gate control and is independent of the injection barrier at the source, thus allowing for several A cm-2 for a semiconductor having a mobility value of 0.1 cm2 V-1 s-1.

Zinc oxide and related compounds: order within the disorder

NASA Astrophysics Data System (ADS)

Martins, R.; Pereira, Luisa; Barquinha, P.; Ferreira, I.; Prabakaran, R.; Goncalves, G.; Goncalves, A.; Fortunato, E.

2009-02-01

This paper discusses the effect of order and disorder on the electrical and optical performance of ionic oxide semiconductors based on zinc oxide. These materials are used as active thin films in electronic devices such as pn heterojunction solar cells and thin-film transistors. Considering the expected conduction mechanism in ordered and disordered semiconductors the role of the spherical symmetry of the s electron conduction bands will be analyzed and compared to covalent semiconductors. The obtained results show p-type c-Si/a-IZO/poly-ZGO solar cells exhibiting efficiencies above 14%, in device areas of about 2.34 cm2. Amorphous oxide TFTs based on the Ga-Zn-Sn-O system demonstrate superior performance than the polycrystalline TFTs based on ZnO, translated by ION/IOFF ratio exceeding 107, turn-on voltage below 1-2 V and saturation mobility above 25 cm2/Vs. Apart from that, preliminary data on p-type oxide TFT based on the Zn-Cu-O system will also be presented.

Regulation of depletion layer width in Pb(Zr,Ti)O3/Nb:SrTiO3 heterostructures

NASA Astrophysics Data System (ADS)

Bai, Yu; Jie Wang, Zhan; Cui, Jian Zhong; Zhang, Zhi Dong

2018-05-01

Improving the tunability of depletion layer width (DLW) in ferroelectric/semiconductor heterostructures is important for the performance of some devices. In this work, 200-nm-thick Pb(Zr0.4Ti0.6)O3 (PZT) films were deposited on different Nb-doped SrTiO3 (NSTO) substrates, and the tunability of DLW at PZT/NSTO interfaces were studied. Our results showed that the maximum tunability of the DLW was achieved at the NSTO substrate with 0.5 wt% Nb. On the basis of the modified capacitance model and the ferroelectric semiconductor theory, we suggest that the tunability of the DLW in PZT/NSTO heterostructures can be attributed to a delicate balance of the depletion layer charge and the ferroelectric polarization charge. Therefore, the performance of some devices related to the tunability of DLW in ferroelectric/semiconductor heterostructures can be improved by modulating the doping concentration in semiconducting electrode materials.

Tunable molecular orientation and elevated thermal stability of vapor-deposited organic semiconductors

PubMed Central

Walters, Diane M.; Lyubimov, Ivan; de Pablo, Juan J.; Ediger, M. D.

2015-01-01

Physical vapor deposition is commonly used to prepare organic glasses that serve as the active layers in light-emitting diodes, photovoltaics, and other devices. Recent work has shown that orienting the molecules in such organic semiconductors can significantly enhance device performance. We apply a high-throughput characterization scheme to investigate the effect of the substrate temperature (Tsubstrate) on glasses of three organic molecules used as semiconductors. The optical and material properties are evaluated with spectroscopic ellipsometry. We find that molecular orientation in these glasses is continuously tunable and controlled by Tsubstrate/Tg, where Tg is the glass transition temperature. All three molecules can produce highly anisotropic glasses; the dependence of molecular orientation upon substrate temperature is remarkably similar and nearly independent of molecular length. All three compounds form “stable glasses” with high density and thermal stability, and have properties similar to stable glasses prepared from model glass formers. Simulations reproduce the experimental trends and explain molecular orientation in the deposited glasses in terms of the surface properties of the equilibrium liquid. By showing that organic semiconductors form stable glasses, these results provide an avenue for systematic performance optimization of active layers in organic electronics. PMID:25831545

Methods of forming semiconductor devices and devices formed using such methods

DOEpatents

Fox, Robert V; Rodriguez, Rene G; Pak, Joshua

2013-05-21

Single source precursors are subjected to carbon dioxide to form particles of material. The carbon dioxide may be in a supercritical state. Single source precursors also may be subjected to supercritical fluids other than supercritical carbon dioxide to form particles of material. The methods may be used to form nanoparticles. In some embodiments, the methods are used to form chalcopyrite materials. Devices such as, for example, semiconductor devices may be fabricated that include such particles. Methods of forming semiconductor devices include subjecting single source precursors to carbon dioxide to form particles of semiconductor material, and establishing electrical contact between the particles and an electrode.

Optoelectronic device physics and technology of nitride semiconductors from the UV to the terahertz.

PubMed

Moustakas, Theodore D; Paiella, Roberto

2017-10-01

This paper reviews the device physics and technology of optoelectronic devices based on semiconductors of the GaN family, operating in the spectral regions from deep UV to Terahertz. Such devices include LEDs, lasers, detectors, electroabsorption modulators and devices based on intersubband transitions in AlGaN quantum wells (QWs). After a brief history of the development of the field, we describe how the unique crystal structure, chemical bonding, and resulting spontaneous and piezoelectric polarizations in heterostructures affect the design, fabrication and performance of devices based on these materials. The heteroepitaxial growth and the formation and role of extended defects are addressed. The role of the chemical bonding in the formation of metallic contacts to this class of materials is also addressed. A detailed discussion is then presented on potential origins of the high performance of blue LEDs and poorer performance of green LEDs (green gap), as well as of the efficiency reduction of both blue and green LEDs at high injection current (efficiency droop). The relatively poor performance of deep-UV LEDs based on AlGaN alloys and methods to address the materials issues responsible are similarly addressed. Other devices whose state-of-the-art performance and materials-related issues are reviewed include violet-blue lasers, 'visible blind' and 'solar blind' detectors based on photoconductive and photovoltaic designs, and electroabsorption modulators based on bulk GaN or GaN/AlGaN QWs. Finally, we describe the basic physics of intersubband transitions in AlGaN QWs, and their applications to near-infrared and terahertz devices.

Optoelectronic device physics and technology of nitride semiconductors from the UV to the terahertz

NASA Astrophysics Data System (ADS)

Moustakas, Theodore D.; Paiella, Roberto

2017-10-01

This paper reviews the device physics and technology of optoelectronic devices based on semiconductors of the GaN family, operating in the spectral regions from deep UV to Terahertz. Such devices include LEDs, lasers, detectors, electroabsorption modulators and devices based on intersubband transitions in AlGaN quantum wells (QWs). After a brief history of the development of the field, we describe how the unique crystal structure, chemical bonding, and resulting spontaneous and piezoelectric polarizations in heterostructures affect the design, fabrication and performance of devices based on these materials. The heteroepitaxial growth and the formation and role of extended defects are addressed. The role of the chemical bonding in the formation of metallic contacts to this class of materials is also addressed. A detailed discussion is then presented on potential origins of the high performance of blue LEDs and poorer performance of green LEDs (green gap), as well as of the efficiency reduction of both blue and green LEDs at high injection current (efficiency droop). The relatively poor performance of deep-UV LEDs based on AlGaN alloys and methods to address the materials issues responsible are similarly addressed. Other devices whose state-of-the-art performance and materials-related issues are reviewed include violet-blue lasers, ‘visible blind’ and ‘solar blind’ detectors based on photoconductive and photovoltaic designs, and electroabsorption modulators based on bulk GaN or GaN/AlGaN QWs. Finally, we describe the basic physics of intersubband transitions in AlGaN QWs, and their applications to near-infrared and terahertz devices.

Radiation hardening of metal-oxide semi-conductor (MOS) devices by boron

NASA Technical Reports Server (NTRS)

Danchenko, V.

1974-01-01

Technique using boron effectively protects metal-oxide semiconductor devices from ionizing radiation without using shielding materials. Boron is introduced into insulating gate oxide layer at semiconductor-insulator interface.

40 CFR 63.7195 - What definitions apply to this subpart?

Code of Federal Regulations, 2012 CFR

2012-07-01

... units used to manufacture p-type and n-type semiconductors or active solid state devices from a wafer.... Examples of semiconductor or related solid state devices include semiconductor diodes, semiconductor stacks... permanently attached to motor vehicles such as trucks, railcars, barges, or ships; (2) Flow-through tanks...

40 CFR 63.7195 - What definitions apply to this subpart?

Code of Federal Regulations, 2013 CFR

2013-07-01

... units used to manufacture p-type and n-type semiconductors or active solid state devices from a wafer.... Examples of semiconductor or related solid state devices include semiconductor diodes, semiconductor stacks... permanently attached to motor vehicles such as trucks, railcars, barges, or ships; (2) Flow-through tanks...

40 CFR 63.7195 - What definitions apply to this subpart?

Code of Federal Regulations, 2014 CFR

2014-07-01

... units used to manufacture p-type and n-type semiconductors or active solid state devices from a wafer.... Examples of semiconductor or related solid state devices include semiconductor diodes, semiconductor stacks... permanently attached to motor vehicles such as trucks, railcars, barges, or ships; (2) Flow-through tanks...

Electrical spin injection from an n-type ferromagnetic semiconductor into a III-V device heterostructure

NASA Astrophysics Data System (ADS)

Kioseoglou, George; Hanbicki, Aubrey T.; Sullivan, James M.; van't Erve, Olaf M. J.; Li, Connie H.; Erwin, Steven C.; Mallory, Robert; Yasar, Mesut; Petrou, Athos; Jonker, Berend T.

2004-11-01

The use of carrier spin in semiconductors is a promising route towards new device functionality and performance. Ferromagnetic semiconductors (FMSs) are promising materials in this effort. An n-type FMS that can be epitaxially grown on a common device substrate is especially attractive. Here, we report electrical injection of spin-polarized electrons from an n-type FMS, CdCr2Se4, into an AlGaAs/GaAs-based light-emitting diode structure. An analysis of the electroluminescence polarization based on quantum selection rules provides a direct measure of the sign and magnitude of the injected electron spin polarization. The sign reflects minority rather than majority spin injection, consistent with our density-functional-theory calculations of the CdCr2Se4 conduction-band edge. This approach confirms the exchange-split band structure and spin-polarized carrier population of an FMS, and demonstrates a litmus test for these FMS hallmarks that discriminates against spurious contributions from magnetic precipitates.

Prospects for the application of GaN power devices in hybrid electric vehicle drive systems

NASA Astrophysics Data System (ADS)

Su, Ming; Chen, Chingchi; Rajan, Siddharth

2013-07-01

GaN, a wide bandgap semiconductor successfully implemented in optical and high-speed electronic devices, has gained momentum in recent years for power electronics applications. Along with rapid progress in material and device processing technologies, high-voltage transistors over 600 V have been reported by a number of teams worldwide. These advances make GaN highly attractive for the growing market of electrified vehicles, which currently employ bipolar silicon devices in the 600-1200 V class for the traction inverter. However, to capture this billion-dollar power market, GaN has to compete with existing IGBT products and deliver higher performance at comparable or lower cost. This paper reviews key achievements made by the GaN semiconductor industry, requirements of the automotive electric drive system and remaining challenges for GaN power devices to fit in the inverter application of hybrid vehicles.

An overview of silicon carbide device technology

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Matus, Lawrence G.

1992-01-01

Recent progress in the development of silicon carbide (SiC) as a semiconductor is briefly reviewed. This material shows great promise towards providing electronic devices that can operate under the high-temperature, high-radiation, and/or high-power conditions where current semiconductor technologies fail. High quality single crystal wafers have become available, and techniques for growing high quality epilayers have been refined to the point where experimental SiC devices and circuits can be developed. The prototype diodes and transistors that have been produced to date show encouraging characteristics, but by the same token they also exhibit some device-related problems that are not unlike those faced in the early days of silicon technology development. Although these problems will not prevent the implementation of some useful circuits, the performance and operating regime of SiC electronics will be limited until these device-related issues are solved.

Power Electronic Semiconductor Materials for Automotive and Energy Saving Applications - SiC, GaN, Ga2O3, and Diamond.

PubMed

Wellmann, Peter J

2017-11-17

Power electronics belongs to the future key technologies in order to increase system efficiency as well as performance in automotive and energy saving applications. Silicon is the major material for electronic switches since decades. Advanced fabrication processes and sophisticated electronic device designs have optimized the silicon electronic device performance almost to their theoretical limit. Therefore, to increase the system performance, new materials that exhibit physical and chemical properties beyond silicon need to be explored. A number of wide bandgap semiconductors like silicon carbide, gallium nitride, gallium oxide, and diamond exhibit outstanding characteristics that may pave the way to new performance levels. The review will introduce these materials by (i) highlighting their properties, (ii) introducing the challenges in materials growth, and (iii) outlining limits that need innovation steps in materials processing to outperform current technologies.

Power Electronic Semiconductor Materials for Automotive and Energy Saving Applications – SiC, GaN, Ga2O3, and Diamond

PubMed Central

2017-01-01

Power electronics belongs to the future key technologies in order to increase system efficiency as well as performance in automotive and energy saving applications. Silicon is the major material for electronic switches since decades. Advanced fabrication processes and sophisticated electronic device designs have optimized the silicon electronic device performance almost to their theoretical limit. Therefore, to increase the system performance, new materials that exhibit physical and chemical properties beyond silicon need to be explored. A number of wide bandgap semiconductors like silicon carbide, gallium nitride, gallium oxide, and diamond exhibit outstanding characteristics that may pave the way to new performance levels. The review will introduce these materials by (i) highlighting their properties, (ii) introducing the challenges in materials growth, and (iii) outlining limits that need innovation steps in materials processing to outperform current technologies. PMID:29200530

Spin transport in lateral structures with semiconducting channel

NASA Astrophysics Data System (ADS)

Zainuddin, Abu Naser

Spintronics is an emerging field of electronics with the potential to be used in future integrated circuits. Spintronic devices are already making their mark in storage technologies in recent times and there are proposals for using spintronic effects in logic technologies as well. So far, major improvement in spintronic effects, for example, the `spin-valve' effect, is being achieved in metals or insulators as channel materials. But not much progress is made in semiconductors owing to the difficulty in injecting spins into them, which has only very recently been overcome with the combined efforts of many research groups around the world. The key motivations for semiconductor spintronics are their ease in integration with the existing semiconductor technology along with the gate controllability. At present semiconductor based spintronic devices are mostly lateral and are showing a very poor performance compared to their metal or insulator based vertical counterparts. The objective of this thesis is to analyze these devices based on spin-transport models and simulations. At first a lateral spin-valve device is modeled with the spin-diffusion equation based semiclassical approach. Identifying the important issues regarding the device performance, a compact circuit equivalent model is presented which would help to improve the device design. It is found that the regions outside the current path also have a significant influence on the device performance under certain conditions, which is ordinarily neglected when only charge transport is considered. Next, a modified spin-valve structure is studied where the spin signal is controlled with a gate in between the injecting and detecting contacts. The gate is used to modulate the rashba spin-orbit coupling of the channel which, in turn, modulates the spin-valve signal. The idea of gate controlled spin manipulation was originally proposed by Datta and Das back in 1990 and is called 'Datta-Das' effect. In this thesis, we have extended the model described in the original proposal to include the influence of channel dimensions on the nature of electron flow and the contact dimensions on the magnitude and phase of the spin-valve signal. In order to capture the spin-orbit effect a non-equilibrium Green's function (NEGF) based quantum transport model for spin-valve device have been developed which is also explained with simple theoretical treatment based on stationary phase approximation. The model is also compared against a recent experiment that demonstrated such gate modulated spin-valve effect. This thesis also evaluates the possibility of gate controlled magnetization reversal or spin-torque effect as a means to validate this, so called, 'Datta-Das' effect on a more solid footing. Finally, the scope for utilizing topological insulator material in semiconductor spintronics is discussed as a possible future work for this thesis.

Low-voltage organic electronics based on a gate-tunable injection barrier in vertical graphene-organic semiconductor heterostructures.

PubMed

Hlaing, Htay; Kim, Chang-Hyun; Carta, Fabio; Nam, Chang-Yong; Barton, Rob A; Petrone, Nicholas; Hone, James; Kymissis, Ioannis

2015-01-14

The vertical integration of graphene with inorganic semiconductors, oxide semiconductors, and newly emerging layered materials has recently been demonstrated as a promising route toward novel electronic and optoelectronic devices. Here, we report organic thin film transistors based on vertical heterojunctions of graphene and organic semiconductors. In these thin heterostructure devices, current modulation is accomplished by tuning of the injection barriers at the semiconductor/graphene interface with the application of a gate voltage. N-channel devices fabricated with a thin layer of C60 show a room temperature on/off ratio >10(4) and current density of up to 44 mAcm(-2). Because of the ultrashort channel intrinsic to the vertical structure, the device is fully operational at a driving voltage of 200 mV. A complementary p-channel device is also investigated, and a logic inverter based on two complementary transistors is demonstrated. The vertical integration of graphene with organic semiconductors via simple, scalable, and low-temperature fabrication processes opens up new opportunities to realize flexible, transparent organic electronic, and optoelectronic devices.

Origin of the performances degradation of two-dimensional-based metal-oxide-semiconductor field effect transistors in the sub-10 nm regime: A first-principles study

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lu, Anh Khoa Augustin; IMEC, 75 Kapeldreef, B-3001 Leuven; Pourtois, Geoffrey

2016-01-25

The impact of the scaling of the channel length on the performances of metal-oxide-semiconductor field effect transistors, based on two-dimensional (2D) channel materials, is theoretically investigated, using density functional theory combined with the non-equilibrium Green's function method. It is found that the scaling of the channel length below 10 nm leads to strong device performance degradations. Our simulations reveal that this degradation is essentially due to the tunneling current flowing between the source and the drain in these aggressively scaled devices. It is shown that this electron tunneling process is modulated by the effective mass of the 2D channel material, andmore » sets the limit of the scaling in future transistor designs.« less

Nanoionics-Based Switches for Radio-Frequency Applications

NASA Technical Reports Server (NTRS)

Nessel, James; Lee, Richard

2010-01-01

Nanoionics-based devices have shown promise as alternatives to microelectromechanical systems (MEMS) and semiconductor diode devices for switching radio-frequency (RF) signals in diverse systems. Examples of systems that utilize RF switches include phase shifters for electronically steerable phased-array antennas, multiplexers, cellular telephones and other radio transceivers, and other portable electronic devices. Semiconductor diode switches can operate at low potentials (about 1 to 3 V) and high speeds (switching times of the order of nanoseconds) but are characterized by significant insertion loss, high DC power consumption, low isolation, and generation of third-order harmonics and intermodulation distortion (IMD). MEMS-based switches feature low insertion loss (of the order of 0.2 dB), low DC power consumption (picowatts), high isolation (>30 dB), and low IMD, but contain moving parts, are not highly reliable, and must be operated at high actuation potentials (20 to 60 V) generated and applied by use of complex circuitry. In addition, fabrication of MEMS is complex, involving many processing steps. Nanoionics-based switches offer the superior RF performance and low power consumption of MEMS switches, without need for the high potentials and complex circuitry necessary for operation of MEMS switches. At the same time, nanoionics-based switches offer the high switching speed of semiconductor devices. Also, like semiconductor devices, nanoionics-based switches can be fabricated relatively inexpensively by use of conventional integrated-circuit fabrication techniques. More over, nanoionics-based switches have simple planar structures that can easily be integrated into RF power-distribution circuits.

Apparatus for making photovoltaic devices

DOEpatents

Foote, James B.; Kaake, Steven A. F.; Meyers, Peter V.; Nolan, James F.

1994-12-13

A process and apparatus (70) for making a large area photovoltaic device (22) that is capable of generating low cost electrical power. The apparatus (70) for performing the process includes an enclosure (126) providing a controlled environment in which an oven (156) is located. At least one and preferably a plurality of deposition stations (74,76,78) provide heated vapors of semiconductor material within the oven (156) for continuous elevated temperature deposition of semiconductor material on a sheet substrate (24) including a glass sheet (26) conveyed within the oven. The sheet substrate (24) is conveyed on a roller conveyor (184) within the oven (156) and the semiconductor material whose main layer (82) is cadmium telluride is deposited on an upwardly facing surface (28) of the substrate by each deposition station from a location within the oven above the roller conveyor. A cooling station (86) rapidly cools the substrate (24) after deposition of the semiconductor material thereon to strengthen the glass sheet of the substrate.

Process for making photovoltaic devices and resultant product

DOEpatents

Foote, James B.; Kaake, Steven A. F.; Meyers, Peter V.; Nolan, James F.

1996-07-16

A process and apparatus (70) for making a large area photovoltaic device (22) that is capable of generating low cost electrical power. The apparatus (70) for performing the process includes an enclosure (126) providing a controlled environment in which an oven (156) is located. At least one and preferably a plurality of deposition stations (74,76,78) provide heated vapors of semiconductor material within the oven (156) for continuous elevated temperature deposition of semiconductor material on a sheet substrate (24) including a glass sheet (26) conveyed within the oven. The sheet substrate (24) is conveyed on a roller conveyor (184) within the oven (156) and the semiconductor material whose main layer (82) is cadmium telluride is deposited on an upwardly facing surface (28) of the substrate by each deposition station from a location within the oven above the roller conveyor. A cooling station (86) rapidly cools the substrate (24) after deposition of the semiconductor material thereon to strengthen the glass sheet of the substrate.

Process for making photovoltaic devices and resultant product

DOEpatents

Foote, James B.; Kaake, Steven A. F.; Meyers, Peter V.; Nolan, James F.

1995-11-28

A process and apparatus (70) for making a large area photovoltaic device (22) that is capable of generating low cost electrical power. The apparatus (70) for performing the process includes an enclosure (126) providing a controlled environment in which an oven (156) is located. At least one and preferably a plurality of deposition stations (74,76,78) provide heated vapors of semiconductor material within the oven (156) for continuous elevated temperature deposition of semiconductor material on a sheet substrate (24) including a glass sheet (26) conveyed within the oven. The sheet substrate (24) is conveyed on a roller conveyor (184) within the oven (156) and the semiconductor material whose main layer (82) is cadmium telluride is deposited on an upwardly facing surface (28) of the substrate by each deposition station from a location within the oven above the roller conveyor. A cooling station (86) rapidly cools the substrate (24) after deposition of the semiconductor material thereon to strengthen the glass sheet of the substrate.

Process for making photovoltaic devices and resultant product

DOEpatents

Foote, James B.; Kaake, Steven A. F.; Meyers, Peter V.; Nolan, James F.

1993-09-28

A process and apparatus (70) for making a large area photovoltaic device (22) that is capable of generating low cost electrical power. The apparatus (70) for performing the process includes an enclosure (126) providing a controlled environment in which an oven (156) is located. At least one and preferably a plurality of deposition stations (74,76,78) provide heated vapors of semiconductor material within the oven (156) for continuous elevated temperature deposition of semiconductor material on a sheet substrate (24) including a glass sheet (26) conveyed within the oven. The sheet substrate (24) is conveyed on a roller conveyor (184) within the oven (156) and the semiconductor material whose main layer (82) is cadmium telluride is deposited on an upwardly facing surface (28) of the substrate by each deposition station from a location within the oven above the roller conveyor. A cooling station (86) rapidly cools the substrate (24) after deposition of the semiconductor material thereon to strengthen the glass sheet of the substrate.

A hybrid life cycle inventory of nano-scale semiconductor manufacturing.

PubMed

Krishnan, Nikhil; Boyd, Sarah; Somani, Ajay; Raoux, Sebastien; Clark, Daniel; Dornfeld, David

2008-04-15

The manufacturing of modern semiconductor devices involves a complex set of nanoscale fabrication processes that are energy and resource intensive, and generate significant waste. It is important to understand and reduce the environmental impacts of semiconductor manufacturing because these devices are ubiquitous components in electronics. Furthermore, the fabrication processes used in the semiconductor industry are finding increasing application in other products, such as microelectromechanical systems (MEMS), flat panel displays, and photovoltaics. In this work we develop a library of typical gate-to-gate materials and energy requirements, as well as emissions associated with a complete set of fabrication process models used in manufacturing a modern microprocessor. In addition, we evaluate upstream energy requirements associated with chemicals and materials using both existing process life cycle assessment (LCA) databases and an economic input-output (EIO) model. The result is a comprehensive data set and methodology that may be used to estimate and improve the environmental performance of a broad range of electronics and other emerging applications that involve nano and micro fabrication.

Investigation of Short Channel Effects on Device Performance for 60nm NMOS Transistor

NASA Astrophysics Data System (ADS)

Chinnappan, U.; Sanudin, R.

2017-08-01

In the aggressively scaled complementary metal oxide semiconductor (CMOS) devices, shallower p-n junctions and low sheet resistances are essential for short-channel effect (SCE) control and high device performance. The SCE are attributed to two physical phenomena that are the limitation imposed on electron drift characteristics in channel and the modification of the threshold voltage (Vth) due to the shortening channel length. The decrement of Vth with decrement in gate length is a well-known attribute in SCE known as “threshold voltage roll-off’. In this research, the Technology Computer Aided Design (TCAD) was used to model the SCE phenomenon effect on 60nm n-type metal oxide semiconductor (NMOS) transistor. There are three parameters being investigated, which are the oxide thickness (Tox), gate length (L), acceptor concentration (Na). The simulation data were used to visualise the effect of SCE on the 60nm NMOS transistor. Simulation data suggest that all three parameters have significant effect on Vth, and hence on the transistor performance. It is concluded that there is a trade-off among these three parameters to obtain an optimized transistor performance.

Low-Cost and Large-Area Electronics, Roll-to-Roll Processing and Beyond

NASA Astrophysics Data System (ADS)

Wiesenhütter, Katarzyna; Skorupa, Wolfgang

In the following chapter, the authors conduct a literature survey of current advances in state-of-the-art low-cost, flexible electronics. A new emerging trend in the design of modern semiconductor devices dedicated to scaling-up, rather than reducing, their dimensions is presented. To realize volume manufacturing, alternative semiconductor materials with superior performance, fabricated by innovative processing methods, are essential. This review provides readers with a general overview of the material and technology evolution in the area of macroelectronics. Herein, the term macroelectronics (MEs) refers to electronic systems that can cover a large area of flexible media. In stark contrast to well-established micro- and nano-scale semiconductor devices, where property improvement is associated with downscaling the dimensions of the functional elements, in macroelectronic systems their overall size defines the ultimate performance (Sun and Rogers in Adv. Mater. 19:1897-1916, 2007). The major challenges of large-scale production are discussed. Particular attention has been focused on describing advanced, short-term heat treatment approaches, which offer a range of advantages compared to conventional annealing methods. There is no doubt that large-area, flexible electronic systems constitute an important research topic for the semiconductor industry. The ability to fabricate highly efficient macroelectronics by inexpensive processes will have a significant impact on a range of diverse technology sectors. A new era "towards semiconductor volume manufacturing…" has begun.

Near-infrared light emitting device using semiconductor nanocrystals

DOE Office of Scientific and Technical Information (OSTI.GOV)

Supran, Geoffrey J.S.; Song, Katherine W.; Hwang, Gyuweon

A near-infrared light emitting device can include semiconductor nanocrystals that emit at wavelengths beyond 1 .mu.m. The semiconductor nanocrystals can include a core and an overcoating on a surface of the core.

Introduction to Semiconductor Devices

NASA Astrophysics Data System (ADS)

Brennan, Kevin F.

2005-03-01

This volume offers a solid foundation for understanding the most important devices used in the hottest areas of electronic engineering today, from semiconductor fundamentals to state-of-the-art semiconductor devices in the telecommunications and computing industries. Kevin Brennan describes future approaches to computing hardware and RF power amplifiers, and explains how emerging trends and system demands of computing and telecommunications systems influence the choice, design and operation of semiconductor devices. In addition, he covers MODFETs and MOSFETs, short channel effects, and the challenges faced by continuing miniaturization. His book is both an excellent senior/graduate text and a valuable reference for practicing engineers and researchers.

Computational insights into charge transfer across functionalized semiconductor surfaces

NASA Astrophysics Data System (ADS)

Kearney, Kara; Rockett, Angus; Ertekin, Elif

2017-12-01

Photoelectrochemical water-splitting is a promising carbon-free fuel production method for producing H2 and O2 gas from liquid water. These cells are typically composed of at least one semiconductor photoelectrode which is prone to degradation and/or oxidation. Various surface modifications are known for stabilizing semiconductor photoelectrodes, yet stabilization techniques are often accompanied by a decrease in photoelectrode performance. However, the impact of surface modification on charge transport and its consequence on performance is still lacking, creating a roadblock for further improvements. In this review, we discuss how density functional theory and finite-element device simulations are reliable tools for providing insight into charge transport across modified photoelectrodes.

Proceedings of the Conference on High-temperature Electronics

NASA Technical Reports Server (NTRS)

1981-01-01

The development of electronic devices for use in high temperature environments is addressed. The instrumentational needs of planetary exploration, fossil and nuclear power reactors, turbine engine monitoring, and well logging are defined. Emphasis is place on the fabrication and performance of materials and semiconductor devices, circuits and systems and packaging.

Systems and methods for solar cells with CIS and CIGS films made by reacting evaporated copper chlorides with selenium

DOEpatents

Albin, David S.; Noufi, Rommel

2015-06-09

Systems and methods for solar cells with CIS and CIGS films made by reacting evaporated copper chlorides with selenium are provided. In one embodiment, a method for fabricating a thin film device comprises: providing a semiconductor film comprising indium (In) and selenium (Se) upon a substrate; heating the substrate and the semiconductor film to a desired temperature; and performing a mass transport through vapor transport of a copper chloride vapor and se vapor to the semiconductor film within a reaction chamber.

Spin injection and transport in semiconductor and metal nanostructures

NASA Astrophysics Data System (ADS)

Zhu, Lei

In this thesis we investigate spin injection and transport in semiconductor and metal nanostructures. To overcome the limitation imposed by the low efficiency of spin injection and extraction and strict requirements for retention of spin polarization within the semiconductor, novel device structures with additional logic functionality and optimized device performance have been developed. Weak localization/antilocalization measurements and analysis are used to assess the influence of surface treatments on elastic, inelastic and spin-orbit scatterings during the electron transport within the two-dimensional electron layer at the InAs surface. Furthermore, we have used spin-valve and scanned probe microscopy measurements to investigate the influence of sulfur-based surface treatments and electrically insulating barrier layers on spin injection into, and spin transport within, the two-dimensional electron layer at the surface of p-type InAs. We also demonstrate and analyze a three-terminal, all-electrical spintronic switching device, combining charge current cancellation by appropriate device biasing and ballistic electron transport. The device yields a robust, electrically amplified spin-dependent current signal despite modest efficiency in electrical injection of spin-polarized electrons. Detailed analyses provide insight into the advantages of ballistic, as opposed to diffusive, transport in device operation, as well as scalability to smaller dimensions, and allow us to eliminate the possibility of phenomena unrelated to spin transport contributing to the observed device functionality. The influence of the device geometry on magnetoresistance of nanoscale spin-valve structures is also demonstrated and discussed. Shortcomings of the simplified one-dimensional spin diffusion model for spin valve are elucidated, with comparison of the thickness and the spin diffusion length in the nonmagnetic channel as the criterion for validity of the 1D model. Our work contributes directly to the realization of spin valve and spin transistor devices based on III-V semiconductors, and offers new opportunities to engineer the behavior of spintronic devices at the nanoscale.

Rational design of metal-organic electronic devices: A computational perspective

NASA Astrophysics Data System (ADS)

Chilukuri, Bhaskar

Organic and organometallic electronic materials continue to attract considerable attention among researchers due to their cost effectiveness, high flexibility, low temperature processing conditions and the continuous emergence of new semiconducting materials with tailored electronic properties. In addition, organic semiconductors can be used in a variety of important technological devices such as solar cells, field-effect transistors (FETs), flash memory, radio frequency identification (RFID) tags, light emitting diodes (LEDs), etc. However, organic materials have thus far not achieved the reliability and carrier mobility obtainable with inorganic silicon-based devices. Hence, there is a need for finding alternative electronic materials other than organic semiconductors to overcome the problems of inferior stability and performance. In this dissertation, I research the development of new transition metal based electronic materials which due to the presence of metal-metal, metal-pi, and pi-pi interactions may give rise to superior electronic and chemical properties versus their organic counterparts. Specifically, I performed computational modeling studies on platinum based charge transfer complexes and d 10 cyclo-[M(mu-L)]3 trimers (M = Ag, Au and L = monoanionic bidentate bridging (C/N~C/N) ligand). The research done is aimed to guide experimental chemists to make rational choices of metals, ligands, substituents in synthesizing novel organometallic electronic materials. Furthermore, the calculations presented here propose novel ways to tune the geometric, electronic, spectroscopic, and conduction properties in semiconducting materials. In addition to novel material development, electronic device performance can be improved by making a judicious choice of device components. I have studied the interfaces of a p-type metal-organic semiconductor viz cyclo-[Au(mu-Pz)] 3 trimer with metal electrodes at atomic and surface levels. This work was aimed to guide the device engineers to choose the appropriate metal electrodes considering the chemical interactions at the interface. Additionally, the calculations performed on the interfaces provided valuable insight into binding energies, charge redistribution, change in the energy levels, dipole formation, etc., which are important parameters to consider while fabricating an electronic device. The research described in this dissertation highlights the application of unique computational modeling methods at different levels of theory to guide the experimental chemists and device engineers toward a rational design of transition metal based electronic devices with low cost and high performance.

Use of vacuum tubes in test instrumentation for measuring characteristics of fast high-voltage semiconductor devices

NASA Technical Reports Server (NTRS)

Berning, D.

1981-01-01

Circuits are described that permit measurement of fast events occurring in power semiconductors. These circuits were developed for the dynamic characterization of transistors used in inductive-load switching applications. Fast voltage clamping using vacuum diodes is discussed, and reference is made to a unique circuit that was built for performing nondestructive, reverse-bias, second-breakdown tests on transistors.

Energy storage device with large charge separation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Holme, Timothy P.; Prinz, Friedrich B.; Iancu, Andrei T.

High density energy storage in semiconductor devices is provided. There are two main aspects of the present approach. The first aspect is to provide high density energy storage in semiconductor devices based on formation of a plasma in the semiconductor. The second aspect is to provide high density energy storage based on charge separation in a p-n junction.

Energy storage device with large charge separation

DOEpatents

Holme, Timothy P.; Prinz, Friedrich B.; Iancu, Andrei

2016-04-12

High density energy storage in semiconductor devices is provided. There are two main aspects of the present approach. The first aspect is to provide high density energy storage in semiconductor devices based on formation of a plasma in the semiconductor. The second aspect is to provide high density energy storage based on charge separation in a p-n junction.

ZnSe based semiconductor core-shell structures: From preparation to application

NASA Astrophysics Data System (ADS)

Sun, Chengcheng; Gu, Yarong; Wen, Weijia; Zhao, Lijuan

2018-07-01

Inorganic core-shell semiconductor materials have attracted increasing interest in recent years because of the unique structure, stable chemical properties and high performance in devices. With special properties such as a direct band-gap and excellent photoelectrical characteristics, ZnSe based semiconductor core-shell structures are promising materials for applications in such fields as photocatalysts, light-emitting diodes, solar cells, photodetectors, biomedical science and so on. However, few reviews on ZnSe based semiconductor core-shell structures have been reported so far. Therefore this manuscript mainly focuses on the research activities on ZnSe based semiconductor core-shell composites including various preparation methods and the applications of these core-shell structures, especially in photocatalysts, light emitting, solar cells and photodetectors. The possibilities and limitations of studies on ZnSe based semiconductor core-shell composites are also highlighted.

Semiconductor systems utilizing materials that form rectifying junctions in both N and P-type doping regions, whether metallurgically or field induced, and methods of use

DOEpatents

Welch, James D.

2000-01-01

Disclosed are semiconductor systems, such as integrated circuits utilizing Schotky barrier and/or diffused junction technology, which semiconductor systems incorporate material(s) that form rectifying junctions in both metallurgically and/or field induced N and P-type doping regions, and methods of their use. Disclosed are Schottky barrier based inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems and which can be operated as modulators, N and P-channel MOSFETS and CMOS formed therefrom, and (MOS) gate voltage controlled rectification direction and gate voltage controlled switching devices, and use of such material(s) to block parasitic current flow pathways. Simple demonstrative five mask fabrication procedures for inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems are also presented.

Photoelectrochemical cell including Ga(Sb.sub.x)N.sub.1-x semiconductor electrode

DOEpatents

Menon, Madhu; Sheetz, Michael; Sunkara, Mahendra Kumar; Pendyala, Chandrashekhar; Sunkara, Swathi; Jasinski, Jacek B.

2017-09-05

The composition of matter comprising Ga(Sb.sub.x)N.sub.1-x where x=0.01 to 0.06 is characterized by a band gap between 2.4 and 1.7 eV. A semiconductor device includes a semiconductor layer of that composition. A photoelectric cell includes that semiconductor device.

Hydrogen Sensors Using Nitride-Based Semiconductor Diodes: The Role of Metal/Semiconductor Interfaces

PubMed Central

Irokawa, Yoshihiro

2011-01-01

In this paper, I review my recent results in investigating hydrogen sensors using nitride-based semiconductor diodes, focusing on the interaction mechanism of hydrogen with the devices. Firstly, effects of interfacial modification in the devices on hydrogen detection sensitivity are discussed. Surface defects of GaN under Schottky electrodes do not play a critical role in hydrogen sensing characteristics. However, dielectric layers inserted in metal/semiconductor interfaces are found to cause dramatic changes in hydrogen sensing performance, implying that chemical selectivity to hydrogen could be realized. The capacitance-voltage (C–V) characteristics reveal that the work function change in the Schottky metal is not responsible mechanism for hydrogen sensitivity. The interface between the metal and the semiconductor plays a critical role in the interaction of hydrogen with semiconductor devises. Secondly, low-frequency C–V characterization is employed to investigate the interaction mechanism of hydrogen with diodes. As a result, it is suggested that the formation of a metal/semiconductor interfacial polarization could be attributed to hydrogen-related dipoles. In addition, using low-frequency C–V characterization leads to clear detection of 100 ppm hydrogen even at room temperature where it is hard to detect hydrogen by using conventional current-voltage (I–V) characterization, suggesting that low-frequency C–V method would be effective in detecting very low hydrogen concentrations. PMID:22346597

Porous Diblock Copolymer Thin Films in High-Performance Semiconductor Microelectronics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Black, C.T.

2011-02-01

The engine fueling more than 40 years of performance improvements in semiconductor integrated circuits (ICs) has been industry's ability to pattern circuit elements at ever-higher resolution and with ever-greater precision. Steady advances in photolithography - the process wherein ultraviolet light chemically changes a photosensitive polymer resist material in order to create a latent image - have resulted in scaling of minimum printed feature sizes from tens of microns during the 1980s to sub-50 nanometer transistor gate lengths in today's state-of-the-art ICs. The history of semiconductor technology scaling as well as future technology requirements is documented in the International Technology Roadmapmore » for Semiconductors (ITRS). The progression of the semiconductor industry to the realm of nanometer-scale sizes has brought enormous challenges to device and circuit fabrication, rendering performance improvements by conventional scaling alone increasingly difficult. Most often this discussion is couched in terms of field effect transistor (FET) feature sizes such as the gate length or gate oxide thickness, however these challenges extend to many other aspects of the IC, including interconnect dimensions and pitch, device packing density, power consumption, and heat dissipation. The ITRS Technology Roadmap forecasts a difficult set of scientific and engineering challenges with no presently-known solutions. The primary focus of this chapter is the research performed at IBM on diblock copolymer films composed of polystyrene (PS) and poly(methyl-methacrylate) (PMMA) (PS-b-PMMA) with total molecular weights M{sub n} in the range of {approx}60K (g/mol) and polydispersities (PD) of {approx}1.1. These materials self assemble to form patterns having feature sizes in the range of 15-20nm. PS-b-PMMA was selected as a self-assembling patterning material due to its compatibility with the semiconductor microelectronics manufacturing infrastructure, as well as the significant body of existing research on understanding its material properties.« less

Prediction and measurement results of radiation damage to CMOS devices on board spacecraft

NASA Technical Reports Server (NTRS)

Stassinopoulos, E. G.; Danchenko, V.; Cliff, R. A.; Sing, M.; Brucker, G. J.; Ohanian, R. S.

1977-01-01

Final results from the CMOS Radiation Effects Measurement (CREM) experiment flown on Explorer 55 are presented and discussed, based on about 15 months of observations and measurements. Conclusions are given relating to long-range annealing, effects of operating temperature on semiconductor performance in space, biased and unbiased P-MOS device degradation, unbiased n-channel device performance, changes in device transconductance, and the difference in ionization efficiency between Co-60 gamma rays and 1-Mev Van de Graaff electrons. The performance of devices in a heavily shielded electronic subsystem box within the spacecraft is evaluated and compared. Environment models and computational methods and their impact on device-degradation estimates are being reviewed to determine whether they permit cost-effective design of spacecraft.

Monolithic integrated high-T.sub.c superconductor-semiconductor structure

NASA Technical Reports Server (NTRS)

Barfknecht, Andrew T. (Inventor); Garcia, Graham A. (Inventor); Russell, Stephen D. (Inventor); Burns, Michael J. (Inventor); de la Houssaye, Paul R. (Inventor); Clayton, Stanley R. (Inventor)

2000-01-01

A method for the fabrication of active semiconductor and high-temperature superconducting device of the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.

An Ultrasensitive Organic Semiconductor NO2 Sensor Based on Crystalline TIPS-Pentacene Films.

PubMed

Wang, Zi; Huang, Lizhen; Zhu, Xiaofei; Zhou, Xu; Chi, Lifeng

2017-10-01

Organic semiconductor gas sensor is one of the promising candidates of room temperature operated gas sensors with high selectivity. However, for a long time the performance of organic semiconductor sensors, especially for the detection of oxidizing gases, is far behind that of the traditional metal oxide gas sensors. Although intensive attempts have been made to address the problem, the performance and the understanding of the sensing mechanism are still far from sufficient. Herein, an ultrasensitive organic semiconductor NO 2 sensor based on 6,13-bis(triisopropylsilylethynyl)-pentacene (TIPS-petacene) is reported. The device achieves a sensitivity over 1000%/ppm and fast response/recovery, together with a low limit of detection (LOD) of 20 ppb, all of which reach the level of metal oxide sensors. After a comprehensive analysis on the morphology and electrical properties of the organic films, it is revealed that the ultrahigh performance is largely related to the film charge transport ability, which was less concerned in the studies previously. And the combination of efficient charge transport and low original charge carrier concentration is demonstrated to be an effective access to obtain high performance organic semiconductor gas sensors. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Crystal Growth of ZnSe and Related Ternary Compound Semiconductors by Vapor Transport

NASA Technical Reports Server (NTRS)

Su, Ching-Hua; Burger, Arnold; Dudley, Michael; Matyi, Richard J.; Ramachandran, Narayanan; Sha, Yi-Gao; Volz, Martin; Shih, Hung-Dah

1998-01-01

Interest in optical devices which can operate in the visible spectrum has motivated research interest in the II-VI wide band gap semiconductor materials. The recent challenge for semiconductor opto-electronics is the development of a laser which can operate at short visible wavelengths, In the past several years, major advances in thin film technology such as molecular beam epitaxy and metal organic chemical vapor deposition have demonstrated the applicability of II-VI materials to important devices such as light-emitting diodes, lasers, and ultraviolet detectors.The demonstration of its optical bistable properties in bulk and thin film forms also make ZnSe a possible candidate material for the building blocks of a digital optical computer. Despite this, developments in the crystal growth of bulk II-VI semiconductor materials has not advanced far enough to provide the low price, high quality substrates needed for the thin film growth technology. The electrical and optical properties of semiconductor materials depend on the native point defects, (the deviation from stoichiometry), and the impurity or dopant distribution. To date, the bulk growth of ZnSe substrates has been plagued with problems related to defects such as non-uniform distributions of native defects, impurities and dopants, lattice strain, dislocations, grain boundaries, and second phase inclusions which greatly effect the device performance. In the bulk crystal growth of some technologically important semiconductors, such as ZnTe, CdS, ZnSe and ZnS, vapor growth techniques have significant advantages over melt growth techniques due to the high melting points of these materials.

A new approximation of Fermi-Dirac integrals of order 1/2 for degenerate semiconductor devices

NASA Astrophysics Data System (ADS)

AlQurashi, Ahmed; Selvakumar, C. R.

2018-06-01

There had been tremendous growth in the field of Integrated circuits (ICs) in the past fifty years. Scaling laws mandated both lateral and vertical dimensions to be reduced and a steady increase in doping densities. Most of the modern semiconductor devices have invariably heavily doped regions where Fermi-Dirac Integrals are required. Several attempts have been devoted to developing analytical approximations for Fermi-Dirac Integrals since numerical computations of Fermi-Dirac Integrals are difficult to use in semiconductor devices, although there are several highly accurate tabulated functions available. Most of these analytical expressions are not sufficiently suitable to be employed in semiconductor device applications due to their poor accuracy, the requirement of complicated calculations, and difficulties in differentiating and integrating. A new approximation has been developed for the Fermi-Dirac integrals of the order 1/2 by using Prony's method and discussed in this paper. The approximation is accurate enough (Mean Absolute Error (MAE) = 0.38%) and easy enough to be used in semiconductor device equations. The new approximation of Fermi-Dirac Integrals is applied to a more generalized Einstein Relation which is an important relation in semiconductor devices.

Flexible MEMS: A novel technology to fabricate flexible sensors and electronics

NASA Astrophysics Data System (ADS)

Tu, Hongen

This dissertation presents the design and fabrication techniques used to fabricate flexible MEMS (Micro Electro Mechanical Systems) devices. MEMS devices and CMOS(Complementary Metal-Oxide-Semiconductor) circuits are traditionally fabricated on rigid substrates with inorganic semiconductor materials such as Silicon. However, it is highly desirable that functional elements like sensors, actuators or micro fluidic components to be fabricated on flexible substrates for a wide variety of applications. Due to the fact that flexible substrate is temperature sensitive, typically only low temperature materials, such as polymers, metals, and organic semiconductor materials, can be directly fabricated on flexible substrates. A novel technology based on XeF2(xenon difluoride) isotropic silicon etching and parylene conformal coating, which is able to monolithically incorporate high temperature materials and fluidic channels, was developed at Wayne State University. The technology was first implemented in the development of out-of-plane parylene microneedle arrays that can be individually addressed by integrated flexible micro-channels. These devices enable the delivery of chemicals with controlled temporal and spatial patterns and allow us to study neurotransmitter-based retinal prosthesis. The technology was further explored by adopting the conventional SOI-CMOS processes. High performance and high density CMOS circuits can be first fabricated on SOI wafers, and then be integrated into flexible substrates. Flexible p-channel MOSFETs (Metal-Oxide-Semiconductor Field-Effect-Transistors) were successfully integrated and tested. Integration of pressure sensors and flow sensors based on single crystal silicon has also been demonstrated. A novel smart yarn technology that enables the invisible integration of sensors and electronics into fabrics has been developed. The most significant advantage of this technology is its post-MEMS and post-CMOS compatibility. Various high-performance MEMS devices and electronics can be integrated into flexible substrates. The potential of our technology is enormous. Many wearable and implantable devices can be developed based on this technology.

Total-dose radiation effects data for semiconductor devices, volume 1. [radiation resistance of components for the Galileo Project

NASA Technical Reports Server (NTRS)

Price, W. E.; Martin, K. E.; Nichols, D. K.; Gauthier, M. K.; Brown, S. F.

1981-01-01

Steady-state, total-dose radiation test data are provided in graphic format, for use by electronic designers and other personnel using semiconductor devices in a radiation environment. Data are presented by JPL for various NASA space programs on diodes, bipolar transistors, field effect transistors, silicon-controlled rectifiers, and optical devices. A vendor identification code list is included along with semiconductor device electrical parameter symbols and abbreviations.

Thiazole-based organic semiconductors for organic electronics.

PubMed

Lin, Yuze; Fan, Haijun; Li, Yongfang; Zhan, Xiaowei

2012-06-19

Over the past two decades, organic semiconductors have been the subject of intensive academic and commercial interests. Thiazole is a common electron-accepting heterocycle due to electron-withdrawing nitrogen of imine (C=N), several moieties based on thiazole have been widely introduced into organic semiconductors, and yielded high performance in organic electronic devices. This article reviews recent developments in the area of thiazole-based organic semiconductors, particularly thiazole, bithiazole, thiazolothiazole and benzobisthiazole-based small molecules and polymers, for applications in organic field-effect transistors, solar cells and light-emitting diodes. The remaining problems and challenges, and the key research direction in near future are discussed. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Exploration of Gas Discharges with GaAs, GaP and ZnSe Electrodes Under Atmospheric Pressure

NASA Astrophysics Data System (ADS)

Kurt, H. Hilal

2018-03-01

This work reports on the electrical and optical characterization of the atmospheric pressure glow discharge regimes for different semiconductor electrodes made of GaAs, GaP and ZnSe. The discharge cell is driven by DC feeding voltages at a wide pressure range of 0.66-120 kPa in argon and air media for different interelectrode gaps. The discharge phenomena including different stages of discharges such as glow and Townsend breakdown have been examined. In addition, the infrared sensitivities of the semiconducting materials are evaluated in the micro-discharge cell and discharge light emission measurements have been performed. The qualities of the semiconducting electrode samples can be determined by seeking the homogeneity of the discharge light emission for the optoelectronic device applications. Operation of optical devices under atmospheric pressures gives certain advantages for manufacturing of the devices including the material processing and surface treatment procedures. Besides, finite element analyses of the overall experimental system have been performed for the abovementioned semiconductors. The electron densities and potential patterns have been determined on the discharge cell plane between the electrodes. The findings have proven that the electron densities along the plasma cell depend on both the semiconductor type and plasma parameters.

Extremely high frequency RF effects on electronics.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Loubriel, Guillermo Manuel; Vigliano, David; Coleman, Phillip Dale

The objective of this work was to understand the fundamental physics of extremely high frequency RF effects on electronics. To accomplish this objective, we produced models, conducted simulations, and performed measurements to identify the mechanisms of effects as frequency increases into the millimeter-wave regime. Our purpose was to answer the questions, 'What are the tradeoffs between coupling, transmission losses, and device responses as frequency increases?', and, 'How high in frequency do effects on electronic systems continue to occur?' Using full wave electromagnetics codes and a transmission-line/circuit code, we investigated how extremely high-frequency RF propagates on wires and printed circuit boardmore » traces. We investigated both field-to-wire coupling and direct illumination of printed circuit boards to determine the significant mechanisms for inducing currents at device terminals. We measured coupling to wires and attenuation along wires for comparison to the simulations, looking at plane-wave coupling as it launches modes onto single and multiconductor structures. We simulated the response of discrete and integrated circuit semiconductor devices to those high-frequency currents and voltages, using SGFramework, the open-source General-purpose Semiconductor Simulator (gss), and Sandia's Charon semiconductor device physics codes. This report documents our findings.« less

Semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit [Knoxville, TN

2011-03-15

Novel articles and methods to fabricate the same resulting in flexible, large-area, triaxially textured, single-crystal or single-crystal-like, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Semiconductor-based, large-area, flexible, electronic devices on {110}<100> oriented substrates

DOEpatents

Goyal, Amit

2014-08-05

Novel articles and methods to fabricate the same resulting in flexible, oriented, semiconductor-based, electronic devices on {110}<100> textured substrates are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

[100] or [110] aligned, semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit

2015-03-24

Novel articles and methods to fabricate the same resulting in flexible, large-area, [100] or [110] textured, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Spontaneously formed high-performance charge-transport layers of organic single-crystal semiconductors on precisely synthesized insulating polymers

NASA Astrophysics Data System (ADS)

Makita, Tatsuyuki; Sasaki, Masayuki; Annaka, Tatsuro; Sasaki, Mari; Matsui, Hiroyuki; Mitsui, Chikahiko; Kumagai, Shohei; Watanabe, Shun; Hayakawa, Teruaki; Okamoto, Toshihiro; Takeya, Jun

2017-04-01

Charge-transporting semiconductor layers with high carrier mobility and low trap-density, desired for high-performance organic transistors, are spontaneously formed as a result of thermodynamic phase separation from a blend of π-conjugated small molecules and precisely synthesized insulating polymers dissolved in an aromatic solvent. A crystal film grows continuously to the size of centimeters, with the critical conditions of temperature, concentrations, and atmosphere. It turns out that the molecular weight of the insulating polymers plays an essential role in stable film growth and interfacial homogeneity at the phase separation boundary. Fabricating the transistor devices directly at the semiconductor-insulator boundaries, we demonstrate that the mixture of 3,11-didecyldinaphtho[2,3-d:2',3'-d']benzo[1,2-b:4,5-b']dithiophene and poly(methyl methacrylate) with the optimized weight-average molecular weight shows excellent device performances. The spontaneous phase separation with a one-step fabrication process leads to a high mobility up to 10 cm2 V-1 s-1 and a low subthreshold swing of 0.25 V dec-1 even without any surface treatment such as self-assembled monolayer modifications on oxide gate insulators.

Reduction of Charge Traps and Stability Enhancement in Solution-Processed Organic Field-Effect Transistors Based on a Blended n-Type Semiconductor.

PubMed

Campos, Antonio; Riera-Galindo, Sergi; Puigdollers, Joaquim; Mas-Torrent, Marta

2018-05-09

Solution-processed n-type organic field-effect transistors (OFETs) are essential elements for developing large-area, low-cost, and all organic logic/complementary circuits. Nonetheless, the development of air-stable n-type organic semiconductors (OSCs) lags behind their p-type counterparts. The trapping of electrons at the semiconductor-dielectric interface leads to a lower performance and operational stability. Herein, we report printed small-molecule n-type OFETs based on a blend with a binder polymer, which enhances the device stability due to the improvement of the semiconductor-dielectric interface quality and a self-encapsulation. Both combined effects prevent the fast deterioration of the OSC. Additionally, a complementary metal-oxide semiconductor-like inverter is fabricated depositing p-type and n-type OSCs simultaneously.

Pushing the Performance Limit of Sub-100 nm Molybdenum Disulfide Transistors.

PubMed

Liu, Yuan; Guo, Jian; Wu, Yecun; Zhu, Enbo; Weiss, Nathan O; He, Qiyuan; Wu, Hao; Cheng, Hung-Chieh; Xu, Yang; Shakir, Imran; Huang, Yu; Duan, Xiangfeng

2016-10-12

Two-dimensional semiconductors (2DSCs) such as molybdenum disulfide (MoS 2 ) have attracted intense interest as an alternative electronic material in the postsilicon era. However, the ON-current density achieved in 2DSC transistors to date is considerably lower than that of silicon devices, and it remains an open question whether 2DSC transistors can offer competitive performance. A high current device requires simultaneous minimization of the contact resistance and channel length, which is a nontrivial challenge for atomically thin 2DSCs, since the typical low contact resistance approaches for 2DSCs either degrade the electronic properties of the channel or are incompatible with the fabrication process for short channel devices. Here, we report a new approach toward high-performance MoS 2 transistors by using a physically assembled nanowire as a lift-off mask to create ultrashort channel devices with pristine MoS 2 channel and self-aligned low resistance metal/graphene hybrid contact. With the optimized contact in short channel devices, we demonstrate sub-100 nm MoS 2 transistor delivering a record high ON-current of 0.83 mA/μm at 300 K and 1.48 mA/μm at 20 K, which compares well with that of silicon devices. Our study, for the first time, demonstrates that the 2DSC transistors can offer comparable performance to the 2017 target for silicon transistors in International Technology Roadmap for Semiconductors (ITRS), marking an important milestone in 2DSC electronics.

Evidence of Type-II Band Alignment in III-nitride Semiconductors: Experimental and theoretical investigation for In0.17Al0.83N/GaN heterostructures

PubMed Central

Wang, Jiaming; Xu, Fujun; Zhang, Xia; An, Wei; Li, Xin-Zheng; Song, Jie; Ge, Weikun; Tian, Guangshan; Lu, Jing; Wang, Xinqiang; Tang, Ning; Yang, Zhijian; Li, Wei; Wang, Weiying; Jin, Peng; Chen, Yonghai; Shen, Bo

2014-01-01

Type-II band alignment structure is coveted in the design of photovoltaic devices and detectors, since it is beneficial for the transport of photogenerated carriers. Regrettably, for group-III-nitride wide bandgap semiconductors, all existing devices are limited to type-I heterostructures, owing to the unavailable of type-II ones. This seriously restricts the designing flexibility for optoelectronic devices and consequently the relevant performance of this material system. Here we show a brandnew type-II band alignment of the lattice-matched In0.17Al0.83N/GaN heterostructure from the perspective of both experimental observations and first-principle theoretical calculations. The band discontinuity is dominated by the conduction band offset ΔEC, with a small contribution from the valence band offset ΔEV which equals 0.1 eV (with being above). Our work may open up new prospects to realize high-performance III-Nitrides optoelectronic devices based on type-II energy band engineering. PMID:25283334

Evidence of type-II band alignment in III-nitride semiconductors: experimental and theoretical investigation for In 0.17 Al 0.83 N/GaN heterostructures.

PubMed

Wang, Jiaming; Xu, Fujun; Zhang, Xia; An, Wei; Li, Xin-Zheng; Song, Jie; Ge, Weikun; Tian, Guangshan; Lu, Jing; Wang, Xinqiang; Tang, Ning; Yang, Zhijian; Li, Wei; Wang, Weiying; Jin, Peng; Chen, Yonghai; Shen, Bo

2014-10-06

Type-II band alignment structure is coveted in the design of photovoltaic devices and detectors, since it is beneficial for the transport of photogenerated carriers. Regrettably, for group-III-nitride wide bandgap semiconductors, all existing devices are limited to type-I heterostructures, owing to the unavailable of type-II ones. This seriously restricts the designing flexibility for optoelectronic devices and consequently the relevant performance of this material system. Here we show a brandnew type-II band alignment of the lattice-matched In 0.17 Al 0.83 N/GaN heterostructure from the perspective of both experimental observations and first-principle theoretical calculations. The band discontinuity is dominated by the conduction band offset ΔEC, with a small contribution from the valence band offset ΔEV which equals 0.1 eV (with E(AlInN(VBM) being above E(GaN)(VBM)). Our work may open up new prospects to realize high-performance III-Nitrides optoelectronic devices based on type-II energy band engineering.

Zinc Alloys for the Fabrication of Semiconductor Devices

NASA Technical Reports Server (NTRS)

Ryu, Yungryel; Lee, Tae S.

2009-01-01

ZnBeO and ZnCdSeO alloys have been disclosed as materials for the improvement in performance, function, and capability of semiconductor devices. The alloys can be used alone or in combination to form active photonic layers that can emit over a range of wavelength values. Materials with both larger and smaller band gaps would allow for the fabrication of semiconductor heterostructures that have increased function in the ultraviolet (UV) region of the spectrum. ZnO is a wide band-gap material possessing good radiation-resistance properties. It is desirable to modify the energy band gap of ZnO to smaller values than that for ZnO and to larger values than that for ZnO for use in semiconductor devices. A material with band gap energy larger than that of ZnO would allow for the emission at shorter wavelengths for LED (light emitting diode) and LD (laser diode) devices, while a material with band gap energy smaller than that of ZnO would allow for emission at longer wavelengths for LED and LD devices. The amount of Be in the ZnBeO alloy system can be varied to increase the energy bandgap of ZnO to values larger than that of ZnO. The amount of Cd and Se in the ZnCdSeO alloy system can be varied to decrease the energy band gap of ZnO to values smaller than that of ZnO. Each alloy formed can be undoped or can be p-type doped using selected dopant elements, or can be n-type doped using selected dopant elements. The layers and structures formed with both the ZnBeO and ZnCdSeO semiconductor alloys - including undoped, p-type-doped, and n-type-doped types - can be used for fabricating photonic and electronic semiconductor devices for use in photonic and electronic applications. These devices can be used in LEDs, LDs, FETs (field effect transistors), PN junctions, PIN junctions, Schottky barrier diodes, UV detectors and transmitters, and transistors and transparent transistors. They also can be used in applications for lightemitting display, backlighting for displays, UV and visible transmitters and detectors, high-frequency radar, biomedical imaging, chemical compound identification, molecular identification and structure, gas sensors, imaging systems, and for the fundamental studies of atoms, molecules, gases, vapors, and solids.

Tunable molecular orientation and elevated thermal stability of vapor-deposited organic semiconductors

DOE PAGES

Dalal, Shakeel S.; Walters, Diane M.; Lyubimov, Ivan; ...

2015-03-23

Physical vapor deposition is commonly used to prepare organic glasses that serve as the active layers in light-emitting diodes, photovoltaics, and other devices. Recent work has shown that orienting the molecules in such organic semiconductors can significantly enhance device performance. In this paper, we apply a high-throughput characterization scheme to investigate the effect of the substrate temperature (T substrate) on glasses of three organic molecules used as semiconductors. The optical and material properties are evaluated with spectroscopic ellipsometry. We find that molecular orientation in these glasses is continuously tunable and controlled by T substrate/T g, where T g is themore » glass transition temperature. All three molecules can produce highly anisotropic glasses; the dependence of molecular orientation upon substrate temperature is remarkably similar and nearly independent of molecular length. All three compounds form “stable glasses” with high density and thermal stability, and have properties similar to stable glasses prepared from model glass formers. Simulations reproduce the experimental trends and explain molecular orientation in the deposited glasses in terms of the surface properties of the equilibrium liquid. Finally, by showing that organic semiconductors form stable glasses, these results provide an avenue for systematic performance optimization of active layers in organic electronics.« less

Collective Poisson process with periodic rates: applications in physics from micro-to nanodevices.

PubMed

da Silva, Roberto; Lamb, Luis C; Wirth, Gilson Inacio

2011-01-28

Continuous reductions in the dimensions of semiconductor devices have led to an increasing number of noise sources, including random telegraph signals (RTS) due to the capture and emission of electrons by traps at random positions between oxide and semiconductor. The models traditionally used for microscopic devices become of limited validity in nano- and mesoscale systems since, in such systems, distributed quantities such as electron and trap densities, and concepts like electron mobility, become inadequate to model electrical behaviour. In addition, current experimental works have shown that RTS in semiconductor devices based on carbon nanotubes lead to giant current fluctuations. Therefore, the physics of this phenomenon and techniques to decrease the amplitudes of RTS need to be better understood. This problem can be described as a collective Poisson process under different, but time-independent, rates, τ(c) and τ(e), that control the capture and emission of electrons by traps distributed over the oxide. Thus, models that consider calculations performed under time-dependent periodic capture and emission rates should be of interest in order to model more efficient devices. We show a complete theoretical description of a model that is capable of showing a noise reduction of current fluctuations in the time domain, and a reduction of the power spectral density in the frequency domain, in semiconductor devices as predicted by previous experimental work. We do so through numerical integrations and a novel Monte Carlo Markov chain (MCMC) algorithm based on microscopic discrete values. The proposed model also handles the ballistic regime, relevant in nano- and mesoscale devices. Finally, we show that the ballistic regime leads to nonlinearity in the electrical behaviour.

Processes for multi-layer devices utilizing layer transfer

DOEpatents

Nielson, Gregory N; Sanchez, Carlos Anthony; Tauke-Pedretti, Anna; Kim, Bongsang; Cederberg, Jeffrey; Okandan, Murat; Cruz-Campa, Jose Luis; Resnick, Paul J

2015-02-03

A method includes forming a release layer over a donor substrate. A plurality of devices made of a first semiconductor material are formed over the release layer. A first dielectric layer is formed over the plurality of devices such that all exposed surfaces of the plurality of devices are covered by the first dielectric layer. The plurality of devices are chemically attached to a receiving device made of a second semiconductor material different than the first semiconductor material, the receiving device having a receiving substrate attached to a surface of the receiving device opposite the plurality of devices. The release layer is etched to release the donor substrate from the plurality of devices. A second dielectric layer is applied over the plurality of devices and the receiving device to mechanically attach the plurality of devices to the receiving device.

Reliability improvement of 1 mil aluminum wire bonds for semiconductors, technical performance summary

NASA Technical Reports Server (NTRS)

1971-01-01

The reliability of semiconductor devices as influenced by the reliability of wire bonds used in the assembly of the devices is investigated. The specific type of failure dealt with involves fracture of wire bonds as a result of repeated flexure of the wire at the heel of the bond when the devices are operated in an on-off mode. The mechanism of failure is one of induced fracture of the wire. To improve the reliability of a chosen transistor, one-mil diameter wires of aluminum with various alloy additions were studied using an accelerated fatigue testing machine. In addition, the electroprobe was used to study the metallurgy of the wires as to microstructure and kinetics of the growth of insoluble phases. Thermocompression and ultrasonic bonding techniques were also investigated.

Synthesis, fabrication and characterization of Ge/Si axial nanowire heterostructure tunnel FETs

DOE Office of Scientific and Technical Information (OSTI.GOV)

Picraux, Samuel T; Dayeh, Shadi A

2010-01-01

Axial Ge/Si heterostructure nanowires allow energy band-edge engineering along the axis of the nanowire, which is the charge transport direction, and the realization of asymmetric devices for novel device architectures. This work reports on two advances in the area of heterostructure nanowires and tunnel FETs: (i) the realization of 100% compositionally modulated Si/Ge axial heterostructure nanowires with lengths suitable for device fabrication and (ii) the design and implementation of Schottky barrier tunnel FETs on these nanowires for high-on currents and suppressed ambipolar behavior. Initial prototype devices resulted in a current drive in excess of 100 {micro}A/{micro}m (I/{pi}D) and 10{sup 5}more » I{sub on}/I{sub off} ratios. These results demonstrate the potential of such asymmetric heterostructures (both in the semiconductor channel and metal-semiconductor barrier heights) for low-power and high performance electronics.« less

Fully Solution-Processed Flexible Organic Thin Film Transistor Arrays with High Mobility and Exceptional Uniformity

PubMed Central

Fukuda, Kenjiro; Takeda, Yasunori; Mizukami, Makoto; Kumaki, Daisuke; Tokito, Shizuo

2014-01-01

Printing fully solution-processed organic electronic devices may potentially revolutionize production of flexible electronics for various applications. However, difficulties in forming thin, flat, uniform films through printing techniques have been responsible for poor device performance and low yields. Here, we report on fully solution-processed organic thin-film transistor (TFT) arrays with greatly improved performance and yields, achieved by layering solution-processable materials such as silver nanoparticle inks, organic semiconductors, and insulating polymers on thin plastic films. A treatment layer improves carrier injection between the source/drain electrodes and the semiconducting layer and dramatically reduces contact resistance. Furthermore, an organic semiconductor with large-crystal grains results in TFT devices with shorter channel lengths and higher field-effect mobilities. We obtained mobilities of over 1.2 cm2 V−1 s−1 in TFT devices with channel lengths shorter than 20 μm. By combining these fabrication techniques, we built highly uniform organic TFT arrays with average mobility levels as high as 0.80 cm2 V−1 s−1 and ideal threshold voltages of 0 V. These results represent major progress in the fabrication of fully solution-processed organic TFT device arrays. PMID:24492785

GaN-on-Silicon - Present capabilities and future directions

NASA Astrophysics Data System (ADS)

Boles, Timothy

2018-02-01

Gallium Nitride, in the form of epitaxial HEMT transistors on various substrate materials, is the newest and most promising semiconductor technology for high performance devices in the RF, microwave, and mmW arenas. This is particularly true for GaN-on-Silicon based devices and MMIC's which enable both state-of-the-art high frequency functionality and the ability to scale production into large wafer diameter CMOS foundries. The design and development of GaN-on-Silicon structures and devices will be presented beginning with the basic material parameters, growth of the required epitaxial construction, and leading to the fundamental operational theory of high frequency, high power HEMTs. In this discussion comparisons will be made with alternative substrate materials with emphasis on contrasting the inherent advantages of a silicon based system. Theory of operation of microwave and mmW high power HEMT devices will be presented with special emphasis on fundamental limitations of device performance including inherent frequency limiting transit time analysis, required impedance transformations, internal and external parasitic reactance, thermal impedance optimization, and challenges improved by full integration into monolithic MMICs. Lastly, future directions for implementing GaN-on-Silicon into mainstream CMOS silicon semiconductor technologies will be discussed.

Intensity noise properties of a compact laser device based on a miniaturized MOPA system for spectroscopic applications

NASA Astrophysics Data System (ADS)

Baumgärtner, S.; Juhl, S.; Opalevs, D.; Sahm, A.; Hofmann, J.; Leisching, P.; Paschke, K.

2018-02-01

We present a novel compact laser device based on a semiconductor master-oscillator power-amplifier (MOPA) emitting at 772 nm, suitable for quantum optic and spectroscopy. The optical performance of the laser device is characterized. For miniaturized lasers the thermal management is challenging, we therefore perform thermal simulations and measurements. The first demonstrator is emitting more than 3 W optical power with a linewidth below 2lMHz. Using this MOPA design also compact devices for quantum optics (e.g. rubidium atomic clock) and seed lasers for frequency conversion can be realized [1].

Doped polymer semiconductors with ultrahigh and ultralow work functions for ohmic contacts.

PubMed

Tang, Cindy G; Ang, Mervin C Y; Choo, Kim-Kian; Keerthi, Venu; Tan, Jun-Kai; Syafiqah, Mazlan Nur; Kugler, Thomas; Burroughes, Jeremy H; Png, Rui-Qi; Chua, Lay-Lay; Ho, Peter K H

2016-11-24

To make high-performance semiconductor devices, a good ohmic contact between the electrode and the semiconductor layer is required to inject the maximum current density across the contact. Achieving ohmic contacts requires electrodes with high and low work functions to inject holes and electrons respectively, where the work function is the minimum energy required to remove an electron from the Fermi level of the electrode to the vacuum level. However, it is challenging to produce electrically conducting films with sufficiently high or low work functions, especially for solution-processed semiconductor devices. Hole-doped polymer organic semiconductors are available in a limited work-function range, but hole-doped materials with ultrahigh work functions and, especially, electron-doped materials with low to ultralow work functions are not yet available. The key challenges are stabilizing the thin films against de-doping and suppressing dopant migration. Here we report a general strategy to overcome these limitations and achieve solution-processed doped films over a wide range of work functions (3.0-5.8 electronvolts), by charge-doping of conjugated polyelectrolytes and then internal ion-exchange to give self-compensated heavily doped polymers. Mobile carriers on the polymer backbone in these materials are compensated by covalently bonded counter-ions. Although our self-compensated doped polymers superficially resemble self-doped polymers, they are generated by separate charge-carrier doping and compensation steps, which enables the use of strong dopants to access extreme work functions. We demonstrate solution-processed ohmic contacts for high-performance organic light-emitting diodes, solar cells, photodiodes and transistors, including ohmic injection of both carrier types into polyfluorene-the benchmark wide-bandgap blue-light-emitting polymer organic semiconductor. We also show that metal electrodes can be transformed into highly efficient hole- and electron-injection contacts via the self-assembly of these doped polyelectrolytes. This consequently allows ambipolar field-effect transistors to be transformed into high-performance p- and n-channel transistors. Our strategy provides a method for producing ohmic contacts not only for organic semiconductors, but potentially for other advanced semiconductors as well, including perovskites, quantum dots, nanotubes and two-dimensional materials.

Photovoltaic healing of non-uniformities in semiconductor devices

DOEpatents

Karpov, Victor G.; Roussillon, Yann; Shvydka, Diana; Compaan, Alvin D.; Giolando, Dean M.

2006-08-29

A method of making a photovoltaic device using light energy and a solution to normalize electric potential variations in the device. A semiconductor layer having nonuniformities comprising areas of aberrant electric potential deviating from the electric potential of the top surface of the semiconductor is deposited onto a substrate layer. A solution containing an electrolyte, at least one bonding material, and positive and negative ions is applied over the top surface of the semiconductor. Light energy is applied to generate photovoltage in the semiconductor, causing a redistribution of the ions and the bonding material to the areas of aberrant electric potential. The bonding material selectively bonds to the nonuniformities in a manner such that the electric potential of the nonuniformities is normalized relative to the electric potential of the top surface of the semiconductor layer. A conductive electrode layer is then deposited over the top surface of the semiconductor layer.

{100}<100> or 45.degree.-rotated {100}<100>, semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit [Knoxville, TN

2012-05-15

Novel articles and methods to fabricate the same resulting in flexible, {100}<100> or 45.degree.-rotated {100}<100> oriented, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Electrothermal energy conversion using electron gas volumetric change inside semiconductors

NASA Astrophysics Data System (ADS)

Yazawa, K.; Shakouri, A.

2016-07-01

We propose and analyze an electrothermal energy converter using volumetric changes in non-equilibrium electron gas inside semiconductors. The geometric concentration of electron gas under an electric field increases the effective pressure of the electrons, and then a barrier filters out cold electrons, acting like a valve. Nano- and micro-scale features enable hot electrons to arrive at the contact in a short enough time to avoid thermalization with the lattice. Key length and time scales, preliminary device geometry, and anticipated efficiency are estimated for electronic analogs of Otto and Brayton power generators and Joule-Thomson micro refrigerators on a chip. The power generators convert the energy of incident photons from the heat source to electrical current, and the refrigerator can reduce the temperature of electrons in a semiconductor device. The analytic calculations show that a large energy conversion efficiency or coefficient of performance may be possible.

Water soluble nano-scale transient material germanium oxide for zero toxic waste based environmentally benign nano-manufacturing

NASA Astrophysics Data System (ADS)

Almuslem, A. S.; Hanna, A. N.; Yapici, T.; Wehbe, N.; Diallo, E. M.; Kutbee, A. T.; Bahabry, R. R.; Hussain, M. M.

2017-02-01

In the recent past, with the advent of transient electronics for mostly implantable and secured electronic applications, the whole field effect transistor structure has been dissolved in a variety of chemicals. Here, we show simple water soluble nano-scale (sub-10 nm) germanium oxide (GeO2) as the dissolvable component to remove the functional structures of metal oxide semiconductor devices and then reuse the expensive germanium substrate again for functional device fabrication. This way, in addition to transiency, we also show an environmentally friendly manufacturing process for a complementary metal oxide semiconductor (CMOS) technology. Every year, trillions of complementary metal oxide semiconductor (CMOS) electronics are manufactured and billions are disposed, which extend the harmful impact to our environment. Therefore, this is a key study to show a pragmatic approach for water soluble high performance electronics for environmentally friendly manufacturing and bioresorbable electronic applications.

Electrothermal energy conversion using electron gas volumetric change inside semiconductors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yazawa, K.; Shakouri, A.

2016-07-25

We propose and analyze an electrothermal energy converter using volumetric changes in non-equilibrium electron gas inside semiconductors. The geometric concentration of electron gas under an electric field increases the effective pressure of the electrons, and then a barrier filters out cold electrons, acting like a valve. Nano- and micro-scale features enable hot electrons to arrive at the contact in a short enough time to avoid thermalization with the lattice. Key length and time scales, preliminary device geometry, and anticipated efficiency are estimated for electronic analogs of Otto and Brayton power generators and Joule-Thomson micro refrigerators on a chip. The powermore » generators convert the energy of incident photons from the heat source to electrical current, and the refrigerator can reduce the temperature of electrons in a semiconductor device. The analytic calculations show that a large energy conversion efficiency or coefficient of performance may be possible.« less

Cycling excitation process: An ultra efficient and quiet signal amplification mechanism in semiconductor

NASA Astrophysics Data System (ADS)

Liu, Yu-Hsin; Yan, Lujiang; Zhang, Alex Ce; Hall, David; Niaz, Iftikhar Ahmad; Zhou, Yuchun; Sham, L. J.; Lo, Yu-Hwa

2015-08-01

Signal amplification, performed by transistor amplifiers with its merit rated by the efficiency and noise characteristics, is ubiquitous in all electronic systems. Because of transistor thermal noise, an intrinsic signal amplification mechanism, impact ionization was sought after to complement the limits of transistor amplifiers. However, due to the high operation voltage (30-200 V typically), low power efficiency, limited scalability, and, above all, rapidly increasing excess noise with amplification factor, impact ionization has been out of favor for most electronic systems except for a few applications such as avalanche photodetectors and single-photon Geiger detectors. Here, we report an internal signal amplification mechanism based on the principle of the phonon-assisted cycling excitation process (CEP). Si devices using this concept show ultrahigh gain, low operation voltage, CMOS compatibility, and, above all, quantum limit noise performance that is 30 times lower than devices using impact ionization. Established on a unique physical effect of attractive properties, CEP-based devices can potentially revolutionize the fields of semiconductor electronics.

A self-assembled microbonded germanium/silicon heterojunction photodiode for 25 Gb/s high-speed optical interconnects

PubMed Central

Tseng, Chih-Kuo; Chen, Wei-Ting; Chen, Ku-Hung; Liu, Han-Din; Kang, Yimin; Na, Neil; Lee, Ming-Chang M.

2013-01-01

A novel technique using surface tension to locally bond germanium (Ge) on silicon (Si) is presented for fabricating high performance Ge/Si photodiodes. Surface tension is a cohesive force among liquid molecules that tends to bring contiguous objects in contact to maintain a minimum surface energy. We take advantage of this phenomenon to fabricate a heterojunction optoelectronic device where the lattice constants of joined semiconductors are different. A high-speed Ge/Si heterojunction waveguide photodiode is presented by microbonding a beam-shaped Ge, first grown by rapid-melt-growth (RMG) method, on top of a Si waveguide via surface tension. Excellent device performances such as an operating bandwidth of 17 GHz and a responsivity of 0.66 and 0.70 A/W at the reverse bias of −4 and −6 V, respectively, are demonstrated. This technique can be simply implemented via modern complementary metal-oxide-semiconductor (CMOS) fabrication technologies for integrating Ge on Si devices. PMID:24232956

Solid state photosensitive devices which employ isolated photosynthetic complexes

DOEpatents

Peumans, Peter; Forrest, Stephen R.

2009-09-22

Solid state photosensitive devices including photovoltaic devices are provided which comprise a first electrode and a second electrode in superposed relation; and at least one isolated Light Harvesting Complex (LHC) between the electrodes. Preferred photosensitive devices comprise an electron transport layer formed of a first photoconductive organic semiconductor material, adjacent to the LHC, disposed between the first electrode and the LHC; and a hole transport layer formed of a second photoconductive organic semiconductor material, adjacent to the LHC, disposed between the second electrode and the LHC. Solid state photosensitive devices of the present invention may comprise at least one additional layer of photoconductive organic semiconductor material disposed between the first electrode and the electron transport layer; and at least one additional layer of photoconductive organic semiconductor material, disposed between the second electrode and the hole transport layer. Methods of generating photocurrent are provided which comprise exposing a photovoltaic device of the present invention to light. Electronic devices are provided which comprise a solid state photosensitive device of the present invention.

Method for making a monolithic integrated high-T.sub.c superconductor-semiconductor structure

NASA Technical Reports Server (NTRS)

Burns, Michael J. (Inventor); de la Houssaye, Paul R. (Inventor); Russell, Stephen D. (Inventor); Garcia, Graham A. (Inventor); Barfknecht, Andrew T. (Inventor); Clayton, Stanley R. (Inventor)

2000-01-01

A method for the fabrication of active semiconductor and high-temperature perconducting devices on the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.

Tapered rib fiber coupler for semiconductor optical devices

DOEpatents

Vawter, Gregory A.; Smith, Robert Edward

2001-01-01

A monolithic tapered rib waveguide for transformation of the spot size of light between a semiconductor optical device and an optical fiber or from the fiber into the optical device. The tapered rib waveguide is integrated into the guiding rib atop a cutoff mesa type semiconductor device such as an expanded mode optical modulator or and expanded mode laser. The tapered rib acts to force the guided light down into the mesa structure of the semiconductor optical device instead of being bound to the interface between the bottom of the guiding rib and the top of the cutoff mesa. The single mode light leaving or entering the output face of the mesa structure then can couple to the optical fiber at coupling losses of 1.0 dB or less.

Silicon superlattices: Theory and application to semiconductor devices

NASA Technical Reports Server (NTRS)

Moriarty, J. A.

1981-01-01

Silicon superlattices and their applicability to improved semiconductor devices were studied. The device application potential of the atomic like dimension of III-V semiconductor superlattices fabricated in the form of ultrathin periodically layered heterostructures was examined. Whether this leads to quantum size effects and creates the possibility to alter familiar transport and optical properties over broad physical ranges was studied. Applications to improved semiconductor lasers and electrondevices were achieved. Possible application of silicon sperlattices to faster high speed computing devices was examined. It was found that the silicon lattices show features of smaller fundamental energyband gaps and reduced effective masses. The effects correlate strongly with both the chemical and geometrical nature of the superlattice.

Interfacial electronic structure of a hybrid organic-inorganic optical upconverter device: The role of interface states

NASA Astrophysics Data System (ADS)

Tsai, K. Y. F.; Helander, M. G.; Lu, Z. H.

2009-04-01

Organic-inorganic hybrid heterojunctions are critical for the integration of organic electronics with traditional Si and III-V semiconductor microelectronics. The amorphous nature of organic semiconductors eliminates the stringent lattice-matching requirements in semiconductor monolithic growth. However, as of yet it is unclear what driving forces dictate the energy-level alignment at hybrid organic-inorganic heterojunctions. Using photoelectron spectroscopy we investigate the energy-level alignment at the hybrid organic-inorganic heterojunction formed between S-passivated InP(100) and several commonly used hole injection/transport molecules, namely, copper phthalocyanine (CuPc), N ,N'-diphenyl-N ,N'-bis-(1-naphthyl)-1-1'-biphenyl-4,4'-diamine (α-NPD), and fullerene (C60). The energy-level alignment at the hybrid organic-inorganic heterojunction is found to be consistent with traditional interface dipole theory, originally developed to describe Schottky contacts. Contrary to conventional wisdom, hole injection from S-passivated InP(100) into an organic semiconductor is found to originate from interface states at or near the Fermi level, rather than from the valance band maximum of the semiconductor. As a result the barrier height for hole injection is defined by the offset between the surface Fermi level of the S-passivated InP(100) and the highest occupied molecular orbital of the organic. This finding sheds new light on the unusual trend in device performance reported in literature for such hybrid organic-inorganic heterojunction devices.

Semiconductor structures having electrically insulating and conducting portions formed from an AlSb-alloy layer

DOEpatents

Spahn, Olga B.; Lear, Kevin L.

1998-01-01

A semiconductor structure. The semiconductor structure comprises a plurality of semiconductor layers formed on a substrate including at least one layer of a III-V compound semiconductor alloy comprising aluminum (Al) and antimony (Sb), with at least a part of the AlSb-alloy layer being chemically converted by an oxidation process to form superposed electrically insulating and electrically conducting portions. The electrically insulating portion formed from the AlSb-alloy layer comprises an oxide of aluminum (e.g. Al.sub.2 O.sub.3), while the electrically conducting portion comprises Sb. A lateral oxidation process allows formation of the superposed insulating and conducting portions below monocrystalline semiconductor layers for forming many different types of semiconductor structures having particular utility for optoelectronic devices such as light-emitting diodes, edge-emitting lasers, vertical-cavity surface-emitting lasers, photodetectors and optical modulators (waveguide and surface normal), and for electronic devices such as heterojunction bipolar transistors, field-effect transistors and quantum-effect devices. The invention is expected to be particularly useful for forming light-emitting devices for use in the 1.3-1.6 .mu.m wavelength range, with the AlSb-alloy layer acting to define an active region of the device and to effectively channel an electrical current therein for efficient light generation.

Multi-material optoelectronic fiber devices

NASA Astrophysics Data System (ADS)

Sorin, F.; Yan, Wei; Volpi, Marco; Page, Alexis G.; Nguyen Dang, Tung; Qu, Y.

2017-05-01

The recent ability to integrate materials with different optical and optoelectronic properties in prescribed architectures within flexible fibers is enabling novel opportunities for advanced optical probes, functional surfaces and smart textiles. In particular, the thermal drawing process has known a series of breakthroughs in recent years that have expanded the range of materials and architectures that can be engineered within uniform fibers. Of particular interest in this presentation will be optoelectronic fibers that integrate semiconductors electrically addressed by conducting materials. These long, thin and flexible fibers can intercept optical radiation, localize and inform on a beam direction, detect its wavelength and even harness its energy. They hence constitute ideal candidates for applications such as remote and distributed sensing, large-area optical-detection arrays, energy harvesting and storage, innovative health care solutions, and functional fabrics. To improve performance and device complexity, tremendous progresses have been made in terms of the integrated semiconductor architectures, evolving from large fiber solid-core, to sub-hundred nanometer thin-films, nano-filaments and even nanospheres. To bridge the gap between the optoelectronic fiber concept and practical applications however, we still need to improve device performance and integration. In this presentation we will describe the materials and processing approaches to realize optoelectronic fibers, as well as give a few examples of demonstrated systems for imaging as well as light and chemical sensing. We will then discuss paths towards practical applications focusing on two main points: fiber connectivity, and improving the semiconductor microstructure by developing scalable approaches to make fiber-integrated single-crystal nanowire based devices.

Photoelectrochemical devices for solar water splitting - materials and challenges.

PubMed

Jiang, Chaoran; Moniz, Savio J A; Wang, Aiqin; Zhang, Tao; Tang, Junwang

2017-07-31

It is widely accepted within the community that to achieve a sustainable society with an energy mix primarily based on solar energy we need an efficient strategy to convert and store sunlight into chemical fuels. A photoelectrochemical (PEC) device would therefore play a key role in offering the possibility of carbon-neutral solar fuel production through artificial photosynthesis. The past five years have seen a surge in the development of promising semiconductor materials. In addition, low-cost earth-abundant co-catalysts are ubiquitous in their employment in water splitting cells due to the sluggish kinetics of the oxygen evolution reaction (OER). This review commences with a fundamental understanding of semiconductor properties and charge transfer processes in a PEC device. We then describe various configurations of PEC devices, including single light-absorber cells and multi light-absorber devices (PEC, PV-PEC and PV/electrolyser tandem cell). Recent progress on both photoelectrode materials (light absorbers) and electrocatalysts is summarized, and important factors which dominate photoelectrode performance, including light absorption, charge separation and transport, surface chemical reaction rate and the stability of the photoanode, are discussed. Controlling semiconductor properties is the primary concern in developing materials for solar water splitting. Accordingly, strategies to address the challenges for materials development in this area, such as the adoption of smart architectures, innovative device configuration design, co-catalyst loading, and surface protection layer deposition, are outlined throughout the text, to deliver a highly efficient and stable PEC device for water splitting.

All oxide semiconductor-based bidirectional vertical p-n-p selectors for 3D stackable crossbar-array electronics

PubMed Central

Bae, Yoon Cheol; Lee, Ah Rahm; Baek, Gwang Ho; Chung, Je Bock; Kim, Tae Yoon; Park, Jea Gun; Hong, Jin Pyo

2015-01-01

Three-dimensional (3D) stackable memory devices including nano-scaled crossbar array are central for the realization of high-density non-volatile memory electronics. However, an essential sneak path issue affecting device performance in crossbar array remains a bottleneck and a grand challenge. Therefore, a suitable bidirectional selector as a two-way switch is required to facilitate a major breakthrough in the 3D crossbar array memory devices. Here, we show the excellent selectivity of all oxide p-/n-type semiconductor-based p-n-p open-based bipolar junction transistors as selectors in crossbar memory array. We report that bidirectional nonlinear characteristics of oxide p-n-p junctions can be highly enhanced by manipulating p-/n-type oxide semiconductor characteristics. We also propose an associated Zener tunneling mechanism that explains the unique features of our p-n-p selector. Our experimental findings are further extended to confirm the profound functionality of oxide p-n-p selectors integrated with several bipolar resistive switching memory elements working as storage nodes. PMID:26289565

Small molecule organic semiconductors on the move: promises for future solar energy technology.

PubMed

Mishra, Amaresh; Bäuerle, Peter

2012-02-27

This article is written from an organic chemist's point of view and provides an up-to-date review about organic solar cells based on small molecules or oligomers as absorbers and in detail deals with devices that incorporate planar-heterojunctions (PHJ) and bulk heterojunctions (BHJ) between a donor (p-type semiconductor) and an acceptor (n-type semiconductor) material. The article pays particular attention to the design and development of molecular materials and their performance in corresponding devices. In recent years, a substantial amount of both, academic and industrial research, has been directed towards organic solar cells, in an effort to develop new materials and to improve their tunability, processability, power conversion efficiency, and stability. On the eve of commercialization of organic solar cells, this review provides an overview over efficiencies attained with small molecules/oligomers in OSCs and reflects materials and device concepts developed over the last decade. Approaches to enhancing the efficiency of organic solar cells are analyzed. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Evolution of corundum-structured III-oxide semiconductors: Growth, properties, and devices

NASA Astrophysics Data System (ADS)

Fujita, Shizuo; Oda, Masaya; Kaneko, Kentaro; Hitora, Toshimi

2016-12-01

The recent progress and development of corundum-structured III-oxide semiconductors are reviewed. They allow bandgap engineering from 3.7 to ∼9 eV and function engineering, leading to highly durable electronic devices and deep ultraviolet optical devices as well as multifunctional devices. Mist chemical vapor deposition can be a simple and safe growth technology and is advantageous for reducing energy and cost for the growth. This is favorable for the wide commercial use of devices at low cost. The III-oxide semiconductors are promising candidates for new devices contributing to sustainable social, economic, and technological development for the future.

Atomic-scale investigations of current and future devices: from nitride-based transistors to quantum computing

NASA Astrophysics Data System (ADS)

Gordon, Luke

Our era is defined by its technology, and our future is dependent on its continued evolution. Over the past few decades, we have witnessed the expansion of advanced technology into all walks of life and all industries, driven by the exponential increase in the speed and power of semiconductor-based devices. However, as the length scale of devices reaches the atomic scale, a deep understanding of atomistic theory and its application is increasingly crucial. In order to illustrate the power of an atomistic approach to understanding devices, we will present results and conclusions from three interlinked projects: n-type doping of III-nitride semiconductors, defects for quantum computing, and macroscopic simulations of devices. First, we will study effective n-type doping of III-nitride semiconductors and their alloys, and analyze the barriers to effective n-type doping of III-nitrides and their alloys. In particular, we will study the formation of DX centers, and predict alloy composition onsets for various III-nitride alloys. In addition, we will perform a comprehensive study of alternative dopants, and provide potential alternative dopants to improve n-type conductivity in AlN and wide-band-gap nitride alloys. Next, we will discuss how atomic-scale defects can act as a curse for the development of quantum computers by contributing to decoherence at an atomic scale, specifically investigating the effect of two-level state defects (TLS) systems in alumina as a source of decoherence in superconducting qubits based on Josephson junctions; and also as a blessing, by allowing the identification of wholly new qubits in different materials, specifically showing calculations on defects in SiC for quantum computing applications. Finally, we will provide examples of recent calculations we have performed for devices using macrosopic device simulations, largely in conjunction with first-principles calculations. Specifically, we will discuss the power of using a multi-scale approach to accurately model oxide and nitride-based heterostructures, and thereby illustrate our ability to predict device performance on scales unreachable using a purely first-principles approach.

Epitaxial Growth of Cubic Crystalline Semiconductor Alloys on Basal Plane of Trigonal or Hexagonal Crystal

NASA Technical Reports Server (NTRS)

Park, Yeonjoon (Inventor); Choi, Sang H. (Inventor); King, Glen C. (Inventor)

2011-01-01

Hetero-epitaxial semiconductor materials comprising cubic crystalline semiconductor alloys grown on the basal plane of trigonal and hexagonal substrates, in which misfit dislocations are reduced by approximate lattice matching of the cubic crystal structure to underlying trigonal or hexagonal substrate structure, enabling the development of alloyed semiconductor layers of greater thickness, resulting in a new class of semiconductor materials and corresponding devices, including improved hetero-bipolar and high-electron mobility transistors, and high-mobility thermoelectric devices.

Electronics materials research

NASA Technical Reports Server (NTRS)

1982-01-01

The electronic materials and is aimed at the establishment of quantitative relationships underlying crystal growth parameters, materials properties, electronic characteristics and device applications. The overall program evolves about the following main thrust areas: (1) crystal growth novel approaches to engineering of semiconductor materials; (2) investigation of materials properties and electronic characteristics on a macro and microscale; (3) surface properties and surface interactions with the bulk and ambients; (4) electronic properties controlling device applications and device performance.

Silicon Carbide High-Temperature Power Rectifiers Fabricated and Characterized

NASA Technical Reports Server (NTRS)

1996-01-01

The High Temperature Integrated Electronics and Sensors (HTIES) team at the NASA Lewis Research Center is developing silicon carbide (SiC) for use in harsh conditions where silicon, the semiconductor used in nearly all of today's electronics, cannot function. Silicon carbide's demonstrated ability to function under extreme high-temperature, high power, and/or high-radiation conditions will enable significant improvements to a far ranging variety of applications and systems. These improvements range from improved high-voltage switching for energy savings in public electric power distribution and electric vehicles, to more powerful microwave electronics for radar and cellular communications, to sensors and controls for cleaner-burning, more fuel-efficient jet aircraft and automobile engines. In the case of jet engines, uncooled operation of 300 to 600 C SiC power actuator electronics mounted in key high-temperature areas would greatly enhance system performance and reliability. Because silicon cannot function at these elevated temperatures, the semiconductor device circuit components must be made of SiC. Lewis' HTIES group recently fabricated and characterized high-temperature SiC rectifier diodes whose record-breaking characteristics represent significant progress toward the realization of advanced high-temperature actuator control circuits. The first figure illustrates the 600 C probe-testing of a Lewis SiC pn-junction rectifier diode sitting on top of a glowing red-hot heating element. The second figure shows the current-versus voltage rectifying characteristics recorded at 600 C. At this high temperature, the diodes were able to "turn-on" to conduct 4 A of current when forward biased, and yet block the flow of current ($quot;turn-off") when reverse biases as high as 150 V were applied. This device represents a new record for semiconductor device operation, in that no previous semiconductor electronic device has ever simultaneously demonstrated 600 C functionality, and 4-A turn-on and 150-V rectification. The high operating current was achieved despite severe device size limitations imposed by present-day SiC wafer defect densities. Further substantial increases in device performance can be expected when SiC wafer defect densities decrease as SiC wafer production technology matures.

Strain-engineered growth of two-dimensional materials

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ahn, Geun Ho; Amani, Matin; Rasool, Haider

The application of strain to semiconductors allows for controlled modification of their band structure. This principle is employed for the manufacturing of devices ranging from high-performance transistors to solid-state lasers. Traditionally, strain is typically achieved via growth on lattice-mismatched substrates. For two-dimensional (2D) semiconductors, this is not feasible as they typically do not interact epitaxially with the substrate. Here in this paper, we demonstrate controlled strain engineering of 2D semiconductors during synthesis by utilizing the thermal coefficient of expansion mismatch between the substrate and semiconductor. Using WSe 2 as a model system, we demonstrate stable built-in strains ranging from 1%more » tensile to 0.2% compressive on substrates with different thermal coefficient of expansion. Consequently, we observe a dramatic modulation of the band structure, manifested by a strain-driven indirect-to-direct bandgap transition and brightening of the dark exciton in bilayer and monolayer WSe 2, respectively. The growth method developed here should enable flexibility in design of more sophisticated devices based on 2D materials.« less

Strain-engineered growth of two-dimensional materials

DOE PAGES

Ahn, Geun Ho; Amani, Matin; Rasool, Haider; ...

2017-09-20

The application of strain to semiconductors allows for controlled modification of their band structure. This principle is employed for the manufacturing of devices ranging from high-performance transistors to solid-state lasers. Traditionally, strain is typically achieved via growth on lattice-mismatched substrates. For two-dimensional (2D) semiconductors, this is not feasible as they typically do not interact epitaxially with the substrate. Here in this paper, we demonstrate controlled strain engineering of 2D semiconductors during synthesis by utilizing the thermal coefficient of expansion mismatch between the substrate and semiconductor. Using WSe 2 as a model system, we demonstrate stable built-in strains ranging from 1%more » tensile to 0.2% compressive on substrates with different thermal coefficient of expansion. Consequently, we observe a dramatic modulation of the band structure, manifested by a strain-driven indirect-to-direct bandgap transition and brightening of the dark exciton in bilayer and monolayer WSe 2, respectively. The growth method developed here should enable flexibility in design of more sophisticated devices based on 2D materials.« less

Micro-opto-mechanical devices and systems using epitaxial lift off

NASA Technical Reports Server (NTRS)

Camperi-Ginestet, C.; Kim, Young W.; Wilkinson, S.; Allen, M.; Jokerst, N. M.

1993-01-01

The integration of high quality, single crystal thin film gallium arsenide (GaAs) and indium phosphide (InP) based photonic and electronic materials and devices with host microstructures fabricated from materials such as silicon (Si), glass, and polymers will enable the fabrication of the next generation of micro-opto-mechanical systems (MOMS) and optoelectronic integrated circuits. Thin film semiconductor devices deposited onto arbitrary host substrates and structures create hybrid (more than one material) near-monolithic integrated systems which can be interconnected electrically using standard inexpensive microfabrication techniques such as vacuum metallization and photolithography. These integrated systems take advantage of the optical and electronic properties of compound semiconductor devices while still using host substrate materials such as silicon, polysilicon, glass and polymers in the microstructures. This type of materials optimization for specific tasks creates higher performance systems than those systems which must use trade-offs in device performance to integrate all of the function in a single material system. The low weight of these thin film devices also makes them attractive for integration with micromechanical devices which may have difficulty supporting and translating the full weight of a standard device. These thin film devices and integrated systems will be attractive for applications, however, only when the development of low cost, high yield fabrication and integration techniques makes their use economically feasible. In this paper, we discuss methods for alignment, selective deposition, and interconnection of thin film epitaxial GaAs and InP based devices onto host substrates and host microstructures.

Interconnected semiconductor devices

DOEpatents

Grimmer, Derrick P.; Paulson, Kenneth R.; Gilbert, James R.

1990-10-23

Semiconductor layer and conductive layer formed on a flexible substrate, divided into individual devices and interconnected with one another in series by interconnection layers and penetrating terminals.

Room-temperature semiconductor heterostructure refrigeration

NASA Astrophysics Data System (ADS)

Chao, K. A.; Larsson, Magnus; Mal'shukov, A. G.

2005-07-01

With the proper design of semiconductor tunneling barrier structures, we can inject low-energy electrons via resonant tunneling, and take out high-energy electrons via a thermionic process. This is the operation principle of our semiconductor heterostructure refrigerator (SHR) without the need of applying a temperature gradient across the device. Even for the bad thermoelectric material AlGaAs, our calculation shows that at room temperature, the SHR can easily lower the temperature by 5-7K. Such devices can be fabricated with the present semiconductor technology. Besides its use as a kitchen refrigerator, the SHR can efficiently cool microelectronic devices.

Modifications developed to improve x-ray detection devices

NASA Technical Reports Server (NTRS)

1994-01-01

Improvements in the development of x-ray detection devices are described. Emphasis is placed on lowering the temperature in order to achieve better x-ray response. A simplified charge integrator schematic is presented along with supporting tables. By using cryogenic operating temperatures, these x-ray detectors may eventually surpass the performance of the best semiconductor detectors.

Biasing, operation and parasitic current limitation in single device equivalent to CMOS, and other semiconductor systems

DOEpatents

Welch, James D.

2003-09-23

Disclosed are semiconductor devices including at least one junction which is rectifying whether the semiconductor is caused to be N or P-type, by the presence of applied gate voltage field induced carriers in essentially intrinsic, essentially homogeneously simultaneously containing both N and P-type metallurgical dopants at substantially equal doping levels, essentially homogeneously simultaneously containing both N and P-type metallurgical dopants at different doping levels, and containing a single metallurgical doping type, and functional combinations thereof. In particular, inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to conventional multiple device CMOS systems, which can be operated as modulators, are disclosed as are a non-latching SCR and an approach to blocking parasitic currents utilizing material(s) which form rectifying junctions with both N and P-type semiconductor whether metallurigically or field induced.

A Thermal and Electrical Analysis of Power Semiconductor Devices

NASA Technical Reports Server (NTRS)

Vafai, Kambiz

1997-01-01

The state-of-art power semiconductor devices require a thorough understanding of the thermal behavior for these devices. Traditional thermal analysis have (1) failed to account for the thermo-electrical interaction which is significant for power semiconductor devices operating at high temperature, and (2) failed to account for the thermal interactions among all the levels involved in, from the entire device to the gate micro-structure. Furthermore there is a lack of quantitative studies of the thermal breakdown phenomenon which is one of the major failure mechanisms for power electronics. This research work is directed towards addressing. Using a coupled thermal and electrical simulation, in which the drift-diffusion equations for the semiconductor and the energy equation for temperature are solved simultaneously, the thermo-electrical interactions at the micron scale of various junction structures are thoroughly investigated. The optimization of gate structure designs and doping designs is then addressed. An iterative numerical procedure which incorporates the thermal analysis at the device, chip and junction levels of the power device is proposed for the first time and utilized in a BJT power semiconductor device. In this procedure, interactions of different levels are fully considered. The thermal stability issue is studied both analytically and numerically in this research work in order to understand the mechanism for thermal breakdown.

Flexible Electronics Powered by Mixed Metal Oxide Thin Film Transistors

NASA Astrophysics Data System (ADS)

Marrs, Michael

A low temperature amorphous oxide thin film transistor (TFT) and amorphous silicon PIN diode backplane technology for large area flexible digital x-ray detectors has been developed to create 7.9-in. diagonal backplanes. The critical steps in the evolution of the backplane process include the qualification and optimization of the low temperature (200 °C) metal oxide TFT and a-Si PIN photodiode process, the stability of the devices under forward and reverse bias stress, the transfer of the process to flexible plastic substrates, and the fabrication and assembly of the flexible detectors. Mixed oxide semiconductor TFTs on flexible plastic substrates suffer from performance and stability issues related to the maximum processing temperature limitation of the polymer. A novel device architecture based upon a dual active layer improves both the performance and stability. Devices are directly fabricated below 200 ºC on a polyethylene naphthalate (PEN) substrate using mixed metal oxides of either zinc indium oxide (ZIO) or indium gallium zinc oxide (IGZO) as the active semiconductor. The dual active layer architecture allows for adjustment to the saturation mobility and threshold voltage stability without the requirement of high temperature annealing, which is not compatible with flexible plastic substrates like PEN. The device performance and stability is strongly dependent upon the composition of the mixed metal oxide; this dependency provides a simple route to improving the threshold voltage stability and drive performance. By switching from a single to a dual active layer, the saturation mobility increases from 1.2 cm2/V-s to 18.0 cm2/V-s, while the rate of the threshold voltage shift decreases by an order of magnitude. This approach could assist in enabling the production of devices on flexible substrates using amorphous oxide semiconductors. Low temperature (200°C) processed amorphous silicon photodiodes were developed successfully by balancing the tradeoffs between low temperature and low stress (less than -70 MPa compressive) and device performance. Devices with a dark current of less than 1.0 pA/mm2 and a quantum efficiency of 68% have been demonstrated. Alternative processing techniques, such as pixelating the PIN diode and using organic photodiodes have also been explored for applications where extreme flexibility is desired.

P and n-type microcrystalline semiconductor alloy material including band gap widening elements, devices utilizing same

DOEpatents

Guha, Subhendu; Ovshinsky, Stanford R.

1988-10-04

An n-type microcrystalline semiconductor alloy material including a band gap widening element; a method of fabricating p-type microcrystalline semiconductor alloy material including a band gap widening element; and electronic and photovoltaic devices incorporating said n-type and p-type materials.

neutron-Induced Failures in semiconductor Devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wender, Stephen Arthur

2017-03-13

Single Event Effects are a very significant failure mode in modern semiconductor devices that may limit their reliability. Accelerated testing is important for semiconductor industry. Considerable more work is needed in this field to mitigate the problem. Mitigation of this problem will probably come from Physicists and Electrical Engineers working together

77 FR 25747 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Institution of...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-05-01

... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-840] Certain Semiconductor Integrated Circuit... States after importation of certain semiconductor integrated circuit devices and products containing same... No. 6,847,904 (``the '904 patent''). The complaint further alleges that an industry in the United...

Spin Coherence at the Nanoscale: Polymer Surfaces and Interfaces

DOE Office of Scientific and Technical Information (OSTI.GOV)

Epstein, Arthur J.

2013-09-10

Breakthrough results were achieved during the reporting period in the areas of organic spintronics. (A) For the first time the giant magnetic resistance (GMR) was observed in spin valve with an organic spacer. Thus we demonstrated the ability of organic semiconductors to transport spin in GMR devices using rubrene as a prototype for organic semiconductors. (B) We discovered the electrical bistability and spin valve effect in a ferromagnet /organic semiconductor/ ferromagnet heterojunction. The mechanism of switching between conducting phases and its potential applications were suggested. (C) The ability of V(TCNE)x to inject spin into organic semiconductors such as rubrene wasmore » demonstrated for the first time. The mechanisms of spin injection and transport from and into organic magnets as well through organic semiconductors were elucidated. (D) In collaboration with the group of OSU Prof. Johnston-Halperin we reported the successful extraction of spin polarized current from a thin film of the organic-based room temperature ferrimagnetic semiconductor V[TCNE]x and its subsequent injection into a GaAs/AlGaAs light-emitting diode (LED). Thus all basic steps for fabrication of room temperature, light weight, flexible all organic spintronic devices were successfully performed. (E) A new synthesis/processing route for preparation of V(TCNE)x enabling control of interface and film thicknesses at the nanoscale was developed at OSU. Preliminary results show these films are higher quality and what is extremely important they are substantially more air stable than earlier prepared V(TCNE)x. In sum the breakthrough results we achieved in the past two years form the basis of a promising new technology, Multifunctional Flexible Organic-based Spintronics (MFOBS). MFOBS technology enables us fabrication of full function flexible spintronic devices that operate at room temperature.« less

Electric field induced spin-polarized current

DOEpatents

Murakami, Shuichi; Nagaosa, Naoto; Zhang, Shoucheng

2006-05-02

A device and a method for generating an electric-field-induced spin current are disclosed. A highly spin-polarized electric current is generated using a semiconductor structure and an applied electric field across the semiconductor structure. The semiconductor structure can be a hole-doped semiconductor having finite or zero bandgap or an undoped semiconductor of zero bandgap. In one embodiment, a device for injecting spin-polarized current into a current output terminal includes a semiconductor structure including first and second electrodes, along a first axis, receiving an applied electric field and a third electrode, along a direction perpendicular to the first axis, providing the spin-polarized current. The semiconductor structure includes a semiconductor material whose spin orbit coupling energy is greater than room temperature (300 Kelvin) times the Boltzmann constant. In one embodiment, the semiconductor structure is a hole-doped semiconductor structure, such as a p-type GaAs semiconductor layer.

Liquid crystal cells with built-in CdSe nanotubes for chromogenic smart emission devices.

PubMed

Lin, Tsung Ju; Chen, Chin-Chang; Cheng, Soofin; Chen, Yang Fang

2008-01-21

A simple and general approach for controlling optical anisotropy of nanostructured semiconductors is reported. Our design involves the fabrication of liquid crystal devices with built-in semiconductor nanotubes. Quite interestingly, it is found that semiconductor nanotubes can be well aligned along the orientation of liquid crystals molecules automatically, resulting in a very large emission anisotropy with the degree of polarization up to 72%. This intriguing result manifests a way to obtain well aligned semiconductor nanotubes and the emission anisotropy can be easily manipulated by an external bias. The ability to well control the emission anisotropy should open up new opportunities for nanostructured semiconductors, including optical filters, polarized light emitting diodes, flat panel displays, and many other chromogenic smart devices.

Semiconductor with protective surface coating and method of manufacture thereof. [Patent application

DOEpatents

Hansen, W.L.; Haller, E.E.

1980-09-19

Passivation of predominantly crystalline semiconductor devices is provided for by a surface coating of sputtered hydrogenated amorphous semiconductor material. Passivation of a radiation detector germanium diode, for example, is realized by sputtering a coating of amorphous germanium onto the etched and quenched diode surface in a low pressure atmosphere of hydrogen and argon. Unlike prior germanium diode semiconductor devices, which must be maintained in vacuum at cryogenic temperatures to avoid deterioration, a diode processed in the described manner may be stored in air at room temperature or otherwise exposed to a variety of environmental conditions. The coating compensates for pre-existing undesirable surface states as well as protecting the semiconductor device against future impregnation with impurities.

Ferrite film growth on semiconductor substrates towards microwave and millimeter wave integrated circuits

NASA Astrophysics Data System (ADS)

Chen, Z.; Harris, V. G.

2012-10-01

It is widely recognized that as electronic systems' operating frequency shifts to microwave and millimeter wave bands, the integration of ferrite passive devices with semiconductor solid state active devices holds significant advantages in improved miniaturization, bandwidth, speed, power and production costs, among others. Traditionally, ferrites have been employed in discrete bulk form, despite attempts to integrate ferrite as films within microwave integrated circuits. Technical barriers remain centric to the incompatibility between ferrite and semiconductor materials and their processing protocols. In this review, we present past and present efforts at ferrite integration with semiconductor platforms with the aim to identify the most promising paths to realizing the complete integration of on-chip ferrite and semiconductor devices, assemblies and systems.

Growth of coincident site lattice matched semiconductor layers and devices on crystalline substrates

DOEpatents

Norman, Andrew G; Ptak, Aaron J

2013-08-13

Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a substrate having a crystalline surface with a known lattice parameter (a). The method further includes growing a crystalline semiconductor layer on the crystalline substrate surface by coincident site lattice matched epitaxy, without any buffer layer between the crystalline semiconductor layer and the crystalline surface of the substrate. The crystalline semiconductor layer will be prepared to have a lattice parameter (a') that is related to the substrate lattice parameter (a). The lattice parameter (a') maybe related to the lattice parameter (a) by a scaling factor derived from a geometric relationship between the respective crystal lattices.

Design and fabrication of 6.1-.ANG. family semiconductor devices using semi-insulating A1Sb substrate

DOEpatents

Sherohman, John W [Livermore, CA; Coombs, III, Arthur W.; Yee, Jick Hong [Livermore, CA; Wu, Kuang Jen J [Cupertino, CA

2007-05-29

For the first time, an aluminum antimonide (AlSb) single crystal substrate is utilized to lattice-match to overlying semiconductor layers. The AlSb substrate establishes a new design and fabrication approach to construct high-speed, low-power electronic devices while establishing inter-device isolation. Such lattice matching between the substrate and overlying semiconductor layers minimizes the formation of defects, such as threaded dislocations, which can decrease the production yield and operational life-time of 6.1-.ANG. family heterostructure devices.

Thin Film Complementary Metal Oxide Semiconductor (CMOS) Device Using a Single-Step Deposition of the Channel Layer

PubMed Central

Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Wang, Zhenwei; Hedhili, M. N.; Wang, Q. X.; Alshareef, H. N.

2014-01-01

We report, for the first time, the use of a single step deposition of semiconductor channel layer to simultaneously achieve both n- and p-type transport in transparent oxide thin film transistors (TFTs). This effect is achieved by controlling the concentration of hydroxyl groups (OH-groups) in the underlying gate dielectrics. The semiconducting tin oxide layer was deposited at room temperature, and the maximum device fabrication temperature was 350°C. Both n and p-type TFTs showed fairly comparable performance. A functional CMOS inverter was fabricated using this novel scheme, indicating the potential use of our approach for various practical applications. PMID:24728223

Neutron, gamma ray and post-irradiation thermal annealing effects on power semiconductor switches

NASA Technical Reports Server (NTRS)

Schwarze, G. E.; Frasca, A. J.

1991-01-01

Experimental data showing the effects of neutrons and gamma rays on the performance characteristics of power-type NPN bipolar junction transistors (BJTs), metal-oxide-semiconductor field effect transistors (MOSFETs), and static induction transistors (SITs) are given. These three types of devices were tested at radiation levels which met or exceeded the SP-100 requirements. For the SP-100 radiation requirements, the BJTs were found to be most sensitive to neutrons, the MOSFETs were most sensitive to gamma rays, and the SITs were only slightly sensitive to neutrons. Postirradiation thermal anneals at 300 K and up to 425 K were done on these devices and the effectiveness of these anneals are also discussed.

Optoelectronic semiconductor device and method of fabrication

DOEpatents

Cui, Yi; Zhu, Jia; Hsu, Ching-Mei; Fan, Shanhui; Yu, Zongfu

2014-11-25

An optoelectronic device comprising an optically active layer that includes a plurality of domes is presented. The plurality of domes is arrayed in two dimensions having a periodicity in each dimension that is less than or comparable with the shortest wavelength in a spectral range of interest. By virtue of the plurality of domes, the optoelectronic device achieves high performance. A solar cell having high energy-conversion efficiency, improved absorption over the spectral range of interest, and an improved acceptance angle is presented as an exemplary device.

Numerical simulation and characterization of trapping noise in InGaP-GaAs heterojunctions devices at high injection

NASA Astrophysics Data System (ADS)

Nallatamby, Jean-Christophe; Abdelhadi, Khaled; Jacquet, Jean-Claude; Prigent, Michel; Floriot, Didier; Delage, Sylvain; Obregon, Juan

2013-03-01

Commercially available simulators present considerable advantages in performing accurate DC, AC and transient simulations of semiconductor devices, including many fundamental and parasitic effects which are not generally taken into account in house-made simulators. Nevertheless, while the TCAD simulators of the public domain we have tested give accurate results for the simulation of diffusion noise, none of the tested simulators perform trap-assisted GR noise accurately. In order to overcome the aforementioned problem we propose a robust solution to accurately simulate GR noise due to traps. It is based on numerical processing of the output data of one of the simulators available in the public-domain, namely SENTAURUS (from Synopsys). We have linked together, through a dedicated Data Access Component (DAC), the deterministic output data available from SENTAURUS and a powerful, customizable post-processing tool developed on the mathematical SCILAB software package. Thus, robust simulations of GR noise in semiconductor devices can be performed by using GR Langevin sources associated to the scalar Green functions responses of the device. Our method takes advantage of the accuracy of the deterministic simulations of electronic devices obtained with SENTAURUS. A Comparison between 2-D simulations and measurements of low frequency noise on InGaP-GaAs heterojunctions, at low as well as high injection levels, demonstrates the validity of the proposed simulation tool.

Rapid, all dry microfabrication of three-dimensional Co3O4/Pt nanonetworks for high-performance microsupercapacitors.

PubMed

Ma, Xinyu; Feng, Shuxuan; He, Liang; Yan, Mengyu; Tian, Xiaocong; Li, Yanxi; Tang, Chunjuan; Hong, Xufeng; Mai, Liqiang

2017-08-17

On-chip electrochemical energy storage devices have attracted growing attention due to the decreasing size of electronic devices. Various approaches have been applied for constructing the microsupercapacitors. However, the microfabrication of high-performance microsupercapacitors by conventional and fully compatible semiconductor microfabrication technologies is still a critical challenge. Herein, unique three-dimensional (3D) Co 3 O 4 nanonetwork microelectrodes formed by the interconnection of Co 3 O 4 nanosheets are constructed by controllable physical vapor deposition combined with rapid thermal annealing. This construction process is an all dry and rapid (≤5 minutes) procedure. Afterward, by sputtering highly electrically conductive Pt nanoparticles on the microelectrodes, the 3D Co 3 O 4 /Pt nanonetworks based microsupercapacitor is fabricated, showing a high volume capacitance (35.7 F cm -3 ) at a scan rate of 20 mV s -1 due to the unique interconnected structures, high electrical conductivity and high surface area of the microelectrodes. This microfabrication process is also used to construct high-performance flexible microsupercapacitors, and it can be applied in the construction of wearable devices. The proposed strategy is completely compatible with the current semiconductor microfabrication and shows great potential in the applications of the large-scale integration of micro/nano and wearable devices.

Surface Plasmon-Assisted Solar Energy Conversion.

PubMed

Dodekatos, Georgios; Schünemann, Stefan; Tüysüz, Harun

2016-01-01

The utilization of localized surface plasmon resonance (LSPR) from plasmonic noble metals in combination with semiconductors promises great improvements for visible light-driven photocatalysis, in particular for energy conversion. This review summarizes the basic principles of plasmonic photocatalysis, giving a comprehensive overview about the proposed mechanisms for enhancing the performance of photocatalytically active semiconductors with plasmonic devices and their applications for surface plasmon-assisted solar energy conversion. The main focus is on gold and, to a lesser extent, silver nanoparticles in combination with titania as semiconductor and their usage as active plasmonic photocatalysts. Recent advances in water splitting, hydrogen generation with sacrificial organic compounds, and CO2 reduction to hydrocarbons for solar fuel production are highlighted. Finally, further improvements for plasmonic photocatalysts, regarding performance, stability, and economic feasibility, are discussed for surface plasmon-assisted solar energy conversion.

Rectification of graphene self-switching diodes: First-principles study

NASA Astrophysics Data System (ADS)

Ghaziasadi, Hassan; Jamasb, Shahriar; Nayebi, Payman; Fouladian, Majid

2018-05-01

The first principles calculations based on self-consistent charge density functional tight-binding have performed to investigate the electrical properties and rectification behavior of the graphene self-switching diodes (GSSD). The devices contained two structures called CG-GSSD and DG-GSSD which have metallic or semiconductor gates depending on their side gates have a single or double hydrogen edge functionalized. We have relaxed the devices and calculated I-V curves, transmission spectrums and maximum rectification ratios. We found that the DG-MSM devices are more favorable and more stable. Also, the DG-MSM devices have better maximum rectification ratios and current. Moreover, by changing the side gates widths and behaviors from semiconductor to metal, the threshold voltages under forward bias changed from +1.2 V to +0.3 V. Also, the maximum currents are obtained from 1.12 μA to 10.50 μA. Finally, the MSM and SSS type of all devices have minimum and maximum values of voltage threshold and maximum rectification ratios, but the 769-DG devices don't obey this rule.

Electronic Raman Scattering as an Ultra-Sensitive Probe of Strain Effects in Semiconductors

NASA Astrophysics Data System (ADS)

Mascarenhas, Angelo; Fluegel, Brian; Beaton, Dan

Semiconductor strain engineering has become a critical feature of high-performance electronics due to the significant device performance enhancements it enables. These improvements that emerge from strain induced modifications to the electronic band structure necessitate new ultra-sensitive tools for probing strain in semiconductors. Using electronic Raman scattering, we recently showed that it is possible to measure minute amounts of strain in thin semiconductor epilayers. We applied this strain measurement technique to two different semiconductor alloy systems, using coherently strained epitaxial thin films specifically designed to produce lattice-mismatch strains as small as 10-4. Comparing our strain sensitivity and signal strength in AlxGa1-xAs with those obtained using the industry-standard technique of phonon Raman scattering we found a sensitivity improvement of ×200, and a signal enhancement of 4 ×103 thus obviating key constraints in semiconductor strain metrology. The sensitivity of this approach rivals that of contemporary techniques and opens up a new realm for optically probing strain effects on electronic band structure. We acknowledge the financial support of the DOE Office of Science, BES under DE-AC36-80GO28308.

High-voltage compatible, full-depleted CCD

DOEpatents

Holland, Stephen Edward

2007-09-18

A charge coupled device for detecting electromagnetic and particle radiation is described. The device includes a high-resistivity semiconductor substrate, buried channel regions, gate electrode circuitry, and amplifier circuitry. For good spatial resolution and high performance, especially when operated at high voltages with full or nearly full depletion of the substrate, the device can also include a guard ring positioned near channel regions, a biased channel stop, and a biased polysilicon electrode over the channel stop.

Memory effects in a Al/Ti:HfO2/CuPc metal-oxide-semiconductor device

NASA Astrophysics Data System (ADS)

Tripathi, Udbhav; Kaur, Ramneek

2016-05-01

Metal oxide semiconductor structured organic memory device has been successfully fabricated. Ti doped hafnium oxide (Ti:HfO2) nanoparticles has been fabricated by precipitation method and further calcinated at 800 °C. Copper phthalocyanine, a hole transporting material has been utilized as an organic semiconductor. The electrical properties of the fabricated device have been studied by measuring the current-voltage and capacitance-voltage characteristics. The amount of charge stored in the nanoparticles has been calculated by using flat band condition. This simple approach for fabricating MOS memory device has opens up opportunities for the development of next generation memory devices.

Porous silicon carbide (SiC) semiconductor device

NASA Technical Reports Server (NTRS)

Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)

1994-01-01

A semiconductor device employs at least one layer of semiconducting porous silicon carbide (SiC). The porous SiC layer has a monocrystalline structure wherein the pore sizes, shapes, and spacing are determined by the processing conditions. In one embodiment, the semiconductor device is a p-n junction diode in which a layer of n-type SiC is positioned on a p-type layer of SiC, with the p-type layer positioned on a layer of silicon dioxide. Because of the UV luminescent properties of the semiconducting porous SiC layer, it may also be utilized for other devices such as LEDs and optoelectronic devices.

Demonstration of hetero-gate-dielectric tunneling field-effect transistors (HG TFETs).

PubMed

Choi, Woo Young; Lee, Hyun Kook

2016-01-01

The steady scaling-down of semiconductor device for improving performance has been the most important issue among researchers. Recently, as low-power consumption becomes one of the most important requirements, there have been many researches about novel devices for low-power consumption. Though scaling supply voltage is the most effective way for low-power consumption, performance degradation is occurred for metal-oxide-semiconductor field-effect transistors (MOSFETs) when supply voltage is reduced because subthreshold swing (SS) of MOSFETs cannot be lower than 60 mV/dec. Thus, in this thesis, hetero-gate-dielectric tunneling field-effect transistors (HG TFETs) are investigated as one of the most promising alternatives to MOSFETs. By replacing source-side gate insulator with a high- k material, HG TFETs show higher on-current, suppressed ambipolar current and lower SS than conventional TFETs. Device design optimization through simulation was performed and fabrication based on simulation demonstrated that performance of HG TFETs were better than that of conventional TFETs. Especially, enlargement of gate insulator thickness while etching gate insulator at the source side was improved by introducing HF vapor etch process. In addition, the proposed HG TFETs showed higher performance than our previous results by changing structure of sidewall spacer by high- k etching process.

Electrical properties of AlGaN/GaN HEMTs in stretchable geometries

NASA Astrophysics Data System (ADS)

Tompkins, R. P.; Mahaboob, I.; Shahedipour-Sandvik, F.; Lazarus, N.

2017-10-01

Many biological materials are naturally soft and stretchable, far more so than crystalline semiconductors. Creating systems that can be placed directly on a surface such as human skin has required new approaches in electronic device design and materials, a field known as stretchable electronics. One common method for fabricating a highly brittle semiconductor device able to survive tens of percent strain is to incorporate stress relief structures ('waves'). Although the mechanical advantages of this approach are well known, the effects on the electrical behavior of a device such as a transistor compared to a more traditional geometry have not been studied. Here, AlGaN/GaN high electron mobility transistors (HEMTs) grown on rigid sapphire substrates were fabricated in a common wavy geometry, a sinusoid, with dimensions similar to those used in stretchable electronics. The study analyzes control parameters available to the designer including gate location along the sinusoid, angle the source-drain contacts make with the gate, as well as variation of the gate length at the peak of the sinusoid. Common electrical parameters such as saturation current density, threshold voltage, and transconductance were compared between the sinusoidal and conventional straight geometries and results found to fall to within experimental uncertainty, suggesting shifting to a stretchable geometry is possible without appreciably degrading semiconductor device performance.

Voltage-controlled quantum light from an atomically thin semiconductor

NASA Astrophysics Data System (ADS)

Chakraborty, Chitraleema; Kinnischtzke, Laura; Goodfellow, Kenneth M.; Beams, Ryan; Vamivakas, A. Nick

2015-06-01

Although semiconductor defects can often be detrimental to device performance, they are also responsible for the breadth of functionality exhibited by modern optoelectronic devices. Artificially engineered defects (so-called quantum dots) or naturally occurring defects in solids are currently being investigated for applications ranging from quantum information science and optoelectronics to high-resolution metrology. In parallel, the quantum confinement exhibited by atomically thin materials (semi-metals, semiconductors and insulators) has ushered in an era of flatland optoelectronics whose full potential is still being articulated. In this Letter we demonstrate the possibility of leveraging the atomically thin semiconductor tungsten diselenide (WSe2) as a host for quantum dot-like defects. We report that this previously unexplored solid-state quantum emitter in WSe2 generates single photons with emission properties that can be controlled via the application of external d.c. electric and magnetic fields. These new optically active quantum dots exhibit excited-state lifetimes on the order of 1 ns and remarkably large excitonic g-factors of 10. It is anticipated that WSe2 quantum dots will provide a novel platform for integrated solid-state quantum photonics and quantum information processing, as well as a rich condensed-matter physics playground with which to explore the coupling of quantum dots and atomically thin semiconductors.

High-mobility pyrene-based semiconductor for organic thin-film transistors.

PubMed

Cho, Hyunduck; Lee, Sunyoung; Cho, Nam Sung; Jabbour, Ghassan E; Kwak, Jeonghun; Hwang, Do-Hoon; Lee, Changhee

2013-05-01

Numerous conjugated oligoacenes and polythiophenes are being heavily studied in the search for high-mobility organic semiconductors. Although many researchers have designed fused aromatic compounds as organic semiconductors for organic thin-film transistors (OTFTs), pyrene-based organic semiconductors with high mobilities and on-off current ratios have not yet been reported. Here, we introduce a new pyrene-based p-type organic semiconductor showing liquid crystal behavior. The thin film characteristics of this material are investigated by varying the substrate temperature during the deposition and the gate dielectric condition using the surface modification with a self-assembled monolayer, and systematically studied in correlation with the performances of transistor devices with this compound. OTFT fabricated under the optimum deposition conditions of this compound, namely, 1,6-bis(5'-octyl-2,2'-bithiophen-5-yl)pyrene (BOBTP) shows a high-performance transistor behavior with a field-effect mobility of 2.1 cm(2) V(-1) s(-1) and an on-off current ratio of 7.6 × 10(6) and enhanced long-term stability compared to the pentacene thin-film transistor.

Progress in piezo-phototronic effect modulated photovoltaics.

PubMed

Que, Miaoling; Zhou, Ranran; Wang, Xiandi; Yuan, Zuqing; Hu, Guofeng; Pan, Caofeng

2016-11-02

Wurtzite structured materials, like ZnO, GaN, CdS, and InN, simultaneously possess semiconductor and piezoelectric properties. The inner-crystal piezopotential induced by external strain can effectively tune/control the carrier generation, transport and separation/combination processes at the metal-semiconductor contact or p-n junction, which is called the piezo-phototronic effect. This effect can efficiently enhance the performance of photovoltaic devices based on piezoelectric semiconductor materials by utilizing the piezo-polarization charges at the junction induced by straining, which can modulate the energy band of the piezoelectric material and then accelerate or prevent the separation process of the photon-generated electrons and vacancies. This paper introduces the fundamental physics principles of the piezo-phototronic effect, and reviews recent progress in piezo-phototronic effect enhanced solar cells, including solar cells based on semiconductor nanowire, organic/inorganic materials, quantum dots, and perovskite. The piezo-phototronic effect is suggested as a suitable basis for the development of an innovative method to enhance the performance of solar cells based on piezoelectric semiconductors by applied extrinsic strains, which might be appropriate for fundamental research and potential applications in various areas of optoelectronics.

Progress in piezo-phototronic effect modulated photovoltaics

NASA Astrophysics Data System (ADS)

Que, Miaoling; Zhou, Ranran; Wang, Xiandi; Yuan, Zuqing; Hu, Guofeng; Pan, Caofeng

2016-11-01

Wurtzite structured materials, like ZnO, GaN, CdS, and InN, simultaneously possess semiconductor and piezoelectric properties. The inner-crystal piezopotential induced by external strain can effectively tune/control the carrier generation, transport and separation/combination processes at the metal-semiconductor contact or p-n junction, which is called the piezo-phototronic effect. This effect can efficiently enhance the performance of photovoltaic devices based on piezoelectric semiconductor materials by utilizing the piezo-polarization charges at the junction induced by straining, which can modulate the energy band of the piezoelectric material and then accelerate or prevent the separation process of the photon-generated electrons and vacancies. This paper introduces the fundamental physics principles of the piezo-phototronic effect, and reviews recent progress in piezo-phototronic effect enhanced solar cells, including solar cells based on semiconductor nanowire, organic/inorganic materials, quantum dots, and perovskite. The piezo-phototronic effect is suggested as a suitable basis for the development of an innovative method to enhance the performance of solar cells based on piezoelectric semiconductors by applied extrinsic strains, which might be appropriate for fundamental research and potential applications in various areas of optoelectronics.

Ohmic Contact Fabrication Using a Focused-ion Beam Technique and Electrical Characterization for Layer Semiconductor Nanostructures.

PubMed

Chen, Ruei-San; Tang, Chih-Che; Shen, Wei-Chu; Huang, Ying-Sheng

2015-12-05

Layer semiconductors with easily processed two-dimensional (2D) structures exhibit indirect-to-direct bandgap transitions and superior transistor performance, which suggest a new direction for the development of next-generation ultrathin and flexible photonic and electronic devices. Enhanced luminescence quantum efficiency has been widely observed in these atomically thin 2D crystals. However, dimension effects beyond quantum confinement thicknesses or even at the micrometer scale are not expected and have rarely been observed. In this study, molybdenum diselenide (MoSe2) layer crystals with a thickness range of 6-2,700 nm were fabricated as two- or four-terminal devices. Ohmic contact formation was successfully achieved by the focused-ion beam (FIB) deposition method using platinum (Pt) as a contact metal. Layer crystals with various thicknesses were prepared through simple mechanical exfoliation by using dicing tape. Current-voltage curve measurements were performed to determine the conductivity value of the layer nanocrystals. In addition, high-resolution transmission electron microscopy, selected-area electron diffractometry, and energy-dispersive X-ray spectroscopy were used to characterize the interface of the metal-semiconductor contact of the FIB-fabricated MoSe2 devices. After applying the approaches, the substantial thickness-dependent electrical conductivity in a wide thickness range for the MoSe2-layer semiconductor was observed. The conductivity increased by over two orders of magnitude from 4.6 to 1,500 Ω(-) (1) cm(-) (1), with a decrease in the thickness from 2,700 to 6 nm. In addition, the temperature-dependent conductivity indicated that the thin MoSe2 multilayers exhibited considerably weak semiconducting behavior with activation energies of 3.5-8.5 meV, which are considerably smaller than those (36-38 meV) of the bulk. Probable surface-dominant transport properties and the presence of a high surface electron concentration in MoSe2 are proposed. Similar results can be obtained for other layer semiconductor materials such as MoS2 and WS2.

Characterization of Interface State in Silicon Carbide Metal Oxide Semiconductor Capacitors

NASA Astrophysics Data System (ADS)

Kao, Wei-Chieh

Silicon carbide (SiC) has always been considered as an excellent material for high temperature and high power devices. Since SiC is the only compound semiconductor whose native oxide is silicon dioxide (SiO2), it puts SiC in a unique position. Although SiC metal oxide semiconductor (MOS) technology has made significant progress in recent years, there are still a number of issues to be overcome before more commercial SiC devices can enter the market. The prevailing issues surrounding SiC MOSFET devices are the low channel mobility, the low quality of the oxide layer and the high interface state density at the SiC/SiO2 interface. Consequently, there is a need for research to be performed in order to have a better understanding of the factors causing the poor SiC/SiO2 interface properties. In this work, we investigated the generation lifetime in SiC materials by using the pulsed metal oxide semiconductor (MOS) capacitor method and measured the interface state density distribution at the SiC/SiO2 interface by using the conductance measurement and the high-low frequency capacitance technique. These measurement techniques have been performed on n-type and p-type SiC MOS capacitors. In the course of our investigation, we observed fast interface states at semiconductor-dielectric interfaces in SiC MOS capacitors that underwent three different interface passivation processes, such states were detected in the nitrided samples but not observed in PSG-passivated samples. This result indicate that the lack of fast states at PSG-passivated interface is one of the main reasons for higher channel mobility in PSG MOSFETs. In addition, the effect of mobile ions in the oxide on the response time of interface states has been investigated. In the last chapter we propose additional methods of investigation that can help elucidate the origin of the particular interface states, enabling a more complete understanding of the SiC/SiO2 material system.

Ohmic Contact Fabrication Using a Focused-ion Beam Technique and Electrical Characterization for Layer Semiconductor Nanostructures

PubMed Central

Chen, Ruei-San; Tang, Chih-Che; Shen, Wei-Chu; Huang, Ying-Sheng

2015-01-01

Layer semiconductors with easily processed two-dimensional (2D) structures exhibit indirect-to-direct bandgap transitions and superior transistor performance, which suggest a new direction for the development of next-generation ultrathin and flexible photonic and electronic devices. Enhanced luminescence quantum efficiency has been widely observed in these atomically thin 2D crystals. However, dimension effects beyond quantum confinement thicknesses or even at the micrometer scale are not expected and have rarely been observed. In this study, molybdenum diselenide (MoSe2) layer crystals with a thickness range of 6-2,700 nm were fabricated as two- or four-terminal devices. Ohmic contact formation was successfully achieved by the focused-ion beam (FIB) deposition method using platinum (Pt) as a contact metal. Layer crystals with various thicknesses were prepared through simple mechanical exfoliation by using dicing tape. Current-voltage curve measurements were performed to determine the conductivity value of the layer nanocrystals. In addition, high-resolution transmission electron microscopy, selected-area electron diffractometry, and energy-dispersive X-ray spectroscopy were used to characterize the interface of the metal–semiconductor contact of the FIB-fabricated MoSe2 devices. After applying the approaches, the substantial thickness-dependent electrical conductivity in a wide thickness range for the MoSe2-layer semiconductor was observed. The conductivity increased by over two orders of magnitude from 4.6 to 1,500 Ω−1 cm−1, with a decrease in the thickness from 2,700 to 6 nm. In addition, the temperature-dependent conductivity indicated that the thin MoSe2 multilayers exhibited considerably weak semiconducting behavior with activation energies of 3.5-8.5 meV, which are considerably smaller than those (36-38 meV) of the bulk. Probable surface-dominant transport properties and the presence of a high surface electron concentration in MoSe2 are proposed. Similar results can be obtained for other layer semiconductor materials such as MoS2 and WS2. PMID:26710105

Oxide semiconductor thin-film transistors: a review of recent advances.

PubMed

Fortunato, E; Barquinha, P; Martins, R

2012-06-12

Transparent electronics is today one of the most advanced topics for a wide range of device applications. The key components are wide bandgap semiconductors, where oxides of different origins play an important role, not only as passive component but also as active component, similar to what is observed in conventional semiconductors like silicon. Transparent electronics has gained special attention during the last few years and is today established as one of the most promising technologies for leading the next generation of flat panel display due to its excellent electronic performance. In this paper the recent progress in n- and p-type oxide based thin-film transistors (TFT) is reviewed, with special emphasis on solution-processed and p-type, and the major milestones already achieved with this emerging and very promising technology are summarizeed. After a short introduction where the main advantages of these semiconductors are presented, as well as the industry expectations, the beautiful history of TFTs is revisited, including the main landmarks in the last 80 years, finishing by referring to some papers that have played an important role in shaping transparent electronics. Then, an overview is presented of state of the art n-type TFTs processed by physical vapour deposition methods, and finally one of the most exciting, promising, and low cost but powerful technologies is discussed: solution-processed oxide TFTs. Moreover, a more detailed focus analysis will be given concerning p-type oxide TFTs, mainly centred on two of the most promising semiconductor candidates: copper oxide and tin oxide. The most recent data related to the production of complementary metal oxide semiconductor (CMOS) devices based on n- and p-type oxide TFT is also be presented. The last topic of this review is devoted to some emerging applications, finalizing with the main conclusions. Related work that originated at CENIMAT|I3N during the last six years is included in more detail, which has led to the fabrication of high performance n- and p-type oxide transistors as well as the fabrication of CMOS devices with and on paper. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Editorial

NASA Astrophysics Data System (ADS)

Bruzzi, Mara; Pace, Emanuele; Talamonti, Cinzia

2013-12-01

The 9th edition of the International Conference on Radiation Effects on Semiconductor Materials, Detectors and Devices (RESMDD), held in Florence, at Dipartimento di Fisica ed Astronomia on October 9-12, 2012, was aimed at discussing frontier research activities in several application fields as in nuclear and particle physics, astrophysics, medical and solid-state physics. Main topics discussed in this conference are tracking performance of heavily irradiated silicon detectors, developments required for the luminosity upgrade of the Large Hadron Collider (HL-LHC), radiation effects on semiconductor materials for medical (radiotherapy dosimeters, imaging devices), astrophysics (UV, X- and γ-ray detectors) and environmental applications, microscopic defect analysis of irradiated semiconductor materials and related radiation hardening technologies. On the first day the conference hosted a short course intended to introduce fundamentals in the development of semiconductor detectors for medical applications to graduate and PhD students, post-docs and young researchers, both engineers and physicists. Directors of the School were Prof. Marta Bucciolini of the University of Florence and INFN, Italy and Dr. Carlo Civinini, INFN Firenze, Italy. Emphasis was placed on the underlying physical principles, instrument design, factors affecting performance, and applications in both the clinical and preclinical applications. The School was attended by nearly 40 students/ young researchers. We warmly thank the Directors for organizing this interesting event and the professors and researchers who gave lessons, for sharing their experience and knowledge with the students.

Toward high performance nanoscale optoelectronic devices: super solar energy harvesting in single standing core-shell nanowire.

PubMed

Zhou, Jian; Wu, Yonggang; Xia, Zihuan; Qin, Xuefei; Zhang, Zongyi

2017-11-27

Single nanowire solar cells show great promise for next-generation photovoltaics and for powering nanoscale devices. Here, we present a detailed study of light absorption in a single standing semiconductor-dielectric core-shell nanowire (CSNW). We find that the CSNW structure can not only concentrate the incident light into the structure, but also confine most of the concentrated light to the semiconductor core region, which boosts remarkably the light absorption cross-section of the semiconductor core. The CSNW can support multiple higher-order HE modes, as well as Fabry-Pérot (F-P) resonance, compared to the bare nanowire (BNW). Overlapping of the adjacent higher-order HE modes results in broadband light absorption enhancement in the solar radiation spectrum. Results based on detailed balance analysis demonstrate that the super light concentration of the single CSNW gives rise to higher short-circuit current and open-circuit voltage, and thus higher apparent power conversion efficiency (3644.2%), which goes far beyond that of the BNW and the Shockley-Queisser limit that restricts the performance of a planar counterparts. Our study shows that the single CSNW can be a promising platform for construction of high performance nanoscale photodetectors, nanoelectronic power sources, super miniature cells, and diverse integrated nanosystems.

Over-voltage protection system and method

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chi, Song; Dong, Dong; Lai, Rixin

An over-voltage protection system includes an electronic valve connected across two terminals of a circuit and an over-voltage detection circuit connected across one of the plurality of semiconductor devices for detecting an over-voltage across the circuit. The electronic valve includes a plurality of semiconductor devices connected in series. The over-voltage detection circuit includes a voltage divider circuit connected to a break-over diode in a way to provide a representative low voltage to the break-over diode and an optocoupler configured to receive a current from the break-over diode when the representative low voltage exceeds a threshold voltage of the break-over diodemore » indicating an over-voltage condition. The representative low voltage provided to the break-over diode represents a voltage across the one semiconductor device. A plurality of self-powered gate drive circuits are connected to the plurality of semiconductor devices, wherein the plurality of self-powered gate drive circuits receive over-voltage triggering pulses from the optocoupler during the over-voltage condition and switch on the plurality of semiconductor devices to bypass the circuit.« less

The preparation method of terahertz monolithic integrated device

NASA Astrophysics Data System (ADS)

Zhang, Cong; Su, Bo; He, Jingsuo; Zhang, Hongfei; Wu, Yaxiong; Zhang, Shengbo; Zhang, Cunlin

2018-01-01

The terahertz monolithic integrated device is to integrate the pumping area of the terahertz generation, the detection area of the terahertz receiving and the metal waveguide of terahertz transmission on the same substrate. The terahertz generation and detection device use a photoconductive antenna structure the metal waveguide use a microstrip line structure. The evanescent terahertz-bandwidth electric field extending above the terahertz transmission line interacts with, and is modified by, overlaid dielectric samples, thus enabling the characteristic vibrational absorption resonances in the sample to be probed. In this device structure, since the semiconductor substrate of the photoconductive antenna is located between the strip conductor and the dielectric layer of the microstrip line, and the semiconductor substrate cannot grow on the dielectric layer directly. So how to prepare the semiconductor substrate of the photoconductive antenna and how to bond the semiconductor substrate to the dielectric layer of the microstrip line is a key step in the terahertz monolithic integrated device. In order to solve this critical problem, the epitaxial wafer structure of the two semiconductor substrates is given and transferred to the desired substrate by two methods, respectively.

Interconnect assembly for an electronic assembly and assembly method therefor

DOEpatents

Gerbsch, Erich William

2003-06-10

An interconnect assembly and method for a semiconductor device, in which the interconnect assembly can be used in lieu of wirebond connections to form an electronic assembly. The interconnect assembly includes first and second interconnect members. The first interconnect member has a first surface with a first contact and a second surface with a second contact electrically connected to the first contact, while the second interconnect member has a flexible finger contacting the second contact of the first interconnect member. The first interconnect member is adapted to be aligned and registered with a semiconductor device having a contact on a first surface thereof, so that the first contact of the first interconnect member electrically contacts the contact of the semiconductor device. Consequently, the assembly method does not require any wirebonds, but instead merely entails aligning and registering the first interconnect member with the semiconductor device so that the contacts of the first interconnect member and the semiconductor device make electrically contact, and then contacting the second contact of the first interconnect member with the flexible finger of the second interconnect member.

Metal-organic semiconductor interfacial barrier height determination from internal photoemission signal in spectral response measurements

NASA Astrophysics Data System (ADS)

Kumar, Sandeep; Iyer, S. Sundar Kumar

2017-04-01

Accurate and convenient evaluation methods of the interfacial barrier ϕb for charge carriers in metal semiconductor (MS) junctions are important for designing and building better opto-electronic devices. This becomes more critical for organic semiconductor devices where a plethora of molecules are in use and standardised models applicable to myriads of material combinations for the different devices may have limited applicability. In this paper, internal photoemission (IPE) from spectral response (SR) in the ultra-violet to near infra-red range of different MS junctions of metal-organic semiconductor-metal (MSM) test structures is used to determine more realistic MS ϕb values. The representative organic semiconductor considered is [6, 6]-phenyl C61 butyric acid methyl ester, and the metals considered are Al and Au. The IPE signals in the SR measurement of the MSM device are identified and separated before it is analysed to estimate ϕb for the MS junction. The analysis of IPE signals under different bias conditions allows the evaluation of ϕb for both the front and back junctions, as well as for symmetric MSM devices.

Method for fabricating an interconnected array of semiconductor devices

DOEpatents

Grimmer, Derrick P.; Paulson, Kenneth R.; Gilbert, James R.

1989-10-10

Semiconductor layer and conductive layer formed on a flexible substrate, divided into individual devices and interconnected with one another in series by interconnection layers and penetrating terminals.

Methods of Measurement for Semiconductor Materials, Process Control, and Devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1973-01-01

The development of methods of measurement for semiconductor materials, process control, and devices is reported. Significant accomplishments include: (1) Completion of an initial identification of the more important problems in process control for integrated circuit fabrication and assembly; (2) preparations for making silicon bulk resistivity wafer standards available to the industry; and (3) establishment of the relationship between carrier mobility and impurity density in silicon. Work is continuing on measurement of resistivity of semiconductor crystals; characterization of generation-recombination-trapping centers, including gold, in silicon; evaluation of wire bonds and die attachment; study of scanning electron microscopy for wafer inspection and test; measurement of thermal properties of semiconductor devices; determination of S-parameters and delay time in junction devices; and characterization of noise and conversion loss of microwave detector diodes.

Ge/IIIV fin field-effect transistor common gate process and numerical simulations

NASA Astrophysics Data System (ADS)

Chen, Bo-Yuan; Chen, Jiann-Lin; Chu, Chun-Lin; Luo, Guang-Li; Lee, Shyong; Chang, Edward Yi

2017-04-01

This study investigates the manufacturing process of thermal atomic layer deposition (ALD) and analyzes its thermal and physical mechanisms. Moreover, experimental observations and computational fluid dynamics (CFD) are both used to investigate the formation and deposition rate of a film for precisely controlling the thickness and structure of the deposited material. First, the design of the TALD system model is analyzed, and then CFD is used to simulate the optimal parameters, such as gas flow and the thermal, pressure, and concentration fields, in the manufacturing process to assist the fabrication of oxide-semiconductors and devices based on them, and to improve their characteristics. In addition, the experiment applies ALD to grow films on Ge and GaAs substrates with three-dimensional (3-D) transistors having high electric performance. The electrical analysis of dielectric properties, leakage current density, and trapped charges for the transistors is conducted by high- and low-frequency measurement instruments to determine the optimal conditions for 3-D device fabrication. It is anticipated that the competitive strength of such devices in the semiconductor industry will be enhanced by the reduction of cost and improvement of device performance through these optimizations.

An Assessment of Critical Dimension Small Angle X-ray Scattering Metrology for Advanced Semiconductor Manufacturing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Settens, Charles M.

2015-01-01

Simultaneous migration of planar transistors to FinFET architectures, the introduction of a plurality of materials to ensure suitable electrical characteristics, and the establishment of reliable multiple patterning lithography schemes to pattern sub-10 nm feature sizes imposes formidable challenges to current in-line dimensional metrologies. Because the shape of a FinFET channel cross-section immediately influences the electrical characteristics, the evaluation of 3D device structures requires measurement of parameters beyond traditional critical dimension (CD), including their sidewall angles, top corner rounding and footing, roughness, recesses and undercuts at single nanometer dimensions; thus, metrologies require sub-nm and approaching atomic level measurement uncertainty. Synchrotron criticalmore » dimension small angle X-ray scattering (CD-SAXS) has unique capabilities to non-destructively monitor the cross-section shape of surface structures with single nanometer uncertainty and can perform overlay metrology to sub-nm uncertainty. In this dissertation, we perform a systematic experimental investigation using CD-SAXS metrology on a hierarchy of semiconductor 3D device architectures including, high-aspect-ratio contact holes, H2 annealed Si fins, and a series of grating type samples at multiple points along a FinFET fabrication process increasing in structural intricacy and ending with fully fabricated FinFET. Comparative studies between CD-SAXS metrology and other relevant semiconductor dimensional metrologies, particularly CDSEM, CD-AFM and TEM are used to determine physical limits of CD-SAXS approach for advanced semiconductor samples. CD-SAXS experimental tradeoffs, advice for model-dependent analysis and thoughts on the compatibility with a semiconductor manufacturing environment are discussed.« less

Self-Assembly of Nanostructured Electronic Devices (454th Brookhaven Lecture)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Black, Charles

2009-12-16

Given suitable atmospheric conditions, water vapor from the air will crystallize into beautiful structures: snowflakes. Nature provides many other examples of spontaneous organization of materials into regular patterns, which is a process known as self-assembly. Since self-assembly works at all levels, it can be a useful tool for organizing materials on the nanometer scale. In particular, self-assembly provides a precise method for designing materials with improved electronic properties, thereby enabling advances in semiconductor electronics and solar devices. On Wednesday, December 16, at 4 p.m. in Berkner Hall, Charles Black of the Center for Functional Nanomaterials (CFN) will explore this topicmore » during the 454th Brookhaven Lecture, entitled “Self-Assembly of Nanostructured Electronic Devices.” Refreshments will be offered before and after the lecture. To attend this open-to-the-public event, visitors to the Lab ages 16 and older must present photo ID at the Main Gate. During this talk, Dr. Black will discuss examples of how self-assembly is being integrated into semiconductor microelectronics, as advances in the ability to define circuit elements at higher resolution have fueled more than 40 years of performance improvements. Self-assembly also promises advances in the performance of solar devices; thus he will describe his group’s recent results with nanostructured photovoltaic devices.« less

Stretchable and foldable electronic devices

DOEpatents

Rogers, John A; Huang, Yonggang; Ko, Heung Cho; Stoykovich, Mark; Choi, Won Mook; Song, Jizhou; Ahn, Jong Hyun; Kim, Dae Hyeong

2013-10-08

Disclosed herein are stretchable, foldable and optionally printable, processes for making devices and devices such as semiconductors, electronic circuits and components thereof that are capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Strain isolation layers provide good strain isolation to functional device layers. Multilayer devices are constructed to position a neutral mechanical surface coincident or proximate to a functional layer having a material that is susceptible to strain-induced failure. Neutral mechanical surfaces are positioned by one or more layers having a property that is spatially inhomogeneous, such as by patterning any of the layers of the multilayer device.

Stretchable and foldable electronic devices

DOEpatents

Rogers, John A; Huang, Yonggang; Ko, Heung Cho; Stoykovich, Mark; Choi, Won Mook; Song, Jizhou; Ahn, Jong Hyun; Kim, Dae Hyeong

2014-12-09

Disclosed herein are stretchable, foldable and optionally printable, processes for making devices and devices such as semiconductors, electronic circuits and components thereof that are capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Strain isolation layers provide good strain isolation to functional device layers. Multilayer devices are constructed to position a neutral mechanical surface coincident or proximate to a functional layer having a material that is susceptible to strain-induced failure. Neutral mechanical surfaces are positioned by one or more layers having a property that is spatially inhomogeneous, such as by patterning any of the layers of the multilayer device.

Semiconductor structures having electrically insulating and conducting portions formed from an AlSb-alloy layer

DOEpatents

Spahn, O.B.; Lear, K.L.

1998-03-10

The semiconductor structure comprises a plurality of semiconductor layers formed on a substrate including at least one layer of a III-V compound semiconductor alloy comprising aluminum (Al) and antimony (Sb), with at least a part of the AlSb-alloy layer being chemically converted by an oxidation process to form superposed electrically insulating and electrically conducting portions. The electrically insulating portion formed from the AlSb-alloy layer comprises an oxide of aluminum (e.g., Al{sub 2}O{sub 3}), while the electrically conducting portion comprises Sb. A lateral oxidation process allows formation of the superposed insulating and conducting portions below monocrystalline semiconductor layers for forming many different types of semiconductor structures having particular utility for optoelectronic devices such as light-emitting diodes, edge-emitting lasers, vertical-cavity surface-emitting lasers, photodetectors and optical modulators (waveguide and surface normal), and for electronic devices such as heterojunction bipolar transistors, field-effect transistors and quantum-effect devices. The invention is expected to be particularly useful for forming light-emitting devices for use in the 1.3--1.6 {mu}m wavelength range, with the AlSb-alloy layer acting to define an active region of the device and to effectively channel an electrical current therein for efficient light generation. 10 figs.

Active pixel image sensor with a winner-take-all mode of operation

NASA Technical Reports Server (NTRS)

Yadid-Pecht, Orly (Inventor); Mead, Carver (Inventor); Fossum, Eric R. (Inventor)

2003-01-01

An integrated CMOS semiconductor imaging device having two modes of operation that can be performed simultaneously to produce an output image and provide information of a brightest or darkest pixel in the image.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Curtin, D.P.

The process analyzed involves non-production, laboratory environment use of trichloroethylene for the cleaning of semiconductor devices. The option selection centered on the replacement of the trichloroethylene with a non-hazardous material. This process waste assessment was performed as part of a pilot project.

MOSFET's for Cryogenic Amplifiers

NASA Technical Reports Server (NTRS)

Dehaye, R.; Ventrice, C. A.

1987-01-01

Study seeks ways to build transistors that function effectively at liquid-helium temperatures. Report discusses physics of metaloxide/semiconductor field-effect transistors (MOSFET's) and performances of these devices at cryogenic temperatures. MOSFET's useful in highly sensitive cryogenic preamplifiers for infrared astronomy.

New developments in power semiconductors

NASA Technical Reports Server (NTRS)

Sundberg, G. R.

1983-01-01

This paper represents an overview of some recent power semiconductor developments and spotlights new technologies that may have significant impact for aircraft electric secondary power. Primary emphasis will be on NASA-Lewis-supported developments in transistors, diodes, a new family of semiconductors, and solid-state remote power controllers. Several semiconductor companies that are moving into the power arena with devices rated at 400 V and 50 A and above are listed, with a brief look at a few devices.

An evaluation of radiation damage to solid state components flown in low earth orbit satellites.

PubMed

Shin, Myung-Won; Kim, Myung-Hyun

2004-01-01

The effects of total ionising radiation dose upon commercial off-the-shelf semiconductors fitted to satellites operating in low Earth orbit (LEO) conditions was evaluated. The evaluation was performed for the Korea Institute of Technology SATellite-1, (KITSAT-1) which was equipped with commercial solid state components. Two approximate calculation models for space radiation shielding were developed. Verification was performed by comparing the results with detailed three-dimensional calculations using the Monte-Carlo method and measured data from KITSAT-1. It was confirmed that the developed approximate models were reliable for satellite shielding calculations. It was also found that commercial semiconductor devices, which were not radiation hardened, could be damaged within their lifetime due to the total ionising dose they are subject to in the LEO environment. To conclude, an intensive shielding analysis should be considered when commercial devices are used.

Backscattered electron simulations to evaluate sensitivity against electron dosage of buried semiconductor features

NASA Astrophysics Data System (ADS)

Mukhtar, Maseeh; Thiel, Bradley

2018-03-01

In fabrication, overlay measurements of semiconductor device patterns have conventionally been performed using optical methods. Beginning with image-based techniques using box-in-box to the more recent diffraction-based overlay (DBO). Alternatively, use of SEM overlay is under consideration for in-device overlay. Two main application spaces are measurement features from multiple mask levels on the same surface and buried features. Modern CD-SEMs are adept at measuring overlay for cases where all features are on the surface. In order to measure overlay of buried features, HV-SEM is needed. Gate-to-fin and BEOL overlay are important use cases for this technique. A JMONSEL simulation exercise was performed for these two cases using 10 nm line/space gratings of graduated increase in depth of burial. Backscattered energy loss results of these simulations were used to calculate the sensitivity measurements of buried features versus electron dosage for an array of electron beam voltages.

Velocity overshoot decay mechanisms in compound semiconductor field-effect transistors with a submicron characteristic length

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jyegal, Jang, E-mail: jjyegal@inu.ac.kr

Velocity overshoot is a critically important nonstationary effect utilized for the enhanced performance of submicron field-effect devices fabricated with high-electron-mobility compound semiconductors. However, the physical mechanisms of velocity overshoot decay dynamics in the devices are not known in detail. Therefore, a numerical analysis is conducted typically for a submicron GaAs metal-semiconductor field-effect transistor in order to elucidate the physical mechanisms. It is found that there exist three different mechanisms, depending on device bias conditions. Specifically, at large drain biases corresponding to the saturation drain current (dc) region, the velocity overshoot suddenly begins to drop very sensitively due to the onsetmore » of a rapid decrease of the momentum relaxation time, not the mobility, arising from the effect of velocity-randomizing intervalley scattering. It then continues to drop rapidly and decays completely by severe mobility reduction due to intervalley scattering. On the other hand, at small drain biases corresponding to the linear dc region, the velocity overshoot suddenly begins to drop very sensitively due to the onset of a rapid increase of thermal energy diffusion by electrons in the channel of the gate. It then continues to drop rapidly for a certain channel distance due to the increasing thermal energy diffusion effect, and later completely decays by a sharply decreasing electric field. Moreover, at drain biases close to a dc saturation voltage, the mechanism is a mixture of the above two bias conditions. It is suggested that a large secondary-valley energy separation is essential to increase the performance of submicron devices.« less

Inkjet printing of single-crystal films.

PubMed

Minemawari, Hiromi; Yamada, Toshikazu; Matsui, Hiroyuki; Tsutsumi, Jun'ya; Haas, Simon; Chiba, Ryosuke; Kumai, Reiji; Hasegawa, Tatsuo

2011-07-13

The use of single crystals has been fundamental to the development of semiconductor microelectronics and solid-state science. Whether based on inorganic or organic materials, the devices that show the highest performance rely on single-crystal interfaces, with their nearly perfect translational symmetry and exceptionally high chemical purity. Attention has recently been focused on developing simple ways of producing electronic devices by means of printing technologies. 'Printed electronics' is being explored for the manufacture of large-area and flexible electronic devices by the patterned application of functional inks containing soluble or dispersed semiconducting materials. However, because of the strong self-organizing tendency of the deposited materials, the production of semiconducting thin films of high crystallinity (indispensable for realizing high carrier mobility) may be incompatible with conventional printing processes. Here we develop a method that combines the technique of antisolvent crystallization with inkjet printing to produce organic semiconducting thin films of high crystallinity. Specifically, we show that mixing fine droplets of an antisolvent and a solution of an active semiconducting component within a confined area on an amorphous substrate can trigger the controlled formation of exceptionally uniform single-crystal or polycrystalline thin films that grow at the liquid-air interfaces. Using this approach, we have printed single crystals of the organic semiconductor 2,7-dioctyl[1]benzothieno[3,2-b][1]benzothiophene (C(8)-BTBT) (ref. 15), yielding thin-film transistors with average carrier mobilities as high as 16.4 cm(2) V(-1) s(-1). This printing technique constitutes a major step towards the use of high-performance single-crystal semiconductor devices for large-area and flexible electronics applications.

Microscopic properties of ionic liquid/organic semiconductor interfaces revealed by molecular dynamics simulations.

PubMed

Yokota, Yasuyuki; Miyamoto, Hiroo; Imanishi, Akihito; Takeya, Jun; Inagaki, Kouji; Morikawa, Yoshitada; Fukui, Ken-Ichi

2018-05-09

Electric double-layer transistors based on ionic liquid/organic semiconductor interfaces have been extensively studied during the past decade because of their high carrier densities at low operation voltages. Microscopic structures and the dynamics of ionic liquids likely determine the device performance; however, knowledge of these is limited by a lack of appropriate experimental tools. In this study, we investigated ionic liquid/organic semiconductor interfaces using molecular dynamics to reveal the microscopic properties of ionic liquids. The organic semiconductors include pentacene, rubrene, fullerene, and 7,7,8,8-tetracyanoquinodimethane (TCNQ). While ionic liquids close to the substrate always form the specific layered structures, the surface properties of organic semiconductors drastically alter the ionic dynamics. Ionic liquids at the fullerene interface behave as a two-dimensional ionic crystal because of the energy gain derived from the favorable electrostatic interaction on the corrugated periodic substrate.

Design and performance study of a DC-DC flyback converter based on wide bandgap power devices for photovoltaic applications

NASA Astrophysics Data System (ADS)

Alharbi, Salah S.; Alharbi, Saleh S.; Al-bayati, Ali M. S.; Matin, Mohammad

2017-08-01

This paper presents a high-performance dc-dc flyback converter design based on wide bandgap (WBG) semiconductor devices for photovoltaic (PV) applications. Two different power devices, a gallium nitride (GaN)-transistor and a silicon (Si)-MOSFET, are implemented individually in the flyback converter to examine their impact on converter performance. The total power loss of the converter with different power devices is analyzed for various switching frequencies. Converter efficiency is evaluated at different switching frequencies, input voltages, and output power levels. The results reveal that the converter with the GaN-transistor has lower total power loss and better efficiency compared to the converter with the conventional Si-MOSFET.

High operation temperature of HgCdTe photodiodes by bulk defect passivation

NASA Astrophysics Data System (ADS)

Boieriu, Paul; Velicu, S.; Bommena, R.; Buurma, C.; Blisset, C.; Grein, C.; Sivananthan, S.; Hagler, P.

2013-01-01

Spatial noise and the loss of photogenerated current due material non-uniformities limit the performance of long wavelength infrared (LWIR) HgCdTe detector arrays. Reducing the electrical activity of defects is equivalent to lowering their density, thereby allowing detection and discrimination over longer ranges. Infrared focal plane arrays (IRFPAs) in other spectral bands will also benefit from detectivity and uniformity improvements. Larger signal-to-noise ratios permit either improved accuracy of detection/discrimination when an IRFPA is employed under current operating conditions, or provide similar performance with the IRFPA operating under less stringent conditions such as higher system temperature, increased system jitter or damaged read out integrated circuit (ROIC) wells. The bulk passivation of semiconductors with hydrogen continues to be investigated for its potential to become a tool for the fabrication of high performance devices. Inductively coupled plasmas have been shown to improve the quality and uniformity of semiconductor materials and devices. The retention of the benefits following various aging conditions is discussed here.

Semiconductor devices incorporating multilayer interference regions

DOEpatents

Biefeld, Robert M.; Drummond, Timothy J.; Gourley, Paul L.; Zipperian, Thomas E.

1990-01-01

A semiconductor high reflector comprising a number of thin alternating layers of semiconductor materials is electrically tunable and may be used as a temperature insensitive semiconductor laser in a Fabry-Perot configuration.

Thin film photovoltaic device with multilayer substrate

DOEpatents

Catalano, Anthony W.; Bhushan, Manjul

1984-01-01

A thin film photovoltaic device which utilizes at least one compound semiconductor layer chosen from Groups IIB and VA of the Periodic Table is formed on a multilayer substrate The substrate includes a lowermost support layer on which all of the other layers of the device are formed. Additionally, an uppermost carbide or silicon layer is adjacent to the semiconductor layer. Below the carbide or silicon layer is a metal layer of high conductivity and expansion coefficient equal to or slightly greater than that of the semiconductor layer.

Organic Donor-Acceptor Complexes as Novel Organic Semiconductors.

PubMed

Zhang, Jing; Xu, Wei; Sheng, Peng; Zhao, Guangyao; Zhu, Daoben

2017-07-18

Organic donor-acceptor (DA) complexes have attracted wide attention in recent decades, resulting in the rapid development of organic binary system electronics. The design and synthesis of organic DA complexes with a variety of component structures have mainly focused on metallicity (or even superconductivity), emission, or ferroelectricity studies. Further efforts have been made in high-performance electronic investigations. The chemical versatility of organic semiconductors provides DA complexes with a great number of possibilities for semiconducting applications. Organic DA complexes extend the semiconductor family and promote charge separation and transport in organic field-effect transistors (OFETs) and organic photovoltaics (OPVs). In OFETs, the organic complex serves as an active layer across extraordinary charge pathways, ensuring the efficient transport of induced charges. Although an increasing number of organic semiconductors have been reported to exhibit good p- or n-type properties (mobilities higher than 1 or even 10 cm 2 V -1 s -1 ), critical scientific challenges remain in utilizing the advantages of existing semiconductor materials for more and wider applications while maintaining less complicated synthetic or device fabrication processes. DA complex materials have revealed new insight: their unique molecular packing and structure-property relationships. The combination of donors and acceptors could offer practical advantages compared with their unimolecular materials. First, growing crystals of DA complexes with densely packed structures will reduce impurities and traps from the self-assembly process. Second, complexes based on the original structural components could form superior mixture stacking, which can facilitate charge transport depending on the driving force in the coassembly process. Third, the effective use of organic semiconductors can lead to tunable band structures, allowing the operation mode (p- or n-type) of the transistor to be systematically controlled by changing the components. Finally, theoretical calculations based on cocrystals with unique stacking could widen our understanding of structure-property relationships and in turn help us design high-performance semiconductors based on DA complexes. In this Account, we focus on discussing organic DA complexes as a new class of semiconducting materials, including their design, growth methods, packing modes, charge-transport properties, and structure-property relationships. We have also fabricated and investigated devices based on these binary crystals. This interdisciplinary work combines techniques from the fields of self-assembly, crystallography, condensed-matter physics, and theoretical chemistry. Researchers have designed new complex systems, including donor and acceptor compounds that self-assemble in feasible ways into highly ordered cocrystals. We demonstrate that using this crystallization method can easily realize ambipolar or unipolar transport. To further improve device performance, we propose several design strategies, such as using new kinds of donors and acceptors, modulating the energy alignment of the donor (ionization potential, IP) and acceptor (electron affinity, EA) components, and extending the π-conjugated backbones. In addition, we have found that when we use molecular "doping" (2:1 cocrystallization), the charge-transport nature of organic semiconductors can be switched from hole-transport-dominated to electron-transport-dominated. We expect that the formation of cocrystals through the complexation of organic donor and acceptor species will serve as a new strategy to develop semiconductors for organic electronics with superior performances over their corresponding individual components.

Multi-harmonic quantum dot optomechanics in fused LiNbO3-(Al)GaAs hybrids

NASA Astrophysics Data System (ADS)

Nysten, Emeline D. S.; Huo, Yong Heng; Yu, Hailong; Song, Guo Feng; Rastelli, Armando; Krenner, Hubert J.

2017-11-01

We fabricated an acousto-optic semiconductor hybrid device for strong optomechanical coupling of individual quantum emitters and a surface acoustic wave. Our device comprises of a surface acoustic wave chip made from highly piezoelectric LiNbO3 and a GaAs-based semiconductor membrane with an embedded layer of quantum dots. Employing multi-harmonic transducers, we generated sound waves on LiNbO3 over a wide range of radio frequencies. We monitored their coupling to and propagation across the semiconductor membrane, both in the electrical and optical domain. We demonstrate the enhanced optomechanical tuning of the embedded quantum dots with increasing frequencies. This effect was verified by finite element modelling of our device geometry and attributed to an increased localization of the acoustic field within the semiconductor membrane. For moderately high acoustic frequencies, our simulations predict strong optomechanical coupling, making our hybrid device ideally suited for applications in semiconductor based quantum acoustics.

Electrical Properties of Reactive Liquid Crystal Semiconductors

NASA Astrophysics Data System (ADS)

McCulloch, Iain; Coelle, Michael; Genevicius, Kristijonas; Hamilton, Rick; Heckmeier, Michael; Heeney, Martin; Kreouzis, Theo; Shkunov, Maxim; Zhang, Weimin

2008-01-01

Fabrication of display products by low cost printing technologies such as ink jet, gravure offset lithography and flexography requires solution processable semiconductors for the backplane electronics. The products will typically be of lower performance than polysilicon transistors, but comparable to amorphous silicon. A range of prototypes are under development, including rollable electrophoretic displays, active matrix liquid crystal displays (AMLCD's), and flexible organic light-emitting diode (OLED) displays. Organic semiconductors that offer both electrical performance and stability with respect to storage and operation under ambient conditions are required. This work describes the initial evaluation of reactive mesogen semiconductors, which can polymerise within mesophase temperatures, “freezing in” the order in crosslinked domains. These crosslinked domains offer mechanical stability and are inert to solvent exposure in further processing steps. Reactive mesogens containing conjugated aromatic cores, designed to facilitate charge transport and provide good oxidative stability, were prepared and their liquid crystalline properties evaluated. Both time-of-flight and field effect transistor devices were prepared and their electrical characterisation reported.

Narrowband light detection via internal quantum efficiency manipulation of organic photodiodes

NASA Astrophysics Data System (ADS)

Armin, Ardalan; Jansen-van Vuuren, Ross D.; Kopidakis, Nikos; Burn, Paul L.; Meredith, Paul

2015-02-01

Spectrally selective light detection is vital for full-colour and near-infrared (NIR) imaging and machine vision. This is not possible with traditional broadband-absorbing inorganic semiconductors without input filtering, and is yet to be achieved for narrowband absorbing organic semiconductors. We demonstrate the first sub-100 nm full-width-at-half-maximum visible-blind red and NIR photodetectors with state-of-the-art performance across critical response metrics. These devices are based on organic photodiodes with optically thick junctions. Paradoxically, we use broadband-absorbing organic semiconductors and utilize the electro-optical properties of the junction to create the narrowest NIR-band photoresponses yet demonstrated. In this context, these photodiodes outperform the encumbent technology (input filtered inorganic semiconductor diodes) and emerging technologies such as narrow absorber organic semiconductors or quantum nanocrystals. The design concept allows for response tuning and is generic for other spectral windows. Furthermore, it is material-agnostic and applicable to other disordered and polycrystalline semiconductors.

Narrowband Light Detection via Internal Quantum Efficiency Manipulation of Organic Photodiodes

DOE PAGES

Armin, A.; Jansen-van Vuuren, R. D.; Kopidakis, N.; ...

2015-02-01

Spectrally selective light detection is vital for full-colour and near-infrared (NIR) imaging and machine vision. This is not possible with traditional broadband-absorbing inorganic semiconductors without input filtering, and is yet to be achieved for narrowband absorbing organic semiconductors. We demonstrate the first sub-100 nm full-width-at-half-maximum visible-blind red and NIR photodetectors with state-of-the-art performance across critical response metrics. These devices are based on organic photodiodes with optically thick junctions. Paradoxically, we use broadband-absorbing organic semiconductors and utilize the electro-optical properties of the junction to create the narrowest NIR-band photoresponses yet demonstrated. In this context, these photodiodes outperform the encumbent technology (inputmore » filtered inorganic semiconductor diodes) and emerging technologies such as narrow absorber organic semiconductors or quantum nanocrystals. The design concept allows for response tuning and is generic for other spectral windows. Furthermore, it is materialagnostic and applicable to other disordered and polycrystalline semiconductors.« less

Medium scale carbon nanotube thin film integrated circuits on flexible plastic substrates

DOEpatents

Rogers, John A; Cao, Qing; Alam, Muhammad; Pimparkar, Ninad

2015-02-03

The present invention provides device components geometries and fabrication strategies for enhancing the electronic performance of electronic devices based on thin films of randomly oriented or partially aligned semiconducting nanotubes. In certain aspects, devices and methods of the present invention incorporate a patterned layer of randomly oriented or partially aligned carbon nanotubes, such as one or more interconnected SWNT networks, providing a semiconductor channel exhibiting improved electronic properties relative to conventional nanotubes-based electronic systems.

Multifunctional graphene optoelectronic devices capable of detecting and storing photonic signals.

PubMed

Jang, Sukjae; Hwang, Euyheon; Lee, Youngbin; Lee, Seungwoo; Cho, Jeong Ho

2015-04-08

The advantages of graphene photodetectors were utilized to design a new multifunctional graphene optoelectronic device. Organic semiconductors, gold nanoparticles (AuNPs), and graphene were combined to fabricate a photodetecting device with a nonvolatile memory function for storing photonic signals. A pentacene organic semiconductor acted as a light absorption layer in the device and provided a high hole photocurrent to the graphene channel. The AuNPs, positioned between the tunneling and blocking dielectric layers, acted as both a charge trap layer and a plasmonic light scatterer, which enable storing of the information about the incident light. The proposed pentacene-graphene-AuNP hybrid photodetector not only performed well as a photodetector in the visible light range, it also was able to store the photonic signal in the form of persistent current. The good photodetection performance resulted from the plasmonics-enabled enhancement of the optical absorption and from the photogating mechanisms in the pentacene. The device provided a photoresponse that depended on the wavelength of incident light; therefore, the signal information (both the wavelength and intensity) of the incident light was effectively committed to memory. The simple process of applying a negative pulse gate voltage could then erase the programmed information. The proposed photodetector with the capacity to store a photonic signal in memory represents a significant step toward the use of graphene in optoelectronic devices.

Review on analog/radio frequency performance of advanced silicon MOSFETs

NASA Astrophysics Data System (ADS)

Passi, Vikram; Raskin, Jean-Pierre

2017-12-01

Aggressive gate-length downscaling of the metal-oxide-semiconductor field-effect transistor (MOSFET) has been the main stimulus for the growth of the integrated circuit industry. This downscaling, which has proved beneficial to digital circuits, is primarily the result of the need for improved circuit performance and cost reduction and has resulted in tremendous reduction of the carrier transit time across the channel, thereby resulting in very high cut-off frequencies. It is only in recent decades that complementary metal-oxide-semiconductor (CMOS) field-effect transistor (FET) has been considered as the radio frequency (RF) technology of choice. In this review, the status of the digital, analog and RF figures of merit (FoM) of silicon-based FETs is presented. State-of-the-art devices with very good performance showing low values of drain-induced barrier lowering, sub-threshold swing, high values of gate transconductance, Early voltage, cut-off frequencies, and low minimum noise figure, and good low-frequency noise characteristic values are reported. The dependence of these FoM on the device gate length is also shown, helping the readers to understand the trends and challenges faced by shorter CMOS nodes. Device performance boosters including silicon-on-insulator substrates, multiple-gate architectures, strain engineering, ultra-thin body and buried-oxide and also III-V and 2D materials are discussed, highlighting the transistor characteristics that are influenced by these boosters. A brief comparison of the two main contenders in continuing Moore’s law, ultra-thin body buried-oxide and fin field-effect transistors are also presented. The authors would like to mention that despite extensive research carried out in the semiconductor industry, silicon-based MOSFET will continue to be the driving force in the foreseeable future.

Air-gating and chemical-gating in transistors and sensing devices made from hollow TiO2 semiconductor nanotubes

NASA Astrophysics Data System (ADS)

Alivov, Yahya; Funke, Hans; Nagpal, Prashant

2015-07-01

Rapid miniaturization of electronic devices down to the nanoscale, according to Moore’s law, has led to some undesirable effects like high leakage current in transistors, which can offset additional benefits from scaling down. Development of three-dimensional transistors, by spatial extension in the third dimension, has allowed higher contact area with a gate electrode and better control over conductivity in the semiconductor channel. However, these devices do not utilize the large surface area and interfaces for new electronic functionality. Here, we demonstrate air gating and chemical gating in hollow semiconductor nanotube devices and highlight the potential for development of novel transistors that can be modulated using channel bias, gate voltage, chemical composition, and concentration. Using chemical gating, we reversibly altered the conductivity of nanoscaled semiconductor nanotubes (10-500 nm TiO2 nanotubes) by six orders of magnitude, with a tunable rectification factor (ON/OFF ratio) ranging from 1-106. While demonstrated air- and chemical-gating speeds were slow here (˜seconds) due to the mechanical-evacuation rate and size of our chamber, the small nanoscale volume of these hollow semiconductors can enable much higher switching speeds, limited by the rate of adsorption/desorption of molecules at semiconductor interfaces. These chemical-gating effects are completely reversible, additive between different chemical compositions, and can enable semiconductor nanoelectronic devices for ‘chemical transistors’, ‘chemical diodes’, and very high-efficiency sensing applications.

II-VI Narrow-Bandgap Semiconductors for Optoelectronics

NASA Astrophysics Data System (ADS)

Baker, Ian

The field of narrow-gap II-VI materials is dominated by the compound semiconductor mercury cadmium telluride, (Hg1-x Cd x Te or MCT), which supports a large industry in infrared detectors, cameras and infrared systems. It is probably true to say that HgCdTe is the third most studied semiconductor after silicon and gallium arsenide. Hg1-x Cd x Te is the material most widely used in high-performance infrared detectors at present. By changing the composition x the spectral response of the detector can be made to cover the range from 1 μm to beyond 17 μm. The advantages of this system arise from a number of features, notably: close lattice matching, high optical absorption coefficient, low carrier generation rate, high electron mobility and readily available doping techniques. These advantages mean that very sensitive infrared detectors can be produced at relatively high operating temperatures. Hg1-x Cd x Te multilayers can be readily grown in vapor-phase epitaxial processes. This provides the device engineer with complex doping and composition profiles that can be used to further enhance the electro-optic performance, leading to low-cost, large-area detectors in the future. The main purpose of this chapter is to describe the applications, device physics and technology of II-VI narrow-bandgap devices, focusing on HgCdTe but also including Hg1-x Mn x Te and Hg1-x Zn x Te. It concludes with a review of the research and development programs into third-generation infrared detector technology (so-called GEN III detectors) being performed in centers around the world.

Atomically-thin molecular layers for electrode modification of organic transistors

NASA Astrophysics Data System (ADS)

Gim, Yuseong; Kang, Boseok; Kim, Bongsoo; Kim, Sun-Guk; Lee, Joong-Hee; Cho, Kilwon; Ku, Bon-Cheol; Cho, Jeong Ho

2015-08-01

Atomically-thin molecular layers of aryl-functionalized graphene oxides (GOs) were used to modify the surface characteristics of source-drain electrodes to improve the performances of organic field-effect transistor (OFET) devices. The GOs were functionalized with various aryl diazonium salts, including 4-nitroaniline, 4-fluoroaniline, or 4-methoxyaniline, to produce several types of GOs with different surface functional groups (NO2-Ph-GO, F-Ph-GO, or CH3O-Ph-GO, respectively). The deposition of aryl-functionalized GOs or their reduced derivatives onto metal electrode surfaces dramatically enhanced the electrical performances of both p-type and n-type OFETs relative to the performances of OFETs prepared without the GO modification layer. Among the functionalized rGOs, CH3O-Ph-rGO yielded the highest hole mobility of 0.55 cm2 V-1 s-1 and electron mobility of 0.17 cm2 V-1 s-1 in p-type and n-type FETs, respectively. Two governing factors: (1) the work function of the modified electrodes and (2) the crystalline microstructures of the benchmark semiconductors grown on the modified electrode surface were systematically investigated to reveal the origin of the performance improvements. Our simple, inexpensive, and scalable electrode modification technique provides a significant step toward optimizing the device performance by engineering the semiconductor-electrode interfaces in OFETs.Atomically-thin molecular layers of aryl-functionalized graphene oxides (GOs) were used to modify the surface characteristics of source-drain electrodes to improve the performances of organic field-effect transistor (OFET) devices. The GOs were functionalized with various aryl diazonium salts, including 4-nitroaniline, 4-fluoroaniline, or 4-methoxyaniline, to produce several types of GOs with different surface functional groups (NO2-Ph-GO, F-Ph-GO, or CH3O-Ph-GO, respectively). The deposition of aryl-functionalized GOs or their reduced derivatives onto metal electrode surfaces dramatically enhanced the electrical performances of both p-type and n-type OFETs relative to the performances of OFETs prepared without the GO modification layer. Among the functionalized rGOs, CH3O-Ph-rGO yielded the highest hole mobility of 0.55 cm2 V-1 s-1 and electron mobility of 0.17 cm2 V-1 s-1 in p-type and n-type FETs, respectively. Two governing factors: (1) the work function of the modified electrodes and (2) the crystalline microstructures of the benchmark semiconductors grown on the modified electrode surface were systematically investigated to reveal the origin of the performance improvements. Our simple, inexpensive, and scalable electrode modification technique provides a significant step toward optimizing the device performance by engineering the semiconductor-electrode interfaces in OFETs. Electronic supplementary information (ESI) available. See DOI: 10.1039/c5nr03307a

SEMICONDUCTOR INTEGRATED CIRCUITS: A quasi-3-dimensional simulation method for a high-voltage level-shifting circuit structure

NASA Astrophysics Data System (ADS)

Jizhi, Liu; Xingbi, Chen

2009-12-01

A new quasi-three-dimensional (quasi-3D) numeric simulation method for a high-voltage level-shifting circuit structure is proposed. The performances of the 3D structure are analyzed by combining some 2D device structures; the 2D devices are in two planes perpendicular to each other and to the surface of the semiconductor. In comparison with Davinci, the full 3D device simulation tool, the quasi-3D simulation method can give results for the potential and current distribution of the 3D high-voltage level-shifting circuit structure with appropriate accuracy and the total CPU time for simulation is significantly reduced. The quasi-3D simulation technique can be used in many cases with advantages such as saving computing time, making no demands on the high-end computer terminals, and being easy to operate.

Control of Ga-oxide interlayer growth and Ga diffusion in SiO2/GaN stacks for high-quality GaN-based metal-oxide-semiconductor devices with improved gate dielectric reliability

NASA Astrophysics Data System (ADS)

Yamada, Takahiro; Watanabe, Kenta; Nozaki, Mikito; Yamada, Hisashi; Takahashi, Tokio; Shimizu, Mitsuaki; Yoshigoe, Akitaka; Hosoi, Takuji; Shimura, Takayoshi; Watanabe, Heiji

2018-01-01

A simple and feasible method for fabricating high-quality and highly reliable GaN-based metal-oxide-semiconductor (MOS) devices was developed. The direct chemical vapor deposition of SiO2 films on GaN substrates forming Ga-oxide interlayers was carried out to fabricate SiO2/GaO x /GaN stacked structures. Although well-behaved hysteresis-free GaN-MOS capacitors with extremely low interface state densities below 1010 cm-2 eV-1 were obtained by postdeposition annealing, Ga diffusion into overlying SiO2 layers severely degraded the dielectric breakdown characteristics. However, this problem was found to be solved by rapid thermal processing, leading to the superior performance of the GaN-MOS devices in terms of interface quality, insulating property, and gate dielectric reliability.

Crystal growth of device quality GaAs in space

NASA Technical Reports Server (NTRS)

Gatos, H. C.; Lagowski, J.

1985-01-01

The present program has been aimed at solving the fundamental and technological problems associated with Crystal Growth of Device Quality in Space. The initial stage of the program was devoted strictly to ground-based research. The unsolved problems associated with the growth of bulk GaAs in the presence of gravitational forces were explored. Reliable chemical, structural and electronic characterization methods were developed which would permit the direct relation of the salient materials parameters (particularly those affected by zero gravity conditions) to the electronic characteristics of single crystal GaAs, in turn to device performance. These relationships are essential for the development of optimum approaches and techniques. It was concluded that the findings on elemental semiconductors Ge and Si regarding crystal growth, segregation, chemical composition, defect interactions, and materials properties-electronic properties relationships are not necessarily applicable to GaAs (and to other semiconductor compounds). In many instances totally unexpected relationships were found to prevail.

Vacuum-processed polyethylene as a dielectric for low operating voltage organic field effect transistors

PubMed Central

Kanbur, Yasin; Irimia-Vladu, Mihai; Głowacki, Eric D.; Voss, Gundula; Baumgartner, Melanie; Schwabegger, Günther; Leonat, Lucia; Ullah, Mujeeb; Sarica, Hizir; Erten-Ela, Sule; Schwödiauer, Reinhard; Sitter, Helmut; Küçükyavuz, Zuhal; Bauer, Siegfried; Sariciftci, Niyazi Serdar

2012-01-01

We report on the fabrication and performance of vacuum-processed organic field effect transistors utilizing evaporated low-density polyethylene (LD-PE) as a dielectric layer. With C60 as the organic semiconductor, we demonstrate low operating voltage transistors with field effect mobilities in excess of 4 cm2/Vs. Devices with pentacene showed a mobility of 0.16 cm2/Vs. Devices using tyrian Purple as semiconductor show low-voltage ambipolar operation with equal electron and hole mobilities of ∼0.3 cm2/Vs. These devices demonstrate low hysteresis and operational stability over at least several months. Grazing-angle infrared spectroscopy of evaporated thin films shows that the structure of the polyethylene is similar to solution-cast films. We report also on the morphological and dielectric properties of these films. Our experiments demonstrate that polyethylene is a stable dielectric supporting both hole and electron channels. PMID:23483783

Semiconductor devices incorporating multilayer interference regions

DOEpatents

Biefeld, R.M.; Drummond, T.J.; Gourley, P.L.; Zipperian, T.E.

1987-08-31

A semiconductor high reflector comprising a number of thin alternating layers of semiconductor materials is electrically tunable and may be used as a temperature insensitive semiconductor laser in a Fabry-Perot configuration. 8 figs.

Cycling excitation process: An ultra efficient and quiet signal amplification mechanism in semiconductor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, Yu-Hsin; Yan, Lujiang; Zhang, Alex Ce

2015-08-03

Signal amplification, performed by transistor amplifiers with its merit rated by the efficiency and noise characteristics, is ubiquitous in all electronic systems. Because of transistor thermal noise, an intrinsic signal amplification mechanism, impact ionization was sought after to complement the limits of transistor amplifiers. However, due to the high operation voltage (30-200 V typically), low power efficiency, limited scalability, and, above all, rapidly increasing excess noise with amplification factor, impact ionization has been out of favor for most electronic systems except for a few applications such as avalanche photodetectors and single-photon Geiger detectors. Here, we report an internal signal amplification mechanismmore » based on the principle of the phonon-assisted cycling excitation process (CEP). Si devices using this concept show ultrahigh gain, low operation voltage, CMOS compatibility, and, above all, quantum limit noise performance that is 30 times lower than devices using impact ionization. Established on a unique physical effect of attractive properties, CEP-based devices can potentially revolutionize the fields of semiconductor electronics.« less

Amorphous oxide alloys as interfacial layers with broadly tunable electronic structures for organic photovoltaic cells.

PubMed

Zhou, Nanjia; Kim, Myung-Gil; Loser, Stephen; Smith, Jeremy; Yoshida, Hiroyuki; Guo, Xugang; Song, Charles; Jin, Hosub; Chen, Zhihua; Yoon, Seok Min; Freeman, Arthur J; Chang, Robert P H; Facchetti, Antonio; Marks, Tobin J

2015-06-30

In diverse classes of organic optoelectronic devices, controlling charge injection, extraction, and blocking across organic semiconductor-inorganic electrode interfaces is crucial for enhancing quantum efficiency and output voltage. To this end, the strategy of inserting engineered interfacial layers (IFLs) between electrical contacts and organic semiconductors has significantly advanced organic light-emitting diode and organic thin film transistor performance. For organic photovoltaic (OPV) devices, an electronically flexible IFL design strategy to incrementally tune energy level matching between the inorganic electrode system and the organic photoactive components without varying the surface chemistry would permit OPV cells to adapt to ever-changing generations of photoactive materials. Here we report the implementation of chemically/environmentally robust, low-temperature solution-processed amorphous transparent semiconducting oxide alloys, In-Ga-O and Ga-Zn-Sn-O, as IFLs for inverted OPVs. Continuous variation of the IFL compositions tunes the conduction band minima over a broad range, affording optimized OPV power conversion efficiencies for multiple classes of organic active layer materials and establishing clear correlations between IFL/photoactive layer energetics and device performance.

Lattice matched semiconductor growth on crystalline metallic substrates

DOEpatents

Norman, Andrew G; Ptak, Aaron J; McMahon, William E

2013-11-05

Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a metal or metal alloy substrate having a crystalline surface with a known lattice parameter (a). The methods further include growing a crystalline semiconductor alloy layer on the crystalline substrate surface by coincident site lattice matched epitaxy. The semiconductor layer may be grown without any buffer layer between the alloy and the crystalline surface of the substrate. The semiconductor alloy may be prepared to have a lattice parameter (a') that is related to the lattice parameter (a). The semiconductor alloy may further be prepared to have a selected band gap.

77 FR 60721 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Notice of...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-10-04

... Circuit Devices and Products Containing Same; Notice of Commission Determination Not To Review an Initial... public record for this investigation may be viewed on the Commission's electronic docket (EDIS) at http... certain semiconductor integrated circuit devices and products containing same by reason of infringement of...

77 FR 19032 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same Notice of Receipt...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-03-29

... INTERNATIONAL TRADE COMMISSION [DN 2888] Certain Semiconductor Integrated Circuit Devices and... Integrated Circuit Devices and Products Containing Same, DN 2888; the Commission is soliciting comments on... Commission's electronic docket (EDIS) at http://edis.usitc.gov , and will be available for inspection during...

Sustained hole inversion layer in a wide-bandgap metal-oxide semiconductor with enhanced tunnel current

NASA Astrophysics Data System (ADS)

Shoute, Gem; Afshar, Amir; Muneshwar, Triratna; Cadien, Kenneth; Barlage, Douglas

2016-02-01

Wide-bandgap, metal-oxide thin-film transistors have been limited to low-power, n-type electronic applications because of the unipolar nature of these devices. Variations from the n-type field-effect transistor architecture have not been widely investigated as a result of the lack of available p-type wide-bandgap inorganic semiconductors. Here, we present a wide-bandgap metal-oxide n-type semiconductor that is able to sustain a strong p-type inversion layer using a high-dielectric-constant barrier dielectric when sourced with a heterogeneous p-type material. A demonstration of the utility of the inversion layer was also investigated and utilized as the controlling element in a unique tunnelling junction transistor. The resulting electrical performance of this prototype device exhibited among the highest reported current, power and transconductance densities. Further utilization of the p-type inversion layer is critical to unlocking the previously unexplored capability of metal-oxide thin-film transistors, such applications with next-generation display switches, sensors, radio frequency circuits and power converters.

Evaluating nanoscale ultra-thin metal films by means of lateral photovoltaic effect in metal-semiconductor structure.

PubMed

Zheng, Diyuan; Yu, Chongqi; Zhang, Qian; Wang, Hui

2017-12-15

Nanoscale metal-semiconductor (MS) structure materials occupy an important position in semiconductor and microelectronic field due to their abundant physical phenomena and effects. The thickness of metal films is a critical factor in determining characteristics of MS devices. How to detect or evaluate the metal thickness is always a key issue for realizing high performance MS devices. In this work, we propose a direct surface detection by use of the lateral photovoltaic effect (LPE) in MS structure, which can not only measure nanoscale thickness, but also detect the fluctuation of metal films. This method is based on the fact that the output of lateral photovoltaic voltage (LPV) is closely linked with the metal thickness at the laser spot. We believe this laser-based contact-free detection is a useful supplement to the traditional methods, such as AFM, SEM, TEM or step profiler. This is because these traditional methods are always incapable of directly detecting ultra-thin metal films in MS structure materials.

Graphene-Mesoporous Si Nanocomposite as a Compliant Substrate for Heteroepitaxy.

PubMed

Boucherif, Abderrahim Rahim; Boucherif, Abderraouf; Kolhatkar, Gitanjali; Ruediger, Andreas; Arès, Richard

2017-05-01

The ultimate performance of a solid state device is limited by the restricted number of crystalline substrates that are available for epitaxial growth. As a result, only a small fraction of semiconductors are usable. This study describes a novel concept for a tunable compliant substrate for epitaxy, based on a graphene-porous silicon nanocomposite, which extends the range of available lattice constants for epitaxial semiconductor alloys. The presence of graphene and its effect on the strain of the porous layer lattice parameter are discussed in detail and new remarkable properties are demonstrated. These include thermal stability up to 900 °C, lattice tuning up to 0.9 % mismatch, and compliance under stress for virtual substrate thicknesses of several micrometers. A theoretical model is proposed to define the compliant substrate design rules. These advances lay the foundation for the fabrication of a compliant substrate that could unlock the lattice constant restrictions for defect-free new epitaxial semiconductor alloys and devices. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Evaluating nanoscale ultra-thin metal films by means of lateral photovoltaic effect in metal-semiconductor structure

NASA Astrophysics Data System (ADS)

Zheng, Diyuan; Yu, Chongqi; Zhang, Qian; Wang, Hui

2017-12-01

Nanoscale metal-semiconductor (MS) structure materials occupy an important position in semiconductor and microelectronic field due to their abundant physical phenomena and effects. The thickness of metal films is a critical factor in determining characteristics of MS devices. How to detect or evaluate the metal thickness is always a key issue for realizing high performance MS devices. In this work, we propose a direct surface detection by use of the lateral photovoltaic effect (LPE) in MS structure, which can not only measure nanoscale thickness, but also detect the fluctuation of metal films. This method is based on the fact that the output of lateral photovoltaic voltage (LPV) is closely linked with the metal thickness at the laser spot. We believe this laser-based contact-free detection is a useful supplement to the traditional methods, such as AFM, SEM, TEM or step profiler. This is because these traditional methods are always incapable of directly detecting ultra-thin metal films in MS structure materials.

Highly soluble [1]benzothieno[3,2-b]benzothiophene (BTBT) derivatives for high-performance, solution-processed organic field-effect transistors.

PubMed

Ebata, Hideaki; Izawa, Takafumi; Miyazaki, Eigo; Takimiya, Kazuo; Ikeda, Masaaki; Kuwabara, Hirokazu; Yui, Tatsuto

2007-12-26

2,7-Dialkyl[1]benzothieno[3,2-b]benzothiophenes were tested as solution-processible molecular semiconductors. Thin films of the organic semiconductors deposited on Si/SiO2 substrates by spin coating have well-ordered structures as confirmed by XRD analysis. Evaluations of the devices under ambient conditions showed typical p-channel FET responses with the field-effect mobility higher than 1.0 cm2 V-1 s-1 and Ion/Ioff of approximately 10(7).

System for characterizing semiconductor materials and photovoltaic devices through calibration

DOEpatents

Sopori, Bhushan L.; Allen, Larry C.; Marshall, Craig; Murphy, Robert C.; Marshall, Todd

1998-01-01

A method and apparatus for measuring characteristics of a piece of material, typically semiconductor materials including photovoltaic devices. The characteristics may include dislocation defect density, grain boundaries, reflectance, external LBIC, internal LBIC, and minority carrier diffusion length. The apparatus includes a light source, an integrating sphere, and a detector communicating with a computer. The measurement or calculation of the characteristics is calibrated to provide accurate, absolute values. The calibration is performed by substituting a standard sample for the piece of material, the sample having a known quantity of one or more of the relevant characteristics. The quantity measured by the system of the relevant characteristic is compared to the known quantity and a calibration constant is created thereby.

Application of CaCu3Ti4O12 based quadruple perovskites as a promising candidate for optoelectronic devices

NASA Astrophysics Data System (ADS)

Pal, Kamalesh; Jana, Rajkumar; Dey, Arka; Ray, Partha P.; Seikh, Md Motin; Gayen, Arup

2018-05-01

We report the synthesis of nanosized (40-50 nm) CaCu3-xMnxTi4-xMnxO12 (x = 0, 0.5 and 1) quadruple perovskite (QP) semiconductor via a modified combustion method for use as Schottky barrier diode (SBD) at the Al/QP junction. The fabricated SBD is analysed on the basis of thermionic emission theory to observe its quality and some important diode parameters. For insight analysis of charge transport mechanism through metal-semiconductor junction, theory of space charge limited currents is applied and discussed in the light of parameters like carrier concentration, mobility-lifetime product and diffusion length. The Mn-doped exhibit better device performance compared to parent material.

System for characterizing semiconductor materials and photovoltaic devices through calibration

DOEpatents

Sopori, B.L.; Allen, L.C.; Marshall, C.; Murphy, R.C.; Marshall, T.

1998-05-26

A method and apparatus are disclosed for measuring characteristics of a piece of material, typically semiconductor materials including photovoltaic devices. The characteristics may include dislocation defect density, grain boundaries, reflectance, external LBIC, internal LBIC, and minority carrier diffusion length. The apparatus includes a light source, an integrating sphere, and a detector communicating with a computer. The measurement or calculation of the characteristics is calibrated to provide accurate, absolute values. The calibration is performed by substituting a standard sample for the piece of material, the sample having a known quantity of one or more of the relevant characteristics. The quantity measured by the system of the relevant characteristic is compared to the known quantity and a calibration constant is created thereby. 44 figs.

Steady-state photoluminescent excitation characterization of semiconductor carrier recombination.

PubMed

Bhosale, J S; Moore, J E; Wang, X; Bermel, P; Lundstrom, M S

2016-01-01

Photoluminescence excitation spectroscopy is a contactless characterization technique that can provide valuable information about the surface and bulk recombination parameters of a semiconductor device, distinct from other sorts of photoluminescent measurements. For this technique, a temperature-tuned light emitting diode (LED) has several advantages over other light sources. The large radiation density offered by LEDs from near-infrared to ultraviolet region at a low cost enables efficient and fast photoluminescence measurements. A simple and inexpensive LED-based setup facilitates measurement of surface recombination velocity and bulk Shockley-Read-Hall lifetime, which are key parameters to assess device performance. Under the right conditions, this technique can also provide a contactless way to measure the external quantum efficiency of a solar cell.

Steady-state photoluminescent excitation characterization of semiconductor carrier recombination

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bhosale, J. S.; Department of Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana 47907; Moore, J. E.

2016-01-15

Photoluminescence excitation spectroscopy is a contactless characterization technique that can provide valuable information about the surface and bulk recombination parameters of a semiconductor device, distinct from other sorts of photoluminescent measurements. For this technique, a temperature-tuned light emitting diode (LED) has several advantages over other light sources. The large radiation density offered by LEDs from near-infrared to ultraviolet region at a low cost enables efficient and fast photoluminescence measurements. A simple and inexpensive LED-based setup facilitates measurement of surface recombination velocity and bulk Shockley-Read-Hall lifetime, which are key parameters to assess device performance. Under the right conditions, this technique canmore » also provide a contactless way to measure the external quantum efficiency of a solar cell.« less

Veritable electronic characteristics in ZnO nanowire circuits uncovered by the four-terminal method at a low temperature

NASA Astrophysics Data System (ADS)

Li, Xin; Zhang, Qi

2017-04-01

Understanding the natural electrical properties in semiconductor channels and the carrier transport across the metal-semiconductor contact is essential to improve the performance of nanowire devices. This work presents the true electronic characteristics of ZnO nanowire devices measured by a four-electrode method at a low-temperature environment. The temperature rise leads to the decrease in near-band-gap emission, which is attributed to two non-radiative recombination processes. For ZnO circuits, thermionic emission carrier transport mechanism plays a dominant role at Ti-Au/ZnO interface and the transport mechanism in ZnO nanowires is governed by two competitive thermal activation conduction processes: optical or acoustic phonons assisting hopping.

Screening of inorganic wide-bandgap p-type semiconductors for high performance hole transport layers in organic photovoltaic devices

NASA Astrophysics Data System (ADS)

Ginley, David; Zakutayev, Andriy; Garcia, Andreas; Widjonarko, Nicodemus; Ndione, Paul; Sigdel, Ajaya; Parilla, Phillip; Olson, Dana; Perkins, John; Berry, Joseph

2011-03-01

We will report on the development of novel inorganic hole transport layers (HTL) for organic photovoltaics (OPV). All the studied materials belong to the general class of wide-bandgap p-type oxide semiconductors. Potential candidates suitable for HTL applications include SnO, NiO, Cu2O (and related CuAlO2, CuCrO2, SrCu2O4 etc) and Co3O4 (and related ZnCo2O4, NiCo2O4, MgCo2O4 etc.). Materials have been optimized by high-throughput combinatorial approaches. The thin films were deposited by RF sputtering and pulsed laser deposition at ambient and elevated temperatures. Performance of the inorganic HTLs and that of the reference organic PEDOT:PSS HTL were compared by measuring the power conversion efficiencies and spectral responses of the P3HT/PCBM- and PCDTBT/PCBM-based OPV devices. Preliminary results indicate that Co3O4-based HTLs have performance comparable to that of our previously reported NiOs and PEDOT:PSS HTLs, leading to a power conversion efficiency of about 4 percent. The effect of composition and work function of the ternary materials on their performance in OPV devices is under investigation.

Non- contacting capacitive diagnostic device

DOEpatents

Ellison, Timothy

2005-07-12

A non-contacting capacitive diagnostic device includes a pulsed light source for producing an electric field in a semiconductor or photovoltaic device or material to be evaluated and a circuit responsive to the electric field. The circuit is not in physical contact with the device or material being evaluated and produces an electrical signal characteristic of the electric field produced in the device or material. The diagnostic device permits quality control and evaluation of semiconductor or photovoltaic device properties in continuous manufacturing processes.

Theoretical study in carrier mobility of two-dimensional materials

NASA Astrophysics Data System (ADS)

Huang, R.

2017-09-01

Recently, the theoretical prediction on carrier mobility of two-dimensional (2D) materials has aroused wild attention. At present, there is still a large gap between the theoretical prediction and the device performance of the semiconductor based on the 2D layer semiconductor materials such as graphene. It is particularly important to theoretically design and screen the high-performance 2D layered semiconductor materials with suitable band gap and high carrier mobility. This paper introduces some 2D materials with fine properties and deduces the formula for mobility of the isotropic materials on the basis of the deformation potential theory and Fermic golden rule under acoustic phonon scattering conditions, and then discusses the carrier mobility of anisotropic materials with Dirac cones. We point out the misconceptions in the existing literature and discuss the correct ones.

Methods of measurement for semiconductor materials, process control, and devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1972-01-01

Activities directed toward the development of methods of measurement for semiconductor materials, process control, and devices are described. Accomplishments include the determination of the reasons for differences in measurements of transistor delay time, identification of an energy level model for gold-doped silicon, and the finding of evidence that it does not appear to be necessary for an ultrasonic bonding tool to grip the wire and move it across the substrate metallization to make the bond. Work is continuing on measurement of resistivity of semiconductor crystals; study of gold-doped silicon; development of the infrared response technique; evaluation of wire bonds and die attachment; measurement of thermal properties of semiconductor devices, delay time, and related carrier transport properties in junction devices, and noise properties of microwave diodes; and characterization of silicon nuclear radiation detectors.

Preface of 16th International conference on Defects, Recognition, Imaging and Physics in Semiconductors

NASA Astrophysics Data System (ADS)

Yang, Deren; Xu, Ke

2016-11-01

The 16th International conference on Defects-Recognition, Imaging and Physics in Semiconductors (DRIP-XVI) was held at the Worldhotel Grand Dushulake in Suzhou, China from 6th to 10th September 2015, around the 30th anniversary of the first DRIP conference. It was hosted by the Suzhou Institute of Nano-tech and Nano-bionics (SINANO), Chinese Academy of Sciences. On this occasion, about one hundred participants from nineteen countries attended the event. And a wide range of subjects were addressed during the conference: physics of point and extended defects in semiconductors: origin, electrical, optical and magnetic properties of defects; diagnostics techniques of crystal growth and processing of semiconductor materials (in-situ and process control); device imaging and mapping to evaluate performance and reliability; defect analysis in degraded optoelectronic and electronic devices; imaging techniques and instruments (proximity probe, x-ray, electron beam, non-contact electrical, optical and thermal imaging techniques, etc.); new frontiers of atomic-scale-defect assessment (STM, AFM, SNOM, ballistic electron energy microscopy, TEM, etc.); new approaches for multi-physic-parameter characterization with Nano-scale space resolution. Within these subjects, there were 58 talks, of which 18 invited, and 50 posters.

Giant tunnelling electroresistance in metal/ferroelectric/semiconductor tunnel junctions by engineering the Schottky barrier

PubMed Central

Xi, Zhongnan; Ruan, Jieji; Li, Chen; Zheng, Chunyan; Wen, Zheng; Dai, Jiyan; Li, Aidong; Wu, Di

2017-01-01

Recently, ferroelectric tunnel junctions have attracted much attention due to their potential applications in non-destructive readout non-volatile memories. Using a semiconductor electrode has been proven effective to enhance the tunnelling electroresistance in ferroelectric tunnel junctions. Here we report a systematic investigation on electroresistance of Pt/BaTiO3/Nb:SrTiO3 metal/ferroelectric/semiconductor tunnel junctions by engineering the Schottky barrier on Nb:SrTiO3 surface via varying BaTiO3 thickness and Nb doping concentration. The optimum ON/OFF ratio as great as 6.0 × 106, comparable to that of commercial Flash memories, is achieved in a device with 0.1 wt% Nb concentration and a 4-unit-cell-thick BaTiO3 barrier. With this thinnest BaTiO3 barrier, which shows a negligible resistance to the tunnelling current but is still ferroelectric, the device is reduced to a polarization-modulated metal/semiconductor Schottky junction that exhibits a more efficient control on the tunnelling resistance to produce the giant electroresistance observed. These results may facilitate the design of high performance non-volatile resistive memories. PMID:28513590

Giant tunnelling electroresistance in metal/ferroelectric/semiconductor tunnel junctions by engineering the Schottky barrier

NASA Astrophysics Data System (ADS)

Xi, Zhongnan; Ruan, Jieji; Li, Chen; Zheng, Chunyan; Wen, Zheng; Dai, Jiyan; Li, Aidong; Wu, Di

2017-05-01

Recently, ferroelectric tunnel junctions have attracted much attention due to their potential applications in non-destructive readout non-volatile memories. Using a semiconductor electrode has been proven effective to enhance the tunnelling electroresistance in ferroelectric tunnel junctions. Here we report a systematic investigation on electroresistance of Pt/BaTiO3/Nb:SrTiO3 metal/ferroelectric/semiconductor tunnel junctions by engineering the Schottky barrier on Nb:SrTiO3 surface via varying BaTiO3 thickness and Nb doping concentration. The optimum ON/OFF ratio as great as 6.0 × 106, comparable to that of commercial Flash memories, is achieved in a device with 0.1 wt% Nb concentration and a 4-unit-cell-thick BaTiO3 barrier. With this thinnest BaTiO3 barrier, which shows a negligible resistance to the tunnelling current but is still ferroelectric, the device is reduced to a polarization-modulated metal/semiconductor Schottky junction that exhibits a more efficient control on the tunnelling resistance to produce the giant electroresistance observed. These results may facilitate the design of high performance non-volatile resistive memories.

The influence of interfacial defects on fast charge trapping in nanocrystalline oxide-semiconductor thin film transistors

NASA Astrophysics Data System (ADS)

Kim, Taeho; Hur, Jihyun; Jeon, Sanghun

2016-05-01

Defects in oxide semiconductors not only influence the initial device performance but also affect device reliability. The front channel is the major carrier transport region during the transistor turn-on stage, therefore an understanding of defects located in the vicinity of the interface is very important. In this study, we investigated the dynamics of charge transport in a nanocrystalline hafnium-indium-zinc-oxide thin-film transistor (TFT) by short pulse I-V, transient current and 1/f noise measurement methods. We found that the fast charging behavior of the tested device stems from defects located in both the front channel and the interface, following a multi-trapping mechanism. We found that a silicon-nitride stacked hafnium-indium-zinc-oxide TFT is vulnerable to interfacial charge trapping compared with silicon-oxide counterpart, causing significant mobility degradation and threshold voltage instability. The 1/f noise measurement data indicate that the carrier transport in a silicon-nitride stacked TFT device is governed by trapping/de-trapping processes via defects in the interface, while the silicon-oxide device follows the mobility fluctuation model.

Highly Efficient Multilayer Thermoelectric Devices

NASA Technical Reports Server (NTRS)

Boufelfel, Ali

2006-01-01

Multilayer thermoelectric devices now at the prototype stage of development exhibit a combination of desirable characteristics, including high figures of merit and high performance/cost ratios. These devices are capable of producing temperature differences of the order of 50 K in operation at or near room temperature. A solvent-free batch process for mass production of these state-of-the-art thermoelectric devices has also been developed. Like prior thermoelectric devices, the present ones have commercial potential mainly by virtue of their utility as means of controlled cooling (and/or, in some cases, heating) of sensors, integrated circuits, and temperature-critical components of scientific instruments. The advantages of thermoelectric devices for such uses include no need for circulating working fluids through or within the devices, generation of little if any noise, and high reliability. The disadvantages of prior thermoelectric devices include high power consumption and relatively low coefficients of performance. The present development program was undertaken in the hope of reducing the magnitudes of the aforementioned disadvantages and, especially, obtaining higher figures of merit for operation at and near room temperature. Accomplishments of the program thus far include development of an algorithm to estimate the heat extracted by, and the maximum temperature drop produced by, a thermoelectric device; solution of the problem of exchange of heat between a thermoelectric cooler and a water-cooled copper block; retrofitting of a vacuum chamber for depositing materials by sputtering; design of masks; and fabrication of multilayer thermoelectric devices of two different designs, denoted I and II. For both the I and II designs, the thicknesses of layers are of the order of nanometers. In devices of design I, nonconsecutive semiconductor layers are electrically connected in series. Devices of design II contain superlattices comprising alternating electron-acceptor (p)-doped and electron-donor (n)-doped, nanometer- thick semiconductor layers.

Insulator Charging in RF MEMS Capacitive Switches

DTIC Science & Technology

2005-06-01

and Simulations,” Journal of Microelectromechanical Systems, 8: 208-217 (June 1999). 5. Neaman , Donald. Semiconductor Physics & Devices. Boston...227-230 (2001). 5. Sze, S.M. Semiconductor Devices: Physics and Technology. New York: Wiley, 1985. 6. Neaman , Donald A. Semiconductor Physics...Radiation Response of Hafnium-Silicate Capacitors,” IEEE Transactions on Nuclear Science, 49: 3191-3196 (December 2002). 3. Neaman , D.A

Conjugated polymers and their use in optoelectronic devices

DOEpatents

Marks, Tobin J.; Guo, Xugang; Zhou, Nanjia; Chang, Robert P. H.; Drees, Martin; Facchetti, Antonio

2016-10-18

The present invention relates to certain polymeric compounds and their use as organic semiconductors in organic and hybrid optical, optoelectronic, and/or electronic devices such as photovoltaic cells, light emitting diodes, light emitting transistors, and field effect transistors. The present compounds can provide improved device performance, for example, as measured by power conversion efficiency, fill factor, open circuit voltage, field-effect mobility, on/off current ratios, and/or air stability when used in photovoltaic cells or transistors. The present compounds can have good solubility in common solvents enabling device fabrication via solution processes.

Charge dissipative dielectric for cryogenic devices

NASA Technical Reports Server (NTRS)

Cantor, Robin Harold (Inventor); Hall, John Addison (Inventor)

2007-01-01

A Superconducting Quantum Interference Device (SQUID) is disclosed comprising a pair of resistively shunted Josephson junctions connected in parallel within a superconducting loop and biased by an external direct current (dc) source. The SQUID comprises a semiconductor substrate and at least one superconducting layer. The metal layer(s) are separated by or covered with a semiconductor material layer having the properties of a conductor at room temperature and the properties of an insulator at operating temperatures (generally less than 100 Kelvins). The properties of the semiconductor material layer greatly reduces the risk of electrostatic discharge that can damage the device during normal handling of the device at room temperature, while still providing the insulating properties desired to allow normal functioning of the device at its operating temperature. A method of manufacturing the SQUID device is also disclosed.

Anisotropy-based crystalline oxide-on-semiconductor material

DOEpatents

McKee, Rodney Allen; Walker, Frederick Joseph

2000-01-01

A semiconductor structure and device for use in a semiconductor application utilizes a substrate of semiconductor-based material, such as silicon, and a thin film of a crystalline oxide whose unit cells are capable of exhibiting anisotropic behavior overlying the substrate surface. Within the structure, the unit cells of the crystalline oxide are exposed to an in-plane stain which influences the geometric shape of the unit cells and thereby arranges a directional-dependent quality of the unit cells in a predisposed orientation relative to the substrate. This predisposition of the directional-dependent quality of the unit cells enables the device to take beneficial advantage of characteristics of the structure during operation. For example, in the instance in which the crystalline oxide of the structure is a perovskite, a spinel or an oxide of similarly-related cubic structure, the structure can, within an appropriate semiconductor device, exhibit ferroelectric, piezoelectric, pyroelectric, electro-optic, ferromagnetic, antiferromagnetic, magneto-optic or large dielectric properties that synergistically couple to the underlying semiconductor substrate.

EDITORIAL The 23rd Nordic Semiconductor Meeting The 23rd Nordic Semiconductor Meeting

NASA Astrophysics Data System (ADS)

Ólafsson, Sveinn; Sveinbjörnsson, Einar

2010-12-01

A Nordic Semiconductor Meeting is held every other year with the venue rotating amongst the Nordic countries of Denmark, Finland, Iceland, Norway and Sweden. The focus of these meetings remains 'original research and science being carried out on semiconductor materials, devices and systems'. Reports on industrial activity have usually featured. The topics have ranged from fundamental research on point defects in a semiconductor to system architecture of semiconductor electronic devices. Proceedings from these events are regularly published as a topical issue of Physica Scripta. All of the papers in this topical issue have undergone critical peer review and we wish to thank the reviewers and the authors for their cooperation, which has been instrumental in meeting the high scientific standards and quality of the series. This meeting of the 23rd Nordic Semiconductor community, NSM 2009, was held at Háskólatorg at the campus of the University of Iceland, Reykjavik, Iceland, 14-17 June 2009. Support was provided by the University of Iceland. Almost 50 participants presented a broad range of topics covering semiconductor materials and devices as well as related material science interests. The conference provided a forum for Nordic and international scientists to present and discuss new results and ideas concerning the fundamentals and applications of semiconductor materials. The meeting aim was to advance the progress of Nordic science and thus aid in future worldwide technological advances concerning technology, education, energy and the environment. Topics Theory and fundamental physics of semiconductors Emerging semiconductor technologies (for example III-V integration on Si, novel Si devices, graphene) Energy and semiconductors Optical phenomena and optical devices MEMS and sensors Program 14 June Registration 13:00-17:00 15 June Meeting program 09:30-17:00 and Poster Session I 16 June Meeting program 09:30-17:00 and Poster Session II 17 June Excursion and dinner on Icelandic National Day In connection with the conference, a summer school for 40 research students was organized by the Nordic LENS network. The summer school took place in Reykjavik on 11-14 June. For more information on the school please visit the website. The next Nordic Semiconductor meeting, NSM 2011, is scheduled to take place in Aarhus, Denmark, 19-22 June 2011. A full participant list is available in the PDF of this article.

Self bleaching photoelectrochemical-electrochromic device

DOEpatents

Bechinger, Clemens S.; Gregg, Brian A.

2002-04-09

A photoelectrochemical-electrochromic device comprising a first transparent electrode and a second transparent electrode in parallel, spaced relation to each other. The first transparent electrode is electrically connected to the second transparent electrode. An electrochromic material is applied to the first transparent electrode and a nanoporous semiconductor film having a dye adsorbed therein is applied to the second transparent electrode. An electrolyte layer contacts the electrochromic material and the nanoporous semiconductor film. The electrolyte layer has a redox couple whereby upon application of light, the nanoporous semiconductor layer dye absorbs the light and the redox couple oxidizes producing an electric field across the device modulating the effective light transmittance through the device.

A High-Performance Optical Memory Array Based on Inhomogeneity of Organic Semiconductors.

PubMed

Pei, Ke; Ren, Xiaochen; Zhou, Zhiwen; Zhang, Zhichao; Ji, Xudong; Chan, Paddy Kwok Leung

2018-03-01

Organic optical memory devices keep attracting intensive interests for diverse optoelectronic applications including optical sensors and memories. Here, flexible nonvolatile optical memory devices are developed based on the bis[1]benzothieno[2,3-d;2',3'-d']naphtho[2,3-b;6,7-b']dithiophene (BBTNDT) organic field-effect transistors with charge trapping centers induced by the inhomogeneity (nanosprouts) of the organic thin film. The devices exhibit average mobility as high as 7.7 cm 2 V -1 s -1 , photoresponsivity of 433 A W -1 , and long retention time for more than 6 h with a current ratio larger than 10 6 . Compared with the standard floating gate memory transistors, the BBTNDT devices can reduce the fabrication complexity, cost, and time. Based on the reasonable performance of the single device on a rigid substrate, the optical memory transistor is further scaled up to a 16 × 16 active matrix array on a flexible substrate with operating voltage less than 3 V, and it is used to map out 2D optical images. The findings reveal the potentials of utilizing [1]benzothieno[3,2-b][1]benzothiophene (BTBT) derivatives as organic semiconductors for high-performance optical memory transistors with a facile structure. A detailed study on the charge trapping mechanism in the derivatives of BTBT materials is also provided, which is closely related to the nanosprouts formed inside the organic active layer. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Crystal growth of device quality GaAs in space

NASA Technical Reports Server (NTRS)

Gatos, H. C.; Lagowski, J.

1984-01-01

The crystal growth, device processing and device related properties and phenomena of GaAs are investigated. Our GaAs research evolves about these key thrust areas. The overall program combines: (1) studies of crystal growth on novel approaches to engineering of semiconductor materials (i.e., GaAs and related compounds); (2) investigation and correlation of materials properties and electronic characteristics on a macro- and microscale; (3) investigation of electronic properties and phenomena controlling device applications and device performance. The ground based program is developed which would insure successful experimentation with and eventually processing of GaAs in a near zero gravity environment.

Semiconductor technology program. Progress briefs

NASA Technical Reports Server (NTRS)

Bullis, W. M.

1980-01-01

Measurement technology for semiconductor materials, process control, and devices is reviewed. Activities include: optical linewidth and thermal resistance measurements; device modeling; dopant density profiles; resonance ionization spectroscopy; and deep level measurements. Standardized oxide charge terminology is also described.

The role of surface ligands in quantum-dot devices: Villain or unsung hero?

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pietryga, Jeffrey Michael

For over three decades, the study of nanocrystal quantum dots (QDs), which are solution-synthesized nanometer-scale bits of semiconductor materials, has produced singular advances in both our understanding of quantum confinement effects, and in our ability to make use of them in tech-relevant materials. Accordingly, QDs have found their way into the marketplace, specifically as high-performance fluorophores for, e.g., displays and biolabeling. In such applications, optimization of the QD surface, including the passivating ligands, is key to keeping photo-excited carriers from leaving the QD interior before recombining, resulting in a high fluorescence efficiency. Increasingly, attention has turned to realize the promisemore » of QDs for optoelectronic applications (e.g., solar cells, LEDs, sensors) which require charge carriers to controllably enter, exit and/or travel through QDs, a much more challenging problem. In this scenario, the role of the QD surface must be completely reimagined, from being an impenetrable wall to being a gateway, or even a ramp. In this talk, I’ll explore the inherent contrast between QD fluorophore and device applications, and describe how ligands, originally thought only to be impediments to QD electronic devices, may actually give the savvy QD device designer control over function and performance in a manner unknown in bulk semiconductor devices. Finally, I’ll survey recent efforts at Los Alamos to develop a universal tool box for deposition of conductive QD films that may finally allow the manufacturing of economical, high-performance devices for a wide range of applications.« less

Optoelectronic Devices and Materials

NASA Astrophysics Data System (ADS)

Sweeney, Stephen; Adams, Alfred

Unlike the majority of electronic devices, which are silicon based, optoelectronic devices are predominantly made using III-V semiconductor compounds such as GaAs, InP, GaN and GaSb and their alloys due to their direct band gap. Understanding the properties of these materials has been of vital importance in the development of optoelectronic devices. Since the first demonstration of a semiconductor laser in the early 1960s, optoelectronic devices have been produced in their millions, pervading our everyday lives in communications, computing, entertainment, lighting and medicine. It is perhaps their use in optical-fibre communications that has had the greatest impact on humankind, enabling high-quality and inexpensive voice and data transmission across the globe. Optical communications spawned a number of developments in optoelectronics, leading to devices such as vertical-cavity surface-emitting lasers, semiconductor optical amplifiers, optical modulators and avalanche photodiodes. In this chapter we discuss the underlying theory of operation of the most important optoelectronic devices. The influence of carrier-photon interactions is discussed in the context of producing efficient emitters and detectors. Finally we discuss how the semiconductor band structure can be manipulated to enhance device properties using quantum confinement and strain effects, and how the addition of dilute amounts of elements such as nitrogen is having a profound effect on the next generation of optoelectronic devices.

Release strategies for making transferable semiconductor structures, devices and device components

DOEpatents

Rogers, John A; Nuzzo, Ralph G; Meitl, Matthew; Ko, Heung Cho; Yoon, Jongseung; Menard, Etienne; Baca, Alfred J

2014-11-25

Provided are methods for making a device or device component by providing a multilayer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.

Release strategies for making transferable semiconductor structures, devices and device components

DOEpatents

Rogers, John A [Champaign, IL; Nuzzo, Ralph G [Champaign, IL; Meitl, Matthew [Raleigh, NC; Ko, Heung Cho [Urbana, IL; Yoon, Jongseung [Urbana, IL; Menard, Etienne [Durham, NC; Baca, Alfred J [Urbana, IL

2011-04-26

Provided are methods for making a device or device component by providing a multilayer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.

Release strategies for making transferable semiconductor structures, devices and device components

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rogers, John A.; Nuzzo, Ralph G.; Meitl, Matthew

2016-05-24

Provided are methods for making a device or device component by providing a multi layer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.

Thin film transistors for flexible electronics: contacts, dielectrics and semiconductors.

PubMed

Quevedo-Lopez, M A; Wondmagegn, W T; Alshareef, H N; Ramirez-Bon, R; Gnade, B E

2011-06-01

The development of low temperature, thin film transistor processes that have enabled flexible displays also present opportunities for flexible electronics and flexible integrated systems. Of particular interest are possible applications in flexible sensor systems for unattended ground sensors, smart medical bandages, electronic ID tags for geo-location, conformal antennas, radiation detectors, etc. In this paper, we review the impact of gate dielectrics, contacts and semiconductor materials on thin film transistors for flexible electronics applications. We present our recent results to fully integrate hybrid complementary metal oxide semiconductors comprising inorganic and organic-based materials. In particular, we demonstrate novel gate dielectric stacks and semiconducting materials. The impact of source and drain contacts on device performance is also discussed.

Study of Light Neutron-Rich Nuclei Using a Multilayer Semiconductor Setup

NASA Astrophysics Data System (ADS)

Gurov, Yu. B.; Lapushkin, S. V.; Sandukovsky, V. G.; Chernyshev, B. A.

2017-12-01

The characteristics of two modifications of the semiconductor (s.c.d.) setup consisting of telescopes on the basis of silicon detectors are presented. These settings allow performing a precision measurement of energy in a large dynamic range (from a few to hundreds of MeV) and particle identification in a wide range of masses. The issues of measurement of the characteristics of s.c.d. telescopes and their impact on the quality of the obtained experimental data are considered. Considerable attention is paid to the use of created semiconductor devices for the search for and spectroscopy of light exotic nuclei on the accelerators of PNPI (Gatchina) and LANL (Los Alamos).

Bulk semiconducting scintillator device for radiation detection

DOEpatents

Stowe, Ashley C.; Burger, Arnold; Groza, Michael

2016-08-30

A bulk semiconducting scintillator device, including: a Li-containing semiconductor compound of general composition Li-III-VI.sub.2, wherein III is a Group III element and VI is a Group VI element; wherein the Li-containing semiconductor compound is used in one or more of a first mode and a second mode, wherein: in the first mode, the Li-containing semiconductor compound is coupled to an electrical circuit under bias operable for measuring electron-hole pairs in the Li-containing semiconductor compound in the presence of neutrons and the Li-containing semiconductor compound is also coupled to current detection electronics operable for detecting a corresponding current in the Li-containing semiconductor compound; and, in the second mode, the Li-containing semiconductor compound is coupled to a photodetector operable for detecting photons generated in the Li-containing semiconductor compound in the presence of the neutrons.

Extreme Carrier Depletion and Superlinear Photoconductivity in Ultrathin Parallel-Aligned ZnO Nanowire Array Photodetectors Fabricated by Infiltration Synthesis

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nam, Chang-Yong; Stein, Aaron

Ultrathin semiconductor nanowires enable high-performance chemical sensors and photodetectors, but their synthesis and device integration by standard complementary metal-oxide-semiconductor (CMOS)-compatible processes remain persistent challenges. This work demonstrates fully CMOS-compatible synthesis and integration of parallel-aligned polycrystalline ZnO nanowire arrays into ultraviolet photodetectors via infiltration synthesis, material hybridization technique derived from atomic layer deposition. The nanowire photodetector features unique, high device performances originating from extreme charge carrier depletion, achieving photoconductive on–off ratios of >6 decades, blindness to visible light, and ultralow dark currents as low as 1 fA, the lowest reported for nanostructure-based photoconductive photodetectors. Surprisingly, the low dark current is invariantmore » with increasing number of nanowires and the photodetector shows unusual superlinear photoconductivity, observed for the first time in nanowires, leading to increasing detector responsivity and other parameters for higher incident light powers. Temperature-dependent carrier concentration and mobility reveal the photoelectrochemical-thermionic emission process at grain boundaries, responsible for the observed unique photodetector performances and superlinear photoconductivity. Here, the results elucidate fundamental processes responsible for photogain in polycrystalline nanostructures, providing useful guidelines for developing nanostructure-based detectors and sensors. Lastly, the developed fully CMOS-compatible nanowire synthesis and device fabrication methods also have potentials for scalable integration of nanowire sensor devices and circuitries.« less

Extreme Carrier Depletion and Superlinear Photoconductivity in Ultrathin Parallel-Aligned ZnO Nanowire Array Photodetectors Fabricated by Infiltration Synthesis

DOE PAGES

Nam, Chang-Yong; Stein, Aaron

2017-11-15

Ultrathin semiconductor nanowires enable high-performance chemical sensors and photodetectors, but their synthesis and device integration by standard complementary metal-oxide-semiconductor (CMOS)-compatible processes remain persistent challenges. This work demonstrates fully CMOS-compatible synthesis and integration of parallel-aligned polycrystalline ZnO nanowire arrays into ultraviolet photodetectors via infiltration synthesis, material hybridization technique derived from atomic layer deposition. The nanowire photodetector features unique, high device performances originating from extreme charge carrier depletion, achieving photoconductive on–off ratios of >6 decades, blindness to visible light, and ultralow dark currents as low as 1 fA, the lowest reported for nanostructure-based photoconductive photodetectors. Surprisingly, the low dark current is invariantmore » with increasing number of nanowires and the photodetector shows unusual superlinear photoconductivity, observed for the first time in nanowires, leading to increasing detector responsivity and other parameters for higher incident light powers. Temperature-dependent carrier concentration and mobility reveal the photoelectrochemical-thermionic emission process at grain boundaries, responsible for the observed unique photodetector performances and superlinear photoconductivity. Here, the results elucidate fundamental processes responsible for photogain in polycrystalline nanostructures, providing useful guidelines for developing nanostructure-based detectors and sensors. Lastly, the developed fully CMOS-compatible nanowire synthesis and device fabrication methods also have potentials for scalable integration of nanowire sensor devices and circuitries.« less

Spectroscopic Studies of the Electronic Structure of Metal-Semiconductor and Vacuum-Semiconductor Interfaces.

DTIC Science & Technology

1982-12-31

interfaces which are of importance in such semi- conductor devices as MOSFETS, CCD devices, photovoltaic devices, DD I jAN 73 1473 EDITION OF INOV 66 if...interfaces is interesting for the study of electrolytic cells . Our photoemission study reveals for the first time how the electronic structure of water

Semiconductor quantum wells: old technology or new device functionalities

NASA Astrophysics Data System (ADS)

Kolbas, R. M.; Lo, Y. C.; Hsieh, K. Y.; Lee, J. H.; Reed, F. E.; Zhang, D.; Zhang, T.

2009-08-01

The introduction of semiconductor quantum wells in the 1970s created a revolution in optoelectronic devices. A large fraction of today's lasers and light emitting diodes are based on quantum wells. It has been more than 30 years but novel ideas and new device functions have recently been demonstrated using quantum well heterostructures. This paper provides a brief overview of the subject and then focuses on the physics of quantum wells that the lead author believes holds the key to new device functionalities. The data and figures contained within are not new. They have been assembled from 30 years of work. They are presented to convey the story of why quantum wells continue to fuel the engine that drives the semiconductor optoelectronic business. My apologies in advance to my students and co-workers that contributed so much that could not be covered in such a short manuscript. The explanations provided are based on the simplest models possible rather than the very sophisticated mathematical models that have evolved over many years. The intended readers are those involved with semiconductor optoelectronic devices and are interested in new device possibilities.

Transparent Oxide Thin-Film Transistors: Production, Characterization and Integration

NASA Astrophysics Data System (ADS)

Barquinha, Pedro Miguel Candido

This dissertation is devoted to the study of the emerging area of transparent electronics, summarizing research work regarding the development of n-type thin-film transistors (TFTs) based on sputtered oxide semiconductors. All the materials are produced without intentional substrate heating, with annealing temperatures of only 150-200 °C being used to optimize transistor performance. The work is based on the study and optimization of active semiconductors from the gallium-indium-zinc oxide system, including both the binary compounds Ga2O3, In2O3 and ZnO, as well as ternary and quaternary oxides based on mixtures of those, such as IZO and GIZO with different atomic ratios. Several topics are explored, including the study and optimization of the oxide semiconductor thin films, their application as channel layers on TFTs and finally the implementation of the optimized processes to fabricate active matrix backplanes to be integrated in liquid crystal display (LCD) prototypes. Sputtered amorphous dielectrics with high dielectric constant (high-kappa) based on mixtures of tantalum-silicon or tantalum-aluminum oxides are also studied and used as the dielectric layers on fully transparent TFTs. These devices also include transparent and highly conducting IZO thin films as source, drain and gate electrodes. Given the flexibility of the sputtering technique, oxide semiconductors are analyzed regarding several deposition parameters, such as oxygen partial pressure and deposition pressure, as well as target composition. One of the most interesting features of multicomponent oxides such as IZO and GIZO is that, due to their unique electronic configuration and carrier transport mechanism, they allow to obtain amorphous structures with remarkable electrical properties, such as high hall-effect mobility that exceeds 60 cm2 V -1 s-1 for IZO. These properties can be easily tuned by changing the processing conditions and the atomic ratios of the multicomponent oxides, allowing to have amorphous oxides suitable to be used either as transparent semiconductors or as highly conducting electrodes. The amorphous structure, which is maintained even if the thin films are annealed at 500 °C, brings great advantages concerning interface quality and uniformity in large areas. A complete study comprising different deposition conditions of the semiconductor layer is also made regarding TFT electrical performance. Optimized devices present outstanding electrical performance, such as field-effect mobility (muFE) exceeding 20 cm2 V -1 s-1, turn-on voltage (Von) between -1 and 1 V, subthreshold slope (S) lower than 0.25 V dec-1 and On-Off ratio above 107 . Devices employing amorphous multicomponent oxides present largely improved properties when compared with the ones based on polycrystalline ZnO, mostly in terms of muFE. Within the compositional range where IZO and GIZO films are amorphous, TFT performance can be largely adjusted: for instance, high indium contents favor large mu FE but also highly negative Von, which can be compensated by proper amounts of zinc and gallium. Large oxygen concentrations during oxide semiconductor sputtering are found to be deleterious, decreasing muFE, shifting Von towards high values and turning the devices electrically unstable. It is also shown that semiconductor thickness (ds) has a very important role: for instance, by reducing ds to 10 nm it is possible to produce TFTs with Von≈0 V even using deposition conditions and/or target compositions that normally yield highly conducting films. Given the low ds of the films, this behavior is mostly related with surface states existent at the oxide semiconductor air-exposed back-surface, where depletion layers that can extend towards the dielectric/semiconductor interface are created due to the interaction with atmospheric oxygen. Different passivation layers on top of this air-exposed surface are studied, with SU-8 revealing to be to most effective one. Other important topics are source-drain contact resistance assessment and the effect of different annealing temperatures ( TA), being the properties of the TFTs dominated by TA rather than by the deposition conditions as TA increases. Fully transparent TFTs employing sputtered amorphous multicomponent dielectrics produced without intentional substrate heating present excellent electrical properties, that approach those exhibited by devices using PECVD SiO2 produced at 400 °C. Gate leakage current can be greatly reduced by using tantalum-silicon or tantalum-aluminum oxides rather than Ta2O5. A section of this dissertation is also devoted to the analysis of current stress stability and aging effects of the TFTs, being found that optimal devices exhibit recoverable threshold voltage shifts lower than 0.50 V after 24 h stress with constant drain current of 10 muA, as well as negligible aging effects during 18 months. The research work of this dissertation culminates in the fabrication of a backplane employing transparent TFTs and subsequent integration with a LCD frontplane by Hewlett-Packard. The successful operation of this initial 2.8h prototype with 128x128 pixels provides a solid demonstration that oxide semiconductor-based TFTs have the potential to largely contribute to a novel electronics era, where semiconductor materials away from conventional silicon are used to create fascinating applications, such as transparent electronic products.

Plasmonic Enhancement Mechanisms in Solar Energy Harvesting

NASA Astrophysics Data System (ADS)

Cushing, Scott K.

Semiconductor photovoltaics (solar-to-electrical) and photocatalysis (solar-to-chemical) requires sunlight to be converted into excited charge carriers with sufficient lifetimes and mobility to drive a current or photoreaction. Thin semiconductor films are necessary to reduce the charge recombination and mobility losses, but thin films also limit light absorption, reducing the solar energy conversion efficiency. Further, in photocatalysis, the band edges of semiconductor must straddle the redox potentials of a photochemical reaction, reducing light absorption to half the solar spectrum in water splitting. Plasmonics transforms metal nanoparticles into antennas with resonances tuneable across the solar spectrum. If energy can be transferred from the plasmon to the semiconductor, light absorption in the semiconductor can be increased in thin films and occur at energies smaller than the band gap. This thesis investigates why, despite this potential, plasmonic solar energy harvesting techniques rarely appear in top performing solar architectures. To accomplish this goal, the possible plasmonic enhancement mechanisms for solar energy conversion were identified, isolated, and optimized by combining systematic sample design with transient absorption spectroscopy, photoelectrochemical and photocatalytic testing, and theoretical development. Specifically, metal semiconductor nanostructures were designed to modulate the plasmon's scattering, hot carrier, and near field interactions as well as remove heating and self-catalysis effects. Transient absorption spectroscopy then revealed how the structure design affected energy and charge carrier transfer between metal and semiconductor. Correlating this data with wavelength-dependent photoconversion efficiencies and theoretical developments regarding metal-semiconductor interactions identified the origin of the plasmonic enhancement. Using this methodology, it has first been proven that three plasmonic enhancement routes are possible: i) increasing light absorption in the semiconductor by light trapping through scattering, ii) transferring hot carriers from metal to semiconductor after light absorption in the metal, and iii) non-radiative excitation of interband transitions in the semiconductor by plasmon-induced resonant energy transfer (PIRET). The effects of the metal on charge transport and carrier recombination were also revealed. Next, it has been shown that the strength and balance of the three enhancement mechanisms is rooted in the plasmon's dephasing time, or how long it takes the collective electron oscillations to stop being collective. The importance of coherent effects in plasmonic enhancement is also shown. Based on these findings, a thermodynamic balance framework has been used to predict the theoretical maximum efficiency of solar energy conversion in plasmonic metal-semiconductor heterojunctions. These calculations have revealed how plasmonics is best used to address the different light absorption problems in semiconductors, and that not taking into account the plasmon's dephasing is the origin of low plasmonic enhancement Finally, to prove these guidelines, each of the three enhancement mechanisms has been translated into optimal device geometries, showing the plasmon's potential for solar energy harvesting. This dissertation identifies the three possible plasmonic enhancement mechanisms for the first time, discovering a new enhancement mechanism (PIRET) in the process. It has also been shown for the first time that the various plasmon-semiconductor interactions could be rooted in the plasmon's dephasing. This has allowed for the first maximum efficiency estimates which have combined all three enhancement mechanisms to be performed, and revealed that changes in the plasmon's dephasing leads to the disparity in reported plasmonic enhancements. These findings are combined to create optimal device design guidelines, which are proven by fabrication of several devices with top efficiencies in plasmonic solar energy conversion. The knowledge obtained will guide the design of efficient photovoltaics and photocatalysts, helping usher in a renewable energy economy and address current needs of climate change.

Surface breakdown igniter for mercury arc devices

DOEpatents

Bayless, John R.

1977-01-01

Surface breakdown igniter comprises a semiconductor of medium resistivity which has the arc device cathode as one electrode and has an igniter anode electrode so that when voltage is applied between the electrodes a spark is generated when electrical breakdown occurs over the surface of the semiconductor. The geometry of the igniter anode and cathode electrodes causes the igniter discharge to be forced away from the semiconductor surface.

Photovoltaic devices comprising zinc stannate buffer layer and method for making

DOEpatents

Wu, Xuanzhi; Sheldon, Peter; Coutts, Timothy J.

2001-01-01

A photovoltaic device has a buffer layer zinc stannate Zn.sub.2 SnO.sub.4 disposed between the semiconductor junction structure and the transparent conducting oxide (TCO) layer to prevent formation of localized junctions with the TCO through a thin window semiconductor layer, to prevent shunting through etched grain boundaries of semiconductors, and to relieve stresses and improve adhesion between these layers.

Technological and organizational diversity and technical advance in the early history of the American semiconductor industry

NASA Astrophysics Data System (ADS)

Cohen, W.; Holbrook, D.; Klepper, S.

1994-06-01

This study examines the early years of the semiconductor industry and focuses on the roles played by different size firms in technologically innovative processes. A large and diverse pool of firms participated in the growth of the industry. Three related technological areas were chosen for in-depth analysis: integrated circuits, materials technology, and device packaging. Large business producing vacuum tubes dominated the early production of semiconductor devices. As the market for new devices grew during the 1950's, new firms were founded and existing firms from other industries, e.g. aircraft builders and instrument makers, began to pursue semiconductor electronics. Small firms began to cater to the emerging industry by supplying materials and equipment. These firms contributed to the development of certain aspects of one thousand firms that were playing some part in the semiconductor industry.

One-Dimensional Nanostructures and Devices of II–V Group Semiconductors

PubMed Central

2009-01-01

The II–V group semiconductors, with narrow band gaps, are important materials with many applications in infrared detectors, lasers, solar cells, ultrasonic multipliers, and Hall generators. Since the first report on trumpet-like Zn3P2nanowires, one-dimensional (1-D) nanostructures of II–V group semiconductors have attracted great research attention recently because these special 1-D nanostructures may find applications in fabricating new electronic and optoelectronic nanoscale devices. This article covers the 1-D II–V semiconducting nanostructures that have been synthesized till now, focusing on nanotubes, nanowires, nanobelts, and special nanostructures like heterostructured nanowires. Novel electronic and optoelectronic devices built on 1-D II–V semiconducting nanostructures will also be discussed, which include metal–insulator-semiconductor field-effect transistors, metal-semiconductor field-effect transistors, andp–nheterojunction photodiode. We intent to provide the readers a brief account of these exciting research activities. PMID:20596452

Inkjet-printing of non-volatile organic resistive devices and crossbar array structures

NASA Astrophysics Data System (ADS)

Sax, Stefan; Nau, Sebastian; Popovic, Karl; Bluemel, Alexander; Klug, Andreas; List-Kratochvil, Emil J. W.

2015-09-01

Due to the increasing demand for storage capacity in various electronic gadgets like mobile phones or tablets, new types of non-volatile memory devices have gained a lot of attention over the last few years. Especially multilevel conductance switching elements based on organic semiconductors are of great interest due to their relatively simple device architecture and their small feature size. Since organic semiconductors combine the electronic properties of inorganic materials with the mechanical characteristics of polymers, this class of materials is suitable for solution based large area device preparation techniques. Consequently, inkjet based deposition techniques are highly capable of facing preparation related challenges. By gradually replacing the evaporated electrodes with inkjet printed silver, the preparation related influence onto device performance parameters such as the ON/OFF ratio was investigated with IV measurements and high resolution transmission electron microscopy. Due to the electrode surface roughness the solvent load during the printing of the top electrode as well as organic layer inhomogeneity's the utilization in array applications is hampered. As a prototypical example a 1diode-1resistor element and a 2×2 subarray from 5×5 array matrix were fully characterized demonstrating the versatility of inkjet printing for device preparation.

The Integration of Bacteriorhodopsin Proteins with Semiconductor Heterostructure Devices

NASA Astrophysics Data System (ADS)

Xu, Jian

2008-03-01

Bioelectronics has emerged as one of the most rapidly developing fields among the active frontiers of interdisciplinary research. A major thrust in this field is aimed at the coupling of the technologically-unmatched performance of biological systems, such as neural and sensing functions, with the well developed technology of microelectronics and optoelectronics. To this end we have studied the integration of a suitably engineered protein, bacteriorhodopsin (BR), with semiconductor optoelectronic devices and circuits. Successful integration will potentially lead to ultrasensitive sensors with polarization selectivity and built-in preprocessing capabilities that will be useful for high speed tracking, motion and edge detection, biological detection, and artificial vision systems. In this presentation we will summarize our progresses in this area, which include fundamental studies on the transient dynamics of photo-induced charge shift in BR and the coupling mechanism at protein-semiconductor interface for effective immobilizing and selectively integrating light sensitive proteins with microelectronic devices and circuits, and the device engineering of BR-transistor-integrated optical sensors as well as their applications in phototransceiver circuits. Work done in collaboration with Pallab Bhattacharya, Jonghyun Shin, Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI; Robert R. Birge, Department of Chemistry, University of Connecticut, Storrs, CT 06269; and György V'ar'o, Institute of Biophysics, Biological Research Center of the Hungarian Academy of Science, H-6701 Szeged, Hungary.

Magneto-Optical Thin Films for On-Chip Monolithic Integration of Non-Reciprocal Photonic Devices

PubMed Central

Bi, Lei; Hu, Juejun; Jiang, Peng; Kim, Hyun Suk; Kim, Dong Hun; Onbasli, Mehmet Cengiz; Dionne, Gerald F.; Ross, Caroline A.

2013-01-01

Achieving monolithic integration of nonreciprocal photonic devices on semiconductor substrates has been long sought by the photonics research society. One way to achieve this goal is to deposit high quality magneto-optical oxide thin films on a semiconductor substrate. In this paper, we review our recent research activity on magneto-optical oxide thin films toward the goal of monolithic integration of nonreciprocal photonic devices on silicon. We demonstrate high Faraday rotation at telecommunication wavelengths in several novel magnetooptical oxide thin films including Co substituted CeO2−δ, Co- or Fe-substituted SrTiO3−δ, as well as polycrystalline garnets on silicon. Figures of merit of 3~4 deg/dB and 21 deg/dB are achieved in epitaxial Sr(Ti0.2Ga0.4Fe0.4)O3−δ and polycrystalline (CeY2)Fe5O12 films, respectively. We also demonstrate an optical isolator on silicon, based on a racetrack resonator using polycrystalline (CeY2)Fe5O12/silicon strip-loaded waveguides. Our work demonstrates that physical vapor deposited magneto-optical oxide thin films on silicon can achieve high Faraday rotation, low optical loss and high magneto-optical figure of merit, therefore enabling novel high-performance non-reciprocal photonic devices monolithically integrated on semiconductor substrates. PMID:28788379

Hetero-junction photovoltaic device and method of fabricating the device

DOEpatents

Aytug, Tolga; Christen, David K; Paranthaman, Mariappan Parans; Polat, Ozgur

2014-02-10

A hetero-junction device and fabrication method in which phase-separated n-type and p-type semiconductor pillars define vertically-oriented p-n junctions extending above a substrate. Semiconductor materials are selected for the p-type and n-type pillars that are thermodynamically stable and substantially insoluble in one another. An epitaxial deposition process is employed to form the pillars on a nucleation layer and the mutual insolubility drives phase separation of the materials. During the epitaxial deposition process, the orientation is such that the nucleation layer initiates propagation of vertical columns resulting in a substantially ordered, three-dimensional structure throughout the deposited material. An oxidation state of at least a portion of one of the p-type or the n-type semiconductor materials is altered relative to the other, such that the band-gap energy of the semiconductor materials differ with respect to stoichiometric compositions and the device preferentially absorbs particular selected bands of radiation.

Main principles of developing exploitation models of semiconductor devices

NASA Astrophysics Data System (ADS)

Gradoboev, A. V.; Simonova, A. V.

2018-05-01

The paper represents primary tasks, solutions of which allow to develop the exploitation modes of semiconductor devices taking into account complex and combined influence of ionizing irradiation and operation factors. The structure of the exploitation model of the semiconductor device is presented, which is based on radiation and reliability models. Furthermore, it was shown that the exploitation model should take into account complex and combine influence of various ionizing irradiation types and operation factors. The algorithm of developing the exploitation model of the semiconductor devices is proposed. The possibility of creating the radiation model of Schottky barrier diode, Schottky field-effect transistor and Gunn diode is shown based on the available experimental data. The basic exploitation model of IR-LEDs based upon double AlGaAs heterostructures is represented. The practical application of the exploitation models will allow to output the electronic products with guaranteed operational properties.

The Physics of Semiconductors

NASA Astrophysics Data System (ADS)

Brennan, Kevin F.

1999-02-01

Modern fabrication techniques have made it possible to produce semiconductor devices whose dimensions are so small that quantum mechanical effects dominate their behavior. This book describes the key elements of quantum mechanics, statistical mechanics, and solid-state physics that are necessary in understanding these modern semiconductor devices. The author begins with a review of elementary quantum mechanics, and then describes more advanced topics, such as multiple quantum wells. He then disusses equilibrium and nonequilibrium statistical mechanics. Following this introduction, he provides a thorough treatment of solid-state physics, covering electron motion in periodic potentials, electron-phonon interaction, and recombination processes. The final four chapters deal exclusively with real devices, such as semiconductor lasers, photodiodes, flat panel displays, and MOSFETs. The book contains many homework exercises and is suitable as a textbook for electrical engineering, materials science, or physics students taking courses in solid-state device physics. It will also be a valuable reference for practicing engineers in optoelectronics and related areas.

Germanium detector passivated with hydrogenated amorphous germanium

DOEpatents

Hansen, William L.; Haller, Eugene E.

1986-01-01

Passivation of predominantly crystalline semiconductor devices (12) is provided for by a surface coating (21) of sputtered hydrogenated amorphous semiconductor material. Passivation of a radiation detector germanium diode, for example, is realized by sputtering a coating (21) of amorphous germanium onto the etched and quenched diode surface (11) in a low pressure atmosphere of hydrogen and argon. Unlike prior germanium diode semiconductor devices (12), which must be maintained in vacuum at cryogenic temperatures to avoid deterioration, a diode processed in the described manner may be stored in air at room temperature or otherwise exposed to a variety of environmental conditions. The coating (21) compensates for pre-existing undesirable surface states as well as protecting the semiconductor device (12) against future impregnation with impurities.

Photovoltaic devices comprising cadmium stannate transparent conducting films and method for making

DOEpatents

Wu, Xuanzhi; Coutts, Timothy J.; Sheldon, Peter; Rose, Douglas H.

1999-01-01

A photovoltaic device having a substrate, a layer of Cd.sub.2 SnO.sub.4 disposed on said substrate as a front contact, a thin film comprising two or more layers of semiconductor materials disposed on said layer of Cd.sub.2 SnO.sub.4, and an electrically conductive film disposed on said thin film of semiconductor materials to form a rear electrical contact to said thin film. The device is formed by RF sputter coating a Cd.sub.2 SnO.sub.4 layer onto a substrate, depositing a thin film of semiconductor materials onto the layer of Cd.sub.2 SnO.sub.4, and depositing an electrically conductive film onto the thin film of semiconductor materials.

Digital Alloy Absorber for Photodetectors

NASA Technical Reports Server (NTRS)

Hill, Cory J. (Inventor); Ting, David Z. (Inventor); Gunapala, Sarath D. (Inventor)

2016-01-01

In order to increase the spectral response range and improve the mobility of the photo-generated carriers (e.g. in an nBn photodetector), a digital alloy absorber may be employed by embedding one (or fraction thereof) to several monolayers of a semiconductor material (insert layers) periodically into a different host semiconductor material of the absorber layer. The semiconductor material of the insert layer and the host semiconductor materials may have lattice constants that are substantially mismatched. For example, this may performed by periodically embedding monolayers of InSb into an InAsSb host as the absorption region to extend the cutoff wavelength of InAsSb photodetectors, such as InAsSb based nBn devices. The described technique allows for simultaneous control of alloy composition and net strain, which are both key parameters for the photodetector operation.

Thermoelectric Performance Enhancement by Surrounding Crystalline Semiconductors with Metallic Nanoparticles

NASA Technical Reports Server (NTRS)

Kim, Hyun-Jung; King, Glen C.; Park, Yeonjoon; Lee, Kunik; Choi, Sang H.

2011-01-01

Direct conversion of thermal energy to electricity by thermoelectric (TE) devices may play a key role in future energy production and utilization. However, relatively poor performance of current TE materials has slowed development of new energy conversion applications. Recent reports have shown that the dimensionless Figure of Merit, ZT, for TE devices can be increased beyond the state-of-the-art level by nanoscale structuring of materials to reduce their thermal conductivity. New morphologically designed TE materials have been fabricated at the NASA Langley Research Center, and their characterization is underway. These newly designed materials are based on semiconductor crystal grains whose surfaces are surrounded by metallic nanoparticles. The nanoscale particles are used to tailor the thermal and electrical conduction properties for TE applications by altering the phonon and electron transport pathways. A sample of bismuth telluride decorated with metallic nanoparticles showed less thermal conductivity and twice the electrical conductivity at room temperature as compared to pure Bi2Te3. Apparently, electrons cross easily between semiconductor crystal grains via the intervening metallic nanoparticle bridges, but phonons are scattered at the interfacing gaps. Hence, if the interfacing gap is larger than the mean free path of the phonon, thermal energy transmission from one grain to others is reduced. Here we describe the design and analysis of these new materials that offer substantial improvements in thermoelectric performance.

High voltage semiconductor devices and methods of making the devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Matocha, Kevin; Chatty, Kiran; Banerjee, Sujit

A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type well regions which are formed in an n-type drift layer. A p-type body contact region is formed on the periphery of the MOSFET. The source metallization of the device forms a Schottky contact with an n-type semiconductor region adjacent the p-type body contact region of the device. Vias can be formed through a dielectric material covering the source ohmic contacts and/or Schottky region of the device and the source metallization can be formed in the vias.more » The n-type semiconductor region forming the Schottky contact and/or the n-type source regions can be a single continuous region or a plurality of discontinuous regions alternating with discontinuous p-type body contact regions. The device can be a SiC device. Methods of making the device are also provided.« less

High voltage semiconductor devices and methods of making the devices

DOEpatents

Matocha, Kevin; Chatty, Kiran; Banerjee, Sujit

2017-02-28

A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type well regions which are formed in an n-type drift layer. A p-type body contact region is formed on the periphery of the MOSFET. The source metallization of the device forms a Schottky contact with an n-type semiconductor region adjacent the p-type body contact region of the device. Vias can be formed through a dielectric material covering the source ohmic contacts and/or Schottky region of the device and the source metallization can be formed in the vias. The n-type semiconductor region forming the Schottky contact and/or the n-type source regions can be a single continuous region or a plurality of discontinuous regions alternating with discontinuous p-type body contact regions. The device can be a SiC device. Methods of making the device are also provided.

Monolithic interconnected module with a tunnel junction for enhanced electrical and optical performance

DOEpatents

Murray, Christopher S.; Wilt, David M.

2000-01-01

An improved thermophotovoltaic (TPV) n/p/n device is provided. Monolithic Interconnected Modules (MIMS), semiconductor devices converting infrared radiation to electricity, have been developed with improved electrical and optical performance. The structure is an n-type emitter on a p-type base with an n-type lateral conduction layer. The incorporation of a tunnel junction and the reduction in the amount of p-type material used results in negligible parasitic absorption, decreased series resistance, increased voltage and increased active area. The novel use of a tunnel junction results in the potential for a TPV device with efficiency greater than 24%.

Wide Bandgap Extrinsic Photoconductive Switches

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sullivan, James S.

2012-01-20

Photoconductive semiconductor switches (PCSS) have been investigated since the late 1970s. Some devices have been developed that withstand tens of kilovolts and others that switch hundreds of amperes. However, no single device has been developed that can reliably withstand both high voltage and switch high current. Yet, photoconductive switches still hold the promise of reliable high voltage and high current operation with subnanosecond risetimes. Particularly since good quality, bulk, single crystal, wide bandgap semiconductor materials have recently become available. In this chapter we will review the basic operation of PCSS devices, status of PCSS devices and properties of the widemore » bandgap semiconductors 4H-SiC, 6H-SiC and 2H-GaN.« less

Printing Semiconductor-Insulator Polymer Bilayers for High-Performance Coplanar Field-Effect Transistors.

PubMed

Bu, Laju; Hu, Mengxing; Lu, Wanlong; Wang, Ziyu; Lu, Guanghao

2018-01-01

Source-semiconductor-drain coplanar transistors with an organic semiconductor layer located within the same plane of source/drain electrodes are attractive for next-generation electronics, because they could be used to reduce material consumption, minimize parasitic leakage current, avoid cross-talk among different devices, and simplify the fabrication process of circuits. Here, a one-step, drop-casting-like printing method to realize a coplanar transistor using a model semiconductor/insulator [poly(3-hexylthiophene) (P3HT)/polystyrene (PS)] blend is developed. By manipulating the solution dewetting dynamics on the metal electrode and SiO 2 dielectric, the solution within the channel region is selectively confined, and thus make the top surface of source/drain electrodes completely free of polymers. Subsequently, during solvent evaporation, vertical phase separation between P3HT and PS leads to a semiconductor-insulator bilayer structure, contributing to an improved transistor performance. Moreover, this coplanar transistor with semiconductor-insulator bilayer structure is an ideal system for injecting charges into the insulator via gate-stress, and the thus-formed PS electret layer acts as a "nonuniform floating gate" to tune the threshold voltage and effective mobility of the transistors. Effective field-effect mobility higher than 1 cm 2 V -1 s -1 with an on/off ratio > 10 7 is realized, and the performances are comparable to those of commercial amorphous silicon transistors. This coplanar transistor simplifies the fabrication process of corresponding circuits. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

NREL Finds Nanotube Semiconductors Well-suited for PV Systems | News | NREL

Science.gov Websites

photoinduced electron transfer for emerging organic semiconductors such as single-walled carbon nanotubes (SWCNT) that can be used in organic PV devices. In organic PV devices, after a photon is absorbed Larson, and Steven Strauss from Colorado State University. Organic PV devices involve an interface

Hybrid method of making an amorphous silicon P-I-N semiconductor device

DOEpatents

Moustakas, Theodore D.; Morel, Don L.; Abeles, Benjamin

1983-10-04

The invention is directed to a hydrogenated amorphous silicon PIN semiconductor device of hybrid glow discharge/reactive sputtering fabrication. The hybrid fabrication method is of advantage in providing an ability to control the optical band gap of the P and N layers, resulting in increased photogeneration of charge carriers and device output.

Multi-color Long Wavelength Infrared Detectors Based On III-V Semiconductors

DTIC Science & Technology

2010-07-30

both interband and intersubband transitions that form the basis of may optoelectronic devices. The research performed under this grant made it...based on interband and intersubband transitions in InAs and InGaAs QDs as a means for room temperature, multi-color photodetection in the visible...AM1.5 standard solar simulator. DOPING EFFECT ON INTERBAND AND INTERSUBBAND MULTICOLOR INFRARED PHOTODETECTORS: First, many samples and devices

Characterization of a High-SpeedHigh-Power Semiconductor Master-Oscillator Power-Amplifier (MOPA) Laser as a Free-Space Transmitter

NASA Astrophysics Data System (ADS)

Wright, M. W.

2000-04-01

Semiconductor lasers offer promise as high-speed transmitters for free-space optical communication systems. This article examines the performance of a semiconductor laser system in a master-oscillator power-amplifier (MOPA) geometry developed through a Small Business Innovation Research (SBIR) contract with SDL, Inc. The compact thermo-electric cooler (TEC) packaged device is capable of 1-W output optical power at greater than 2-Gb/s data rates and a wavelength of 960 nm. In particular, we have investigated the effects of amplified spontaneous emission on the modulation extinction ratio and bit-error rate (BER) performance. BERs of up to 10^(-9) were possible at 1.4 Gb/s; however, the modulation extinction ratio was limited to 6 dB. Other key parameters for a free-space optical transmitter, such as the electrical-optical efficiency (24 percent) and beam quality, also were measured.

Blending crystalline/liquid crystalline small molecule semiconductors: A strategy towards high performance organic thin film transistors

NASA Astrophysics Data System (ADS)

He, Chao; He, Yaowu; Li, Aiyuan; Zhang, Dongwei; Meng, Hong

2016-10-01

Solution processed small molecule polycrystalline thin films often suffer from the problems of inhomogeneity and discontinuity. Here, we describe a strategy to solve these problems through deposition of the active layer from a blended solution of crystalline (2-phenyl[1]benzothieno[3,2-b][1]benzothiophene, Ph-BTBT) and liquid crystalline (2-(4-dodecylphenyl) [1]benzothieno[3,2-b]benzothiophene, C12-Ph-BTBT) small molecule semiconductors with the hot spin-coating method. Organic thin film transistors with average hole mobility approaching 1 cm2/V s, much higher than that of single component devices, have been demonstrated, mainly due to the improved uniformity, continuity, crystallinity, and stronger intermolecular π-π stacking in blend thin films. Our results indicate that the crystalline/liquid crystalline semiconductor blend method is an effective way to enhance the performance of organic transistors.

Solution-printed organic semiconductor blends exhibiting transport properties on par with single crystals

PubMed Central

Niazi, Muhammad R.; Li, Ruipeng; Qiang Li, Er; Kirmani, Ahmad R.; Abdelsamie, Maged; Wang, Qingxiao; Pan, Wenyang; Payne, Marcia M.; Anthony, John E.; Smilgies, Detlef-M.; Thoroddsen, Sigurdur T.; Giannelis, Emmanuel P.; Amassian, Aram

2015-01-01

Solution-printed organic semiconductors have emerged in recent years as promising contenders for roll-to-roll manufacturing of electronic and optoelectronic circuits. The stringent performance requirements for organic thin-film transistors (OTFTs) in terms of carrier mobility, switching speed, turn-on voltage and uniformity over large areas require performance currently achieved by organic single-crystal devices, but these suffer from scale-up challenges. Here we present a new method based on blade coating of a blend of conjugated small molecules and amorphous insulating polymers to produce OTFTs with consistently excellent performance characteristics (carrier mobility as high as 6.7 cm2 V−1 s−1, low threshold voltages of<1 V and low subthreshold swings <0.5 V dec−1). Our findings demonstrate that careful control over phase separation and crystallization can yield solution-printed polycrystalline organic semiconductor films with transport properties and other figures of merit on par with their single-crystal counterparts. PMID:26592862

Solution-printed organic semiconductor blends exhibiting transport properties on par with single crystals.

PubMed

Niazi, Muhammad R; Li, Ruipeng; Qiang Li, Er; Kirmani, Ahmad R; Abdelsamie, Maged; Wang, Qingxiao; Pan, Wenyang; Payne, Marcia M; Anthony, John E; Smilgies, Detlef-M; Thoroddsen, Sigurdur T; Giannelis, Emmanuel P; Amassian, Aram

2015-11-23

Solution-printed organic semiconductors have emerged in recent years as promising contenders for roll-to-roll manufacturing of electronic and optoelectronic circuits. The stringent performance requirements for organic thin-film transistors (OTFTs) in terms of carrier mobility, switching speed, turn-on voltage and uniformity over large areas require performance currently achieved by organic single-crystal devices, but these suffer from scale-up challenges. Here we present a new method based on blade coating of a blend of conjugated small molecules and amorphous insulating polymers to produce OTFTs with consistently excellent performance characteristics (carrier mobility as high as 6.7 cm(2) V(-1) s(-1), low threshold voltages of<1 V and low subthreshold swings <0.5 V dec(-1)). Our findings demonstrate that careful control over phase separation and crystallization can yield solution-printed polycrystalline organic semiconductor films with transport properties and other figures of merit on par with their single-crystal counterparts.

High-performance III-V MOSFET with nano-stacked high-k gate dielectric and 3D fin-shaped structure.

PubMed

Chen, Szu-Hung; Liao, Wen-Shiang; Yang, Hsin-Chia; Wang, Shea-Jue; Liaw, Yue-Gie; Wang, Hao; Gu, Haoshuang; Wang, Mu-Chun

2012-08-01

A three-dimensional (3D) fin-shaped field-effect transistor structure based on III-V metal-oxide-semiconductor field-effect transistor (MOSFET) fabrication has been demonstrated using a submicron GaAs fin as the high-mobility channel. The fin-shaped channel has a thickness-to-width ratio (TFin/WFin) equal to 1. The nano-stacked high-k Al2O3 dielectric was adopted as a gate insulator in forming a metal-oxide-semiconductor structure to suppress gate leakage. The 3D III-V MOSFET exhibits outstanding gate controllability and shows a high Ion/Ioff ratio > 105 and a low subthreshold swing of 80 mV/decade. Compared to a conventional Schottky gate metal-semiconductor field-effect transistor or planar III-V MOSFETs, the III-V MOSFET in this work exhibits a significant performance improvement and is promising for future development of high-performance n-channel devices based on III-V materials.

High-performance III-V MOSFET with nano-stacked high-k gate dielectric and 3D fin-shaped structure

PubMed Central

2012-01-01

A three-dimensional (3D) fin-shaped field-effect transistor structure based on III-V metal-oxide-semiconductor field-effect transistor (MOSFET) fabrication has been demonstrated using a submicron GaAs fin as the high-mobility channel. The fin-shaped channel has a thickness-to-width ratio (TFin/WFin) equal to 1. The nano-stacked high-k Al2O3 dielectric was adopted as a gate insulator in forming a metal-oxide-semiconductor structure to suppress gate leakage. The 3D III-V MOSFET exhibits outstanding gate controllability and shows a high Ion/Ioff ratio > 105 and a low subthreshold swing of 80 mV/decade. Compared to a conventional Schottky gate metal–semiconductor field-effect transistor or planar III-V MOSFETs, the III-V MOSFET in this work exhibits a significant performance improvement and is promising for future development of high-performance n-channel devices based on III-V materials. PMID:22853458

Ambipolar Small-Molecule:Polymer Blend Semiconductors for Solution-Processable Organic Field-Effect Transistors.

PubMed

Kang, Minji; Hwang, Hansu; Park, Won-Tae; Khim, Dongyoon; Yeo, Jun-Seok; Kim, Yunseul; Kim, Yeon-Ju; Noh, Yong-Young; Kim, Dong-Yu

2017-01-25

We report on the fabrication of an organic thin-film semiconductor formed using a blend solution of soluble ambipolar small molecules and an insulating polymer binder that exhibits vertical phase separation and uniform film formation. The semiconductor thin films are produced in a single step from a mixture containing a small molecular semiconductor, namely, quinoidal biselenophene (QBS), and a binder polymer, namely, poly(2-vinylnaphthalene) (PVN). Organic field-effect transistors (OFETs) based on QBS/PVN blend semiconductor are then assembled using top-gate/bottom-contact device configuration, which achieve almost four times higher mobility than the neat QBS semiconductor. Depth profile via secondary ion mass spectrometry and atomic force microscopy images indicate that the QBS domains in the films made from the blend are evenly distributed with a smooth morphology at the bottom of the PVN layer. Bias stress test and variable-temperature measurements on QBS-based OFETs reveal that the QBS/PVN blend semiconductor remarkably reduces the number of trap sites at the gate dielectric/semiconductor interface and the activation energy in the transistor channel. This work provides a one-step solution processing technique, which makes use of soluble ambipolar small molecules to form a thin-film semiconductor for application in high-performance OFETs.

Nanometer-scale oxide thin film transistor with potential for high-density image sensor applications.

PubMed

Jeon, Sanghun; Park, Sungho; Song, Ihun; Hur, Ji-Hyun; Park, Jaechul; Kim, Hojung; Kim, Sunil; Kim, Sangwook; Yin, Huaxiang; Chung, U-In; Lee, Eunha; Kim, Changjung

2011-01-01

The integration of electronically active oxide components onto silicon circuits represents an innovative approach to improving the functionality of novel devices. Like most semiconductor devices, complementary-metal-oxide-semiconductor image sensors (CISs) have physical limitations when progressively scaled down to extremely small dimensions. In this paper, we propose a novel hybrid CIS architecture that is based on the combination of nanometer-scale amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) and a conventional Si photo diode (PD). With this approach, we aim to overcome the loss of quantum efficiency and image quality due to the continuous miniaturization of PDs. Specifically, the a-IGZO TFT with 180 nm gate length is probed to exhibit remarkable performance including low 1/f noise and high output gain, despite fabrication temperatures as low as 200 °C. In particular, excellent device performance is achieved using a double-layer gate dielectric (Al₂O₃/SiO₂) combined with a trapezoidal active region formed by a tailored etching process. A self-aligned top gate structure is adopted to ensure low parasitic capacitance. Lastly, three-dimensional (3D) process simulation tools are employed to optimize the four-pixel CIS structure. The results demonstrate how our stacked hybrid device could be the starting point for new device strategies in image sensor architectures. Furthermore, we expect the proposed approach to be applicable to a wide range of micro- and nanoelectronic devices and systems.

Soft x ray window encapsulant for HgI2 detectors

NASA Technical Reports Server (NTRS)

Entine, G.; Shah, K.; Squillante, M.

1987-01-01

HgI2 is an excellent semiconductor material for a low energy, room temperature x-ray spectrometer. The high values of the atomic numbers for its constituent elements gives high x-ray and gamma ray stopping power. The band gap of HgI2 is significantly higher than other commonly used semiconductors. Owing to the large value band gap, the leakage current for HgI2 devices is smaller, thus allowing low noise performance. Devices fabricated from HgI2 crystals have demonstrated energy resolution sufficient to distinguish the x-ray emission from the neighboring elements on the periodic table. Also the power requirements of HgI2 are very low. These characteristics make a HgI2 spectrometer an ideal component in a satellite based detection system. Unfortunately, HgI2 crystals tend to deteriorate with time, even if protected by standard semiconductor encapsulants. This degradation ruins the performance of the device in terms of its energy resolution and pulse amplitude. The degrading mechanism is believed to be material loss occurring from below the electrodes, due to high vapor pressure of HgI2 at room temperature. To address this major obstacle to rapid expansion of HgI2 technology, a research program aimed at improving device stability by encapsulation with inert polymeric materials was carried out. The program focused specifically on optimizing the encapsulant materials and their deposition techniques. The principal objectives for this program were device encapsulation, device testing, and accelerated testing to ensure very long term stability of these high resolution sensors. A variety of encapsulants were investigated with the selection criteria based on their chemical diffusion barrier properties, mechanical stability, reactivity, and morphology of encapsulant films. The investigation covered different classes of encapsulants including solvent based encapsulants, vapor deposited encapsulants, and plasma polymerized encapsulants. A variety of characterization techniques were employed to examine their effectiveness in stabilizing HgI2 devices; these included permeability evaluation, vacuum and heat testing, scanning electron microscopy (SEM) as well as studying the detector performance of coated detectors. The plasma polymerized films appear to have entirely solved the HgI2 degradation problem. Another achievement of this program was the development of an accelerated testing technique which correlates extremely well with long term tesing.

Ultrafast, superhigh gain visible-blind UV detector and optical logic gates based on nonpolar a-axial GaN nanowire

NASA Astrophysics Data System (ADS)

Wang, Xingfu; Zhang, Yong; Chen, Xinman; He, Miao; Liu, Chao; Yin, Yian; Zou, Xianshao; Li, Shuti

2014-09-01

Nonpolar a-axial GaN nanowire (NW) was first used to construct the MSM (metal-semiconductor-metal) symmetrical Schottky contact device for application as visible-blind ultraviolet (UV) detector. Without any surface or composition modifications, the fabricated device demonstrated a superior performance through a combination of its high sensitivity (up to 104 A W-1) and EQE value (up to 105), as well as ultrafast (<26 ms) response speed, which indicates that a balance between the photocurrent gain and the response speed has been achieved. Based on its excellent photoresponse performance, an optical logic AND gate and OR gate have been demonstrated for performing photo-electronic coupled logic devices by further integrating the fabricated GaN NW detectors, which logically convert optical signals to electrical signals in real time. These results indicate the possibility of using a nonpolar a-axial GaN NW not only as a high performance UV detector, but also as a stable optical logic device, both in light-wave communications and for future memory storage.Nonpolar a-axial GaN nanowire (NW) was first used to construct the MSM (metal-semiconductor-metal) symmetrical Schottky contact device for application as visible-blind ultraviolet (UV) detector. Without any surface or composition modifications, the fabricated device demonstrated a superior performance through a combination of its high sensitivity (up to 104 A W-1) and EQE value (up to 105), as well as ultrafast (<26 ms) response speed, which indicates that a balance between the photocurrent gain and the response speed has been achieved. Based on its excellent photoresponse performance, an optical logic AND gate and OR gate have been demonstrated for performing photo-electronic coupled logic devices by further integrating the fabricated GaN NW detectors, which logically convert optical signals to electrical signals in real time. These results indicate the possibility of using a nonpolar a-axial GaN NW not only as a high performance UV detector, but also as a stable optical logic device, both in light-wave communications and for future memory storage. Electronic supplementary information (ESI) available: Details of the EDS and SAED data, supplementary results of the UV detector, and the discussion of the transport properties of the MSM Schottky contact devices. See DOI: 10.1039/c4nr03581j

Thermovoltaic semiconductor device including a plasma filter

DOEpatents

Baldasaro, Paul F.

1999-01-01

A thermovoltaic energy conversion device and related method for converting thermal energy into an electrical potential. An interference filter is provided on a semiconductor thermovoltaic cell to pre-filter black body radiation. The semiconductor thermovoltaic cell includes a P/N junction supported on a substrate which converts incident thermal energy below the semiconductor junction band gap into electrical potential. The semiconductor substrate is doped to provide a plasma filter which reflects back energy having a wavelength which is above the band gap and which is ineffectively filtered by the interference filter, through the P/N junction to the source of radiation thereby avoiding parasitic absorption of the unusable portion of the thermal radiation energy.

Semiconductor cooling by thin-film thermocouples

NASA Technical Reports Server (NTRS)

Tick, P. A.; Vilcans, J.

1970-01-01

Thin-film, metal alloy thermocouple junctions do not rectify, change circuit impedance only slightly, and require very little increase in space. Although they are less efficient cooling devices than semiconductor junctions, they may be applied to assist conventional cooling techniques for electronic devices.

Multiple gap photovoltaic device

DOEpatents

Dalal, Vikram L.

1981-01-01

A multiple gap photovoltaic device having a transparent electrical contact adjacent a first cell which in turn is adjacent a second cell on an opaque electrical contact, includes utilizing an amorphous semiconductor as the first cell and a crystalline semiconductor as the second cell.

Restorative effect of oxygen annealing on device performance in HfIZO thin-film transistors

NASA Astrophysics Data System (ADS)

Ha, Tae-Jun

2015-03-01

Metal-oxide based thin-film transistors (oxide-TFTs) are very promising for use in next generation electronics such as transparent displays requiring high switching and driving performance. In this study, we demonstrate an optimized process to secure excellent device performance with a favorable shift of the threshold voltage toward 0V in amorphous hafnium-indium-zinc-oxide (a-HfIZO) TFTs by using post-treatment with oxygen annealing. This enhancement results from the improved interfacial characteristics between gate dielectric and semiconductor layers due to the reduction in the density of interfacial states related to oxygen vacancies afforded by oxygen annealing. The device statistics confirm the improvement in the device-to-device and run-to-run uniformity. We also report on the photo-induced stability in such oxide-TFTs against long-term UV irradiation, which is significant for transparent displays.

Highly Flexible Hybrid CMOS Inverter Based on Si Nanomembrane and Molybdenum Disulfide.

PubMed

Das, Tanmoy; Chen, Xiang; Jang, Houk; Oh, Il-Kwon; Kim, Hyungjun; Ahn, Jong-Hyun

2016-11-01

2D semiconductor materials are being considered for next generation electronic device application such as thin-film transistors and complementary metal-oxide-semiconductor (CMOS) circuit due to their unique structural and superior electronics properties. Various approaches have already been taken to fabricate 2D complementary logics circuits. However, those CMOS devices mostly demonstrated based on exfoliated 2D materials show the performance of a single device. In this work, the design and fabrication of a complementary inverter is experimentally reported, based on a chemical vapor deposition MoS 2 n-type transistor and a Si nanomembrane p-type transistor on the same substrate. The advantages offered by such CMOS configuration allow to fabricate large area wafer scale integration of high performance Si technology with transition-metal dichalcogenide materials. The fabricated hetero-CMOS inverters which are composed of two isolated transistors exhibit a novel high performance air-stable voltage transfer characteristic with different supply voltages, with a maximum voltage gain of ≈16, and sub-nano watt power consumption. Moreover, the logic gates have been integrated on a plastic substrate and displayed reliable electrical properties paving a realistic path for the fabrication of flexible/transparent CMOS circuits in 2D electronics. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

High performance flexible electronics for biomedical devices.

PubMed

Salvatore, Giovanni A; Munzenrieder, Niko; Zysset, Christoph; Kinkeldei, Thomas; Petti, Luisa; Troster, Gerhard

2014-01-01

Plastic electronics is soft, deformable and lightweight and it is suitable for the realization of devices which can form an intimate interface with the body, be implanted or integrated into textile for wearable and biomedical applications. Here, we present flexible electronics based on amorphous oxide semiconductors (a-IGZO) whose performance can achieve MHz frequency even when bent around hair. We developed an assembly technique to integrate complex electronic functionalities into textile while preserving the softness of the garment. All this and further developments can open up new opportunities in health monitoring, biotechnology and telemedicine.

Silicon nanowires for photovoltaic solar energy conversion.

PubMed

Peng, Kui-Qing; Lee, Shuit-Tong

2011-01-11

Semiconductor nanowires are attracting intense interest as a promising material for solar energy conversion for the new-generation photovoltaic (PV) technology. In particular, silicon nanowires (SiNWs) are under active investigation for PV applications because they offer novel approaches for solar-to-electric energy conversion leading to high-efficiency devices via simple manufacturing. This article reviews the recent developments in the utilization of SiNWs for PV applications, the relationship between SiNW-based PV device structure and performance, and the challenges to obtaining high-performance cost-effective solar cells.

Metal oxide semiconductor thin-film transistors for flexible electronics

NASA Astrophysics Data System (ADS)

Petti, Luisa; Münzenrieder, Niko; Vogt, Christian; Faber, Hendrik; Büthe, Lars; Cantarella, Giuseppe; Bottacchi, Francesca; Anthopoulos, Thomas D.; Tröster, Gerhard

2016-06-01

The field of flexible electronics has rapidly expanded over the last decades, pioneering novel applications, such as wearable and textile integrated devices, seamless and embedded patch-like systems, soft electronic skins, as well as imperceptible and transient implants. The possibility to revolutionize our daily life with such disruptive appliances has fueled the quest for electronic devices which yield good electrical and mechanical performance and are at the same time light-weight, transparent, conformable, stretchable, and even biodegradable. Flexible metal oxide semiconductor thin-film transistors (TFTs) can fulfill all these requirements and are therefore considered the most promising technology for tomorrow's electronics. This review reflects the establishment of flexible metal oxide semiconductor TFTs, from the development of single devices, large-area circuits, up to entirely integrated systems. First, an introduction on metal oxide semiconductor TFTs is given, where the history of the field is revisited, the TFT configurations and operating principles are presented, and the main issues and technological challenges faced in the area are analyzed. Then, the recent advances achieved for flexible n-type metal oxide semiconductor TFTs manufactured by physical vapor deposition methods and solution-processing techniques are summarized. In particular, the ability of flexible metal oxide semiconductor TFTs to combine low temperature fabrication, high carrier mobility, large frequency operation, extreme mechanical bendability, together with transparency, conformability, stretchability, and water dissolubility is shown. Afterward, a detailed analysis of the most promising metal oxide semiconducting materials developed to realize the state-of-the-art flexible p-type TFTs is given. Next, the recent progresses obtained for flexible metal oxide semiconductor-based electronic circuits, realized with both unipolar and complementary technology, are reported. In particular, the realization of large-area digital circuitry like flexible near field communication tags and analog integrated circuits such as bendable operational amplifiers is presented. The last topic of this review is devoted for emerging flexible electronic systems, from foldable displays, power transmission elements to integrated systems for large-area sensing and data storage and transmission. Finally, the conclusions are drawn and an outlook over the field with a prediction for the future is provided.

Metal oxide semiconductor thin-film transistors for flexible electronics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Petti, Luisa; Vogt, Christian; Büthe, Lars

The field of flexible electronics has rapidly expanded over the last decades, pioneering novel applications, such as wearable and textile integrated devices, seamless and embedded patch-like systems, soft electronic skins, as well as imperceptible and transient implants. The possibility to revolutionize our daily life with such disruptive appliances has fueled the quest for electronic devices which yield good electrical and mechanical performance and are at the same time light-weight, transparent, conformable, stretchable, and even biodegradable. Flexible metal oxide semiconductor thin-film transistors (TFTs) can fulfill all these requirements and are therefore considered the most promising technology for tomorrow's electronics. This reviewmore » reflects the establishment of flexible metal oxide semiconductor TFTs, from the development of single devices, large-area circuits, up to entirely integrated systems. First, an introduction on metal oxide semiconductor TFTs is given, where the history of the field is revisited, the TFT configurations and operating principles are presented, and the main issues and technological challenges faced in the area are analyzed. Then, the recent advances achieved for flexible n-type metal oxide semiconductor TFTs manufactured by physical vapor deposition methods and solution-processing techniques are summarized. In particular, the ability of flexible metal oxide semiconductor TFTs to combine low temperature fabrication, high carrier mobility, large frequency operation, extreme mechanical bendability, together with transparency, conformability, stretchability, and water dissolubility is shown. Afterward, a detailed analysis of the most promising metal oxide semiconducting materials developed to realize the state-of-the-art flexible p-type TFTs is given. Next, the recent progresses obtained for flexible metal oxide semiconductor-based electronic circuits, realized with both unipolar and complementary technology, are reported. In particular, the realization of large-area digital circuitry like flexible near field communication tags and analog integrated circuits such as bendable operational amplifiers is presented. The last topic of this review is devoted for emerging flexible electronic systems, from foldable displays, power transmission elements to integrated systems for large-area sensing and data storage and transmission. Finally, the conclusions are drawn and an outlook over the field with a prediction for the future is provided.« less

A lead-halide perovskite molecular ferroelectric semiconductor

PubMed Central

Liao, Wei-Qiang; Zhang, Yi; Hu, Chun-Li; Mao, Jiang-Gao; Ye, Heng-Yun; Li, Peng-Fei; Huang, Songping D.; Xiong, Ren-Gen

2015-01-01

Inorganic semiconductor ferroelectrics such as BiFeO3 have shown great potential in photovoltaic and other applications. Currently, semiconducting properties and the corresponding application in optoelectronic devices of hybrid organo-plumbate or stannate are a hot topic of academic research; more and more of such hybrids have been synthesized. Structurally, these hybrids are suitable for exploration of ferroelectricity. Therefore, the design of molecular ferroelectric semiconductors based on these hybrids provides a possibility to obtain new or high-performance semiconductor ferroelectrics. Here we investigated Pb-layered perovskites, and found the layer perovskite (benzylammonium)2PbCl4 is ferroelectric with semiconducting behaviours. It has a larger ferroelectric spontaneous polarization Ps=13 μC cm−2 and a higher Curie temperature Tc=438 K with a band gap of 3.65 eV. This finding throws light on the new properties of the hybrid organo-plumbate or stannate compounds and provides a new way to develop new semiconductor ferroelectrics. PMID:26021758

Development of p-type oxide semiconductors based on tin oxide and its alloys: application to thin film transistors

NASA Astrophysics Data System (ADS)

Barros, Ana Raquel Xarouco de

In spite of the recent p-type oxide TFTs developments based on SnOx and CuxO, the results achieved so far refer to devices processed at high temperatures and are limited by a low hole mobility and a low On-Off ratio and still there is no report on p-type oxide TFTs with performance similar to n-type, especially when comparing their field-effect mobility values, which are at least one order of magnitude higher on n-type oxide TFTs. Achieving high performance p-type oxide TFTs will definitely promote a new era for electronics in rigid and flexible substrates, away from silicon. None of the few reported p-channel oxide TFTs is suitable for practical applications, which demand significant improvements in the device engineering to meet the real-world electronic requirements, where low processing temperatures together with high mobility and high On-Off ratio are required for TFT and CMOS applications. The present thesis focuses on the study and optimization of p-type thin film transistors based on oxide semiconductors deposited by r.f. magnetron sputtering without intentional substrate heating. In this work several p-type oxide semiconductors were studied and optimized based on undoped tin oxide, Cu-doped SnOx and In-doped SnO2.

Grain Boundary Induced Bias Instability in Soluble Acene-Based Thin-Film Transistors

PubMed Central

Nguyen, Ky V.; Payne, Marcia M.; Anthony, John E.; Lee, Jung Hun; Song, Eunjoo; Kang, Boseok; Cho, Kilwon; Lee, Wi Hyoung

2016-01-01

Since the grain boundaries (GBs) within the semiconductor layer of organic field-effect transistors (OFETs) have a strong influence on device performance, a substantial number of studies have been devoted to controlling the crystallization characteristics of organic semiconductors. We studied the intrinsic effects of GBs within 5,11-bis(triethylsilylethynyl) anthradithiophene (TES-ADT) thin films on the electrical properties of OFETs. The GB density was easily changed by controlling nulceation event in TES-ADT thin films. When the mixing time was increased, the number of aggregates in as-spun TES-ADT thin films were increased and subsequent exposure of the films to 1,2-dichloroethane vapor led to a significant increase in the number of nuleation sites, thereby increasing the GB density of TES-ADT spherulites. The density of GBs strongly influences the angular spread and crystallographic orientation of TES-ADT spherulites. Accordingly, the FETs with higher GB densities showed much poorer electrical characteristics than devices with lower GB density. Especially, GBs provide charge trapping sites which are responsible for bias-stress driven electrical instability. Dielectric surface treatment with a polystyrene brush layer clarified the GB-induced charge trapping by reducing charge trapping at the semiconductor-dielectric interface. Our study provides an understanding on GB induced bias instability for the development of high performance OFETs. PMID:27615358

Grain Boundary Induced Bias Instability in Soluble Acene-Based Thin-Film Transistors.

PubMed

Nguyen, Ky V; Payne, Marcia M; Anthony, John E; Lee, Jung Hun; Song, Eunjoo; Kang, Boseok; Cho, Kilwon; Lee, Wi Hyoung

2016-09-12

Since the grain boundaries (GBs) within the semiconductor layer of organic field-effect transistors (OFETs) have a strong influence on device performance, a substantial number of studies have been devoted to controlling the crystallization characteristics of organic semiconductors. We studied the intrinsic effects of GBs within 5,11-bis(triethylsilylethynyl) anthradithiophene (TES-ADT) thin films on the electrical properties of OFETs. The GB density was easily changed by controlling nulceation event in TES-ADT thin films. When the mixing time was increased, the number of aggregates in as-spun TES-ADT thin films were increased and subsequent exposure of the films to 1,2-dichloroethane vapor led to a significant increase in the number of nuleation sites, thereby increasing the GB density of TES-ADT spherulites. The density of GBs strongly influences the angular spread and crystallographic orientation of TES-ADT spherulites. Accordingly, the FETs with higher GB densities showed much poorer electrical characteristics than devices with lower GB density. Especially, GBs provide charge trapping sites which are responsible for bias-stress driven electrical instability. Dielectric surface treatment with a polystyrene brush layer clarified the GB-induced charge trapping by reducing charge trapping at the semiconductor-dielectric interface. Our study provides an understanding on GB induced bias instability for the development of high performance OFETs.

Designing new classes of high-power, high-brightness VECSELs

NASA Astrophysics Data System (ADS)

Moloney, J. V.; Zakharian, A. R.; Hader, J.; Koch, Stephan W.

2005-10-01

Optically-pumped vertical external cavity semiconductor lasers offer the exciting possibility of designing kW-class solid state lasers that provide significant advantages over their doped YAG, thin-disk YAG and fiber counterparts. The basic VECSEL/OPSL (optically-pumped semiconductor laser) structure consists of a very thin (approximately 6 micron thick) active mirror consisting of a DBR high-reflectivity stack followed by a multiple quantum well resonant periodic (RPG) structure. An external mirror (reflectivity typically between 94%-98%) provides conventional optical feedback to the active semiconductor mirror chip. The "cold" cavity needs to be designed to take into account the semiconductor sub-cavity resonance shift with temperature and, importantly, the more rapid shift of the semiconductor material gain peak with temperature. Thermal management proves critical in optimizing the device for serious power scaling. We will describe a closed-loop procedure that begins with a design of the semiconductor active epi structure. This feeds into the sub-cavity optimization, optical and thermal transport within the active structure and thermal transport though the various heat sinking elements. Novel schemes for power scaling beyond current record performances will be discussed.

Organic photosensitive cells grown on rough electrode with nano-scale morphology control

DOEpatents

Yang, Fan [Piscataway, NJ; Forrest, Stephen R [Ann Arbor, MI

2011-06-07

An optoelectronic device and a method for fabricating the optoelectronic device includes a first electrode disposed on a substrate, an exposed surface of the first electrode having a root mean square roughness of at least 30 nm and a height variation of at least 200 nm, the first electrode being transparent. A conformal layer of a first organic semiconductor material is deposited onto the first electrode by organic vapor phase deposition, the first organic semiconductor material being a small molecule material. A layer of a second organic semiconductor material is deposited over the conformal layer. At least some of the layer of the second organic semiconductor material directly contacts the conformal layer. A second electrode is deposited over the layer of the second organic semiconductor material. The first organic semiconductor material is of a donor-type or an acceptor-type relative to the second organic semiconductor material, which is of the other material type.

Photovoltaic devices comprising cadmium stannate transparent conducting films and method for making

DOEpatents

Wu, X.; Coutts, T.J.; Sheldon, P.; Rose, D.H.

1999-07-13

A photovoltaic device is disclosed having a substrate, a layer of Cd[sub 2]SnO[sub 4] disposed on said substrate as a front contact, a thin film comprising two or more layers of semiconductor materials disposed on said layer of Cd[sub 2]SnO[sub 4], and an electrically conductive film disposed on said thin film of semiconductor materials to form a rear electrical contact to said thin film. The device is formed by RF sputter coating a Cd[sub 2]SnO[sub 4] layer onto a substrate, depositing a thin film of semiconductor materials onto the layer of Cd[sub 2]SnO[sub 4], and depositing an electrically conductive film onto the thin film of semiconductor materials. 10 figs.

Pulsed Laser System to Simulate Effects of Cosmic Rays in Semiconductor Devices

NASA Technical Reports Server (NTRS)

Aveline, David C.; Adell, Philippe C.; Allen, Gregory R.; Guertin, Steven M.; McClure, Steven S.

2011-01-01

Spaceflight system electronic devices must survive a wide range of radiation environments with various particle types including energetic protons, electrons, gamma rays, x-rays, and heavy ions. High-energy charged particles such as heavy ions can pass straight through a semiconductor material and interact with a charge-sensitive region, generating a significant amount of charge (electron-hole pairs) along their tracks. These excess charges can damage the device, and the response can range from temporary perturbations to permanent changes in the state or performance. These phenomena are called single event effects (SEE). Before application in flight systems, electronic parts need to be qualified and tested for performance and radiation sensitivity. Typically, their susceptibility to SEE is tested by exposure to an ion beam from a particle accelerator. At such facilities, the device under test (DUT) is irradiated with large beams so there is no fine resolution to investigate particular regions of sensitivity on the parts. While it is the most reliable approach for radiation qualification, these evaluations are time consuming and costly. There is always a need for new cost-efficient strategies to complement accelerator testing: pulsed lasers provide such a solution. Pulsed laser light can be utilized to simulate heavy ion effects with the advantage of being able to localize the sensitive region of an integrated circuit. Generally, a focused laser beam of approximately picosecond pulse duration is used to generate carrier density in the semiconductor device. During irradiation, the laser pulse is absorbed by the electronic medium with a wavelength selected accordingly by the user, and the laser energy can ionize and simulate SEE as would occur in space. With a tightly focused near infrared (NIR) laser beam, the beam waist of about a micrometer can be achieved, and additional scanning techniques are able to yield submicron resolution. This feature allows mapping of all of the sensitive regions of the studied device with fine resolution, unlike heavy ion experiments. The problematic regions can be precisely identified, and it provides a considerable amount of information about the circuit. In addition, the system allows flexibility for testing the device in different configurations in situ.

Exploring the Electronic Landscape at Interfaces and Junctions in Semiconductor Nanowire Devices with Subsurface Local Probing of Carrier Dynamics

NASA Astrophysics Data System (ADS)

McGuckin, Terrence

The solid state devices that are pervasive in our society, are based on building blocks composed of interfaces between materials and junctions that manipulate how charge carriers behave in a device. As the dimensions of these devices are reduced to the nanoscale, surfaces and interfaces play a larger role in the behavior of carriers in devices and must be thoroughly investigated to understand not only the material properties but how these materials interact. Separating the effects of these different building blocks is a challenge, as most testing methods measure the performance of the whole device. Semiconductor nanowires represent an excellent test system to explore the limits of size and novel device structures. The behavior of charge carriers in semiconductor nanowire devices under operational conditions is investigated using local probing technique electron beam induced current (EBIC). The behavior of locally excited carriers are driven by the forces of drift, from electric fields within a device at junctions, surfaces, contacts and, applied voltage bias, and diffusion. This thesis presents the results of directly measuring these effects spatially with nanometer resolution, using EBIC in Ge, Si, and complex heterostructure GaAs/AlGaAs nanowire devices. Advancements to the EBIC technique, have pushed the resolution from tens of nanometers down to 1 to 2 nanometers. Depth profiling and tuning of the interaction volume allows for the separating the signal originating from the surface and the interior of the nanowire. Radial junctions and variations in bands can now be analyzed including core/shell hetero-structures. This local carrier probing reveals a number of surprising behaviors; Most notably, directly imaging the evolution of surface traps filling with electrons causing bandbending at the surface of Ge nanowires that leads to an enhancement in the charge separation of electrons and holes, and extracting different characteristic lengths from GaAs and AlGaAs in core/shell nanowires. For new and emerging solid state materials, understanding charge carrier dynamics is crucial to designing functional devices. Presented here are examples of the wide application of EBIC, and its variants, through imaging domains in ferroelectric materials, local electric fields and defects in 2D semiconductor material MoS2, and gradients in doping profiles of solar cells. Measuring the local behavior of carrier dynamics, EBIC has the potential to be a key metrology technique in correlative microscopy, enabling a deeper understanding of materials and how they interact within devices.

Semiconductor-Insulator-Semiconductor Diode Consisting of Monolayer MoS2, h-BN, and GaN Heterostructure.

PubMed

Jeong, Hyun; Bang, Seungho; Oh, Hye Min; Jeong, Hyeon Jun; An, Sung-Jin; Han, Gang Hee; Kim, Hyun; Kim, Ki Kang; Park, Jin Cheol; Lee, Young Hee; Lerondel, Gilles; Jeong, Mun Seok

2015-10-27

We propose a semiconductor-insulator-semiconductor (SIS) heterojunction diode consisting of monolayer (1-L) MoS2, hexagonal boron nitride (h-BN), and epitaxial p-GaN that can be applied to high-performance nanoscale optoelectronics. The layered materials of 1-L MoS2 and h-BN, grown by chemical vapor deposition, were vertically stacked by a wet-transfer method on a p-GaN layer. The final structure was verified by confocal photoluminescence and Raman spectroscopy. Current-voltage (I-V) measurements were conducted to compare the device performance with that of a more classical p-n structure. In both structures (the p-n and SIS heterojunction diode), clear current-rectifying characteristics were observed. In particular, a current and threshold voltage were obtained for the SIS structure that was higher compared to that of the p-n structure. This indicated that tunneling is the predominant carrier transport mechanism. In addition, the photoresponse of the SIS structure induced by the illumination of visible light was observed by photocurrent measurements.

Fused thiophene-based conjugated polymers and their use in optoelectronic devices

DOEpatents

Facchetti, Antonio; Marks, Tobin J; Takai, Atsuro; Seger, Mark; Chen, Zhihua

2015-11-03

The present teachings relate to certain polymeric compounds and their use as organic semiconductors in organic and hybrid optical, optoelectronic, and/or electronic devices such as photovoltaic cells, light emitting diodes, light emitting transistors, and field effect transistors. The disclosed compounds can provide improved device performance, for example, as measured by power conversion efficiency, fill factor, open circuit voltage, field-effect mobility, on/off current ratios, and/or air stability when used in photovoltaic cells or transistors. The disclosed compounds can have good solubility in common solvents enabling device fabrication via solution processes.

Two dimensional thermal and charge mapping of power thyristors

NASA Technical Reports Server (NTRS)

Hu, S. P.; Rabinovici, B. M.

1975-01-01

The two dimensional static and dynamic current density distributions within the junction of semiconductor power switching devices and in particular the thyristors were obtained. A method for mapping the thermal profile of the device junctions with fine resolution using an infrared beam and measuring the attenuation through the device as a function of temperature were developed. The results obtained are useful in the design and quality control of high power semiconductor switching devices.

Performance of current-in-plane pseudo-spin-valve devices on CMOS silicon-on-insulator underlayers

NASA Astrophysics Data System (ADS)

Katti, R. R.; Zou, D.; Reed, D.; Schipper, D.; Hynes, O.; Shaw, G.; Kaakani, H.

2003-05-01

Prior work has shown that current-in-plane (CIP) giant magnetoresistive (GMR) pseudo-spin-valve (PSV) devices grown on bulk Si wafers and bulk complementary metal-oxide semiconductor (CMOS) underlayers exhibit write and read characteristics that are suitable for application as nonvolatile memory devices. In this work, CIP GMR PSV devices fabricated on silicon-on-insulator CMOS underlayers are shown to support write and read performance. Reading and writing fields for selected devices are shown to be approximately 25%-50% that of unselected devices, which provides a margin for reading and writing specific bits in a memory without overwriting bits and without disturbing other bits. The switching characteristics of experimental devices were compared to and found to be similar with Landau-Lifschitz-Gilbert micromagnetic modeling results, which allowed inferring regions of reversible and irreversible rotations in magnetic reversal processes.

Inhibition of unintentional extra carriers by Mn valence change for high insulating devices

PubMed Central

Guo, Daoyou; Li, Peigang; Wu, Zhenping; Cui, Wei; Zhao, Xiaolong; Lei, Ming; Li, Linghong; Tang, Weihua

2016-01-01

For intrinsic oxide semiconductors, oxygen vacancies served as the electron donors have long been, and inevitably still are, attributed as the primary cause of conductivity, making oxide semiconductors seem hard to act as high insulating materials. Meanwhile, the presence of oxygen vacancies often leads to a persistent photoconductivity phenomenon which is not conducive to the practical use in the fast photoelectric response devices. Herein, we propose a possible way to reduce the influence of oxygen vacancies by introducing a valence change doping in the monoclinic β-Ga2O3 epitaxial thin film. The unintentional extra electrons induced by oxygen vacancies can be strongly suppressed by the change valence of the doped Mn ions from +3 to +2. The resistance for the Mn-doped Ga2O3 increases two orders of magnitude in compared with the pure Ga2O3. As a result, photodetector based on Mn-doped Ga2O3 thin films takes on a lower dark current, a higher sensitivity, and a faster photoresponse time, exhibiting a promising candidate using in high performance solar-blind photodetector. The study presents that the intentional doping of Mn may provide a convenient and reliable method of obtaining high insulating thin film in oxide semiconductor for the application of specific device. PMID:27068227

Room-temperature preparation of trisilver-copper-sulfide/polymer based heterojunction thin film for solar cell application

NASA Astrophysics Data System (ADS)

Lei, Yan; Yang, Xiaogang; Gu, Longyan; Jia, Huimin; Ge, Suxiang; Xiao, Pin; Fan, Xiaoli; Zheng, Zhi

2015-04-01

Solar cells devices based on inorganic/polymer heterojunction can be a possible solution to harvest solar energy and convert to electric energy with high efficiency through a cost-effective fabrication. The solution-process method can be easily used to produce large area devices. Moreover, due to the intrinsic different charge separation, diffusion or recombination in various semiconductors, the interfaces between each component may strongly influence the inorganic/polymer heterojunction performance. Here we prepared a n-type Ag3CuS2 (Eg = 1.25 eV) nanostructured film through a room-temperature element reaction process, which was confirmed as direct bandgap semiconductor through density function theory simulation. This Ag3CuS2 film was spin-coated with an organic semiconducting poly(3-hexythiophene) (P3HT) or polythieno[3,4-b]-thiophene-co-benzodithiophene (PTB7) film, which formed an inorganic/polymer heterojunction. After constructing it to a solar cell device, the power conversion efficiencies of 0.79% and 0.31% were achieved with simulated solar illumination on Ag3CuS2/P3HT and Ag3CuS2/PTB7, respectively. A possible mechanism was discussed and we showed the charge separation at interface of inorganic and polymer semiconductors played an important role.

Network analysis of semiconducting Zn1-xCdxS based photosensitive device using impedance spectroscopy and current-voltage measurement

NASA Astrophysics Data System (ADS)

Datta, Joydeep; Das, Mrinmay; Dey, Arka; Halder, Soumi; Sil, Sayantan; Ray, Partha Pratim

2017-10-01

ZnCdS is an intermediate ternary alloy type semiconducting material which has huge tunable structural, optical and electrical properties. Here, we have synthesized Zn1-xCdxS compound and characterized its structural, optical and charge transport properties. It is seen that the particle size is greatly influenced by the amount of alloy concentration of cadmium. The performance of semiconductor device such as Schottky diode depends mainly on the charge transportation through the metal-semiconductor junction. So, we have fabricated Al/Zn1-xCdxS/ITO device and investigated the bias dependent impedance properties through equivalent circuit network analysis to study the electron lifetime and interfacial region resistance. The result of network analysis indicates that the charge transportation through Al- Zn0.6Cd0.4S is better than the other fabricated devices. For further explanation, we have studied the capacitance-voltage (C-V) characteristic under dark and current-voltage (I-V) characteristic under dark and light. We have investigated barrier height, depletion layer width and employed SCLC (space charge limited current) theory in I-V characteristics to determine mobility, transit time and diffusion length. The mobility and diffusion length for Zn0.6Cd0.4S fabricated device are derived as 23.01 m2 V-1 s-1 and 4.4 μm respectively while both the values are less for the other devices. These values are enhanced upon illumination for all the devices but superiority comes from the Al/Zn0.6Cd0.4S/ITO device and it leads us to measure the photosensitivity, responsivity, specific detectivity. As expected, the photosensing parameters are enhanced for the Zn0.6Cd0.4S fabricated device. So, this literature not only explores the metal semiconductor charge transportation using impedance spectroscopy (IS) network analysis and SCLC theory but also explain it from the structural point of view.

Silicon-Carbide Power MOSFET Performance in High Efficiency Boost Power Processing Unit for Extreme Environments

NASA Technical Reports Server (NTRS)

Ikpe, Stanley A.; Lauenstein, Jean-Marie; Carr, Gregory A.; Hunter, Don; Ludwig, Lawrence L.; Wood, William; Del Castillo, Linda Y.; Fitzpatrick, Fred; Chen, Yuan

2016-01-01

Silicon-Carbide device technology has generated much interest in recent years. With superior thermal performance, power ratings and potential switching frequencies over its Silicon counterpart, Silicon-Carbide offers a greater possibility for high powered switching applications in extreme environment. In particular, Silicon-Carbide Metal-Oxide- Semiconductor Field-Effect Transistors' (MOSFETs) maturing process technology has produced a plethora of commercially available power dense, low on-state resistance devices capable of switching at high frequencies. A novel hard-switched power processing unit (PPU) is implemented utilizing Silicon-Carbide power devices. Accelerated life data is captured and assessed in conjunction with a damage accumulation model of gate oxide and drain-source junction lifetime to evaluate potential system performance at high temperature environments.

Ultrahigh photo-responsivity and detectivity in multilayer InSe nanosheets phototransistors with broadband response

DOE PAGES

Feng, Wei; Wu, Jing-Bin; Li, Xiaoli; ...

2015-05-20

In this paper, we demonstrate the strategies and principles for the performance improvement of layered semiconductor based photodetectors using multilayer indium selenide (InSe) as the model material. It is discovered that multiple reflection interference at the interfaces in the phototransistor device leads to a thickness-dependent photo-response, which provides a guideline to improve the performance of layered semiconductor based phototransistors. The responsivity and detectivity of InSe nanosheet phototransistor can be adjustable using applied gate voltage. Our InSe nanosheet phototransistor exhibits ultrahigh responsivity and detectivity. An ultrahigh external photo-responsivity of ~10 4 A W -1 can be achieved from broad spectra rangingmore » from UV to near infrared wavelength using our InSe nanosheet photodetectors. The detectivity of multilayer InSe devices is ~10 12 to 10 13 Jones, which surpasses that of the currently exploited InGaAs photodetectors (10 11 to 10 12 Jones). Finally, this research shows that multilayer InSe nanosheets are promising materials for high performance photodetectors.« less

Metastable defect response in CZTSSe from admittance spectroscopy

DOE PAGES

Koeper, Mark J.; Hages, Charles J.; Li, Jian V.; ...

2017-10-02

Admittance spectroscopy is a useful tool used to study defects in semiconductor materials. However, metastable defect responses in non-ideal semiconductors can greatly impact the measurement and therefore the interpretation of results. Here, admittance spectroscopy was performed on Cu2ZnSn(S,Se) 4 where metastable defect response is illustrated due to the trapping of injected carriers into a deep defect state. To investigate the metastable response, admittance measurements were performed under electrically and optically relaxed conditions in comparison to a device following a low level carrier-injection pretreatment. The relaxed measurement demonstrates a single capacitance signature while two capacitance signatures are observed for the devicemore » measured following carrier-injection. The deeper level signature, typically reported for kesterites, is activated by charge trapping following carrier injection. Both signatures are attributed to bulk level defects. The significant metastable response observed on kesterites due to charge trapping obscures accurate interpretation of defect levels from admittance spectroscopy and indicates that great care must be taken when performing and interpreting this measurement on non-ideal devices.« less

Multi-junction, monolithic solar cell using low-band-gap materials lattice matched to GaAs or Ge

DOEpatents

Olson, Jerry M.; Kurtz, Sarah R.; Friedman, Daniel J.

2001-01-01

A multi-junction, monolithic, photovoltaic solar cell device is provided for converting solar radiation to photocurrent and photovoltage with improved efficiency. The solar cell device comprises a plurality of semiconductor cells, i.e., active p/n junctions, connected in tandem and deposited on a substrate fabricated from GaAs or Ge. To increase efficiency, each semiconductor cell is fabricated from a crystalline material with a lattice constant substantially equivalent to the lattice constant of the substrate material. Additionally, the semiconductor cells are selected with appropriate band gaps to efficiently create photovoltage from a larger portion of the solar spectrum. In this regard, one semiconductor cell in each embodiment of the solar cell device has a band gap between that of Ge and GaAs. To achieve desired band gaps and lattice constants, the semiconductor cells may be fabricated from a number of materials including Ge, GaInP, GaAs, GaInAsP, GaInAsN, GaAsGe, BGaInAs, (GaAs)Ge, CuInSSe, CuAsSSe, and GaInAsNP. To further increase efficiency, the thickness of each semiconductor cell is controlled to match the photocurrent generated in each cell. To facilitate photocurrent flow, a plurality of tunnel junctions of low-resistivity material are included between each adjacent semiconductor cell. The conductivity or direction of photocurrent in the solar cell device may be selected by controlling the specific p-type or n-type characteristics for each active junction.

Imaging the motion of electrons in 2D semiconductor heterostructures

NASA Astrophysics Data System (ADS)

Dani, Keshav

Technological progress since the late 20th century has centered on semiconductor devices, such as transistors, diodes, and solar cells. At the heart of these devices, is the internal motion of electrons through semiconductor materials due to applied electric fields or by the excitation of photocarriers. Imaging the motion of these electrons would provide unprecedented insight into this important phenomenon, but requires high spatial and temporal resolution. Current studies of electron dynamics in semiconductors are generally limited by the spatial resolution of optical probes, or by the temporal resolution of electronic probes. In this talk, we combine femtosecond pump-probe techniques with spectroscopic photoemission electron microscopy to image the motion of photoexcited electrons from high-energy to low-energy states in a 2D InSe/GaAs heterostructure exhibiting a type-II band alignment. At the instant of photoexcitation, energy-resolved photoelectron images reveal a highly non-equilibrium distribution of photocarriers in space and energy. Thereafter, in response to the out-of-equilibrium photocarriers, we observe the spatial redistribution of charges, thus forming internal electric fields, bending the semiconductor bands, and finally impeding further charge transfer. By assembling images taken at different time-delays, we make a movie lasting a few tens of picoseconds of the electron transfer process in the photoexcited type-II heterostructure - a fundamental phenomenon in semiconductor devices like solar cells. Quantitative analysis and theoretical modeling of spatial variations in the video provide insight into future solar cells, electron dynamics in 2D materials, and other semiconductor devices.

Imaging the motion of electrons across semiconductor heterojunctions.

PubMed

Man, Michael K L; Margiolakis, Athanasios; Deckoff-Jones, Skylar; Harada, Takaaki; Wong, E Laine; Krishna, M Bala Murali; Madéo, Julien; Winchester, Andrew; Lei, Sidong; Vajtai, Robert; Ajayan, Pulickel M; Dani, Keshav M

2017-01-01

Technological progress since the late twentieth century has centred on semiconductor devices, such as transistors, diodes and solar cells. At the heart of these devices is the internal motion of electrons through semiconductor materials due to applied electric fields or by the excitation of photocarriers. Imaging the motion of these electrons would provide unprecedented insight into this important phenomenon, but requires high spatial and temporal resolution. Current studies of electron dynamics in semiconductors are generally limited by the spatial resolution of optical probes, or by the temporal resolution of electronic probes. Here, by combining femtosecond pump-probe techniques with spectroscopic photoemission electron microscopy, we imaged the motion of photoexcited electrons from high-energy to low-energy states in a type-II 2D InSe/GaAs heterostructure. At the instant of photoexcitation, energy-resolved photoelectron images revealed a highly non-equilibrium distribution of photocarriers in space and energy. Thereafter, in response to the out-of-equilibrium photocarriers, we observed the spatial redistribution of charges, thus forming internal electric fields, bending the semiconductor bands, and finally impeding further charge transfer. By assembling images taken at different time-delays, we produced a movie lasting a few trillionths of a second of the electron-transfer process in the photoexcited type-II heterostructure-a fundamental phenomenon in semiconductor devices such as solar cells. Quantitative analysis and theoretical modelling of spatial variations in the movie provide insight into future solar cells, 2D materials and other semiconductor devices.

Imaging the motion of electrons across semiconductor heterojunctions

NASA Astrophysics Data System (ADS)

Man, Michael K. L.; Margiolakis, Athanasios; Deckoff-Jones, Skylar; Harada, Takaaki; Wong, E. Laine; Krishna, M. Bala Murali; Madéo, Julien; Winchester, Andrew; Lei, Sidong; Vajtai, Robert; Ajayan, Pulickel M.; Dani, Keshav M.

2017-01-01

Technological progress since the late twentieth century has centred on semiconductor devices, such as transistors, diodes and solar cells. At the heart of these devices is the internal motion of electrons through semiconductor materials due to applied electric fields or by the excitation of photocarriers. Imaging the motion of these electrons would provide unprecedented insight into this important phenomenon, but requires high spatial and temporal resolution. Current studies of electron dynamics in semiconductors are generally limited by the spatial resolution of optical probes, or by the temporal resolution of electronic probes. Here, by combining femtosecond pump-probe techniques with spectroscopic photoemission electron microscopy, we imaged the motion of photoexcited electrons from high-energy to low-energy states in a type-II 2D InSe/GaAs heterostructure. At the instant of photoexcitation, energy-resolved photoelectron images revealed a highly non-equilibrium distribution of photocarriers in space and energy. Thereafter, in response to the out-of-equilibrium photocarriers, we observed the spatial redistribution of charges, thus forming internal electric fields, bending the semiconductor bands, and finally impeding further charge transfer. By assembling images taken at different time-delays, we produced a movie lasting a few trillionths of a second of the electron-transfer process in the photoexcited type-II heterostructure—a fundamental phenomenon in semiconductor devices such as solar cells. Quantitative analysis and theoretical modelling of spatial variations in the movie provide insight into future solar cells, 2D materials and other semiconductor devices.

Stroboscopic Imaging Interferometer for MEMS Performance Measurement

DTIC Science & Technology

2007-07-15

Optical Iocusing L.aser Fiber Optics I) c 0 Mim er Collimator - C d Microcope lcam. indo Cold Objcclive Splitte FingerCCD "Mount irnro MEMS PicL zStack...Electronics and Photonics Laboratory: Microelectronics, VLSI reliability, failure analysis, solid-state device physics, compound semiconductors

Ferroelectrics for semiconductor devices

NASA Astrophysics Data System (ADS)

Sayer, M.; Wu, Z.; Vasant Kumar, C. V. R.; Amm, D. T.; Griswold, E. M.

1992-11-01

The technology for the implementation of the integration of thin film ferroelectrics with silicon processing for various devices is described, and factors affecting the integration of ferroelectric films with semiconductor processing are discussed. Consideration is also given to film properties, the properties of electrode materials and structures, and the phenomena of ferroelectric fatigue and aging. Particular attention is given to the nonmemory device application of ferroelectrics.

Optical devices integrated with semiconductor optical amplifier

NASA Astrophysics Data System (ADS)

Oh, Kwang R.; Park, Moon S.; Jeong, Jong S.; Baek, Yongsoon; Oh, Dae-Kon

2000-07-01

Semiconductor optical amplifiers (SOA's) have been used as a key optical component for the high capacity communication systems. The monolithic integration is necessary for the stable operation of these devices and the wider applications. In this paper, the coupling technique between different waveguides and the integration of SSC's are discussed and the research results of optical devices integrated with SOA's are presented.

Sputtered pin amorphous silicon semi-conductor device and method therefor

DOEpatents

Moustakas, Theodore D.; Friedman, Robert A.

1983-11-22

A high efficiency amorphous silicon PIN semi-conductor device is constructed by the sequential sputtering of N, I and P layers of amorphous silicon and at least one semi-transparent ohmic electrode. A method of construction produces a PIN device, exhibiting enhanced physical integrity and facilitates ease of construction in a singular vacuum system and vacuum pump down procedure.

Modeling of Quantum Transport in Semiconductor Devices (The Physics and Operation of Ultra-Submicron Length Semiconductor Devices).

DTIC Science & Technology

1994-05-01

Open Systems and Contacts ...................... 16 A Ballistic Transport .......................... 17 B Role of the Boundaries and Contacts...15 Other Devices ................................ 90 V Modeling with the Green’s Functions 91 16 Homogeneous, Low-Field Systems .................. 93 A...The Retarded Function ..................... 95 B The "Less-Than" Function ................... 99 17 Homogeneous, High-Field Systems

Semiconductor crystal high resolution imager

NASA Technical Reports Server (NTRS)

Matteson, James (Inventor); Levin, Craig S. (Inventor)

2011-01-01

A radiation imaging device (10). The radiation image device (10) comprises a subject radiation station (12) producing photon emissions (14), and at least one semiconductor crystal detector (16) arranged in an edge-on orientation with respect to the emitted photons (14) to directly receive the emitted photons (14) and produce a signal. The semiconductor crystal detector (16) comprises at least one anode and at least one cathode that produces the signal in response to the emitted photons (14).

Semiconductor/High-Tc-Superconductor Hybrid ICs

NASA Technical Reports Server (NTRS)

Burns, Michael J.

1995-01-01

Hybrid integrated circuits (ICs) containing both Si-based semiconducting and YBa(2)Cu(3)O(7-x) superconducting circuit elements on sapphire substrates developed. Help to prevent diffusion of Cu from superconductors into semiconductors. These hybrid ICs combine superconducting and semiconducting features unavailable in superconducting or semiconducting circuitry alone. For example, complementary metal oxide/semiconductor (CMOS) readout and memory devices integrated with fast-switching Josephson-junction super-conducting logic devices and zero-resistance interconnections.

Optical devices featuring nonpolar textured semiconductor layers

DOEpatents

Moustakas, Theodore D; Moldawer, Adam; Bhattacharyya, Anirban; Abell, Joshua

2013-11-26

A semiconductor emitter, or precursor therefor, has a substrate and one or more textured semiconductor layers deposited onto the substrate in a nonpolar orientation. The textured layers enhance light extraction, and the use of nonpolar orientation greatly enhances internal quantum efficiency compared to conventional devices. Both the internal and external quantum efficiencies of emitters of the invention can be 70-80% or higher. The invention provides highly efficient light emitting diodes suitable for solid state lighting.

Coupled optical and electrical study of thin-film InGaAs photodetector integrated with surface InP Mie resonators

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fu, Dong; Song, Jiakun; Yu, Hailong

2016-03-14

High-index dielectric and semiconductor nanostructures with characteristics of low absorption loss and artificially controlled scattering properties have grasped an increasing attention for improving the performance of thin-film photovoltaic devices. In this work, combined optical and electrical simulations were performed for thin-film InP/In{sub 0.53}Ga{sub 0.47}As/InP hetero-junction photodetector with periodically arranged InP nano-cylinders in the in-coupling configuration. It is found that the carefully designed InP nano-cylinders possess strongly substrate-coupled Mie resonances and can effectively couple incident light into the guided mode, both of which significantly increase optical absorption. Further study from the electrical aspects shows that enhancement of external quantum efficiency ismore » as high as 82% and 83% in the configurations with the optimized nano-cylinders and the optimized period, respectively. Moreover, we demonstrate that the integration of InP nano-cylinders does not degrade the electrical performance, since the surface recombination is effectively suppressed by separating the absorber layer where carriers generate and the air/semiconductor interface. The comprehensive modeling including optical and electrical perspectives provides a more practical description for device performance than the optical-only simulation and is expected to advance the design of thin-film absorber layer based optoelectronic devices for fast response and high efficiency.« less

A microprocessor based on a two-dimensional semiconductor

PubMed Central

Wachter, Stefan; Polyushkin, Dmitry K.; Bethge, Ole; Mueller, Thomas

2017-01-01

The advent of microcomputers in the 1970s has dramatically changed our society. Since then, microprocessors have been made almost exclusively from silicon, but the ever-increasing demand for higher integration density and speed, lower power consumption and better integrability with everyday goods has prompted the search for alternatives. Germanium and III–V compound semiconductors are being considered promising candidates for future high-performance processor generations and chips based on thin-film plastic technology or carbon nanotubes could allow for embedding electronic intelligence into arbitrary objects for the Internet-of-Things. Here, we present a 1-bit implementation of a microprocessor using a two-dimensional semiconductor—molybdenum disulfide. The device can execute user-defined programs stored in an external memory, perform logical operations and communicate with its periphery. Our 1-bit design is readily scalable to multi-bit data. The device consists of 115 transistors and constitutes the most complex circuitry so far made from a two-dimensional material. PMID:28398336

Measuring the complete cross-cell carrier mobility distributions in bulk heterojunction solar cells

NASA Astrophysics Data System (ADS)

Seifter, Jason; Sun, Yanming; Choi, Hyosung; Lee, Byoung Hoon; Heeger, Alan

2015-03-01

Carbon nanotube-enabled, vertical, organic field effect transistors (CN-VFETs) based on the small molecule dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT) have demonstrated high current, low-power operation suitable for driving active matix organic light emitting diode (AMOLED) displays. This performance is achieved without the need for costly high-resolution patterning, despite the low mobility of the organic semiconductor, by employing sub-micron channel widths, defined in the vertical devices by the thickness of the semiconducting layer. Replacing the thermally evaporated small molecule semiconductor with a solution-processed polymer would possibly further simplify the fabrication process and reduce manufacturing cost. Here we investigate several polymer systems as wide bandgap semiconducting channel layers for potentially air stable and transparent CN-VFETs. The field effect mobility and optical transparency of the polymer layers are determined, and the performance and air stability of CN-VFET devices are measured. A. S. gratefully acknowledges support from the National Science Foundation under DMR-1156737.

Graphene/h-BN/GaAs sandwich diode as solar cell and photodetector.

PubMed

Li, Xiaoqiang; Lin, Shisheng; Lin, Xing; Xu, Zhijuan; Wang, Peng; Zhang, Shengjiao; Zhong, Huikai; Xu, Wenli; Wu, Zhiqian; Fang, Wei

2016-01-11

In graphene/semiconductor heterojunction, the statistic charge transfer between graphene and semiconductor leads to decreased junction barrier height and limits the Fermi level tuning effect in graphene, which greatly affects the final performance of the device. In this work, we have designed a sandwich diode for solar cells and photodetectors through inserting 2D hexagonal boron nitride (h-BN) into graphene/GaAs heterostructure to suppress the static charge transfer. The barrier height of graphene/GaAs heterojunction can be increased from 0.88 eV to 1.02 eV by inserting h-BN. Based on the enhanced Fermi level tuning effect with interface h-BN, through adopting photo-induced doping into the device, power conversion efficiency (PCE) of 10.18% has been achieved for graphene/h-BN/GaAs compared with 8.63% of graphene/GaAs structure. The performance of graphene/h-BN/GaAs based photodetector is also improved with on/off ratio increased by one magnitude compared with graphene/GaAs structure.

Fabrication of eco-friendly PNP transistor using RF magnetron sputtering

NASA Astrophysics Data System (ADS)

Kumar, B. Santhosh; Harinee, N.; Purvaja, K.; Shanker, N. Praveen; Manikandan, M.; Aparnadevi, N.; Mukilraj, T.; Venkateswaran, C.

2018-05-01

An effort has been made to fabricate a thin film transistor using eco-friendly oxide semiconductor materials. Oxide semiconductor materials are cost - effective, thermally and chemically stable with high electron/hole mobility. Copper (II) oxide is a p-type semiconductor and zinc oxide is an n-type semiconductor. A pnp thin film transistor was fabricated using RF magnetron sputtering. The films deposited have been subjected to structural characterization using AFM. I-V characterization of the fabricated device, Ag/CuO/ZnO/CuO/Ag, confirms transistor behaviour. The mechanism of electron/hole transport of the device is discussed below.

Noise And Charge Transport In Carbon Nanotube Devices

NASA Astrophysics Data System (ADS)

Reza, Shahed; Huynh, Quyen T.; Bosman, Gijs; Sippel, Jennifer; Rinzler, Andrew G.

2005-11-01

The charge transport and noise properties of three terminal, gated devices containing multiple, single wall, metallic and semiconductor carbon nanotubes have been measured as a function of gate and drain bias at 300K. Using pulsed bias the metallic tubes could be burned sequentially enabling the separation of measured conductance and low frequency excess noise into metallic and semiconductor contributions. The relative low frequency excess noise of the metallic tubes was about a factor 100 lower than that of the semiconductor tubes, whereas the conductance of the metallic tubes was significantly higher (10 to 50 times) than that of the semiconductor tubes.

Gate bias stress in pentacene field-effect-transistors: Charge trapping in the dielectric or semiconductor

NASA Astrophysics Data System (ADS)

Häusermann, R.; Batlogg, B.

2011-08-01

Gate bias stress instability in organic field-effect transistors (OFETs) is a major conceptual and device issue. This effect manifests itself by an undesirable shift of the transfer characteristics and is associated with long term charge trapping. We study the role of the dielectric and the semiconductor separately by producing OFETs with the same semiconductor (pentacene) combined with different dielectrics (SiO2 and Cytop). We show that it is possible to fabricate devices which are immune to gate bias stress. For other material combinations, charge trapping occurs in the semiconductor alone or in the dielectric.

Cameras for semiconductor process control

NASA Technical Reports Server (NTRS)

Porter, W. A.; Parker, D. L.

1977-01-01

The application of X-ray topography to semiconductor process control is described, considering the novel features of the high speed camera and the difficulties associated with this technique. The most significant results on the effects of material defects on device performance are presented, including results obtained using wafers processed entirely within this institute. Defects were identified using the X-ray camera and correlations made with probe data. Also included are temperature dependent effects of material defects. Recent applications and improvements of X-ray topographs of silicon-on-sapphire and gallium arsenide are presented with a description of a real time TV system prototype and of the most recent vacuum chuck design. Discussion is included of our promotion of the use of the camera by various semiconductor manufacturers.

Large current modulation and tunneling magnetoresistance change by a side-gate electric field in a GaMnAs-based vertical spin metal-oxide-semiconductor field-effect transistor.

PubMed

Kanaki, Toshiki; Yamasaki, Hiroki; Koyama, Tomohiro; Chiba, Daichi; Ohya, Shinobu; Tanaka, Masaaki

2018-05-08

A vertical spin metal-oxide-semiconductor field-effect transistor (spin MOSFET) is a promising low-power device for the post scaling era. Here, using a ferromagnetic-semiconductor GaMnAs-based vertical spin MOSFET with a GaAs channel layer, we demonstrate a large drain-source current I DS modulation by a gate-source voltage V GS with a modulation ratio up to 130%, which is the largest value that has ever been reported for vertical spin field-effect transistors thus far. We find that the electric field effect on indirect tunneling via defect states in the GaAs channel layer is responsible for the large I DS modulation. This device shows a tunneling magnetoresistance (TMR) ratio up to ~7%, which is larger than that of the planar-type spin MOSFETs, indicating that I DS can be controlled by the magnetization configuration. Furthermore, we find that the TMR ratio can be modulated by V GS . This result mainly originates from the electric field modulation of the magnetic anisotropy of the GaMnAs ferromagnetic electrodes as well as the potential modulation of the nonmagnetic semiconductor GaAs channel layer. Our findings provide important progress towards high-performance vertical spin MOSFETs.

Interface Energetics and Chemical Doping of Organic Electronic Materials

NASA Astrophysics Data System (ADS)

Kahn, Antoine

2014-03-01

The energetics of organic semiconductors and their interfaces are central to the performance of organic thin film devices. The relative positions of charge transport states across the many interfaces of multi-layer OLEDs, OPV cells and OFETs determine in great part the efficiency and lifetime of these devices. New experiments are presented here, that look in detail at the position of these transport states and associated gap states and electronic traps that tail into the energy gap of organic molecular (e.g. pentacene) or polymer (P3HT, PBDTTT-C) semiconductors, and which directly affect carrier mobility in these materials. Disorder, sometime caused by simple exposure to an inert gas, impurities and defects are at the origin of these electronic gap states. Recent efforts in chemical doping in organic semiconductors aimed at mitigating the impact of electronic gap states are described. An overview of the reducing or oxidizing power of several n- and p-type dopants for vacuum- or solution-processed films, and their effect on the electronic structure and conductivity of both vacuum- and solution-processed organic semiconductor films is given. Finally, the filling (compensation) of active gap states via doping is investigated on the electron-transport materials C60 and P(NDI2OD-T2) , and the hole-transport polymer PBDTTT-C.

Preparation of anatase TiO2 nanoparticles using low hydrothermal temperature for dye-sensitized solar cell

NASA Astrophysics Data System (ADS)

Sofyan, N.; Ridhova, A.; Yuwono, A. H.; Udhiarto, A.

2018-03-01

One device being developed as an alternative source of renewable energy by utilizing solar energy source is dye-sensitized solar cells (DSSC). This device works using simple photosynthetic-electrochemical principle in the molecular level. In this device, the inorganic oxide semiconductor of titanium dioxide (TiO2) has a great potential for the absorption of the photon energy from the solar energy source, especially in the form of TiO2 nanoparticle structure. This nanoparticle structure is expected to improve the performance of DSSC because the surface area to weight ratio of this nanostructures is very large. In this study, the synthesis of TiO2 nanoparticle from its precursors has been performed along with the fabrication of the DSSC device. Effort to improve the size of nanocrystalline anatase TiO2 was accomplished by low hydrothermal treatment at various temperatures whereas the crystallinity of the anatase phase in the structure was performed by calcination process. Characterization of the materials was performed using X-ray Diffraction (XRD) and scanning electron microscope (SEM), while the DSSC performance was examined through a high precision current versus voltage (I-V) curve analyzer. The results showed that pure anatase TiO2 nanoparticles could be obtained at low hydrothermal of 100, 125, and 150 °C followed by calcination at 450 °C. The best performance of photocurrent-voltage characteristic was given by TiO2 hydrothermally synthesized at 150 °C with power conversion efficiency (PCE) of 4.40 %, whereas the standard TiO2 nanoparticles has PCE only 4.02 %. This result is very promising in terms low temperature and thus low cost of anatase TiO2 semiconductor preparation for DSSC application.

Ultraviolet light emitting diodes and bio-aerosol sensing

NASA Astrophysics Data System (ADS)

Davitt, Kristina M.

Recent interest in compact ultraviolet (UV) light emitters has produced advances in material quality and device performance from aluminum-rich alloys of the nitride semiconductor system. The epitaxial growth of device structures from this material poses remarkable challenges, and state-of-the-art in semiconductor UV light sources at wavelengths shorter than 350 nm is currently limited to LEDs. A portion of the work presented in this thesis involves the design and characterization of UV LED structures, with particular focus on sub-300 nm LEDs which have only been demonstrated within the last four years. Emphasis has been placed on the integration of early devices with modest efficiencies and output powers into a practical, fluorescence-based bio-sensing instrument. The quality of AlGaInN and AlGaN-based materials is characterized by way of the performance of 340 nm and 290 nm LEDs respectively. A competitive level of device operation is achieved, although much room remains for improvement in the efficiency of light emission from this material system. A preliminary investigation of 300 nm LEDs grown on bulk AIN shows promising electrical and optical characteristics, and illustrates the numerous advantages that this native substrate offers to the epitaxy of wide bandgap nitride semiconductors. The application of UV LEDs to the field of bio-aerosol sensing is pursued by constructing an on-the-fly fluorescence detection system. A linear array of UV LEDs is designed and implemented, and the capability of test devices to excite native fluorescence from bacterial spores is established. In order to fully capitalize on the reduction in size afforded by LEDs, effort is invested in re-engineering the remaining sensor components. Operation of a prototype system for physically sorting bio-aerosols based on fluorescence spectra acquired in real-time from single airborne particles excited by a UV-LED array is demonstrated using the bio-fluorophores NADH and tryptophan. Sensor performance is shown to be ultimately linked to the material quality of high aluminum fraction nitrides, and is expected to show progress as this field matures.

Direct Effect of Dielectric Surface Energy on Carrier Transport in Organic Field-Effect Transistors.

PubMed

Zhou, Shujun; Tang, Qingxin; Tian, Hongkun; Zhao, Xiaoli; Tong, Yanhong; Barlow, Stephen; Marder, Seth R; Liu, Yichun

2018-05-09

The understanding of the characteristics of gate dielectric that leads to optimized carrier transport remains controversial, and the conventional studies applied organic semiconductor thin films, which introduces the effect of dielectric on the growth of the deposited semiconductor thin films and hence only can explore the indirect effects. Here, we introduce pregrown organic single crystals to eliminate the indirect effect (semiconductor growth) in the conventional studies and to undertake an investigation of the direct effect of dielectric on carrier transport. It is shown that the matching of the polar and dispersive components of surface energy between semiconductor and dielectric is favorable for higher mobility. This new empirical finding may show the direct relationship between dielectric and carrier transport for the optimized mobility of organic field-effect transistors and hence show a promising potential for the development of next-generation high-performance organic electronic devices.

Semiconductor-Based Photoelectrochemical Conversion of Carbon Dioxide: Stepping Towards Artificial Photosynthesis.

PubMed

Pang, Hong; Masuda, Takuya; Ye, Jinhua

2018-01-18

The photoelectrochemical (PEC) carbon dioxide reduction process stands out as a promising avenue for the conversion of solar energy into chemical feedstocks, among various methods available for carbon dioxide mitigation. Semiconductors derived from cheap and abundant elements are interesting candidates for catalysis. Whether employed as intrinsic semiconductors or hybridized with metallic cocatalysts, biocatalysts, and metal molecular complexes, semiconductor photocathodes exhibit good performance and low overpotential during carbon dioxide reduction. Apart from focusing on carbon dioxide reduction materials and chemistry, PEC cells towards standalone devices that use photohybrid electrodes or solar cells have also been a hot topic in recent research. An overview of the state-of-the-art progress in PEC carbon dioxide reduction is presented and a deep understanding of the catalysts of carbon dioxide reduction is also given. © 2018 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

Organic semiconductor density of states controls the energy level alignment at electrode interfaces

PubMed Central

Oehzelt, Martin; Koch, Norbert; Heimel, Georg

2014-01-01

Minimizing charge carrier injection barriers and extraction losses at interfaces between organic semiconductors and metallic electrodes is critical for optimizing the performance of organic (opto-) electronic devices. Here, we implement a detailed electrostatic model, capable of reproducing the alignment between the electrode Fermi energy and the transport states in the organic semiconductor both qualitatively and quantitatively. Covering the full phenomenological range of interfacial energy level alignment regimes within a single, consistent framework and continuously connecting the limiting cases described by previously proposed models allows us to resolve conflicting views in the literature. Our results highlight the density of states in the organic semiconductor as a key factor. Its shape and, in particular, the energy distribution of electronic states tailing into the fundamental gap is found to determine both the minimum value of practically achievable injection barriers as well as their spatial profile, ranging from abrupt interface dipoles to extended band-bending regions. PMID:24938867

α,ω-dihexyl-sexithiophene thin films for solution-gated organic field-effect transistors

NASA Astrophysics Data System (ADS)

Schamoni, Hannah; Noever, Simon; Nickel, Bert; Stutzmann, Martin; Garrido, Jose A.

2016-02-01

While organic semiconductors are being widely investigated for chemical and biochemical sensing applications, major drawbacks such as the poor device stability and low charge carrier mobility in aqueous electrolytes have not yet been solved to complete satisfaction. In this work, solution-gated organic field-effect transistors (SGOFETs) based on the molecule α,ω-dihexyl-sexithiophene (DH6T) are presented as promising platforms for in-electrolyte sensing. Thin films of DH6T were investigated with regard to the influence of the substrate temperature during deposition on the grain size and structural order. The performance of SGOFETs can be improved by choosing suitable growth parameters that lead to a two-dimensional film morphology and a high degree of structural order. Furthermore, the capability of the SGOFETs to detect changes in the pH or ionic strength of the gate electrolyte is demonstrated and simulated. Finally, excellent transistor stability is confirmed by continuously operating the device over a period of several days, which is a consequence of the low threshold voltage of DH6T-based SGOFETs. Altogether, our results demonstrate the feasibility of high performance and highly stable organic semiconductor devices for chemical or biochemical applications.

First-principles study of the effects of Silicon doping on the Schottky barrier of TiSi2/Si interfaces

NASA Astrophysics Data System (ADS)

Wang, Han; Silva, Eduardo; West, Damien; Sun, Yiyang; Restrepo, Oscar; Zhang, Shengbai; Kota, Murali

As scaling of semiconductor devices is pursued in order to improve power efficiency, quantum effects due to the reduced dimensions on devices have become dominant factors in power, performance, and area scaling. In particular, source/drain contact resistance has become a limiting factor in the overall device power efficiency and performance. As a consequence, techniques such as heavy doping of source and drain have been explored to reduce the contact resistance, thereby shrinking the width of depletion region and lowering the Schottky barrier height. In this work, we study the relation between doping in Silicon and the Schottky barrier of a TiSi2/Si interface with first-principles calculation. Virtual Crystal Approximation (VCA) is used to calculate the average potential of the interface with varying doping concentration, while the I-V curve for the corresponding interface is calculated with a generalized one-dimensional transfer matrix method. The relation between substitutional and interstitial Boron and Phosphorus dopant near the interface, and their effect on tuning the Schottky barrier is studied. These studies provide insight to the type of doping and the effect of dopant segregation to optimize metal-semiconductor interface resistance.

Investigation of electronic noise in selected mesoscopic devices

NASA Astrophysics Data System (ADS)

Camino, Fernando Enrique

In the last few years, several experiments and theoretical works have confirmed the importance of shot-noise measurements as a source of information about the charge transport in electronic devices, information that is not in all cases accessible from conductance measurements. The use of shot-noise for the direct confirmation of the fractional charge in the fractional quantum Hall effect or the identification of the transport mechanism in negative differential resistance devices are a few examples of its importance. In this thesis, we have performed shot-noise measurements on two semiconductor-based systems in which shot noise is different from the Poissonian value 2eI The first one is a superconductor/semiconductor/superconductor (sp/sm/sp) junction where the superconducting electrodes are 0.5 um apart and the semiconductor bridge between them is composed of a two-dimensional electron gas (2-DEG). The second system is a 2-DEG in the hopping conduction regime. The fabrication of sp/sm/sp junctions is explained in detail in this work as so are the noise measurements of two devices that show enhancement from the Poissonian value. These devices present the signatures of the phenomenon of Andreev reflections and supercurrent at 1.2K; therefore, we tentatively attribute the enhancement to this phenomenon, which has been predicted to give giant noise enhancement for superconducting quantum point contacts (SQPC). On the other hand, in the hoping conduction device, we have observed shot-noise suppression from its classical value, confirming in a different material system a previous experimental result that was explained by percolation theory. In addition, we have driven the system to a region where percolation theory seems to fail, signaling a reconstruction of the hopping trajectories.

Emission factors of air toxics from semiconductor manufacturing in Korea.

PubMed

Eom, Yun-Sung; Hong, Ji-Hyung; Lee, Suk-Jo; Lee, Eun-Jung; Cha, Jun-Seok; Lee, Dae-Gyun; Bang, Sun-Ae

2006-11-01

The development of local, accurate emission factors is very important for the estimation of reliable national emissions and air quality management. For that, this study is performed for pollutants released to the atmosphere with source-specific emission tests from the semiconductor manufacturing industry. The semiconductor manufacturing industry is one of the major sources of air toxics or hazardous air pollutants (HAPs); thus, understanding the emission characteristics of the emission source is a very important factor in the development of a control strategy. However, in Korea, there is a general lack of information available on air emissions from the semiconductor industry. The major emission sources of air toxics examined from the semiconductor manufacturing industry were wet chemical stations, coating applications, gaseous operations, photolithography, and miscellaneous devices in the wafer fabrication and semiconductor packaging processes. In this study, analyses of emission characteristics, and the estimations of emission data and factors for air toxics, such as acids, bases, heavy metals, and volatile organic compounds from the semiconductor manufacturing process have been performed. The concentration of hydrogen chloride from the packaging process was the highest among all of the processes. In addition, the emission factor of total volatile organic compounds (TVOCs) for the packaging process was higher than that of the wafer fabrication process. Emission factors estimated in this study were compared with those of Taiwan for evaluation, and they were found to be of similar level in the case of TVOCs and fluorine compounds.

Vertical power MOS transistor as a thermoelectric quasi-nanowire device

NASA Astrophysics Data System (ADS)

Roizin, Gregory; Beeri, Ofer; Peretz, Mor Mordechai; Gelbstein, Yaniv

2016-12-01

Nano-materials exhibit superior performance over bulk materials in a variety of applications such as direct heat to electricity thermoelectric generators (TEGs) and many more. However, a gap still exists for the integration of these nano-materials into practical applications. This study explores the feasibility of utilizing the advantages of nano-materials' thermo-electric properties, using regular bulk technology. Present-day TEGs are often applied by dedicated thermoelectric materials such as semiconductor alloys (e.g., PbTe, BiTe) whereas the standard semiconductor materials such as the doped silicon have not been widely addressed, with limited exceptions of nanowires. This study attempts to close the gap between the nano-materials' properties and the well-established bulk devices, approached for the first time by exploiting the nano-metric dimensions of the conductive channel in metal-oxide-semiconductor (MOS) structures. A significantly higher electrical current than expected from a bulk silicon device has been experimentally measured as a result of the application of a positive gate voltage and a temperature gradient between the "source" and the "drain" terminals of a commercial NMOS transistor. This finding implies on a "quasi-nanowire" behaviour of the transistor channel, which can be easily controlled by the transistor's gate voltage that is applied. This phenomenon enables a considerable improvement of silicon based TEGs, fabricated by traditional silicon technology. Four times higher ZT values (TEG quality factor) compared to conventional bulk silicon have been observed for an off-the-shelf silicon device. By optimizing the device, it is believed that even higher ZT values can be achieved.

Enhanced photoconductivity by melt quenching method for amorphous organic photorefractive materials

NASA Astrophysics Data System (ADS)

Tsujimura, S.; Fujihara, T.; Sassa, T.; Kinashi, K.; Sakai, W.; Ishibashi, K.; Tsutsumi, N.

2014-10-01

For many optical semiconductor fields of study, the high photoconductivity of amorphous organic semiconductors has strongly been desired, because they make the manufacture of high-performance devices easy when controlling charge carrier transport and trapping is otherwise difficult. This study focuses on the correlation between photoconductivity and bulk state in amorphous organic photorefractive materials to probe the nature of the performance of photoconductivity and to enhance the response time and diffraction efficiency of photorefractivity. The general cooling processes of the quenching method achieved enhanced photoconductivity and a decreased filling rate for shallow traps. Therefore, sample processing, which was quenching in the present case, for photorefractive composites significantly relates to enhanced photorefractivity.

Outline and comparison of the possible effects present in a metal-thin-film-insulator-semiconductor solar cell

NASA Technical Reports Server (NTRS)

Fonash, S. J.

1976-01-01

The advantages possible with the insertion of a thin-film insulating or semi-insulating layer between a metal and a semiconductor to form the MIS photovoltaic device have been presented previously in the literature. This MIS configuration may be considered as a specific example of a more general class of photovoltaic devices: electrode-thin-film-insulator-semiconductor devices. Since the advantages of the configuration were pointed out, there has been considerable experimental interest in these photovoltaic devices. Because the previous analysis showed that the introduction of the insulator layer could produce several different but advantageous effects, this paper presents a further outline giving a comparison of these effects together with their ramifications.

Flexible non-volatile memory devices based on organic semiconductors

NASA Astrophysics Data System (ADS)

Cosseddu, Piero; Casula, Giulia; Lai, Stefano; Bonfiglio, Annalisa

2015-09-01

The possibility of developing fully organic electronic circuits is critically dependent on the ability to realize a full set of electronic functionalities based on organic devices. In order to complete the scene, a fundamental element is still missing, i.e. reliable data storage. Over the past few years, a considerable effort has been spent on the development and optimization of organic polymer based memory elements. Among several possible solutions, transistor-based memories and resistive switching-based memories are attracting a great interest in the scientific community. In this paper, a route for the fabrication of organic semiconductor-based memory devices with performances beyond the state of the art is reported. Both the families of organic memories will be considered. A flexible resistive memory based on a novel combination of materials is presented. In particular, high retention time in ambient conditions are reported. Complementary, a low voltage transistor-based memory is presented. Low voltage operation is allowed by an hybrid, nano-sized dielectric, which is also responsible for the memory effect in the device. Thanks to the possibility of reproducibly fabricating such device on ultra-thin substrates, high mechanical stability is reported.

Large-Area CVD-Grown Sub-2 V ReS2 Transistors and Logic Gates.

PubMed

Dathbun, Ajjiporn; Kim, Youngchan; Kim, Seongchan; Yoo, Youngjae; Kang, Moon Sung; Lee, Changgu; Cho, Jeong Ho

2017-05-10

We demonstrated the fabrication of large-area ReS 2 transistors and logic gates composed of a chemical vapor deposition (CVD)-grown multilayer ReS 2 semiconductor channel and graphene electrodes. Single-layer graphene was used as the source/drain and coplanar gate electrodes. An ion gel with an ultrahigh capacitance effectively gated the ReS 2 channel at a low voltage, below 2 V, through a coplanar gate. The contact resistance of the ion gel-gated ReS 2 transistors with graphene electrodes decreased dramatically compared with the SiO 2 -devices prepared with Cr electrodes. The resulting transistors exhibited good device performances, including a maximum electron mobility of 0.9 cm 2 /(V s) and an on/off current ratio exceeding 10 4 . NMOS logic devices, such as NOT, NAND, and NOR gates, were assembled using the resulting transistors as a proof of concept demonstration of the applicability of the devices to complex logic circuits. The large-area synthesis of ReS 2 semiconductors and graphene electrodes and their applications in logic devices open up new opportunities for realizing future flexible electronics based on 2D nanomaterials.

Contact engineering for efficient charge injection in organic transistors with low-cost metal electrodes

NASA Astrophysics Data System (ADS)

Panigrahi, D.; Kumar, S.; Dhar, A.

2017-10-01

Controlling charge injection at the metal-semiconductor interface is very crucial for organic electronic devices in general as it can significantly influence the overall device performance. Herein, we report a facile, yet efficient contact modification approach, to enhance the hole injection efficiency through the incorporation of a high vacuum deposited TPD [N,N'-Bis(3-methylphenyl)-N,N'-diphenylbenzidine] interlayer between the electrodes and the active semiconducting layer. The device performance parameters such as mobility and on/off ratio improved significantly after the inclusion of the TPD buffer layer, and more interestingly, the devices with cost effective Ag and Cu electrodes were able to exhibit a superior device performance than the typically used Au source-drain devices. We have also observed that this contact modification technique can be even more effective than commonly used metal oxide interface modifying layers. Our investigations demonstrate the efficacy of the TPD interlayer in effectively reducing the interfacial contact resistance through the modification of pentacene energy levels, which consequently results in the substantial improvement in the device performances.

Semiconductor devices for entangled photon pair generation: a review

NASA Astrophysics Data System (ADS)

Orieux, Adeline; Versteegh, Marijn A. M.; Jöns, Klaus D.; Ducci, Sara

2017-07-01

Entanglement is one of the most fascinating properties of quantum mechanical systems; when two particles are entangled the measurement of the properties of one of the two allows the properties of the other to be instantaneously known, whatever the distance separating them. In parallel with fundamental research on the foundations of quantum mechanics performed on complex experimental set-ups, we assist today with bourgeoning of quantum information technologies bound to exploit entanglement for a large variety of applications such as secure communications, metrology and computation. Among the different physical systems under investigation, those involving photonic components are likely to play a central role and in this context semiconductor materials exhibit a huge potential in terms of integration of several quantum components in miniature chips. In this article we review the recent progress in the development of semiconductor devices emitting entangled photons. We will present the physical processes allowing the generation of entanglement and the tools to characterize it; we will give an overview of major recent results of the last few years and highlight perspectives for future developments.

Solution-based electrical doping of semiconducting polymer films over a limited depth

NASA Astrophysics Data System (ADS)

Kolesov, Vladimir A.; Fuentes-Hernandez, Canek; Chou, Wen-Fang; Aizawa, Naoya; Larrain, Felipe A.; Wang, Ming; Perrotta, Alberto; Choi, Sangmoo; Graham, Samuel; Bazan, Guillermo C.; Nguyen, Thuc-Quyen; Marder, Seth R.; Kippelen, Bernard

2017-04-01

Solution-based electrical doping protocols may allow more versatility in the design of organic electronic devices; yet, controlling the diffusion of dopants in organic semiconductors and their stability has proven challenging. Here we present a solution-based approach for electrical p-doping of films of donor conjugated organic semiconductors and their blends with acceptors over a limited depth with a decay constant of 10-20 nm by post-process immersion into a polyoxometalate solution (phosphomolybdic acid, PMA) in nitromethane. PMA-doped films show increased electrical conductivity and work function, reduced solubility in the processing solvent, and improved photo-oxidative stability in air. This approach is applicable to a variety of organic semiconductors used in photovoltaics and field-effect transistors. PMA doping over a limited depth of bulk heterojunction polymeric films, in which amine-containing polymers were mixed in the solution used for film formation, enables single-layer organic photovoltaic devices, processed at room temperature, with power conversion efficiencies up to 5.9 +/- 0.2% and stable performance on shelf-lifetime studies at 60 °C for at least 280 h.

Excitonic Materials for Hybrid Solar Cells and Energy Efficient Lighting

NASA Astrophysics Data System (ADS)

Kabra, Dinesh; Lu, Li Ping; Vaynzof, Yana; Song, Myounghoon; Snaith, Henry J.; Friend, Richard H.

2011-07-01

Conventional photovoltaic technology will certainly contribute this century, but to generate a significant fraction of our global power from solar energy, a radically new disruptive technology is required. Research primarily focused on developing the physics and technologies being low cost photovoltaic concepts are required. The materials with carbon-based solution processible organic semiconductors with power conversion efficiency as high as ˜8.2%, which have emerged over the last decade as promising alternatives to expensive silicon based technologies. We aim at exploring the morphological and optoelectronic properties of blends of newly synthesized polymer semiconductors as a route to enhance the performance of organic semiconductor based optoelectronic devices, like photovoltaic diodes (PV) and Light Emitting Diodes (LED). OLED efficiency has reached upto 150 lm/W and going to be next generation cheap and eco friendly solid state lighting solution. Hybrid electronics represent a valuable alternative for the production of easy processible, flexible and reliable optoelectronic thin film devices. I will be presenting recent advancement of my work in the area of hybrid photovoltaics, PLED and research path towards realization electrically injectable organic laser diodes.

Neutron, gamma ray and post-irradiation thermal annealing effects on power semiconductor switches

NASA Technical Reports Server (NTRS)

Schwarze, G. E.; Frasca, A. J.

1991-01-01

The effects of neutron and gamma rays on the electrical and switching characteristics of power semiconductor switches must be known and understood by the designer of the power conditioning, control, and transmission subsystem of space nuclear power systems. The SP-100 radiation requirements at 25 m from the nuclear source are a neutron fluence of 10(exp 13) n/sq cm and a gamma dose of 0.5 Mrads. Experimental data showing the effects of neutrons and gamma rays on the performance characteristics of power-type NPN Bipolar Junction Transistors (BJTs), Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs), and Static Induction Transistors (SITs) are presented. These three types of devices were tested at radiation levels which met or exceeded the SP-100 requirements. For the SP-100 radiation requirements, the BJTs were found to be most sensitive to neutrons, the MOSFETs were most sensitive to gamma rays, and the SITs were only slightly sensitive to neutrons. Post-irradiation thermal anneals at 300 K and up to 425 K were done on these devices and the effectiveness of these anneals are also discussed.

Inhomogeneous Oxygen Vacancy Distribution in Semiconductor Gas Sensors: Formation, Migration and Determination on Gas Sensing Characteristics

PubMed Central

Liu, Jianqiao; Gao, Yinglin; Wu, Xu; Jin, Guohua; Zhai, Zhaoxia; Liu, Huan

2017-01-01

The density of oxygen vacancies in semiconductor gas sensors was often assumed to be identical throughout the grain in the numerical discussion of the gas-sensing mechanism of the devices. In contrast, the actual devices had grains with inhomogeneous distribution of oxygen vacancy under non-ideal conditions. This conflict between reality and discussion drove us to study the formation and migration of the oxygen defects in semiconductor grains. A model of the gradient-distributed oxygen vacancy was proposed based on the effects of cooling rate and re-annealing on semiconductive thin films. The model established the diffusion equations of oxygen vacancy according to the defect kinetics of diffusion and exclusion. We described that the steady-state and transient-state oxygen vacancy distributions, which were used to calculate the gas-sensing characteristics of the sensor resistance and response to reducing gases under two different conditions. The gradient-distributed oxygen vacancy model had the applications in simulating the sensor performances, such as the power law, the grain size effect and the effect of depletion layer width. PMID:28796167

Inhomogeneous Oxygen Vacancy Distribution in Semiconductor Gas Sensors: Formation, Migration and Determination on Gas Sensing Characteristics.

PubMed

Liu, Jianqiao; Gao, Yinglin; Wu, Xu; Jin, Guohua; Zhai, Zhaoxia; Liu, Huan

2017-08-10

The density of oxygen vacancies in semiconductor gas sensors was often assumed to be identical throughout the grain in the numerical discussion of the gas-sensing mechanism of the devices. In contrast, the actual devices had grains with inhomogeneous distribution of oxygen vacancy under non-ideal conditions. This conflict between reality and discussion drove us to study the formation and migration of the oxygen defects in semiconductor grains. A model of the gradient-distributed oxygen vacancy was proposed based on the effects of cooling rate and re-annealing on semiconductive thin films. The model established the diffusion equations of oxygen vacancy according to the defect kinetics of diffusion and exclusion. We described that the steady-state and transient-state oxygen vacancy distributions, which were used to calculate the gas-sensing characteristics of the sensor resistance and response to reducing gases under two different conditions. The gradient-distributed oxygen vacancy model had the applications in simulating the sensor performances, such as the power law, the grain size effect and the effect of depletion layer width.

Sustained hole inversion layer in a wide-bandgap metal-oxide semiconductor with enhanced tunnel current

PubMed Central

Shoute, Gem; Afshar, Amir; Muneshwar, Triratna; Cadien, Kenneth; Barlage, Douglas

2016-01-01

Wide-bandgap, metal-oxide thin-film transistors have been limited to low-power, n-type electronic applications because of the unipolar nature of these devices. Variations from the n-type field-effect transistor architecture have not been widely investigated as a result of the lack of available p-type wide-bandgap inorganic semiconductors. Here, we present a wide-bandgap metal-oxide n-type semiconductor that is able to sustain a strong p-type inversion layer using a high-dielectric-constant barrier dielectric when sourced with a heterogeneous p-type material. A demonstration of the utility of the inversion layer was also investigated and utilized as the controlling element in a unique tunnelling junction transistor. The resulting electrical performance of this prototype device exhibited among the highest reported current, power and transconductance densities. Further utilization of the p-type inversion layer is critical to unlocking the previously unexplored capability of metal-oxide thin-film transistors, such applications with next-generation display switches, sensors, radio frequency circuits and power converters. PMID:26842997

An Ultrathin Single Crystalline Relaxor Ferroelectric Integrated on a High Mobility Semiconductor.

PubMed

Moghadam, Reza M; Xiao, Zhiyong; Ahmadi-Majlan, Kamyar; Grimley, Everett D; Bowden, Mark; Ong, Phuong-Vu; Chambers, Scott A; Lebeau, James M; Hong, Xia; Sushko, Peter V; Ngai, Joseph H

2017-10-11

The epitaxial growth of multifunctional oxides on semiconductors has opened a pathway to introduce new functionalities to semiconductor device technologies. In particular, the integration of gate materials that enable nonvolatile or hysteretic functionality in field-effect transistors could lead to device technologies that consume less power or allow for novel modalities in computing. Here we present electrical characterization of ultrathin single crystalline SrZr x Ti 1-x O 3 (x = 0.7) films epitaxially grown on a high mobility semiconductor, Ge. Epitaxial films of SrZr x Ti 1-x O 3 exhibit relaxor behavior, characterized by a hysteretic polarization that can modulate the surface potential of Ge. We find that gate layers as thin as 5 nm corresponding to an equivalent-oxide thickness of just 1.0 nm exhibit a ∼2 V hysteretic window in the capacitance-voltage characteristics. The development of hysteretic metal-oxide-semiconductor capacitors with nanoscale gate thicknesses opens new vistas for nanoelectronic devices.

High-temperature electronics

NASA Technical Reports Server (NTRS)

Matus, Lawrence G.; Seng, Gary T.

1990-01-01

To meet the needs of the aerospace propulsion and space power communities, the high temperature electronics program at the Lewis Research Center is developing silicon carbide (SiC) as a high temperature semiconductor material. This program supports a major element of the Center's mission - to perform basic and developmental research aimed at improving aerospace propulsion systems. Research is focused on developing the crystal growth, characterization, and device fabrication technologies necessary to produce a family of SiC devices.

Researchers Validate UV Light's Use in Improving Semiconductors | News |

Science.gov Websites

device. The ability to use different classes of semiconductors could create additional possibilities for integrating a variety of different semiconductors in the future," Park said. The researchers explored

Research and Development Strategies in the Semiconductor Industry

NASA Astrophysics Data System (ADS)

Bowling, Allen

2003-03-01

In the 21st Century semiconductor industry, there is a critical balance between internally funded semiconductor research and development (R) and externally funded R. External R may include jointly-funded research collaborations/partnerships with other device manufacturers, jointly-funded consortia-based R, and individually-funded research programs at universities and other contract research locations. Each of these approaches has merits and each has costs. There is a critical balance between keeping the internal research and development pipeline filled and keeping it from being overspent. To meet both competitive schedule and cost goals, a semiconductor device manufacturer must decide on a model for selection of internal versus external R. Today, one of the most critical decisions is whether or not to do semiconductor research and development on 300 mm silicon wafers. Equipment suppliers are doing first development on 300 mm equipment. So, for the device manufacturer, there is a balance between the cost of doing development on 300 mm wafers and the development time schedule driven by equipment availability. In the face of these cost and schedule elements, device manufacturers are looking to consortia such as SEMATECH, SRC, and SRC MARCO for early development and screening of new materials and device structure approaches. This also causes much more close development collaboration between device manufacturer and equipment supplier. Many device manufacturers are also making use of direct contract research with universities and other contract-research organizations, such as IMEC, LETI, and other government-funded research organizations around the world. To get the most out of these external research interactions, the company must develop a strategy for management and technology integration of external R.

78 FR 40427 - Foreign-Trade Zone (FTZ) 183-Austin, Texas; Notification of Proposed Production Activity; Samsung...

Federal Register 2010, 2011, 2012, 2013, 2014

2013-07-05

..., Texas; Notification of Proposed Production Activity; Samsung Austin Semiconductor, LLC (Semiconductors); Austin, Texas Samsung Austin Semiconductor, LLC (Samsung), operator of Subzone 183B, submitted a... June 26, 2013. Samsung currently has authority to produce semiconductor memory devices for export...

Method for altering the luminescence of a semiconductor

DOEpatents

Barbour, J. Charles; Dimos, Duane B.

1999-01-01

A method is described for altering the luminescence of a light emitting semiconductor (LES) device. In particular, a method is described whereby a silicon LES device can be selectively irradiated with a radiation source effective for altering the intensity of luminescence of the irradiated region.

Power semiconductor device with negative thermal feedback

NASA Technical Reports Server (NTRS)

Borky, J. M.; Thornton, R. D.

1970-01-01

Composite power semiconductor avoids second breakdown and provides stable operation. It consists of an array of parallel-connected integrated circuits fabricated in a single chip. The output power device and associated low-level amplifier are closely coupled thermally, so that they have a predetermined temperature relationship.

Mixed-RKDG Finite Element Methods for the 2-D Hydrodynamic Model for Semiconductor Device Simulation

DOE PAGES

Chen, Zhangxin; Cockburn, Bernardo; Jerome, Joseph W.; ...

1995-01-01

In this paper we introduce a new method for numerically solving the equations of the hydrodynamic model for semiconductor devices in two space dimensions. The method combines a standard mixed finite element method, used to obtain directly an approximation to the electric field, with the so-called Runge-Kutta Discontinuous Galerkin (RKDG) method, originally devised for numerically solving multi-dimensional hyperbolic systems of conservation laws, which is applied here to the convective part of the equations. Numerical simulations showing the performance of the new method are displayed, and the results compared with those obtained by using Essentially Nonoscillatory (ENO) finite difference schemes. Frommore » the perspective of device modeling, these methods are robust, since they are capable of encompassing broad parameter ranges, including those for which shock formation is possible. The simulations presented here are for Gallium Arsenide at room temperature, but we have tested them much more generally with considerable success.« less

Power SEMICONDUCTORS—STATE of Art and Future Trends

NASA Astrophysics Data System (ADS)

Benda, Vitezslav

2011-06-01

The importance of effective energy conversion control, including power generation from renewable and environmentally clean energy sources, increases due to rising energy demand. Power electronic systems for controlling and converting electrical energy have become the workhorse of modern society in many applications, both in industry and at home. Power electronics plays a very important role in traction and can be considered as brawns of robotics and automated manufacturing systems. Power semiconductor devices are the key electronic components used in power electronic systems. Advances in power semiconductor technology have improved the efficiency, size, weight and cost of power electronic systems. At present, IGCTs, IGBTs, and MOSFETs represent modern switching devices. Power integrated circuits (PIC) have been developed for the use of power converters for portable, automotive and aerospace applications. For advanced applications, new materials (SiC and GaN) have been introduced. This paper reviews the state of these devices and elaborates on their potentials in terms of higher voltages, higher power density, and better switching performance.

Quasi-Two-Dimensional h-BN/β-Ga2O3 Heterostructure Metal-Insulator-Semiconductor Field-Effect Transistor.

PubMed

Kim, Janghyuk; Mastro, Michael A; Tadjer, Marko J; Kim, Jihyun

2017-06-28

β-gallium oxide (β-Ga 2 O 3 ) and hexagonal boron nitride (h-BN) heterostructure-based quasi-two-dimensional metal-insulator-semiconductor field-effect transistors (MISFETs) were demonstrated by integrating mechanical exfoliation of (quasi)-two-dimensional materials with a dry transfer process, wherein nanothin flakes of β-Ga 2 O 3 and h-BN were utilized as the channel and gate dielectric, respectively, of the MISFET. The h-BN dielectric, which has an extraordinarily flat and clean surface, provides a minimal density of charged impurities on the interface between β-Ga 2 O 3 and h-BN, resulting in superior device performances (maximum transconductance, on/off ratio, subthreshold swing, and threshold voltage) compared to those of the conventional back-gated configurations. Also, double-gating of the fabricated device was demonstrated by biasing both top and bottom gates, achieving the modulation of the threshold voltage. This heterostructured wide-band-gap nanodevice shows a new route toward stable and high-power nanoelectronic devices.

The chemical deposition of semiconductor thin-films for photovoltaic devices

NASA Astrophysics Data System (ADS)

Breen, Marc Louis

Initially, possible precursors to metal sulfide films formed by metal-organic chemical vapor deposition (MOCVD), the standard commercial technique for manufacturing photovoltaic semiconductors, were synthesized. Triple-junction GaInP 2/GaAs/Ge solar cells, prepared by this method, were studied to understand how chemical properties and material defects can effect the performance of photovoltaic devices. Finally, novel methods for the low-temperature, solution growth of CdS, CdSe, and CuInSe2 photovoltaic materials were targeted which will reduce manufacturing costs and increase the economic feasibility of solar energy conversion. A series of dialkyldithiocarbamate copper, gallium and indium compounds were studied as possible metal sulfide MOCVD precursors. Metal powders were oxidized by dialkylthiurams in 3- or 4-methylpyridine using standard techniques for handling air and moisture-sensitive compounds. Metal chlorides reacted directly with the sodium dialkyldithiocarbamate salts. In these complexes, the metal was found in a roughly octahedral orientation, surrounded by dithiocarbamate ligands and/or solvent molecules. Triple-junction GaInP2/GaAs/Ge cells were composed of thin-films of GaInP2 and GaAs grown monolithically on top of a germanium substrate. Each layer of semiconductor material had a different bandgap and absorbed a different portion of the solar spectrum, thus improving the overall efficiency of the cell. Work focused on dark current-voltage behavior which is known to limit solar cell open-circuit voltage, fill factor, and conversion efficiency. Cells were studied using microscopic and spectroscopic techniques to correlate the effect of physical defects in the materials with poor performance of the devices as evaluated through current vs. voltage measurements. Films of US and CdSe were readily prepared in solution through an "ion-by-ion" deposition of Cd2+ and S2- (or Se 2-) generated from the slow hydrolysis of thiourea (or dimethylthiourea). The bath chemistry was carefully controlled by the adjustment of pH to slow hydrolysis and with chelating agents to sequester the cadmium ions. Triethanolamine and ethylenediamine were both effective chelators with the latter producing thicker, clearer films. Finally, US films were grown over electrodeposited CuInSe2 to form working photovoltaic devices. In summary, contributions were made which (a) advance current methods for manufacturing photovoltaic semiconductors and (b) offer an alternative route to producing new forms of thin-film solar cell devices.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Moghadam, Reza M.; Xiao, Zhiyong; Ahmadi-Majlan, Kamyar

The epitaxial growth of multifunctional oxides on semiconductors has opened a pathway to introduce new functionalities to semiconductor device technologies. In particular, ferroelectric materials integrated on semiconductors could lead to low-power field-effect devices that can be used for logic or memory. Essential to realizing such field-effect devices is the development of ferroelectric metal-oxide-semiconductor (MOS) capacitors, in which the polarization of a ferroelectric gate is coupled to the surface potential of a semiconducting channel. Here we demonstrate that ferroelectric MOS capacitors can be realized using single crystalline SrZrxTi1-xO3 (x= 0.7) that has been epitaxially grown on Ge. We find that themore » ferroelectric properties of SrZrxTi1-xO3 are exceptionally robust, as gate layers as thin as 5 nm give rise to hysteretic capacitance-voltage characteristics that are 2 V in width. The development of ferroelectric MOS capacitors with gate thicknesses that are technologically relevant opens a pathway to realize scalable ferroelectric field-effect devices.« less

Methods of measurement for semiconductor materials, process control, and devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1973-01-01

This progress report describes NBS activities directed toward the development of methods of measurement for semiconductor materials, process control, and devices. Significant accomplishments during this reporting period include design of a plan to provide standard silicon wafers for four-probe resistivity measurements for the industry, publication of a summary report on the photoconductive decay method for measuring carrier lifetime, publication of a comprehensive review of the field of wire bond fabrication and testing, and successful completion of organizational activity leading to the establishment of a new group on quality and hardness assurance in ASTM Committee F-1 on Electronics. Work is continuing on measurement of resistivity of semiconductor crystals; characterization of generation-recombination-trapping centers in silicon; study of gold-doped silicon; development of the infrared response technique; evaluation of wire bonds and die attachment; and measurement of thermal properties of semiconductor devices, delay time and related carrier transport properties in junction devices, and noise properties of microwave diodes.

Acoustic charge transport technology investigation for advanced development transponder

NASA Technical Reports Server (NTRS)

Kayalar, S.

1993-01-01

Acoustic charge transport (ACT) technology has provided a basis for a new family of analog signal processors, including a programmable transversal filter (PTF). Through monolithic integration of ACT delay lines with GaAs metal semiconductor field effect transistor (MESFET) digital memory and controllers, these devices significantly extend the performance of PTF's. This article introduces the basic operation of these devices and summarizes their present and future specifications. The production and testing of these devices indicate that this new technology is a promising one for future space applications.

Single photon detection with self-quenching multiplication

NASA Technical Reports Server (NTRS)

Zheng, Xinyu (Inventor); Cunningham, Thomas J. (Inventor); Pain, Bedabrata (Inventor)

2011-01-01

A photoelectronic device and an avalanche self-quenching process for a photoelectronic device are described. The photoelectronic device comprises a nanoscale semiconductor multiplication region and a nanoscale doped semiconductor quenching structure including a depletion region and an undepletion region. The photoelectronic device can act as a single photon detector or a single carrier multiplier. The avalanche self-quenching process allows electrical field reduction in the multiplication region by movement of the multiplication carriers, thus quenching the avalanche.

Failure Mode/Mechanism Distributions

DTIC Science & Technology

1991-09-01

circuits , hybrids, discrete semiconductors, microwave devices, optoelectronics and nonelectronic parts employed in military, space, industrial and...FMEA may be performed as a hardware analysis, a functional analysis, or a combination analysis and is ideally initiated at the part, circuit or...by a single replaceable module , a separate FMEA could be performed on the internal functions of the module , viewing the module as a system. The level

Semiconductor millimeter wavelength electronics

NASA Astrophysics Data System (ADS)

Rosenbaum, F. J.

1985-12-01

This final report summarizes the results of research carried out on topics in millimeter wavelength semiconductor electronics under an ONR Selected Research Opportunity program. Study areas included III-V compound semiconductor growth and characterization, microwave and millimeter wave device modeling, fabrication and testing, and the development of new device concepts. A new millimeter wave mixer and detector, the Gap diode was invented. Topics reported on include ballistic transport, Zener oscillations, impurities in GaAs, electron velocity-electric field calculation and measurements, etc., calculations.

Implications of Analytical Investigations about the Semiconductor Equations on Device Modeling Programs.

DTIC Science & Technology

1983-04-01

34.. .. . ...- "- -,-. SIGNIFICANCE AND EXPLANATION Many different codes for the simulation of semiconductor devices such as transitors , diodes, thyristors are already circulated...partially take into account the consequences introduced by degenerate semiconductors (e.g. invalidity of Boltzmann’s statistics , bandgap narrowing). These...ft - ni p nep /Ut(2.10) Sni *e p nie 2.11) .7. (2.10) can be physically interpreted as the application of Boltzmann statistics . However (2.10) a.,zo

Investigation of semiconductor clad optical waveguides

NASA Technical Reports Server (NTRS)

Batchman, T. E.; Carson, R. F.

1985-01-01

A variety of techniques have been proposed for fabricating integrated optical devices using semiconductors, lithium niobate, and glasses as waveguides and substrates. The use of glass waveguides and their interaction with thin semiconductor cladding layers was studied. Though the interactions of these multilayer waveguide structures have been analyzed here using glass, they may be applicable to other types of materials as well. The primary reason for using glass is that it provides a simple, inexpensive way to construct waveguides and devices.