Verification of Fowler-Nordheim electron tunneling mechanism in Ni/SiO2/n-4H SiC and n+ poly-Si/SiO2/n-4H SiC MOS devices by different models

NASA Astrophysics Data System (ADS)

Kodigala, Subba Ramaiah

2016-11-01

This article emphasizes verification of Fowler-Nordheim electron tunneling mechanism in the Ni/SiO2/n-4H SiC MOS devices by developing three different kinds of models. The standard semiconductor equations are categorically solved to obtain the change in Fermi energy level of semiconductor with effect of temperature and field that extend support to determine sustainable and accurate tunneling current through the oxide layer. The forward and reverse bias currents with variation of electric field are simulated with help of different models developed by us for MOS devices by applying adequate conditions. The latter is quite different from former in terms of tunneling mechanism in the MOS devices. The variation of barrier height with effect of quantum mechanical, temperature, and fields is considered as effective barrier height for the generation of current-field (J-F) curves under forward and reverse biases but quantum mechanical effect is void in the latter. In addition, the J-F curves are also simulated with variation of carrier concentration in the n-type 4H SiC semiconductor of MOS devices and the relation between them is established.

Laser-based irradiation apparatus and method to measure the functional dose-rate response of semiconductor devices

DOEpatents

Horn, Kevin M [Albuquerque, NM

2008-05-20

A broad-beam laser irradiation apparatus can measure the parametric or functional response of a semiconductor device to exposure to dose-rate equivalent infrared laser light. Comparisons of dose-rate response from before, during, and after accelerated aging of a device, or from periodic sampling of devices from fielded operational systems can determine if aging has affected the device's overall functionality. The dependence of these changes on equivalent dose-rate pulse intensity and/or duration can be measured with the apparatus. The synchronized introduction of external electrical transients into the device under test can be used to simulate the electrical effects of the surrounding circuitry's response to a radiation exposure while exposing the device to dose-rate equivalent infrared laser light.

THz semiconductor-based front-end receiver technology for space applications

NASA Technical Reports Server (NTRS)

Mehdi, Imran; Siegel, Peter

2004-01-01

Advances in the design and fabrication of very low capacitance planar Schottky diodes and millimeter-wave power amplifiers, more accurate device and circuit models for commercial 3-D electromagnetic simulators, and the availability of both MEMS and high precision metal machining, have enabled RF engineers to extend traditional waveguide-based sensor and source technologies well into the TI-Iz frequency regime. This short paper will highlight recent progress in realizing THz space-qualified receiver front-ends based on room temperature semiconductor devices.

Thermal modeling of wide bandgap semiconductor devices for high frequency power converters

NASA Astrophysics Data System (ADS)

Sharath Sundar Ram, S.; Vijayakumari, A.

2018-02-01

The emergence of wide bandgap semiconductors has led to development of new generation semiconductor switches that are highly efficient and scalable. To exploit the advantages of GaNFETs in power converters, in terms of reduction in the size of heat sinks and filters, a thorough understanding of the thermal behavior of the device is essential. This paper aims to establish a thermal model for wideband gap semiconductor GaNFETs commercially available, which will enable power electronic designers to obtain the thermal characteristics of the device more effectively. The model parameters is obtained from the manufacturer’s data sheet by adopting an exponential curve fitting technique and the thermal model is validated using PSPICE simulations. The model was developed based on the parametric equivalence that exists between the thermal and electrical components, such that it responds for transient thermal stresses. A suitable power profile has been generated to evaluate the GaNFET model under different power dissipation scenarios. The results were compared with a Silicon MOSFETs to further highlight the advantages of the GaN devices. The proposed modeling approach can be extended for other GaN devices and can provide a platform for the thermal study and heat sink optimization.

Mixed-RKDG Finite Element Methods for the 2-D Hydrodynamic Model for Semiconductor Device Simulation

DOE PAGES

Chen, Zhangxin; Cockburn, Bernardo; Jerome, Joseph W.; ...

1995-01-01

In this paper we introduce a new method for numerically solving the equations of the hydrodynamic model for semiconductor devices in two space dimensions. The method combines a standard mixed finite element method, used to obtain directly an approximation to the electric field, with the so-called Runge-Kutta Discontinuous Galerkin (RKDG) method, originally devised for numerically solving multi-dimensional hyperbolic systems of conservation laws, which is applied here to the convective part of the equations. Numerical simulations showing the performance of the new method are displayed, and the results compared with those obtained by using Essentially Nonoscillatory (ENO) finite difference schemes. Frommore » the perspective of device modeling, these methods are robust, since they are capable of encompassing broad parameter ranges, including those for which shock formation is possible. The simulations presented here are for Gallium Arsenide at room temperature, but we have tested them much more generally with considerable success.« less

Non-Parabolic Hydrodynamic Formulations for the Simulation of Inhomogeneous Semiconductor Devices

NASA Technical Reports Server (NTRS)

Smith, A. W.; Brennan, K. F.

1996-01-01

Hydrodynamic models are becoming prevalent design tools for small scale devices and other devices in which high energy effects can dominate transport. Most current hydrodynamic models use a parabolic band approximation to obtain fairly simple conservation equations. Interest in accounting for band structure effects in hydrodynamic device simulation has begun to grow since parabolic models cannot fully describe the transport in state of the art devices due to the distribution populating non-parabolic states within the band. This paper presents two different non-parabolic formulations or the hydrodynamic model suitable for the simulation of inhomogeneous semiconductor devices. The first formulation uses the Kane dispersion relationship ((hk)(exp 2)/2m = W(1 + alphaW). The second formulation makes use of a power law ((hk)(exp 2)/2m = xW(exp y)) for the dispersion relation. Hydrodynamic models which use the first formulation rely on the binomial expansion to obtain moment equations with closed form coefficients. This limits the energy range over which the model is valid. The power law formulation readily produces closed form coefficients similar to those obtained using the parabolic band approximation. However, the fitting parameters (x,y) are only valid over a limited energy range. The physical significance of the band non-parabolicity is discussed as well as the advantages/disadvantages and approximations of the two non-parabolic models. A companion paper describes device simulations based on the three dispersion relationships; parabolic, Kane dispersion and power law dispersion.

Non-parabolic hydrodynamic formulations for the simulation of inhomogeneous semiconductor devices

NASA Technical Reports Server (NTRS)

Smith, Arlynn W.; Brennan, Kevin F.

1995-01-01

Hydrodynamic models are becoming prevalent design tools for small scale devices and other devices in which high energy effects can dominate transport. Most current hydrodynamic models use a parabolic band approximation to obtain fairly simple conservation equations. Interest in accounting for band structure effects in hydrodynamic device simulation has begun to grow since parabolic models can not fully describe the transport in state of the art devices due to the distribution populating non-parabolic states within the band. This paper presents two different non-parabolic formulations of the hydrodynamic model suitable for the simulation of inhomogeneous semiconductor devices. The first formulation uses the Kane dispersion relationship (hk)(exp 2)/2m = W(1 + alpha(W)). The second formulation makes use of a power law ((hk)(exp 2)/2m = xW(sup y)) for the dispersion relation. Hydrodynamic models which use the first formulation rely on the binomial expansion to obtain moment equations with closed form coefficients. This limits the energy range over which the model is valid. The power law formulation readily produces closed form coefficients similar to those obtained using the parabolic band approximation. However, the fitting parameters (x,y) are only valid over a limited energy range. The physical significance of the band non-parabolicity is discussed as well as the advantages/disadvantages and approximations of the two non-parabolic models. A companion paper describes device simulations based on the three dispersion relationships: parabolic, Kane dispersion, and power low dispersion.

Modelling of optoelectronic circuits based on resonant tunneling diodes

NASA Astrophysics Data System (ADS)

Rei, João. F. M.; Foot, James A.; Rodrigues, Gil C.; Figueiredo, José M. L.

2017-08-01

Resonant tunneling diodes (RTDs) are the fastest pure electronic semiconductor devices at room temperature. When integrated with optoelectronic devices they can give rise to new devices with novel functionalities due to their highly nonlinear properties and electrical gain, with potential applications in future ultra-wide-band communication systems (see e.g. EU H2020 iBROW Project). The recent coverage on these devices led to the need to have appropriated simulation tools. In this work, we present RTD based optoelectronic circuits simulation packages to provide circuit signal level analysis such as transient and frequency responses. We will present and discuss the models, and evaluate the simulation packages.

Advanced development of double-injection, deep-impurity semiconductor switches

NASA Technical Reports Server (NTRS)

Hanes, M. H.

1987-01-01

Deep-impurity, double-injection devices, commonly refered to as (DI) squared devices, represent a class of semiconductor switches possessing a very high degree of tolerance to electron and neutron irradiation and to elevated temperature operation. These properties have caused them to be considered as attractive candidates for space power applications. The design, fabrication, and testing of several varieties of (DI) squared devices intended for power switching are described. All of these designs were based upon gold-doped silicon material. Test results, along with results of computer simulations of device operation, other calculations based upon the assumed mode of operation of (DI) squared devices, and empirical information regarding power semiconductor device operation and limitations, have led to the conculsion that these devices are not well suited to high-power applications. When operated in power circuitry configurations, they exhibit high-power losses in both the off-state and on-state modes. These losses are caused by phenomena inherent to the physics and material of the devices and cannot be much reduced by device design optimizations. The (DI) squared technology may, however, find application in low-power functions such as sensing, logic, and memory, when tolerance to radiation and temperature are desirable (especially is device performance is improved by incorporation of deep-level impurities other than gold.

Hybrid quantum-classical modeling of quantum dot devices

NASA Astrophysics Data System (ADS)

Kantner, Markus; Mittnenzweig, Markus; Koprucki, Thomas

2017-11-01

The design of electrically driven quantum dot devices for quantum optical applications asks for modeling approaches combining classical device physics with quantum mechanics. We connect the well-established fields of semiclassical semiconductor transport theory and the theory of open quantum systems to meet this requirement. By coupling the van Roosbroeck system with a quantum master equation in Lindblad form, we introduce a new hybrid quantum-classical modeling approach, which provides a comprehensive description of quantum dot devices on multiple scales: it enables the calculation of quantum optical figures of merit and the spatially resolved simulation of the current flow in realistic semiconductor device geometries in a unified way. We construct the interface between both theories in such a way, that the resulting hybrid system obeys the fundamental axioms of (non)equilibrium thermodynamics. We show that our approach guarantees the conservation of charge, consistency with the thermodynamic equilibrium and the second law of thermodynamics. The feasibility of the approach is demonstrated by numerical simulations of an electrically driven single-photon source based on a single quantum dot in the stationary and transient operation regime.

Tuning charge carrier transport and optical birefringence in liquid-crystalline thin films: A new design space for organic light-emitting diodes.

PubMed

Keum, Chang-Min; Liu, Shiyi; Al-Shadeedi, Akram; Kaphle, Vikash; Callens, Michiel Koen; Han, Lu; Neyts, Kristiaan; Zhao, Hongping; Gather, Malte C; Bunge, Scott D; Twieg, Robert J; Jakli, Antal; Lüssem, Björn

2018-01-15

Liquid-crystalline organic semiconductors exhibit unique properties that make them highly interesting for organic optoelectronic applications. Their optical and electrical anisotropies and the possibility to control the alignment of the liquid-crystalline semiconductor allow not only to optimize charge carrier transport, but to tune the optical property of organic thin-film devices as well. In this study, the molecular orientation in a liquid-crystalline semiconductor film is tuned by a novel blading process as well as by different annealing protocols. The altered alignment is verified by cross-polarized optical microscopy and spectroscopic ellipsometry. It is shown that a change in alignment of the liquid-crystalline semiconductor improves charge transport in single charge carrier devices profoundly. Comparing the current-voltage characteristics of single charge carrier devices with simulations shows an excellent agreement and from this an in-depth understanding of single charge carrier transport in two-terminal devices is obtained. Finally, p-i-n type organic light-emitting diodes (OLEDs) compatible with vacuum processing techniques used in state-of-the-art OLEDs are demonstrated employing liquid-crystalline host matrix in the emission layer.

Singlet-Fission-Sensitized Hybrid Thin-Films For Next-Generation Photovoltaics

DTIC Science & Technology

2016-04-12

evaporators and a spin-coater was constructed. In order to characterize PV devices, a solar -simulator, 1. REPORT DATE (DD-MM-YYYY) 4. TITLE AND...with thermal evaporators and a spin-coater was constructed. In order to characterize PV devices, a solar -simulator, semiconductor parameter analyzer...SECURITY CLASSIFICATION OF: This grant enabled the acquisition of equipment for the fabrication of organic and nanocrystal based photovoltaic ( PV

Backscattered electron simulations to evaluate sensitivity against electron dosage of buried semiconductor features

NASA Astrophysics Data System (ADS)

Mukhtar, Maseeh; Thiel, Bradley

2018-03-01

In fabrication, overlay measurements of semiconductor device patterns have conventionally been performed using optical methods. Beginning with image-based techniques using box-in-box to the more recent diffraction-based overlay (DBO). Alternatively, use of SEM overlay is under consideration for in-device overlay. Two main application spaces are measurement features from multiple mask levels on the same surface and buried features. Modern CD-SEMs are adept at measuring overlay for cases where all features are on the surface. In order to measure overlay of buried features, HV-SEM is needed. Gate-to-fin and BEOL overlay are important use cases for this technique. A JMONSEL simulation exercise was performed for these two cases using 10 nm line/space gratings of graduated increase in depth of burial. Backscattered energy loss results of these simulations were used to calculate the sensitivity measurements of buried features versus electron dosage for an array of electron beam voltages.

Effect of Structure and Disorder on the Charge Transport in Defined Self-Assembled Monolayers of Organic Semiconductors.

PubMed

Schmaltz, Thomas; Gothe, Bastian; Krause, Andreas; Leitherer, Susanne; Steinrück, Hans-Georg; Thoss, Michael; Clark, Timothy; Halik, Marcus

2017-09-26

Self-assembled monolayer field-effect transistors (SAMFETs) are not only a promising type of organic electronic device but also allow detailed analyses of structure-property correlations. The influence of the morphology on the charge transport is particularly pronounced, due to the confined monolayer of 2D-π-stacked organic semiconductor molecules. The morphology, in turn, is governed by relatively weak van-der-Waals interactions and is thus prone to dynamic structural fluctuations. Accordingly, combining electronic and physical characterization and time-averaged X-ray analyses with the dynamic information available at atomic resolution from simulations allows us to characterize self-assembled monolayer (SAM) based devices in great detail. For this purpose, we have constructed transistors based on SAMs of two molecules that consist of the organic p-type semiconductor benzothieno[3,2-b][1]benzothiophene (BTBT), linked to a C 11 or C 12 alkylphosphonic acid. Both molecules form ordered SAMs; however, our experiments show that the size of the crystalline domains and the charge-transport properties vary considerably in the two systems. These findings were confirmed by molecular dynamics (MD) simulations and semiempirical molecular-orbital electronic-structure calculations, performed on snapshots from the MD simulations at different times, revealing, in atomistic detail, how the charge transport in organic semiconductors is influenced and limited by dynamic disorder.

All-Graphene Planar Self-Switching MISFEDs, Metal-Insulator-Semiconductor Field-Effect Diodes

PubMed Central

Al-Dirini, Feras; Hossain, Faruque M.; Nirmalathas, Ampalavanapillai; Skafidas, Efstratios

2014-01-01

Graphene normally behaves as a semimetal because it lacks a bandgap, but when it is patterned into nanoribbons a bandgap can be introduced. By varying the width of these nanoribbons this band gap can be tuned from semiconducting to metallic. This property allows metallic and semiconducting regions within a single Graphene monolayer, which can be used in realising two-dimensional (2D) planar Metal-Insulator-Semiconductor field effect devices. Based on this concept, we present a new class of nano-scale planar devices named Graphene Self-Switching MISFEDs (Metal-Insulator-Semiconductor Field-Effect Diodes), in which Graphene is used as the metal and the semiconductor concurrently. The presented devices exhibit excellent current-voltage characteristics while occupying an ultra-small area with sub-10 nm dimensions and an ultimate thinness of a single atom. Quantum mechanical simulation results, based on the Extended Huckel method and Nonequilibrium Green's Function Formalism, show that a Graphene Self-Switching MISFED with a channel as short as 5 nm can achieve forward-to-reverse current rectification ratios exceeding 5000. PMID:24496307

Separating semiconductor devices from substrate by etching graded composition release layer disposed between semiconductor devices and substrate including forming protuberances that reduce stiction

DOEpatents

Tauke-Pedretti, Anna; Nielson, Gregory N; Cederberg, Jeffrey G; Cruz-Campa, Jose Luis

2015-05-12

A method includes etching a release layer that is coupled between a plurality of semiconductor devices and a substrate with an etch. The etching includes etching the release layer between the semiconductor devices and the substrate until the semiconductor devices are at least substantially released from the substrate. The etching also includes etching a protuberance in the release layer between each of the semiconductor devices and the substrate. The etch is stopped while the protuberances remain between each of the semiconductor devices and the substrate. The method also includes separating the semiconductor devices from the substrate. Other methods and apparatus are also disclosed.

Architectures for Improved Organic Semiconductor Devices

NASA Astrophysics Data System (ADS)

Beck, Jonathan H.

Advancements in the microelectronics industry have brought increasing performance and decreasing prices to a wide range of users. Conventional silicon-based electronics have followed Moore's law to provide an ever-increasing integrated circuit transistor density, which drives processing power, solid-state memory density, and sensor technologies. As shrinking conventional integrated circuits became more challenging, researchers began exploring electronics with the potential to penetrate new applications with a low price of entry: "Electronics everywhere." The new generation of electronics is thin, light, flexible, and inexpensive. Organic electronics are part of the new generation of thin-film electronics, relying on the synthetic flexibility of carbon molecules to create organic semiconductors, absorbers, and emitters which perform useful tasks. Organic electronics can be fabricated with low energy input on a variety of novel substrates, including inexpensive plastic sheets. The potential ease of synthesis and fabrication of organic-based devices means that organic electronics can be made at very low cost. Successfully demonstrated organic semiconductor devices include photovoltaics, photodetectors, transistors, and light emitting diodes. Several challenges that face organic semiconductor devices are low performance relative to conventional devices, long-term device stability, and development of new organic-compatible processes and materials. While the absorption and emission performance of organic materials in photovoltaics and light emitting diodes is extraordinarily high for thin films, the charge conduction mobilities are generally low. Building highly efficient devices with low-mobility materials is one challenge. Many organic semiconductor films are unstable during fabrication, storage, and operation due to reactions with water, oxygen and hydroxide. A final challenge facing organic electronics is the need for new processes and materials for electrodes, semiconductors and substrates compatible with low-temperature, flexible, and oxygenated and aromatic solvent-free fabrication. Materials and processes must be capable of future high volume production in order to enable low costs. In this thesis we explore several techniques to improve organic semiconductor device performance and enable new fabrication processes. In Chapter 2, I describe the integration of sub-optical-wavelength nanostructured electrodes that improve fill factor and power conversion efficiency in organic photovoltaic devices. Photovoltaic fill factor performance is one of the primary challenges facing organic photovoltaics because most organic semiconductors have poor charge mobility. Our electrical and optical measurements and simulations indicate that nanostructured electrodes improve charge extraction in organic photovoltaics. In Chapter 3, I describe a general method for maximizing the efficiency of organic photovoltaic devices by simultaneously optimizing light absorption and charge carrier collection. We analyze the potential benefits of light trapping strategies for maximizing the overall power conversion efficiency of organic photovoltaic devices. This technique may be used to improve organic photovoltaic materials with low absorption, or short exciton diffusion and carrier-recombination lengths, opening up the device design space. In Chapter 4, I describe a process for high-quality graphene transfer onto chemically sensitive, weakly interacting organic semiconductor thin-films. Graphene is a promising flexible and highly transparent electrode for organic electronics; however, transferring graphene films onto organic semiconductor devices was previously impossible. We demonstrate a new transfer technique based on an elastomeric stamp coated with an fluorinated polymer release layer. We fabricate three classes of organic semiconductor devices: field effect transistors without high temperature annealing, transparent organic light-emitting diodes, and transparent small-molecule organic photovoltaic devices.

Unitary lens semiconductor device

DOEpatents

Lear, Kevin L.

1997-01-01

A unitary lens semiconductor device and method. The unitary lens semiconductor device is provided with at least one semiconductor layer having a composition varying in the growth direction for unitarily forming one or more lenses in the semiconductor layer. Unitary lens semiconductor devices may be formed as light-processing devices such as microlenses, and as light-active devices such as light-emitting diodes, photodetectors, resonant-cavity light-emitting diodes, vertical-cavity surface-emitting lasers, and resonant cavity photodetectors.

Method of producing strained-layer semiconductor devices via subsurface-patterning

DOEpatents

Dodson, Brian W.

1993-01-01

A method is described for patterning subsurface features in a semiconductor device, wherein the semiconductor device includes an internal strained layer. The method comprises creating a pattern of semiconductor material over the semiconductor device, the semiconductor material having a predetermined thickness which stabilizes areas of the strained semiconductor layer that lie beneath the pattern. Subsequently, a heating step is applied to the semiconductor device to cause a relaxation in areas of the strained layer which do not lie beneath the semiconductor material pattern, whereby dislocations result in the relaxed areas and impair electrical transport therethrough.

Unitary lens semiconductor device

DOEpatents

Lear, K.L.

1997-05-27

A unitary lens semiconductor device and method are disclosed. The unitary lens semiconductor device is provided with at least one semiconductor layer having a composition varying in the growth direction for unitarily forming one or more lenses in the semiconductor layer. Unitary lens semiconductor devices may be formed as light-processing devices such as microlenses, and as light-active devices such as light-emitting diodes, photodetectors, resonant-cavity light-emitting diodes, vertical-cavity surface-emitting lasers, and resonant cavity photodetectors. 9 figs.

Simplified nonplanar wafer bonding for heterogeneous device integration

NASA Astrophysics Data System (ADS)

Geske, Jon; Bowers, John E.; Riley, Anton

2004-07-01

We demonstrate a simplified nonplanar wafer bonding technique for heterogeneous device integration. The improved technique can be used to laterally integrate dissimilar semiconductor device structures on a lattice-mismatched substrate. Using the technique, two different InP-based vertical-cavity surface-emitting laser active regions have been integrated onto GaAs without compromising the quality of the photoluminescence. Experimental and numerical simulation results are presented.

Evidence of thermal transport anisotropy in stable glasses of vapor deposited organic molecules

NASA Astrophysics Data System (ADS)

Ràfols-Ribé, Joan; Dettori, Riccardo; Ferrando-Villalba, Pablo; Gonzalez-Silveira, Marta; Abad, Llibertat; Lopeandía, Aitor F.; Colombo, Luciano; Rodríguez-Viejo, Javier

2018-03-01

Vapor deposited organic glasses are currently in use in many optoelectronic devices. Their operation temperature is limited by the glass transition temperature of the organic layers and thermal management strategies become increasingly important to improve the lifetime of the device. Here we report the unusual finding that molecular orientation heavily influences heat flow propagation in glassy films of small molecule organic semiconductors. The thermal conductivity of vapor deposited thin-film semiconductor glasses is anisotropic and controlled by the deposition temperature. We compare our data with extensive molecular dynamics simulations to disentangle the role of density and molecular orientation on heat propagation. Simulations do support the view that thermal transport along the backbone of the organic molecule is strongly preferred with respect to the perpendicular direction. This is due to the anisotropy of the molecular interaction strength that limits the transport of atomic vibrations. This approach could be used in future developments to implement small molecule glassy films in thermoelectric or other organic electronic devices.

Room-temperature preparation of trisilver-copper-sulfide/polymer based heterojunction thin film for solar cell application

NASA Astrophysics Data System (ADS)

Lei, Yan; Yang, Xiaogang; Gu, Longyan; Jia, Huimin; Ge, Suxiang; Xiao, Pin; Fan, Xiaoli; Zheng, Zhi

2015-04-01

Solar cells devices based on inorganic/polymer heterojunction can be a possible solution to harvest solar energy and convert to electric energy with high efficiency through a cost-effective fabrication. The solution-process method can be easily used to produce large area devices. Moreover, due to the intrinsic different charge separation, diffusion or recombination in various semiconductors, the interfaces between each component may strongly influence the inorganic/polymer heterojunction performance. Here we prepared a n-type Ag3CuS2 (Eg = 1.25 eV) nanostructured film through a room-temperature element reaction process, which was confirmed as direct bandgap semiconductor through density function theory simulation. This Ag3CuS2 film was spin-coated with an organic semiconducting poly(3-hexythiophene) (P3HT) or polythieno[3,4-b]-thiophene-co-benzodithiophene (PTB7) film, which formed an inorganic/polymer heterojunction. After constructing it to a solar cell device, the power conversion efficiencies of 0.79% and 0.31% were achieved with simulated solar illumination on Ag3CuS2/P3HT and Ag3CuS2/PTB7, respectively. A possible mechanism was discussed and we showed the charge separation at interface of inorganic and polymer semiconductors played an important role.

Electrically driven plasmon-exciton coupled random lasing in ZnO metal-semiconductor-metal devices

NASA Astrophysics Data System (ADS)

Suja, Mohammad; Debnath, Bishwajit; Bashar, Sunayna B.; Su, Longxing; Lake, Roger; Liu, Jianlin

2018-05-01

Electrically driven plasmon-exciton coupled random lasing is demonstrated by incorporating Ag nanoparticles on Cu-doped ZnO metal-semiconductor-metal (MSM) devices. Both photoluminescence and electroluminescence studies show that emission efficiencies have been enhanced significantly due to coupling between ZnO excitons and Ag surface plasmons. With the incorporation of Ag nanoparticles on ZnO MSM structures, internal quantum efficiency up to 6 times is demonstrated. Threshold current for lasing is decreased by as much as 30% while the output power is increased up to 350% at an injection current of 40 mA. A numerical simulation study reveals that hole carriers are generated in the ZnO MSM devices from impact ionization processes for subsequent plasmon-exciton coupled lasing.

Investigation of advanced fault insertion and simulator methods

NASA Technical Reports Server (NTRS)

Dunn, W. R.; Cottrell, D.

1986-01-01

The cooperative agreement partly supported research leading to the open-literature publication cited. Additional efforts under the agreement included research into fault modeling of semiconductor devices. Results of this research are presented in this report which is summarized in the following paragraphs. As a result of the cited research, it appears that semiconductor failure mechanism data is abundant but of little use in developing pin-level device models. Failure mode data on the other hand does exist but is too sparse to be of any statistical use in developing fault models. What is significant in the failure mode data is that, unlike classical logic, MSI and LSI devices do exhibit more than 'stuck-at' and open/short failure modes. Specifically they are dominated by parametric failures and functional anomalies that can include intermittent faults and multiple-pin failures. The report discusses methods of developing composite pin-level models based on extrapolation of semiconductor device failure mechanisms, failure modes, results of temperature stress testing and functional modeling. Limitations of this model particularly with regard to determination of fault detection coverage and latency time measurement are discussed. Indicated research directions are presented.

Application of kinetic flux vector splitting scheme for solving multi-dimensional hydrodynamical models of semiconductor devices

NASA Astrophysics Data System (ADS)

Nisar, Ubaid Ahmed; Ashraf, Waqas; Qamar, Shamsul

In this article, one and two-dimensional hydrodynamical models of semiconductor devices are numerically investigated. The models treat the propagation of electrons in a semiconductor device as the flow of a charged compressible fluid. It plays an important role in predicting the behavior of electron flow in semiconductor devices. Mathematically, the governing equations form a convection-diffusion type system with a right hand side describing the relaxation effects and interaction with a self consistent electric field. The proposed numerical scheme is a splitting scheme based on the kinetic flux-vector splitting (KFVS) method for the hyperbolic step, and a semi-implicit Runge-Kutta method for the relaxation step. The KFVS method is based on the direct splitting of macroscopic flux functions of the system on the cell interfaces. The second order accuracy of the scheme is achieved by using MUSCL-type initial reconstruction and Runge-Kutta time stepping method. Several case studies are considered. For validation, the results of current scheme are compared with those obtained from the splitting scheme based on the NT central scheme. The effects of various parameters such as low field mobility, device length, lattice temperature and voltage are analyzed. The accuracy, efficiency and simplicity of the proposed KFVS scheme validates its generic applicability to the given model equations. A two dimensional simulation is also performed by KFVS method for a MESFET device, producing results in good agreement with those obtained by NT-central scheme.

A splitting scheme based on the space-time CE/SE method for solving multi-dimensional hydrodynamical models of semiconductor devices

NASA Astrophysics Data System (ADS)

Nisar, Ubaid Ahmed; Ashraf, Waqas; Qamar, Shamsul

2016-08-01

Numerical solutions of the hydrodynamical model of semiconductor devices are presented in one and two-space dimension. The model describes the charge transport in semiconductor devices. Mathematically, the models can be written as a convection-diffusion type system with a right hand side describing the relaxation effects and interaction with a self consistent electric field. The proposed numerical scheme is a splitting scheme based on the conservation element and solution element (CE/SE) method for hyperbolic step, and a semi-implicit scheme for the relaxation step. The numerical results of the suggested scheme are compared with the splitting scheme based on Nessyahu-Tadmor (NT) central scheme for convection step and the same semi-implicit scheme for the relaxation step. The effects of various parameters such as low field mobility, device length, lattice temperature and voltages for one-space dimensional hydrodynamic model are explored to further validate the generic applicability of the CE/SE method for the current model equations. A two dimensional simulation is also performed by CE/SE method for a MESFET device, producing results in good agreement with those obtained by NT-central scheme.

Simulation study on discrete charge effects of SiNW biosensors according to bound target position using a 3D TCAD simulator.

PubMed

Chung, In-Young; Jang, Hyeri; Lee, Jieun; Moon, Hyunggeun; Seo, Sung Min; Kim, Dae Hwan

2012-02-17

We introduce a simulation method for the biosensor environment which treats the semiconductor and the electrolyte region together, using the well-established semiconductor 3D TCAD simulator tool. Using this simulation method, we conduct electrostatic simulations of SiNW biosensors with a more realistic target charge model where the target is described as a charged cube, randomly located across the nanowire surface, and analyze the Coulomb effect on the SiNW FET according to the position and distribution of the target charges. The simulation results show the considerable variation in the SiNW current according to the bound target positions, and also the dependence of conductance modulation on the polarity of target charges. This simulation method and the results can be utilized for analysis of the properties and behavior of the biosensor device, such as the sensing limit or the sensing resolution.

Extended behavioural device modelling and circuit simulation with Qucs-S

NASA Astrophysics Data System (ADS)

Brinson, M. E.; Kuznetsov, V.

2018-03-01

Current trends in circuit simulation suggest a growing interest in open source software that allows access to more than one simulation engine while simultaneously supporting schematic drawing tools, behavioural Verilog-A and XSPICE component modelling, and output data post-processing. This article introduces a number of new features recently implemented in the 'Quite universal circuit simulator - SPICE variant' (Qucs-S), including structure and fundamental schematic capture algorithms, at the same time highlighting their use in behavioural semiconductor device modelling. Particular importance is placed on the interaction between Qucs-S schematics, equation-defined devices, SPICE B behavioural sources and hardware description language (HDL) scripts. The multi-simulator version of Qucs is a freely available tool that offers extended modelling and simulation features compared to those provided by legacy circuit simulators. The performance of a number of Qucs-S modelling extensions are demonstrated with a GaN HEMT compact device model and data obtained from tests using the Qucs-S/Ngspice/Xyce ©/SPICE OPUS multi-engine circuit simulator.

Barrier height enhancement of metal/semiconductor contact by an enzyme biofilm interlayer

NASA Astrophysics Data System (ADS)

Ocak, Yusuf Selim; Gul Guven, Reyhan; Tombak, Ahmet; Kilicoglu, Tahsin; Guven, Kemal; Dogru, Mehmet

2013-06-01

A metal/interlayer/semiconductor (Al/enzyme/p-Si) MIS device was fabricated using α-amylase enzyme as a thin biofilm interlayer. It was observed that the device showed an excellent rectifying behavior and the barrier height value of 0.78 eV for Al/α-amylase/p-Si was meaningfully larger than the one of 0.58 eV for conventional Al/p-Si metal/semiconductor (MS) contact. Enhancement of the interfacial potential barrier of Al/p-Si MS diode was realized using enzyme interlayer by influencing the space charge region of Si semiconductor. The electrical properties of the structure were executed by the help of current-voltage and capacitance-voltage measurements. The photovoltaic properties of the structure were executed under a solar simulator with AM1.5 global filter between 40 and 100 mW/cm2 illumination conditions. It was also reported that the α-amylase enzyme produced from Bacillus licheniformis had a 3.65 eV band gap value obtained from optical method.

Multi-layer MOS capacitor based polarization insensitive electro-optic intensity modulator.

PubMed

Qiu, Xiaoming; Ruan, Xiaoke; Li, Yanping; Zhang, Fan

2018-05-28

In this study, a multi-layer metal-oxide-semiconductor capacitor (MLMOSC) polarization insensitive modulator is proposed. The design is validated by numerical simulation with commercial software LUMERICAL SOLUTION. Based on the epsilon-near-zero (ENZ) effect of indium tin oxide (ITO), the device manages to uniformly modulate both the transverse electric (TE) and the transverse magnetic (TM) modes. With a 20μm-long double-layer metal-oxide-semiconductor capacitor (DLMOSC) polarization insensitive modulator, in which two metal-oxide-semiconductor (MOS) structures are formed by the n-doped Si/HfO 2 /ITO/HfO 2 / n-doped Si stack, the extinction ratios (ERs) of both the TE and the TM modes can be over 20dB. The polarization dependent losses of the device can be as low as 0.05dB for the "OFF" state and 0.004dB for the "ON" state. Within 1dB polarization dependent loss, the device can operate with over 20dB ERs at the S, C, and L bands. The polarization insensitive modulator offers various merits including ultra-compact size, broadband spectrum, and complementary metal oxide semiconductor (CMOS) compatibility.

Probing dynamic behavior of electric fields and band diagrams in complex semiconductor heterostructures

NASA Astrophysics Data System (ADS)

Turkulets, Yury; Shalish, Ilan

2018-01-01

Modern bandgap engineered electronic devices are typically made of multi-semiconductor multi-layer heterostructures that pose a major challenge to silicon-era characterization methods. As a result, contemporary bandgap engineering relies mostly on simulated band structures that are hardly ever verified experimentally. Here, we present a method that experimentally evaluates bandgap, band offsets, and electric fields, in complex multi-semiconductor layered structures, and it does so simultaneously in all the layers. The method uses a modest optical photocurrent spectroscopy setup at ambient conditions. The results are analyzed using a simple model for electro-absorption. As an example, we apply the method to a typical GaN high electron mobility transistor structure. Measurements under various external electric fields allow us to experimentally construct band diagrams, not only at equilibrium but also under any other working conditions of the device. The electric fields are then used to obtain the charge carrier density and mobility in the quantum well as a function of the gate voltage over the entire range of operating conditions of the device. The principles exemplified here may serve as guidelines for the development of methods for simultaneous characterization of all the layers in complex, multi-semiconductor structures.

Optimal convolution SOR acceleration of waveform relaxation with application to semiconductor device simulation

NASA Technical Reports Server (NTRS)

Reichelt, Mark

1993-01-01

In this paper we describe a novel generalized SOR (successive overrelaxation) algorithm for accelerating the convergence of the dynamic iteration method known as waveform relaxation. A new convolution SOR algorithm is presented, along with a theorem for determining the optimal convolution SOR parameter. Both analytic and experimental results are given to demonstrate that the convergence of the convolution SOR algorithm is substantially faster than that of the more obvious frequency-independent waveform SOR algorithm. Finally, to demonstrate the general applicability of this new method, it is used to solve the differential-algebraic system generated by spatial discretization of the time-dependent semiconductor device equations.

Sintered silver joints via controlled topography of electronic packaging subcomponents

DOEpatents

Wereszczak, Andrew A.

2014-09-02

Disclosed are sintered silver bonded electronic package subcomponents and methods for making the same. Embodiments of the sintered silver bonded EPSs include topography modification of one or more metal surfaces of semiconductor devices bonded together by the sintered silver joint. The sintered silver bonded EPSs include a first semiconductor device having a first metal surface, the first metal surface having a modified topography that has been chemically etched, grit blasted, uniaxial ground and/or grid sliced connected to a second semiconductor device which may also include a first metal surface with a modified topography, a silver plating layer on the first metal surface of the first semiconductor device and a silver plating layer on the first metal surface of the second semiconductor device and a sintered silver joint between the silver plating layers of the first and second semiconductor devices which bonds the first semiconductor device to the second semiconductor device.

Temperature control of power semiconductor devices in traction applications

NASA Astrophysics Data System (ADS)

Pugachev, A. A.; Strekalov, N. N.

2017-02-01

The peculiarity of thermal management of traction frequency converters of a railway rolling stock is highlighted. The topology and the operation principle of the automatic temperature control system of power semiconductor modules of the traction frequency converter are designed and discussed. The features of semiconductors as an object of temperature control are considered; the equivalent circuit of thermal processes in the semiconductors is suggested, the power losses in the two-level voltage source inverters are evaluated and analyzed. The dynamic properties and characteristics of the cooling fan induction motor electric drive with the scalar control are presented. The results of simulation in Matlab are shown for the steady state of thermal processes.

Reducing leakage current in semiconductor devices

DOEpatents

Lu, Bin; Matioli, Elison de Nazareth; Palacios, Tomas Apostol

2018-03-06

A semiconductor device includes a first region having a first semiconductor material and a second region having a second semiconductor material. The second region is formed over the first region. The semiconductor device also includes a current blocking structure formed in the first region between first and second terminals of the semiconductor device. The current blocking structure is configured to reduce current flow in the first region between the first and second terminals.

Methods and devices for fabricating and assembling printable semiconductor elements

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nuzzo, Ralph G.; Rogers, John A.; Menard, Etienne

The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.

Methods and devices for fabricating and assembling printable semiconductor elements

DOEpatents

Nuzzo, Ralph G; Rogers, John A; Menard, Etienne; Lee, Keon Jae; Khang, Dahl-Young; Sun, Yugang; Meitl, Matthew; Zhu, Zhengtao

2014-03-04

The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.

Pulsed Laser System to Simulate Effects of Cosmic Rays in Semiconductor Devices

NASA Technical Reports Server (NTRS)

Aveline, David C.; Adell, Philippe C.; Allen, Gregory R.; Guertin, Steven M.; McClure, Steven S.

2011-01-01

Spaceflight system electronic devices must survive a wide range of radiation environments with various particle types including energetic protons, electrons, gamma rays, x-rays, and heavy ions. High-energy charged particles such as heavy ions can pass straight through a semiconductor material and interact with a charge-sensitive region, generating a significant amount of charge (electron-hole pairs) along their tracks. These excess charges can damage the device, and the response can range from temporary perturbations to permanent changes in the state or performance. These phenomena are called single event effects (SEE). Before application in flight systems, electronic parts need to be qualified and tested for performance and radiation sensitivity. Typically, their susceptibility to SEE is tested by exposure to an ion beam from a particle accelerator. At such facilities, the device under test (DUT) is irradiated with large beams so there is no fine resolution to investigate particular regions of sensitivity on the parts. While it is the most reliable approach for radiation qualification, these evaluations are time consuming and costly. There is always a need for new cost-efficient strategies to complement accelerator testing: pulsed lasers provide such a solution. Pulsed laser light can be utilized to simulate heavy ion effects with the advantage of being able to localize the sensitive region of an integrated circuit. Generally, a focused laser beam of approximately picosecond pulse duration is used to generate carrier density in the semiconductor device. During irradiation, the laser pulse is absorbed by the electronic medium with a wavelength selected accordingly by the user, and the laser energy can ionize and simulate SEE as would occur in space. With a tightly focused near infrared (NIR) laser beam, the beam waist of about a micrometer can be achieved, and additional scanning techniques are able to yield submicron resolution. This feature allows mapping of all of the sensitive regions of the studied device with fine resolution, unlike heavy ion experiments. The problematic regions can be precisely identified, and it provides a considerable amount of information about the circuit. In addition, the system allows flexibility for testing the device in different configurations in situ.

Methods of producing free-standing semiconductors using sacrificial buffer layers and recyclable substrates

DOEpatents

Ptak, Aaron Joseph; Lin, Yong; Norman, Andrew; Alberi, Kirstin

2015-05-26

A method of producing semiconductor materials and devices that incorporate the semiconductor materials are provided. In particular, a method is provided of producing a semiconductor material, such as a III-V semiconductor, on a spinel substrate using a sacrificial buffer layer, and devices such as photovoltaic cells that incorporate the semiconductor materials. The sacrificial buffer material and semiconductor materials may be deposited using lattice-matching epitaxy or coincident site lattice-matching epitaxy, resulting in a close degree of lattice matching between the substrate material and deposited material for a wide variety of material compositions. The sacrificial buffer layer may be dissolved using an epitaxial liftoff technique in order to separate the semiconductor device from the spinel substrate, and the spinel substrate may be reused in the subsequent fabrication of other semiconductor devices. The low-defect density semiconductor materials produced using this method result in the enhanced performance of the semiconductor devices that incorporate the semiconductor materials.

SIERRA - A 3-D device simulator for reliability modeling

NASA Astrophysics Data System (ADS)

Chern, Jue-Hsien; Arledge, Lawrence A., Jr.; Yang, Ping; Maeda, John T.

1989-05-01

SIERRA is a three-dimensional general-purpose semiconductor-device simulation program which serves as a foundation for investigating integrated-circuit (IC) device and reliability issues. This program solves the Poisson and continuity equations in silicon under dc, transient, and small-signal conditions. Executing on a vector/parallel minisupercomputer, SIERRA utilizes a matrix solver which uses an incomplete LU (ILU) preconditioned conjugate gradient square (CGS, BCG) method. The ILU-CGS method provides a good compromise between memory size and convergence rate. The authors have observed a 5x to 7x speedup over standard direct methods in simulations of transient problems containing highly coupled Poisson and continuity equations such as those found in reliability-oriented simulations. The application of SIERRA to parasitic CMOS latchup and dynamic random-access memory single-event-upset studies is described.

Design and Analysis of CMOS-Compatible III-V Compound Electron-Hole Bilayer Tunneling Field-Effect Transistor for Ultra-Low-Power Applications.

PubMed

Kim, Sung Yoon; Seo, Jae Hwa; Yoon, Young Jun; Lee, Ho-Young; Lee, Seong Min; Cho, Seongjae; Kang, In Man

2015-10-01

In this work, we design and analyze complementary metal-oxide-semiconductor (CMOS)-compatible III-V compound electron-hole bilayer (EHB) tunneling field-effect transistors (TFETs) by using two-dimensional (2D) technology computer-aided design (TCAD) simulations. A recently proposed EHB TFET exploits a bias-induced band-to-band tunneling (BTBT) across the electron-hole bilayer by an electric field from the top and bottom gates. This is in contrast to conventional planar p(+)-p(-)-n TFETs, which utilize BTBT across the source-to-channel junction. We applied III-V compound semiconductor materials to the EHB TFETs in order to enhance the current drivability and switching performance. Devices based on various compound semiconductor materials have been designed and analyzed in terms of their primary DC characteristics. In addition, the operational principles were validated by close examination of the electron concentrations and energy-band diagrams under various operation conditions. The simulation results of the optimally designed In0.533Ga0.47As EHB TFET show outstanding performance, with an on-state current (Ion) of 249.5 μA/μm, subthreshold swing (S) of 11.4 mV/dec, and threshold voltage (Vth) of 50 mV at VDS = 0.5 V. Based on the DC-optimized InGaAs EHB TFET, the CMOS inverter circuit was simulated in views of static and dynamic behaviors of the p-channel device with exchanges between top and bottom gates or between source and drain electrodes maintaining the device structure.

Ge/IIIV fin field-effect transistor common gate process and numerical simulations

NASA Astrophysics Data System (ADS)

Chen, Bo-Yuan; Chen, Jiann-Lin; Chu, Chun-Lin; Luo, Guang-Li; Lee, Shyong; Chang, Edward Yi

2017-04-01

This study investigates the manufacturing process of thermal atomic layer deposition (ALD) and analyzes its thermal and physical mechanisms. Moreover, experimental observations and computational fluid dynamics (CFD) are both used to investigate the formation and deposition rate of a film for precisely controlling the thickness and structure of the deposited material. First, the design of the TALD system model is analyzed, and then CFD is used to simulate the optimal parameters, such as gas flow and the thermal, pressure, and concentration fields, in the manufacturing process to assist the fabrication of oxide-semiconductors and devices based on them, and to improve their characteristics. In addition, the experiment applies ALD to grow films on Ge and GaAs substrates with three-dimensional (3-D) transistors having high electric performance. The electrical analysis of dielectric properties, leakage current density, and trapped charges for the transistors is conducted by high- and low-frequency measurement instruments to determine the optimal conditions for 3-D device fabrication. It is anticipated that the competitive strength of such devices in the semiconductor industry will be enhanced by the reduction of cost and improvement of device performance through these optimizations.

Aging of electronics with application to nuclear power plant instrumentation. [PWR; BWR

DOE Office of Scientific and Technical Information (OSTI.GOV)

Johnson, Jr, R T; Thome, F V; Craft, C M

1983-01-01

A survey to identify areas of needed research to understand aging mechanisms for electronics in nuclear power plant instrumentation has been completed. The emphasis was on electronic components such as semiconductors, capacitors, and resistors used in safety-related instrumentation in the reactor containment area. The environmental and operational stress factors which may produce degradation during long-term operation were identified. Some attention was also given to humidity effects as related to seals and encapsulants, and failures in printed circuit boards and bonds and solder joints. Results suggest that neutron as well as gamma irradiations should be considered in simulating the aging environmentmore » for electronic components. Radiation dose-rate effects in semiconductor devices and organic capacitors need to be further investigated, as well as radiation-voltage bias synergistic effects in semiconductor devices and leakage and permeation of moisture through seals in electronics packages.« less

Creating semiconductor metafilms with designer absorption spectra

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kim, Soo Jin; Fan, Pengyu; Kang, Ju-Hyung

The optical properties of semiconductors are typically considered intrinsic and fixed. Here we leverage the rapid developments in the field of optical metamaterials to create ultrathin semiconductor metafilms with designer absorption spectra. We show how such metafilms can be constructed by placing one or more types of high-index semiconductor antennas into a dense array with subwavelength spacings. It is argued that the large absorption cross-section of semiconductor antennas and their weak near-field coupling open a unique opportunity to create strongly absorbing metafilms whose spectral absorption properties directly reflect those of the individual antennas. Using experiments and simulations, we demonstrate thatmore » near-unity absorption at one or more target wavelengths of interest can be achieved in a sub-50-nm-thick metafilm using judiciously sized and spaced Ge nanobeams. The ability to create semiconductor metafilms with custom absorption spectra opens up new design strategies for planar optoelectronic devices and solar cells.« less

A tapered dielectric waveguide solar concentrator for a compound semiconductor photovoltaic cell.

PubMed

Park, Minkyu; Oh, Kyunghwan; Kim, Jeong; Shin, Hyun Woo; Oh, Byung Du

2010-01-18

A novel tapered dielectric waveguide solar concentrator is proposed for compound semiconductor solar cells utilizing optical fiber preform. Its light collecting capability is numerically simulated and experimentally demonstrated for feasibility and potential assessments. Utilizing tapered shape of an optical fiber preform with a step-index profile, low loss guidance was enhanced and the limitation in the acceptance angle of solar radiation was alleviated by an order of magnitude. Using a solar simulator the device performances were experimentally investigated and discussed in terms of the photocurrent improvements. Total acceptance angle exceeding +/- 6 degrees was experimentally achieved sustaining a high solar flux.

Analysis of fluctuations in semiconductor devices

NASA Astrophysics Data System (ADS)

Andrei, Petru

The random nature of ion implantation and diffusion processes as well as inevitable tolerances in fabrication result in random fluctuations of doping concentrations and oxide thickness in semiconductor devices. These fluctuations are especially pronounced in ultrasmall (nanoscale) semiconductor devices when the spatial scale of doping and oxide thickness variations become comparable with the geometric dimensions of devices. In the dissertation, the effects of these fluctuations on device characteristics are analyzed by using a new technique for the analysis of random doping and oxide thickness induced fluctuations. This technique is universal in nature in the sense that it is applicable to any transport model (drift-diffusion, semiclassical transport, quantum transport etc.) and it can be naturally extended to take into account random fluctuations of the oxide (trapped) charges and channel length. The technique is based on linearization of the transport equations with respect to the fluctuating quantities. It is computationally much (a few orders of magnitude) more efficient than the traditional Monte-Carlo approach and it yields information on the sensitivity of fluctuations of parameters of interest (e.g. threshold voltage, small-signal parameters, cut-off frequencies, etc.) to the locations of doping and oxide thickness fluctuations. For this reason, it can be very instrumental in the design of fluctuation-resistant structures of semiconductor devices. Quantum mechanical effects are taken into account by using the density-gradient model as well as through self-consistent Poisson-Schrodinger computations. Special attention is paid to the presenting of the technique in a form that is suitable for implementation on commercial device simulators. The numerical implementation of the technique is discussed in detail and numerous computational results are presented and compared with those previously published in literature.

Investigation of Short Channel Effects on Device Performance for 60nm NMOS Transistor

NASA Astrophysics Data System (ADS)

Chinnappan, U.; Sanudin, R.

2017-08-01

In the aggressively scaled complementary metal oxide semiconductor (CMOS) devices, shallower p-n junctions and low sheet resistances are essential for short-channel effect (SCE) control and high device performance. The SCE are attributed to two physical phenomena that are the limitation imposed on electron drift characteristics in channel and the modification of the threshold voltage (Vth) due to the shortening channel length. The decrement of Vth with decrement in gate length is a well-known attribute in SCE known as “threshold voltage roll-off’. In this research, the Technology Computer Aided Design (TCAD) was used to model the SCE phenomenon effect on 60nm n-type metal oxide semiconductor (NMOS) transistor. There are three parameters being investigated, which are the oxide thickness (Tox), gate length (L), acceptor concentration (Na). The simulation data were used to visualise the effect of SCE on the 60nm NMOS transistor. Simulation data suggest that all three parameters have significant effect on Vth, and hence on the transistor performance. It is concluded that there is a trade-off among these three parameters to obtain an optimized transistor performance.

Investigation of the DSMC Approach for Ion/neutral Species in Modeling Low Pressure Plasma Reactor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Deng Hao; Li, Z.; Levin, D.

2011-05-20

Low pressure plasma reactors are important tools for ionized metal physical vapor deposition (IMPVD), a semiconductor plasma processing technology that is increasingly being applied to deposit Cu seed layers on semiconductor surfaces of trenches and vias with the high aspect ratio (e.g., >5:1). A large fraction of ionized atoms produced by the IMPVD process leads to an anisotropic deposition flux towards the substrate, a feature which is critical for attaining a void-free and uniform fill. Modeling such devices is challenging due to their high plasma density, reactive environment, but low gas pressure. A modular code developed by the Computational Opticalmore » and Discharge Physics Group, the Hybrid Plasma Equipment Model (HPEM), has been successfully applied to the numerical investigations of IMPVD by modeling a hollow cathode magnetron (HCM) device. However, as the development of semiconductor devices progresses towards the lower pressure regime (e.g., <5 mTorr), the breakdown of the continuum assumption limits the application of the fluid model in HPEM and suggests the incorporation of the kinetic method, such as the direct simulation Monte Carlo (DSMC), in the plasma simulation.The DSMC method, which solves the Boltzmann equation of transport, has been successfully applied in modeling micro-fluidic flows in MEMS devices with low Reynolds numbers, a feature shared with the HCM. Modeling of the basic physical and chemical processes for ion/neutral species in plasma have been developed and implemented in DSMC, which include ion particle motion due to the Lorentz force, electron impact reactions, charge exchange reactions, and charge recombination at the surface. The heating of neutrals due to collisions with ions and the heating of ions due to the electrostatic field will be shown to be captured by the DSMC simulations. In this work, DSMC calculations were coupled with the modules from HPEM so that the plasma can be self-consistently solved. Differences in the Ar results, the dominant species in the reactor, produced by the DSMC-HPEM coupled simulation will be shown in comparison with the original HPEM results. The effects of the DSMC calculations for ion/neutral species on HPEM plasma simulation will be further analyzed.« less

Soft error rate simulation and initial design considerations of neutron intercepting silicon chip (NISC)

NASA Astrophysics Data System (ADS)

Celik, Cihangir

Advances in microelectronics result in sub-micrometer electronic technologies as predicted by Moore's Law, 1965, which states the number of transistors in a given space would double every two years. The most available memory architectures today have submicrometer transistor dimensions. The International Technology Roadmap for Semiconductors (ITRS), a continuation of Moore's Law, predicts that Dynamic Random Access Memory (DRAM) will have an average half pitch size of 50 nm and Microprocessor Units (MPU) will have an average gate length of 30 nm over the period of 2008-2012. Decreases in the dimensions satisfy the producer and consumer requirements of low power consumption, more data storage for a given space, faster clock speed, and portability of integrated circuits (IC), particularly memories. On the other hand, these properties also lead to a higher susceptibility of IC designs to temperature, magnetic interference, power supply, and environmental noise, and radiation. Radiation can directly or indirectly affect device operation. When a single energetic particle strikes a sensitive node in the micro-electronic device, it can cause a permanent or transient malfunction in the device. This behavior is called a Single Event Effect (SEE). SEEs are mostly transient errors that generate an electric pulse which alters the state of a logic node in the memory device without having a permanent effect on the functionality of the device. This is called a Single Event Upset (SEU) or Soft Error . Contrary to SEU, Single Event Latchup (SEL), Single Event Gate Rapture (SEGR), or Single Event Burnout (SEB) they have permanent effects on the device operation and a system reset or recovery is needed to return to proper operations. The rate at which a device or system encounters soft errors is defined as Soft Error Rate (SER). The semiconductor industry has been struggling with SEEs and is taking necessary measures in order to continue to improve system designs in nano-scale technologies. Prevention of SEEs has been studied and applied in the semiconductor industry by including radiation protection precautions in the system architecture or by using corrective algorithms in the system operation. Decreasing 10B content (20%of natural boron) in the natural boron of Borophosphosilicate glass (BPSG) layers that are conventionally used in the fabrication of semiconductor devices was one of the major radiation protection approaches for the system architecture. Neutron interaction in the BPSG layer was the origin of the SEEs because of the 10B (n,alpha) 7Li reaction products. Both of the particles produced have the capability of ionization in the silicon substrate region, whose thickness is comparable to the ranges of these particles. Using the soft error phenomenon in exactly the opposite manner of the semiconductor industry can provide a new neutron detection system based on the SERs in the semiconductor memories. By investigating the soft error mechanisms in the available semiconductor memories and enhancing the soft error occurrences in these devices, one can convert all memory using intelligent systems into portable, power efficient, directiondependent neutron detectors. The Neutron Intercepting Silicon Chip (NISC) project aims to achieve this goal by introducing 10B-enriched BPSG layers to the semiconductor memory architectures. This research addresses the development of a simulation tool, the NISC Soft Error Analysis Tool (NISCSAT), for soft error modeling and analysis in the semiconductor memories to provide basic design considerations for the NISC. NISCSAT performs particle transport and calculates the soft error probabilities, or SER, depending on energy depositions of the particles in a given memory node model of the NISC. Soft error measurements were performed with commercially available, off-the-shelf semiconductor memories and microprocessors to observe soft error variations with the neutron flux and memory supply voltage. Measurement results show that soft errors in the memories increase proportionally with the neutron flux, whereas they decrease with increasing the supply voltages. NISC design considerations include the effects of device scaling, 10B content in the BPSG layer, incoming neutron energy, and critical charge of the node for this dissertation. NISCSAT simulations were performed with various memory node models to account these effects. Device scaling simulations showed that any further increase in the thickness of the BPSG layer beyond 2 mum causes self-shielding of the incoming neutrons due to the BPSG layer and results in lower detection efficiencies. Moreover, if the BPSG layer is located more than 4 mum apart from the depletion region in the node, there are no soft errors in the node due to the fact that both of the reaction products have lower ranges in the silicon or any possible node layers. Calculation results regarding the critical charge indicated that the mean charge deposition of the reaction products in the sensitive volume of the node is about 15 fC. It is evident that the NISC design should have a memory architecture with a critical charge of 15 fC or less to obtain higher detection efficiencies. Moreover, the sensitive volume should be placed in close proximity to the BPSG layers so that its location would be within the range of alpha and 7Li particles. Results showed that the distance between the BPSG layer and the sensitive volume should be less than 2 mum to increase the detection efficiency of the NISC. Incoming neutron energy was also investigated by simulations and the results obtained from these simulations showed that NISC neutron detection efficiency is related with the neutron cross-sections of 10B (n,alpha) 7Li reaction, e.g., ratio of the thermal (0.0253 eV) to fast (2 MeV) neutron detection efficiencies is approximately equal to 8000:1. Environmental conditions and their effects on the NISC performance were also studied in this research. Cosmic rays were modeled and simulated via NISCSAT to investigate detection reliability of the NISC. Simulation results show that cosmic rays account for less than 2 % of the soft errors for the thermal neutron detection. On the other hand, fast neutron detection by the NISC, which already has a poor efficiency due to the low neutron cross-sections, becomes almost impossible at higher altitudes where the cosmic ray fluxes and their energies are higher. NISCSAT simulations regarding soft error dependency of the NISC for temperature and electromagnetic fields show that there are no significant effects in the NISC detection efficiency. Furthermore, the detection efficiency of the NISC decreases with both air humidity and use of moderators since the incoming neutrons scatter away before reaching the memory surface.

A 3D TCAD simulation of a thermoelectric module configured for thermoelectric power generation, cooling and heating

NASA Astrophysics Data System (ADS)

Gould, C. A.; Shammas, N. Y. A.; Grainger, S.; Taylor, I.; Simpson, K.

2012-06-01

This paper documents the 3D modeling and simulation of a three couple thermoelectric module using the Synopsys Technology Computer Aided Design (TCAD) semiconductor simulation software. Simulation results are presented for thermoelectric power generation, cooling and heating, and successfully demonstrate the basic thermoelectric principles. The 3D TCAD simulation model of a three couple thermoelectric module can be used in the future to evaluate different thermoelectric materials, device structures, and improve the efficiency and performance of thermoelectric modules.

Testing methods and techniques: Testing electrical and electronic devices: A compilation

NASA Technical Reports Server (NTRS)

1972-01-01

The methods, techniques, and devices used in testing various electrical and electronic apparatus are presented. The items described range from semiconductor package leak detectors to automatic circuit analyzer and antenna simulators for system checkout. In many cases the approaches can result in considerable cost savings and improved quality control. The testing of various electronic components, assemblies, and systems; the testing of various electrical devices; and the testing of cables and connectors are explained.

Collection-limited theory interprets the extraordinary response of single semiconductor organic solar cells

PubMed Central

Ray, Biswajit; Baradwaj, Aditya G.; Khan, Mohammad Ryyan; Boudouris, Bryan W.; Alam, Muhammad Ashraful

2015-01-01

The bulk heterojunction (BHJ) organic photovoltaic (OPV) architecture has dominated the literature due to its ability to be implemented in devices with relatively high efficiency values. However, a simpler device architecture based on a single organic semiconductor (SS-OPV) offers several advantages: it obviates the need to control the highly system-dependent nanoscale BHJ morphology, and therefore, would allow the use of broader range of organic semiconductors. Unfortunately, the photocurrent in standard SS-OPV devices is typically very low, which generally is attributed to inefficient charge separation of the photogenerated excitons. Here we show that the short-circuit current density from SS-OPV devices can be enhanced significantly (∼100-fold) through the use of inverted device configurations, relative to a standard OPV device architecture. This result suggests that charge generation may not be the performance bottleneck in OPV device operation. Instead, poor charge collection, caused by defect-induced electric field screening, is most likely the primary performance bottleneck in regular-geometry SS-OPV cells. We justify this hypothesis by: (i) detailed numerical simulations, (ii) electrical characterization experiments of functional SS-OPV devices using multiple polymers as active layer materials, and (iii) impedance spectroscopy measurements. Furthermore, we show that the collection-limited photocurrent theory consistently interprets typical characteristics of regular SS-OPV devices. These insights should encourage the design and OPV implementation of high-purity, high-mobility polymers, and other soft materials that have shown promise in organic field-effect transistor applications, but have not performed well in BHJ OPV devices, wherein they adopt less-than-ideal nanostructures when blended with electron-accepting materials. PMID:26290582

Collection-limited theory interprets the extraordinary response of single semiconductor organic solar cells.

PubMed

Ray, Biswajit; Baradwaj, Aditya G; Khan, Mohammad Ryyan; Boudouris, Bryan W; Alam, Muhammad Ashraful

2015-09-08

The bulk heterojunction (BHJ) organic photovoltaic (OPV) architecture has dominated the literature due to its ability to be implemented in devices with relatively high efficiency values. However, a simpler device architecture based on a single organic semiconductor (SS-OPV) offers several advantages: it obviates the need to control the highly system-dependent nanoscale BHJ morphology, and therefore, would allow the use of broader range of organic semiconductors. Unfortunately, the photocurrent in standard SS-OPV devices is typically very low, which generally is attributed to inefficient charge separation of the photogenerated excitons. Here we show that the short-circuit current density from SS-OPV devices can be enhanced significantly (∼100-fold) through the use of inverted device configurations, relative to a standard OPV device architecture. This result suggests that charge generation may not be the performance bottleneck in OPV device operation. Instead, poor charge collection, caused by defect-induced electric field screening, is most likely the primary performance bottleneck in regular-geometry SS-OPV cells. We justify this hypothesis by: (i) detailed numerical simulations, (ii) electrical characterization experiments of functional SS-OPV devices using multiple polymers as active layer materials, and (iii) impedance spectroscopy measurements. Furthermore, we show that the collection-limited photocurrent theory consistently interprets typical characteristics of regular SS-OPV devices. These insights should encourage the design and OPV implementation of high-purity, high-mobility polymers, and other soft materials that have shown promise in organic field-effect transistor applications, but have not performed well in BHJ OPV devices, wherein they adopt less-than-ideal nanostructures when blended with electron-accepting materials.

The simulation of air recirculation and fire/explosion phenomena within a semiconductor factory.

PubMed

I, Yet-Pole; Chiu, Yi-Long; Wu, Shi-Jen

2009-04-30

The semiconductor industry is the collection of capital-intensive firms that employ a variety of hazardous chemicals and engage in the design and fabrication of semiconductor devices. Owing to its processing characteristics, the fully confined structure of the fabrication area (fab) and the vertical airflow ventilation design restrict the applications of traditional consequence analysis techniques that are commonly used in other industries. The adverse situation also limits the advancement of a fire/explosion prevention design for the industry. In this research, a realistic model of a semiconductor factory with a fab, sub-fabrication area, supply air plenum, and return air plenum structures was constructed and the computational fluid dynamics algorithm was employed to simulate the possible fire/explosion range and its severity. The semiconductor factory has fan module units with high efficiency particulate air filters that can keep the airflow uniform within the cleanroom. This condition was modeled by 25 fans, three layers of porous ceiling, and one layer of porous floor. The obtained results predicted very well the real airflow pattern in the semiconductor factory. Different released gases, leak locations, and leak rates were applied to investigate their influence on the hazard range and severity. Common mitigation measures such as a water spray system and a pressure relief panel were also provided to study their potential effectiveness to relieve thermal radiation and overpressure hazards within a fab. The semiconductor industry can use this simulation procedure as a reference on how to implement a consequence analysis for a flammable gas release accident within an air recirculation cleanroom.

Charge Behaviors around Oxide Device/Pseudo-Physiological Solution Interface with Molecular Dynamic Simulations

NASA Astrophysics Data System (ADS)

Maekawa, Yuki; Shibuta, Yasushi; Sakata, Toshiya

2013-12-01

In this study, we investigated the charge behaviors of ions and water molecules at the oxide device/pseudo-physiological solution interface by use of molecular dynamics (MD) simulations because the detection principle of semiconductor-based biosensors is based on the detection of charge density changes at the oxide sensing surface in physiological environments. In particular, we designed an alpha-quartz (100) surface with some charges corresponding to pH=5.5 so that the ionic behaviors for 500 mM each of Na+ and Cl- around the interface were calculated under the surface condition with charges, considering a real system. As a result of the simulation, we defined the region of Debye length from the calculated potential distribution, in which some parameters such as diffusion coefficient and the vibration of water molecules around the interface differed from those of the bulk solution. The elucidation of the solid/liquid interfacial behaviors by the simulation technique should deepen our understanding of the detection principle of semiconductor-based biosensors and will give guidelines for the design of a bio-interface in the field of biosensing technology, because they cannot be demonstrated experimentally.

Hybrid molecular dynamics simulation for plasma induced damage analysis

NASA Astrophysics Data System (ADS)

Matsukuma, Masaaki

2016-09-01

In order to enable further device size reduction (also known as Moore's law) and improved power performance, the semiconductor industry is introducing new materials and device structures into the semiconductor fabrication process. Materials now include III-V compounds, germanium, cobalt, ruthenium, hafnium, and others. The device structure in both memory and logic has been evolving from planar to three dimensional (3D). One such device is the FinFET, where the transistor gate is a vertical fin made either of silicon, silicon-germanium or germanium. These changes have brought renewed interests in the structural damages caused by energetic ion bombardment of the fin sidewalls which are exposed to the ion flux from the plasma during the fin-strip off step. Better control of the physical damage of the 3D devices requires a better understanding of the damage formation mechanisms on such new materials and structures. In this study, the damage formation processes by ion bombardment have been simulated for Si and Ge substrate by Quantum Mechanics/Molecular Mechanics (QM/MM) hybrid simulations and compared to the results from the classical molecular dynamics (MD) simulations. In our QM/MM simulations, the highly reactive region in which the structural damage is created is simulated with the Density Functional based Tight Binding (DFTB) method and the region remote from the primary region is simulated using classical MD with the Stillinger-Weber and Moliere potentials. The learn on the fly method is also used to reduce the computational load. Hence our QM/MM simulation is much faster than the full QC-MD simulations and the original QM/MM simulations. The amorphous layers profile simulated with QM/MM have obvious differences in their thickness for silicon and germanium substrate. The profile of damaged structure in the germanium substrate is characterized by a deeper tail then in silicon. These traits are also observed in the results from the mass selected ion beam experiments. This observed damage profile dependence on species and substrate cannot be reproduced using classical MD simulations. While the Moliere potential is convenient to describe the interactions between halogens and other atoms, more accurate interatomic modeling such as DFTB method which takes the molecular orbitals into account should be utilized to make the simulations more realistic. Based on the simulations results, the damage formation scenario will be discussed.

Microscopic properties of ionic liquid/organic semiconductor interfaces revealed by molecular dynamics simulations.

PubMed

Yokota, Yasuyuki; Miyamoto, Hiroo; Imanishi, Akihito; Takeya, Jun; Inagaki, Kouji; Morikawa, Yoshitada; Fukui, Ken-Ichi

2018-05-09

Electric double-layer transistors based on ionic liquid/organic semiconductor interfaces have been extensively studied during the past decade because of their high carrier densities at low operation voltages. Microscopic structures and the dynamics of ionic liquids likely determine the device performance; however, knowledge of these is limited by a lack of appropriate experimental tools. In this study, we investigated ionic liquid/organic semiconductor interfaces using molecular dynamics to reveal the microscopic properties of ionic liquids. The organic semiconductors include pentacene, rubrene, fullerene, and 7,7,8,8-tetracyanoquinodimethane (TCNQ). While ionic liquids close to the substrate always form the specific layered structures, the surface properties of organic semiconductors drastically alter the ionic dynamics. Ionic liquids at the fullerene interface behave as a two-dimensional ionic crystal because of the energy gain derived from the favorable electrostatic interaction on the corrugated periodic substrate.

Operation and biasing for single device equivalent to CMOS

DOEpatents

Welch, James D.

2001-01-01

Disclosed are semiconductor devices including at least one junction which is rectifying whether the semiconductor is caused to be N or P-type, by the presence of field induced carriers. In particular, inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to conventional multiple device CMOS systems, which can be operated as modulators, are disclosed as are a non-latching SCR and an approach to blocking parasitic currents. Operation of the gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems under typical bias schemes is described, and simple demonstrative five mask fabrication procedures for the inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems are also presented.

Modeling and simulation of floating gate nanocrystal FET devices and circuits

NASA Astrophysics Data System (ADS)

Hasaneen, El-Sayed A. M.

The nonvolatile memory market has been growing very fast during the last decade, especially for mobile communication systems. The Semiconductor Industry Association International Technology Roadmap for Semiconductors states that the difficult challenge for nonvolatile semiconductor memories is to achieve reliable, low power, low voltage performance and high-speed write/erase. This can be achieved by aggressive scaling of the nonvolatile memory cells. Unfortunately, scaling down of conventional nonvolatile memory will further degrade the retention time due to the charge loss between the floating gate and drain/source contacts and substrate which makes conventional nonvolatile memory unattractive. Using nanocrystals as charge storage sites reduces dramatically the charge leakage through oxide defects and drain/source contacts. Floating gate nanocrystal nonvolatile memory, FG-NCNVM, is a candidate for future memory because it is advantageous in terms of high-speed write/erase, small size, good scalability, low-voltage, low-power applications, and the capability to store multiple bits per cell. Many studies regarding FG-NCNVMs have been published. Most of them have dealt with fabrication improvements of the devices and device characterizations. Due to the promising FG-NCNVM applications in integrated circuits, there is a need for circuit a simulation model to simulate the electrical characteristics of the floating gate devices. In this thesis, a FG-NCNVM circuit simulation model has been proposed. It is based on the SPICE BSIM simulation model. This model simulates the cell behavior during normal operation. Model validation results have been presented. The SPICE model shows good agreement with experimental results. Current-voltage characteristics, transconductance and unity gain frequency (fT) have been studied showing the effect of the threshold voltage shift (DeltaVth) due to nanocrystal charge on the device characteristics. The threshold voltage shift due to nanocrystal charge has a strong effect on the memory characteristics. Also, the programming operation of the memory cell has been investigated. The tunneling rate from quantum well channel to quantum dot (nanocrystal) gate is calculated. The calculations include various memory parameters, wavefunctions, and energies of quantum well channel and quantum dot gate. The use of floating gate nanocrystal memory as a transistor with a programmable threshold voltage has been demonstrated. The incorporation of FG-NCFETs to design programmable integrated circuit building blocks has been discussed. This includes the design of programmable current and voltage reference circuits. Finally, we demonstrated the design of tunable gain op-amp incorporating FG-NCFETs. Programmable integrated circuit building blocks can be used in intelligent analog and digital systems.

Simulation of Devices with Molecular Potentials

DTIC Science & Technology

2013-12-22

10] W. R. Frensley, Wigner - function model of a resonant-tunneling semiconductor de- vice, Phys. Rev. B, 36 (1987), pp. 1570–1580. 6 [11] M. J...develop the principal investigator’s Wigner -Poisson code and extend that code to deal with longer devices and more complex barrier profiles. Over...Research Triangle Park, NC 27709-2211 Molecular Confirmation, Sparse Interpolation, Wigner -Poisson Equation, Parallel Algorithms REPORT DOCUMENTATION PAGE 11

Multi-color Long Wavelength Infrared Detectors Based On III-V Semiconductors

DTIC Science & Technology

2010-07-30

both interband and intersubband transitions that form the basis of may optoelectronic devices. The research performed under this grant made it...based on interband and intersubband transitions in InAs and InGaAs QDs as a means for room temperature, multi-color photodetection in the visible...AM1.5 standard solar simulator. DOPING EFFECT ON INTERBAND AND INTERSUBBAND MULTICOLOR INFRARED PHOTODETECTORS: First, many samples and devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nuzzo, Ralph G.; Rogers, John A.; Menard, Etienne

The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.

Optically switched graphene/4H-SiC junction bipolar transistor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chandrashekhar, MVS; Sudarshan, Tangali S.; Omar, Sabih U.

A bi-polar device is provided, along with methods of making the same. The bi-polar device can include a semiconductor substrate doped with a first dopant, a semiconductor layer on the first surface of the semiconductor substrate, and a Schottky barrier layer on the semiconductor layer. The method of forming a bi-polar device can include: forming a semiconductor layer on a first surface of a semiconductor substrate, where the semiconductor substrate comprises a first dopant and where the semiconductor layer comprises a second dopant that has an opposite polarity than the first dopant; and forming a Schottky barrier layer on amore » first portion of the semiconductor layer while leaving a second portion of the semiconductor layer exposed.« less

Computational insights into charge transfer across functionalized semiconductor surfaces

NASA Astrophysics Data System (ADS)

Kearney, Kara; Rockett, Angus; Ertekin, Elif

2017-12-01

Photoelectrochemical water-splitting is a promising carbon-free fuel production method for producing H2 and O2 gas from liquid water. These cells are typically composed of at least one semiconductor photoelectrode which is prone to degradation and/or oxidation. Various surface modifications are known for stabilizing semiconductor photoelectrodes, yet stabilization techniques are often accompanied by a decrease in photoelectrode performance. However, the impact of surface modification on charge transport and its consequence on performance is still lacking, creating a roadblock for further improvements. In this review, we discuss how density functional theory and finite-element device simulations are reliable tools for providing insight into charge transport across modified photoelectrodes.

Semiconductor devices having a recessed electrode structure

DOEpatents

Palacios, Tomas Apostol; Lu, Bin; Matioli, Elison de Nazareth

2015-05-26

An electrode structure is described in which conductive regions are recessed into a semiconductor region. Trenches may be formed in a semiconductor region, such that conductive regions can be formed in the trenches. The electrode structure may be used in semiconductor devices such as field effect transistors or diodes. Nitride-based power semiconductor devices are described including such an electrode structure, which can reduce leakage current and otherwise improve performance.

Collection-limited theory interprets the extraordinary response of single semiconductor organic solar cells

DOE PAGES

Ray, Biswajit; Baradwaj, Aditya G.; Khan, Mohammad Ryyan; ...

2015-08-19

The bulk heterojunction (BHJ) organic photovoltaic (OPV) architecture has dominated the literature due to its ability to be implemented in devices with relatively high efficiency values. However, a simpler device architecture based on a single organic semiconductor (SS-OPV) offers several advantages: it obviates the need to control the highly system-dependent nanoscale BHJ morphology, and therefore, would allow the use of broader range of organic semiconductors. Unfortunately, the photocurrent in standard SS-OPV devices is typically very low, which generally is attributed to inefficient charge separation of the photogenerated excitons. In this paper, we show that the short-circuit current density from SS-OPVmore » devices can be enhanced significantly (~100-fold) through the use of inverted device configurations, relative to a standard OPV device architecture. This result suggests that charge generation may not be the performance bottleneck in OPV device operation. Instead, poor charge collection, caused by defect-induced electric field screening, is most likely the primary performance bottleneck in regular-geometry SS-OPV cells. We justify this hypothesis by: ( i) detailed numerical simulations, ( ii) electrical characterization experiments of functional SS-OPV devices using multiple polymers as active layer materials, and ( iii) impedance spectroscopy measurements. Furthermore, we show that the collection-limited photocurrent theory consistently interprets typical characteristics of regular SS-OPV devices. Finally, these insights should encourage the design and OPV implementation of high-purity, high-mobility polymers, and other soft materials that have shown promise in organic field-effect transistor applications, but have not performed well in BHJ OPV devices, wherein they adopt less-than-ideal nanostructures when blended with electron-accepting materials.« less

Compact modeling of total ionizing dose and aging effects in MOS technologies

DOE PAGES

Esqueda, Ivan S.; Barnaby, Hugh J.; King, Michael Patrick

2015-06-18

This paper presents a physics-based compact modeling approach that incorporates the impact of total ionizing dose (TID) and stress-induced defects into simulations of metal-oxide-semiconductor (MOS) devices and integrated circuits (ICs). This approach utilizes calculations of surface potential (ψs) to capture the charge contribution from oxide trapped charge and interface traps and to describe their impact on MOS electrostatics and device operating characteristics as a function of ionizing radiation exposure and aging effects. The modeling approach is demonstrated for bulk and silicon-on-insulator (SOI) MOS device. The formulation is verified using TCAD simulations and through the comparison of model calculations and experimentalmore » I-V characteristics from irradiated devices. The presented approach is suitable for modeling TID and aging effects in advanced MOS devices and ICs.« less

Combining experiment and optical simulation in coherent X-ray nanobeam characterization of Si/SiGe semiconductor heterostructures

DOE PAGES

Tilka, J. A.; Park, J.; Ahn, Y.; ...

2016-07-06

Here, the highly coherent and tightly focused x-ray beams produced by hard x-ray light sources enable the nanoscale characterization of the structure of electronic materials but are accompanied by significant challenges in the interpretation of diffraction and scattering patterns. X-ray nanobeams exhibit optical coherence combined with a large angular divergence introduced by the x-ray focusing optics. The scattering of nanofocused x-ray beams from intricate semiconductor heterostructures produces a complex distribution of scattered intensity. We report here an extension of coherent xray optical simulations of convergent x-ray beam diffraction patterns to arbitrary x-ray incident angles to allow the nanobeam diffraction patternsmore » of complex heterostructures to be simulated faithfully. These methods are used to extract the misorientation of lattice planes and the strain of individual layers from synchrotron x-ray nanobeam diffraction patterns of Si/SiGe heterostructures relevant to applications in quantum electronic devices. The systematic interpretation of nanobeam diffraction patterns from semiconductor heterostructures presents a new opportunity in characterizing and ultimately designing electronic materials.« less

Atomic-scale investigations of current and future devices: from nitride-based transistors to quantum computing

NASA Astrophysics Data System (ADS)

Gordon, Luke

Our era is defined by its technology, and our future is dependent on its continued evolution. Over the past few decades, we have witnessed the expansion of advanced technology into all walks of life and all industries, driven by the exponential increase in the speed and power of semiconductor-based devices. However, as the length scale of devices reaches the atomic scale, a deep understanding of atomistic theory and its application is increasingly crucial. In order to illustrate the power of an atomistic approach to understanding devices, we will present results and conclusions from three interlinked projects: n-type doping of III-nitride semiconductors, defects for quantum computing, and macroscopic simulations of devices. First, we will study effective n-type doping of III-nitride semiconductors and their alloys, and analyze the barriers to effective n-type doping of III-nitrides and their alloys. In particular, we will study the formation of DX centers, and predict alloy composition onsets for various III-nitride alloys. In addition, we will perform a comprehensive study of alternative dopants, and provide potential alternative dopants to improve n-type conductivity in AlN and wide-band-gap nitride alloys. Next, we will discuss how atomic-scale defects can act as a curse for the development of quantum computers by contributing to decoherence at an atomic scale, specifically investigating the effect of two-level state defects (TLS) systems in alumina as a source of decoherence in superconducting qubits based on Josephson junctions; and also as a blessing, by allowing the identification of wholly new qubits in different materials, specifically showing calculations on defects in SiC for quantum computing applications. Finally, we will provide examples of recent calculations we have performed for devices using macrosopic device simulations, largely in conjunction with first-principles calculations. Specifically, we will discuss the power of using a multi-scale approach to accurately model oxide and nitride-based heterostructures, and thereby illustrate our ability to predict device performance on scales unreachable using a purely first-principles approach.

Plasma Properties of an Exploding Semiconductor Igniter

NASA Astrophysics Data System (ADS)

McGuirk, J. S.; Thomas, K. A.; Shaffer, E.; Malone, A. L.; Baginski, T.; Baginski, M. E.

1997-11-01

Requirements by the automotive industry for low-cost, pyrotechnic igniters for automotive airbags have led to the development of several semiconductor devices. The properties of the plasma produced by the vaporization of an exploding semiconductor are necessary in order to minimize the electrical energy requirements. This work considers two silicon-based semiconductor devices: the semiconductor bridge (SCB) and the semiconductor junction igniter both consisting of etched silicon with vapor deposited aluminum structures. Electrical current passing through the device heats a narrow junction region to the point of vaporization creating an aluminum and silicon low-temperature plasma. This work will investigate the electrical characteristics of both devices and infer the plasma properties. Furthermore optical spectral measurements will be taken of the exploding devices to estimate the temperature and density of the plasma.

CIRCUS--A digital computer program for transient analysis of electronic circuits

NASA Technical Reports Server (NTRS)

Moore, W. T.; Steinbert, L. L.

1968-01-01

Computer program simulates the time domain response of an electronic circuit to an arbitrary forcing function. CIRCUS uses a charge-control parameter model to represent each semiconductor device. Given the primary photocurrent, the transient behavior of a circuit in a radiation environment is determined.

Tunable molecular orientation and elevated thermal stability of vapor-deposited organic semiconductors

PubMed Central

Walters, Diane M.; Lyubimov, Ivan; de Pablo, Juan J.; Ediger, M. D.

2015-01-01

Physical vapor deposition is commonly used to prepare organic glasses that serve as the active layers in light-emitting diodes, photovoltaics, and other devices. Recent work has shown that orienting the molecules in such organic semiconductors can significantly enhance device performance. We apply a high-throughput characterization scheme to investigate the effect of the substrate temperature (Tsubstrate) on glasses of three organic molecules used as semiconductors. The optical and material properties are evaluated with spectroscopic ellipsometry. We find that molecular orientation in these glasses is continuously tunable and controlled by Tsubstrate/Tg, where Tg is the glass transition temperature. All three molecules can produce highly anisotropic glasses; the dependence of molecular orientation upon substrate temperature is remarkably similar and nearly independent of molecular length. All three compounds form “stable glasses” with high density and thermal stability, and have properties similar to stable glasses prepared from model glass formers. Simulations reproduce the experimental trends and explain molecular orientation in the deposited glasses in terms of the surface properties of the equilibrium liquid. By showing that organic semiconductors form stable glasses, these results provide an avenue for systematic performance optimization of active layers in organic electronics. PMID:25831545

Contact formation and gettering of precipitated impurities by multiple firing during semiconductor device fabrication

DOEpatents

Sopori, Bhushan

2014-05-27

Methods for contact formation and gettering of precipitated impurities by multiple firing during semiconductor device fabrication are provided. In one embodiment, a method for fabricating an electrical semiconductor device comprises: a first step that includes gettering of impurities from a semiconductor wafer and forming a backsurface field; and a second step that includes forming a front contact for the semiconductor wafer, wherein the second step is performed after completion of the first step.

Intensity noise properties of a compact laser device based on a miniaturized MOPA system for spectroscopic applications

NASA Astrophysics Data System (ADS)

Baumgärtner, S.; Juhl, S.; Opalevs, D.; Sahm, A.; Hofmann, J.; Leisching, P.; Paschke, K.

2018-02-01

We present a novel compact laser device based on a semiconductor master-oscillator power-amplifier (MOPA) emitting at 772 nm, suitable for quantum optic and spectroscopy. The optical performance of the laser device is characterized. For miniaturized lasers the thermal management is challenging, we therefore perform thermal simulations and measurements. The first demonstrator is emitting more than 3 W optical power with a linewidth below 2lMHz. Using this MOPA design also compact devices for quantum optics (e.g. rubidium atomic clock) and seed lasers for frequency conversion can be realized [1].

Simulations of Resonant Intraband and Interband Tunneling Spin Filters

NASA Technical Reports Server (NTRS)

Ting, David; Cartoixa-Soler, Xavier; McGill, T. C.; Smith, Darryl L.; Schulman, Joel N.

2001-01-01

This viewgraph presentation reviews resonant intraband and interband tunneling spin filters It explores the possibility of building a zero-magnetic-field spin polarizer using nonmagnetic III-V semiconductor heterostructures. It reviews the extensive simulations of quantum transport in asymmetric InAs/GaSb/AlSb resonant tunneling structures with Rashba spin splitting and proposes a. new device concept: side-gated asymmetric Resonant Interband Tunneling Diode (a-RITD).

Efficient semiconductor light-emitting device and method

DOEpatents

Choquette, Kent D.; Lear, Kevin L.; Schneider, Jr., Richard P.

1996-01-01

A semiconductor light-emitting device and method. The semiconductor light-emitting device is provided with at least one control layer or control region which includes an annular oxidized portion thereof to channel an injection current into the active region, and to provide a lateral refractive index profile for index guiding the light generated within the device. A periodic composition grading of at least one of the mirror stacks in the device provides a reduced operating voltage of the device. The semiconductor light-emitting device has a high efficiency for light generation, and may be formed either as a resonant-cavity light-emitting diode (RCLED) or as a vertical-cavity surface-emitting laser (VCSEL).

Efficient semiconductor light-emitting device and method

DOEpatents

Choquette, K.D.; Lear, K.L.; Schneider, R.P. Jr.

1996-02-20

A semiconductor light-emitting device and method are disclosed. The semiconductor light-emitting device is provided with at least one control layer or control region which includes an annular oxidized portion thereof to channel an injection current into the active region, and to provide a lateral refractive index profile for index guiding the light generated within the device. A periodic composition grading of at least one of the mirror stacks in the device provides a reduced operating voltage of the device. The semiconductor light-emitting device has a high efficiency for light generation, and may be formed either as a resonant-cavity light-emitting diode (RCLED) or as a vertical-cavity surface-emitting laser (VCSEL). 12 figs.

A full time-domain approach to spatio-temporal dynamics of semiconductor lasers. II. Spatio-temporal dynamics

NASA Astrophysics Data System (ADS)

Böhringer, Klaus; Hess, Ortwin

The spatio-temporal dynamics of novel semiconductor lasers is discussed on the basis of a space- and momentum-dependent full time-domain approach. To this means the space-, time-, and momentum-dependent Full-Time Domain Maxwell Semiconductor Bloch equations, derived and discussed in our preceding paper I [K. Böhringer, O. Hess, A full time-domain approach to spatio-temporal dynamics of semiconductor lasers. I. Theoretical formulation], are solved by direct numerical integration. Focussing on the device physics of novel semiconductor lasers that profit, in particular, from recent advances in nanoscience and nanotechnology, we discuss the examples of photonic band edge surface emitting lasers (PBE-SEL) and semiconductor disc lasers (SDLs). It is demonstrated that photonic crystal effects can be obtained for finite crystal structures, and leading to a significant improvement in laser performance such as reduced lasing thresholds. In SDLs, a modern device concept designed to increase the power output of surface-emitters in combination with near-diffraction-limited beam quality, we explore the complex interplay between the intracavity optical fields and the quantum well gain material in SDL structures. Our simulations reveal the dynamical balance between carrier generation due to pumping into high energy states, momentum relaxation of carriers, and stimulated recombination from states near the band edge. Our full time-domain approach is shown to also be an excellent framework for the modelling of the interaction of high-intensity femtosecond and picosecond pulses with semiconductor nanostructures. It is demonstrated that group velocity dispersion, dynamical gain saturation and fast self-phase modulation (SPM) are the main causes for the induced changes and asymmetries in the amplified pulse shape and spectrum of an ultrashort high-intensity pulse. We attest that the time constants of the intraband scattering processes are critical to gain recovery. Moreover, we present new insight into the physics of nonlinear coherent pulse propagation phenomena in active (semiconductor) gain media. Our numerical full time-domain simulations are shown to generally agree well with analytical predictions, while in the case of optical pulses with large pulse areas or few-cycle pulses they reveal the limits of analytic approaches. Finally, it is demonstrated that coherent ultrafast nonlinear propagation effects become less distinctive if we apply a realistic model of the quantum well semiconductor gain material, consider characteristic loss channels and take into account de-phasing processes and homogeneous broadening.

Monte Carlo simulation of semiconductor detector response to (222)Rn and (220)Rn environments.

PubMed

Irlinger, J; Trinkl, S; Wielunksi, M; Tschiersch, J; Rühm, W

2016-07-01

A new electronic radon/thoron monitor employing semiconductor detectors based on a passive diffusion chamber design has been recently developed at the Helmholtz Zentrum München (HMGU). This device allows for acquisition of alpha particle energy spectra, in order to distinguish alpha particles originating from radon and radon progeny decays, as well as those originating from thoron and its progeny decays. A Monte-Carlo application is described which uses the Geant4 toolkit to simulate these alpha particle spectra. Reasonable agreement between measured and simulated spectra were obtained for both (220)Rn and (222)Rn, in the energy range between 1 and 10 MeV. Measured calibration factors could be reproduced by the simulation, given the uncertainties involved in the measurement and simulation. The simulated alpha particle spectra can now be used to interpret spectra measured in mixed radon/thoron atmospheres. The results agreed well with measurements performed in both radon and thoron gas environments. It is concluded that the developed simulation allows for an accurate prediction of calibration factors and alpha particle energy spectra. Copyright © 2016 Elsevier Ltd. All rights reserved.

Enhanced thermaly managed packaging for III-nitride light emitters

NASA Astrophysics Data System (ADS)

Kudsieh, Nicolas

In this Dissertation our work on `enhanced thermally managed packaging of high power semiconductor light sources for solid state lighting (SSL)' is presented. The motivation of this research and development is to design thermally high stable cost-efficient packaging of single and multi-chip arrays of III-nitrides wide bandgap semiconductor light sources through mathematical modeling and simulations. Major issues linked with this technology are device overheating which causes serious degradation in their illumination intensity and decrease in the lifetime. In the introduction the basics of III-nitrides WBG semiconductor light emitters are presented along with necessary thermal management of high power cingulated and multi-chip LEDs and laser diodes. This work starts at chip level followed by its extension to fully packaged lighting modules and devices. Different III-nitride structures of multi-quantum well InGaN/GaN and AlGaN/GaN based LEDs and LDs were analyzed using advanced modeling and simulation for different packaging designs and high thermal conductivity materials. Study started with basic surface mounted devices using conventional packaging strategies and was concluded with the latest thermal management of chip-on-plate (COP) method. Newly discovered high thermal conductivity materials have also been incorporated for this work. Our study also presents the new approach of 2D heat spreaders using such materials for SSL and micro LED array packaging. Most of the work has been presented in international conferences proceedings and peer review journals. Some of the latest work has also been submitted to well reputed international journals which are currently been reviewed for publication. .

Electroluminescent devices formed using semiconductor nanocrystals as an electron transport media and method of making such electroluminescent devices

DOEpatents

Alivisatos, A. Paul; Colvin, Vickie

1996-01-01

An electroluminescent device is described, as well as a method of making same, wherein the device is characterized by a semiconductor nanocrystal electron transport layer capable of emitting visible light in response to a voltage applied to the device. The wavelength of the light emitted by the device may be changed by changing either the size or the type of semiconductor nanocrystals used in forming the electron transport layer. In a preferred embodiment the device is further characterized by the capability of emitting visible light of varying wavelengths in response to changes in the voltage applied to the device. The device comprises a hole processing structure capable of injecting and transporting holes, and usually comprising a hole injecting layer and a hole transporting layer; an electron transport layer in contact with the hole processing structure and comprising one or more layers of semiconductor nanocrystals; and an electron injecting layer in contact with the electron transport layer for injecting electrons into the electron transport layer. The capability of emitting visible light of various wavelengths is principally based on the variations in voltage applied thereto, but the type of semiconductor nanocrystals used and the size of the semiconductor nanocrystals in the layers of semiconductor nanometer crystals may also play a role in color change, in combination with the change in voltage.

New method of contour-based mask-shape compiler

NASA Astrophysics Data System (ADS)

Matsuoka, Ryoichi; Sugiyama, Akiyuki; Onizawa, Akira; Sato, Hidetoshi; Toyoda, Yasutaka

2007-10-01

We have developed a new method of accurately profiling a mask shape by utilizing a Mask CD-SEM. The method is intended to realize high accuracy, stability and reproducibility of the Mask CD-SEM adopting an edge detection algorithm as the key technology used in CD-SEM for high accuracy CD measurement. In comparison with a conventional image processing method for contour profiling, it is possible to create the profiles with much higher accuracy which is comparable with CD-SEM for semiconductor device CD measurement. In this report, we will introduce the algorithm in general, the experimental results and the application in practice. As shrinkage of design rule for semiconductor device has further advanced, an aggressive OPC (Optical Proximity Correction) is indispensable in RET (Resolution Enhancement Technology). From the view point of DFM (Design for Manufacturability), a dramatic increase of data processing cost for advanced MDP (Mask Data Preparation) for instance and surge of mask making cost have become a big concern to the device manufacturers. In a sense, it is a trade-off between the high accuracy RET and the mask production cost, while it gives a significant impact on the semiconductor market centered around the mask business. To cope with the problem, we propose the best method for a DFM solution in which two dimensional data are extracted for an error free practical simulation by precise reproduction of a real mask shape in addition to the mask data simulation. The flow centering around the design data is fully automated and provides an environment where optimization and verification for fully automated model calibration with much less error is available. It also allows complete consolidation of input and output functions with an EDA system by constructing a design data oriented system structure. This method therefore is regarded as a strategic DFM approach in the semiconductor metrology.

Rational In Silico Design of an Organic Semiconductor with Improved Electron Mobility.

PubMed

Friederich, Pascal; Gómez, Verónica; Sprau, Christian; Meded, Velimir; Strunk, Timo; Jenne, Michael; Magri, Andrea; Symalla, Franz; Colsmann, Alexander; Ruben, Mario; Wenzel, Wolfgang

2017-11-01

Organic semiconductors find a wide range of applications, such as in organic light emitting diodes, organic solar cells, and organic field effect transistors. One of their most striking disadvantages in comparison to crystalline inorganic semiconductors is their low charge-carrier mobility, which manifests itself in major device constraints such as limited photoactive layer thicknesses. Trial-and-error attempts to increase charge-carrier mobility are impeded by the complex interplay of the molecular and electronic structure of the material with its morphology. Here, the viability of a multiscale simulation approach to rationally design materials with improved electron mobility is demonstrated. Starting from one of the most widely used electron conducting materials (Alq 3 ), novel organic semiconductors with tailored electronic properties are designed for which an improvement of the electron mobility by three orders of magnitude is predicted and experimentally confirmed. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Method and apparatus for use of III-nitride wide bandgap semiconductors in optical communications

DOEpatents

Hui, Rongqing [Lenexa, KS; Jiang, Hong-Xing [Manhattan, KS; Lin, Jing-Yu [Manhattan, KS

2008-03-18

The present disclosure relates to the use of III-nitride wide bandgap semiconductor materials for optical communications. In one embodiment, an optical device includes an optical waveguide device fabricated using a III-nitride semiconductor material. The III-nitride semiconductor material provides for an electrically controllable refractive index. The optical waveguide device provides for high speed optical communications in an infrared wavelength region. In one embodiment, an optical amplifier is provided using optical coatings at the facet ends of a waveguide formed of erbium-doped III-nitride semiconductor materials.

Reliability Prediction Models for Discrete Semiconductor Devices

DTIC Science & Technology

1988-07-01

influence failure rate were device construction, semiconductor material, junction temperature, electrical stress, circuit application., a plication...found to influence failure rate were device construction, semiconductor material, junction temperature, electrical stress, circuit application...MFA Airbreathlng 14issile, Flight MFF Missile, Free Flight ML Missile, Launch MMIC Monolithic Microwave Integrated Circuits MOS Metal-Oxide

Co-integration of nano-scale vertical- and horizontal-channel metal-oxide-semiconductor field-effect transistors for low power CMOS technology.

PubMed

Sun, Min-Chul; Kim, Garam; Kim, Sang Wan; Kim, Hyun Woo; Kim, Hyungjin; Lee, Jong-Ho; Shin, Hyungcheol; Park, Byung-Gook

2012-07-01

In order to extend the conventional low power Si CMOS technology beyond the 20-nm node without SOI substrates, we propose a novel co-integration scheme to build horizontal- and vertical-channel MOSFETs together and verify the idea using TCAD simulations. From the fabrication viewpoint, it is highlighted that this scheme provides additional vertical devices with good scalability by adding a few steps to the conventional CMOS process flow for fin formation. In addition, the benefits of the co-integrated vertical devices are investigated using a TCAD device simulation. From this study, it is confirmed that the vertical device shows improved off-current control and a larger drive current when the body dimension is less than 20 nm, due to the electric field coupling effect at the double-gated channel. Finally, the benefits from the circuit design viewpoint, such as the larger midpoint gain and beta and lower power consumption, are confirmed by the mixed-mode circuit simulation study.

Methods of forming semiconductor devices and devices formed using such methods

DOEpatents

Fox, Robert V; Rodriguez, Rene G; Pak, Joshua

2013-05-21

Single source precursors are subjected to carbon dioxide to form particles of material. The carbon dioxide may be in a supercritical state. Single source precursors also may be subjected to supercritical fluids other than supercritical carbon dioxide to form particles of material. The methods may be used to form nanoparticles. In some embodiments, the methods are used to form chalcopyrite materials. Devices such as, for example, semiconductor devices may be fabricated that include such particles. Methods of forming semiconductor devices include subjecting single source precursors to carbon dioxide to form particles of semiconductor material, and establishing electrical contact between the particles and an electrode.

Monolithic master oscillator power amplifier at 1.58 μm for lidar measurements

NASA Astrophysics Data System (ADS)

Faugeron, M.; Krakowski, M.; Robert, Y.; Vinet, E.; Primiani, P.; Le Goëc, J. P.; Parillaud, O.; van Dijk, F.; Vilera, M.; Consoli, A.; Tijero, J. M. G.; Esquivias, I.

2017-11-01

Nowadays the interest in high power semiconductor devices is growing for applications such as telemetry, lidar system or free space communications. Indeed semiconductor devices can be an alternative to solid state lasers because they are more compact and less power consuming. These characteristics are very important for constrained and/or low power supply environment such as airplanes or satellites. Lots of work has been done in the 800-1200 nm range for integrated and free space Master Oscillator Power Amplifier (MOPA) [1]-[3]. At 1.5 μm, the only commercially available MOPA is from QPC [4]: the fibred output power is about 700 mW and the optical linewidth is 500 kHz. In this paper, we first report on the simulations we have done to determine the appropriate vertical structure and architecture for a good MOPA at 1.58 μm (section II). Then we describe the fabrication of the devices (section III). Finally we report on the optical and electrical measurements we have done for various devices (section IV).

High performance low voltage organic field effect transistors on plastic substrate for amplifier circuits

NASA Astrophysics Data System (ADS)

Houin, G.; Duez, F.; Garcia, L.; Cantatore, E.; Torricelli, F.; Hirsch, L.; Belot, D.; Pellet, C.; Abbas, M.

2016-09-01

The high performance air stable organic semiconductor small molecule dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT) was chosen as active layer for field effect transistors built to realize flexible amplifier circuits. Initial device on rigid Si/SiO2 substrate showed appreciable performance with hysteresis-free characteristics. A number of approaches were applied to simplify the process, improve device performance and decrease the operating voltage: they include an oxide interfacial layer to decrease contact resistance; a polymer passivation layer to optimize semiconductor/dielectric interface and an anodized high-k oxide as dielectric layer for low voltage operation. The devices fabricated on plastic substrate yielded excellent electrical characteristics, showing mobility of 1.6 cm2/Vs, lack of hysteresis, operation below 5 V and on/off current ratio above 105. An OFET model based on variable ranging hopping theory was used to extract the relevant parameters from the transfer and output characteristics, which enabled us to simulate our devices achieving reasonable agreement with the measurements

Radiation hardening of metal-oxide semi-conductor (MOS) devices by boron

NASA Technical Reports Server (NTRS)

Danchenko, V.

1974-01-01

Technique using boron effectively protects metal-oxide semiconductor devices from ionizing radiation without using shielding materials. Boron is introduced into insulating gate oxide layer at semiconductor-insulator interface.

Coincident site lattice-matched growth of semiconductors on substrates using compliant buffer layers

DOEpatents

Norman, Andrew

2016-08-23

A method of producing semiconductor materials and devices that incorporate the semiconductor materials are provided. In particular, a method is provided of producing a semiconductor material, such as a III-V semiconductor, on a silicon substrate using a compliant buffer layer, and devices such as photovoltaic cells that incorporate the semiconductor materials. The compliant buffer material and semiconductor materials may be deposited using coincident site lattice-matching epitaxy, resulting in a close degree of lattice matching between the substrate material and deposited material for a wide variety of material compositions. The coincident site lattice matching epitaxial process, as well as the use of a ductile buffer material, reduce the internal stresses and associated crystal defects within the deposited semiconductor materials fabricated using the disclosed method. As a result, the semiconductor devices provided herein possess enhanced performance characteristics due to a relatively low density of crystal defects.

40 CFR 63.7195 - What definitions apply to this subpart?

Code of Federal Regulations, 2012 CFR

2012-07-01

... units used to manufacture p-type and n-type semiconductors or active solid state devices from a wafer.... Examples of semiconductor or related solid state devices include semiconductor diodes, semiconductor stacks... permanently attached to motor vehicles such as trucks, railcars, barges, or ships; (2) Flow-through tanks...

40 CFR 63.7195 - What definitions apply to this subpart?

Code of Federal Regulations, 2013 CFR

2013-07-01

... units used to manufacture p-type and n-type semiconductors or active solid state devices from a wafer.... Examples of semiconductor or related solid state devices include semiconductor diodes, semiconductor stacks... permanently attached to motor vehicles such as trucks, railcars, barges, or ships; (2) Flow-through tanks...

40 CFR 63.7195 - What definitions apply to this subpart?

Code of Federal Regulations, 2014 CFR

2014-07-01

... units used to manufacture p-type and n-type semiconductors or active solid state devices from a wafer.... Examples of semiconductor or related solid state devices include semiconductor diodes, semiconductor stacks... permanently attached to motor vehicles such as trucks, railcars, barges, or ships; (2) Flow-through tanks...

Origin of the performances degradation of two-dimensional-based metal-oxide-semiconductor field effect transistors in the sub-10 nm regime: A first-principles study

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lu, Anh Khoa Augustin; IMEC, 75 Kapeldreef, B-3001 Leuven; Pourtois, Geoffrey

2016-01-25

The impact of the scaling of the channel length on the performances of metal-oxide-semiconductor field effect transistors, based on two-dimensional (2D) channel materials, is theoretically investigated, using density functional theory combined with the non-equilibrium Green's function method. It is found that the scaling of the channel length below 10 nm leads to strong device performance degradations. Our simulations reveal that this degradation is essentially due to the tunneling current flowing between the source and the drain in these aggressively scaled devices. It is shown that this electron tunneling process is modulated by the effective mass of the 2D channel material, andmore » sets the limit of the scaling in future transistor designs.« less

Verilog-A Device Models for Cryogenic Temperature Operation of Bulk Silicon CMOS Devices

NASA Technical Reports Server (NTRS)

Akturk, Akin; Potbhare, Siddharth; Goldsman, Neil; Holloway, Michael

2012-01-01

Verilog-A based cryogenic bulk CMOS (complementary metal oxide semiconductor) compact models are built for state-of-the-art silicon CMOS processes. These models accurately predict device operation at cryogenic temperatures down to 4 K. The models are compatible with commercial circuit simulators. The models extend the standard BSIM4 [Berkeley Short-channel IGFET (insulated-gate field-effect transistor ) Model] type compact models by re-parameterizing existing equations, as well as adding new equations that capture the physics of device operation at cryogenic temperatures. These models will allow circuit designers to create optimized, reliable, and robust circuits operating at cryogenic temperatures.

Towards lead-free perovskite photovoltaics and optoelectronics by ab-initio simulations.

PubMed

Roknuzzaman, Md; Ostrikov, Kostya Ken; Wang, Hongxia; Du, Aijun; Tesfamichael, Tuquabo

2017-10-25

Lead (Pb) free non-toxic perovskite solar cells have become more important in the commercialization of the photovoltaic devices. In this study the structural, electronic, optical and mechanical properties of Pb-free inorganic metal halide cubic perovskites CsBX 3 (B = Sn, Ge; X = I, Br, Cl) for perovskite solar cells are simulated using first-principles Density Functional Theory (DFT). These compounds are semiconductors with direct band gap energy and mechanically stable. Results suggest that the materials have high absorption coefficient, low reflectivity and high optical conductivity with potential application in solar cells and other optoelectronic energy devices. On the basis of the optical properties, one can expect that the Germanium (Ge) would be a better replacement of Pb as Ge containing compounds have higher optical absorption and optical conductivity than that of Pb containing compounds. A combinational analysis of the electronic, optical and mechanical properties of the compounds suggests that CsGeI 3 based perovskite is the best Pb-free inorganic metal halide semiconductor for the solar cell application. However, the compound with solid solution of CsGe(I 0.7 Br 0.3 ) 3 is found to be mechanically more ductile than CsGeI 3 . This study will also guide to obtain Pb-free organic perovskites for optoelectronic devices.

Demonstration of hetero-gate-dielectric tunneling field-effect transistors (HG TFETs).

PubMed

Choi, Woo Young; Lee, Hyun Kook

2016-01-01

The steady scaling-down of semiconductor device for improving performance has been the most important issue among researchers. Recently, as low-power consumption becomes one of the most important requirements, there have been many researches about novel devices for low-power consumption. Though scaling supply voltage is the most effective way for low-power consumption, performance degradation is occurred for metal-oxide-semiconductor field-effect transistors (MOSFETs) when supply voltage is reduced because subthreshold swing (SS) of MOSFETs cannot be lower than 60 mV/dec. Thus, in this thesis, hetero-gate-dielectric tunneling field-effect transistors (HG TFETs) are investigated as one of the most promising alternatives to MOSFETs. By replacing source-side gate insulator with a high- k material, HG TFETs show higher on-current, suppressed ambipolar current and lower SS than conventional TFETs. Device design optimization through simulation was performed and fabrication based on simulation demonstrated that performance of HG TFETs were better than that of conventional TFETs. Especially, enlargement of gate insulator thickness while etching gate insulator at the source side was improved by introducing HF vapor etch process. In addition, the proposed HG TFETs showed higher performance than our previous results by changing structure of sidewall spacer by high- k etching process.

Charge carrier thermalization in organic diodes

PubMed Central

van der Kaap, N. J.; Koster, L. J. A.

2016-01-01

Charge carrier mobilities of organic semiconductors are often characterized using steady-state measurements of space charge limited diodes. These measurements assume that charge carriers are in a steady-state equilibrium. In reality, however, energetically hot carriers are introduces by photo-excitation and injection into highly energetic sites from the electrodes. These carriers perturb the equilibrium density of occupied states, and therefore change the overall charge transport properties. In this paper, we look into the effect of energetically hot carriers on the charge transport in organic semiconductors using steady state kinetic Monte Carlo simulations. For injected hot carriers in a typical organic semiconductor, rapid energetic relaxation occurs in the order of tens of nanoseconds, which is much faster than the typical transit time of a charge carrier throught the device. Furthermore, we investigate the impact of photo-generated carriers on the steady-state mobility. For a typical organic voltaic material, an increase in mobility of a factor of 1.1 is found. Therefore, we conclude that the impact of energetically hot carriers on normal device operation is limited. PMID:26791095

Inhomogeneous Oxygen Vacancy Distribution in Semiconductor Gas Sensors: Formation, Migration and Determination on Gas Sensing Characteristics

PubMed Central

Liu, Jianqiao; Gao, Yinglin; Wu, Xu; Jin, Guohua; Zhai, Zhaoxia; Liu, Huan

2017-01-01

The density of oxygen vacancies in semiconductor gas sensors was often assumed to be identical throughout the grain in the numerical discussion of the gas-sensing mechanism of the devices. In contrast, the actual devices had grains with inhomogeneous distribution of oxygen vacancy under non-ideal conditions. This conflict between reality and discussion drove us to study the formation and migration of the oxygen defects in semiconductor grains. A model of the gradient-distributed oxygen vacancy was proposed based on the effects of cooling rate and re-annealing on semiconductive thin films. The model established the diffusion equations of oxygen vacancy according to the defect kinetics of diffusion and exclusion. We described that the steady-state and transient-state oxygen vacancy distributions, which were used to calculate the gas-sensing characteristics of the sensor resistance and response to reducing gases under two different conditions. The gradient-distributed oxygen vacancy model had the applications in simulating the sensor performances, such as the power law, the grain size effect and the effect of depletion layer width. PMID:28796167

Inhomogeneous Oxygen Vacancy Distribution in Semiconductor Gas Sensors: Formation, Migration and Determination on Gas Sensing Characteristics.

PubMed

Liu, Jianqiao; Gao, Yinglin; Wu, Xu; Jin, Guohua; Zhai, Zhaoxia; Liu, Huan

2017-08-10

The density of oxygen vacancies in semiconductor gas sensors was often assumed to be identical throughout the grain in the numerical discussion of the gas-sensing mechanism of the devices. In contrast, the actual devices had grains with inhomogeneous distribution of oxygen vacancy under non-ideal conditions. This conflict between reality and discussion drove us to study the formation and migration of the oxygen defects in semiconductor grains. A model of the gradient-distributed oxygen vacancy was proposed based on the effects of cooling rate and re-annealing on semiconductive thin films. The model established the diffusion equations of oxygen vacancy according to the defect kinetics of diffusion and exclusion. We described that the steady-state and transient-state oxygen vacancy distributions, which were used to calculate the gas-sensing characteristics of the sensor resistance and response to reducing gases under two different conditions. The gradient-distributed oxygen vacancy model had the applications in simulating the sensor performances, such as the power law, the grain size effect and the effect of depletion layer width.

Low-voltage organic electronics based on a gate-tunable injection barrier in vertical graphene-organic semiconductor heterostructures.

PubMed

Hlaing, Htay; Kim, Chang-Hyun; Carta, Fabio; Nam, Chang-Yong; Barton, Rob A; Petrone, Nicholas; Hone, James; Kymissis, Ioannis

2015-01-14

The vertical integration of graphene with inorganic semiconductors, oxide semiconductors, and newly emerging layered materials has recently been demonstrated as a promising route toward novel electronic and optoelectronic devices. Here, we report organic thin film transistors based on vertical heterojunctions of graphene and organic semiconductors. In these thin heterostructure devices, current modulation is accomplished by tuning of the injection barriers at the semiconductor/graphene interface with the application of a gate voltage. N-channel devices fabricated with a thin layer of C60 show a room temperature on/off ratio >10(4) and current density of up to 44 mAcm(-2). Because of the ultrashort channel intrinsic to the vertical structure, the device is fully operational at a driving voltage of 200 mV. A complementary p-channel device is also investigated, and a logic inverter based on two complementary transistors is demonstrated. The vertical integration of graphene with organic semiconductors via simple, scalable, and low-temperature fabrication processes opens up new opportunities to realize flexible, transparent organic electronic, and optoelectronic devices.

Photoemission-based microelectronic devices

PubMed Central

Forati, Ebrahim; Dill, Tyler J.; Tao, Andrea R.; Sievenpiper, Dan

2016-01-01

The vast majority of modern microelectronic devices rely on carriers within semiconductors due to their integrability. Therefore, the performance of these devices is limited due to natural semiconductor properties such as band gap and electron velocity. Replacing the semiconductor channel in conventional microelectronic devices with a gas or vacuum channel may scale their speed, wavelength and power beyond what is available today. However, liberating electrons into gas/vacuum in a practical microelectronic device is quite challenging. It often requires heating, applying high voltages, or using lasers with short wavelengths or high powers. Here, we show that the interaction between an engineered resonant surface and a low-power infrared laser can cause enough photoemission via electron tunnelling to implement feasible microelectronic devices such as transistors, switches and modulators. The proposed photoemission-based devices benefit from the advantages of gas-plasma/vacuum electronic devices while preserving the integrability of semiconductor-based devices. PMID:27811946

Enhancement of ZnO-based flexible nano generators via a sol-gel technique for sensing and energy harvesting applications

NASA Astrophysics Data System (ADS)

Rajagopalan, P.; Singh, Vipul; Palani, I. A.

2018-03-01

Zinc oxide (ZnO) is a remarkable inorganic semiconductor with exceptional piezoelectric properties compared to other semiconductors. However, in comparison to lead-based hazardous piezoelectric materials, its properties have undesired limitations. Here we report a 5˜6 fold enhancement in piezoelectric features via chemical doping of copper matched to intrinsic ZnO. A flexible piezoelectric nanogenerator (F-PENG) device was fabricated using an unpretentious solution process of spin coating, with other advantages such as robustness, low-weight, improved adhesion, and low cost. The device was used to demonstrate energy harvesting from a standard weight as low as 4 gm and can work as a self-powered mass sensor in a broad range of 4 to 100 gm. The device exhibited a novel energy harvesting technique from a wind source due to its inherent flexibility. At three different velocities (10˜30 m s-1) and five different angles of attack (0˜180 degrees), the device validated the ability to discern different velocities and directions of flow. The device will be useful for mapping the flow of air apart from harvesting the energy. The simulation was done to verify the underlining mechanism of aerodynamics involved.

Enhancement of ZnO-based flexible nano generators via a sol-gel technique for sensing and energy harvesting applications.

PubMed

Rajagopalan, P; Singh, Vipul; Palani, I A

2018-02-01

Zinc oxide (ZnO) is a remarkable inorganic semiconductor with exceptional piezoelectric properties compared to other semiconductors. However, in comparison to lead-based hazardous piezoelectric materials, its properties have undesired limitations. Here we report a 5∼6 fold enhancement in piezoelectric features via chemical doping of copper matched to intrinsic ZnO. A flexible piezoelectric nanogenerator (F-PENG) device was fabricated using an unpretentious solution process of spin coating, with other advantages such as robustness, low-weight, improved adhesion, and low cost. The device was used to demonstrate energy harvesting from a standard weight as low as 4 gm and can work as a self-powered mass sensor in a broad range of 4 to 100 gm. The device exhibited a novel energy harvesting technique from a wind source due to its inherent flexibility. At three different velocities (10∼30 m s -1 ) and five different angles of attack (0∼180 degrees), the device validated the ability to discern different velocities and directions of flow. The device will be useful for mapping the flow of air apart from harvesting the energy. The simulation was done to verify the underlining mechanism of aerodynamics involved.

Novel failure mechanism and improvement for split-gate trench MOSFET with large current under unclamped inductive switch stress

NASA Astrophysics Data System (ADS)

Tian, Ye; Yang, Zhuo; Xu, Zhiyuan; Liu, Siyang; Sun, Weifeng; Shi, Longxing; Zhu, Yuanzheng; Ye, Peng; Zhou, Jincheng

2018-04-01

In this paper, a novel failure mechanism under unclamped inductive switch (UIS) for Split-Gate Trench Metal Oxide Semiconductor Field Effect Transistor (MOSFET) with large current is investigated. The device sample is tested and analyzed in detail. The simulation results demonstrate that the nonuniform potential distribution of the source poly should be responsible for the failure. Three structures are proposed and verified available to improve the device UIS ruggedness by TCAD simulation. The best one of the structures the device with source metal inserting into source poly through contacts in the field oxide is carried out and measured. The results demonstrate that the optimized structure can balance the trade-off between the UIS ruggedness and the static characteristics.

Tunable molecular orientation and elevated thermal stability of vapor-deposited organic semiconductors

DOE PAGES

Dalal, Shakeel S.; Walters, Diane M.; Lyubimov, Ivan; ...

2015-03-23

Physical vapor deposition is commonly used to prepare organic glasses that serve as the active layers in light-emitting diodes, photovoltaics, and other devices. Recent work has shown that orienting the molecules in such organic semiconductors can significantly enhance device performance. In this paper, we apply a high-throughput characterization scheme to investigate the effect of the substrate temperature (T substrate) on glasses of three organic molecules used as semiconductors. The optical and material properties are evaluated with spectroscopic ellipsometry. We find that molecular orientation in these glasses is continuously tunable and controlled by T substrate/T g, where T g is themore » glass transition temperature. All three molecules can produce highly anisotropic glasses; the dependence of molecular orientation upon substrate temperature is remarkably similar and nearly independent of molecular length. All three compounds form “stable glasses” with high density and thermal stability, and have properties similar to stable glasses prepared from model glass formers. Simulations reproduce the experimental trends and explain molecular orientation in the deposited glasses in terms of the surface properties of the equilibrium liquid. Finally, by showing that organic semiconductors form stable glasses, these results provide an avenue for systematic performance optimization of active layers in organic electronics.« less

Two-dimensional wide-band-gap nitride semiconductors: Single-layer 1 T -X N2 (X =S ,Se , and Te )

NASA Astrophysics Data System (ADS)

Lin, Jia-He; Zhang, Hong; Cheng, Xin-Lu; Miyamoto, Yoshiyuki

2016-11-01

Recently, the two-dimensional (2D) semiconductors arsenene and antimonene, with band gaps larger than 2.0 eV, have attracted tremendous interest, especially for potential applications in optoelectronic devices with a photoresponse in the blue and UV range. Motivated by this exciting discovery, types of highly stable wide-band-gap 2D nitride semiconductors were theoretically designed. We propose single-layer 1 T -X N2 (X =S , Se, and Te) via first-principles simulations. We compute 1 T -X N2 (X =S , Se, and Te) with indirect band gaps of 2.825, 2.351, and 2.336 eV, respectively. By applying biaxial strain, they are able to induce the transition from a wide-band-gap semiconductor to a metal, and the range of absorption spectra of 1 T -X N2 (X =S , Se, and Te) obviously extend from the ultraviolet region to the blue-purple light region. With an underlying graphene, we find that 1 T -X N2 can completely shield the light absorption of graphene in the range of 1-1.6 eV. Our research paves the way for optoelectronic devices working under blue or UV light, and mechanical sensors based on these 2D crystals.

Near-infrared light emitting device using semiconductor nanocrystals

DOE Office of Scientific and Technical Information (OSTI.GOV)

Supran, Geoffrey J.S.; Song, Katherine W.; Hwang, Gyuweon

A near-infrared light emitting device can include semiconductor nanocrystals that emit at wavelengths beyond 1 .mu.m. The semiconductor nanocrystals can include a core and an overcoating on a surface of the core.

Introduction to Semiconductor Devices

NASA Astrophysics Data System (ADS)

Brennan, Kevin F.

2005-03-01

This volume offers a solid foundation for understanding the most important devices used in the hottest areas of electronic engineering today, from semiconductor fundamentals to state-of-the-art semiconductor devices in the telecommunications and computing industries. Kevin Brennan describes future approaches to computing hardware and RF power amplifiers, and explains how emerging trends and system demands of computing and telecommunications systems influence the choice, design and operation of semiconductor devices. In addition, he covers MODFETs and MOSFETs, short channel effects, and the challenges faced by continuing miniaturization. His book is both an excellent senior/graduate text and a valuable reference for practicing engineers and researchers.

Computer-aided engineering of semiconductor integrated circuits

NASA Astrophysics Data System (ADS)

Meindl, J. D.; Dutton, R. W.; Gibbons, J. F.; Helms, C. R.; Plummer, J. D.; Tiller, W. A.; Ho, C. P.; Saraswat, K. C.; Deal, B. E.; Kamins, T. I.

1980-07-01

Economical procurement of small quantities of high performance custom integrated circuits for military systems is impeded by inadequate process, device and circuit models that handicap low cost computer aided design. The principal objective of this program is to formulate physical models of fabrication processes, devices and circuits to allow total computer-aided design of custom large-scale integrated circuits. The basic areas under investigation are (1) thermal oxidation, (2) ion implantation and diffusion, (3) chemical vapor deposition of silicon and refractory metal silicides, (4) device simulation and analytic measurements. This report discusses the fourth year of the program.

A review of recent advances in the spherical harmonics expansion method for semiconductor device simulation.

PubMed

Rupp, K; Jungemann, C; Hong, S-M; Bina, M; Grasser, T; Jüngel, A

The Boltzmann transport equation is commonly considered to be the best semi-classical description of carrier transport in semiconductors, providing precise information about the distribution of carriers with respect to time (one dimension), location (three dimensions), and momentum (three dimensions). However, numerical solutions for the seven-dimensional carrier distribution functions are very demanding. The most common solution approach is the stochastic Monte Carlo method, because the gigabytes of memory requirements of deterministic direct solution approaches has not been available until recently. As a remedy, the higher accuracy provided by solutions of the Boltzmann transport equation is often exchanged for lower computational expense by using simpler models based on macroscopic quantities such as carrier density and mean carrier velocity. Recent developments for the deterministic spherical harmonics expansion method have reduced the computational cost for solving the Boltzmann transport equation, enabling the computation of carrier distribution functions even for spatially three-dimensional device simulations within minutes to hours. We summarize recent progress for the spherical harmonics expansion method and show that small currents, reasonable execution times, and rare events such as low-frequency noise, which are all hard or even impossible to simulate with the established Monte Carlo method, can be handled in a straight-forward manner. The applicability of the method for important practical applications is demonstrated for noise simulation, small-signal analysis, hot-carrier degradation, and avalanche breakdown.

Predicting scattering scanning near-field optical microscopy of mass-produced plasmonic devices

NASA Astrophysics Data System (ADS)

Otto, Lauren M.; Burgos, Stanley P.; Staffaroni, Matteo; Ren, Shen; Süzer, Özgün; Stipe, Barry C.; Ashby, Paul D.; Hammack, Aeron T.

2018-05-01

Scattering scanning near-field optical microscopy enables optical imaging and characterization of plasmonic devices with nanometer-scale resolution well below the diffraction limit. This technique enables developers to probe and understand the waveguide-coupled plasmonic antenna in as-fabricated heat-assisted magnetic recording heads. In order to validate and predict results and to extract information from experimental measurements that is physically comparable to simulations, a model was developed to translate the simulated electric field into expected near-field measurements using physical parameters specific to scattering scanning near-field optical microscopy physics. The methods used in this paper prove that scattering scanning near-field optical microscopy can be used to determine critical sub-diffraction-limited dimensions of optical field confinement, which is a crucial metrology requirement for the future of nano-optics, semiconductor photonic devices, and biological sensing where the near-field character of light is fundamental to device operation.

Exploring the Short-Channel Characteristics of Asymmetric Junctionless Double-Gate Silicon-on-Nothing MOSFET

NASA Astrophysics Data System (ADS)

Saha, Priyanka; Banerjee, Pritha; Dash, Dinesh Kumar; Sarkar, Subir Kumar

2018-03-01

This paper presents an analytical model of an asymmetric junctionless double-gate (asymmetric DGJL) silicon-on-nothing metal-oxide-semiconductor field-effect transistor (MOSFET). Solving the 2-D Poisson's equation, the expressions for center potential and threshold voltage are calculated. In addition, the response of the device toward the various short-channel effects like hot carrier effect, drain-induced barrier lowering and threshold voltage roll-off has also been examined along with subthreshold swing and drain current characteristics. Performance analysis of the present model is also demonstrated by comparing its short-channel behavior with conventional DGJL MOSFET. The effect of variation of the device features due to the variation of device parameters is also studied. The simulated results obtained using 2D device simulator, namely ATLAS, are in good agreement with the analytical results, hence validating our derived model.

Performance analysis of SOI MOSFET with rectangular recessed channel

NASA Astrophysics Data System (ADS)

Singh, M.; Mishra, S.; Mohanty, S. S.; Mishra, G. P.

2016-03-01

In this paper a two dimensional (2D) rectangular recessed channel-silicon on insulator metal oxide semiconductor field effect transistor (RRC-SOI MOSFET), using the concept of groove between source and drain regions, which is one of the channel engineering technique to suppress the short channel effect (SCE). This suppression is mainly due to corner potential barrier of the groove and the simulation is carried out by using ATLAS 2D device simulator. To have further improvement of SCE in RRC-SOI MOSFET, three more devices are designed by using dual material gate (DMG) and gate dielectric technique, which results in formation of devices i.e. DMRRC-SOI,MLSMRRC-SOI, MLDMRRC-SOI MOSFET. The effect of different structures of RRC-SOI on AC and RF parameters are investigated and the importance of these devices over RRC MOSFET regarding short channel effect is analyzed.

Modeling and Simulation of III-Nitride-Based Solar Cells using NextnanoRTM

NASA Astrophysics Data System (ADS)

Refaei, Malak

Nextnano3 software is a well-known package for simulating semiconductor band-structures at the nanoscale and predicting the general electronic structure. In this work, it is further demonstrated as a viable tool for the simulation of III-nitride solar cells. In order to prove this feasibility, the generally accepted solar cell simulation package, PC1D, was chosen for comparison. To critique the results from both PC1D and Nextnano3, the fundamental drift-diffusion equations were used to calculate the performance of a simple p-n homojunction solar cell device analytically. Silicon was picked as the material for this comparison between the outputs of the two simulators as well as the results of the drift-diffusion equations because it is a well-known material in both software tools. After substantiating the capabilities of Nextnano3 for the simulation solar cells, an InGaN single-junction solar cell was simulated. The effects of various indium compositions and device structures on the performance of this InGaN p-n homojunction solar cell was then investigated using Nextnano 3 as a simulation tool. For single-junction devices with varying bandgap, an In0.6Ga0.4N device with a bandgap of 1.44 eV was found to be the optimum. The results of this research demonstrate that the Nextnano3 software can be used to usefully simulate solar cells in general, and III-nitride solar cells specifically, for future study of nanoscale structured devices.

Energy storage device with large charge separation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Holme, Timothy P.; Prinz, Friedrich B.; Iancu, Andrei T.

High density energy storage in semiconductor devices is provided. There are two main aspects of the present approach. The first aspect is to provide high density energy storage in semiconductor devices based on formation of a plasma in the semiconductor. The second aspect is to provide high density energy storage based on charge separation in a p-n junction.

Energy storage device with large charge separation

DOEpatents

Holme, Timothy P.; Prinz, Friedrich B.; Iancu, Andrei

2016-04-12

High density energy storage in semiconductor devices is provided. There are two main aspects of the present approach. The first aspect is to provide high density energy storage in semiconductor devices based on formation of a plasma in the semiconductor. The second aspect is to provide high density energy storage based on charge separation in a p-n junction.

Analytical model of threshold voltage degradation due to localized charges in gate material engineered Schottky barrier cylindrical GAA MOSFETs

NASA Astrophysics Data System (ADS)

Kumar, Manoj; Haldar, Subhasis; Gupta, Mridula; Gupta, R. S.

2016-10-01

The threshold voltage degradation due to the hot carrier induced localized charges (LC) is a major reliability concern for nanoscale Schottky barrier (SB) cylindrical gate all around (GAA) metal-oxide-semiconductor field-effect transistors (MOSFETs). The degradation physics of gate material engineered (GME)-SB-GAA MOSFETs due to LC is still unexplored. An explicit threshold voltage degradation model for GME-SB-GAA-MOSFETs with the incorporation of localized charges (N it) is developed. To accurately model the threshold voltage the minimum channel carrier density has been taken into account. The model renders how +/- LC affects the device subthreshold performance. One-dimensional (1D) Poisson’s and 2D Laplace equations have been solved for two different regions (fresh and damaged) with two different gate metal work-functions. LCs are considered at the drain side with low gate metal work-function as N it is more vulnerable towards the drain. For the reduction of carrier mobility degradation, a lightly doped channel has been considered. The proposed model also includes the effect of barrier height lowering at the metal-semiconductor interface. The developed model results have been verified using numerical simulation data obtained by the ATLAS-3D device simulator and excellent agreement is observed between analytical and simulation results.

Diode having trenches in a semiconductor region

DOEpatents

Palacios, Tomas Apostol; Lu, Bin; Matioli, Elison de Nazareth

2016-03-22

An electrode structure is described in which conductive regions are recessed into a semiconductor region. Trenches may be formed in a semiconductor region, such that conductive regions can be formed in the trenches. The electrode structure may be used in semiconductor devices such as field effect transistors or diodes. Nitride-based power semiconductor devices are described including such an electrode structure, which can reduce leakage current and otherwise improve performance.

Monolayer-Mediated Growth of Organic Semiconductor Films with Improved Device Performance.

PubMed

Huang, Lizhen; Hu, Xiaorong; Chi, Lifeng

2015-09-15

Increased interest in wearable and smart electronics is driving numerous research works on organic electronics. The control of film growth and patterning is of great importance when targeting high-performance organic semiconductor devices. In this Feature Article, we summarize our recent work focusing on the growth, crystallization, and device operation of organic semiconductors intermediated by ultrathin organic films (in most cases, only a monolayer). The site-selective growth, modified crystallization and morphology, and improved device performance of organic semiconductor films are demonstrated with the help of the inducing layers, including patterned and uniform Langmuir-Blodgett monolayers, crystalline ultrathin organic films, and self-assembled polymer brush films. The introduction of the inducing layers could dramatically change the diffusion of the organic semiconductors on the surface and the interactions between the active layer with the inducing layer, leading to improved aggregation/crystallization behavior and device performance.

Semiconductor systems utilizing materials that form rectifying junctions in both N and P-type doping regions, whether metallurgically or field induced, and methods of use

DOEpatents

Welch, James D.

2000-01-01

Disclosed are semiconductor systems, such as integrated circuits utilizing Schotky barrier and/or diffused junction technology, which semiconductor systems incorporate material(s) that form rectifying junctions in both metallurgically and/or field induced N and P-type doping regions, and methods of their use. Disclosed are Schottky barrier based inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems and which can be operated as modulators, N and P-channel MOSFETS and CMOS formed therefrom, and (MOS) gate voltage controlled rectification direction and gate voltage controlled switching devices, and use of such material(s) to block parasitic current flow pathways. Simple demonstrative five mask fabrication procedures for inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems are also presented.

Two dimensional simulation of patternable conducting polymer electrode based organic thin film transistor

NASA Astrophysics Data System (ADS)

Nair, Shiny; Kathiresan, M.; Mukundan, T.

2018-02-01

Device characteristics of organic thin film transistor (OTFT) fabricated with conducting polyaniline:polystyrene sulphonic acid (PANi-PSS) electrodes, patterned by the Parylene lift-off method are systematically analyzed by way of two dimensional numerical simulation. The device simulation was performed taking into account field-dependent mobility, low mobility layer at the electrode-semiconductor interface, trap distribution in pentacene film and trapped charge at the organic/insulator interface. The electrical characteristics of bottom contact thin film transistor with PANi-PSS electrodes and pentacene active material is superior to those with palladium electrodes due to a lower charge injection barrier. Contact resistance was extracted in both cases by the transfer line method (TLM). The extracted charge concentration and potential profile from the two dimensional numerical simulation was used to explain the observed electrical characteristics. The simulated device characteristics not only matched the experimental electrical characteristics, but also gave an insight on the charge injection, transport and trap properties of the OTFTs as a function of different electrode materials from the perspectives of transistor operation.

Characterization and modeling of radiation effects NASA/MSFC semiconductor devices

NASA Technical Reports Server (NTRS)

Kerns, D. V., Jr.; Cook, K. B., Jr.

1978-01-01

A literature review of the near-Earth trapped radiation of the Van Allen Belts, the radiation within the solar system resulting from the solar wind, and the cosmic radiation levels of deep space showed that a reasonable simulation of space radiation, particularly the Earth orbital environment, could be simulated in the laboratory by proton bombardment. A 3 MeV proton accelerator was used to irradiate CMOS integrated circuits fabricated from three different processes. The drain current and output voltage for three inverters was recorded as the input voltage was swept from zero to ten volts after each successive irradiation. Device parameters were extracted. Possible damage mechanisms are discussed and recommendations for improved radiation hardness are suggested.

Photoelectrochemical cell including Ga(Sb.sub.x)N.sub.1-x semiconductor electrode

DOEpatents

Menon, Madhu; Sheetz, Michael; Sunkara, Mahendra Kumar; Pendyala, Chandrashekhar; Sunkara, Swathi; Jasinski, Jacek B.

2017-09-05

The composition of matter comprising Ga(Sb.sub.x)N.sub.1-x where x=0.01 to 0.06 is characterized by a band gap between 2.4 and 1.7 eV. A semiconductor device includes a semiconductor layer of that composition. A photoelectric cell includes that semiconductor device.

Exploring the validity and limitations of the Mott-Gurney law for charge-carrier mobility determination of semiconducting thin-films.

PubMed

Röhr, Jason A; Moia, Davide; Haque, Saif A; Kirchartz, Thomas; Nelson, Jenny

2018-03-14

Using drift-diffusion simulations, we investigate the voltage dependence of the dark current in single carrier devices typically used to determine charge-carrier mobilities. For both low and high voltages, the current increases linearly with the applied voltage. Whereas the linear current at low voltages is mainly due to space charge in the middle of the device, the linear current at high voltage is caused by charge-carrier saturation due to a high degree of injection. As a consequence, the current density at these voltages does not follow the classical square law derived by Mott and Gurney, and we show that for trap-free devices, only for intermediate voltages, a space-charge-limited drift current can be observed with a slope that approaches a value of two. We show that, depending on the thickness of the semiconductor layer and the size of the injection barriers, the two linear current-voltage regimes can dominate the whole voltage range, and the intermediate Mott-Gurney regime can shrink or disappear. In this case, which will especially occur for thicknesses and injection barriers typical of single-carrier devices used to probe organic semiconductors, a meaningful analysis using the Mott-Gurney law will become unachievable, because a square-law fit can no longer be achieved, resulting in the mobility being substantially underestimated. General criteria for when to expect deviations from the Mott-Gurney law when used for analysis of intrinsic semiconductors are discussed.

Exploring the validity and limitations of the Mott-Gurney law for charge-carrier mobility determination of semiconducting thin-films

NASA Astrophysics Data System (ADS)

Röhr, Jason A.; Moia, Davide; Haque, Saif A.; Kirchartz, Thomas; Nelson, Jenny

2018-03-01

Using drift-diffusion simulations, we investigate the voltage dependence of the dark current in single carrier devices typically used to determine charge-carrier mobilities. For both low and high voltages, the current increases linearly with the applied voltage. Whereas the linear current at low voltages is mainly due to space charge in the middle of the device, the linear current at high voltage is caused by charge-carrier saturation due to a high degree of injection. As a consequence, the current density at these voltages does not follow the classical square law derived by Mott and Gurney, and we show that for trap-free devices, only for intermediate voltages, a space-charge-limited drift current can be observed with a slope that approaches a value of two. We show that, depending on the thickness of the semiconductor layer and the size of the injection barriers, the two linear current-voltage regimes can dominate the whole voltage range, and the intermediate Mott-Gurney regime can shrink or disappear. In this case, which will especially occur for thicknesses and injection barriers typical of single-carrier devices used to probe organic semiconductors, a meaningful analysis using the Mott-Gurney law will become unachievable, because a square-law fit can no longer be achieved, resulting in the mobility being substantially underestimated. General criteria for when to expect deviations from the Mott-Gurney law when used for analysis of intrinsic semiconductors are discussed.

Monolithic integrated high-T.sub.c superconductor-semiconductor structure

NASA Technical Reports Server (NTRS)

Barfknecht, Andrew T. (Inventor); Garcia, Graham A. (Inventor); Russell, Stephen D. (Inventor); Burns, Michael J. (Inventor); de la Houssaye, Paul R. (Inventor); Clayton, Stanley R. (Inventor)

2000-01-01

A method for the fabrication of active semiconductor and high-temperature superconducting device of the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.

A new approximation of Fermi-Dirac integrals of order 1/2 for degenerate semiconductor devices

NASA Astrophysics Data System (ADS)

AlQurashi, Ahmed; Selvakumar, C. R.

2018-06-01

There had been tremendous growth in the field of Integrated circuits (ICs) in the past fifty years. Scaling laws mandated both lateral and vertical dimensions to be reduced and a steady increase in doping densities. Most of the modern semiconductor devices have invariably heavily doped regions where Fermi-Dirac Integrals are required. Several attempts have been devoted to developing analytical approximations for Fermi-Dirac Integrals since numerical computations of Fermi-Dirac Integrals are difficult to use in semiconductor devices, although there are several highly accurate tabulated functions available. Most of these analytical expressions are not sufficiently suitable to be employed in semiconductor device applications due to their poor accuracy, the requirement of complicated calculations, and difficulties in differentiating and integrating. A new approximation has been developed for the Fermi-Dirac integrals of the order 1/2 by using Prony's method and discussed in this paper. The approximation is accurate enough (Mean Absolute Error (MAE) = 0.38%) and easy enough to be used in semiconductor device equations. The new approximation of Fermi-Dirac Integrals is applied to a more generalized Einstein Relation which is an important relation in semiconductor devices.

Total-dose radiation effects data for semiconductor devices, volume 1. [radiation resistance of components for the Galileo Project

NASA Technical Reports Server (NTRS)

Price, W. E.; Martin, K. E.; Nichols, D. K.; Gauthier, M. K.; Brown, S. F.

1981-01-01

Steady-state, total-dose radiation test data are provided in graphic format, for use by electronic designers and other personnel using semiconductor devices in a radiation environment. Data are presented by JPL for various NASA space programs on diodes, bipolar transistors, field effect transistors, silicon-controlled rectifiers, and optical devices. A vendor identification code list is included along with semiconductor device electrical parameter symbols and abbreviations.

Fabrication and performance of pressure-sensing device consisting of electret film and organic semiconductor

NASA Astrophysics Data System (ADS)

Kodzasa, Takehito; Nobeshima, Daiki; Kuribara, Kazunori; Uemura, Sei; Yoshida, Manabu

2017-04-01

We propose a new concept of a pressure-sensitive device that consists of an organic electret film and an organic semiconductor. This device exhibits high sensitivity and selectivity against various types of pressure. The sensing mechanism of this device originates from a modulation of the electric conductivity of the organic semiconductor film induced by the interaction between the semiconductor film and the charged electret film placed face to face. It is expected that a complicated sensor array will be fabricated by using a roll-to-roll manufacturing system, because this device can be prepared by an all-printing and simple lamination process without high-level positional adjustment for printing processes. This also shows that this device with a simple structure is suitable for application to a highly flexible device array sheet for an Internet of Things (IoT) or wearable sensing system.

Semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit [Knoxville, TN

2011-03-15

Novel articles and methods to fabricate the same resulting in flexible, large-area, triaxially textured, single-crystal or single-crystal-like, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Semiconductor-based, large-area, flexible, electronic devices on {110}<100> oriented substrates

DOEpatents

Goyal, Amit

2014-08-05

Novel articles and methods to fabricate the same resulting in flexible, oriented, semiconductor-based, electronic devices on {110}<100> textured substrates are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

[100] or [110] aligned, semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit

2015-03-24

Novel articles and methods to fabricate the same resulting in flexible, large-area, [100] or [110] textured, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Feasibility of a semiconductor dosimeter to monitor skin dose in interventional radiology.

PubMed

Meyer, P; Regal, R; Jung, M; Siffert, P; Mertz, L; Constantinesco, A

2001-10-01

The design and preliminary test results of a semiconductor silicon dosimeter are presented in this article. Use of this dosimeter is foreseen for real-time skin dose control in interventional radiology. The strong energy dependence of this kind of radiation detector is well overcome by filtering the silicon diode. Here, the optimal filter features have been calculated by numerical Monte Carlo simulations. A prototype has been built and tested in a radiological facility. The first experimental results show a good match between the filtered semiconductor diode response and an ionization chamber response, within 2% fluctuation in a 2.2 to 4.1 mm Al half-value layer (HVL) energy range. Moreover, the semiconductor sensor response is linear from 0.02 Gy/min to at least 6.5 Gy/min, covering the whole dose rate range found in interventional radiology. The results show that a semiconductor dosimeter could be used to monitor skin dose during the majority of procedures using x-rays below 150 keV. The use of this device may assist in avoiding radiation-induced skin injuries and lower radiation levels during interventional procedures.

Characteristics and reliability of metal-oxide-semiconductor transistors with various depths of plasma-induced Si recess structure

NASA Astrophysics Data System (ADS)

Chen, Jone F.; Tsai, Yen-Lin; Chen, Chun-Yen; Hsu, Hao-Tang; Kao, Chia-Yu; Hwang, Hann-Ping

2018-04-01

Device characteristics and hot-carrier-induced device degradation of n-channel MOS transistors with an off-state breakdown voltage of approximately 25 V and various Si recess depths introduced by sidewall spacer overetching are investigated. Experimental data show that the depth of the Si recess has small effects on device characteristics. A device with a deeper Si recess has lower substrate current and channel electric field, whereas a greater hot-carrier-induced device degradation and a shorter hot-carrier lifetime are observed. Results of technology computer-aided design simulations suggest that these unexpected observations are related to the severity of plasma damage caused by the sidewall spacer overetching and the difference in topology.

Processes for multi-layer devices utilizing layer transfer

DOEpatents

Nielson, Gregory N; Sanchez, Carlos Anthony; Tauke-Pedretti, Anna; Kim, Bongsang; Cederberg, Jeffrey; Okandan, Murat; Cruz-Campa, Jose Luis; Resnick, Paul J

2015-02-03

A method includes forming a release layer over a donor substrate. A plurality of devices made of a first semiconductor material are formed over the release layer. A first dielectric layer is formed over the plurality of devices such that all exposed surfaces of the plurality of devices are covered by the first dielectric layer. The plurality of devices are chemically attached to a receiving device made of a second semiconductor material different than the first semiconductor material, the receiving device having a receiving substrate attached to a surface of the receiving device opposite the plurality of devices. The release layer is etched to release the donor substrate from the plurality of devices. A second dielectric layer is applied over the plurality of devices and the receiving device to mechanically attach the plurality of devices to the receiving device.

Photovoltaic healing of non-uniformities in semiconductor devices

DOEpatents

Karpov, Victor G.; Roussillon, Yann; Shvydka, Diana; Compaan, Alvin D.; Giolando, Dean M.

2006-08-29

A method of making a photovoltaic device using light energy and a solution to normalize electric potential variations in the device. A semiconductor layer having nonuniformities comprising areas of aberrant electric potential deviating from the electric potential of the top surface of the semiconductor is deposited onto a substrate layer. A solution containing an electrolyte, at least one bonding material, and positive and negative ions is applied over the top surface of the semiconductor. Light energy is applied to generate photovoltage in the semiconductor, causing a redistribution of the ions and the bonding material to the areas of aberrant electric potential. The bonding material selectively bonds to the nonuniformities in a manner such that the electric potential of the nonuniformities is normalized relative to the electric potential of the top surface of the semiconductor layer. A conductive electrode layer is then deposited over the top surface of the semiconductor layer.

{100}<100> or 45.degree.-rotated {100}<100>, semiconductor-based, large-area, flexible, electronic devices

DOEpatents

Goyal, Amit [Knoxville, TN

2012-05-15

Novel articles and methods to fabricate the same resulting in flexible, {100}<100> or 45.degree.-rotated {100}<100> oriented, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Dynamic carrier transport modulation for constructing advanced devices with improved performance by piezotronic and piezo-phototronic effects: a brief review

NASA Astrophysics Data System (ADS)

Guo, Zhen; Pan, Haixi; Li, Chuanyu; Zhang, Lili; Yan, Shuai; Zhang, Wei; Yao, Jia; Tang, Yuguo; Yang, Hongbo; Wu, Yihui; Feng, Liping; Zhou, Lianqun

2017-08-01

Carrier generation, transport, separation, and recombination behaviors can be modulated for improving the performance of semiconductor devices by using piezotronic and piezo-phototronic effects with creating piezopotential in crystals based on non-centrosymmetric semiconductor materials such as group II-VI and III-V semiconductors and transition metal dichalcogenides (TMDCs), which have emerged as attractive materials for electronic/photonic applications because of their novel properties. Until now, much effort has been devoted to improving the performance of devices based on the aforementioned materials through modulation of the carrier behavior. However, due to existing drawbacks, it has been difficult to further enhance the device performance for a built structure. However, effective exploration of the piezotronic and piezo-phototronic effects in these semiconducting materials could pave the way to the realization of high-performance devices. In general, the effective modulation of carrier behavior dynamically in devices such as light-emitting diodes, photodetectors, solar cells, nanogenerators, and so on, remains a key challenge. Due to the polarization of ions in semiconductor materials with noncentral symmetry under external strain, a piezopotential is created considering piezotronic and piezo-photoronic effects, which could dynamically modulate charge carrier transport behaviors across p-n junctions or metal-semiconductor interfaces. Through a combination of these effects and semiconductor properties, the performance of the related devices could be improved and new types of devices such as piezoelectric field-effect transistors and sensors have emerged, with potential applications in self-driven devices for effective energy harvesting and biosensing with high sensitivity, which are different from those traditionally designed and may have potential applications in strained triggered devices. The objective of this review is to briefly introduce the corresponding mechanisms for modulating carrier behavior on the basis of piezotronic and piezo-phototronic effects in materials such as group II-VI and group III-V semiconductors and TMDCs, as well as to discuss possible solutions to effectively enhance the performance of the devices via carrier modulation.

Solid state photosensitive devices which employ isolated photosynthetic complexes

DOEpatents

Peumans, Peter; Forrest, Stephen R.

2009-09-22

Solid state photosensitive devices including photovoltaic devices are provided which comprise a first electrode and a second electrode in superposed relation; and at least one isolated Light Harvesting Complex (LHC) between the electrodes. Preferred photosensitive devices comprise an electron transport layer formed of a first photoconductive organic semiconductor material, adjacent to the LHC, disposed between the first electrode and the LHC; and a hole transport layer formed of a second photoconductive organic semiconductor material, adjacent to the LHC, disposed between the second electrode and the LHC. Solid state photosensitive devices of the present invention may comprise at least one additional layer of photoconductive organic semiconductor material disposed between the first electrode and the electron transport layer; and at least one additional layer of photoconductive organic semiconductor material, disposed between the second electrode and the hole transport layer. Methods of generating photocurrent are provided which comprise exposing a photovoltaic device of the present invention to light. Electronic devices are provided which comprise a solid state photosensitive device of the present invention.

Method for making a monolithic integrated high-T.sub.c superconductor-semiconductor structure

NASA Technical Reports Server (NTRS)

Burns, Michael J. (Inventor); de la Houssaye, Paul R. (Inventor); Russell, Stephen D. (Inventor); Garcia, Graham A. (Inventor); Barfknecht, Andrew T. (Inventor); Clayton, Stanley R. (Inventor)

2000-01-01

A method for the fabrication of active semiconductor and high-temperature perconducting devices on the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.

Tapered rib fiber coupler for semiconductor optical devices

DOEpatents

Vawter, Gregory A.; Smith, Robert Edward

2001-01-01

A monolithic tapered rib waveguide for transformation of the spot size of light between a semiconductor optical device and an optical fiber or from the fiber into the optical device. The tapered rib waveguide is integrated into the guiding rib atop a cutoff mesa type semiconductor device such as an expanded mode optical modulator or and expanded mode laser. The tapered rib acts to force the guided light down into the mesa structure of the semiconductor optical device instead of being bound to the interface between the bottom of the guiding rib and the top of the cutoff mesa. The single mode light leaving or entering the output face of the mesa structure then can couple to the optical fiber at coupling losses of 1.0 dB or less.

Silicon superlattices: Theory and application to semiconductor devices

NASA Technical Reports Server (NTRS)

Moriarty, J. A.

1981-01-01

Silicon superlattices and their applicability to improved semiconductor devices were studied. The device application potential of the atomic like dimension of III-V semiconductor superlattices fabricated in the form of ultrathin periodically layered heterostructures was examined. Whether this leads to quantum size effects and creates the possibility to alter familiar transport and optical properties over broad physical ranges was studied. Applications to improved semiconductor lasers and electrondevices were achieved. Possible application of silicon sperlattices to faster high speed computing devices was examined. It was found that the silicon lattices show features of smaller fundamental energyband gaps and reduced effective masses. The effects correlate strongly with both the chemical and geometrical nature of the superlattice.

Semiconductor structures having electrically insulating and conducting portions formed from an AlSb-alloy layer

DOEpatents

Spahn, Olga B.; Lear, Kevin L.

1998-01-01

A semiconductor structure. The semiconductor structure comprises a plurality of semiconductor layers formed on a substrate including at least one layer of a III-V compound semiconductor alloy comprising aluminum (Al) and antimony (Sb), with at least a part of the AlSb-alloy layer being chemically converted by an oxidation process to form superposed electrically insulating and electrically conducting portions. The electrically insulating portion formed from the AlSb-alloy layer comprises an oxide of aluminum (e.g. Al.sub.2 O.sub.3), while the electrically conducting portion comprises Sb. A lateral oxidation process allows formation of the superposed insulating and conducting portions below monocrystalline semiconductor layers for forming many different types of semiconductor structures having particular utility for optoelectronic devices such as light-emitting diodes, edge-emitting lasers, vertical-cavity surface-emitting lasers, photodetectors and optical modulators (waveguide and surface normal), and for electronic devices such as heterojunction bipolar transistors, field-effect transistors and quantum-effect devices. The invention is expected to be particularly useful for forming light-emitting devices for use in the 1.3-1.6 .mu.m wavelength range, with the AlSb-alloy layer acting to define an active region of the device and to effectively channel an electrical current therein for efficient light generation.

Evolution of corundum-structured III-oxide semiconductors: Growth, properties, and devices

NASA Astrophysics Data System (ADS)

Fujita, Shizuo; Oda, Masaya; Kaneko, Kentaro; Hitora, Toshimi

2016-12-01

The recent progress and development of corundum-structured III-oxide semiconductors are reviewed. They allow bandgap engineering from 3.7 to ∼9 eV and function engineering, leading to highly durable electronic devices and deep ultraviolet optical devices as well as multifunctional devices. Mist chemical vapor deposition can be a simple and safe growth technology and is advantageous for reducing energy and cost for the growth. This is favorable for the wide commercial use of devices at low cost. The III-oxide semiconductors are promising candidates for new devices contributing to sustainable social, economic, and technological development for the future.

Charge collection efficiency degradation induced by MeV ions in semiconductor devices: Model and experiment

DOE PAGES

Vittone, Ettore; Pastuovic, Zeljko; Breese, Mark B. H.; ...

2016-02-08

This study investigates both theoretically and experimentally the charge collection efficiency (CCE) degradation in silicon diodes induced by energetic ions. Ion Beam Induced Charge (IBIC) measurements carried out on n- and p-type silicon diodes which were previously irradiated with MeV He ions show evidence that the CCE degradation does not only depend on the mass, energy and fluence of the damaging ion, but also depends on the ion probe species and on the polarization state of the device. A general one-dimensional model is derived, which accounts for the ion-induced defect distribution, the ionization profile of the probing ion and themore » charge induction mechanism. Using the ionizing and non-ionizing energy loss profiles resulting from simulations based on the binary collision approximation and on the electrostatic/transport parameters of the diode under study as input, the model is able to accurately reproduce the experimental CCE degradation curves without introducing any phenomenological additional term or formula. Although limited to low level of damage, the model is quite general, including the displacement damage approach as a special case and can be applied to any semiconductor device. It provides a method to measure the capture coefficients of the radiation induced recombination centres. They can be considered indexes, which can contribute to assessing the relative radiation hardness of semiconductor materials.« less

Coupled optical and electrical study of thin-film InGaAs photodetector integrated with surface InP Mie resonators

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fu, Dong; Song, Jiakun; Yu, Hailong

2016-03-14

High-index dielectric and semiconductor nanostructures with characteristics of low absorption loss and artificially controlled scattering properties have grasped an increasing attention for improving the performance of thin-film photovoltaic devices. In this work, combined optical and electrical simulations were performed for thin-film InP/In{sub 0.53}Ga{sub 0.47}As/InP hetero-junction photodetector with periodically arranged InP nano-cylinders in the in-coupling configuration. It is found that the carefully designed InP nano-cylinders possess strongly substrate-coupled Mie resonances and can effectively couple incident light into the guided mode, both of which significantly increase optical absorption. Further study from the electrical aspects shows that enhancement of external quantum efficiency ismore » as high as 82% and 83% in the configurations with the optimized nano-cylinders and the optimized period, respectively. Moreover, we demonstrate that the integration of InP nano-cylinders does not degrade the electrical performance, since the surface recombination is effectively suppressed by separating the absorber layer where carriers generate and the air/semiconductor interface. The comprehensive modeling including optical and electrical perspectives provides a more practical description for device performance than the optical-only simulation and is expected to advance the design of thin-film absorber layer based optoelectronic devices for fast response and high efficiency.« less

Epitaxial Growth of Cubic Crystalline Semiconductor Alloys on Basal Plane of Trigonal or Hexagonal Crystal

NASA Technical Reports Server (NTRS)

Park, Yeonjoon (Inventor); Choi, Sang H. (Inventor); King, Glen C. (Inventor)

2011-01-01

Hetero-epitaxial semiconductor materials comprising cubic crystalline semiconductor alloys grown on the basal plane of trigonal and hexagonal substrates, in which misfit dislocations are reduced by approximate lattice matching of the cubic crystal structure to underlying trigonal or hexagonal substrate structure, enabling the development of alloyed semiconductor layers of greater thickness, resulting in a new class of semiconductor materials and corresponding devices, including improved hetero-bipolar and high-electron mobility transistors, and high-mobility thermoelectric devices.

Computational Nanoelectronics and Nanotechnology at NASA ARC

NASA Technical Reports Server (NTRS)

Saini, Subhash; Kutler, Paul (Technical Monitor)

1998-01-01

Both physical and economic considerations indicate that the scaling era of CMOS will run out of steam around the year 2010. However, physical laws also indicate that it is possible to compute at a rate of a billion times present speeds with the expenditure of only one Watt of electrical power. NASA has long-term needs where ultra-small semiconductor devices are needed for critical applications: high performance, low power, compact computers for intelligent autonomous vehicles and Petaflop computing technology are some key examples. To advance the design, development, and production of future generation micro- and nano-devices, IT Modeling and Simulation Group has been started at NASA Ames with a goal to develop an integrated simulation environment that addresses problems related to nanoelectronics and molecular nanotechnology. Overview of nanoelectronics and nanotechnology research activities being carried out at Ames Research Center will be presented. We will also present the vision and the research objectives of the IT Modeling and Simulation Group including the applications of nanoelectronic based devices relevant to NASA missions.

Computational Nanoelectronics and Nanotechnology at NASA ARC

NASA Technical Reports Server (NTRS)

Saini, Subhash

1998-01-01

Both physical and economic considerations indicate that the scaling era of CMOS will run out of steam around the year 2010. However, physical laws also indicate that it is possible to compute at a rate of a billion times present speeds with the expenditure of only one Watt of electrical power. NASA has long-term needs where ultra-small semiconductor devices are needed for critical applications: high performance, low power, compact computers for intelligent autonomous vehicles and Petaflop computing technolpgy are some key examples. To advance the design, development, and production of future generation micro- and nano-devices, IT Modeling and Simulation Group has been started at NASA Ames with a goal to develop an integrated simulation environment that addresses problems related to nanoelectronics and molecular nanotecnology. Overview of nanoelectronics and nanotechnology research activities being carried out at Ames Research Center will be presented. We will also present the vision and the research objectives of the IT Modeling and Simulation Group including the applications of nanoelectronic based devices relevant to NASA missions.

Modeling, design, fabrication and experimentation of a GaN-based, 63Ni betavoltaic battery

NASA Astrophysics Data System (ADS)

E Munson, C., IV; Gaimard, Q.; Merghem, K.; Sundaram, S.; Rogers, D. J.; de Sanoit, J.; Voss, P. L.; Ramdane, A.; Salvestrini, J. P.; Ougazzaden, A.

2018-01-01

GaN is a durable, radiation hard and wide-bandgap semiconductor material, making it ideal for usage with betavoltaic batteries. This paper describes the design, fabrication and experimental testing of 1 cm2 GaN-based betavoltaic batteries (that achieve an output power of 2.23 nW) along with a full model that accurately simulates the device performance which is the highest to date (to the best of our knowledge) for GaN-based devices with a 63Ni source.

Molecular dynamics simulations of graphoepitaxy of organic semiconductors, sexithiophene, and pentacene: Molecular-scale mechanisms of organic graphoepitaxy

NASA Astrophysics Data System (ADS)

Ikeda, Susumu

2018-03-01

Molecular dynamics (MD) simulations of the organic semiconductors α-sexithiophene (6T) and pentacene were carried out to clarify the mechanism of organic graphoepitaxy at the molecular level. First, the models of the grooved substrates were made and the surfaces of the inside of the grooves were modified with -OH or -OSi(CH3)3, making the surfaces hydrophilic or hydrophobic. By the MD simulations of 6T, it was found that three stable azimuthal directions exist (0, ˜45, and 90° the angle that the c-axis makes with the groove), being consistent with experimental results. MD simulations of deposition processes of 6T and pentacene were also carried out, and pentacene molecules showed the spontaneous formation of herringbone packing during deposition. Some pentacene molecules stood on the surface and formed a cluster whose a-axis was parallel to the groove. It is expected that a deep understanding of the molecular-scale mechanisms will lead graphoepitaxy to practical applications, improving the performance of organic devices.

Self-Aligned van der Waals Heterojunction Diodes and Transistors.

PubMed

Sangwan, Vinod K; Beck, Megan E; Henning, Alex; Luo, Jiajia; Bergeron, Hadallia; Kang, Junmo; Balla, Itamar; Inbar, Hadass; Lauhon, Lincoln J; Hersam, Mark C

2018-02-14

A general self-aligned fabrication scheme is reported here for a diverse class of electronic devices based on van der Waals materials and heterojunctions. In particular, self-alignment enables the fabrication of source-gated transistors in monolayer MoS 2 with near-ideal current saturation characteristics and channel lengths down to 135 nm. Furthermore, self-alignment of van der Waals p-n heterojunction diodes achieves complete electrostatic control of both the p-type and n-type constituent semiconductors in a dual-gated geometry, resulting in gate-tunable mean and variance of antiambipolar Gaussian characteristics. Through finite-element device simulations, the operating principles of source-gated transistors and dual-gated antiambipolar devices are elucidated, thus providing design rules for additional devices that employ self-aligned geometries. For example, the versatility of this scheme is demonstrated via contact-doped MoS 2 homojunction diodes and mixed-dimensional heterojunctions based on organic semiconductors. The scalability of this approach is also shown by fabricating self-aligned short-channel transistors with subdiffraction channel lengths in the range of 150-800 nm using photolithography on large-area MoS 2 films grown by chemical vapor deposition. Overall, this self-aligned fabrication method represents an important step toward the scalable integration of van der Waals heterojunction devices into more sophisticated circuits and systems.

Enhancement of ZnO based flexible nano generators via sol gel technique for sensing and energy harvesting applications.

PubMed

Rajagopalan, Pandey; Singh, Vipul; I A, Palani

2018-01-10

Zinc oxide (ZnO) is a remarkable inorganic semiconductor with exceptional piezoelectric properties compared to other semiconductors. However, in comparison to lead-based hazardous piezoelectric materials, its features have undesired limitations. Here we report the 5~6 folds enhancement in the piezoelectric properties via chemical doping of copper matched to intrinsic ZnO. The flexible piezoelectric nanogenerator (F-PENG) device was fabricated using an unpretentious solution process of spin coating with other advantages like robust, low weight, improved adhesion, and low cost. The devices were used to demonstrate energy harvesting from a Standard weight as low as 4 gm and can work as a self-powered mass sensor in a broad range of 4 to 100 gm. The device exhibited a novel energy harvesting technique from a wind source due to its inherent flexibility. At three different velocities (10~30 m/s) and five different angles of attack (0~180 degrees), the device validated the ability to discern different velocities and directions of flow. The device will be useful for mapping the flow of air apart from harvesting the energy. The simulation was done to verify the underlining mechanism of aerodynamics involved in it. © 2018 IOP Publishing Ltd.

Role of point defects and HfO2/TiN interface stoichiometry on effective work function modulation in ultra-scaled complementary metal-oxide-semiconductor devices

NASA Astrophysics Data System (ADS)

Pandey, R. K.; Sathiyanarayanan, Rajesh; Kwon, Unoh; Narayanan, Vijay; Murali, K. V. R. M.

2013-07-01

We investigate the physical properties of a portion of the gate stack of an ultra-scaled complementary metal-oxide-semiconductor (CMOS) device. The effects of point defects, such as oxygen vacancy, oxygen, and aluminum interstitials at the HfO2/TiN interface, on the effective work function of TiN are explored using density functional theory. We compute the diffusion barriers of such point defects in the bulk TiN and across the HfO2/TiN interface. Diffusion of these point defects across the HfO2/TiN interface occurs during the device integration process. This results in variation of the effective work function and hence in the threshold voltage variation in the devices. Further, we simulate the effects of varying the HfO2/TiN interface stoichiometry on the effective work function modulation in these extremely-scaled CMOS devices. Our results show that the interface rich in nitrogen gives higher effective work function, whereas the interface rich in titanium gives lower effective work function, compared to a stoichiometric HfO2/TiN interface. This theoretical prediction is confirmed by the experiment, demonstrating over 700 meV modulation in the effective work function.

Interconnected semiconductor devices

DOEpatents

Grimmer, Derrick P.; Paulson, Kenneth R.; Gilbert, James R.

1990-10-23

Semiconductor layer and conductive layer formed on a flexible substrate, divided into individual devices and interconnected with one another in series by interconnection layers and penetrating terminals.

Electronic properties of semiconductor-water interfaces: Predictions from ab-initio molecular dynamics and many-body perturbation theory

NASA Astrophysics Data System (ADS)

Pham, Tuan Anh

2015-03-01

Photoelectrochemical cells offer a promising avenue for hydrogen production from water and sunlight. The efficiency of these devices depends on the electronic structure of the interface between the photoelectrode and liquid water, including the alignment between the semiconductor band edges and the water redox potential. In this talk, we will present the results of first principles calculations of semiconductor-water interfaces that are obtained with a combination of density functional theory (DFT)-based molecular dynamics simulations and many-body perturbation theory (MBPT). First, we will discuss the development of an MBPT approach that is aimed at improving the efficiency and accuracy of existing methodologies while still being applicable to complex heterogeneous interfaces consisting of hundreds of atoms. We will then present studies of the electronic structure of liquid water and aqueous solutions using MBPT, which represent an essential step in establishing a quantitative framework for computing the energy alignment at semiconductor-water interfaces. Finally, using a combination of DFT-based molecular dynamics simulations and MBPT, we will describe the relationship between interfacial structure, electronic properties of semiconductors and their reactivity in aqueous solutions through a number of examples, including functionalized Si surfaces and GaP/InP surfaces in contact with liquid water. T.A.P was supported by the U.S. Department of Energy at the Lawrence Livermore National Laboratory under Contract DE-AC52-07NA27344 and by the Lawrence Fellowship Program.

Charge Separation at Mixed-Dimensional Single and Multilayer MoS2/Silicon Nanowire Heterojunctions.

PubMed

Henning, Alex; Sangwan, Vinod K; Bergeron, Hadallia; Balla, Itamar; Sun, Zhiyuan; Hersam, Mark C; Lauhon, Lincoln J

2018-05-16

Layered two-dimensional (2-D) semiconductors can be combined with other low-dimensional semiconductors to form nonplanar mixed-dimensional van der Waals (vdW) heterojunctions whose charge transport behavior is influenced by the heterojunction geometry, providing a new degree of freedom to engineer device functions. Toward that end, we investigated the photoresponse of Si nanowire/MoS 2 heterojunction diodes with scanning photocurrent microscopy and time-resolved photocurrent measurements. Comparison of n-Si/MoS 2 isotype heterojunctions with p-Si/MoS 2 heterojunction diodes under varying biases shows that the depletion region in the p-n heterojunction promotes exciton dissociation and carrier collection. We measure an instrument-limited response time of 1 μs, which is 10 times faster than the previously reported response times for planar Si/MoS 2 devices, highlighting the advantages of the 1-D/2-D heterojunction. Finite element simulations of device models provide a detailed understanding of how the electrostatics affect charge transport in nanowire/vdW heterojunctions and inform the design of future vdW heterojunction photodetectors and transistors.

Full-band quantum simulation of electron devices with the pseudopotential method: Theory, implementation, and applications

NASA Astrophysics Data System (ADS)

Pala, M. G.; Esseni, D.

2018-03-01

This paper presents the theory, implementation, and application of a quantum transport modeling approach based on the nonequilibrium Green's function formalism and a full-band empirical pseudopotential Hamiltonian. We here propose to employ a hybrid real-space/plane-wave basis that results in a significant reduction of the computational complexity compared to a full plane-wave basis. To this purpose, we provide a theoretical formulation in the hybrid basis of the quantum confinement, the self-energies of the leads, and the coupling between the device and the leads. After discussing the theory and the implementation of the new simulation methodology, we report results for complete, self-consistent simulations of different electron devices, including a silicon Esaki diode, a thin-body silicon field effect transistor (FET), and a germanium tunnel FET. The simulated transistors have technologically relevant geometrical features with a semiconductor film thickness of about 4 nm and a channel length ranging from 10 to 17 nm. We believe that the newly proposed formalism may find applications also in transport models based on ab initio Hamiltonians, as those employed in density functional theory methods.

Room-temperature semiconductor heterostructure refrigeration

NASA Astrophysics Data System (ADS)

Chao, K. A.; Larsson, Magnus; Mal'shukov, A. G.

2005-07-01

With the proper design of semiconductor tunneling barrier structures, we can inject low-energy electrons via resonant tunneling, and take out high-energy electrons via a thermionic process. This is the operation principle of our semiconductor heterostructure refrigerator (SHR) without the need of applying a temperature gradient across the device. Even for the bad thermoelectric material AlGaAs, our calculation shows that at room temperature, the SHR can easily lower the temperature by 5-7K. Such devices can be fabricated with the present semiconductor technology. Besides its use as a kitchen refrigerator, the SHR can efficiently cool microelectronic devices.

Biasing, operation and parasitic current limitation in single device equivalent to CMOS, and other semiconductor systems

DOEpatents

Welch, James D.

2003-09-23

Disclosed are semiconductor devices including at least one junction which is rectifying whether the semiconductor is caused to be N or P-type, by the presence of applied gate voltage field induced carriers in essentially intrinsic, essentially homogeneously simultaneously containing both N and P-type metallurgical dopants at substantially equal doping levels, essentially homogeneously simultaneously containing both N and P-type metallurgical dopants at different doping levels, and containing a single metallurgical doping type, and functional combinations thereof. In particular, inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to conventional multiple device CMOS systems, which can be operated as modulators, are disclosed as are a non-latching SCR and an approach to blocking parasitic currents utilizing material(s) which form rectifying junctions with both N and P-type semiconductor whether metallurigically or field induced.

P and n-type microcrystalline semiconductor alloy material including band gap widening elements, devices utilizing same

DOEpatents

Guha, Subhendu; Ovshinsky, Stanford R.

1988-10-04

An n-type microcrystalline semiconductor alloy material including a band gap widening element; a method of fabricating p-type microcrystalline semiconductor alloy material including a band gap widening element; and electronic and photovoltaic devices incorporating said n-type and p-type materials.

neutron-Induced Failures in semiconductor Devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wender, Stephen Arthur

2017-03-13

Single Event Effects are a very significant failure mode in modern semiconductor devices that may limit their reliability. Accelerated testing is important for semiconductor industry. Considerable more work is needed in this field to mitigate the problem. Mitigation of this problem will probably come from Physicists and Electrical Engineers working together

77 FR 25747 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Institution of...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-05-01

... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-840] Certain Semiconductor Integrated Circuit... States after importation of certain semiconductor integrated circuit devices and products containing same... No. 6,847,904 (``the '904 patent''). The complaint further alleges that an industry in the United...

Predictive simulations and optimization of nanowire field-effect PSA sensors including screening

NASA Astrophysics Data System (ADS)

Baumgartner, Stefan; Heitzinger, Clemens; Vacic, Aleksandar; Reed, Mark A.

2013-06-01

We apply our self-consistent PDE model for the electrical response of field-effect sensors to the 3D simulation of nanowire PSA (prostate-specific antigen) sensors. The charge concentration in the biofunctionalized boundary layer at the semiconductor-electrolyte interface is calculated using the propka algorithm, and the screening of the biomolecules by the free ions in the liquid is modeled by a sensitivity factor. This comprehensive approach yields excellent agreement with experimental current-voltage characteristics without any fitting parameters. Having verified the numerical model in this manner, we study the sensitivity of nanowire PSA sensors by changing device parameters, making it possible to optimize the devices and revealing the attributes of the optimal field-effect sensor.

Semiconductor Quantum Electron Wave Transport, Diffraction, and Interference: Analysis, Device, and Measurement.

NASA Astrophysics Data System (ADS)

Henderson, Gregory Newell

Semiconductor device dimensions are rapidly approaching a fundamental limit where drift-diffusion equations and the depletion approximation are no longer valid. In this regime, quantum effects can dominate device response. To increase further device density and speed, new devices must be designed that use these phenomena to positive advantage. In addition, quantum effects provide opportunities for a new class of devices which can perform functions previously unattainable with "conventional" semiconductor devices. This thesis has described research in the analysis of electron wave effects in semiconductors and the development of methods for the design, fabrication, and characterization of quantum devices based on these effects. First, an exact set of quantitative analogies are presented which allow the use of well understood optical design and analysis tools for the development of electron wave semiconductor devices. Motivated by these analogies, methods are presented for modeling electron wave grating diffraction using both an exact rigorous coupled-wave analysis and approximate analyses which are useful for grating design. Example electron wave grating switch and multiplexer designs are presented. In analogy to thin-film optics, the design and analysis of electron wave Fabry-Perot interference filters are also discussed. An innovative technique has been developed for testing these (and other) electron wave structures using Ballistic Electron Emission Microscopy (BEEM). This technique uses a liquid-helium temperature scanning tunneling microscope (STM) to perform spectroscopy of the electron transmittance as a function of electron energy. Experimental results show that BEEM can resolve even weak quantum effects, such as the reflectivity of a single interface between materials. Finally, methods are discussed for incorporating asymmetric electron wave Fabry-Perot filters into optoelectronic devices. Theoretical and experimental results show that such structures could be the basis for a new type of electrically pumped mid - to far-infrared semiconductor laser.

Electric field induced spin-polarized current

DOEpatents

Murakami, Shuichi; Nagaosa, Naoto; Zhang, Shoucheng

2006-05-02

A device and a method for generating an electric-field-induced spin current are disclosed. A highly spin-polarized electric current is generated using a semiconductor structure and an applied electric field across the semiconductor structure. The semiconductor structure can be a hole-doped semiconductor having finite or zero bandgap or an undoped semiconductor of zero bandgap. In one embodiment, a device for injecting spin-polarized current into a current output terminal includes a semiconductor structure including first and second electrodes, along a first axis, receiving an applied electric field and a third electrode, along a direction perpendicular to the first axis, providing the spin-polarized current. The semiconductor structure includes a semiconductor material whose spin orbit coupling energy is greater than room temperature (300 Kelvin) times the Boltzmann constant. In one embodiment, the semiconductor structure is a hole-doped semiconductor structure, such as a p-type GaAs semiconductor layer.

Liquid crystal cells with built-in CdSe nanotubes for chromogenic smart emission devices.

PubMed

Lin, Tsung Ju; Chen, Chin-Chang; Cheng, Soofin; Chen, Yang Fang

2008-01-21

A simple and general approach for controlling optical anisotropy of nanostructured semiconductors is reported. Our design involves the fabrication of liquid crystal devices with built-in semiconductor nanotubes. Quite interestingly, it is found that semiconductor nanotubes can be well aligned along the orientation of liquid crystals molecules automatically, resulting in a very large emission anisotropy with the degree of polarization up to 72%. This intriguing result manifests a way to obtain well aligned semiconductor nanotubes and the emission anisotropy can be easily manipulated by an external bias. The ability to well control the emission anisotropy should open up new opportunities for nanostructured semiconductors, including optical filters, polarized light emitting diodes, flat panel displays, and many other chromogenic smart devices.

Semiconductor with protective surface coating and method of manufacture thereof. [Patent application

DOEpatents

Hansen, W.L.; Haller, E.E.

1980-09-19

Passivation of predominantly crystalline semiconductor devices is provided for by a surface coating of sputtered hydrogenated amorphous semiconductor material. Passivation of a radiation detector germanium diode, for example, is realized by sputtering a coating of amorphous germanium onto the etched and quenched diode surface in a low pressure atmosphere of hydrogen and argon. Unlike prior germanium diode semiconductor devices, which must be maintained in vacuum at cryogenic temperatures to avoid deterioration, a diode processed in the described manner may be stored in air at room temperature or otherwise exposed to a variety of environmental conditions. The coating compensates for pre-existing undesirable surface states as well as protecting the semiconductor device against future impregnation with impurities.

Ferrite film growth on semiconductor substrates towards microwave and millimeter wave integrated circuits

NASA Astrophysics Data System (ADS)

Chen, Z.; Harris, V. G.

2012-10-01

It is widely recognized that as electronic systems' operating frequency shifts to microwave and millimeter wave bands, the integration of ferrite passive devices with semiconductor solid state active devices holds significant advantages in improved miniaturization, bandwidth, speed, power and production costs, among others. Traditionally, ferrites have been employed in discrete bulk form, despite attempts to integrate ferrite as films within microwave integrated circuits. Technical barriers remain centric to the incompatibility between ferrite and semiconductor materials and their processing protocols. In this review, we present past and present efforts at ferrite integration with semiconductor platforms with the aim to identify the most promising paths to realizing the complete integration of on-chip ferrite and semiconductor devices, assemblies and systems.

Growth of coincident site lattice matched semiconductor layers and devices on crystalline substrates

DOEpatents

Norman, Andrew G; Ptak, Aaron J

2013-08-13

Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a substrate having a crystalline surface with a known lattice parameter (a). The method further includes growing a crystalline semiconductor layer on the crystalline substrate surface by coincident site lattice matched epitaxy, without any buffer layer between the crystalline semiconductor layer and the crystalline surface of the substrate. The crystalline semiconductor layer will be prepared to have a lattice parameter (a') that is related to the substrate lattice parameter (a). The lattice parameter (a') maybe related to the lattice parameter (a) by a scaling factor derived from a geometric relationship between the respective crystal lattices.

Design and fabrication of 6.1-.ANG. family semiconductor devices using semi-insulating A1Sb substrate

DOEpatents

Sherohman, John W [Livermore, CA; Coombs, III, Arthur W.; Yee, Jick Hong [Livermore, CA; Wu, Kuang Jen J [Cupertino, CA

2007-05-29

For the first time, an aluminum antimonide (AlSb) single crystal substrate is utilized to lattice-match to overlying semiconductor layers. The AlSb substrate establishes a new design and fabrication approach to construct high-speed, low-power electronic devices while establishing inter-device isolation. Such lattice matching between the substrate and overlying semiconductor layers minimizes the formation of defects, such as threaded dislocations, which can decrease the production yield and operational life-time of 6.1-.ANG. family heterostructure devices.

Sci-Sat AM: Radiation Dosimetry and Practical Therapy Solutions - 01: Optimization of an organic field effect transistor for radiation dosimetry measurements

DOE Office of Scientific and Technical Information (OSTI.GOV)

Syme, Alasdair

2016-08-15

Purpose: To use Monte Carlo simulations to optimize the design of an organic field effect transistor (OFET) to maximize water-equivalence across the diagnostic and therapeutic photon energy ranges. Methods: DOSXYZnrc was used to simulate transport of mono-energetic photon beams through OFETs. Dose was scored in the dielectric region of devices and used for evaluating the response of the device relative to water. Two designs were considered: 1. a bottom-gate device on a substrate of polyethylene terephthalate (PET) with an aluminum gate, a dielectric layer of either PMMA or CYTOP (a fluorocarbon) and an organic semiconductor (pentacene). 2. a symmetric bilayermore » design was employed in which two polymer layers (PET and CYTOP) were deposited both below the gate and above the semiconductor to improve water-equivalence and reduce directional dependence. The relative thickness of the layers was optimized to maximize water-equivalence. Results: Without the bilayer, water-equivalence was diminished relative to OFETs with the symmetric bilayer at low photon energies (below 80 keV). The bilayer’s composition was designed to have one layer with an effective atomic number larger than that of water and the other with an effective atomic number lower than that of water. For the particular materials used in this study, a PET layer 0.1mm thick coupled with a CYTOP layer of 900 nm provided a device with a water-equivalence within 3% between 20 keV and 5 MeV. Conclusions: organic electronic devices hold tremendous potential as water-equivalent dosimeters that could be used in a wide range of applications without recalibration.« less

Memory effects in a Al/Ti:HfO2/CuPc metal-oxide-semiconductor device

NASA Astrophysics Data System (ADS)

Tripathi, Udbhav; Kaur, Ramneek

2016-05-01

Metal oxide semiconductor structured organic memory device has been successfully fabricated. Ti doped hafnium oxide (Ti:HfO2) nanoparticles has been fabricated by precipitation method and further calcinated at 800 °C. Copper phthalocyanine, a hole transporting material has been utilized as an organic semiconductor. The electrical properties of the fabricated device have been studied by measuring the current-voltage and capacitance-voltage characteristics. The amount of charge stored in the nanoparticles has been calculated by using flat band condition. This simple approach for fabricating MOS memory device has opens up opportunities for the development of next generation memory devices.

Porous silicon carbide (SiC) semiconductor device

NASA Technical Reports Server (NTRS)

Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)

1994-01-01

A semiconductor device employs at least one layer of semiconducting porous silicon carbide (SiC). The porous SiC layer has a monocrystalline structure wherein the pore sizes, shapes, and spacing are determined by the processing conditions. In one embodiment, the semiconductor device is a p-n junction diode in which a layer of n-type SiC is positioned on a p-type layer of SiC, with the p-type layer positioned on a layer of silicon dioxide. Because of the UV luminescent properties of the semiconducting porous SiC layer, it may also be utilized for other devices such as LEDs and optoelectronic devices.

Monte Carlo simulations of spin transport in a strained nanoscale InGaAs field effect transistor

NASA Astrophysics Data System (ADS)

Thorpe, B.; Kalna, K.; Langbein, F. C.; Schirmer, S.

2017-12-01

Spin-based logic devices could operate at a very high speed with a very low energy consumption and hold significant promise for quantum information processing and metrology. We develop a spintronic device simulator by combining an in-house developed, experimentally verified, ensemble self-consistent Monte Carlo device simulator with spin transport based on a Bloch equation model and a spin-orbit interaction Hamiltonian accounting for Dresselhaus and Rashba couplings. It is employed to simulate a spin field effect transistor operating under externally applied voltages on a gate and a drain. In particular, we simulate electron spin transport in a 25 nm gate length In0.7Ga0.3As metal-oxide-semiconductor field-effect transistor with a CMOS compatible architecture. We observe a non-uniform decay of the net magnetization between the source and the gate and a magnetization recovery effect due to spin refocusing induced by a high electric field between the gate and the drain. We demonstrate a coherent control of the polarization vector of the drain current via the source-drain and gate voltages, and show that the magnetization of the drain current can be increased twofold by the strain induced into the channel.

Spin transport in lateral structures with semiconducting channel

NASA Astrophysics Data System (ADS)

Zainuddin, Abu Naser

Spintronics is an emerging field of electronics with the potential to be used in future integrated circuits. Spintronic devices are already making their mark in storage technologies in recent times and there are proposals for using spintronic effects in logic technologies as well. So far, major improvement in spintronic effects, for example, the `spin-valve' effect, is being achieved in metals or insulators as channel materials. But not much progress is made in semiconductors owing to the difficulty in injecting spins into them, which has only very recently been overcome with the combined efforts of many research groups around the world. The key motivations for semiconductor spintronics are their ease in integration with the existing semiconductor technology along with the gate controllability. At present semiconductor based spintronic devices are mostly lateral and are showing a very poor performance compared to their metal or insulator based vertical counterparts. The objective of this thesis is to analyze these devices based on spin-transport models and simulations. At first a lateral spin-valve device is modeled with the spin-diffusion equation based semiclassical approach. Identifying the important issues regarding the device performance, a compact circuit equivalent model is presented which would help to improve the device design. It is found that the regions outside the current path also have a significant influence on the device performance under certain conditions, which is ordinarily neglected when only charge transport is considered. Next, a modified spin-valve structure is studied where the spin signal is controlled with a gate in between the injecting and detecting contacts. The gate is used to modulate the rashba spin-orbit coupling of the channel which, in turn, modulates the spin-valve signal. The idea of gate controlled spin manipulation was originally proposed by Datta and Das back in 1990 and is called 'Datta-Das' effect. In this thesis, we have extended the model described in the original proposal to include the influence of channel dimensions on the nature of electron flow and the contact dimensions on the magnitude and phase of the spin-valve signal. In order to capture the spin-orbit effect a non-equilibrium Green's function (NEGF) based quantum transport model for spin-valve device have been developed which is also explained with simple theoretical treatment based on stationary phase approximation. The model is also compared against a recent experiment that demonstrated such gate modulated spin-valve effect. This thesis also evaluates the possibility of gate controlled magnetization reversal or spin-torque effect as a means to validate this, so called, 'Datta-Das' effect on a more solid footing. Finally, the scope for utilizing topological insulator material in semiconductor spintronics is discussed as a possible future work for this thesis.

T-gate geometric (solution for submicrometer gate length) HEMT: Physical analysis, modeling and implementation as parasitic elements and its usage as dual gate for variable gain amplifiers

NASA Astrophysics Data System (ADS)

Gupta, Ritesh; Rathi, Servin; Kaur, Ravneet; Gupta, Mridula; Gupta, R. S.

2009-03-01

In order to achieve superior RF performance, short gate length is required for the compound semiconductor field effect transistors, but the limitation in lithography for submicrometer gate lengths leads to the formation of various metal-insulator geometries like T-gate [Sandeep R. Bahl, Jesus A. del Alamo, Physics of breakdown in InAlAs/ n +-InGaAs heterostructure field-effect transistors, IEEE Trans. Electron Devices 41 (12) (1994) 2268-2275]. These geometries are the combination of various Metal-Semiconductor (MS)/Metal-Air-Semiconductor (MAS) contacts. Moreover, field plates [S. Karmalkar, M.S. Shur, G. Simin, M. Asif Khan, Field-plate engineering for HFETs, IEEE Trans. Electron Devices 52 (2005) 2534-2540] are also being fabricated these days, mainly at the drain end ( Γ-gate) having Metal-Insulator-Semiconductor (MIS) instead of MAS contact with the intention of increasing the breakdown voltage of the device. To realize the effect of upper gate electrode in the T-gate structure and field plates, an analytical model has been proposed in the present article by dividing the whole structure into MS/MIS contact regions, applying current continuity among them and solving iteratively. The model proposed for Metal-Insulator Semiconductor High Electron Mobility Transistor (MISHEMT) [R. Gupta, S.K. Aggarwal, M. Gupta, R.S. Gupta, Analytical model for metal insulator semiconductor high electron mobility transistor (MISHEMT) for its high frequency and high power applications, J. Semicond. Technol. Sci. 6 (3) (2006) 189-198], is equally applicable to High Electron Mobility Transistors (HEMT) and has been used to formulate this model. In this paper, various structures and geometries have been compared to anticipate the need of T-gate modeling. The effect of MIS contacts has been implemented as parasitic resistance and capacitance and has also been studied to control the middle conventional gate as in dual gate technology by applying separate voltages across it. The results obtained using the proposed analytical scheme has been compared with simulated and experimental results, to prove the validity of our model.

Mechanical properties of organic semiconductors for mechanically stable and intrinsically stretchable solar cells (Conference Presentation)

NASA Astrophysics Data System (ADS)

Lipomi, Darren J.

2016-09-01

This presentation describes my group's efforts to understand the molecular and microstructural basis for the mechanical properties of organic semiconductors for organic photovoltaic (OPV) devices. Our work is motivated by two goals. The first goal is to mitigate mechanical forms of degradation of printed modules during roll-to-roll fabrication, installation, and environmental forces—i.e., wind, rain, snow, and thermal expansion and contraction. Mechanical stability is a prerequisite for inexpensive processing on flexible substrates: to encapsulate devices in glass is to surrender this advantage. The second goal is to enable the next generation of ultra-flexible and stretchable solar cells for collapsible, portable, and wearable applications, and as low-cost sources of energy—"solar tarps"—for disaster relief and for the developing world. It may seem that organic semiconductors, due to their carbon framework, are already sufficiently compliant for these applications. We have found, however, that the mechanical properties (stiffness and brittleness) occupy a wide range of values, and can be difficult to predict from molecular structure alone. We are developing an experimental and theoretical framework for how one can combine favorable charge-transport properties and mechanical compliance in organic semiconductor films. In particular, we have explored the roles of the backbone, alkyl side chain, microstructural order, the glass transition, molecular packing with fullerenes, plasticizing effects of additives, extent of separation of [60]PCBM and [70]PCBM, structural randomness in low-bandgap polymers, and reinforcement by encapsulation, on the mechanical compliance. We are exploring the applicability of semi-empirical "back-of-the-envelope" models, along with multi-scale molecular dynamics simulations, with the ultimate goal of designing electroactive organic materials whose mechanical properties can be dialed-in. We have used the insights we have developed to demonstrate several new applications for OPV that demand extreme compliance, including biaxial stretching and conformal bonding of whole devices to hemispheres, and devices with ultrathin encapsulation mounted on human skin that survive significant cyclic mechanical deformation in the outdoor environment.

Modeling and fabrication of 4H-SiC Schottky junction

NASA Astrophysics Data System (ADS)

Martychowiec, A.; Pedryc, A.; Kociubiński, A.

2017-08-01

The rapidly growing demand for electronic devices requires using of alternative semiconductor materials, which could replace conventional silicon. Silicon carbide has been proposed for these harsh environment applications (high temperature, high voltage, high power conditions) because of its wide bandgap, its high temperature operation ability, its excellent thermal and chemical stability, and its high breakdown electric field strength. The Schottky barrier diode (SBD) is known as one of the best refined SiC devices. This paper presents prepared model, simulations and description of technology of 4H-SiC Schottky junction as well as characterization of fabricated structures. The future aim of the application of the structures is an optical detection of an ultraviolet radiation. The model section contains a comparison of two different solutions of SBD's construction. Simulations - as a crucial process of designing electronic devices - have been performed using the ATLAS device of Silvaco TCAD software. As a final result the paper shows I-V characteristics of fabricated diodes.

Characteristics of Superjunction Lateral-Double-Diffusion Metal Oxide Semiconductor Field Effect Transistor and Degradation after Electrical Stress

NASA Astrophysics Data System (ADS)

Lin, Jyh‑Ling; Lin, Ming‑Jang; Lin, Li‑Jheng

2006-04-01

The superjunction lateral double diffusion metal oxide semiconductor field effect has recently received considerable attention. Introducing heavily doped p-type strips to the n-type drift region increases the horizontal depletion capability. Consequently, the doping concentration of the drift region is higher and the conduction resistance is lower than those of conventional lateral-double-diffusion metal oxide semiconductor field effect transistors (LDMOSFETs). These characteristics may increase breakdown voltage (\\mathit{BV}) and reduce specific on-resistance (Ron,sp). In this study, we focus on the electrical characteristics of conventional LDMOSFETs on silicon bulk, silicon-on-insulator (SOI) LDMOSFETs and superjunction LDMOSFETs after bias stress. Additionally, the \\mathit{BV} and Ron,sp of superjunction LDMOSFETs with different N/P drift region widths and different dosages are discussed. Simulation tools, including two-dimensional (2-D) TSPREM-4/MEDICI and three-dimensional (3-D) DAVINCI, were employed to determine the device characteristics.

Monolithically integrated bacteriorhodopsin/semiconductor opto-electronic integrated circuit for a bio-photoreceiver.

PubMed

Xu, J; Bhattacharya, P; Váró, G

2004-03-15

The light-sensitive protein, bacteriorhodopsin (BR), is monolithically integrated with an InP-based amplifier circuit to realize a novel opto-electronic integrated circuit (OEIC) which performs as a high-speed photoreceiver. The circuit is realized by epitaxial growth of the field-effect transistors, currently used semiconductor device and circuit fabrication techniques, and selective area BR electro-deposition. The integrated photoreceiver has a responsivity of 175 V/W and linear photoresponse, with a dynamic range of 16 dB, with 594 nm photoexcitation. The dynamics of the photochemical cycle of BR has also been modeled and a proposed equivalent circuit simulates the measured BR photoresponse with good agreement.

Over-voltage protection system and method

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chi, Song; Dong, Dong; Lai, Rixin

An over-voltage protection system includes an electronic valve connected across two terminals of a circuit and an over-voltage detection circuit connected across one of the plurality of semiconductor devices for detecting an over-voltage across the circuit. The electronic valve includes a plurality of semiconductor devices connected in series. The over-voltage detection circuit includes a voltage divider circuit connected to a break-over diode in a way to provide a representative low voltage to the break-over diode and an optocoupler configured to receive a current from the break-over diode when the representative low voltage exceeds a threshold voltage of the break-over diodemore » indicating an over-voltage condition. The representative low voltage provided to the break-over diode represents a voltage across the one semiconductor device. A plurality of self-powered gate drive circuits are connected to the plurality of semiconductor devices, wherein the plurality of self-powered gate drive circuits receive over-voltage triggering pulses from the optocoupler during the over-voltage condition and switch on the plurality of semiconductor devices to bypass the circuit.« less

The preparation method of terahertz monolithic integrated device

NASA Astrophysics Data System (ADS)

Zhang, Cong; Su, Bo; He, Jingsuo; Zhang, Hongfei; Wu, Yaxiong; Zhang, Shengbo; Zhang, Cunlin

2018-01-01

The terahertz monolithic integrated device is to integrate the pumping area of the terahertz generation, the detection area of the terahertz receiving and the metal waveguide of terahertz transmission on the same substrate. The terahertz generation and detection device use a photoconductive antenna structure the metal waveguide use a microstrip line structure. The evanescent terahertz-bandwidth electric field extending above the terahertz transmission line interacts with, and is modified by, overlaid dielectric samples, thus enabling the characteristic vibrational absorption resonances in the sample to be probed. In this device structure, since the semiconductor substrate of the photoconductive antenna is located between the strip conductor and the dielectric layer of the microstrip line, and the semiconductor substrate cannot grow on the dielectric layer directly. So how to prepare the semiconductor substrate of the photoconductive antenna and how to bond the semiconductor substrate to the dielectric layer of the microstrip line is a key step in the terahertz monolithic integrated device. In order to solve this critical problem, the epitaxial wafer structure of the two semiconductor substrates is given and transferred to the desired substrate by two methods, respectively.

Interconnect assembly for an electronic assembly and assembly method therefor

DOEpatents

Gerbsch, Erich William

2003-06-10

An interconnect assembly and method for a semiconductor device, in which the interconnect assembly can be used in lieu of wirebond connections to form an electronic assembly. The interconnect assembly includes first and second interconnect members. The first interconnect member has a first surface with a first contact and a second surface with a second contact electrically connected to the first contact, while the second interconnect member has a flexible finger contacting the second contact of the first interconnect member. The first interconnect member is adapted to be aligned and registered with a semiconductor device having a contact on a first surface thereof, so that the first contact of the first interconnect member electrically contacts the contact of the semiconductor device. Consequently, the assembly method does not require any wirebonds, but instead merely entails aligning and registering the first interconnect member with the semiconductor device so that the contacts of the first interconnect member and the semiconductor device make electrically contact, and then contacting the second contact of the first interconnect member with the flexible finger of the second interconnect member.

Metal-organic semiconductor interfacial barrier height determination from internal photoemission signal in spectral response measurements

NASA Astrophysics Data System (ADS)

Kumar, Sandeep; Iyer, S. Sundar Kumar

2017-04-01

Accurate and convenient evaluation methods of the interfacial barrier ϕb for charge carriers in metal semiconductor (MS) junctions are important for designing and building better opto-electronic devices. This becomes more critical for organic semiconductor devices where a plethora of molecules are in use and standardised models applicable to myriads of material combinations for the different devices may have limited applicability. In this paper, internal photoemission (IPE) from spectral response (SR) in the ultra-violet to near infra-red range of different MS junctions of metal-organic semiconductor-metal (MSM) test structures is used to determine more realistic MS ϕb values. The representative organic semiconductor considered is [6, 6]-phenyl C61 butyric acid methyl ester, and the metals considered are Al and Au. The IPE signals in the SR measurement of the MSM device are identified and separated before it is analysed to estimate ϕb for the MS junction. The analysis of IPE signals under different bias conditions allows the evaluation of ϕb for both the front and back junctions, as well as for symmetric MSM devices.

Method for fabricating an interconnected array of semiconductor devices

DOEpatents

Grimmer, Derrick P.; Paulson, Kenneth R.; Gilbert, James R.

1989-10-10

Semiconductor layer and conductive layer formed on a flexible substrate, divided into individual devices and interconnected with one another in series by interconnection layers and penetrating terminals.

Methods of Measurement for Semiconductor Materials, Process Control, and Devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1973-01-01

The development of methods of measurement for semiconductor materials, process control, and devices is reported. Significant accomplishments include: (1) Completion of an initial identification of the more important problems in process control for integrated circuit fabrication and assembly; (2) preparations for making silicon bulk resistivity wafer standards available to the industry; and (3) establishment of the relationship between carrier mobility and impurity density in silicon. Work is continuing on measurement of resistivity of semiconductor crystals; characterization of generation-recombination-trapping centers, including gold, in silicon; evaluation of wire bonds and die attachment; study of scanning electron microscopy for wafer inspection and test; measurement of thermal properties of semiconductor devices; determination of S-parameters and delay time in junction devices; and characterization of noise and conversion loss of microwave detector diodes.

Multi-physics analysis of hybrid graphene/semiconductor plasmonic terahertz sources (Conference Presentation)

NASA Astrophysics Data System (ADS)

Nafari, Mona; Aizin, Gregory R.; Jornet, Josep M.

2017-05-01

Wireless data rates have doubled every eighteen months for the last three decades. Following this trend, Terabit-per-second links will become a reality within the next five years. In this context, Terahertz (THz) band (0.1-10 THz) communication is envisioned as a key technology of the next decade. Despite major progress towards developing THz sources, compact signal generators above 1 THz able to efficiently work at room temperature are still missing. Recently, the use of hybrid graphene/semiconductor high-electron-mobility transistors (HEMT) has been proposed as a way to generate Surface Plasmon Polariton (SPP) waves at THz frequencies. Compact size, room-temperature operation and tunability of the graphene layer, in addition to possibility for large scale integration, motivate the exploration of this approach. In this paper, a simulation model of hybrid graphene/semiconductor HEMT-based THz sources is developed. More specifically, first, the necessary conditions for the so-called Dyakonov-Shur instability to arise within the HEMT channel are derived, and the impact of imperfect boundary conditions is analyzed. Second, the required conditions for coupling between a confined plasma wave in the HEMT channel and a SPP wave in graphene are derived, by starting from the coupling analysis between two 2DEG. Multi-physics simulation are conducted by integrating the hydrodynamic equations for the description of the HEMT device with Maxwell's equations for SPP modeling. Extensive results are provided to analyze the impact of different design elements on the THz signal source. This work will guide the experimental fabrication and characterization of the devices.

Molecular Electrical Doping of Organic Semiconductors: Fundamental Mechanisms and Emerging Dopant Design Rules.

PubMed

Salzmann, Ingo; Heimel, Georg; Oehzelt, Martin; Winkler, Stefanie; Koch, Norbert

2016-03-15

Today's information society depends on our ability to controllably dope inorganic semiconductors, such as silicon, thereby tuning their electrical properties to application-specific demands. For optoelectronic devices, organic semiconductors, that is, conjugated polymers and molecules, have emerged as superior alternative owing to the ease of tuning their optical gap through chemical variability and their potential for low-cost, large-area processing on flexible substrates. There, the potential of molecular electrical doping for improving the performance of, for example, organic light-emitting devices or organic solar cells has only recently been established. The doping efficiency, however, remains conspicuously low, highlighting the fact that the underlying mechanisms of molecular doping in organic semiconductors are only little understood compared with their inorganic counterparts. Here, we review the broad range of phenomena observed upon molecularly doping organic semiconductors and identify two distinctly different scenarios: the pairwise formation of both organic semiconductor and dopant ions on one hand and the emergence of ground state charge transfer complexes between organic semiconductor and dopant through supramolecular hybridization of their respective frontier molecular orbitals on the other hand. Evidence for the occurrence of these two scenarios is subsequently discussed on the basis of the characteristic and strikingly different signatures of the individual species involved in the respective doping processes in a variety of spectroscopic techniques. The critical importance of a statistical view of doping, rather than a bimolecular picture, is then highlighted by employing numerical simulations, which reveal one of the main differences between inorganic and organic semiconductors to be their respective density of electronic states and the doping induced changes thereof. Engineering the density of states of doped organic semiconductors, the Fermi-Dirac occupation of which ultimately determines the doping efficiency, thus emerges as key challenge. As a first step, the formation of charge transfer complexes is identified as being detrimental to the doping efficiency, which suggests sterically shielding the functional core of dopant molecules as an additional design rule to complement the requirement of low ionization energies or high electron affinities in efficient n-type or p-type dopants, respectively. In an extended outlook, we finally argue that, to fully meet this challenge, an improved understanding is required of just how the admixture of dopant molecules to organic semiconductors does affect the density of states: compared with their inorganic counterparts, traps for charge carriers are omnipresent in organic semiconductors due to structural and chemical imperfections, and Coulomb attraction between ionized dopants and free charge carriers is typically stronger in organic semiconductors owing to their lower dielectric constant. Nevertheless, encouraging progress is being made toward developing a unifying picture that captures the entire range of doping induced phenomena, from ion-pair to complex formation, in both conjugated polymers and molecules. Once completed, such a picture will provide viable guidelines for synthetic and supramolecular chemistry that will enable further technological advances in organic and hybrid organic/inorganic devices.

Semiconductor structures having electrically insulating and conducting portions formed from an AlSb-alloy layer

DOEpatents

Spahn, O.B.; Lear, K.L.

1998-03-10

The semiconductor structure comprises a plurality of semiconductor layers formed on a substrate including at least one layer of a III-V compound semiconductor alloy comprising aluminum (Al) and antimony (Sb), with at least a part of the AlSb-alloy layer being chemically converted by an oxidation process to form superposed electrically insulating and electrically conducting portions. The electrically insulating portion formed from the AlSb-alloy layer comprises an oxide of aluminum (e.g., Al{sub 2}O{sub 3}), while the electrically conducting portion comprises Sb. A lateral oxidation process allows formation of the superposed insulating and conducting portions below monocrystalline semiconductor layers for forming many different types of semiconductor structures having particular utility for optoelectronic devices such as light-emitting diodes, edge-emitting lasers, vertical-cavity surface-emitting lasers, photodetectors and optical modulators (waveguide and surface normal), and for electronic devices such as heterojunction bipolar transistors, field-effect transistors and quantum-effect devices. The invention is expected to be particularly useful for forming light-emitting devices for use in the 1.3--1.6 {mu}m wavelength range, with the AlSb-alloy layer acting to define an active region of the device and to effectively channel an electrical current therein for efficient light generation. 10 figs.

Optical processing for semiconductor device fabrication

NASA Technical Reports Server (NTRS)

Sopori, Bhushan L.

1994-01-01

A new technique for semiconductor device processing is described that uses optical energy to produce local heating/melting in the vicinity of a preselected interface of the device. This process, called optical processing, invokes assistance of photons to enhance interface reactions such as diffusion and melting, as compared to the use of thermal heating alone. Optical processing is performed in a 'cold wall' furnace, and requires considerably lower energies than furnace or rapid thermal annealing. This technique can produce some device structures with unique properties that cannot be produced by conventional thermal processing. Some applications of optical processing involving semiconductor-metal interfaces are described.

New developments in power semiconductors

NASA Technical Reports Server (NTRS)

Sundberg, G. R.

1983-01-01

This paper represents an overview of some recent power semiconductor developments and spotlights new technologies that may have significant impact for aircraft electric secondary power. Primary emphasis will be on NASA-Lewis-supported developments in transistors, diodes, a new family of semiconductors, and solid-state remote power controllers. Several semiconductor companies that are moving into the power arena with devices rated at 400 V and 50 A and above are listed, with a brief look at a few devices.

Theoretical analysis and simulation study of low-power CMOS electrochemical impedance spectroscopy biosensor in 55 nm deeply depleted channel technology for cell-state monitoring

NASA Astrophysics Data System (ADS)

Itakura, Keisuke; Kayano, Keisuke; Nakazato, Kazuo; Niitsu, Kiichi

2018-01-01

We present an impedance-detection complementary metal oxide semiconductor (CMOS) biosensor circuit for cell-state observation. The proposed biosensor can measure the expected impedance values encountered by a cell-state observation measurement system within a 0.1-200 MHz frequency range. The proposed device is capable of monitoring the intracellular conditions necessary for real-time cell-state observation, and can be fabricated using a 55 nm deeply depleted channel CMOS process. Operation of the biosensor circuit with 0.9 and 1.7 V supply voltages is verified via a simulated program with integrated circuit emphasis (SPICE) simulation. The power consumption is 300 µW. Further, the standby power consumption is 290 µW, indicating that this biosensor is a low-power instrument suitable for use in Internet of Things (IoT) devices.

Computer analysis of the negative differential resistance switching phenomenon of double-injection devices

NASA Technical Reports Server (NTRS)

Shieh, Tsay-Jiu

1989-01-01

By directly solving the semiconductor differential equations for the double-injection (DI) devices involving two interacting deep levels, the authors studied the negative differential resistance switching characteristic and its relationship with the device dimension, doping level, and dependence on the deep impurity profile. Computer simulation showed that although one can increase the threshold voltage by increasing the device length, the excessive holding voltage that would follow would put this device in a very limited application such as pulse power source. The excessive leakage current in the low conductance state also jeopardizes the attempt to use the device for any practical purpose. Unless there are new materials and deep impurities found that have a great differential hole and electron capture cross sections and a reasonable energy bandgap for low intrinsic carrier concentration, no big improvement in the fate of DI devices is expected in the near future.

Semiconductor devices incorporating multilayer interference regions

DOEpatents

Biefeld, Robert M.; Drummond, Timothy J.; Gourley, Paul L.; Zipperian, Thomas E.

1990-01-01

A semiconductor high reflector comprising a number of thin alternating layers of semiconductor materials is electrically tunable and may be used as a temperature insensitive semiconductor laser in a Fabry-Perot configuration.

Thin film photovoltaic device with multilayer substrate

DOEpatents

Catalano, Anthony W.; Bhushan, Manjul

1984-01-01

A thin film photovoltaic device which utilizes at least one compound semiconductor layer chosen from Groups IIB and VA of the Periodic Table is formed on a multilayer substrate The substrate includes a lowermost support layer on which all of the other layers of the device are formed. Additionally, an uppermost carbide or silicon layer is adjacent to the semiconductor layer. Below the carbide or silicon layer is a metal layer of high conductivity and expansion coefficient equal to or slightly greater than that of the semiconductor layer.

Optical systems fabricated by printing-based assembly

DOEpatents

Rogers, John; Nuzzo, Ralph; Meitl, Matthew; Menard, Etienne; Baca, Alfred J; Motala, Michael; Ahn, Jong-Hyun; Park, Sang-Il; Yu, Chang-Jae; Ko, Heung Cho; Stoykovich, Mark; Yoon, Jongseung

2014-05-13

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

Optical systems fabricated by printing-based assembly

DOEpatents

Rogers, John [Champaign, IL; Nuzzo, Ralph [Champaign, IL; Meitl, Matthew [Durham, NC; Menard, Etienne [Durham, NC; Baca, Alfred J [Urbana, IL; Motala, Michael [Champaign, IL; Ahn, Jong-Hyun [Suwon, KR; Park, Sang-II [Savoy, IL; Yu,; Chang-Jae, [Urbana, IL; Ko, Heung-Cho [Gwangju, KR; Stoykovich,; Mark, [Dover, NH; Yoon, Jongseung [Urbana, IL

2011-07-05

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

Optical systems fabricated by printing-based assembly

DOEpatents

Rogers, John; Nuzzo, Ralph; Meitl, Matthew; Menard, Etienne; Baca, Alfred; Motala, Michael; Ahn, Jong -Hyun; Park, Sang -Il; Yu, Chang -Jae; Ko, Heung Cho; Stoykovich, Mark; Yoon, Jongseung

2015-08-25

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

Optical systems fabricated by printing-based assembly

DOEpatents

Rogers, John; Nuzzo, Ralph; Meitl, Matthew; Menard, Etienne; Baca, Alfred; Motala, Michael; Ahn, Jong-Hyun; Park, Sang-Il; Yu, Chang-Jae; Ko, Heung Cho; Stoykovich, Mark; Yoon, Jongseung

2017-03-21

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

Assessment of radiation exposure in dental cone-beam computerized tomography with the use of metal-oxide semiconductor field-effect transistor (MOSFET) dosimeters and Monte Carlo simulations.

PubMed

Koivisto, J; Kiljunen, T; Tapiovaara, M; Wolff, J; Kortesniemi, M

2012-09-01

The aims of this study were to assess the organ and effective dose (International Commission on Radiological Protection (ICRP) 103) resulting from dental cone-beam computerized tomography (CBCT) imaging using a novel metal-oxide semiconductor field-effect transistor (MOSFET) dosimeter device, and to assess the reliability of the MOSFET measurements by comparing the results with Monte Carlo PCXMC simulations. Organ dose measurements were performed using 20 MOSFET dosimeters that were embedded in the 8 most radiosensitive organs in the maxillofacial and neck area. The dose-area product (DAP) values attained from CBCT scans were used for PCXMC simulations. The acquired MOSFET doses were then compared with the Monte Carlo simulations. The effective dose measurements using MOSFET dosimeters yielded, using 0.5-cm steps, a value of 153 μSv and the PCXMC simulations resulted in a value of 136 μSv. The MOSFET dosimeters placed in a head phantom gave results similar to Monte Carlo simulations. Minor vertical changes in the positioning of the phantom had a substantial affect on the overall effective dose. Therefore, the MOSFET dosimeters constitute a feasible method for dose assessment of CBCT units in the maxillofacial region. Copyright © 2012 Elsevier Inc. All rights reserved.

Air-gating and chemical-gating in transistors and sensing devices made from hollow TiO2 semiconductor nanotubes

NASA Astrophysics Data System (ADS)

Alivov, Yahya; Funke, Hans; Nagpal, Prashant

2015-07-01

Rapid miniaturization of electronic devices down to the nanoscale, according to Moore’s law, has led to some undesirable effects like high leakage current in transistors, which can offset additional benefits from scaling down. Development of three-dimensional transistors, by spatial extension in the third dimension, has allowed higher contact area with a gate electrode and better control over conductivity in the semiconductor channel. However, these devices do not utilize the large surface area and interfaces for new electronic functionality. Here, we demonstrate air gating and chemical gating in hollow semiconductor nanotube devices and highlight the potential for development of novel transistors that can be modulated using channel bias, gate voltage, chemical composition, and concentration. Using chemical gating, we reversibly altered the conductivity of nanoscaled semiconductor nanotubes (10-500 nm TiO2 nanotubes) by six orders of magnitude, with a tunable rectification factor (ON/OFF ratio) ranging from 1-106. While demonstrated air- and chemical-gating speeds were slow here (˜seconds) due to the mechanical-evacuation rate and size of our chamber, the small nanoscale volume of these hollow semiconductors can enable much higher switching speeds, limited by the rate of adsorption/desorption of molecules at semiconductor interfaces. These chemical-gating effects are completely reversible, additive between different chemical compositions, and can enable semiconductor nanoelectronic devices for ‘chemical transistors’, ‘chemical diodes’, and very high-efficiency sensing applications.

Prediction and measurement of radiation damage to CMOS devices on board spacecraft

NASA Technical Reports Server (NTRS)

Cliff, R. A.; Danchenko, V.; Stassinopoulos, E. G.; Sing, M.; Brucker, G. J.; Ohanian, R. S.

1976-01-01

The initial results obtained from the Complementary Metal Oxide Semiconductors Radiation Effects Measurement experiment are presented. Predictions of radiation damage to C-MOS devices are based on standard environment models and computational techniques. A comparison of the shifts in CMOS threshold potentials, that is, those measured in space to those obtained from the on the ground simulation experiment with Co 60, indicated that the measured space damage is greater than predicted by a factor of two for shields thicker than 100 mils (2.54 mm), but agrees well with predictions for the thinner shields.

Semiconductor devices incorporating multilayer interference regions

DOEpatents

Biefeld, R.M.; Drummond, T.J.; Gourley, P.L.; Zipperian, T.E.

1987-08-31

A semiconductor high reflector comprising a number of thin alternating layers of semiconductor materials is electrically tunable and may be used as a temperature insensitive semiconductor laser in a Fabry-Perot configuration. 8 figs.

Lattice matched semiconductor growth on crystalline metallic substrates

DOEpatents

Norman, Andrew G; Ptak, Aaron J; McMahon, William E

2013-11-05

Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a metal or metal alloy substrate having a crystalline surface with a known lattice parameter (a). The methods further include growing a crystalline semiconductor alloy layer on the crystalline substrate surface by coincident site lattice matched epitaxy. The semiconductor layer may be grown without any buffer layer between the alloy and the crystalline surface of the substrate. The semiconductor alloy may be prepared to have a lattice parameter (a') that is related to the lattice parameter (a). The semiconductor alloy may further be prepared to have a selected band gap.

77 FR 60721 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Notice of...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-10-04

... Circuit Devices and Products Containing Same; Notice of Commission Determination Not To Review an Initial... public record for this investigation may be viewed on the Commission's electronic docket (EDIS) at http... certain semiconductor integrated circuit devices and products containing same by reason of infringement of...

77 FR 19032 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same Notice of Receipt...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-03-29

... INTERNATIONAL TRADE COMMISSION [DN 2888] Certain Semiconductor Integrated Circuit Devices and... Integrated Circuit Devices and Products Containing Same, DN 2888; the Commission is soliciting comments on... Commission's electronic docket (EDIS) at http://edis.usitc.gov , and will be available for inspection during...

Broadband light sources based on InAs/InGaAs metamorphic quantum dots

DOE Office of Scientific and Technical Information (OSTI.GOV)

Seravalli, L.; Trevisi, G.; Frigeri, P.

We propose a design for a semiconductor structure emitting broadband light in the infrared, based on InAs quantum dots (QDs) embedded into a metamorphic step-graded In{sub x}Ga{sub 1−x}As buffer. We developed a model to calculate the metamorphic QD energy levels based on the realistic QD parameters and on the strain-dependent material properties; we validated the results of simulations by comparison with the experimental values. On this basis, we designed a p-i-n heterostructure with a graded index profile toward the realization of an electrically pumped guided wave device. This has been done by adding layers where QDs are embedded in In{submore » x}Al{sub y}Ga{sub 1−x−y}As layers, to obtain a symmetric structure from a band profile point of view. To assess the room temperature electro-luminescence emission spectrum under realistic electrical injection conditions, we performed device-level simulations based on a coupled drift-diffusion and QD rate equation model. On the basis of the device simulation results, we conclude that the present proposal is a viable option to realize broadband light-emitting devices.« less

Non- contacting capacitive diagnostic device

DOEpatents

Ellison, Timothy

2005-07-12

A non-contacting capacitive diagnostic device includes a pulsed light source for producing an electric field in a semiconductor or photovoltaic device or material to be evaluated and a circuit responsive to the electric field. The circuit is not in physical contact with the device or material being evaluated and produces an electrical signal characteristic of the electric field produced in the device or material. The diagnostic device permits quality control and evaluation of semiconductor or photovoltaic device properties in continuous manufacturing processes.

Methods of measurement for semiconductor materials, process control, and devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1972-01-01

Activities directed toward the development of methods of measurement for semiconductor materials, process control, and devices are described. Accomplishments include the determination of the reasons for differences in measurements of transistor delay time, identification of an energy level model for gold-doped silicon, and the finding of evidence that it does not appear to be necessary for an ultrasonic bonding tool to grip the wire and move it across the substrate metallization to make the bond. Work is continuing on measurement of resistivity of semiconductor crystals; study of gold-doped silicon; development of the infrared response technique; evaluation of wire bonds and die attachment; measurement of thermal properties of semiconductor devices, delay time, and related carrier transport properties in junction devices, and noise properties of microwave diodes; and characterization of silicon nuclear radiation detectors.

Etch Profile Simulation Using Level Set Methods

NASA Technical Reports Server (NTRS)

Hwang, Helen H.; Meyyappan, Meyya; Arnold, James O. (Technical Monitor)

1997-01-01

Etching and deposition of materials are critical steps in semiconductor processing for device manufacturing. Both etching and deposition may have isotropic and anisotropic components, due to directional sputtering and redeposition of materials, for example. Previous attempts at modeling profile evolution have used so-called "string theory" to simulate the moving solid-gas interface between the semiconductor and the plasma. One complication of this method is that extensive de-looping schemes are required at the profile corners. We will present a 2D profile evolution simulation using level set theory to model the surface. (1) By embedding the location of the interface in a field variable, the need for de-looping schemes is eliminated and profile corners are more accurately modeled. This level set profile evolution model will calculate both isotropic and anisotropic etch and deposition rates of a substrate in low pressure (10s mTorr) plasmas, considering the incident ion energy angular distribution functions and neutral fluxes. We will present etching profiles of Si substrates in Ar/Cl2 discharges for various incident ion energies and trench geometries.

Computational study for optimization of a plasmon FET as a molecular biosensor

NASA Astrophysics Data System (ADS)

Ciappesoni, Mark; Cho, Seongman; Tian, Jieyuan; Kim, Sung Jin

2018-02-01

Surface Plasmon Resonance (SPR) is currently being widely studied as it exhibits sensitive optical properties to changes in in the refractive index of the surrounding medium. As novel devices using SPR have been developing rapidly there is a necessity to develop models and simulation environments that will allow for continued development and optimization of these devices. A biological sensing device of interest is the Plasmon FET which has been proven experimentally to have a limit of detection (LOD) of 20pg/ml while being immune to the absorption of the medium. The Plasmon FET is a metal-semiconductor-metal detector which employ functionalized gold nanostructures on a semi-conducting layer. This direct approach has the advantages of not requiring readout optics reducing size and allowing for point-of -care measurements. Using Lumerical FDTD and Device numerical solvers, we can report an advanced simulation environment illustrating several key sensor specifications including LOD, resolution, sensitivity, and dynamic range, for a variety of biological markers providing a comprehensive analysis of a Direct Plasmon-to-Electric conversion device designed to function with colored mediums (eg.whole blood). This model allows for the simulation and optimization of a plasmonic sensor that already o ers advantages in size, operability, and multiplexing-capability, with real time monitoring.

Radiation effects in spacecraft electronics

NASA Technical Reports Server (NTRS)

Raymond, James P.

1989-01-01

Effects on the internal spacecraft electronics due to exposure to the natural and enhanced space radiation environment will be reviewed. The emphasis will be placed on the description of the nature of both the exposure environment and failure mechanisms in semiconductors. Understanding both the system environment and device effects is critical in the use of laboratory simulation environments to obtain the data necessary to design and qualify components for successful application.

2D Vertical Heterostructures for Novel Tunneling Device Applications

DTIC Science & Technology

2017-03-01

controlled by a combination of the drain-source voltage bias (VDS) and the top and bottom gate biases (VTG and VBG, respectively). The drain-source...properties that can potentially overcome some of the limitations of epitaxial 3D semiconductor heterostructures. Simulations of 2D...interlayer barrier, such as h-BN, a high-k dielectric material, or a van der Waal gap. Under appropriate bias conditions, charge carriers can tunnel

A scale-bridging modeling approach for anisotropic organic molecules at patterned semiconductor surfaces

NASA Astrophysics Data System (ADS)

Kleppmann, Nicola; Klapp, Sabine H. L.

2015-02-01

Hybrid systems consisting of organic molecules at inorganic semiconductor surfaces are gaining increasing importance as thin film devices for optoelectronics. The efficiency of such devices strongly depends on the collective behavior of the adsorbed molecules. In the present paper, we propose a novel, coarse-grained model addressing the condensed phases of a representative hybrid system, that is, para-sexiphenyl (6P) at zinc-oxide (ZnO). Within our model, intermolecular interactions are represented via a Gay-Berne potential (describing steric and van-der-Waals interactions) combined with the electrostatic potential between two linear quadrupoles. Similarly, the molecule-substrate interactions include a coupling between a linear molecular quadrupole to the electric field generated by the line charges characterizing ZnO(10-10). To validate our approach, we perform equilibrium Monte Carlo simulations, where the lateral positions are fixed to a 2D lattice, while the rotational degrees of freedom are continuous. We use these simulations to investigate orientational ordering in the condensed state. We reproduce various experimentally observed features such as the alignment of individual molecules with the line charges on the surface, the formation of a standing uniaxial phase with a herringbone structure, as well as the formation of a lying nematic phase.

Charge dissipative dielectric for cryogenic devices

NASA Technical Reports Server (NTRS)

Cantor, Robin Harold (Inventor); Hall, John Addison (Inventor)

2007-01-01

A Superconducting Quantum Interference Device (SQUID) is disclosed comprising a pair of resistively shunted Josephson junctions connected in parallel within a superconducting loop and biased by an external direct current (dc) source. The SQUID comprises a semiconductor substrate and at least one superconducting layer. The metal layer(s) are separated by or covered with a semiconductor material layer having the properties of a conductor at room temperature and the properties of an insulator at operating temperatures (generally less than 100 Kelvins). The properties of the semiconductor material layer greatly reduces the risk of electrostatic discharge that can damage the device during normal handling of the device at room temperature, while still providing the insulating properties desired to allow normal functioning of the device at its operating temperature. A method of manufacturing the SQUID device is also disclosed.

Anisotropy-based crystalline oxide-on-semiconductor material

DOEpatents

McKee, Rodney Allen; Walker, Frederick Joseph

2000-01-01

A semiconductor structure and device for use in a semiconductor application utilizes a substrate of semiconductor-based material, such as silicon, and a thin film of a crystalline oxide whose unit cells are capable of exhibiting anisotropic behavior overlying the substrate surface. Within the structure, the unit cells of the crystalline oxide are exposed to an in-plane stain which influences the geometric shape of the unit cells and thereby arranges a directional-dependent quality of the unit cells in a predisposed orientation relative to the substrate. This predisposition of the directional-dependent quality of the unit cells enables the device to take beneficial advantage of characteristics of the structure during operation. For example, in the instance in which the crystalline oxide of the structure is a perovskite, a spinel or an oxide of similarly-related cubic structure, the structure can, within an appropriate semiconductor device, exhibit ferroelectric, piezoelectric, pyroelectric, electro-optic, ferromagnetic, antiferromagnetic, magneto-optic or large dielectric properties that synergistically couple to the underlying semiconductor substrate.

Suppressing molecular vibrations in organic semiconductors by inducing strain

PubMed Central

Kubo, Takayoshi; Häusermann, Roger; Tsurumi, Junto; Soeda, Junshi; Okada, Yugo; Yamashita, Yu; Akamatsu, Norihisa; Shishido, Atsushi; Mitsui, Chikahiko; Okamoto, Toshihiro; Yanagisawa, Susumu; Matsui, Hiroyuki; Takeya, Jun

2016-01-01

Organic molecular semiconductors are solution processable, enabling the growth of large-area single-crystal semiconductors. Improving the performance of organic semiconductor devices by increasing the charge mobility is an ongoing quest, which calls for novel molecular and material design, and improved processing conditions. Here we show a method to increase the charge mobility in organic single-crystal field-effect transistors, by taking advantage of the inherent softness of organic semiconductors. We compress the crystal lattice uniaxially by bending the flexible devices, leading to an improved charge transport. The mobility increases from 9.7 to 16.5 cm2 V−1 s−1 by 70% under 3% strain. In-depth analysis indicates that compressing the crystal structure directly restricts the vibration of the molecules, thus suppresses dynamic disorder, a unique mechanism in organic semiconductors. Since strain can be easily induced during the fabrication process, we expect our method to be exploited to build high-performance organic devices. PMID:27040501

Suppressing molecular vibrations in organic semiconductors by inducing strain.

PubMed

Kubo, Takayoshi; Häusermann, Roger; Tsurumi, Junto; Soeda, Junshi; Okada, Yugo; Yamashita, Yu; Akamatsu, Norihisa; Shishido, Atsushi; Mitsui, Chikahiko; Okamoto, Toshihiro; Yanagisawa, Susumu; Matsui, Hiroyuki; Takeya, Jun

2016-04-04

Organic molecular semiconductors are solution processable, enabling the growth of large-area single-crystal semiconductors. Improving the performance of organic semiconductor devices by increasing the charge mobility is an ongoing quest, which calls for novel molecular and material design, and improved processing conditions. Here we show a method to increase the charge mobility in organic single-crystal field-effect transistors, by taking advantage of the inherent softness of organic semiconductors. We compress the crystal lattice uniaxially by bending the flexible devices, leading to an improved charge transport. The mobility increases from 9.7 to 16.5 cm(2) V(-1) s(-1) by 70% under 3% strain. In-depth analysis indicates that compressing the crystal structure directly restricts the vibration of the molecules, thus suppresses dynamic disorder, a unique mechanism in organic semiconductors. Since strain can be easily induced during the fabrication process, we expect our method to be exploited to build high-performance organic devices.

EDITORIAL The 23rd Nordic Semiconductor Meeting The 23rd Nordic Semiconductor Meeting

NASA Astrophysics Data System (ADS)

Ólafsson, Sveinn; Sveinbjörnsson, Einar

2010-12-01

A Nordic Semiconductor Meeting is held every other year with the venue rotating amongst the Nordic countries of Denmark, Finland, Iceland, Norway and Sweden. The focus of these meetings remains 'original research and science being carried out on semiconductor materials, devices and systems'. Reports on industrial activity have usually featured. The topics have ranged from fundamental research on point defects in a semiconductor to system architecture of semiconductor electronic devices. Proceedings from these events are regularly published as a topical issue of Physica Scripta. All of the papers in this topical issue have undergone critical peer review and we wish to thank the reviewers and the authors for their cooperation, which has been instrumental in meeting the high scientific standards and quality of the series. This meeting of the 23rd Nordic Semiconductor community, NSM 2009, was held at Háskólatorg at the campus of the University of Iceland, Reykjavik, Iceland, 14-17 June 2009. Support was provided by the University of Iceland. Almost 50 participants presented a broad range of topics covering semiconductor materials and devices as well as related material science interests. The conference provided a forum for Nordic and international scientists to present and discuss new results and ideas concerning the fundamentals and applications of semiconductor materials. The meeting aim was to advance the progress of Nordic science and thus aid in future worldwide technological advances concerning technology, education, energy and the environment. Topics Theory and fundamental physics of semiconductors Emerging semiconductor technologies (for example III-V integration on Si, novel Si devices, graphene) Energy and semiconductors Optical phenomena and optical devices MEMS and sensors Program 14 June Registration 13:00-17:00 15 June Meeting program 09:30-17:00 and Poster Session I 16 June Meeting program 09:30-17:00 and Poster Session II 17 June Excursion and dinner on Icelandic National Day In connection with the conference, a summer school for 40 research students was organized by the Nordic LENS network. The summer school took place in Reykjavik on 11-14 June. For more information on the school please visit the website. The next Nordic Semiconductor meeting, NSM 2011, is scheduled to take place in Aarhus, Denmark, 19-22 June 2011. A full participant list is available in the PDF of this article.

Self bleaching photoelectrochemical-electrochromic device

DOEpatents

Bechinger, Clemens S.; Gregg, Brian A.

2002-04-09

A photoelectrochemical-electrochromic device comprising a first transparent electrode and a second transparent electrode in parallel, spaced relation to each other. The first transparent electrode is electrically connected to the second transparent electrode. An electrochromic material is applied to the first transparent electrode and a nanoporous semiconductor film having a dye adsorbed therein is applied to the second transparent electrode. An electrolyte layer contacts the electrochromic material and the nanoporous semiconductor film. The electrolyte layer has a redox couple whereby upon application of light, the nanoporous semiconductor layer dye absorbs the light and the redox couple oxidizes producing an electric field across the device modulating the effective light transmittance through the device.

Negative Differential Conductance & Hot-Carrier Avalanching in Monolayer WS2 FETs

DOE Office of Scientific and Technical Information (OSTI.GOV)

He, G.; Nathawat, J.; Kwan, C. -P.

The high field phenomena of inter-valley transfer and avalanching breakdown have long been exploited in devices based on conventional semiconductors. In this Article, we demonstrate the manifestation of these effects in atomically-thin WS 2 field-effect transistors. The negative differential conductance exhibits all of the features familiar from discussions of this phenomenon in bulk semiconductors, including hysteresis in the transistor characteristics and increased noise that is indicative of travelling high-field domains. It is also found to be sensitive to thermal annealing, a result that we attribute to the influence of strain on the energy separation of the different valleys involved inmore » hot-electron transfer. This idea is supported by the results of ensemble Monte Carlo simulations, which highlight the sensitivity of the negative differential conductance to the equilibrium populations of the different valleys. At high drain currents (>10 μA/μm) avalanching breakdown is also observed, and is attributed to trap-assisted inverse Auger scattering. This mechanism is not normally relevant in conventional semiconductors, but is possible in WS 2 due to the narrow width of its energy bands. The various results presented here suggest that WS 2 exhibits strong potential for use in hot-electron devices, including compact high-frequency sources and photonic detectors.« less

Terahertz plasmon-induced transparency based on asymmetric dual-disk resonators coupled to a semiconductor InSb waveguide and its biosensor application

NASA Astrophysics Data System (ADS)

Shahamat, Yadollah; Vahedi, Mohammad

2017-06-01

An ultracompact double eight-shaped plasmonic structure for the realization of plasmon-induced transparency (PIT) in the terahertz (THz) region has been studied. The device consists of a semiconductor-insulator-semiconductor bus waveguide coupled to the dual-disk resonators. Indium antimonide is employed to excite SPP in the THz region. The transmission characteristics of the proposed device are simulated numerically by the finite-difference time-domain method. In addition, a theoretical analysis based on the coupled-mode theory for transmission features is presented and compared with the numerical results. Results are in good agreement. Also, the dependence of PIT frequency characteristics on the radius of the outer disk is discussed in detail. In addition, by removing one of the outer disk resonators, double-PIT peaks can be observed in the transmission spectrum, and the physical mechanism of the appeared peaks is investigated. Finally, an application of the proposed structure for distinguishing different states of DNA molecules is discussed. Results show that the maximum sensitivity with 654 GHz/RIU-1 could be obtained for a single PIT structure. The frequency shifts equal to 37 and 99 GHz could be observed for the denatured and the hybridized DNA states, respectively.

Negative Differential Conductance & Hot-Carrier Avalanching in Monolayer WS2 FETs

DOE PAGES

He, G.; Nathawat, J.; Kwan, C. -P.; ...

2017-09-12

The high field phenomena of inter-valley transfer and avalanching breakdown have long been exploited in devices based on conventional semiconductors. In this Article, we demonstrate the manifestation of these effects in atomically-thin WS 2 field-effect transistors. The negative differential conductance exhibits all of the features familiar from discussions of this phenomenon in bulk semiconductors, including hysteresis in the transistor characteristics and increased noise that is indicative of travelling high-field domains. It is also found to be sensitive to thermal annealing, a result that we attribute to the influence of strain on the energy separation of the different valleys involved inmore » hot-electron transfer. This idea is supported by the results of ensemble Monte Carlo simulations, which highlight the sensitivity of the negative differential conductance to the equilibrium populations of the different valleys. At high drain currents (>10 μA/μm) avalanching breakdown is also observed, and is attributed to trap-assisted inverse Auger scattering. This mechanism is not normally relevant in conventional semiconductors, but is possible in WS 2 due to the narrow width of its energy bands. The various results presented here suggest that WS 2 exhibits strong potential for use in hot-electron devices, including compact high-frequency sources and photonic detectors.« less

Tungsten coating for improved wear resistance and reliability of microelectromechanical devices

DOEpatents

Fleming, James G.; Mani, Seethambal S.; Sniegowski, Jeffry J.; Blewer, Robert S.

2001-01-01

A process is disclosed whereby a 5-50-nanometer-thick conformal tungsten coating can be formed over exposed semiconductor surfaces (e.g. silicon, germanium or silicon carbide) within a microelectromechanical (MEM) device for improved wear resistance and reliability. The tungsten coating is formed after cleaning the semiconductor surfaces to remove any organic material and oxide film from the surface. A final in situ cleaning step is performed by heating a substrate containing the MEM device to a temperature in the range of 200-600 .degree. C. in the presence of gaseous nitrogen trifluoride (NF.sub.3). The tungsten coating can then be formed by a chemical reaction between the semiconductor surfaces and tungsten hexafluoride (WF.sub.6) at an elevated temperature, preferably about 450.degree. C. The tungsten deposition process is self-limiting and covers all exposed semiconductor surfaces including surfaces in close contact. The present invention can be applied to many different types of MEM devices including microrelays, micromirrors and microengines. Additionally, the tungsten wear-resistant coating of the present invention can be used to enhance the hardness, wear resistance, electrical conductivity, optical reflectivity and chemical inertness of one or more semiconductor surfaces within a MEM device.

Laser-based irradiation apparatus and methods for monitoring the dose-rate response of semiconductor devices

DOEpatents

Horn, Kevin M [Albuquerque, NM

2006-03-28

A scanned, pulsed, focused laser irradiation apparatus can measure and image the photocurrent collection resulting from a dose-rate equivalent exposure to infrared laser light across an entire silicon die. Comparisons of dose-rate response images or time-delay images from before, during, and after accelerated aging of a device, or from periodic sampling of devices from fielded operational systems allows precise identification of those specific age-affected circuit structures within a device that merit further quantitative analysis with targeted materials or electrical testing techniques. Another embodiment of the invention comprises a broad-beam, dose rate-equivalent exposure apparatus. The broad-beam laser irradiation apparatus can determine if aging has affected the device's overall functionality. This embodiment can be combined with the synchronized introduction of external electrical transients into a device under test to simulate the electrical effects of the surrounding circuitry's response to a radiation exposure.

Semiconductor technology program. Progress briefs

NASA Technical Reports Server (NTRS)

Bullis, W. M.

1980-01-01

Measurement technology for semiconductor materials, process control, and devices is reviewed. Activities include: optical linewidth and thermal resistance measurements; device modeling; dopant density profiles; resonance ionization spectroscopy; and deep level measurements. Standardized oxide charge terminology is also described.

Simulating cosmic radiation absorption and secondary particle production of solar panel layers of Low Earth Orbit (LEO) satellite with GEANT4

NASA Astrophysics Data System (ADS)

Yiǧitoǧlu, Merve; Veske, Doǧa; Nilüfer Öztürk, Zeynep; Bilge Demirköz, Melahat

2016-07-01

All devices which operate in space are exposed to cosmic rays during their operation. The resulting radiation may cause fatal damages in the solid structure of devices and the amount of absorbed radiation dose and secondary particle production for each component should be calculated carefully before the production. Solar panels are semiconductor solid state devices and are very sensitive to radiation. Even a short term power cut-off may yield a total failure of the satellite. Even little doses of radiation can change the characteristics of solar cells. This deviation can be caused by rarer high energetic particles as well as the total ionizing dose from the abundant low energy particles. In this study, solar panels planned for a specific LEO satellite, IMECE, are analyzed layer by layer. The Space Environment Information System (SPENVIS) database and GEANT4 simulation software are used to simulate the layers of the panels. The results obtained from the simulation will be taken in account to determine the amount of radiation protection and resistance needed for the panels or to revise the design of the panels.

Predictive Models for Semiconductor Device Design and Processing

NASA Technical Reports Server (NTRS)

Meyyappan, Meyya; Arnold, James O. (Technical Monitor)

1998-01-01

The device feature size continues to be on a downward trend with a simultaneous upward trend in wafer size to 300 mm. Predictive models are needed more than ever before for this reason. At NASA Ames, a Device and Process Modeling effort has been initiated recently with a view to address these issues. Our activities cover sub-micron device physics, process and equipment modeling, computational chemistry and material science. This talk would outline these efforts and emphasize the interaction among various components. The device physics component is largely based on integrating quantum effects into device simulators. We have two parallel efforts, one based on a quantum mechanics approach and the second, a semiclassical hydrodynamics approach with quantum correction terms. Under the first approach, three different quantum simulators are being developed and compared: a nonequlibrium Green's function (NEGF) approach, Wigner function approach, and a density matrix approach. In this talk, results using various codes will be presented. Our process modeling work focuses primarily on epitaxy and etching using first-principles models coupling reactor level and wafer level features. For the latter, we are using a novel approach based on Level Set theory. Sample results from this effort will also be presented.

α,ω-dihexyl-sexithiophene thin films for solution-gated organic field-effect transistors

NASA Astrophysics Data System (ADS)

Schamoni, Hannah; Noever, Simon; Nickel, Bert; Stutzmann, Martin; Garrido, Jose A.

2016-02-01

While organic semiconductors are being widely investigated for chemical and biochemical sensing applications, major drawbacks such as the poor device stability and low charge carrier mobility in aqueous electrolytes have not yet been solved to complete satisfaction. In this work, solution-gated organic field-effect transistors (SGOFETs) based on the molecule α,ω-dihexyl-sexithiophene (DH6T) are presented as promising platforms for in-electrolyte sensing. Thin films of DH6T were investigated with regard to the influence of the substrate temperature during deposition on the grain size and structural order. The performance of SGOFETs can be improved by choosing suitable growth parameters that lead to a two-dimensional film morphology and a high degree of structural order. Furthermore, the capability of the SGOFETs to detect changes in the pH or ionic strength of the gate electrolyte is demonstrated and simulated. Finally, excellent transistor stability is confirmed by continuously operating the device over a period of several days, which is a consequence of the low threshold voltage of DH6T-based SGOFETs. Altogether, our results demonstrate the feasibility of high performance and highly stable organic semiconductor devices for chemical or biochemical applications.

Nanometer-scale oxide thin film transistor with potential for high-density image sensor applications.

PubMed

Jeon, Sanghun; Park, Sungho; Song, Ihun; Hur, Ji-Hyun; Park, Jaechul; Kim, Hojung; Kim, Sunil; Kim, Sangwook; Yin, Huaxiang; Chung, U-In; Lee, Eunha; Kim, Changjung

2011-01-01

The integration of electronically active oxide components onto silicon circuits represents an innovative approach to improving the functionality of novel devices. Like most semiconductor devices, complementary-metal-oxide-semiconductor image sensors (CISs) have physical limitations when progressively scaled down to extremely small dimensions. In this paper, we propose a novel hybrid CIS architecture that is based on the combination of nanometer-scale amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) and a conventional Si photo diode (PD). With this approach, we aim to overcome the loss of quantum efficiency and image quality due to the continuous miniaturization of PDs. Specifically, the a-IGZO TFT with 180 nm gate length is probed to exhibit remarkable performance including low 1/f noise and high output gain, despite fabrication temperatures as low as 200 °C. In particular, excellent device performance is achieved using a double-layer gate dielectric (Al₂O₃/SiO₂) combined with a trapezoidal active region formed by a tailored etching process. A self-aligned top gate structure is adopted to ensure low parasitic capacitance. Lastly, three-dimensional (3D) process simulation tools are employed to optimize the four-pixel CIS structure. The results demonstrate how our stacked hybrid device could be the starting point for new device strategies in image sensor architectures. Furthermore, we expect the proposed approach to be applicable to a wide range of micro- and nanoelectronic devices and systems.

Optoelectronic Devices and Materials

NASA Astrophysics Data System (ADS)

Sweeney, Stephen; Adams, Alfred

Unlike the majority of electronic devices, which are silicon based, optoelectronic devices are predominantly made using III-V semiconductor compounds such as GaAs, InP, GaN and GaSb and their alloys due to their direct band gap. Understanding the properties of these materials has been of vital importance in the development of optoelectronic devices. Since the first demonstration of a semiconductor laser in the early 1960s, optoelectronic devices have been produced in their millions, pervading our everyday lives in communications, computing, entertainment, lighting and medicine. It is perhaps their use in optical-fibre communications that has had the greatest impact on humankind, enabling high-quality and inexpensive voice and data transmission across the globe. Optical communications spawned a number of developments in optoelectronics, leading to devices such as vertical-cavity surface-emitting lasers, semiconductor optical amplifiers, optical modulators and avalanche photodiodes. In this chapter we discuss the underlying theory of operation of the most important optoelectronic devices. The influence of carrier-photon interactions is discussed in the context of producing efficient emitters and detectors. Finally we discuss how the semiconductor band structure can be manipulated to enhance device properties using quantum confinement and strain effects, and how the addition of dilute amounts of elements such as nitrogen is having a profound effect on the next generation of optoelectronic devices.

Release strategies for making transferable semiconductor structures, devices and device components

DOEpatents

Rogers, John A; Nuzzo, Ralph G; Meitl, Matthew; Ko, Heung Cho; Yoon, Jongseung; Menard, Etienne; Baca, Alfred J

2014-11-25

Provided are methods for making a device or device component by providing a multilayer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.

Release strategies for making transferable semiconductor structures, devices and device components

DOEpatents

Rogers, John A [Champaign, IL; Nuzzo, Ralph G [Champaign, IL; Meitl, Matthew [Raleigh, NC; Ko, Heung Cho [Urbana, IL; Yoon, Jongseung [Urbana, IL; Menard, Etienne [Durham, NC; Baca, Alfred J [Urbana, IL

2011-04-26

Provided are methods for making a device or device component by providing a multilayer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.

Release strategies for making transferable semiconductor structures, devices and device components

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rogers, John A.; Nuzzo, Ralph G.; Meitl, Matthew

2016-05-24

Provided are methods for making a device or device component by providing a multi layer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.

Development of Room Temperature Excitonic Lasing From ZnO and MgZnO Thin Film Based Metal-Semiconductor-Metal Devices

NASA Astrophysics Data System (ADS)

Suja, Mohammad Zahir Uddin

Room temperature excitonic lasing is demonstrated and developed by utilizing metal-semiconductor-metal devices based on ZnO and MgZnO materials. At first, Cu-doped p-type ZnO films are grown on c-sapphire substrates by plasma-assisted molecular beam epitaxy. Photoluminescence (PL) experiments reveal a shallow acceptor state at 0.15 eV above the valence band edge. Hall effect results indicate that a growth condition window is found for the formation of p-type ZnO thin films and the best conductivity is achieved with a high hole concentration of 1.54x1018 cm-3, a low resistivity of 0.6 O cm and a moderate mobility of 6.65 cm2 V -1 s-1 at room temperature. Metal oxide semiconductor (MOS) capacitor devices have been fabricated on the Cu-doped ZnO films and the characteristics of capacitance-voltage measurements demonstrate that the Cu-doped ZnO thin films under proper growth conditions are p-type. Seebeck measurements on these Cu-doped ZnO samples lead to positive Seebeck coefficients and further confirm the p-type conductivity. Other measurements such as XRD, XPS, Raman and absorption are also performed to elucidate the structural and optical characteristics of the Cu-doped p-type ZnO films. The p-type conductivity is explained to originate from Cu substitution of Zn with a valency of +1 state. However, all p-type samples are converted to n-type over time, which is mostly due to the carrier compensation from extrinsic defects of ZnO. To overcome the stability issue of p-type ZnO film, alternate devices other than p-n junction has been developed. Electrically driven plasmon-exciton coupled random lasing is demonstrated by incorporating Ag nanoparticles on Cu-doped ZnO metal-semiconductor-metal (MSM) devices. Both photoluminescence and electroluminescence studies show that emission efficiencies have been enhanced significantly due to coupling between ZnO excitons and Ag surface plasmons. With the incorporation of Ag nanoparticles on ZnO MSM structures, internal quantum efficiency up to 6 times is demonstrated. Threshold current for lasing is decreased by as much as 30% while the output power is increased up to 350% at an injection current of 40 mA. A numerical simulation study reveals that hole carriers are generated in the ZnO MSM devices from impact ionization processes for subsequent plasmon-exciton coupled lasing. Our results suggest that plasmon-enhanced ZnO MSM random lasers can become a competitive candidate of efficient ultraviolet light sources. Semiconductor lasers in the deep ultraviolet (UV) range have numerous potential applications ranging from water purification and medical diagnosis to high-density data storage and flexible displays. Nevertheless, very little success was achieved in the realization of electrically driven deep UV semiconductor lasers to date. In this thesis, we report the fabrication and characterization of deep UV MgZnO semiconductor lasers. These lasers are operated with continuous current mode at room temperature and the shortest wavelength reaches 284 nm. The wide bandgap MgZnO thin films with various Mg mole fractions were grown on c-sapphire substrate using radio-frequency plasma assisted molecular beam epitaxy. Metal-semiconductor-metal (MSM) random laser devices were fabricated using lithography and metallization processes. Besides the demonstration of scalable emission wavelength, very low threshold current densities of 29 33 A/cm2 are achieved. Numerical modeling reveals that impact ionization process is responsible for the generation of hole carriers in the MgZnO MSM devices. The interaction of electrons and holes leads to radiative excitonic recombination and subsequent coherent random lasing.

Bulk semiconducting scintillator device for radiation detection

DOEpatents

Stowe, Ashley C.; Burger, Arnold; Groza, Michael

2016-08-30

A bulk semiconducting scintillator device, including: a Li-containing semiconductor compound of general composition Li-III-VI.sub.2, wherein III is a Group III element and VI is a Group VI element; wherein the Li-containing semiconductor compound is used in one or more of a first mode and a second mode, wherein: in the first mode, the Li-containing semiconductor compound is coupled to an electrical circuit under bias operable for measuring electron-hole pairs in the Li-containing semiconductor compound in the presence of neutrons and the Li-containing semiconductor compound is also coupled to current detection electronics operable for detecting a corresponding current in the Li-containing semiconductor compound; and, in the second mode, the Li-containing semiconductor compound is coupled to a photodetector operable for detecting photons generated in the Li-containing semiconductor compound in the presence of the neutrons.

Spectroscopic Studies of the Electronic Structure of Metal-Semiconductor and Vacuum-Semiconductor Interfaces.

DTIC Science & Technology

1982-12-31

interfaces which are of importance in such semi- conductor devices as MOSFETS, CCD devices, photovoltaic devices, DD I jAN 73 1473 EDITION OF INOV 66 if...interfaces is interesting for the study of electrolytic cells . Our photoemission study reveals for the first time how the electronic structure of water

Semiconductor quantum wells: old technology or new device functionalities

NASA Astrophysics Data System (ADS)

Kolbas, R. M.; Lo, Y. C.; Hsieh, K. Y.; Lee, J. H.; Reed, F. E.; Zhang, D.; Zhang, T.

2009-08-01

The introduction of semiconductor quantum wells in the 1970s created a revolution in optoelectronic devices. A large fraction of today's lasers and light emitting diodes are based on quantum wells. It has been more than 30 years but novel ideas and new device functions have recently been demonstrated using quantum well heterostructures. This paper provides a brief overview of the subject and then focuses on the physics of quantum wells that the lead author believes holds the key to new device functionalities. The data and figures contained within are not new. They have been assembled from 30 years of work. They are presented to convey the story of why quantum wells continue to fuel the engine that drives the semiconductor optoelectronic business. My apologies in advance to my students and co-workers that contributed so much that could not be covered in such a short manuscript. The explanations provided are based on the simplest models possible rather than the very sophisticated mathematical models that have evolved over many years. The intended readers are those involved with semiconductor optoelectronic devices and are interested in new device possibilities.

Surface breakdown igniter for mercury arc devices

DOEpatents

Bayless, John R.

1977-01-01

Surface breakdown igniter comprises a semiconductor of medium resistivity which has the arc device cathode as one electrode and has an igniter anode electrode so that when voltage is applied between the electrodes a spark is generated when electrical breakdown occurs over the surface of the semiconductor. The geometry of the igniter anode and cathode electrodes causes the igniter discharge to be forced away from the semiconductor surface.

Photovoltaic devices comprising zinc stannate buffer layer and method for making

DOEpatents

Wu, Xuanzhi; Sheldon, Peter; Coutts, Timothy J.

2001-01-01

A photovoltaic device has a buffer layer zinc stannate Zn.sub.2 SnO.sub.4 disposed between the semiconductor junction structure and the transparent conducting oxide (TCO) layer to prevent formation of localized junctions with the TCO through a thin window semiconductor layer, to prevent shunting through etched grain boundaries of semiconductors, and to relieve stresses and improve adhesion between these layers.

Semiconductor Materials for High Frequency Solid State Sources.

DTIC Science & Technology

1985-01-18

saturation on near and submicron-scale device performance. The motivation for this is as follows: Presently, individual semiconductors are accepted or...basis of all FET scaling procedures; and is a major motivating factor for going to submicron structures. This scaling was tested with the 4 following...performance. The motivation for this is as follows: Presently, individual semiconductors are accepted or rejected as candidate device materials based, in

Progress towards a semiconductor Compton camera for prompt gamma imaging during proton beam therapy for range and dose verification

NASA Astrophysics Data System (ADS)

Gutierrez, A.; Baker, C.; Boston, H.; Chung, S.; Judson, D. S.; Kacperek, A.; Le Crom, B.; Moss, R.; Royle, G.; Speller, R.; Boston, A. J.

2018-01-01

The main objective of this work is to test a new semiconductor Compton camera for prompt gamma imaging. Our device is composed of three active layers: a Si(Li) detector as a scatterer and two high purity Germanium detectors as absorbers of high-energy gamma rays. We performed Monte Carlo simulations using the Geant4 toolkit to characterise the expected gamma field during proton beam therapy and have made experimental measurements of the gamma spectrum with a 60 MeV passive scattering beam irradiating a phantom. In this proceeding, we describe the status of the Compton camera and present the first preliminary measurements with radioactive sources and their corresponding reconstructed images.

Generalized Mechanism of Field Emission from Nanostructured Semiconductor Film Cathodes

PubMed Central

Wang, Ru-Zhi; Zhao, Wei; Yan, Hui

2017-01-01

Considering the effect of both the buffer layer and substrate, a series of ultrathin multilayered structure cathodes (UTMC) is constructed to simulate the field emission (FE) process of nanostructured semiconductor film cathodes (NSFCs). We find a generalized FE mechanism of the NSFCs, in which there are three distinct FE modes with the change of the applied field. Our results clearly show significant differences of FE between conventional emitters and nanofilm emitters, which the non-Fowler-Nordheim characteristics and the resonant FE will be inevitable for NSFCs. Moreover, the controllable FE can be realized by fine-tuning the quantum structure of NSFCs. The generalized mechanism of NSFCs presented here may be particularly useful for design high-speed and high-frequency vacuum nano-electronic devices.

Microwave Tunable Metamaterial Based on Semiconductor-to-Metal Phase Transition.

PubMed

Zhang, Guanqiao; Ma, He; Lan, Chuwen; Gao, Rui; Zhou, Ji

2017-07-18

A microwave tunable metamaterial utilizing the semiconductor-to-metal transition of vanadium dioxide (VO 2 ) is proposed, experimentally demonstrated and theoretically scrutinized. Basic concept of the design involves the combination of temperature-dependent hysteresis in VO 2 with resonance induced heating, resulting in a nonlinear response to power input. A lithographically prepared gold split-rings resonator (SRR) array deposited with VO 2 thin film is fabricated. Transmission spectra analysis shows a clear manifestation of nonlinearity, involving power-dependence of resonant frequency as well as transmitted intensity at both elevated and room temperature. Simulation performed with CST Microwave Studio conforms with the findings. The concept may find applications in transmission modulation and frequency tuning devices working under microwave frequency bands.

Band-to-band tunneling in a carbon nanotube metal-oxide-semiconductor field-effect transistor is dominated by phonon-assisted tunneling.

PubMed

Koswatta, Siyuranga O; Lundstrom, Mark S; Nikonov, Dmitri E

2007-05-01

Band-to-band tunneling (BTBT) devices have recently gained a lot of interest due to their potential for reducing power dissipation in integrated circuits. We have performed extensive simulations for the BTBT operation of carbon nanotube metal-oxide-semiconductor field-effect transistors (CNT-MOSFETs) using the nonequilibrium Green's function formalism for both ballistic and dissipative quantum transport. In comparison with recently reported experimental data (J. Am. Chem. Soc. 2006, 128, 3518-3519), we have obtained strong evidence that BTBT in CNT-MOSFETs is dominated by optical phonon assisted inelastic transport, which can have important implications on the transistor characteristics. It is shown that, under large biasing conditions, two-phonon scattering may also become important.

Generalized Mechanism of Field Emission from Nanostructured Semiconductor Film Cathodes

NASA Astrophysics Data System (ADS)

Wang, Ru-Zhi; Zhao, Wei; Yan, Hui

2017-03-01

Considering the effect of both the buffer layer and substrate, a series of ultrathin multilayered structure cathodes (UTMC) is constructed to simulate the field emission (FE) process of nanostructured semiconductor film cathodes (NSFCs). We find a generalized FE mechanism of the NSFCs, in which there are three distinct FE modes with the change of the applied field. Our results clearly show significant differences of FE between conventional emitters and nanofilm emitters, which the non-Fowler-Nordheim characteristics and the resonant FE will be inevitable for NSFCs. Moreover, the controllable FE can be realized by fine-tuning the quantum structure of NSFCs. The generalized mechanism of NSFCs presented here may be particularly useful for design high-speed and high-frequency vacuum nano-electronic devices.

Technological and organizational diversity and technical advance in the early history of the American semiconductor industry

NASA Astrophysics Data System (ADS)

Cohen, W.; Holbrook, D.; Klepper, S.

1994-06-01

This study examines the early years of the semiconductor industry and focuses on the roles played by different size firms in technologically innovative processes. A large and diverse pool of firms participated in the growth of the industry. Three related technological areas were chosen for in-depth analysis: integrated circuits, materials technology, and device packaging. Large business producing vacuum tubes dominated the early production of semiconductor devices. As the market for new devices grew during the 1950's, new firms were founded and existing firms from other industries, e.g. aircraft builders and instrument makers, began to pursue semiconductor electronics. Small firms began to cater to the emerging industry by supplying materials and equipment. These firms contributed to the development of certain aspects of one thousand firms that were playing some part in the semiconductor industry.

One-Dimensional Nanostructures and Devices of II–V Group Semiconductors

PubMed Central

2009-01-01

The II–V group semiconductors, with narrow band gaps, are important materials with many applications in infrared detectors, lasers, solar cells, ultrasonic multipliers, and Hall generators. Since the first report on trumpet-like Zn3P2nanowires, one-dimensional (1-D) nanostructures of II–V group semiconductors have attracted great research attention recently because these special 1-D nanostructures may find applications in fabricating new electronic and optoelectronic nanoscale devices. This article covers the 1-D II–V semiconducting nanostructures that have been synthesized till now, focusing on nanotubes, nanowires, nanobelts, and special nanostructures like heterostructured nanowires. Novel electronic and optoelectronic devices built on 1-D II–V semiconducting nanostructures will also be discussed, which include metal–insulator-semiconductor field-effect transistors, metal-semiconductor field-effect transistors, andp–nheterojunction photodiode. We intent to provide the readers a brief account of these exciting research activities. PMID:20596452

Hetero-junction photovoltaic device and method of fabricating the device

DOEpatents

Aytug, Tolga; Christen, David K; Paranthaman, Mariappan Parans; Polat, Ozgur

2014-02-10

A hetero-junction device and fabrication method in which phase-separated n-type and p-type semiconductor pillars define vertically-oriented p-n junctions extending above a substrate. Semiconductor materials are selected for the p-type and n-type pillars that are thermodynamically stable and substantially insoluble in one another. An epitaxial deposition process is employed to form the pillars on a nucleation layer and the mutual insolubility drives phase separation of the materials. During the epitaxial deposition process, the orientation is such that the nucleation layer initiates propagation of vertical columns resulting in a substantially ordered, three-dimensional structure throughout the deposited material. An oxidation state of at least a portion of one of the p-type or the n-type semiconductor materials is altered relative to the other, such that the band-gap energy of the semiconductor materials differ with respect to stoichiometric compositions and the device preferentially absorbs particular selected bands of radiation.

Main principles of developing exploitation models of semiconductor devices

NASA Astrophysics Data System (ADS)

Gradoboev, A. V.; Simonova, A. V.

2018-05-01

The paper represents primary tasks, solutions of which allow to develop the exploitation modes of semiconductor devices taking into account complex and combined influence of ionizing irradiation and operation factors. The structure of the exploitation model of the semiconductor device is presented, which is based on radiation and reliability models. Furthermore, it was shown that the exploitation model should take into account complex and combine influence of various ionizing irradiation types and operation factors. The algorithm of developing the exploitation model of the semiconductor devices is proposed. The possibility of creating the radiation model of Schottky barrier diode, Schottky field-effect transistor and Gunn diode is shown based on the available experimental data. The basic exploitation model of IR-LEDs based upon double AlGaAs heterostructures is represented. The practical application of the exploitation models will allow to output the electronic products with guaranteed operational properties.

The Physics of Semiconductors

NASA Astrophysics Data System (ADS)

Brennan, Kevin F.

1999-02-01

Modern fabrication techniques have made it possible to produce semiconductor devices whose dimensions are so small that quantum mechanical effects dominate their behavior. This book describes the key elements of quantum mechanics, statistical mechanics, and solid-state physics that are necessary in understanding these modern semiconductor devices. The author begins with a review of elementary quantum mechanics, and then describes more advanced topics, such as multiple quantum wells. He then disusses equilibrium and nonequilibrium statistical mechanics. Following this introduction, he provides a thorough treatment of solid-state physics, covering electron motion in periodic potentials, electron-phonon interaction, and recombination processes. The final four chapters deal exclusively with real devices, such as semiconductor lasers, photodiodes, flat panel displays, and MOSFETs. The book contains many homework exercises and is suitable as a textbook for electrical engineering, materials science, or physics students taking courses in solid-state device physics. It will also be a valuable reference for practicing engineers in optoelectronics and related areas.

Germanium detector passivated with hydrogenated amorphous germanium

DOEpatents

Hansen, William L.; Haller, Eugene E.

1986-01-01

Passivation of predominantly crystalline semiconductor devices (12) is provided for by a surface coating (21) of sputtered hydrogenated amorphous semiconductor material. Passivation of a radiation detector germanium diode, for example, is realized by sputtering a coating (21) of amorphous germanium onto the etched and quenched diode surface (11) in a low pressure atmosphere of hydrogen and argon. Unlike prior germanium diode semiconductor devices (12), which must be maintained in vacuum at cryogenic temperatures to avoid deterioration, a diode processed in the described manner may be stored in air at room temperature or otherwise exposed to a variety of environmental conditions. The coating (21) compensates for pre-existing undesirable surface states as well as protecting the semiconductor device (12) against future impregnation with impurities.

Photovoltaic devices comprising cadmium stannate transparent conducting films and method for making

DOEpatents

Wu, Xuanzhi; Coutts, Timothy J.; Sheldon, Peter; Rose, Douglas H.

1999-01-01

A photovoltaic device having a substrate, a layer of Cd.sub.2 SnO.sub.4 disposed on said substrate as a front contact, a thin film comprising two or more layers of semiconductor materials disposed on said layer of Cd.sub.2 SnO.sub.4, and an electrically conductive film disposed on said thin film of semiconductor materials to form a rear electrical contact to said thin film. The device is formed by RF sputter coating a Cd.sub.2 SnO.sub.4 layer onto a substrate, depositing a thin film of semiconductor materials onto the layer of Cd.sub.2 SnO.sub.4, and depositing an electrically conductive film onto the thin film of semiconductor materials.

Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

PubMed Central

Long, Rathnait D.; McIntyre, Paul C.

2012-01-01

The literature on polar Gallium Nitride (GaN) surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS) devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

High voltage semiconductor devices and methods of making the devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Matocha, Kevin; Chatty, Kiran; Banerjee, Sujit

A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type well regions which are formed in an n-type drift layer. A p-type body contact region is formed on the periphery of the MOSFET. The source metallization of the device forms a Schottky contact with an n-type semiconductor region adjacent the p-type body contact region of the device. Vias can be formed through a dielectric material covering the source ohmic contacts and/or Schottky region of the device and the source metallization can be formed in the vias.more » The n-type semiconductor region forming the Schottky contact and/or the n-type source regions can be a single continuous region or a plurality of discontinuous regions alternating with discontinuous p-type body contact regions. The device can be a SiC device. Methods of making the device are also provided.« less

High voltage semiconductor devices and methods of making the devices

DOEpatents

Matocha, Kevin; Chatty, Kiran; Banerjee, Sujit

2017-02-28

A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type well regions which are formed in an n-type drift layer. A p-type body contact region is formed on the periphery of the MOSFET. The source metallization of the device forms a Schottky contact with an n-type semiconductor region adjacent the p-type body contact region of the device. Vias can be formed through a dielectric material covering the source ohmic contacts and/or Schottky region of the device and the source metallization can be formed in the vias. The n-type semiconductor region forming the Schottky contact and/or the n-type source regions can be a single continuous region or a plurality of discontinuous regions alternating with discontinuous p-type body contact regions. The device can be a SiC device. Methods of making the device are also provided.

Wide Bandgap Extrinsic Photoconductive Switches

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sullivan, James S.

2012-01-20

Photoconductive semiconductor switches (PCSS) have been investigated since the late 1970s. Some devices have been developed that withstand tens of kilovolts and others that switch hundreds of amperes. However, no single device has been developed that can reliably withstand both high voltage and switch high current. Yet, photoconductive switches still hold the promise of reliable high voltage and high current operation with subnanosecond risetimes. Particularly since good quality, bulk, single crystal, wide bandgap semiconductor materials have recently become available. In this chapter we will review the basic operation of PCSS devices, status of PCSS devices and properties of the widemore » bandgap semiconductors 4H-SiC, 6H-SiC and 2H-GaN.« less

Massively Parallel Real-Time TDDFT Simulations of Electronic Stopping Processes

NASA Astrophysics Data System (ADS)

Yost, Dillon; Lee, Cheng-Wei; Draeger, Erik; Correa, Alfredo; Schleife, Andre; Kanai, Yosuke

Electronic stopping describes transfer of kinetic energy from fast-moving charged particles to electrons, producing massive electronic excitations in condensed matter. Understanding this phenomenon for ion irradiation has implications in modern technologies, ranging from nuclear reactors, to semiconductor devices for aerospace missions, to proton-based cancer therapy. Recent advances in high-performance computing allow us to achieve an accurate parameter-free description of these phenomena through numerical simulations. Here we discuss results from our recently-developed large-scale real-time TDDFT implementation for electronic stopping processes in important example materials such as metals, semiconductors, liquid water, and DNA. We will illustrate important insight into the physics underlying electronic stopping and we discuss current limitations of our approach both regarding physical and numerical approximations. This work is supported by the DOE through the INCITE awards and by the NSF. Part of this work was performed under the auspices of U.S. DOE by LLNL under Contract DE-AC52-07NA27344.

NREL Finds Nanotube Semiconductors Well-suited for PV Systems | News | NREL

Science.gov Websites

photoinduced electron transfer for emerging organic semiconductors such as single-walled carbon nanotubes (SWCNT) that can be used in organic PV devices. In organic PV devices, after a photon is absorbed Larson, and Steven Strauss from Colorado State University. Organic PV devices involve an interface

Hybrid method of making an amorphous silicon P-I-N semiconductor device

DOEpatents

Moustakas, Theodore D.; Morel, Don L.; Abeles, Benjamin

1983-10-04

The invention is directed to a hydrogenated amorphous silicon PIN semiconductor device of hybrid glow discharge/reactive sputtering fabrication. The hybrid fabrication method is of advantage in providing an ability to control the optical band gap of the P and N layers, resulting in increased photogeneration of charge carriers and device output.

Carbon nanotube and graphene device modeling and simulation

NASA Astrophysics Data System (ADS)

Yoon, Young Ki

The performance of the semiconductors has been improved and the price has gone down for decades. It has been continuously scaled down in size year by year, and now it encounters the fundamental scaling limit. We, therefore, should prepare a new era beyond the conventional semiconductor technologies. One of the most promising devices is possible by carbon nanotube (CNT) or graphene nanoribbon (GNR) in terms of its excellent charge transport properties. Their fundamental material properties and device physics are totally different to those of the conventional devices. In this nano-regime, more sophisticated device modeling and simulation are really needed to elucidate nano-device operation and to save our resources from errors. The numerical simulation works in this dissertation will provide novel view points on the emerging devices. In this dissertation, CNT and GNR devices are numerically studied. The first part of this work is on CNT devices, and a common structure of CNT device has CNT channel, metal source and drain contacts, and gate electrode. We investigate the strain, geometry, and scattering effects on the device performance of CNT field-effect transistors (FETs). It is shown that even a small amount of strain can result in a large effect on the performance of CNTFETs due to the variation of the bandgap and band-structure-limited velocity. A type of strain which produces a larger bandgap results in increased Schottky barrier (SB) height and decreased band-structure-limited velocity, and hence a smaller minimum leakage current, smaller on current, larger maximum achievable Ion/Ioff, and larger intrinsic delay. We also examine geometry effect of partial gate CNTFETs. In the growth process of vertical CNT, underlap between the gate and the bottom electrode is advantageous for transistor operation because it suppresses ambipolar conduction of SBFETs. Both n-type and p-type transistor operations with balanced performance metrics can be achieved on a single partial gate FET by using proper bias schemes. The effect of phonon scattering on the intrinsic delay and cut-off frequency of Schottky barrier CNTFETs is also examined. Carriers are mostly scattered by optical and zone boundary phonons beyond the beginning of the channel. The scattering has a small direct effect on the DC on current of the CNTFET, but it results in significant decrease of intrinsic cut-off frequency and increase of intrinsic delay. Semiconducting CNT is useful for the channel in CNTFETs, whereas metallic CNT can be used as an electrode. If a porous CNT film is used as a source electrode, vertical thin-film transistors (TFTs) can be constructed. Vertical organic FET (OFET) shows clear transistor switching behavior allowing orders of magnitude modulation of the source-drain current even in the presence of electrostatic screening by the source electrode. The channel length should be carefully engineered due to the trade-off between device characteristics in the subthreshold and above-threshold regions. The second subject is device simulations of GNRFETs. Even though GNR is also graphene-based quasi-1D nanostructure like CNT, the differences in shape, boundary condition, and existence of edges and dangling bonds make it operate in a different way. Atomistic 3D simulation study of the performance of GNR SBFETs is presented. The impacts of non-idealities on device performance have been investigated. The edges of GNR, which do not exist in CNT, can be advantages or disadvantages. If an appropriate control by different edge atoms is possible, it would be definitely positive. Totally new electronic band structure is obtained by different edge-termination atoms. In addition, only a fraction of impurity atom can also much affect on the material properties of GNR. In order to perform device simulations of non-uniform GNR devices, multiscale simulation scheme can be used in non-equilibrium Green's function (NEGF) formalism and density-functional method.

Growth, Characterization and Device Development in Monocrystalline Diamond Films

DTIC Science & Technology

1990-02-01

semiconductors at the samefrequency. Large-signal computer simulations show that diamond IMPATTs can operate at 35 GHZ with 8.26 W, at 60 GHz producing...been the most extensively utilized substrates to date. Submitted to -Proceedings of NATO Advanced Rc.carch Wwkshop on the Physics and Chemitry of...backscatter configuration using 514.5nm I Ar ion laser radiation. The scattered light was dispersed with a computer controlled triple monochromator and

Ultra-Low Threshold Vertical-Cavity Surface-Emitting Lasers for USAF Applications

DTIC Science & Technology

2005-01-01

molecular beam epitaxy , semiconductors, finite element method, modeling and simulation, oxidation furnace 16. SECURITY CLASSIFICATION OF: 19a. NAME OF...Patterson Air Force Base). Device material growth was accomplished by means of molecular beam epitaxy (MBE) using a Varian GENII MBE system owned by the...grown by molecular beam epitaxy on a GaAs substrate. Vertical posts, with square and circular cross sections ranging in size from 5 to 40 microns

Ab initio modeling of steady-state and time-dependent charge transport in hole-only α-NPD devices

NASA Astrophysics Data System (ADS)

Liu, Feilong; Massé, Andrea; Friederich, Pascal; Symalla, Franz; Nitsche, Robert; Wenzel, Wolfgang; Coehoorn, Reinder; Bobbert, Peter A.

2016-12-01

We present an ab initio modeling study of steady-state and time-dependent charge transport in hole-only devices of the amorphous molecular semiconductor α-NPD [N ,N'-Di(1 -naphthyl)-N ,N'-diphenyl-(1 ,1'-biphenyl)-4 ,4'-diamine] . The study is based on the microscopic information obtained from atomistic simulations of the morphology and density functional theory calculations of the molecular hole energies, reorganization energies, and transfer integrals. Using stochastic approaches, the microscopic information obtained in simulation boxes at a length scale of ˜10 nm is expanded and employed in one-dimensional (1D) and three-dimensional (3D) master-equation modeling of the charge transport at the device scale of ˜100 nm. Without any fit parameter, predicted current density-voltage and impedance spectroscopy data obtained with the 3D modeling are in very good agreement with measured data on devices with different α-NPD layer thicknesses in a wide range of temperatures, bias voltages, and frequencies. Similarly good results are obtained with the computationally much more efficient 1D modeling after optimizing a hopping prefactor.

Performance analysis and simulation of vertical gallium nitride nanowire transistors

NASA Astrophysics Data System (ADS)

Witzigmann, Bernd; Yu, Feng; Frank, Kristian; Strempel, Klaas; Fatahilah, Muhammad Fahlesa; Schumacher, Hans Werner; Wasisto, Hutomo Suryo; Römer, Friedhard; Waag, Andreas

2018-06-01

Gallium nitride (GaN) nanowire transistors are analyzed using hydrodynamic simulation. Both p-body and n-body devices are compared in terms of threshold voltage, saturation behavior and transconductance. The calculations are calibrated using experimental data. The threshold voltage can be tuned from enhancement to depletion mode with wire doping. Surface states cause a shift of threshold voltage and saturation current. The saturation current depends on the gate design, with a composite gate acting as field plate in the p-body device. He joined Bell Laboratories, Murray Hill, NJ, as a Technical Staff Member. In October 2001, he joined the Optical Access and Transport Division, Agere Systems, Alhambra, CA. In 2004, he was appointed an Assistant Professor at ETH Zurich,. Since 2008, at the University of Kassel, Kassel, Germany, and he has been a Professor the Head of the Computational Electronics and Photonics Group, and co-director of CINSaT since 2010. His research interests include computational optoelectronics, process and device design of semiconductor photonic devices, microwave components, and electromagnetics modeling for nanophotonics. Dr. Witzigmann is a senior member of the SPIE and IEEE.

A two dimensional analytical modeling of surface potential in triple metal gate (TMG) fully-depleted Recessed-Source/Drain (Re-S/D) SOI MOSFET

NASA Astrophysics Data System (ADS)

Priya, Anjali; Mishra, Ram Awadh

2016-04-01

In this paper, analytical modeling of surface potential is proposed for new Triple Metal Gate (TMG) fully depleted Recessed-Source/Dain Silicon On Insulator (SOI) Metal Oxide Semiconductor Field Effect Transistor (MOSFET). The metal with the highest work function is arranged near the source region and the lowest one near the drain. Since Recessed-Source/Drain SOI MOSFET has higher drain current as compared to conventional SOI MOSFET due to large source and drain region. The surface potential model developed by 2D Poisson's equation is verified by comparison to the simulation result of 2-dimensional ATLAS simulator. The model is compared with DMG and SMG devices and analysed for different device parameters. The ratio of metal gate length is varied to optimize the result.

Thermovoltaic semiconductor device including a plasma filter

DOEpatents

Baldasaro, Paul F.

1999-01-01

A thermovoltaic energy conversion device and related method for converting thermal energy into an electrical potential. An interference filter is provided on a semiconductor thermovoltaic cell to pre-filter black body radiation. The semiconductor thermovoltaic cell includes a P/N junction supported on a substrate which converts incident thermal energy below the semiconductor junction band gap into electrical potential. The semiconductor substrate is doped to provide a plasma filter which reflects back energy having a wavelength which is above the band gap and which is ineffectively filtered by the interference filter, through the P/N junction to the source of radiation thereby avoiding parasitic absorption of the unusable portion of the thermal radiation energy.

Semiconductor cooling by thin-film thermocouples

NASA Technical Reports Server (NTRS)

Tick, P. A.; Vilcans, J.

1970-01-01

Thin-film, metal alloy thermocouple junctions do not rectify, change circuit impedance only slightly, and require very little increase in space. Although they are less efficient cooling devices than semiconductor junctions, they may be applied to assist conventional cooling techniques for electronic devices.

Multiple gap photovoltaic device

DOEpatents

Dalal, Vikram L.

1981-01-01

A multiple gap photovoltaic device having a transparent electrical contact adjacent a first cell which in turn is adjacent a second cell on an opaque electrical contact, includes utilizing an amorphous semiconductor as the first cell and a crystalline semiconductor as the second cell.

High efficiency photovoltaic device

DOEpatents

Guha, Subhendu; Yang, Chi C.; Xu, Xi Xiang

1999-11-02

An N-I-P type photovoltaic device includes a multi-layered body of N-doped semiconductor material which has an amorphous, N doped layer in contact with the amorphous body of intrinsic semiconductor material, and a microcrystalline, N doped layer overlying the amorphous, N doped material. A tandem device comprising stacked N-I-P cells may further include a second amorphous, N doped layer interposed between the microcrystalline, N doped layer and a microcrystalline P doped layer. Photovoltaic devices thus configured manifest improved performance, particularly when configured as tandem devices.

New Concentric Electrode Metal-Semiconductor-Metal Photodetectors

NASA Technical Reports Server (NTRS)

Towe, Elias

1996-01-01

A new metal-semiconductor-metal (MSM) photodetector geometry is proposed. The new device has concentric metal electrodes which exhibit a high degree of symmetry and a design flexibility absent in the conventional MSM device. The concentric electrodes are biased to alternating potentials as in the conventional interdigitated device. Because of the high symmetry configuration, however, the new device also has a lower effective capacitance. This device and the conventional MSM structure are analyzed within a common theoretical framework which allows for the comparison of the important performance characteristics.

Unassisted HI photoelectrolysis using n-WSe2 solar absorbers.

PubMed

McKone, James R; Potash, Rebecca A; DiSalvo, Francis J; Abruña, Héctor D

2015-06-07

Molybdenum and tungsten diselenide are among the most robust and efficient semiconductor materials for photoelectrochemistry, but they have seen limited use for integrated solar energy storage systems. Herein, we report that n-type WSe2 photoelectrodes can facilitate unassisted aqueous HI electrolysis to H2(g) and HI3(aq) when placed in contact with a platinum counter electrode and illuminated by simulated sunlight. Even in strongly acidic electrolyte, the photoelectrodes are robust and operate very near their maximum power point. We have rationalized this behavior by characterizing the n-WSe2|HI/HI3 half cell, the Pt|HI/H2||HI3/HI|Pt full cell, and the n-WSe2 band-edge positions. Importantly, specific interactions between the n-WSe2 surface and aqueous iodide significantly shift the semiconductor's flatband potential and allow for unassisted HI electrolysis. These findings exemplify the important role of interfacial chemical reactivity in influencing the energetics of semiconductor-liquid junctions and the resulting device performance.

Organic photosensitive cells grown on rough electrode with nano-scale morphology control

DOEpatents

Yang, Fan [Piscataway, NJ; Forrest, Stephen R [Ann Arbor, MI

2011-06-07

An optoelectronic device and a method for fabricating the optoelectronic device includes a first electrode disposed on a substrate, an exposed surface of the first electrode having a root mean square roughness of at least 30 nm and a height variation of at least 200 nm, the first electrode being transparent. A conformal layer of a first organic semiconductor material is deposited onto the first electrode by organic vapor phase deposition, the first organic semiconductor material being a small molecule material. A layer of a second organic semiconductor material is deposited over the conformal layer. At least some of the layer of the second organic semiconductor material directly contacts the conformal layer. A second electrode is deposited over the layer of the second organic semiconductor material. The first organic semiconductor material is of a donor-type or an acceptor-type relative to the second organic semiconductor material, which is of the other material type.

Photovoltaic devices comprising cadmium stannate transparent conducting films and method for making

DOEpatents

Wu, X.; Coutts, T.J.; Sheldon, P.; Rose, D.H.

1999-07-13

A photovoltaic device is disclosed having a substrate, a layer of Cd[sub 2]SnO[sub 4] disposed on said substrate as a front contact, a thin film comprising two or more layers of semiconductor materials disposed on said layer of Cd[sub 2]SnO[sub 4], and an electrically conductive film disposed on said thin film of semiconductor materials to form a rear electrical contact to said thin film. The device is formed by RF sputter coating a Cd[sub 2]SnO[sub 4] layer onto a substrate, depositing a thin film of semiconductor materials onto the layer of Cd[sub 2]SnO[sub 4], and depositing an electrically conductive film onto the thin film of semiconductor materials. 10 figs.

Development and Characterization of Novel Garnet and Gold Thin Films for Photonic and Plasmonic Applications

NASA Astrophysics Data System (ADS)

Dulal, Prabesh

The massive amount of data that we produce and share today is the result of advancements made in the semiconductor and magnetic recording industries. As the number of transistors per unit area in integrated circuits continues to rise, power dissipation is reaching alarming levels. Photonics, which essentially is a marriage of semiconductor with laser technology has shown great promise in tackling the issue of power dissipation. The first part of this work focuses on optical isolators, which are essential to halt back-reflections that interfere with the laser source of the photonic systems. Novel terbium iron garnet thin-film optical isolators have been developed on semiconductor platforms and their magneto-optical properties are explored. Modesolver and finite-difference simulations are done to assess their device-feasibility and efficiency. Subsequently, a new photonic device has been developed using current semiconductor microelectronic fabrication techniques. Advancement in magnetic recording is equally vital to keep up with the demand for more data at faster speeds as the current perpendicular recording technique is fast-approaching its areal density limitations. Heat assisted magnetic recording (HAMR) is the next step in the evolution of hard drives. HAMR involves heating of magnetic media using plasmonic near field transducers (NFTs), which must be able to withstand elevated temperatures for extended times. The second part of this work presents a statistical crystallographic study of thermally induced deformation of Au NFTs. Subsequently, the most thermally stable crystallographic orientation for Au NFT has been determined that could lead to significant improvements in HAMR drive reliability.

Comprehensive capacitance-voltage analysis including quantum effects for high-k interfaces on germanium and other alternative channel materials

NASA Astrophysics Data System (ADS)

Anwar, Sarkar R. M.

High mobility alternative channel materials to silicon are critical to the continued scaling of metal oxide semiconductor (MOS) devices. However, before they can be incorporated into advanced devices, some major issues need to be solved. The high mobility materials suffer from lower allowable thermal budgets compared to Si (before desorption and defect formation becomes an issue) and the absence of a good quality native oxide has further increased the interest in the use of high-k dielectrics. However, the high interface state density and high electric fields at these semiconductor/high-k interfaces can significantly impact the capacitance-voltage (C-V) profile, and current C-V modeling software cannot account for these effects. This in turn affects the parameters extracted from the C-V data of the high mobility semiconductor/high-k interface, which are crucial to fully understand the interface properties and expedite process development. To address this issue, we developed a model which takes into account quantum corrections which can be applied to a number of these alternative channel materials including SixGe1-x, Ge, InGaAs, and GaAs. The C-V simulation using this QM correction model is orders of magnitude faster compared to a full band Schrodinger-Poisson solver. The simulated C-V is directly benchmarked to a self consistent Schrodinger-Poisson solution for each bulk semiconductor material, and from the benchmarking process the QM correction parameters are extracted. The full program, C-V Alternative Channel Extraction (CV ACE), incorporates a quantum mechanical correction model, along with the interface state density model, and can extract device parameters such as equivalent oxide thickness (EOT), doping density and flat band voltage (Vfb) as well as the interface state density profile using multiple measurements performed at different frequencies and temperatures, simultaneously. The program was used to analyze experimentally measured C-V profiles and the extracted device parameters show excellent agreement with the known device structure and previously published results. CV ACE has been applied in the development of a process flow for germanium interface passivation in Ge based MOS devices using a GeOx interlayer. A post atomic layer deposition (ALD) plasma oxidation (PPO) process was developed using radio frequency (RF) plasma in a plasma enhanced chemical vapor deposition (PECVD) chamber and demonstrated significant surface passivation. Various gases were investigated and 1% O2/Ar was found to reduce the growth rate and provide excellent control over the degradation of EOT. A 100 W plasma with 1% O2/Ar was found to provide the best combination of EOT and low Dit and is concluded to be the optimum process for PPO of germanium surfaces. CV ACE and PPO were also utilized to investigate other process development challenges. A study of the impact of low temperature anneals on Ge-based MOS devices was found to result in a degradation of the electrical thickness and a change in fixed charge, indicating that the process window is very narrow and at much lower temperatures than for Si.

Two dimensional thermal and charge mapping of power thyristors

NASA Technical Reports Server (NTRS)

Hu, S. P.; Rabinovici, B. M.

1975-01-01

The two dimensional static and dynamic current density distributions within the junction of semiconductor power switching devices and in particular the thyristors were obtained. A method for mapping the thermal profile of the device junctions with fine resolution using an infrared beam and measuring the attenuation through the device as a function of temperature were developed. The results obtained are useful in the design and quality control of high power semiconductor switching devices.

Multi-junction, monolithic solar cell using low-band-gap materials lattice matched to GaAs or Ge

DOEpatents

Olson, Jerry M.; Kurtz, Sarah R.; Friedman, Daniel J.

2001-01-01

A multi-junction, monolithic, photovoltaic solar cell device is provided for converting solar radiation to photocurrent and photovoltage with improved efficiency. The solar cell device comprises a plurality of semiconductor cells, i.e., active p/n junctions, connected in tandem and deposited on a substrate fabricated from GaAs or Ge. To increase efficiency, each semiconductor cell is fabricated from a crystalline material with a lattice constant substantially equivalent to the lattice constant of the substrate material. Additionally, the semiconductor cells are selected with appropriate band gaps to efficiently create photovoltage from a larger portion of the solar spectrum. In this regard, one semiconductor cell in each embodiment of the solar cell device has a band gap between that of Ge and GaAs. To achieve desired band gaps and lattice constants, the semiconductor cells may be fabricated from a number of materials including Ge, GaInP, GaAs, GaInAsP, GaInAsN, GaAsGe, BGaInAs, (GaAs)Ge, CuInSSe, CuAsSSe, and GaInAsNP. To further increase efficiency, the thickness of each semiconductor cell is controlled to match the photocurrent generated in each cell. To facilitate photocurrent flow, a plurality of tunnel junctions of low-resistivity material are included between each adjacent semiconductor cell. The conductivity or direction of photocurrent in the solar cell device may be selected by controlling the specific p-type or n-type characteristics for each active junction.

Imaging the motion of electrons in 2D semiconductor heterostructures

NASA Astrophysics Data System (ADS)

Dani, Keshav

Technological progress since the late 20th century has centered on semiconductor devices, such as transistors, diodes, and solar cells. At the heart of these devices, is the internal motion of electrons through semiconductor materials due to applied electric fields or by the excitation of photocarriers. Imaging the motion of these electrons would provide unprecedented insight into this important phenomenon, but requires high spatial and temporal resolution. Current studies of electron dynamics in semiconductors are generally limited by the spatial resolution of optical probes, or by the temporal resolution of electronic probes. In this talk, we combine femtosecond pump-probe techniques with spectroscopic photoemission electron microscopy to image the motion of photoexcited electrons from high-energy to low-energy states in a 2D InSe/GaAs heterostructure exhibiting a type-II band alignment. At the instant of photoexcitation, energy-resolved photoelectron images reveal a highly non-equilibrium distribution of photocarriers in space and energy. Thereafter, in response to the out-of-equilibrium photocarriers, we observe the spatial redistribution of charges, thus forming internal electric fields, bending the semiconductor bands, and finally impeding further charge transfer. By assembling images taken at different time-delays, we make a movie lasting a few tens of picoseconds of the electron transfer process in the photoexcited type-II heterostructure - a fundamental phenomenon in semiconductor devices like solar cells. Quantitative analysis and theoretical modeling of spatial variations in the video provide insight into future solar cells, electron dynamics in 2D materials, and other semiconductor devices.

Imaging the motion of electrons across semiconductor heterojunctions.

PubMed

Man, Michael K L; Margiolakis, Athanasios; Deckoff-Jones, Skylar; Harada, Takaaki; Wong, E Laine; Krishna, M Bala Murali; Madéo, Julien; Winchester, Andrew; Lei, Sidong; Vajtai, Robert; Ajayan, Pulickel M; Dani, Keshav M

2017-01-01

Technological progress since the late twentieth century has centred on semiconductor devices, such as transistors, diodes and solar cells. At the heart of these devices is the internal motion of electrons through semiconductor materials due to applied electric fields or by the excitation of photocarriers. Imaging the motion of these electrons would provide unprecedented insight into this important phenomenon, but requires high spatial and temporal resolution. Current studies of electron dynamics in semiconductors are generally limited by the spatial resolution of optical probes, or by the temporal resolution of electronic probes. Here, by combining femtosecond pump-probe techniques with spectroscopic photoemission electron microscopy, we imaged the motion of photoexcited electrons from high-energy to low-energy states in a type-II 2D InSe/GaAs heterostructure. At the instant of photoexcitation, energy-resolved photoelectron images revealed a highly non-equilibrium distribution of photocarriers in space and energy. Thereafter, in response to the out-of-equilibrium photocarriers, we observed the spatial redistribution of charges, thus forming internal electric fields, bending the semiconductor bands, and finally impeding further charge transfer. By assembling images taken at different time-delays, we produced a movie lasting a few trillionths of a second of the electron-transfer process in the photoexcited type-II heterostructure-a fundamental phenomenon in semiconductor devices such as solar cells. Quantitative analysis and theoretical modelling of spatial variations in the movie provide insight into future solar cells, 2D materials and other semiconductor devices.

Imaging the motion of electrons across semiconductor heterojunctions

NASA Astrophysics Data System (ADS)

Man, Michael K. L.; Margiolakis, Athanasios; Deckoff-Jones, Skylar; Harada, Takaaki; Wong, E. Laine; Krishna, M. Bala Murali; Madéo, Julien; Winchester, Andrew; Lei, Sidong; Vajtai, Robert; Ajayan, Pulickel M.; Dani, Keshav M.

2017-01-01

Technological progress since the late twentieth century has centred on semiconductor devices, such as transistors, diodes and solar cells. At the heart of these devices is the internal motion of electrons through semiconductor materials due to applied electric fields or by the excitation of photocarriers. Imaging the motion of these electrons would provide unprecedented insight into this important phenomenon, but requires high spatial and temporal resolution. Current studies of electron dynamics in semiconductors are generally limited by the spatial resolution of optical probes, or by the temporal resolution of electronic probes. Here, by combining femtosecond pump-probe techniques with spectroscopic photoemission electron microscopy, we imaged the motion of photoexcited electrons from high-energy to low-energy states in a type-II 2D InSe/GaAs heterostructure. At the instant of photoexcitation, energy-resolved photoelectron images revealed a highly non-equilibrium distribution of photocarriers in space and energy. Thereafter, in response to the out-of-equilibrium photocarriers, we observed the spatial redistribution of charges, thus forming internal electric fields, bending the semiconductor bands, and finally impeding further charge transfer. By assembling images taken at different time-delays, we produced a movie lasting a few trillionths of a second of the electron-transfer process in the photoexcited type-II heterostructure—a fundamental phenomenon in semiconductor devices such as solar cells. Quantitative analysis and theoretical modelling of spatial variations in the movie provide insight into future solar cells, 2D materials and other semiconductor devices.

Ferroelectrics for semiconductor devices

NASA Astrophysics Data System (ADS)

Sayer, M.; Wu, Z.; Vasant Kumar, C. V. R.; Amm, D. T.; Griswold, E. M.

1992-11-01

The technology for the implementation of the integration of thin film ferroelectrics with silicon processing for various devices is described, and factors affecting the integration of ferroelectric films with semiconductor processing are discussed. Consideration is also given to film properties, the properties of electrode materials and structures, and the phenomena of ferroelectric fatigue and aging. Particular attention is given to the nonmemory device application of ferroelectrics.

Optical devices integrated with semiconductor optical amplifier

NASA Astrophysics Data System (ADS)

Oh, Kwang R.; Park, Moon S.; Jeong, Jong S.; Baek, Yongsoon; Oh, Dae-Kon

2000-07-01

Semiconductor optical amplifiers (SOA's) have been used as a key optical component for the high capacity communication systems. The monolithic integration is necessary for the stable operation of these devices and the wider applications. In this paper, the coupling technique between different waveguides and the integration of SSC's are discussed and the research results of optical devices integrated with SOA's are presented.

Sputtered pin amorphous silicon semi-conductor device and method therefor

DOEpatents

Moustakas, Theodore D.; Friedman, Robert A.

1983-11-22

A high efficiency amorphous silicon PIN semi-conductor device is constructed by the sequential sputtering of N, I and P layers of amorphous silicon and at least one semi-transparent ohmic electrode. A method of construction produces a PIN device, exhibiting enhanced physical integrity and facilitates ease of construction in a singular vacuum system and vacuum pump down procedure.

Modeling of Quantum Transport in Semiconductor Devices (The Physics and Operation of Ultra-Submicron Length Semiconductor Devices).

DTIC Science & Technology

1994-05-01

Open Systems and Contacts ...................... 16 A Ballistic Transport .......................... 17 B Role of the Boundaries and Contacts...15 Other Devices ................................ 90 V Modeling with the Green’s Functions 91 16 Homogeneous, Low-Field Systems .................. 93 A...The Retarded Function ..................... 95 B The "Less-Than" Function ................... 99 17 Homogeneous, High-Field Systems

Semiconductor crystal high resolution imager

NASA Technical Reports Server (NTRS)

Matteson, James (Inventor); Levin, Craig S. (Inventor)

2011-01-01

A radiation imaging device (10). The radiation image device (10) comprises a subject radiation station (12) producing photon emissions (14), and at least one semiconductor crystal detector (16) arranged in an edge-on orientation with respect to the emitted photons (14) to directly receive the emitted photons (14) and produce a signal. The semiconductor crystal detector (16) comprises at least one anode and at least one cathode that produces the signal in response to the emitted photons (14).

Semiconductor/High-Tc-Superconductor Hybrid ICs

NASA Technical Reports Server (NTRS)

Burns, Michael J.

1995-01-01

Hybrid integrated circuits (ICs) containing both Si-based semiconducting and YBa(2)Cu(3)O(7-x) superconducting circuit elements on sapphire substrates developed. Help to prevent diffusion of Cu from superconductors into semiconductors. These hybrid ICs combine superconducting and semiconducting features unavailable in superconducting or semiconducting circuitry alone. For example, complementary metal oxide/semiconductor (CMOS) readout and memory devices integrated with fast-switching Josephson-junction super-conducting logic devices and zero-resistance interconnections.

Optical devices featuring nonpolar textured semiconductor layers

DOEpatents

Moustakas, Theodore D; Moldawer, Adam; Bhattacharyya, Anirban; Abell, Joshua

2013-11-26

A semiconductor emitter, or precursor therefor, has a substrate and one or more textured semiconductor layers deposited onto the substrate in a nonpolar orientation. The textured layers enhance light extraction, and the use of nonpolar orientation greatly enhances internal quantum efficiency compared to conventional devices. Both the internal and external quantum efficiencies of emitters of the invention can be 70-80% or higher. The invention provides highly efficient light emitting diodes suitable for solid state lighting.

Controlled buckling structures in semiconductor interconnects and nanomembranes for stretchable electronics

DOEpatents

Rogers, John A; Meitl, Matthew; Sun, Yugang; Ko, Heung Cho; Carlson, Andrew; Choi, Won Mook; Stoykovich, Mark; Jiang, Hanqing; Huang, Yonggang; Nuzzo, Ralph G; Zhu, Zhengtao; Menard, Etienne; Khang, Dahl-Young

2014-05-20

In an aspect, the present invention provides stretchable, and optionally printable, components such as semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed, and related methods of making or tuning such stretchable components. Stretchable semiconductors and electronic circuits preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention are adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Controlled buckling structures in semiconductor interconnects and nanomembranes for stretchable electronics

DOEpatents

Rogers, John A [Champaign, IL; Meitl, Matthew [Raleigh, NC; Sun, Yugang [Naperville, IL; Ko, Heung Cho [Urbana, IL; Carlson, Andrew [Urbana, IL; Choi, Won Mook [Champaign, IL; Stoykovich, Mark [Dover, NH; Jiang, Hanqing [Urbana, IL; Huang, Yonggang [Glencoe, IL; Nuzzo, Ralph G [Champaign, IL; Lee, Keon Jae [Tokyo, JP; Zhu, Zhengtao [Rapid City, SD; Menard, Etienne [Durham, NC; Khang, Dahl-Young [Seoul, KR; Kan, Seong Jun [Daejeon, KR; Ahn, Jong Hyun [Suwon, KR; Kim, Hoon-sik [Champaign, IL

2012-07-10

In an aspect, the present invention provides stretchable, and optionally printable, components such as semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed, and related methods of making or tuning such stretchable components. Stretchable semiconductors and electronic circuits preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention are adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Fabrication of eco-friendly PNP transistor using RF magnetron sputtering

NASA Astrophysics Data System (ADS)

Kumar, B. Santhosh; Harinee, N.; Purvaja, K.; Shanker, N. Praveen; Manikandan, M.; Aparnadevi, N.; Mukilraj, T.; Venkateswaran, C.

2018-05-01

An effort has been made to fabricate a thin film transistor using eco-friendly oxide semiconductor materials. Oxide semiconductor materials are cost - effective, thermally and chemically stable with high electron/hole mobility. Copper (II) oxide is a p-type semiconductor and zinc oxide is an n-type semiconductor. A pnp thin film transistor was fabricated using RF magnetron sputtering. The films deposited have been subjected to structural characterization using AFM. I-V characterization of the fabricated device, Ag/CuO/ZnO/CuO/Ag, confirms transistor behaviour. The mechanism of electron/hole transport of the device is discussed below.

Near-Unity Absorption in van der Waals Semiconductors for Ultrathin Optoelectronics.

PubMed

Jariwala, Deep; Davoyan, Artur R; Tagliabue, Giulia; Sherrott, Michelle C; Wong, Joeson; Atwater, Harry A

2016-09-14

We demonstrate near-unity, broadband absorbing optoelectronic devices using sub-15 nm thick transition metal dichalcogenides (TMDCs) of molybdenum and tungsten as van der Waals semiconductor active layers. Specifically, we report that near-unity light absorption is possible in extremely thin (<15 nm) van der Waals semiconductor structures by coupling to strongly damped optical modes of semiconductor/metal heterostructures. We further fabricate Schottky junction devices using these highly absorbing heterostructures and characterize their optoelectronic performance. Our work addresses one of the key criteria to enable TMDCs as potential candidates to achieve high optoelectronic efficiency.

Noise And Charge Transport In Carbon Nanotube Devices

NASA Astrophysics Data System (ADS)

Reza, Shahed; Huynh, Quyen T.; Bosman, Gijs; Sippel, Jennifer; Rinzler, Andrew G.

2005-11-01

The charge transport and noise properties of three terminal, gated devices containing multiple, single wall, metallic and semiconductor carbon nanotubes have been measured as a function of gate and drain bias at 300K. Using pulsed bias the metallic tubes could be burned sequentially enabling the separation of measured conductance and low frequency excess noise into metallic and semiconductor contributions. The relative low frequency excess noise of the metallic tubes was about a factor 100 lower than that of the semiconductor tubes, whereas the conductance of the metallic tubes was significantly higher (10 to 50 times) than that of the semiconductor tubes.

Gate bias stress in pentacene field-effect-transistors: Charge trapping in the dielectric or semiconductor

NASA Astrophysics Data System (ADS)

Häusermann, R.; Batlogg, B.

2011-08-01

Gate bias stress instability in organic field-effect transistors (OFETs) is a major conceptual and device issue. This effect manifests itself by an undesirable shift of the transfer characteristics and is associated with long term charge trapping. We study the role of the dielectric and the semiconductor separately by producing OFETs with the same semiconductor (pentacene) combined with different dielectrics (SiO2 and Cytop). We show that it is possible to fabricate devices which are immune to gate bias stress. For other material combinations, charge trapping occurs in the semiconductor alone or in the dielectric.

Monolayer borophene electrode for effective elimination of both the Schottky barrier and strong electric field effect

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, L. Z., E-mail: lzliu@nju.edu.cn, E-mail: hkxlwu@nju.edu.cn; Xiong, S. J.; Wu, X. L., E-mail: lzliu@nju.edu.cn, E-mail: hkxlwu@nju.edu.cn

2016-08-08

The formation of Schottky barriers between 2D semiconductors and traditional metallic electrodes has greatly limited the application of 2D semiconductors in nanoelectronic and optoelectronic devices. In this study, metallic borophene was used as a substitute for the traditional noble metal electrode to contact with the 2D semiconductor. Theoretical calculations demonstrated that no Schottky barrier exists in the borophene/2D semiconductor heterostructure. The contact remains ohmic even with a strong electric field applied. This finding provides a way to construct 2D electronic devices and sensors with greatly enhanced performance.

Multi-junction Thin-film Solar Cells on Flexible Substrates for Space Power

NASA Technical Reports Server (NTRS)

Hepp, Aloysius F.; Smith, Mark; Scofield, John H.; Dickman, John E.; Lush, Gregory B.; Morel, Donald L.; Ferekides, Christos; Dhere, Neelkanth G.

2002-01-01

The ultimate objective of the thin-film program at NASA GRC is development of a 20 percent AM0 thin-film device technology with high power/weight ratio. Several approaches are outlined to improve overall device efficiency and power/weight ratio. One approach involves the use of very lightweight flexible substrates such as polyimides (i.e., Kapton(Trademark)) or metal foil. Also, a compound semiconductor tandem device structure that can meet this objective is proposed and simulated using Analysis of Microelectronic and Photonic Structures (AMPS). AMPS modeling of current devices in tandem format indicate that AM0 efficiencies near 20 percent can be achieved. And with improvements in materials, efficiencies approaching 25 percent are achievable. Several important technical issues need to be resolved to realize these complex devices: development of a wide bandgap material with good electronic properties, development of transparent contacts, and targeting a 2-terminal device structure (with more complicated processing and tunnel junction) or 4-terminal device. Recent progress in the NASA GRC program is outlined.

Compact Models for Defect Diffusivity in Semiconductor Alloys.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wright, Alan F.; Modine, Normand A.; Lee, Stephen R.

Predicting transient effects caused by short - pulse neutron irradiation of electronic devices is an important part of Sandia's mission. For example , predicting the diffusion of radiation - induced point defects is needed with in Sandia's Qualification Alternative to the Sandia Pulsed Reactor (QASPR) pro gram since defect diffusion mediates transient gain recovery in QASPR electronic devices. Recently, the semiconductors used to fabricate radiation - hard electronic devices have begun to shift from silicon to III - V compounds such as GaAs, InAs , GaP and InP . An advantage of this shift is that it allows engineers tomore » optimize the radiation hardness of electronic devices by using alloy s such as InGaAs and InGaP . However, the computer codes currently being used to simulate transient radiation effects in QASP R devices will need to be modified since they presume that defect properties (charge states, energy levels, and diffusivities) in these alloys do not change with time. This is not realistic since the energy and properties of a defect depend on the types of atoms near it and , therefore, on its location in the alloy. In particular, radiation - induced defects are created at nearly random locations in an alloy and the distribution of their local environments - and thus their energies and properties - evolves with time as the defects diffuse through the alloy . To incorporate these consequential effects into computer codes used to simulate transient radiation effects, we have developed procedures to accurately compute the time dependence of defect energies and properties and then formulate them within compact models that can be employed in these computer codes. In this document, we demonstrate these procedures for the case of the highly mobile P interstitial (I P ) in an InGaP alloy. Further dissemination only as authorized to U.S. Government agencies and their contractors; other requests shall be approved by the originating facility or higher DOE programmatic authority.« less

Outline and comparison of the possible effects present in a metal-thin-film-insulator-semiconductor solar cell

NASA Technical Reports Server (NTRS)

Fonash, S. J.

1976-01-01

The advantages possible with the insertion of a thin-film insulating or semi-insulating layer between a metal and a semiconductor to form the MIS photovoltaic device have been presented previously in the literature. This MIS configuration may be considered as a specific example of a more general class of photovoltaic devices: electrode-thin-film-insulator-semiconductor devices. Since the advantages of the configuration were pointed out, there has been considerable experimental interest in these photovoltaic devices. Because the previous analysis showed that the introduction of the insulator layer could produce several different but advantageous effects, this paper presents a further outline giving a comparison of these effects together with their ramifications.

A comprehensive study of charge trapping in organic field-effect devices with promising semiconductors and different contact metals by displacement current measurements

NASA Astrophysics Data System (ADS)

Bisoyi, Sibani; Rödel, Reinhold; Zschieschang, Ute; Kang, Myeong Jin; Takimiya, Kazuo; Klauk, Hagen; Tiwari, Shree Prakash

2016-02-01

A systematic and comprehensive study on the charge-carrier injection and trapping behavior was performed using displacement current measurements in long-channel capacitors based on four promising small-molecule organic semiconductors (pentacene, DNTT, C10-DNTT and DPh-DNTT). In thin-film transistors, these semiconductors showed charge-carrier mobilities ranging from 1.0 to 7.8 cm2 V-1 s-1. The number of charges injected into and extracted from the semiconductor and the density of charges trapped in the device during each measurement were calculated from the displacement current characteristics and it was found that the density of trapped charges is very similar in all devices and of the order 1012 cm-2, despite the fact that the four semiconductors show significantly different charge-carrier mobilities. The choice of the contact metal (Au, Ag, Cu, Pd) was also found to have no significant effect on the trapping behavior.

An Ultrathin Single Crystalline Relaxor Ferroelectric Integrated on a High Mobility Semiconductor.

PubMed

Moghadam, Reza M; Xiao, Zhiyong; Ahmadi-Majlan, Kamyar; Grimley, Everett D; Bowden, Mark; Ong, Phuong-Vu; Chambers, Scott A; Lebeau, James M; Hong, Xia; Sushko, Peter V; Ngai, Joseph H

2017-10-11

The epitaxial growth of multifunctional oxides on semiconductors has opened a pathway to introduce new functionalities to semiconductor device technologies. In particular, the integration of gate materials that enable nonvolatile or hysteretic functionality in field-effect transistors could lead to device technologies that consume less power or allow for novel modalities in computing. Here we present electrical characterization of ultrathin single crystalline SrZr x Ti 1-x O 3 (x = 0.7) films epitaxially grown on a high mobility semiconductor, Ge. Epitaxial films of SrZr x Ti 1-x O 3 exhibit relaxor behavior, characterized by a hysteretic polarization that can modulate the surface potential of Ge. We find that gate layers as thin as 5 nm corresponding to an equivalent-oxide thickness of just 1.0 nm exhibit a ∼2 V hysteretic window in the capacitance-voltage characteristics. The development of hysteretic metal-oxide-semiconductor capacitors with nanoscale gate thicknesses opens new vistas for nanoelectronic devices.

Researchers Validate UV Light's Use in Improving Semiconductors | News |

Science.gov Websites

device. The ability to use different classes of semiconductors could create additional possibilities for integrating a variety of different semiconductors in the future," Park said. The researchers explored

Research and Development Strategies in the Semiconductor Industry

NASA Astrophysics Data System (ADS)

Bowling, Allen

2003-03-01

In the 21st Century semiconductor industry, there is a critical balance between internally funded semiconductor research and development (R) and externally funded R. External R may include jointly-funded research collaborations/partnerships with other device manufacturers, jointly-funded consortia-based R, and individually-funded research programs at universities and other contract research locations. Each of these approaches has merits and each has costs. There is a critical balance between keeping the internal research and development pipeline filled and keeping it from being overspent. To meet both competitive schedule and cost goals, a semiconductor device manufacturer must decide on a model for selection of internal versus external R. Today, one of the most critical decisions is whether or not to do semiconductor research and development on 300 mm silicon wafers. Equipment suppliers are doing first development on 300 mm equipment. So, for the device manufacturer, there is a balance between the cost of doing development on 300 mm wafers and the development time schedule driven by equipment availability. In the face of these cost and schedule elements, device manufacturers are looking to consortia such as SEMATECH, SRC, and SRC MARCO for early development and screening of new materials and device structure approaches. This also causes much more close development collaboration between device manufacturer and equipment supplier. Many device manufacturers are also making use of direct contract research with universities and other contract-research organizations, such as IMEC, LETI, and other government-funded research organizations around the world. To get the most out of these external research interactions, the company must develop a strategy for management and technology integration of external R.

78 FR 40427 - Foreign-Trade Zone (FTZ) 183-Austin, Texas; Notification of Proposed Production Activity; Samsung...

Federal Register 2010, 2011, 2012, 2013, 2014

2013-07-05

..., Texas; Notification of Proposed Production Activity; Samsung Austin Semiconductor, LLC (Semiconductors); Austin, Texas Samsung Austin Semiconductor, LLC (Samsung), operator of Subzone 183B, submitted a... June 26, 2013. Samsung currently has authority to produce semiconductor memory devices for export...

Semiconductor Laser Low Frequency Noise Characterization

NASA Technical Reports Server (NTRS)

Maleki, Lute; Logan, Ronald T.

1996-01-01

This work summarizes the efforts in identifying the fundamental noise limit in semiconductor optical sources (lasers) to determine the source of 1/F noise and it's associated behavior. In addition, the study also addresses the effects of this 1/F noise on RF phased arrays. The study showed that the 1/F noise in semiconductor lasers has an ultimate physical limit based upon similar factors to fundamental noise generated in other semiconductor and solid state devices. The study also showed that both additive and multiplicative noise can be a significant detriment to the performance of RF phased arrays especially in regard to very low sidelobe performance and ultimate beam steering accuracy. The final result is that a noise power related term must be included in a complete analysis of the noise spectrum of any semiconductor device including semiconductor lasers.

Method for altering the luminescence of a semiconductor

DOEpatents

Barbour, J. Charles; Dimos, Duane B.

1999-01-01

A method is described for altering the luminescence of a light emitting semiconductor (LES) device. In particular, a method is described whereby a silicon LES device can be selectively irradiated with a radiation source effective for altering the intensity of luminescence of the irradiated region.

Power semiconductor device with negative thermal feedback

NASA Technical Reports Server (NTRS)

Borky, J. M.; Thornton, R. D.

1970-01-01

Composite power semiconductor avoids second breakdown and provides stable operation. It consists of an array of parallel-connected integrated circuits fabricated in a single chip. The output power device and associated low-level amplifier are closely coupled thermally, so that they have a predetermined temperature relationship.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Moghadam, Reza M.; Xiao, Zhiyong; Ahmadi-Majlan, Kamyar

The epitaxial growth of multifunctional oxides on semiconductors has opened a pathway to introduce new functionalities to semiconductor device technologies. In particular, ferroelectric materials integrated on semiconductors could lead to low-power field-effect devices that can be used for logic or memory. Essential to realizing such field-effect devices is the development of ferroelectric metal-oxide-semiconductor (MOS) capacitors, in which the polarization of a ferroelectric gate is coupled to the surface potential of a semiconducting channel. Here we demonstrate that ferroelectric MOS capacitors can be realized using single crystalline SrZrxTi1-xO3 (x= 0.7) that has been epitaxially grown on Ge. We find that themore » ferroelectric properties of SrZrxTi1-xO3 are exceptionally robust, as gate layers as thin as 5 nm give rise to hysteretic capacitance-voltage characteristics that are 2 V in width. The development of ferroelectric MOS capacitors with gate thicknesses that are technologically relevant opens a pathway to realize scalable ferroelectric field-effect devices.« less

Methods of measurement for semiconductor materials, process control, and devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1973-01-01

This progress report describes NBS activities directed toward the development of methods of measurement for semiconductor materials, process control, and devices. Significant accomplishments during this reporting period include design of a plan to provide standard silicon wafers for four-probe resistivity measurements for the industry, publication of a summary report on the photoconductive decay method for measuring carrier lifetime, publication of a comprehensive review of the field of wire bond fabrication and testing, and successful completion of organizational activity leading to the establishment of a new group on quality and hardness assurance in ASTM Committee F-1 on Electronics. Work is continuing on measurement of resistivity of semiconductor crystals; characterization of generation-recombination-trapping centers in silicon; study of gold-doped silicon; development of the infrared response technique; evaluation of wire bonds and die attachment; and measurement of thermal properties of semiconductor devices, delay time and related carrier transport properties in junction devices, and noise properties of microwave diodes.

A theoretical study of heterojunction and graded band gap type solar cells

NASA Technical Reports Server (NTRS)

Sutherland, J. E.; Hauser, J. R.

1977-01-01

A computer program was designed for the analysis of variable composition solar cells and applied to several proposed solar cell structures using appropriate semiconductor materials. The program simulates solar cells made of a ternary alloy of two binary semiconductors with an arbitrary composition profile, and an abrupt or Gaussian doping profile of polarity n-on-p or p-on-n with arbitrary doping levels. Once the device structure is specified, the program numerically solves a complete set of differential equations and calculates electrostatic potential, quasi-Fermi levels, carrier concentrations and current densities, total current density and efficiency as functions of terminal voltage and position within the cell. These results are then recorded by computer in tabulated or plotted form for interpretation by the user.

Prediction of the thermal annealing of thick oxide metal-oxide-semiconductor dosimeters irradiated in a harsh radiation environment

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ravotti, F.; Glaser, M.; Saigne, F.

Radiation-sensing metal-oxide-semiconductor field-effect transistors produced by the laboratory LAAS-CNRS were exposed to a harsh hadron field that represents the real radiation environment expected at the CERN Large Hadron Collider experiments. The long-term stability of the transistor's I{sub ds}-V{sub gs} characteristic was investigated using the isochronal annealing technique. In this work, devices exposed to high intensity hadron levels ({phi}{>=}10{sup 12} neutrons/cm{sup 2}) show evidences of displacement damages in the I{sub ds}-V{sub gs} annealing behavior. By comparing experimental and simulated results over 14 months, the isochronal annealing method, originally devoted to oxide trapped charge, is shown to enable prediction of the recoverymore » of silicon bulk defects.« less

Single photon detection with self-quenching multiplication

NASA Technical Reports Server (NTRS)

Zheng, Xinyu (Inventor); Cunningham, Thomas J. (Inventor); Pain, Bedabrata (Inventor)

2011-01-01

A photoelectronic device and an avalanche self-quenching process for a photoelectronic device are described. The photoelectronic device comprises a nanoscale semiconductor multiplication region and a nanoscale doped semiconductor quenching structure including a depletion region and an undepletion region. The photoelectronic device can act as a single photon detector or a single carrier multiplier. The avalanche self-quenching process allows electrical field reduction in the multiplication region by movement of the multiplication carriers, thus quenching the avalanche.

Numerical simulation of optical and electronic properties for multilayer organic light-emitting diodes and its application in engineering education

NASA Astrophysics Data System (ADS)

Chang, Shu-Hsuan; Chang, Yung-Cheng; Yang, Cheng-Hong; Chen, Jun-Rong; Kuo, Yen-Kuang

2006-02-01

Organic light-emitting diodes (OLEDs) have been extensively developed in the past few years. The OLED displays have advantages over other displays, such as CRT, LCD, and PDP in thickness, weight, brightness, response time, viewing angle, contrast, driving power, flexibility, and capability of self-emission. In this work, the optical and electronic properties of multilayer OLED devices are numerically studied with an APSYS (Advanced Physical Model of Semiconductor Devices) simulation program. Specifically, the emission and absorption spectra of the Alq 3, DCM, PBD, and SA light-emitting layers, and energy band diagrams, electron-hole recombination rates, and current-voltage characteristics of the simulated OLED devices, typically with a multilayer structure of metal/Alq 3/EML/TPD/ITO constructed by Lim et al., are investigated and compared to the experimental results. The physical models utilized in this work are similar to those presented by Ruhstaller et al. and Hoffmann et al. The simulated results indicate that the emission spectra of the Alq 3, DCM, PBD, and SA light-emitting layers obtained in this study are in good agreement with those obtained experimentally by Zugang et al. Optimization of the optical and electronic performance of the multilayer OLED devices are attempted. In order to further promote the research results, the whole numerical simulation process for optimizing the design of OLED devices has been applied to a project-based course of OLED device design to enhance the students' skills in photonics device design at the Graduate Institute of Photonics of National Changhua University of Education in Taiwan. In the meantime, the effectiveness of the course has been proved by various assessments. The application of the results is a useful point of reference for the research on photonics device design and engineering education. Therefore, it proffers a synthetic effect between innovation and practical application.

Semiconductor millimeter wavelength electronics

NASA Astrophysics Data System (ADS)

Rosenbaum, F. J.

1985-12-01

This final report summarizes the results of research carried out on topics in millimeter wavelength semiconductor electronics under an ONR Selected Research Opportunity program. Study areas included III-V compound semiconductor growth and characterization, microwave and millimeter wave device modeling, fabrication and testing, and the development of new device concepts. A new millimeter wave mixer and detector, the Gap diode was invented. Topics reported on include ballistic transport, Zener oscillations, impurities in GaAs, electron velocity-electric field calculation and measurements, etc., calculations.

Investigation of semiconductor clad optical waveguides

NASA Technical Reports Server (NTRS)

Batchman, T. E.; Carson, R. F.

1985-01-01

A variety of techniques have been proposed for fabricating integrated optical devices using semiconductors, lithium niobate, and glasses as waveguides and substrates. The use of glass waveguides and their interaction with thin semiconductor cladding layers was studied. Though the interactions of these multilayer waveguide structures have been analyzed here using glass, they may be applicable to other types of materials as well. The primary reason for using glass is that it provides a simple, inexpensive way to construct waveguides and devices.

The excitonic photoluminescence mechanism and lasing action in band-gap-tunable CdS(1-x)Se(x) nanostructures.

PubMed

Dai, Jun; Zhou, Pengxia; Lu, Junfeng; Zheng, Hongge; Guo, Jiyuan; Wang, Fang; Gu, Ning; Xu, Chunxiang

2016-01-14

Bandgap tunable semiconductor materials have wide application in integrated-optoelectronic and communication devices. The CdS1-xSex ternary semiconductor materials covering green-red bands have been reported previously, but their basic band-gap and optical properties crucial to the performance of the CdS1-xSex-based optoelectronic devices have not been deeply understood. In this paper, we theoretically simulated and discussed the feasibility of bandgap-tunable CdS1-xSex nanomaterials for designing wavelength tunable microlasers. Then we fabricated the CdS1-xSex nanobelts with their band gap ranging from 2.4 to 1.74 eV by adjusting the composition ratio x in the vapor-phase-transport growth process. The temperature-dependent photoluminescence and exciton-related optical constants of the CdS1-xSex nanobelts were carefully demonstrated. Finally, the wavelength-tunable Fabry-Perot lasing in CdS1-xSex nanobelts was obtained, and the Fabry-Perot lasing mechanism was numerically simulated by the FDTD method. The systematic results on the mechanism of the tunable band gap, exciton properties and lasing of the CdS1-xSex nanostructure help us deeply understand the intrinsic optical properties of this material, and will build a strong foundation for future application of green-red wavelength-tunable CdS1-xSex microlasers.

Rocksalt nitride metal/semiconductor superlattices: A new class of artificially structured materials

NASA Astrophysics Data System (ADS)

Saha, Bivas; Shakouri, Ali; Sands, Timothy D.

2018-06-01

Artificially structured materials in the form of superlattice heterostructures enable the search for exotic new physics and novel device functionalities, and serve as tools to push the fundamentals of scientific and engineering knowledge. Semiconductor heterostructures are the most celebrated and widely studied artificially structured materials, having led to the development of quantum well lasers, quantum cascade lasers, measurements of the fractional quantum Hall effect, and numerous other scientific concepts and practical device technologies. However, combining metals with semiconductors at the atomic scale to develop metal/semiconductor superlattices and heterostructures has remained a profoundly difficult scientific and engineering challenge. Though the potential applications of metal/semiconductor heterostructures could range from energy conversion to photonic computing to high-temperature electronics, materials challenges primarily had severely limited progress in this pursuit until very recently. In this article, we detail the progress that has taken place over the last decade to overcome the materials engineering challenges to grow high quality epitaxial, nominally single crystalline metal/semiconductor superlattices based on transition metal nitrides (TMN). The epitaxial rocksalt TiN/(Al,Sc)N metamaterials are the first pseudomorphic metal/semiconductor superlattices to the best of our knowledge, and their physical properties promise a new era in superlattice physics and device engineering.

Büttiker probes for dissipative phonon quantum transport in semiconductor nanostructures

NASA Astrophysics Data System (ADS)

Miao, K.; Sadasivam, S.; Charles, J.; Klimeck, G.; Fisher, T. S.; Kubis, T.

2016-03-01

Theoretical prediction of phonon transport in modern semiconductor nanodevices requires atomic resolution of device features and quantum transport models covering coherent and incoherent effects. The nonequilibrium Green's function method is known to serve this purpose well but is numerically expensive in simulating incoherent scattering processes. This work extends the efficient Büttiker probe approach widely used in electron transport to phonons and considers salient implications of the method. Different scattering mechanisms such as impurity, boundary, and Umklapp scattering are included, and the method is shown to reproduce the experimental thermal conductivity of bulk Si and Ge over a wide temperature range. Temperature jumps at the lead/device interface are captured in the quasi-ballistic transport regime consistent with results from the Boltzmann transport equation. Results of this method in Si/Ge heterojunctions illustrate the impact of atomic relaxation on the thermal interface conductance and the importance of inelastic scattering to activate high-energy channels for phonon transport. The resultant phonon transport model is capable of predicting the thermal performance in the heterostructure efficiently.

Design and development of short- and long-wavelength MQW infrared vertical cavity surface emitting lasers

NASA Astrophysics Data System (ADS)

Iliadis, Agisilaos A.; Christou, Aristos

2003-07-01

The design, fabrication and performance of low threshold selectively oxidized infrared vertical cavity surface emitting lasers (VCSELs) for operation at 0.89μm and 1.55μm wavelengths using optimized graded Bragg mirrors, is reported. The devices are based on III-V ternary (AlGaAs/GaAs) and quaternary (AlInGaAs/GaInAsP/InP) graded semiconductor alloys and quantum wells and are grown by Molecular Beam Epitaxy. The VCSEL arrays are processed using inductively coupled plasma (ICP) etching with BCl3 gas mixtures to achieve vertical walls and small geometries, and the fabrication of the devices proceeds by using conventional Ohmic contacts (Ti-Pt-Au and Ni-Au-Ge-Ni) and indium tin oxide (ITO) transparent contacts. The theoretical investigation of the optical properties of the quaternary compound semiconductor alloys allows us to select the optimum materials for highly reflective Bragg mirrors with less periods. The simulation of the designed VCSEL performance has been carried out by evaluation of the important laser characteristics such as threshold gain, threshold current density and external quantum efficiency.

Methods for forming particles from single source precursors

DOEpatents

Fox, Robert V [Idaho Falls, ID; Rodriguez, Rene G [Pocatello, ID; Pak, Joshua [Pocatello, ID

2011-08-23

Single source precursors are subjected to carbon dioxide to form particles of material. The carbon dioxide may be in a supercritical state. Single source precursors also may be subjected to supercritical fluids other than supercritical carbon dioxide to form particles of material. The methods may be used to form nanoparticles. In some embodiments, the methods are used to form chalcopyrite materials. Devices such as, for example, semiconductor devices may be fabricated that include such particles. Methods of forming semiconductor devices include subjecting single source precursors to carbon dioxide to form particles of semiconductor material, and establishing electrical contact between the particles and an electrode.

Integrated semiconductor optical sensors for chronic, minimally-invasive imaging of brain function.

PubMed

Lee, Thomas T; Levi, Ofer; Cang, Jianhua; Kaneko, Megumi; Stryker, Michael P; Smith, Stephen J; Shenoy, Krishna V; Harris, James S

2006-01-01

Intrinsic optical signal (IOS) imaging is a widely accepted technique for imaging brain activity. We propose an integrated device consisting of interleaved arrays of gallium arsenide (GaAs) based semiconductor light sources and detectors operating at telecommunications wavelengths in the near-infrared. Such a device will allow for long-term, minimally invasive monitoring of neural activity in freely behaving subjects, and will enable the use of structured illumination patterns to improve system performance. In this work we describe the proposed system and show that near-infrared IOS imaging at wavelengths compatible with semiconductor devices can produce physiologically significant images in mice, even through skull.

Semiconductor technology program: Progress briefs

NASA Technical Reports Server (NTRS)

Galloway, K. F.; Scace, R. I.; Walters, E. J.

1981-01-01

Measurement technology for semiconductor materials, process control, and devices, is discussed. Silicon and silicon based devices are emphasized. Highlighted activities include semiinsulating GaAs characterization, an automatic scanning spectroscopic ellipsometer, linewidth measurement and coherence, bandgap narrowing effects in silicon, the evaluation of electrical linewidth uniformity, and arsenicomplanted profiles in silicon.

Method for altering the luminescence of a semiconductor

DOEpatents

Barbour, J.C.; Dimos, D.B.

1999-01-12

A method is described for altering the luminescence of a light emitting semiconductor (LES) device. In particular, a method is described whereby a silicon LES device can be selectively irradiated with a radiation source effective for altering the intensity of luminescence of the irradiated region. 4 figs.

General Electronics Technician: Semiconductor Devices and Circuits.

ERIC Educational Resources Information Center

Hilley, Robert

These instructional materials include a teacher's guide designed to assist instructors in organizing and presenting an introductory course in general electronics focusing on semiconductor devices and circuits and a student guide. The materials are based on the curriculum-alignment concept of first stating the objectives, developing instructional…

PDSOI and Radiation Effects: An Overview

NASA Technical Reports Server (NTRS)

Forgione, Joshua B.

2005-01-01

Bulk silicon substrates are a common characteristic of nearly all commercial, Complementary Metal-Oxide-Semiconductor (CMOS), integrated circuits. These devices operate well on Earth, but are not so well received in the space environment. An alternative to bulk CMOS is the Silicon-On-Insulator (SOI), in which a &electric isolates the device layer from the substrate. SO1 behavior in the space environment has certain inherent advantages over bulk, a primary factor in its long-time appeal to space-flight IC designers. The discussion will investigate the behavior of the Partially-Depleted SO1 (PDSOI) device with respect to some of the more common space radiation effects: Total Ionized Dose (TID), Single-Event Upsets (SEUs), and Single-Event Latchup (SEL). Test and simulation results from the literature, bulk and epitaxial comparisons facilitate reinforcement of PDSOI radiation characteristics.

Robust mode space approach for atomistic modeling of realistically large nanowire transistors

NASA Astrophysics Data System (ADS)

Huang, Jun Z.; Ilatikhameneh, Hesameddin; Povolotskyi, Michael; Klimeck, Gerhard

2018-01-01

Nanoelectronic transistors have reached 3D length scales in which the number of atoms is countable. Truly atomistic device representations are needed to capture the essential functionalities of the devices. Atomistic quantum transport simulations of realistically extended devices are, however, computationally very demanding. The widely used mode space (MS) approach can significantly reduce the numerical cost, but a good MS basis is usually very hard to obtain for atomistic full-band models. In this work, a robust and parallel algorithm is developed to optimize the MS basis for atomistic nanowires. This enables engineering-level, reliable tight binding non-equilibrium Green's function simulation of nanowire metal-oxide-semiconductor field-effect transistor (MOSFET) with a realistic cross section of 10 nm × 10 nm using a small computer cluster. This approach is applied to compare the performance of InGaAs and Si nanowire n-type MOSFETs (nMOSFETs) with various channel lengths and cross sections. Simulation results with full-band accuracy indicate that InGaAs nanowire nMOSFETs have no drive current advantage over their Si counterparts for cross sections up to about 10 nm × 10 nm.

Precise, Self-Limited Epitaxy of Ultrathin Organic Semiconductors and Heterojunctions Tailored by van der Waals Interactions.

PubMed

Wu, Bing; Zhao, Yinghe; Nan, Haiyan; Yang, Ziyi; Zhang, Yuhan; Zhao, Huijuan; He, Daowei; Jiang, Zonglin; Liu, Xiaolong; Li, Yun; Shi, Yi; Ni, Zhenhua; Wang, Jinlan; Xu, Jian-Bin; Wang, Xinran

2016-06-08

Precise assembly of semiconductor heterojunctions is the key to realize many optoelectronic devices. By exploiting the strong and tunable van der Waals (vdW) forces between graphene and organic small molecules, we demonstrate layer-by-layer epitaxy of ultrathin organic semiconductors and heterostructures with unprecedented precision with well-defined number of layers and self-limited characteristics. We further demonstrate organic p-n heterojunctions with molecularly flat interface, which exhibit excellent rectifying behavior and photovoltaic responses. The self-limited organic molecular beam epitaxy (SLOMBE) is generically applicable for many layered small-molecule semiconductors and may lead to advanced organic optoelectronic devices beyond bulk heterojunctions.

Microsensors based on GaN semiconductors covalently functionalized with luminescent Ru(II) complexes.

PubMed

López-Gejo, Juan; Arranz, Antonio; Navarro, Alvaro; Palacio, Carlos; Muñoz, Elías; Orellana, Guillermo

2010-02-17

Covalent tethering of a Ru(II) dye to gallium nitride surfaces has been accomplished as a key step in the development of innovative sensing devices in which the indicator support (semiconductor) plays the role of both support and excitation source. Luminescence emission decays and time-resolved emission spectra confirm the presence of the dye on the semiconductor surfaces, while X-ray photoelectron spectroscopy proves its covalent bonding. The O(2) sensitivity of the new device is comparable to those of other ruthenium-based sensor systems. This achievement paves the way to a new generation of integrable ultracompact microsensors that combine semiconductor emitter-probe assemblies.

Fabrication of optically reflecting ohmic contacts for semiconductor devices

DOEpatents

Sopori, Bhushan L.

1995-01-01

A method is provided to produce a low-resistivity ohmic contact having high optical reflectivity on one side of a semiconductor device. The contact is formed by coating the semiconductor substrate with a thin metal film on the back reflecting side and then optically processing the wafer by illuminating it with electromagnetic radiation of a predetermined wavelength and energy level through the front side of the wafer for a predetermined period of time. This method produces a thin epitaxial alloy layer between the semiconductor substrate and the metal layer when a crystalline substrate is used. The alloy layer provides both a low-resistivity ohmic contact and high optical reflectance.

Editorial

NASA Astrophysics Data System (ADS)

Bruzzi, Mara; Cartiglia, Nicolo; Pace, Emanuele; Talamonti, Cinzia

2015-10-01

The 10th edition of the International Conference on Radiation Effects on Semiconductor Materials, Detectors and Devices (RESMDD) was held in Florence, at Dipartimento di Fisica ed Astronomia on October 8-10, 2014. It has been aimed at discussing frontier research activities in several application fields as nuclear and particle physics, astrophysics, medical and solid-state physics. Main topics discussed in this conference concern performance of heavily irradiated silicon detectors, developments required for the luminosity upgrade of the Large Hadron Collider (HL-LHC), ultra-fast silicon detectors design and manufacturing, high-band gap semiconductor detectors, novel semiconductor-based devices for medical applications, radiation damage issues in semiconductors and related radiation-hardening technologies.

Controlled growth of larger heterojunction interface area for organic photosensitive devices

DOEpatents

Yang, Fan [Somerset, NJ; Forrest, Stephen R [Ann Arbor, MI

2009-12-29

An optoelectronic device and a method of fabricating a photosensitive optoelectronic device includes depositing a first organic semiconductor material on a first electrode to form a continuous first layer having protrusions, a side of the first layer opposite the first electrode having a surface area at least three times greater than an underlying lateral cross-sectional area; depositing a second organic semiconductor material directly on the first layer to form a discontinuous second layer, portions of the first layer remaining exposed; depositing a third organic semiconductor material directly on the second layer to form a discontinuous third layer, portions of at least the second layer remaining exposed; depositing a fourth organic semiconductor material on the third layer to form a continuous fourth layer, filling any exposed gaps and recesses in the first, second, and third layers; and depositing a second electrode on the fourth layer, wherein at least one of the first electrode and the second electrode is transparent, and the first and third organic semiconductor materials are both of a donor-type or an acceptor-type relative to second and fourth organic semiconductor materials, which are of the other material type.

VLSI (Very Large Scale Integrated Circuits) Device Reliability Models.

DTIC Science & Technology

1984-12-01

CIRCUIT COMPLEXITY FAILURE RATES FOR... A- 40 MOS SSI/MSI DEVICES IN FAILURE PER 106 HOURS TABLE 5.1.2.5-19: C1 AND C2 CIRCUIT COMPLEXITY FAILURE RATES FOR...A- 40 MOS SSI/MSI DEVICES IN FAILURE PER 106 HOURS TABLE 5.1.2.5-19: Cl AND C2 CIRCUIT COMPLEXITY FAILURE RATES FOR... A-41 LINEAR DEVICES IN...19 National Semiconductor 20 Nitron 21 Raytheon 22 Sprague 23 Synertek 24 Teledyne Crystalonics 25 TRW Semiconductor 26 Zilog The following companies

Whatever happened to silicon carbide. [semiconductor devices

NASA Technical Reports Server (NTRS)

Campbell, R. B.

1981-01-01

The progress made in silicon carbide semiconductor devices in the 1955 to 1975 time frame is examined and reasons are given for the present lack of interest in the material. Its physical and chemical properties and methods of preparation are discussed. Fabrication techniques and the characteristics of silicon carbide devices are reviewed. It is concluded that a combination of economic factors and the lack of progress in fabrication techniques leaves no viable market for SiC devices in the near future.

Finite Element Modeling of Micromachined MEMS Photon Devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Datskos, P.G.; Evans, B.M.; Schonberger, D.

1999-09-20

The technology of microelectronics that has evolved over the past half century is one of great power and sophistication and can now be extended to many applications (MEMS and MOEMS) other than electronics. An interesting application of MEMS quantum devices is the detection of electromagnetic radiation. The operation principle of MEMS quantum devices is based on the photoinduced stress in semiconductors, and the photon detection results from the measurement of the photoinduced bending. These devices can be described as micromechanical photon detectors. In this work, we have developed a technique for simulating electronic stresses using finite element analysis. We havemore » used our technique to model the response of micromechanical photon devices to external stimuli and compared these results with experimental data. Material properties, geometry, and bimaterial design play an important role in the performance of micromechanical photon detectors. We have modeled these effects using finite element analysis and included the effects of bimaterial thickness coating, effective length of the device, width, and thickness.« less

Finite element modeling of micromachined MEMS photon devices

NASA Astrophysics Data System (ADS)

Evans, Boyd M., III; Schonberger, D. W.; Datskos, Panos G.

1999-09-01

The technology of microelectronics that has evolved over the past half century is one of great power and sophistication and can now be extended to many applications (MEMS and MOEMS) other than electronics. An interesting application of MEMS quantum devices is the detection of electromagnetic radiation. The operation principle of MEMS quantum devices is based on the photoinduced stress in semiconductors, and the photon detection results from the measurement of the photoinduced bending. These devices can be described as micromechanical photon detectors. In this work, we have developed a technique for simulating electronic stresses using finite element analysis. We have used our technique to model the response of micromechanical photon devices to external stimuli and compared these results with experimental data. Material properties, geometry, and bimaterial design play an important role in the performance of micromechanical photon detectors. We have modeled these effects using finite element analysis and included the effects of bimaterial thickness coating, effective length of the device, width, and thickness.

A Monte Carlo software for the 1-dimensional simulation of IBIC experiments

NASA Astrophysics Data System (ADS)

Forneris, J.; Jakšić, M.; Pastuović, Ž.; Vittone, E.

2014-08-01

The ion beam induced charge (IBIC) microscopy is a valuable tool for the analysis of the electronic properties of semiconductors. In this work, a recently developed Monte Carlo approach for the simulation of IBIC experiments is presented along with a self-standing software equipped with graphical user interface. The method is based on the probabilistic interpretation of the excess charge carrier continuity equations and it offers to the end-user the full control not only of the physical properties ruling the induced charge formation mechanism (i.e., mobility, lifetime, electrostatics, device's geometry), but also of the relevant experimental conditions (ionization profiles, beam dispersion, electronic noise) affecting the measurement of the IBIC pulses. Moreover, the software implements a novel model for the quantitative evaluation of the radiation damage effects on the charge collection efficiency degradation of ion-beam-irradiated devices. The reliability of the model implementation is then validated against a benchmark IBIC experiment.

Investigation of the novel attributes in double recessed gate SiC MESFETs at drain side

NASA Astrophysics Data System (ADS)

Orouji, Ali A.; Razavi, S. M.; Ebrahim Hosseini, Seyed; Amini Moghadam, Hamid

2011-11-01

In this paper, the potential impact of drain side-double recessed gate (DS-DRG) on silicon carbide (SiC)-based metal semiconductor field effect transistors (MESFETs) is studied. We investigate the device performance focusing on breakdown voltage, threshold voltage, drain current and dc output conductance with two-dimensional and two-carrier device simulation. Our simulation results demonstrate that the channel thickness under the gate in the drain side is an important factor in the breakdown voltage. Also, the positive shift in the threshold voltage for the DS-DRG structure is larger in comparison with that for the source side-double recessed gate (SS-DRG) SiC MESFET. The saturated drain current for the DS-DRG structure is larger compared to that for the SS-DRG structure. The maximum dc output conductance in the DS-DRG structure is smaller than that in the SS-DRG structure.

Structural properties of thiophenes investigated with simulations of a coarse-grained model

NASA Astrophysics Data System (ADS)

Luettmer-Strathmann, Jutta; Almutairi, Amani

Thiophenes have important applications in organic electronics, energy conversion, and storage. The interfacial layer of an organic semiconductor in contact with a metal electrode has important effects on the performance of thin-film devices. However, the structure of this layer is not easy to model. In recent work, we developed a coarse-grained model for alpha-oligothiophenes in the bulk and near gold surfaces. We describe the molecules as linear chains of bonded, discotic particles with Gay-Berne potential interactions between non-bonded ellipsoids. In this work, we investigate structural properties of thiophenes with simulations of our coarse-grained model.

Metal-insulator-semiconductor heterostructures for plasmonic hot-carrier optoelectronics.

PubMed

García de Arquer, F Pelayo; Konstantatos, Gerasimos

2015-06-01

Plasmonic hot-electron devices are attractive candidates for light-energy harvesting and photodetection applications. For solid state devices, the most compact and straightforward architecture is the metal-semiconductor Schottky junction. However convenient, this structure introduces limitations such as the elevated dark current associated to thermionic emission, or constraints for device design due to the finite choice of materials. In this work we theoretically consider the metal-insulator-semiconductor heterojunction as a candidate for plasmonic hot-carrier photodetection and solar cells. The presence of the insulating layer can significantly reduce the dark current, resulting in increased device performance with predicted solar power conversion efficiencies up to 9%. For photodetection, the sensitivity can be extended well into the infrared by a judicious choice of the insulating layer, with up to 300-fold expected enhancement in detectivity.

Method to determine the position-dependant metal correction factor for dose-rate equivalent laser testing of semiconductor devices

DOEpatents

Horn, Kevin M.

2013-07-09

A method reconstructs the charge collection from regions beneath opaque metallization of a semiconductor device, as determined from focused laser charge collection response images, and thereby derives a dose-rate dependent correction factor for subsequent broad-area, dose-rate equivalent, laser measurements. The position- and dose-rate dependencies of the charge-collection magnitude of the device are determined empirically and can be combined with a digital reconstruction methodology to derive an accurate metal-correction factor that permits subsequent absolute dose-rate response measurements to be derived from laser measurements alone. Broad-area laser dose-rate testing can thereby be used to accurately determine the peak transient current, dose-rate response of semiconductor devices to penetrating electron, gamma- and x-ray irradiation.

Progress in silicon carbide semiconductor technology

NASA Technical Reports Server (NTRS)

Powell, J. A.; Neudeck, P. G.; Matus, L. G.; Petit, J. B.

1992-01-01

Silicon carbide semiconductor technology has been advancing rapidly over the last several years. Advances have been made in boule growth, thin film growth, and device fabrication. This paper wi11 review reasons for the renewed interest in SiC, and will review recent developments in both crystal growth and device fabrication.

Programme and Abstracts. Workshop on Expert Evaluation and Control of Compound Semiconductor Materials and Technologies (1st) Held in Ecole Centrale De Lyon, France on 19 -22 May 1992. (EXAMTEC’ 92)

DTIC Science & Technology

1992-05-22

Evaluation and Control of Compound Semiconductor Materials and Technologies (EXMATEC󈨠) at Ecole Centrale de Lyon (Ecully, France, 19th to 22nd May...semiconductor technologies to manufacture advanced devices with improved reproducibility, better reliability and lower cost. -’Device structures...concepts are required for expert evaluation and control of still developing technologies . In this context, the EXMATEC series will constitute a major

Photovoltaic Device Including A Boron Doping Profile In An I-Type Layer

DOEpatents

Yang, Liyou

1993-10-26

A photovoltaic cell for use in a single junction or multijunction photovoltaic device, which includes a p-type layer of a semiconductor compound including silicon, an i-type layer of an amorphous semiconductor compound including silicon, and an n-type layer of a semiconductor compound including silicon formed on the i-type layer. The i-type layer including an undoped first sublayer formed on the p-type layer, and a boron-doped second sublayer formed on the first sublayer.

Organic semiconductor crystals.

PubMed

Wang, Chengliang; Dong, Huanli; Jiang, Lang; Hu, Wenping

2018-01-22

Organic semiconductors have attracted a lot of attention since the discovery of highly doped conductive polymers, due to the potential application in field-effect transistors (OFETs), light-emitting diodes (OLEDs) and photovoltaic cells (OPVs). Single crystals of organic semiconductors are particularly intriguing because they are free of grain boundaries and have long-range periodic order as well as minimal traps and defects. Hence, organic semiconductor crystals provide a powerful tool for revealing the intrinsic properties, examining the structure-property relationships, demonstrating the important factors for high performance devices and uncovering fundamental physics in organic semiconductors. This review provides a comprehensive overview of the molecular packing, morphology and charge transport features of organic semiconductor crystals, the control of crystallization for achieving high quality crystals and the device physics in the three main applications. We hope that this comprehensive summary can give a clear picture of the state-of-art status and guide future work in this area.

Characterization and reliability of aluminum gallium nitride/gallium nitride high electron mobility transistors

NASA Astrophysics Data System (ADS)

Douglas, Erica Ann

Compound semiconductor devices, particularly those based on GaN, have found significant use in military and civilian systems for both microwave and optoelectronic applications. Future uses in ultra-high power radar systems will require the use of GaN transistors operated at very high voltages, currents and temperatures. GaN-based high electron mobility transistors (HEMTs) have proven power handling capability that overshadows all other wide band gap semiconductor devices for high frequency and high-power applications. Little conclusive research has been reported in order to determine the dominating degradation mechanisms of the devices that result in failure under standard operating conditions in the field. Therefore, it is imperative that further reliability testing be carried out to determine the failure mechanisms present in GaN HEMTs in order to improve device performance, and thus further the ability for future technologies to be developed. In order to obtain a better understanding of the true reliability of AlGaN/GaN HEMTs and determine the MTTF under standard operating conditions, it is crucial to investigate the interaction effects between thermal and electrical degradation. This research spans device characterization, device reliability, and device simulation in order to obtain an all-encompassing picture of the device physics. Initially, finite element thermal simulations were performed to investigate the effect of device design on self-heating under high power operation. This was then followed by a study of reliability of HEMTs and other tests structures during high power dc operation. Test structures without Schottky contacts showed high stability as compared to HEMTs, indicating that degradation of the gate is the reason for permanent device degradation. High reverse bias of the gate has been shown to induce the inverse piezoelectric effect, resulting in a sharp increase in gate leakage current due to crack formation. The introduction of elevated temperatures during high reverse gate bias indicated that device failure is due to the breakdown of an unintentional gate oxide. RF stress of AlGaN/GaN HEMTs showed comparable critical voltage breakdown regime as that of similar devices stressed under dc conditions. Though RF device characteristics showed stability up to a drain bias of 20 V, Schottky diode characteristics degraded substantially at all voltages investigated. Results from both dc and RF stress conditions, under several bias regimes, confirm that the primary root for stress induced degradation was due to the Schottky contact. (Full text of this dissertation may be available via the University of Florida Libraries web site. Please check http://www.uflib.ufl.edu/etd.html)

Device having two optical ports for switching applications

DOEpatents

Rosen, Ayre; Stabile, Paul J.

1991-09-24

A two-sided light-activatable semiconductor switch device having an optical port on each side thereof. The semiconductor device may be a p-i-n diode or of bulk intrinsic material. A two ported p-i-n diode, reverse-biased to "off" by a 1.3 kV dc power supply, conducted 192 A when activated by two 1 kW laser diode arrays, one for each optical port.

IMACS 󈨟: Proceedings of the IMACS World Congress on Computation and Applied Mathematics (13th) Held in Dublin, Ireland on July 22-26, 1991. Volume 4. Modelling and Simulation for Electrical, Electronic and Semiconductor Devices, Computation for Management Systems, Applications of Modelling and Simulation, Environmental Systems Simulation, Software Forum, Poster Sessions

DTIC Science & Technology

1991-07-01

synchronous machine case study . IEEE T rons. on For the ease nd -nq -2, four time scales trust be used And the A.C, Vol. 36. nul 3, March 1989. damnper... studied . A spot welded(Csse 3) * ss s i* r 0. or a line welded( Case 4) reinforcement plate is attached on the colliding surface of box beams arnd their...phased armature, is given on Figure 1. analytical field calculation in the machine magnetic structure. Il - MAGNETIC STRUCTURE MODELLING: In the case

Implantable biomedical devices on bioresorbable substrates

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rogers, John A; Kim, Dae-Hyeong; Omenetto, Fiorenzo

Provided herein are implantable biomedical devices, methods of administering implantable biomedical devices, methods of making implantable biomedical devices, and methods of using implantable biomedical devices to actuate a target tissue or sense a parameter associated with the target tissue in a biological environment. Each implantable biomedical device comprises a bioresorbable substrate, an electronic device having a plurality of inorganic semiconductor components supported by the bioresorbable substrate, and a barrier layer encapsulating at least a portion of the inorganic semiconductor components. Upon contact with a biological environment the bioresorbable substrate is at least partially resorbed, thereby establishing conformal contact between themore » implantable biomedical device and the target tissue in the biological environment.« less

Defect Characterization, Imaging, and Control in Wide-Bandgap Semiconductors and Devices

NASA Astrophysics Data System (ADS)

Brillson, L. J.; Foster, G. M.; Cox, J.; Ruane, W. T.; Jarjour, A. B.; Gao, H.; von Wenckstern, H.; Grundmann, M.; Wang, B.; Look, D. C.; Hyland, A.; Allen, M. W.

2018-03-01

Wide-bandgap semiconductors are now leading the way to new physical phenomena and device applications at nanoscale dimensions. The impact of defects on the electronic properties of these materials increases as their size decreases, motivating new techniques to characterize and begin to control these electronic states. Leading these advances have been the semiconductors ZnO, GaN, and related materials. This paper highlights the importance of native point defects in these semiconductors and describes how a complement of spatially localized surface science and spectroscopy techniques in three dimensions can characterize, image, and begin to control these electronic states at the nanoscale. A combination of characterization techniques including depth-resolved cathodoluminescence spectroscopy, surface photovoltage spectroscopy, and hyperspectral imaging can describe the nature and distribution of defects at interfaces at both bulk and nanoscale surfaces, their metal interfaces, and inside nanostructures themselves. These features as well as temperature and mechanical strain inside wide-bandgap device structures at the nanoscale can be measured even while these devices are operating. These advanced capabilities enable several new directions for describing defects at the nanoscale, showing how they contribute to device degradation, and guiding growth processes to control them.

Simulation of SiO2 etching in an inductively coupled CF4 plasma

NASA Astrophysics Data System (ADS)

Xu, Qing; Li, Yu-Xing; Li, Xiao-Ning; Wang, Jia-Bin; Yang, Fan; Yang, Yi; Ren, Tian-Ling

2017-02-01

Plasma etching technology is an indispensable processing method in the manufacturing process of semiconductor devices. Because of the high fluorine/carbon ratio of CF4, the CF4 gas is often used for etching SiO2. A commercial software ESI-CFD is used to simulate the process of plasma etching with an inductively coupled plasma model. For the simulation part, CFD-ACE is used to simulate the chamber, and CFD-TOPO is used to simulate the surface of the sample. The effects of chamber pressure, bias voltage and ICP power on the reactant particles were investigated, and the etching profiles of SiO2 were obtained. Simulation can be used to predict the effects of reaction conditions on the density, energy and angular distributions of reactant particles, which can play a good role in guiding the etching process.

Two-Dimensional Semiconductor Optoelectronics Based on van der Waals Heterostructures.

PubMed

Lee, Jae Yoon; Shin, Jun-Hwan; Lee, Gwan-Hyoung; Lee, Chul-Ho

2016-10-27

Two-dimensional (2D) semiconductors such as transition metal dichalcogenides (TMDCs) and black phosphorous have drawn tremendous attention as an emerging optical material due to their unique and remarkable optical properties. In addition, the ability to create the atomically-controlled van der Waals (vdW) heterostructures enables realizing novel optoelectronic devices that are distinct from conventional bulk counterparts. In this short review, we first present the atomic and electronic structures of 2D semiconducting TMDCs and their exceptional optical properties, and further discuss the fabrication and distinctive features of vdW heterostructures assembled from different kinds of 2D materials with various physical properties. We then focus on reviewing the recent progress on the fabrication of 2D semiconductor optoelectronic devices based on vdW heterostructures including photodetectors, solar cells, and light-emitting devices. Finally, we highlight the perspectives and challenges of optoelectronics based on 2D semiconductor heterostructures.

Flat-lying semiconductor-insulator interfacial layer in DNTT thin films.

PubMed

Jung, Min-Cherl; Leyden, Matthew R; Nikiforov, Gueorgui O; Lee, Michael V; Lee, Han-Koo; Shin, Tae Joo; Takimiya, Kazuo; Qi, Yabing

2015-01-28

The molecular order of organic semiconductors at the gate dielectric is the most critical factor determining carrier mobility in thin film transistors since the conducting channel forms at the dielectric interface. Despite its fundamental importance, this semiconductor-insulator interface is not well understood, primarily because it is buried within the device. We fabricated dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT) thin film transistors by thermal evaporation in vacuum onto substrates held at different temperatures and systematically correlated the extracted charge mobility to the crystal grain size and crystal orientation. As a result, we identify a molecular layer of flat-lying DNTT molecules at the semiconductor-insulator interface. It is likely that such a layer might form in other material systems as well, and could be one of the factors reducing charge transport. Controlling this interfacial flat-lying layer may raise the ultimate possible device performance for thin film devices.

Two-Dimensional Semiconductor Optoelectronics Based on van der Waals Heterostructures

PubMed Central

Lee, Jae Yoon; Shin, Jun-Hwan; Lee, Gwan-Hyoung; Lee, Chul-Ho

2016-01-01

Two-dimensional (2D) semiconductors such as transition metal dichalcogenides (TMDCs) and black phosphorous have drawn tremendous attention as an emerging optical material due to their unique and remarkable optical properties. In addition, the ability to create the atomically-controlled van der Waals (vdW) heterostructures enables realizing novel optoelectronic devices that are distinct from conventional bulk counterparts. In this short review, we first present the atomic and electronic structures of 2D semiconducting TMDCs and their exceptional optical properties, and further discuss the fabrication and distinctive features of vdW heterostructures assembled from different kinds of 2D materials with various physical properties. We then focus on reviewing the recent progress on the fabrication of 2D semiconductor optoelectronic devices based on vdW heterostructures including photodetectors, solar cells, and light-emitting devices. Finally, we highlight the perspectives and challenges of optoelectronics based on 2D semiconductor heterostructures. PMID:28335321

Active Control of Charge Density Waves at Degenerate Semiconductor Interfaces

NASA Astrophysics Data System (ADS)

Vinnakota, Raj; Genov, Dentcho

We present numerical modeling of an active electronically controlled highly confined charge-density waves, i.e. surface plasmon polaritons (SPPs) at the metallurgic interfaces of degenerate semiconductor materials. An electro-optic switching element for fully-functional plasmonic circuits based on p-n junction semiconductor Surface Plasmon Polariton (SPP) waveguide is shown. Two figures of merits are introduced and parametric study has been performed identifying the device optimal operation range. The Indium Gallium Arsenide (In0.53Ga0.47As) is identified as the best semiconductor material for the device providing high optical confinement, reduced system size and fast operation. The electro-optic SPP switching element is shown to operate at signal modulation up to -24dB and switching rates surpassing 100GHz, thus potentially providing a new pathway toward bridging the gap between electronic and photonic devices. The current work is funded by the NSF EPSCoR CIMM project under award #OIA-1541079.

Achieving Optimal Self-Adaptivity for Dynamic Tuning of Organic Semiconductors through Resonance Engineering.

PubMed

Tao, Ye; Xu, Lijia; Zhang, Zhen; Chen, Runfeng; Li, Huanhuan; Xu, Hui; Zheng, Chao; Huang, Wei

2016-08-03

Current static-state explorations of organic semiconductors for optimal material properties and device performance are hindered by limited insights into the dynamically changed molecular states and charge transport and energy transfer processes upon device operation. Here, we propose a simple yet successful strategy, resonance variation-based dynamic adaptation (RVDA), to realize optimized self-adaptive properties in donor-resonance-acceptor molecules by engineering the resonance variation for dynamic tuning of organic semiconductors. Organic light-emitting diodes hosted by these RVDA materials exhibit remarkably high performance, with external quantum efficiencies up to 21.7% and favorable device stability. Our approach, which supports simultaneous realization of dynamically adapted and selectively enhanced properties via resonance engineering, illustrates a feasible design map for the preparation of smart organic semiconductors capable of dynamic structure and property modulations, promoting the studies of organic electronics from static to dynamic.

Exchanging Ohmic Losses in Metamaterial Absorbers with Useful Optical Absorption for Photovoltaics

PubMed Central

Vora, Ankit; Gwamuri, Jephias; Pala, Nezih; Kulkarni, Anand; Pearce, Joshua M.; Güney, Durdu Ö.

2014-01-01

Using metamaterial absorbers, we have shown that metallic layers in the absorbers do not necessarily constitute undesired resistive heating problem for photovoltaics. Tailoring the geometric skin depth of metals and employing the natural bulk absorbance characteristics of the semiconductors in those absorbers can enable the exchange of undesired resistive losses with the useful optical absorbance in the active semiconductors. Thus, Ohmic loss dominated metamaterial absorbers can be converted into photovoltaic near-perfect absorbers with the advantage of harvesting the full potential of light management offered by the metamaterial absorbers. Based on experimental permittivity data for indium gallium nitride, we have shown that between 75%–95% absorbance can be achieved in the semiconductor layers of the converted metamaterial absorbers. Besides other metamaterial and plasmonic devices, our results may also apply to photodectors and other metal or semiconductor based optical devices where resistive losses and power consumption are important pertaining to the device performance. PMID:24811322

QCAD simulation and optimization of semiconductor double quantum dots

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nielsen, Erik; Gao, Xujiao; Kalashnikova, Irina

2013-12-01

We present the Quantum Computer Aided Design (QCAD) simulator that targets modeling quantum devices, particularly silicon double quantum dots (DQDs) developed for quantum qubits. The simulator has three di erentiating features: (i) its core contains nonlinear Poisson, e ective mass Schrodinger, and Con guration Interaction solvers that have massively parallel capability for high simulation throughput, and can be run individually or combined self-consistently for 1D/2D/3D quantum devices; (ii) the core solvers show superior convergence even at near-zero-Kelvin temperatures, which is critical for modeling quantum computing devices; (iii) it couples with an optimization engine Dakota that enables optimization of gate voltagesmore » in DQDs for multiple desired targets. The Poisson solver includes Maxwell- Boltzmann and Fermi-Dirac statistics, supports Dirichlet, Neumann, interface charge, and Robin boundary conditions, and includes the e ect of dopant incomplete ionization. The solver has shown robust nonlinear convergence even in the milli-Kelvin temperature range, and has been extensively used to quickly obtain the semiclassical electrostatic potential in DQD devices. The self-consistent Schrodinger-Poisson solver has achieved robust and monotonic convergence behavior for 1D/2D/3D quantum devices at very low temperatures by using a predictor-correct iteration scheme. The QCAD simulator enables the calculation of dot-to-gate capacitances, and comparison with experiment and between solvers. It is observed that computed capacitances are in the right ballpark when compared to experiment, and quantum con nement increases capacitance when the number of electrons is xed in a quantum dot. In addition, the coupling of QCAD with Dakota allows to rapidly identify which device layouts are more likely leading to few-electron quantum dots. Very efficient QCAD simulations on a large number of fabricated and proposed Si DQDs have made it possible to provide fast feedback for design comparison and optimization.« less

Semiconductor wire array structures, and solar cells and photodetectors based on such structures

DOEpatents

Kelzenberg, Michael D.; Atwater, Harry A.; Briggs, Ryan M.; Boettcher, Shannon W.; Lewis, Nathan S.; Petykiewicz, Jan A.

2014-08-19

A structure comprising an array of semiconductor structures, an infill material between the semiconductor materials, and one or more light-trapping elements is described. Photoconverters and photoelectrochemical devices based on such structure also described.

Ferroelectricity in Covalently functionalized Two-dimensional Materials: Integration of High-mobility Semiconductors and Nonvolatile Memory.

PubMed

Wu, Menghao; Dong, Shuai; Yao, Kailun; Liu, Junming; Zeng, Xiao Cheng

2016-11-09

Realization of ferroelectric semiconductors by conjoining ferroelectricity with semiconductors remains a challenging task because most present-day ferroelectric materials are unsuitable for such a combination due to their wide bandgaps. Herein, we show first-principles evidence toward the realization of a new class of two-dimensional (2D) ferroelectric semiconductors through covalent functionalization of many prevailing 2D materials. Members in this new class of 2D ferroelectric semiconductors include covalently functionalized germanene, and stanene (Nat. Commun. 2014, 5, 3389), as well as MoS 2 monolayer (Nat. Chem. 2015, 7, 45), covalent functionalization of the surface of bulk semiconductors such as silicon (111) (J. Phys. Chem. B 2006, 110 , 23898), and the substrates of oxides such as silica with self-assembly monolayers (Nano Lett. 2014, 14, 1354). The newly predicted 2D ferroelectric semiconductors possess high mobility, modest bandgaps, and distinct ferroelectricity that can be exploited for developing various heterostructural devices with desired functionalities. For example, we propose applications of the 2D materials as 2D ferroelectric field-effect transistors with ultrahigh on/off ratio, topological transistors with Dirac Fermions switchable between holes and electrons, ferroelectric junctions with ultrahigh electro-resistance, and multiferroic junctions for controlling spin by electric fields. All these heterostructural devices take advantage of the combination of high-mobility semiconductors with fast writing and nondestructive reading capability of nonvolatile memory, thereby holding great potential for the development of future multifunctional devices.

Modeling and simulation of electronic structure, material interface and random doping in nano electronic devices

PubMed Central

Chen, Duan; Wei, Guo-Wei

2010-01-01

The miniaturization of nano-scale electronic devices, such as metal oxide semiconductor field effect transistors (MOSFETs), has given rise to a pressing demand in the new theoretical understanding and practical tactic for dealing with quantum mechanical effects in integrated circuits. Modeling and simulation of this class of problems have emerged as an important topic in applied and computational mathematics. This work presents mathematical models and computational algorithms for the simulation of nano-scale MOSFETs. We introduce a unified two-scale energy functional to describe the electrons and the continuum electrostatic potential of the nano-electronic device. This framework enables us to put microscopic and macroscopic descriptions in an equal footing at nano scale. By optimization of the energy functional, we derive consistently-coupled Poisson-Kohn-Sham equations. Additionally, layered structures are crucial to the electrostatic and transport properties of nano transistors. A material interface model is proposed for more accurate description of the electrostatics governed by the Poisson equation. Finally, a new individual dopant model that utilizes the Dirac delta function is proposed to understand the random doping effect in nano electronic devices. Two mathematical algorithms, the matched interface and boundary (MIB) method and the Dirichlet-to-Neumann mapping (DNM) technique, are introduced to improve the computational efficiency of nano-device simulations. Electronic structures are computed via subband decomposition and the transport properties, such as the I-V curves and electron density, are evaluated via the non-equilibrium Green's functions (NEGF) formalism. Two distinct device configurations, a double-gate MOSFET and a four-gate MOSFET, are considered in our three-dimensional numerical simulations. For these devices, the current fluctuation and voltage threshold lowering effect induced by the discrete dopant model are explored. Numerical convergence and model well-posedness are also investigated in the present work. PMID:20396650

Resistive field structures for semiconductor devices and uses therof

DOE Office of Scientific and Technical Information (OSTI.GOV)

Marinella, Matthew; DasGupta, Sandeepan; Kaplar, Robert

The present disclosure relates to resistive field structures that provide improved electric field profiles when used with a semiconductor device. In particular, the resistive field structures provide a uniform electric field profile, thereby enhancing breakdown voltage and improving reliability. In example, the structure is a field cage that is configured to be resistive, in which the potential changes significantly over the distance of the cage. In another example, the structure is a resistive field plate. Using these resistive field structures, the characteristics of the electric field profile can be independently modulated from the physical parameters of the semiconductor device. Additionalmore » methods and architectures are described herein.« less

Electrical Characterization of Semiconductor Materials and Devices

NASA Astrophysics Data System (ADS)

Deen, M.; Pascal, Fabien

Semiconductor materials and devices continue to occupy a preeminent technological position due to their importance when building integrated electronic systems used in a wide range of applications from computers, cell-phones, personal digital assistants, digital cameras and electronic entertainment systems, to electronic instrumentation for medical diagnositics and environmental monitoring. Key ingredients of this technological dominance have been the rapid advances made in the quality and processing of materials - semiconductors, conductors and dielectrics - which have given metal oxide semiconductor device technology its important characteristics of negligible standby power dissipation, good input-output isolation, surface potential control and reliable operation. However, when assessing material quality and device reliability, it is important to have fast, nondestructive, accurate and easy-to-use electrical characterization techniques available, so that important parameters such as carrier doping density, type and mobility of carriers, interface quality, oxide trap density, semiconductor bulk defect density, contact and other parasitic resistances and oxide electrical integrity can be determined. This chapter describes some of the more widely employed and popular techniques that are used to determine these important parameters. The techniques presented in this chapter range in both complexity and test structure requirements from simple current-voltage measurements to more sophisticated low-frequency noise, charge pumping and deep-level transient spectroscopy techniques.

Suppression of Random Dopant-Induced Threshold Voltage Fluctuations in Sub-0.1-(micron)meter MOSFET's with Epitaxial and (delta)-Doped Channels

NASA Technical Reports Server (NTRS)

Asenov, Asen; Saini, Subhash

1999-01-01

A detailed three-dimensional (3-D) statistical 'atomistic' simulation study of fluctuation-resistant sub-0.1-(micron)meter MOSFET architectures with epitaxial channels and delta doping is presented. The need for enhancing the fluctuation resistance of the sub-0.1-(micron)meter generation transistors is highlighted by presenting summarized results from atomistic simulations of a wide range of conventional devices with uniformly doped channel. According to our atomistic results, the doping concentration dependence of the random dopant-induced threshold voltage fluctuations in conventional devices is stronger than the analytically predicted fourth-root dependence. As a result of this, the scaling of such devices will be restricted by the "intrinsic" random dopant-induced fluctuations earlier than anticipated. Our atomistic simulations confirm that the introduction of a thin epitaxial layer in the MOSFET's channel can efficiently suppress the random dopant-induced threshold voltage fluctuations in sub-0.1-(micron)meter devices. For the first time, we observe an "anomalous" reduction in the threshold voltage fluctuations with an increase in the doping concentration behind the epitaxial channel, which we attribute to screening effects. Also, for the first time we study the effect of a delta-doping, positioned behind the epitaxial layer, on the intrinsic threshold voltage fluctuations. Above a certain thickness of epitaxial layer, we observe a pronounced anomalous decrease in the threshold voltage fluctuation with the increase of the delta doping. This phenomenon, which is also associated with screening, enhances the importance of the delta doping in the design of properly scaled fluctuation-resistant sub-0.1-(micron)meter MOSFET's. Index Terms-Doping, fluctuations, MOSFET, semiconductor device simulation, silicon devices, threshold.

New method of 2-dimensional metrology using mask contouring

NASA Astrophysics Data System (ADS)

Matsuoka, Ryoichi; Yamagata, Yoshikazu; Sugiyama, Akiyuki; Toyoda, Yasutaka

2008-10-01

We have developed a new method of accurately profiling and measuring of a mask shape by utilizing a Mask CD-SEM. The method is intended to realize high accuracy, stability and reproducibility of the Mask CD-SEM adopting an edge detection algorithm as the key technology used in CD-SEM for high accuracy CD measurement. In comparison with a conventional image processing method for contour profiling, this edge detection method is possible to create the profiles with much higher accuracy which is comparable with CD-SEM for semiconductor device CD measurement. This method realizes two-dimensional metrology for refined pattern that had been difficult to measure conventionally by utilizing high precision contour profile. In this report, we will introduce the algorithm in general, the experimental results and the application in practice. As shrinkage of design rule for semiconductor device has further advanced, an aggressive OPC (Optical Proximity Correction) is indispensable in RET (Resolution Enhancement Technology). From the view point of DFM (Design for Manufacturability), a dramatic increase of data processing cost for advanced MDP (Mask Data Preparation) for instance and surge of mask making cost have become a big concern to the device manufacturers. This is to say, demands for quality is becoming strenuous because of enormous quantity of data growth with increasing of refined pattern on photo mask manufacture. In the result, massive amount of simulated error occurs on mask inspection that causes lengthening of mask production and inspection period, cost increasing, and long delivery time. In a sense, it is a trade-off between the high accuracy RET and the mask production cost, while it gives a significant impact on the semiconductor market centered around the mask business. To cope with the problem, we propose the best method of a DFM solution using two-dimensional metrology for refined pattern.

Atomistic characterization of SAM coatings as gate insulators in Si-based FET devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gala, F.; Zollo, G.

2014-06-19

Many nano-material systems are currently under consideration as possible candidates for gate dielectric insulators in both metal-oxide-semiconductor (MOSFET) and organic (OFET) field-effect transistors. In this contribution, the possibility of employing self-assembled monolayers (SAMs) of hydroxylated octadecyltrichlorosilane (OTS) chains on a (111) Si substrate as gate dielectrics is discussed; in particular ab initio theoretical simulations have been employed to study the structural properties, work function modifications, and the insulating properties of OTS thin film coatings on Si substrates.

Atomistic characterization of SAM coatings as gate insulators in Si-based FET devices

NASA Astrophysics Data System (ADS)

Gala, F.; Zollo, G.

2014-06-01

Many nano-material systems are currently under consideration as possible candidates for gate dielectric insulators in both metal-oxide-semiconductor (MOSFET) and organic (OFET) field-effect transistors. In this contribution, the possibility of employing self-assembled monolayers (SAMs) of hydroxylated octadecyltrichlorosilane (OTS) chains on a (111) Si substrate as gate dielectrics is discussed; in particular ab initio theoretical simulations have been employed to study the structural properties, work function modifications, and the insulating properties of OTS thin film coatings on Si substrates.

Theoretical discovery of stable structures of group III-V monolayers: The materials for semiconductor devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Suzuki, Tatsuo, E-mail: dr.tatsuosuzuki@gmail.com

Group III-V compounds are very important as the materials of semiconductor devices. Stable structures of the monolayers of group III-V binary compounds have been discovered by using first-principles calculations. The primitive unit cell of the discovered structures is a rectangle, which includes four group-III atoms and four group-V atoms. A group-III atom and its three nearest-neighbor group-V atoms are placed on the same plane; however, these connections are not the sp{sup 2} hybridization. The bond angles around the group-V atoms are less than the bond angle of sp{sup 3} hybridization. The discovered structure of GaP is an indirect transition semiconductor,more » while the discovered structures of GaAs, InP, and InAs are direct transition semiconductors. Therefore, the discovered structures of these compounds have the potential of the materials for semiconductor devices, for example, water splitting photocatalysts. The discovered structures may become the most stable structures of monolayers which consist of other materials.« less

Electroless silver plating of the surface of organic semiconductors.

PubMed

Campione, Marcello; Parravicini, Matteo; Moret, Massimo; Papagni, Antonio; Schröter, Bernd; Fritz, Torsten

2011-10-04

The integration of nanoscale processes and devices demands fabrication routes involving rapid, cost-effective steps, preferably carried out under ambient conditions. The realization of the metal/organic semiconductor interface is one of the most demanding steps of device fabrication, since it requires mechanical and/or thermal treatments which increment costs and are often harmful in respect to the active layer. Here, we provide a microscopic analysis of a room temperature, electroless process aimed at the deposition of a nanostructured metallic silver layer with controlled coverage atop the surface of single crystals and thin films of organic semiconductors. This process relies on the reaction of aqueous AgF solutions with the nonwettable crystalline surface of donor-type organic semiconductors. It is observed that the formation of a uniform layer of silver nanoparticles can be accomplished within 20 min contact time. The electrical characterization of two-terminal devices performed before and after the aforementioned treatment shows that the metal deposition process is associated with a redox reaction causing the p-doping of the semiconductor. © 2011 American Chemical Society

High efficiency, low cost, thin film silicon solar cell design and method for making

DOEpatents

Sopori, Bhushan L.

2001-01-01

A semiconductor device having a substrate, a conductive intermediate layer deposited onto said substrate, wherein the intermediate layer serves as a back electrode, an optical reflector, and an interface for impurity gettering, and a semiconductor layer deposited onto said intermediate layer, wherein the semiconductor layer has a grain size at least as large as the layer thickness, and preferably about ten times the layer thickness. The device is formed by depositing a metal layer on a substrate, depositing a semiconductive material on the metal-coated substrate to produce a composite structure, and then optically processing the composite structure by illuminating it with infrared electromagnetic radiation according to a unique time-energy profile that first produces pits in the backside surface of the semiconductor material, then produces a thin, highly reflective, low resistivity alloy layer over the entire area of the interface between the semiconductor material and the metal layer, and finally produces a grain-enhanced semiconductor layer. The time-energy profile includes increasing the energy to a first energy level to initiate pit formation and create the desired pit size and density, then ramping up to a second energy level in which the entire device is heated to produce an interfacial melt, and finally reducing the energy to a third energy level and holding for a period of time to allow enhancement in the grain size of the semiconductor layer.

High efficiency low cost thin film silicon solar cell design and method for making

DOEpatents

Sopori, Bhushan L.

1999-01-01

A semiconductor device having a substrate, a conductive intermediate layer deposited onto said substrate, wherein the intermediate layer serves as a back electrode, an optical reflector, and an interface for impurity gettering, and a semiconductor layer deposited onto said intermediate layer, wherein the semiconductor layer has a grain size at least as large as the layer thickness, and preferably about ten times the layer thickness. The device is formed by depositing a metal layer on a substrate, depositing a semiconductive material on the metal-coated substrate to produce a composite structure, and then optically processing the composite structure by illuminating it with infrared electromagnetic radiation according to a unique time-energy profile that first produces pits in the backside surface of the semiconductor material, then produces a thin, highly reflective, low resistivity alloy layer over the entire area of the interface between the semiconductor material and the metal layer, and finally produces a grain-enhanced semiconductor layer. The time-energy profile includes increasing the energy to a first energy level to initiate pit formation and create the desired pit size and density, then ramping up to a second energy level in which the entire device is heated to produce an interfacial melt, and finally reducing the energy to a third energy level and holding for a period of time to allow enhancement in the grain size of the semiconductor layer.

Simulation of MEMS for the Next Generation Space Telescope

NASA Technical Reports Server (NTRS)

Mott, Brent; Kuhn, Jonathan; Broduer, Steve (Technical Monitor)

2001-01-01

The NASA Goddard Space Flight Center (GSFC) is developing optical micro-electromechanical system (MEMS) components for potential application in Next Generation Space Telescope (NGST) science instruments. In this work, we present an overview of the electro-mechanical simulation of three MEMS components for NGST, which include a reflective micro-mirror array and transmissive microshutter array for aperture control for a near infrared (NIR) multi-object spectrometer and a large aperture MEMS Fabry-Perot tunable filter for a NIR wide field camera. In all cases the device must operate at cryogenic temperatures with low power consumption and low, complementary metal oxide semiconductor (CMOS) compatible, voltages. The goal of our simulation efforts is to adequately predict both the performance and the reliability of the devices during ground handling, launch, and operation to prevent failures late in the development process and during flight. This goal requires detailed modeling and validation of complex electro-thermal-mechanical interactions and very large non-linear deformations, often involving surface contact. Various parameters such as spatial dimensions and device response are often difficult to measure reliably at these small scales. In addition, these devices are fabricated from a wide variety of materials including surface micro-machined aluminum, reactive ion etched (RIE) silicon nitride, and deep reactive ion etched (DRIE) bulk single crystal silicon. The above broad set of conditions combine to be a formidable challenge for space flight qualification analysis. These simulations represent NASA/GSFC's first attempts at implementing a comprehensive strategy to address complex MEMS structures.

Graded junction termination extensions for electronic devices

NASA Technical Reports Server (NTRS)

Merrett, J. Neil (Inventor); Isaacs-Smith, Tamara (Inventor); Sheridan, David C. (Inventor); Williams, John R. (Inventor)

2006-01-01

A graded junction termination extension in a silicon carbide (SiC) semiconductor device and method of its fabrication using ion implementation techniques is provided for high power devices. The properties of silicon carbide (SiC) make this wide band gap semiconductor a promising material for high power devices. This potential is demonstrated in various devices such as p-n diodes, Schottky diodes, bipolar junction transistors, thyristors, etc. These devices require adequate and affordable termination techniques to reduce leakage current and increase breakdown voltage in order to maximize power handling capabilities. The graded junction termination extension disclosed is effective, self-aligned, and simplifies the implementation process.

Graded junction termination extensions for electronic devices

NASA Technical Reports Server (NTRS)

Merrett, J. Neil (Inventor); Isaacs-Smith, Tamara (Inventor); Sheridan, David C. (Inventor); Williams, John R. (Inventor)

2007-01-01

A graded junction termination extension in a silicon carbide (SiC) semiconductor device and method of its fabrication using ion implementation techniques is provided for high power devices. The properties of silicon carbide (SiC) make this wide band gap semiconductor a promising material for high power devices. This potential is demonstrated in various devices such as p-n diodes, Schottky diodes, bipolar junction transistors, thyristors, etc. These devices require adequate and affordable termination techniques to reduce leakage current and increase breakdown voltage in order to maximize power handling capabilities. The graded junction termination extension disclosed is effective, self-aligned, and simplifies the implementation process.

Computational modeling and simulation study of electronic and thermal properties in semiconductor nanostructures

NASA Astrophysics Data System (ADS)

Paul, Abhijeet

2011-07-01

The technological progress in dimensional scaling has not only kept Silicon CMOS industry on Moore's law for the past five decades but has also benefited many other areas such as thermoelectricity, photo-voltaics, and energy storage. Extending CMOS beyond Si (More Moore, MM) and adding functional diversity to CMOS (More Than Moore, MTM) requires a thorough understanding of the basic electron and heat flow in semiconductors. Along with experiments computer modeling and simulation are playing an increasingly vital role in exploring the numerous possibilities in materials, devices and systems. With these aspects in mind the present work applies computational physics modeling and simulations to explore the, (i) electronic, (ii) thermal, and (iii) thermoelectric properties in nano-scale semiconductors. The electronic structure of zinc-blende and lead-chalcogenide nano-materials is calculated using an atomistic Tight-Binding model. The phonon dispersion in zinc-blende materials is obtained using the Modified Valence Force Field model. Electronic and thermal transport at the nano-scale is explored using Green's function method and Landauer's method. Thermoelectric properties of semiconductor nanostructures are calculated using Landauer's method. Using computer modeling and simulations the variation of the three physical properties (i-iii) are explored with varying size, transport orientation, shape, porosity, strain and alloying of nanostructures. The key findings are, (a) III-Vs and Ge with optimized strain and orientation can improve transistors' and thermoelectric performance, (b) porous Si nanowires provide a lucrative idea for enhancing the thermoelectric efficiency at room temperature, and (c) Si/Ge superlattice nanowires can be used for nano-scale tuning of lattice thermal conductivity by period control. The present work led to the development of two new interface trap density extraction methods in ultra-scaled FinFETs and correlation of the phonon shifts in Si nanowires to their shape, size and orientation benchmarked against experimental Raman spectroscopy data, thereby enabling nano-scale metrology. Contribution of two research and six educational tools on nanoHUB.org forms an integral part of the work for global dissemination of semiconductor knowledge. Atomic level manipulation holds the key to engineer material properties at the nano-scale. The findings of this work will hopefully open and guide new ways of engineering the electronic and thermal properties for better performance.

Low temperature junction growth using hot-wire chemical vapor deposition

DOEpatents

Wang, Qi; Page, Matthew; Iwaniczko, Eugene; Wang, Tihu; Yan, Yanfa

2014-02-04

A system and a process for forming a semi-conductor device, and solar cells (10) formed thereby. The process includes preparing a substrate (12) for deposition of a junction layer (14); forming the junction layer (14) on the substrate (12) using hot wire chemical vapor deposition; and, finishing the semi-conductor device.

Mechanical scriber for semiconductor devices

DOEpatents

Lin, Peter T.

1985-01-01

A mechanical scriber using a scribing tip, such as a diamond, provides controlled scriber forces with a spring-loaded compound lever arrangement. The scribing force and range of scribing depth are adjusted by a pair of adjustable micrometer heads. A semiconductor device, such as a multilayer solar cell, can be formed into scribed strips at each layer.

Semiconductors: In Situ Processing of Photovoltaic Devices

NASA Technical Reports Server (NTRS)

Curreri, Peter A.

1998-01-01

The possible processing of semiconductor photovoltaic devices is discussed. The requirements for lunar PV cells is reviewed, and the key challenges involved in their manufacturing are investigated. A schematic diagram of a passivated emitter and rear cell (PERC) is presented. The possible fabrication of large photovoltaic arrays in space from lunar materials is also discussed.

Methods to Account for Accelerated Semi-Conductor Device Wearout in Longlife Aerospace Applications

DTIC Science & Technology

2003-01-01

Vasi, “Device scalling effects on hot-carrier induced interface and oxide-trappoing charge distributions in MOSFETs,” IEEE Transactions on Electron...Symposium Proceedings, pp. 248–254, 2002. [104] S. I. A. ( SIA ), “International technology roadmap for semiconductors.” <www.semichips.org>, 1999. 113

Circuit For Current-vs.-Voltage Tests Of Semiconductors

NASA Technical Reports Server (NTRS)

Huston, Steven W.

1991-01-01

Circuit designed for measurement of dc current-versus-voltage characteristics of semiconductor devices. Operates in conjunction with x-y pen plotter or digital storage oscilloscope, which records data. Includes large feedback resistors to prevent high currents damaging device under test. Principal virtues: low cost, simplicity, and compactness. Also used to evaluate diodes and transistors.

Metal-oxide-semiconductor devices using Ga2O3 dielectrics on n-type GaN

NASA Astrophysics Data System (ADS)

Lee, Ching-Ting; Chen, Hong-Wei; Lee, Hsin-Ying

2003-06-01

Using a photoelectrochemical method involving a He-Cd laser, Ga2O3 oxide layers were directly grown on n-type GaN. We demonstrated the performance of the resultant metal-oxide-semiconductor devices based on the grown Ga2O3 layer. An extremely low reverse leakage current of 200 pA was achieved when devices operated at -20 V. Furthermore, high forward and reverse breakdown electric fields of 2.80 MV/cm and 5.70 MV/cm, respectively, were obtained. Using a photoassisted current-voltage method, a low interface state density of 2.53×1011 cm-2 eV-1 was estimated. The varactor devices permit formation of inversion layers, so that they may be applied for the fabrication of metal-oxide-semiconductor field-effect transistors.

Fabrication of optically reflecting ohmic contacts for semiconductor devices

DOEpatents

Sopori, B.L.

1995-07-04

A method is provided to produce a low-resistivity ohmic contact having high optical reflectivity on one side of a semiconductor device. The contact is formed by coating the semiconductor substrate with a thin metal film on the back reflecting side and then optically processing the wafer by illuminating it with electromagnetic radiation of a predetermined wavelength and energy level through the front side of the wafer for a predetermined period of time. This method produces a thin epitaxial alloy layer between the semiconductor substrate and the metal layer when a crystalline substrate is used. The alloy layer provides both a low-resistivity ohmic contact and high optical reflectance. 5 figs.

Quantum simulation of a Fermi-Hubbard model using a semiconductor quantum dot array.

PubMed

Hensgens, T; Fujita, T; Janssen, L; Li, Xiao; Van Diepen, C J; Reichl, C; Wegscheider, W; Das Sarma, S; Vandersypen, L M K

2017-08-02

Interacting fermions on a lattice can develop strong quantum correlations, which are the cause of the classical intractability of many exotic phases of matter. Current efforts are directed towards the control of artificial quantum systems that can be made to emulate the underlying Fermi-Hubbard models. Electrostatically confined conduction-band electrons define interacting quantum coherent spin and charge degrees of freedom that allow all-electrical initialization of low-entropy states and readily adhere to the Fermi-Hubbard Hamiltonian. Until now, however, the substantial electrostatic disorder of the solid state has meant that only a few attempts at emulating Fermi-Hubbard physics on solid-state platforms have been made. Here we show that for gate-defined quantum dots this disorder can be suppressed in a controlled manner. Using a semi-automated and scalable set of experimental tools, we homogeneously and independently set up the electron filling and nearest-neighbour tunnel coupling in a semiconductor quantum dot array so as to simulate a Fermi-Hubbard system. With this set-up, we realize a detailed characterization of the collective Coulomb blockade transition, which is the finite-size analogue of the interaction-driven Mott metal-to-insulator transition. As automation and device fabrication of semiconductor quantum dots continue to improve, the ideas presented here will enable the investigation of the physics of ever more complex many-body states using quantum dots.

Trap densities and transport properties of pentacene metal-oxide-semiconductor transistors: II—Numerical modeling of dc characteristics

NASA Astrophysics Data System (ADS)

Basile, A. F.; Kyndiah, A.; Biscarini, F.; Fraboni, B.

2014-06-01

A numerical procedure to calculate the drain-current (ID) vs. gate-voltage (VG) characteristics from numerical solutions of the Poisson equation for organic Thin-Film Transistors (TFTs) is presented. Polaron transport is modeled as two-dimensional charge transport in a semiconductor having free-carrier density of states proportional to the density of molecules and traps with energy equal to the polaron-hopping barrier. The simulated ID-VG curves are proportional to the product of the density of free carriers, calculated as a function of VG, and the intrinsic mobility, assumed to be a constant independent of temperature. The presence of traps in the oxide was also taken into account in the model, which was applied to a TFT made with six monolayers of pentacene grown on an oxide substrate. The polaron-hopping barrier determines the temperature dependence of the simulated ID-VG curves, trapping in the oxide is responsible for current reduction at high bias and the slope of the characteristics near threshold is related to the metal-semiconductor work-function difference. The values of the model parameters yielding the best match between calculations and experiments are consistent with previous experimental results and theoretical predictions. Therefore, this model enables to extract both physical and technological properties of thin-film devices from the temperature-dependent dc characteristics.

Theory and Simulation of Self- and Mutual-Diffusion of Carrier Density and Temperature in Semiconductor Lasers

NASA Technical Reports Server (NTRS)

Li, Jian-Zhong; Cheung, Samson H.; Ning, C. Z.

2001-01-01

Carrier diffusion and thermal conduction play a fundamental role in the operation of high-power, broad-area semiconductor lasers. Restricted geometry, high pumping level and dynamic instability lead to inhomogeneous spatial distribution of plasma density, temperature, as well as light field, due to strong light-matter interaction. Thus, modeling and simulation of such optoelectronic devices rely on detailed descriptions of carrier dynamics and energy transport in the system. A self-consistent description of lasing and heating in large-aperture, inhomogeneous edge- or surface-emitting lasers (VCSELs) require coupled diffusion equations for carrier density and temperature. In this paper, we derive such equations from the Boltzmann transport equation for the carrier distributions. The derived self- and mutual-diffusion coefficients are in general nonlinear functions of carrier density and temperature including many-body interactions. We study the effects of many-body interactions on these coefficients, as well as the nonlinearity of these coefficients for large-area VCSELs. The effects of mutual diffusions on carrier and temperature distributions in gain-guided VCSELs will be also presented.

Photonic Switching Devices Using Light Bullets

NASA Technical Reports Server (NTRS)

Goorjian, Peter M. (Inventor)

1999-01-01

A unique ultra-fast, all-optical switching device or switch is made with readily available, relatively inexpensive, highly nonlinear optical materials. which includes highly nonlinear optical glasses, semiconductor crystals and/or multiple quantum well semiconductor materials. At the specified wavelengths. these optical materials have a sufficiently negative group velocity dispersion and high nonlinear index of refraction to support stable light bullets. The light bullets counter-propagate through, and interact within the waveguide to selectively change each others' directions of propagation into predetermined channels. In one embodiment, the switch utilizes a rectangularly planar slab waveguide. and further includes two central channels and a plurality of lateral channels for guiding the light bullets into and out of the waveguide. An advantage of the present all-optical switching device lies in its practical use of light bullets, thus preventing the degeneration of the pulses due to dispersion and diffraction at the front and back of the pulses. Another advantage of the switching device is the relative insensitivity of the collision process to the time difference in which the counter-propagating pulses enter the waveguide. since. contrary to conventional co-propagating spatial solitons, the relative phase of the colliding pulses does not affect the interaction of these pulses. Yet another feature of the present all-optical switching device is the selection of the light pulse parameters which enables the generation of light bullets in nonlinear optical materials. including highly nonlinear optical glasses and semiconductor materials such as semiconductor crystals and/or multiple quantum well semiconductor materials.

Dark current suppression of MgZnO metal-semiconductor-metal solar-blind ultraviolet photodetector by asymmetric electrode structures.

PubMed

Wang, Ping; Zheng, Qinghong; Tang, Qing; Yang, Yintang; Guo, Lixin; Huang, Feng; Song, Zhenjie; Zhang, Zhiyong

2014-01-15

The application of asymmetric Schottky barrier and electrode area in an MgZnO metal-semiconductor-metal (MSM) solar-blind ultraviolet photodetector has been investigated by a physical-based numerical model in which the electron mobility is obtained by an ensemble Monte Carlo simulation combined with first principle calculations using the density functional theory. Compared with the experimental data of symmetric and asymmetric MSM structures based on ZnO substrate, the validity of this model is verified. The asymmetric Schottky barrier and electrode area devices exhibit reductions of 20 times and 1.3 times on dark current, respectively, without apparent photocurrent scarification. The plots of photo-to-dark current ratio (PDR) indicate that the asymmetric MgZnO MSM structure has better dark current characteristic than that of the symmetric one.

One- and two-dimensional dopant/carrier profiling for ULSI

NASA Astrophysics Data System (ADS)

Vandervorst, W.; Clarysse, T.; De Wolf, P.; Trenkler, T.; Hantschel, T.; Stephenson, R.; Janssens, T.

1998-11-01

Dopant/carrier profiles constitute the basis of the operation of a semiconductor device and thus play a decisive role in the performance of a transistor and are subjected to the same scaling laws as the other constituents of a modern semiconductor device and continuously evolve towards shallower and more complex configurations. This evolution has increased the demands on the profiling techniques in particular in terms of resolution and quantification such that a constant reevaluation and improvement of the tools is required. As no single technique provides all the necessary information (dopant distribution, electrical activation,..) with the requested spatial and depth resolution, the present paper attempts to provide an assessment of those tools which can be considered as the main metrology technologies for ULSI-applications. For 1D-dopant profiling secondary ion mass spectrometry (SIMS) has progressed towards a generally accepted tool meeting the requirements. For 1D-carrier profiling spreading resistance profiling and microwave surface impedance profiling are envisaged as the best choices but extra developments are required to promote them to routinely applicable methods. As no main metrology tool exist for 2D-dopant profiling, main emphasis is on 2D-carrier profiling tools based on scanning probe microscopy. Scanning spreading resistance (SSRM) and scanning capacitance microscopy (SCM) are the preferred methods although neither of them already meets all the requirements. Complementary information can be extracted from Nanopotentiometry which samples the device operation in more detail. Concurrent use of carrier profiling tools, Nanopotentiometry, analysis of device characteristics and simulations is required to provide a complete characterization of deep submicron devices.

Modeling of Nano-Scale Transistors and Memory Devices for Low Power Applications

NASA Astrophysics Data System (ADS)

Cao, Xi

As the featuring size of transistors scaled down to sub-20 nm, the continuous scaling of power has become one of the main challenges of the semiconductor industry. The power issue is raised by the barely scalable supply voltage and a limitation on the subthreshold swing (SS) of conventional metal-oxide-semiconductor field-effect transistor (MOSFET). In this work, self-consistent quantum transport device simulators are developed to examine the nanoscale transistors based on black phosphorus (BP) materials. The scaling limit of double-gated BP MOSFETs is assessed. To reduce the SS below the thermionic limit for ultra-steep switching, tunnel FETs (TFETs) and vertical ballistic impact ionization FETs based on BP and its heterojunctions are investigated. Furthermore, the ferroelectric tunneling junction (FTJ) is modeled and examined for potential low power memory applications. For BP MOSFETs, the device physics at the ultimate scaling limit are examined. The performance of monolayer BP MOSFETs is projected to sub-10 nm and compared with the International Technology Roadmap for Semiconductors (ITRS) requirements. And the interplay of quantum mechanical effects and the highly anisotropic bandstructure of BP at this scale is investigated. By choice of layer number and crystalline direction, BP materials can offer a range of bandgap and effective mass values, which is attractive for TFET applications. Therefore, scaling behaviors of BP TFETs near and below the 10 nm scale are studied. The gate oxide thickness scaling and the effect of high-k dielectric are compared between the TFETs and the MOSFETs. For the TFETs with the gate lengths beyond 10 nm and at the sub-10 nm scale, the direct-source-to-drain tunneling issues are evaluated, and different strategies to achieve ultra-steep switching are specified. In a sub-10 nm graphene-BP-graphene heterojunction transistor, the sharp turnon behavior was observed, under a small source-drain bias of 0.1 V. The fast switch is attributed to a ballistic energy-dependent impact ionization mechanism. A device model is developed, which shows agreement with experiment results. The model is applied to explore the gate oxide scaling behavior and the effect of graphene doping, and to optimize the device for low power applications. Finally, to keep the integrity of the computing system, the FTJ is studied for its possible use as a low power memory device. A compact model for FTJ, dealing with both static and dynamic behaviors, is developed and compared with experimental data. The write energy consumed by the memory cell, comprising one transistor and one FTJ, is estimated by applying the compact model to circuit simulation. And a way to reduce the write energy is suggested.

Radiation-hardened MRAM-based LUT for non-volatile FPGA soft error mitigation with multi-node upset tolerance

NASA Astrophysics Data System (ADS)

Zand, Ramtin; DeMara, Ronald F.

2017-12-01

In this paper, we have developed a radiation-hardened non-volatile lookup table (LUT) circuit utilizing spin Hall effect (SHE)-magnetic random access memory (MRAM) devices. The design is motivated by modeling the effect of radiation particles striking hybrid complementary metal oxide semiconductor/spin based circuits, and the resistive behavior of SHE-MRAM devices via established and precise physics equations. The models developed are leveraged in the SPICE circuit simulator to verify the functionality of the proposed design. The proposed hardening technique is based on using feedback transistors, as well as increasing the radiation capacity of the sensitive nodes. Simulation results show that our proposed LUT circuit can achieve multiple node upset (MNU) tolerance with more than 38% and 60% power-delay product improvement as well as 26% and 50% reduction in device count compared to the previous energy-efficient radiation-hardened LUT designs. Finally, we have performed a process variation analysis showing that the MNU immunity of our proposed circuit is realized at the cost of increased susceptibility to transistor and MRAM variations compared to an unprotected LUT design.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

University of Illinois

2009-04-21

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A [Champaign, IL; Khang, Dahl-Young [Seoul, KR; Sun, Yugang [Naperville, IL; Menard, Etienne [Durham, NC

2012-06-12

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A.; Khang, Dahl-Young; Sun, Yugang; Menard, Etienne

2014-06-17

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A.; Khang, Dahl-Young; Sun, Yugang; Menard, Etienne

2016-12-06

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

DOEpatents

Rogers, John A.; Khang, Dahl -Young; Sun, Yugang; Menard, Etienne

2015-08-11

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Dry etching method for compound semiconductors

DOEpatents

Shul, Randy J.; Constantine, Christopher

1997-01-01

A dry etching method. According to the present invention, a gaseous plasma comprising, at least in part, boron trichloride, methane, and hydrogen may be used for dry etching of a compound semiconductor material containing layers including aluminum, or indium, or both. Material layers of a compound semiconductor alloy such as AlGaInP or the like may be anisotropically etched for forming electronic devices including field-effect transistors and heterojunction bipolar transistors and for forming photonic devices including vertical-cavity surface-emitting lasers, edge-emitting lasers, and reflectance modulators.

Dry etching method for compound semiconductors

DOEpatents

Shul, R.J.; Constantine, C.

1997-04-29

A dry etching method is disclosed. According to the present invention, a gaseous plasma comprising, at least in part, boron trichloride, methane, and hydrogen may be used for dry etching of a compound semiconductor material containing layers including aluminum, or indium, or both. Material layers of a compound semiconductor alloy such as AlGaInP or the like may be anisotropically etched for forming electronic devices including field-effect transistors and heterojunction bipolar transistors and for forming photonic devices including vertical-cavity surface-emitting lasers, edge-emitting lasers, and reflectance modulators. 1 fig.

Mechanical Properties of Organic Semiconductors for Stretchable, Highly Flexible, and Mechanically Robust Electronics.

PubMed

Root, Samuel E; Savagatrup, Suchol; Printz, Adam D; Rodriquez, Daniel; Lipomi, Darren J

2017-05-10

Mechanical deformability underpins many of the advantages of organic semiconductors. The mechanical properties of these materials are, however, diverse, and the molecular characteristics that permit charge transport can render the materials stiff and brittle. This review is a comprehensive description of the molecular and morphological parameters that govern the mechanical properties of organic semiconductors. Particular attention is paid to ways in which mechanical deformability and electronic performance can coexist. The review begins with a discussion of flexible and stretchable devices of all types, and in particular the unique characteristics of organic semiconductors. It then discusses the mechanical properties most relevant to deformable devices. In particular, it describes how low modulus, good adhesion, and absolute extensibility prior to fracture enable robust performance, along with mechanical "imperceptibility" if worn on the skin. A description of techniques of metrology precedes a discussion of the mechanical properties of three classes of organic semiconductors: π-conjugated polymers, small molecules, and composites. The discussion of each class of materials focuses on molecular structure and how this structure (and postdeposition processing) influences the solid-state packing structure and thus the mechanical properties. The review concludes with applications of organic semiconductor devices in which every component is intrinsically stretchable or highly flexible.

Electron optics with ballistic graphene junctions

NASA Astrophysics Data System (ADS)

Chen, Shaowen

Electrons transmitted across a ballistic semiconductor junction undergo refraction, analogous to light rays across an optical boundary. A pn junction theoretically provides the equivalent of a negative index medium, enabling novel electron optics such as negative refraction and perfect (Veselago) lensing. In graphene, the linear dispersion and zero-gap bandstructure admit highly transparent pn junctions by simple electrostatic gating, which cannot be achieved in conventional semiconductors. Robust demonstration of these effects, however, has not been forthcoming. Here we employ transverse magnetic focusing to probe propagation across an electrostatically defined graphene junction. We find perfect agreement with the predicted Snell's law for electrons, including observation of both positive and negative refraction. Resonant transmission across the pn junction provides a direct measurement of the angle dependent transmission coefficient, and we demonstrate good agreement with theory. Comparing experimental data with simulation reveals the crucial role played by the effective junction width, providing guidance for future device design. Efforts toward sharper pn junction and possibility of zero field Veselago lensing will also be discussed. This work is supported by the Semiconductor Research Corporations NRI Center for Institute for Nanoelectronics Discovery and Exploration (INDEX).

Electronic properties of defects in silicon and related materials

NASA Astrophysics Data System (ADS)

Mitromara, Niki

Efforts in the current semiconductor industry are focused on the production of smaller, more efficient and inexpensive devices of higher packing density. As silicon is the dominant semiconductor implemented for the fabrication of the majority of semiconductor devices, perpetual research has focused on the improvement of its properties and the realisation of the most efficient structures. This thesis presents the electrical characterisation of two different diode structures that are important for the present and future generations of electronic devices.The first part of the thesis is focused on the electrical characterisation of Ultra-Shallow Junction (USJs) Si diodes. Both p+n and n+p USJ structures that contained different implants were examined. These were very highly doped and intended to simulate the situation where a doping well is formed after heavy doping in Si for the fabrication of transistors currently used in Complementary-Metal-Oxide-Semiconductor (CMOS) technology. The implanted USJ diodes were provided by NXP, Belgium and contact deposition was performed before their electrical characterisation as part of this project. Subsequently the p+n and n+p USJ diodes were characterised by the use of Capacitance-Voltage (CV), Current-Voltage (IV), Deep Level Transient Spectroscopy (DLTS) and high resolution Laplace DLTS (LDLTS). DLTS and LDLTS are very powerful spectroscopic techniques for the profiling of defects in the bandgap of a semiconductor as well as for the identification of the electrical signatures of these defects. Transient-Enhanced Diffusion (TED) related defects were detected in these diodes as the presence of mainly carbon-related interstitial complexes was observed. In addition, certain vacancy or vacancy-dopant related levels were also discerned.The second part of this thesis presents the electrical characterisation from Schottky p-diamond/p-Si and p-diamond/n-Si p-n diodes. These diodes were readily provided, grown by the Chemical Vapour Deposition (CVD) technique, for the electrical characterisation that was performed as part of this project. The purpose of characterising both Schottky and p-n diamond on Si diodes was to detect defects near the surface of the films and near the interface with Si and hence provide a comparison between defects present at the beginning and end of growth. More defects were found near the interface with Si and the majority of observed defects were related to extended defects while the presence of grain boundaries in polycrystalline diamond was discussed.

Method for sputtering a PIN amorphous silicon semi-conductor device having partially crystallized P and N-layers

DOEpatents

Moustakas, Theodore D.; Maruska, H. Paul

1985-07-09

A high efficiency amorphous silicon PIN semiconductor device having partially crystallized (microcrystalline) P and N layers is constructed by the sequential sputtering of N, I and P layers and at least one semi-transparent ohmic electrode. The method of construction produces a PIN device, exhibiting enhanced electrical and optical properties, improved physical integrity, and facilitates the preparation in a singular vacuum system and vacuum pump down procedure.

Semiconductor superlattice photodetectors

NASA Technical Reports Server (NTRS)

Chuang, S. L.; Hess, K.; Coleman, J. J.; Leburton, J. P.

1984-01-01

A superlattice photomultiplier and a photodetector based on the real space transfer mechanism were studied. The wavelength for the first device is of the order of a micron or flexible corresponding to the bandgap absorption in a semiconductor. The wavelength for the second device is in the micron range (about 2 to 12 microns) corresponding to the energy of the conduction band edge discontinuity between an Al/(sub x)Ga(sub 1-x)As and GaAs interface. Both devices are described.

Development of a Handmade Conductivity Measurement Device for a Thin-Film Semiconductor and Its Application to Polypyrrole

ERIC Educational Resources Information Center

Seng, Set; Shinpei, Tomita; Yoshihiko, Inada; Masakazu, Kita

2014-01-01

The precise measurement of conductivity of a semiconductor film such as polypyrrole (Ppy) should be carried out by the four-point probe method; however, this is difficult for classroom application. This article describes the development of a new, convenient, handmade conductivity device from inexpensive materials that can measure the conductivity…

Color selective photodetector and methods of making

DOEpatents

Walker, Brian J.; Dorn, August; Bulovic, Vladimir; Bawendi, Moungi G.

2013-03-19

A photoelectric device, such as a photodetector, can include a semiconductor nanowire electrostatically associated with a J-aggregate. The J-aggregate can facilitate absorption of a desired wavelength of light, and the semiconductor nanowire can facilitate charge transport. The color of light detected by the device can be chosen by selecting a J-aggregate with a corresponding peak absorption wavelength.

Method for sputtering a PIN microcrystalline/amorphous silicon semiconductor device with the P and N-layers sputtered from boron and phosphorous heavily doped targets

DOEpatents

Moustakas, Theodore D.; Maruska, H. Paul

1985-04-02

A silicon PIN microcrystalline/amorphous silicon semiconductor device is constructed by the sputtering of N, and P layers of silicon from silicon doped targets and the I layer from an undoped target, and at least one semi-transparent ohmic electrode.

Mechanical scriber for semiconductor devices

DOEpatents

Lin, P.T.

1985-03-05

A mechanical scriber using a scribing tip, such as a diamond, provides controlled scriber forces with a spring-loaded compound lever arrangement. The scribing force and range of scribing depth are adjusted by a pair of adjustable micrometer heads. A semiconductor device, such as a multilayer solar cell, can be formed into scribed strips at each layer. 5 figs.

JESD57 Test Standard, Procedures for the Measurement of Single-Event Effects in Semiconductor Devices from Heavy-Ion Irradiation Revision Update

NASA Technical Reports Server (NTRS)

Lauenstein, Jean-Marie

2016-01-01

The JEDEC JESD57 test standard, Procedures for the Measurement of Single-Event Effects in Semiconductor Devices from Heavy-Ion Irradiation, is undergoing its first revision since 1996. This presentation will provide an overview of some of the key proposed updates to the document.

Multilevel metallization method for fabricating a metal oxide semiconductor device

NASA Technical Reports Server (NTRS)

Hollis, B. R., Jr.; Feltner, W. R.; Bouldin, D. L.; Routh, D. E. (Inventor)

1978-01-01

An improved method is described of constructing a metal oxide semiconductor device having multiple layers of metal deposited by dc magnetron sputtering at low dc voltages and low substrate temperatures. The method provides multilevel interconnections and cross over between individual circuit elements in integrated circuits without significantly reducing the reliability or seriously affecting the yield.

Monolayer graphene-insulator-semiconductor emitter for large-area electron lithography

NASA Astrophysics Data System (ADS)

Kirley, Matthew P.; Aloui, Tanouir; Glass, Jeffrey T.

2017-06-01

The rapid adoption of nanotechnology in fields as varied as semiconductors, energy, and medicine requires the continual improvement of nanopatterning tools. Lithography is central to this evolving nanotechnology landscape, but current production systems are subject to high costs, low throughput, or low resolution. Herein, we present a solution to these problems with the use of monolayer graphene in a graphene-insulator-semiconductor (GIS) electron emitter device for large-area electron lithography. Our GIS device displayed high emission efficiency (up to 13%) and transferred large patterns (500 × 500 μm) with high fidelity (<50% spread). The performance of our device demonstrates a feasible path to dramatic improvements in lithographic patterning systems, enabling continued progress in existing industries and opening opportunities in nanomanufacturing.

Recent progress in high-mobility thin-film transistors based on multilayer 2D materials

NASA Astrophysics Data System (ADS)

Hong, Young Ki; Liu, Na; Yin, Demin; Hong, Seongin; Kim, Dong Hak; Kim, Sunkook; Choi, Woong; Yoon, Youngki

2017-04-01

Two-dimensional (2D) layered semiconductors are emerging as promising candidates for next-generation thin-film electronics because of their high mobility, relatively large bandgap, low-power switching, and the availability of large-area growth methods. Thin-film transistors (TFTs) based on multilayer transition metal dichalcogenides or black phosphorus offer unique opportunities for next-generation electronic and optoelectronic devices. Here, we review recent progress in high-mobility transistors based on multilayer 2D semiconductors. We describe the theoretical background on characterizing methods of TFT performance and material properties, followed by their applications in flexible, transparent, and optoelectronic devices. Finally, we highlight some of the methods used in metal-semiconductor contacts, hybrid structures, heterostructures, and chemical doping to improve device performance.

Thermally robust semiconductor optical amplifiers and laser diodes

DOEpatents

Dijaili, Sol P.; Patterson, Frank G.; Walker, Jeffrey D.; Deri, Robert J.; Petersen, Holly; Goward, William

2002-01-01

A highly heat conductive layer is combined with or placed in the vicinity of the optical waveguide region of active semiconductor components. The thermally conductive layer enhances the conduction of heat away from the active region, which is where the heat is generated in active semiconductor components. This layer is placed so close to the optical region that it must also function as a waveguide and causes the active region to be nearly the same temperature as the ambient or heat sink. However, the semiconductor material itself should be as temperature insensitive as possible and therefore the invention combines a highly thermally conductive dielectric layer with improved semiconductor materials to achieve an overall package that offers improved thermal performance. The highly thermally conductive layer serves two basic functions. First, it provides a lower index material than the semiconductor device so that certain kinds of optical waveguides may be formed, e.g., a ridge waveguide. The second and most important function, as it relates to this invention, is that it provides a significantly higher thermal conductivity than the semiconductor material, which is the principal material in the fabrication of various optoelectronic devices.

Effect of Pentacene-dielectric Affinity on Pentacene Thin Film Growth Morphology in Organic Field-effect Transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

S Kim; M Jang; H Yang

2011-12-31

Organic field-effect transistors (OFETs) are fabricated by depositing a thin film of semiconductor on the functionalized surface of a SiO{sub 2} dielectric. The chemical and morphological structures of the interface between the semiconductor and the functionalized dielectric are critical for OFET performance. We have characterized the effect of the affinity between semiconductor and functionalized dielectric on the properties of the semiconductor-dielectric interface. The crystalline microstructure/nanostructure of the pentacene semiconductor layers, grown on a dielectric substrate that had been functionalized with either poly(4-vinyl pyridine) or polystyrene (to control hydrophobicity), and grown under a series of substrate temperatures and deposition rates, weremore » characterized by X-ray diffraction, photoemission spectroscopy, and atomic force microscopy. By comparing the morphological features of the semiconductor thin films with the device characteristics (field-effect mobility, threshold voltage, and hysteresis) of the OFET devices, the effect of affinity-driven properties on charge modulation, charge trapping, and charge carrier transport could be described.« less

Electronic-carrier-controlled photochemical etching process in semiconductor device fabrication

DOEpatents

Ashby, C.I.H.; Myers, D.R.; Vook, F.L.

1988-06-16

An electronic-carrier-controlled photochemical etching process for carrying out patterning and selective removing of material in semiconductor device fabrication includes the steps of selective ion implanting, photochemical dry etching, and thermal annealing, in that order. In the selective ion implanting step, regions of the semiconductor material in a desired pattern are damaged and the remainder of the regions of the material not implanted are left undamaged. The rate of recombination of electrons and holes is increased in the damaged regions of the pattern compared to undamaged regions. In the photochemical dry etching step which follows ion implanting step, the material in the undamaged regions of the semiconductor are removed substantially faster than in the damaged regions representing the pattern, leaving the ion-implanted, damaged regions as raised surface structures on the semiconductor material. After completion of photochemical dry etching step, the thermal annealing step is used to restore the electrical conductivity of the damaged regions of the semiconductor material.

Electronic-carrier-controlled photochemical etching process in semiconductor device fabrication

DOEpatents

Ashby, Carol I. H.; Myers, David R.; Vook, Frederick L.

1989-01-01

An electronic-carrier-controlled photochemical etching process for carrying out patterning and selective removing of material in semiconductor device fabrication includes the steps of selective ion implanting, photochemical dry etching, and thermal annealing, in that order. In the selective ion implanting step, regions of the semiconductor material in a desired pattern are damaged and the remainder of the regions of the material not implanted are left undamaged. The rate of recombination of electrons and holes is increased in the damaged regions of the pattern compared to undamaged regions. In the photochemical dry etching step which follows ion implanting step, the material in the undamaged regions of the semiconductor are removed substantially faster than in the damaged regions representing the pattern, leaving the ion-implanted, damaged regions as raised surface structures on the semiconductor material. After completion of photochemical dry etching step, the thermal annealing step is used to restore the electrical conductivity of the damaged regions of the semiconductor material.

A stable solution-processed polymer semiconductor with record high-mobility for printed transistors

PubMed Central

Li, Jun; Zhao, Yan; Tan, Huei Shuan; Guo, Yunlong; Di, Chong-An; Yu, Gui; Liu, Yunqi; Lin, Ming; Lim, Suo Hon; Zhou, Yuhua; Su, Haibin; Ong, Beng S.

2012-01-01

Microelectronic circuits/arrays produced via high-speed printing instead of traditional photolithographic processes offer an appealing approach to creating the long-sought after, low-cost, large-area flexible electronics. Foremost among critical enablers to propel this paradigm shift in manufacturing is a stable, solution-processable, high-performance semiconductor for printing functionally capable thin-film transistors — fundamental building blocks of microelectronics. We report herein the processing and optimisation of solution-processable polymer semiconductors for thin-film transistors, demonstrating very high field-effect mobility, high on/off ratio, and excellent shelf-life and operating stabilities under ambient conditions. Exceptionally high-gain inverters and functional ring oscillator devices on flexible substrates have been demonstrated. This optimised polymer semiconductor represents a significant progress in semiconductor development, dispelling prevalent skepticism surrounding practical usability of organic semiconductors for high-performance microelectronic devices, opening up application opportunities hitherto functionally or economically inaccessible with silicon technologies, and providing an excellent structural framework for fundamental studies of charge transport in organic systems. PMID:23082244

Proton Nonionizing Energy Loss (NIEL) for Device Applications

NASA Technical Reports Server (NTRS)

Jun, Insoo; Xapsos, Michael A.; Messenger, Scott R.; Burke, Edward A.; Walters, Robert J.; Summers, Geoff; Jordan, Thomas

2003-01-01

Nonionizing energy loss (NIEL) is a quantity that describes the rate of energy loss due to atomic displacements as a particle traverses a material. The product of the NIEL and the particle fluence (time integrated flux) gives the displacement damage energy deposition per unit mass of material. NIEL plays the same role to the displacement damage energy deposition as the stopping power to the total ionizing dose (TID). The concept of NIEL has been very useful for correlating particle induced displacement damage effects in semiconductor and optical devices. Many studies have successfully demonstrated that the degradation of semiconductor devices or optical sensors in a radiation field can be linearly correlated to the displacement damage energy, and subsequently to the NIEL deposited in the semiconductor devices or optical sensors. In addition, the NIEL concept was also useful in the study of both Si and GaAs solar cells and of high temperature superconductors, and at predicting the survivability of detectors used at the LHC at CERN. On the other hand, there are some instances where discrepancies are observed in the application of NIEL, most notably in GaAs semiconductor devices. However, NIEL is still a valuable tool, and can be used to scale damages produced by different particles and in different environments, even though this is not understood at the microscopic level.

Gate tunneling current and quantum capacitance in metal-oxide-semiconductor devices with graphene gate electrodes

NASA Astrophysics Data System (ADS)

An, Yanbin; Shekhawat, Aniruddh; Behnam, Ashkan; Pop, Eric; Ural, Ant

2016-11-01

Metal-oxide-semiconductor (MOS) devices with graphene as the metal gate electrode, silicon dioxide with thicknesses ranging from 5 to 20 nm as the dielectric, and p-type silicon as the semiconductor are fabricated and characterized. It is found that Fowler-Nordheim (F-N) tunneling dominates the gate tunneling current in these devices for oxide thicknesses of 10 nm and larger, whereas for devices with 5 nm oxide, direct tunneling starts to play a role in determining the total gate current. Furthermore, the temperature dependences of the F-N tunneling current for the 10 nm devices are characterized in the temperature range 77-300 K. The F-N coefficients and the effective tunneling barrier height are extracted as a function of temperature. It is found that the effective barrier height decreases with increasing temperature, which is in agreement with the results previously reported for conventional MOS devices with polysilicon or metal gate electrodes. In addition, high frequency capacitance-voltage measurements of these MOS devices are performed, which depict a local capacitance minimum under accumulation for thin oxides. By analyzing the data using numerical calculations based on the modified density of states of graphene in the presence of charged impurities, it is shown that this local minimum is due to the contribution of the quantum capacitance of graphene. Finally, the workfunction of the graphene gate electrode is extracted by determining the flat-band voltage as a function of oxide thickness. These results show that graphene is a promising candidate as the gate electrode in metal-oxide-semiconductor devices.

Excitons and the lifetime of organic semiconductor devices.

PubMed

Forrest, Stephen R

2015-06-28

While excitons are responsible for the many beneficial optical properties of organic semiconductors, their non-radiative recombination within the material can result in material degradation due to the dumping of energy onto localized molecular bonds. This presents a challenge in developing strategies to exploit the benefits of excitons without negatively impacting the device operational stability. Here, we will briefly review the fundamental mechanisms leading to excitonic energy-driven device ageing in two example devices: blue emitting electrophosphorescent organic light emitting devices (PHOLEDs) and organic photovoltaic (OPV) cells. We describe strategies used to minimize or even eliminate this fundamental device degradation pathway. © 2015 The Author(s) Published by the Royal Society. All rights reserved.

Advanced Numerical Methods and Software Approaches for Semiconductor Device Simulation

DOE PAGES

Carey, Graham F.; Pardhanani, A. L.; Bova, S. W.

2000-01-01

In this article we concisely present several modern strategies that are applicable to driftdominated carrier transport in higher-order deterministic models such as the driftdiffusion, hydrodynamic, and quantum hydrodynamic systems. The approaches include extensions of “upwind” and artificial dissipation schemes, generalization of the traditional Scharfetter – Gummel approach, Petrov – Galerkin and streamline-upwind Petrov Galerkin (SUPG), “entropy” variables, transformations, least-squares mixed methods and other stabilized Galerkin schemes such as Galerkin least squares and discontinuous Galerkin schemes. The treatment is representative rather than an exhaustive review and several schemes are mentioned only briefly with appropriate reference to the literature. Some of themore » methods have been applied to the semiconductor device problem while others are still in the early stages of development for this class of applications. We have included numerical examples from our recent research tests with some of the methods. A second aspect of the work deals with algorithms that employ unstructured grids in conjunction with adaptive refinement strategies. The full benefits of such approaches have not yet been developed in this application area and we emphasize the need for further work on analysis, data structures and software to support adaptivity. Finally, we briefly consider some aspects of software frameworks. These include dial-an-operator approaches such as that used in the industrial simulator PROPHET, and object-oriented software support such as those in the SANDIA National Laboratory framework SIERRA.« less

Resonant Tunneling Spin Pump

NASA Technical Reports Server (NTRS)

Ting, David Z.

2007-01-01

The resonant tunneling spin pump is a proposed semiconductor device that would generate spin-polarized electron currents. The resonant tunneling spin pump would be a purely electrical device in the sense that it would not contain any magnetic material and would not rely on an applied magnetic field. Also, unlike prior sources of spin-polarized electron currents, the proposed device would not depend on a source of circularly polarized light. The proposed semiconductor electron-spin filters would exploit the Rashba effect, which can induce energy splitting in what would otherwise be degenerate quantum states, caused by a spin-orbit interaction in conjunction with a structural-inversion asymmetry in the presence of interfacial electric fields in a semiconductor heterostructure. The magnitude of the energy split is proportional to the electron wave number. Theoretical studies have suggested the possibility of devices in which electron energy states would be split by the Rashba effect and spin-polarized currents would be extracted by resonant quantum-mechanical tunneling.

Carrier transport and collection in fully depleted semiconductors by a combined action of the space charge field and the field due to electrode voltages

DOEpatents

Rehak, P.; Gatti, E.

1984-02-24

A semiconductor charge transport device and method for making same, characterized by providing a thin semiconductor wafer having rectifying functions on its opposing major surfaces and including a small capacitance ohmic contact, in combination with bias voltage means and associated circuit means for applying a predetermined voltage to effectively deplete the wafer in regions thereof between the rectifying junctions and the ohmic contact. A charge transport device of the invention is usable as a drift chamber, a low capacitance detector, or a charge coupled device each constructed according to the methods of the invention for making such devices. Detectors constructed according to the principles of the invention are characterized by having significantly higher particle position indicating resolution than is attainable with prior art detectors, while at the same time requiring substantially fewer readout channels to realize such high resolution.

Carrier transport and collection in fully depleted semiconductors by a combined action of the space charge field and the field due to electrode voltages

DOEpatents

Rehak, Pavel; Gatti, Emilio

1987-01-01

A semiconductor charge transport device and method for making same, characterized by providing a thin semiconductor wafer having rectifying junctions on its opposing major surfaces and including a small capacitance ohmic contact, in combination with bias voltage means and associated circuit means for applying a predetermined voltage to effectively deplete the wafer in regions thereof between the rectifying junctions and the ohmic contact. A charge transport device of the invention is usable as a drift chamber, a low capacitance detector, or a charge coupled device each constructed according to the methods of the invention for making such devices. Detectors constructed according to the principles of the invention are characterized by having significantly higher particle position indicating resolution than is attainable with prior art detectors, while at the same time requiring substantially fewer readout channels to realize such high resolution.

Carrier transport and collection in fully depleted semiconductors by a combined action of the space charge field and the field due to electrode voltages

DOEpatents

Rehak, P.; Gatti, E.

1987-08-18

A semiconductor charge transport device and method for making same are disclosed, characterized by providing a thin semiconductor wafer having rectifying junctions on its opposing major surfaces and including a small capacitance ohmic contact, in combination with bias voltage means and associated circuit means for applying a predetermined voltage to effectively deplete the wafer in regions thereof between the rectifying junctions and the ohmic contact. A charge transport device of the invention is usable as a drift chamber, a low capacitance detector, or a charge coupled device each constructed according to the methods of the invention for making such devices. Detectors constructed according to the principles of the invention are characterized by having significantly higher particle position indicating resolution than is attainable with prior art detectors, while at the same time requiring substantially fewer readout channels to realize such high resolution. 16 figs.

High Performance Molybdenum Disulfide Amorphous Silicon Heterojunction Photodetector

PubMed Central

Esmaeili-Rad, Mohammad R.; Salahuddin, Sayeef

2013-01-01

One important use of layered semiconductors such as molybdenum disulfide (MoS2) could be in making novel heterojunction devices leading to functionalities unachievable using conventional semiconductors. Here we demonstrate a metal-semiconductor-metal heterojunction photodetector, made of MoS2 and amorphous silicon (a-Si), with rise and fall times of about 0.3 ms. The transient response does not show persistent (residual) photoconductivity, unlike conventional a-Si devices where it may last 3–5 ms, thus making this heterojunction roughly 10X faster. A photoresponsivity of 210 mA/W is measured at green light, the wavelength used in commercial imaging systems, which is 2−4X larger than that of a-Si and best reported MoS2 devices. The device could find applications in large area electronics, such as biomedical imaging, where a fast response is critical. PMID:23907598

Titanium-dioxide nanotube p-n homojunction diode

NASA Astrophysics Data System (ADS)

Alivov, Yahya; Ding, Yuchen; Singh, Vivek; Nagpal, Prashant

2014-12-01

Application of semiconductors in functional optoelectronic devices requires precise control over their doping and formation of junction between p- and n-doped semiconductors. While doped thin films have led to several semiconductor devices, need for high-surface area nanostructured devices for photovoltaic, photoelectrochemical, and photocatalytic applications has been hindered by lack of desired doping in nanostructures. Here, we show titanium-dioxide (TiO2) nanotubes doped with nitrogen (N) and niobium (Nb) as acceptors and donors, respectively, and formation of TiO2 nanotubes p-n homojunction. This TiO2:N/TiO2:Nb homojunction showed distinct diode-like behaviour with rectification ratio of 1115 at ±5 V and exhibited good photoresponse for ultraviolet light (λ = 365 nm) with sensitivity of 0.19 A/W at reverse bias of -5 V. These results can have important implications for development of nanostructured metal-oxide solar-cells, photodiodes, LED's, photocatalysts, and photoelectrochemical devices.

A multi-band, multi-level, multi-electron model for efficient FDTD simulations of electromagnetic interactions with semiconductor quantum wells

NASA Astrophysics Data System (ADS)

Ravi, Koustuban; Wang, Qian; Ho, Seng-Tiong

2015-08-01

We report a new computational model for simulations of electromagnetic interactions with semiconductor quantum well(s) (SQW) in complex electromagnetic geometries using the finite-difference time-domain method. The presented model is based on an approach of spanning a large number of electron transverse momentum states in each SQW sub-band (multi-band) with a small number of discrete multi-electron states (multi-level, multi-electron). This enables accurate and efficient two-dimensional (2-D) and three-dimensional (3-D) simulations of nanophotonic devices with SQW active media. The model includes the following features: (1) Optically induced interband transitions between various SQW conduction and heavy-hole or light-hole sub-bands are considered. (2) Novel intra sub-band and inter sub-band transition terms are derived to thermalize the electron and hole occupational distributions to the correct Fermi-Dirac distributions. (3) The terms in (2) result in an explicit update scheme which circumvents numerically cumbersome iterative procedures. This significantly augments computational efficiency. (4) Explicit update terms to account for carrier leakage to unconfined states are derived, which thermalize the bulk and SQW populations to a common quasi-equilibrium Fermi-Dirac distribution. (5) Auger recombination and intervalence band absorption are included. The model is validated by comparisons to analytic band-filling calculations, simulations of SQW optical gain spectra, and photonic crystal lasers.

Predicting growth of graphene nanostructures using high-fidelity atomistic simulations

DOE Office of Scientific and Technical Information (OSTI.GOV)

McCarty, Keven F.; Zhou, Xiaowang; Ward, Donald K.

2015-09-01

In this project we developed t he atomistic models needed to predict how graphene grows when carbon is deposited on metal and semiconductor surfaces. We first calculated energies of many carbon configurations using first principles electronic structure calculations and then used these energies to construct an empirical bond order potentials that enable s comprehensive molecular dynamics simulation of growth. We validated our approach by comparing our predictions to experiments of graphene growth on Ir, Cu and Ge. The robustness of ou r understanding of graphene growth will enable high quality graphene to be grown on novel substrates which will expandmore » the number of potential types of graphene electronic devices.« less

Semiconductor optoelectronic devices for free-space optical communications

NASA Technical Reports Server (NTRS)

Katz, J.

1983-01-01

The properties of individual injection lasers are reviewed, and devices of greater complexity are described. These either include or are relevant to monolithic integration configurations of the lasers with their electronic driving circuitry, power combining methods of semiconductor lasers, and electronic methods of steering the radiation patterns of semiconductor lasers and laser arrays. The potential of AlGaAs laser technology for free-space optical communications systems is demonstrated. These solid-state components, which can generate and modulate light, combine the power of a number of sources and perform at least part of the beam pointing functions. Methods are proposed for overcoming the main drawback of semiconductor lasers, that is, their inability to emit the needed amount of optical power in a single-mode operation.

Tunable surface plasmon devices

DOEpatents

Shaner, Eric A [Rio Rancho, NM; Wasserman, Daniel [Lowell, MA

2011-08-30

A tunable extraordinary optical transmission (EOT) device wherein the tunability derives from controlled variation of the dielectric constant of a semiconducting material (semiconductor) in evanescent-field contact with a metallic array of sub-wavelength apertures. The surface plasmon resonance wavelength can be changed by changing the dielectric constant of the dielectric material. In embodiments of this invention, the dielectric material is a semiconducting material. The dielectric constant of the semiconducting material in the metal/semiconductor interfacial region is controllably adjusted by adjusting one or more of the semiconductor plasma frequency, the concentration and effective mass of free carriers, and the background high-frequency dielectric constant in the interfacial region. Thermal heating and/or voltage-gated carrier-concentration changes may be used to variably adjust the value of the semiconductor dielectric constant.

Screenable contact structure and method for semiconductor devices

DOEpatents

Ross, Bernd

1980-08-26

An ink composition for deposition upon the surface of a semiconductor device to provide a contact area for connection to external circuitry is disclosed, the composition comprising an ink system containing a metal powder, a binder and vehicle, and a metal frit. The ink is screened onto the semiconductor surface in the desired pattern and is heated to a temperature sufficient to cause the metal frit to become liquid. The metal frit dissolves some of the metal powder and densifies the structure by transporting the dissolved metal powder in a liquid sintering process. The sintering process typically may be carried out in any type of atmosphere. A small amount of dopant or semiconductor material may be added to the ink systems to achieve particular results if desired.

Large Bandgap Shrinkage from Doping and Dielectric Interface in Semiconducting Carbon Nanotubes

NASA Astrophysics Data System (ADS)

Comfort, Everett; Lee, Ji Ung

2016-06-01

The bandgap of a semiconductor is one of its most important electronic properties. It is often considered to be a fixed property of the semiconductor. As the dimensions of semiconductors reduce, however, many-body effects become dominant. Here, we show that doping and dielectric, two critical features of semiconductor device manufacturing, can dramatically shrink (renormalize) the bandgap. We demonstrate this in quasi-one-dimensional semiconducting carbon nanotubes. Specifically, we use a four-gated device, configured as a p-n diode, to investigate the fundamental electronic structure of individual, partially supported nanotubes of varying diameter. The four-gated construction allows us to combine both electrical and optical spectroscopic techniques to measure the bandgap over a wide doping range.

High efficiency low cost thin film silicon solar cell design and method for making

DOEpatents

Sopori, B.L.

1999-04-27

A semiconductor device is described having a substrate, a conductive intermediate layer deposited onto said substrate, wherein the intermediate layer serves as a back electrode, an optical reflector, and an interface for impurity gettering, and a semiconductor layer deposited onto said intermediate layer, wherein the semiconductor layer has a grain size at least as large as the layer thickness, and preferably about ten times the layer thickness. The device is formed by depositing a metal layer on a substrate, depositing a semiconductive material on the metal-coated substrate to produce a composite structure, and then optically processing the composite structure by illuminating it with infrared electromagnetic radiation according to a unique time-energy profile that first produces pits in the backside surface of the semiconductor material, then produces a thin, highly reflective, low resistivity alloy layer over the entire area of the interface between the semiconductor material and the metal layer, and finally produces a grain-enhanced semiconductor layer. The time-energy profile includes increasing the energy to a first energy level to initiate pit formation and create the desired pit size and density, then ramping up to a second energy level in which the entire device is heated to produce an interfacial melt, and finally reducing the energy to a third energy level and holding for a period of time to allow enhancement in the grain size of the semiconductor layer. 9 figs.

Estimation of carrier mobility and charge behaviors of organic semiconductor films in metal-insulator-semiconductor diodes consisting of high-k oxide/organic semiconductor double layers

NASA Astrophysics Data System (ADS)

Chosei, Naoya; Itoh, Eiji

2018-02-01

We have comparatively studied the charge behaviors of organic semiconductor films based on charge extraction by linearly increasing voltage in a metal-insulator-semiconductor (MIS) diode structure (MIS-CELIV) and by classical capacitance-voltage measurement. The MIS-CELIV technique allows the selective measurement of electron and hole mobilities of n- and p-type organic films with thicknesses representative of those of actual devices. We used an anodic oxidized sputtered Ta or Hf electrode as a high-k layer, and it effectively blocked holes at the insulator/semiconductor interface. We estimated the hole mobilities of the polythiophene derivatives regioregular poly(3-hexylthiophene) (P3HT) and poly(3,3‧‧‧-didodecylquarterthiophene) (PQT-12) before and after heat treatment in the ITO/high-k/(thin polymer insulator)/semiconductor/MoO3/Ag device structure. The hole mobility of PQT-12 was improved from 1.1 × 10-5 to 2.1 × 10-5 cm2 V-1 s-1 by the heat treatment of the device at 100 °C for 30 min. An almost two orders of magnitude higher mobility was obtained in MIS diodes with P3HT as the p-type layer. We also determined the capacitance from the displacement current in MIS diodes at a relatively low-voltage sweep, and it corresponded well to the classical capacitance-voltage and frequency measurement results.

Method of Manufacturing a Light Emitting, Photovoltaic or Other Electronic Apparatus and System

NASA Technical Reports Server (NTRS)

Blanchard, Richard A. (Inventor); Lewandowski, Mark Allan (Inventor); Frazier, Donald Odell (Inventor); Ray, William Johnstone (Inventor); Fuller, Kirk A. (Inventor); Lowenthal, Mark David (Inventor); Shotton, Neil O. (Inventor)

2014-01-01

The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.

Method of manufacturing a light emitting, photovoltaic or other electronic apparatus and system

NASA Technical Reports Server (NTRS)

Fuller, Kirk A. (Inventor); Frazier, Donald Odell (Inventor); Blanchard, Richard A. (Inventor); Lowenthal, Mark D. (Inventor); Lewandowski, Mark Allan (Inventor); Ray, William Johnstone (Inventor); Shotton, Neil O. (Inventor)

2012-01-01

The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.

Evaluation of Intrinsic Charge Carrier Transport at Insulator-Semiconductor Interfaces Probed by a Non-Contact Microwave-Based Technique

PubMed Central

Honsho, Yoshihito; Miyakai, Tomoyo; Sakurai, Tsuneaki; Saeki, Akinori; Seki, Shu

2013-01-01

We have successfully designed the geometry of the microwave cavity and the thin metal electrode, achieving resonance of the microwave cavity with the metal-insulator-semiconductor (MIS) device structure. This very simple MIS device operates in the cavity, where charge carriers are injected quantitatively by an applied bias at the insulator-semiconductor interface. The local motion of the charge carriers was clearly probed through the applied external microwave field, also giving the quantitative responses to the injected charge carrier density and charge/discharge characteristics. By means of the present measurement system named field-induced time-resolved microwave conductivity (FI-TRMC), the pentacene thin film in the MIS device allowed the evaluation of the hole and electron mobility at the insulator-semiconductor interface of 6.3 and 0.34 cm2 V−1 s−1, respectively. This is the first report on the direct, intrinsic, non-contact measurement of charge carrier mobility at interfaces that has been fully experimentally verified. PMID:24212382

Center for Semiconductor Materials and Device Modeling: expanding collaborative research opportunities between government, academia, and industry

NASA Astrophysics Data System (ADS)

Perconti, Philip; Bedair, Sarah S.; Bajaj, Jagmohan; Schuster, Jonathan; Reed, Meredith

2016-09-01

To increase Soldier readiness and enhance situational understanding in ever-changing and complex environments, there is a need for rapid development and deployment of Army technologies utilizing sensors, photonics, and electronics. Fundamental aspects of these technologies include the research and development of semiconductor materials and devices which are ubiquitous in numerous applications. Since many Army technologies are considered niche, there is a lack of significant industry investment in the fundamental research and understanding of semiconductor technologies relevant to the Army. To address this issue, the US Army Research Laboratory is establishing a Center for Semiconductor Materials and Device Modeling and seeks to leverage expertise and resources across academia, government and industry. Several key research areas—highlighted and addressed in this paper—have been identified by ARL and external partners and will be pursued in a collaborative fashion by this Center. This paper will also address the mechanisms by which the Center is being established and will operate.

76 FR 65751 - Notice of intent to grant exclusive license

Federal Register 2010, 2011, 2012, 2013, 2014

2011-10-24

... Crystalline Semiconductor Alloys on Basal Plane of Trigonal or Hexagonal Crystal,'' U.S. Patent Application No. 12/254,134 entitled ``Hybrid Bandgap Engineering for Super-Hetero- Epitaxial Semiconductor Materials... Semiconductor Materials on Trigonal Substrate with Single Crystal Properties and Devices Based on Such Materials...

Energy Models for One-Carrier Transport in Semiconductor Devices

NASA Technical Reports Server (NTRS)

Jerome, Joseph W.; Shu, Chi-Wang

1991-01-01

Moment models of carrier transport, derived from the Boltzmann equation, made possible the simulation of certain key effects through such realistic assumptions as energy dependent mobility functions. This type of global dependence permits the observation of velocity overshoot in the vicinity of device junctions, not discerned via classical drift-diffusion models, which are primarily local in nature. It was found that a critical role is played in the hydrodynamic model by the heat conduction term. When ignored, the overshoot is inappropriately damped. When the standard choice of the Wiedemann-Franz law is made for the conductivity, spurious overshoot is observed. Agreement with Monte-Carlo simulation in this regime required empirical modification of this law, or nonstandard choices. Simulations of the hydrodynamic model in one and two dimensions, as well as simulations of a newly developed energy model, the RT model, are presented. The RT model, intermediate between the hydrodynamic and drift-diffusion model, was developed to eliminate the parabolic energy band and Maxwellian distribution assumptions, and to reduce the spurious overshoot with physically consistent assumptions. The algorithms employed for both models are the essentially non-oscillatory shock capturing algorithms. Some mathematical results are presented and contrasted with the highly developed state of the drift-diffusion model.

Monte Carlo simulation to calculate the rate of 137Cs gamma rays dispersion in gallium arsenide compound

NASA Astrophysics Data System (ADS)

Haider, F. A.; Chee, F. P.; Abu Hassan, H.; Saafie, S.

2017-01-01

Radiation effects on Gallium Arsenide (GaAs) have been tested by exposing samples to Cesium-137 (137Cs) gamma rays. Gallium Arsenide is a basic photonic material for most of the space technology communication, and, therefore, lends itself for applications where this is of concern. Monte Carlo simulations of interaction between direct ionizing radiation and GaAs structure have been performed in TRIM software, being part of SRIM 2011 programming package. An adverse results shows that energy dose does not govern the displacement of atoms and is dependent on the changes of incident angles and thickness of the GaAs target element. At certain thickness of GaAs and incident angle of 137Cs ion, the displacement damage is at its highest value. From the simulation result, it is found that if the thickness of the GaAs semiconductor material is small compared to the projected range at that particular incident energy, the energy loss in the target GaAs will be small. Hence, when the depth of semiconductor material is reduced, the range of damage in the target also decreased. However, the other factors such as quantum size effect, the energy gap between the conduction and valence band must also be taken into consideration when the dimension of the device is diminished.

Method for photolithographic definition of recessed features on a semiconductor wafer utilizing auto-focusing alignment

DOEpatents

Farino, A.J.; Montague, S.; Sniegowski, J.J.; Smith, J.H.; McWhorter, P.J.

1998-07-21

A method is disclosed for photolithographically defining device features up to the resolution limit of an auto-focusing projection stepper when the device features are to be formed in a wafer cavity at a depth exceeding the depth of focus of the stepper. The method uses a focusing cavity located in a die field at the position of a focusing light beam from the auto-focusing projection stepper, with the focusing cavity being of the same depth as one or more adjacent cavities wherein a semiconductor device is to be formed. The focusing cavity provides a bottom surface for referencing the focusing light beam and focusing the stepper at a predetermined depth below the surface of the wafer, whereat the device features are to be defined. As material layers are deposited in each device cavity to build up a semiconductor structure such as a microelectromechanical system (MEMS) device, the same material layers are deposited in the focusing cavity, raising the bottom surface and re-focusing the stepper for accurately defining additional device features in each succeeding material layer. The method is especially applicable for forming MEMS devices within a cavity or trench and integrating the MEMS devices with electronic circuitry fabricated on the wafer surface. 15 figs.

Method for photolithographic definition of recessed features on a semiconductor wafer utilizing auto-focusing alignment

DOEpatents

Farino, Anthony J.; Montague, Stephen; Sniegowski, Jeffry J.; Smith, James H.; McWhorter, Paul J.

1998-01-01

A method is disclosed for photolithographically defining device features up to the resolution limit of an auto-focusing projection stepper when the device features are to be formed in a wafer cavity at a depth exceeding the depth of focus of the stepper. The method uses a focusing cavity located in a die field at the position of a focusing light beam from the auto-focusing projection stepper, with the focusing cavity being of the same depth as one or more adjacent cavities wherein a semiconductor device is to be formed. The focusing cavity provides a bottom surface for referencing the focusing light beam and focusing the stepper at a predetermined depth below the surface of the wafer, whereat the device features are to be defined. As material layers are deposited in each device cavity to build up a semiconductor structure such as a microelectromechanical system (MEMS) device, the same material layers are deposited in the focusing cavity, raising the bottom surface and re-focusing the stepper for accurately defining additional device features in each succeeding material layer. The method is especially applicable for forming MEMS devices within a cavity or trench and integrating the MEMS devices with electronic circuitry fabricated on the wafer surface.

A review of the physics and response models for burnout of semiconductor devices

NASA Astrophysics Data System (ADS)

Orvis, W. J.; Khanaka, G. H.; Yee, J. H.

1984-12-01

Physical mechanisms that cause semiconductor devices to fail from electrical overstress--particularly, EMP-induced electrical stress--are described in light of the current literature and the authors' own research. A major concern is the cause and effects of second breakdown phenomena in p-n junction devices. Models of failure thresholds are evaluated for their inherent errors and for their ability to represent the relevant physics. Finally, the response models that relate electromagnetic stress parameters to appropriate failure-threshold parameters are discussed.

Optical speedup at transparency of the gain recovery in semiconductor optical amplifiers

NASA Astrophysics Data System (ADS)

Hessler, T. P.; Dupertuis, M.-A.; Deveaud, B.; Emery, J.-Y.; Dagens, B.

2002-10-01

Experimental demonstration of optical speedup at transparency (OSAT) has been performed on a 1 mm long semiconductor optical amplifiers (SOA). OSAT is a recently proposed scheme that decreases the recovery time of an SOA while maintaining the available gain. It is achieved by externally injecting into the SOA the beam of a separate high power laser at energies around the transparency point. Even though the experimental conditions were not optimal, a beam of 100 mW decreases the recovery time by a third when it is injected in the vicinity of the material transparency point of the device. This acceleration of the device response without detrimental reduction of the gain is found to be effective over a broad wavelength window of about 20 nm around transparency. The injection of the accelerating beam into the gain region is a less efficient solution not only because the gain is then strongly diminished but also because speeding is reduced. This originates from the reduction of the amplified spontaneous emission power in the device, which counterbalances the speeding capabilities of the external laser beam. Another advantage of the OSAT scheme is realized in relatively long SOAs, which suffer from gain overshoot under strong current injection. Simulations show that OSAT decreases the gain overshoot, which should enable us to use OSAT to further speedup the response of long SOAs.

Thin film three-dimensional topological insulator metal-oxide-semiconductor field-effect-transistors: A candidate for sub-10 nm devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Akhavan, N. D., E-mail: nima.dehdashti@uwa.edu.au; Jolley, G.; Umana-Membreno, G. A.

2014-08-28

Three-dimensional (3D) topological insulators (TI) are a new state of quantum matter in which surface states reside in the bulk insulating energy bandgap and are protected by time-reversal symmetry. It is possible to create an energy bandgap as a consequence of the interaction between the conduction band and valence band surface states from the opposite surfaces of a TI thin film, and the width of the bandgap can be controlled by the thin film thickness. The formation of an energy bandgap raises the possibility of thin-film TI-based metal-oxide-semiconductor field-effect-transistors (MOSFETs). In this paper, we explore the performance of MOSFETs basedmore » on thin film 3D-TI structures by employing quantum ballistic transport simulations using the effective continuous Hamiltonian with fitting parameters extracted from ab-initio calculations. We demonstrate that thin film transistors based on a 3D-TI structure provide similar electrical characteristics compared to a Si-MOSFET for gate lengths down to 10 nm. Thus, such a device can be a potential candidate to replace Si-based MOSFETs in the sub-10 nm regime.« less

Strain engineering of atomic and electronic structures of few-monolayer-thick GaN

NASA Astrophysics Data System (ADS)

Kolobov, A. V.; Fons, P.; Saito, Y.; Tominaga, J.; Hyot, B.; André, B.

2017-07-01

Two-dimensional (2D) semiconductors possess the potential to ultimately minimize the size of devices and concomitantly drastically reduce the corresponding energy consumption. In addition, materials in their atomic-scale limit often possess properties different from their bulk counterparts paving the way to conceptually novel devices. While graphene and 2D transition-metal dichalcogenides remain the most studied materials, significant interest also exists in the fabrication of atomically thin structures from traditionally 3D semiconductors such as GaN. While in the monolayer limit GaN possesses a graphenelike structure and an indirect band gap, it was recently demonstrated that few-layer GaN acquires a Haeckelite structure in the direction of growth with an effectively direct gap. In this work, we demonstrate the possibility of strain engineering of the atomic and electronic structure of few-monolayer-thick GaN structures, which opens new avenues for their practical application in flexible nanoelectronics and nano-optoelectronics. Our simulations further suggest that due to the weak van der Waals-like interaction between a substrate and an overlayer, the use of a MoS2 substrate may be a promising route to fabricate few-monolayer Haeckelite GaN experimentally.

Bi-Se doped with Cu, p-type semiconductor

DOEpatents

Bhattacharya, Raghu Nath; Phok, Sovannary; Parilla, Philip Anthony

2013-08-20

A Bi--Se doped with Cu, p-type semiconductor, preferably used as an absorber material in a photovoltaic device. Preferably the semiconductor has at least 20 molar percent Cu. In a preferred embodiment, the semiconductor comprises at least 28 molar percent of Cu. In one embodiment, the semiconductor comprises a molar percentage of Cu and Bi whereby the molar percentage of Cu divided by the molar percentage of Bi is greater than 1.2. In a preferred embodiment, the semiconductor is manufactured as a thin film having a thickness less than 600 nm.

Single-mode very wide tunability in laterally coupled semiconductor lasers with electrically controlled reflectivities

NASA Astrophysics Data System (ADS)

Griffel, Giora; Chen, Howard Z.; Grave, Ilan; Yariv, Amnon

1991-04-01

The operation of a novel multisection structure comprised of laterally coupled gain-guided semiconductor lasers is demonstrated. It is shown that tunable single longitudinal mode operation can be achieved with a high degree of frequency selectivity. The device has a tuning range of 14.5 nm, the widest observed to date in a monolithic device.

Total-dose radiation effects data for semiconductor devices (1989 supplement)

NASA Technical Reports Server (NTRS)

Martin, Keith E.; Coss, James R.; Goben, Charles A.; Shaw, David C.; Farmanesh, Sam; Davarpanah, Michael M.; Craft, Leroy H.; Price, William E.

1990-01-01

Steady state, total dose radiation test data are provided for electronic designers and other personnel using semiconductor devices in a radiation environment. The data are presented in graphic and narrative formats. Two primary radiation source types were used: Cobalt-60 gamma rays and a Dynamitron electron accelerator capable of delivering 2.5 MeV electrons at a steady rate.

Voyager electronic parts radiation program, volume 1

NASA Technical Reports Server (NTRS)

Stanley, A. G.; Martin, K. E.; Price, W. E.

1977-01-01

The Voyager spacecraft is subject to radiation from external natural space, from radioisotope thermoelectric generators and heater units, and from the internal environment where penetrating electrons generate surface ionization effects in semiconductor devices. Methods for radiation hardening and tests for radiation sensitivity are described. Results of characterization testing and sample screening of over 200 semiconductor devices in a radiation environment are summarized.

Semiconductor diode with external field modulation

DOEpatents

Nasby, Robert D.

2000-01-01

A non-destructive-readout nonvolatile semiconductor diode switching device that may be used as a memory element is disclosed. The diode switching device is formed with a ferroelectric material disposed above a rectifying junction to control the conduction characteristics therein by means of a remanent polarization. The invention may be used for the formation of integrated circuit memories for the storage of information.

Improvement of screening methods for silicon planar semiconductor devices

NASA Technical Reports Server (NTRS)

Berger, W. M.

1972-01-01

The results of the program for the development of a more sensitive method for selecting silicon planar semiconductor devices for long life applications are reported. The manufacturing technologies (MOS and Bipolar) are discussed along with the screening procedures developed as a result of the tests and evaluations, and the effectiveness of the MOS and Bilayer screening procedures are evaluated.

All-ion-implanted planar-gate current aperture vertical Ga2O3 MOSFETs with Mg-doped blocking layer

NASA Astrophysics Data System (ADS)

Wong, Man Hoi; Goto, Ken; Morikawa, Yoji; Kuramata, Akito; Yamakoshi, Shigenobu; Murakami, Hisashi; Kumagai, Yoshinao; Higashiwaki, Masataka

2018-06-01

A vertical β-Ga2O3 metal–oxide–semiconductor field-effect transistor featuring a planar-gate architecture is presented. The device was fabricated by an all-ion-implanted process without requiring trench etching or epitaxial regrowth. A Mg-ion-implanted current blocking layer (CBL) provided electrical isolation between the source and the drain except at an aperture opening through which drain current was conducted. Successful transistor action was realized by gating a Si-ion-implanted channel above the CBL. Thermal diffusion of Mg induced a large source–drain leakage current through the CBL, which resulted in compromised off-state device characteristics as well as a reduced peak extrinsic transconductance compared with the results of simulations.

A SnS2-based photomemristor driven by sun

NASA Astrophysics Data System (ADS)

Dragoman, Mircea; Batiri, Mihail; Dinescu, Adrian; Ciobanu, Vladimir; Rusu, Emil; Dragoman, Daniela; Tiginyanu, Ion

2018-01-01

We demonstrate experimentally that a sample of a SnS2 layered semiconductor compound with the area of 1 cm2 and the thickness of 100 μm, contacted laterally by silver electrodes with the area of 1 mm2, acts naturally as a memristor device when illuminated by a sun simulator. Although the conductance of the device changes with the number of pulses or voltages sweeps, the current-voltage dependence is almost linear, showing only a very narrow but clearly pinched hysteresis, which is the main imprint of a memristor. This SnS2-based solid-state miniaturized photomemristor could be used for the implementation of all-optical neuromorphic circuits based on artificial neurons and synapses, oriented to learning algorithms of living organisms.

High-Temperature Electronics: A Role for Wide Bandgap Semiconductors?

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Okojie, Robert S.; Chen, Liang-Yu

2002-01-01

It is increasingly recognized that semiconductor based electronics that can function at ambient temperatures higher than 150 C without external cooling could greatly benefit a variety of important applications, especially-in the automotive, aerospace, and energy production industries. The fact that wide bandgap semiconductors are capable of electronic functionality at much higher temperatures than silicon has partially fueled their development, particularly in the case of SiC. It appears unlikely that wide bandgap semiconductor devices will find much use in low-power transistor applications until the ambient temperature exceeds approximately 300 C, as commercially available silicon and silicon-on-insulator technologies are already satisfying requirements for digital and analog very large scale integrated circuits in this temperature range. However, practical operation of silicon power devices at ambient temperatures above 200 C appears problematic, as self-heating at higher power levels results in high internal junction temperatures and leakages. Thus, most electronic subsystems that simultaneously require high-temperature and high-power operation will necessarily be realized using wide bandgap devices, once the technology for realizing these devices become sufficiently developed that they become widely available. Technological challenges impeding the realization of beneficial wide bandgap high ambient temperature electronics, including material growth, contacts, and packaging, are briefly discussed.

Design of Contact Electrodes for Semiconductor Nanowire Solar Energy Harvesting Devices.

PubMed

Lin, Tzuging; Ramadurgam, Sarath; Yang, Chen

2017-04-12

Transparent, low-resistive contacts are critical for efficient solar energy harvesting devices. It is important to reconsider the material choices and electrode design as devices move from 2D films to 1D nanostructures. In this paper, we study the effectiveness of indium tin oxide (ITO) and metals, such as Ag and Cu, as contacts in 2D and 1D systems. Although ITO has been studied extensively and developed into an effective transparent contact for 2D devices, our results show that effectiveness does not translate to 1D systems. Particularly with consideration of resistance requirement, nanowires with metal shells as contacts enable better absorption within the semiconductor as compared to ITO. Furthermore, there is a strong dependence of contact performance on the semiconductor band gap and diameter of nanowires. We found that metal contacts outperform ITO for nanowire devices, regardless of the sheet resistance constraint, in the regime of diameters less than 100 nm and band-gaps greater than 1 eV. These metal shells optimized for best absorption are significantly thinner than ITO, which enables for the design of devices with high nanowire number density and consequently higher device efficiencies.

Deformable inorganic semiconductor

NASA Astrophysics Data System (ADS)

Kim, Dae-Hyeong; Cha, Gi Doo

2018-05-01

Unlike conventional inorganic semiconductors, which are typically brittle, α-Ag2S exhibits room-temperature ductility with favourable electrical properties, offering promise for use in high-performance flexible and stretchable devices.

Methods of measurement for semiconductor materials, process control, and devices

NASA Technical Reports Server (NTRS)

Bullis, W. M. (Editor)

1972-01-01

Significant accomplishments include development of a procedure to correct for the substantial differences of transistor delay time as measured with different instruments or with the same instrument at different frequencies; association of infrared response spectra of poor quality germanium gamma ray detectors with spectra of detectors fabricated from portions of a good crystal that had been degraded in known ways; and confirmation of the excellent quality and cosmetic appearance of ultrasonic bonds made with aluminum ribbon wire. Work is continuing on measurement of resistivity of semiconductor crystals; study of gold-doped silicon, development of the infrared response technique; evaluation of wire bonds and die attachment; and measurement of thermal properties of semiconductor devices, delay time and related carrier transport properties in junction devices, and noise properties of microwave diodes.

A soft switching with reduced voltage stress ZVT-PWM full-bridge converter

NASA Astrophysics Data System (ADS)

Sahin, Yakup; Ting, Naim Suleyman; Acar, Fatih

2018-04-01

This paper introduces a novel active snubber cell for soft switching pulse width modulation DC-DC converters. In the proposed converter, the main switch is turned on under zero voltage transition and turned off under zero voltage switching (ZVS). The auxiliary switch is turned on under zero current switching (ZCS) and turned off under zero current transition. The main diode is turned on under ZVS and turned off under ZCS. All of the other semiconductors in the converter are turned on and off with soft switching. There is no extra voltage stress on the semiconductor devices. Besides, the proposed converter has simple structure and ease of control due to common ground. The detailed theoretical analysis of the proposed converter is presented and also verified with both simulation and experimental study at 100 kHz switching frequency and 600 W output power. Furthermore, the efficiency of the proposed converter is 95.7% at nominal power.

Parallelization of the preconditioned IDR solver for modern multicore computer systems

NASA Astrophysics Data System (ADS)

Bessonov, O. A.; Fedoseyev, A. I.

2012-10-01

This paper present the analysis, parallelization and optimization approach for the large sparse matrix solver CNSPACK for modern multicore microprocessors. CNSPACK is an advanced solver successfully used for coupled solution of stiff problems arising in multiphysics applications such as CFD, semiconductor transport, kinetic and quantum problems. It employs iterative IDR algorithm with ILU preconditioning (user chosen ILU preconditioning order). CNSPACK has been successfully used during last decade for solving problems in several application areas, including fluid dynamics and semiconductor device simulation. However, there was a dramatic change in processor architectures and computer system organization in recent years. Due to this, performance criteria and methods have been revisited, together with involving the parallelization of the solver and preconditioner using Open MP environment. Results of the successful implementation for efficient parallelization are presented for the most advances computer system (Intel Core i7-9xx or two-processor Xeon 55xx/56xx).

Modeling direct interband tunneling. I. Bulk semiconductors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pan, Andrew, E-mail: pandrew@ucla.edu; Chui, Chi On; California NanoSystems Institute, University of California, Los Angeles, Los Angeles, California 90095

Interband tunneling is frequently studied using the semiclassical Kane model, despite uncertainty about its validity. Revisiting the physical basis of this formula, we find that it neglects coupling to other bands and underestimates transverse tunneling. As a result, significant errors can arise at low and high fields for small and large gap materials, respectively. We derive a simple multiband tunneling model to correct these defects analytically without arbitrary parameters. Through extensive comparison with band structure and quantum transport calculations for bulk InGaAs, InAs, and InSb, we probe the accuracy of the Kane and multiband formulas and establish the superiority ofmore » the latter. We also show that the nonlocal average electric field should be used when applying either of these models to nonuniform potentials. Our findings are important for efficient analysis and simulation of bulk semiconductor devices involving tunneling.« less

Experimental and numerical investigation of contact-area-limited doping for top-contact pentacene thin-film transistors with Schottky contact.

PubMed

Noda, Kei; Wada, Yasuo; Toyabe, Toru

2015-10-28

Effects of contact-area-limited doping for pentacene thin-film transistors with a bottom-gate, top-contact configuration were investigated. The increase in the drain current and the effective field-effect mobility was achieved by preparing hole-doped layers underneath the gold contact electrodes by coevaporation of pentacene and 2,3,5,6-tetrafluoro-7,7,8,8-tetracyanoquinodimethane (F4TCNQ), confirmed by using a thin-film organic transistor advanced simulator (TOTAS) incorporating Schottky contact with a thermionic field emission (TFE) model. Although the simulated electrical characteristics fit the experimental results well only in the linear regime of the transistor operation, the barrier height for hole injection and the gate-voltage-dependent hole mobility in the pentacene transistors were evaluated with the aid of the device simulation. This experimental data analysis with the simulation indicates that the highly-doped semiconducting layers prepared in the contact regions can enhance the charge carrier injection into the active semiconductor layer and concurrent trap filling in the transistor channel, caused by the mitigation of a Schottky energy barrier. This study suggests that both the contact-area-limited doping and the device simulation dealing with Schottky contact are indispensable in designing and developing high-performance organic thin-film transistors.

Simulation of a spiking neuron circuit using carbon nanotube transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Najari, Montassar, E-mail: malnjar@jazanu.edu.sa; IKCE unit, Jazan University, Jazan; El-Grour, Tarek, E-mail: grour-tarek@hotmail.fr

2016-06-10

Neuromorphic engineering is related to the existing analogies between the physical semiconductor VLSI (Very Large Scale Integration) and biophysics. Neuromorphic systems propose to reproduce the structure and function of biological neural systems for transferring their calculation capacity on silicon. Since the innovative research of Carver Mead, the neuromorphic engineering continues to emerge remarkable implementation of biological system. This work presents a simulation of an elementary neuron cell with a carbon nanotube transistor (CNTFET) based technology. The model of the cell neuron which was simulated is called integrate and fire (I&F) model firstly introduced by G. Indiveri in 2009. This circuitmore » has been simulated with CNTFET technology using ADS environment to verify the neuromorphic activities in terms of membrane potential. This work has demonstrated the efficiency of this emergent device; i.e CNTFET on the design of such architecture in terms of power consumption and technology integration density.« less

Computer modeling of inversion layer MOS solar cells and arrays

NASA Technical Reports Server (NTRS)

Ho, Fat Duen

1991-01-01

A two dimensional numerical model of the inversion layer metal insulator semiconductor (IL/MIS) solar cell is proposed by using the finite element method. The two-dimensional current flow in the device is taken into account in this model. The electrostatic potential distribution, the electron concentration distribution, and the hole concentration distribution for different terminal voltages are simulated. The results of simple calculation are presented. The existing problems for this model are addressed. Future work is proposed. The MIS structures are studied and some of the results are reported.

Design of fire detection equipment based on ultraviolet detection technology

NASA Astrophysics Data System (ADS)

Liu, Zhenji; Liu, Jin; Chu, Sheng; Ping, Chao; Yuan, Xiaobing

2015-03-01

Utilized the feature of wide bandgap semiconductor of MgZnO, researched and developed a kind of Mid-Ultraviolet-Band(MUV) ultraviolet detector which has passed the simulation experiment in the sun circumstance. Based on the ultraviolet detector, it gives out a design scheme of gun-shot detection device, which is composed of twelve ultraviolet detectors, signal amplifier, processor, annunciator , azimuth indicator and the bracket. Through Analysing the feature of solar blind, ultraviolet responsivity, fire feature of gunshots and detection distance, the feasibility of this design scheme is proved.

Classical Model of the Electromagnetic Interaction Suitable for High Speed Semiconductor Device Simulation

DTIC Science & Technology

2006-11-01

color images. 14. ABSTRACT 15. SUBJECT TERMS 16. SECURITY CLASSIFICATION OF: 17. LIMITATION OF ABSTRACT UU 18 . NUMBER OF PAGES 8 19a. NAME OF...Std Z39- 18 small problem domain can require millions of solution vari- ables solved repeatedly for tens of thousands of time steps. Finally, the...terms of vector and scalar potentials, A and ψ respec- tively. E = − ( ∂A ∂t +∇ψ ) = Erot + Eirr (5) Since the curl of a gradient is always zero, ∇ψ

Use of layer strains in strained-layer superlattices to make devices for operation in new wavelength ranges, E. G. , InAsSb at 8 to 12. mu. m. [InAs/sub 1-x/Sb/sub x/

DOEpatents

Osbourn, G.C.

1983-10-06

An intrinsic semiconductor electro-optical device comprises a p-n junction intrinsically responsive, when cooled, to electromagnetic radiation in the wavelength range of 8 to 12 ..mu..m. This radiation responsive p-n junction comprises a strained-layer superlattice (SLS) of alternating layers of two different III-V semiconductors. The lattice constants of the two semiconductors are mismatched, whereby a total strain is imposed on each pair of alternating semiconductor layers in the SLS structure, the proportion of the total strain which acts on each layer of the pair being proportional to the ratio of the layer thicknesses of each layer in the pair.

Strongly exchange-coupled triplet pairs in an organic semiconductor

NASA Astrophysics Data System (ADS)

Weiss, Leah R.; Bayliss, Sam L.; Kraffert, Felix; Thorley, Karl J.; Anthony, John E.; Bittl, Robert; Friend, Richard H.; Rao, Akshay; Greenham, Neil C.; Behrends, Jan

2017-02-01

From biological complexes to devices based on organic semiconductors, spin interactions play a key role in the function of molecular systems. For instance, triplet-pair reactions impact operation of organic light-emitting diodes as well as photovoltaic devices. Conventional models for triplet pairs assume they interact only weakly. Here, using electron spin resonance, we observe long-lived, strongly interacting triplet pairs in an organic semiconductor, generated via singlet fission. Using coherent spin manipulation of these two-triplet states, we identify exchange-coupled (spin-2) quintet complexes coexisting with weakly coupled (spin-1) triplets. We measure strongly coupled pairs with a lifetime approaching 3 μs and a spin coherence time approaching 1 μs, at 10 K. Our results pave the way for the utilization of high-spin systems in organic semiconductors.

Solution processed molecular floating gate for flexible flash memories

NASA Astrophysics Data System (ADS)

Zhou, Ye; Han, Su-Ting; Yan, Yan; Huang, Long-Biao; Zhou, Li; Huang, Jing; Roy, V. A. L.

2013-10-01

Solution processed fullerene (C60) molecular floating gate layer has been employed in low voltage nonvolatile memory device on flexible substrates. We systematically studied the charge trapping mechanism of the fullerene floating gate for both p-type pentacene and n-type copper hexadecafluorophthalocyanine (F16CuPc) semiconductor in a transistor based flash memory architecture. The devices based on pentacene as semiconductor exhibited both hole and electron trapping ability, whereas devices with F16CuPc trapped electrons alone due to abundant electron density. All the devices exhibited large memory window, long charge retention time, good endurance property and excellent flexibility. The obtained results have great potential for application in large area flexible electronic devices.

Solution processed molecular floating gate for flexible flash memories

PubMed Central

Zhou, Ye; Han, Su-Ting; Yan, Yan; Huang, Long-Biao; Zhou, Li; Huang, Jing; Roy, V. A. L.

2013-01-01

Solution processed fullerene (C60) molecular floating gate layer has been employed in low voltage nonvolatile memory device on flexible substrates. We systematically studied the charge trapping mechanism of the fullerene floating gate for both p-type pentacene and n-type copper hexadecafluorophthalocyanine (F16CuPc) semiconductor in a transistor based flash memory architecture. The devices based on pentacene as semiconductor exhibited both hole and electron trapping ability, whereas devices with F16CuPc trapped electrons alone due to abundant electron density. All the devices exhibited large memory window, long charge retention time, good endurance property and excellent flexibility. The obtained results have great potential for application in large area flexible electronic devices. PMID:24172758

Thermionic cooling devices based on resonant-tunneling AlGaAs/GaAs heterostructure

NASA Astrophysics Data System (ADS)

Bescond, M.; Logoteta, D.; Michelini, F.; Cavassilas, N.; Yan, T.; Yangui, A.; Lannoo, M.; Hirakawa, K.

2018-02-01

We study by means of full quantum simulations the operating principle and performance of a semiconductor heterostructure refrigerator combining resonant tunneling filtering and thermionic emission. Our model takes into account the coupling between the electric and thermal currents by self-consistently solving the transport equations within the non-equilibrium Green’s function framework and the heat equation. We show that the device can achieve relatively high cooling power values, while in the considered implementation, the maximum lattice temperature drop is severely limited by the thermal conductivity of the constituting materials. In such an out-of-equilibrium structure, we then emphasize the significant deviation of the phonon temperature from its electronic counterpart which can vary over several hundred Kelvin. The interplay between those two temperatures and the impact on the electrochemical potential is also discussed. Finally, viable options toward an optimization of the device are proposed.

Intrinsic electrical transport and performance projections of synthetic monolayer MoS2 devices

NASA Astrophysics Data System (ADS)

Smithe, Kirby K. H.; English, Chris D.; Suryavanshi, Saurabh V.; Pop, Eric

2017-03-01

We demonstrate monolayer (1L) MoS2 grown by chemical vapor deposition (CVD) with transport properties comparable to those of the best exfoliated 1L devices over a wide range of carrier densities (up to ˜1013 cm-2) and temperatures (80-500 K). Transfer length measurements decouple the intrinsic material mobility from the contact resistance, at practical carrier densities (>1012 cm-2). We demonstrate the highest current density reported to date (˜270 μA μm-1 or 44 MA cm-2) at 300 K for an 80 nm long device from CVD-grown 1L MoS2. Using simulations, we discuss what improvements of 1L MoS2 are still required to meet technology roadmap requirements for low power and high performance applications. Such results are an important step towards large-area electronics based on 1L semiconductors.

Performance analysis of gate all around GaAsP/AlGaSb CP-TFET

NASA Astrophysics Data System (ADS)

Lemtur, Alemienla; Sharma, Dheeraj; Suman, Priyanka; Patel, Jyoti; Yadav, Dharmendra Singh; Sharma, Neeraj

2018-05-01

Illustration of importance of gate all around (GAA) structure and hetero-junction formed by III-V semiconductor compounds has been analysed through GaAsP/AlGaSb CP-TFET (charge plasma tunnel field effect transistor). Charge plasma concept has been incorporated here to make this device more immune towards random dopant fluctuations (RDF). A high driving current of 1.28 ×10-5 A/μm and transconductance (gm) of 96.4 μS at supply voltages VGS = 1V and VDS = 0.5V is achieved. Further, implications of employing this device in analog/RF circuits have been supported with simulated results showing a high cut-off frequency of 34.5 THz and device efficiency of 3.45 MV-1. Apart from this, an insight of the linearity performances has also been included. Simultaneously, all the results are compared with a conventional gate all around charge plasma TFET.

Thermionic cooling devices based on resonant-tunneling AlGaAs/GaAs heterostructure.

PubMed

Bescond, M; Logoteta, D; Michelini, F; Cavassilas, N; Yan, T; Yangui, A; Lannoo, M; Hirakawa, K

2018-02-14

We study by means of full quantum simulations the operating principle and performance of a semiconductor heterostructure refrigerator combining resonant tunneling filtering and thermionic emission. Our model takes into account the coupling between the electric and thermal currents by self-consistently solving the transport equations within the non-equilibrium Green's function framework and the heat equation. We show that the device can achieve relatively high cooling power values, while in the considered implementation, the maximum lattice temperature drop is severely limited by the thermal conductivity of the constituting materials. In such an out-of-equilibrium structure, we then emphasize the significant deviation of the phonon temperature from its electronic counterpart which can vary over several hundred Kelvin. The interplay between those two temperatures and the impact on the electrochemical potential is also discussed. Finally, viable options toward an optimization of the device are proposed.

Roadmap on semiconductor-cell biointerfaces

NASA Astrophysics Data System (ADS)

Tian, Bozhi; Xu, Shuai; Rogers, John A.; Cestellos-Blanco, Stefano; Yang, Peidong; Carvalho-de-Souza, João L.; Bezanilla, Francisco; Liu, Jia; Bao, Zhenan; Hjort, Martin; Cao, Yuhong; Melosh, Nicholas; Lanzani, Guglielmo; Benfenati, Fabio; Galli, Giulia; Gygi, Francois; Kautz, Rylan; Gorodetsky, Alon A.; Kim, Samuel S.; Lu, Timothy K.; Anikeeva, Polina; Cifra, Michal; Krivosudský, Ondrej; Havelka, Daniel; Jiang, Yuanwen

2018-05-01

This roadmap outlines the role semiconductor-based materials play in understanding the complex biophysical dynamics at multiple length scales, as well as the design and implementation of next-generation electronic, optoelectronic, and mechanical devices for biointerfaces. The roadmap emphasizes the advantages of semiconductor building blocks in interfacing, monitoring, and manipulating the activity of biological components, and discusses the possibility of using active semiconductor-cell interfaces for discovering new signaling processes in the biological world.

Analysis of an anti-reflecting nanowire transparent electrode for solar cells

NASA Astrophysics Data System (ADS)

Zhao, Zhexin; Wang, Ken Xingze; Fan, Shanhui

2017-03-01

Transparent electrodes are an important component in many optoelectronic devices, especially solar cells. In this paper, we investigate a nanowire transparent electrode that also functions as an anti-reflection coating for silicon solar cells, taking into account the practical constraints that the electrode is typically encapsulated and needs to be in electric contact with the semiconductor. Numerical simulations show that the electrode can provide near-perfect broadband anti-reflection over much of the frequency range above the silicon band gap for both polarizations while keeping the sheet resistance sufficiently low. To provide insights into the physics mechanism of this broadband anti-reflection, we introduce a generalized Fabry-Perot model, which captures the effects of the higher order diffraction channels as well as the modification of the reflection coefficient of the interface introduced by the nanowires. This model is validated using frequency-domain electromagnetic simulations. Our work here provides design guidelines for nanowire transparent electrode in a device configuration that is relevant for solar cell applications.

Dynamic detection of spin accumulation in ferromagnet-semiconductor devices by ferromagnetic resonance (Conference Presentation)

NASA Astrophysics Data System (ADS)

Crowell, Paul A.; Liu, Changjiang; Patel, Sahil; Peterson, Tim; Geppert, Chad C.; Christie, Kevin; Stecklein, Gordon; Palmstrøm, Chris J.

2016-10-01

A distinguishing feature of spin accumulation in ferromagnet-semiconductor devices is its precession in a magnetic field. This is the basis for detection techniques such as the Hanle effect, but these approaches become ineffective as the spin lifetime in the semiconductor decreases. For this reason, no electrical Hanle measurement has been demonstrated in GaAs at room temperature. We show here that by forcing the magnetization in the ferromagnet to precess at resonance instead of relying only on the Larmor precession of the spin accumulation in the semiconductor, an electrically generated spin accumulation can be detected up to 300 K. The injection bias and temperature dependence of the measured spin signal agree with those obtained using traditional methods. We further show that this new approach enables a measurement of short spin lifetimes (< 100 psec), a regime that is not accessible in semiconductors using traditional Hanle techniques. The measurements were carried out on epitaxial Heusler alloy (Co2FeSi or Co2MnSi)/n-GaAs heterostructures. Lateral spin valve devices were fabricated by electron beam and photolithography. We compare measurements carried out by the new FMR-based technique with traditional non-local and three-terminal Hanle measurements. A full model appropriate for the measurements will be introduced, and a broader discussion in the context of spin pumping experimenments will be included in the talk. The new technique provides a simple and powerful means for detecting spin accumulation at high temperatures. Reference: C. Liu, S. J. Patel, T. A. Peterson, C. C. Geppert, K. D. Christie, C. J. Palmstrøm, and P. A. Crowell, "Dynamic detection of electron spin accumulation in ferromagnet-semiconductor devices by ferromagnetic resonance," Nature Communications 7, 10296 (2016). http://dx.doi.org/10.1038/ncomms10296

Extended Abstracts of the U.S. Workshop on the Physics and Chemistry of Mercury Cadmium Telluride Held in Orlando, Florida on October 11-13, 1988

DTIC Science & Technology

1988-12-01

Mainzer SCD - Semi-Conductor Devices A Tadiran-Rafael Partnership, Misgav Mobile Post, 20179,ISRAEL The effect of strain and stress on the performance of...Nili Mainzer and Eliezer Weiss SCD - Semi-Conductor Devices A Tadiran-Rafael Partnership, Misgav Mobile Post, 20179, ISRAEL In the 1987 workshop we have