Tauke-Pedretti, Anna; Nielson, Gregory N; Cederberg, Jeffrey G; Cruz-Campa, Jose Luis
2015-05-12
A method includes etching a release layer that is coupled between a plurality of semiconductor devices and a substrate with an etch. The etching includes etching the release layer between the semiconductor devices and the substrate until the semiconductor devices are at least substantially released from the substrate. The etching also includes etching a protuberance in the release layer between each of the semiconductor devices and the substrate. The etch is stopped while the protuberances remain between each of the semiconductor devices and the substrate. The method also includes separating the semiconductor devices from the substrate. Other methods and apparatus are also disclosed.
Unitary lens semiconductor device
Lear, Kevin L.
1997-01-01
A unitary lens semiconductor device and method. The unitary lens semiconductor device is provided with at least one semiconductor layer having a composition varying in the growth direction for unitarily forming one or more lenses in the semiconductor layer. Unitary lens semiconductor devices may be formed as light-processing devices such as microlenses, and as light-active devices such as light-emitting diodes, photodetectors, resonant-cavity light-emitting diodes, vertical-cavity surface-emitting lasers, and resonant cavity photodetectors.
Method of producing strained-layer semiconductor devices via subsurface-patterning
Dodson, Brian W.
1993-01-01
A method is described for patterning subsurface features in a semiconductor device, wherein the semiconductor device includes an internal strained layer. The method comprises creating a pattern of semiconductor material over the semiconductor device, the semiconductor material having a predetermined thickness which stabilizes areas of the strained semiconductor layer that lie beneath the pattern. Subsequently, a heating step is applied to the semiconductor device to cause a relaxation in areas of the strained layer which do not lie beneath the semiconductor material pattern, whereby dislocations result in the relaxed areas and impair electrical transport therethrough.
Unitary lens semiconductor device
Lear, K.L.
1997-05-27
A unitary lens semiconductor device and method are disclosed. The unitary lens semiconductor device is provided with at least one semiconductor layer having a composition varying in the growth direction for unitarily forming one or more lenses in the semiconductor layer. Unitary lens semiconductor devices may be formed as light-processing devices such as microlenses, and as light-active devices such as light-emitting diodes, photodetectors, resonant-cavity light-emitting diodes, vertical-cavity surface-emitting lasers, and resonant cavity photodetectors. 9 figs.
Sintered silver joints via controlled topography of electronic packaging subcomponents
Wereszczak, Andrew A.
2014-09-02
Disclosed are sintered silver bonded electronic package subcomponents and methods for making the same. Embodiments of the sintered silver bonded EPSs include topography modification of one or more metal surfaces of semiconductor devices bonded together by the sintered silver joint. The sintered silver bonded EPSs include a first semiconductor device having a first metal surface, the first metal surface having a modified topography that has been chemically etched, grit blasted, uniaxial ground and/or grid sliced connected to a second semiconductor device which may also include a first metal surface with a modified topography, a silver plating layer on the first metal surface of the first semiconductor device and a silver plating layer on the first metal surface of the second semiconductor device and a sintered silver joint between the silver plating layers of the first and second semiconductor devices which bonds the first semiconductor device to the second semiconductor device.
Reducing leakage current in semiconductor devices
Lu, Bin; Matioli, Elison de Nazareth; Palacios, Tomas Apostol
2018-03-06
A semiconductor device includes a first region having a first semiconductor material and a second region having a second semiconductor material. The second region is formed over the first region. The semiconductor device also includes a current blocking structure formed in the first region between first and second terminals of the semiconductor device. The current blocking structure is configured to reduce current flow in the first region between the first and second terminals.
Methods and devices for fabricating and assembling printable semiconductor elements
DOE Office of Scientific and Technical Information (OSTI.GOV)
Nuzzo, Ralph G.; Rogers, John A.; Menard, Etienne
The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.
Methods and devices for fabricating and assembling printable semiconductor elements
Nuzzo, Ralph G; Rogers, John A; Menard, Etienne; Lee, Keon Jae; Khang, Dahl-Young; Sun, Yugang; Meitl, Matthew; Zhu, Zhengtao
2014-03-04
The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.
Ptak, Aaron Joseph; Lin, Yong; Norman, Andrew; Alberi, Kirstin
2015-05-26
A method of producing semiconductor materials and devices that incorporate the semiconductor materials are provided. In particular, a method is provided of producing a semiconductor material, such as a III-V semiconductor, on a spinel substrate using a sacrificial buffer layer, and devices such as photovoltaic cells that incorporate the semiconductor materials. The sacrificial buffer material and semiconductor materials may be deposited using lattice-matching epitaxy or coincident site lattice-matching epitaxy, resulting in a close degree of lattice matching between the substrate material and deposited material for a wide variety of material compositions. The sacrificial buffer layer may be dissolved using an epitaxial liftoff technique in order to separate the semiconductor device from the spinel substrate, and the spinel substrate may be reused in the subsequent fabrication of other semiconductor devices. The low-defect density semiconductor materials produced using this method result in the enhanced performance of the semiconductor devices that incorporate the semiconductor materials.
Operation and biasing for single device equivalent to CMOS
Welch, James D.
2001-01-01
Disclosed are semiconductor devices including at least one junction which is rectifying whether the semiconductor is caused to be N or P-type, by the presence of field induced carriers. In particular, inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to conventional multiple device CMOS systems, which can be operated as modulators, are disclosed as are a non-latching SCR and an approach to blocking parasitic currents. Operation of the gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems under typical bias schemes is described, and simple demonstrative five mask fabrication procedures for the inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems are also presented.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Nuzzo, Ralph G.; Rogers, John A.; Menard, Etienne
The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.
Optically switched graphene/4H-SiC junction bipolar transistor
DOE Office of Scientific and Technical Information (OSTI.GOV)
Chandrashekhar, MVS; Sudarshan, Tangali S.; Omar, Sabih U.
A bi-polar device is provided, along with methods of making the same. The bi-polar device can include a semiconductor substrate doped with a first dopant, a semiconductor layer on the first surface of the semiconductor substrate, and a Schottky barrier layer on the semiconductor layer. The method of forming a bi-polar device can include: forming a semiconductor layer on a first surface of a semiconductor substrate, where the semiconductor substrate comprises a first dopant and where the semiconductor layer comprises a second dopant that has an opposite polarity than the first dopant; and forming a Schottky barrier layer on amore » first portion of the semiconductor layer while leaving a second portion of the semiconductor layer exposed.« less
Semiconductor devices having a recessed electrode structure
Palacios, Tomas Apostol; Lu, Bin; Matioli, Elison de Nazareth
2015-05-26
An electrode structure is described in which conductive regions are recessed into a semiconductor region. Trenches may be formed in a semiconductor region, such that conductive regions can be formed in the trenches. The electrode structure may be used in semiconductor devices such as field effect transistors or diodes. Nitride-based power semiconductor devices are described including such an electrode structure, which can reduce leakage current and otherwise improve performance.
Plasma Properties of an Exploding Semiconductor Igniter
NASA Astrophysics Data System (ADS)
McGuirk, J. S.; Thomas, K. A.; Shaffer, E.; Malone, A. L.; Baginski, T.; Baginski, M. E.
1997-11-01
Requirements by the automotive industry for low-cost, pyrotechnic igniters for automotive airbags have led to the development of several semiconductor devices. The properties of the plasma produced by the vaporization of an exploding semiconductor are necessary in order to minimize the electrical energy requirements. This work considers two silicon-based semiconductor devices: the semiconductor bridge (SCB) and the semiconductor junction igniter both consisting of etched silicon with vapor deposited aluminum structures. Electrical current passing through the device heats a narrow junction region to the point of vaporization creating an aluminum and silicon low-temperature plasma. This work will investigate the electrical characteristics of both devices and infer the plasma properties. Furthermore optical spectral measurements will be taken of the exploding devices to estimate the temperature and density of the plasma.
Sopori, Bhushan
2014-05-27
Methods for contact formation and gettering of precipitated impurities by multiple firing during semiconductor device fabrication are provided. In one embodiment, a method for fabricating an electrical semiconductor device comprises: a first step that includes gettering of impurities from a semiconductor wafer and forming a backsurface field; and a second step that includes forming a front contact for the semiconductor wafer, wherein the second step is performed after completion of the first step.
Efficient semiconductor light-emitting device and method
Choquette, Kent D.; Lear, Kevin L.; Schneider, Jr., Richard P.
1996-01-01
A semiconductor light-emitting device and method. The semiconductor light-emitting device is provided with at least one control layer or control region which includes an annular oxidized portion thereof to channel an injection current into the active region, and to provide a lateral refractive index profile for index guiding the light generated within the device. A periodic composition grading of at least one of the mirror stacks in the device provides a reduced operating voltage of the device. The semiconductor light-emitting device has a high efficiency for light generation, and may be formed either as a resonant-cavity light-emitting diode (RCLED) or as a vertical-cavity surface-emitting laser (VCSEL).
Efficient semiconductor light-emitting device and method
Choquette, K.D.; Lear, K.L.; Schneider, R.P. Jr.
1996-02-20
A semiconductor light-emitting device and method are disclosed. The semiconductor light-emitting device is provided with at least one control layer or control region which includes an annular oxidized portion thereof to channel an injection current into the active region, and to provide a lateral refractive index profile for index guiding the light generated within the device. A periodic composition grading of at least one of the mirror stacks in the device provides a reduced operating voltage of the device. The semiconductor light-emitting device has a high efficiency for light generation, and may be formed either as a resonant-cavity light-emitting diode (RCLED) or as a vertical-cavity surface-emitting laser (VCSEL). 12 figs.
Alivisatos, A. Paul; Colvin, Vickie
1996-01-01
An electroluminescent device is described, as well as a method of making same, wherein the device is characterized by a semiconductor nanocrystal electron transport layer capable of emitting visible light in response to a voltage applied to the device. The wavelength of the light emitted by the device may be changed by changing either the size or the type of semiconductor nanocrystals used in forming the electron transport layer. In a preferred embodiment the device is further characterized by the capability of emitting visible light of varying wavelengths in response to changes in the voltage applied to the device. The device comprises a hole processing structure capable of injecting and transporting holes, and usually comprising a hole injecting layer and a hole transporting layer; an electron transport layer in contact with the hole processing structure and comprising one or more layers of semiconductor nanocrystals; and an electron injecting layer in contact with the electron transport layer for injecting electrons into the electron transport layer. The capability of emitting visible light of various wavelengths is principally based on the variations in voltage applied thereto, but the type of semiconductor nanocrystals used and the size of the semiconductor nanocrystals in the layers of semiconductor nanometer crystals may also play a role in color change, in combination with the change in voltage.
Method and apparatus for use of III-nitride wide bandgap semiconductors in optical communications
Hui, Rongqing [Lenexa, KS; Jiang, Hong-Xing [Manhattan, KS; Lin, Jing-Yu [Manhattan, KS
2008-03-18
The present disclosure relates to the use of III-nitride wide bandgap semiconductor materials for optical communications. In one embodiment, an optical device includes an optical waveguide device fabricated using a III-nitride semiconductor material. The III-nitride semiconductor material provides for an electrically controllable refractive index. The optical waveguide device provides for high speed optical communications in an infrared wavelength region. In one embodiment, an optical amplifier is provided using optical coatings at the facet ends of a waveguide formed of erbium-doped III-nitride semiconductor materials.
Reliability Prediction Models for Discrete Semiconductor Devices
1988-07-01
influence failure rate were device construction, semiconductor material, junction temperature, electrical stress, circuit application., a plication...found to influence failure rate were device construction, semiconductor material, junction temperature, electrical stress, circuit application...MFA Airbreathlng 14issile, Flight MFF Missile, Free Flight ML Missile, Launch MMIC Monolithic Microwave Integrated Circuits MOS Metal-Oxide
Methods of forming semiconductor devices and devices formed using such methods
Fox, Robert V; Rodriguez, Rene G; Pak, Joshua
2013-05-21
Single source precursors are subjected to carbon dioxide to form particles of material. The carbon dioxide may be in a supercritical state. Single source precursors also may be subjected to supercritical fluids other than supercritical carbon dioxide to form particles of material. The methods may be used to form nanoparticles. In some embodiments, the methods are used to form chalcopyrite materials. Devices such as, for example, semiconductor devices may be fabricated that include such particles. Methods of forming semiconductor devices include subjecting single source precursors to carbon dioxide to form particles of semiconductor material, and establishing electrical contact between the particles and an electrode.
Radiation hardening of metal-oxide semi-conductor (MOS) devices by boron
NASA Technical Reports Server (NTRS)
Danchenko, V.
1974-01-01
Technique using boron effectively protects metal-oxide semiconductor devices from ionizing radiation without using shielding materials. Boron is introduced into insulating gate oxide layer at semiconductor-insulator interface.
Coincident site lattice-matched growth of semiconductors on substrates using compliant buffer layers
Norman, Andrew
2016-08-23
A method of producing semiconductor materials and devices that incorporate the semiconductor materials are provided. In particular, a method is provided of producing a semiconductor material, such as a III-V semiconductor, on a silicon substrate using a compliant buffer layer, and devices such as photovoltaic cells that incorporate the semiconductor materials. The compliant buffer material and semiconductor materials may be deposited using coincident site lattice-matching epitaxy, resulting in a close degree of lattice matching between the substrate material and deposited material for a wide variety of material compositions. The coincident site lattice matching epitaxial process, as well as the use of a ductile buffer material, reduce the internal stresses and associated crystal defects within the deposited semiconductor materials fabricated using the disclosed method. As a result, the semiconductor devices provided herein possess enhanced performance characteristics due to a relatively low density of crystal defects.
40 CFR 63.7195 - What definitions apply to this subpart?
Code of Federal Regulations, 2012 CFR
2012-07-01
... units used to manufacture p-type and n-type semiconductors or active solid state devices from a wafer.... Examples of semiconductor or related solid state devices include semiconductor diodes, semiconductor stacks... permanently attached to motor vehicles such as trucks, railcars, barges, or ships; (2) Flow-through tanks...
40 CFR 63.7195 - What definitions apply to this subpart?
Code of Federal Regulations, 2013 CFR
2013-07-01
... units used to manufacture p-type and n-type semiconductors or active solid state devices from a wafer.... Examples of semiconductor or related solid state devices include semiconductor diodes, semiconductor stacks... permanently attached to motor vehicles such as trucks, railcars, barges, or ships; (2) Flow-through tanks...
40 CFR 63.7195 - What definitions apply to this subpart?
Code of Federal Regulations, 2014 CFR
2014-07-01
... units used to manufacture p-type and n-type semiconductors or active solid state devices from a wafer.... Examples of semiconductor or related solid state devices include semiconductor diodes, semiconductor stacks... permanently attached to motor vehicles such as trucks, railcars, barges, or ships; (2) Flow-through tanks...
Hlaing, Htay; Kim, Chang-Hyun; Carta, Fabio; Nam, Chang-Yong; Barton, Rob A; Petrone, Nicholas; Hone, James; Kymissis, Ioannis
2015-01-14
The vertical integration of graphene with inorganic semiconductors, oxide semiconductors, and newly emerging layered materials has recently been demonstrated as a promising route toward novel electronic and optoelectronic devices. Here, we report organic thin film transistors based on vertical heterojunctions of graphene and organic semiconductors. In these thin heterostructure devices, current modulation is accomplished by tuning of the injection barriers at the semiconductor/graphene interface with the application of a gate voltage. N-channel devices fabricated with a thin layer of C60 show a room temperature on/off ratio >10(4) and current density of up to 44 mAcm(-2). Because of the ultrashort channel intrinsic to the vertical structure, the device is fully operational at a driving voltage of 200 mV. A complementary p-channel device is also investigated, and a logic inverter based on two complementary transistors is demonstrated. The vertical integration of graphene with organic semiconductors via simple, scalable, and low-temperature fabrication processes opens up new opportunities to realize flexible, transparent organic electronic, and optoelectronic devices.
Photoemission-based microelectronic devices
Forati, Ebrahim; Dill, Tyler J.; Tao, Andrea R.; Sievenpiper, Dan
2016-01-01
The vast majority of modern microelectronic devices rely on carriers within semiconductors due to their integrability. Therefore, the performance of these devices is limited due to natural semiconductor properties such as band gap and electron velocity. Replacing the semiconductor channel in conventional microelectronic devices with a gas or vacuum channel may scale their speed, wavelength and power beyond what is available today. However, liberating electrons into gas/vacuum in a practical microelectronic device is quite challenging. It often requires heating, applying high voltages, or using lasers with short wavelengths or high powers. Here, we show that the interaction between an engineered resonant surface and a low-power infrared laser can cause enough photoemission via electron tunnelling to implement feasible microelectronic devices such as transistors, switches and modulators. The proposed photoemission-based devices benefit from the advantages of gas-plasma/vacuum electronic devices while preserving the integrability of semiconductor-based devices. PMID:27811946
Near-infrared light emitting device using semiconductor nanocrystals
DOE Office of Scientific and Technical Information (OSTI.GOV)
Supran, Geoffrey J.S.; Song, Katherine W.; Hwang, Gyuweon
A near-infrared light emitting device can include semiconductor nanocrystals that emit at wavelengths beyond 1 .mu.m. The semiconductor nanocrystals can include a core and an overcoating on a surface of the core.
Introduction to Semiconductor Devices
NASA Astrophysics Data System (ADS)
Brennan, Kevin F.
2005-03-01
This volume offers a solid foundation for understanding the most important devices used in the hottest areas of electronic engineering today, from semiconductor fundamentals to state-of-the-art semiconductor devices in the telecommunications and computing industries. Kevin Brennan describes future approaches to computing hardware and RF power amplifiers, and explains how emerging trends and system demands of computing and telecommunications systems influence the choice, design and operation of semiconductor devices. In addition, he covers MODFETs and MOSFETs, short channel effects, and the challenges faced by continuing miniaturization. His book is both an excellent senior/graduate text and a valuable reference for practicing engineers and researchers.
Energy storage device with large charge separation
DOE Office of Scientific and Technical Information (OSTI.GOV)
Holme, Timothy P.; Prinz, Friedrich B.; Iancu, Andrei T.
High density energy storage in semiconductor devices is provided. There are two main aspects of the present approach. The first aspect is to provide high density energy storage in semiconductor devices based on formation of a plasma in the semiconductor. The second aspect is to provide high density energy storage based on charge separation in a p-n junction.
Energy storage device with large charge separation
Holme, Timothy P.; Prinz, Friedrich B.; Iancu, Andrei
2016-04-12
High density energy storage in semiconductor devices is provided. There are two main aspects of the present approach. The first aspect is to provide high density energy storage in semiconductor devices based on formation of a plasma in the semiconductor. The second aspect is to provide high density energy storage based on charge separation in a p-n junction.
Diode having trenches in a semiconductor region
Palacios, Tomas Apostol; Lu, Bin; Matioli, Elison de Nazareth
2016-03-22
An electrode structure is described in which conductive regions are recessed into a semiconductor region. Trenches may be formed in a semiconductor region, such that conductive regions can be formed in the trenches. The electrode structure may be used in semiconductor devices such as field effect transistors or diodes. Nitride-based power semiconductor devices are described including such an electrode structure, which can reduce leakage current and otherwise improve performance.
Monolayer-Mediated Growth of Organic Semiconductor Films with Improved Device Performance.
Huang, Lizhen; Hu, Xiaorong; Chi, Lifeng
2015-09-15
Increased interest in wearable and smart electronics is driving numerous research works on organic electronics. The control of film growth and patterning is of great importance when targeting high-performance organic semiconductor devices. In this Feature Article, we summarize our recent work focusing on the growth, crystallization, and device operation of organic semiconductors intermediated by ultrathin organic films (in most cases, only a monolayer). The site-selective growth, modified crystallization and morphology, and improved device performance of organic semiconductor films are demonstrated with the help of the inducing layers, including patterned and uniform Langmuir-Blodgett monolayers, crystalline ultrathin organic films, and self-assembled polymer brush films. The introduction of the inducing layers could dramatically change the diffusion of the organic semiconductors on the surface and the interactions between the active layer with the inducing layer, leading to improved aggregation/crystallization behavior and device performance.
Welch, James D.
2000-01-01
Disclosed are semiconductor systems, such as integrated circuits utilizing Schotky barrier and/or diffused junction technology, which semiconductor systems incorporate material(s) that form rectifying junctions in both metallurgically and/or field induced N and P-type doping regions, and methods of their use. Disclosed are Schottky barrier based inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems and which can be operated as modulators, N and P-channel MOSFETS and CMOS formed therefrom, and (MOS) gate voltage controlled rectification direction and gate voltage controlled switching devices, and use of such material(s) to block parasitic current flow pathways. Simple demonstrative five mask fabrication procedures for inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems are also presented.
Photoelectrochemical cell including Ga(Sb.sub.x)N.sub.1-x semiconductor electrode
Menon, Madhu; Sheetz, Michael; Sunkara, Mahendra Kumar; Pendyala, Chandrashekhar; Sunkara, Swathi; Jasinski, Jacek B.
2017-09-05
The composition of matter comprising Ga(Sb.sub.x)N.sub.1-x where x=0.01 to 0.06 is characterized by a band gap between 2.4 and 1.7 eV. A semiconductor device includes a semiconductor layer of that composition. A photoelectric cell includes that semiconductor device.
Monolithic integrated high-T.sub.c superconductor-semiconductor structure
NASA Technical Reports Server (NTRS)
Barfknecht, Andrew T. (Inventor); Garcia, Graham A. (Inventor); Russell, Stephen D. (Inventor); Burns, Michael J. (Inventor); de la Houssaye, Paul R. (Inventor); Clayton, Stanley R. (Inventor)
2000-01-01
A method for the fabrication of active semiconductor and high-temperature superconducting device of the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.
A new approximation of Fermi-Dirac integrals of order 1/2 for degenerate semiconductor devices
NASA Astrophysics Data System (ADS)
AlQurashi, Ahmed; Selvakumar, C. R.
2018-06-01
There had been tremendous growth in the field of Integrated circuits (ICs) in the past fifty years. Scaling laws mandated both lateral and vertical dimensions to be reduced and a steady increase in doping densities. Most of the modern semiconductor devices have invariably heavily doped regions where Fermi-Dirac Integrals are required. Several attempts have been devoted to developing analytical approximations for Fermi-Dirac Integrals since numerical computations of Fermi-Dirac Integrals are difficult to use in semiconductor devices, although there are several highly accurate tabulated functions available. Most of these analytical expressions are not sufficiently suitable to be employed in semiconductor device applications due to their poor accuracy, the requirement of complicated calculations, and difficulties in differentiating and integrating. A new approximation has been developed for the Fermi-Dirac integrals of the order 1/2 by using Prony's method and discussed in this paper. The approximation is accurate enough (Mean Absolute Error (MAE) = 0.38%) and easy enough to be used in semiconductor device equations. The new approximation of Fermi-Dirac Integrals is applied to a more generalized Einstein Relation which is an important relation in semiconductor devices.
NASA Technical Reports Server (NTRS)
Price, W. E.; Martin, K. E.; Nichols, D. K.; Gauthier, M. K.; Brown, S. F.
1981-01-01
Steady-state, total-dose radiation test data are provided in graphic format, for use by electronic designers and other personnel using semiconductor devices in a radiation environment. Data are presented by JPL for various NASA space programs on diodes, bipolar transistors, field effect transistors, silicon-controlled rectifiers, and optical devices. A vendor identification code list is included along with semiconductor device electrical parameter symbols and abbreviations.
NASA Astrophysics Data System (ADS)
Kodzasa, Takehito; Nobeshima, Daiki; Kuribara, Kazunori; Uemura, Sei; Yoshida, Manabu
2017-04-01
We propose a new concept of a pressure-sensitive device that consists of an organic electret film and an organic semiconductor. This device exhibits high sensitivity and selectivity against various types of pressure. The sensing mechanism of this device originates from a modulation of the electric conductivity of the organic semiconductor film induced by the interaction between the semiconductor film and the charged electret film placed face to face. It is expected that a complicated sensor array will be fabricated by using a roll-to-roll manufacturing system, because this device can be prepared by an all-printing and simple lamination process without high-level positional adjustment for printing processes. This also shows that this device with a simple structure is suitable for application to a highly flexible device array sheet for an Internet of Things (IoT) or wearable sensing system.
Semiconductor-based, large-area, flexible, electronic devices
Goyal, Amit [Knoxville, TN
2011-03-15
Novel articles and methods to fabricate the same resulting in flexible, large-area, triaxially textured, single-crystal or single-crystal-like, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.
Semiconductor-based, large-area, flexible, electronic devices on {110}<100> oriented substrates
Goyal, Amit
2014-08-05
Novel articles and methods to fabricate the same resulting in flexible, oriented, semiconductor-based, electronic devices on {110}<100> textured substrates are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.
[100] or [110] aligned, semiconductor-based, large-area, flexible, electronic devices
Goyal, Amit
2015-03-24
Novel articles and methods to fabricate the same resulting in flexible, large-area, [100] or [110] textured, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.
Processes for multi-layer devices utilizing layer transfer
Nielson, Gregory N; Sanchez, Carlos Anthony; Tauke-Pedretti, Anna; Kim, Bongsang; Cederberg, Jeffrey; Okandan, Murat; Cruz-Campa, Jose Luis; Resnick, Paul J
2015-02-03
A method includes forming a release layer over a donor substrate. A plurality of devices made of a first semiconductor material are formed over the release layer. A first dielectric layer is formed over the plurality of devices such that all exposed surfaces of the plurality of devices are covered by the first dielectric layer. The plurality of devices are chemically attached to a receiving device made of a second semiconductor material different than the first semiconductor material, the receiving device having a receiving substrate attached to a surface of the receiving device opposite the plurality of devices. The release layer is etched to release the donor substrate from the plurality of devices. A second dielectric layer is applied over the plurality of devices and the receiving device to mechanically attach the plurality of devices to the receiving device.
Photovoltaic healing of non-uniformities in semiconductor devices
Karpov, Victor G.; Roussillon, Yann; Shvydka, Diana; Compaan, Alvin D.; Giolando, Dean M.
2006-08-29
A method of making a photovoltaic device using light energy and a solution to normalize electric potential variations in the device. A semiconductor layer having nonuniformities comprising areas of aberrant electric potential deviating from the electric potential of the top surface of the semiconductor is deposited onto a substrate layer. A solution containing an electrolyte, at least one bonding material, and positive and negative ions is applied over the top surface of the semiconductor. Light energy is applied to generate photovoltage in the semiconductor, causing a redistribution of the ions and the bonding material to the areas of aberrant electric potential. The bonding material selectively bonds to the nonuniformities in a manner such that the electric potential of the nonuniformities is normalized relative to the electric potential of the top surface of the semiconductor layer. A conductive electrode layer is then deposited over the top surface of the semiconductor layer.
Goyal, Amit [Knoxville, TN
2012-05-15
Novel articles and methods to fabricate the same resulting in flexible, {100}<100> or 45.degree.-rotated {100}<100> oriented, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.
NASA Astrophysics Data System (ADS)
Guo, Zhen; Pan, Haixi; Li, Chuanyu; Zhang, Lili; Yan, Shuai; Zhang, Wei; Yao, Jia; Tang, Yuguo; Yang, Hongbo; Wu, Yihui; Feng, Liping; Zhou, Lianqun
2017-08-01
Carrier generation, transport, separation, and recombination behaviors can be modulated for improving the performance of semiconductor devices by using piezotronic and piezo-phototronic effects with creating piezopotential in crystals based on non-centrosymmetric semiconductor materials such as group II-VI and III-V semiconductors and transition metal dichalcogenides (TMDCs), which have emerged as attractive materials for electronic/photonic applications because of their novel properties. Until now, much effort has been devoted to improving the performance of devices based on the aforementioned materials through modulation of the carrier behavior. However, due to existing drawbacks, it has been difficult to further enhance the device performance for a built structure. However, effective exploration of the piezotronic and piezo-phototronic effects in these semiconducting materials could pave the way to the realization of high-performance devices. In general, the effective modulation of carrier behavior dynamically in devices such as light-emitting diodes, photodetectors, solar cells, nanogenerators, and so on, remains a key challenge. Due to the polarization of ions in semiconductor materials with noncentral symmetry under external strain, a piezopotential is created considering piezotronic and piezo-photoronic effects, which could dynamically modulate charge carrier transport behaviors across p-n junctions or metal-semiconductor interfaces. Through a combination of these effects and semiconductor properties, the performance of the related devices could be improved and new types of devices such as piezoelectric field-effect transistors and sensors have emerged, with potential applications in self-driven devices for effective energy harvesting and biosensing with high sensitivity, which are different from those traditionally designed and may have potential applications in strained triggered devices. The objective of this review is to briefly introduce the corresponding mechanisms for modulating carrier behavior on the basis of piezotronic and piezo-phototronic effects in materials such as group II-VI and group III-V semiconductors and TMDCs, as well as to discuss possible solutions to effectively enhance the performance of the devices via carrier modulation.
Solid state photosensitive devices which employ isolated photosynthetic complexes
Peumans, Peter; Forrest, Stephen R.
2009-09-22
Solid state photosensitive devices including photovoltaic devices are provided which comprise a first electrode and a second electrode in superposed relation; and at least one isolated Light Harvesting Complex (LHC) between the electrodes. Preferred photosensitive devices comprise an electron transport layer formed of a first photoconductive organic semiconductor material, adjacent to the LHC, disposed between the first electrode and the LHC; and a hole transport layer formed of a second photoconductive organic semiconductor material, adjacent to the LHC, disposed between the second electrode and the LHC. Solid state photosensitive devices of the present invention may comprise at least one additional layer of photoconductive organic semiconductor material disposed between the first electrode and the electron transport layer; and at least one additional layer of photoconductive organic semiconductor material, disposed between the second electrode and the hole transport layer. Methods of generating photocurrent are provided which comprise exposing a photovoltaic device of the present invention to light. Electronic devices are provided which comprise a solid state photosensitive device of the present invention.
Method for making a monolithic integrated high-T.sub.c superconductor-semiconductor structure
NASA Technical Reports Server (NTRS)
Burns, Michael J. (Inventor); de la Houssaye, Paul R. (Inventor); Russell, Stephen D. (Inventor); Garcia, Graham A. (Inventor); Barfknecht, Andrew T. (Inventor); Clayton, Stanley R. (Inventor)
2000-01-01
A method for the fabrication of active semiconductor and high-temperature perconducting devices on the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.
Tapered rib fiber coupler for semiconductor optical devices
Vawter, Gregory A.; Smith, Robert Edward
2001-01-01
A monolithic tapered rib waveguide for transformation of the spot size of light between a semiconductor optical device and an optical fiber or from the fiber into the optical device. The tapered rib waveguide is integrated into the guiding rib atop a cutoff mesa type semiconductor device such as an expanded mode optical modulator or and expanded mode laser. The tapered rib acts to force the guided light down into the mesa structure of the semiconductor optical device instead of being bound to the interface between the bottom of the guiding rib and the top of the cutoff mesa. The single mode light leaving or entering the output face of the mesa structure then can couple to the optical fiber at coupling losses of 1.0 dB or less.
Silicon superlattices: Theory and application to semiconductor devices
NASA Technical Reports Server (NTRS)
Moriarty, J. A.
1981-01-01
Silicon superlattices and their applicability to improved semiconductor devices were studied. The device application potential of the atomic like dimension of III-V semiconductor superlattices fabricated in the form of ultrathin periodically layered heterostructures was examined. Whether this leads to quantum size effects and creates the possibility to alter familiar transport and optical properties over broad physical ranges was studied. Applications to improved semiconductor lasers and electrondevices were achieved. Possible application of silicon sperlattices to faster high speed computing devices was examined. It was found that the silicon lattices show features of smaller fundamental energyband gaps and reduced effective masses. The effects correlate strongly with both the chemical and geometrical nature of the superlattice.
Spahn, Olga B.; Lear, Kevin L.
1998-01-01
A semiconductor structure. The semiconductor structure comprises a plurality of semiconductor layers formed on a substrate including at least one layer of a III-V compound semiconductor alloy comprising aluminum (Al) and antimony (Sb), with at least a part of the AlSb-alloy layer being chemically converted by an oxidation process to form superposed electrically insulating and electrically conducting portions. The electrically insulating portion formed from the AlSb-alloy layer comprises an oxide of aluminum (e.g. Al.sub.2 O.sub.3), while the electrically conducting portion comprises Sb. A lateral oxidation process allows formation of the superposed insulating and conducting portions below monocrystalline semiconductor layers for forming many different types of semiconductor structures having particular utility for optoelectronic devices such as light-emitting diodes, edge-emitting lasers, vertical-cavity surface-emitting lasers, photodetectors and optical modulators (waveguide and surface normal), and for electronic devices such as heterojunction bipolar transistors, field-effect transistors and quantum-effect devices. The invention is expected to be particularly useful for forming light-emitting devices for use in the 1.3-1.6 .mu.m wavelength range, with the AlSb-alloy layer acting to define an active region of the device and to effectively channel an electrical current therein for efficient light generation.
Evolution of corundum-structured III-oxide semiconductors: Growth, properties, and devices
NASA Astrophysics Data System (ADS)
Fujita, Shizuo; Oda, Masaya; Kaneko, Kentaro; Hitora, Toshimi
2016-12-01
The recent progress and development of corundum-structured III-oxide semiconductors are reviewed. They allow bandgap engineering from 3.7 to ∼9 eV and function engineering, leading to highly durable electronic devices and deep ultraviolet optical devices as well as multifunctional devices. Mist chemical vapor deposition can be a simple and safe growth technology and is advantageous for reducing energy and cost for the growth. This is favorable for the wide commercial use of devices at low cost. The III-oxide semiconductors are promising candidates for new devices contributing to sustainable social, economic, and technological development for the future.
NASA Technical Reports Server (NTRS)
Park, Yeonjoon (Inventor); Choi, Sang H. (Inventor); King, Glen C. (Inventor)
2011-01-01
Hetero-epitaxial semiconductor materials comprising cubic crystalline semiconductor alloys grown on the basal plane of trigonal and hexagonal substrates, in which misfit dislocations are reduced by approximate lattice matching of the cubic crystal structure to underlying trigonal or hexagonal substrate structure, enabling the development of alloyed semiconductor layers of greater thickness, resulting in a new class of semiconductor materials and corresponding devices, including improved hetero-bipolar and high-electron mobility transistors, and high-mobility thermoelectric devices.
Interconnected semiconductor devices
Grimmer, Derrick P.; Paulson, Kenneth R.; Gilbert, James R.
1990-10-23
Semiconductor layer and conductive layer formed on a flexible substrate, divided into individual devices and interconnected with one another in series by interconnection layers and penetrating terminals.
Room-temperature semiconductor heterostructure refrigeration
NASA Astrophysics Data System (ADS)
Chao, K. A.; Larsson, Magnus; Mal'shukov, A. G.
2005-07-01
With the proper design of semiconductor tunneling barrier structures, we can inject low-energy electrons via resonant tunneling, and take out high-energy electrons via a thermionic process. This is the operation principle of our semiconductor heterostructure refrigerator (SHR) without the need of applying a temperature gradient across the device. Even for the bad thermoelectric material AlGaAs, our calculation shows that at room temperature, the SHR can easily lower the temperature by 5-7K. Such devices can be fabricated with the present semiconductor technology. Besides its use as a kitchen refrigerator, the SHR can efficiently cool microelectronic devices.
Welch, James D.
2003-09-23
Disclosed are semiconductor devices including at least one junction which is rectifying whether the semiconductor is caused to be N or P-type, by the presence of applied gate voltage field induced carriers in essentially intrinsic, essentially homogeneously simultaneously containing both N and P-type metallurgical dopants at substantially equal doping levels, essentially homogeneously simultaneously containing both N and P-type metallurgical dopants at different doping levels, and containing a single metallurgical doping type, and functional combinations thereof. In particular, inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to conventional multiple device CMOS systems, which can be operated as modulators, are disclosed as are a non-latching SCR and an approach to blocking parasitic currents utilizing material(s) which form rectifying junctions with both N and P-type semiconductor whether metallurigically or field induced.
A Thermal and Electrical Analysis of Power Semiconductor Devices
NASA Technical Reports Server (NTRS)
Vafai, Kambiz
1997-01-01
The state-of-art power semiconductor devices require a thorough understanding of the thermal behavior for these devices. Traditional thermal analysis have (1) failed to account for the thermo-electrical interaction which is significant for power semiconductor devices operating at high temperature, and (2) failed to account for the thermal interactions among all the levels involved in, from the entire device to the gate micro-structure. Furthermore there is a lack of quantitative studies of the thermal breakdown phenomenon which is one of the major failure mechanisms for power electronics. This research work is directed towards addressing. Using a coupled thermal and electrical simulation, in which the drift-diffusion equations for the semiconductor and the energy equation for temperature are solved simultaneously, the thermo-electrical interactions at the micron scale of various junction structures are thoroughly investigated. The optimization of gate structure designs and doping designs is then addressed. An iterative numerical procedure which incorporates the thermal analysis at the device, chip and junction levels of the power device is proposed for the first time and utilized in a BJT power semiconductor device. In this procedure, interactions of different levels are fully considered. The thermal stability issue is studied both analytically and numerically in this research work in order to understand the mechanism for thermal breakdown.
Guha, Subhendu; Ovshinsky, Stanford R.
1988-10-04
An n-type microcrystalline semiconductor alloy material including a band gap widening element; a method of fabricating p-type microcrystalline semiconductor alloy material including a band gap widening element; and electronic and photovoltaic devices incorporating said n-type and p-type materials.
neutron-Induced Failures in semiconductor Devices
DOE Office of Scientific and Technical Information (OSTI.GOV)
Wender, Stephen Arthur
2017-03-13
Single Event Effects are a very significant failure mode in modern semiconductor devices that may limit their reliability. Accelerated testing is important for semiconductor industry. Considerable more work is needed in this field to mitigate the problem. Mitigation of this problem will probably come from Physicists and Electrical Engineers working together
Federal Register 2010, 2011, 2012, 2013, 2014
2012-05-01
... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-840] Certain Semiconductor Integrated Circuit... States after importation of certain semiconductor integrated circuit devices and products containing same... No. 6,847,904 (``the '904 patent''). The complaint further alleges that an industry in the United...
NASA Astrophysics Data System (ADS)
Henderson, Gregory Newell
Semiconductor device dimensions are rapidly approaching a fundamental limit where drift-diffusion equations and the depletion approximation are no longer valid. In this regime, quantum effects can dominate device response. To increase further device density and speed, new devices must be designed that use these phenomena to positive advantage. In addition, quantum effects provide opportunities for a new class of devices which can perform functions previously unattainable with "conventional" semiconductor devices. This thesis has described research in the analysis of electron wave effects in semiconductors and the development of methods for the design, fabrication, and characterization of quantum devices based on these effects. First, an exact set of quantitative analogies are presented which allow the use of well understood optical design and analysis tools for the development of electron wave semiconductor devices. Motivated by these analogies, methods are presented for modeling electron wave grating diffraction using both an exact rigorous coupled-wave analysis and approximate analyses which are useful for grating design. Example electron wave grating switch and multiplexer designs are presented. In analogy to thin-film optics, the design and analysis of electron wave Fabry-Perot interference filters are also discussed. An innovative technique has been developed for testing these (and other) electron wave structures using Ballistic Electron Emission Microscopy (BEEM). This technique uses a liquid-helium temperature scanning tunneling microscope (STM) to perform spectroscopy of the electron transmittance as a function of electron energy. Experimental results show that BEEM can resolve even weak quantum effects, such as the reflectivity of a single interface between materials. Finally, methods are discussed for incorporating asymmetric electron wave Fabry-Perot filters into optoelectronic devices. Theoretical and experimental results show that such structures could be the basis for a new type of electrically pumped mid - to far-infrared semiconductor laser.
Electric field induced spin-polarized current
Murakami, Shuichi; Nagaosa, Naoto; Zhang, Shoucheng
2006-05-02
A device and a method for generating an electric-field-induced spin current are disclosed. A highly spin-polarized electric current is generated using a semiconductor structure and an applied electric field across the semiconductor structure. The semiconductor structure can be a hole-doped semiconductor having finite or zero bandgap or an undoped semiconductor of zero bandgap. In one embodiment, a device for injecting spin-polarized current into a current output terminal includes a semiconductor structure including first and second electrodes, along a first axis, receiving an applied electric field and a third electrode, along a direction perpendicular to the first axis, providing the spin-polarized current. The semiconductor structure includes a semiconductor material whose spin orbit coupling energy is greater than room temperature (300 Kelvin) times the Boltzmann constant. In one embodiment, the semiconductor structure is a hole-doped semiconductor structure, such as a p-type GaAs semiconductor layer.
Liquid crystal cells with built-in CdSe nanotubes for chromogenic smart emission devices.
Lin, Tsung Ju; Chen, Chin-Chang; Cheng, Soofin; Chen, Yang Fang
2008-01-21
A simple and general approach for controlling optical anisotropy of nanostructured semiconductors is reported. Our design involves the fabrication of liquid crystal devices with built-in semiconductor nanotubes. Quite interestingly, it is found that semiconductor nanotubes can be well aligned along the orientation of liquid crystals molecules automatically, resulting in a very large emission anisotropy with the degree of polarization up to 72%. This intriguing result manifests a way to obtain well aligned semiconductor nanotubes and the emission anisotropy can be easily manipulated by an external bias. The ability to well control the emission anisotropy should open up new opportunities for nanostructured semiconductors, including optical filters, polarized light emitting diodes, flat panel displays, and many other chromogenic smart devices.
Semiconductor with protective surface coating and method of manufacture thereof. [Patent application
Hansen, W.L.; Haller, E.E.
1980-09-19
Passivation of predominantly crystalline semiconductor devices is provided for by a surface coating of sputtered hydrogenated amorphous semiconductor material. Passivation of a radiation detector germanium diode, for example, is realized by sputtering a coating of amorphous germanium onto the etched and quenched diode surface in a low pressure atmosphere of hydrogen and argon. Unlike prior germanium diode semiconductor devices, which must be maintained in vacuum at cryogenic temperatures to avoid deterioration, a diode processed in the described manner may be stored in air at room temperature or otherwise exposed to a variety of environmental conditions. The coating compensates for pre-existing undesirable surface states as well as protecting the semiconductor device against future impregnation with impurities.
NASA Astrophysics Data System (ADS)
Chen, Z.; Harris, V. G.
2012-10-01
It is widely recognized that as electronic systems' operating frequency shifts to microwave and millimeter wave bands, the integration of ferrite passive devices with semiconductor solid state active devices holds significant advantages in improved miniaturization, bandwidth, speed, power and production costs, among others. Traditionally, ferrites have been employed in discrete bulk form, despite attempts to integrate ferrite as films within microwave integrated circuits. Technical barriers remain centric to the incompatibility between ferrite and semiconductor materials and their processing protocols. In this review, we present past and present efforts at ferrite integration with semiconductor platforms with the aim to identify the most promising paths to realizing the complete integration of on-chip ferrite and semiconductor devices, assemblies and systems.
Growth of coincident site lattice matched semiconductor layers and devices on crystalline substrates
Norman, Andrew G; Ptak, Aaron J
2013-08-13
Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a substrate having a crystalline surface with a known lattice parameter (a). The method further includes growing a crystalline semiconductor layer on the crystalline substrate surface by coincident site lattice matched epitaxy, without any buffer layer between the crystalline semiconductor layer and the crystalline surface of the substrate. The crystalline semiconductor layer will be prepared to have a lattice parameter (a') that is related to the substrate lattice parameter (a). The lattice parameter (a') maybe related to the lattice parameter (a) by a scaling factor derived from a geometric relationship between the respective crystal lattices.
Sherohman, John W [Livermore, CA; Coombs, III, Arthur W.; Yee, Jick Hong [Livermore, CA; Wu, Kuang Jen J [Cupertino, CA
2007-05-29
For the first time, an aluminum antimonide (AlSb) single crystal substrate is utilized to lattice-match to overlying semiconductor layers. The AlSb substrate establishes a new design and fabrication approach to construct high-speed, low-power electronic devices while establishing inter-device isolation. Such lattice matching between the substrate and overlying semiconductor layers minimizes the formation of defects, such as threaded dislocations, which can decrease the production yield and operational life-time of 6.1-.ANG. family heterostructure devices.
Architectures for Improved Organic Semiconductor Devices
NASA Astrophysics Data System (ADS)
Beck, Jonathan H.
Advancements in the microelectronics industry have brought increasing performance and decreasing prices to a wide range of users. Conventional silicon-based electronics have followed Moore's law to provide an ever-increasing integrated circuit transistor density, which drives processing power, solid-state memory density, and sensor technologies. As shrinking conventional integrated circuits became more challenging, researchers began exploring electronics with the potential to penetrate new applications with a low price of entry: "Electronics everywhere." The new generation of electronics is thin, light, flexible, and inexpensive. Organic electronics are part of the new generation of thin-film electronics, relying on the synthetic flexibility of carbon molecules to create organic semiconductors, absorbers, and emitters which perform useful tasks. Organic electronics can be fabricated with low energy input on a variety of novel substrates, including inexpensive plastic sheets. The potential ease of synthesis and fabrication of organic-based devices means that organic electronics can be made at very low cost. Successfully demonstrated organic semiconductor devices include photovoltaics, photodetectors, transistors, and light emitting diodes. Several challenges that face organic semiconductor devices are low performance relative to conventional devices, long-term device stability, and development of new organic-compatible processes and materials. While the absorption and emission performance of organic materials in photovoltaics and light emitting diodes is extraordinarily high for thin films, the charge conduction mobilities are generally low. Building highly efficient devices with low-mobility materials is one challenge. Many organic semiconductor films are unstable during fabrication, storage, and operation due to reactions with water, oxygen and hydroxide. A final challenge facing organic electronics is the need for new processes and materials for electrodes, semiconductors and substrates compatible with low-temperature, flexible, and oxygenated and aromatic solvent-free fabrication. Materials and processes must be capable of future high volume production in order to enable low costs. In this thesis we explore several techniques to improve organic semiconductor device performance and enable new fabrication processes. In Chapter 2, I describe the integration of sub-optical-wavelength nanostructured electrodes that improve fill factor and power conversion efficiency in organic photovoltaic devices. Photovoltaic fill factor performance is one of the primary challenges facing organic photovoltaics because most organic semiconductors have poor charge mobility. Our electrical and optical measurements and simulations indicate that nanostructured electrodes improve charge extraction in organic photovoltaics. In Chapter 3, I describe a general method for maximizing the efficiency of organic photovoltaic devices by simultaneously optimizing light absorption and charge carrier collection. We analyze the potential benefits of light trapping strategies for maximizing the overall power conversion efficiency of organic photovoltaic devices. This technique may be used to improve organic photovoltaic materials with low absorption, or short exciton diffusion and carrier-recombination lengths, opening up the device design space. In Chapter 4, I describe a process for high-quality graphene transfer onto chemically sensitive, weakly interacting organic semiconductor thin-films. Graphene is a promising flexible and highly transparent electrode for organic electronics; however, transferring graphene films onto organic semiconductor devices was previously impossible. We demonstrate a new transfer technique based on an elastomeric stamp coated with an fluorinated polymer release layer. We fabricate three classes of organic semiconductor devices: field effect transistors without high temperature annealing, transparent organic light-emitting diodes, and transparent small-molecule organic photovoltaic devices.
Memory effects in a Al/Ti:HfO2/CuPc metal-oxide-semiconductor device
NASA Astrophysics Data System (ADS)
Tripathi, Udbhav; Kaur, Ramneek
2016-05-01
Metal oxide semiconductor structured organic memory device has been successfully fabricated. Ti doped hafnium oxide (Ti:HfO2) nanoparticles has been fabricated by precipitation method and further calcinated at 800 °C. Copper phthalocyanine, a hole transporting material has been utilized as an organic semiconductor. The electrical properties of the fabricated device have been studied by measuring the current-voltage and capacitance-voltage characteristics. The amount of charge stored in the nanoparticles has been calculated by using flat band condition. This simple approach for fabricating MOS memory device has opens up opportunities for the development of next generation memory devices.
Porous silicon carbide (SiC) semiconductor device
NASA Technical Reports Server (NTRS)
Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)
1994-01-01
A semiconductor device employs at least one layer of semiconducting porous silicon carbide (SiC). The porous SiC layer has a monocrystalline structure wherein the pore sizes, shapes, and spacing are determined by the processing conditions. In one embodiment, the semiconductor device is a p-n junction diode in which a layer of n-type SiC is positioned on a p-type layer of SiC, with the p-type layer positioned on a layer of silicon dioxide. Because of the UV luminescent properties of the semiconducting porous SiC layer, it may also be utilized for other devices such as LEDs and optoelectronic devices.
Over-voltage protection system and method
DOE Office of Scientific and Technical Information (OSTI.GOV)
Chi, Song; Dong, Dong; Lai, Rixin
An over-voltage protection system includes an electronic valve connected across two terminals of a circuit and an over-voltage detection circuit connected across one of the plurality of semiconductor devices for detecting an over-voltage across the circuit. The electronic valve includes a plurality of semiconductor devices connected in series. The over-voltage detection circuit includes a voltage divider circuit connected to a break-over diode in a way to provide a representative low voltage to the break-over diode and an optocoupler configured to receive a current from the break-over diode when the representative low voltage exceeds a threshold voltage of the break-over diodemore » indicating an over-voltage condition. The representative low voltage provided to the break-over diode represents a voltage across the one semiconductor device. A plurality of self-powered gate drive circuits are connected to the plurality of semiconductor devices, wherein the plurality of self-powered gate drive circuits receive over-voltage triggering pulses from the optocoupler during the over-voltage condition and switch on the plurality of semiconductor devices to bypass the circuit.« less
The preparation method of terahertz monolithic integrated device
NASA Astrophysics Data System (ADS)
Zhang, Cong; Su, Bo; He, Jingsuo; Zhang, Hongfei; Wu, Yaxiong; Zhang, Shengbo; Zhang, Cunlin
2018-01-01
The terahertz monolithic integrated device is to integrate the pumping area of the terahertz generation, the detection area of the terahertz receiving and the metal waveguide of terahertz transmission on the same substrate. The terahertz generation and detection device use a photoconductive antenna structure the metal waveguide use a microstrip line structure. The evanescent terahertz-bandwidth electric field extending above the terahertz transmission line interacts with, and is modified by, overlaid dielectric samples, thus enabling the characteristic vibrational absorption resonances in the sample to be probed. In this device structure, since the semiconductor substrate of the photoconductive antenna is located between the strip conductor and the dielectric layer of the microstrip line, and the semiconductor substrate cannot grow on the dielectric layer directly. So how to prepare the semiconductor substrate of the photoconductive antenna and how to bond the semiconductor substrate to the dielectric layer of the microstrip line is a key step in the terahertz monolithic integrated device. In order to solve this critical problem, the epitaxial wafer structure of the two semiconductor substrates is given and transferred to the desired substrate by two methods, respectively.
Interconnect assembly for an electronic assembly and assembly method therefor
Gerbsch, Erich William
2003-06-10
An interconnect assembly and method for a semiconductor device, in which the interconnect assembly can be used in lieu of wirebond connections to form an electronic assembly. The interconnect assembly includes first and second interconnect members. The first interconnect member has a first surface with a first contact and a second surface with a second contact electrically connected to the first contact, while the second interconnect member has a flexible finger contacting the second contact of the first interconnect member. The first interconnect member is adapted to be aligned and registered with a semiconductor device having a contact on a first surface thereof, so that the first contact of the first interconnect member electrically contacts the contact of the semiconductor device. Consequently, the assembly method does not require any wirebonds, but instead merely entails aligning and registering the first interconnect member with the semiconductor device so that the contacts of the first interconnect member and the semiconductor device make electrically contact, and then contacting the second contact of the first interconnect member with the flexible finger of the second interconnect member.
NASA Astrophysics Data System (ADS)
Kumar, Sandeep; Iyer, S. Sundar Kumar
2017-04-01
Accurate and convenient evaluation methods of the interfacial barrier ϕb for charge carriers in metal semiconductor (MS) junctions are important for designing and building better opto-electronic devices. This becomes more critical for organic semiconductor devices where a plethora of molecules are in use and standardised models applicable to myriads of material combinations for the different devices may have limited applicability. In this paper, internal photoemission (IPE) from spectral response (SR) in the ultra-violet to near infra-red range of different MS junctions of metal-organic semiconductor-metal (MSM) test structures is used to determine more realistic MS ϕb values. The representative organic semiconductor considered is [6, 6]-phenyl C61 butyric acid methyl ester, and the metals considered are Al and Au. The IPE signals in the SR measurement of the MSM device are identified and separated before it is analysed to estimate ϕb for the MS junction. The analysis of IPE signals under different bias conditions allows the evaluation of ϕb for both the front and back junctions, as well as for symmetric MSM devices.
Method for fabricating an interconnected array of semiconductor devices
Grimmer, Derrick P.; Paulson, Kenneth R.; Gilbert, James R.
1989-10-10
Semiconductor layer and conductive layer formed on a flexible substrate, divided into individual devices and interconnected with one another in series by interconnection layers and penetrating terminals.
Methods of Measurement for Semiconductor Materials, Process Control, and Devices
NASA Technical Reports Server (NTRS)
Bullis, W. M. (Editor)
1973-01-01
The development of methods of measurement for semiconductor materials, process control, and devices is reported. Significant accomplishments include: (1) Completion of an initial identification of the more important problems in process control for integrated circuit fabrication and assembly; (2) preparations for making silicon bulk resistivity wafer standards available to the industry; and (3) establishment of the relationship between carrier mobility and impurity density in silicon. Work is continuing on measurement of resistivity of semiconductor crystals; characterization of generation-recombination-trapping centers, including gold, in silicon; evaluation of wire bonds and die attachment; study of scanning electron microscopy for wafer inspection and test; measurement of thermal properties of semiconductor devices; determination of S-parameters and delay time in junction devices; and characterization of noise and conversion loss of microwave detector diodes.
Spahn, O.B.; Lear, K.L.
1998-03-10
The semiconductor structure comprises a plurality of semiconductor layers formed on a substrate including at least one layer of a III-V compound semiconductor alloy comprising aluminum (Al) and antimony (Sb), with at least a part of the AlSb-alloy layer being chemically converted by an oxidation process to form superposed electrically insulating and electrically conducting portions. The electrically insulating portion formed from the AlSb-alloy layer comprises an oxide of aluminum (e.g., Al{sub 2}O{sub 3}), while the electrically conducting portion comprises Sb. A lateral oxidation process allows formation of the superposed insulating and conducting portions below monocrystalline semiconductor layers for forming many different types of semiconductor structures having particular utility for optoelectronic devices such as light-emitting diodes, edge-emitting lasers, vertical-cavity surface-emitting lasers, photodetectors and optical modulators (waveguide and surface normal), and for electronic devices such as heterojunction bipolar transistors, field-effect transistors and quantum-effect devices. The invention is expected to be particularly useful for forming light-emitting devices for use in the 1.3--1.6 {mu}m wavelength range, with the AlSb-alloy layer acting to define an active region of the device and to effectively channel an electrical current therein for efficient light generation. 10 figs.
Optical processing for semiconductor device fabrication
NASA Technical Reports Server (NTRS)
Sopori, Bhushan L.
1994-01-01
A new technique for semiconductor device processing is described that uses optical energy to produce local heating/melting in the vicinity of a preselected interface of the device. This process, called optical processing, invokes assistance of photons to enhance interface reactions such as diffusion and melting, as compared to the use of thermal heating alone. Optical processing is performed in a 'cold wall' furnace, and requires considerably lower energies than furnace or rapid thermal annealing. This technique can produce some device structures with unique properties that cannot be produced by conventional thermal processing. Some applications of optical processing involving semiconductor-metal interfaces are described.
New developments in power semiconductors
NASA Technical Reports Server (NTRS)
Sundberg, G. R.
1983-01-01
This paper represents an overview of some recent power semiconductor developments and spotlights new technologies that may have significant impact for aircraft electric secondary power. Primary emphasis will be on NASA-Lewis-supported developments in transistors, diodes, a new family of semiconductors, and solid-state remote power controllers. Several semiconductor companies that are moving into the power arena with devices rated at 400 V and 50 A and above are listed, with a brief look at a few devices.
Semiconductor devices incorporating multilayer interference regions
Biefeld, Robert M.; Drummond, Timothy J.; Gourley, Paul L.; Zipperian, Thomas E.
1990-01-01
A semiconductor high reflector comprising a number of thin alternating layers of semiconductor materials is electrically tunable and may be used as a temperature insensitive semiconductor laser in a Fabry-Perot configuration.
Thin film photovoltaic device with multilayer substrate
Catalano, Anthony W.; Bhushan, Manjul
1984-01-01
A thin film photovoltaic device which utilizes at least one compound semiconductor layer chosen from Groups IIB and VA of the Periodic Table is formed on a multilayer substrate The substrate includes a lowermost support layer on which all of the other layers of the device are formed. Additionally, an uppermost carbide or silicon layer is adjacent to the semiconductor layer. Below the carbide or silicon layer is a metal layer of high conductivity and expansion coefficient equal to or slightly greater than that of the semiconductor layer.
Multi-harmonic quantum dot optomechanics in fused LiNbO3-(Al)GaAs hybrids
NASA Astrophysics Data System (ADS)
Nysten, Emeline D. S.; Huo, Yong Heng; Yu, Hailong; Song, Guo Feng; Rastelli, Armando; Krenner, Hubert J.
2017-11-01
We fabricated an acousto-optic semiconductor hybrid device for strong optomechanical coupling of individual quantum emitters and a surface acoustic wave. Our device comprises of a surface acoustic wave chip made from highly piezoelectric LiNbO3 and a GaAs-based semiconductor membrane with an embedded layer of quantum dots. Employing multi-harmonic transducers, we generated sound waves on LiNbO3 over a wide range of radio frequencies. We monitored their coupling to and propagation across the semiconductor membrane, both in the electrical and optical domain. We demonstrate the enhanced optomechanical tuning of the embedded quantum dots with increasing frequencies. This effect was verified by finite element modelling of our device geometry and attributed to an increased localization of the acoustic field within the semiconductor membrane. For moderately high acoustic frequencies, our simulations predict strong optomechanical coupling, making our hybrid device ideally suited for applications in semiconductor based quantum acoustics.
Optical systems fabricated by printing-based assembly
Rogers, John; Nuzzo, Ralph; Meitl, Matthew; Menard, Etienne; Baca, Alfred J; Motala, Michael; Ahn, Jong-Hyun; Park, Sang-Il; Yu, Chang-Jae; Ko, Heung Cho; Stoykovich, Mark; Yoon, Jongseung
2014-05-13
Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.
Optical systems fabricated by printing-based assembly
Rogers, John [Champaign, IL; Nuzzo, Ralph [Champaign, IL; Meitl, Matthew [Durham, NC; Menard, Etienne [Durham, NC; Baca, Alfred J [Urbana, IL; Motala, Michael [Champaign, IL; Ahn, Jong-Hyun [Suwon, KR; Park, Sang-II [Savoy, IL; Yu,; Chang-Jae, [Urbana, IL; Ko, Heung-Cho [Gwangju, KR; Stoykovich,; Mark, [Dover, NH; Yoon, Jongseung [Urbana, IL
2011-07-05
Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.
Optical systems fabricated by printing-based assembly
Rogers, John; Nuzzo, Ralph; Meitl, Matthew; Menard, Etienne; Baca, Alfred; Motala, Michael; Ahn, Jong -Hyun; Park, Sang -Il; Yu, Chang -Jae; Ko, Heung Cho; Stoykovich, Mark; Yoon, Jongseung
2015-08-25
Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.
Optical systems fabricated by printing-based assembly
Rogers, John; Nuzzo, Ralph; Meitl, Matthew; Menard, Etienne; Baca, Alfred; Motala, Michael; Ahn, Jong-Hyun; Park, Sang-Il; Yu, Chang-Jae; Ko, Heung Cho; Stoykovich, Mark; Yoon, Jongseung
2017-03-21
Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.
NASA Astrophysics Data System (ADS)
Alivov, Yahya; Funke, Hans; Nagpal, Prashant
2015-07-01
Rapid miniaturization of electronic devices down to the nanoscale, according to Moore’s law, has led to some undesirable effects like high leakage current in transistors, which can offset additional benefits from scaling down. Development of three-dimensional transistors, by spatial extension in the third dimension, has allowed higher contact area with a gate electrode and better control over conductivity in the semiconductor channel. However, these devices do not utilize the large surface area and interfaces for new electronic functionality. Here, we demonstrate air gating and chemical gating in hollow semiconductor nanotube devices and highlight the potential for development of novel transistors that can be modulated using channel bias, gate voltage, chemical composition, and concentration. Using chemical gating, we reversibly altered the conductivity of nanoscaled semiconductor nanotubes (10-500 nm TiO2 nanotubes) by six orders of magnitude, with a tunable rectification factor (ON/OFF ratio) ranging from 1-106. While demonstrated air- and chemical-gating speeds were slow here (˜seconds) due to the mechanical-evacuation rate and size of our chamber, the small nanoscale volume of these hollow semiconductors can enable much higher switching speeds, limited by the rate of adsorption/desorption of molecules at semiconductor interfaces. These chemical-gating effects are completely reversible, additive between different chemical compositions, and can enable semiconductor nanoelectronic devices for ‘chemical transistors’, ‘chemical diodes’, and very high-efficiency sensing applications.
Semiconductor devices incorporating multilayer interference regions
Biefeld, R.M.; Drummond, T.J.; Gourley, P.L.; Zipperian, T.E.
1987-08-31
A semiconductor high reflector comprising a number of thin alternating layers of semiconductor materials is electrically tunable and may be used as a temperature insensitive semiconductor laser in a Fabry-Perot configuration. 8 figs.
Lattice matched semiconductor growth on crystalline metallic substrates
Norman, Andrew G; Ptak, Aaron J; McMahon, William E
2013-11-05
Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a metal or metal alloy substrate having a crystalline surface with a known lattice parameter (a). The methods further include growing a crystalline semiconductor alloy layer on the crystalline substrate surface by coincident site lattice matched epitaxy. The semiconductor layer may be grown without any buffer layer between the alloy and the crystalline surface of the substrate. The semiconductor alloy may be prepared to have a lattice parameter (a') that is related to the lattice parameter (a). The semiconductor alloy may further be prepared to have a selected band gap.
Federal Register 2010, 2011, 2012, 2013, 2014
2012-10-04
... Circuit Devices and Products Containing Same; Notice of Commission Determination Not To Review an Initial... public record for this investigation may be viewed on the Commission's electronic docket (EDIS) at http... certain semiconductor integrated circuit devices and products containing same by reason of infringement of...
Federal Register 2010, 2011, 2012, 2013, 2014
2012-03-29
... INTERNATIONAL TRADE COMMISSION [DN 2888] Certain Semiconductor Integrated Circuit Devices and... Integrated Circuit Devices and Products Containing Same, DN 2888; the Commission is soliciting comments on... Commission's electronic docket (EDIS) at http://edis.usitc.gov , and will be available for inspection during...
Non- contacting capacitive diagnostic device
Ellison, Timothy
2005-07-12
A non-contacting capacitive diagnostic device includes a pulsed light source for producing an electric field in a semiconductor or photovoltaic device or material to be evaluated and a circuit responsive to the electric field. The circuit is not in physical contact with the device or material being evaluated and produces an electrical signal characteristic of the electric field produced in the device or material. The diagnostic device permits quality control and evaluation of semiconductor or photovoltaic device properties in continuous manufacturing processes.
Methods of measurement for semiconductor materials, process control, and devices
NASA Technical Reports Server (NTRS)
Bullis, W. M. (Editor)
1972-01-01
Activities directed toward the development of methods of measurement for semiconductor materials, process control, and devices are described. Accomplishments include the determination of the reasons for differences in measurements of transistor delay time, identification of an energy level model for gold-doped silicon, and the finding of evidence that it does not appear to be necessary for an ultrasonic bonding tool to grip the wire and move it across the substrate metallization to make the bond. Work is continuing on measurement of resistivity of semiconductor crystals; study of gold-doped silicon; development of the infrared response technique; evaluation of wire bonds and die attachment; measurement of thermal properties of semiconductor devices, delay time, and related carrier transport properties in junction devices, and noise properties of microwave diodes; and characterization of silicon nuclear radiation detectors.
Insulator Charging in RF MEMS Capacitive Switches
2005-06-01
and Simulations,” Journal of Microelectromechanical Systems, 8: 208-217 (June 1999). 5. Neaman , Donald. Semiconductor Physics & Devices. Boston...227-230 (2001). 5. Sze, S.M. Semiconductor Devices: Physics and Technology. New York: Wiley, 1985. 6. Neaman , Donald A. Semiconductor Physics...Radiation Response of Hafnium-Silicate Capacitors,” IEEE Transactions on Nuclear Science, 49: 3191-3196 (December 2002). 3. Neaman , D.A
Charge dissipative dielectric for cryogenic devices
NASA Technical Reports Server (NTRS)
Cantor, Robin Harold (Inventor); Hall, John Addison (Inventor)
2007-01-01
A Superconducting Quantum Interference Device (SQUID) is disclosed comprising a pair of resistively shunted Josephson junctions connected in parallel within a superconducting loop and biased by an external direct current (dc) source. The SQUID comprises a semiconductor substrate and at least one superconducting layer. The metal layer(s) are separated by or covered with a semiconductor material layer having the properties of a conductor at room temperature and the properties of an insulator at operating temperatures (generally less than 100 Kelvins). The properties of the semiconductor material layer greatly reduces the risk of electrostatic discharge that can damage the device during normal handling of the device at room temperature, while still providing the insulating properties desired to allow normal functioning of the device at its operating temperature. A method of manufacturing the SQUID device is also disclosed.
Anisotropy-based crystalline oxide-on-semiconductor material
McKee, Rodney Allen; Walker, Frederick Joseph
2000-01-01
A semiconductor structure and device for use in a semiconductor application utilizes a substrate of semiconductor-based material, such as silicon, and a thin film of a crystalline oxide whose unit cells are capable of exhibiting anisotropic behavior overlying the substrate surface. Within the structure, the unit cells of the crystalline oxide are exposed to an in-plane stain which influences the geometric shape of the unit cells and thereby arranges a directional-dependent quality of the unit cells in a predisposed orientation relative to the substrate. This predisposition of the directional-dependent quality of the unit cells enables the device to take beneficial advantage of characteristics of the structure during operation. For example, in the instance in which the crystalline oxide of the structure is a perovskite, a spinel or an oxide of similarly-related cubic structure, the structure can, within an appropriate semiconductor device, exhibit ferroelectric, piezoelectric, pyroelectric, electro-optic, ferromagnetic, antiferromagnetic, magneto-optic or large dielectric properties that synergistically couple to the underlying semiconductor substrate.
Suppressing molecular vibrations in organic semiconductors by inducing strain
Kubo, Takayoshi; Häusermann, Roger; Tsurumi, Junto; Soeda, Junshi; Okada, Yugo; Yamashita, Yu; Akamatsu, Norihisa; Shishido, Atsushi; Mitsui, Chikahiko; Okamoto, Toshihiro; Yanagisawa, Susumu; Matsui, Hiroyuki; Takeya, Jun
2016-01-01
Organic molecular semiconductors are solution processable, enabling the growth of large-area single-crystal semiconductors. Improving the performance of organic semiconductor devices by increasing the charge mobility is an ongoing quest, which calls for novel molecular and material design, and improved processing conditions. Here we show a method to increase the charge mobility in organic single-crystal field-effect transistors, by taking advantage of the inherent softness of organic semiconductors. We compress the crystal lattice uniaxially by bending the flexible devices, leading to an improved charge transport. The mobility increases from 9.7 to 16.5 cm2 V−1 s−1 by 70% under 3% strain. In-depth analysis indicates that compressing the crystal structure directly restricts the vibration of the molecules, thus suppresses dynamic disorder, a unique mechanism in organic semiconductors. Since strain can be easily induced during the fabrication process, we expect our method to be exploited to build high-performance organic devices. PMID:27040501
Suppressing molecular vibrations in organic semiconductors by inducing strain.
Kubo, Takayoshi; Häusermann, Roger; Tsurumi, Junto; Soeda, Junshi; Okada, Yugo; Yamashita, Yu; Akamatsu, Norihisa; Shishido, Atsushi; Mitsui, Chikahiko; Okamoto, Toshihiro; Yanagisawa, Susumu; Matsui, Hiroyuki; Takeya, Jun
2016-04-04
Organic molecular semiconductors are solution processable, enabling the growth of large-area single-crystal semiconductors. Improving the performance of organic semiconductor devices by increasing the charge mobility is an ongoing quest, which calls for novel molecular and material design, and improved processing conditions. Here we show a method to increase the charge mobility in organic single-crystal field-effect transistors, by taking advantage of the inherent softness of organic semiconductors. We compress the crystal lattice uniaxially by bending the flexible devices, leading to an improved charge transport. The mobility increases from 9.7 to 16.5 cm(2) V(-1) s(-1) by 70% under 3% strain. In-depth analysis indicates that compressing the crystal structure directly restricts the vibration of the molecules, thus suppresses dynamic disorder, a unique mechanism in organic semiconductors. Since strain can be easily induced during the fabrication process, we expect our method to be exploited to build high-performance organic devices.
EDITORIAL The 23rd Nordic Semiconductor Meeting The 23rd Nordic Semiconductor Meeting
NASA Astrophysics Data System (ADS)
Ólafsson, Sveinn; Sveinbjörnsson, Einar
2010-12-01
A Nordic Semiconductor Meeting is held every other year with the venue rotating amongst the Nordic countries of Denmark, Finland, Iceland, Norway and Sweden. The focus of these meetings remains 'original research and science being carried out on semiconductor materials, devices and systems'. Reports on industrial activity have usually featured. The topics have ranged from fundamental research on point defects in a semiconductor to system architecture of semiconductor electronic devices. Proceedings from these events are regularly published as a topical issue of Physica Scripta. All of the papers in this topical issue have undergone critical peer review and we wish to thank the reviewers and the authors for their cooperation, which has been instrumental in meeting the high scientific standards and quality of the series. This meeting of the 23rd Nordic Semiconductor community, NSM 2009, was held at Háskólatorg at the campus of the University of Iceland, Reykjavik, Iceland, 14-17 June 2009. Support was provided by the University of Iceland. Almost 50 participants presented a broad range of topics covering semiconductor materials and devices as well as related material science interests. The conference provided a forum for Nordic and international scientists to present and discuss new results and ideas concerning the fundamentals and applications of semiconductor materials. The meeting aim was to advance the progress of Nordic science and thus aid in future worldwide technological advances concerning technology, education, energy and the environment. Topics Theory and fundamental physics of semiconductors Emerging semiconductor technologies (for example III-V integration on Si, novel Si devices, graphene) Energy and semiconductors Optical phenomena and optical devices MEMS and sensors Program 14 June Registration 13:00-17:00 15 June Meeting program 09:30-17:00 and Poster Session I 16 June Meeting program 09:30-17:00 and Poster Session II 17 June Excursion and dinner on Icelandic National Day In connection with the conference, a summer school for 40 research students was organized by the Nordic LENS network. The summer school took place in Reykjavik on 11-14 June. For more information on the school please visit the website. The next Nordic Semiconductor meeting, NSM 2011, is scheduled to take place in Aarhus, Denmark, 19-22 June 2011. A full participant list is available in the PDF of this article.
Self bleaching photoelectrochemical-electrochromic device
Bechinger, Clemens S.; Gregg, Brian A.
2002-04-09
A photoelectrochemical-electrochromic device comprising a first transparent electrode and a second transparent electrode in parallel, spaced relation to each other. The first transparent electrode is electrically connected to the second transparent electrode. An electrochromic material is applied to the first transparent electrode and a nanoporous semiconductor film having a dye adsorbed therein is applied to the second transparent electrode. An electrolyte layer contacts the electrochromic material and the nanoporous semiconductor film. The electrolyte layer has a redox couple whereby upon application of light, the nanoporous semiconductor layer dye absorbs the light and the redox couple oxidizes producing an electric field across the device modulating the effective light transmittance through the device.
Tungsten coating for improved wear resistance and reliability of microelectromechanical devices
Fleming, James G.; Mani, Seethambal S.; Sniegowski, Jeffry J.; Blewer, Robert S.
2001-01-01
A process is disclosed whereby a 5-50-nanometer-thick conformal tungsten coating can be formed over exposed semiconductor surfaces (e.g. silicon, germanium or silicon carbide) within a microelectromechanical (MEM) device for improved wear resistance and reliability. The tungsten coating is formed after cleaning the semiconductor surfaces to remove any organic material and oxide film from the surface. A final in situ cleaning step is performed by heating a substrate containing the MEM device to a temperature in the range of 200-600 .degree. C. in the presence of gaseous nitrogen trifluoride (NF.sub.3). The tungsten coating can then be formed by a chemical reaction between the semiconductor surfaces and tungsten hexafluoride (WF.sub.6) at an elevated temperature, preferably about 450.degree. C. The tungsten deposition process is self-limiting and covers all exposed semiconductor surfaces including surfaces in close contact. The present invention can be applied to many different types of MEM devices including microrelays, micromirrors and microengines. Additionally, the tungsten wear-resistant coating of the present invention can be used to enhance the hardness, wear resistance, electrical conductivity, optical reflectivity and chemical inertness of one or more semiconductor surfaces within a MEM device.
Semiconductor technology program. Progress briefs
NASA Technical Reports Server (NTRS)
Bullis, W. M.
1980-01-01
Measurement technology for semiconductor materials, process control, and devices is reviewed. Activities include: optical linewidth and thermal resistance measurements; device modeling; dopant density profiles; resonance ionization spectroscopy; and deep level measurements. Standardized oxide charge terminology is also described.
Optoelectronic Devices and Materials
NASA Astrophysics Data System (ADS)
Sweeney, Stephen; Adams, Alfred
Unlike the majority of electronic devices, which are silicon based, optoelectronic devices are predominantly made using III-V semiconductor compounds such as GaAs, InP, GaN and GaSb and their alloys due to their direct band gap. Understanding the properties of these materials has been of vital importance in the development of optoelectronic devices. Since the first demonstration of a semiconductor laser in the early 1960s, optoelectronic devices have been produced in their millions, pervading our everyday lives in communications, computing, entertainment, lighting and medicine. It is perhaps their use in optical-fibre communications that has had the greatest impact on humankind, enabling high-quality and inexpensive voice and data transmission across the globe. Optical communications spawned a number of developments in optoelectronics, leading to devices such as vertical-cavity surface-emitting lasers, semiconductor optical amplifiers, optical modulators and avalanche photodiodes. In this chapter we discuss the underlying theory of operation of the most important optoelectronic devices. The influence of carrier-photon interactions is discussed in the context of producing efficient emitters and detectors. Finally we discuss how the semiconductor band structure can be manipulated to enhance device properties using quantum confinement and strain effects, and how the addition of dilute amounts of elements such as nitrogen is having a profound effect on the next generation of optoelectronic devices.
Release strategies for making transferable semiconductor structures, devices and device components
Rogers, John A; Nuzzo, Ralph G; Meitl, Matthew; Ko, Heung Cho; Yoon, Jongseung; Menard, Etienne; Baca, Alfred J
2014-11-25
Provided are methods for making a device or device component by providing a multilayer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.
Release strategies for making transferable semiconductor structures, devices and device components
Rogers, John A [Champaign, IL; Nuzzo, Ralph G [Champaign, IL; Meitl, Matthew [Raleigh, NC; Ko, Heung Cho [Urbana, IL; Yoon, Jongseung [Urbana, IL; Menard, Etienne [Durham, NC; Baca, Alfred J [Urbana, IL
2011-04-26
Provided are methods for making a device or device component by providing a multilayer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.
Release strategies for making transferable semiconductor structures, devices and device components
DOE Office of Scientific and Technical Information (OSTI.GOV)
Rogers, John A.; Nuzzo, Ralph G.; Meitl, Matthew
2016-05-24
Provided are methods for making a device or device component by providing a multi layer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.
Bulk semiconducting scintillator device for radiation detection
Stowe, Ashley C.; Burger, Arnold; Groza, Michael
2016-08-30
A bulk semiconducting scintillator device, including: a Li-containing semiconductor compound of general composition Li-III-VI.sub.2, wherein III is a Group III element and VI is a Group VI element; wherein the Li-containing semiconductor compound is used in one or more of a first mode and a second mode, wherein: in the first mode, the Li-containing semiconductor compound is coupled to an electrical circuit under bias operable for measuring electron-hole pairs in the Li-containing semiconductor compound in the presence of neutrons and the Li-containing semiconductor compound is also coupled to current detection electronics operable for detecting a corresponding current in the Li-containing semiconductor compound; and, in the second mode, the Li-containing semiconductor compound is coupled to a photodetector operable for detecting photons generated in the Li-containing semiconductor compound in the presence of the neutrons.
1982-12-31
interfaces which are of importance in such semi- conductor devices as MOSFETS, CCD devices, photovoltaic devices, DD I jAN 73 1473 EDITION OF INOV 66 if...interfaces is interesting for the study of electrolytic cells . Our photoemission study reveals for the first time how the electronic structure of water
Semiconductor quantum wells: old technology or new device functionalities
NASA Astrophysics Data System (ADS)
Kolbas, R. M.; Lo, Y. C.; Hsieh, K. Y.; Lee, J. H.; Reed, F. E.; Zhang, D.; Zhang, T.
2009-08-01
The introduction of semiconductor quantum wells in the 1970s created a revolution in optoelectronic devices. A large fraction of today's lasers and light emitting diodes are based on quantum wells. It has been more than 30 years but novel ideas and new device functions have recently been demonstrated using quantum well heterostructures. This paper provides a brief overview of the subject and then focuses on the physics of quantum wells that the lead author believes holds the key to new device functionalities. The data and figures contained within are not new. They have been assembled from 30 years of work. They are presented to convey the story of why quantum wells continue to fuel the engine that drives the semiconductor optoelectronic business. My apologies in advance to my students and co-workers that contributed so much that could not be covered in such a short manuscript. The explanations provided are based on the simplest models possible rather than the very sophisticated mathematical models that have evolved over many years. The intended readers are those involved with semiconductor optoelectronic devices and are interested in new device possibilities.
Surface breakdown igniter for mercury arc devices
Bayless, John R.
1977-01-01
Surface breakdown igniter comprises a semiconductor of medium resistivity which has the arc device cathode as one electrode and has an igniter anode electrode so that when voltage is applied between the electrodes a spark is generated when electrical breakdown occurs over the surface of the semiconductor. The geometry of the igniter anode and cathode electrodes causes the igniter discharge to be forced away from the semiconductor surface.
Photovoltaic devices comprising zinc stannate buffer layer and method for making
Wu, Xuanzhi; Sheldon, Peter; Coutts, Timothy J.
2001-01-01
A photovoltaic device has a buffer layer zinc stannate Zn.sub.2 SnO.sub.4 disposed between the semiconductor junction structure and the transparent conducting oxide (TCO) layer to prevent formation of localized junctions with the TCO through a thin window semiconductor layer, to prevent shunting through etched grain boundaries of semiconductors, and to relieve stresses and improve adhesion between these layers.
Semiconductor Materials for High Frequency Solid State Sources.
1985-01-18
saturation on near and submicron-scale device performance. The motivation for this is as follows: Presently, individual semiconductors are accepted or...basis of all FET scaling procedures; and is a major motivating factor for going to submicron structures. This scaling was tested with the 4 following...performance. The motivation for this is as follows: Presently, individual semiconductors are accepted or rejected as candidate device materials based, in
NASA Astrophysics Data System (ADS)
Cohen, W.; Holbrook, D.; Klepper, S.
1994-06-01
This study examines the early years of the semiconductor industry and focuses on the roles played by different size firms in technologically innovative processes. A large and diverse pool of firms participated in the growth of the industry. Three related technological areas were chosen for in-depth analysis: integrated circuits, materials technology, and device packaging. Large business producing vacuum tubes dominated the early production of semiconductor devices. As the market for new devices grew during the 1950's, new firms were founded and existing firms from other industries, e.g. aircraft builders and instrument makers, began to pursue semiconductor electronics. Small firms began to cater to the emerging industry by supplying materials and equipment. These firms contributed to the development of certain aspects of one thousand firms that were playing some part in the semiconductor industry.
One-Dimensional Nanostructures and Devices of II–V Group Semiconductors
2009-01-01
The II–V group semiconductors, with narrow band gaps, are important materials with many applications in infrared detectors, lasers, solar cells, ultrasonic multipliers, and Hall generators. Since the first report on trumpet-like Zn3P2nanowires, one-dimensional (1-D) nanostructures of II–V group semiconductors have attracted great research attention recently because these special 1-D nanostructures may find applications in fabricating new electronic and optoelectronic nanoscale devices. This article covers the 1-D II–V semiconducting nanostructures that have been synthesized till now, focusing on nanotubes, nanowires, nanobelts, and special nanostructures like heterostructured nanowires. Novel electronic and optoelectronic devices built on 1-D II–V semiconducting nanostructures will also be discussed, which include metal–insulator-semiconductor field-effect transistors, metal-semiconductor field-effect transistors, andp–nheterojunction photodiode. We intent to provide the readers a brief account of these exciting research activities. PMID:20596452
Hetero-junction photovoltaic device and method of fabricating the device
Aytug, Tolga; Christen, David K; Paranthaman, Mariappan Parans; Polat, Ozgur
2014-02-10
A hetero-junction device and fabrication method in which phase-separated n-type and p-type semiconductor pillars define vertically-oriented p-n junctions extending above a substrate. Semiconductor materials are selected for the p-type and n-type pillars that are thermodynamically stable and substantially insoluble in one another. An epitaxial deposition process is employed to form the pillars on a nucleation layer and the mutual insolubility drives phase separation of the materials. During the epitaxial deposition process, the orientation is such that the nucleation layer initiates propagation of vertical columns resulting in a substantially ordered, three-dimensional structure throughout the deposited material. An oxidation state of at least a portion of one of the p-type or the n-type semiconductor materials is altered relative to the other, such that the band-gap energy of the semiconductor materials differ with respect to stoichiometric compositions and the device preferentially absorbs particular selected bands of radiation.
Main principles of developing exploitation models of semiconductor devices
NASA Astrophysics Data System (ADS)
Gradoboev, A. V.; Simonova, A. V.
2018-05-01
The paper represents primary tasks, solutions of which allow to develop the exploitation modes of semiconductor devices taking into account complex and combined influence of ionizing irradiation and operation factors. The structure of the exploitation model of the semiconductor device is presented, which is based on radiation and reliability models. Furthermore, it was shown that the exploitation model should take into account complex and combine influence of various ionizing irradiation types and operation factors. The algorithm of developing the exploitation model of the semiconductor devices is proposed. The possibility of creating the radiation model of Schottky barrier diode, Schottky field-effect transistor and Gunn diode is shown based on the available experimental data. The basic exploitation model of IR-LEDs based upon double AlGaAs heterostructures is represented. The practical application of the exploitation models will allow to output the electronic products with guaranteed operational properties.
NASA Astrophysics Data System (ADS)
Brennan, Kevin F.
1999-02-01
Modern fabrication techniques have made it possible to produce semiconductor devices whose dimensions are so small that quantum mechanical effects dominate their behavior. This book describes the key elements of quantum mechanics, statistical mechanics, and solid-state physics that are necessary in understanding these modern semiconductor devices. The author begins with a review of elementary quantum mechanics, and then describes more advanced topics, such as multiple quantum wells. He then disusses equilibrium and nonequilibrium statistical mechanics. Following this introduction, he provides a thorough treatment of solid-state physics, covering electron motion in periodic potentials, electron-phonon interaction, and recombination processes. The final four chapters deal exclusively with real devices, such as semiconductor lasers, photodiodes, flat panel displays, and MOSFETs. The book contains many homework exercises and is suitable as a textbook for electrical engineering, materials science, or physics students taking courses in solid-state device physics. It will also be a valuable reference for practicing engineers in optoelectronics and related areas.
Germanium detector passivated with hydrogenated amorphous germanium
Hansen, William L.; Haller, Eugene E.
1986-01-01
Passivation of predominantly crystalline semiconductor devices (12) is provided for by a surface coating (21) of sputtered hydrogenated amorphous semiconductor material. Passivation of a radiation detector germanium diode, for example, is realized by sputtering a coating (21) of amorphous germanium onto the etched and quenched diode surface (11) in a low pressure atmosphere of hydrogen and argon. Unlike prior germanium diode semiconductor devices (12), which must be maintained in vacuum at cryogenic temperatures to avoid deterioration, a diode processed in the described manner may be stored in air at room temperature or otherwise exposed to a variety of environmental conditions. The coating (21) compensates for pre-existing undesirable surface states as well as protecting the semiconductor device (12) against future impregnation with impurities.
Photovoltaic devices comprising cadmium stannate transparent conducting films and method for making
Wu, Xuanzhi; Coutts, Timothy J.; Sheldon, Peter; Rose, Douglas H.
1999-01-01
A photovoltaic device having a substrate, a layer of Cd.sub.2 SnO.sub.4 disposed on said substrate as a front contact, a thin film comprising two or more layers of semiconductor materials disposed on said layer of Cd.sub.2 SnO.sub.4, and an electrically conductive film disposed on said thin film of semiconductor materials to form a rear electrical contact to said thin film. The device is formed by RF sputter coating a Cd.sub.2 SnO.sub.4 layer onto a substrate, depositing a thin film of semiconductor materials onto the layer of Cd.sub.2 SnO.sub.4, and depositing an electrically conductive film onto the thin film of semiconductor materials.
Long, Rathnait D.; McIntyre, Paul C.
2012-01-01
The literature on polar Gallium Nitride (GaN) surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS) devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.
High voltage semiconductor devices and methods of making the devices
DOE Office of Scientific and Technical Information (OSTI.GOV)
Matocha, Kevin; Chatty, Kiran; Banerjee, Sujit
A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type well regions which are formed in an n-type drift layer. A p-type body contact region is formed on the periphery of the MOSFET. The source metallization of the device forms a Schottky contact with an n-type semiconductor region adjacent the p-type body contact region of the device. Vias can be formed through a dielectric material covering the source ohmic contacts and/or Schottky region of the device and the source metallization can be formed in the vias.more » The n-type semiconductor region forming the Schottky contact and/or the n-type source regions can be a single continuous region or a plurality of discontinuous regions alternating with discontinuous p-type body contact regions. The device can be a SiC device. Methods of making the device are also provided.« less
High voltage semiconductor devices and methods of making the devices
Matocha, Kevin; Chatty, Kiran; Banerjee, Sujit
2017-02-28
A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type well regions which are formed in an n-type drift layer. A p-type body contact region is formed on the periphery of the MOSFET. The source metallization of the device forms a Schottky contact with an n-type semiconductor region adjacent the p-type body contact region of the device. Vias can be formed through a dielectric material covering the source ohmic contacts and/or Schottky region of the device and the source metallization can be formed in the vias. The n-type semiconductor region forming the Schottky contact and/or the n-type source regions can be a single continuous region or a plurality of discontinuous regions alternating with discontinuous p-type body contact regions. The device can be a SiC device. Methods of making the device are also provided.
Wide Bandgap Extrinsic Photoconductive Switches
DOE Office of Scientific and Technical Information (OSTI.GOV)
Sullivan, James S.
2012-01-20
Photoconductive semiconductor switches (PCSS) have been investigated since the late 1970s. Some devices have been developed that withstand tens of kilovolts and others that switch hundreds of amperes. However, no single device has been developed that can reliably withstand both high voltage and switch high current. Yet, photoconductive switches still hold the promise of reliable high voltage and high current operation with subnanosecond risetimes. Particularly since good quality, bulk, single crystal, wide bandgap semiconductor materials have recently become available. In this chapter we will review the basic operation of PCSS devices, status of PCSS devices and properties of the widemore » bandgap semiconductors 4H-SiC, 6H-SiC and 2H-GaN.« less
NREL Finds Nanotube Semiconductors Well-suited for PV Systems | News | NREL
photoinduced electron transfer for emerging organic semiconductors such as single-walled carbon nanotubes (SWCNT) that can be used in organic PV devices. In organic PV devices, after a photon is absorbed Larson, and Steven Strauss from Colorado State University. Organic PV devices involve an interface
Hybrid method of making an amorphous silicon P-I-N semiconductor device
Moustakas, Theodore D.; Morel, Don L.; Abeles, Benjamin
1983-10-04
The invention is directed to a hydrogenated amorphous silicon PIN semiconductor device of hybrid glow discharge/reactive sputtering fabrication. The hybrid fabrication method is of advantage in providing an ability to control the optical band gap of the P and N layers, resulting in increased photogeneration of charge carriers and device output.
Thermovoltaic semiconductor device including a plasma filter
Baldasaro, Paul F.
1999-01-01
A thermovoltaic energy conversion device and related method for converting thermal energy into an electrical potential. An interference filter is provided on a semiconductor thermovoltaic cell to pre-filter black body radiation. The semiconductor thermovoltaic cell includes a P/N junction supported on a substrate which converts incident thermal energy below the semiconductor junction band gap into electrical potential. The semiconductor substrate is doped to provide a plasma filter which reflects back energy having a wavelength which is above the band gap and which is ineffectively filtered by the interference filter, through the P/N junction to the source of radiation thereby avoiding parasitic absorption of the unusable portion of the thermal radiation energy.
Semiconductor cooling by thin-film thermocouples
NASA Technical Reports Server (NTRS)
Tick, P. A.; Vilcans, J.
1970-01-01
Thin-film, metal alloy thermocouple junctions do not rectify, change circuit impedance only slightly, and require very little increase in space. Although they are less efficient cooling devices than semiconductor junctions, they may be applied to assist conventional cooling techniques for electronic devices.
Multiple gap photovoltaic device
Dalal, Vikram L.
1981-01-01
A multiple gap photovoltaic device having a transparent electrical contact adjacent a first cell which in turn is adjacent a second cell on an opaque electrical contact, includes utilizing an amorphous semiconductor as the first cell and a crystalline semiconductor as the second cell.
High efficiency photovoltaic device
Guha, Subhendu; Yang, Chi C.; Xu, Xi Xiang
1999-11-02
An N-I-P type photovoltaic device includes a multi-layered body of N-doped semiconductor material which has an amorphous, N doped layer in contact with the amorphous body of intrinsic semiconductor material, and a microcrystalline, N doped layer overlying the amorphous, N doped material. A tandem device comprising stacked N-I-P cells may further include a second amorphous, N doped layer interposed between the microcrystalline, N doped layer and a microcrystalline P doped layer. Photovoltaic devices thus configured manifest improved performance, particularly when configured as tandem devices.
New Concentric Electrode Metal-Semiconductor-Metal Photodetectors
NASA Technical Reports Server (NTRS)
Towe, Elias
1996-01-01
A new metal-semiconductor-metal (MSM) photodetector geometry is proposed. The new device has concentric metal electrodes which exhibit a high degree of symmetry and a design flexibility absent in the conventional MSM device. The concentric electrodes are biased to alternating potentials as in the conventional interdigitated device. Because of the high symmetry configuration, however, the new device also has a lower effective capacitance. This device and the conventional MSM structure are analyzed within a common theoretical framework which allows for the comparison of the important performance characteristics.
Organic photosensitive cells grown on rough electrode with nano-scale morphology control
Yang, Fan [Piscataway, NJ; Forrest, Stephen R [Ann Arbor, MI
2011-06-07
An optoelectronic device and a method for fabricating the optoelectronic device includes a first electrode disposed on a substrate, an exposed surface of the first electrode having a root mean square roughness of at least 30 nm and a height variation of at least 200 nm, the first electrode being transparent. A conformal layer of a first organic semiconductor material is deposited onto the first electrode by organic vapor phase deposition, the first organic semiconductor material being a small molecule material. A layer of a second organic semiconductor material is deposited over the conformal layer. At least some of the layer of the second organic semiconductor material directly contacts the conformal layer. A second electrode is deposited over the layer of the second organic semiconductor material. The first organic semiconductor material is of a donor-type or an acceptor-type relative to the second organic semiconductor material, which is of the other material type.
Photovoltaic devices comprising cadmium stannate transparent conducting films and method for making
Wu, X.; Coutts, T.J.; Sheldon, P.; Rose, D.H.
1999-07-13
A photovoltaic device is disclosed having a substrate, a layer of Cd[sub 2]SnO[sub 4] disposed on said substrate as a front contact, a thin film comprising two or more layers of semiconductor materials disposed on said layer of Cd[sub 2]SnO[sub 4], and an electrically conductive film disposed on said thin film of semiconductor materials to form a rear electrical contact to said thin film. The device is formed by RF sputter coating a Cd[sub 2]SnO[sub 4] layer onto a substrate, depositing a thin film of semiconductor materials onto the layer of Cd[sub 2]SnO[sub 4], and depositing an electrically conductive film onto the thin film of semiconductor materials. 10 figs.
Two dimensional thermal and charge mapping of power thyristors
NASA Technical Reports Server (NTRS)
Hu, S. P.; Rabinovici, B. M.
1975-01-01
The two dimensional static and dynamic current density distributions within the junction of semiconductor power switching devices and in particular the thyristors were obtained. A method for mapping the thermal profile of the device junctions with fine resolution using an infrared beam and measuring the attenuation through the device as a function of temperature were developed. The results obtained are useful in the design and quality control of high power semiconductor switching devices.
Multi-junction, monolithic solar cell using low-band-gap materials lattice matched to GaAs or Ge
Olson, Jerry M.; Kurtz, Sarah R.; Friedman, Daniel J.
2001-01-01
A multi-junction, monolithic, photovoltaic solar cell device is provided for converting solar radiation to photocurrent and photovoltage with improved efficiency. The solar cell device comprises a plurality of semiconductor cells, i.e., active p/n junctions, connected in tandem and deposited on a substrate fabricated from GaAs or Ge. To increase efficiency, each semiconductor cell is fabricated from a crystalline material with a lattice constant substantially equivalent to the lattice constant of the substrate material. Additionally, the semiconductor cells are selected with appropriate band gaps to efficiently create photovoltage from a larger portion of the solar spectrum. In this regard, one semiconductor cell in each embodiment of the solar cell device has a band gap between that of Ge and GaAs. To achieve desired band gaps and lattice constants, the semiconductor cells may be fabricated from a number of materials including Ge, GaInP, GaAs, GaInAsP, GaInAsN, GaAsGe, BGaInAs, (GaAs)Ge, CuInSSe, CuAsSSe, and GaInAsNP. To further increase efficiency, the thickness of each semiconductor cell is controlled to match the photocurrent generated in each cell. To facilitate photocurrent flow, a plurality of tunnel junctions of low-resistivity material are included between each adjacent semiconductor cell. The conductivity or direction of photocurrent in the solar cell device may be selected by controlling the specific p-type or n-type characteristics for each active junction.
Imaging the motion of electrons in 2D semiconductor heterostructures
NASA Astrophysics Data System (ADS)
Dani, Keshav
Technological progress since the late 20th century has centered on semiconductor devices, such as transistors, diodes, and solar cells. At the heart of these devices, is the internal motion of electrons through semiconductor materials due to applied electric fields or by the excitation of photocarriers. Imaging the motion of these electrons would provide unprecedented insight into this important phenomenon, but requires high spatial and temporal resolution. Current studies of electron dynamics in semiconductors are generally limited by the spatial resolution of optical probes, or by the temporal resolution of electronic probes. In this talk, we combine femtosecond pump-probe techniques with spectroscopic photoemission electron microscopy to image the motion of photoexcited electrons from high-energy to low-energy states in a 2D InSe/GaAs heterostructure exhibiting a type-II band alignment. At the instant of photoexcitation, energy-resolved photoelectron images reveal a highly non-equilibrium distribution of photocarriers in space and energy. Thereafter, in response to the out-of-equilibrium photocarriers, we observe the spatial redistribution of charges, thus forming internal electric fields, bending the semiconductor bands, and finally impeding further charge transfer. By assembling images taken at different time-delays, we make a movie lasting a few tens of picoseconds of the electron transfer process in the photoexcited type-II heterostructure - a fundamental phenomenon in semiconductor devices like solar cells. Quantitative analysis and theoretical modeling of spatial variations in the video provide insight into future solar cells, electron dynamics in 2D materials, and other semiconductor devices.
Imaging the motion of electrons across semiconductor heterojunctions.
Man, Michael K L; Margiolakis, Athanasios; Deckoff-Jones, Skylar; Harada, Takaaki; Wong, E Laine; Krishna, M Bala Murali; Madéo, Julien; Winchester, Andrew; Lei, Sidong; Vajtai, Robert; Ajayan, Pulickel M; Dani, Keshav M
2017-01-01
Technological progress since the late twentieth century has centred on semiconductor devices, such as transistors, diodes and solar cells. At the heart of these devices is the internal motion of electrons through semiconductor materials due to applied electric fields or by the excitation of photocarriers. Imaging the motion of these electrons would provide unprecedented insight into this important phenomenon, but requires high spatial and temporal resolution. Current studies of electron dynamics in semiconductors are generally limited by the spatial resolution of optical probes, or by the temporal resolution of electronic probes. Here, by combining femtosecond pump-probe techniques with spectroscopic photoemission electron microscopy, we imaged the motion of photoexcited electrons from high-energy to low-energy states in a type-II 2D InSe/GaAs heterostructure. At the instant of photoexcitation, energy-resolved photoelectron images revealed a highly non-equilibrium distribution of photocarriers in space and energy. Thereafter, in response to the out-of-equilibrium photocarriers, we observed the spatial redistribution of charges, thus forming internal electric fields, bending the semiconductor bands, and finally impeding further charge transfer. By assembling images taken at different time-delays, we produced a movie lasting a few trillionths of a second of the electron-transfer process in the photoexcited type-II heterostructure-a fundamental phenomenon in semiconductor devices such as solar cells. Quantitative analysis and theoretical modelling of spatial variations in the movie provide insight into future solar cells, 2D materials and other semiconductor devices.
Imaging the motion of electrons across semiconductor heterojunctions
NASA Astrophysics Data System (ADS)
Man, Michael K. L.; Margiolakis, Athanasios; Deckoff-Jones, Skylar; Harada, Takaaki; Wong, E. Laine; Krishna, M. Bala Murali; Madéo, Julien; Winchester, Andrew; Lei, Sidong; Vajtai, Robert; Ajayan, Pulickel M.; Dani, Keshav M.
2017-01-01
Technological progress since the late twentieth century has centred on semiconductor devices, such as transistors, diodes and solar cells. At the heart of these devices is the internal motion of electrons through semiconductor materials due to applied electric fields or by the excitation of photocarriers. Imaging the motion of these electrons would provide unprecedented insight into this important phenomenon, but requires high spatial and temporal resolution. Current studies of electron dynamics in semiconductors are generally limited by the spatial resolution of optical probes, or by the temporal resolution of electronic probes. Here, by combining femtosecond pump-probe techniques with spectroscopic photoemission electron microscopy, we imaged the motion of photoexcited electrons from high-energy to low-energy states in a type-II 2D InSe/GaAs heterostructure. At the instant of photoexcitation, energy-resolved photoelectron images revealed a highly non-equilibrium distribution of photocarriers in space and energy. Thereafter, in response to the out-of-equilibrium photocarriers, we observed the spatial redistribution of charges, thus forming internal electric fields, bending the semiconductor bands, and finally impeding further charge transfer. By assembling images taken at different time-delays, we produced a movie lasting a few trillionths of a second of the electron-transfer process in the photoexcited type-II heterostructure—a fundamental phenomenon in semiconductor devices such as solar cells. Quantitative analysis and theoretical modelling of spatial variations in the movie provide insight into future solar cells, 2D materials and other semiconductor devices.
Ferroelectrics for semiconductor devices
NASA Astrophysics Data System (ADS)
Sayer, M.; Wu, Z.; Vasant Kumar, C. V. R.; Amm, D. T.; Griswold, E. M.
1992-11-01
The technology for the implementation of the integration of thin film ferroelectrics with silicon processing for various devices is described, and factors affecting the integration of ferroelectric films with semiconductor processing are discussed. Consideration is also given to film properties, the properties of electrode materials and structures, and the phenomena of ferroelectric fatigue and aging. Particular attention is given to the nonmemory device application of ferroelectrics.
Optical devices integrated with semiconductor optical amplifier
NASA Astrophysics Data System (ADS)
Oh, Kwang R.; Park, Moon S.; Jeong, Jong S.; Baek, Yongsoon; Oh, Dae-Kon
2000-07-01
Semiconductor optical amplifiers (SOA's) have been used as a key optical component for the high capacity communication systems. The monolithic integration is necessary for the stable operation of these devices and the wider applications. In this paper, the coupling technique between different waveguides and the integration of SSC's are discussed and the research results of optical devices integrated with SOA's are presented.
Sputtered pin amorphous silicon semi-conductor device and method therefor
Moustakas, Theodore D.; Friedman, Robert A.
1983-11-22
A high efficiency amorphous silicon PIN semi-conductor device is constructed by the sequential sputtering of N, I and P layers of amorphous silicon and at least one semi-transparent ohmic electrode. A method of construction produces a PIN device, exhibiting enhanced physical integrity and facilitates ease of construction in a singular vacuum system and vacuum pump down procedure.
1994-05-01
Open Systems and Contacts ...................... 16 A Ballistic Transport .......................... 17 B Role of the Boundaries and Contacts...15 Other Devices ................................ 90 V Modeling with the Green’s Functions 91 16 Homogeneous, Low-Field Systems .................. 93 A...The Retarded Function ..................... 95 B The "Less-Than" Function ................... 99 17 Homogeneous, High-Field Systems
Semiconductor crystal high resolution imager
NASA Technical Reports Server (NTRS)
Matteson, James (Inventor); Levin, Craig S. (Inventor)
2011-01-01
A radiation imaging device (10). The radiation image device (10) comprises a subject radiation station (12) producing photon emissions (14), and at least one semiconductor crystal detector (16) arranged in an edge-on orientation with respect to the emitted photons (14) to directly receive the emitted photons (14) and produce a signal. The semiconductor crystal detector (16) comprises at least one anode and at least one cathode that produces the signal in response to the emitted photons (14).
Semiconductor/High-Tc-Superconductor Hybrid ICs
NASA Technical Reports Server (NTRS)
Burns, Michael J.
1995-01-01
Hybrid integrated circuits (ICs) containing both Si-based semiconducting and YBa(2)Cu(3)O(7-x) superconducting circuit elements on sapphire substrates developed. Help to prevent diffusion of Cu from superconductors into semiconductors. These hybrid ICs combine superconducting and semiconducting features unavailable in superconducting or semiconducting circuitry alone. For example, complementary metal oxide/semiconductor (CMOS) readout and memory devices integrated with fast-switching Josephson-junction super-conducting logic devices and zero-resistance interconnections.
Optical devices featuring nonpolar textured semiconductor layers
Moustakas, Theodore D; Moldawer, Adam; Bhattacharyya, Anirban; Abell, Joshua
2013-11-26
A semiconductor emitter, or precursor therefor, has a substrate and one or more textured semiconductor layers deposited onto the substrate in a nonpolar orientation. The textured layers enhance light extraction, and the use of nonpolar orientation greatly enhances internal quantum efficiency compared to conventional devices. Both the internal and external quantum efficiencies of emitters of the invention can be 70-80% or higher. The invention provides highly efficient light emitting diodes suitable for solid state lighting.
Rogers, John A; Meitl, Matthew; Sun, Yugang; Ko, Heung Cho; Carlson, Andrew; Choi, Won Mook; Stoykovich, Mark; Jiang, Hanqing; Huang, Yonggang; Nuzzo, Ralph G; Zhu, Zhengtao; Menard, Etienne; Khang, Dahl-Young
2014-05-20
In an aspect, the present invention provides stretchable, and optionally printable, components such as semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed, and related methods of making or tuning such stretchable components. Stretchable semiconductors and electronic circuits preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention are adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.
Rogers, John A [Champaign, IL; Meitl, Matthew [Raleigh, NC; Sun, Yugang [Naperville, IL; Ko, Heung Cho [Urbana, IL; Carlson, Andrew [Urbana, IL; Choi, Won Mook [Champaign, IL; Stoykovich, Mark [Dover, NH; Jiang, Hanqing [Urbana, IL; Huang, Yonggang [Glencoe, IL; Nuzzo, Ralph G [Champaign, IL; Lee, Keon Jae [Tokyo, JP; Zhu, Zhengtao [Rapid City, SD; Menard, Etienne [Durham, NC; Khang, Dahl-Young [Seoul, KR; Kan, Seong Jun [Daejeon, KR; Ahn, Jong Hyun [Suwon, KR; Kim, Hoon-sik [Champaign, IL
2012-07-10
In an aspect, the present invention provides stretchable, and optionally printable, components such as semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed, and related methods of making or tuning such stretchable components. Stretchable semiconductors and electronic circuits preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention are adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.
Fabrication of eco-friendly PNP transistor using RF magnetron sputtering
NASA Astrophysics Data System (ADS)
Kumar, B. Santhosh; Harinee, N.; Purvaja, K.; Shanker, N. Praveen; Manikandan, M.; Aparnadevi, N.; Mukilraj, T.; Venkateswaran, C.
2018-05-01
An effort has been made to fabricate a thin film transistor using eco-friendly oxide semiconductor materials. Oxide semiconductor materials are cost - effective, thermally and chemically stable with high electron/hole mobility. Copper (II) oxide is a p-type semiconductor and zinc oxide is an n-type semiconductor. A pnp thin film transistor was fabricated using RF magnetron sputtering. The films deposited have been subjected to structural characterization using AFM. I-V characterization of the fabricated device, Ag/CuO/ZnO/CuO/Ag, confirms transistor behaviour. The mechanism of electron/hole transport of the device is discussed below.
Near-Unity Absorption in van der Waals Semiconductors for Ultrathin Optoelectronics.
Jariwala, Deep; Davoyan, Artur R; Tagliabue, Giulia; Sherrott, Michelle C; Wong, Joeson; Atwater, Harry A
2016-09-14
We demonstrate near-unity, broadband absorbing optoelectronic devices using sub-15 nm thick transition metal dichalcogenides (TMDCs) of molybdenum and tungsten as van der Waals semiconductor active layers. Specifically, we report that near-unity light absorption is possible in extremely thin (<15 nm) van der Waals semiconductor structures by coupling to strongly damped optical modes of semiconductor/metal heterostructures. We further fabricate Schottky junction devices using these highly absorbing heterostructures and characterize their optoelectronic performance. Our work addresses one of the key criteria to enable TMDCs as potential candidates to achieve high optoelectronic efficiency.
Noise And Charge Transport In Carbon Nanotube Devices
NASA Astrophysics Data System (ADS)
Reza, Shahed; Huynh, Quyen T.; Bosman, Gijs; Sippel, Jennifer; Rinzler, Andrew G.
2005-11-01
The charge transport and noise properties of three terminal, gated devices containing multiple, single wall, metallic and semiconductor carbon nanotubes have been measured as a function of gate and drain bias at 300K. Using pulsed bias the metallic tubes could be burned sequentially enabling the separation of measured conductance and low frequency excess noise into metallic and semiconductor contributions. The relative low frequency excess noise of the metallic tubes was about a factor 100 lower than that of the semiconductor tubes, whereas the conductance of the metallic tubes was significantly higher (10 to 50 times) than that of the semiconductor tubes.
NASA Astrophysics Data System (ADS)
Häusermann, R.; Batlogg, B.
2011-08-01
Gate bias stress instability in organic field-effect transistors (OFETs) is a major conceptual and device issue. This effect manifests itself by an undesirable shift of the transfer characteristics and is associated with long term charge trapping. We study the role of the dielectric and the semiconductor separately by producing OFETs with the same semiconductor (pentacene) combined with different dielectrics (SiO2 and Cytop). We show that it is possible to fabricate devices which are immune to gate bias stress. For other material combinations, charge trapping occurs in the semiconductor alone or in the dielectric.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Liu, L. Z., E-mail: lzliu@nju.edu.cn, E-mail: hkxlwu@nju.edu.cn; Xiong, S. J.; Wu, X. L., E-mail: lzliu@nju.edu.cn, E-mail: hkxlwu@nju.edu.cn
2016-08-08
The formation of Schottky barriers between 2D semiconductors and traditional metallic electrodes has greatly limited the application of 2D semiconductors in nanoelectronic and optoelectronic devices. In this study, metallic borophene was used as a substitute for the traditional noble metal electrode to contact with the 2D semiconductor. Theoretical calculations demonstrated that no Schottky barrier exists in the borophene/2D semiconductor heterostructure. The contact remains ohmic even with a strong electric field applied. This finding provides a way to construct 2D electronic devices and sensors with greatly enhanced performance.
NASA Technical Reports Server (NTRS)
Fonash, S. J.
1976-01-01
The advantages possible with the insertion of a thin-film insulating or semi-insulating layer between a metal and a semiconductor to form the MIS photovoltaic device have been presented previously in the literature. This MIS configuration may be considered as a specific example of a more general class of photovoltaic devices: electrode-thin-film-insulator-semiconductor devices. Since the advantages of the configuration were pointed out, there has been considerable experimental interest in these photovoltaic devices. Because the previous analysis showed that the introduction of the insulator layer could produce several different but advantageous effects, this paper presents a further outline giving a comparison of these effects together with their ramifications.
NASA Astrophysics Data System (ADS)
Bisoyi, Sibani; Rödel, Reinhold; Zschieschang, Ute; Kang, Myeong Jin; Takimiya, Kazuo; Klauk, Hagen; Tiwari, Shree Prakash
2016-02-01
A systematic and comprehensive study on the charge-carrier injection and trapping behavior was performed using displacement current measurements in long-channel capacitors based on four promising small-molecule organic semiconductors (pentacene, DNTT, C10-DNTT and DPh-DNTT). In thin-film transistors, these semiconductors showed charge-carrier mobilities ranging from 1.0 to 7.8 cm2 V-1 s-1. The number of charges injected into and extracted from the semiconductor and the density of charges trapped in the device during each measurement were calculated from the displacement current characteristics and it was found that the density of trapped charges is very similar in all devices and of the order 1012 cm-2, despite the fact that the four semiconductors show significantly different charge-carrier mobilities. The choice of the contact metal (Au, Ag, Cu, Pd) was also found to have no significant effect on the trapping behavior.
An Ultrathin Single Crystalline Relaxor Ferroelectric Integrated on a High Mobility Semiconductor.
Moghadam, Reza M; Xiao, Zhiyong; Ahmadi-Majlan, Kamyar; Grimley, Everett D; Bowden, Mark; Ong, Phuong-Vu; Chambers, Scott A; Lebeau, James M; Hong, Xia; Sushko, Peter V; Ngai, Joseph H
2017-10-11
The epitaxial growth of multifunctional oxides on semiconductors has opened a pathway to introduce new functionalities to semiconductor device technologies. In particular, the integration of gate materials that enable nonvolatile or hysteretic functionality in field-effect transistors could lead to device technologies that consume less power or allow for novel modalities in computing. Here we present electrical characterization of ultrathin single crystalline SrZr x Ti 1-x O 3 (x = 0.7) films epitaxially grown on a high mobility semiconductor, Ge. Epitaxial films of SrZr x Ti 1-x O 3 exhibit relaxor behavior, characterized by a hysteretic polarization that can modulate the surface potential of Ge. We find that gate layers as thin as 5 nm corresponding to an equivalent-oxide thickness of just 1.0 nm exhibit a ∼2 V hysteretic window in the capacitance-voltage characteristics. The development of hysteretic metal-oxide-semiconductor capacitors with nanoscale gate thicknesses opens new vistas for nanoelectronic devices.
Researchers Validate UV Light's Use in Improving Semiconductors | News |
device. The ability to use different classes of semiconductors could create additional possibilities for integrating a variety of different semiconductors in the future," Park said. The researchers explored
Research and Development Strategies in the Semiconductor Industry
NASA Astrophysics Data System (ADS)
Bowling, Allen
2003-03-01
In the 21st Century semiconductor industry, there is a critical balance between internally funded semiconductor research and development (R) and externally funded R. External R may include jointly-funded research collaborations/partnerships with other device manufacturers, jointly-funded consortia-based R, and individually-funded research programs at universities and other contract research locations. Each of these approaches has merits and each has costs. There is a critical balance between keeping the internal research and development pipeline filled and keeping it from being overspent. To meet both competitive schedule and cost goals, a semiconductor device manufacturer must decide on a model for selection of internal versus external R. Today, one of the most critical decisions is whether or not to do semiconductor research and development on 300 mm silicon wafers. Equipment suppliers are doing first development on 300 mm equipment. So, for the device manufacturer, there is a balance between the cost of doing development on 300 mm wafers and the development time schedule driven by equipment availability. In the face of these cost and schedule elements, device manufacturers are looking to consortia such as SEMATECH, SRC, and SRC MARCO for early development and screening of new materials and device structure approaches. This also causes much more close development collaboration between device manufacturer and equipment supplier. Many device manufacturers are also making use of direct contract research with universities and other contract-research organizations, such as IMEC, LETI, and other government-funded research organizations around the world. To get the most out of these external research interactions, the company must develop a strategy for management and technology integration of external R.
Federal Register 2010, 2011, 2012, 2013, 2014
2013-07-05
..., Texas; Notification of Proposed Production Activity; Samsung Austin Semiconductor, LLC (Semiconductors); Austin, Texas Samsung Austin Semiconductor, LLC (Samsung), operator of Subzone 183B, submitted a... June 26, 2013. Samsung currently has authority to produce semiconductor memory devices for export...
Semiconductor Laser Low Frequency Noise Characterization
NASA Technical Reports Server (NTRS)
Maleki, Lute; Logan, Ronald T.
1996-01-01
This work summarizes the efforts in identifying the fundamental noise limit in semiconductor optical sources (lasers) to determine the source of 1/F noise and it's associated behavior. In addition, the study also addresses the effects of this 1/F noise on RF phased arrays. The study showed that the 1/F noise in semiconductor lasers has an ultimate physical limit based upon similar factors to fundamental noise generated in other semiconductor and solid state devices. The study also showed that both additive and multiplicative noise can be a significant detriment to the performance of RF phased arrays especially in regard to very low sidelobe performance and ultimate beam steering accuracy. The final result is that a noise power related term must be included in a complete analysis of the noise spectrum of any semiconductor device including semiconductor lasers.
Method for altering the luminescence of a semiconductor
Barbour, J. Charles; Dimos, Duane B.
1999-01-01
A method is described for altering the luminescence of a light emitting semiconductor (LES) device. In particular, a method is described whereby a silicon LES device can be selectively irradiated with a radiation source effective for altering the intensity of luminescence of the irradiated region.
Power semiconductor device with negative thermal feedback
NASA Technical Reports Server (NTRS)
Borky, J. M.; Thornton, R. D.
1970-01-01
Composite power semiconductor avoids second breakdown and provides stable operation. It consists of an array of parallel-connected integrated circuits fabricated in a single chip. The output power device and associated low-level amplifier are closely coupled thermally, so that they have a predetermined temperature relationship.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Moghadam, Reza M.; Xiao, Zhiyong; Ahmadi-Majlan, Kamyar
The epitaxial growth of multifunctional oxides on semiconductors has opened a pathway to introduce new functionalities to semiconductor device technologies. In particular, ferroelectric materials integrated on semiconductors could lead to low-power field-effect devices that can be used for logic or memory. Essential to realizing such field-effect devices is the development of ferroelectric metal-oxide-semiconductor (MOS) capacitors, in which the polarization of a ferroelectric gate is coupled to the surface potential of a semiconducting channel. Here we demonstrate that ferroelectric MOS capacitors can be realized using single crystalline SrZrxTi1-xO3 (x= 0.7) that has been epitaxially grown on Ge. We find that themore » ferroelectric properties of SrZrxTi1-xO3 are exceptionally robust, as gate layers as thin as 5 nm give rise to hysteretic capacitance-voltage characteristics that are 2 V in width. The development of ferroelectric MOS capacitors with gate thicknesses that are technologically relevant opens a pathway to realize scalable ferroelectric field-effect devices.« less
Methods of measurement for semiconductor materials, process control, and devices
NASA Technical Reports Server (NTRS)
Bullis, W. M. (Editor)
1973-01-01
This progress report describes NBS activities directed toward the development of methods of measurement for semiconductor materials, process control, and devices. Significant accomplishments during this reporting period include design of a plan to provide standard silicon wafers for four-probe resistivity measurements for the industry, publication of a summary report on the photoconductive decay method for measuring carrier lifetime, publication of a comprehensive review of the field of wire bond fabrication and testing, and successful completion of organizational activity leading to the establishment of a new group on quality and hardness assurance in ASTM Committee F-1 on Electronics. Work is continuing on measurement of resistivity of semiconductor crystals; characterization of generation-recombination-trapping centers in silicon; study of gold-doped silicon; development of the infrared response technique; evaluation of wire bonds and die attachment; and measurement of thermal properties of semiconductor devices, delay time and related carrier transport properties in junction devices, and noise properties of microwave diodes.
Single photon detection with self-quenching multiplication
NASA Technical Reports Server (NTRS)
Zheng, Xinyu (Inventor); Cunningham, Thomas J. (Inventor); Pain, Bedabrata (Inventor)
2011-01-01
A photoelectronic device and an avalanche self-quenching process for a photoelectronic device are described. The photoelectronic device comprises a nanoscale semiconductor multiplication region and a nanoscale doped semiconductor quenching structure including a depletion region and an undepletion region. The photoelectronic device can act as a single photon detector or a single carrier multiplier. The avalanche self-quenching process allows electrical field reduction in the multiplication region by movement of the multiplication carriers, thus quenching the avalanche.
Semiconductor millimeter wavelength electronics
NASA Astrophysics Data System (ADS)
Rosenbaum, F. J.
1985-12-01
This final report summarizes the results of research carried out on topics in millimeter wavelength semiconductor electronics under an ONR Selected Research Opportunity program. Study areas included III-V compound semiconductor growth and characterization, microwave and millimeter wave device modeling, fabrication and testing, and the development of new device concepts. A new millimeter wave mixer and detector, the Gap diode was invented. Topics reported on include ballistic transport, Zener oscillations, impurities in GaAs, electron velocity-electric field calculation and measurements, etc., calculations.
1983-04-01
34.. .. . ...- "- -,-. SIGNIFICANCE AND EXPLANATION Many different codes for the simulation of semiconductor devices such as transitors , diodes, thyristors are already circulated...partially take into account the consequences introduced by degenerate semiconductors (e.g. invalidity of Boltzmann’s statistics , bandgap narrowing). These...ft - ni p nep /Ut(2.10) Sni *e p nie 2.11) .7. (2.10) can be physically interpreted as the application of Boltzmann statistics . However (2.10) a.,zo
Investigation of semiconductor clad optical waveguides
NASA Technical Reports Server (NTRS)
Batchman, T. E.; Carson, R. F.
1985-01-01
A variety of techniques have been proposed for fabricating integrated optical devices using semiconductors, lithium niobate, and glasses as waveguides and substrates. The use of glass waveguides and their interaction with thin semiconductor cladding layers was studied. Though the interactions of these multilayer waveguide structures have been analyzed here using glass, they may be applicable to other types of materials as well. The primary reason for using glass is that it provides a simple, inexpensive way to construct waveguides and devices.
Rocksalt nitride metal/semiconductor superlattices: A new class of artificially structured materials
NASA Astrophysics Data System (ADS)
Saha, Bivas; Shakouri, Ali; Sands, Timothy D.
2018-06-01
Artificially structured materials in the form of superlattice heterostructures enable the search for exotic new physics and novel device functionalities, and serve as tools to push the fundamentals of scientific and engineering knowledge. Semiconductor heterostructures are the most celebrated and widely studied artificially structured materials, having led to the development of quantum well lasers, quantum cascade lasers, measurements of the fractional quantum Hall effect, and numerous other scientific concepts and practical device technologies. However, combining metals with semiconductors at the atomic scale to develop metal/semiconductor superlattices and heterostructures has remained a profoundly difficult scientific and engineering challenge. Though the potential applications of metal/semiconductor heterostructures could range from energy conversion to photonic computing to high-temperature electronics, materials challenges primarily had severely limited progress in this pursuit until very recently. In this article, we detail the progress that has taken place over the last decade to overcome the materials engineering challenges to grow high quality epitaxial, nominally single crystalline metal/semiconductor superlattices based on transition metal nitrides (TMN). The epitaxial rocksalt TiN/(Al,Sc)N metamaterials are the first pseudomorphic metal/semiconductor superlattices to the best of our knowledge, and their physical properties promise a new era in superlattice physics and device engineering.
Methods for forming particles from single source precursors
Fox, Robert V [Idaho Falls, ID; Rodriguez, Rene G [Pocatello, ID; Pak, Joshua [Pocatello, ID
2011-08-23
Single source precursors are subjected to carbon dioxide to form particles of material. The carbon dioxide may be in a supercritical state. Single source precursors also may be subjected to supercritical fluids other than supercritical carbon dioxide to form particles of material. The methods may be used to form nanoparticles. In some embodiments, the methods are used to form chalcopyrite materials. Devices such as, for example, semiconductor devices may be fabricated that include such particles. Methods of forming semiconductor devices include subjecting single source precursors to carbon dioxide to form particles of semiconductor material, and establishing electrical contact between the particles and an electrode.
Integrated semiconductor optical sensors for chronic, minimally-invasive imaging of brain function.
Lee, Thomas T; Levi, Ofer; Cang, Jianhua; Kaneko, Megumi; Stryker, Michael P; Smith, Stephen J; Shenoy, Krishna V; Harris, James S
2006-01-01
Intrinsic optical signal (IOS) imaging is a widely accepted technique for imaging brain activity. We propose an integrated device consisting of interleaved arrays of gallium arsenide (GaAs) based semiconductor light sources and detectors operating at telecommunications wavelengths in the near-infrared. Such a device will allow for long-term, minimally invasive monitoring of neural activity in freely behaving subjects, and will enable the use of structured illumination patterns to improve system performance. In this work we describe the proposed system and show that near-infrared IOS imaging at wavelengths compatible with semiconductor devices can produce physiologically significant images in mice, even through skull.
Semiconductor technology program: Progress briefs
NASA Technical Reports Server (NTRS)
Galloway, K. F.; Scace, R. I.; Walters, E. J.
1981-01-01
Measurement technology for semiconductor materials, process control, and devices, is discussed. Silicon and silicon based devices are emphasized. Highlighted activities include semiinsulating GaAs characterization, an automatic scanning spectroscopic ellipsometer, linewidth measurement and coherence, bandgap narrowing effects in silicon, the evaluation of electrical linewidth uniformity, and arsenicomplanted profiles in silicon.
Method for altering the luminescence of a semiconductor
Barbour, J.C.; Dimos, D.B.
1999-01-12
A method is described for altering the luminescence of a light emitting semiconductor (LES) device. In particular, a method is described whereby a silicon LES device can be selectively irradiated with a radiation source effective for altering the intensity of luminescence of the irradiated region. 4 figs.
General Electronics Technician: Semiconductor Devices and Circuits.
ERIC Educational Resources Information Center
Hilley, Robert
These instructional materials include a teacher's guide designed to assist instructors in organizing and presenting an introductory course in general electronics focusing on semiconductor devices and circuits and a student guide. The materials are based on the curriculum-alignment concept of first stating the objectives, developing instructional…
Wu, Bing; Zhao, Yinghe; Nan, Haiyan; Yang, Ziyi; Zhang, Yuhan; Zhao, Huijuan; He, Daowei; Jiang, Zonglin; Liu, Xiaolong; Li, Yun; Shi, Yi; Ni, Zhenhua; Wang, Jinlan; Xu, Jian-Bin; Wang, Xinran
2016-06-08
Precise assembly of semiconductor heterojunctions is the key to realize many optoelectronic devices. By exploiting the strong and tunable van der Waals (vdW) forces between graphene and organic small molecules, we demonstrate layer-by-layer epitaxy of ultrathin organic semiconductors and heterostructures with unprecedented precision with well-defined number of layers and self-limited characteristics. We further demonstrate organic p-n heterojunctions with molecularly flat interface, which exhibit excellent rectifying behavior and photovoltaic responses. The self-limited organic molecular beam epitaxy (SLOMBE) is generically applicable for many layered small-molecule semiconductors and may lead to advanced organic optoelectronic devices beyond bulk heterojunctions.
López-Gejo, Juan; Arranz, Antonio; Navarro, Alvaro; Palacio, Carlos; Muñoz, Elías; Orellana, Guillermo
2010-02-17
Covalent tethering of a Ru(II) dye to gallium nitride surfaces has been accomplished as a key step in the development of innovative sensing devices in which the indicator support (semiconductor) plays the role of both support and excitation source. Luminescence emission decays and time-resolved emission spectra confirm the presence of the dye on the semiconductor surfaces, while X-ray photoelectron spectroscopy proves its covalent bonding. The O(2) sensitivity of the new device is comparable to those of other ruthenium-based sensor systems. This achievement paves the way to a new generation of integrable ultracompact microsensors that combine semiconductor emitter-probe assemblies.
Fabrication of optically reflecting ohmic contacts for semiconductor devices
Sopori, Bhushan L.
1995-01-01
A method is provided to produce a low-resistivity ohmic contact having high optical reflectivity on one side of a semiconductor device. The contact is formed by coating the semiconductor substrate with a thin metal film on the back reflecting side and then optically processing the wafer by illuminating it with electromagnetic radiation of a predetermined wavelength and energy level through the front side of the wafer for a predetermined period of time. This method produces a thin epitaxial alloy layer between the semiconductor substrate and the metal layer when a crystalline substrate is used. The alloy layer provides both a low-resistivity ohmic contact and high optical reflectance.
NASA Astrophysics Data System (ADS)
Bruzzi, Mara; Cartiglia, Nicolo; Pace, Emanuele; Talamonti, Cinzia
2015-10-01
The 10th edition of the International Conference on Radiation Effects on Semiconductor Materials, Detectors and Devices (RESMDD) was held in Florence, at Dipartimento di Fisica ed Astronomia on October 8-10, 2014. It has been aimed at discussing frontier research activities in several application fields as nuclear and particle physics, astrophysics, medical and solid-state physics. Main topics discussed in this conference concern performance of heavily irradiated silicon detectors, developments required for the luminosity upgrade of the Large Hadron Collider (HL-LHC), ultra-fast silicon detectors design and manufacturing, high-band gap semiconductor detectors, novel semiconductor-based devices for medical applications, radiation damage issues in semiconductors and related radiation-hardening technologies.
Controlled growth of larger heterojunction interface area for organic photosensitive devices
Yang, Fan [Somerset, NJ; Forrest, Stephen R [Ann Arbor, MI
2009-12-29
An optoelectronic device and a method of fabricating a photosensitive optoelectronic device includes depositing a first organic semiconductor material on a first electrode to form a continuous first layer having protrusions, a side of the first layer opposite the first electrode having a surface area at least three times greater than an underlying lateral cross-sectional area; depositing a second organic semiconductor material directly on the first layer to form a discontinuous second layer, portions of the first layer remaining exposed; depositing a third organic semiconductor material directly on the second layer to form a discontinuous third layer, portions of at least the second layer remaining exposed; depositing a fourth organic semiconductor material on the third layer to form a continuous fourth layer, filling any exposed gaps and recesses in the first, second, and third layers; and depositing a second electrode on the fourth layer, wherein at least one of the first electrode and the second electrode is transparent, and the first and third organic semiconductor materials are both of a donor-type or an acceptor-type relative to second and fourth organic semiconductor materials, which are of the other material type.
VLSI (Very Large Scale Integrated Circuits) Device Reliability Models.
1984-12-01
CIRCUIT COMPLEXITY FAILURE RATES FOR... A- 40 MOS SSI/MSI DEVICES IN FAILURE PER 106 HOURS TABLE 5.1.2.5-19: C1 AND C2 CIRCUIT COMPLEXITY FAILURE RATES FOR...A- 40 MOS SSI/MSI DEVICES IN FAILURE PER 106 HOURS TABLE 5.1.2.5-19: Cl AND C2 CIRCUIT COMPLEXITY FAILURE RATES FOR... A-41 LINEAR DEVICES IN...19 National Semiconductor 20 Nitron 21 Raytheon 22 Sprague 23 Synertek 24 Teledyne Crystalonics 25 TRW Semiconductor 26 Zilog The following companies
Whatever happened to silicon carbide. [semiconductor devices
NASA Technical Reports Server (NTRS)
Campbell, R. B.
1981-01-01
The progress made in silicon carbide semiconductor devices in the 1955 to 1975 time frame is examined and reasons are given for the present lack of interest in the material. Its physical and chemical properties and methods of preparation are discussed. Fabrication techniques and the characteristics of silicon carbide devices are reviewed. It is concluded that a combination of economic factors and the lack of progress in fabrication techniques leaves no viable market for SiC devices in the near future.
Metal-insulator-semiconductor heterostructures for plasmonic hot-carrier optoelectronics.
García de Arquer, F Pelayo; Konstantatos, Gerasimos
2015-06-01
Plasmonic hot-electron devices are attractive candidates for light-energy harvesting and photodetection applications. For solid state devices, the most compact and straightforward architecture is the metal-semiconductor Schottky junction. However convenient, this structure introduces limitations such as the elevated dark current associated to thermionic emission, or constraints for device design due to the finite choice of materials. In this work we theoretically consider the metal-insulator-semiconductor heterojunction as a candidate for plasmonic hot-carrier photodetection and solar cells. The presence of the insulating layer can significantly reduce the dark current, resulting in increased device performance with predicted solar power conversion efficiencies up to 9%. For photodetection, the sensitivity can be extended well into the infrared by a judicious choice of the insulating layer, with up to 300-fold expected enhancement in detectivity.
Horn, Kevin M.
2013-07-09
A method reconstructs the charge collection from regions beneath opaque metallization of a semiconductor device, as determined from focused laser charge collection response images, and thereby derives a dose-rate dependent correction factor for subsequent broad-area, dose-rate equivalent, laser measurements. The position- and dose-rate dependencies of the charge-collection magnitude of the device are determined empirically and can be combined with a digital reconstruction methodology to derive an accurate metal-correction factor that permits subsequent absolute dose-rate response measurements to be derived from laser measurements alone. Broad-area laser dose-rate testing can thereby be used to accurately determine the peak transient current, dose-rate response of semiconductor devices to penetrating electron, gamma- and x-ray irradiation.
Progress in silicon carbide semiconductor technology
NASA Technical Reports Server (NTRS)
Powell, J. A.; Neudeck, P. G.; Matus, L. G.; Petit, J. B.
1992-01-01
Silicon carbide semiconductor technology has been advancing rapidly over the last several years. Advances have been made in boule growth, thin film growth, and device fabrication. This paper wi11 review reasons for the renewed interest in SiC, and will review recent developments in both crystal growth and device fabrication.
Li, Guoliang; Cherqui, Charles; Bigelow, Nicholas W; Duscher, Gerd; Straney, Patrick J; Millstone, Jill E; Masiello, David J; Camden, Jon P
2015-05-13
Energy transfer from plasmonic nanoparticles to semiconductors can expand the available spectrum of solar energy-harvesting devices. Here, we spatially and spectrally resolve the interaction between single Ag nanocubes with insulating and semiconducting substrates using electron energy-loss spectroscopy, electrodynamics simulations, and extended plasmon hybridization theory. Our results illustrate a new way to characterize plasmon-semiconductor energy transfer at the nanoscale and bear impact upon the design of next-generation solar energy-harvesting devices.
1992-05-22
Evaluation and Control of Compound Semiconductor Materials and Technologies (EXMATEC) at Ecole Centrale de Lyon (Ecully, France, 19th to 22nd May...semiconductor technologies to manufacture advanced devices with improved reproducibility, better reliability and lower cost. -’Device structures...concepts are required for expert evaluation and control of still developing technologies . In this context, the EXMATEC series will constitute a major
Photovoltaic Device Including A Boron Doping Profile In An I-Type Layer
Yang, Liyou
1993-10-26
A photovoltaic cell for use in a single junction or multijunction photovoltaic device, which includes a p-type layer of a semiconductor compound including silicon, an i-type layer of an amorphous semiconductor compound including silicon, and an n-type layer of a semiconductor compound including silicon formed on the i-type layer. The i-type layer including an undoped first sublayer formed on the p-type layer, and a boron-doped second sublayer formed on the first sublayer.
Organic semiconductor crystals.
Wang, Chengliang; Dong, Huanli; Jiang, Lang; Hu, Wenping
2018-01-22
Organic semiconductors have attracted a lot of attention since the discovery of highly doped conductive polymers, due to the potential application in field-effect transistors (OFETs), light-emitting diodes (OLEDs) and photovoltaic cells (OPVs). Single crystals of organic semiconductors are particularly intriguing because they are free of grain boundaries and have long-range periodic order as well as minimal traps and defects. Hence, organic semiconductor crystals provide a powerful tool for revealing the intrinsic properties, examining the structure-property relationships, demonstrating the important factors for high performance devices and uncovering fundamental physics in organic semiconductors. This review provides a comprehensive overview of the molecular packing, morphology and charge transport features of organic semiconductor crystals, the control of crystallization for achieving high quality crystals and the device physics in the three main applications. We hope that this comprehensive summary can give a clear picture of the state-of-art status and guide future work in this area.
Device having two optical ports for switching applications
Rosen, Ayre; Stabile, Paul J.
1991-09-24
A two-sided light-activatable semiconductor switch device having an optical port on each side thereof. The semiconductor device may be a p-i-n diode or of bulk intrinsic material. A two ported p-i-n diode, reverse-biased to "off" by a 1.3 kV dc power supply, conducted 192 A when activated by two 1 kW laser diode arrays, one for each optical port.
Implantable biomedical devices on bioresorbable substrates
DOE Office of Scientific and Technical Information (OSTI.GOV)
Rogers, John A; Kim, Dae-Hyeong; Omenetto, Fiorenzo
Provided herein are implantable biomedical devices, methods of administering implantable biomedical devices, methods of making implantable biomedical devices, and methods of using implantable biomedical devices to actuate a target tissue or sense a parameter associated with the target tissue in a biological environment. Each implantable biomedical device comprises a bioresorbable substrate, an electronic device having a plurality of inorganic semiconductor components supported by the bioresorbable substrate, and a barrier layer encapsulating at least a portion of the inorganic semiconductor components. Upon contact with a biological environment the bioresorbable substrate is at least partially resorbed, thereby establishing conformal contact between themore » implantable biomedical device and the target tissue in the biological environment.« less
Defect Characterization, Imaging, and Control in Wide-Bandgap Semiconductors and Devices
NASA Astrophysics Data System (ADS)
Brillson, L. J.; Foster, G. M.; Cox, J.; Ruane, W. T.; Jarjour, A. B.; Gao, H.; von Wenckstern, H.; Grundmann, M.; Wang, B.; Look, D. C.; Hyland, A.; Allen, M. W.
2018-03-01
Wide-bandgap semiconductors are now leading the way to new physical phenomena and device applications at nanoscale dimensions. The impact of defects on the electronic properties of these materials increases as their size decreases, motivating new techniques to characterize and begin to control these electronic states. Leading these advances have been the semiconductors ZnO, GaN, and related materials. This paper highlights the importance of native point defects in these semiconductors and describes how a complement of spatially localized surface science and spectroscopy techniques in three dimensions can characterize, image, and begin to control these electronic states at the nanoscale. A combination of characterization techniques including depth-resolved cathodoluminescence spectroscopy, surface photovoltage spectroscopy, and hyperspectral imaging can describe the nature and distribution of defects at interfaces at both bulk and nanoscale surfaces, their metal interfaces, and inside nanostructures themselves. These features as well as temperature and mechanical strain inside wide-bandgap device structures at the nanoscale can be measured even while these devices are operating. These advanced capabilities enable several new directions for describing defects at the nanoscale, showing how they contribute to device degradation, and guiding growth processes to control them.
Thermal modeling of wide bandgap semiconductor devices for high frequency power converters
NASA Astrophysics Data System (ADS)
Sharath Sundar Ram, S.; Vijayakumari, A.
2018-02-01
The emergence of wide bandgap semiconductors has led to development of new generation semiconductor switches that are highly efficient and scalable. To exploit the advantages of GaNFETs in power converters, in terms of reduction in the size of heat sinks and filters, a thorough understanding of the thermal behavior of the device is essential. This paper aims to establish a thermal model for wideband gap semiconductor GaNFETs commercially available, which will enable power electronic designers to obtain the thermal characteristics of the device more effectively. The model parameters is obtained from the manufacturer’s data sheet by adopting an exponential curve fitting technique and the thermal model is validated using PSPICE simulations. The model was developed based on the parametric equivalence that exists between the thermal and electrical components, such that it responds for transient thermal stresses. A suitable power profile has been generated to evaluate the GaNFET model under different power dissipation scenarios. The results were compared with a Silicon MOSFETs to further highlight the advantages of the GaN devices. The proposed modeling approach can be extended for other GaN devices and can provide a platform for the thermal study and heat sink optimization.
Two-Dimensional Semiconductor Optoelectronics Based on van der Waals Heterostructures.
Lee, Jae Yoon; Shin, Jun-Hwan; Lee, Gwan-Hyoung; Lee, Chul-Ho
2016-10-27
Two-dimensional (2D) semiconductors such as transition metal dichalcogenides (TMDCs) and black phosphorous have drawn tremendous attention as an emerging optical material due to their unique and remarkable optical properties. In addition, the ability to create the atomically-controlled van der Waals (vdW) heterostructures enables realizing novel optoelectronic devices that are distinct from conventional bulk counterparts. In this short review, we first present the atomic and electronic structures of 2D semiconducting TMDCs and their exceptional optical properties, and further discuss the fabrication and distinctive features of vdW heterostructures assembled from different kinds of 2D materials with various physical properties. We then focus on reviewing the recent progress on the fabrication of 2D semiconductor optoelectronic devices based on vdW heterostructures including photodetectors, solar cells, and light-emitting devices. Finally, we highlight the perspectives and challenges of optoelectronics based on 2D semiconductor heterostructures.
Flat-lying semiconductor-insulator interfacial layer in DNTT thin films.
Jung, Min-Cherl; Leyden, Matthew R; Nikiforov, Gueorgui O; Lee, Michael V; Lee, Han-Koo; Shin, Tae Joo; Takimiya, Kazuo; Qi, Yabing
2015-01-28
The molecular order of organic semiconductors at the gate dielectric is the most critical factor determining carrier mobility in thin film transistors since the conducting channel forms at the dielectric interface. Despite its fundamental importance, this semiconductor-insulator interface is not well understood, primarily because it is buried within the device. We fabricated dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT) thin film transistors by thermal evaporation in vacuum onto substrates held at different temperatures and systematically correlated the extracted charge mobility to the crystal grain size and crystal orientation. As a result, we identify a molecular layer of flat-lying DNTT molecules at the semiconductor-insulator interface. It is likely that such a layer might form in other material systems as well, and could be one of the factors reducing charge transport. Controlling this interfacial flat-lying layer may raise the ultimate possible device performance for thin film devices.
Two-Dimensional Semiconductor Optoelectronics Based on van der Waals Heterostructures
Lee, Jae Yoon; Shin, Jun-Hwan; Lee, Gwan-Hyoung; Lee, Chul-Ho
2016-01-01
Two-dimensional (2D) semiconductors such as transition metal dichalcogenides (TMDCs) and black phosphorous have drawn tremendous attention as an emerging optical material due to their unique and remarkable optical properties. In addition, the ability to create the atomically-controlled van der Waals (vdW) heterostructures enables realizing novel optoelectronic devices that are distinct from conventional bulk counterparts. In this short review, we first present the atomic and electronic structures of 2D semiconducting TMDCs and their exceptional optical properties, and further discuss the fabrication and distinctive features of vdW heterostructures assembled from different kinds of 2D materials with various physical properties. We then focus on reviewing the recent progress on the fabrication of 2D semiconductor optoelectronic devices based on vdW heterostructures including photodetectors, solar cells, and light-emitting devices. Finally, we highlight the perspectives and challenges of optoelectronics based on 2D semiconductor heterostructures. PMID:28335321
Active Control of Charge Density Waves at Degenerate Semiconductor Interfaces
NASA Astrophysics Data System (ADS)
Vinnakota, Raj; Genov, Dentcho
We present numerical modeling of an active electronically controlled highly confined charge-density waves, i.e. surface plasmon polaritons (SPPs) at the metallurgic interfaces of degenerate semiconductor materials. An electro-optic switching element for fully-functional plasmonic circuits based on p-n junction semiconductor Surface Plasmon Polariton (SPP) waveguide is shown. Two figures of merits are introduced and parametric study has been performed identifying the device optimal operation range. The Indium Gallium Arsenide (In0.53Ga0.47As) is identified as the best semiconductor material for the device providing high optical confinement, reduced system size and fast operation. The electro-optic SPP switching element is shown to operate at signal modulation up to -24dB and switching rates surpassing 100GHz, thus potentially providing a new pathway toward bridging the gap between electronic and photonic devices. The current work is funded by the NSF EPSCoR CIMM project under award #OIA-1541079.
Tao, Ye; Xu, Lijia; Zhang, Zhen; Chen, Runfeng; Li, Huanhuan; Xu, Hui; Zheng, Chao; Huang, Wei
2016-08-03
Current static-state explorations of organic semiconductors for optimal material properties and device performance are hindered by limited insights into the dynamically changed molecular states and charge transport and energy transfer processes upon device operation. Here, we propose a simple yet successful strategy, resonance variation-based dynamic adaptation (RVDA), to realize optimized self-adaptive properties in donor-resonance-acceptor molecules by engineering the resonance variation for dynamic tuning of organic semiconductors. Organic light-emitting diodes hosted by these RVDA materials exhibit remarkably high performance, with external quantum efficiencies up to 21.7% and favorable device stability. Our approach, which supports simultaneous realization of dynamically adapted and selectively enhanced properties via resonance engineering, illustrates a feasible design map for the preparation of smart organic semiconductors capable of dynamic structure and property modulations, promoting the studies of organic electronics from static to dynamic.
Exchanging Ohmic Losses in Metamaterial Absorbers with Useful Optical Absorption for Photovoltaics
Vora, Ankit; Gwamuri, Jephias; Pala, Nezih; Kulkarni, Anand; Pearce, Joshua M.; Güney, Durdu Ö.
2014-01-01
Using metamaterial absorbers, we have shown that metallic layers in the absorbers do not necessarily constitute undesired resistive heating problem for photovoltaics. Tailoring the geometric skin depth of metals and employing the natural bulk absorbance characteristics of the semiconductors in those absorbers can enable the exchange of undesired resistive losses with the useful optical absorbance in the active semiconductors. Thus, Ohmic loss dominated metamaterial absorbers can be converted into photovoltaic near-perfect absorbers with the advantage of harvesting the full potential of light management offered by the metamaterial absorbers. Based on experimental permittivity data for indium gallium nitride, we have shown that between 75%–95% absorbance can be achieved in the semiconductor layers of the converted metamaterial absorbers. Besides other metamaterial and plasmonic devices, our results may also apply to photodectors and other metal or semiconductor based optical devices where resistive losses and power consumption are important pertaining to the device performance. PMID:24811322
Semiconductor wire array structures, and solar cells and photodetectors based on such structures
Kelzenberg, Michael D.; Atwater, Harry A.; Briggs, Ryan M.; Boettcher, Shannon W.; Lewis, Nathan S.; Petykiewicz, Jan A.
2014-08-19
A structure comprising an array of semiconductor structures, an infill material between the semiconductor materials, and one or more light-trapping elements is described. Photoconverters and photoelectrochemical devices based on such structure also described.
Wu, Menghao; Dong, Shuai; Yao, Kailun; Liu, Junming; Zeng, Xiao Cheng
2016-11-09
Realization of ferroelectric semiconductors by conjoining ferroelectricity with semiconductors remains a challenging task because most present-day ferroelectric materials are unsuitable for such a combination due to their wide bandgaps. Herein, we show first-principles evidence toward the realization of a new class of two-dimensional (2D) ferroelectric semiconductors through covalent functionalization of many prevailing 2D materials. Members in this new class of 2D ferroelectric semiconductors include covalently functionalized germanene, and stanene (Nat. Commun. 2014, 5, 3389), as well as MoS 2 monolayer (Nat. Chem. 2015, 7, 45), covalent functionalization of the surface of bulk semiconductors such as silicon (111) (J. Phys. Chem. B 2006, 110 , 23898), and the substrates of oxides such as silica with self-assembly monolayers (Nano Lett. 2014, 14, 1354). The newly predicted 2D ferroelectric semiconductors possess high mobility, modest bandgaps, and distinct ferroelectricity that can be exploited for developing various heterostructural devices with desired functionalities. For example, we propose applications of the 2D materials as 2D ferroelectric field-effect transistors with ultrahigh on/off ratio, topological transistors with Dirac Fermions switchable between holes and electrons, ferroelectric junctions with ultrahigh electro-resistance, and multiferroic junctions for controlling spin by electric fields. All these heterostructural devices take advantage of the combination of high-mobility semiconductors with fast writing and nondestructive reading capability of nonvolatile memory, thereby holding great potential for the development of future multifunctional devices.
Resistive field structures for semiconductor devices and uses therof
DOE Office of Scientific and Technical Information (OSTI.GOV)
Marinella, Matthew; DasGupta, Sandeepan; Kaplar, Robert
The present disclosure relates to resistive field structures that provide improved electric field profiles when used with a semiconductor device. In particular, the resistive field structures provide a uniform electric field profile, thereby enhancing breakdown voltage and improving reliability. In example, the structure is a field cage that is configured to be resistive, in which the potential changes significantly over the distance of the cage. In another example, the structure is a resistive field plate. Using these resistive field structures, the characteristics of the electric field profile can be independently modulated from the physical parameters of the semiconductor device. Additionalmore » methods and architectures are described herein.« less
Electrical Characterization of Semiconductor Materials and Devices
NASA Astrophysics Data System (ADS)
Deen, M.; Pascal, Fabien
Semiconductor materials and devices continue to occupy a preeminent technological position due to their importance when building integrated electronic systems used in a wide range of applications from computers, cell-phones, personal digital assistants, digital cameras and electronic entertainment systems, to electronic instrumentation for medical diagnositics and environmental monitoring. Key ingredients of this technological dominance have been the rapid advances made in the quality and processing of materials - semiconductors, conductors and dielectrics - which have given metal oxide semiconductor device technology its important characteristics of negligible standby power dissipation, good input-output isolation, surface potential control and reliable operation. However, when assessing material quality and device reliability, it is important to have fast, nondestructive, accurate and easy-to-use electrical characterization techniques available, so that important parameters such as carrier doping density, type and mobility of carriers, interface quality, oxide trap density, semiconductor bulk defect density, contact and other parasitic resistances and oxide electrical integrity can be determined. This chapter describes some of the more widely employed and popular techniques that are used to determine these important parameters. The techniques presented in this chapter range in both complexity and test structure requirements from simple current-voltage measurements to more sophisticated low-frequency noise, charge pumping and deep-level transient spectroscopy techniques.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Suzuki, Tatsuo, E-mail: dr.tatsuosuzuki@gmail.com
Group III-V compounds are very important as the materials of semiconductor devices. Stable structures of the monolayers of group III-V binary compounds have been discovered by using first-principles calculations. The primitive unit cell of the discovered structures is a rectangle, which includes four group-III atoms and four group-V atoms. A group-III atom and its three nearest-neighbor group-V atoms are placed on the same plane; however, these connections are not the sp{sup 2} hybridization. The bond angles around the group-V atoms are less than the bond angle of sp{sup 3} hybridization. The discovered structure of GaP is an indirect transition semiconductor,more » while the discovered structures of GaAs, InP, and InAs are direct transition semiconductors. Therefore, the discovered structures of these compounds have the potential of the materials for semiconductor devices, for example, water splitting photocatalysts. The discovered structures may become the most stable structures of monolayers which consist of other materials.« less
Electroless silver plating of the surface of organic semiconductors.
Campione, Marcello; Parravicini, Matteo; Moret, Massimo; Papagni, Antonio; Schröter, Bernd; Fritz, Torsten
2011-10-04
The integration of nanoscale processes and devices demands fabrication routes involving rapid, cost-effective steps, preferably carried out under ambient conditions. The realization of the metal/organic semiconductor interface is one of the most demanding steps of device fabrication, since it requires mechanical and/or thermal treatments which increment costs and are often harmful in respect to the active layer. Here, we provide a microscopic analysis of a room temperature, electroless process aimed at the deposition of a nanostructured metallic silver layer with controlled coverage atop the surface of single crystals and thin films of organic semiconductors. This process relies on the reaction of aqueous AgF solutions with the nonwettable crystalline surface of donor-type organic semiconductors. It is observed that the formation of a uniform layer of silver nanoparticles can be accomplished within 20 min contact time. The electrical characterization of two-terminal devices performed before and after the aforementioned treatment shows that the metal deposition process is associated with a redox reaction causing the p-doping of the semiconductor. © 2011 American Chemical Society
Jang, Jun Tae; Park, Jozeph; Ahn, Byung Du; Kim, Dong Myong; Choi, Sung-Jin; Kim, Hyun-Suk; Kim, Dae Hwan
2015-07-22
Persistent photoconduction (PPC) is a phenomenon that limits the application of oxide semiconductor thin-film transistors (TFTs) in optical sensor-embedded displays. In the present work, a study on zinc oxynitride (ZnON) semiconductor TFTs based on the combination of experimental results and device simulation is presented. Devices incorporating ZnON semiconductors exhibit negligible PPC effects compared with amorphous In-Ga-Zn-O (a-IGZO) TFTs, and the difference between the two types of materials are examined by monochromatic photonic C-V spectroscopy (MPCVS). The latter method allows the estimation of the density of subgap states in the semiconductor, which may account for the different behavior of ZnON and IGZO materials with respect to illumination and the associated PPC. In the case of a-IGZO TFTs, the oxygen flow rate during the sputter deposition of a-IGZO is found to influence the amount of PPC. Small oxygen flow rates result in pronounced PPC, and large densities of valence band tail (VBT) states are observed in the corresponding devices. This implies a dependence of PPC on the amount of oxygen vacancies (VO). On the other hand, ZnON has a smaller bandgap than a-IGZO and contains a smaller density of VBT states over the entire range of its bandgap energy. Here, the concept of activation energy window (AEW) is introduced to explain the occurrence of PPC effects by photoinduced electron doping, which is likely to be associated with the formation of peroxides in the semiconductor. The analytical methodology presented in this report accounts well for the reduction of PPC in ZnON TFTs, and provides a quantitative tool for the systematic development of phototransistors for optical sensor-embedded interactive displays.
High efficiency, low cost, thin film silicon solar cell design and method for making
Sopori, Bhushan L.
2001-01-01
A semiconductor device having a substrate, a conductive intermediate layer deposited onto said substrate, wherein the intermediate layer serves as a back electrode, an optical reflector, and an interface for impurity gettering, and a semiconductor layer deposited onto said intermediate layer, wherein the semiconductor layer has a grain size at least as large as the layer thickness, and preferably about ten times the layer thickness. The device is formed by depositing a metal layer on a substrate, depositing a semiconductive material on the metal-coated substrate to produce a composite structure, and then optically processing the composite structure by illuminating it with infrared electromagnetic radiation according to a unique time-energy profile that first produces pits in the backside surface of the semiconductor material, then produces a thin, highly reflective, low resistivity alloy layer over the entire area of the interface between the semiconductor material and the metal layer, and finally produces a grain-enhanced semiconductor layer. The time-energy profile includes increasing the energy to a first energy level to initiate pit formation and create the desired pit size and density, then ramping up to a second energy level in which the entire device is heated to produce an interfacial melt, and finally reducing the energy to a third energy level and holding for a period of time to allow enhancement in the grain size of the semiconductor layer.
High efficiency low cost thin film silicon solar cell design and method for making
Sopori, Bhushan L.
1999-01-01
A semiconductor device having a substrate, a conductive intermediate layer deposited onto said substrate, wherein the intermediate layer serves as a back electrode, an optical reflector, and an interface for impurity gettering, and a semiconductor layer deposited onto said intermediate layer, wherein the semiconductor layer has a grain size at least as large as the layer thickness, and preferably about ten times the layer thickness. The device is formed by depositing a metal layer on a substrate, depositing a semiconductive material on the metal-coated substrate to produce a composite structure, and then optically processing the composite structure by illuminating it with infrared electromagnetic radiation according to a unique time-energy profile that first produces pits in the backside surface of the semiconductor material, then produces a thin, highly reflective, low resistivity alloy layer over the entire area of the interface between the semiconductor material and the metal layer, and finally produces a grain-enhanced semiconductor layer. The time-energy profile includes increasing the energy to a first energy level to initiate pit formation and create the desired pit size and density, then ramping up to a second energy level in which the entire device is heated to produce an interfacial melt, and finally reducing the energy to a third energy level and holding for a period of time to allow enhancement in the grain size of the semiconductor layer.
Graded junction termination extensions for electronic devices
NASA Technical Reports Server (NTRS)
Merrett, J. Neil (Inventor); Isaacs-Smith, Tamara (Inventor); Sheridan, David C. (Inventor); Williams, John R. (Inventor)
2006-01-01
A graded junction termination extension in a silicon carbide (SiC) semiconductor device and method of its fabrication using ion implementation techniques is provided for high power devices. The properties of silicon carbide (SiC) make this wide band gap semiconductor a promising material for high power devices. This potential is demonstrated in various devices such as p-n diodes, Schottky diodes, bipolar junction transistors, thyristors, etc. These devices require adequate and affordable termination techniques to reduce leakage current and increase breakdown voltage in order to maximize power handling capabilities. The graded junction termination extension disclosed is effective, self-aligned, and simplifies the implementation process.
Graded junction termination extensions for electronic devices
NASA Technical Reports Server (NTRS)
Merrett, J. Neil (Inventor); Isaacs-Smith, Tamara (Inventor); Sheridan, David C. (Inventor); Williams, John R. (Inventor)
2007-01-01
A graded junction termination extension in a silicon carbide (SiC) semiconductor device and method of its fabrication using ion implementation techniques is provided for high power devices. The properties of silicon carbide (SiC) make this wide band gap semiconductor a promising material for high power devices. This potential is demonstrated in various devices such as p-n diodes, Schottky diodes, bipolar junction transistors, thyristors, etc. These devices require adequate and affordable termination techniques to reduce leakage current and increase breakdown voltage in order to maximize power handling capabilities. The graded junction termination extension disclosed is effective, self-aligned, and simplifies the implementation process.
Low temperature junction growth using hot-wire chemical vapor deposition
Wang, Qi; Page, Matthew; Iwaniczko, Eugene; Wang, Tihu; Yan, Yanfa
2014-02-04
A system and a process for forming a semi-conductor device, and solar cells (10) formed thereby. The process includes preparing a substrate (12) for deposition of a junction layer (14); forming the junction layer (14) on the substrate (12) using hot wire chemical vapor deposition; and, finishing the semi-conductor device.
Mechanical scriber for semiconductor devices
Lin, Peter T.
1985-01-01
A mechanical scriber using a scribing tip, such as a diamond, provides controlled scriber forces with a spring-loaded compound lever arrangement. The scribing force and range of scribing depth are adjusted by a pair of adjustable micrometer heads. A semiconductor device, such as a multilayer solar cell, can be formed into scribed strips at each layer.
Semiconductors: In Situ Processing of Photovoltaic Devices
NASA Technical Reports Server (NTRS)
Curreri, Peter A.
1998-01-01
The possible processing of semiconductor photovoltaic devices is discussed. The requirements for lunar PV cells is reviewed, and the key challenges involved in their manufacturing are investigated. A schematic diagram of a passivated emitter and rear cell (PERC) is presented. The possible fabrication of large photovoltaic arrays in space from lunar materials is also discussed.
Methods to Account for Accelerated Semi-Conductor Device Wearout in Longlife Aerospace Applications
2003-01-01
Vasi, “Device scalling effects on hot-carrier induced interface and oxide-trappoing charge distributions in MOSFETs,” IEEE Transactions on Electron...Symposium Proceedings, pp. 248–254, 2002. [104] S. I. A. ( SIA ), “International technology roadmap for semiconductors.” <www.semichips.org>, 1999. 113
Circuit For Current-vs.-Voltage Tests Of Semiconductors
NASA Technical Reports Server (NTRS)
Huston, Steven W.
1991-01-01
Circuit designed for measurement of dc current-versus-voltage characteristics of semiconductor devices. Operates in conjunction with x-y pen plotter or digital storage oscilloscope, which records data. Includes large feedback resistors to prevent high currents damaging device under test. Principal virtues: low cost, simplicity, and compactness. Also used to evaluate diodes and transistors.
Metal-oxide-semiconductor devices using Ga2O3 dielectrics on n-type GaN
NASA Astrophysics Data System (ADS)
Lee, Ching-Ting; Chen, Hong-Wei; Lee, Hsin-Ying
2003-06-01
Using a photoelectrochemical method involving a He-Cd laser, Ga2O3 oxide layers were directly grown on n-type GaN. We demonstrated the performance of the resultant metal-oxide-semiconductor devices based on the grown Ga2O3 layer. An extremely low reverse leakage current of 200 pA was achieved when devices operated at -20 V. Furthermore, high forward and reverse breakdown electric fields of 2.80 MV/cm and 5.70 MV/cm, respectively, were obtained. Using a photoassisted current-voltage method, a low interface state density of 2.53×1011 cm-2 eV-1 was estimated. The varactor devices permit formation of inversion layers, so that they may be applied for the fabrication of metal-oxide-semiconductor field-effect transistors.
Fabrication of optically reflecting ohmic contacts for semiconductor devices
Sopori, B.L.
1995-07-04
A method is provided to produce a low-resistivity ohmic contact having high optical reflectivity on one side of a semiconductor device. The contact is formed by coating the semiconductor substrate with a thin metal film on the back reflecting side and then optically processing the wafer by illuminating it with electromagnetic radiation of a predetermined wavelength and energy level through the front side of the wafer for a predetermined period of time. This method produces a thin epitaxial alloy layer between the semiconductor substrate and the metal layer when a crystalline substrate is used. The alloy layer provides both a low-resistivity ohmic contact and high optical reflectance. 5 figs.
Photonic Switching Devices Using Light Bullets
NASA Technical Reports Server (NTRS)
Goorjian, Peter M. (Inventor)
1999-01-01
A unique ultra-fast, all-optical switching device or switch is made with readily available, relatively inexpensive, highly nonlinear optical materials. which includes highly nonlinear optical glasses, semiconductor crystals and/or multiple quantum well semiconductor materials. At the specified wavelengths. these optical materials have a sufficiently negative group velocity dispersion and high nonlinear index of refraction to support stable light bullets. The light bullets counter-propagate through, and interact within the waveguide to selectively change each others' directions of propagation into predetermined channels. In one embodiment, the switch utilizes a rectangularly planar slab waveguide. and further includes two central channels and a plurality of lateral channels for guiding the light bullets into and out of the waveguide. An advantage of the present all-optical switching device lies in its practical use of light bullets, thus preventing the degeneration of the pulses due to dispersion and diffraction at the front and back of the pulses. Another advantage of the switching device is the relative insensitivity of the collision process to the time difference in which the counter-propagating pulses enter the waveguide. since. contrary to conventional co-propagating spatial solitons, the relative phase of the colliding pulses does not affect the interaction of these pulses. Yet another feature of the present all-optical switching device is the selection of the light pulse parameters which enables the generation of light bullets in nonlinear optical materials. including highly nonlinear optical glasses and semiconductor materials such as semiconductor crystals and/or multiple quantum well semiconductor materials.
Stretchable form of single crystal silicon for high performance electronics on rubber substrates
University of Illinois
2009-04-21
The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.
Stretchable form of single crystal silicon for high performance electronics on rubber substrates
Rogers, John A [Champaign, IL; Khang, Dahl-Young [Seoul, KR; Sun, Yugang [Naperville, IL; Menard, Etienne [Durham, NC
2012-06-12
The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.
Stretchable form of single crystal silicon for high performance electronics on rubber substrates
Rogers, John A.; Khang, Dahl-Young; Sun, Yugang; Menard, Etienne
2014-06-17
The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.
Stretchable form of single crystal silicon for high performance electronics on rubber substrates
Rogers, John A.; Khang, Dahl-Young; Sun, Yugang; Menard, Etienne
2016-12-06
The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.
Stretchable form of single crystal silicon for high performance electronics on rubber substrates
Rogers, John A.; Khang, Dahl -Young; Sun, Yugang; Menard, Etienne
2015-08-11
The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.
Dry etching method for compound semiconductors
Shul, Randy J.; Constantine, Christopher
1997-01-01
A dry etching method. According to the present invention, a gaseous plasma comprising, at least in part, boron trichloride, methane, and hydrogen may be used for dry etching of a compound semiconductor material containing layers including aluminum, or indium, or both. Material layers of a compound semiconductor alloy such as AlGaInP or the like may be anisotropically etched for forming electronic devices including field-effect transistors and heterojunction bipolar transistors and for forming photonic devices including vertical-cavity surface-emitting lasers, edge-emitting lasers, and reflectance modulators.
Dry etching method for compound semiconductors
Shul, R.J.; Constantine, C.
1997-04-29
A dry etching method is disclosed. According to the present invention, a gaseous plasma comprising, at least in part, boron trichloride, methane, and hydrogen may be used for dry etching of a compound semiconductor material containing layers including aluminum, or indium, or both. Material layers of a compound semiconductor alloy such as AlGaInP or the like may be anisotropically etched for forming electronic devices including field-effect transistors and heterojunction bipolar transistors and for forming photonic devices including vertical-cavity surface-emitting lasers, edge-emitting lasers, and reflectance modulators. 1 fig.
Root, Samuel E; Savagatrup, Suchol; Printz, Adam D; Rodriquez, Daniel; Lipomi, Darren J
2017-05-10
Mechanical deformability underpins many of the advantages of organic semiconductors. The mechanical properties of these materials are, however, diverse, and the molecular characteristics that permit charge transport can render the materials stiff and brittle. This review is a comprehensive description of the molecular and morphological parameters that govern the mechanical properties of organic semiconductors. Particular attention is paid to ways in which mechanical deformability and electronic performance can coexist. The review begins with a discussion of flexible and stretchable devices of all types, and in particular the unique characteristics of organic semiconductors. It then discusses the mechanical properties most relevant to deformable devices. In particular, it describes how low modulus, good adhesion, and absolute extensibility prior to fracture enable robust performance, along with mechanical "imperceptibility" if worn on the skin. A description of techniques of metrology precedes a discussion of the mechanical properties of three classes of organic semiconductors: π-conjugated polymers, small molecules, and composites. The discussion of each class of materials focuses on molecular structure and how this structure (and postdeposition processing) influences the solid-state packing structure and thus the mechanical properties. The review concludes with applications of organic semiconductor devices in which every component is intrinsically stretchable or highly flexible.
Moustakas, Theodore D.; Maruska, H. Paul
1985-07-09
A high efficiency amorphous silicon PIN semiconductor device having partially crystallized (microcrystalline) P and N layers is constructed by the sequential sputtering of N, I and P layers and at least one semi-transparent ohmic electrode. The method of construction produces a PIN device, exhibiting enhanced electrical and optical properties, improved physical integrity, and facilitates the preparation in a singular vacuum system and vacuum pump down procedure.
Semiconductor superlattice photodetectors
NASA Technical Reports Server (NTRS)
Chuang, S. L.; Hess, K.; Coleman, J. J.; Leburton, J. P.
1984-01-01
A superlattice photomultiplier and a photodetector based on the real space transfer mechanism were studied. The wavelength for the first device is of the order of a micron or flexible corresponding to the bandgap absorption in a semiconductor. The wavelength for the second device is in the micron range (about 2 to 12 microns) corresponding to the energy of the conduction band edge discontinuity between an Al/(sub x)Ga(sub 1-x)As and GaAs interface. Both devices are described.
Advanced development of double-injection, deep-impurity semiconductor switches
NASA Technical Reports Server (NTRS)
Hanes, M. H.
1987-01-01
Deep-impurity, double-injection devices, commonly refered to as (DI) squared devices, represent a class of semiconductor switches possessing a very high degree of tolerance to electron and neutron irradiation and to elevated temperature operation. These properties have caused them to be considered as attractive candidates for space power applications. The design, fabrication, and testing of several varieties of (DI) squared devices intended for power switching are described. All of these designs were based upon gold-doped silicon material. Test results, along with results of computer simulations of device operation, other calculations based upon the assumed mode of operation of (DI) squared devices, and empirical information regarding power semiconductor device operation and limitations, have led to the conculsion that these devices are not well suited to high-power applications. When operated in power circuitry configurations, they exhibit high-power losses in both the off-state and on-state modes. These losses are caused by phenomena inherent to the physics and material of the devices and cannot be much reduced by device design optimizations. The (DI) squared technology may, however, find application in low-power functions such as sensing, logic, and memory, when tolerance to radiation and temperature are desirable (especially is device performance is improved by incorporation of deep-level impurities other than gold.
ERIC Educational Resources Information Center
Seng, Set; Shinpei, Tomita; Yoshihiko, Inada; Masakazu, Kita
2014-01-01
The precise measurement of conductivity of a semiconductor film such as polypyrrole (Ppy) should be carried out by the four-point probe method; however, this is difficult for classroom application. This article describes the development of a new, convenient, handmade conductivity device from inexpensive materials that can measure the conductivity…
Color selective photodetector and methods of making
Walker, Brian J.; Dorn, August; Bulovic, Vladimir; Bawendi, Moungi G.
2013-03-19
A photoelectric device, such as a photodetector, can include a semiconductor nanowire electrostatically associated with a J-aggregate. The J-aggregate can facilitate absorption of a desired wavelength of light, and the semiconductor nanowire can facilitate charge transport. The color of light detected by the device can be chosen by selecting a J-aggregate with a corresponding peak absorption wavelength.
Moustakas, Theodore D.; Maruska, H. Paul
1985-04-02
A silicon PIN microcrystalline/amorphous silicon semiconductor device is constructed by the sputtering of N, and P layers of silicon from silicon doped targets and the I layer from an undoped target, and at least one semi-transparent ohmic electrode.
Mechanical scriber for semiconductor devices
Lin, P.T.
1985-03-05
A mechanical scriber using a scribing tip, such as a diamond, provides controlled scriber forces with a spring-loaded compound lever arrangement. The scribing force and range of scribing depth are adjusted by a pair of adjustable micrometer heads. A semiconductor device, such as a multilayer solar cell, can be formed into scribed strips at each layer. 5 figs.
NASA Technical Reports Server (NTRS)
Lauenstein, Jean-Marie
2016-01-01
The JEDEC JESD57 test standard, Procedures for the Measurement of Single-Event Effects in Semiconductor Devices from Heavy-Ion Irradiation, is undergoing its first revision since 1996. This presentation will provide an overview of some of the key proposed updates to the document.
Multilevel metallization method for fabricating a metal oxide semiconductor device
NASA Technical Reports Server (NTRS)
Hollis, B. R., Jr.; Feltner, W. R.; Bouldin, D. L.; Routh, D. E. (Inventor)
1978-01-01
An improved method is described of constructing a metal oxide semiconductor device having multiple layers of metal deposited by dc magnetron sputtering at low dc voltages and low substrate temperatures. The method provides multilevel interconnections and cross over between individual circuit elements in integrated circuits without significantly reducing the reliability or seriously affecting the yield.
Monolayer graphene-insulator-semiconductor emitter for large-area electron lithography
NASA Astrophysics Data System (ADS)
Kirley, Matthew P.; Aloui, Tanouir; Glass, Jeffrey T.
2017-06-01
The rapid adoption of nanotechnology in fields as varied as semiconductors, energy, and medicine requires the continual improvement of nanopatterning tools. Lithography is central to this evolving nanotechnology landscape, but current production systems are subject to high costs, low throughput, or low resolution. Herein, we present a solution to these problems with the use of monolayer graphene in a graphene-insulator-semiconductor (GIS) electron emitter device for large-area electron lithography. Our GIS device displayed high emission efficiency (up to 13%) and transferred large patterns (500 × 500 μm) with high fidelity (<50% spread). The performance of our device demonstrates a feasible path to dramatic improvements in lithographic patterning systems, enabling continued progress in existing industries and opening opportunities in nanomanufacturing.
Recent progress in high-mobility thin-film transistors based on multilayer 2D materials
NASA Astrophysics Data System (ADS)
Hong, Young Ki; Liu, Na; Yin, Demin; Hong, Seongin; Kim, Dong Hak; Kim, Sunkook; Choi, Woong; Yoon, Youngki
2017-04-01
Two-dimensional (2D) layered semiconductors are emerging as promising candidates for next-generation thin-film electronics because of their high mobility, relatively large bandgap, low-power switching, and the availability of large-area growth methods. Thin-film transistors (TFTs) based on multilayer transition metal dichalcogenides or black phosphorus offer unique opportunities for next-generation electronic and optoelectronic devices. Here, we review recent progress in high-mobility transistors based on multilayer 2D semiconductors. We describe the theoretical background on characterizing methods of TFT performance and material properties, followed by their applications in flexible, transparent, and optoelectronic devices. Finally, we highlight some of the methods used in metal-semiconductor contacts, hybrid structures, heterostructures, and chemical doping to improve device performance.
Thermally robust semiconductor optical amplifiers and laser diodes
Dijaili, Sol P.; Patterson, Frank G.; Walker, Jeffrey D.; Deri, Robert J.; Petersen, Holly; Goward, William
2002-01-01
A highly heat conductive layer is combined with or placed in the vicinity of the optical waveguide region of active semiconductor components. The thermally conductive layer enhances the conduction of heat away from the active region, which is where the heat is generated in active semiconductor components. This layer is placed so close to the optical region that it must also function as a waveguide and causes the active region to be nearly the same temperature as the ambient or heat sink. However, the semiconductor material itself should be as temperature insensitive as possible and therefore the invention combines a highly thermally conductive dielectric layer with improved semiconductor materials to achieve an overall package that offers improved thermal performance. The highly thermally conductive layer serves two basic functions. First, it provides a lower index material than the semiconductor device so that certain kinds of optical waveguides may be formed, e.g., a ridge waveguide. The second and most important function, as it relates to this invention, is that it provides a significantly higher thermal conductivity than the semiconductor material, which is the principal material in the fabrication of various optoelectronic devices.
DOE Office of Scientific and Technical Information (OSTI.GOV)
S Kim; M Jang; H Yang
2011-12-31
Organic field-effect transistors (OFETs) are fabricated by depositing a thin film of semiconductor on the functionalized surface of a SiO{sub 2} dielectric. The chemical and morphological structures of the interface between the semiconductor and the functionalized dielectric are critical for OFET performance. We have characterized the effect of the affinity between semiconductor and functionalized dielectric on the properties of the semiconductor-dielectric interface. The crystalline microstructure/nanostructure of the pentacene semiconductor layers, grown on a dielectric substrate that had been functionalized with either poly(4-vinyl pyridine) or polystyrene (to control hydrophobicity), and grown under a series of substrate temperatures and deposition rates, weremore » characterized by X-ray diffraction, photoemission spectroscopy, and atomic force microscopy. By comparing the morphological features of the semiconductor thin films with the device characteristics (field-effect mobility, threshold voltage, and hysteresis) of the OFET devices, the effect of affinity-driven properties on charge modulation, charge trapping, and charge carrier transport could be described.« less
Electronic-carrier-controlled photochemical etching process in semiconductor device fabrication
Ashby, C.I.H.; Myers, D.R.; Vook, F.L.
1988-06-16
An electronic-carrier-controlled photochemical etching process for carrying out patterning and selective removing of material in semiconductor device fabrication includes the steps of selective ion implanting, photochemical dry etching, and thermal annealing, in that order. In the selective ion implanting step, regions of the semiconductor material in a desired pattern are damaged and the remainder of the regions of the material not implanted are left undamaged. The rate of recombination of electrons and holes is increased in the damaged regions of the pattern compared to undamaged regions. In the photochemical dry etching step which follows ion implanting step, the material in the undamaged regions of the semiconductor are removed substantially faster than in the damaged regions representing the pattern, leaving the ion-implanted, damaged regions as raised surface structures on the semiconductor material. After completion of photochemical dry etching step, the thermal annealing step is used to restore the electrical conductivity of the damaged regions of the semiconductor material.
Electronic-carrier-controlled photochemical etching process in semiconductor device fabrication
Ashby, Carol I. H.; Myers, David R.; Vook, Frederick L.
1989-01-01
An electronic-carrier-controlled photochemical etching process for carrying out patterning and selective removing of material in semiconductor device fabrication includes the steps of selective ion implanting, photochemical dry etching, and thermal annealing, in that order. In the selective ion implanting step, regions of the semiconductor material in a desired pattern are damaged and the remainder of the regions of the material not implanted are left undamaged. The rate of recombination of electrons and holes is increased in the damaged regions of the pattern compared to undamaged regions. In the photochemical dry etching step which follows ion implanting step, the material in the undamaged regions of the semiconductor are removed substantially faster than in the damaged regions representing the pattern, leaving the ion-implanted, damaged regions as raised surface structures on the semiconductor material. After completion of photochemical dry etching step, the thermal annealing step is used to restore the electrical conductivity of the damaged regions of the semiconductor material.
A stable solution-processed polymer semiconductor with record high-mobility for printed transistors
Li, Jun; Zhao, Yan; Tan, Huei Shuan; Guo, Yunlong; Di, Chong-An; Yu, Gui; Liu, Yunqi; Lin, Ming; Lim, Suo Hon; Zhou, Yuhua; Su, Haibin; Ong, Beng S.
2012-01-01
Microelectronic circuits/arrays produced via high-speed printing instead of traditional photolithographic processes offer an appealing approach to creating the long-sought after, low-cost, large-area flexible electronics. Foremost among critical enablers to propel this paradigm shift in manufacturing is a stable, solution-processable, high-performance semiconductor for printing functionally capable thin-film transistors — fundamental building blocks of microelectronics. We report herein the processing and optimisation of solution-processable polymer semiconductors for thin-film transistors, demonstrating very high field-effect mobility, high on/off ratio, and excellent shelf-life and operating stabilities under ambient conditions. Exceptionally high-gain inverters and functional ring oscillator devices on flexible substrates have been demonstrated. This optimised polymer semiconductor represents a significant progress in semiconductor development, dispelling prevalent skepticism surrounding practical usability of organic semiconductors for high-performance microelectronic devices, opening up application opportunities hitherto functionally or economically inaccessible with silicon technologies, and providing an excellent structural framework for fundamental studies of charge transport in organic systems. PMID:23082244
Proton Nonionizing Energy Loss (NIEL) for Device Applications
NASA Technical Reports Server (NTRS)
Jun, Insoo; Xapsos, Michael A.; Messenger, Scott R.; Burke, Edward A.; Walters, Robert J.; Summers, Geoff; Jordan, Thomas
2003-01-01
Nonionizing energy loss (NIEL) is a quantity that describes the rate of energy loss due to atomic displacements as a particle traverses a material. The product of the NIEL and the particle fluence (time integrated flux) gives the displacement damage energy deposition per unit mass of material. NIEL plays the same role to the displacement damage energy deposition as the stopping power to the total ionizing dose (TID). The concept of NIEL has been very useful for correlating particle induced displacement damage effects in semiconductor and optical devices. Many studies have successfully demonstrated that the degradation of semiconductor devices or optical sensors in a radiation field can be linearly correlated to the displacement damage energy, and subsequently to the NIEL deposited in the semiconductor devices or optical sensors. In addition, the NIEL concept was also useful in the study of both Si and GaAs solar cells and of high temperature superconductors, and at predicting the survivability of detectors used at the LHC at CERN. On the other hand, there are some instances where discrepancies are observed in the application of NIEL, most notably in GaAs semiconductor devices. However, NIEL is still a valuable tool, and can be used to scale damages produced by different particles and in different environments, even though this is not understood at the microscopic level.
NASA Astrophysics Data System (ADS)
An, Yanbin; Shekhawat, Aniruddh; Behnam, Ashkan; Pop, Eric; Ural, Ant
2016-11-01
Metal-oxide-semiconductor (MOS) devices with graphene as the metal gate electrode, silicon dioxide with thicknesses ranging from 5 to 20 nm as the dielectric, and p-type silicon as the semiconductor are fabricated and characterized. It is found that Fowler-Nordheim (F-N) tunneling dominates the gate tunneling current in these devices for oxide thicknesses of 10 nm and larger, whereas for devices with 5 nm oxide, direct tunneling starts to play a role in determining the total gate current. Furthermore, the temperature dependences of the F-N tunneling current for the 10 nm devices are characterized in the temperature range 77-300 K. The F-N coefficients and the effective tunneling barrier height are extracted as a function of temperature. It is found that the effective barrier height decreases with increasing temperature, which is in agreement with the results previously reported for conventional MOS devices with polysilicon or metal gate electrodes. In addition, high frequency capacitance-voltage measurements of these MOS devices are performed, which depict a local capacitance minimum under accumulation for thin oxides. By analyzing the data using numerical calculations based on the modified density of states of graphene in the presence of charged impurities, it is shown that this local minimum is due to the contribution of the quantum capacitance of graphene. Finally, the workfunction of the graphene gate electrode is extracted by determining the flat-band voltage as a function of oxide thickness. These results show that graphene is a promising candidate as the gate electrode in metal-oxide-semiconductor devices.
Excitons and the lifetime of organic semiconductor devices.
Forrest, Stephen R
2015-06-28
While excitons are responsible for the many beneficial optical properties of organic semiconductors, their non-radiative recombination within the material can result in material degradation due to the dumping of energy onto localized molecular bonds. This presents a challenge in developing strategies to exploit the benefits of excitons without negatively impacting the device operational stability. Here, we will briefly review the fundamental mechanisms leading to excitonic energy-driven device ageing in two example devices: blue emitting electrophosphorescent organic light emitting devices (PHOLEDs) and organic photovoltaic (OPV) cells. We describe strategies used to minimize or even eliminate this fundamental device degradation pathway. © 2015 The Author(s) Published by the Royal Society. All rights reserved.
NASA Technical Reports Server (NTRS)
Ting, David Z.
2007-01-01
The resonant tunneling spin pump is a proposed semiconductor device that would generate spin-polarized electron currents. The resonant tunneling spin pump would be a purely electrical device in the sense that it would not contain any magnetic material and would not rely on an applied magnetic field. Also, unlike prior sources of spin-polarized electron currents, the proposed device would not depend on a source of circularly polarized light. The proposed semiconductor electron-spin filters would exploit the Rashba effect, which can induce energy splitting in what would otherwise be degenerate quantum states, caused by a spin-orbit interaction in conjunction with a structural-inversion asymmetry in the presence of interfacial electric fields in a semiconductor heterostructure. The magnitude of the energy split is proportional to the electron wave number. Theoretical studies have suggested the possibility of devices in which electron energy states would be split by the Rashba effect and spin-polarized currents would be extracted by resonant quantum-mechanical tunneling.
Rehak, P.; Gatti, E.
1984-02-24
A semiconductor charge transport device and method for making same, characterized by providing a thin semiconductor wafer having rectifying functions on its opposing major surfaces and including a small capacitance ohmic contact, in combination with bias voltage means and associated circuit means for applying a predetermined voltage to effectively deplete the wafer in regions thereof between the rectifying junctions and the ohmic contact. A charge transport device of the invention is usable as a drift chamber, a low capacitance detector, or a charge coupled device each constructed according to the methods of the invention for making such devices. Detectors constructed according to the principles of the invention are characterized by having significantly higher particle position indicating resolution than is attainable with prior art detectors, while at the same time requiring substantially fewer readout channels to realize such high resolution.
Rehak, Pavel; Gatti, Emilio
1987-01-01
A semiconductor charge transport device and method for making same, characterized by providing a thin semiconductor wafer having rectifying junctions on its opposing major surfaces and including a small capacitance ohmic contact, in combination with bias voltage means and associated circuit means for applying a predetermined voltage to effectively deplete the wafer in regions thereof between the rectifying junctions and the ohmic contact. A charge transport device of the invention is usable as a drift chamber, a low capacitance detector, or a charge coupled device each constructed according to the methods of the invention for making such devices. Detectors constructed according to the principles of the invention are characterized by having significantly higher particle position indicating resolution than is attainable with prior art detectors, while at the same time requiring substantially fewer readout channels to realize such high resolution.
Rehak, P.; Gatti, E.
1987-08-18
A semiconductor charge transport device and method for making same are disclosed, characterized by providing a thin semiconductor wafer having rectifying junctions on its opposing major surfaces and including a small capacitance ohmic contact, in combination with bias voltage means and associated circuit means for applying a predetermined voltage to effectively deplete the wafer in regions thereof between the rectifying junctions and the ohmic contact. A charge transport device of the invention is usable as a drift chamber, a low capacitance detector, or a charge coupled device each constructed according to the methods of the invention for making such devices. Detectors constructed according to the principles of the invention are characterized by having significantly higher particle position indicating resolution than is attainable with prior art detectors, while at the same time requiring substantially fewer readout channels to realize such high resolution. 16 figs.
High Performance Molybdenum Disulfide Amorphous Silicon Heterojunction Photodetector
Esmaeili-Rad, Mohammad R.; Salahuddin, Sayeef
2013-01-01
One important use of layered semiconductors such as molybdenum disulfide (MoS2) could be in making novel heterojunction devices leading to functionalities unachievable using conventional semiconductors. Here we demonstrate a metal-semiconductor-metal heterojunction photodetector, made of MoS2 and amorphous silicon (a-Si), with rise and fall times of about 0.3 ms. The transient response does not show persistent (residual) photoconductivity, unlike conventional a-Si devices where it may last 3–5 ms, thus making this heterojunction roughly 10X faster. A photoresponsivity of 210 mA/W is measured at green light, the wavelength used in commercial imaging systems, which is 2−4X larger than that of a-Si and best reported MoS2 devices. The device could find applications in large area electronics, such as biomedical imaging, where a fast response is critical. PMID:23907598
Titanium-dioxide nanotube p-n homojunction diode
NASA Astrophysics Data System (ADS)
Alivov, Yahya; Ding, Yuchen; Singh, Vivek; Nagpal, Prashant
2014-12-01
Application of semiconductors in functional optoelectronic devices requires precise control over their doping and formation of junction between p- and n-doped semiconductors. While doped thin films have led to several semiconductor devices, need for high-surface area nanostructured devices for photovoltaic, photoelectrochemical, and photocatalytic applications has been hindered by lack of desired doping in nanostructures. Here, we show titanium-dioxide (TiO2) nanotubes doped with nitrogen (N) and niobium (Nb) as acceptors and donors, respectively, and formation of TiO2 nanotubes p-n homojunction. This TiO2:N/TiO2:Nb homojunction showed distinct diode-like behaviour with rectification ratio of 1115 at ±5 V and exhibited good photoresponse for ultraviolet light (λ = 365 nm) with sensitivity of 0.19 A/W at reverse bias of -5 V. These results can have important implications for development of nanostructured metal-oxide solar-cells, photodiodes, LED's, photocatalysts, and photoelectrochemical devices.
Semiconductor optoelectronic devices for free-space optical communications
NASA Technical Reports Server (NTRS)
Katz, J.
1983-01-01
The properties of individual injection lasers are reviewed, and devices of greater complexity are described. These either include or are relevant to monolithic integration configurations of the lasers with their electronic driving circuitry, power combining methods of semiconductor lasers, and electronic methods of steering the radiation patterns of semiconductor lasers and laser arrays. The potential of AlGaAs laser technology for free-space optical communications systems is demonstrated. These solid-state components, which can generate and modulate light, combine the power of a number of sources and perform at least part of the beam pointing functions. Methods are proposed for overcoming the main drawback of semiconductor lasers, that is, their inability to emit the needed amount of optical power in a single-mode operation.
Tunable surface plasmon devices
Shaner, Eric A [Rio Rancho, NM; Wasserman, Daniel [Lowell, MA
2011-08-30
A tunable extraordinary optical transmission (EOT) device wherein the tunability derives from controlled variation of the dielectric constant of a semiconducting material (semiconductor) in evanescent-field contact with a metallic array of sub-wavelength apertures. The surface plasmon resonance wavelength can be changed by changing the dielectric constant of the dielectric material. In embodiments of this invention, the dielectric material is a semiconducting material. The dielectric constant of the semiconducting material in the metal/semiconductor interfacial region is controllably adjusted by adjusting one or more of the semiconductor plasma frequency, the concentration and effective mass of free carriers, and the background high-frequency dielectric constant in the interfacial region. Thermal heating and/or voltage-gated carrier-concentration changes may be used to variably adjust the value of the semiconductor dielectric constant.
Screenable contact structure and method for semiconductor devices
Ross, Bernd
1980-08-26
An ink composition for deposition upon the surface of a semiconductor device to provide a contact area for connection to external circuitry is disclosed, the composition comprising an ink system containing a metal powder, a binder and vehicle, and a metal frit. The ink is screened onto the semiconductor surface in the desired pattern and is heated to a temperature sufficient to cause the metal frit to become liquid. The metal frit dissolves some of the metal powder and densifies the structure by transporting the dissolved metal powder in a liquid sintering process. The sintering process typically may be carried out in any type of atmosphere. A small amount of dopant or semiconductor material may be added to the ink systems to achieve particular results if desired.
Large Bandgap Shrinkage from Doping and Dielectric Interface in Semiconducting Carbon Nanotubes
NASA Astrophysics Data System (ADS)
Comfort, Everett; Lee, Ji Ung
2016-06-01
The bandgap of a semiconductor is one of its most important electronic properties. It is often considered to be a fixed property of the semiconductor. As the dimensions of semiconductors reduce, however, many-body effects become dominant. Here, we show that doping and dielectric, two critical features of semiconductor device manufacturing, can dramatically shrink (renormalize) the bandgap. We demonstrate this in quasi-one-dimensional semiconducting carbon nanotubes. Specifically, we use a four-gated device, configured as a p-n diode, to investigate the fundamental electronic structure of individual, partially supported nanotubes of varying diameter. The four-gated construction allows us to combine both electrical and optical spectroscopic techniques to measure the bandgap over a wide doping range.
High efficiency low cost thin film silicon solar cell design and method for making
Sopori, B.L.
1999-04-27
A semiconductor device is described having a substrate, a conductive intermediate layer deposited onto said substrate, wherein the intermediate layer serves as a back electrode, an optical reflector, and an interface for impurity gettering, and a semiconductor layer deposited onto said intermediate layer, wherein the semiconductor layer has a grain size at least as large as the layer thickness, and preferably about ten times the layer thickness. The device is formed by depositing a metal layer on a substrate, depositing a semiconductive material on the metal-coated substrate to produce a composite structure, and then optically processing the composite structure by illuminating it with infrared electromagnetic radiation according to a unique time-energy profile that first produces pits in the backside surface of the semiconductor material, then produces a thin, highly reflective, low resistivity alloy layer over the entire area of the interface between the semiconductor material and the metal layer, and finally produces a grain-enhanced semiconductor layer. The time-energy profile includes increasing the energy to a first energy level to initiate pit formation and create the desired pit size and density, then ramping up to a second energy level in which the entire device is heated to produce an interfacial melt, and finally reducing the energy to a third energy level and holding for a period of time to allow enhancement in the grain size of the semiconductor layer. 9 figs.
NASA Astrophysics Data System (ADS)
Chosei, Naoya; Itoh, Eiji
2018-02-01
We have comparatively studied the charge behaviors of organic semiconductor films based on charge extraction by linearly increasing voltage in a metal-insulator-semiconductor (MIS) diode structure (MIS-CELIV) and by classical capacitance-voltage measurement. The MIS-CELIV technique allows the selective measurement of electron and hole mobilities of n- and p-type organic films with thicknesses representative of those of actual devices. We used an anodic oxidized sputtered Ta or Hf electrode as a high-k layer, and it effectively blocked holes at the insulator/semiconductor interface. We estimated the hole mobilities of the polythiophene derivatives regioregular poly(3-hexylthiophene) (P3HT) and poly(3,3‧‧‧-didodecylquarterthiophene) (PQT-12) before and after heat treatment in the ITO/high-k/(thin polymer insulator)/semiconductor/MoO3/Ag device structure. The hole mobility of PQT-12 was improved from 1.1 × 10-5 to 2.1 × 10-5 cm2 V-1 s-1 by the heat treatment of the device at 100 °C for 30 min. An almost two orders of magnitude higher mobility was obtained in MIS diodes with P3HT as the p-type layer. We also determined the capacitance from the displacement current in MIS diodes at a relatively low-voltage sweep, and it corresponded well to the classical capacitance-voltage and frequency measurement results.
Method of Manufacturing a Light Emitting, Photovoltaic or Other Electronic Apparatus and System
NASA Technical Reports Server (NTRS)
Blanchard, Richard A. (Inventor); Lewandowski, Mark Allan (Inventor); Frazier, Donald Odell (Inventor); Ray, William Johnstone (Inventor); Fuller, Kirk A. (Inventor); Lowenthal, Mark David (Inventor); Shotton, Neil O. (Inventor)
2014-01-01
The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.
Method of manufacturing a light emitting, photovoltaic or other electronic apparatus and system
NASA Technical Reports Server (NTRS)
Fuller, Kirk A. (Inventor); Frazier, Donald Odell (Inventor); Blanchard, Richard A. (Inventor); Lowenthal, Mark D. (Inventor); Lewandowski, Mark Allan (Inventor); Ray, William Johnstone (Inventor); Shotton, Neil O. (Inventor)
2012-01-01
The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.
Honsho, Yoshihito; Miyakai, Tomoyo; Sakurai, Tsuneaki; Saeki, Akinori; Seki, Shu
2013-01-01
We have successfully designed the geometry of the microwave cavity and the thin metal electrode, achieving resonance of the microwave cavity with the metal-insulator-semiconductor (MIS) device structure. This very simple MIS device operates in the cavity, where charge carriers are injected quantitatively by an applied bias at the insulator-semiconductor interface. The local motion of the charge carriers was clearly probed through the applied external microwave field, also giving the quantitative responses to the injected charge carrier density and charge/discharge characteristics. By means of the present measurement system named field-induced time-resolved microwave conductivity (FI-TRMC), the pentacene thin film in the MIS device allowed the evaluation of the hole and electron mobility at the insulator-semiconductor interface of 6.3 and 0.34 cm2 V−1 s−1, respectively. This is the first report on the direct, intrinsic, non-contact measurement of charge carrier mobility at interfaces that has been fully experimentally verified. PMID:24212382
NASA Astrophysics Data System (ADS)
Perconti, Philip; Bedair, Sarah S.; Bajaj, Jagmohan; Schuster, Jonathan; Reed, Meredith
2016-09-01
To increase Soldier readiness and enhance situational understanding in ever-changing and complex environments, there is a need for rapid development and deployment of Army technologies utilizing sensors, photonics, and electronics. Fundamental aspects of these technologies include the research and development of semiconductor materials and devices which are ubiquitous in numerous applications. Since many Army technologies are considered niche, there is a lack of significant industry investment in the fundamental research and understanding of semiconductor technologies relevant to the Army. To address this issue, the US Army Research Laboratory is establishing a Center for Semiconductor Materials and Device Modeling and seeks to leverage expertise and resources across academia, government and industry. Several key research areas—highlighted and addressed in this paper—have been identified by ARL and external partners and will be pursued in a collaborative fashion by this Center. This paper will also address the mechanisms by which the Center is being established and will operate.
76 FR 65751 - Notice of intent to grant exclusive license
Federal Register 2010, 2011, 2012, 2013, 2014
2011-10-24
... Crystalline Semiconductor Alloys on Basal Plane of Trigonal or Hexagonal Crystal,'' U.S. Patent Application No. 12/254,134 entitled ``Hybrid Bandgap Engineering for Super-Hetero- Epitaxial Semiconductor Materials... Semiconductor Materials on Trigonal Substrate with Single Crystal Properties and Devices Based on Such Materials...
Farino, A.J.; Montague, S.; Sniegowski, J.J.; Smith, J.H.; McWhorter, P.J.
1998-07-21
A method is disclosed for photolithographically defining device features up to the resolution limit of an auto-focusing projection stepper when the device features are to be formed in a wafer cavity at a depth exceeding the depth of focus of the stepper. The method uses a focusing cavity located in a die field at the position of a focusing light beam from the auto-focusing projection stepper, with the focusing cavity being of the same depth as one or more adjacent cavities wherein a semiconductor device is to be formed. The focusing cavity provides a bottom surface for referencing the focusing light beam and focusing the stepper at a predetermined depth below the surface of the wafer, whereat the device features are to be defined. As material layers are deposited in each device cavity to build up a semiconductor structure such as a microelectromechanical system (MEMS) device, the same material layers are deposited in the focusing cavity, raising the bottom surface and re-focusing the stepper for accurately defining additional device features in each succeeding material layer. The method is especially applicable for forming MEMS devices within a cavity or trench and integrating the MEMS devices with electronic circuitry fabricated on the wafer surface. 15 figs.
Farino, Anthony J.; Montague, Stephen; Sniegowski, Jeffry J.; Smith, James H.; McWhorter, Paul J.
1998-01-01
A method is disclosed for photolithographically defining device features up to the resolution limit of an auto-focusing projection stepper when the device features are to be formed in a wafer cavity at a depth exceeding the depth of focus of the stepper. The method uses a focusing cavity located in a die field at the position of a focusing light beam from the auto-focusing projection stepper, with the focusing cavity being of the same depth as one or more adjacent cavities wherein a semiconductor device is to be formed. The focusing cavity provides a bottom surface for referencing the focusing light beam and focusing the stepper at a predetermined depth below the surface of the wafer, whereat the device features are to be defined. As material layers are deposited in each device cavity to build up a semiconductor structure such as a microelectromechanical system (MEMS) device, the same material layers are deposited in the focusing cavity, raising the bottom surface and re-focusing the stepper for accurately defining additional device features in each succeeding material layer. The method is especially applicable for forming MEMS devices within a cavity or trench and integrating the MEMS devices with electronic circuitry fabricated on the wafer surface.
A review of the physics and response models for burnout of semiconductor devices
NASA Astrophysics Data System (ADS)
Orvis, W. J.; Khanaka, G. H.; Yee, J. H.
1984-12-01
Physical mechanisms that cause semiconductor devices to fail from electrical overstress--particularly, EMP-induced electrical stress--are described in light of the current literature and the authors' own research. A major concern is the cause and effects of second breakdown phenomena in p-n junction devices. Models of failure thresholds are evaluated for their inherent errors and for their ability to represent the relevant physics. Finally, the response models that relate electromagnetic stress parameters to appropriate failure-threshold parameters are discussed.
Bi-Se doped with Cu, p-type semiconductor
Bhattacharya, Raghu Nath; Phok, Sovannary; Parilla, Philip Anthony
2013-08-20
A Bi--Se doped with Cu, p-type semiconductor, preferably used as an absorber material in a photovoltaic device. Preferably the semiconductor has at least 20 molar percent Cu. In a preferred embodiment, the semiconductor comprises at least 28 molar percent of Cu. In one embodiment, the semiconductor comprises a molar percentage of Cu and Bi whereby the molar percentage of Cu divided by the molar percentage of Bi is greater than 1.2. In a preferred embodiment, the semiconductor is manufactured as a thin film having a thickness less than 600 nm.
NASA Astrophysics Data System (ADS)
Griffel, Giora; Chen, Howard Z.; Grave, Ilan; Yariv, Amnon
1991-04-01
The operation of a novel multisection structure comprised of laterally coupled gain-guided semiconductor lasers is demonstrated. It is shown that tunable single longitudinal mode operation can be achieved with a high degree of frequency selectivity. The device has a tuning range of 14.5 nm, the widest observed to date in a monolithic device.
Total-dose radiation effects data for semiconductor devices (1989 supplement)
NASA Technical Reports Server (NTRS)
Martin, Keith E.; Coss, James R.; Goben, Charles A.; Shaw, David C.; Farmanesh, Sam; Davarpanah, Michael M.; Craft, Leroy H.; Price, William E.
1990-01-01
Steady state, total dose radiation test data are provided for electronic designers and other personnel using semiconductor devices in a radiation environment. The data are presented in graphic and narrative formats. Two primary radiation source types were used: Cobalt-60 gamma rays and a Dynamitron electron accelerator capable of delivering 2.5 MeV electrons at a steady rate.
Voyager electronic parts radiation program, volume 1
NASA Technical Reports Server (NTRS)
Stanley, A. G.; Martin, K. E.; Price, W. E.
1977-01-01
The Voyager spacecraft is subject to radiation from external natural space, from radioisotope thermoelectric generators and heater units, and from the internal environment where penetrating electrons generate surface ionization effects in semiconductor devices. Methods for radiation hardening and tests for radiation sensitivity are described. Results of characterization testing and sample screening of over 200 semiconductor devices in a radiation environment are summarized.
Semiconductor diode with external field modulation
Nasby, Robert D.
2000-01-01
A non-destructive-readout nonvolatile semiconductor diode switching device that may be used as a memory element is disclosed. The diode switching device is formed with a ferroelectric material disposed above a rectifying junction to control the conduction characteristics therein by means of a remanent polarization. The invention may be used for the formation of integrated circuit memories for the storage of information.
Improvement of screening methods for silicon planar semiconductor devices
NASA Technical Reports Server (NTRS)
Berger, W. M.
1972-01-01
The results of the program for the development of a more sensitive method for selecting silicon planar semiconductor devices for long life applications are reported. The manufacturing technologies (MOS and Bipolar) are discussed along with the screening procedures developed as a result of the tests and evaluations, and the effectiveness of the MOS and Bilayer screening procedures are evaluated.
High-Temperature Electronics: A Role for Wide Bandgap Semiconductors?
NASA Technical Reports Server (NTRS)
Neudeck, Philip G.; Okojie, Robert S.; Chen, Liang-Yu
2002-01-01
It is increasingly recognized that semiconductor based electronics that can function at ambient temperatures higher than 150 C without external cooling could greatly benefit a variety of important applications, especially-in the automotive, aerospace, and energy production industries. The fact that wide bandgap semiconductors are capable of electronic functionality at much higher temperatures than silicon has partially fueled their development, particularly in the case of SiC. It appears unlikely that wide bandgap semiconductor devices will find much use in low-power transistor applications until the ambient temperature exceeds approximately 300 C, as commercially available silicon and silicon-on-insulator technologies are already satisfying requirements for digital and analog very large scale integrated circuits in this temperature range. However, practical operation of silicon power devices at ambient temperatures above 200 C appears problematic, as self-heating at higher power levels results in high internal junction temperatures and leakages. Thus, most electronic subsystems that simultaneously require high-temperature and high-power operation will necessarily be realized using wide bandgap devices, once the technology for realizing these devices become sufficiently developed that they become widely available. Technological challenges impeding the realization of beneficial wide bandgap high ambient temperature electronics, including material growth, contacts, and packaging, are briefly discussed.
Keum, Chang-Min; Liu, Shiyi; Al-Shadeedi, Akram; Kaphle, Vikash; Callens, Michiel Koen; Han, Lu; Neyts, Kristiaan; Zhao, Hongping; Gather, Malte C; Bunge, Scott D; Twieg, Robert J; Jakli, Antal; Lüssem, Björn
2018-01-15
Liquid-crystalline organic semiconductors exhibit unique properties that make them highly interesting for organic optoelectronic applications. Their optical and electrical anisotropies and the possibility to control the alignment of the liquid-crystalline semiconductor allow not only to optimize charge carrier transport, but to tune the optical property of organic thin-film devices as well. In this study, the molecular orientation in a liquid-crystalline semiconductor film is tuned by a novel blading process as well as by different annealing protocols. The altered alignment is verified by cross-polarized optical microscopy and spectroscopic ellipsometry. It is shown that a change in alignment of the liquid-crystalline semiconductor improves charge transport in single charge carrier devices profoundly. Comparing the current-voltage characteristics of single charge carrier devices with simulations shows an excellent agreement and from this an in-depth understanding of single charge carrier transport in two-terminal devices is obtained. Finally, p-i-n type organic light-emitting diodes (OLEDs) compatible with vacuum processing techniques used in state-of-the-art OLEDs are demonstrated employing liquid-crystalline host matrix in the emission layer.
Design of Contact Electrodes for Semiconductor Nanowire Solar Energy Harvesting Devices.
Lin, Tzuging; Ramadurgam, Sarath; Yang, Chen
2017-04-12
Transparent, low-resistive contacts are critical for efficient solar energy harvesting devices. It is important to reconsider the material choices and electrode design as devices move from 2D films to 1D nanostructures. In this paper, we study the effectiveness of indium tin oxide (ITO) and metals, such as Ag and Cu, as contacts in 2D and 1D systems. Although ITO has been studied extensively and developed into an effective transparent contact for 2D devices, our results show that effectiveness does not translate to 1D systems. Particularly with consideration of resistance requirement, nanowires with metal shells as contacts enable better absorption within the semiconductor as compared to ITO. Furthermore, there is a strong dependence of contact performance on the semiconductor band gap and diameter of nanowires. We found that metal contacts outperform ITO for nanowire devices, regardless of the sheet resistance constraint, in the regime of diameters less than 100 nm and band-gaps greater than 1 eV. These metal shells optimized for best absorption are significantly thinner than ITO, which enables for the design of devices with high nanowire number density and consequently higher device efficiencies.
Deformable inorganic semiconductor
NASA Astrophysics Data System (ADS)
Kim, Dae-Hyeong; Cha, Gi Doo
2018-05-01
Unlike conventional inorganic semiconductors, which are typically brittle, α-Ag2S exhibits room-temperature ductility with favourable electrical properties, offering promise for use in high-performance flexible and stretchable devices.
Methods of measurement for semiconductor materials, process control, and devices
NASA Technical Reports Server (NTRS)
Bullis, W. M. (Editor)
1972-01-01
Significant accomplishments include development of a procedure to correct for the substantial differences of transistor delay time as measured with different instruments or with the same instrument at different frequencies; association of infrared response spectra of poor quality germanium gamma ray detectors with spectra of detectors fabricated from portions of a good crystal that had been degraded in known ways; and confirmation of the excellent quality and cosmetic appearance of ultrasonic bonds made with aluminum ribbon wire. Work is continuing on measurement of resistivity of semiconductor crystals; study of gold-doped silicon, development of the infrared response technique; evaluation of wire bonds and die attachment; and measurement of thermal properties of semiconductor devices, delay time and related carrier transport properties in junction devices, and noise properties of microwave diodes.
NASA Astrophysics Data System (ADS)
Nisar, Ubaid Ahmed; Ashraf, Waqas; Qamar, Shamsul
In this article, one and two-dimensional hydrodynamical models of semiconductor devices are numerically investigated. The models treat the propagation of electrons in a semiconductor device as the flow of a charged compressible fluid. It plays an important role in predicting the behavior of electron flow in semiconductor devices. Mathematically, the governing equations form a convection-diffusion type system with a right hand side describing the relaxation effects and interaction with a self consistent electric field. The proposed numerical scheme is a splitting scheme based on the kinetic flux-vector splitting (KFVS) method for the hyperbolic step, and a semi-implicit Runge-Kutta method for the relaxation step. The KFVS method is based on the direct splitting of macroscopic flux functions of the system on the cell interfaces. The second order accuracy of the scheme is achieved by using MUSCL-type initial reconstruction and Runge-Kutta time stepping method. Several case studies are considered. For validation, the results of current scheme are compared with those obtained from the splitting scheme based on the NT central scheme. The effects of various parameters such as low field mobility, device length, lattice temperature and voltage are analyzed. The accuracy, efficiency and simplicity of the proposed KFVS scheme validates its generic applicability to the given model equations. A two dimensional simulation is also performed by KFVS method for a MESFET device, producing results in good agreement with those obtained by NT-central scheme.
Horn, Kevin M [Albuquerque, NM
2008-05-20
A broad-beam laser irradiation apparatus can measure the parametric or functional response of a semiconductor device to exposure to dose-rate equivalent infrared laser light. Comparisons of dose-rate response from before, during, and after accelerated aging of a device, or from periodic sampling of devices from fielded operational systems can determine if aging has affected the device's overall functionality. The dependence of these changes on equivalent dose-rate pulse intensity and/or duration can be measured with the apparatus. The synchronized introduction of external electrical transients into the device under test can be used to simulate the electrical effects of the surrounding circuitry's response to a radiation exposure while exposing the device to dose-rate equivalent infrared laser light.
Osbourn, G.C.
1983-10-06
An intrinsic semiconductor electro-optical device comprises a p-n junction intrinsically responsive, when cooled, to electromagnetic radiation in the wavelength range of 8 to 12 ..mu..m. This radiation responsive p-n junction comprises a strained-layer superlattice (SLS) of alternating layers of two different III-V semiconductors. The lattice constants of the two semiconductors are mismatched, whereby a total strain is imposed on each pair of alternating semiconductor layers in the SLS structure, the proportion of the total strain which acts on each layer of the pair being proportional to the ratio of the layer thicknesses of each layer in the pair.
Strongly exchange-coupled triplet pairs in an organic semiconductor
NASA Astrophysics Data System (ADS)
Weiss, Leah R.; Bayliss, Sam L.; Kraffert, Felix; Thorley, Karl J.; Anthony, John E.; Bittl, Robert; Friend, Richard H.; Rao, Akshay; Greenham, Neil C.; Behrends, Jan
2017-02-01
From biological complexes to devices based on organic semiconductors, spin interactions play a key role in the function of molecular systems. For instance, triplet-pair reactions impact operation of organic light-emitting diodes as well as photovoltaic devices. Conventional models for triplet pairs assume they interact only weakly. Here, using electron spin resonance, we observe long-lived, strongly interacting triplet pairs in an organic semiconductor, generated via singlet fission. Using coherent spin manipulation of these two-triplet states, we identify exchange-coupled (spin-2) quintet complexes coexisting with weakly coupled (spin-1) triplets. We measure strongly coupled pairs with a lifetime approaching 3 μs and a spin coherence time approaching 1 μs, at 10 K. Our results pave the way for the utilization of high-spin systems in organic semiconductors.
Solution processed molecular floating gate for flexible flash memories
NASA Astrophysics Data System (ADS)
Zhou, Ye; Han, Su-Ting; Yan, Yan; Huang, Long-Biao; Zhou, Li; Huang, Jing; Roy, V. A. L.
2013-10-01
Solution processed fullerene (C60) molecular floating gate layer has been employed in low voltage nonvolatile memory device on flexible substrates. We systematically studied the charge trapping mechanism of the fullerene floating gate for both p-type pentacene and n-type copper hexadecafluorophthalocyanine (F16CuPc) semiconductor in a transistor based flash memory architecture. The devices based on pentacene as semiconductor exhibited both hole and electron trapping ability, whereas devices with F16CuPc trapped electrons alone due to abundant electron density. All the devices exhibited large memory window, long charge retention time, good endurance property and excellent flexibility. The obtained results have great potential for application in large area flexible electronic devices.
Solution processed molecular floating gate for flexible flash memories
Zhou, Ye; Han, Su-Ting; Yan, Yan; Huang, Long-Biao; Zhou, Li; Huang, Jing; Roy, V. A. L.
2013-01-01
Solution processed fullerene (C60) molecular floating gate layer has been employed in low voltage nonvolatile memory device on flexible substrates. We systematically studied the charge trapping mechanism of the fullerene floating gate for both p-type pentacene and n-type copper hexadecafluorophthalocyanine (F16CuPc) semiconductor in a transistor based flash memory architecture. The devices based on pentacene as semiconductor exhibited both hole and electron trapping ability, whereas devices with F16CuPc trapped electrons alone due to abundant electron density. All the devices exhibited large memory window, long charge retention time, good endurance property and excellent flexibility. The obtained results have great potential for application in large area flexible electronic devices. PMID:24172758
Roadmap on semiconductor-cell biointerfaces
NASA Astrophysics Data System (ADS)
Tian, Bozhi; Xu, Shuai; Rogers, John A.; Cestellos-Blanco, Stefano; Yang, Peidong; Carvalho-de-Souza, João L.; Bezanilla, Francisco; Liu, Jia; Bao, Zhenan; Hjort, Martin; Cao, Yuhong; Melosh, Nicholas; Lanzani, Guglielmo; Benfenati, Fabio; Galli, Giulia; Gygi, Francois; Kautz, Rylan; Gorodetsky, Alon A.; Kim, Samuel S.; Lu, Timothy K.; Anikeeva, Polina; Cifra, Michal; Krivosudský, Ondrej; Havelka, Daniel; Jiang, Yuanwen
2018-05-01
This roadmap outlines the role semiconductor-based materials play in understanding the complex biophysical dynamics at multiple length scales, as well as the design and implementation of next-generation electronic, optoelectronic, and mechanical devices for biointerfaces. The roadmap emphasizes the advantages of semiconductor building blocks in interfacing, monitoring, and manipulating the activity of biological components, and discusses the possibility of using active semiconductor-cell interfaces for discovering new signaling processes in the biological world.
NASA Astrophysics Data System (ADS)
Crowell, Paul A.; Liu, Changjiang; Patel, Sahil; Peterson, Tim; Geppert, Chad C.; Christie, Kevin; Stecklein, Gordon; Palmstrøm, Chris J.
2016-10-01
A distinguishing feature of spin accumulation in ferromagnet-semiconductor devices is its precession in a magnetic field. This is the basis for detection techniques such as the Hanle effect, but these approaches become ineffective as the spin lifetime in the semiconductor decreases. For this reason, no electrical Hanle measurement has been demonstrated in GaAs at room temperature. We show here that by forcing the magnetization in the ferromagnet to precess at resonance instead of relying only on the Larmor precession of the spin accumulation in the semiconductor, an electrically generated spin accumulation can be detected up to 300 K. The injection bias and temperature dependence of the measured spin signal agree with those obtained using traditional methods. We further show that this new approach enables a measurement of short spin lifetimes (< 100 psec), a regime that is not accessible in semiconductors using traditional Hanle techniques. The measurements were carried out on epitaxial Heusler alloy (Co2FeSi or Co2MnSi)/n-GaAs heterostructures. Lateral spin valve devices were fabricated by electron beam and photolithography. We compare measurements carried out by the new FMR-based technique with traditional non-local and three-terminal Hanle measurements. A full model appropriate for the measurements will be introduced, and a broader discussion in the context of spin pumping experimenments will be included in the talk. The new technique provides a simple and powerful means for detecting spin accumulation at high temperatures. Reference: C. Liu, S. J. Patel, T. A. Peterson, C. C. Geppert, K. D. Christie, C. J. Palmstrøm, and P. A. Crowell, "Dynamic detection of electron spin accumulation in ferromagnet-semiconductor devices by ferromagnetic resonance," Nature Communications 7, 10296 (2016). http://dx.doi.org/10.1038/ncomms10296
1988-12-01
Mainzer SCD - Semi-Conductor Devices A Tadiran-Rafael Partnership, Misgav Mobile Post, 20179,ISRAEL The effect of strain and stress on the performance of...Nili Mainzer and Eliezer Weiss SCD - Semi-Conductor Devices A Tadiran-Rafael Partnership, Misgav Mobile Post, 20179, ISRAEL In the 1987 workshop we have
Analysis of Time Dependent Electric Field Degradation in AlGaN/GaN HEMTs (POSTPRINT)
2014-10-01
identifying and understanding the failure mechanisms that limit the safe operating area of GaN HEMTs. 15. SUBJECT TERMS aluminum gallium nitride... gallium nitride, HEMTs, semiconductor device reliability, transistors 16. SECURITY CLASSIFICATION OF: 17. LIMITATION OF ABSTRACT SAR 18. NUMBER...area of GaN HEMTs. Index Terms— Aluminum gallium nitride, gallium nitride, HEMTs, semiconductor device reliability, transistors. I. INTRODUCTION A
Investigation of Optical Properties of Zinc Oxide Photodetector
NASA Astrophysics Data System (ADS)
Chism, Tyler
UV photodetection devices have many important applications for uses in biological detection, gas sensing, weaponry detection, fire detection, chemical analysis, and many others. Today's photodetectors often utilize semiconductors such as GaAs to achieve high responsivity and sensitivity. Zinc oxide, unlike many other semiconductors, is cheap, abundant, non-toxic, and easy to grow different morphologies at the micro and nano scale. With the proliferation of these devices also comes the impending need to further study optics and photonics in relation to phononics and plasmonics, and the general principles underlying the interaction of photons with solid state matter and, specifically, semiconductors. For this research a metal-semiconductor-metal UV photodetector has been fabricated by using a quartz substrate on top of which was deposited micropatterned gold in an interdigitated electrode design. On this, sparsely coated zinc oxide nano trees were hydrothermally grown. The UV photodetection device showed promise for detection applications, especially because zinc oxide is also very thermally stable, a quality which is highly sought after in today's UV photodetectors. Furthermore, the newly synthesized photodetector was used to investigate optical properties and how they respond to different stimuli. It was discovered that the photons transmitted through the sparsely coated zinc oxide nano trees decreased as the voltage across the device increased. This research is aimed at better understanding photons interaction with matter and also to open the door for new devices with tunable optical properties such as transmission.
A photovoltaic device structure based on internal electron emission.
McFarland, Eric W; Tang, Jing
2003-02-06
There has been an active search for cost-effective photovoltaic devices since the development of the first solar cells in the 1950s (refs 1-3). In conventional solid-state solar cells, electron-hole pairs are created by light absorption in a semiconductor, with charge separation and collection accomplished under the influence of electric fields within the semiconductor. Here we report a multilayer photovoltaic device structure in which photon absorption instead occurs in photoreceptors deposited on the surface of an ultrathin metal-semiconductor junction Schottky diode. Photoexcited electrons are transferred to the metal and travel ballistically to--and over--the Schottky barrier, so providing the photocurrent output. Low-energy (approximately 1 eV) electrons have surprisingly long ballistic path lengths in noble metals, allowing a large fraction of the electrons to be collected. Unlike conventional cells, the semiconductor in this device serves only for majority charge transport and separation. Devices fabricated using a fluorescein photoreceptor on an Au/TiO2/Ti multilayer structure had typical open-circuit photovoltages of 600-800 mV and short-circuit photocurrents of 10-18 micro A cm(-2) under 100 mW cm(-2) visible band illumination: the internal quantum efficiency (electrons measured per photon absorbed) was 10 per cent. This alternative approach to photovoltaic energy conversion might provide the basis for durable low-cost solar cells using a variety of materials.
MBE Growth of Ferromagnetic Metal/Compound Semiconductor Heterostructures for Spintronics
Palmstrom, Chris [University of California, Santa Barbara, California, United States
2017-12-09
Electrical transport and spin-dependent transport across ferromagnet/semiconductor contacts is crucial in the realization of spintronic devices. Interfacial reactions, the formation of non-magnetic interlayers, and conductivity mismatch have been attributed to low spin injection efficiency. MBE has been used to grow epitaxial ferromagnetic metal/GA(1-x)AL(x)As heterostructures with the aim of controlling the interfacial structural, electronic, and magnetic properties. In situ, STM, XPS, RHEED and LEED, and ex situ XRD, RBS, TEM, magnetotransport, and magnetic characterization have been used to develop ferromagnetic elemental and metallic compound/compound semiconductor tunneling contacts for spin injection. The efficiency of the spin polarized current injected from the ferromagnetic contact has been determined by measuring the electroluminescence polarization of the light emitted from/GA(1-x)AL(x)As light-emitting diodes as a function of applied magnetic field and temperature. Interfacial reactions during MBE growth and post-growth anneal, as well as the semiconductor device band structure, were found to have a dramatic influence on the measured spin injection, including sign reversal. Lateral spin-transport devices with epitaxial ferromagnetic metal source and drain tunnel barrier contacts have been fabricated with the demonstration of electrical detection and the bias dependence of spin-polarized electron injection and accumulation at the contacts. This talk emphasizes the progress and achievements in the epitaxial growth of a number of ferromagnetic compounds/III-V semiconductor heterostructures and the progress towards spintronic devices.
Astronaut Peggy Whitson Installs SUBSA Experiment
NASA Technical Reports Server (NTRS)
2002-01-01
Expedition Five flight engineer Peggy Whitson is shown installing the Solidification Using a Baffle in Sealed Ampoules (SUBSA) experiment in the Microgravity Science Glovebox (MSG) in the Destiny laboratory aboard the International Space Station (ISS). SUBSA examines the solidification of semiconductor crystals from a melted material. Semiconductor crystals are used for many products that touch our everyday lives. They are found in computer chips, integrated circuits, and a multitude of other electronic devices, such as sensors for medical imaging equipment and detectors of nuclear radiation. Materials scientists want to make better semiconductor crystals to be able to further reduce the size of high-tech devices. In the microgravity environment, convection and sedimentation are reduced, so fluids do not remove and deform. Thus, space laboratories provide an ideal environment of studying solidification from the melt. This investigation is expected to determine the mechanism causing fluid motion during production of semiconductors in space. It will provide insight into the role of the melt motion in production of semiconductor crystals, advancing our knowledge of the crystal growth process. This could lead to a reduction of defects in semiconductor crystals produced in space and on Earth.
International Space Station (ISS)
2002-07-05
Expedition Five flight engineer Peggy Whitson is shown installing the Solidification Using a Baffle in Sealed Ampoules (SUBSA) experiment in the Microgravity Science Glovebox (MSG) in the Destiny laboratory aboard the International Space Station (ISS). SUBSA examines the solidification of semiconductor crystals from a melted material. Semiconductor crystals are used for many products that touch our everyday lives. They are found in computer chips, integrated circuits, and a multitude of other electronic devices, such as sensors for medical imaging equipment and detectors of nuclear radiation. Materials scientists want to make better semiconductor crystals to be able to further reduce the size of high-tech devices. In the microgravity environment, convection and sedimentation are reduced, so fluids do not remove and deform. Thus, space laboratories provide an ideal environment of studying solidification from the melt. This investigation is expected to determine the mechanism causing fluid motion during production of semiconductors in space. It will provide insight into the role of the melt motion in production of semiconductor crystals, advancing our knowledge of the crystal growth process. This could lead to a reduction of defects in semiconductor crystals produced in space and on Earth.
Review of - SiC wide-bandgap heterostructure properties as an alternate semiconductor material
NASA Astrophysics Data System (ADS)
Rajput Priti, J.; Patankar, Udayan S.; Koel, Ants; Nitnaware, V. N.
2018-05-01
Silicon substance (is also known as Quartz) is an abundant in nature and the electrical properties it exhibits, plays a vital role in developing its usage in the field of semiconductor. More than decades we can say that Silicon has shown desirable signs but at the later parts it has shown some research potential for development of alternative material as semiconductor devices. This need has come to light as we started scaling down in size of the Silicon material and up in speed. This semiconductor material started exhibiting several fundamental physical limits that include the minimum gate oxide thickness and the maximum saturation velocity of carriers which determines the operation frequency. Though the alternative semiconductors provide some answers (such as III-V's for high speed devices) for a path to skirt these problems, there also may be some ways to extend the life of silicon itself. Two paths are used as for alternative semiconductors i.e alternative gate dielectrics and silicon-based heterostructures. The SiC material has some strength properties under different conditions and find out the defects available in the material.
Clean graphene electrodes on organic thin-film devices via orthogonal fluorinated chemistry.
Beck, Jonathan H; Barton, Robert A; Cox, Marshall P; Alexandrou, Konstantinos; Petrone, Nicholas; Olivieri, Giorgia; Yang, Shyuan; Hone, James; Kymissis, Ioannis
2015-04-08
Graphene is a promising flexible, highly transparent, and elementally abundant electrode for organic electronics. Typical methods utilized to transfer large-area films of graphene synthesized by chemical vapor deposition on metal catalysts are not compatible with organic thin-films, limiting the integration of graphene into organic optoelectronic devices. This article describes a graphene transfer process onto chemically sensitive organic semiconductor thin-films. The process incorporates an elastomeric stamp with a fluorinated polymer release layer that can be removed, post-transfer, via a fluorinated solvent; neither fluorinated material adversely affects the organic semiconductor materials. We used Raman spectroscopy, atomic force microscopy, and scanning electron microscopy to show that chemical vapor deposition graphene can be successfully transferred without inducing defects in the graphene film. To demonstrate our transfer method's compatibility with organic semiconductors, we fabricate three classes of organic thin-film devices: graphene field effect transistors without additional cleaning processes, transparent organic light-emitting diodes, and transparent small-molecule organic photovoltaic devices. These experiments demonstrate the potential of hybrid graphene/organic devices in which graphene is deposited directly onto underlying organic thin-film structures.
NASA Astrophysics Data System (ADS)
Nötzel, Richard
2009-07-01
This volume of IOP Conference Series: Materials Science and Engineering contains papers that were presented at the special symposium K at the EMRS 2009 Spring Meeting held 8-12 June in Strasbourg, France, which was entitled 'Semiconductor Nanostructures towards Electronic and Optoelectronic Device Applications II'. Thanks to the broad interest a large variety of quantum dots and quantum wires and related nanostructures and their application in devices could be covered. There was significant progress in the epitaxial growth of semiconductor quantum dots seen in the operation of high-power, as well as mode locked laser diodes and the lateral positioning of quantum dots on patterned substrates or by selective area growth for future single quantum dot based optoelectronic and electronic devices. In the field of semiconductor nanowires high quality, almost twin free structures are now available together with a new degree of freedom for band structure engineering based on alternation of the crystal structure. In the search for Si based light emitting structures, nanocrystals and miniband-related near infrared luminescence of Si/Ge quantum dot superlattices with high quantum efficiency were reported. These highlights, among others, and the engaged discussions of the scientists, engineers and students brought together at the symposium emphasize how active the field of semiconductor nanostructures and their applications in devices is, so that we can look forward to the progress to come. Guest Editor Richard Nötzel COBRA Research Institute Department of Applied Physics Eindhoven University of Technology 5600 MB Eindhoven The Netherlands Tel.: +31 40 247 2047; fax: +31 40 246 1339 E-mail address: r.noetzel@tue.nl
Trends in solid state electronics, part 2
NASA Technical Reports Server (NTRS)
Gassaway, J. D.
1972-01-01
Developments in the fields of semiconductors and magnetics are surveyed. Materials, devices, theory, and fabrication technology are discussed. Important events up until the present time are reported, and events are interpreted through historical perspective. A brief analysis of forces which have driven the development of today's electronic technology and some projections of present trends are given. More detailed discussions are presented for four areas of contemporary interest: amorphous semiconductors, bubble domain devices, charge-coupled devices, and electron and ion beam techniques. Beam addressed magnetic memories are reviewed to a lesser extent.
Tsuo, Y. Simon; Deb, Satyen K.
1990-01-01
Disclosed is a hydrogen ion microlithography process for use in microelectronic fabrication and semiconductor device processing. The process comprises the steps of providing a single layer of either an amorphous silicon or hydrogenated amorphous silicon material. A pattern is recorded in a selected layer of amorphous silicon or hydrogenated amorphous silicon materials by preferentially implanting hydrogen ions therein so as to permit the selected layer to serve as a mask-resist wafer suitable for subsequent development and device fabrication. The layer is developed to provide a surface pattern therein adaptable for subsequent use in microelectronic fabrication and semiconductor device processing.
GaAs photoconductive semiconductor switch
Loubriel, Guillermo M.; Baca, Albert G.; Zutavern, Fred J.
1998-01-01
A high gain, optically triggered, photoconductive semiconductor switch (PCSS) implemented in GaAs as a reverse-biased pin structure with a passivation layer above the intrinsic GaAs substrate in the gap between the two electrodes of the device. The reverse-biased configuration in combination with the addition of the passivation layer greatly reduces surface current leakage that has been a problem for prior PCSS devices and enables employment of the much less expensive and more reliable DC charging systems instead of the pulsed charging systems that needed to be used with prior PCSS devices.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Akselrod, Gleb M.; Bawendi, Moungi G.; Bulovic, Vladimir
Disclosed are a device and a method for the design and fabrication of the device for enhancing the brightness of luminescent molecules, nanostructures, and thin films. The device includes a mirror, a dielectric medium or spacer, an absorptive layer, and a luminescent layer. The absorptive layer is a continuous thin film of a strongly absorbing organic or inorganic material. The luminescent layer may be a continuous luminescent thin film or an arrangement of isolated luminescent species, e.g., organic or metal-organic dye molecules, semiconductor quantum dots, or other semiconductor nanostructures, supported on top of the absorptive layer.
Boron selenide semiconductor detectors for thermal neutron counting
NASA Astrophysics Data System (ADS)
Kargar, Alireza; Tower, Joshua; Cirignano, Leonard; Shah, Kanai
2013-09-01
Thermal neutron detectors in planar configuration were fabricated from B2Se3 (Boron Selenide) crystals grown at RMD Inc. All fabricated semiconductor devices were characterized for the current-voltage (I-V) characteristic and neutron counting measurement. In this study, the resistivity of crystals is reported and the collected pulse height spectra are presented for devices irradiated with the 241AmBe neutron source. Long-term stability of the B2Se3 devices for neutron detection under continuous bias and without being under continuous bias was investigated and the results are reported. The B2Se3 devices showed response to thermal neutrons of the 241AmBe source.
Spin injection and transport in semiconductor and metal nanostructures
NASA Astrophysics Data System (ADS)
Zhu, Lei
In this thesis we investigate spin injection and transport in semiconductor and metal nanostructures. To overcome the limitation imposed by the low efficiency of spin injection and extraction and strict requirements for retention of spin polarization within the semiconductor, novel device structures with additional logic functionality and optimized device performance have been developed. Weak localization/antilocalization measurements and analysis are used to assess the influence of surface treatments on elastic, inelastic and spin-orbit scatterings during the electron transport within the two-dimensional electron layer at the InAs surface. Furthermore, we have used spin-valve and scanned probe microscopy measurements to investigate the influence of sulfur-based surface treatments and electrically insulating barrier layers on spin injection into, and spin transport within, the two-dimensional electron layer at the surface of p-type InAs. We also demonstrate and analyze a three-terminal, all-electrical spintronic switching device, combining charge current cancellation by appropriate device biasing and ballistic electron transport. The device yields a robust, electrically amplified spin-dependent current signal despite modest efficiency in electrical injection of spin-polarized electrons. Detailed analyses provide insight into the advantages of ballistic, as opposed to diffusive, transport in device operation, as well as scalability to smaller dimensions, and allow us to eliminate the possibility of phenomena unrelated to spin transport contributing to the observed device functionality. The influence of the device geometry on magnetoresistance of nanoscale spin-valve structures is also demonstrated and discussed. Shortcomings of the simplified one-dimensional spin diffusion model for spin valve are elucidated, with comparison of the thickness and the spin diffusion length in the nonmagnetic channel as the criterion for validity of the 1D model. Our work contributes directly to the realization of spin valve and spin transistor devices based on III-V semiconductors, and offers new opportunities to engineer the behavior of spintronic devices at the nanoscale.
Zinc Alloys for the Fabrication of Semiconductor Devices
NASA Technical Reports Server (NTRS)
Ryu, Yungryel; Lee, Tae S.
2009-01-01
ZnBeO and ZnCdSeO alloys have been disclosed as materials for the improvement in performance, function, and capability of semiconductor devices. The alloys can be used alone or in combination to form active photonic layers that can emit over a range of wavelength values. Materials with both larger and smaller band gaps would allow for the fabrication of semiconductor heterostructures that have increased function in the ultraviolet (UV) region of the spectrum. ZnO is a wide band-gap material possessing good radiation-resistance properties. It is desirable to modify the energy band gap of ZnO to smaller values than that for ZnO and to larger values than that for ZnO for use in semiconductor devices. A material with band gap energy larger than that of ZnO would allow for the emission at shorter wavelengths for LED (light emitting diode) and LD (laser diode) devices, while a material with band gap energy smaller than that of ZnO would allow for emission at longer wavelengths for LED and LD devices. The amount of Be in the ZnBeO alloy system can be varied to increase the energy bandgap of ZnO to values larger than that of ZnO. The amount of Cd and Se in the ZnCdSeO alloy system can be varied to decrease the energy band gap of ZnO to values smaller than that of ZnO. Each alloy formed can be undoped or can be p-type doped using selected dopant elements, or can be n-type doped using selected dopant elements. The layers and structures formed with both the ZnBeO and ZnCdSeO semiconductor alloys - including undoped, p-type-doped, and n-type-doped types - can be used for fabricating photonic and electronic semiconductor devices for use in photonic and electronic applications. These devices can be used in LEDs, LDs, FETs (field effect transistors), PN junctions, PIN junctions, Schottky barrier diodes, UV detectors and transmitters, and transistors and transparent transistors. They also can be used in applications for lightemitting display, backlighting for displays, UV and visible transmitters and detectors, high-frequency radar, biomedical imaging, chemical compound identification, molecular identification and structure, gas sensors, imaging systems, and for the fundamental studies of atoms, molecules, gases, vapors, and solids.
Observation of quantum oscillation of work function in ultrathin-metal/semiconductor junctions
DOE Office of Scientific and Technical Information (OSTI.GOV)
Takhar, Kuldeep; Meer, Mudassar; Khachariya, Dolar
2015-09-15
Quantization in energy level due to confinement is generally observed for semiconductors. This property is used for various quantum devices, and it helps to improve the characteristics of conventional devices. Here, the authors have demonstrated the quantum size effects in ultrathin metal (Ni) layers sandwiched between two large band-gap materials. The metal work function is found to oscillate as a function of its thickness. The thermionic emission current bears the signature of the oscillating work function, which has a linear relationship with barrier heights. This methodology allows direct observation of quantum oscillations in metals at room temperature using a Schottkymore » diode and electrical measurements using source-measure-units. The observed phenomena can provide additional mechanism to tune the barrier height of metal/semiconductor junctions, which are used for various electronic devices.« less
Apparatus and methods for memory using in-plane polarization
DOE Office of Scientific and Technical Information (OSTI.GOV)
Liu, Junwei; Chang, Kai; Ji, Shuai-Hua
A memory device includes a semiconductor layer with an in-plane polarization component switchable between a first direction and a second direction. A writing electrode is employed to apply a writing voltage to the semiconductor layer to change the in-plane polarization component between the first direction and the second direction. A reading electrode is employed to apply a reading voltage to the semiconductor layer to measure a tunneling current substantially perpendicular to the polarization direction of the in-plane polarization component. The directions of the reading voltage and the writing voltage are substantially perpendicular to each other. Therefore, the reading process ismore » non-destructive. Thin films (e.g., one unit cell thick) of ferroelectric material can be used in the memory device to increase the miniaturization of the device.« less
Selective etchant for oxide sacrificial material in semiconductor device fabrication
Clews, Peggy J.; Mani, Seethambal S.
2005-05-17
An etching composition and method is disclosed for removing an oxide sacrificial material during manufacture of semiconductor devices including micromechanical, microelectromechanical or microfluidic devices. The etching composition and method are based on the combination of hydrofluoric acid (HF) and sulfuric acid (H.sub.2 SO.sub.4). These acids can be used in the ratio of 1:3 to 3:1 HF:H.sub.2 SO.sub.4 to remove all or part of the oxide sacrificial material while providing a high etch selectivity for non-oxide materials including polysilicon, silicon nitride and metals comprising aluminum. Both the HF and H.sub.2 SO.sub.4 can be provided as "semiconductor grade" acids in concentrations of generally 40-50% by weight HF, and at least 90% by weight H.sub.2 SO.sub.4.
A nanocryotron comparator can connect single-flux-quantum circuits to conventional electronics
NASA Astrophysics Data System (ADS)
Zhao, Qing-Yuan; McCaughan, Adam N.; Dane, Andrew E.; Berggren, Karl K.; Ortlepp, Thomas
2017-04-01
Integration with conventional electronics offers a straightforward and economical approach to upgrading existing superconducting technologies, such as scaling up superconducting detectors into large arrays and combining single flux quantum (SFQ) digital circuits with semiconductor logic gates and memories. However, direct output signals from superconducting devices (e.g., Josephson junctions) are usually not compatible with the input requirements of conventional devices (e.g., transistors). Here, we demonstrate the use of a single three-terminal superconducting-nanowire device, called the nanocryotron (nTron), as a digital comparator to combine SFQ circuits with mature semiconductor circuits such as complementary metal oxide semiconductor (CMOS) circuits. Since SFQ circuits can digitize output signals from general superconducting devices and CMOS circuits can interface existing CMOS-compatible electronics, our results demonstrate the feasibility of a general architecture that uses an nTron as an interface to realize a ‘super-hybrid’ system consisting of superconducting detectors, superconducting quantum electronics, CMOS logic gates and memories, and other conventional electronics.
Electromagnetic radiation screening of semiconductor devices for long life applications
NASA Technical Reports Server (NTRS)
Hall, T. C.; Brammer, W. G.
1972-01-01
A review is presented of the mechanism of interaction of electromagnetic radiation in various spectral ranges, with various semiconductor device defects. Previous work conducted in this area was analyzed as to its pertinence to the current problem. The task was studied of implementing electromagnetic screening methods in the wavelength region determined to be most effective. Both scanning and flooding type stimulation techniques are discussed. While the scanning technique offers a considerably higher yield of useful information, a preliminary investigation utilizing the flooding approach is first recommended because of the ease of implementation, lower cost and ability to provide go-no-go information in semiconductor screening.
Andreev reflection enhancement in semiconductor-superconductor structures
NASA Astrophysics Data System (ADS)
Bouscher, Shlomi; Winik, Roni; Hayat, Alex
2018-02-01
We develop a theoretical approach for modeling a wide range of semiconductor-superconductor structures with arbitrary potential barriers and a spatially dependent superconducting order parameter. We demonstrate asymmetry in the conductance spectrum as a result of a Schottky barrier shape. We further show that the Andreev reflection process can be significantly enhanced through resonant tunneling with appropriate barrier configuration, which can incorporate the Schottky barrier as a contributing component of the device. Moreover, we show that resonant tunneling can be achieved in superlattice structures as well. These theoretically demonstrated effects along with our modeling approach enable much more efficient Cooper pair injection into semiconductor-superconductor structures, including superconducting optoelectronic devices.
Tunneling effect on double potential barriers GaAs and PbS
NASA Astrophysics Data System (ADS)
Prastowo, S. H. B.; Supriadi, B.; Ridlo, Z. R.; Prihandono, T.
2018-04-01
A simple model of transport phenomenon tunnelling effect through double barrier structure was developed. In this research we concentrate on the variation of electron energy which entering double potential barriers to transmission coefficient. The barriers using semiconductor materials GaAs (Galium Arsenide) with band-gap energy 1.424 eV, distance of lattice 0.565 nm, and PbS (Lead Sulphide) with band gap energy 0.41 eV distance of lattice is 18 nm. The Analysisof tunnelling effect on double potentials GaAs and PbS using Schrodinger’s equation, continuity, and matrix propagation to get transmission coefficient. The maximum energy of electron that we use is 1.0 eV, and observable from 0.0025 eV- 1.0 eV. The shows the highest transmission coefficient is0.9982 from electron energy 0.5123eV means electron can pass the barriers with probability 99.82%. Semiconductor from materials GaAs and PbS is one of selected material to design semiconductor device because of transmission coefficient directly proportional to bias the voltage of semiconductor device. Application of the theoretical analysis of resonant tunnelling effect on double barriers was used to design and develop new structure and combination of materials for semiconductor device (diode, transistor, and integrated circuit).
NASA Astrophysics Data System (ADS)
Sun, Yinghui; Wang, Rongming; Liu, Kai
2017-03-01
Substrate has great influences on materials syntheses, properties, and applications. The influences are particularly crucial for atomically thin 2-dimensional (2D) semiconductors. Their thicknesses are less than 1 nm; however, the lateral sizes can reach up to several inches or more. Therefore, these materials must be placed onto a variety of substrates before subsequent post-processing techniques for final electronic or optoelectronic devices. Recent studies reveal that substrates have been employed as ways to modulate the optical, electrical, mechanical, and chemical properties of 2D semiconductors. In this review, we summarize recent progress upon the effects of substrates on properties of 2D semiconductors, mostly focused on 2D transition metal dichalcogenides, through viewpoints of both fundamental physics and device applications. First, we discuss various effects of substrates, including interface strain, charge transfer, dielectric screening, and optical interference. Second, we show the modulation of 2D semiconductors by substrate engineering, including novel substrates (patterned substrates, 2D-material substrates, etc.) and active substrates (phase transition materials, ferroelectric materials, flexible substrates, etc.). Last, we present prospectives and challenges in this research field. This review provides a comprehensive understanding of the substrate effects, and may inspire new ideas of novel 2D devices based on substrate engineering.
NASA Technical Reports Server (NTRS)
Bouldin, D. L.; Eastes, R. W.; Feltner, W. R.; Hollis, B. R.; Routh, D. E.
1979-01-01
The fabrication techniques for creation of complementary metal oxide semiconductor integrated circuits at George C. Marshall Space Flight Center are described. Examples of C-MOS integrated circuits manufactured at MSFC are presented with functional descriptions of each. Typical electrical characteristics of both p-channel metal oxide semiconductor and n-channel metal oxide semiconductor discrete devices under given conditions are provided. Procedures design, mask making, packaging, and testing are included.
Three fundamental devices in one: a reconfigurable multifunctional device in two-dimensional WSe2
NASA Astrophysics Data System (ADS)
Dhakras, Prathamesh; Agnihotri, Pratik; Lee, Ji Ung
2017-06-01
The three pillars of semiconductor device technologies are (1) the p-n diode, (2) the metal-oxide-semiconductor field-effect transistor and (3) the bipolar junction transistor. They have enabled the unprecedented growth in the field of information technology that we see today. Until recently, the technological revolution for better, faster and more efficient devices has been governed by scaling down the device dimensions following Moore’s Law. With the slowing of Moore’s law, there is a need for alternative materials and computing technologies that can continue the advancement in functionality. Here, we describe a single, dynamically reconfigurable device that implements these three fundamental device functions. The device uses buried gates to achieve n- and p-channels and fits into a larger effort to develop devices with enhanced functionalities, including logic functions, over device scaling. As they are all surface conducting devices, we use one material parameter, the interface trap density of states, to describe the key figure-of-merit of each device.
The impact of the Fermi-Dirac distribution on charge injection at metal/organic interfaces.
Wang, Z B; Helander, M G; Greiner, M T; Lu, Z H
2010-05-07
The Fermi level has historically been assumed to be the only energy-level from which carriers are injected at metal/semiconductor interfaces. In traditional semiconductor device physics, this approximation is reasonable as the thermal distribution of delocalized states in the semiconductor tends to dominate device characteristics. However, in the case of organic semiconductors the weak intermolecular interactions results in highly localized electronic states, such that the thermal distribution of carriers in the metal may also influence device characteristics. In this work we demonstrate that the Fermi-Dirac distribution of carriers in the metal has a much more significant impact on charge injection at metal/organic interfaces than has previously been assumed. An injection model which includes the effect of the Fermi-Dirac electron distribution was proposed. This model has been tested against experimental data and was found to provide a better physical description of charge injection. This finding indicates that the thermal distribution of electronic states in the metal should, in general, be considered in the study of metal/organic interfaces.
An integrated semiconductor device enabling non-optical genome sequencing.
Rothberg, Jonathan M; Hinz, Wolfgang; Rearick, Todd M; Schultz, Jonathan; Mileski, William; Davey, Mel; Leamon, John H; Johnson, Kim; Milgrew, Mark J; Edwards, Matthew; Hoon, Jeremy; Simons, Jan F; Marran, David; Myers, Jason W; Davidson, John F; Branting, Annika; Nobile, John R; Puc, Bernard P; Light, David; Clark, Travis A; Huber, Martin; Branciforte, Jeffrey T; Stoner, Isaac B; Cawley, Simon E; Lyons, Michael; Fu, Yutao; Homer, Nils; Sedova, Marina; Miao, Xin; Reed, Brian; Sabina, Jeffrey; Feierstein, Erika; Schorn, Michelle; Alanjary, Mohammad; Dimalanta, Eileen; Dressman, Devin; Kasinskas, Rachel; Sokolsky, Tanya; Fidanza, Jacqueline A; Namsaraev, Eugeni; McKernan, Kevin J; Williams, Alan; Roth, G Thomas; Bustillo, James
2011-07-20
The seminal importance of DNA sequencing to the life sciences, biotechnology and medicine has driven the search for more scalable and lower-cost solutions. Here we describe a DNA sequencing technology in which scalable, low-cost semiconductor manufacturing techniques are used to make an integrated circuit able to directly perform non-optical DNA sequencing of genomes. Sequence data are obtained by directly sensing the ions produced by template-directed DNA polymerase synthesis using all-natural nucleotides on this massively parallel semiconductor-sensing device or ion chip. The ion chip contains ion-sensitive, field-effect transistor-based sensors in perfect register with 1.2 million wells, which provide confinement and allow parallel, simultaneous detection of independent sequencing reactions. Use of the most widely used technology for constructing integrated circuits, the complementary metal-oxide semiconductor (CMOS) process, allows for low-cost, large-scale production and scaling of the device to higher densities and larger array sizes. We show the performance of the system by sequencing three bacterial genomes, its robustness and scalability by producing ion chips with up to 10 times as many sensors and sequencing a human genome.
Pudasaini, Pushpa Raj; Noh, Joo Hyon; Wong, Anthony T.; ...
2016-02-09
To begin this abstract, amorphous metal-oxide semiconductors offer the high carrier mobilities and excellent large-area uniformity required for high performance, transparent, flexible electronic devices; however, a critical bottleneck to their widespread implementation is the need to activate these materials at high temperatures which are not compatible with flexible polymer substrates. The highly controllable activation of amorphous indium gallium zinc oxide semiconductor channels using ionic liquid gating at room temperature is reported. Activation is controlled by electric field-induced oxygen migration across the ionic liquid-semiconductor interface. In addition to activation of unannealed devices, it is shown that threshold voltages of a transistormore » can be linearly tuned between the enhancement and depletion modes. Finally, the first ever example of transparent flexible thin film metal oxide transistor on a polyamide substrate created using this simple technique is demonstrated. Finally, this study demonstrates the potential of field-induced activation as a promising alternative to traditional postdeposition thermal annealing which opens the door to wide scale implementation into flexible electronic applications.« less
All-Graphene Planar Self-Switching MISFEDs, Metal-Insulator-Semiconductor Field-Effect Diodes
Al-Dirini, Feras; Hossain, Faruque M.; Nirmalathas, Ampalavanapillai; Skafidas, Efstratios
2014-01-01
Graphene normally behaves as a semimetal because it lacks a bandgap, but when it is patterned into nanoribbons a bandgap can be introduced. By varying the width of these nanoribbons this band gap can be tuned from semiconducting to metallic. This property allows metallic and semiconducting regions within a single Graphene monolayer, which can be used in realising two-dimensional (2D) planar Metal-Insulator-Semiconductor field effect devices. Based on this concept, we present a new class of nano-scale planar devices named Graphene Self-Switching MISFEDs (Metal-Insulator-Semiconductor Field-Effect Diodes), in which Graphene is used as the metal and the semiconductor concurrently. The presented devices exhibit excellent current-voltage characteristics while occupying an ultra-small area with sub-10 nm dimensions and an ultimate thinness of a single atom. Quantum mechanical simulation results, based on the Extended Huckel method and Nonequilibrium Green's Function Formalism, show that a Graphene Self-Switching MISFED with a channel as short as 5 nm can achieve forward-to-reverse current rectification ratios exceeding 5000. PMID:24496307
High-frequency high-voltage high-power DC-to-DC converters
NASA Astrophysics Data System (ADS)
Wilson, T. G.; Owen, H. A., Jr.; Wilson, P. M.
1981-07-01
The current and voltage waveshapes associated with the power transitor and the power diode in an example current-or-voltage step-up (buck-boost) converter were analyzed to highlight the problems and possible tradeoffs involved in the design of high voltage high power converters operating at switching frequencies in the range of 100 Khz. Although the fast switching speeds of currently available power diodes and transistors permit converter operation at high switching frequencies, the resulting time rates of changes of current coupled with parasitic inductances in series with the semiconductor switches, produce large repetitive voltage transients across the semiconductor switches, potentially far in excess of the device voltage ratings. The need is established for semiconductor switch protection circuitry to control the peak voltages appearing across the semiconductor switches, as well as to provide the waveshaping action require for a given semiconductor device. The possible tradeoffs, as well as the factors affecting the tradeoffs that must be considered in order to maximize the efficiency of the converters are enumerated.
Epitaxy of semiconductor-superconductor nanowires
NASA Astrophysics Data System (ADS)
Krogstrup, P.; Ziino, N. L. B.; Chang, W.; Albrecht, S. M.; Madsen, M. H.; Johnson, E.; Nygård, J.; Marcus, C. M.; Jespersen, T. S.
2015-04-01
Controlling the properties of semiconductor/metal interfaces is a powerful method for designing functionality and improving the performance of electrical devices. Recently semiconductor/superconductor hybrids have appeared as an important example where the atomic scale uniformity of the interface plays a key role in determining the quality of the induced superconducting gap. Here we present epitaxial growth of semiconductor-metal core-shell nanowires by molecular beam epitaxy, a method that provides a conceptually new route to controlled electrical contacting of nanostructures and the design of devices for specialized applications such as topological and gate-controlled superconducting electronics. Our materials of choice, InAs/Al grown with epitaxially matched single-plane interfaces, and alternative semiconductor/metal combinations allowing epitaxial interface matching in nanowires are discussed. We formulate the grain growth kinetics of the metal phase in general terms of continuum parameters and bicrystal symmetries. The method realizes the ultimate limit of uniform interfaces and seems to solve the soft-gap problem in superconducting hybrid structures.
Plastic Deformation as a Means to Achieve Stretchable Polymer Semiconductors
NASA Astrophysics Data System (ADS)
O'Connor, Brendan
Developing intrinsically stretchable semiconductors will seamlessly transition traditional devices into a stretchable platform. Polymer semiconductors are inherently soft materials due to the weak van der Waal intermolecular bonding allowing for flexible devices. However, these materials are not typically stretchable and when large strains are applied they either crack or plastically deform. Here, we study the use of repeated plastic deformation as a means of achieving stretchable films. In this talk, critical aspects of polymer semiconductor material selection, morphology and interface properties will be discussed that enable this approach of achieving stretchable films. We show that one can employ high performance donor-acceptor polymer semiconductors that are typically brittle through proper polymer blending to significantly increase ductility to achieve stretchable films. We demonstrate a polymer blend film that can be repeatedly deformed over 65%, while maintaining charge mobility consistently above 0.15 cm2/Vs. During the stretching process we show that the films follow a well-controlled repeated deformation pattern for over 100 stretching cycles.
High-frequency high-voltage high-power DC-to-DC converters
NASA Technical Reports Server (NTRS)
Wilson, T. G.; Owen, H. A., Jr.; Wilson, P. M.
1981-01-01
The current and voltage waveshapes associated with the power transitor and the power diode in an example current-or-voltage step-up (buck-boost) converter were analyzed to highlight the problems and possible tradeoffs involved in the design of high voltage high power converters operating at switching frequencies in the range of 100 Khz. Although the fast switching speeds of currently available power diodes and transistors permit converter operation at high switching frequencies, the resulting time rates of changes of current coupled with parasitic inductances in series with the semiconductor switches, produce large repetitive voltage transients across the semiconductor switches, potentially far in excess of the device voltage ratings. The need is established for semiconductor switch protection circuitry to control the peak voltages appearing across the semiconductor switches, as well as to provide the waveshaping action require for a given semiconductor device. The possible tradeoffs, as well as the factors affecting the tradeoffs that must be considered in order to maximize the efficiency of the converters are enumerated.
Integrated Multi-Color Light Emitting Device Made with Hybrid Crystal Structure
NASA Technical Reports Server (NTRS)
Park, Yeonjoon (Inventor); Choi, Sang Hyouk (Inventor)
2017-01-01
An integrated hybrid crystal Light Emitting Diode ("LED") display device that may emit red, green, and blue colors on a single wafer. The various embodiments may provide double-sided hetero crystal growth with hexagonal wurtzite III-Nitride compound semiconductor on one side of (0001) c-plane sapphire media and cubic zinc-blended III-V or II-VI compound semiconductor on the opposite side of c-plane sapphire media. The c-plane sapphire media may be a bulk single crystalline c-plane sapphire wafer, a thin free standing c-plane sapphire layer, or crack-and-bonded c-plane sapphire layer on any substrate. The bandgap energies and lattice constants of the compound semiconductor alloys may be changed by mixing different amounts of ingredients of the same group into the compound semiconductor. The bandgap energy and lattice constant may be engineered by changing the alloy composition within the cubic group IV, group III-V, and group II-VI semiconductors and within the hexagonal III-Nitrides.
Integrated Multi-Color Light Emitting Device Made with Hybrid Crystal Structure
NASA Technical Reports Server (NTRS)
Park, Yeonjoon (Inventor); Choi, Sang Hyouk (Inventor)
2016-01-01
An integrated hybrid crystal Light Emitting Diode ("LED") display device that may emit red, green, and blue colors on a single wafer. The various embodiments may provide double-sided hetero crystal growth with hexagonal wurtzite III-Nitride compound semiconductor on one side of (0001) c-plane sapphire media and cubic zinc-blended III-V or II-VI compound semiconductor on the opposite side of c-plane sapphire media. The c-plane sapphire media may be a bulk single crystalline c-plane sapphire wafer, a thin free standing c-plane sapphire layer, or crack-and-bonded c-plane sapphire layer on any substrate. The bandgap energies and lattice constants of the compound semiconductor alloys may be changed by mixing different amounts of ingredients of the same group into the compound semiconductor. The bandgap energy and lattice constant may be engineered by changing the alloy composition within the cubic group IV, group III-V, and group II-VI semiconductors and within the hexagonal III-Nitrides.
Method and apparatus for increasing the durability and yield of thin film photovoltaic devices
Phillips, J.E.; Lasswell, P.G.
1987-02-03
Thin film photovoltaic cells having a pair of semiconductor layers between an opaque and a transparent electrical contact are manufactured in a method which includes the step of scanning one of the semiconductor layers to determine the location of any possible shorting defect. Upon the detection of such defect, the defect is eliminated to increase the durability and yield of the photovoltaic device. 10 figs.
Wide Bandgap Semiconductor Nanowires for Electronic, Photonic and Sensing Devices
2012-01-05
oxide -based thin film transistors ( TFTs ) have attracted much attention for applications like flexible electronic devices. The...crystals, and ~ 1.5 cm2.V-1.s-1 for pentacene thin films ). A number of groups have demonstrated TFTs based on α- oxide semiconductors such as zinc oxide ...show excellent long-term stability at room temperature. Results: High-performance amorphous (α-) InGaZnO-based thin film transistors ( TFTs )
2014-06-28
constructed from inexpensive semiconductor lasers could lead to the development of novel neuro-inspired optical computing devices (threshold detectors ...optical computing devices (threshold detectors , logic gates, signal recognition, etc.). Other topics of research included the analysis of extreme events in...Extreme events is nowadays a highly active field of research. Rogue waves, earthquakes of high magnitude and financial crises are all rare and
Method and apparatus for increasing the durability and yield of thin film photovoltaic devices
Phillips, James E.; Lasswell, Patrick G.
1987-01-01
Thin film photovoltaic cells having a pair of semiconductor layers between an opaque and a transparent electrical contact are manufactured in a method which includes the step of scanning one of the semiconductor layers to determine the location of any possible shorting defect. Upon the detection of such defect, the defect is eliminated to increase the durability and yield of the photovoltaic device.
Strategies for Radiation Hardness Testing of Power Semiconductor Devices
NASA Technical Reports Server (NTRS)
Soltis, James V. (Technical Monitor); Patton, Martin O.; Harris, Richard D.; Rohal, Robert G.; Blue, Thomas E.; Kauffman, Andrew C.; Frasca, Albert J.
2005-01-01
Plans on the drawing board for future space missions call for much larger power systems than have been flown in the past. These systems would employ much higher voltages and currents to enable more powerful electric propulsion engines and other improvements on what will also be much larger spacecraft. Long term human outposts on the moon and planets would also require high voltage, high current and long life power sources. Only hundreds of watts are produced and controlled on a typical robotic exploration spacecraft today. Megawatt systems are required for tomorrow. Semiconductor devices used to control and convert electrical energy in large space power systems will be exposed to electromagnetic and particle radiation of many types, depending on the trajectory and duration of the mission and on the power source. It is necessary to understand the often very different effects of the radiations on the control and conversion systems. Power semiconductor test strategies that we have developed and employed will be presented, along with selected results. The early results that we have obtained in testing large power semiconductor devices give a good indication of the degradation in electrical performance that can be expected in response to a given dose. We are also able to highlight differences in radiation hardness that may be device or material specific.
Epitaxy of advanced nanowire quantum devices
NASA Astrophysics Data System (ADS)
Gazibegovic, Sasa; Car, Diana; Zhang, Hao; Balk, Stijn C.; Logan, John A.; de Moor, Michiel W. A.; Cassidy, Maja C.; Schmits, Rudi; Xu, Di; Wang, Guanzhong; Krogstrup, Peter; Op Het Veld, Roy L. M.; Zuo, Kun; Vos, Yoram; Shen, Jie; Bouman, Daniël; Shojaei, Borzoyeh; Pennachio, Daniel; Lee, Joon Sue; van Veldhoven, Petrus J.; Koelling, Sebastian; Verheijen, Marcel A.; Kouwenhoven, Leo P.; Palmstrøm, Chris J.; Bakkers, Erik P. A. M.
2017-08-01
Semiconductor nanowires are ideal for realizing various low-dimensional quantum devices. In particular, topological phases of matter hosting non-Abelian quasiparticles (such as anyons) can emerge when a semiconductor nanowire with strong spin-orbit coupling is brought into contact with a superconductor. To exploit the potential of non-Abelian anyons—which are key elements of topological quantum computing—fully, they need to be exchanged in a well-controlled braiding operation. Essential hardware for braiding is a network of crystalline nanowires coupled to superconducting islands. Here we demonstrate a technique for generic bottom-up synthesis of complex quantum devices with a special focus on nanowire networks with a predefined number of superconducting islands. Structural analysis confirms the high crystalline quality of the nanowire junctions, as well as an epitaxial superconductor-semiconductor interface. Quantum transport measurements of nanowire ‘hashtags’ reveal Aharonov-Bohm and weak-antilocalization effects, indicating a phase-coherent system with strong spin-orbit coupling. In addition, a proximity-induced hard superconducting gap (with vanishing sub-gap conductance) is demonstrated in these hybrid superconductor-semiconductor nanowires, highlighting the successful materials development necessary for a first braiding experiment. Our approach opens up new avenues for the realization of epitaxial three-dimensional quantum architectures which have the potential to become key components of various quantum devices.
NASA Astrophysics Data System (ADS)
Biyikli, Necmi; Haider, Ali
2017-09-01
In this paper, we present the progress in the growth of nanoscale semiconductors grown via atomic layer deposition (ALD). After the adoption by semiconductor chip industry, ALD became a widespread tool to grow functional films and conformal ultra-thin coatings for various applications. Based on self-limiting and ligand-exchange-based surface reactions, ALD enabled the low-temperature growth of nanoscale dielectric, metal, and semiconductor materials. Being able to deposit wafer-scale uniform semiconductor films at relatively low-temperatures, with sub-monolayer thickness control and ultimate conformality, makes ALD attractive for semiconductor device applications. Towards this end, precursors and low-temperature growth recipes are developed to deposit crystalline thin films for compound and elemental semiconductors. Conventional thermal ALD as well as plasma-assisted and radical-enhanced techniques have been exploited to achieve device-compatible film quality. Metal-oxides, III-nitrides, sulfides, and selenides are among the most popular semiconductor material families studied via ALD technology. Besides thin films, ALD can grow nanostructured semiconductors as well using either template-assisted growth methods or bottom-up controlled nucleation mechanisms. Among the demonstrated semiconductor nanostructures are nanoparticles, nano/quantum-dots, nanowires, nanotubes, nanofibers, nanopillars, hollow and core-shell versions of the afore-mentioned nanostructures, and 2D materials including transition metal dichalcogenides and graphene. ALD-grown nanoscale semiconductor materials find applications in a vast amount of applications including functional coatings, catalysis and photocatalysis, renewable energy conversion and storage, chemical sensing, opto-electronics, and flexible electronics. In this review, we give an overview of the current state-of-the-art in ALD-based nanoscale semiconductor research including the already demonstrated and future applications.
Method of passivating semiconductor surfaces
Wanlass, M.W.
1990-06-19
A method is described for passivating Group III-V or II-VI semiconductor compound surfaces. The method includes selecting a passivating material having a lattice constant substantially mismatched to the lattice constant of the semiconductor compound. The passivating material is then grown as an ultrathin layer of passivating material on the surface of the Group III-V or II-VI semiconductor compound. The passivating material is grown to a thickness sufficient to maintain a coherent interface between the ultrathin passivating material and the semiconductor compound. In addition, a device formed from such method is also disclosed.
Method of passivating semiconductor surfaces
Wanlass, Mark W.
1990-01-01
A method of passivating Group III-V or II-VI semiconductor compound surfaces. The method includes selecting a passivating material having a lattice constant substantially mismatched to the lattice constant of the semiconductor compound. The passivating material is then grown as an ultrathin layer of passivating material on the surface of the Group III-V or II-VI semiconductor compound. The passivating material is grown to a thickness sufficient to maintain a coherent interface between the ultrathin passivating material and the semiconductor compound. In addition, a device formed from such method is also disclosed.
Semiconductor bridge (SCB) detonator
Bickes, Jr., Robert W.; Grubelich, Mark C.
1999-01-01
The present invention is a low-energy detonator for high-density secondary-explosive materials initiated by a semiconductor bridge igniter that comprises a pair of electrically conductive lands connected by a semiconductor bridge. The semiconductor bridge is in operational or direct contact with the explosive material, whereby current flowing through the semiconductor bridge causes initiation of the explosive material. Header wires connected to the electrically-conductive lands and electrical feed-throughs of the header posts of explosive devices, are substantially coaxial to the direction of current flow through the SCB, i.e., substantially coaxial to the SCB length.
Semiconductor-nanocrystal/conjugated polymer thin films
Alivisatos, A. Paul; Dittmer, Janke J.; Huynh, Wendy U.; Milliron, Delia
2014-06-17
The invention described herein provides for thin films and methods of making comprising inorganic semiconductor-nanocrystals dispersed in semiconducting-polymers in high loading amounts. The invention also describes photovoltaic devices incorporating the thin films.
Semiconductor-nanocrystal/conjugated polymer thin films
Alivisatos, A. Paul; Dittmer, Janke J.; Huynh, Wendy U.; Milliron, Delia
2010-08-17
The invention described herein provides for thin films and methods of making comprising inorganic semiconductor-nanocrystals dispersed in semiconducting-polymers in high loading amounts. The invention also describes photovoltaic devices incorporating the thin films.
Analysis of fluctuations in semiconductor devices
NASA Astrophysics Data System (ADS)
Andrei, Petru
The random nature of ion implantation and diffusion processes as well as inevitable tolerances in fabrication result in random fluctuations of doping concentrations and oxide thickness in semiconductor devices. These fluctuations are especially pronounced in ultrasmall (nanoscale) semiconductor devices when the spatial scale of doping and oxide thickness variations become comparable with the geometric dimensions of devices. In the dissertation, the effects of these fluctuations on device characteristics are analyzed by using a new technique for the analysis of random doping and oxide thickness induced fluctuations. This technique is universal in nature in the sense that it is applicable to any transport model (drift-diffusion, semiclassical transport, quantum transport etc.) and it can be naturally extended to take into account random fluctuations of the oxide (trapped) charges and channel length. The technique is based on linearization of the transport equations with respect to the fluctuating quantities. It is computationally much (a few orders of magnitude) more efficient than the traditional Monte-Carlo approach and it yields information on the sensitivity of fluctuations of parameters of interest (e.g. threshold voltage, small-signal parameters, cut-off frequencies, etc.) to the locations of doping and oxide thickness fluctuations. For this reason, it can be very instrumental in the design of fluctuation-resistant structures of semiconductor devices. Quantum mechanical effects are taken into account by using the density-gradient model as well as through self-consistent Poisson-Schrodinger computations. Special attention is paid to the presenting of the technique in a form that is suitable for implementation on commercial device simulators. The numerical implementation of the technique is discussed in detail and numerous computational results are presented and compared with those previously published in literature.
Advanced 3-V semiconductor technology assessment
NASA Technical Reports Server (NTRS)
Nowogrodzki, M.
1983-01-01
Components required for extensions of currently planned space communications systems are discussed for large antennas, crosslink systems, single sideband systems, Aerostat systems, and digital signal processing. Systems using advanced modulation concepts and new concepts in communications satellites are included. The current status and trends in materials technology are examined with emphasis on bulk growth of semi-insulating GaAs and InP, epitaxial growth, and ion implantation. Microwave solid state discrete active devices, multigigabit rate GaAs digital integrated circuits, microwave integrated circuits, and the exploratory development of GaInAs devices, heterojunction devices, and quasi-ballistic devices is considered. Competing technologies such as RF power generation, filter structures, and microwave circuit fabrication are discussed. The fundamental limits of semiconductor devices and problems in implementation are explored.
Electrical and Optical Measurements of the Bandgap Energy of a Light-Emitting Diode
ERIC Educational Resources Information Center
Petit, Matthieu; Michez, Lisa; Raimundo, Jean-Manuel; Dumas, Philippe
2016-01-01
Semiconductor materials are at the core of electronics. Most electronic devices are made of semiconductors. The operation of these components is well described by quantum physics which is often a difficult concept for students to understand. One of the intrinsic parameters of semiconductors is their bandgap energy E[subscript g]. In the case of…
Investigation of Surface Breakdown on Semiconductor Devices Using Optical Probing Techniques.
1990-01-01
18] L. Bovino , T. Burke, R. Youmans, M. Weiner, and J. Car, r, "Recent Advances in Optically C’ntrolled Bulk Semiconductor Switches," Digest of...Comp. Simul. 5 (3), 175 (1988). [321 M. Weiner, L. Bovino , R. Youmans, and T. Burke, "Modeling of the Optically Conrolled Semiconductor Switch," J
NASA Astrophysics Data System (ADS)
Diaz Leon, Juan J.; Norris, Kate J.; Hartnett, Ryan J.; Garrett, Matthew P.; Tompa, Gary S.; Kobayashi, Nobuhiko P.
2016-08-01
Thermoelectric (TE) devices that produce electric power from heat are driven by a temperature gradient (Δ T = T_{{hot}} - T_{{cold}}, T hot: hot side temperature, T cold: cold side temperature) with respect to the average temperature ( T). While the resistance of TE devices changes as Δ T and/or T change, the current-voltage ( I- V) characteristics have consistently been shown to remain linear, which clips generated electric power ( P gen) within the given open-circuit voltage ( V OC) and short-circuit current ( I SC). This P gen clipping is altered when an appropriate nonlinearity is introduced to the I- V characteristics—increasing P gen. By analogy, photovoltaic cells with a large fill factor exhibit nonlinear I- V characteristics. In this paper, the concept of a unique TE device with nonlinear I- V characteristics is proposed and experimentally demonstrated. A single TE device with nonlinear I- V characteristics is fabricated by combining indium phosphide (InP) and silicon (Si) semiconductor nanowire networks. These TE devices show P gen that is more than 25 times larger than those of comparable devices with linear I- V characteristics. The plausible causes of the nonlinear I- V characteristics are discussed. The demonstrated concept suggests that there exists a new pathway to increase P gen of TE devices made of semiconductors.
Solid state technology: A compilation. [on semiconductor devices
NASA Technical Reports Server (NTRS)
1973-01-01
A compilation, covering selected solid state devices developed and integrated into systems by NASA to improve performance, is presented. Data are also given on device shielding in hostile radiation environments.
40 CFR 63.7188 - What are my monitoring installation, operation, and maintenance requirements?
Code of Federal Regulations, 2011 CFR
2011-07-01
... Semiconductor Manufacturing Compliance Requirements § 63.7188 What are my monitoring installation, operation... emissions of your semiconductor process vent through a closed vent system to a control device, you must...
40 CFR 63.7188 - What are my monitoring installation, operation, and maintenance requirements?
Code of Federal Regulations, 2010 CFR
2010-07-01
... Semiconductor Manufacturing Compliance Requirements § 63.7188 What are my monitoring installation, operation... emissions of your semiconductor process vent through a closed vent system to a control device, you must...
Stable room-temperature thallium bromide semiconductor radiation detectors
NASA Astrophysics Data System (ADS)
Datta, A.; Fiala, J.; Becla, P.; Motakef, Shariar
2017-10-01
Thallium bromide (TlBr) is a highly efficient ionic semiconductor with excellent radiation detection properties. However, at room temperature, TlBr devices polarize under an applied electric field. This phenomenon not only degrades the charge collection efficiency of the detectors but also promotes chemical reaction of the metal electrodes with bromine, resulting in an unstable electric field and premature failure of the device. This drawback has been crippling the TlBr semiconductor radiation detector technology over the past few decades. In this exhaustive study, this polarization phenomenon has been counteracted using innovative bias polarity switching schemes. Here the highly mobile Br- species, with an estimated electro-diffusion velocity of 10-8 cm/s, face opposing electro-migration forces during every polarity switch. This minimizes the device polarization and availability of Br- ions near the metal electrode. Our results indicate that it is possible to achieve longer device lifetimes spanning more than 17 000 h (five years of 8 × 7 operation) for planar and pixelated radiation detectors using this technique. On the other hand, at constant bias, 2500 h is the longest reported lifetime with most devices less than 1000 h. After testing several biasing switching schemes, it is concluded that the critical bias switching frequency at an applied bias of 1000 V/cm is about 17 μHz. Using this groundbreaking result, it will now be possible to deploy this highly efficient room temperature semiconductor material for field applications in homeland security, medical imaging, and physics research.
Nanoionics-Based Switches for Radio-Frequency Applications
NASA Technical Reports Server (NTRS)
Nessel, James; Lee, Richard
2010-01-01
Nanoionics-based devices have shown promise as alternatives to microelectromechanical systems (MEMS) and semiconductor diode devices for switching radio-frequency (RF) signals in diverse systems. Examples of systems that utilize RF switches include phase shifters for electronically steerable phased-array antennas, multiplexers, cellular telephones and other radio transceivers, and other portable electronic devices. Semiconductor diode switches can operate at low potentials (about 1 to 3 V) and high speeds (switching times of the order of nanoseconds) but are characterized by significant insertion loss, high DC power consumption, low isolation, and generation of third-order harmonics and intermodulation distortion (IMD). MEMS-based switches feature low insertion loss (of the order of 0.2 dB), low DC power consumption (picowatts), high isolation (>30 dB), and low IMD, but contain moving parts, are not highly reliable, and must be operated at high actuation potentials (20 to 60 V) generated and applied by use of complex circuitry. In addition, fabrication of MEMS is complex, involving many processing steps. Nanoionics-based switches offer the superior RF performance and low power consumption of MEMS switches, without need for the high potentials and complex circuitry necessary for operation of MEMS switches. At the same time, nanoionics-based switches offer the high switching speed of semiconductor devices. Also, like semiconductor devices, nanoionics-based switches can be fabricated relatively inexpensively by use of conventional integrated-circuit fabrication techniques. More over, nanoionics-based switches have simple planar structures that can easily be integrated into RF power-distribution circuits.
Molecular detection via hybrid peptide-semiconductor photonic devices
NASA Astrophysics Data System (ADS)
Estephan, E.; Saab, M.-b.; Martin, M.; Cloitre, T.; Larroque, C.; Cuisinier, F. J. G.; Malvezzi, A. M.; Gergely, C.
2011-03-01
The aim of this work was to investigate the possibilities to support device functionality that includes strongly confined and localized light emission and detection processes within nano/micro-structured semiconductors for biosensing applications. The interface between biological molecules and semiconductor surfaces, yet still under-explored is a key issue for improving biomolecular recognition in devices. We report on the use of adhesion peptides, elaborated via combinatorial phage-display libraries for controlled placement of biomolecules, leading to user-tailored hybrid photonic systems for molecular detection. An M13 bacteriophage library has been used to screen 1010 different peptides against various semiconductors to finally isolate specific peptides presenting a high binding capacity for the target surfaces. When used to functionalize porous silicon microcavities (PSiM) and GaAs/AlGaAs photonic crystals, we observe the formation of extremely thin (<1nm) peptide layers, hereby preserving the nanostructuration of the crystals. This is important to assure the photonic response of these tiny structures when they are functionalized by a biotinylated peptide layer and then used to capture streptavidin. Molecular detection was monitored via both linear and nonlinear optical measurements. Our linear reflectance spectra demonstrate an enhanced detection resolution via PSiM devices, when functionalized with the Si-specific peptide. Molecular capture at even lower concentrations (femtomols) is possible via the second harmonic generation of GaAs/AlGaAs photonic crystals when functionalized with GaAs-specific peptides. Our work demonstrates the outstanding value of adhesion peptides as interface linkers between semiconductors and biological molecules. They assure an enhanced molecular detection via both linear and nonlinear answers of photonic crystals.
NASA Astrophysics Data System (ADS)
Wang, Wei; Peng, Dengfeng; Zhang, Hanlu; Yang, Xiaohong; Pan, Caofeng
2017-07-01
Piezoelectric semiconductor with optical, electrical and mechanical multifunctions has great potential applications in future optoelectronic devices. The rich properties and applications mainly encompass the intrinsic structures and their coupling effects. Here, we report that lanthanide ions doped piezoelectric semiconductor CaZnOS:Sm3+ showing strong red emission induced by dynamic mechanical stress. Under moderate mechanical load, the doped piezoelectric semiconductor exhibits strong visible red emission to the naked eyes even under the day light. A flexible dynamic pressure sensor device is fabricated based on the prepared CaZnOS:Sm3+ powders. The mechanical-induced emission properties of the device are investigated by the optical fiber spectrometer. The linear characteristic emissions are attributed to the 4G5/2→6H5/2 (566 nm), 4G5/2→6H7/2 (580-632 nm), 4G5/2→6H9/2 (653-673 nm) and 4G5/2→6H11/2 (712-735 nm) f-f transitions of Sm3+ ions. The integral emission intensity is proportional to the value of applied pressure. By using the linear relationship between integrated emission intensity and the dynamic pressure, the real-time pressure distribution is visualized and recorded. Our results highlight that the incorporation of lanthanide luminescent ions into piezoelectric semiconductors as smart materials could be applied into the flexible mechanical-optical sensor device without additional auxiliary power, which has great potential for promising applications such as mapping of personalized handwriting, smart display, and human machine interface.
Fabrication of a P3HT-ZnO Nanowires Gas Sensor Detecting Ammonia Gas
Kuo, Chin-Guo; Chen, Jung-Hsuan; Chao, Yi-Chieh; Chen, Po-Lin
2017-01-01
In this study, an organic-inorganic semiconductor gas sensor was fabricated to detect ammonia gas. An inorganic semiconductor was a zinc oxide (ZnO) nanowire array produced by atomic layer deposition (ALD) while an organic material was a p-type semiconductor, poly(3-hexylthiophene) (P3HT). P3HT was suitable for the gas sensing application due to its high hole mobility, good stability, and good electrical conductivity. In this work, P3HT was coated on the zinc oxide nanowires by the spin coating to form an organic-inorganic heterogeneous interface of the gas sensor for detecting ammonia gas. The thicknesses of the P3HT were around 462 nm, 397 nm, and 277 nm when the speeds of the spin coating were 4000 rpm, 5000 rpm, and 6000 rpm, respectively. The electrical properties and sensing characteristics of the gas sensing device at room temperature were evaluated by Hall effect measurement and the sensitivity of detecting ammonia gas. The results of Hall effect measurement for the P3HT-ZnO nanowires semiconductor with 462 nm P3HT film showed that the carrier concentration and the mobility were 2.7 × 1019 cm−3 and 24.7 cm2∙V−1∙s−1 respectively. The gas sensing device prepared by the P3HT-ZnO nanowires semiconductor had better sensitivity than the device composed of the ZnO film and P3HT film. Additionally, this gas sensing device could reach a maximum sensitivity around 11.58 per ppm. PMID:29295573
Fabrication of a P3HT-ZnO Nanowires Gas Sensor Detecting Ammonia Gas.
Kuo, Chin-Guo; Chen, Jung-Hsuan; Chao, Yi-Chieh; Chen, Po-Lin
2017-12-25
In this study, an organic-inorganic semiconductor gas sensor was fabricated to detect ammonia gas. An inorganic semiconductor was a zinc oxide (ZnO) nanowire array produced by atomic layer deposition (ALD) while an organic material was a p-type semiconductor, poly(3-hexylthiophene) (P3HT). P3HT was suitable for the gas sensing application due to its high hole mobility, good stability, and good electrical conductivity. In this work, P3HT was coated on the zinc oxide nanowires by the spin coating to form an organic-inorganic heterogeneous interface of the gas sensor for detecting ammonia gas. The thicknesses of the P3HT were around 462 nm, 397 nm, and 277 nm when the speeds of the spin coating were 4000 rpm, 5000 rpm, and 6000 rpm, respectively. The electrical properties and sensing characteristics of the gas sensing device at room temperature were evaluated by Hall effect measurement and the sensitivity of detecting ammonia gas. The results of Hall effect measurement for the P3HT-ZnO nanowires semiconductor with 462 nm P3HT film showed that the carrier concentration and the mobility were 2.7 × 10 19 cm -3 and 24.7 cm²∙V -1 ∙s -1 respectively. The gas sensing device prepared by the P3HT-ZnO nanowires semiconductor had better sensitivity than the device composed of the ZnO film and P3HT film. Additionally, this gas sensing device could reach a maximum sensitivity around 11.58 per ppm.
Lyu, Mengjie; Liu, Youwen; Zhi, Yuduo; Xiao, Chong; Gu, Bingchuan; Hua, Xuemin; Fan, Shaojuan; Lin, Yue; Bai, Wei; Tong, Wei; Zou, Youming; Pan, Bicai; Ye, Bangjiao; Xie, Yi
2015-12-02
Fabricating a flexible room-temperature ferromagnetic resistive-switching random access memory (RRAM) device is of fundamental importance to integrate nonvolatile memory and spintronics both in theory and practice for modern information technology and has the potential to bring about revolutionary new foldable information-storage devices. Here, we show that a relatively low operating voltage (+1.4 V/-1.5 V, the corresponding electric field is around 20,000 V/cm) drives the dual vacancies evolution in ultrathin SnO2 nanosheets at room temperature, which causes the reversible transition between semiconductor and half-metal, accompanyied by an abrupt conductivity change up to 10(3) times, exhibiting room-temperature ferromagnetism in two resistance states. Positron annihilation spectroscopy and electron spin resonance results show that the Sn/O dual vacancies in the ultrathin SnO2 nanosheets evolve to isolated Sn vacancy under electric field, accounting for the switching behavior of SnO2 ultrathin nanosheets; on the other hand, the different defect types correspond to different conduction natures, realizing the transition between semiconductor and half-metal. Our result represents a crucial step to create new a information-storage device realizing the reversible transition between semiconductor and half-metal with flexibility and room-temperature ferromagnetism at low energy consumption. The as-obtained half-metal in the low-resistance state broadens the application of the device in spintronics and the semiconductor to half-metal transition on the basis of defects evolution and also opens up a new avenue for exploring random access memory mechanisms and finding new half-metals for spintronics.
Python Scripts for Automation of Current-Voltage Testing of Semiconductor Devices (FY17)
2017-01-01
ARL-TR-7923 ● JAN 2017 US Army Research Laboratory Python Scripts for Automation of Current- Voltage Testing of Semiconductor...manual device-testing procedures is reduced or eliminated through automation. This technical report includes scripts written in Python , version 2.7, used ...nothing. 3.1.9 Exit Program The script exits the entire program. Line 505, sys.exit(), uses the sys package that comes with Python to exit system
NASA Technical Reports Server (NTRS)
Misiakos, K.; Lindholm, F. A.
1986-01-01
Several parameters of certain three-dimensional semiconductor devices including diodes, transistors, and solar cells can be determined without solving the actual boundary-value problem. The recombination current, transit time, and open-circuit voltage of planar diodes are emphasized here. The resulting analytical expressions enable determination of the surface recombination velocity of shallow planar diodes. The method involves introducing corresponding one-dimensional models having the same values of these parameters.
Luminescence Studies of Ion-Implanted Gallium Nitride and Aluminum Gallium Nitride
2003-03-01
58: 1306 (1995). 15. Moxom, Jeremy. “Characterization of Mg doped GaN by positron annihilation spectroscopy .” Journal of Applied Physics, 92... semiconductors such as GaN and AlxGa1-xN became very popular for their applications on various devices. Therefore comprehensive and systematic luminescence...short wavelength optoelectronic applications that are beyond the range of present semiconductor devices. The AlGaN and GaN materials have these
2D Crystal Semiconductors New Materials for GHz-THz Devices
2015-10-02
semiconductors are most promising for GHz-THz electronics. 3) Identify the major scattering mechanisms limiting mobility in 2D crystals towards high...Devices that do not operate on the traditional transistor mechanism exist today and operate below the SS limit. An example is a nanoelectromechanical...system (NEMS), which is the analog of a mechanical relay. Sub- stantial progress has been made in this area [14]. Due to mechanical moving parts, these
NASA Astrophysics Data System (ADS)
Cao, Duyen Hanh
Halide perovskites, AMX3 (A = monocation, B = Ge, Sn, or Pb, and X = halogen), present a versatile class of solution-processable semiconductors made from earth abundant materials with outstanding electrical and optical properties. Their solar cell efficiencies have dramatically increased from 9% to 22% in less than five years since 2012, a rate that has never been seen before in photovoltaic research. Critical to the final goal of commercializing perovskite solar cell technology is achieving device long-term stability and eliminating toxic elements in device components. This thesis uses 3D AMX 3 perovskites as a stand-in to develop a new class of lead-free, moisture stable, functional and highly tunable 2D Ruddlesden-Popper (BA) 2(MA)n-1SnnI3n+1 (n is an integer) perovskite semiconductors. Synthesis, thin film fabrication, extensive characterization, and solar cell device structure-performance relationships are presented throughout the entire thesis.
Lee, Ya-Ju; Yang, Zu-Po; Chen, Pin-Guang; Hsieh, Yung-An; Yao, Yung-Chi; Liao, Ming-Han; Lee, Min-Hung; Wang, Mei-Tan; Hwang, Jung-Min
2014-10-20
In this study, we report a novel monolithically integrated GaN-based light-emitting diode (LED) with metal-oxide-semiconductor field-effect transistor (MOSFET). Without additionally introducing complicated epitaxial structures for transistors, the MOSFET is directly fabricated on the exposed n-type GaN layer of the LED after dry etching, and serially connected to the LED through standard semiconductor-manufacturing technologies. Such monolithically integrated LED/MOSFET device is able to circumvent undesirable issues that might be faced by other kinds of integration schemes by growing a transistor on an LED or vice versa. For the performances of resulting device, our monolithically integrated LED/MOSFET device exhibits good characteristics in the modulation of gate voltage and good capability of driving injected current, which are essential for the important applications such as smart lighting, interconnection, and optical communication.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Doan, T. C.; Li, J.; Lin, J. Y.
2016-07-15
Solid-state neutron detectors with high performance are highly sought after for the detection of fissile materials. However, direct-conversion neutron detectors based on semiconductors with a measureable efficiency have not been realized. We report here the first successful demonstration of a direct-conversion semiconductor neutron detector with an overall detection efficiency for thermal neutrons of 4% and a charge collection efficiency as high as 83%. The detector is based on a 2.7 μm thick {sup 10}B-enriched hexagonal boron nitride (h-BN) epitaxial layer. The results represent a significant step towards the realization of practical neutron detectors based on h-BN epilayers. Neutron detectors basedmore » on h-BN are expected to possess all the advantages of semiconductor devices including wafer-scale processing, compact size, light weight, and ability to integrate with other functional devices.« less
Engineering charge transport by heterostructuring solution-processed semiconductors
NASA Astrophysics Data System (ADS)
Voznyy, Oleksandr; Sutherland, Brandon R.; Ip, Alexander H.; Zhitomirsky, David; Sargent, Edward H.
2017-06-01
Solution-processed semiconductor devices are increasingly exploiting heterostructuring — an approach in which two or more materials with different energy landscapes are integrated into a composite system. Heterostructured materials offer an additional degree of freedom to control charge transport and recombination for more efficient optoelectronic devices. By exploiting energetic asymmetry, rationally engineered heterostructured materials can overcome weaknesses, augment strengths and introduce emergent physical phenomena that are otherwise inaccessible to single-material systems. These systems see benefit and application in two distinct branches of charge-carrier manipulation. First, they influence the balance between excitons and free charges to enhance electron extraction in solar cells and photodetectors. Second, they promote radiative recombination by spatially confining electrons and holes, which increases the quantum efficiency of light-emitting diodes. In this Review, we discuss advances in the design and composition of heterostructured materials, consider their implementation in semiconductor devices and examine unexplored paths for future advancement in the field.
Nonlinear terahertz devices utilizing semiconducting plasmonic metamaterials
Seren, Huseyin R.; Zhang, Jingdi; Keiser, George R.; ...
2016-01-26
The development of responsive metamaterials has enabled the realization of compact tunable photonic devices capable of manipulating the amplitude, polarization, wave vector and frequency of light. Integration of semiconductors into the active regions of metallic resonators is a proven approach for creating nonlinear metamaterials through optoelectronic control of the semiconductor carrier density. Metal-free subwavelength resonant semiconductor structures offer an alternative approach to create dynamic metamaterials. We present InAs plasmonic disk arrays as a viable resonant metamaterial at terahertz frequencies. Importantly, InAs plasmonic disks exhibit a strong nonlinear response arising from electric field-induced intervalley scattering, resulting in a reduced carrier mobilitymore » thereby damping the plasmonic response. here, we demonstrate nonlinear perfect absorbers configured as either optical limiters or saturable absorbers, including flexible nonlinear absorbers achieved by transferring the disks to polyimide films. Nonlinear plasmonic metamaterials show potential for use in ultrafast terahertz (THz) optics and for passive protection of sensitive electromagnetic devices.« less
Nonlinear terahertz devices utilizing semiconducting plasmonic metamaterials
DOE Office of Scientific and Technical Information (OSTI.GOV)
Seren, Huseyin R.; Zhang, Jingdi; Keiser, George R.
The development of responsive metamaterials has enabled the realization of compact tunable photonic devices capable of manipulating the amplitude, polarization, wave vector and frequency of light. Integration of semiconductors into the active regions of metallic resonators is a proven approach for creating nonlinear metamaterials through optoelectronic control of the semiconductor carrier density. Metal-free subwavelength resonant semiconductor structures offer an alternative approach to create dynamic metamaterials. We present InAs plasmonic disk arrays as a viable resonant metamaterial at terahertz frequencies. Importantly, InAs plasmonic disks exhibit a strong nonlinear response arising from electric field-induced intervalley scattering, resulting in a reduced carrier mobilitymore » thereby damping the plasmonic response. here, we demonstrate nonlinear perfect absorbers configured as either optical limiters or saturable absorbers, including flexible nonlinear absorbers achieved by transferring the disks to polyimide films. Nonlinear plasmonic metamaterials show potential for use in ultrafast terahertz (THz) optics and for passive protection of sensitive electromagnetic devices.« less
NASA Technical Reports Server (NTRS)
Danchenko, V. (Inventor)
1974-01-01
A technique is described for radiation hardening of MOS devices and specifically for stabilizing the gate threshold potential at room temperature of a radiation subjected MOS field-effect device with a semiconductor substrate, an insulating layer of oxide on the substrate, and a gate electrode disposed on the insulating layer. The boron is introduced within a layer of the oxide of about 100 A-300 A thickness immediately adjacent the semiconductor-insulator interface. The concentration of boron in the oxide layer is preferably maintained on the order of 10 to the 18th power atoms/cu cm. The technique serves to reduce and substantially annihilate radiation induced positive gate charge accumulations.
Electrically tunable infrared metamaterial devices
Brener, Igal; Jun, Young Chul
2015-07-21
A wavelength-tunable, depletion-type infrared metamaterial optical device is provided. The device includes a thin, highly doped epilayer whose electrical permittivity can become negative at some infrared wavelengths. This highly-doped buried layer optically couples with a metamaterial layer. Changes in the transmission spectrum of the device can be induced via the electrical control of this optical coupling. An embodiment includes a contact layer of semiconductor material that is sufficiently doped for operation as a contact layer and that is effectively transparent to an operating range of infrared wavelengths, a thin, highly doped buried layer of epitaxially grown semiconductor material that overlies the contact layer, and a metallized layer overlying the buried layer and patterned as a resonant metamaterial.
Tsuo, Y.S.; Deb, S.K.
1990-10-02
Disclosed is a hydrogen ion microlithography process for use in microelectronic fabrication and semiconductor device processing. The process comprises the steps of providing a single layer of either an amorphous silicon or hydrogenated amorphous silicon material. A pattern is recorded in a selected layer of amorphous silicon or hydrogenated amorphous silicon materials by preferentially implanting hydrogen ions therein so as to permit the selected layer to serve as a mask-resist wafer suitable for subsequent development and device fabrication. The layer is developed to provide a surface pattern therein adaptable for subsequent use in microelectronic fabrication and semiconductor device processing. 6 figs.
Electromagnetic radiation screening of microcircuits for long life applications
NASA Technical Reports Server (NTRS)
Brammer, W. G.; Erickson, J. J.; Levy, M. E.
1974-01-01
The utility of X-rays as a stimulus for screening high reliability semiconductor microcircuits was studied. The theory of the interaction of X-rays with semiconductor materials and devices was considered. Experimental measurements of photovoltages, photocurrents, and effects on specified parameters were made on discrete devices and on microcircuits. The test specimens included discrete devices with certain types of identified flaws and symptoms of flaws, and microcircuits exhibiting deviant electrical behavior. With a necessarily limited sample of test specimens, no useful correlation could be found between the X-ray-induced electrical response and the known or suspected presence of flaws.
Performance issues for iterative solvers in device simulation
NASA Technical Reports Server (NTRS)
Fan, Qing; Forsyth, P. A.; Mcmacken, J. R. F.; Tang, Wei-Pai
1994-01-01
Due to memory limitations, iterative methods have become the method of choice for large scale semiconductor device simulation. However, it is well known that these methods still suffer from reliability problems. The linear systems which appear in numerical simulation of semiconductor devices are notoriously ill-conditioned. In order to produce robust algorithms for practical problems, careful attention must be given to many implementation issues. This paper concentrates on strategies for developing robust preconditioners. In addition, effective data structures and convergence check issues are also discussed. These algorithms are compared with a standard direct sparse matrix solver on a variety of problems.
Method of making high breakdown voltage semiconductor device
Arthur, Stephen D.; Temple, Victor A. K.
1990-01-01
A semiconductor device having at least one P-N junction and a multiple-zone junction termination extension (JTE) region which uniformly merges with the reverse blocking junction is disclosed. The blocking junction is graded into multiple zones of lower concentration dopant adjacent termination to facilitate merging of the JTE to the blocking junction and placing of the JTE at or near the high field point of the blocking junction. Preferably, the JTE region substantially overlaps the graded blocking junction region. A novel device fabrication method is also provided which eliminates the prior art step of separately diffusing the JTE region.
GaAs photoconductive semiconductor switch
Loubriel, G.M.; Baca, A.G.; Zutavern, F.J.
1998-09-08
A high gain, optically triggered, photoconductive semiconductor switch (PCSS) implemented in GaAs as a reverse-biased pin structure with a passivation layer above the intrinsic GaAs substrate in the gap between the two electrodes of the device is disclosed. The reverse-biased configuration in combination with the addition of the passivation layer greatly reduces surface current leakage that has been a problem for prior PCSS devices and enables employment of the much less expensive and more reliable DC charging systems instead of the pulsed charging systems that needed to be used with prior PCSS devices. 5 figs.
Low resistance contacts for shallow junction semiconductors
NASA Technical Reports Server (NTRS)
Fatemi, Navid S. (Inventor); Weizer, Victor G. (Inventor)
1994-01-01
A method of enhancing the specific contact resistivity in InP semiconductor devices and improved devices produced thereby are disclosed. Low resistivity values are obtained by using gold ohmic contacts that contain small amounts of gallium or indium and by depositing a thin gold phosphide interlayer between the surface of the InP device and the ohmic contact. When both the thin interlayer and the gold-gallium or gold-indium contact metallizations are used, ultra low specific contact resistivities are achieved. Thermal stability with good contact resistivity is achieved by depositing a layer of refractory metal over the gold phosphide interlayer.
Photo-Detection on Narrow-Bandgap High-Mobility 2D Semiconductors
NASA Astrophysics Data System (ADS)
Charnas, Adam; Qiu, Gang; Deng, Yexin; Wang, Yixiu; Du, Yuchen; Yang, Lingming; Wu, Wenzhuo; Ye, Peide
Photo-detection and energy harvesting device concepts have been demonstrated widely in 2D materials such as graphene, TMDs, and black phosphorus. In this work, we demonstrate anisotropic photo-detection achieved using devices fabricated from hydrothermally grown narrow-bandgap high-mobility 2D semiconductor. Back-gated FETs were fabricated by transferring the 2D flakes onto a Si/SiO2 substrate and depositing various metal contacts across the flakes to optimize the access resistance for optoelectronic devices. Photo-responsivity was measured and mapped by slightly biasing the devices and shining a laser spot at different locations of the device to observe and map the resulting photo-generated current. Optimization of the Schottky barrier height for both n and p at the metal-2D interfaces using asymmetric contact engineering was performed to improve device performance.
CMOS Image Sensor Using SOI-MOS/Photodiode Composite Photodetector Device
NASA Astrophysics Data System (ADS)
Uryu, Yuko; Asano, Tanemasa
2002-04-01
A new photodetector device composed of a lateral junction photodiode and a metal-oxide-semiconductor field-effect-transistor (MOSFET), in which the output of the diode is fed through the body of the MOSFET, has been investigated. It is shown that the silicon-on-insulator (SOI)-MOSFET amplifies the junction photodiode current due to the lateral bipolar action. It is also shown that the presence of the electrically floating gate enhances the current amplification factor of the SOI-MOSFET. The output current of this composite device linearly responds by four orders of illumination intensity. As an application of the composite device, a complementary-metal-oxide-semiconductor (CMOS) line sensor incorporating the composite device is fabricated and its operation is demonstrated. The output signal of the line sensor using the composite device was two times larger than that using the lateral photodiode.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Turkov, Vadim K.; Baranov, Alexander V.; Fedorov, Anatoly V.
Doped semiconductor nanocrystals is a versatile material base for contemporary photonics and optoelectronics devices. Here, for the first time to the best of our knowledge, we theoretically calculate the radiative decay rates of the lowest-energy states of donor impurity in spherical nanocrystals made of four widely used semiconductors: ZnS, CdSe, Ge, and GaAs. The decay rates were shown to vary significantly with the nanocrystal radius, increasing by almost three orders of magnitude when the radius is reduced from 15 to 5 nm. Our results suggest that spontaneous emission may dominate the decay of impurity states at low temperatures, and shouldmore » be taken into account in the design of advanced materials and devices based on doped semiconductor nanocrystals.« less
Taubman, Matthew S; Phillips, Mark C
2015-04-07
A method is disclosed for power normalization of spectroscopic signatures obtained from laser based chemical sensors that employs the compliance voltage across a quantum cascade laser device within an external cavity laser. The method obviates the need for a dedicated optical detector used specifically for power normalization purposes. A method is also disclosed that employs the compliance voltage developed across the laser device within an external cavity semiconductor laser to power-stabilize the laser mode of the semiconductor laser by adjusting drive current to the laser such that the output optical power from the external cavity semiconductor laser remains constant.
Total-dose radiation effects data for semiconductor devices: 1985 supplement, volume 1
NASA Technical Reports Server (NTRS)
Martin, K. E.; Gauthier, M. K.; Coss, J. R.; Dantas, A. R. V.; Price, W. E.
1985-01-01
Steady-state, total-dose radiation test data are provided, in graphic format, for use by electronic designers and other personnel using semiconductor devices in a radiation environment. The data were generated by JPL for various NASA space programs. The document is in two volumes: Volume 1 provides data on diodes, bipolar transistors, field effect transistors, and miscellaneous semiconductor types, and Volume 2 provides total-dose radiation test data on integrated circuits. Volume 1 of this 1985 Supplement contains new total-dose radiation test data generated since the August 1, 1981 release date of the original Volume 1. Publication of Volume 2 of the 1985 Supplement will follow that of Volume 1 by approximately three months.
Vapor phase growth technique of III-V compounds utilizing a preheating step
NASA Technical Reports Server (NTRS)
Olsen, Gregory Hammond (Inventor); Zamerowski, Thomas Joseph (Inventor); Buiocchi, Charles Joseph (Inventor)
1978-01-01
In the vapor phase epitaxy fabrication of semiconductor devices and in particular semiconductor lasers, the deposition body on which a particular layer of the laser is to be grown is preheated to a temperature about 40.degree. to 60.degree. C. lower than the temperature at which deposition occurs. It has been discovered that by preheating at this lower temperature there is reduced thermal decomposition at the deposition surface, especially for semiconductor materials such as indium gallium phosphide and gallium arsenide phosphide. A reduction in thermal decomposition reduces imperfections in the deposition body in the vicinity of the deposition surface, thereby providing a device with higher efficiency and longer lifetime.
NASA Astrophysics Data System (ADS)
Ishimoto, Jun; Oh, U.; Guanghan, Zhao; Koike, Tomoki; Ochiai, Naoya
2014-01-01
The ultra-high heat flux cooling characteristics and impingement behavior of cryogenic micro-solid nitrogen (SN2) particles in relation to a heated wafer substrate were investigated for application to next generation semiconductor wafer cleaning technology. The fundamental characteristics of cooling heat transfer and photoresist removal-cleaning performance using micro-solid nitrogen particulate spray impinging on a heated substrate were numerically investigated and experimentally measured by a new type of integrated computational-experimental technique. This study contributes not only advanced cryogenic cooling technology for high thermal emission devices, but also to the field of nano device engineering including the semiconductor wafer cleaning technology.
Visible-wavelength semiconductor lasers and arrays
Schneider, Jr., Richard P.; Crawford, Mary H.
1996-01-01
A visible semiconductor laser. The visible semiconductor laser includes an InAlGaP active region surrounded by one or more AlGaAs layers on each side, with carbon as the sole p-type dopant. Embodiments of the invention are provided as vertical-cavity surface-emitting lasers (VCSELs) and as edge-emitting lasers (EELs). One or more transition layers comprised of a substantially indium-free semiconductor alloy such as AlAsP, AlGaAsP, or the like may be provided between the InAlGaP active region and the AlGaAS DBR mirrors or confinement layers to improve carrier injection and device efficiency by reducing any band offsets. Visible VCSEL devices fabricated according to the invention with a one-wavelength-thick (1.lambda.) optical cavity operate continuous-wave (cw) with lasing output powers up to 8 mW, and a peak power conversion efficiency of up to 11%.
NASA Astrophysics Data System (ADS)
Yin, Wan-Jian; Tang, Houwen; Wei, Su-Huai; Al-Jassim, Mowafak M.; Turner, John; Yan, Yanfa
2010-07-01
Here, we propose general strategies for the rational design of semiconductors to simultaneously meet all of the requirements for a high-efficiency, solar-driven photoelectrochemical (PEC) water-splitting device. As a case study, we apply our strategies for engineering the popular semiconductor, anatase TiO2 . Previous attempts to modify known semiconductors such as TiO2 have often focused on a particular individual criterion such as band gap, neglecting the possible detrimental consequence to other important criteria. Density-functional theory calculations reveal that with appropriate donor-acceptor coincorporation alloys with anatase TiO2 hold great potential to satisfy all of the criteria for a viable PEC device. We predict that (Mo, 2N) and (W, 2N) are the best donor-acceptor combinations in the low-alloy concentration regime whereas (Nb, N) and (Ta, N) are the best choice of donor-acceptor pairs in the high-alloy concentration regime.
Thienoacene-based organic semiconductors.
Takimiya, Kazuo; Shinamura, Shoji; Osaka, Itaru; Miyazaki, Eigo
2011-10-11
Thienoacenes consist of fused thiophene rings in a ladder-type molecular structure and have been intensively studied as potential organic semiconductors for organic field-effect transistors (OFETs) in the last decade. They are reviewed here. Despite their simple and similar molecular structures, the hitherto reported properties of thienoacene-based OFETs are rather diverse. This Review focuses on four classes of thienoacenes, which are classified in terms of their chemical structures, and elucidates the molecular electronic structure of each class. The packing structures of thienoacenes and the thus-estimated solid-state electronic structures are correlated to their carrier transport properties in OFET devices. With this perspective of the molecular structures of thienoacenes and their carrier transport properties in OFET devices, the structure-property relationships in thienoacene-based organic semiconductors are discussed. The discussion provides insight into new molecular design strategies for the development of superior organic semiconductors. Copyright © 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Charge carrier mobility in thin films of organic semiconductors by the gated van der Pauw method
Rolin, Cedric; Kang, Enpu; Lee, Jeong-Hwan; Borghs, Gustaaf; Heremans, Paul; Genoe, Jan
2017-01-01
Thin film transistors based on high-mobility organic semiconductors are prone to contact problems that complicate the interpretation of their electrical characteristics and the extraction of important material parameters such as the charge carrier mobility. Here we report on the gated van der Pauw method for the simple and accurate determination of the electrical characteristics of thin semiconducting films, independently from contact effects. We test our method on thin films of seven high-mobility organic semiconductors of both polarities: device fabrication is fully compatible with common transistor process flows and device measurements deliver consistent and precise values for the charge carrier mobility and threshold voltage in the high-charge carrier density regime that is representative of transistor operation. The gated van der Pauw method is broadly applicable to thin films of semiconductors and enables a simple and clean parameter extraction independent from contact effects. PMID:28397852
Ballistic superconductivity in semiconductor nanowires.
Zhang, Hao; Gül, Önder; Conesa-Boj, Sonia; Nowak, Michał P; Wimmer, Michael; Zuo, Kun; Mourik, Vincent; de Vries, Folkert K; van Veen, Jasper; de Moor, Michiel W A; Bommer, Jouri D S; van Woerkom, David J; Car, Diana; Plissard, Sébastien R; Bakkers, Erik P A M; Quintero-Pérez, Marina; Cassidy, Maja C; Koelling, Sebastian; Goswami, Srijit; Watanabe, Kenji; Taniguchi, Takashi; Kouwenhoven, Leo P
2017-07-06
Semiconductor nanowires have opened new research avenues in quantum transport owing to their confined geometry and electrostatic tunability. They have offered an exceptional testbed for superconductivity, leading to the realization of hybrid systems combining the macroscopic quantum properties of superconductors with the possibility to control charges down to a single electron. These advances brought semiconductor nanowires to the forefront of efforts to realize topological superconductivity and Majorana modes. A prime challenge to benefit from the topological properties of Majoranas is to reduce the disorder in hybrid nanowire devices. Here we show ballistic superconductivity in InSb semiconductor nanowires. Our structural and chemical analyses demonstrate a high-quality interface between the nanowire and a NbTiN superconductor that enables ballistic transport. This is manifested by a quantized conductance for normal carriers, a strongly enhanced conductance for Andreev-reflecting carriers, and an induced hard gap with a significantly reduced density of states. These results pave the way for disorder-free Majorana devices.
Sub-Kelvin resistance thermometer
NASA Technical Reports Server (NTRS)
Castles, Stephen H. (Inventor)
1992-01-01
A device capable of accurate temperature measurement down to 0.01 K of a particular object is discussed. The device is comprised of the following: a heat sink wafer; a first conducting pad bonded near one end of the heat sink wafer; a second conducting pad bonded near the other end of the heat sink wafer; and an oblong doped semiconductor crystal such as germanium. The oblong doped semiconductor crystal has a third conducting pad bonded on its bottom surface with the oblong doped semiconductor crystal bonded to the heat sink wafer by having the fourth conducting pad bonded to the first conducting pad. A wire is bonded between the second and third conducting pads. Current and voltage wires bonded to the first and second conducting pads measure the change in resistance of the oblong doped semiconductor crystal; this indicates the temperature of the object whose temperature is to be measured.
Beating the thermodynamic limit with photo-activation of n-doping in organic semiconductors
NASA Astrophysics Data System (ADS)
Lin, Xin; Wegner, Berthold; Lee, Kyung Min; Fusella, Michael A.; Zhang, Fengyu; Moudgil, Karttikay; Rand, Barry P.; Barlow, Stephen; Marder, Seth R.; Koch, Norbert; Kahn, Antoine
2017-12-01
Chemical doping of organic semiconductors using molecular dopants plays a key role in the fabrication of efficient organic electronic devices. Although a variety of stable molecular p-dopants have been developed and successfully deployed in devices in the past decade, air-stable molecular n-dopants suitable for materials with low electron affinity are still elusive. Here we demonstrate that photo-activation of a cleavable air-stable dimeric dopant can result in kinetically stable and efficient n-doping of host semiconductors, whose reduction potentials are beyond the thermodynamic reach of the dimer’s effective reducing strength. Electron-transport layers doped in this manner are used to fabricate high-efficiency organic light-emitting diodes. Our strategy thus enables a new paradigm for using air-stable molecular dopants to improve conductivity in, and provide ohmic contacts to, organic semiconductors with very low electron affinity.
NASA Astrophysics Data System (ADS)
Moghadam, Reza; Ahmadi, Kamyar; Xiao, Z.-Y.; Hong, Xia; Ngai, Joseph
The epitaxial growth of crystalline oxides on semiconductors enables new functionalities to be introduced to semiconductor devices. In particular, dielectric and ferroelectric oxides grown epitaxially on semiconductors provide a pathway to realize ultra-low power logic and memory devices. Here we present electrical characterization of solid-solution SrZrxTi1-xO3 grown epitaxially on Ge through oxide molecular beam epitaxy. SrZrxTi1-xO3 is of particular interest since the band offset with respect to the semiconductor can be tuned through Zr content x. We will present current-voltage, capacitance-voltage and piezoforce microscopy characterization of SrZrxTi1-xO3 -Ge heterojunctions. In particular, we will discuss how the electrical characteristics of SrZrxTi1-xO3 -Ge heterojunctions evolve with respect to composition, annealing and film thickness.
Optical devices featuring textured semiconductor layers
Moustakas, Theodore D [Dover, MA; Cabalu, Jasper S [Cary, NC
2011-10-11
A semiconductor sensor, solar cell or emitter, or a precursor therefor, has a substrate and one or more textured semiconductor layers deposited onto the substrate. The textured layers enhance light extraction or absorption. Texturing in the region of multiple quantum wells greatly enhances internal quantum efficiency if the semiconductor is polar and the quantum wells are grown along the polar direction. Electroluminescence of LEDs of the invention is dichromatic, and results in variable color LEDs, including white LEDs, without the use of phosphor.
Optical devices featuring textured semiconductor layers
Moustakas, Theodore D [Dover, MA; Cabalu, Jasper S [Cary, NC
2012-08-07
A semiconductor sensor, solar cell or emitter, or a precursor therefor, has a substrate and one or more textured semiconductor layers deposited onto the substrate. The textured layers enhance light extraction or absorption. Texturing in the region of multiple quantum wells greatly enhances internal quantum efficiency if the semiconductor is polar and the quantum wells are grown along the polar direction. Electroluminescence of LEDs of the invention is dichromatic, and results in variable color LEDs, including white LEDs, without the use of phosphor.
NASA Astrophysics Data System (ADS)
Nisar, Ubaid Ahmed; Ashraf, Waqas; Qamar, Shamsul
2016-08-01
Numerical solutions of the hydrodynamical model of semiconductor devices are presented in one and two-space dimension. The model describes the charge transport in semiconductor devices. Mathematically, the models can be written as a convection-diffusion type system with a right hand side describing the relaxation effects and interaction with a self consistent electric field. The proposed numerical scheme is a splitting scheme based on the conservation element and solution element (CE/SE) method for hyperbolic step, and a semi-implicit scheme for the relaxation step. The numerical results of the suggested scheme are compared with the splitting scheme based on Nessyahu-Tadmor (NT) central scheme for convection step and the same semi-implicit scheme for the relaxation step. The effects of various parameters such as low field mobility, device length, lattice temperature and voltages for one-space dimensional hydrodynamic model are explored to further validate the generic applicability of the CE/SE method for the current model equations. A two dimensional simulation is also performed by CE/SE method for a MESFET device, producing results in good agreement with those obtained by NT-central scheme.
New Icosahedral Boron Carbide Semiconductors
NASA Astrophysics Data System (ADS)
Echeverria Mora, Elena Maria
Novel semiconductor boron carbide films and boron carbide films doped with aromatic compounds have been investigated and characterized. Most of these semiconductors were formed by plasma enhanced chemical vapor deposition. The aromatic compound additives used, in this thesis, were pyridine (Py), aniline, and diaminobenzene (DAB). As one of the key parameters for semiconducting device functionality is the metal contact and, therefore, the chemical interactions or band bending that may occur at the metal/semiconductor interface, X-ray photoemission spectroscopy has been used to investigate the interaction of gold (Au) with these novel boron carbide-based semiconductors. Both n- and p-type films have been tested and pure boron carbide devices are compared to those containing aromatic compounds. The results show that boron carbide seems to behave differently from other semiconductors, opening a way for new analysis and approaches in device's functionality. By studying the electrical and optical properties of these films, it has been found that samples containing the aromatic compound exhibit an improvement in the electron-hole separation and charge extraction, as well as a decrease in the band gap. The hole carrier lifetimes for each sample were extracted from the capacitance-voltage, C(V), and current-voltage, I(V), curves. Additionally, devices, with boron carbide with the addition of pyridine, exhibited better collection of neutron capture generated pulses at ZERO applied bias, compared to the pure boron carbide samples. This is consistent with the longer carrier lifetimes estimated for these films. The I-V curves, as a function of external magnetic field, of the pure boron carbide films and films containing DAB demonstrate that significant room temperature negative magneto-resistance (> 100% for pure samples, and > 50% for samples containing DAB) is possible in the resulting dielectric thin films. Inclusion of DAB is not essential for significant negative magneto-resistance, however, these results suggest practical device applications, especially as such effects are manifested in nanoscale films with facile fabrication. Overall, the greater negative magneto-resistance, when undoped with an aromatic, suggests a material with more defects and is consistent with a shorter carrier lifetime.
NASA Astrophysics Data System (ADS)
Demasi, Alexander
Organic molecules have been the subject of many scientific studies due to their potential for use in a new generation of optoelectronic and semiconducting devices, such as organic photovoltaics and organic light emitting diodes. These studies are motivated by the fact that organic semiconductor devices have several advantages over traditional inorganic semiconductor devices. Unlike inorganic semiconductors, where the electronic properties are a result of the deliberate introduction of dopants to the material, the properties of organic semiconductors are often intrinsic to the molecules themselves. As a result, organic semiconductor devices are frequently less susceptible to contamination by impurities than their inorganic counterparts, which results in the relatively lower cost of producing such devices. Accurate experimental determination of the bulk and surface electronic structure of organic semiconductors is a prerequisite in developing a comprehensive understanding of such materials. The organic materials studied in this thesis were N,N-Ethylene-bis(1,1,1trifluoropentane-2,4-dioneiminato)-copper(ii) (abbreviated Cu-TFAC), aluminum tris-8hydroxyquinoline (A1g3), lithium quinolate (Liq), tetracyanoquinodimethane (TCNQ), and tetrafluorotetracyanoquinodimethane (F4TCNQ). The electronic structures of these materials were measured with several synchrotron-based x-ray spectroscopies. X-ray photoemission spectroscopy was used to measure the occupied total density of states and the core-level states of the aforementioned materials. X-ray absorption spectroscopy (XAS) was used to probe the element-specific unoccupied partial density of states (PDOS); its angle-resolved variant was used to measure the orientation of the molecules in a film and, in some circumstances, to gauge the extent of an organic film's crystallinity. Most notably, x-ray emission spectroscopy (XES) measures the element- specific occupied PDOS and, when aided by XAS, resonant XES can additionally be used to probe the electronic structure of individual atomic sites within a molecule. Most of the results in this thesis are accompanied by the results of electronic structure calculations determined with density functional theory (DFT). DFT is a useful aid in interpreting the results of the x-ray spectroscopies employed. The experimental results, combined with DFT calculations, provide a wealth of information regarding the electronic structures of these organic materials. v
Method for depositing high-quality microcrystalline semiconductor materials
Guha, Subhendu [Bloomfield Hills, MI; Yang, Chi C [Troy, MI; Yan, Baojie [Rochester Hills, MI
2011-03-08
A process for the plasma deposition of a layer of a microcrystalline semiconductor material is carried out by energizing a process gas which includes a precursor of the semiconductor material and a diluent with electromagnetic energy so as to create a plasma therefrom. The plasma deposits a layer of the microcrystalline semiconductor material onto the substrate. The concentration of the diluent in the process gas is varied as a function of the thickness of the layer of microcrystalline semiconductor material which has been deposited. Also disclosed is the use of the process for the preparation of an N-I-P type photovoltaic device.
Semiconductor bridge (SCB) detonator
Bickes, R.W. Jr.; Grubelich, M.C.
1999-01-19
The present invention is a low-energy detonator for high-density secondary-explosive materials initiated by a semiconductor bridge (SCB) igniter that comprises a pair of electrically conductive lands connected by a semiconductor bridge. The semiconductor bridge is in operational or direct contact with the explosive material, whereby current flowing through the semiconductor bridge causes initiation of the explosive material. Header wires connected to the electrically-conductive lands and electrical feed-throughs of the header posts of explosive devices, are substantially coaxial to the direction of current flow through the SCB, i.e., substantially coaxial to the SCB length. 3 figs.
Mandal, Gopa; Bhattacharya, Sudeshna; Das, Subrata; Ganguly, Tapan
2012-01-01
Steady state and time resolved spectroscopic measurements were made at the ambient temperature on an organic dyad, 1-(4-Chloro-phenyl)-3-(4-methoxy-naphthalen-1-yl)-propenone (MNCA), where the donor 1-methoxynaphthalene (1 MNT) is connected with the acceptor p-chloroacetophenone (PCA) by an unsaturated olefinic bond, in presence of Ag@TiO2 nanoparticles. Time resolved fluorescence and absorption measurements reveal that the rate parameters associated with charge separation, k(CS), within the dyad increases whereas charge recombination rate k(CR) reduces significantly when the surrounding medium is changed from only chloroform to mixture of chloroform and Ag@TiO2 (noble metal-semiconductor) nanocomposites. The observed results indicate that the dyad being combined with core-shell nanocomposites may form organic-inorganic nanocomposite system useful for developing light energy conversion devices. Use of metal-semiconductor nanoparticles may provide thus new ways to modulate charge recombination processes in light energy conversion devices. From comparison with the results obtained in our earlier investigations with only TiO2 nanoparticles, it is inferred that much improved version of light energy conversion device, where charge-separated species could be protected for longer period of time of the order of millisecond, could be designed by using metal-semiconductor core-shell nanocomposites rather than semiconductor nanoparticles only.
Crystal Growth of ZnSe and Related Ternary Compound Semiconductors by Vapor Transport
NASA Technical Reports Server (NTRS)
Su, Ching-Hua; Burger, Arnold; Dudley, Michael; Matyi, Richard J.; Ramachandran, Narayanan; Sha, Yi-Gao; Volz, Martin; Shih, Hung-Dah
1998-01-01
Interest in optical devices which can operate in the visible spectrum has motivated research interest in the II-VI wide band gap semiconductor materials. The recent challenge for semiconductor opto-electronics is the development of a laser which can operate at short visible wavelengths, In the past several years, major advances in thin film technology such as molecular beam epitaxy and metal organic chemical vapor deposition have demonstrated the applicability of II-VI materials to important devices such as light-emitting diodes, lasers, and ultraviolet detectors.The demonstration of its optical bistable properties in bulk and thin film forms also make ZnSe a possible candidate material for the building blocks of a digital optical computer. Despite this, developments in the crystal growth of bulk II-VI semiconductor materials has not advanced far enough to provide the low price, high quality substrates needed for the thin film growth technology. The electrical and optical properties of semiconductor materials depend on the native point defects, (the deviation from stoichiometry), and the impurity or dopant distribution. To date, the bulk growth of ZnSe substrates has been plagued with problems related to defects such as non-uniform distributions of native defects, impurities and dopants, lattice strain, dislocations, grain boundaries, and second phase inclusions which greatly effect the device performance. In the bulk crystal growth of some technologically important semiconductors, such as ZnTe, CdS, ZnSe and ZnS, vapor growth techniques have significant advantages over melt growth techniques due to the high melting points of these materials.
2014-03-01
electromagnetic radiation across the spectrum from the ultraviolet ( UV ) to terahertz, heterogeneous integration of these materials with others having different...weak absorption that limit the QE of homogenous SiC-based photodetectors in the deep UV and near UV regions, respectively. Furthermore, we have...Polarization-Enhanced III-Nitride-SiC Avalanche Photodiodes Semiconductor-based ultraviolet ( UV ) avalanche photodetectors (APDs) have significant promise
Skotheim, Terje
1984-04-10
A photoelectric device is disclosed which comprises first and second layers of semiconductive material, each of a different bandgap, with a layer of dry solid polymer electrolyte disposed between the two semiconductor layers. A layer of a polymer blend of a highly conductive polymer and a solid polymer electrolyte is further interposed between the dry solid polymer electrolyte and the first semiconductor layer. A method of manufacturing such devices is also disclosed.
NASA Technical Reports Server (NTRS)
Collis, Ward J.; Abul-Fadl, Ali
1988-01-01
The purpose of this research is to design, install and operate a metal-organic chemical vapor deposition system which is to be used for the epitaxial growth of 3-5 semiconductor binary compounds, and ternary and quaternary alloys. The long-term goal is to utilize this vapor phase deposition in conjunction with existing current controlled liquid phase epitaxy facilities to perform hybrid growth sequences for fabricating integrated optoelectronic devices.
Improved Photon-Emission-Microscope System
NASA Technical Reports Server (NTRS)
Vu, Duc
2006-01-01
An improved photon-emission-microscope (PEM) instrumentation system has been developed for use in diagnosing failure conditions in semiconductor devices, including complex integrated circuits. This system is designed primarily to image areas that emit photons, at wavelengths from 400 to 1,100 nm, associated with device failures caused by leakage of electric current through SiO2 and other dielectric materials used in multilayer semiconductor structures. In addition, the system is sensitive enough to image areas that emit photons during normal operation.
1985-06-24
research , and perhaps the most far-reaching one * A GaP -on-Si transistor was achieved, vastly better than any previous or concurrent effort towards this...the numerous conceptual and technological developments that had accumulated during the research . e) Defects in GaP -on-Si(211) Layers. With the help...Growth and Device Potential of Polar/Nonpolar Semiconductor Heterostructures Final Report by A Herbert Kroemer June 1985 -..2-- U. S. Army Research
Optoelectronic Fibers via Selective Amplification of In-Fiber Capillary Instabilities.
Wei, Lei; Hou, Chong; Levy, Etgar; Lestoquoy, Guillaume; Gumennik, Alexander; Abouraddy, Ayman F; Joannopoulos, John D; Fink, Yoel
2017-01-01
Thermally drawn metal-insulator-semiconductor fibers provide a scalable path to functional fibers. Here, a ladder-like metal-semiconductor-metal photodetecting device is formed inside a single silica fiber in a controllable and scalable manner, achieving a high density of optoelectronic components over the entire fiber length and operating at a bandwidth of 470 kHz, orders of magnitude larger than any other drawn fiber device. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Scalable ferroelectric MOS capacitors comprised of single crystalline SrZrxTi1-xO3 on Ge.
NASA Astrophysics Data System (ADS)
Moghadam, Reza; Xiao, Z.-Y.; Ahmadi-Majlan, K.; Grimley, E.; Ong, P. V.; Lebeau, J. M.; Chambers, S. A.; Hong, X.; Sushko, P.; Ngai, J. H.
The epitaxial growth of multifunctional oxides on semiconductors has opened a pathway to introduce new functionalities to semiconductor device technologies. In particular, ferroelectric materials integrated on semiconductors could lead to field-effect devices that require very little power to operate, or that possess both logic and memory functionalities. The development of metal-oxide-semiconductor (MOS) capacitors in which the polarization of a ferroelectric gate is coupled to the surface potential of a semiconducting channel is essential in order to realize such field-effect devices. Here we demonstrate that scalable, ferroelectric MOS capacitors can be realized using single crystalline SrZrxTi1-xO3 (x = 0.7) that has been epitaxially grown on Ge. Single crystalline SrZrxTi1-xO3 exhibits characteristics that are ideal for a ferroelectric gate material, namely, a type-I band offset with respect to Ge, large coercive fields and polarization that can be enhanced with electric field. The latter characteristic stems from the relaxor nature of SrZrxTi1-xO3. These properties enable MOS capacitors with 5 nm thick SrZrxTi1-xO3 layers to exhibit a nearly 2 V wide hysteretic window in the capacitance-voltage characteristics. The realization of ferroelectric MOS capacitors with technologically relevant gate thicknesses opens the pathway to practical field effect devices. NSF DMR 1508530.
Collective Poisson process with periodic rates: applications in physics from micro-to nanodevices.
da Silva, Roberto; Lamb, Luis C; Wirth, Gilson Inacio
2011-01-28
Continuous reductions in the dimensions of semiconductor devices have led to an increasing number of noise sources, including random telegraph signals (RTS) due to the capture and emission of electrons by traps at random positions between oxide and semiconductor. The models traditionally used for microscopic devices become of limited validity in nano- and mesoscale systems since, in such systems, distributed quantities such as electron and trap densities, and concepts like electron mobility, become inadequate to model electrical behaviour. In addition, current experimental works have shown that RTS in semiconductor devices based on carbon nanotubes lead to giant current fluctuations. Therefore, the physics of this phenomenon and techniques to decrease the amplitudes of RTS need to be better understood. This problem can be described as a collective Poisson process under different, but time-independent, rates, τ(c) and τ(e), that control the capture and emission of electrons by traps distributed over the oxide. Thus, models that consider calculations performed under time-dependent periodic capture and emission rates should be of interest in order to model more efficient devices. We show a complete theoretical description of a model that is capable of showing a noise reduction of current fluctuations in the time domain, and a reduction of the power spectral density in the frequency domain, in semiconductor devices as predicted by previous experimental work. We do so through numerical integrations and a novel Monte Carlo Markov chain (MCMC) algorithm based on microscopic discrete values. The proposed model also handles the ballistic regime, relevant in nano- and mesoscale devices. Finally, we show that the ballistic regime leads to nonlinearity in the electrical behaviour.
Long-Term Stability of Mold Compounds and the Influence on Semiconductor Device Reliability
NASA Astrophysics Data System (ADS)
Mahler, Joachim; Mengel, Manfred
2012-07-01
Lifetimes of semiconductor devices are specified according to the products and their applications to ensure safe operation, for instance as part of an automobile product. The long-term stability of the device is strongly dependent on the chip encapsulation and its adhesion to the chip and substrate. Molded silicon strips that act as a model system for molded chips inside semiconductor devices were investigated. Four commercially available mold compounds were applied on silicon strips and stored over 5 years at room temperature (RT), and changes in the thermomechanical behavior were analyzed. After storage, all molded strips exhibited warpage reduction in the range of 11% to 14% at RT with respect to the initial warpage. The temperatures for the stress-free state also changed during storage and were located between 228°C and 235°C for each mold. Additional stress applied to the stored modules, by temperature cycling as well as high-temperature storage, increased the warpage of the molded silicon samples. For further interpretation of measured results, finite-element method calculations were performed.
Investigation of advanced fault insertion and simulator methods
NASA Technical Reports Server (NTRS)
Dunn, W. R.; Cottrell, D.
1986-01-01
The cooperative agreement partly supported research leading to the open-literature publication cited. Additional efforts under the agreement included research into fault modeling of semiconductor devices. Results of this research are presented in this report which is summarized in the following paragraphs. As a result of the cited research, it appears that semiconductor failure mechanism data is abundant but of little use in developing pin-level device models. Failure mode data on the other hand does exist but is too sparse to be of any statistical use in developing fault models. What is significant in the failure mode data is that, unlike classical logic, MSI and LSI devices do exhibit more than 'stuck-at' and open/short failure modes. Specifically they are dominated by parametric failures and functional anomalies that can include intermittent faults and multiple-pin failures. The report discusses methods of developing composite pin-level models based on extrapolation of semiconductor device failure mechanisms, failure modes, results of temperature stress testing and functional modeling. Limitations of this model particularly with regard to determination of fault detection coverage and latency time measurement are discussed. Indicated research directions are presented.
Spin voltage generation through optical excitation of complementary spin populations
NASA Astrophysics Data System (ADS)
Bottegoni, Federico; Celebrano, Michele; Bollani, Monica; Biagioni, Paolo; Isella, Giovanni; Ciccacci, Franco; Finazzi, Marco
2014-08-01
By exploiting the spin degree of freedom of carriers inside electronic devices, spintronics has a huge potential for quantum computation and dissipationless interconnects. Pure spin currents in spintronic devices should be driven by a spin voltage generator, able to drive the spin distribution out of equilibrium without inducing charge currents. Ideally, such a generator should operate at room temperature, be highly integrable with existing semiconductor technology, and not interfere with other spintronic building blocks that make use of ferromagnetic materials. Here we demonstrate a device that matches these requirements by realizing the spintronic equivalent of a photovoltaic generator. Whereas a photovoltaic generator spatially separates photoexcited electrons and holes, our device exploits circularly polarized light to produce two spatially well-defined electron populations with opposite in-plane spin projections. This is achieved by modulating the phase and amplitude of the light wavefronts entering a semiconductor (germanium) with a patterned metal overlayer (platinum). The resulting light diffraction pattern features a spatially modulated chirality inside the semiconductor, which locally excites spin-polarized electrons thanks to electric dipole selection rules.
Metallic Junction Thermoelectric Device Simulations
NASA Technical Reports Server (NTRS)
Duzik, Adam J.; Choi, Sang H.
2017-01-01
Thermoelectric junctions made of semiconductors have existed in radioisotope thermoelectric generators (RTG) for deep space missions, but are currently being adapted for terrestrial energy harvesting. Unfortunately, these devices are inefficient, operating at only 7% efficiency. This low efficiency has driven efforts to make high-figure-of-merit thermoelectric devices, which require a high electrical conductivity but a low thermal conductivity, a combination that is difficult to achieve. Lowered thermal conductivity has increased efficiency, but at the cost of power output. An alternative setup is to use metallic junctions rather than semiconductors as thermoelectric devices. Metals have orders of magnitude more electrons and electronic conductivities higher than semiconductors, but thermal conductivity is higher as well. To evaluate the viability of metallic junction thermoelectrics, a two dimensional heat transfer MATLAB simulation was constructed to calculate efficiency and power output. High Seebeck coefficient alloys, Chromel (90%Ni-10%Cr) and Constantan (55%Cu-45%Ni), produced efficiencies of around 20-30%. Parameters such as the number of layers of junctions, lateral junction density, and junction sizes for both series- and parallel-connected junctions were explored.
High mobility and high stability glassy metal-oxynitride materials and devices
NASA Astrophysics Data System (ADS)
Lee, Eunha; Kim, Taeho; Benayad, Anass; Hur, Jihyun; Park, Gyeong-Su; Jeon, Sanghun
2016-04-01
In thin film technology, future semiconductor and display products with high performance, high density, large area, and ultra high definition with three-dimensional functionalities require high performance thin film transistors (TFTs) with high stability. Zinc oxynitride, a composite of zinc oxide and zinc nitride, has been conceded as a strong substitute to conventional semiconductor film such as silicon and indium gallium zinc oxide due to high mobility value. However, zinc oxynitride has been suffered from poor reproducibility due to relatively low binding energy of nitrogen with zinc, resulting in the instability of composition and its device performance. Here we performed post argon plasma process on zinc oxynitride film, forming nano-crystalline structure in stable amorphous matrix which hampers the reaction of oxygen with zinc. Therefore, material properties and device performance of zinc oxynitride are greatly enhanced, exhibiting robust compositional stability even exposure to air, uniform phase, high electron mobility, negligible fast transient charging and low noise characteristics. Furthermore, We expect high mobility and high stability zinc oxynitride customized by plasma process to be applicable to a broad range of semiconductor and display devices.
Zolper, John C.; Sherwin, Marc E.; Baca, Albert G.
2000-01-01
A method for making compound semiconductor devices including the use of a p-type dopant is disclosed wherein the dopant is co-implanted with an n-type donor species at the time the n-channel is formed and a single anneal at moderate temperature is then performed. Also disclosed are devices manufactured using the method. In the preferred embodiment n-MESFETs and other similar field effect transistor devices are manufactured using C ions co-implanted with Si atoms in GaAs to form an n-channel. C exhibits a unique characteristic in the context of the invention in that it exhibits a low activation efficiency (typically, 50% or less) as a p-type dopant, and consequently, it acts to sharpen the Si n-channel by compensating Si donors in the region of the Si-channel tail, but does not contribute substantially to the acceptor concentration in the buried p region. As a result, the invention provides for improved field effect semiconductor and related devices with enhancement of both DC and high-frequency performance.
Environmentally benign semiconductor processing for dielectric etch
NASA Astrophysics Data System (ADS)
Liao, Marci Yi-Ting
Semiconductor processing requires intensive usage of chemicals, electricity, and water. Such intensive resource usage leaves a large impact on the environment. For instance, in Silicon Valley, the semiconductor industry is responsible for 80% of the hazardous waste sites contaminated enough to require government assistance. Research on environmentally benign semiconductor processing is needed to reduce the environmental impact of the semiconductor industry. The focus of this dissertation is on the environmental impact of one aspect of semiconductor processing: patterning of dielectric materials. Plasma etching of silicon dioxide emits perfluorocarbons (PFCs) gases, like C2F6 and CF4, into the atmosphere. These gases are super global warming/greenhouse gases because of their extremely long atmospheric lifetimes and excellent infrared absorption properties. We developed the first inductively coupled plasma (ICP) abatement device for destroying PFCs downstream of a plasma etcher. Destruction efficiencies of 99% and 94% can be obtained for the above mentioned PFCs, by using O 2 as an additive gas. Our results have lead to extensive modeling in academia as well as commercialization of the ICP abatement system. Dielectric patterning of hi-k materials for future device technology brings different environment challenges. The uncertainty of the hi-k material selection and the patterning method need to be addressed. We have evaluated the environmental impact of three different dielectric patterning methods (plasma etch, wet etch and chemical-mechanical polishing), as well as, the transistor device performances associated with the patterning methods. Plasma etching was found to be the most environmentally benign patterning method, which also gives the best device performance. However, the environmental concern for plasma etching is the possibility of cross-contamination from low volatility etch by-products. Therefore, mass transfer in a plasma etcher for a promising hi-k dielectric material, ZrO2, was studied. A novel cross-contamination sampling technique was developed, along with a mass transfer model.
Ray, Biswajit; Baradwaj, Aditya G.; Khan, Mohammad Ryyan; Boudouris, Bryan W.; Alam, Muhammad Ashraful
2015-01-01
The bulk heterojunction (BHJ) organic photovoltaic (OPV) architecture has dominated the literature due to its ability to be implemented in devices with relatively high efficiency values. However, a simpler device architecture based on a single organic semiconductor (SS-OPV) offers several advantages: it obviates the need to control the highly system-dependent nanoscale BHJ morphology, and therefore, would allow the use of broader range of organic semiconductors. Unfortunately, the photocurrent in standard SS-OPV devices is typically very low, which generally is attributed to inefficient charge separation of the photogenerated excitons. Here we show that the short-circuit current density from SS-OPV devices can be enhanced significantly (∼100-fold) through the use of inverted device configurations, relative to a standard OPV device architecture. This result suggests that charge generation may not be the performance bottleneck in OPV device operation. Instead, poor charge collection, caused by defect-induced electric field screening, is most likely the primary performance bottleneck in regular-geometry SS-OPV cells. We justify this hypothesis by: (i) detailed numerical simulations, (ii) electrical characterization experiments of functional SS-OPV devices using multiple polymers as active layer materials, and (iii) impedance spectroscopy measurements. Furthermore, we show that the collection-limited photocurrent theory consistently interprets typical characteristics of regular SS-OPV devices. These insights should encourage the design and OPV implementation of high-purity, high-mobility polymers, and other soft materials that have shown promise in organic field-effect transistor applications, but have not performed well in BHJ OPV devices, wherein they adopt less-than-ideal nanostructures when blended with electron-accepting materials. PMID:26290582
Ray, Biswajit; Baradwaj, Aditya G; Khan, Mohammad Ryyan; Boudouris, Bryan W; Alam, Muhammad Ashraful
2015-09-08
The bulk heterojunction (BHJ) organic photovoltaic (OPV) architecture has dominated the literature due to its ability to be implemented in devices with relatively high efficiency values. However, a simpler device architecture based on a single organic semiconductor (SS-OPV) offers several advantages: it obviates the need to control the highly system-dependent nanoscale BHJ morphology, and therefore, would allow the use of broader range of organic semiconductors. Unfortunately, the photocurrent in standard SS-OPV devices is typically very low, which generally is attributed to inefficient charge separation of the photogenerated excitons. Here we show that the short-circuit current density from SS-OPV devices can be enhanced significantly (∼100-fold) through the use of inverted device configurations, relative to a standard OPV device architecture. This result suggests that charge generation may not be the performance bottleneck in OPV device operation. Instead, poor charge collection, caused by defect-induced electric field screening, is most likely the primary performance bottleneck in regular-geometry SS-OPV cells. We justify this hypothesis by: (i) detailed numerical simulations, (ii) electrical characterization experiments of functional SS-OPV devices using multiple polymers as active layer materials, and (iii) impedance spectroscopy measurements. Furthermore, we show that the collection-limited photocurrent theory consistently interprets typical characteristics of regular SS-OPV devices. These insights should encourage the design and OPV implementation of high-purity, high-mobility polymers, and other soft materials that have shown promise in organic field-effect transistor applications, but have not performed well in BHJ OPV devices, wherein they adopt less-than-ideal nanostructures when blended with electron-accepting materials.
NASA Astrophysics Data System (ADS)
Luo, Jun-Wei; Li, Shu-Shen; Zunger, Alex
2017-09-01
The electric field manipulation of the Rashba spin-orbit coupling effects provides a route to electrically control spins, constituting the foundation of the field of semiconductor spintronics. In general, the strength of the Rashba effects depends linearly on the applied electric field and is significant only for heavy-atom materials with large intrinsic spin-orbit interaction under high electric fields. Here, we illustrate in 1D semiconductor nanowires an anomalous field dependence of the hole (but not electron) Rashba effect (HRE). (i) At low fields, the strength of the HRE exhibits a steep increase with the field so that even low fields can be used for device switching. (ii) At higher fields, the HRE undergoes a rapid transition to saturation with a giant strength even for light-atom materials such as Si (exceeding 100 meV Å). (iii) The nanowire-size dependence of the saturation HRE is rather weak for light-atom Si, so size fluctuations would have a limited effect; this is a key requirement for scalability of Rashba-field-based spintronic devices. These three features offer Si nanowires as a promising platform for the realization of scalable complementary metal-oxide-semiconductor compatible spintronic devices.
Multi-layer MOS capacitor based polarization insensitive electro-optic intensity modulator.
Qiu, Xiaoming; Ruan, Xiaoke; Li, Yanping; Zhang, Fan
2018-05-28
In this study, a multi-layer metal-oxide-semiconductor capacitor (MLMOSC) polarization insensitive modulator is proposed. The design is validated by numerical simulation with commercial software LUMERICAL SOLUTION. Based on the epsilon-near-zero (ENZ) effect of indium tin oxide (ITO), the device manages to uniformly modulate both the transverse electric (TE) and the transverse magnetic (TM) modes. With a 20μm-long double-layer metal-oxide-semiconductor capacitor (DLMOSC) polarization insensitive modulator, in which two metal-oxide-semiconductor (MOS) structures are formed by the n-doped Si/HfO 2 /ITO/HfO 2 / n-doped Si stack, the extinction ratios (ERs) of both the TE and the TM modes can be over 20dB. The polarization dependent losses of the device can be as low as 0.05dB for the "OFF" state and 0.004dB for the "ON" state. Within 1dB polarization dependent loss, the device can operate with over 20dB ERs at the S, C, and L bands. The polarization insensitive modulator offers various merits including ultra-compact size, broadband spectrum, and complementary metal oxide semiconductor (CMOS) compatibility.
Mei, Yaochuan; Diemer, Peter J.; Niazi, Muhammad R.; Hallani, Rawad K.; Jarolimek, Karol; Day, Cynthia S.; Risko, Chad; Anthony, John E.; Amassian, Aram
2017-01-01
The temperature dependence of the charge-carrier mobility provides essential insight into the charge transport mechanisms in organic semiconductors. Such knowledge imparts critical understanding of the electrical properties of these materials, leading to better design of high-performance materials for consumer applications. Here, we present experimental results that suggest that the inhomogeneous strain induced in organic semiconductor layers by the mismatch between the coefficients of thermal expansion (CTE) of the consecutive device layers of field-effect transistors generates trapping states that localize charge carriers. We observe a universal scaling between the activation energy of the transistors and the interfacial thermal expansion mismatch, in which band-like transport is observed for similar CTEs, and activated transport otherwise. Our results provide evidence that a high-quality semiconductor layer is necessary, but not sufficient, to obtain efficient charge-carrier transport in devices, and underline the importance of holistic device design to achieve the intrinsic performance limits of a given organic semiconductor. We go on to show that insertion of an ultrathin CTE buffer layer mitigates this problem and can help achieve band-like transport on a wide range of substrate platforms. PMID:28739934
Abatement of waste gases and water during the processes of semiconductor fabrication.
Wen, Rui-mei; Liang, Jun-wu
2002-10-01
The purpose of this article is to examine the methods and equipment for abating waste gases and water produced during the manufacture of semiconductor materials and devices. Three separating methods and equipment are used to control three different groups of electronic wastes. The first group includes arsine and phosphine emitted during the processes of semiconductor materials manufacture. The abatement procedure for this group of pollutants consists of adding iodates, cupric and manganese salts to a multiple shower tower (MST) structure. The second group includes pollutants containing arsenic, phosphorus, HF, HCl, NO2, and SO3 emitted during the manufacture of semiconductor materials and devices. The abatement procedure involves mixing oxidants and bases in an oval column with a separator in the middle. The third group consists of the ions of As, P and heavy metals contained in the waste water. The abatement procedure includes adding CaCO3 and ferric salts in a flocculation-sedimentation compact device equipment. Test results showed that all waste gases and water after the abatement procedures presented in this article passed the discharge standards set by the State Environmental Protection Administration of China.
NASA Astrophysics Data System (ADS)
Turkulets, Yury; Shalish, Ilan
2018-01-01
Modern bandgap engineered electronic devices are typically made of multi-semiconductor multi-layer heterostructures that pose a major challenge to silicon-era characterization methods. As a result, contemporary bandgap engineering relies mostly on simulated band structures that are hardly ever verified experimentally. Here, we present a method that experimentally evaluates bandgap, band offsets, and electric fields, in complex multi-semiconductor layered structures, and it does so simultaneously in all the layers. The method uses a modest optical photocurrent spectroscopy setup at ambient conditions. The results are analyzed using a simple model for electro-absorption. As an example, we apply the method to a typical GaN high electron mobility transistor structure. Measurements under various external electric fields allow us to experimentally construct band diagrams, not only at equilibrium but also under any other working conditions of the device. The electric fields are then used to obtain the charge carrier density and mobility in the quantum well as a function of the gate voltage over the entire range of operating conditions of the device. The principles exemplified here may serve as guidelines for the development of methods for simultaneous characterization of all the layers in complex, multi-semiconductor structures.
Huang, Yuan; Sutter, Eli; Wu, Liangmei; Xu, Hong; Bao, Lihong; Gao, Hong-Jun; Zhou, Xingjiang; Sutter, Peter
2018-06-21
Layered semiconductors show promise as channel materials for field-effect transistors (FETs). Usually, such devices incorporate solid back or top gate dielectrics. Here, we explore de-ionized (DI) water as a solution top gate for field-effect switching of layered semiconductors including SnS2, MoS2, and black phosphorus. The DI water gate is easily fabricated, can sustain rapid bias changes, and its efficient coupling to layered materials provides high on-off current ratios, near-ideal sub-threshold swing, and enhanced short-channel behavior even for FETs with thick, bulk-like channels where such control is difficult to realize with conventional back-gating. Screening by the high-k solution gate eliminates hysteresis due to surface and interface trap states and substantially enhances the field-effect mobility. The onset of water electrolysis sets the ultimate limit to DI water gating at large negative gate bias. Measurements in this regime show promise for aqueous sensing, demonstrated here by the amperometric detection of glucose in aqueous solution. DI water gating of layered semiconductors can be harnessed in research on novel materials and devices, and it may with further development find broad applications in microelectronics and sensing.
Mei, Yaochuan; Diemer, Peter J; Niazi, Muhammad R; Hallani, Rawad K; Jarolimek, Karol; Day, Cynthia S; Risko, Chad; Anthony, John E; Amassian, Aram; Jurchescu, Oana D
2017-08-15
The temperature dependence of the charge-carrier mobility provides essential insight into the charge transport mechanisms in organic semiconductors. Such knowledge imparts critical understanding of the electrical properties of these materials, leading to better design of high-performance materials for consumer applications. Here, we present experimental results that suggest that the inhomogeneous strain induced in organic semiconductor layers by the mismatch between the coefficients of thermal expansion (CTE) of the consecutive device layers of field-effect transistors generates trapping states that localize charge carriers. We observe a universal scaling between the activation energy of the transistors and the interfacial thermal expansion mismatch, in which band-like transport is observed for similar CTEs, and activated transport otherwise. Our results provide evidence that a high-quality semiconductor layer is necessary, but not sufficient, to obtain efficient charge-carrier transport in devices, and underline the importance of holistic device design to achieve the intrinsic performance limits of a given organic semiconductor. We go on to show that insertion of an ultrathin CTE buffer layer mitigates this problem and can help achieve band-like transport on a wide range of substrate platforms.
3D Band Diagram and Photoexcitation of 2D-3D Semiconductor Heterojunctions.
Li, Bo; Shi, Gang; Lei, Sidong; He, Yongmin; Gao, Weilu; Gong, Yongji; Ye, Gonglan; Zhou, Wu; Keyshar, Kunttal; Hao, Ji; Dong, Pei; Ge, Liehui; Lou, Jun; Kono, Junichiro; Vajtai, Robert; Ajayan, Pulickel M
2015-09-09
The emergence of a rich variety of two-dimensional (2D) layered semiconductor materials has enabled the creation of atomically thin heterojunction devices. Junctions between atomically thin 2D layers and 3D bulk semiconductors can lead to junctions that are fundamentally electronically different from the covalently bonded conventional semiconductor junctions. Here we propose a new 3D band diagram for the heterojunction formed between n-type monolayer MoS2 and p-type Si, in which the conduction and valence band-edges of the MoS2 monolayer are drawn for both stacked and in-plane directions. This new band diagram helps visualize the flow of charge carriers inside the device in a 3D manner. Our detailed wavelength-dependent photocurrent measurements fully support the diagrams and unambiguously show that the band alignment is type I for this 2D-3D heterojunction. Photogenerated electron-hole pairs in the atomically thin monolayer are separated and driven by an external bias and control the "on/off" states of the junction photodetector device. Two photoresponse regimes with fast and slow relaxation are also revealed in time-resolved photocurrent measurements, suggesting the important role played by charge trap states.
Method for manufacturing electrical contacts for a thin-film semiconductor device
Carlson, David E.; Dickson, Charles R.; D'Aiello, Robert V.
1988-11-08
A method of fabricating spaced-apart back contacts on a thin film of semiconductor material by forming strips of buffer material on top of the semiconductor material in locations corresponding to the desired dividing lines between back contacts, forming a film of metal substantially covering the semiconductor material and buffer strips, and scribing portions of the metal film overlying the buffer strips with a laser without contacting the underlying semiconductor material to separate the metal layer into a plurality of back contacts. The buffer material serves to protect the underlying semiconductor material from being damaged during the laser scribing. Back contacts and multi-cell photovoltaic modules incorporating such back contacts also are disclosed.
Electrical contacts for a thin-film semiconductor device
Carlson, David E.; Dickson, Charles R.; D'Aiello, Robert V.
1989-08-08
A method of fabricating spaced-apart back contacts on a thin film of semiconductor material by forming strips of buffer material on top of the semiconductor material in locations corresponding to the desired dividing lines between back contacts, forming a film of metal substantially covering the semiconductor material and buffer strips, and scribing portions of the metal film overlying the buffer strips with a laser without contacting the underlying semiconductor material to separate the metal layer into a plurality of back contacts. The buffer material serves to protect the underlying semiconductor material from being damaged during the laser scribing. Back contacts and multi-cell photovoltaic modules incorporating such back contacts also are disclosed.
Materials growth and characterization of thermoelectric and resistive switching devices
NASA Astrophysics Data System (ADS)
Norris, Kate J.
In the 74 years since diode rectifier based radar technology helped the allied forces win WWII, semiconductors have transformed the world we live in. From our smart phones to semiconductor-based energy conversion, semiconductors touch every aspect of our lives. With this thesis I hope to expand human knowledge of semiconductor thermoelectric devices and resistive switching devices through experimentation with materials growth and subsequent materials characterization. Metal organic chemical vapor deposition (MOCVD) was the primary method of materials growth utilized in these studies. Additionally, plasma enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD),ion beam sputter deposition, reactive sputter deposition and electron-beam (e-beam) evaporation were also used in this research for device fabrication. Scanning electron microscopy (SEM), Transmission electron microscopy (TEM), and Electron energy loss spectroscopy (EELS) were the primary characterization methods utilized for this research. Additional device and materials characterization techniques employed include: current-voltage measurements, thermoelectric measurements, x-ray diffraction (XRD), reflection absorption infra-red spectroscopy (RAIRS), atomic force microscopy (AFM), photoluminescence (PL), and raman spectroscopy. As society has become more aware of its impact on the planet and its limited resources, there has been a push toward developing technologies to sustainably produce the energy we need. Thermoelectric devices convert heat directly into electricity. Thermoelectric devices have the potential to save huge amounts of energy that we currently waste as heat, if we can make them cost-effective. Semiconducting thin films and nanowires appear to be promising avenues of research to attain this goal. Specifically, in this work we will explore the use of ErSb thin films as well as Si and InP nanowire networks for thermoelectric applications. First we will discuss the growth of erbium monoantimonide (ErSb) thin films with thermal conductivities close to or slightly smaller than the alloy limit of the two ternary alloy hosts. Second we consider an ex-situ monitoring technique based on glancing-angle infrared-absorption used to determine small amounts of erbium antimonide (ErSb) deposited on an indium antimonide (InSb) layer, a concept for thermoelectric devices to scatter phonons. Thirdly we begin our discussion of nanowires with the selective area growth (SAG) of single crystalline indium phosphide (InP) nanopillars on an array of template segments composed of a stack of gold and amorphous silicon. Our approach enables flexible and scalable nanofabrication using industrially proven tools and a wide range of semiconductors on various non-semiconductor substrates. Then we examine the use of graphene to promote the growth of nanowire networks on flexible copper foil leading to the testing of nanowire network devices for thermoelectric applications and the concept of multi-stage devices. We present the ability to tailor current-voltage characteristics to fit a desired application of thermoelectric devices by using nanowire networks as building blocks that can be stacked vertically or laterally. Furthermore, in the study of our flexible nanowire network multi-stage devices, we discovered the presence of nonlinear current-voltage characteristics and discuss how this feature could be utilized to increase efficiency for thermoelectric devices. This work indicates that with sufficient volume and optimized doping, flexible nanowire networks could be a low cost semiconductor solution to our wasted heat challenge. Resistive switching devices are two terminal electrical resistance switches that retain a state of internal resistance based on the history of applied voltage and current. The occurrence of reversible resistance switching has been widely studied in a variety of material systems for applications including nonvolatile memory, logic circuits, and neuromorphic computing. To this end we next we studied devices in each resistance state of a TaOx switch, which has previously shown high endurance and desirable switching behavior, to better understand the system in nanoscale devices. Finally, we will discuss a self-aligned NbO2 nano-cap demonstrated atop a TaO2.2 switching layer. The goal of this device is to create a nanoscale RRAM and selector device in a single stack. These results indicate that ternary resistive switching devices may be a beneficial method of combining behaviors of different material systems and that with proper engineering a self-aligned selector is possible.
Measuring the local mobility of graphene on semiconductors
NASA Astrophysics Data System (ADS)
Zhong, Haijian; Liu, Zhenghui; Wang, Jianfeng; Pan, Anlian; Xu, Gengzhao; Xu, Ke
2018-04-01
Mobility is an important parameter to gauge the performance of graphene devices, which is usually measured by FET or Hall methods relying on the use of insulating substrates. However, these methods are not applicable for the case of graphene on semiconductors, because some current will inevitably cross their junctions and flow through the semiconductors except directly traversing the graphene surface. Here we demonstrate a method for measuring the local mobility of graphene on gallium nitrides combining Kelvin probe force microscopy (KPFM) and conductive atomic force microscopy (C-AFM). The carrier density related to Fermi level shifts in graphene can be acquired from KPFM. The local mobility of graphene is calculated from the carrier mean free path available from the effective contact area, which can be fitted from the local I-V curves in graphene/GaN junctions by C-AFM. Our method can be used to investigate an arbitrary region in graphene and also be applied to other semiconductor substrates and do not introduce damages. These results will benefit recent topical application researches for graphene integration in various semiconductor devices.
Computational Modeling of Ultrafast Pulse Propagation in Nonlinear Optical Materials
NASA Technical Reports Server (NTRS)
Goorjian, Peter M.; Agrawal, Govind P.; Kwak, Dochan (Technical Monitor)
1996-01-01
There is an emerging technology of photonic (or optoelectronic) integrated circuits (PICs or OEICs). In PICs, optical and electronic components are grown together on the same chip. rib build such devices and subsystems, one needs to model the entire chip. Accurate computer modeling of electromagnetic wave propagation in semiconductors is necessary for the successful development of PICs. More specifically, these computer codes would enable the modeling of such devices, including their subsystems, such as semiconductor lasers and semiconductor amplifiers in which there is femtosecond pulse propagation. Here, the computer simulations are made by solving the full vector, nonlinear, Maxwell's equations, coupled with the semiconductor Bloch equations, without any approximations. The carrier is retained in the description of the optical pulse, (i.e. the envelope approximation is not made in the Maxwell's equations), and the rotating wave approximation is not made in the Bloch equations. These coupled equations are solved to simulate the propagation of femtosecond optical pulses in semiconductor materials. The simulations describe the dynamics of the optical pulses, as well as the interband and intraband.
Chemical Defects and Electronics States in Organic Semiconductors
2008-05-31
from interacting with organic semiconductor devices. An expt./theoretical study of 0 2 in pentacene indicated that a positive gate voltage can cause...dissociative interaction of02 with pentacene . 1S. SUBJECT TERMS organic semiconductors, PBTIT, P3HT, PQT, polythiophenes, pentacene , defects...investigations of the interaction of02 molecules with pentacene were performed. Based on calculations of formation energies of charged defects a model was
High Current, Multi-Filament Photoconductive Semiconductor Switching
2011-06-01
linear PCSS triggered with a 100 fs laser pulse . Figure 1. A generic photoconductive semiconductor switch rapidly discharges a charged capacitor...switching is the most critical challenge remaining for photoconductive semiconductor switch (PCSS) applications in Pulsed Power. Many authors have...isolation and control, pulsed or DC charging, and long device lifetime, provided the current per filament is limited to 20-30A for short pulse (10
David Adler Lectureship Award Talk: III-V Semiconductor Nanowires on Silicon for Future Devices
NASA Astrophysics Data System (ADS)
Riel, Heike
Bottom-up grown nanowires are very attractive materials for direct integration of III-V semiconductors on silicon thus opening up new possibilities for the design and fabrication of nanoscale devices for electronic, optoelectronic as well as quantum information applications. Template-Assisted Selective Epitaxy (TASE) allows the well-defined and monolithic integration of complex III-V nanostructures and devices on silicon. Achieving atomically abrupt heterointerfaces, high crystal quality and control of dimension down to 1D nanowires enabled the demonstration of FETs and tunnel devices based on In(Ga)As and GaSb. Furthermore, the strong influence of strain on nanowires as well as results on quantum transport studies of InAs nanowires with well-defined geometry will be presented.
Body of Knowledge (BOK) for Copper Wire Bonds
NASA Technical Reports Server (NTRS)
Rutkowski, E.; Sampson, M. J.
2015-01-01
Copper wire bonds have replaced gold wire bonds in the majority of commercial semiconductor devices for the latest technology nodes. Although economics has been the driving mechanism to lower semiconductor packaging costs for a savings of about 20% by replacing gold wire bonds with copper, copper also has materials property advantages over gold. When compared to gold, copper has approximately: 25% lower electrical resistivity, 30% higher thermal conductivity, 75% higher tensile strength and 45% higher modulus of elasticity. Copper wire bonds on aluminum bond pads are also more mechanically robust over time and elevated temperature due to the slower intermetallic formation rate - approximately 1/100th that of the gold to aluminum intermetallic formation rate. However, there are significant tradeoffs with copper wire bonding - copper has twice the hardness of gold which results in a narrower bonding manufacturing process window and requires that the semiconductor companies design more mechanically rigid bonding pads to prevent cratering to both the bond pad and underlying chip structure. Furthermore, copper is significantly more prone to corrosion issues. The semiconductor packaging industry has responded to this corrosion concern by creating a palladium coated copper bonding wire, which is more corrosion resistant than pure copper bonding wire. Also, the selection of the device molding compound is critical because use of environmentally friendly green compounds can result in internal CTE (Coefficient of Thermal Expansion) mismatches with the copper wire bonds that can eventually lead to device failures during thermal cycling. Despite the difficult problems associated with the changeover to copper bonding wire, there are billions of copper wire bonded devices delivered annually to customers. It is noteworthy that Texas Instruments announced in October of 2014 that they are shipping microcircuits containing copper wire bonds for safety critical automotive applications. An evaluation of copper wire bond technology for applicability to spaceflight hardware may be warranted along with concurrently compiling a comprehensive understanding of the failure mechanisms involved with copper wire bonded semiconductor devices.
NASA Technical Reports Server (NTRS)
Lee, F. C.; Chen, D. Y.; Jovanovic, M.; Hopkins, D. C.
1985-01-01
The results of evaluation of power semiconductor devices for electric hybrid vehicle ac drive applications are summarized. Three types of power devices are evaluated in the effort: high power bipolar or Darlington transistors, power MOSFETs, and asymmetric silicon control rectifiers (ASCR). The Bipolar transistors, including discrete device and Darlington devices, range from 100 A to 400 A and from 400 V to 900 V. These devices are currently used as key switching elements inverters for ac motor drive applications. Power MOSFETs, on the other hand, are much smaller in current rating. For the 400 V device, the current rating is limited to 25 A. For the main drive of an electric vehicle, device paralleling is normally needed to achieve practical power level. For other electric vehicle (EV) related applications such as battery charger circuit, however, MOSFET is advantageous to other devices because of drive circuit simplicity and high frequency capability. Asymmetrical SCR is basically a SCR device and needs commutation circuit for turn off. However, the device poses several advantages, i.e., low conduction drop and low cost.
Irokawa, Yoshihiro
2011-01-01
In this paper, I review my recent results in investigating hydrogen sensors using nitride-based semiconductor diodes, focusing on the interaction mechanism of hydrogen with the devices. Firstly, effects of interfacial modification in the devices on hydrogen detection sensitivity are discussed. Surface defects of GaN under Schottky electrodes do not play a critical role in hydrogen sensing characteristics. However, dielectric layers inserted in metal/semiconductor interfaces are found to cause dramatic changes in hydrogen sensing performance, implying that chemical selectivity to hydrogen could be realized. The capacitance-voltage (C–V) characteristics reveal that the work function change in the Schottky metal is not responsible mechanism for hydrogen sensitivity. The interface between the metal and the semiconductor plays a critical role in the interaction of hydrogen with semiconductor devises. Secondly, low-frequency C–V characterization is employed to investigate the interaction mechanism of hydrogen with diodes. As a result, it is suggested that the formation of a metal/semiconductor interfacial polarization could be attributed to hydrogen-related dipoles. In addition, using low-frequency C–V characterization leads to clear detection of 100 ppm hydrogen even at room temperature where it is hard to detect hydrogen by using conventional current-voltage (I–V) characterization, suggesting that low-frequency C–V method would be effective in detecting very low hydrogen concentrations. PMID:22346597
Photon extraction from nitride ultraviolet light-emitting devices
Schowalter, Leo J; Chen, Jianfeng; Grandusky, James R
2015-02-24
In various embodiments, a rigid lens is attached to a light-emitting semiconductor die via a layer of encapsulant having a thickness insufficient to prevent propagation of thermal expansion mismatch-induced strain between the rigid lens and the semiconductor die.
Procedure for pressure contact on high-power semiconductor devices free of thermal fatigue
NASA Technical Reports Server (NTRS)
Knobloch, J.
1979-01-01
To eliminate thermal fatigue, a procedure for manufacturing semiconductor power devices with pure pressure contact without solid binding was developed. Pressure contact without the use of a solid binding to avoid a limitation of the maximum surface in the contact was examined. A silicon wafer covered with a relatively thick metal layer is imbedded with the aid of a soft silver foil between two identically sized hard contact discs (molybdenum or tungsten) which are rotationally symmetrical. The advantages of this concept are shown for large diameters. The pressure contact was tested successfully in many devices in a large variety of applications.
Reproducible Growth of High-Quality Cubic-SiC Layers
NASA Technical Reports Server (NTRS)
Neudeck, Philip G.; Powell, J. Anthony
2004-01-01
Semiconductor electronic devices and circuits based on silicon carbide (SiC) are being developed for use in high-temperature, high-power, and/or high-radiation conditions under which devices made from conventional semiconductors cannot adequately perform. The ability of SiC-based devices to function under such extreme conditions is expected to enable significant improvements in a variety of applications and systems. These include greatly improved high-voltage switching for saving energy in public electric power distribution and electric motor drives; more powerful microwave electronic circuits for radar and communications; and sensors and controls for cleaner-burning, more fuel-efficient jet aircraft and automobile engines.
The Fundamentals of Using the Digital Micromirror Device (DMD(TM)) for Projection Display
NASA Technical Reports Server (NTRS)
Yoder, Lars A.
1995-01-01
Developed by Texas Instruments (TI) the digital micromirror device (DMD(tm)) is a quickly emerging and highly useful micro-electro-mechanical structures (MEMS) device. Using standard semiconductor fabrication technology, the DMD's simplicity in concept and design will provide advantageous solutions for many different applications. At the rudimentary level, the DMD is a precision, semiconductor light switch. In the initial commercial development of DMD technology, TI has concentrated on projection display and hardcopy. This paper will focus on how the DMD is used for projection display. Other application areas are being explored and evaluated to find appropriate and beneficial uses for the DMD.
Better Ohmic Contacts For InP Semiconductor Devices
NASA Technical Reports Server (NTRS)
Weizer, Victor G.; Fatemi, Navid S.
1995-01-01
Four design modifications enable fabrication of improved ohmic contacts on InP-based semiconductor devices. First modification consists of insertion of layer of gold phosphide between n-doped InP and metal or other overlayer of contact material. Second, includes first modification plus use of particular metal overlayer to achieve very low contact resistivities. Third, also involves deposition of Au(2)P(3) interlayer; in addition, refractory metal (W or Ta) deposited to form contact overlayer. In fourth, contact layer of Auln alloy deposited directly on InP. Improved contacts exhibit low electrical resistances and fabricated without exposing devices to destructive predeposition or postdeposition treatments.
SLS complementary logic devices with increase carrier mobility
Chaffin, R.J.; Osbourn, G.C.; Zipperian, T.E.
1991-07-09
In an electronic device comprising a semiconductor material and having at least one performance characteristic which is limited by the mobility of holes in the semiconductor material, said mobility being limited because of a valence band degeneracy among high-mobility and low-mobility energy levels accessible to said holes at the energy-momentum space maximum, an improvement is provided wherein the semiconductor material is a strained layer superlattice (SLS) whose layer compositions and layer thicknesses are selected so that the strain on the layers predominantly containing said at least one carrier type splits said degeneracy and modifies said energy levels around said energy-momentum space maximum in a manner whereby said limitation on the mobility of said holes is alleviated. 5 figures.
SLS complementary logic devices with increase carrier mobility
Chaffin, Roger J.; Osbourn, Gordon C.; Zipperian, Thomas E.
1991-01-01
In an electronic device comprising a semiconductor material and having at least one performance characteristic which is limited by the mobility of holes in the semiconductor material, said mobility being limited because of a valence band degeneracy among high-mobility and low-mobility energy levels accessible to said holes at the energy-momentum space maximum, an improvement is provided wherein the semiconductor material is a strained layer superlattice (SLS) whose layer compositions and layer thicknesses are selected so that the strain on the layers predominantly containing said at least one carrier type splits said degeneracy and modifies said energy levels around said energy-momentum space maximum in a manner whereby said limitation on the mobility of said holes is alleviated.
3D analysis of semiconductor devices: A combination of 3D imaging and 3D elemental analysis
NASA Astrophysics Data System (ADS)
Fu, Bianzhu; Gribelyuk, Michael A.
2018-04-01
3D analysis of semiconductor devices using a combination of scanning transmission electron microscopy (STEM) Z-contrast tomography and energy dispersive spectroscopy (EDS) elemental tomography is presented. 3D STEM Z-contrast tomography is useful in revealing the depth information of the sample. However, it suffers from contrast problems between materials with similar atomic numbers. Examples of EDS elemental tomography are presented using an automated EDS tomography system with batch data processing, which greatly reduces the data collection and processing time. 3D EDS elemental tomography reveals more in-depth information about the defect origin in semiconductor failure analysis. The influence of detector shadowing and X-rays absorption on the EDS tomography's result is also discussed.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Camarda, G. S.; Bolotnikov, A. E.; Cui, Y.
The goal of this project is to obtain and characterize scintillators, emerging- and commercial-compoundsemiconductor radiation- detection materials and devices provided by vendors and research organizations. The focus of our proposed research is to clarify the role of the deleterious defects and impurities responsible for the detectors' non-uniformity in scintillating crystals, commercial semiconductor radiation-detector materials, and in emerging R&D ones. Some benefits of this project addresses the need for fabricating high-performance scintillators and compound-semiconductor radiation-detectors with the proven potential for large-scale manufacturing. The findings help researchers to resolve the problems of non-uniformities in scintillating crystals, commercial semiconductor radiation-detector materials, and inmore » emerging R&D ones.« less
Methods of measurement for semiconductor materials, process control, and devices
NASA Technical Reports Server (NTRS)
Bullis, W. M. (Editor)
1972-01-01
Activities directed toward the development of methods of measurement for semiconductor materials, process control, and devices are described. Topics investigated include: measurements of transistor delay time; application of the infrared response technique to the study of radiation-damaged, lithium-drifted silicon detectors; and identification of a condition that minimizes wire flexure and reduces the failure rate of wire bonds in transistors and integrated circuits under slow thermal cycling conditions. Supplementary data concerning staff, standards committee activities, technical services, and publications are included as appendixes.
Review of betavoltaic energy conversion
NASA Astrophysics Data System (ADS)
Olsen, Larry C.
1993-05-01
Betavoltaic energy conversion refers to the generation of power by coupling a beta source to a semiconductor junction device. The theory of betavoltaic energy conversion and some past studies of the subject are briefly reviewed. Calculations of limiting efficiencies for semiconductor cells versus bandgap are presented along with specific studies for Pm-147 and Ni-63 fueled devices. The approach used for fabricating Pm-147 fueled batteries by the author in the early 1970's is reviewed. Finally, the potential performance of advanced betavoltaic power sources is considered.
Review of betavoltaic energy conversion
NASA Technical Reports Server (NTRS)
Olsen, Larry C.
1993-01-01
Betavoltaic energy conversion refers to the generation of power by coupling a beta source to a semiconductor junction device. The theory of betavoltaic energy conversion and some past studies of the subject are briefly reviewed. Calculations of limiting efficiencies for semiconductor cells versus bandgap are presented along with specific studies for Pm-147 and Ni-63 fueled devices. The approach used for fabricating Pm-147 fueled batteries by the author in the early 1970's is reviewed. Finally, the potential performance of advanced betavoltaic power sources is considered.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Chang-Liao, K.S.; Hwu, J.G.
The hardnesses of hot-carrier and radiation of metal-oxide nitride-oxide semiconductor (MONOS) devices can be improved by the irradiation-then-anneal (ITA) treatments. Each treatment includes an irradiation of Co-60 with a total dose of 1M rads(SiO[sub 2]) and an anneal in N[sub 2] at 400 C for 10 min successively. This improvement can be explained by the release of SiO[sub 2]/Si interfacial strain.
THz semiconductor-based front-end receiver technology for space applications
NASA Technical Reports Server (NTRS)
Mehdi, Imran; Siegel, Peter
2004-01-01
Advances in the design and fabrication of very low capacitance planar Schottky diodes and millimeter-wave power amplifiers, more accurate device and circuit models for commercial 3-D electromagnetic simulators, and the availability of both MEMS and high precision metal machining, have enabled RF engineers to extend traditional waveguide-based sensor and source technologies well into the TI-Iz frequency regime. This short paper will highlight recent progress in realizing THz space-qualified receiver front-ends based on room temperature semiconductor devices.
Methods of measurement for semiconductor materials, process control, and devices
NASA Technical Reports Server (NTRS)
Bullis, W. M. (Editor)
1971-01-01
The development of methods of measurement for semiconductor materials, process control, and devices is discussed. The following subjects are also presented: (1) demonstration of the high sensitivity of the infrared response technique by the identification of gold in a germanium diode, (2) verification that transient thermal response is significantly more sensitive to the presence of voids in die attachment than steady-state thermal resistance, and (3) development of equipment for determining susceptibility of transistors to hot spot formation by the current-gain technique.
Analysis of field usage failure rate data for plastic encapsulated solid state devices
NASA Technical Reports Server (NTRS)
1981-01-01
Survey and questionnaire techniques were used to gather data from users and manufacturers on the failure rates in the field of plastic encapsulated semiconductors. It was found that such solid state devices are being successfully used by commercial companies which impose certain screening and qualification procedures. The reliability of these semiconductors is now adequate to support their consideration in NASA systems, particularly in low cost systems. The cost of performing necessary screening for NASA applications was assessed.
Preface: phys. stat. sol. (c) 1/8
NASA Astrophysics Data System (ADS)
Amann, Markus C.
2004-07-01
In this special issue of physica status solidi (c) we have included 10 invited papers reviewing the current state-of-the-art and the progress achieved in materials science, semiconductor theory, novel physical mechanisms and advanced device concepts in the field of nanostructured electronic and optoelectronic semiconductor devices. All of these papers were written by previous members of the Collaborative Research Centre 348 Nanometer-Halbleiterbauelemente: Grundlagen - Konzepte - Realisierungen (Nanometer Semiconductor Devices: Fundamentals - Concepts - Realisations), which was funded by the German Research Foundation (Deutsche Forschungsgemeinschaft, DFG) during the period from 1991 to 2003. In these twelve years, the researchers in this programme have carried an intense activity directed towards two main objectives. First of all, Fundamentals and Concepts of nanostructure devices and their technology were explored theoretically and experimentally including the effects of low-dimensional structures on carrier transport, optical properties and spin, as well as the enabling epitaxial and nanostructure technologies such as the cleaved-edge-overgrowth technique and the self-assembled growth of quantum dots. A second field of interest was focused towards the design and development of Novel Semiconductor Devices exploiting nanostructure technology. This comprises optical detectors and memories with nanometer lateral dimensions, microwave detectors and sources up to the 300 GHz regime, innovative tunable and surface-emitting semiconductor lasers for the wavelength range 0.9 to 2 m, and nitride-based resonant tunnelling diodes. Some of the device innovations have meanwhile become commercial products proving also the practical importance of this research area. The articles in this special issue relate to the projects of the last three-years' funding period from 2000 to 2003 and are organized along these two We would like to thank the numerous reviewers for their valuable comments and the editorial staff of physica status solidi (c) for their extremely helpful support. The funding by the German Research Foundation over the full project time and the continued monitoring and advice by its representatives Dr. Klaus Wehrberger and Dr. Peter Heil are gratefully acknowledged by all previous members and co-workers of this Collaborative Research Centre.
Group I-III-VI.sub.2 semiconductor films for solar cell application
Basol, Bulent M.; Kapur, Vijay K.
1991-01-01
This invention relates to an improved thin film solar cell with excellent electrical and mechanical integrity. The device comprises a substrate, a Group I-III-VI.sub.2 semiconductor absorber layer and a transparent window layer. The mechanical bond between the substrate and the Group I-III-VI.sub.2 semiconductor layer is enhanced by an intermediate layer between the substrate and the Group I-III-VI.sub.2 semiconductor film being grown. The intermediate layer contains tellurium or substitutes therefor, such as Se, Sn, or Pb. The intermediate layer improves the morphology and electrical characteristics of the Group I-III-VI.sub.2 semiconductor layer.
III-V semiconductor resonators: A new strategy for broadband light perfect absorbers
NASA Astrophysics Data System (ADS)
Liu, Xiaoshan; Chen, Jian; Liu, Jiasong; Huang, Zhenping; Yu, Meidong; Pan, Pingping; Liu, Zhengqi
2017-11-01
Broadband light perfect absorbers (BPAs) are desirable for applications in numerous optoelectronics devices. In this work, a semiconductor-based broadband light perfect absorber (S-BPA) has been numerically demonstrated by utilizing plasmonlike resonances of high-index semiconductor resonators. A maximal absorption of 99.7% is observed in the near-infrared region. By taking the absorption above 80% into account, the spectral bandwidth reaches 340 nm. The absorption properties mainly originate from the optical cavity modes induced by the cylinder resonators and ultrathin semiconductor film. These optical properties and simple structural features can maintain the absorber platform with wide applications in semiconductor optoelectronics.
Regan, William; Zettl, Alexander
2015-05-05
This disclosure provides systems, methods, and apparatus related to field-effect p-n junctions. In one aspect, a device includes an ohmic contact, a semiconductor layer disposed on the ohmic contact, at least one rectifying contact disposed on the semiconductor layer, a gate including a layer disposed on the at least one rectifying contact and the semiconductor layer and a gate contact disposed on the layer. A lateral width of the rectifying contact is less than a semiconductor depletion width of the semiconductor layer. The gate contact is electrically connected to the ohmic contact to create a self-gating feedback loop that is configured to maintain a gate electric field of the gate.
Ovsyannikov, Sergey V; Karkin, Alexander E; Morozova, Natalia V; Shchennikov, Vladimir V; Bykova, Elena; Abakumov, Artem M; Tsirlin, Alexander A; Glazyrin, Konstantin V; Dubrovinsky, Leonid
2014-12-23
An oxide semiconductor (perovskite-type Mn2 O3 ) is reported which has a narrow and direct bandgap of 0.45 eV and a high Vickers hardness of 15 GPa. All the known materials with similar electronic band structures (e.g., InSb, PbTe, PbSe, PbS, and InAs) play crucial roles in the semiconductor industry. The perovskite-type Mn2 O3 described is much stronger than the above semiconductors and may find useful applications in different semiconductor devices, e.g., in IR detectors. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Exploration of oxide-based diluted magnetic semiconductors toward transparent spintronics
NASA Astrophysics Data System (ADS)
Fukumura, T.; Yamada, Y.; Toyosaki, H.; Hasegawa, T.; Koinuma, H.; Kawasaki, M.
2004-02-01
A review is given for the recent progress of research in the field of oxide-based diluted magnetic semiconductor (DMS), which was triggered by combinatorial discovery of transparent ferromagnet. The possible advantages of oxide semiconductor as a host of DMS are described in comparison with conventional compound semiconductors. Limits and problems for identifying novel ferromagnetic DMS are described in view of recent reports in this field. Several characterization techniques are proposed in order to eliminate unidentified ferromagnetism of oxide-based DMS unidentified ferromagnetic oxide (UFO). Perspectives and possible devices are also given.
Optical temperature sensor using thermochromic semiconductors
Kronberg, James W.
1996-01-01
An optical temperature measuring device utilizes thermochromic semiconductors which vary in color in response to changes in temperature. The thermochromic material is sealed in a glass matrix which allows the temperature sensor to detect high temperatures without breakdown. Cuprous oxide and cadmium sulfide are among the semiconductor materials which provide the best results. The changes in color may be detected visually or by utilizing an optical fiber and an electrical sensing circuit.
Optical temperature sensor using thermochromic semiconductors
Kronberg, James W.
1998-01-01
An optical temperature measuring device utilizes thermochromic semiconductors which vary in color in response to changes in temperature. The thermochromic material is sealed in a glass matrix which allows the temperature sensor to detect high temperatures without breakdown. Cuprous oxide and cadmium sulfide are among the semiconductor materials which provide the best results. The changes in color may be detected visually using a sensor chip and an accompanying color card.
Process for leveling film surfaces and products thereof
Birkmire, R.W.; McCandless, B.E.
1990-03-20
Semiconductor films and photovoltaic devices prepared therefrom are provided wherein the semiconductor films have a specular surface with a texture less than about 0.25 micron greater than the average planar film surface and wherein the semiconductor films are surface modified by exposing the surface to an aqueous solution of bromine containing an acid or salt and continuing such exposure for a time sufficient to etch the surface. 8 figs.
Optical temperature sensor using thermochromic semiconductors
Kronberg, J.W.
1998-06-30
An optical temperature measuring device utilizes thermochromic semiconductors which vary in color in response to changes in temperature. The thermochromic material is sealed in a glass matrix which allows the temperature sensor to detect high temperatures without breakdown. Cuprous oxide and cadmium sulfide are among the semiconductor materials which provide the best results. The changes in color may be detected visually using a sensor chip and an accompanying color card. 8 figs.
Controlling Molecular Doping in Organic Semiconductors.
Jacobs, Ian E; Moulé, Adam J
2017-11-01
The field of organic electronics thrives on the hope of enabling low-cost, solution-processed electronic devices with mechanical, optoelectronic, and chemical properties not available from inorganic semiconductors. A key to the success of these aspirations is the ability to controllably dope organic semiconductors with high spatial resolution. Here, recent progress in molecular doping of organic semiconductors is summarized, with an emphasis on solution-processed p-type doped polymeric semiconductors. Highlighted topics include how solution-processing techniques can control the distribution, diffusion, and density of dopants within the organic semiconductor, and, in turn, affect the electronic properties of the material. Research in these areas has recently intensified, thanks to advances in chemical synthesis, improved understanding of charged states in organic materials, and a focus on relating fabrication techniques to morphology. Significant disorder in these systems, along with complex interactions between doping and film morphology, is often responsible for charge trapping and low doping efficiency. However, the strong coupling between doping, solubility, and morphology can be harnessed to control crystallinity, create doping gradients, and pattern polymers. These breakthroughs suggest a role for molecular doping not only in device function but also in fabrication-applications beyond those directly analogous to inorganic doping. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Chemically Derivatized Semiconductor Photoelectrodes.
ERIC Educational Resources Information Center
Wrighton, Mark S.
1983-01-01
Deliberate modification of semiconductor photoelectrodes to improve durability and enhance rate of desirable interfacial redox processes is discussed for a variety of systems. Modification with molecular-based systems or with metals/metal oxides yields results indicating an important role for surface modification in devices for fundamental study…
Hybrid semiconductor nanomagnetoelectronic devices
NASA Astrophysics Data System (ADS)
Bae, Jong Uk
2007-12-01
The subject of this dissertation is the exploration of a new class of hybrid semiconductor nanomagnetoelectronic devices. In these studies, single-domain nanomagnets are used as the gate in a transistor structure, and the spatially non-uniform magnetic fields that they generate provide an additional means to modulate the channel conductance. A quantum wire etched in a high-mobility GaAs/AlGaAs quantum well serves as the channel of this device and the current flow through it is modulated by a high-aspect-ratio Co nanomagnet. The conductance of this device exhibits clear hysteresis in a magnetic field, which is significantly enhanced when the nanomagnet is used as a gate to form a local tunnel barrier in the semiconductor channel. A simple theoretical model, which models the tunnel barrier as a simple harmonic saddle, is able to account for the experimentallyobserved behavior. Further improvements in the tunneling magneto-resistance of this device should be possible in the future by optimizing the gate and channel geometries. In addition to these investigations, we have also explored the hysteretic magnetoresistance of devices in which the tunnel barrier is absent and the behavior is instead dominated by the properties of the magnetic barrier alone. We show experimentally how quantum corrections to the conductance of the quantum wire compete against the magneto-transport effects induced by the non-uniform magnetic field.
Back-side readout semiconductor photomultiplier
Choong, Woon-Seng; Holland, Stephen E
2014-05-20
This disclosure provides systems, methods, and apparatus related to semiconductor photomultipliers. In one aspect, a device includes a p-type semiconductor substrate, the p-type semiconductor substrate having a first side and a second side, the first side of the p-type semiconductor substrate defining a recess, and the second side of the p-type semiconductor substrate being doped with n-type ions. A conductive material is disposed in the recess. A p-type epitaxial layer is disposed on the second side of the p-type semiconductor substrate. The p-type epitaxial layer includes a first region proximate the p-type semiconductor substrate, the first region being implanted with p-type ions at a higher doping level than the p-type epitaxial layer, and a second region disposed on the first region, the second region being doped with p-type ions at a higher doping level than the first region.
Spin Coherence at the Nanoscale: Polymer Surfaces and Interfaces
DOE Office of Scientific and Technical Information (OSTI.GOV)
Epstein, Arthur J.
2013-09-10
Breakthrough results were achieved during the reporting period in the areas of organic spintronics. (A) For the first time the giant magnetic resistance (GMR) was observed in spin valve with an organic spacer. Thus we demonstrated the ability of organic semiconductors to transport spin in GMR devices using rubrene as a prototype for organic semiconductors. (B) We discovered the electrical bistability and spin valve effect in a ferromagnet /organic semiconductor/ ferromagnet heterojunction. The mechanism of switching between conducting phases and its potential applications were suggested. (C) The ability of V(TCNE)x to inject spin into organic semiconductors such as rubrene wasmore » demonstrated for the first time. The mechanisms of spin injection and transport from and into organic magnets as well through organic semiconductors were elucidated. (D) In collaboration with the group of OSU Prof. Johnston-Halperin we reported the successful extraction of spin polarized current from a thin film of the organic-based room temperature ferrimagnetic semiconductor V[TCNE]x and its subsequent injection into a GaAs/AlGaAs light-emitting diode (LED). Thus all basic steps for fabrication of room temperature, light weight, flexible all organic spintronic devices were successfully performed. (E) A new synthesis/processing route for preparation of V(TCNE)x enabling control of interface and film thicknesses at the nanoscale was developed at OSU. Preliminary results show these films are higher quality and what is extremely important they are substantially more air stable than earlier prepared V(TCNE)x. In sum the breakthrough results we achieved in the past two years form the basis of a promising new technology, Multifunctional Flexible Organic-based Spintronics (MFOBS). MFOBS technology enables us fabrication of full function flexible spintronic devices that operate at room temperature.« less
Delay induced high order locking effects in semiconductor lasers.
Kelleher, B; Wishon, M J; Locquet, A; Goulding, D; Tykalewicz, B; Huyet, G; Viktorov, E A
2017-11-01
Multiple time scales appear in many nonlinear dynamical systems. Semiconductor lasers, in particular, provide a fertile testing ground for multiple time scale dynamics. For solitary semiconductor lasers, the two fundamental time scales are the cavity repetition rate and the relaxation oscillation frequency which is a characteristic of the field-matter interaction in the cavity. Typically, these two time scales are of very different orders, and mutual resonances do not occur. Optical feedback endows the system with a third time scale: the external cavity repetition rate. This is typically much longer than the device cavity repetition rate and suggests the possibility of resonances with the relaxation oscillations. We show that for lasers with highly damped relaxation oscillations, such resonances can be obtained and lead to spontaneous mode-locking. Two different laser types--a quantum dot based device and a quantum well based device-are analysed experimentally yielding qualitatively identical dynamics. A rate equation model is also employed showing an excellent agreement with the experimental results.
NASA Astrophysics Data System (ADS)
Kioseoglou, George; Hanbicki, Aubrey T.; Sullivan, James M.; van't Erve, Olaf M. J.; Li, Connie H.; Erwin, Steven C.; Mallory, Robert; Yasar, Mesut; Petrou, Athos; Jonker, Berend T.
2004-11-01
The use of carrier spin in semiconductors is a promising route towards new device functionality and performance. Ferromagnetic semiconductors (FMSs) are promising materials in this effort. An n-type FMS that can be epitaxially grown on a common device substrate is especially attractive. Here, we report electrical injection of spin-polarized electrons from an n-type FMS, CdCr2Se4, into an AlGaAs/GaAs-based light-emitting diode structure. An analysis of the electroluminescence polarization based on quantum selection rules provides a direct measure of the sign and magnitude of the injected electron spin polarization. The sign reflects minority rather than majority spin injection, consistent with our density-functional-theory calculations of the CdCr2Se4 conduction-band edge. This approach confirms the exchange-split band structure and spin-polarized carrier population of an FMS, and demonstrates a litmus test for these FMS hallmarks that discriminates against spurious contributions from magnetic precipitates.
NASA Technical Reports Server (NTRS)
Elbuluk, Malik E.
2003-01-01
Electronics designed for low temperature operation will result in more efficient systems than room temperature. This improvement is a result of better electronic, electrical, and thermal properties of materials at low temperatures. In particular, the performance of certain semiconductor devices improves with decreasing temperature down to ultra-low temperature (-273 'C). The Low Temperature Electronics Program at the NASA Glenn Research Center focuses on research and development of electrical components and systems suitable for applications in deep space missions. Research is being conducted on devices and systems for use down to liquid helium temperatures (-273 'C). Some of the components that are being characterized include semiconductor switching devices, resistors, magnetics, and capacitors. The work performed this summer has focused on the evaluation of silicon-, silicon-germanium- and gallium-Arsenide-based (GaAs) bipolar, MOS and CMOS discrete components and integrated circuits (ICs), from room temperature (23 'C) down to ultra low temperatures (-263 'C).
NASA Astrophysics Data System (ADS)
Orrù, Marta; Piazza, Vincenzo; Rubini, Silvia; Roddaro, Stefano
2015-10-01
Semiconductor nanowires have emerged as an important enabling technology and are today used in many advanced device architectures, with an impact both for what concerns fundamental science and in view of future applications. One of the key challenges in the development of nanowire-based devices is the fabrication of reliable nanoscale contacts. Recent developments in the creation of metal-semiconductor junctions by thermal annealing of metallic electrodes offer promising perspectives. Here, we analyze the optoelectronic properties of nano-Schottky barriers obtained thanks to the controlled formation of metallic AuGa regions in GaAs nanowire. The junctions display a rectifying behavior and their transport characteristics are analyzed to extract the average ideality factor and barrier height in the current architecture. The presence, location, and properties of the Schottky junctions are cross-correlated with spatially resolved photocurrent measurements. Broadband light emission is reported in the reverse breakdown regime; this observation, combined with the absence of electroluminescence at forward bias, is consistent with the device unipolar nature.
Li, Wen; Guo, Fengning; Ling, Haifeng; Zhang, Peng; Yi, Mingdong; Wang, Laiyuan; Wu, Dequn; Xie, Linghai; Huang, Wei
2017-08-01
Nonvolatile organic field-effect transistor (OFET) memory devices based on pentacene/ N , N '-ditridecylperylene-3,4,9,10-tetracarboxylic diimide (P13)/pentacene trilayer organic heterostructures have been proposed. The discontinuous n-type P13 embedded in p-type pentacene layers can not only provide electrons in the semiconductor layer that facilitates electron trapping process; it also works as charge trapping sites, which is attributed to the quantum well-like pentacene/P13/pentacene organic heterostructures. The synergistic effects of charge trapping in the discontinuous P13 and the charge-trapping property of the poly(4-vinylphenol) (PVP) layer remarkably improve the memory performance. In addition, the trilayer organic heterostructures have also been successfully applied to multilevel and flexible nonvolatile memory devices. The results provide a novel design strategy to achieve high-performance nonvolatile OFET memory devices and allow potential applications for different combinations of various organic semiconductor materials in OFET memory.
Li, Wen; Guo, Fengning; Ling, Haifeng; Zhang, Peng; Wang, Laiyuan; Wu, Dequn
2017-01-01
Nonvolatile organic field‐effect transistor (OFET) memory devices based on pentacene/N,N′‐ditridecylperylene‐3,4,9,10‐tetracarboxylic diimide (P13)/pentacene trilayer organic heterostructures have been proposed. The discontinuous n‐type P13 embedded in p‐type pentacene layers can not only provide electrons in the semiconductor layer that facilitates electron trapping process; it also works as charge trapping sites, which is attributed to the quantum well‐like pentacene/P13/pentacene organic heterostructures. The synergistic effects of charge trapping in the discontinuous P13 and the charge‐trapping property of the poly(4‐vinylphenol) (PVP) layer remarkably improve the memory performance. In addition, the trilayer organic heterostructures have also been successfully applied to multilevel and flexible nonvolatile memory devices. The results provide a novel design strategy to achieve high‐performance nonvolatile OFET memory devices and allow potential applications for different combinations of various organic semiconductor materials in OFET memory. PMID:28852619
NASA Astrophysics Data System (ADS)
Chan, YinThai
2016-03-01
Colloidal semiconductor nanocrystals are ideal fluorophores for clinical diagnostics, therapeutics, and highly sensitive biochip applications due to their high photostability, size-tunable color of emission and flexible surface chemistry. The relatively recent development of core-seeded semiconductor nanorods showed that the presence of a rod-like shell can confer even more advantageous physicochemical properties than their spherical counterparts, such as large multi-photon absorption cross-sections and facet-specific chemistry that can be exploited to deposit secondary nanoparticles. It may be envisaged that these highly fluorescent nanorods can be integrated with large scale integrated (LSI) microfluidic systems that allow miniaturization and integration of multiple biochemical processes in a single device at the nanoliter scale, resulting in a highly sensitive and automated detection platform. In this talk, I will describe a LSI microfluidic device that integrates RNA extraction, reverse transcription to cDNA, amplification and target pull-down to detect histidine decarboxylase (HDC) gene directly from human white blood cells samples. When anisotropic colloidal semiconductor nanorods (NRs) were used as the fluorescent readout, the detection limit was found to be 0.4 ng of total RNA, which was much lower than that obtained using spherical quantum dots (QDs) or organic dyes. This was attributed to the large action cross-section of NRs and their high probability of target capture in a pull-down detection scheme. The combination of large scale integrated microfluidics with highly fluorescent semiconductor NRs may find widespread utility in point-of-care devices and multi-target diagnostics.
NASA Astrophysics Data System (ADS)
Tsai, K. Y. F.; Helander, M. G.; Lu, Z. H.
2009-04-01
Organic-inorganic hybrid heterojunctions are critical for the integration of organic electronics with traditional Si and III-V semiconductor microelectronics. The amorphous nature of organic semiconductors eliminates the stringent lattice-matching requirements in semiconductor monolithic growth. However, as of yet it is unclear what driving forces dictate the energy-level alignment at hybrid organic-inorganic heterojunctions. Using photoelectron spectroscopy we investigate the energy-level alignment at the hybrid organic-inorganic heterojunction formed between S-passivated InP(100) and several commonly used hole injection/transport molecules, namely, copper phthalocyanine (CuPc), N ,N'-diphenyl-N ,N'-bis-(1-naphthyl)-1-1'-biphenyl-4,4'-diamine (α-NPD), and fullerene (C60). The energy-level alignment at the hybrid organic-inorganic heterojunction is found to be consistent with traditional interface dipole theory, originally developed to describe Schottky contacts. Contrary to conventional wisdom, hole injection from S-passivated InP(100) into an organic semiconductor is found to originate from interface states at or near the Fermi level, rather than from the valance band maximum of the semiconductor. As a result the barrier height for hole injection is defined by the offset between the surface Fermi level of the S-passivated InP(100) and the highest occupied molecular orbital of the organic. This finding sheds new light on the unusual trend in device performance reported in literature for such hybrid organic-inorganic heterojunction devices.
Li, Wen; Guo, Fengning; Ling, Haifeng; Liu, Hui; Yi, Mingdong; Zhang, Peng; Wang, Wenjun; Xie, Linghai; Huang, Wei
2018-01-01
In this paper, the development of organic field-effect transistor (OFET) memory device based on isolated and ordered nanostructures (NSs) arrays of wide-bandgap (WBG) small-molecule organic semiconductor material [2-(9-(4-(octyloxy)phenyl)-9H-fluoren-2-yl)thiophene]3 (WG 3 ) is reported. The WG 3 NSs are prepared from phase separation by spin-coating blend solutions of WG 3 /trimethylolpropane (TMP), and then introduced as charge storage elements for nonvolatile OFET memory devices. Compared to the OFET memory device with smooth WG 3 film, the device based on WG 3 NSs arrays exhibits significant improvements in memory performance including larger memory window (≈45 V), faster switching speed (≈1 s), stable retention capability (>10 4 s), and reliable switching properties. A quantitative study of the WG 3 NSs morphology reveals that enhanced memory performance is attributed to the improved charge trapping/charge-exciton annihilation efficiency induced by increased contact area between the WG 3 NSs and pentacene layer. This versatile solution-processing approach to preparing WG 3 NSs arrays as charge trapping sites allows for fabrication of high-performance nonvolatile OFET memory devices, which could be applicable to a wide range of WBG organic semiconductor materials. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
NASA Astrophysics Data System (ADS)
Kodigala, Subba Ramaiah
2016-11-01
This article emphasizes verification of Fowler-Nordheim electron tunneling mechanism in the Ni/SiO2/n-4H SiC MOS devices by developing three different kinds of models. The standard semiconductor equations are categorically solved to obtain the change in Fermi energy level of semiconductor with effect of temperature and field that extend support to determine sustainable and accurate tunneling current through the oxide layer. The forward and reverse bias currents with variation of electric field are simulated with help of different models developed by us for MOS devices by applying adequate conditions. The latter is quite different from former in terms of tunneling mechanism in the MOS devices. The variation of barrier height with effect of quantum mechanical, temperature, and fields is considered as effective barrier height for the generation of current-field (J-F) curves under forward and reverse biases but quantum mechanical effect is void in the latter. In addition, the J-F curves are also simulated with variation of carrier concentration in the n-type 4H SiC semiconductor of MOS devices and the relation between them is established.
A 500 A device characterizer utilizing a pulsed-linear amplifier
NASA Astrophysics Data System (ADS)
Lacouture, Shelby; Bayne, Stephen
2016-02-01
With the advent of modern power semiconductor switching elements, the envelope defining "high power" is an ever increasing quantity. Characterization of these semiconductor power devices generally falls into two categories: switching, or transient characteristics, and static, or DC characteristics. With the increasing native voltage and current levels that modern power devices are capable of handling, characterization equipment meant to extract quasi-static IV curves has not kept pace, often leaving researchers with no other option than to construct ad hoc curve tracers from disparate pieces of equipment. In this paper, a dedicated 10 V, 500 A curve tracer was designed and constructed for use with state of the art high power semiconductor switching and control elements. The characterizer is a physically small, pulsed power system at the heart of which is a relatively high power linear amplifier operating in a switched manner in order to deliver well defined square voltage pulses. These actively shaped pulses are used to obtain device's quasi-static DC characteristics accurately without causing any damage to the device tested. Voltage and current waveforms from each pulse are recorded simultaneously by two separate high-speed analog to digital converters and averaged over a specified interval to obtain points in the reconstructed IV graph.
Ray, Biswajit; Baradwaj, Aditya G.; Khan, Mohammad Ryyan; ...
2015-08-19
The bulk heterojunction (BHJ) organic photovoltaic (OPV) architecture has dominated the literature due to its ability to be implemented in devices with relatively high efficiency values. However, a simpler device architecture based on a single organic semiconductor (SS-OPV) offers several advantages: it obviates the need to control the highly system-dependent nanoscale BHJ morphology, and therefore, would allow the use of broader range of organic semiconductors. Unfortunately, the photocurrent in standard SS-OPV devices is typically very low, which generally is attributed to inefficient charge separation of the photogenerated excitons. In this paper, we show that the short-circuit current density from SS-OPVmore » devices can be enhanced significantly (~100-fold) through the use of inverted device configurations, relative to a standard OPV device architecture. This result suggests that charge generation may not be the performance bottleneck in OPV device operation. Instead, poor charge collection, caused by defect-induced electric field screening, is most likely the primary performance bottleneck in regular-geometry SS-OPV cells. We justify this hypothesis by: ( i) detailed numerical simulations, ( ii) electrical characterization experiments of functional SS-OPV devices using multiple polymers as active layer materials, and ( iii) impedance spectroscopy measurements. Furthermore, we show that the collection-limited photocurrent theory consistently interprets typical characteristics of regular SS-OPV devices. Finally, these insights should encourage the design and OPV implementation of high-purity, high-mobility polymers, and other soft materials that have shown promise in organic field-effect transistor applications, but have not performed well in BHJ OPV devices, wherein they adopt less-than-ideal nanostructures when blended with electron-accepting materials.« less
Magnetic-field-controlled reconfigurable semiconductor logic.
Joo, Sungjung; Kim, Taeyueb; Shin, Sang Hoon; Lim, Ju Young; Hong, Jinki; Song, Jin Dong; Chang, Joonyeon; Lee, Hyun-Woo; Rhie, Kungwon; Han, Suk Hee; Shin, Kyung-Ho; Johnson, Mark
2013-02-07
Logic devices based on magnetism show promise for increasing computational efficiency while decreasing consumed power. They offer zero quiescent power and yet combine novel functions such as programmable logic operation and non-volatile built-in memory. However, practical efforts to adapt a magnetic device to logic suffer from a low signal-to-noise ratio and other performance attributes that are not adequate for logic gates. Rather than exploiting magnetoresistive effects that result from spin-dependent transport of carriers, we have approached the development of a magnetic logic device in a different way: we use the phenomenon of large magnetoresistance found in non-magnetic semiconductors in high electric fields. Here we report a device showing a strong diode characteristic that is highly sensitive to both the sign and the magnitude of an external magnetic field, offering a reversible change between two different characteristic states by the application of a magnetic field. This feature results from magnetic control of carrier generation and recombination in an InSb p-n bilayer channel. Simple circuits combining such elementary devices are fabricated and tested, and Boolean logic functions including AND, OR, NAND and NOR are performed. They are programmed dynamically by external electric or magnetic signals, demonstrating magnetic-field-controlled semiconductor reconfigurable logic at room temperature. This magnetic technology permits a new kind of spintronic device, characterized as a current switch rather than a voltage switch, and provides a simple and compact platform for non-volatile reconfigurable logic devices.
Photoelectrochemical devices for solar water splitting - materials and challenges.
Jiang, Chaoran; Moniz, Savio J A; Wang, Aiqin; Zhang, Tao; Tang, Junwang
2017-07-31
It is widely accepted within the community that to achieve a sustainable society with an energy mix primarily based on solar energy we need an efficient strategy to convert and store sunlight into chemical fuels. A photoelectrochemical (PEC) device would therefore play a key role in offering the possibility of carbon-neutral solar fuel production through artificial photosynthesis. The past five years have seen a surge in the development of promising semiconductor materials. In addition, low-cost earth-abundant co-catalysts are ubiquitous in their employment in water splitting cells due to the sluggish kinetics of the oxygen evolution reaction (OER). This review commences with a fundamental understanding of semiconductor properties and charge transfer processes in a PEC device. We then describe various configurations of PEC devices, including single light-absorber cells and multi light-absorber devices (PEC, PV-PEC and PV/electrolyser tandem cell). Recent progress on both photoelectrode materials (light absorbers) and electrocatalysts is summarized, and important factors which dominate photoelectrode performance, including light absorption, charge separation and transport, surface chemical reaction rate and the stability of the photoanode, are discussed. Controlling semiconductor properties is the primary concern in developing materials for solar water splitting. Accordingly, strategies to address the challenges for materials development in this area, such as the adoption of smart architectures, innovative device configuration design, co-catalyst loading, and surface protection layer deposition, are outlined throughout the text, to deliver a highly efficient and stable PEC device for water splitting.
Semiconductor nanowire thermoelectric materials and devices, and processes for producing same
Lagally, Max G; Evans, Paul G; Ritz, Clark S
2013-09-17
The present invention provides nanowires and nanoribbons that are well suited for use in thermoelectric applications. The nanowires and nanoribbons are characterized by a periodic compositional longitudinal modulation. The nanowires are constructed using lithographic techniques from thin semiconductor membranes, or "nanomembranes."
Semiconductor nanowire thermoelectric materials and devices, and processes for producing same
Lagally, Max G.; Evans, Paul G.; Ritz, Clark S.
2015-11-17
The present invention provides nanowires and nanoribbons that are well suited for use in thermoelectric applications. The nanowires and nanoribbons are characterized by a periodic compositional longitudinal modulation. The nanowires are constructed using lithographic techniques from thin semiconductor membranes, or "nanomembranes."
DOE Office of Scientific and Technical Information (OSTI.GOV)
Nurmikko, Arto V
Synthesis of semiconductor nanomaterials by low-cost, solution-based methods is shown to lead to new classes of thin film light emitting materials. These materials have been integrated to demonstrative compact laser device testbeds to illustrate their potential for coherent emitters across the visible spectrum to disrupt established photonics technologies, particularly semiconductor lasers?
Schottky barrier MOSFET systems and fabrication thereof
Welch, James D.
1997-01-01
(MOS) device systems-utilizing Schottky barrier source and drain to channel region junctions are disclosed. Experimentally derived results which demonstrate operation of fabricated N-channel and P-channel Schottky barrier (MOSFET) devices, and of fabricated single devices with operational characteristics similar to (CMOS) and to a non-latching (SRC) are reported. Use of essentially non-rectifying Schottky barriers in (MOS) structures involving highly doped and the like and intrinsic semiconductor to allow non-rectifying interconnection of, and electrical accessing of device regions is also disclosed. Insulator effected low leakage current device geometries and fabrication procedures therefore are taught. Selective electrical interconnection of drain to drain, source to drain, or source to source, of N-channel and/or P-channel Schottky barrier (MOSFET) devices formed on P-type, N-type and Intrinsic semiconductor allows realization of Schottky Barrier (CMOS), (MOSFET) with (MOSFET) load, balanced differential (MOSFET) device systems and inverting and non-inverting single devices with operating characteristics similar to (CMOS), which devices can be utilized in modulation, as well as in voltage controled switching and effecting a direction of rectification.
Schottky barrier MOSFET systems and fabrication thereof
Welch, J.D.
1997-09-02
(MOS) device systems-utilizing Schottky barrier source and drain to channel region junctions are disclosed. Experimentally derived results which demonstrate operation of fabricated N-channel and P-channel Schottky barrier (MOSFET) devices, and of fabricated single devices with operational characteristics similar to (CMOS) and to a non-latching (SRC) are reported. Use of essentially non-rectifying Schottky barriers in (MOS) structures involving highly doped and the like and intrinsic semiconductor to allow non-rectifying interconnection of, and electrical accessing of device regions is also disclosed. Insulator effected low leakage current device geometries and fabrication procedures therefore are taught. Selective electrical interconnection of drain to drain, source to drain, or source to source, of N-channel and/or P-channel Schottky barrier (MOSFET) devices formed on P-type, N-type and Intrinsic semiconductor allows realization of Schottky Barrier (CMOS), (MOSFET) with (MOSFET) load, balanced differential (MOSFET) device systems and inverting and non-inverting single devices with operating characteristics similar to (CMOS), which devices can be utilized in modulation, as well as in voltage controlled switching and effecting a direction of rectification. 89 figs.
Apparatus for making photovoltaic devices
Foote, James B.; Kaake, Steven A. F.; Meyers, Peter V.; Nolan, James F.
1994-12-13
A process and apparatus (70) for making a large area photovoltaic device (22) that is capable of generating low cost electrical power. The apparatus (70) for performing the process includes an enclosure (126) providing a controlled environment in which an oven (156) is located. At least one and preferably a plurality of deposition stations (74,76,78) provide heated vapors of semiconductor material within the oven (156) for continuous elevated temperature deposition of semiconductor material on a sheet substrate (24) including a glass sheet (26) conveyed within the oven. The sheet substrate (24) is conveyed on a roller conveyor (184) within the oven (156) and the semiconductor material whose main layer (82) is cadmium telluride is deposited on an upwardly facing surface (28) of the substrate by each deposition station from a location within the oven above the roller conveyor. A cooling station (86) rapidly cools the substrate (24) after deposition of the semiconductor material thereon to strengthen the glass sheet of the substrate.
Barrier height enhancement of metal/semiconductor contact by an enzyme biofilm interlayer
NASA Astrophysics Data System (ADS)
Ocak, Yusuf Selim; Gul Guven, Reyhan; Tombak, Ahmet; Kilicoglu, Tahsin; Guven, Kemal; Dogru, Mehmet
2013-06-01
A metal/interlayer/semiconductor (Al/enzyme/p-Si) MIS device was fabricated using α-amylase enzyme as a thin biofilm interlayer. It was observed that the device showed an excellent rectifying behavior and the barrier height value of 0.78 eV for Al/α-amylase/p-Si was meaningfully larger than the one of 0.58 eV for conventional Al/p-Si metal/semiconductor (MS) contact. Enhancement of the interfacial potential barrier of Al/p-Si MS diode was realized using enzyme interlayer by influencing the space charge region of Si semiconductor. The electrical properties of the structure were executed by the help of current-voltage and capacitance-voltage measurements. The photovoltaic properties of the structure were executed under a solar simulator with AM1.5 global filter between 40 and 100 mW/cm2 illumination conditions. It was also reported that the α-amylase enzyme produced from Bacillus licheniformis had a 3.65 eV band gap value obtained from optical method.
Advanced thermoelectric materials with enhanced crystal lattice structure and methods of preparation
NASA Technical Reports Server (NTRS)
Fleurial, Jean-Pierre (Inventor); Caillat, Thierry F. (Inventor); Borshchevsky, Alexander (Inventor)
1998-01-01
New skutterudite phases including Ru.sub.0.5 Pd.sub.0.5 Sb.sub.3, RuSb.sub.2 Te, and FeSb.sub.2 Te, have been prepared having desirable thermoelectric properties. In addition, a novel thermoelectric device has been prepared using skutterudite phase Fe.sub.0.5 Ni.sub.0.5 Sb.sub.3. The skutterudite-type crystal lattice structure of these semiconductor compounds and their enhanced thermoelectric properties results in semiconductor materials which may be used in the fabrication of thermoelectric elements to substantially improve the efficiency of the resulting thermoelectric device. Semiconductor materials having the desired skutterudite-type crystal lattice structure may be prepared in accordance with the present invention by using powder metallurgy techniques. Measurements of electrical and thermal transport properties of selected semiconductor materials prepared in accordance with the present invention, demonstrated high Hall mobilities and good Seebeck coefficients. These materials have low thermal conductivity and relatively low electrical resistivity, and are good candidates for low temperature thermoelectric applications.
Ballistic superconductivity in semiconductor nanowires
Zhang, Hao; Gül, Önder; Conesa-Boj, Sonia; Nowak, Michał P.; Wimmer, Michael; Zuo, Kun; Mourik, Vincent; de Vries, Folkert K.; van Veen, Jasper; de Moor, Michiel W. A.; Bommer, Jouri D. S.; van Woerkom, David J.; Car, Diana; Plissard, Sébastien R; Bakkers, Erik P.A.M.; Quintero-Pérez, Marina; Cassidy, Maja C.; Koelling, Sebastian; Goswami, Srijit; Watanabe, Kenji; Taniguchi, Takashi; Kouwenhoven, Leo P.
2017-01-01
Semiconductor nanowires have opened new research avenues in quantum transport owing to their confined geometry and electrostatic tunability. They have offered an exceptional testbed for superconductivity, leading to the realization of hybrid systems combining the macroscopic quantum properties of superconductors with the possibility to control charges down to a single electron. These advances brought semiconductor nanowires to the forefront of efforts to realize topological superconductivity and Majorana modes. A prime challenge to benefit from the topological properties of Majoranas is to reduce the disorder in hybrid nanowire devices. Here we show ballistic superconductivity in InSb semiconductor nanowires. Our structural and chemical analyses demonstrate a high-quality interface between the nanowire and a NbTiN superconductor that enables ballistic transport. This is manifested by a quantized conductance for normal carriers, a strongly enhanced conductance for Andreev-reflecting carriers, and an induced hard gap with a significantly reduced density of states. These results pave the way for disorder-free Majorana devices. PMID:28681843
Electron counting and a large family of two-dimensional semiconductors
NASA Astrophysics Data System (ADS)
Miao, Maosheng; Botana, Jorge; Zurek, Eva; Liu, Jingyao; Yang, Wen
Two-dimensional semiconductors (2DSC) are currently the focus of many studies, thanks to their novel and superior transport properties that may greatly influence future electronic devices. The potential applications of 2DSCs range from low-dimensional electronics, topological insulators and vallytronics all the way to novel photolysis. However, compared with the conventional semiconductors that are comprised of main group elements and cover a large range of band gaps and lattice constants, the choice of 2D materials is very limited. In this work, we propose and demonstrate a large family of 2DSCs, all adopting the same structure and consisting of only main group elements. Using advanced density functional calculations, we demonstrate the attainability of these materials, and show that they cover a large range of lattice constants, band gaps and band edge states, making them good candidate materials for heterojunctions. This family of two dimensional materials may be instrumental in the fabrication of 2DSC devices that may rival the currently employed 3D semiconductors.
Process for making photovoltaic devices and resultant product
Foote, James B.; Kaake, Steven A. F.; Meyers, Peter V.; Nolan, James F.
1996-07-16
A process and apparatus (70) for making a large area photovoltaic device (22) that is capable of generating low cost electrical power. The apparatus (70) for performing the process includes an enclosure (126) providing a controlled environment in which an oven (156) is located. At least one and preferably a plurality of deposition stations (74,76,78) provide heated vapors of semiconductor material within the oven (156) for continuous elevated temperature deposition of semiconductor material on a sheet substrate (24) including a glass sheet (26) conveyed within the oven. The sheet substrate (24) is conveyed on a roller conveyor (184) within the oven (156) and the semiconductor material whose main layer (82) is cadmium telluride is deposited on an upwardly facing surface (28) of the substrate by each deposition station from a location within the oven above the roller conveyor. A cooling station (86) rapidly cools the substrate (24) after deposition of the semiconductor material thereon to strengthen the glass sheet of the substrate.
Process for making photovoltaic devices and resultant product
Foote, James B.; Kaake, Steven A. F.; Meyers, Peter V.; Nolan, James F.
1995-11-28
A process and apparatus (70) for making a large area photovoltaic device (22) that is capable of generating low cost electrical power. The apparatus (70) for performing the process includes an enclosure (126) providing a controlled environment in which an oven (156) is located. At least one and preferably a plurality of deposition stations (74,76,78) provide heated vapors of semiconductor material within the oven (156) for continuous elevated temperature deposition of semiconductor material on a sheet substrate (24) including a glass sheet (26) conveyed within the oven. The sheet substrate (24) is conveyed on a roller conveyor (184) within the oven (156) and the semiconductor material whose main layer (82) is cadmium telluride is deposited on an upwardly facing surface (28) of the substrate by each deposition station from a location within the oven above the roller conveyor. A cooling station (86) rapidly cools the substrate (24) after deposition of the semiconductor material thereon to strengthen the glass sheet of the substrate.
Process for making photovoltaic devices and resultant product
Foote, James B.; Kaake, Steven A. F.; Meyers, Peter V.; Nolan, James F.
1993-09-28
A process and apparatus (70) for making a large area photovoltaic device (22) that is capable of generating low cost electrical power. The apparatus (70) for performing the process includes an enclosure (126) providing a controlled environment in which an oven (156) is located. At least one and preferably a plurality of deposition stations (74,76,78) provide heated vapors of semiconductor material within the oven (156) for continuous elevated temperature deposition of semiconductor material on a sheet substrate (24) including a glass sheet (26) conveyed within the oven. The sheet substrate (24) is conveyed on a roller conveyor (184) within the oven (156) and the semiconductor material whose main layer (82) is cadmium telluride is deposited on an upwardly facing surface (28) of the substrate by each deposition station from a location within the oven above the roller conveyor. A cooling station (86) rapidly cools the substrate (24) after deposition of the semiconductor material thereon to strengthen the glass sheet of the substrate.
Kübel, Christian; Voigt, Andreas; Schoenmakers, Remco; Otten, Max; Su, David; Lee, Tan-Chen; Carlsson, Anna; Bradley, John
2005-10-01
Electron tomography is a well-established technique for three-dimensional structure determination of (almost) amorphous specimens in life sciences applications. With the recent advances in nanotechnology and the semiconductor industry, there is also an increasing need for high-resolution three-dimensional (3D) structural information in physical sciences. In this article, we evaluate the capabilities and limitations of transmission electron microscopy (TEM) and high-angle-annular-dark-field scanning transmission electron microscopy (HAADF-STEM) tomography for the 3D structural characterization of partially crystalline to highly crystalline materials. Our analysis of catalysts, a hydrogen storage material, and different semiconductor devices shows that features with a diameter as small as 1-2 nm can be resolved in three dimensions by electron tomography. For partially crystalline materials with small single crystalline domains, bright-field TEM tomography provides reliable 3D structural information. HAADF-STEM tomography is more versatile and can also be used for high-resolution 3D imaging of highly crystalline materials such as semiconductor devices.
Patterned arrays of lateral heterojunctions within monolayer two-dimensional semiconductors
Mahjouri-Samani, Masoud; Lin, Ming-Wei; Wang, Kai; Lupini, Andrew R.; Lee, Jaekwang; Basile, Leonardo; Boulesbaa, Abdelaziz; Rouleau, Christopher M.; Puretzky, Alexander A.; Ivanov, Ilia N.; Xiao, Kai; Yoon, Mina; Geohegan, David B.
2015-01-01
The formation of semiconductor heterojunctions and their high-density integration are foundations of modern electronics and optoelectronics. To enable two-dimensional crystalline semiconductors as building blocks in next-generation electronics, developing methods to deterministically form lateral heterojunctions is crucial. Here we demonstrate an approach for the formation of lithographically patterned arrays of lateral semiconducting heterojunctions within a single two-dimensional crystal. Electron beam lithography is used to pattern MoSe2 monolayer crystals with SiO2, and the exposed locations are selectively and totally converted to MoS2 using pulsed laser vaporization of sulfur to form MoSe2/MoS2 heterojunctions in predefined patterns. The junctions and conversion process are studied by Raman and photoluminescence spectroscopy, atomically resolved scanning transmission electron microscopy and device characterization. This demonstration of lateral heterojunction arrays within a monolayer crystal is an essential step for the integration of two-dimensional semiconductor building blocks with different electronic and optoelectronic properties for high-density, ultrathin devices. PMID:26198727
A hybrid life cycle inventory of nano-scale semiconductor manufacturing.
Krishnan, Nikhil; Boyd, Sarah; Somani, Ajay; Raoux, Sebastien; Clark, Daniel; Dornfeld, David
2008-04-15
The manufacturing of modern semiconductor devices involves a complex set of nanoscale fabrication processes that are energy and resource intensive, and generate significant waste. It is important to understand and reduce the environmental impacts of semiconductor manufacturing because these devices are ubiquitous components in electronics. Furthermore, the fabrication processes used in the semiconductor industry are finding increasing application in other products, such as microelectromechanical systems (MEMS), flat panel displays, and photovoltaics. In this work we develop a library of typical gate-to-gate materials and energy requirements, as well as emissions associated with a complete set of fabrication process models used in manufacturing a modern microprocessor. In addition, we evaluate upstream energy requirements associated with chemicals and materials using both existing process life cycle assessment (LCA) databases and an economic input-output (EIO) model. The result is a comprehensive data set and methodology that may be used to estimate and improve the environmental performance of a broad range of electronics and other emerging applications that involve nano and micro fabrication.
Spatial fluctuations in barrier height at the graphene-silicon carbide Schottky junction.
Rajput, S; Chen, M X; Liu, Y; Li, Y Y; Weinert, M; Li, L
2013-01-01
When graphene is interfaced with a semiconductor, a Schottky contact forms with rectifying properties. Graphene, however, is also susceptible to the formation of ripples upon making contact with another material. Here we report intrinsic ripple- and electric field-induced effects at the graphene semiconductor Schottky junction, by comparing chemical vapour-deposited graphene transferred on semiconductor surfaces of opposite polarization-the hydrogen-terminated silicon and carbon faces of hexagonal silicon carbide. Using scanning tunnelling microscopy/spectroscopy and first-principles calculations, we show the formation of a narrow Schottky dipole barrier approximately 10 Å wide, which facilitates the observed effective electric field control of the Schottky barrier height. We further find atomic-scale spatial fluctuations in the Schottky barrier that directly follow the undulation of ripples on both graphene-silicon carbide junctions. These findings reveal fundamental properties of the graphene/semiconductor Schottky junction-a key component of vertical graphene devices that offer functionalities unattainable in planar device architecture.
Effects of ultrathin oxides in conducting MIS structures on GaAs
NASA Technical Reports Server (NTRS)
Childs, R. B.; Ruths, J. M.; Sullivan, T. E.; Fonash, S. J.
1978-01-01
Schottky barrier-type GaAs baseline devices (semiconductor surface etched and then immediately metalized) and GaAs conducting metal oxide-semiconductor devices are fabricated and characterized. The baseline surfaces (no purposeful oxide) are prepared by a basic or an acidic etch, while the surface for the MIS devices are prepared by oxidizing after the etch step. The metallizations used are thin-film Au, Ag, Pd, and Al. It is shown that the introduction of purposeful oxide into these Schottky barrier-type structures examined on n-type GaAs modifies the barrier formation, and that thin interfacial layers can modify barrier formation through trapping and perhaps chemical reactions. For Au- and Pd-devices, enhanced photovoltaic performance of the MIS configuration is due to increased barrier height.
Skogen, Erik J [Albuquerque, NM; Raring, James [Goleta, CA; Tauke-Pedretti, Anna [Albuquerque, NM
2011-08-09
An optical NAND gate is formed from two pair of optical waveguide devices on a substrate, with each pair of the optical waveguide devices consisting of an electroabsorption modulator and a photodetector. One pair of the optical waveguide devices is electrically connected in parallel to operate as an optical AND gate; and the other pair of the optical waveguide devices is connected in series to operate as an optical NOT gate (i.e. an optical inverter). The optical NAND gate utilizes two digital optical inputs and a continuous light input to provide a NAND function output. The optical NAND gate can be formed from III-V compound semiconductor layers which are epitaxially deposited on a III-V compound semiconductor substrate, and operates at a wavelength in the range of 0.8-2.0 .mu.m.
Analysis of quantum semiconductor heterostructures by ballistic electron emission spectroscopy
NASA Astrophysics Data System (ADS)
Guthrie, Daniel K.
1998-09-01
The microelectronics industry is diligently working to achieve the goal of gigascale integration (GSI) by early in the 21st century. For the past twenty-five years, progress toward this goal has been made by continually scaling down device technology. Unfortunately, this trend cannot continue to the point of producing arbitrarily small device sizes. One possible solution to this problem that is currently under intensive study is the relatively new area of quantum devices. Quantum devices represent a new class of microelectronic devices that operate by utilizing the wave-like nature (reflection, refraction, and confinement) of electrons together with the laws of quantum mechanics to construct useful devices. One difficulty associated with these structures is the absence of measurement techniques that can fully characterize carrier transport in such devices. This thesis addresses this need by focusing on the study of carrier transport in quantum semiconductor heterostructures using a relatively new and versatile measurement technique known as ballistic electron emission spectroscopy (BEES). To achieve this goal, a systematic approach that encompasses a set of progressively more complex structures is utilized. First, the simplest BEES structure possible, the metal/semiconductor interface, is thoroughly investigated in order to provide a foundation for measurements on more the complex structures. By modifying the semiclassical model commonly used to describe the experimental BEES spectrum, a very complete and accurate description of the basic structure has been achieved. Next, a very simple semiconductor heterostructure, a Ga1-xAlxAs single-barrier structure, was measured and analyzed. Low-temperature measurements on this structure were used to investigate the band structure and electron-wave interference effects in the Ga1-xAlxAs single barrier structure. These measurements are extended to a simple quantum device by designing, measuring, and analyzing a set of complementary electron-wave Fabry-Perot quantum interference filters which included both a half- and a quarter-electron-wavelength resonant device. High-resolution, low noise, BEES spectra obtained on these devices at low-temperature were used to measure the zero-bias electron transmittance as a function of injected energy for these resonant devices. Finally, by analyzing BEES spectra taken at various spatial locations, one monolayer variations in the thickness of a buried quantum well have been detected.
Luo, Jun-Wei; Li, Shu-Shen; Zunger, Alex
2017-09-22
The electric field manipulation of the Rashba spin-orbit coupling effects provides a route to electrically control spins, constituting the foundation of the field of semiconductor spintronics. In general, the strength of the Rashba effects depends linearly on the applied electric field and is significant only for heavy-atom materials with large intrinsic spin-orbit interaction under high electric fields. Here, we illustrate in 1D semiconductor nanowires an anomalous field dependence of the hole (but not electron) Rashba effect (HRE). (i) At low fields, the strength of the HRE exhibits a steep increase with the field so that even low fields can be used for device switching. (ii) At higher fields, the HRE undergoes a rapid transition to saturation with a giant strength even for light-atom materials such as Si (exceeding 100 meV Å). (iii) The nanowire-size dependence of the saturation HRE is rather weak for light-atom Si, so size fluctuations would have a limited effect; this is a key requirement for scalability of Rashba-field-based spintronic devices. These three features offer Si nanowires as a promising platform for the realization of scalable complementary metal-oxide-semiconductor compatible spintronic devices.
GaAs photovoltaics and optoelectronics using releasable multilayer epitaxial assemblies.
Yoon, Jongseung; Jo, Sungjin; Chun, Ik Su; Jung, Inhwa; Kim, Hoon-Sik; Meitl, Matthew; Menard, Etienne; Li, Xiuling; Coleman, James J; Paik, Ungyu; Rogers, John A
2010-05-20
Compound semiconductors like gallium arsenide (GaAs) provide advantages over silicon for many applications, owing to their direct bandgaps and high electron mobilities. Examples range from efficient photovoltaic devices to radio-frequency electronics and most forms of optoelectronics. However, growing large, high quality wafers of these materials, and intimately integrating them on silicon or amorphous substrates (such as glass or plastic) is expensive, which restricts their use. Here we describe materials and fabrication concepts that address many of these challenges, through the use of films of GaAs or AlGaAs grown in thick, multilayer epitaxial assemblies, then separated from each other and distributed on foreign substrates by printing. This method yields large quantities of high quality semiconductor material capable of device integration in large area formats, in a manner that also allows the wafer to be reused for additional growths. We demonstrate some capabilities of this approach with three different applications: GaAs-based metal semiconductor field effect transistors and logic gates on plates of glass, near-infrared imaging devices on wafers of silicon, and photovoltaic modules on sheets of plastic. These results illustrate the implementation of compound semiconductors such as GaAs in applications whose cost structures, formats, area coverages or modes of use are incompatible with conventional growth or integration strategies.
Hattori, Toshiaki; Masaki, Yoshitomo; Atsumi, Kazuya; Kato, Ryo; Sawada, Kazuaki
2010-01-01
Two-dimensional real-time observation of potassium ion distributions was achieved using an ion imaging device based on charge-coupled device (CCD) and metal-oxide semiconductor technologies, and an ion selective membrane. The CCD potassium ion image sensor was equipped with an array of 32 × 32 pixels (1024 pixels). It could record five frames per second with an area of 4.16 × 4.16 mm(2). Potassium ion images were produced instantly. The leaching of potassium ion from a 3.3 M KCl Ag/AgCl reference electrode was dynamically monitored in aqueous solution. The potassium ion selective membrane on the semiconductor consisted of plasticized poly(vinyl chloride) (PVC) with bis(benzo-15-crown-5). The addition of a polyhedral oligomeric silsesquioxane to the plasticized PVC membrane greatly improved adhesion of the membrane onto Si(3)N(4) of the semiconductor surface, and the potential response was stabilized. The potential response was linear from 10(-2) to 10(-5) M logarithmic concentration of potassium ion. The selectivity coefficients were K(K(+),Li(+))(pot) = 10(-2.85), K(K(+),Na(+))(pot) = 10(-2.30), K(K(+),Rb(+))(pot) =10(-1.16), and K(K(+),Cs(+))(pot) = 10(-2.05).
3D Band Diagram and Photoexcitation of 2D–3D Semiconductor Heterojunctions
DOE Office of Scientific and Technical Information (OSTI.GOV)
Li, Bo; Shi, Gang; Lei, Sidong
2015-08-17
The emergence of a rich variety of two-dimensional (2D) layered semiconductor materials has enabled the creation of atomically thin heterojunction devices. Junctions between atomically thin 2D layers and 3D bulk semiconductors can lead to junctions that are fundamentally electronically different from the covalently bonded conventional semiconductor junctions. In this paper, we propose a new 3D band diagram for the heterojunction formed between n-type monolayer MoS 2 and p-type Si, in which the conduction and valence band-edges of the MoS 2 monolayer are drawn for both stacked and in-plane directions. This new band diagram helps visualize the flow of charge carriersmore » inside the device in a 3D manner. Our detailed wavelength-dependent photocurrent measurements fully support the diagrams and unambiguously show that the band alignment is type I for this 2D-3D heterojunction. Photogenerated electron–hole pairs in the atomically thin monolayer are separated and driven by an external bias and control the “on/off” states of the junction photodetector device. Finally, two photoresponse regimes with fast and slow relaxation are also revealed in time-resolved photocurrent measurements, suggesting the important role played by charge trap states.« less
Review on the dynamics of semiconductor nanowire lasers
NASA Astrophysics Data System (ADS)
Röder, Robert; Ronning, Carsten
2018-03-01
Semiconductor optoelectronic devices have contributed tremendously to the technological progress in the past 50-60 years. Today, they also play a key role in nanophotonics stimulated by the inherent limitations of electronic integrated circuits and the growing demand for faster communications on chip. In particular, the field of ‘nanowire photonics’ has emerged including the search for coherent light sources with a nano-scaled footprint. The past decade has been dedicated to find suitable semiconductor nanowire (NW) materials for such nanolasers. Nowadays, such NW lasers consistently work at room temperature covering a huge spectral range from the ultraviolet down to the mid-infrared depending on the band gap of the NW material. Furthermore, first approaches towards the modification and optimization of such NW laser devices have been demonstrated. The underlying dynamics of the electronic and photonic NW systems have also been studied very recently, as they need to be understood in order to push the technological relevance of nano-scaled coherent light sources. Therefore, this review will first present novel measurement approaches in order to study the ultrafast temporal and optical mode dynamics of individual NW laser devices. Furthermore, these fundamental new insights are reviewed and deeply discussed towards the efficient control and adjustment of the dynamics in semiconductor NW lasers.
A Computer-Automated Temperature Control System for Semiconductor Measurements.
1979-11-01
Engineer: Jerry Silverman (RADC/ESE) temperature controller silicon devices data acquisition system mini-computer control application semiconductor dovice...characterization semiconductor materijals characterization silicon .’ AtlI EAC T 1 -fI I,,’-, *- s t ---v,.1.,,~ - d,f101h ir- IA i lr A computer...depends on the composition of the metals and the temperature of the junction. As the temperature of the junction increases so does the voltage at the
Controlled Quantum Operations of a Semiconductor Three-Qubit System
NASA Astrophysics Data System (ADS)
Li, Hai-Ou; Cao, Gang; Yu, Guo-Dong; Xiao, Ming; Guo, Guang-Can; Jiang, Hong-Wen; Guo, Guo-Ping
2018-02-01
In a specially designed semiconductor device consisting of three capacitively coupled double quantum dots, we achieve strong and tunable coupling between a target qubit and two control qubits. We demonstrate how to completely switch on and off the target qubit's coherent rotations by presetting two control qubits' states. A Toffoli gate is, therefore, possible based on these control effects. This research paves a way for realizing full quantum-logic operations in semiconductor multiqubit systems.
Optical temperature sensor using thermochromic semiconductors
Kronberg, J.W.
1996-08-20
An optical temperature measuring device utilizes thermochromic semiconductors which vary in color in response to changes in temperature. The thermochromic material is sealed in a glass matrix which allows the temperature sensor to detect high temperatures without breakdown. Cuprous oxide and cadmium sulfide are among the semiconductor materials which provide the best results. The changes in color may be detected visually or by utilizing an optical fiber and an electrical sensing circuit. 7 figs.
Low-Resistivity Zinc Selenide for Heterojunctions
NASA Technical Reports Server (NTRS)
Stirn, R. J.
1986-01-01
Magnetron reactive sputtering enables doping of this semiconductor. Proposed method of reactive sputtering combined with doping shows potential for yielding low-resistivity zinc selenide films. Zinc selenide attractive material for forming heterojunctions with other semiconductor compounds as zinc phosphide, cadmium telluride, and gallium arsenide. Semiconductor junctions promising for future optoelectronic devices, including solar cells and electroluminescent displays. Resistivities of zinc selenide layers deposited by evaporation or chemical vapor deposition too high to form practical heterojunctions.
A review of the semiconductor storage of television signals. Part 2: Applications 1975-1986
NASA Astrophysics Data System (ADS)
Riley, J. L.
1987-08-01
This is the second of two reports. In the first, the emerging semiconductor memory technology over the last two decades and some of the important operational characteristics of each ensuing generation of device are described together with the design philosophy for forming the devices into useful tools for the storage of television signals. The second of these reports describes some of the applications. These include improved television synchronizers, high quality PAL decoders, television noise reducers, film dirt concealment equipment and buffer storage for television picture processing equipment such as stills stores. The continuing developments in the technology promise still further increases of memory capacity and there is a proposal to build a mass semiconductor television picture sequence store, initially as a research tool.
Ultrathin metal-semiconductor-metal resonator for angle invariant visible band transmission filters
DOE Office of Scientific and Technical Information (OSTI.GOV)
Lee, Kyu-Tae; Seo, Sungyong; Yong Lee, Jae
We present transmission visible wavelength filters based on strong interference behaviors in an ultrathin semiconductor material between two metal layers. The proposed devices were fabricated on 2 cm × 2 cm glass substrate, and the transmission characteristics show good agreement with the design. Due to a significantly reduced light propagation phase change associated with the ultrathin semiconductor layer and the compensation in phase shift of light reflecting from the metal surface, the filters show an angle insensitive performance up to ±70°, thus, addressing one of the key challenges facing the previously reported photonic and plasmonic color filters. This principle, described in this paper, canmore » have potential for diverse applications ranging from color display devices to the image sensors.« less