Sample records for semiconductor packaging technology

  1. Apparatus and method for fabricating a microbattery

    DOEpatents

    Shul, Randy J.; Kravitz, Stanley H.; Christenson, Todd R.; Zipperian, Thomas E.; Ingersoll, David

    2002-01-01

    An apparatus and method for fabricating a microbattery that uses silicon as the structural component, packaging component, and semiconductor to reduce the weight, size, and cost of thin film battery technology is described. When combined with advanced semiconductor packaging techniques, such a silicon-based microbattery enables the fabrication of autonomous, highly functional, integrated microsystems having broad applicability.

  2. Standard semiconductor packaging for high-reliability low-cost MEMS applications

    NASA Astrophysics Data System (ADS)

    Harney, Kieran P.

    2005-01-01

    Microelectronic packaging technology has evolved over the years in response to the needs of IC technology. The fundamental purpose of the package is to provide protection for the silicon chip and to provide electrical connection to the circuit board. Major change has been witnessed in packaging and today wafer level packaging technology has further revolutionized the industry. MEMS (Micro Electro Mechanical Systems) technology has created new challenges for packaging that do not exist in standard ICs. However, the fundamental objective of MEMS packaging is the same as traditional ICs, the low cost and reliable presentation of the MEMS chip to the next level interconnect. Inertial MEMS is one of the best examples of the successful commercialization of MEMS technology. The adoption of MEMS accelerometers for automotive airbag applications has created a high volume market that demands the highest reliability at low cost. The suppliers to these markets have responded by exploiting standard semiconductor packaging infrastructures. However, there are special packaging needs for MEMS that cannot be ignored. New applications for inertial MEMS devices are emerging in the consumer space that adds the imperative of small size to the need for reliability and low cost. These trends are not unique to MEMS accelerometers. For any MEMS technology to be successful the packaging must provide the basic reliability and interconnection functions, adding the least possible cost to the product. This paper will discuss the evolution of MEMS packaging in the accelerometer industry and identify the main issues that needed to be addressed to enable the successful commercialization of the technology in the automotive and consumer markets.

  3. Standard semiconductor packaging for high-reliability low-cost MEMS applications

    NASA Astrophysics Data System (ADS)

    Harney, Kieran P.

    2004-12-01

    Microelectronic packaging technology has evolved over the years in response to the needs of IC technology. The fundamental purpose of the package is to provide protection for the silicon chip and to provide electrical connection to the circuit board. Major change has been witnessed in packaging and today wafer level packaging technology has further revolutionized the industry. MEMS (Micro Electro Mechanical Systems) technology has created new challenges for packaging that do not exist in standard ICs. However, the fundamental objective of MEMS packaging is the same as traditional ICs, the low cost and reliable presentation of the MEMS chip to the next level interconnect. Inertial MEMS is one of the best examples of the successful commercialization of MEMS technology. The adoption of MEMS accelerometers for automotive airbag applications has created a high volume market that demands the highest reliability at low cost. The suppliers to these markets have responded by exploiting standard semiconductor packaging infrastructures. However, there are special packaging needs for MEMS that cannot be ignored. New applications for inertial MEMS devices are emerging in the consumer space that adds the imperative of small size to the need for reliability and low cost. These trends are not unique to MEMS accelerometers. For any MEMS technology to be successful the packaging must provide the basic reliability and interconnection functions, adding the least possible cost to the product. This paper will discuss the evolution of MEMS packaging in the accelerometer industry and identify the main issues that needed to be addressed to enable the successful commercialization of the technology in the automotive and consumer markets.

  4. Technological and organizational diversity and technical advance in the early history of the American semiconductor industry

    NASA Astrophysics Data System (ADS)

    Cohen, W.; Holbrook, D.; Klepper, S.

    1994-06-01

    This study examines the early years of the semiconductor industry and focuses on the roles played by different size firms in technologically innovative processes. A large and diverse pool of firms participated in the growth of the industry. Three related technological areas were chosen for in-depth analysis: integrated circuits, materials technology, and device packaging. Large business producing vacuum tubes dominated the early production of semiconductor devices. As the market for new devices grew during the 1950's, new firms were founded and existing firms from other industries, e.g. aircraft builders and instrument makers, began to pursue semiconductor electronics. Small firms began to cater to the emerging industry by supplying materials and equipment. These firms contributed to the development of certain aspects of one thousand firms that were playing some part in the semiconductor industry.

  5. Synthesis of a Nano-Silver Metal Ink for Use in Thick Conductive Film Fabrication Applied on a Semiconductor Package

    PubMed Central

    Yung, Lai Chin; Fei, Cheong Choke; Mandeep, JS; Binti Abdullah, Huda; Wee, Lai Khin

    2014-01-01

    The success of printing technology in the electronics industry primarily depends on the availability of metal printing ink. Various types of commercially available metal ink are widely used in different industries such as the solar cell, radio frequency identification (RFID) and light emitting diode (LED) industries, with limited usage in semiconductor packaging. The use of printed ink in semiconductor IC packaging is limited by several factors such as poor electrical performance and mechanical strength. Poor adhesion of the printed metal track to the epoxy molding compound is another critical factor that has caused a decline in interest in the application of printing technology to the semiconductor industry. In this study, two different groups of adhesion promoters, based on metal and polymer groups, were used to promote adhesion between the printed ink and the epoxy molding substrate. The experimental data show that silver ink with a metal oxide adhesion promoter adheres better than silver ink with a polymer adhesion promoter. This result can be explained by the hydroxyl bonding between the metal oxide promoter and the silane grouping agent on the epoxy substrate, which contributes a greater adhesion strength compared to the polymer adhesion promoter. Hypotheses of the physical and chemical functions of both adhesion promoters are described in detail. PMID:24830317

  6. Synthesis of a nano-silver metal ink for use in thick conductive film fabrication applied on a semiconductor package.

    PubMed

    Yung, Lai Chin; Fei, Cheong Choke; Mandeep, Js; Binti Abdullah, Huda; Wee, Lai Khin

    2014-01-01

    The success of printing technology in the electronics industry primarily depends on the availability of metal printing ink. Various types of commercially available metal ink are widely used in different industries such as the solar cell, radio frequency identification (RFID) and light emitting diode (LED) industries, with limited usage in semiconductor packaging. The use of printed ink in semiconductor IC packaging is limited by several factors such as poor electrical performance and mechanical strength. Poor adhesion of the printed metal track to the epoxy molding compound is another critical factor that has caused a decline in interest in the application of printing technology to the semiconductor industry. In this study, two different groups of adhesion promoters, based on metal and polymer groups, were used to promote adhesion between the printed ink and the epoxy molding substrate. The experimental data show that silver ink with a metal oxide adhesion promoter adheres better than silver ink with a polymer adhesion promoter. This result can be explained by the hydroxyl bonding between the metal oxide promoter and the silane grouping agent on the epoxy substrate, which contributes a greater adhesion strength compared to the polymer adhesion promoter. Hypotheses of the physical and chemical functions of both adhesion promoters are described in detail.

  7. IEEE WMED 2016 Homepage

    Science.gov Websites

    characterization, design, and new device technologies. This workshop will consist of invited talks, contributed and Reliability Semiconductor package reliability, Design for Manufacturability, Stacked die packaging and Novel assembly processes Microelectronic Circuit Design New product design, high-speed and/or low

  8. Compact, High Power, Multi-Spectral Mid-Infrared Semiconductor Laser Package

    NASA Astrophysics Data System (ADS)

    Guo, Bujin; Hwang, Wen-Yen; Lin, Chich-Hsiang

    2001-10-01

    Through a vertically integrated effort involving atomic level material engineering, advanced device processing development, state-of-the-art optomechanical packaging, and thermal management, Applied Optoelectronics, Inc. (AOI), University of Houston (U H), and Physical Science, Inc. (PSI) have made progress in both Sb-based type-II semiconductor material and in P-based type-I laser device development. We have achieved record performance on inP based quantum cascade continuous wave (CW) laser (with more than 5 mW CW power at 210 K). Grating-coupled external-cavity quantum cascade lasers were studied for temperatures from 20 to 230 K. A tuning range of 88 nm has been obtained at 80 K. The technology can be made commercially available and represents a significant milestone with regard to the Dual Use Science and Technology (DUST) intention of fostering dual use commercial technology for defense need. AOI is the first commercial company to ship products of this licensed technology.

  9. Book of Knowledge (BOK) for NASA Electronic Packaging Roadmap

    NASA Technical Reports Server (NTRS)

    Ghaffarian, Reza

    2015-01-01

    The objective of this document is to update the NASA roadmap on packaging technologies (initially released in 2007) and to present the current trends toward further reducing size and increasing functionality. Due to the breadth of work being performed in the area of microelectronics packaging, this report presents only a number of key packaging technologies detailed in three industry roadmaps for conventional microelectronics and a more recently introduced roadmap for organic and printed electronics applications. The topics for each category were down-selected by reviewing the 2012 reports of the International Technology Roadmap for Semiconductor (ITRS), the 2013 roadmap reports of the International Electronics Manufacturing Initiative (iNEMI), the 2013 roadmap of association connecting electronics industry (IPC), the Organic Printed Electronics Association (OE-A). The report also summarizes the results of numerous articles and websites specifically discussing the trends in microelectronics packaging technologies.

  10. Integrated three-dimensional module heat exchanger for power electronics cooling

    DOEpatents

    Bennion, Kevin; Lustbader, Jason

    2013-09-24

    Embodiments discussed herein are directed to a power semiconductor packaging that removes heat from a semiconductor package through one or more cooling zones that are located in a laterally oriented position with respect to the semiconductor package. Additional embodiments are directed to circuit elements that are constructed from one or more modular power semiconductor packages.

  11. High-Temperature, Wirebondless, Ultracompact Wide Bandgap Power Semiconductor Modules

    NASA Technical Reports Server (NTRS)

    Elmes, John

    2015-01-01

    Silicon carbide (SiC) and other wide bandgap semiconductors offer great promise of high power rating, high operating temperature, simple thermal management, and ultrahigh power density for both space and commercial power electronic systems. However, this great potential is seriously limited by the lack of reliable high-temperature device packaging technology. This Phase II project developed an ultracompact hybrid power module packaging technology based on the use of double lead frames and direct lead frame-to-chip transient liquid phase (TLP) bonding that allows device operation up to 450 degC. The new power module will have a very small form factor with 3-5X reduction in size and weight from the prior art, and it will be capable of operating from 450 degC to -125 degC. This technology will have a profound impact on power electronics and energy conversion technologies and help to conserve energy and the environment as well as reduce the nation's dependence on fossil fuels.

  12. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Pease, R.L.; Shaneyfelt, M.; Winokur, P.

    The ionizing radiation response of several semiconductor process technologies has been shown to be enhanced by plastic packaging and/or pre-conditioning (burn-in). Potential mechanisms for this effect are discussed and data on bipolar linear circuits are presented.

  13. Novel Power Electronics Three-Dimensional Heat Exchanger: Preprint

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Bennion, K.; Cousineau, J.; Lustbader, J.

    2014-08-01

    Electric drive systems for vehicle propulsion enable technologies critical to meeting challenges for energy, environmental, and economic security. Enabling cost-effective electric drive systems requires reductions in inverter power semiconductor area. As critical components of the electric drive system are made smaller, heat removal becomes an increasing challenge. In this paper, we demonstrate an integrated approach to the design of thermal management systems for power semiconductors that matches the passive thermal resistance of the packaging with the active convective cooling performance of the heat exchanger. The heat exchanger concept builds on existing semiconductor thermal management improvements described in literature and patents,more » which include improved bonded interface materials, direct cooling of the semiconductor packages, and double-sided cooling. The key difference in the described concept is the achievement of high heat transfer performance with less aggressive cooling techniques by optimizing the passive and active heat transfer paths. An extruded aluminum design was selected because of its lower tooling cost, higher performance, and scalability in comparison to cast aluminum. Results demonstrated a heat flux improvement of a factor of two, and a package heat density improvement over 30%, which achieved the thermal performance targets.« less

  14. Semiconductor Cubing

    NASA Technical Reports Server (NTRS)

    1996-01-01

    Through Goddard Space Flight Center and Jet Propulsion Laboratory Small Business Innovation Research contracts, Irvine Sensors developed a three-dimensional memory system for a spaceborne data recorder and other applications for NASA. From these contracts, the company created the Memory Short Stack product, a patented technology for stacking integrated circuits that offers higher processing speeds and levels of integration, and lower power requirements. The product is a three-dimensional semiconductor package in which dozens of integrated circuits are stacked upon each other to form a cube. The technology is being used in various computer and telecommunications applications.

  15. Enhanced thermaly managed packaging for III-nitride light emitters

    NASA Astrophysics Data System (ADS)

    Kudsieh, Nicolas

    In this Dissertation our work on `enhanced thermally managed packaging of high power semiconductor light sources for solid state lighting (SSL)' is presented. The motivation of this research and development is to design thermally high stable cost-efficient packaging of single and multi-chip arrays of III-nitrides wide bandgap semiconductor light sources through mathematical modeling and simulations. Major issues linked with this technology are device overheating which causes serious degradation in their illumination intensity and decrease in the lifetime. In the introduction the basics of III-nitrides WBG semiconductor light emitters are presented along with necessary thermal management of high power cingulated and multi-chip LEDs and laser diodes. This work starts at chip level followed by its extension to fully packaged lighting modules and devices. Different III-nitride structures of multi-quantum well InGaN/GaN and AlGaN/GaN based LEDs and LDs were analyzed using advanced modeling and simulation for different packaging designs and high thermal conductivity materials. Study started with basic surface mounted devices using conventional packaging strategies and was concluded with the latest thermal management of chip-on-plate (COP) method. Newly discovered high thermal conductivity materials have also been incorporated for this work. Our study also presents the new approach of 2D heat spreaders using such materials for SSL and micro LED array packaging. Most of the work has been presented in international conferences proceedings and peer review journals. Some of the latest work has also been submitted to well reputed international journals which are currently been reviewed for publication. .

  16. A Survey of Electronics Obsolescence and Reliability

    DTIC Science & Technology

    2010-07-01

    properties but there are many minor and major variations (e.g. curing schedule) affecting their usage in packaging processes and in reworking. Curing...within them. Electronic obsolescence is increasingly associated with physical characteristics that reduce component and system reliability, both in usage ...semiconductor technologies and of electronic systems, both in usage and in storage. By design, electronics technologies include few reliability margins

  17. Radiation Testing, Characterization and Qualification Challenges for Modern Microelectronics and Photonics Devices and Technologies

    NASA Technical Reports Server (NTRS)

    LaBel, Kenneth A.; Cohn, Lewis M.

    2008-01-01

    At an earlier conference we discussed a selection of the challenges for radiation testing of modern semiconductor devices focusing on state-of-the-art CMOS technologies. In this presentation, we extend this discussion focusing on the following areas: (1) Device packaging, (2) Evolving physical single even upset mechanisms, (3) Device complexity, and (4) the goal of understanding the limitations and interpretation of radiation testing results.

  18. High-Temperature Electronics: A Role for Wide Bandgap Semiconductors?

    NASA Technical Reports Server (NTRS)

    Neudeck, Philip G.; Okojie, Robert S.; Chen, Liang-Yu

    2002-01-01

    It is increasingly recognized that semiconductor based electronics that can function at ambient temperatures higher than 150 C without external cooling could greatly benefit a variety of important applications, especially-in the automotive, aerospace, and energy production industries. The fact that wide bandgap semiconductors are capable of electronic functionality at much higher temperatures than silicon has partially fueled their development, particularly in the case of SiC. It appears unlikely that wide bandgap semiconductor devices will find much use in low-power transistor applications until the ambient temperature exceeds approximately 300 C, as commercially available silicon and silicon-on-insulator technologies are already satisfying requirements for digital and analog very large scale integrated circuits in this temperature range. However, practical operation of silicon power devices at ambient temperatures above 200 C appears problematic, as self-heating at higher power levels results in high internal junction temperatures and leakages. Thus, most electronic subsystems that simultaneously require high-temperature and high-power operation will necessarily be realized using wide bandgap devices, once the technology for realizing these devices become sufficiently developed that they become widely available. Technological challenges impeding the realization of beneficial wide bandgap high ambient temperature electronics, including material growth, contacts, and packaging, are briefly discussed.

  19. High density circuit technology, part 3

    NASA Technical Reports Server (NTRS)

    Wade, T. E.

    1982-01-01

    Dry processing - both etching and deposition - and present/future trends in semiconductor technology are discussed. In addition to a description of the basic apparatus, terminology, advantages, glow discharge phenomena, gas-surface chemistries, and key operational parameters for both dry etching and plasma deposition processes, a comprehensive survey of dry processing equipment (via vendor listing) is also included. The following topics are also discussed: fine-line photolithography, low-temperature processing, packaging for dense VLSI die, the role of integrated optics, and VLSI and technology innovations.

  20. Study of the Fracture Mechanisms of Electroplated Metallization Systems Using In Situ Microtension Test

    NASA Astrophysics Data System (ADS)

    Msolli, Sabeur; Kim, Heung Soo

    2018-07-01

    This framework assesses the mechanical behavior of some potential thin/thick metallization systems in use as either ohmic contacts for diamond semi-conductors or for metallization on copper double bounded ceramic substrates present in the next-generation power electronics packaging. The interesting and unique characteristic of this packaging is the use of diamond as a semi-conductor material instead of silicon to increase the lifetime of embedded power converters for use in aeronautical applications. Theoretically, such packaging is able to withstand temperatures of up to 300 °C without breaking the semi-conductor, provided that the constitutive materials of the packaging are compatible. Metallization is very important to protect the chips and substrates. Therefore, we address this issue in the present work. The tested metallization systems are Ni/Au, Ni/Cr/Au and Ni/Cr. These specific systems were studied since they can be used in conjunction with existing bonding technologies, including AuGe soldering, Ag-In Transient liquid Phase Bonding and silver nanoparticle sintering. The metallization is achieved via electrodeposition, and a mechanical test, consisting of a microtension technique, is carried out at room temperature inside a scanning electron microscopy chamber. The technique permits observations the cracks initiation and growth in the metallization to locate the deformation zones and identify the fracture mechanisms. Different failure mechanisms were shown to occur depending on the metallic layers deposited on top of the copper substrate. The density of these cracks depends on the imposed load and the involved metallization. These observations will help choose the metallization that is compatible with the particular bonding material, and manage mechanical stress due to thermal cycling so that they can be used as a constitutive component for high-temperature power electronics packaging.

  1. Study of the Fracture Mechanisms of Electroplated Metallization Systems Using In Situ Microtension Test

    NASA Astrophysics Data System (ADS)

    Msolli, Sabeur; Kim, Heung Soo

    2018-03-01

    This framework assesses the mechanical behavior of some potential thin/thick metallization systems in use as either ohmic contacts for diamond semi-conductors or for metallization on copper double bounded ceramic substrates present in the next-generation power electronics packaging. The interesting and unique characteristic of this packaging is the use of diamond as a semi-conductor material instead of silicon to increase the lifetime of embedded power converters for use in aeronautical applications. Theoretically, such packaging is able to withstand temperatures of up to 300 °C without breaking the semi-conductor, provided that the constitutive materials of the packaging are compatible. Metallization is very important to protect the chips and substrates. Therefore, we address this issue in the present work. The tested metallization systems are Ni/Au, Ni/Cr/Au and Ni/Cr. These specific systems were studied since they can be used in conjunction with existing bonding technologies, including AuGe soldering, Ag-In Transient liquid Phase Bonding and silver nanoparticle sintering. The metallization is achieved via electrodeposition, and a mechanical test, consisting of a microtension technique, is carried out at room temperature inside a scanning electron microscopy chamber. The technique permits observations the cracks initiation and growth in the metallization to locate the deformation zones and identify the fracture mechanisms. Different failure mechanisms were shown to occur depending on the metallic layers deposited on top of the copper substrate. The density of these cracks depends on the imposed load and the involved metallization. These observations will help choose the metallization that is compatible with the particular bonding material, and manage mechanical stress due to thermal cycling so that they can be used as a constitutive component for high-temperature power electronics packaging.

  2. PICSiP: new system-in-package technology using a high bandwidth photonic interconnection layer for converged microsystems

    NASA Astrophysics Data System (ADS)

    Tekin, Tolga; Töpper, Michael; Reichl, Herbert

    2009-05-01

    Technological frontiers between semiconductor technology, packaging, and system design are disappearing. Scaling down geometries [1] alone does not provide improvement of performance, less power, smaller size, and lower cost. It will require "More than Moore" [2] through the tighter integration of system level components at the package level. System-in-Package (SiP) will deliver the efficient use of three dimensions (3D) through innovation in packaging and interconnect technology. A key bottleneck to the implementation of high-performance microelectronic systems, including SiP, is the lack of lowlatency, high-bandwidth, and high density off-chip interconnects. Some of the challenges in achieving high-bandwidth chip-to-chip communication using electrical interconnects include the high losses in the substrate dielectric, reflections and impedance discontinuities, and susceptibility to crosstalk [3]. Obviously, the incentive for the use of photonics to overcome the challenges and leverage low-latency and highbandwidth communication will enable the vision of optical computing within next generation architectures. Supercomputers of today offer sustained performance of more than petaflops, which can be increased by utilizing optical interconnects. Next generation computing architectures are needed with ultra low power consumption; ultra high performance with novel interconnection technologies. In this paper we will discuss a CMOS compatible underlying technology to enable next generation optical computing architectures. By introducing a new optical layer within the 3D SiP, the development of converged microsystems, deployment for next generation optical computing architecture will be leveraged.

  3. Body of Knowledge (BOK) for Copper Wire Bonds

    NASA Technical Reports Server (NTRS)

    Rutkowski, E.; Sampson, M. J.

    2015-01-01

    Copper wire bonds have replaced gold wire bonds in the majority of commercial semiconductor devices for the latest technology nodes. Although economics has been the driving mechanism to lower semiconductor packaging costs for a savings of about 20% by replacing gold wire bonds with copper, copper also has materials property advantages over gold. When compared to gold, copper has approximately: 25% lower electrical resistivity, 30% higher thermal conductivity, 75% higher tensile strength and 45% higher modulus of elasticity. Copper wire bonds on aluminum bond pads are also more mechanically robust over time and elevated temperature due to the slower intermetallic formation rate - approximately 1/100th that of the gold to aluminum intermetallic formation rate. However, there are significant tradeoffs with copper wire bonding - copper has twice the hardness of gold which results in a narrower bonding manufacturing process window and requires that the semiconductor companies design more mechanically rigid bonding pads to prevent cratering to both the bond pad and underlying chip structure. Furthermore, copper is significantly more prone to corrosion issues. The semiconductor packaging industry has responded to this corrosion concern by creating a palladium coated copper bonding wire, which is more corrosion resistant than pure copper bonding wire. Also, the selection of the device molding compound is critical because use of environmentally friendly green compounds can result in internal CTE (Coefficient of Thermal Expansion) mismatches with the copper wire bonds that can eventually lead to device failures during thermal cycling. Despite the difficult problems associated with the changeover to copper bonding wire, there are billions of copper wire bonded devices delivered annually to customers. It is noteworthy that Texas Instruments announced in October of 2014 that they are shipping microcircuits containing copper wire bonds for safety critical automotive applications. An evaluation of copper wire bond technology for applicability to spaceflight hardware may be warranted along with concurrently compiling a comprehensive understanding of the failure mechanisms involved with copper wire bonded semiconductor devices.

  4. High-Performance Power-Semiconductor Packages

    NASA Technical Reports Server (NTRS)

    Renz, David; Hansen, Irving; Berman, Albert

    1989-01-01

    A 600-V, 50-A transistor and 1,200-V, 50-A diode in rugged, compact, lightweight packages intended for use in inverter-type power supplies having switching frequencies up to 20 kHz. Packages provide low-inductance connections, low loss, electrical isolation, and long-life hermetic seal. Low inductance achieved by making all electrical connections to each package on same plane. Also reduces high-frequency losses by reducing coupling into inherent shorted turns in packaging material around conductor axes. Stranded internal power conductors aid conduction at high frequencies, where skin effect predominates. Design of packages solves historical problem of separation of electrical interface from thermal interface of high-power semiconductor device.

  5. Sintered silver joints via controlled topography of electronic packaging subcomponents

    DOEpatents

    Wereszczak, Andrew A.

    2014-09-02

    Disclosed are sintered silver bonded electronic package subcomponents and methods for making the same. Embodiments of the sintered silver bonded EPSs include topography modification of one or more metal surfaces of semiconductor devices bonded together by the sintered silver joint. The sintered silver bonded EPSs include a first semiconductor device having a first metal surface, the first metal surface having a modified topography that has been chemically etched, grit blasted, uniaxial ground and/or grid sliced connected to a second semiconductor device which may also include a first metal surface with a modified topography, a silver plating layer on the first metal surface of the first semiconductor device and a silver plating layer on the first metal surface of the second semiconductor device and a sintered silver joint between the silver plating layers of the first and second semiconductor devices which bonds the first semiconductor device to the second semiconductor device.

  6. Advanced CMOS Radiation Effects Testing and Analysis

    NASA Technical Reports Server (NTRS)

    Pellish, J. A.; Marshall, P. W.; Rodbell, K. P.; Gordon, M. S.; LaBel, K. A.; Schwank, J. R.; Dodds, N. A.; Castaneda, C. M.; Berg, M. D.; Kim, H. S.; hide

    2014-01-01

    Presentation at the annual NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop (ETW). The material includes an update of progress in this NEPP task area over the past year, which includes testing, evaluation, and analysis of radiation effects data on the IBM 32 nm silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) process. The testing was conducted using test vehicles supplied by directly by IBM.

  7. The relationship between spontaneous abortion and female workers in the semiconductor industry.

    PubMed

    Kim, Heechan; Kwon, Ho-Jang; Rhie, Jeongbae; Lim, Sinye; Kang, Yun-Dan; Eom, Sang-Yong; Lim, Hyungryul; Myong, Jun-Pyo; Roh, Sangchul

    2017-01-01

    This study investigated the relationship between job type and the risk for spontaneous abortion to assess the reproductive toxicity of female workers in the semiconductor industry. A questionnaire survey was administered to current female workers of two semiconductor manufacturing plants in Korea. We included female workers who became pregnant at least 6 months after the start of their employment with the company. The pregnancy outcomes of 2,242 female workers who experienced 4,037 pregnancies were investigated. Personnel records were used to assign the subjects to one of three groups: fabrication process workers, packaging process workers, and clerical workers. To adjust for within-person correlations between pregnancies, a generalized estimating equation was used. The logistic regression analysis was limited to the first pregnancy after joining the company to satisfy the assumption of independence among pregnancies. Moreover, we stratified the analysis by time period (pregnancy in the years prior to 2008 vs. after 2009) to reflect differences in occupational exposure based on semiconductor production periods. The risk for spontaneous abortion in female semiconductor workers was not significantly higher for fabrication and packaging process workers than for clerical workers. However, when we stratified by time period, the odds ratio for spontaneous abortion was significantly higher for packaging process workers who became pregnant prior to 2008 when compared with clerical workers (odds ratio: 2.21; 95% confidence interval: 1.01-4.81). When examining the pregnancies of female semiconductor workers that occurred prior to 2008, packaging process workers showed a significantly higher risk for spontaneous abortions than did clerical workers. The two semiconductor production periods in our study (prior to 2008 vs. after 2009) had different automated processes, chemical exposure levels, and working environments. Thus, the conditions prior to 2008 may have increased the risk for spontaneous abortions in packaging process workers in the semiconductor industry.

  8. Enabling More than Moore: Accelerated Reliability Testing and Risk Analysis for Advanced Electronics Packaging

    NASA Technical Reports Server (NTRS)

    Ghaffarian, Reza; Evans, John W.

    2014-01-01

    For five decades, the semiconductor industry has distinguished itself by the rapid pace of improvement in miniaturization of electronics products-Moore's Law. Now, scaling hits a brick wall, a paradigm shift. The industry roadmaps recognized the scaling limitation and project that packaging technologies will meet further miniaturization needs or ak.a "More than Moore". This paper presents packaging technology trends and accelerated reliability testing methods currently being practiced. Then, it presents industry status on key advanced electronic packages, factors affecting accelerated solder joint reliability of area array packages, and IPC/JEDEC/Mil specifications for characterizations of assemblies under accelerated thermal and mechanical loading. Finally, it presents an examples demonstrating how Accelerated Testing and Analysis have been effectively employed in the development of complex spacecraft thereby reducing risk. Quantitative assessments necessarily involve the mathematics of probability and statistics. In addition, accelerated tests need to be designed which consider the desired risk posture and schedule for particular project. Such assessments relieve risks without imposing additional costs. and constraints that are not value added for a particular mission. Furthermore, in the course of development of complex systems, variances and defects will inevitably present themselves and require a decision concerning their disposition, necessitating quantitative assessments. In summary, this paper presents a comprehensive view point, from technology to systems, including the benefits and impact of accelerated testing in offsetting risk.

  9. Radiation Testing, Characterization and Qualification Challenges for Modern Microelectronics and Photonics Devices and Technologies

    NASA Technical Reports Server (NTRS)

    LaBel, Kenneth A.; Cohn, Lewis M.

    2008-01-01

    At GOMAC 2007, we discussed a selection of the challenges for radiation testing of modern semiconductor devices focusing on state-of-the-art memory technologies. This included FLASH non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs). In this presentation, we extend this discussion in device packaging and complexity as well as single event upset (SEU) mechanisms using several technology areas as examples including: system-on-a-chip (SOC) devices and photonic or fiber optic systems. The underlying goal is intended to provoke thought for understanding the limitations and interpretation of radiation testing results.

  10. Technology-design-manufacturing co-optimization for advanced mobile SoCs

    NASA Astrophysics Data System (ADS)

    Yang, Da; Gan, Chock; Chidambaram, P. R.; Nallapadi, Giri; Zhu, John; Song, S. C.; Xu, Jeff; Yeap, Geoffrey

    2014-03-01

    How to maintain the Moore's Law scaling beyond the 193 immersion resolution limit is the key question semiconductor industry needs to answer in the near future. Process complexity will undoubtfully increase for 14nm node and beyond, which brings both challenges and opportunities for technology development. A vertically integrated design-technologymanufacturing co-optimization flow is desired to better address the complicated issues new process changes bring. In recent years smart mobile wireless devices have been the fastest growing consumer electronics market. Advanced mobile devices such as smartphones are complex systems with the overriding objective of providing the best userexperience value by harnessing all the technology innovations. Most critical system drivers are better system performance/power efficiency, cost effectiveness, and smaller form factors, which, in turns, drive the need of system design and solution with More-than-Moore innovations. Mobile system-on-chips (SoCs) has become the leading driver for semiconductor technology definition and manufacturing. Here we highlight how the co-optimization strategy influenced architecture, device/circuit, process technology and package, in the face of growing process cost/complexity and variability as well as design rule restrictions.

  11. Effects of radiation and temperature on gallium nitride (GaN) metal-semiconductor-metal ultraviolet photodetectors

    NASA Astrophysics Data System (ADS)

    Chiamori, Heather C.; Angadi, Chetan; Suria, Ateeq; Shankar, Ashwin; Hou, Minmin; Bhattacharya, Sharmila; Senesky, Debbie G.

    2014-06-01

    The development of radiation-hardened, temperature-tolerant materials, sensors and electronics will enable lightweight space sub-systems (reduced packaging requirements) with increased operation lifetimes in extreme harsh environments such as those encountered during space exploration. Gallium nitride (GaN) is a ceramic, semiconductor material stable within high-radiation, high-temperature and chemically corrosive environments due to its wide bandgap (3.4 eV). These material properties can be leveraged for ultraviolet (UV) wavelength photodetection. In this paper, current results of GaN metal-semiconductor-metal (MSM) UV photodetectors behavior after irradiation up to 50 krad and temperatures of 15°C to 150°C is presented. These initial results indicate that GaN-based sensors can provide robust operation within extreme harsh environments. Future directions for GaN-based photodetector technology for down-hole, automotive and space exploration applications are also discussed.

  12. Space station power semiconductor package

    NASA Technical Reports Server (NTRS)

    Balodis, Vilnis; Berman, Albert; Devance, Darrell; Ludlow, Gerry; Wagner, Lee

    1987-01-01

    A package of high-power switching semiconductors for the space station have been designed and fabricated. The package includes a high-voltage (600 volts) high current (50 amps) NPN Fast Switching Power Transistor and a high-voltage (1200 volts), high-current (50 amps) Fast Recovery Diode. The package features an isolated collector for the transistors and an isolated anode for the diode. Beryllia is used as the isolation material resulting in a thermal resistance for both devices of .2 degrees per watt. Additional features include a hermetical seal for long life -- greater than 10 years in a space environment. Also, the package design resulted in a low electrical energy loss with the reduction of eddy currents, stray inductances, circuit inductance, and capacitance. The required package design and device parameters have been achieved. Test results for the transistor and diode utilizing the space station package is given.

  13. SEMICONDUCTOR TECHNOLOGY: Wafer level hermetic packaging based on Cu-Sn isothermal solidification technology

    NASA Astrophysics Data System (ADS)

    Yuhan, Cao; Le, Luo

    2009-08-01

    A novel wafer level bonding method based on Cu-Sn isothermal solidification technology is established. A multi-layer sealing ring and the bonding processing are designed, and the amount of solder and the bonding parameters are optimized based on both theoretical and experimental results. Verification shows that oxidation of the solder layer, voids and the scalloped-edge appearance of the Cu6Sn5 phase are successfully avoided. An average shear strength of 19.5 MPa and an excellent leak rate of around 1.9 × 10-9 atm cc/s are possible, meeting the demands of MIL-STD-883E.

  14. Reliability Analysis/Assessment of Advanced Technologies

    DTIC Science & Technology

    1990-05-01

    34, Reliability Physics 1980 , IEEE, p. 165. 25. RADC-TR-83-244. 26. Towner, Janet M., et. al., "Aluminum Electromigration Under Pulsed D.C. Conditions...Duvvury, Redwine, Kitagawa, Haas, Chuang, Beydler, Hyslop , "Impact of Hot Carriers On DRAM circuits", 1987 IEEE/IRPS. 58. Cahoon, Thornewell, Tsai...et. a]., "Substrate for Large Silicon Chip and Full Wafer Packaging", Semiconductor International, pp. 149-156, April 1980 . 5. T.E. Lewis and D.L

  15. New developments on high-efficiency infrared and InGaAlP light-emitting diodes at OSRAM Opto Semiconductors

    NASA Astrophysics Data System (ADS)

    Broell, Markus; Sundgren, Petrus; Rudolph, Andreas; Schmid, Wolfgang; Vogl, Anton; Behringer, Martin

    2014-02-01

    We present our latest results on developments of infrared and red light emitting diodes. Both chiptypes are based on the Thinfilm technology. For infrared the brightness has been raised by 25% with respect to former products in a package with standard silicon casting, corresponding to a brightness increase of 33% for the bare chip. In a lab package a wallplug efficiency of more than 72% at a wavelength of 850nm could be reached. For red InGaAlP LEDs we could demonstrate a light output in excess of 200lm/W and a brightness of 133lm at a typical operating current of 350mA.

  16. High-power microwave LDMOS transistors for wireless data transmission technologies (Review)

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Kuznetsov, E. V., E-mail: E.Kouzntsov@tcen.ru; Shemyakin, A. V.

    The fields of the application, structure, fabrication, and packaging technology of high-power microwave LDMOS transistors and the main advantages of these devices were analyzed. Basic physical parameters and some technology factors were matched for optimum device operation. Solid-state microwave electronics has been actively developed for the last 10-15 years. Simultaneously with improvement of old devices, new devices and structures are actively being adopted and developed and new semiconductor materials are being commercialized. Microwave LDMOS technology is in demand in such fields as avionics, civil and military radars, repeaters, base stations of cellular communication systems, television and broadcasting transmitters, and transceiversmore » for high-speed wireless computer networks (promising Wi-Fi and Wi-Max standards).« less

  17. Emission factors of air toxics from semiconductor manufacturing in Korea.

    PubMed

    Eom, Yun-Sung; Hong, Ji-Hyung; Lee, Suk-Jo; Lee, Eun-Jung; Cha, Jun-Seok; Lee, Dae-Gyun; Bang, Sun-Ae

    2006-11-01

    The development of local, accurate emission factors is very important for the estimation of reliable national emissions and air quality management. For that, this study is performed for pollutants released to the atmosphere with source-specific emission tests from the semiconductor manufacturing industry. The semiconductor manufacturing industry is one of the major sources of air toxics or hazardous air pollutants (HAPs); thus, understanding the emission characteristics of the emission source is a very important factor in the development of a control strategy. However, in Korea, there is a general lack of information available on air emissions from the semiconductor industry. The major emission sources of air toxics examined from the semiconductor manufacturing industry were wet chemical stations, coating applications, gaseous operations, photolithography, and miscellaneous devices in the wafer fabrication and semiconductor packaging processes. In this study, analyses of emission characteristics, and the estimations of emission data and factors for air toxics, such as acids, bases, heavy metals, and volatile organic compounds from the semiconductor manufacturing process have been performed. The concentration of hydrogen chloride from the packaging process was the highest among all of the processes. In addition, the emission factor of total volatile organic compounds (TVOCs) for the packaging process was higher than that of the wafer fabrication process. Emission factors estimated in this study were compared with those of Taiwan for evaluation, and they were found to be of similar level in the case of TVOCs and fluorine compounds.

  18. Packaging Technology Developed for High-Temperature Silicon Carbide Microsystems

    NASA Technical Reports Server (NTRS)

    Chen, Liang-Yu; Hunter, Gary W.; Neudeck, Philip G.

    2001-01-01

    High-temperature electronics and sensors are necessary for harsh-environment space and aeronautical applications, such as sensors and electronics for space missions to the inner solar system, sensors for in situ combustion and emission monitoring, and electronics for combustion control for aeronautical and automotive engines. However, these devices cannot be used until they can be packaged in appropriate forms for specific applications. Suitable packaging technology for operation temperatures up to 500 C and beyond is not commercially available. Thus, the development of a systematic high-temperature packaging technology for SiC-based microsystems is essential for both in situ testing and commercializing high-temperature SiC sensors and electronics. In response to these needs, researchers at Glenn innovatively designed, fabricated, and assembled a new prototype electronic package for high-temperature electronic microsystems using ceramic substrates (aluminum nitride and aluminum oxide) and gold (Au) thick-film metallization. Packaging components include a ceramic packaging frame, thick-film metallization-based interconnection system, and a low electrical resistance SiC die-attachment scheme. Both the materials and fabrication process of the basic packaging components have been tested with an in-house-fabricated SiC semiconductor test chip in an oxidizing environment at temperatures from room temperature to 500 C for more than 1000 hr. These test results set lifetime records for both high-temperature electronic packaging and high-temperature electronic device testing. As required, the thick-film-based interconnection system demonstrated low (2.5 times of the room-temperature resistance of the Au conductor) and stable (decreased 3 percent in 1500 hr of continuous testing) electrical resistance at 500 C in an oxidizing environment. Also as required, the electrical isolation impedance between printed wires that were not electrically joined by a wire bond remained high (greater than 0.4 GW) at 500 C in air. The attached SiC diode demonstrated low (less than 3.8 W/mm2) and relatively consistent dynamic resistance from room temperature to 500 C. These results indicate that the prototype package and the compatible die-attach scheme meet the initial design standards for high-temperature, low-power, and long-term operation. This technology will be further developed and evaluated, especially with more mechanical tests of each packaging element for operation at higher temperatures and longer lifetimes.

  19. High- k Gate Dielectrics for Emerging Flexible and Stretchable Electronics.

    PubMed

    Wang, Binghao; Huang, Wei; Chi, Lifeng; Al-Hashimi, Mohammed; Marks, Tobin J; Facchetti, Antonio

    2018-05-22

    Recent advances in flexible and stretchable electronics (FSE), a technology diverging from the conventional rigid silicon technology, have stimulated fundamental scientific and technological research efforts. FSE aims at enabling disruptive applications such as flexible displays, wearable sensors, printed RFID tags on packaging, electronics on skin/organs, and Internet-of-things as well as possibly reducing the cost of electronic device fabrication. Thus, the key materials components of electronics, the semiconductor, the dielectric, and the conductor as well as the passive (substrate, planarization, passivation, and encapsulation layers) must exhibit electrical performance and mechanical properties compatible with FSE components and products. In this review, we summarize and analyze recent advances in materials concepts as well as in thin-film fabrication techniques for high- k (or high-capacitance) gate dielectrics when integrated with FSE-compatible semiconductors such as organics, metal oxides, quantum dot arrays, carbon nanotubes, graphene, and other 2D semiconductors. Since thin-film transistors (TFTs) are the key enablers of FSE devices, we discuss TFT structures and operation mechanisms after a discussion on the needs and general requirements of gate dielectrics. Also, the advantages of high- k dielectrics over low- k ones in TFT applications were elaborated. Next, after presenting the design and properties of high- k polymers and inorganic, electrolyte, and hybrid dielectric families, we focus on the most important fabrication methodologies for their deposition as TFT gate dielectric thin films. Furthermore, we provide a detailed summary of recent progress in performance of FSE TFTs based on these high- k dielectrics, focusing primarily on emerging semiconductor types. Finally, we conclude with an outlook and challenges section.

  20. Wafer-Level Vacuum Packaging of Smart Sensors.

    PubMed

    Hilton, Allan; Temple, Dorota S

    2016-10-31

    The reach and impact of the Internet of Things will depend on the availability of low-cost, smart sensors-"low cost" for ubiquitous presence, and "smart" for connectivity and autonomy. By using wafer-level processes not only for the smart sensor fabrication and integration, but also for packaging, we can further greatly reduce the cost of sensor components and systems as well as further decrease their size and weight. This paper reviews the state-of-the-art in the wafer-level vacuum packaging technology of smart sensors. We describe the processes needed to create the wafer-scale vacuum microchambers, focusing on approaches that involve metal seals and that are compatible with the thermal budget of complementary metal-oxide semiconductor (CMOS) integrated circuits. We review choices of seal materials and structures that are available to a device designer, and present techniques used for the fabrication of metal seals on device and window wafers. We also analyze the deposition and activation of thin film getters needed to maintain vacuum in the ultra-small chambers, and the wafer-to-wafer bonding processes that form the hermetic seal. We discuss inherent trade-offs and challenges of each seal material set and the corresponding bonding processes. Finally, we identify areas for further research that could help broaden implementations of the wafer-level vacuum packaging technology.

  1. Wafer-Level Vacuum Packaging of Smart Sensors

    PubMed Central

    Hilton, Allan; Temple, Dorota S.

    2016-01-01

    The reach and impact of the Internet of Things will depend on the availability of low-cost, smart sensors—“low cost” for ubiquitous presence, and “smart” for connectivity and autonomy. By using wafer-level processes not only for the smart sensor fabrication and integration, but also for packaging, we can further greatly reduce the cost of sensor components and systems as well as further decrease their size and weight. This paper reviews the state-of-the-art in the wafer-level vacuum packaging technology of smart sensors. We describe the processes needed to create the wafer-scale vacuum microchambers, focusing on approaches that involve metal seals and that are compatible with the thermal budget of complementary metal-oxide semiconductor (CMOS) integrated circuits. We review choices of seal materials and structures that are available to a device designer, and present techniques used for the fabrication of metal seals on device and window wafers. We also analyze the deposition and activation of thin film getters needed to maintain vacuum in the ultra-small chambers, and the wafer-to-wafer bonding processes that form the hermetic seal. We discuss inherent trade-offs and challenges of each seal material set and the corresponding bonding processes. Finally, we identify areas for further research that could help broaden implementations of the wafer-level vacuum packaging technology. PMID:27809249

  2. Platform technologies for hybrid optoelectronic integration and packaging

    NASA Astrophysics Data System (ADS)

    Datta, Madhumita

    In order to bring fiber-optics closer to individual home and business services, the optical network components have to be inexpensive and reliable. Integration and packaging of optoelectronic devices holds the key to high-volume low-cost component manufacturing. The goal of this dissertation is to propose, study, and demonstrate various ways to integrate optoelectronic devices on a packaging platform to implement cost-effective, functional optical modules. Two types of hybrid integration techniques have been proposed: flip-chip solder bump bonding for high-density two-dimensional array packaging of surface-emitting devices, and solder preform bonding for fiber-coupled edge-emitting semiconductor devices. For flip-chip solder bump bonding, we developed a simple, inexpensive remetallization process called "electroless plating", which converts the aluminum bond pads of foundry-made complementary metal oxide semiconductor (CMOS) chips into solder-bondable and wire-bondable gold surfaces. We have applied for a patent on this remetallization technique. For fiber-pigtailed edge-emitting laser modules, we have studied the coupling characteristics of different types of lensed single-mode fibers including semispherically lensed fiber, cylindrically lensed fiber and conically lensed fiber. We have experimentally demonstrated 66% coupling efficiency with semispherically lensed fiber and 50% efficiency with conically lensed fibers. We have proposed and designed a packaging platform on which lensed fibers can be actively aligned to a laser and solder-attached reliably to the platform so that the alignment is retained. We have designed thin-film nichrome heaters on fused quartz platforms as local heat source to facilitate on-board solder alignment and attachment of fiber. The thermal performance of the heaters was simulated using finite element analysis tool ANSYS prior to fabrication. Using the heater's reworkability advantage, we have estimated the shift of the fiber due to solder shrinkage and introduced a pre-correction in the alignment process to restore optimum coupling efficiency close to 50% with conically lensed fibers. We have applied for a patent on this unique active alignment method through the University of Maryland's Technology Commercialization Office. Although we have mostly concentrated on active alignment platforms, we have proposed the idea of combining the passive alignment advantages of silicon optical benches to the on-board heater-assisted active alignment technique. This passive-active alignment process has the potential of cost-effective array packaging of edge-emitting devices.

  3. Power module packaging with double sided planar interconnection and heat exchangers

    DOEpatents

    Liang, Zhenxian; Marlino, Laura D.; Ning, Puqi; Wang, Fei

    2015-05-26

    A double sided cooled power module package having a single phase leg topology includes two IGBT and two diode semiconductor dies. Each IGBT die is spaced apart from a diode semiconductor die, forming a switch unit. Two switch units are placed in a planar face-up and face-down configuration. A pair of DBC or other insulated metallic substrates is affixed to each side of the planar phase leg semiconductor dies to form a sandwich structure. Attachment layers are disposed on outer surfaces of the substrates and two heat exchangers are affixed to the substrates by rigid bond layers. The heat exchangers, made of copper or aluminum, have passages for carrying coolant. The power package is manufactured in a two-step assembly and heating process where direct bonds are formed for all bond layers by soldering, sintering, solid diffusion bonding or transient liquid diffusion bonding, with a specially designed jig and fixture.

  4. Next generation DIRCM for 2.1-2.3 micron wavelength based on direct-diode GaSb technology

    NASA Astrophysics Data System (ADS)

    Dvinelis, Edgaras; Naujokaitė, Greta; Greibus, Mindaugas; Trinkūnas, Augustinas; Vizbaras, Kristijonas; Vizbaras, Augustinas

    2018-02-01

    Continuous advances in low-cost MANPAD heat-seeking missile technology over the past 50 years remains the number one hostile threat to airborne platforms globally responsible for over 60 % of casualties. Laser based directional countermeasure (DIRCM) technology have been deployed to counter the threat. Ideally, a laser based DIRCM system must involve a number of lasers emitting at different spectral bands mimicking the spectral signature of the airborne platform. Up to now, near and mid infrared spectral bands have been covered with semiconductor laser technology and only SWIR band remained with bulky fiber laser technology. Recent technology developments on direct-diode GaSb laser technology at Brolis Semiconductors offer a replacement for the fiber laser source leading to significant improvements by few orders of magnitude in weight, footprint, efficiency and cost. We demonstrate that with careful engineering, several multimode emitters can be combined to provide a directional laser beam with radiant intensity from 10 kW/sr to 60 kW/sr in an ultra-compact hermetic package with weight < 30 g and overall efficiency of 15 % in the 2.1- 2.3 micron spectral band offering 150 times improvement in efficiency and reduction in footprint. We will discuss present results, challenges and future developments for such next-generation integrated direct diode DIRCM modules for SWIR band.

  5. Hybrid semiconductor fiber lasers for telecommunications

    NASA Astrophysics Data System (ADS)

    Khalili, Alireza

    2006-12-01

    Highly stable edge emitting semiconductor lasers are of utmost importance in most telecommunications applications where high-speed data transmission sets strict limits on the purity of the laser signal. Unfortunately, most edge emitting semiconductor lasers, unlike gaseous or solid-state laser sources, operate with many closely spaced axial modes, which accounts for the observed instability and large spikes in the output spectrum of such lasers. Consequently, in most telecom applications distributed feedback (DFB) or distributed Bragg reflector (DBR) techniques are used to ensure stability and single-frequency operation, further adding to the cost and complexity of such lasers. Additionally, coupling of the highly elliptical output beam of these lasers to singlemode fibers complicates the packaging procedure and sub-micron alignment of various optical components is often necessary. Utilizing the evanescent coupling between a semiconductor antiresonant reflecting optical waveguide (ARROW) and a side polished fiber, this thesis presents an alternative side-coupled laser module that eliminates the need for the cumbersome multi-component alignment processes of conventional laser packages, and creates an inherent mode selection mechanism that guarantees singlemode radiation into the fiber without any gratings. We have been able to demonstrate the first side-coupled fiber semiconductor laser in this technology, coupling more than 3mW of power at 850nm directly into a 5/125mum singlemode fiber. This mixed-cavity architecture yields a high thermal stability (˜0.06nm/°C), and negligible spectral spikes are observed. Theoretical background and simulation results, as well as several supplementary materials are also presented to further rationalize the experimental data. A side-coupled light-emitter and pre-amplifier are also proposed and discussed. We also study different architectures for attaining higher efficiency, higher output power, and wavelength tunability in such lasers. Finally, we discuss possible venues for integration of these side-coupled devices in a telecommunication system. Approved for publication.

  6. Thermal Flow Sensors for Harsh Environments.

    PubMed

    Balakrishnan, Vivekananthan; Phan, Hoang-Phuong; Dinh, Toan; Dao, Dzung Viet; Nguyen, Nam-Trung

    2017-09-08

    Flow sensing in hostile environments is of increasing interest for applications in the automotive, aerospace, and chemical and resource industries. There are thermal and non-thermal approaches for high-temperature flow measurement. Compared to their non-thermal counterparts, thermal flow sensors have recently attracted a great deal of interest due to the ease of fabrication, lack of moving parts and higher sensitivity. In recent years, various thermal flow sensors have been developed to operate at temperatures above 500 °C. Microelectronic technologies such as silicon-on-insulator (SOI), and complementary metal-oxide semiconductor (CMOS) have been used to make thermal flow sensors. Thermal sensors with various heating and sensing materials such as metals, semiconductors, polymers and ceramics can be selected according to the targeted working temperature. The performance of these thermal flow sensors is evaluated based on parameters such as thermal response time, flow sensitivity. The data from thermal flow sensors reviewed in this paper indicate that the sensing principle is suitable for the operation under harsh environments. Finally, the paper discusses the packaging of the sensor, which is the most important aspect of any high-temperature sensing application. Other than the conventional wire-bonding, various novel packaging techniques have been developed for high-temperature application.

  7. Thermal Flow Sensors for Harsh Environments

    PubMed Central

    Dinh, Toan; Dao, Dzung Viet

    2017-01-01

    Flow sensing in hostile environments is of increasing interest for applications in the automotive, aerospace, and chemical and resource industries. There are thermal and non-thermal approaches for high-temperature flow measurement. Compared to their non-thermal counterparts, thermal flow sensors have recently attracted a great deal of interest due to the ease of fabrication, lack of moving parts and higher sensitivity. In recent years, various thermal flow sensors have been developed to operate at temperatures above 500 °C. Microelectronic technologies such as silicon-on-insulator (SOI), and complementary metal-oxide semiconductor (CMOS) have been used to make thermal flow sensors. Thermal sensors with various heating and sensing materials such as metals, semiconductors, polymers and ceramics can be selected according to the targeted working temperature. The performance of these thermal flow sensors is evaluated based on parameters such as thermal response time, flow sensitivity. The data from thermal flow sensors reviewed in this paper indicate that the sensing principle is suitable for the operation under harsh environments. Finally, the paper discusses the packaging of the sensor, which is the most important aspect of any high-temperature sensing application. Other than the conventional wire-bonding, various novel packaging techniques have been developed for high-temperature application. PMID:28885595

  8. Chip-package nano-structured copper and nickel interconnections with metallic and polymeric bonding interfaces

    NASA Astrophysics Data System (ADS)

    Aggarwal, Ankur

    With the semiconductor industry racing toward a historic transition, nano chips with less than 45 nm features demand I/Os in excess of 20,000 that support computing speed in terabits per second, with multi-core processors aggregately providing highest bandwidth at lowest power. On the other hand, emerging mixed signal systems are driving the need for 3D packaging with embedded active components and ultra-short interconnections. Decreasing I/O pitch together with low cost, high electrical performance and high reliability are the key technological challenges identified by the 2005 International Technology Roadmap for Semiconductors (ITRS). Being able to provide several fold increase in the chip-to-package vertical interconnect density is essential for garnering the true benefits of nanotechnology that will utilize nano-scale devices. Electrical interconnections are multi-functional materials that must also be able to withstand complex, sustained and cyclic thermo-mechanical loads. In addition, the materials must be environmentally-friendly, corrosion resistant, thermally stable over a long time, and resistant to electro-migration. A major challenge is also to develop economic processes that can be integrated into back end of the wafer foundry, i.e. with wafer level packaging. Device-to-system board interconnections are typically accomplished today with either wire bonding or solders. Both of these are incremental and run into either electrical or mechanical barriers as they are extended to higher density of interconnections. Downscaling traditional solder bump interconnect will not satisfy the thermo-mechanical reliability requirements at very fine pitches of the order of 30 microns and less. Alternate interconnection approaches such as compliant interconnects typically require lengthy connections and are therefore limited in terms of electrical properties, although expected to meet the mechanical requirements. A novel chip-package interconnection technology is developed to address the IC packaging requirements beyond the ITRS projections and to introduce innovative design and fabrication concepts that will further advance the performance of the chip, the package, and the system board. The nano-structured interconnect technology simultaneously packages all the ICs intact in wafer form with quantum jump in the number of interconnections with the lowest electrical parasitics. The intrinsic properties of nano materials also enable several orders of magnitude higher interconnect densities with the best mechanical properties for the highest reliability and yet provide higher current and heat transfer densities. Nano-structured interconnects provides the ability to assemble the packaged parts on the system board without the use of underfill materials and to enable advanced analog/digital testing, reliability testing, and burn-in at wafer level. This thesis investigates the electrical and mechanical performance of nanostructured interconnections through modeling and test vehicle fabrication. The analytical models evaluate the performance improvements over solder and compliant interconnections. Test vehicles with nano-interconnections were fabricated using low cost electro-deposition techniques and assembled with various bonding interfaces. Interconnections were fabricated at 200 micron pitch to compare with the existing solder joints and at 50 micron pitch to demonstrate fabrication processes at fine pitches. Experimental and modeling results show that the proposed nano-interconnections could enhance the reliability and potentially meet all the system performance requirements for the emerging micro/nano-systems.

  9. Wafer-scale micro-optics fabrication

    NASA Astrophysics Data System (ADS)

    Voelkel, Reinhard

    2012-07-01

    Micro-optics is an indispensable key enabling technology for many products and applications today. Probably the most prestigious examples are the diffractive light shaping elements used in high-end DUV lithography steppers. Highly-efficient refractive and diffractive micro-optical elements are used for precise beam and pupil shaping. Micro-optics had a major impact on the reduction of aberrations and diffraction effects in projection lithography, allowing a resolution enhancement from 250 nm to 45 nm within the past decade. Micro-optics also plays a decisive role in medical devices (endoscopes, ophthalmology), in all laser-based devices and fiber communication networks, bringing high-speed internet to our homes. Even our modern smart phones contain a variety of micro-optical elements. For example, LED flash light shaping elements, the secondary camera, ambient light and proximity sensors. Wherever light is involved, micro-optics offers the chance to further miniaturize a device, to improve its performance, or to reduce manufacturing and packaging costs. Wafer-scale micro-optics fabrication is based on technology established by the semiconductor industry. Thousands of components are fabricated in parallel on a wafer. This review paper recapitulates major steps and inventions in wafer-scale micro-optics technology. The state-of-the-art of fabrication, testing and packaging technology is summarized.

  10. More Efficient Power Conversion for EVs: Gallium-Nitride Advanced Power Semiconductor and Packaging

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    None

    2010-02-01

    Broad Funding Opportunity Announcement Project: Delphi is developing power converters that are smaller and more energy efficient, reliable, and cost-effective than current power converters. Power converters rely on power transistors which act like a very precisely controlled on-off switch, controlling the electrical energy flowing through an electrical circuit. Most power transistors today use silicon (Si) semiconductors. However, Delphi is using semiconductors made with a thin layer of gallium-nitride (GaN) applied on top of the more conventional Si material. The GaN layer increases the energy efficiency of the power transistor and also enables the transistor to operate at much higher temperatures,more » voltages, and power-density levels compared to its Si counterpart. Delphi is packaging these high-performance GaN semiconductors with advanced electrical connections and a cooling system that extracts waste heat from both sides of the device to further increase the device’s efficiency and allow more electrical current to flow through it. When combined with other electronic components on a circuit board, Delphi’s GaN power transistor package will help improve the overall performance and cost-effectiveness of HEVs and EVs.« less

  11. The MSFC complementary metal oxide semiconductor (including multilevel interconnect metallization) process handbook

    NASA Technical Reports Server (NTRS)

    Bouldin, D. L.; Eastes, R. W.; Feltner, W. R.; Hollis, B. R.; Routh, D. E.

    1979-01-01

    The fabrication techniques for creation of complementary metal oxide semiconductor integrated circuits at George C. Marshall Space Flight Center are described. Examples of C-MOS integrated circuits manufactured at MSFC are presented with functional descriptions of each. Typical electrical characteristics of both p-channel metal oxide semiconductor and n-channel metal oxide semiconductor discrete devices under given conditions are provided. Procedures design, mask making, packaging, and testing are included.

  12. 4H-SiC JFET Multilayer Integrated Circuit Technologies Tested Up to 1000 K

    NASA Technical Reports Server (NTRS)

    Spry, D. J.; Neudeck, P. G.; Chen, L.; Chang, C. W.; Lukco, D.; Beheim, G. M.

    2015-01-01

    Testing of semiconductor electronics at temperatures above their designed operating envelope is recognized as vital to qualification and lifetime prediction of circuits. This work describes the high temperature electrical testing of prototype 4H silicon carbide (SiC) junction field effect transistor (JFET) integrated circuits (ICs) technology implemented with multilayer interconnects; these ICs are intended for prolonged operation at temperatures up to 773K (500 C). A 50 mm diameter sapphire wafer was used in place of the standard NASA packaging for this experiment. Testing was carried out between 300K (27 C) and 1150K (877 C) with successful electrical operation of all devices observed up to 1000K (727 C).

  13. CMOS Enabled Microfluidic Systems for Healthcare Based Applications.

    PubMed

    Khan, Sherjeel M; Gumus, Abdurrahman; Nassar, Joanna M; Hussain, Muhammad M

    2018-04-01

    With the increased global population, it is more important than ever to expand accessibility to affordable personalized healthcare. In this context, a seamless integration of microfluidic technology for bioanalysis and drug delivery and complementary metal oxide semiconductor (CMOS) technology enabled data-management circuitry is critical. Therefore, here, the fundamentals, integration aspects, and applications of CMOS-enabled microfluidic systems for affordable personalized healthcare systems are presented. Critical components, like sensors, actuators, and their fabrication and packaging, are discussed and reviewed in detail. With the emergence of the Internet-of-Things and the upcoming Internet-of-Everything for a people-process-data-device connected world, now is the time to take CMOS-enabled microfluidics technology to as many people as possible. There is enormous potential for microfluidic technologies in affordable healthcare for everyone, and CMOS technology will play a major role in making that happen. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  14. Wafer-level micro-optics: trends in manufacturing, testing, packaging, and applications

    NASA Astrophysics Data System (ADS)

    Voelkel, Reinhard; Gong, Li; Rieck, Juergen; Zheng, Alan

    2012-11-01

    Micro-optics is an indispensable key enabling technology (KET) for many products and applications today. Probably the most prestigious examples are the diffractive light shaping elements used in high-end DUV lithography steppers. Highly efficient refractive and diffractive micro-optical elements are used for precise beam and pupil shaping. Micro-optics had a major impact on the reduction of aberrations and diffraction effects in projection lithography, allowing a resolution enhancement from 250 nm to 45 nm within the last decade. Micro-optics also plays a decisive role in medical devices (endoscopes, ophthalmology), in all laser-based devices and fiber communication networks (supercomputer, ROADM), bringing high-speed internet to our homes (FTTH). Even our modern smart phones contain a variety of micro-optical elements. For example, LED flashlight shaping elements, the secondary camera, and ambient light and proximity sensors. Wherever light is involved, micro-optics offers the chance to further miniaturize a device, to improve its performance, or to reduce manufacturing and packaging costs. Wafer-scale micro-optics fabrication is based on technology established by semiconductor industry. Thousands of components are fabricated in parallel on a wafer. We report on the state of the art in wafer-based manufacturing, testing, packaging and present examples and applications for micro-optical components and systems.

  15. Real time in vivo imaging and measurement of serine protease activity in the mouse hippocampus using a dedicated complementary metal-oxide semiconductor imaging device.

    PubMed

    Ng, David C; Tamura, Hideki; Tokuda, Takashi; Yamamoto, Akio; Matsuo, Masamichi; Nunoshita, Masahiro; Ishikawa, Yasuyuki; Shiosaka, Sadao; Ohta, Jun

    2006-09-30

    The aim of the present study is to demonstrate the application of complementary metal-oxide semiconductor (CMOS) imaging technology for studying the mouse brain. By using a dedicated CMOS image sensor, we have successfully imaged and measured brain serine protease activity in vivo, in real-time, and for an extended period of time. We have developed a biofluorescence imaging device by packaging the CMOS image sensor which enabled on-chip imaging configuration. In this configuration, no optics are required whereby an excitation filter is applied onto the sensor to replace the filter cube block found in conventional fluorescence microscopes. The fully packaged device measures 350 microm thick x 2.7 mm wide, consists of an array of 176 x 144 pixels, and is small enough for measurement inside a single hemisphere of the mouse brain, while still providing sufficient imaging resolution. In the experiment, intraperitoneally injected kainic acid induced upregulation of serine protease activity in the brain. These events were captured in real time by imaging and measuring the fluorescence from a fluorogenic substrate that detected this activity. The entire device, which weighs less than 1% of the body weight of the mouse, holds promise for studying freely moving animals.

  16. Thermally Stable Ohmic Contacts on Silicon Carbide Developed for High- Temperature Sensors and Electronics

    NASA Technical Reports Server (NTRS)

    Okojie, Robert S.

    2001-01-01

    The NASA aerospace program, in particular, requires breakthrough instrumentation inside the combustion chambers of engines for the purpose of, among other things, improving computational fluid dynamics code validation and active engine behavioral control (combustion, flow, stall, and noise). This environment can be as high as 600 degrees Celsius, which is beyond the capability of silicon and gallium arsenide devices. Silicon-carbide- (SiC-) based devices appear to be the most technologically mature among wide-bandgap semiconductors with the proven capability to function at temperatures above 500 degrees Celsius. However, the contact metalization of SiC degrades severely beyond this temperature because of factors such as the interdiffusion between layers, oxidation of the contact, and compositional and microstructural changes at the metal/semiconductor interface. These mechanisms have been proven to be device killers. Very costly and weight-adding packaging schemes that include vacuum sealing are sometimes adopted as a solution.

  17. Optical Design of Plant Canopy Measurement System and Fabrication of Two-Dimensional High-Speed Metal-Semiconductor-Metal Photodetector Arrays

    NASA Technical Reports Server (NTRS)

    Sarto, Anthony; VanZeghbroeck, Bart; Vanderbilt, Vern C.

    1996-01-01

    Electrical and optical designs for the prototype plant canopy architecture measurement system, including specified component and parts lists, are presented. Six single Metal-Semiconductor-Metal (MSM) detectors are mounted in high-speed packages.

  18. Solder glass sealing technology for use in packaging of fiber optic sensors

    NASA Astrophysics Data System (ADS)

    Kreutzmann, Gerd

    1990-08-01

    The solder glass sealing technology is an alternative to the direct sealing method of the socalled hboptocansu. Using solder glass for the junction of glass and the metal can the temperature at about 500 °C does not destroy the optical quality of the precision glass components. The glass can also be coated with an antireflective layer and even the sealing of filterglass is possible. In cases where coupling losses can't be tolerated, the fiber has to be fed directly through the wall into the housing. Fiber feedthroughs, using solder glass for the sealing of the fiber into a metal tube, are commonly metal soldered or welded into the wall and the fiber surface is directly leading to the semiconductor.

  19. Wafer-level packaging with compression-controlled seal ring bonding

    DOEpatents

    Farino, Anthony J

    2013-11-05

    A device may be provided in a sealed package by aligning a seal ring provided on a first surface of a first semiconductor wafer in opposing relationship with a seal ring that is provided on a second surface of a second semiconductor wafer and surrounds a portion of the second wafer that contains the device. Forcible movement of the first and second wafer surfaces toward one another compresses the first and second seal rings against one another. A physical barrier against the movement, other than the first and second seal rings, is provided between the first and second wafer surfaces.

  20. Miniature biotelemeter gives multichannel wideband biomedical data

    NASA Technical Reports Server (NTRS)

    Carraway, J. B.

    1972-01-01

    A miniature biotelemeter was developed for sensing and transmitting multiple channels of biomedical data over a radio link. The design of this miniature, 10-channel, wideband (5 kHz/channel), pulse amplitude modulation/ frequency modulation biotelemeter takes advantage of modern device technology (e.g., integrated circuit operational amplifiers, complementary symmetry/metal oxide semiconductor logic, and solid state switches) and hybrid packaging techniques. The telemeter is being used to monitor 10 channels of neuron firings from specific regions of the brain in rats implanted with chronic electrodes. Design, fabrication, and testing of an engineering model biotelemeter are described.

  1. Industrial packaging and assembly infrastructure for MOEMS

    NASA Astrophysics Data System (ADS)

    van Heeren, Henne

    2004-01-01

    In a mature industry all elements of the supply chain are available and are more or less in balance. Mainstream technologies are defined and well supported by a chain of specialist companies. Those specialist companies, offering services ranging from consultancy to manufacturing subcontracting, are an essential element in the industrialization. There specialization and dedication to one or a few elements in the technology increases professionalism and efficiency. The MOEMS industry however, is still in its infancy. After the birth and growth of many companies aiming at development of products, the appearance of companies aiming at the production of components and systems, we see know the first companies concentrating on the delivering of services to this industry. We can divide them in the like : * Design and Engineering companies * Foundries * Assembly and Packaging providers * Design and simulation software providers For manufacturing suppliers and customers the lack of industry standards and mainstream technologies is a serious drawback. Insight in availability and trends in technology is important to make the right choices in the field of industrialization and production. This awareness was the reason to perform a detailed study to the companies supplying commercial services in this field. This article focuses on one important part of this study: packaging and assembly. This tends to remain a bottleneck at the end of the design cycle, often delaying and sometimes preventing industrialization and commercialization. For nearly all MEMS/MST products literally everything comes together in the packaging and assembly. This is the area of full integration: electrical, mechanical, optical fluidic, magnetic etc. functionalities come together. The problems associated with the concentration of functionalities forms a big headache for the designer. Conflicting demands, of which functionality versus economics is only one, and technical hurdles have to overcome. Besides that, packaging and assembly is from nature application specific and solutions found are not always transferable from one product to another. But designers can often benefit from experience from other and general available technologies. A number of companies offer packaging and assembly services for MEMS/MST and this report give typical examples of those commercial services. The companies range from small start-ups, offering very specialized services, to large semiconductor packaging companies, having production lines for microsystem based products. Selecting the proper packaging method may tip the scales towards a product success or towards a product failure, while it nearly always present s a substantial part of the cost of the product. This is therefore is not a marginal concern, but a crucial part of the product design. The presentation will also address mayor trends and technologies. Finally, the article provides sufficient levels of classification and categorisation for various aspects for the technologies, in specific, and the industry, in general, to provide particularly useful insights into the activities and the developments in this market. With over 50 companies studied and assessed, it provides an up to date account of the state of this business and its future potential.

  2. Reliability of Semiconductor Laser Packaging in Space Applications

    NASA Technical Reports Server (NTRS)

    Gontijo, Ivair; Qiu, Yueming; Shapiro, Andrew A.

    2008-01-01

    A typical set up used to perform lifetime tests of packaged, fiber pigtailed semiconductor lasers is described, as well as tests performed on a set of four pump lasers. It was found that two lasers failed after 3200, and 6100 hours under device specified bias conditions at elevated temperatures. Failure analysis of the lasers indicates imperfections and carbon contamination of the laser metallization, possibly from improperly cleaned photo resist. SEM imaging of the front facet of one of the lasers, although of poor quality due to the optical fiber charging effects, shows evidence of catastrophic damage at the facet. More stringent manufacturing controls with 100% visual inspection of laser chips are needed to prevent imperfect lasers from proceeding to packaging and ending up in space applications, where failure can result in the loss of a space flight mission.

  3. Nanosatellite program at Sandia National Laboratories

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Reynolds, D.A.; Kern, J.P.; Schoeneman, J.L.

    1999-11-11

    The concept of building extremely small satellites which, either independently or as a collective, can perform missions which are comparable to their much larger cousins, has fascinated scientists and engineers for several years now. In addition to the now commonplace microelectronic integrated circuits, the more recent advent of technologies such as photonic integrated circuits (PIC's) and micro-electromechanical systems (MEMS) have placed such a goal within their grasp. Key to the acceptance of this technology will be the ability to manufacture these very small satellites in quantity without sacrificing their performance or versatility. In support of its nuclear treaty verification, proliferationmore » monitoring and other remote sensing missions, Sandia National laboratories has had a 35-year history of providing highly capable systems, densely packaged for unintrusive piggyback missions on government satellites. As monitoring requirements have become more challenging and remote sensing technologies become more sophisticated, packaging greater capability into these systems has become a requirement. Likewise, dwindling budgets are pushing satellite programs toward smaller and smaller platforms, reinforcing the need for smaller, cheaper satellite systems. In the next step of its miniaturization plan, Sandia has begun development of technologies for a highly integrated miniature satellite. The focus of this development is to achieve nanosat or smaller dimensions while maintaining significant capability utilizing semiconductor wafer-level integration and, at the same time promoting affordability through modular generic construction.« less

  4. 3D interconnect metrology in CMS/ITRI

    NASA Astrophysics Data System (ADS)

    Ku, Y. S.; Shyu, D. M.; Hsu, W. T.; Chang, P. Y.; Chen, Y. C.; Pang, H. L.

    2011-05-01

    Semiconductor device packaging technology is rapidly advancing, in response to the demand for thinner and smaller electronic devices. Three-dimensional chip/wafer stacking that uses through-silicon vias (TSV) is a key technical focus area, and the continuous development of this novel technology has created a need for non-contact characterization. Many of these challenges are novel to the industry due to the relatively large variety of via sizes and density, and new processes such as wafer thinning and stacked wafer bonding. This paper summarizes the developing metrology that has been used during via-middle & via-last TSV process development at EOL/ITRI. While there is a variety of metrology and inspection applications for 3D interconnect processing, the main topics covered here are via CD/depth measurement, thinned wafer inspection and wafer warpage measurement.

  5. High Volume Manufacturing and Field Stability of MEMS Products

    NASA Astrophysics Data System (ADS)

    Martin, Jack

    Low volume MEMS/NEMS production is practical when an attractive concept is implemented with business, manufacturing, packaging, and test support. Moving beyond this to high volume production adds requirements on design, process control, quality, product stability, market size, market maturity, capital investment, and business systems. In a broad sense, this chapter uses a case study approach: It describes and compares the silicon-based MEMS accelerometers, pressure sensors, image projection systems, and gyroscopes that are in high volume production. Although they serve several markets, these businesses have common characteristics. For example, the manufacturing lines use automated semiconductor equipment and standard material sets to make consistent products in large quantities. Standard, well controlled processes are sometimes modified for a MEMS product. However, novel processes that cannot run with standard equipment and material sets are avoided when possible. This reliance on semiconductor tools, as well as the organizational practices required to manufacture clean, particle-free products partially explains why the MEMS market leaders are integrated circuit manufacturers. There are other factors. MEMS and NEMS are enabling technologies, so it can take several years for high volume applications to develop. Indeed, market size is usually a strong function of price. This becomes a vicious circle, because low price requires low cost - a result that is normally achieved only after a product is in high volume production. During the early years, IC companies reduced cost and financial risk by using existing facilities for low volume MEMS production. As a result, product architectures are partially determined by capabilities developed for previous products. This chapter includes a discussion of MEMS product architecture with particular attention to the impact of electronic integration, packaging, and surfaces. Packaging and testing are critical, because they are significant factors in MEMS product cost. These devices have extremelyhigh surface/volume ratios, so performance and stability may depend on the control of surface characteristics after packaging. Looking into the future, the competitive advantage of IC suppliers will decrease as small companies learn to integrate MEMS/NEMS devices on CMOS foundry wafers. Packaging challenges still remain, because most MEMS/NEMS products must interact with the environment without degrading stability or reliability. Generic packaging solutions are unlikely. However, packaging subcontractors recognize that MEMS/NEMS is a growth opportunity. They will spread the overhead burden of high-capital-cost-facilities by developing flexible processes in order to package several types of moderate volume integrated MEMS/NEMS products on the same equipment.

  6. High Volume Manufacturing and Field Stability of MEMS Products

    NASA Astrophysics Data System (ADS)

    Martin, Jack

    Low volume MEMS/NEMS production is practical when an attractive concept is implemented with business, manufacturing, packaging, and test support. Moving beyond this to high volume production adds requirements on design, process control, quality, product stability, market size, market maturity, capital investment, and business systems. In a broad sense, this chapter uses a case study approach: It describes and compares the silicon-based MEMS accelerometers, pressure sensors, image projection systems, and gyroscopes that are in high volume production. Although they serve several markets, these businesses have common characteristics. For example, the manufacturing lines use automated semiconductor equipment and standard material sets to make consistent products in large quantities. Standard, well controlled processes are sometimes modified for a MEMS product. However, novel processes that cannot run with standard equipment and material sets are avoided when possible. This reliance on semiconductor tools, as well as the organizational practices required to manufacture clean, particle-free products partially explains why the MEMS market leaders are integrated circuit manufacturers. There are other factors. MEMS and NEMS are enabling technologies, so it can take several years for high volume applications to develop. Indeed, market size is usually a strong function of price. This becomes a vicious circle, because low price requires low cost - a result that is normally achieved only after a product is in high volume production. During the early years, IC companies reduced cost and financial risk by using existing facilities for low volume MEMS production. As a result, product architectures are partially determined by capabilities developed for previous products. This chapter includes a discussion of MEMS product architecture with particular attention to the impact of electronic integration, packaging, and surfaces. Packaging and testing are critical, because they are significant factors in MEMS product cost. These devices have extremely high surface/volume ratios, so performance and stability may depend on the control of surface characteristics after packaging. Looking into the future, the competitive advantage of IC suppliers will decrease as small companies learn to integrate MEMS/NEMS devices on CMOS foundry wafers. Packaging challenges still remain, because most MEMS/NEMS products must interact with the environment without degrading stability or reliability. Generic packaging solutions are unlikely. However, packaging subcontractors recognize that MEMS/NEMS is a growth opportunity. They will spread the overhead burden of high-capital-cost-facilities by developing flexible processes in order to package several types of moderate volume integrated MEMS/NEMS products on the same equipment.

  7. Analysis of space radiation data of semiconductor memories

    NASA Technical Reports Server (NTRS)

    Stassinopoulos, E. G.; Brucker, G. J.; Stauffer, C. A.

    1996-01-01

    This article presents an analysis of radiation effects for several select device types and technologies aboard the Combined Release and Radiation Effects Satellite (CRRES) satellite. These space-flight measurements covered a period of about 14 months of mission lifetime. Single Event Upset (SEU) data of the investigated devices from the Microelectronics Package (MEP) were processed and analyzed. Valid upset measurements were determined by correcting for invalid readings, hard failures, missing data tapes (thus voids in data), and periods over which devices were disabled from interrogation. The basic resolution time of the measurement system was confirmed to be 2 s. Lessons learned, important findings, and recommendations are presented.

  8. Meat Quality Assessment by Electronic Nose (Machine Olfaction Technology)

    PubMed Central

    Ghasemi-Varnamkhasti, Mahdi; Mohtasebi, Seyed Saeid; Siadat, Maryam; Balasubramanian, Sundar

    2009-01-01

    Over the last twenty years, newly developed chemical sensor systems (so called “electronic noses”) have made odor analyses possible. These systems involve various types of electronic chemical gas sensors with partial specificity, as well as suitable statistical methods enabling the recognition of complex odors. As commercial instruments have become available, a substantial increase in research into the application of electronic noses in the evaluation of volatile compounds in food, cosmetic and other items of everyday life is observed. At present, the commercial gas sensor technologies comprise metal oxide semiconductors, metal oxide semiconductor field effect transistors, organic conducting polymers, and piezoelectric crystal sensors. Further sensors based on fibreoptic, electrochemical and bi-metal principles are still in the developmental stage. Statistical analysis techniques range from simple graphical evaluation to multivariate analysis such as artificial neural network and radial basis function. The introduction of electronic noses into the area of food is envisaged for quality control, process monitoring, freshness evaluation, shelf-life investigation and authenticity assessment. Considerable work has already been carried out on meat, grains, coffee, mushrooms, cheese, sugar, fish, beer and other beverages, as well as on the odor quality evaluation of food packaging material. This paper describes the applications of these systems for meat quality assessment, where fast detection methods are essential for appropriate product management. The results suggest the possibility of using this new technology in meat handling. PMID:22454572

  9. Optical sensor array platform based on polymer electronic devices

    NASA Astrophysics Data System (ADS)

    Koetse, Marc M.; Rensing, Peter A.; Sharpe, Ruben B. A.; van Heck, Gert T.; Allard, Bart A. M.; Meulendijks, Nicole N. M. M.; Kruijt, Peter G. M.; Tijdink, Marcel W. W. J.; De Zwart, René M.; Houben, René J.; Enting, Erik; van Veen, Sjaak J. J. F.; Schoo, Herman F. M.

    2007-10-01

    Monitoring of personal wellbeing and optimizing human performance are areas where sensors have only begun to be used. One of the reasons for this is the specific demands that these application areas put on the underlying technology and system properties. In many cases these sensors will be integrated in clothing, be worn on the skin, or may even be placed inside the body. This implies that flexibility and wearability of the systems is essential for their success. Devices based on polymer semiconductors allow for these demands since they can be fabricated with thin film technology. The use of thin film device technology allows for the fabrication of very thin sensors (e.g. integrated in food product packaging), flexible or bendable sensors in wearables, large area/distributed sensors, and intrinsically low-cost applications in disposable products. With thin film device technology a high level of integration can be achieved with parts that analyze signals, process and store data, and interact over a network. Integration of all these functions will inherently lead to better cost/performance ratios, especially if printing and other standard polymer technology such as high precision moulding is applied for the fabrication. In this paper we present an optical transmission sensor array based on polymer semiconductor devices made by thin film technology. The organic devices, light emitting diodes, photodiodes and selective medium chip, are integrated with classic electronic components. Together they form a versatile sensor platform that allows for the quantitative measurement of 100 channels and communicates wireless with a computer. The emphasis is given to the sensor principle, the design, fabrication technology and integration of the thin film devices.

  10. Reliability Assessment and Activation Energy Study of Au and Pd-Coated Cu Wires Post High Temperature Aging in Nanoscale Semiconductor Packaging.

    PubMed

    Gan, C L; Hashim, U

    2013-06-01

    Wearout reliability and high temperature storage life (HTSL) activation energy of Au and Pd-coated Cu (PdCu) ball bonds are useful technical information for Cu wire deployment in nanoscale semiconductor device packaging. This paper discusses the influence of wire type on the wearout reliability performance of Au and PdCu wire used in fine pitch BGA package after HTSL stress at various aging temperatures. Failure analysis has been conducted to identify the failure mechanism after HTSL wearout conditions for Au and PdCu ball bonds. Apparent activation energies (Eaa) of both wire types are investigated after HTSL test at 150 °C, 175 °C and 200 °C aging temperatures. Arrhenius plot has been plotted for each ball bond types and the calculated Eaa of PdCu ball bond is 0.85 eV and 1.10 eV for Au ball bond in 110 nm semiconductor device. Obviously Au ball bond is identified with faster IMC formation rate with IMC Kirkendall voiding while PdCu wire exhibits equivalent wearout and or better wearout reliability margin compare to conventional Au wirebond. Lognormal plots have been established and its mean to failure (t 50 ) have been discussed in this paper.

  11. Advanced uncooled sensor product development

    NASA Astrophysics Data System (ADS)

    Kennedy, A.; Masini, P.; Lamb, M.; Hamers, J.; Kocian, T.; Gordon, E.; Parrish, W.; Williams, R.; LeBeau, T.

    2015-06-01

    The partnership between RVS, Seek Thermal and Freescale Semiconductor continues on the path to bring the latest technology and innovation to both military and commercial customers. The partnership has matured the 17μm pixel for volume production on the Thermal Weapon Sight (TWS) program in efforts to bring advanced production capability to produce a low cost, high performance product. The partnership has developed the 12μm pixel and has demonstrated performance across a family of detector sizes ranging from formats as small as 206 x 156 to full high definition formats. Detector pixel sensitivities have been achieved using the RVS double level advanced pixel structure. Transition of the packaging of microbolometers from a traditional die level package to a wafer level package (WLP) in a high volume commercial environment is complete. Innovations in wafer fabrication techniques have been incorporated into this product line to assist in the high yield required for volume production. The WLP seal yield is currently > 95%. Simulated package vacuum lives >> 20 years have been demonstrated through accelerated life testing where the package has been shown to have no degradation after 2,500 hours at 150°C. Additionally the rugged assembly has shown no degradation after mechanical shock and vibration and thermal shock testing. The transition to production effort was successfully completed in 2014 and the WLP design has been integrated into multiple new production products including the TWS and the innovative Seek Thermal commercial product that interfaces directly to an iPhone or android device.

  12. Expert system and process optimization techniques for real-time monitoring and control of plasma processes

    NASA Astrophysics Data System (ADS)

    Cheng, Jie; Qian, Zhaogang; Irani, Keki B.; Etemad, Hossein; Elta, Michael E.

    1991-03-01

    To meet the ever-increasing demand of the rapidly-growing semiconductor manufacturing industry it is critical to have a comprehensive methodology integrating techniques for process optimization real-time monitoring and adaptive process control. To this end we have accomplished an integrated knowledge-based approach combining latest expert system technology machine learning method and traditional statistical process control (SPC) techniques. This knowledge-based approach is advantageous in that it makes it possible for the task of process optimization and adaptive control to be performed consistently and predictably. Furthermore this approach can be used to construct high-level and qualitative description of processes and thus make the process behavior easy to monitor predict and control. Two software packages RIST (Rule Induction and Statistical Testing) and KARSM (Knowledge Acquisition from Response Surface Methodology) have been developed and incorporated with two commercially available packages G2 (real-time expert system) and ULTRAMAX (a tool for sequential process optimization).

  13. Integration and manufacture of multifunctional planar lightwave circuits

    NASA Astrophysics Data System (ADS)

    Lipscomb, George F.; Ticknor, Anthony J.; Stiller, Marc A.; Chen, Wenjie; Schroeter, Paul

    2001-11-01

    The demands of exponentially growing Internet traffic, coupled with the advent of Dense Wavelength Division Multiplexing (DWDM) fiber optic systems to meet those demands, have triggered a revolution in the telecommunications industry. This dramatic change has been built upon, and has driven, improvements in fiber optic component technology. The next generation of systems for the all optical network will require higher performance components coupled with dramatically lower costs. One approach to achieve significantly lower costs per function is to employ Planar Lightwave Circuits (PLC) to integrate multiple optical functions in a single package. PLCs are optical circuits laid out on a silicon wafer, and are made using tools and techniques developed to extremely high levels by the semi-conductor industry. In this way multiple components can be fabricated and interconnected at once, significantly reducing both the manufacturing and the packaging/assembly costs. Currently, the predominant commercial application of PLC technology is arrayed-waveguide gratings (AWG's) for multiplexing and demultiplexing multiple wavelength channels in a DWDM system. Although this is generally perceived as a single-function device, it can be performing the function of more than 100 discrete fiber-optic components and already represents a considerable degree of integration. Furthermore, programmable functions such as variable-optical attenuators (VOAs) and switches made with compatible PLC technology are now moving into commercial production. In this paper, we present results on the integration of active and passive functions together using PLC technology, e.g. a 40 channel AWG multiplexer with 40 individually controllable VOAs.

  14. Ultra-Reliable Digital Avionics (URDA) processor

    NASA Astrophysics Data System (ADS)

    Branstetter, Reagan; Ruszczyk, William; Miville, Frank

    1994-10-01

    Texas Instruments Incorporated (TI) developed the URDA processor design under contract with the U.S. Air Force Wright Laboratory and the U.S. Army Night Vision and Electro-Sensors Directorate. TI's approach couples advanced packaging solutions with advanced integrated circuit (IC) technology to provide a high-performance (200 MIPS/800 MFLOPS) modular avionics processor module for a wide range of avionics applications. TI's processor design integrates two Ada-programmable, URDA basic processor modules (BPM's) with a JIAWG-compatible PiBus and TMBus on a single F-22 common integrated processor-compatible form-factor SEM-E avionics card. A separate, high-speed (25-MWord/second 32-bit word) input/output bus is provided for sensor data. Each BPM provides a peak throughput of 100 MIPS scalar concurrent with 400-MFLOPS vector processing in a removable multichip module (MCM) mounted to a liquid-flowthrough (LFT) core and interfacing to a processor interface module printed wiring board (PWB). Commercial RISC technology coupled with TI's advanced bipolar complementary metal oxide semiconductor (BiCMOS) application specific integrated circuit (ASIC) and silicon-on-silicon packaging technologies are used to achieve the high performance in a miniaturized package. A Mips R4000-family reduced instruction set computer (RISC) processor and a TI 100-MHz BiCMOS vector coprocessor (VCP) ASIC provide, respectively, the 100 MIPS of a scalar processor throughput and 400 MFLOPS of vector processing throughput for each BPM. The TI Aladdim ASIC chipset was developed on the TI Aladdin Program under contract with the U.S. Army Communications and Electronics Command and was sponsored by the Advanced Research Projects Agency with technical direction from the U.S. Army Night Vision and Electro-Sensors Directorate.

  15. The ideal chip is not enough: Issues retarding the success of wide band-gap devices

    NASA Astrophysics Data System (ADS)

    Kaminski, Nando

    2017-04-01

    Semiconductor chips made from the wide band-gap (WBG) materials silicon carbide (SiC) or gallium nitride (GaN) are already approaching the theoretical limits given by the respective materials. Unfortunately, their advantages over silicon devices cannot be fully exploited due to limitations imposed by the device packaging or the circuitry around the semiconductors. Stray inductances slow down the switching speed and increase losses, packaging materials limit the maximum temperature and the maximum useful temperature swing, and passives limit the maximum switching frequency. All these issues have to be solved or at least minimised to make WBG attractive for a wider range of applications and, consequently, to profit from the economy of scale.

  16. Stable Electrical Operation of 6H-SiC JFETs and ICs for Thousands of Hours at 500 C

    NASA Technical Reports Server (NTRS)

    Neudeck, Philip G.; Spry, David J.; Chen, Liang-Yu; Beheim, Glenn M.; Okojie, Robert S.; Chang, Carl W.; Meredith, Roger D.; Ferrier, Terry L.; Evans, Laura J.; Krasowski, Michael J.; hide

    2008-01-01

    The fabrication and testing of the first semiconductor transistors and small-scale integrated circuits (ICs) to achieve up to 3000 h of stable electrical operation at 500 C in air ambient is reported. These devices are based on an epitaxial 6H-SiC junction field-effect transistor process that successfully integrated high temperature ohmic contacts, dielectric passivation, and ceramic packaging. Important device and circuit parameters exhibited less than 10% of change over the course of the 500 C operational testing. These results establish a new technology foundation for realizing durable 500 C ICs for combustion-engine sensing and control, deep-well drilling, and other harsh-environment applications.

  17. Bi-level microelectronic device package with an integral window

    DOEpatents

    Peterson, Kenneth A.; Watson, Robert D.

    2004-01-06

    A package with an integral window for housing a microelectronic device. The integral window is bonded directly to the package without having a separate layer of adhesive material disposed in-between the window and the package. The device can be a semiconductor chip, CCD chip, CMOS chip, VCSEL chip, laser diode, MEMS device, or IMEMS device. The multilayered package can be formed of a LTCC or HTCC cofired ceramic material, with the integral window being simultaneously joined to the package during LTCC or HTCC processing. The microelectronic device can be flip-chip bonded so that the light-sensitive side is optically accessible through the window. The package has at least two levels of circuits for making electrical interconnections to a pair of microelectronic devices. The result is a compact, low-profile package having an integral window that is hermetically sealed to the package prior to mounting and interconnecting the microelectronic device(s).

  18. The 2018 GaN power electronics roadmap

    NASA Astrophysics Data System (ADS)

    Amano, H.; Baines, Y.; Beam, E.; Borga, Matteo; Bouchet, T.; Chalker, Paul R.; Charles, M.; Chen, Kevin J.; Chowdhury, Nadim; Chu, Rongming; De Santi, Carlo; Merlyne De Souza, Maria; Decoutere, Stefaan; Di Cioccio, L.; Eckardt, Bernd; Egawa, Takashi; Fay, P.; Freedsman, Joseph J.; Guido, L.; Häberlen, Oliver; Haynes, Geoff; Heckel, Thomas; Hemakumara, Dilini; Houston, Peter; Hu, Jie; Hua, Mengyuan; Huang, Qingyun; Huang, Alex; Jiang, Sheng; Kawai, H.; Kinzer, Dan; Kuball, Martin; Kumar, Ashwani; Boon Lee, Kean; Li, Xu; Marcon, Denis; März, Martin; McCarthy, R.; Meneghesso, Gaudenzio; Meneghini, Matteo; Morvan, E.; Nakajima, A.; Narayanan, E. M. S.; Oliver, Stephen; Palacios, Tomás; Piedra, Daniel; Plissonnier, M.; Reddy, R.; Sun, Min; Thayne, Iain; Torres, A.; Trivellin, Nicola; Unni, V.; Uren, Michael J.; Van Hove, Marleen; Wallis, David J.; Wang, J.; Xie, J.; Yagi, S.; Yang, Shu; Youtsey, C.; Yu, Ruiyang; Zanoni, Enrico; Zeltner, Stefan; Zhang, Yuhao

    2018-04-01

    Gallium nitride (GaN) is a compound semiconductor that has tremendous potential to facilitate economic growth in a semiconductor industry that is silicon-based and currently faced with diminishing returns of performance versus cost of investment. At a material level, its high electric field strength and electron mobility have already shown tremendous potential for high frequency communications and photonic applications. Advances in growth on commercially viable large area substrates are now at the point where power conversion applications of GaN are at the cusp of commercialisation. The future for building on the work described here in ways driven by specific challenges emerging from entirely new markets and applications is very exciting. This collection of GaN technology developments is therefore not itself a road map but a valuable collection of global state-of-the-art GaN research that will inform the next phase of the technology as market driven requirements evolve. First generation production devices are igniting large new markets and applications that can only be achieved using the advantages of higher speed, low specific resistivity and low saturation switching transistors. Major investments are being made by industrial companies in a wide variety of markets exploring the use of the technology in new circuit topologies, packaging solutions and system architectures that are required to achieve and optimise the system advantages offered by GaN transistors. It is this momentum that will drive priorities for the next stages of device research gathered here.

  19. Commercialisation of CMOS integrated circuit technology in multi-electrode arrays for neuroscience and cell-based biosensors.

    PubMed

    Graham, Anthony H D; Robbins, Jon; Bowen, Chris R; Taylor, John

    2011-01-01

    The adaptation of standard integrated circuit (IC) technology as a transducer in cell-based biosensors in drug discovery pharmacology, neural interface systems and electrophysiology requires electrodes that are electrochemically stable, biocompatible and affordable. Unfortunately, the ubiquitous Complementary Metal Oxide Semiconductor (CMOS) IC technology does not meet the first of these requirements. For devices intended only for research, modification of CMOS by post-processing using cleanroom facilities has been achieved. However, to enable adoption of CMOS as a basis for commercial biosensors, the economies of scale of CMOS fabrication must be maintained by using only low-cost post-processing techniques. This review highlights the methodologies employed in cell-based biosensor design where CMOS-based integrated circuits (ICs) form an integral part of the transducer system. Particular emphasis will be placed on the application of multi-electrode arrays for in vitro neuroscience applications. Identifying suitable IC packaging methods presents further significant challenges when considering specific applications. The various challenges and difficulties are reviewed and some potential solutions are presented.

  20. Development of Sic Gas Sensor Systems

    NASA Technical Reports Server (NTRS)

    Hunter, G. W.; Neudeck, P. G.; Okojie, R. S.; Beheim, G. M.; Thomas, V.; Chen, L.; Lukco, D.; Liu, C. C.; Ward, B.; Makel, D.

    2002-01-01

    Silicon carbide (SiC) based gas sensors have significant potential to address the gas sensing needs of aerospace applications such as emission monitoring, fuel leak detection, and fire detection. However, in order to reach that potential, a range of technical challenges must be overcome. These challenges go beyond the development of the basic sensor itself and include the need for viable enabling technologies to make a complete gas sensor system: electrical contacts, packaging, and transfer of information from the sensor to the outside world. This paper reviews the status at NASA Glenn Research Center of SiC Schottky diode gas sensor development as well as that of enabling technologies supporting SiC gas sensor system implementation. A vision of a complete high temperature microfabricated SiC gas sensor system is proposed. In the long-term, it is believed that improvements in the SiC semiconductor material itself could have a dramatic effect on the performance of SiC gas sensor systems.

  1. Review of the Semiconductor Industry and Technology Roadmap.

    ERIC Educational Resources Information Center

    Kumar, Sameer; Krenner, Nicole

    2002-01-01

    Points out that the semiconductor industry is extremely competitive and requires ongoing technological advances to improve performance while reducing costs to remain competitive and how essential it is to gain an understanding of important facets of the industry. Provides an overview of the initial and current semiconductor technology roadmap that…

  2. Integrated Arrays on Silicon at Terahertz Frequencies

    NASA Technical Reports Server (NTRS)

    Chattopadhayay, Goutam; Lee, Choonsup; Jung, Cecil; Lin, Robert; Peralta, Alessandro; Mehdi, Imran; Llombert, Nuria; Thomas, Bertrand

    2011-01-01

    In this paper we explore various receiver font-end and antenna architecture for use in integrated arrays at terahertz frequencies. Development of wafer-level integrated terahertz receiver front-end by using advanced semiconductor fabrication technologies and use of novel integrated antennas with silicon micromachining are reported. We report novel stacking of micromachined silicon wafers which allows for the 3-dimensional integration of various terahertz receiver components in extremely small packages which easily leads to the development of 2- dimensioanl multi-pixel receiver front-ends in the terahertz frequency range. We also report an integrated micro-lens antenna that goes with the silicon micro-machined front-end. The micro-lens antenna is fed by a waveguide that excites a silicon lens antenna through a leaky-wave or electromagnetic band gap (EBG) resonant cavity. We utilized advanced semiconductor nanofabrication techniques to design, fabricate, and demonstrate a super-compact, low-mass submillimeter-wave heterodyne frontend. When the micro-lens antenna is integrated with the receiver front-end we will be able to assemble integrated heterodyne array receivers for various applications such as multi-pixel high resolution spectrometer and imaging radar at terahertz frequencies.

  3. 77 FR 14569 - Notice of Intent To Grant Exclusive License

    Federal Register 2010, 2011, 2012, 2013, 2014

    2012-03-12

    ... Direct Chip Attach Packaging Methodologies and Apparatuses for Harsh Environments, LEW 17,256-1, to... equipment; semiconductor manufacturing; material manufacturing such as metallurgy, refractory processes, and...

  4. Single level microelectronic device package with an integral window

    DOEpatents

    Peterson, Kenneth A.; Watson, Robert D.

    2003-12-09

    A package with an integral window for housing a microelectronic device. The integral window is bonded directly to the package without having a separate layer of adhesive material disposed in-between the window and the package. The device can be a semiconductor chip, CCD chip, CMOS chip, VCSEL chip, laser diode, MEMS device, or IMEMS device. The package can be formed of a multilayered LTCC or HTCC cofired ceramic material, with the integral window being simultaneously joined to the package during cofiring. The microelectronic device can be flip-chip interconnected so that the light-sensitive side is optically accessible through the window. A glob-top encapsulant or protective cover can be used to protect the microelectronic device and electrical interconnections. The result is a compact, low profile package having an integral window that is hermetically sealed to the package prior to mounting and interconnecting the microelectronic device.

  5. Sealed symmetric multilayered microelectronic device package with integral windows

    DOEpatents

    Peterson, Kenneth A.; Watson, Robert D.

    2002-01-01

    A sealed symmetric multilayered package with integral windows for housing one or more microelectronic devices. The devices can be a semiconductor chip, a CCD chip, a CMOS chip, a VCSEL chip, a laser diode, a MEMS device, or a IMEMS device. The multilayered package can be formed of a low-temperature cofired ceramic (LTCC) or high-temperature cofired ceramic (HTCC) multilayer processes with the windows being simultaneously joined (e.g. cofired) to the package body during LTCC or HTCC processing. The microelectronic devices can be flip-chip bonded and oriented so that the light-sensitive sides are optically accessible through the windows. The result is a compact, low-profile, sealed symmetric package, having integral windows that can be hermetically-sealed.

  6. Python Scripts for Automation of Current-Voltage Testing of Semiconductor Devices (FY17)

    DTIC Science & Technology

    2017-01-01

    ARL-TR-7923 ● JAN 2017 US Army Research Laboratory Python Scripts for Automation of Current- Voltage Testing of Semiconductor...manual device-testing procedures is reduced or eliminated through automation. This technical report includes scripts written in Python , version 2.7, used ...nothing. 3.1.9 Exit Program The script exits the entire program. Line 505, sys.exit(), uses the sys package that comes with Python to exit system

  7. The next generation in optical transport semiconductors: IC solutions at the system level

    NASA Astrophysics Data System (ADS)

    Gomatam, Badri N.

    2005-02-01

    In this tutorial overview, we survey some of the challenging problems facing Optical Transport and their solutions using new semiconductor-based technologies. Advances in 0.13um CMOS, SiGe/HBT and InP/HBT IC process technologies and mixed-signal design strategies are the fundamental breakthroughs that have made these solutions possible. In combination with innovative packaging and transponder/transceiver architectures IC approaches have clearly demonstrated enhanced optical link budgets with simultaneously lower (perhaps the lowest to date) cost and manufacturability tradeoffs. This paper will describe: *Electronic Dispersion Compensation broadly viewed as the overcoming of dispersion based limits to OC-192 links and extending link budgets, *Error Control/Coding also known as Forward Error Correction (FEC), *Adaptive Receivers for signal quality monitoring for real-time estimation of Q/OSNR, eye-pattern, signal BER and related temporal statistics (such as jitter). We will discuss the theoretical underpinnings of these receiver and transmitter architectures, provide examples of system performance and conclude with general market trends. These Physical layer IC solutions represent a fundamental new toolbox of options for equipment designers in addressing systems level problems. With unmatched cost and yield/performance tradeoffs, it is expected that IC approaches will provide significant flexibility in turn, for carriers and service providers who must ultimately manage the network and assure acceptable quality of service under stringent cost constraints.

  8. Nano-Satellite Avionics

    NASA Technical Reports Server (NTRS)

    Culver, Harry

    1999-01-01

    Abstract NASA's Goddard Space Flight Center (GSFC) is currently developing a new class of satellites called the nano-satellite (nano-sat). A major objective of this development effort is to provide the technology required to enable a constellation of tens to hundreds of nano-satellites to make both remote and in-situ measurements from space. The Nano-sat will be a spacecraft weighing a maximum of 10 kg, including the propellant mass, and producing at least 5 Watts of power to operate the spacecraft. The electronics are required to survive a total radiation dose rate of 100 krads for a mission lifetime of two years. There are many unique challenges that must be met in order to develop the avionics for such a spacecraft. The first challenge is to develop an architecture that will operate on the allotted 5 Watts and meet the diverging requirements of multiple missions. This architecture will need to incorporate a multitude of new advanced microelectronic technologies. The microelectronics developed must be a modular and scalable packaging of technology to solve the problem of developing a solution to both reduce cost and meet the requirements of various missions. This development will utilize the most cost effective approach, whether infusing commercially driven semiconductor devices into spacecraft applications or partnering with industry to design and develop low cost, low power, low mass, and high capacity data processing devices. This paper will discuss the nano-sat architecture and the major technologies that will be developed. The major technologies that will be covered include: (1) Light weight Low Power Electronics Packaging, (2) Radiation Hard/Tolerant, Low Power Processing Platforms, (3) High capacity Low Power Memory Systems (4) Radiation Hard reconfiguragble field programmable gate array (rFPGA)

  9. Prolonged 500 C Operation of 100+ Transistor Silicon Carbide Integrated Circuits

    NASA Technical Reports Server (NTRS)

    Spry, David J.; Neudeck, Philip G.; Lukco, Dorothy; Chen, Liangyu; Krasowski, Michael J.; Prokop, Norman F.; Chang, Carl W.; Beheim, Glenn M.

    2017-01-01

    This report describes more than 5000 hours of successful 500 C operation of semiconductor integrated circuits (ICs) with more than 100 transistors. Multiple packaged chips with two different 4H-SiC junction field effect transistor (JFET) technology demonstrator circuits have surpassed thousands of hours of oven-testing at 500 C. After 100 hours of 500 C burn-in, the circuits (except for 2 failures) exhibit less than 10% change in output characteristics for the remainder of 500 C testing. We also describe the observation of important differences in IC materials durability when subjected to the first nine constituents of Venus-surface atmosphere at 9.4 MPa and 460 C in comparison to what is observed for Earth-atmosphere oven testing at 500 C.

  10. Prolonged 500 C Operation of 100+ Transistor Silicon Carbide Integrated Circuits

    NASA Technical Reports Server (NTRS)

    Spry, David J.; Neudeck, Philip G.; Lukco, Dorothy; Chen, Liangyu; Krasowski, Michael J.; Prokop, Norman F.; Chang, Carl W.; Beheim, Glenn M.

    2017-01-01

    This report describes more than 5000 hours of successful 500 C operation of semiconductor integrated circuits (ICs) with more than 100 transistors. Multiple packaged chips with two different 4H-SiC junction field effect transistor (JFET) technology demonstrator circuits have surpassed thousands of hours of oven-testing at 500 C. After 100 hours of 500 C burn-in, the circuits (except for 2 failures) exhibit less than 10 change in output characteristics for the remainder of 500C testing. We also describe the observation of important differences in IC materials durability when subjected to the first nine constituents of Venus-surface atmosphere at 9.4 MPa and 460C in comparison to what is observed for Earth-atmosphere oven testing at 500 C.

  11. Thermally robust semiconductor optical amplifiers and laser diodes

    DOEpatents

    Dijaili, Sol P.; Patterson, Frank G.; Walker, Jeffrey D.; Deri, Robert J.; Petersen, Holly; Goward, William

    2002-01-01

    A highly heat conductive layer is combined with or placed in the vicinity of the optical waveguide region of active semiconductor components. The thermally conductive layer enhances the conduction of heat away from the active region, which is where the heat is generated in active semiconductor components. This layer is placed so close to the optical region that it must also function as a waveguide and causes the active region to be nearly the same temperature as the ambient or heat sink. However, the semiconductor material itself should be as temperature insensitive as possible and therefore the invention combines a highly thermally conductive dielectric layer with improved semiconductor materials to achieve an overall package that offers improved thermal performance. The highly thermally conductive layer serves two basic functions. First, it provides a lower index material than the semiconductor device so that certain kinds of optical waveguides may be formed, e.g., a ridge waveguide. The second and most important function, as it relates to this invention, is that it provides a significantly higher thermal conductivity than the semiconductor material, which is the principal material in the fabrication of various optoelectronic devices.

  12. Development of high yielding photonic light delivery system for photodynamic therapy of esophageal carcinomas

    NASA Astrophysics Data System (ADS)

    Premasiri, Amaranath; Happawana, Gemunu; Rosen, Arye

    2007-02-01

    Photodynamic therapy (PDT) is an approved treatment modality for Barrett's and invasive esophageal carcinoma. Proper Combination of photosentizing agent, oxygen, and a specific wavelength of light to activate the photosentizing agents is necessary for the cytotoxic destruction of cancerous cells by PDT. As a light source expensive solid-state laser sources currently are being used for the treatment. Inexpensive semiconductor lasers have been suggested for the light delivery system, however packaging of semiconductor lasers for optimal optical power output is challenging. In this paper, we present a multidirectional direct water-cooling of semiconductor lasers that provides a better efficiency than the conventional unidirectional cooling. AlGaAsP lasers were tested under de-ionized (DI) water and it is shown that the optical power output of the lasers under the DI water is much higher than that of the uni-directional cooling of lasers. Also, in this paper we discuss how direct DI water-cooling can optimize power output of semiconductor lasers. Thereafter an optimal design of the semiconductor laser package is shown with the DI water-cooling system. Further, a microwave antenna is designed which is to be imprinted on to a balloon catheter in order to provide local heating of esophagus, leading to an increase in local oxygenation of the tumor to generate an effective level of singlet oxygen for cellular death. Finally the optimal level of light energy that is required to achieve the expected level of singlet oxygen is modeled to design an efficient PDT protocol.

  13. Multilayered Microelectronic Device Package With An Integral Window

    DOEpatents

    Peterson, Kenneth A.; Watson, Robert D.

    2004-10-26

    A microelectronic package with an integral window mounted in a recessed lip for housing a microelectronic device. The device can be a semiconductor chip, a CCD chip, a CMOS chip, a VCSEL chip, a laser diode, a MEMS device, or a IMEMS device. The package can be formed of a low temperature co-fired ceramic (LTCC) or high temperature cofired ceramic (HTCC) multilayered material, with the integral window being simultaneously joined (e.g. co-fired) to the package body during LTCC or HTCC processing. The microelectronic device can be flip-chip bonded and oriented so that a light-sensitive side is optically accessible through the window. The result is a compact, low profile package, having an integral window mounted in a recessed lip, that can be hermetically sealed.

  14. Programme and Abstracts. Workshop on Expert Evaluation and Control of Compound Semiconductor Materials and Technologies (1st) Held in Ecole Centrale De Lyon, France on 19 -22 May 1992. (EXAMTEC’ 92)

    DTIC Science & Technology

    1992-05-22

    Evaluation and Control of Compound Semiconductor Materials and Technologies (EXMATEC󈨠) at Ecole Centrale de Lyon (Ecully, France, 19th to 22nd May...semiconductor technologies to manufacture advanced devices with improved reproducibility, better reliability and lower cost. -’Device structures...concepts are required for expert evaluation and control of still developing technologies . In this context, the EXMATEC series will constitute a major

  15. Bi-level multilayered microelectronic device package with an integral window

    DOEpatents

    Peterson, Kenneth A.; Watson, Robert D.

    2002-01-01

    A bi-level, multilayered package with an integral window for housing a microelectronic device. The device can be a semiconductor chip, a CCD chip, a CMOS chip, a VCSEL chip, a laser diode, a MEMS device, or a IMEMS device. The multilayered package can be formed of a low-temperature cofired ceramic (LTCC) or high-temperature cofired ceramic (HTCC) multilayer processes with the window being simultaneously joined (e.g. cofired) to the package body during LTCC or HTCC processing. The microelectronic device can be flip-chip bonded and oriented so that the light-sensitive side is optically accessible through the window. A second chip can be bonded to the backside of the first chip, with the second chip being wirebonded to the second level of the bi-level package. The result is a compact, low-profile package, having an integral window that can be hermetically-sealed.

  16. Commercialisation of CMOS Integrated Circuit Technology in Multi-Electrode Arrays for Neuroscience and Cell-Based Biosensors

    PubMed Central

    Graham, Anthony H. D.; Robbins, Jon; Bowen, Chris R.; Taylor, John

    2011-01-01

    The adaptation of standard integrated circuit (IC) technology as a transducer in cell-based biosensors in drug discovery pharmacology, neural interface systems and electrophysiology requires electrodes that are electrochemically stable, biocompatible and affordable. Unfortunately, the ubiquitous Complementary Metal Oxide Semiconductor (CMOS) IC technology does not meet the first of these requirements. For devices intended only for research, modification of CMOS by post-processing using cleanroom facilities has been achieved. However, to enable adoption of CMOS as a basis for commercial biosensors, the economies of scale of CMOS fabrication must be maintained by using only low-cost post-processing techniques. This review highlights the methodologies employed in cell-based biosensor design where CMOS-based integrated circuits (ICs) form an integral part of the transducer system. Particular emphasis will be placed on the application of multi-electrode arrays for in vitro neuroscience applications. Identifying suitable IC packaging methods presents further significant challenges when considering specific applications. The various challenges and difficulties are reviewed and some potential solutions are presented. PMID:22163884

  17. Modeling and analysis of equipment managers in manufacturing execution systems for semiconductor packaging.

    PubMed

    Cheng, F T; Yang, H C; Luo, T L; Feng, C; Jeng, M

    2000-01-01

    Equipment Managers (EMs) play a major role in a Manufacturing Execution System (MES). They serve as the communication bridge between the components of an MES and the equipment. The purpose of this paper is to propose a novel methodology for developing analytical and simulation models for the EM such that the validity and performance of the EM can be evaluated. Domain knowledge and requirements are collected from a real semiconductor packaging factory. By using IDEFO and state diagrams, a static functional model and a dynamic state model of the EM are built. Next, these two models are translated into a Petri net model. This allows qualitative and quantitative analyses of the system. The EM net model is then expanded into the MES net model. Therefore, the performance of an EM in the MES environment can be evaluated. These evaluation results are good references for design and decision making.

  18. Research and Design on a Product Data Definition System of Semiconductor Packaging Industry

    NASA Astrophysics Data System (ADS)

    Shi, Jinfei; Ma, Qingyao; Zhou, Yifan; Chen, Ruwen

    2017-12-01

    This paper develops a product data definition (PDD) system for a semiconductor packaging and testing company with independent intellectual property rights. The new PDD system can solve the problems such as, the effective control of production plans, the timely feedback of production processes, and the efficient schedule of resources. Firstly, this paper introduces the general requirements of the PDD system and depicts the operation flow and the data flow of the PDD system. Secondly, the overall design scheme of the PDD system is put forward. After that, the physical data model is developed using the Power Designer15.0 tool, and the database system is built. Finally, the function realization and running effects of the PDD system are analysed. The successful operation of the PDD system can realize the information flow among various production departments of the enterprise to meet the standard of the enterprise manufacturing integration and improve the efficiency of production management.

  19. Integrated Inductors for RF Transmitters in CMOS/MEMS Smart Microsensor Systems

    PubMed Central

    Kim, Jong-Wan; Takao, Hidekuni; Sawada, Kazuaki; Ishida, Makoto

    2007-01-01

    This paper presents the integration of an inductor by complementary metal-oxide-semiconductor (CMOS) compatible processes for integrated smart microsensor systems that have been developed to monitor the motion and vital signs of humans in various environments. Integration of radio frequency transmitter (RF) technology with complementary metal-oxide-semiconductor/micro electro mechanical systems (CMOS/MEMS) microsensors is required to realize the wireless smart microsensors system. The essential RF components such as a voltage controlled RF-CMOS oscillator (VCO), spiral inductors for an LC resonator and an integrated antenna have been fabricated and evaluated experimentally. The fabricated RF transmitter and integrated antenna were packaged with subminiature series A (SMA) connectors, respectively. For the impedance (50 Ω) matching, a bonding wire type inductor was developed. In this paper, the design and fabrication of the bonding wire inductor for impedance matching is described. Integrated techniques for the RF transmitter by CMOS compatible processes have been successfully developed. After matching by inserting the bonding wire inductor between the on-chip integrated antenna and the VCO output, the measured emission power at distance of 5 m from RF transmitter was -37 dBm (0.2 μW).

  20. Doping of wide-bandgap titanium-dioxide nanotubes: optical, electronic and magnetic properties

    NASA Astrophysics Data System (ADS)

    Alivov, Yahya; Singh, Vivek; Ding, Yuchen; Cerkovnik, Logan Jerome; Nagpal, Prashant

    2014-08-01

    Doping semiconductors is an important step for their technological application. While doping bulk semiconductors can be easily achieved, incorporating dopants in semiconductor nanostructures has proven difficult. Here, we report a facile synthesis method for doping titanium-dioxide (TiO2) nanotubes that was enabled by a new electrochemical cell design. A variety of optical, electronic and magnetic dopants were incorporated into the hollow nanotubes, and from detailed studies it is shown that the doping level can be easily tuned from low to heavily-doped semiconductors. Using desired dopants - electronic (p- or n-doped), optical (ultraviolet bandgap to infrared absorption in co-doped nanotubes), and magnetic (from paramagnetic to ferromagnetic) properties can be tailored, and these technologically important nanotubes can be useful for a variety of applications in photovoltaics, display technologies, photocatalysis, and spintronic applications.Doping semiconductors is an important step for their technological application. While doping bulk semiconductors can be easily achieved, incorporating dopants in semiconductor nanostructures has proven difficult. Here, we report a facile synthesis method for doping titanium-dioxide (TiO2) nanotubes that was enabled by a new electrochemical cell design. A variety of optical, electronic and magnetic dopants were incorporated into the hollow nanotubes, and from detailed studies it is shown that the doping level can be easily tuned from low to heavily-doped semiconductors. Using desired dopants - electronic (p- or n-doped), optical (ultraviolet bandgap to infrared absorption in co-doped nanotubes), and magnetic (from paramagnetic to ferromagnetic) properties can be tailored, and these technologically important nanotubes can be useful for a variety of applications in photovoltaics, display technologies, photocatalysis, and spintronic applications. Electronic supplementary information (ESI) available: See DOI: 10.1039/c4nr02417f

  1. Superconductor Digital-RF Receiver Systems

    NASA Astrophysics Data System (ADS)

    Mukhanov, Oleg A.; Kirichenko, Dmitri; Vernik, Igor V.; Filippov, Timur V.; Kirichenko, Alexander; Webber, Robert; Dotsenko, Vladimir; Talalaevskii, Andrei; Tang, Jia Cao; Sahu, Anubhav; Shevchenko, Pavel; Miller, Robert; Kaplan, Steven B.; Sarwana, Saad; Gupta, Deepnarayan

    Digital superconductor electronics has been experiencing rapid maturation with the emergence of smaller-scale, lower-cost communications applications which became the major technology drivers. These applications are primarily in the area of wireless communications, radar, and surveillance as well as in imaging and sensor systems. In these areas, the fundamental advantages of superconductivity translate into system benefits through novel Digital-RF architectures with direct digitization of wide band, high frequency radio frequency (RF) signals. At the same time the availability of relatively small 4K cryocoolers has lowered the foremost market barrier for cryogenically-cooled digital electronic systems. Recently, we have achieved a major breakthrough in the development, demonstration, and successful delivery of the cryocooled superconductor digital-RF receivers directly digitizing signals in a broad range from kilohertz to gigahertz. These essentially hybrid-technology systems combine a variety of superconductor and semiconductor technologies packaged with two-stage commercial cryocoolers: cryogenic Nb mixed-signal and digital circuits based on Rapid Single Flux Quantum (RSFQ) technology, room-temperature amplifiers, FPGA processing and control circuitry. The demonstrated cryocooled digital-RF systems are the world's first and fastest directly digitizing receivers operating with live satellite signals in X-band and performing signal acquisition in HF to L-band at ˜30GHz clock frequencies.

  2. The Extreme-Technology Industry

    NASA Astrophysics Data System (ADS)

    Hoefflinger, Bernd

    The persistent annual R&D quota of >15% of revenue in the semiconductor industry has been and continues to be more than twice as high as the OECD definition for High-Technology Industry. At the frontiers of miniaturization, the Cost-of-Ownership (COO) continues to rise upwards to beyond 10 billion for a Gigafactory. Only leaders in the world market for selected processors and memories or for foundry services can afford this. Others can succeed with high-value custom products equipped with high-performance application-specific standard products acquired from the leaders in their specific fields or as fabless original-device manufacturers buying wafers from top foundries and packaging/testing from contract manufacturers, thus eliminating the fixed cost for a factory. An overview is offered on the leaders in these different business models. In view of the coming highly diversified and heterogeneous world of nanoelectronic-systems competence, the point is made for global networks of manufacturing and services with the highest standards for product quality and liability.

  3. Terahertz Array Receivers with Integrated Antennas

    NASA Technical Reports Server (NTRS)

    Chattopadhyay, Goutam; Llombart, Nuria; Lee, Choonsup; Jung, Cecile; Lin, Robert; Cooper, Ken B.; Reck, Theodore; Siles, Jose; Schlecht, Erich; Peralta, Alessandro; hide

    2011-01-01

    Highly sensitive terahertz heterodyne receivers have been mostly single-pixel. However, now there is a real need of multi-pixel array receivers at these frequencies driven by the science and instrument requirements. In this paper we explore various receiver font-end and antenna architectures for use in multi-pixel integrated arrays at terahertz frequencies. Development of wafer-level integrated terahertz receiver front-end by using advanced semiconductor fabrication technologies has progressed very well over the past few years. Novel stacking of micro-machined silicon wafers which allows for the 3-dimensional integration of various terahertz receiver components in extremely small packages has made it possible to design multi-pixel heterodyne arrays. One of the critical technologies to achieve fully integrated system is the antenna arrays compatible with the receiver array architecture. In this paper we explore different receiver and antenna architectures for multi-pixel heterodyne and direct detector arrays for various applications such as multi-pixel high resolution spectrometer and imaging radar at terahertz frequencies.

  4. Sensors for process control Focus Team report

    NASA Astrophysics Data System (ADS)

    At the Semiconductor Technology Workshop, held in November 1992, the Semiconductor Industry Association (SIA) convened 179 semiconductor technology experts to assess the 15-year outlook for the semiconductor manufacturing industry. The output of the Workshop, a document entitled 'Semiconductor Technology: Workshop Working Group Reports,' contained an overall roadmap for the technology characteristics envisioned in integrated circuits (IC's) for the period 1992-2007. In addition, the document contained individual roadmaps for numerous key areas in IC manufacturing, such as film deposition, thermal processing, manufacturing systems, exposure technology, etc. The SIA Report did not contain a separate roadmap for contamination free manufacturing (CFM). A key component of CFM for the next 15 years is the use of sensors for (1) defect reduction, (2) improved product quality, (3) improved yield, (4) improved tool utilization through contamination reduction, and (5) real time process control in semiconductor fabrication. The objective of this Focus Team is to generate a Sensors for Process Control Roadmap. Implicit in this objective is the identification of gaps in current sensor technology so that research and development activity in the sensor industry can be stimulated to develop sensor systems capable of meeting the projected roadmap needs. Sensor performance features of interest include detection limit, specificity, sensitivity, ease of installation and maintenance, range, response time, accuracy, precision, ease and frequency of calibration, degree of automation, and adaptability to in-line process control applications.

  5. Wafer-to-wafer bonding of nonplanarized MEMS surfaces using solder

    NASA Astrophysics Data System (ADS)

    Sparks, D.; Queen, G.; Weston, R.; Woodward, G.; Putty, M.; Jordan, L.; Zarabadi, S.; Jayakar, K.

    2001-11-01

    The fabrication and reliability of a solder wafer-to-wafer bonding process is discussed. Using a solder reflow process allows vacuum packaging to be accomplished with unplanarized complementary metal-oxide semiconductor (CMOS) surface topography. This capability enables standard CMOS processes, and integrated microelectromechanical systems devices to be packaged at the chip-level. Alloy variations give this process the ability to bond at lower temperatures than most alternatives. Factors affecting hermeticity, shorts, Q values, shifting cavity pressure, wafer saw cleanliness and corrosion resistance will be covered.

  6. Packaging Technologies for 500C SiC Electronics and Sensors

    NASA Technical Reports Server (NTRS)

    Chen, Liang-Yu

    2013-01-01

    Various SiC electronics and sensors are currently under development for applications in 500C high temperature environments such as hot sections of aerospace engines and the surface of Venus. In order to conduct long-term test and eventually commercialize these SiC devices, compatible packaging technologies for the SiC electronics and sensors are required. This presentation reviews packaging technologies developed for 500C SiC electronics and sensors to address both component and subsystem level packaging needs for high temperature environments. The packaging system for high temperature SiC electronics includes ceramic chip-level packages, ceramic printed circuit boards (PCBs), and edge-connectors. High temperature durable die-attach and precious metal wire-bonding are used in the chip-level packaging process. A high temperature sensor package is specifically designed to address high temperature micro-fabricated capacitive pressure sensors for high differential pressure environments. This presentation describes development of these electronics and sensor packaging technologies, including some testing results of SiC electronics and capacitive pressure sensors using these packaging technologies.

  7. Model-Based Infrared Metrology for Advanced Technology Nodes and 300 mm Wafer Processing

    NASA Astrophysics Data System (ADS)

    Rosenthal, Peter A.; Duran, Carlos; Tower, Josh; Mazurenko, Alex; Mantz, Ulrich; Weidner, Peter; Kasic, Alexander

    2005-09-01

    The use of infrared spectroscopy for production semiconductor process monitoring has evolved recently from primarily unpatterned, i.e. blanket test wafer measurements in a limited historical application space of blanket epitaxial, BPSG, and FSG layers to new applications involving patterned product wafer measurements, and new measurement capabilities. Over the last several years, the semiconductor industry has adopted a new set of materials associated with copper/low-k interconnects, and new structures incorporating exotic materials including silicon germanium, SOI substrates and high aspect ratio trenches. The new device architectures and more chemically sophisticated materials have raised new process control and metrology challenges that are not addressed by current measurement technology. To address the challenges we have developed a new infrared metrology tool designed for emerging semiconductor production processes, in a package compatible with modern production and R&D environments. The tool incorporates recent advances in reflectance instrumentation including highly accurate signal processing, optimized reflectometry optics, and model-based calibration and analysis algorithms. To meet the production requirements of the modern automated fab, the measurement hardware has been integrated with a fully automated 300 mm platform incorporating front opening unified pod (FOUP) interfaces, automated pattern recognition and high throughput ultra clean robotics. The tool employs a suite of automated dispersion-model analysis algorithms capable of extracting a variety of layer properties from measured spectra. The new tool provides excellent measurement precision, tool matching, and a platform for deploying many new production and development applications. In this paper we will explore the use of model based infrared analysis as a tool for characterizing novel bottle capacitor structures employed in high density dynamic random access memory (DRAM) chips. We will explore the capability of the tool for characterizing multiple geometric parameters associated with the manufacturing process that are important to the yield and performance of advanced bottle DRAM devices.

  8. NSC 800, 8-bit CMOS microprocessor

    NASA Technical Reports Server (NTRS)

    Suszko, S. F.

    1984-01-01

    The NSC 800 is an 8-bit CMOS microprocessor manufactured by National Semiconductor Corp., Santa Clara, California. The 8-bit microprocessor chip with 40-pad pin-terminals has eight address buffers (A8-A15), eight data address -- I/O buffers (AD(sub 0)-AD(sub 7)), six interrupt controls and sixteen timing controls with a chip clock generator and an 8-bit dynamic RAM refresh circuit. The 22 internal registers have the capability of addressing 64K bytes of memory and 256 I/O devices. The chip is fabricated on N-type (100) silicon using self-aligned polysilicon gates and local oxidation process technology. The chip interconnect consists of four levels: Aluminum, Polysi 2, Polysi 1, and P(+) and N(+) diffusions. The four levels, except for contact interface, are isolated by interlevel oxide. The chip is packaged in a 40-pin dual-in-line (DIP), side brazed, hermetically sealed, ceramic package with a metal lid. The operating voltage for the device is 5 V. It is available in three operating temperature ranges: 0 to +70 C, -40 to +85 C, and -55 to +125 C. Two devices were submitted for product evaluation by F. Stott, MTS, JPL Microprocessor Specialist. The devices were pencil-marked and photographed for identification.

  9. Application of laser spot cutting on spring contact probe for semiconductor package inspection

    NASA Astrophysics Data System (ADS)

    Lee, Dongkyoung; Cho, Jungdon; Kim, Chan Ho; Lee, Seung Hwan

    2017-12-01

    A packaged semiconductor has to be electrically tested to make sure they are free of any manufacturing defects. The test interface, typically employed between a Printed Circuit Board and the semiconductor devices, consists of densely populated Spring Contact Probe (SCP). A standard SCP typically consists of a plunger, a barrel, and an internal spring. Among these components, plungers are manufactured by a stamping process. After stamping, plunger connecting arms need to be cut into pieces. Currently, mechanical cutting has been used. However, it may damage to the body of plungers due to the mechanical force engaged at the cutting point. Therefore, laser spot cutting is considered to solve this problem. The plunger arm is in the shape of a rectangular beam, 50 μm (H) × 90 μm (W). The plunger material used for this research is gold coated beryllium copper. Laser parameters, such as power and elapsed time, have been selected to study laser spot cutting. Laser material interaction characteristics such as a crater size, material removal zone, ablation depth, ablation threshold, and full penetration are observed. Furthermore, a carefully chosen laser parameter (Etotal = 1000mJ) to test feasibility of laser spot cutting are applied. The result show that laser spot cutting can be applied to cut SCP.

  10. Research and Development of Fully Automatic Alien Smoke Stack and Packaging System

    NASA Astrophysics Data System (ADS)

    Yang, Xudong; Ge, Qingkuan; Peng, Tao; Zuo, Ping; Dong, Weifu

    2017-12-01

    The problem of low efficiency of manual sorting packaging for the current tobacco distribution center, which developed a set of safe efficient and automatic type of alien smoke stack and packaging system. The functions of fully automatic alien smoke stack and packaging system adopt PLC control technology, servo control technology, robot technology, image recognition technology and human-computer interaction technology. The characteristics, principles, control process and key technology of the system are discussed in detail. Through the installation and commissioning fully automatic alien smoke stack and packaging system has a good performance and has completed the requirements for shaped cigarette.

  11. Measurement of Ferroelectric Films in MFM and MFIS Structures

    NASA Astrophysics Data System (ADS)

    Anderson, Jackson D.

    For many years ferroelectric memory has been used in applications requiring low power, yet mainstream adoption has been stifled due to integration and scaling issues. With the renewed interest in these devices due to the recent discovery of ferroelectricity in HfO2, it is imperative that the properties of these films are well understood. To aid that end, a ferroelectric analysis package has been developed and released on GitHub and PyPI under a creative commons non-commercial share-alike license. This package contains functions for visualization and analysis of data from polarization, leakage current, and FORC measurements as well as basic modeling capability. Functionality is verified via the analysis of lead zirconate titanate (PZT) capacitors, where a multi-domain simulation based on an experimental Preisach density shows decent agreement despite measurement noise. The package is then used in the analysis of ferroelectric HfO2 films deposited in metal-ferroelectric-metal (MFM) and metal-ferroelectric-insulator-semiconductor (MFIS) stacks. 13.5 nm HfO2 films deposited on a semiconductor surface are shown to have a coercive voltage of 2.5 V, rather than the 1.9 V of the film in an MFM stack. This value further increases to 3-5 V when a lightly doped semiconductor depletion and inversion capacitance is added to the stack. The magnitude of this change is more than can be accounted for from the 10% voltage drop across the interfacial oxide layer, indicating that the modified surface properties are impacting the formation of the ferroelectric phase during anneal. In light of this, care should be taken to map out ferroelectric HfO2 properties using the particular physical stack that will be used, rather than using an MFM stack as a proxy.

  12. Alternative Packaging for Back-Illuminated Imagers

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata

    2009-01-01

    An alternative scheme has been conceived for packaging of silicon-based back-illuminated, back-side-thinned complementary metal oxide/semiconductor (CMOS) and charge-coupled-device image-detector integrated circuits, including an associated fabrication process. This scheme and process are complementary to those described in "Making a Back-Illuminated Imager With Back-Side Connections" (NPO-42839), NASA Tech Briefs, Vol. 32, No. 7 (July 2008), page 38. To avoid misunderstanding, it should be noted that in the terminology of imaging integrated circuits, "front side" or "back side" does not necessarily refer to the side that, during operation, faces toward or away from a source of light or other object to be imaged. Instead, "front side" signifies that side of a semiconductor substrate upon which the pixel pattern and the associated semiconductor devices and metal conductor lines are initially formed during fabrication, and "back side" signifies the opposite side. If the imager is of the type called "back-illuminated," then the back side is the one that faces an object to be imaged. Initially, a back-illuminated, back-side-thinned image-detector is fabricated with its back side bonded to a silicon handle wafer. At a subsequent stage of fabrication, the front side is bonded to a glass wafer (for mechanical support) and the silicon handle wafer is etched away to expose the back side. The frontside integrated circuitry includes metal input/output contact pads, which are rendered inaccessible by the bonding of the front side to the glass wafer. Hence, one of the main problems is to make the input/output contact pads accessible from the back side, which is ultimately to be the side accessible to the external world. The present combination of an alternative packaging scheme and associated fabrication process constitute a solution of the problem.

  13. TOPICAL REVIEW: Microsystem technologies for implantable applications

    NASA Astrophysics Data System (ADS)

    Receveur, Rogier A. M.; Lindemans, Fred W.; de Rooij, Nicolaas F.

    2007-05-01

    Microsystem technologies (MST) have become the basis of a large industry. The advantages of MST compared to other technologies provide opportunities for application in implantable biomedical devices. This paper presents a general and broad literature review of MST for implantable applications focused on the technical domain. A classification scheme is introduced to order the examples, basic technological building blocks relevant for implantable applications are described and finally a case study on the role of microsystems for one clinical condition is presented. We observe that the microfabricated parts span a wide range for implantable applications in various clinical areas. There are 94 active and 67 commercial 'end items' out of a total of 142. End item refers to the total concept, of which the microsystem may only be a part. From the 105 active end items 18 (13% of total number of end items) are classified as products. From these 18 products, there are only two for chronic use. The number of active end items in clinical, animal and proto phase for chronic use is 17, 13 and 20, respectively. The average year of first publication of chronic end items that are still in the animal or clinical phase is 1994 (n = 7) and 1993 (n = 11), respectively. The major technology market combinations are sensors for cardiovascular, drug delivery for drug delivery and electrodes for neurology and ophthalmology. Together these form 51% of all end items. Pressure sensors form the majority of sensors and there is just one product (considered to be an implantable microsystem) in the neurological area. Micro-machined ceramic packages, glass sealed packages and polymer encapsulations are used. Glass to metal seals are used for feedthroughs. Interconnection techniques such as flip chip, wirebonding or conductive epoxy as used in the semiconductor packaging and assembly industry are also used for manufacturing of implantable devices. Coatings are polymers or metal. As an alternative to implantable primary batteries, rechargeable batteries were introduced or concepts in which energy is provided from the outside based on inductive coupling. Long-term developments aiming at autonomous power are, for example, based on electrostatic conversion of mechanical vibrations. Communication with the implantable device is usually done using an inductive link. A large range of materials commonly used in microfabrication are also used for implantable microsystems.

  14. Semiconductor technology program. Progress briefs

    NASA Technical Reports Server (NTRS)

    Bullis, W. M.

    1980-01-01

    Measurement technology for semiconductor materials, process control, and devices is reviewed. Activities include: optical linewidth and thermal resistance measurements; device modeling; dopant density profiles; resonance ionization spectroscopy; and deep level measurements. Standardized oxide charge terminology is also described.

  15. Semiconductors: Still a Wide Open Frontier for Scientists/Engineers

    NASA Astrophysics Data System (ADS)

    Seiler, David G.

    1997-10-01

    A 1995 Business Week article described several features of the explosive use of semiconductor chips today: ``Booming'' personal computer markets are driving high demand for microprocessors and memory chips; (2) New information superhighway markets will `ignite' sales of multimedia and communication chips; and (3) Demand for digital-signal-processing and data-compression chips, which speed up video and graphics, is `red hot.' A Washington Post article by Stan Hinden said that technology is creating an unstoppable demand for electronic elements. This ``digital pervasiveness'' means that a semiconductor chip is going into almost every high-tech product that people buy - cars, televisions, video recorders, telephones, radios, alarm clocks, coffee pots, etc. ``Semiconductors are everywhere.'' Silicon and compound semiconductors are absolutely essential and are pervasive enablers for DoD operations and systems. DoD's Critical Technologies Plan of 1991 says that ``Semiconductor materials and microelectronics are critically important and appropriately lead the list of critical defense technologies.'' These trends continue unabated. This talk describes some of the frontiers of semiconductors today and shows how scientists and engineers can effectively contribute to its advancement. Cooperative, multidisciplinary efforts are increasing. Specific examples will be given for scanning capacitance microscopy and thin-film metrology.

  16. Semiconductors: A 21st Century Social Studies Topic.

    ERIC Educational Resources Information Center

    Sunal, Cynthia

    2000-01-01

    Addresses the reasons for exploring semiconductor technology and organic semiconductors in schools for either middle school or secondary students in an interdisciplinary social studies and science environment. Provides background information on transistors and semiconductors. Offers three social studies lessons and related science lessons if an…

  17. Harsh-Environment Solid-State Gamma Detector for Down-hole Gas and Oil Exploration

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Peter Sandvik; Stanislav Soloviev; Emad Andarawis

    2007-08-10

    The goal of this program was to develop a revolutionary solid-state gamma-ray detector suitable for use in down-hole gas and oil exploration. This advanced detector would employ wide-bandgap semiconductor technology to extend the gamma sensor's temperature capability up to 200 C as well as extended reliability, which significantly exceeds current designs based on photomultiplier tubes. In Phase II, project tasks were focused on optimization of the final APD design, growing and characterizing the full scintillator crystals of the selected composition, arranging the APD device packaging, developing the needed optical coupling between scintillator and APD, and characterizing the combined elements asmore » a full detector system preparing for commercialization. What follows is a summary report from the second 18-month phase of this program.« less

  18. Smart packaging systems for food applications: a review.

    PubMed

    Biji, K B; Ravishankar, C N; Mohan, C O; Srinivasa Gopal, T K

    2015-10-01

    Changes in consumer preference for safe food have led to innovations in packaging technologies. This article reviews about different smart packaging systems and their applications in food packaging, packaging research with latest innovations. Active and intelligent packing are such packaging technologies which offer to deliver safer and quality products. Active packaging refers to the incorporation of additives into the package with the aim of maintaining or extending the product quality and shelf life. The intelligent systems are those that monitor the condition of packaged food to give information regarding the quality of the packaged food during transportation and storage. These technologies are designed to the increasing demand for safer foods with better shelf life. The market for active and intelligent packaging systems is expected to have a promising future by their integration into packaging materials or systems.

  19. Microelectronic device package with an integral window

    DOEpatents

    Peterson, Kenneth A.; Watson, Robert D.

    2002-01-01

    An apparatus for packaging of microelectronic devices, including an integral window. The microelectronic device can be a semiconductor chip, a CCD chip, a CMOS chip, a VCSEL chip, a laser diode, a MEMS device, or a IMEMS device. The package can include a cofired ceramic frame or body. The package can have an internal stepped structure made of one or more plates, with apertures, which are patterned with metallized conductive circuit traces. The microelectronic device can be flip-chip bonded on the plate to these traces, and oriented so that the light-sensitive side is optically accessible through the window. A cover lid can be attached to the opposite side of the package. The result is a compact, low-profile package, having an integral window that can be hermetically-sealed. The package body can be formed by low-temperature cofired ceramic (LTCC) or high-temperature cofired ceramic (HTCC) multilayer processes with the window being simultaneously joined (e.g. cofired) to the package body during LTCC or HTCC processing. Multiple chips can be located within a single package. The cover lid can include a window. The apparatus is particularly suited for packaging of MEMS devices, since the number of handling steps is greatly reduced, thereby reducing the potential for contamination.

  20. European consumer response to packaging technologies for improved beef safety.

    PubMed

    Van Wezemael, Lynn; Ueland, Øydis; Verbeke, Wim

    2011-09-01

    Beef packaging can influence consumer perceptions of beef. Although consumer perceptions and acceptance are considered to be among the most limiting factors in the application of new technologies, there is a lack of knowledge about the acceptability to consumers of beef packaging systems aimed at improved safety. This paper explores European consumers' acceptance levels of different beef packaging technologies. An online consumer survey was conducted in five European countries (n=2520). Acceptance levels among the sample ranged between 23% for packaging releasing preservative additives up to 73% for vacuum packaging. Factor analysis revealed that familiar packaging technologies were clearly preferred over non-familiar technologies. Four consumer segments were identified: the negative (31% of the sample), cautious (30%), conservative (17%) and enthusiast (22%) consumers, which were profiled based on their attitudes and beef consumption behaviour. Differences between consumer acceptance levels should be taken into account while optimising beef packaging and communicating its benefits. Copyright © 2011 Elsevier Ltd. All rights reserved.

  1. Monte Carlo simulation to calculate the rate of 137Cs gamma rays dispersion in gallium arsenide compound

    NASA Astrophysics Data System (ADS)

    Haider, F. A.; Chee, F. P.; Abu Hassan, H.; Saafie, S.

    2017-01-01

    Radiation effects on Gallium Arsenide (GaAs) have been tested by exposing samples to Cesium-137 (137Cs) gamma rays. Gallium Arsenide is a basic photonic material for most of the space technology communication, and, therefore, lends itself for applications where this is of concern. Monte Carlo simulations of interaction between direct ionizing radiation and GaAs structure have been performed in TRIM software, being part of SRIM 2011 programming package. An adverse results shows that energy dose does not govern the displacement of atoms and is dependent on the changes of incident angles and thickness of the GaAs target element. At certain thickness of GaAs and incident angle of 137Cs ion, the displacement damage is at its highest value. From the simulation result, it is found that if the thickness of the GaAs semiconductor material is small compared to the projected range at that particular incident energy, the energy loss in the target GaAs will be small. Hence, when the depth of semiconductor material is reduced, the range of damage in the target also decreased. However, the other factors such as quantum size effect, the energy gap between the conduction and valence band must also be taken into consideration when the dimension of the device is diminished.

  2. Radiation immune RAM semiconductor technology for the 80's. [Random Access Memory

    NASA Technical Reports Server (NTRS)

    Hanna, W. A.; Panagos, P.

    1983-01-01

    This paper presents current and short term future characteristics of RAM semiconductor technologies which were obtained by literature survey and discussions with cognizant Government and industry personnel. In particular, total ionizing dose tolerance and high energy particle susceptibility of the technologies are addressed. Technologies judged compatible with spacecraft applications are ranked to determine the best current and future technology for fast access (less than 60 ns), radiation tolerant RAM.

  3. Charge pump-based MOSFET-only 1.5-bit pipelined ADC stage in digital CMOS technology

    NASA Astrophysics Data System (ADS)

    Singh, Anil; Agarwal, Alpana

    2016-10-01

    A simple low-power and low-area metal-oxide-semiconductor field-effect transistor-only fully differential 1.5-bit pipelined analog-to-digital converter stage is proposed and designed in Taiwan Semiconductor Manufacturing Company 0.18 μm-technology using BSIM3v3 parameters with supply voltage of 1.8 V in inexpensive digital complementary metal-oxide semiconductor (CMOS) technology. It is based on charge pump technique to achieve the desired voltage gain of 2, independent of capacitor mismatch and avoiding the need of power hungry operational amplifier-based architecture to reduce the power, Si area and cost. Various capacitances are implemented by metal-oxide semiconductor capacitors, offering compatibility with cheaper digital CMOS process in order to reduce the much required manufacturing cost.

  4. Ultra-high heat flux cooling characteristics of cryogenic micro-solid nitrogen particles and its application to semiconductor wafer cleaning technology

    NASA Astrophysics Data System (ADS)

    Ishimoto, Jun; Oh, U.; Guanghan, Zhao; Koike, Tomoki; Ochiai, Naoya

    2014-01-01

    The ultra-high heat flux cooling characteristics and impingement behavior of cryogenic micro-solid nitrogen (SN2) particles in relation to a heated wafer substrate were investigated for application to next generation semiconductor wafer cleaning technology. The fundamental characteristics of cooling heat transfer and photoresist removal-cleaning performance using micro-solid nitrogen particulate spray impinging on a heated substrate were numerically investigated and experimentally measured by a new type of integrated computational-experimental technique. This study contributes not only advanced cryogenic cooling technology for high thermal emission devices, but also to the field of nano device engineering including the semiconductor wafer cleaning technology.

  5. Proceedings of the Conference on High-temperature Electronics

    NASA Technical Reports Server (NTRS)

    1981-01-01

    The development of electronic devices for use in high temperature environments is addressed. The instrumentational needs of planetary exploration, fossil and nuclear power reactors, turbine engine monitoring, and well logging are defined. Emphasis is place on the fabrication and performance of materials and semiconductor devices, circuits and systems and packaging.

  6. Packaging-induced failure of semiconductor lasers and optical telecommunications components

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Sharps, J.A.

    1996-12-31

    Telecommunications equipment for field deployment generally have specified lifetimes of > 100,000 hr. To achieve this high reliability, it is common practice to package sensitive components in hermetic, inert gas environments. The intent is to protect components from particulate and organic contamination, oxidation, and moisture. However, for high power density 980 nm diode lasers used in optical amplifiers, the authors found that hermetic, inert gas packaging induced a failure mode not observed in similar, unpackaged lasers. They refer to this failure mode as packaging-induced failure, or PIF. PIF is caused by nanomole amounts of organic contamination which interact with highmore » intensity 980 nm light to form solid deposits over the emitting regions of the lasers. These deposits absorb 980 nm light, causing heating of the laser, narrowing of the band gap, and eventual thermal runaway. The authors have found PIF is averted by packaging with free O{sub 2} and/or a getter material that sequesters organics.« less

  7. Effectiveness of X-ray grating interferometry for non-destructive inspection of packaged devices

    NASA Astrophysics Data System (ADS)

    Uehara, Masato; Yashiro, Wataru; Momose, Atsushi

    2013-10-01

    It is difficult to inspect packaged devices such as IC packages and power modules because the devices contain various components, such as semiconductors, metals, ceramics, and resin. In this paper, we demonstrated the effectiveness of X-ray grating interferometry (XGI) using a laboratory X-ray tube for the industrial inspection of packaged devices. The obtained conventional absorption image showed heavy-elemental components such as metal wires and electrodes, but the image did not reveal the defects in the light-elemental components. On the other hand, the differential phase-contrast image obtained by XGI revealed microvoids and scars in the encapsulant of the samples. The visibility contrast image also obtained by XGI showed some cracks in the ceramic insulator of power module sample. In addition, the image showed the silicon plate surrounded by the encapsulant having the same X-ray absorption coefficient. While these defects and components are invisible in the conventional industrial X-ray imaging, XGI thus has an attractive potential for the industrial inspection of the packaged devices.

  8. Multi-physics modelling contributions to investigate the atmospheric cosmic rays on the single event upset sensitivity along the scaling trend of CMOS technologies.

    PubMed

    Hubert, G; Regis, D; Cheminet, A; Gatti, M; Lacoste, V

    2014-10-01

    Particles originating from primary cosmic radiation, which hit the Earth's atmosphere give rise to a complex field of secondary particles. These particles include neutrons, protons, muons, pions, etc. Since the 1980s it has been known that terrestrial cosmic rays can penetrate the natural shielding of buildings, equipment and circuit package and induce soft errors in integrated circuits. Recently, research has shown that commercial static random access memories are now so small and sufficiently sensitive that single event upsets (SEUs) may be induced from the electronic stopping of a proton. With continued advancements in process size, this downward trend in sensitivity is expected to continue. Then, muon soft errors have been predicted for nano-electronics. This paper describes the effects in the specific cases such as neutron-, proton- and muon-induced SEU observed in complementary metal-oxide semiconductor. The results will allow investigating the technology node sensitivity along the scaling trend. © The Author 2014. Published by Oxford University Press. All rights reserved. For Permissions, please email: journals.permissions@oup.com.

  9. Development of Electronics for Low-Temperature Space Missions

    NASA Technical Reports Server (NTRS)

    Patterson, Richard L.; Hammoud, Ahmad; Dickman, John E.; Gerber, Scott S.; Overton, Eric

    2001-01-01

    Electronic systems that are capable of operating at cryogenic temperatures will be needed for many future NASA space missions, including deep space probes and spacecraft for planetary surface exploration. In addition to being able to survive the harsh deep space environment, low-temperature electronics would help improve circuit performance, increase system efficiency, and reduce payload development and launch costs. Terrestrial applications where components and systems must operate in low-temperature environments include cryogenic instrumentation, superconducting magnetic energy storage, magnetic levitation transportation systems, and arctic exploration. An ongoing research and development project for the design, fabrication, and characterization of low-temperature electronics and supporting technologies at NASA Glenn Research Center focuses on efficient power systems capable of surviving in and exploiting the advantages of low-temperature environments. Supporting technologies include dielectric and insulating materials, semiconductor devices, passive power components, optoelectronic devices, and packaging and integration of the developed components into prototype flight hardware. An overview of the project is presented, including a description of the test facilities, a discussion of selected data from component testing, and a presentation of ongoing research activities being performed in collaboration with various organizations.

  10. A new era of semiconductor genetics using ion-sensitive field-effect transistors: the gene-sensitive integrated cell.

    PubMed

    Toumazou, Christofer; Thay, Tan Sri Lim Kok; Georgiou, Pantelis

    2014-03-28

    Semiconductor genetics is now disrupting the field of healthcare owing to the rapid parallelization and scaling of DNA sensing using ion-sensitive field-effect transistors (ISFETs) fabricated using commercial complementary metal -oxide semiconductor technology. The enabling concept of DNA reaction monitoring introduced by Toumazou has made this a reality and we are now seeing relentless scaling with Moore's law ultimately achieving the $100 genome. In this paper, we present the next evolution of this technology through the creation of the gene-sensitive integrated cell (GSIC) for label-free real-time analysis based on ISFETs. This device is derived from the traditional metal-oxide semiconductor field-effect transistor (MOSFET) and has electrical performance identical to that of a MOSFET in a standard semiconductor process, yet is capable of incorporating DNA reaction chemistries for applications in single nucleotide polymorphism microarrays and DNA sequencing. Just as application-specific integrated circuits, which are developed in much the same way, have shaped our consumer electronics industry and modern communications and memory technology, so, too, do GSICs based on a single underlying technology principle have the capacity to transform the life science and healthcare industries.

  11. Predictive factors of life quality among packaging workers in Taiwan.

    PubMed

    Yang, Shang-Yu; Hsu, Der-Jen; Yen, Chun-Ming; Chang, Jer-Hao

    2018-05-16

    The semiconductor plants on the top of high-tech industrial chain hire many packaging workers to carry out miscellaneous packing tasks for various product orders from different companies and countries. Under tremendous workload the quality of life (QoL) of such packaging workers need to be concerned. The aim of this study was to explore factors influencing their QoL. This study recruited 247 packing workers (162 male and 85 female; mean age: 35.6 years old) in 2015 and 2016 from a semiconductor plant in Taiwan by convenience sampling. The questionnaire comprised four parts: demographics, the World Health Organization Quality of Life (WHOQOL-BREF), an occupational burnout inventory and the Nordic Musculoskeletal Questionnaire. The four domains of the WHOQOL-BREF were defined as outcome variables. Predictive factors included gender (reference: male), age (reference: ≤ 35), BMI (reference: ≤ 25), educational level (reference: below university), marital/partner status (reference: married/cohabiting), years of work (reference: ≤ 5), work shift (reference: day shift), personal burnout, work-related burnout, over-commitment to work and the number of body parts with discomfort (0-9). The findings showed that physical QoL was negatively correlated with night -shift work, personal burnout, and number of body parts with discomfort. Psychological QoL was negatively correlated with night shift work and personal burnout. Environment QoL was negatively correlated with being male, night shift work and personal burnout. The results showed that the QoL among the packaging workers could be improved by reducing musculoskeletal discomfort, personal burnout and by improving work schedules.

  12. A semiconductor bridge ignited hot gas piston ejector

    NASA Technical Reports Server (NTRS)

    Grubelich, M. C.; Bickes, Robert W., Jr.

    1993-01-01

    The topics are presented in viewgraph form and include the following: semiconductor bridge technology (SCB); SCB philosophy; technology transfer; simplified sketch of SCB; SCB processing; SCB design; SCB test assembly; 5 mJ SCB burst based on a polaroid photograph; micro-convective heat transfer hypothesis; SCB fire set; comparison of SCB and hot-wire actuators; satellite firing sets; logic fire set; SCB smart component; SCB smart firing set; semiconductor design considerations; and the adjustable actuator system.

  13. From Bell Labs to Silicon Valley: A Saga of Technology Transfer, 1954-1961

    NASA Astrophysics Data System (ADS)

    Riordan, Michael

    2009-03-01

    Although Bell Telephone Laboratories invented the transistor and developed most of the associated semiconductor technology, the integrated circuit or microchip emerged elsewhere--at Texas Instruments and Fairchild Semiconductor Company. I recount how the silicon technology required to make microchips possible was first developed at Bell Labs in the mid-1950s. Much of it reached the San Francisco Bay Area when transistor pioneer William Shockley left Bell Labs in 1955 to establish the Shockley Semiconductor Laboratory in Mountain View, hiring a team of engineers and scientists to develop and manufacture transistors and related semiconductor devices. But eight of them--including Gordon Moore and Robert Noyce, eventually the co-founders of Intel--resigned en masse in September 1957 to start Fairchild, bringing with them the scientific and technological expertise they had acquired and further developed at Shockley's firm. This event marked the birth of Silicon Valley, both technologically and culturally. By March 1961 the company was marketing its Micrologic integrated circuits, the first commercial silicon microchips, based on the planar processing technique developed at Fairchild by Jean Hoerni.

  14. Sensors, nano-electronics and photonics for the Army of 2030 and beyond

    NASA Astrophysics Data System (ADS)

    Perconti, Philip; Alberts, W. C. K.; Bajaj, Jagmohan; Schuster, Jonathan; Reed, Meredith

    2016-02-01

    The US Army's future operating concept will rely heavily on sensors, nano-electronics and photonics technologies to rapidly develop situational understanding in challenging and complex environments. Recent technology breakthroughs in integrated 3D multiscale semiconductor modeling (from atoms-to-sensors), combined with ARL's Open Campus business model for collaborative research provide a unique opportunity to accelerate the adoption of new technology for reduced size, weight, power, and cost of Army equipment. This paper presents recent research efforts on multi-scale modeling at the US Army Research Laboratory (ARL) and proposes the establishment of a modeling consortium or center for semiconductor materials modeling. ARL's proposed Center for Semiconductor Materials Modeling brings together government, academia, and industry in a collaborative fashion to continuously push semiconductor research forward for the mutual benefit of all Army partners.

  15. Patterning roadmap: 2017 prospects

    NASA Astrophysics Data System (ADS)

    Neisser, Mark

    2017-06-01

    Road mapping of semiconductor chips has been underway for over 20 years, first with the International Technology Roadmap for Semiconductors (ITRS) roadmap and now with the International Roadmap for Devices and Systems (IRDS) roadmap. The original roadmap was mostly driven bottom up and was developed to ensure that the large numbers of semiconductor producers and suppliers had good information to base their research and development on. The current roadmap is generated more top-down, where the customers of semiconductor chips anticipate what will be needed in the future and the roadmap projects what will be needed to fulfill that demand. The More Moore section of the roadmap projects that advanced logic will drive higher-resolution patterning, rather than memory chips. Potential solutions for patterning future logic nodes can be derived as extensions of `next-generation' patterning technologies currently under development. Advanced patterning has made great progress, and two `next-generation' patterning technologies, EUV and nanoimprint lithography, have potential to be in production as early as 2018. The potential adoption of two different next-generation patterning technologies suggests that patterning technology is becoming more specialized. This is good for the industry in that it lowers overall costs, but may lead to slower progress in extending any one patterning technology in the future.

  16. Technology Roadmaps for Compound Semiconductors

    PubMed Central

    Bennett, Herbert S.

    2000-01-01

    The roles cited for compound semiconductors in public versions of existing technology roadmaps from the National Electronics Manufacturing Initiative, Inc., Optoelectronics Industry Development Association, Microelectronics Advanced Research Initiative on Optoelectronic Interconnects, and Optoelectronics Industry and Technology Development Association (OITDA) are discussed and compared within the context of trends in the Si CMOS industry. In particular, the extent to which these technology roadmaps treat compound semiconductors at the materials processing and device levels will be presented for specific applications. For example, OITDA’s Optical Communications Technology Roadmap directly connects the information demand of delivering 100 Mbit/s to the home to the requirement of producing 200 GHz heterojunction bipolar transistors with 30 nm bases and InP high electron mobility transistors with 100 nm gates. Some general actions for progress towards the proposed International Technology Roadmap for Compound Semiconductors (ITRCS) and methods for determining the value of an ITRCS will be suggested. But, in the final analysis, the value added by an ITRCS will depend on how industry leaders respond. The technical challenges and economic opportunities of delivering high quality digital video to consumers provide concrete examples of where the above actions and methods could be applied. PMID:27551615

  17. Center for Semiconductor Materials and Device Modeling: expanding collaborative research opportunities between government, academia, and industry

    NASA Astrophysics Data System (ADS)

    Perconti, Philip; Bedair, Sarah S.; Bajaj, Jagmohan; Schuster, Jonathan; Reed, Meredith

    2016-09-01

    To increase Soldier readiness and enhance situational understanding in ever-changing and complex environments, there is a need for rapid development and deployment of Army technologies utilizing sensors, photonics, and electronics. Fundamental aspects of these technologies include the research and development of semiconductor materials and devices which are ubiquitous in numerous applications. Since many Army technologies are considered niche, there is a lack of significant industry investment in the fundamental research and understanding of semiconductor technologies relevant to the Army. To address this issue, the US Army Research Laboratory is establishing a Center for Semiconductor Materials and Device Modeling and seeks to leverage expertise and resources across academia, government and industry. Several key research areas—highlighted and addressed in this paper—have been identified by ARL and external partners and will be pursued in a collaborative fashion by this Center. This paper will also address the mechanisms by which the Center is being established and will operate.

  18. First On-Wafer Power Characterization of MMIC Amplifiers at Sub-Millimeter Wave Frequencies

    NASA Technical Reports Server (NTRS)

    Fung, A. K.; Gaier, T.; Samoska, L.; Deal, W. R.; Radisic, V.; Mei, X. B.; Yoshida, W.; Liu, P. S.; Uyeda, J.; Barsky, M.; hide

    2008-01-01

    Recent developments in semiconductor technology have enabled advanced submillimeter wave (300 GHz) transistors and circuits. These new high speed components have required new test methods to be developed for characterizing performance, and to provide data for device modeling to improve designs. Current efforts in progressing high frequency testing have resulted in on-wafer-parameter measurements up to approximately 340 GHz and swept frequency vector network analyzer waveguide measurements to 508 GHz. On-wafer noise figure measurements in the 270-340 GHz band have been demonstrated. In this letter we report on on-wafer power measurements at 330 GHz of a three stage amplifier that resulted in a maximum measured output power of 1.78mW and maximum gain of 7.1 dB. The method utilized demonstrates the extension of traditional power measurement techniques to submillimeter wave frequencies, and is suitable for automated testing without packaging for production screening of submillimeter wave circuits.

  19. 1.6 V nanogenerator for mechanical energy harvesting using PZT nanofibers.

    PubMed

    Chen, Xi; Xu, Shiyou; Yao, Nan; Shi, Yong

    2010-06-09

    Energy harvesting technologies that are engineered to miniature sizes, while still increasing the power delivered to wireless electronics, (1, 2) portable devices, stretchable electronics, (3) and implantable biosensors, (4, 5) are strongly desired. Piezoelectric nanowire- and nanofiber-based generators have potential uses for powering such devices through a conversion of mechanical energy into electrical energy. (6) However, the piezoelectric voltage constant of the semiconductor piezoelectric nanowires in the recently reported piezoelectric nanogenerators (7-12) is lower than that of lead zirconate titanate (PZT) nanomaterials. Here we report a piezoelectric nanogenerator based on PZT nanofibers. The PZT nanofibers, with a diameter and length of approximately 60 nm and 500 microm, were aligned on interdigitated electrodes of platinum fine wires and packaged using a soft polymer on a silicon substrate. The measured output voltage and power under periodic stress application to the soft polymer was 1.63 V and 0.03 microW, respectively.

  20. The National Si-Soft Project

    NASA Astrophysics Data System (ADS)

    Chang, Chun-Yen; Trappey, Charles V.

    2003-06-01

    Taiwan's electronics industry emerged in the 1960s with the creation of a small but well planned integrated circuit (IC) packaging industry. This industry investment led to bolder investments in research, laboratories, and the island's first semiconductor foundries in the 1980s. Following the success of the emerging IC manufacturers and design houses, hundreds of service firms and related industries (software, legal services, substrate, chemical, and test firms among others) opened for business and completed Taiwan's IC manufacturing supply chain. The challenge for Taiwan's electronics industry is to take the lead in the design, manufacture, and marketing of name brand electronic products. This paper introduces the Si-Soft (silicon software) Project, a national initiative that builds on Taiwan's achievements in manufacturing (referred to as Si-Hard or silicon hardware) to launch a new wave of companies. These firms will contribute to the core underlying technology (intellectual property) used in the creation of electronic products.

  1. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Fu, Jiajia; Zhao, Lixia, E-mail: lxzhao@semi.ac.cn, E-mail: jmli@semi.ac.cn; Cao, Haicheng

    The degradation behaviors of high power GaN-based vertical blue LEDs on Si substrates were measured using in-situ accelerated life test. The results show that the dominant failure mechanism would be different during the operation. Besides that, the corresponding associated failure mechanisms were investigated systematically by using different analysis technologies, such as Scan Electron Microscopy, Reflectivity spectroscopy, Transient Thermal Analysis, Raman Spectra, etc. It is shown that initially, the failure modes were mainly originated from the semiconductor die and interconnect, while afterwards, the following serious deterioration of the radiant fluxes was attributed to the package. The interface material and quality, suchmore » as die attach and frame, play an important role in determining the thermal performance and reliability. In addition, the heating effect during the operation will also release the compressive strain in the chip. These findings will help to improve the reliability of GaN-based LEDs, especially for the LEDs with vertical structure.« less

  2. Semiconductor technology program: Progress briefs

    NASA Technical Reports Server (NTRS)

    Galloway, K. F.; Scace, R. I.; Walters, E. J.

    1981-01-01

    Measurement technology for semiconductor materials, process control, and devices, is discussed. Silicon and silicon based devices are emphasized. Highlighted activities include semiinsulating GaAs characterization, an automatic scanning spectroscopic ellipsometer, linewidth measurement and coherence, bandgap narrowing effects in silicon, the evaluation of electrical linewidth uniformity, and arsenicomplanted profiles in silicon.

  3. Experimental demonstration of distributed feedback semiconductor lasers based on reconstruction-equivalent-chirp technology.

    PubMed

    Li, Jingsi; Wang, Huan; Chen, Xiangfei; Yin, Zuowei; Shi, Yuechun; Lu, Yanqing; Dai, Yitang; Zhu, Hongliang

    2009-03-30

    In this paper we report, to the best of our knowledge, the first experimental realization of distributed feedback (DFB) semiconductor lasers based on reconstruction-equivalent-chirp (REC) technology. Lasers with different lasing wavelengths are achieved simultaneously on one chip, which shows a potential for the REC technology in combination with the photonic integrated circuits (PIC) technology to be a possible method for monolithic integration, in that its fabrication is as powerful as electron beam technology and the cost and time-consuming are almost the same as standard holographic technology.

  4. Diamond-based heat spreaders for power electronic packaging applications

    NASA Astrophysics Data System (ADS)

    Guillemet, Thomas

    As any semiconductor-based devices, power electronic packages are driven by the constant increase of operating speed (higher frequency), integration level (higher power), and decrease in feature size (higher packing density). Although research and innovation efforts have kept these trends continuous for now more than fifty years, the electronic packaging technology is currently facing a challenge that must be addressed in order to move toward any further improvements in terms of performances or miniaturization: thermal management. Thermal issues in high-power packages strongly affect their reliability and lifetime and have now become one of the major limiting factors of power modules development. Thus, there is a strong need for materials that can sustain higher heat flux levels while safely integrating into the electronic package architecture. In such context, diamond is an attractive candidate because of its outstanding thermal conductivity, low thermal expansion, and high electrical resistivity. Its low heat capacity relative to metals such as aluminum or copper makes it however preferable for heat spreading applications (as a heat-spreader) rather than for dissipating the heat flux itself (as a heat sink). In this study, a dual diamond-based heat-spreading solution is proposed. Polycrystalline diamond films were grown through laser-assisted combustion synthesis on electronic substrates (in the U.S) while, in parallel, diamond-reinforced copper-matrix composite films were fabricated through tape casting and hot pressing (in France). These two types of diamond-based heat-spreading films were characterized and their microstructure and chemical composition were related to their thermal performances. Particular emphasize was put on the influence of interfaces on the thermal properties of the materials, either inside a single material (grain boundaries) or between dissimilar materials (film/substrate interface, matrix/reinforcement interface). Finally, the packaging potential of the two heat-spreading solutions invoked was evaluated. This study was carried out within the framework of a French-American collaboration between the Electrical Engineering department of the University of Nebraska-Lincoln (United States, U.S.) and the Institute of Condensed Matter Chemistry of the University of Bordeaux (France). This study was financed by the Office of Naval Research in the U.S., and by the Region Aquitaine in France.

  5. Aluminum-Scandium: A Material for Semiconductor Packaging

    NASA Astrophysics Data System (ADS)

    Geissler, Ute; Thomas, Sven; Schneider-Ramelow, Martin; Mukhopadhyay, Biswajit; Lang, Klaus-Dieter

    2016-10-01

    A well-known aluminum-scandium (Al-Sc) alloy, already used in lightweight sports equipment, is about to be established for use in electronic packaging. One application for Al-Sc alloy is manufacture of bonding wires. The special feature of the alloy is its ability to harden by precipitation. The new bonding wires with electrical conductivity similar to pure Al wires can be processed on common wire bonders for aluminum wedge/wedge (w/w) bonding. The wires exhibit very fine-grained microstructure. Small Al3Sc particles are the main reason for its high strength and prevent recrystallization and grain growth at higher temperatures (>150°C). After the wire-bonding process, the interface is well closed. Reliability investigations by active power cycling demonstrated considerably improved lifetime compared with pure Al heavy wires. Furthermore, the Al-Sc alloy was sputter-deposited onto silicon wafer to test it as chip metallization in copper (Cu) ball/wedge bonding technology. After deposition, the layers exhibited fine-grained columnar structure and small coherent Al3Sc particles with dimensions of a few nanometers. These particles inhibit softening processes such as Al splashing in fine wire bonding processes and increase the thickness of remnant Al under the copper balls to 85% of the initial thickness.

  6. Materials for high-density electronic packaging and interconnection

    NASA Technical Reports Server (NTRS)

    1990-01-01

    Electronic packaging and interconnections are the elements that today limit the ultimate performance of advanced electronic systems. Materials in use today and those becoming available are critically examined to ascertain what actions are needed for U.S. industry to compete favorably in the world market for advanced electronics. Materials and processes are discussed in terms of the final properties achievable and systems design compatibility. Weak points in the domestic industrial capability, including technical, industrial philosophy, and political, are identified. Recommendations are presented for actions that could help U.S. industry regain its former leadership position in advanced semiconductor systems production.

  7. 193nm high power lasers for the wide bandgap material processing

    NASA Astrophysics Data System (ADS)

    Fujimoto, Junichi; Kobayashi, Masakazu; Kakizaki, Koji; Oizumi, Hiroaki; Mimura, Toshio; Matsunaga, Takashi; Mizoguchi, Hakaru

    2017-02-01

    Recently infrared laser has faced resolution limit of finer micromachining requirement on especially semiconductor packaging like Fan-Out Wafer Level Package (FO-WLP) and Through Glass Via hole (TGV) which are hard to process with less defect. In this study, we investigated ablation rate with deep ultra violet excimer laser to explore its possibilities of micromachining on organic and glass interposers. These results were observed with a laser microscopy and Scanning Electron Microscope (SEM). As the ablation rates of both materials were quite affordable value, excimer laser is expected to be put in practical use for mass production.

  8. JPRS Report (Erratum), Science & Technology, Japan, Selections from MITI White Paper on Industrial Technology Trends and Issues

    DTIC Science & Technology

    1989-08-30

    year period in the following products: Technology Field Product New materials Composite materials Amorphous alloys Macromolecule separation...plastics 8. Composite materials B. Parts 9. Optical fiber 10. Semiconductor lasers 11. CCD 12. Semiconductor memory elements 13. Microcomputers...separation. Composite materials (containing carbon fiber) (1) Aerospace users required strict specifi cations for carbon fiber, resulting in

  9. NASA Electronic Parts and Packaging Program

    NASA Technical Reports Server (NTRS)

    Kayali, Sammy

    2000-01-01

    NEPP program objectives are to: (1) Access the reliability of newly available electronic parts and packaging technologies for usage on NASA projects through validations, assessments, and characterizations, and the development of test methods/tools; (2)Expedite infusion paths for advanced (emerging) electronic parts and packaging technologies by evaluations of readiness for manufacturability and project usage consideration; (3) Provide NASA projects with technology selection, application, and validation guidelines for electronic parts and packaging hardware and processes; nd (4) Retain and disseminate electronic parts and packaging quality assurance, reliability validations, tools, and availability information to the NASA community.

  10. Extreme temperature packaging: challenges and opportunities

    NASA Astrophysics Data System (ADS)

    Johnson, R. Wayne

    2016-05-01

    Consumer electronics account for the majority of electronics manufactured today. Given the temperature limits of humans, consumer electronics are typically rated for operation from -40°C to +85°C. Military applications extend the range to -65°C to +125°C while underhood automotive electronics may see +150°C. With the proliferation of the Internet of Things (IoT), the goal of instrumenting (sensing, computation, transmission) to improve safety and performance in high temperature environments such as geothermal wells, nuclear reactors, combustion chambers, industrial processes, etc. requires sensors, electronics and packaging compatible with these environments. Advances in wide bandgap semiconductors (SiC and GaN) allow the fabrication of high temperature compatible sensors and electronics. Integration and packaging of these devices is required for implementation into actual applications. The basic elements of packaging are die attach, electrical interconnection and the package or housing. Consumer electronics typically use conductive adhesives or low melting point solders for die attach, wire bonds or low melting solder for electrical interconnection and epoxy for the package. These materials melt or decompose in high temperature environments. This paper examines materials and processes for high temperature packaging including liquid transient phase and sintered nanoparticle die attach, high melting point wires for wire bonding and metal and ceramic packages. The limitations of currently available solutions will also be discussed.

  11. Progress in silicon carbide semiconductor technology

    NASA Technical Reports Server (NTRS)

    Powell, J. A.; Neudeck, P. G.; Matus, L. G.; Petit, J. B.

    1992-01-01

    Silicon carbide semiconductor technology has been advancing rapidly over the last several years. Advances have been made in boule growth, thin film growth, and device fabrication. This paper wi11 review reasons for the renewed interest in SiC, and will review recent developments in both crystal growth and device fabrication.

  12. Courseware Development for Semiconductor Technology and Its Application into Instruction

    ERIC Educational Resources Information Center

    Tsai, Shu-chiao

    2009-01-01

    This study reports on the development of ESP (English for specific purposes) courseware for semiconductor technology and its integration as a "silent partner" into instruction. This kind of team-teaching could help overcome current problems encountered in developing ESP in Taiwan. The content of the material under discussion includes…

  13. Narrowband light detection via internal quantum efficiency manipulation of organic photodiodes

    NASA Astrophysics Data System (ADS)

    Armin, Ardalan; Jansen-van Vuuren, Ross D.; Kopidakis, Nikos; Burn, Paul L.; Meredith, Paul

    2015-02-01

    Spectrally selective light detection is vital for full-colour and near-infrared (NIR) imaging and machine vision. This is not possible with traditional broadband-absorbing inorganic semiconductors without input filtering, and is yet to be achieved for narrowband absorbing organic semiconductors. We demonstrate the first sub-100 nm full-width-at-half-maximum visible-blind red and NIR photodetectors with state-of-the-art performance across critical response metrics. These devices are based on organic photodiodes with optically thick junctions. Paradoxically, we use broadband-absorbing organic semiconductors and utilize the electro-optical properties of the junction to create the narrowest NIR-band photoresponses yet demonstrated. In this context, these photodiodes outperform the encumbent technology (input filtered inorganic semiconductor diodes) and emerging technologies such as narrow absorber organic semiconductors or quantum nanocrystals. The design concept allows for response tuning and is generic for other spectral windows. Furthermore, it is material-agnostic and applicable to other disordered and polycrystalline semiconductors.

  14. Narrowband Light Detection via Internal Quantum Efficiency Manipulation of Organic Photodiodes

    DOE PAGES

    Armin, A.; Jansen-van Vuuren, R. D.; Kopidakis, N.; ...

    2015-02-01

    Spectrally selective light detection is vital for full-colour and near-infrared (NIR) imaging and machine vision. This is not possible with traditional broadband-absorbing inorganic semiconductors without input filtering, and is yet to be achieved for narrowband absorbing organic semiconductors. We demonstrate the first sub-100 nm full-width-at-half-maximum visible-blind red and NIR photodetectors with state-of-the-art performance across critical response metrics. These devices are based on organic photodiodes with optically thick junctions. Paradoxically, we use broadband-absorbing organic semiconductors and utilize the electro-optical properties of the junction to create the narrowest NIR-band photoresponses yet demonstrated. In this context, these photodiodes outperform the encumbent technology (inputmore » filtered inorganic semiconductor diodes) and emerging technologies such as narrow absorber organic semiconductors or quantum nanocrystals. The design concept allows for response tuning and is generic for other spectral windows. Furthermore, it is materialagnostic and applicable to other disordered and polycrystalline semiconductors.« less

  15. Semiconductor technology in protein kinase research and drug discovery: sensing a revolution.

    PubMed

    Bhalla, Nikhil; Di Lorenzo, Mirella; Estrela, Pedro; Pula, Giordano

    2017-02-01

    Since the discovery of protein kinase activity in 1954, close to 600 kinases have been discovered that have crucial roles in cell physiology. In several pathological conditions, aberrant protein kinase activity leads to abnormal cell and tissue physiology. Therefore, protein kinase inhibitors are investigated as potential treatments for several diseases, including dementia, diabetes, cancer and autoimmune and cardiovascular disease. Modern semiconductor technology has recently been applied to accelerate the discovery of novel protein kinase inhibitors that could become the standard-of-care drugs of tomorrow. Here, we describe current techniques and novel applications of semiconductor technologies in protein kinase inhibitor drug discovery. Copyright © 2016 Elsevier Ltd. All rights reserved.

  16. Aging of electronics with application to nuclear power plant instrumentation. [PWR; BWR

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Johnson, Jr, R T; Thome, F V; Craft, C M

    1983-01-01

    A survey to identify areas of needed research to understand aging mechanisms for electronics in nuclear power plant instrumentation has been completed. The emphasis was on electronic components such as semiconductors, capacitors, and resistors used in safety-related instrumentation in the reactor containment area. The environmental and operational stress factors which may produce degradation during long-term operation were identified. Some attention was also given to humidity effects as related to seals and encapsulants, and failures in printed circuit boards and bonds and solder joints. Results suggest that neutron as well as gamma irradiations should be considered in simulating the aging environmentmore » for electronic components. Radiation dose-rate effects in semiconductor devices and organic capacitors need to be further investigated, as well as radiation-voltage bias synergistic effects in semiconductor devices and leakage and permeation of moisture through seals in electronics packages.« less

  17. Characterization of a High-SpeedHigh-Power Semiconductor Master-Oscillator Power-Amplifier (MOPA) Laser as a Free-Space Transmitter

    NASA Astrophysics Data System (ADS)

    Wright, M. W.

    2000-04-01

    Semiconductor lasers offer promise as high-speed transmitters for free-space optical communication systems. This article examines the performance of a semiconductor laser system in a master-oscillator power-amplifier (MOPA) geometry developed through a Small Business Innovation Research (SBIR) contract with SDL, Inc. The compact thermo-electric cooler (TEC) packaged device is capable of 1-W output optical power at greater than 2-Gb/s data rates and a wavelength of 960 nm. In particular, we have investigated the effects of amplified spontaneous emission on the modulation extinction ratio and bit-error rate (BER) performance. BERs of up to 10^(-9) were possible at 1.4 Gb/s; however, the modulation extinction ratio was limited to 6 dB. Other key parameters for a free-space optical transmitter, such as the electrical-optical efficiency (24 percent) and beam quality, also were measured.

  18. Semiconductor Technology and U.S. National Security

    DTIC Science & Technology

    2010-04-21

    control regime as hindrances to compete in the global market.45 Interestingly, DOD’s Defense Technology Security Administration ( DTSA ) reviews export...licenses and only advises DOS or DOC.46 DTSA has neither compliance nor enforcement authority. There is no lead organization or a centralized...which lists several semiconductor technologies, is out of date and not used, even by DOD’s DTSA .51 In order to remove certain export controls on

  19. Implementation of Ferroelectric Memories for Space Applications

    NASA Technical Reports Server (NTRS)

    Philpy, Stephen C.; Derbenwick, Gary F.; Kamp, David A.; Isaacson, Alan F.

    2000-01-01

    Ferroelectric random access semiconductor memories (FeRAMs) are an ideal nonvolatile solution for space applications. These memories have low power performance, high endurance and fast write times. By combining commercial ferroelectric memory technology with radiation hardened CMOS technology, nonvolatile semiconductor memories for space applications can be attained. Of the few radiation hardened semiconductor manufacturers, none have embraced the development of radiation hardened FeRAMs, due a limited commercial space market and funding limitations. Government funding may be necessary to assure the development of radiation hardened ferroelectric memories for space applications.

  20. Roles of chemical metrology in electronics industry and associated environment in Korea: a tutorial.

    PubMed

    Kang, Namgoo; Joong Kim, Kyung; Seog Kim, Jin; Hae Lee, Joung

    2015-03-01

    Chemical metrology is gaining importance in electronics industry that manufactures semiconductors, electronic displays, and microelectronics. Extensive and growing needs from this industry have raised the significance of accurate measurements of the amount of substances and material properties. For the first time, this paper presents information on how chemical metrology is being applied to meet a variety of needs in the aspects of quality control of electronics products and environmental regulations closely associated with electronics industry. For a better understanding of the roles of the chemical metrology within electronics industry, the recent research activities and results in chemical metrology are presented using typical examples in Korea where electronic industry is leading a national economy. Particular attention is paid to the applications of chemical metrology for advancing emerging electronics technology developments. Such examples are a novel technique for the accurate quantification of gas composition at nano-liter levels within a MEMS package, the surface chemical analysis of a semiconductor device. Typical metrological tools are also presented for the development of certified reference materials for fluorinated greenhouse gases and proficiency testing schemes for heavy metals and chlorinated toxic gas in order to cope properly with environmental issues within electronics industry. In addition, a recent technique is presented for the accurate measurement of the destruction and removal efficiency of a typical greenhouse gas scrubber. Copyright © 2014 Elsevier B.V. All rights reserved.

  1. Design for manufacturability production management activity report

    NASA Astrophysics Data System (ADS)

    Miyazaki, Norihiko; Sato, T.; Honma, M.; Yoshioka, N.; Hosono, K.; Onodera, T.; Itoh, H.; Suzuki, H.; Uga, T.; Kadota, K.; Iriki, N.

    2006-05-01

    Design For Manufacturability Production Management (DFM-PM) Subcommittee has been started in succession to Reticle Management Subcommittee (RMS) in Semiconductor Manufacturing Technology Committee for Japan (SMTCJ) from 2005. Our activity focuses on the SoC (System On Chip) Business, and it pursues the improvement of communication in manufacturing technique. The first theme of activity is the investigation and examination of the new trends about production (manufacturer) technology and related information, and proposals of business solution. The second theme is the standardization activity about manufacture technology and the cooperation with related semiconductors' organizations. And the third theme is holding workshop and support for promotion and spread of the standardization technology throughout semiconductor companies. We expand a range of scope from design technology to wafer pattern reliability and we will propose the competition domain, the collaboration area and the standardization technology on DFM. Furthermore, we will be able to make up a SoC business model as the 45nm node technology beyond manufacturing platform in cooperating with the design information and the production information by utilizing EDA technology.

  2. 78 FR 24234 - Certain Semiconductor Chips With DRAM Circuitry, and Modules and Products Containing Same; Notice...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2013-04-24

    ... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-819] Certain Semiconductor Chips With DRAM Circuitry, and Modules and Products Containing Same; Notice of Request for Statements on the... order barring the entry of unlicensed DRAM semiconductor chips manufactured by Nanya Technology...

  3. Compact, High Power, Multi-Spectral Mid-Infrared Semiconductor Laser Package

    DTIC Science & Technology

    2001-10-01

    depositions to map out effects due to stress in the films. Stress in the film will result in the substrate curvature. This curvature results in the...Lasers at 4.5 µm”, IEEE Photon. Technol. Lett., vol. 9, pp. 1573-1575, (1997). 58 18. A. N. Baranov, N. Bertru, Y. Cuminal , G. Boissier, C. Alibert, and

  4. Multilayered microelectronic device package with an integral window

    DOEpatents

    Peterson, Kenneth A.; Watson, Robert D.

    2003-01-01

    An apparatus for packaging of microelectronic devices is disclosed, wherein the package includes an integral window. The microelectronic device can be a semiconductor chip, a CCD chip, a CMOS chip, a VCSEL chip, a laser diode, a MEMS device, or a IMEMS device. The package can comprise, for example, a cofired ceramic frame or body. The package has an internal stepped structure made of a plurality of plates, with apertures, which are patterned with metallized conductive circuit traces. The microelectronic device can be flip-chip bonded on the plate to these traces, and oriented so that the light-sensitive side is optically accessible through the window. A cover lid can be attached to the opposite side of the package. The result is a compact, low-profile package, having an integral window that can be hermetically-sealed. The package body can be formed by low-temperature cofired ceramic (LTCC) or high-temperature cofired ceramic (HTCC) multilayer processes with the window being simultaneously joined (e.g. cofired) to the package body during LTCC or HTCC processing. Multiple chips can be located within a single package, according to some embodiments. The cover lid can include a window. The apparatus is particularly suited for packaging of MEMS devices, since the number of handling steps is greatly reduced, thereby reducing the potential for contamination. The integral window can further include a lens for optically transforming light passing through the window. The package can include an array of binary optic lenslets made integral with the window. The package can include an electrically-switched optical modulator, such as a lithium niobate window attached to the package, for providing a very fast electrically-operated shutter.

  5. EDITORIAL The 23rd Nordic Semiconductor Meeting The 23rd Nordic Semiconductor Meeting

    NASA Astrophysics Data System (ADS)

    Ólafsson, Sveinn; Sveinbjörnsson, Einar

    2010-12-01

    A Nordic Semiconductor Meeting is held every other year with the venue rotating amongst the Nordic countries of Denmark, Finland, Iceland, Norway and Sweden. The focus of these meetings remains 'original research and science being carried out on semiconductor materials, devices and systems'. Reports on industrial activity have usually featured. The topics have ranged from fundamental research on point defects in a semiconductor to system architecture of semiconductor electronic devices. Proceedings from these events are regularly published as a topical issue of Physica Scripta. All of the papers in this topical issue have undergone critical peer review and we wish to thank the reviewers and the authors for their cooperation, which has been instrumental in meeting the high scientific standards and quality of the series. This meeting of the 23rd Nordic Semiconductor community, NSM 2009, was held at Háskólatorg at the campus of the University of Iceland, Reykjavik, Iceland, 14-17 June 2009. Support was provided by the University of Iceland. Almost 50 participants presented a broad range of topics covering semiconductor materials and devices as well as related material science interests. The conference provided a forum for Nordic and international scientists to present and discuss new results and ideas concerning the fundamentals and applications of semiconductor materials. The meeting aim was to advance the progress of Nordic science and thus aid in future worldwide technological advances concerning technology, education, energy and the environment. Topics Theory and fundamental physics of semiconductors Emerging semiconductor technologies (for example III-V integration on Si, novel Si devices, graphene) Energy and semiconductors Optical phenomena and optical devices MEMS and sensors Program 14 June Registration 13:00-17:00 15 June Meeting program 09:30-17:00 and Poster Session I 16 June Meeting program 09:30-17:00 and Poster Session II 17 June Excursion and dinner on Icelandic National Day In connection with the conference, a summer school for 40 research students was organized by the Nordic LENS network. The summer school took place in Reykjavik on 11-14 June. For more information on the school please visit the website. The next Nordic Semiconductor meeting, NSM 2011, is scheduled to take place in Aarhus, Denmark, 19-22 June 2011. A full participant list is available in the PDF of this article.

  6. Experimental demonstration of a multi-wavelength distributed feedback semiconductor laser array with an equivalent chirped grating profile based on the equivalent chirp technology.

    PubMed

    Li, Wangzhe; Zhang, Xia; Yao, Jianping

    2013-08-26

    We report, to the best of our knowledge, the first realization of a multi-wavelength distributed feedback (DFB) semiconductor laser array with an equivalent chirped grating profile based on equivalent chirp technology. All the lasers in the laser array have an identical grating period with an equivalent chirped grating structure, which are realized by nonuniform sampling of the gratings. Different wavelengths are achieved by changing the sampling functions. A multi-wavelength DFB semiconductor laser array is fabricated and the lasing performance is evaluated. The results show that the equivalent chirp technology is an effective solution for monolithic integration of a multi-wavelength laser array with potential for large volume fabrication.

  7. Packaging Technologies for 500 C SiC Electronics and Sensors: Challenges in Material Science and Technology

    NASA Technical Reports Server (NTRS)

    Chen, Liang-Yu; Neudeck, Philip G.; Behelm, Glenn M.; Spry, David J.; Meredith, Roger D.; Hunter, Gary W.

    2015-01-01

    This paper presents ceramic substrates and thick-film metallization based packaging technologies in development for 500C silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chip-level packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550C. The 96 alumina packaging system composed of chip-level packages and PCBs has been successfully tested with high temperature SiC discrete transistor devices at 500C for over 10,000 hours. In addition to tests in a laboratory environment, a SiC junction field-effect-transistor (JFET) with a packaging system composed of a 96 alumina chip-level package and an alumina printed circuit board was tested on low earth orbit for eighteen months via a NASA International Space Station experiment. In addition to packaging systems for electronics, a spark-plug type sensor package based on this high temperature interconnection system for high temperature SiC capacitive pressure sensors was also developed and tested. In order to further significantly improve the performance of packaging system for higher packaging density, higher operation frequency, power rating, and even higher temperatures, some fundamental material challenges must be addressed. This presentation will discuss previous development and some of the challenges in material science (technology) to improve high temperature dielectrics for packaging applications.

  8. Modelling of optoelectronic circuits based on resonant tunneling diodes

    NASA Astrophysics Data System (ADS)

    Rei, João. F. M.; Foot, James A.; Rodrigues, Gil C.; Figueiredo, José M. L.

    2017-08-01

    Resonant tunneling diodes (RTDs) are the fastest pure electronic semiconductor devices at room temperature. When integrated with optoelectronic devices they can give rise to new devices with novel functionalities due to their highly nonlinear properties and electrical gain, with potential applications in future ultra-wide-band communication systems (see e.g. EU H2020 iBROW Project). The recent coverage on these devices led to the need to have appropriated simulation tools. In this work, we present RTD based optoelectronic circuits simulation packages to provide circuit signal level analysis such as transient and frequency responses. We will present and discuss the models, and evaluate the simulation packages.

  9. Cancer and reproductive risks in the semiconductor industry.

    PubMed

    LaDou, Joseph; Bailar, John C

    2007-01-01

    Although many reproductive toxicants and carcinogens are used in the manufacture of semiconductor chips, and worrisome findings have been reported, no broad epidemiologic study has been conducted to define possible risks in a comprehensive way. With few exceptions, the American semiconductor industry has not supported access for independent studies. Older technologies are exported to newly industrialized countries as newer technologies are installed in Japan, the United States, and Europe. Thus there is particular concern about the many workers, mostly in countries that are still industrializing, who have jobs that use chemicals, technologies, and equipment that are no longer in use in developed countries. Since most countries lack cancer registries and have inadequate reproductive and cancer reporting mechanisms, industry efforts to control exposures to carcinogens are of particular importance. Government agencies, the courts, industry, publishers, and academia, on occasion, collude to ignore or to downplay the importance of occupational diseases. Examples of how this happens in the semiconductor industry are presented.

  10. Atomic layer deposition: an enabling technology for the growth of functional nanoscale semiconductors

    NASA Astrophysics Data System (ADS)

    Biyikli, Necmi; Haider, Ali

    2017-09-01

    In this paper, we present the progress in the growth of nanoscale semiconductors grown via atomic layer deposition (ALD). After the adoption by semiconductor chip industry, ALD became a widespread tool to grow functional films and conformal ultra-thin coatings for various applications. Based on self-limiting and ligand-exchange-based surface reactions, ALD enabled the low-temperature growth of nanoscale dielectric, metal, and semiconductor materials. Being able to deposit wafer-scale uniform semiconductor films at relatively low-temperatures, with sub-monolayer thickness control and ultimate conformality, makes ALD attractive for semiconductor device applications. Towards this end, precursors and low-temperature growth recipes are developed to deposit crystalline thin films for compound and elemental semiconductors. Conventional thermal ALD as well as plasma-assisted and radical-enhanced techniques have been exploited to achieve device-compatible film quality. Metal-oxides, III-nitrides, sulfides, and selenides are among the most popular semiconductor material families studied via ALD technology. Besides thin films, ALD can grow nanostructured semiconductors as well using either template-assisted growth methods or bottom-up controlled nucleation mechanisms. Among the demonstrated semiconductor nanostructures are nanoparticles, nano/quantum-dots, nanowires, nanotubes, nanofibers, nanopillars, hollow and core-shell versions of the afore-mentioned nanostructures, and 2D materials including transition metal dichalcogenides and graphene. ALD-grown nanoscale semiconductor materials find applications in a vast amount of applications including functional coatings, catalysis and photocatalysis, renewable energy conversion and storage, chemical sensing, opto-electronics, and flexible electronics. In this review, we give an overview of the current state-of-the-art in ALD-based nanoscale semiconductor research including the already demonstrated and future applications.

  11. Power components for the Space Station 20-kHz power distribution system

    NASA Technical Reports Server (NTRS)

    Renz, David D.

    1988-01-01

    Since 1984, NASA Lewis Research Center was developing high power, high frequency space power components as part of The Space Station Advanced Development program. The purpose of the Advanced Development program was to accelerate existing component programs to ensure their availability for use on the Space Station. These components include a rotary power transfer device, remote power controllers, remote bus isolators, high power semiconductor, a high power semiconductor package, high frequency-high power cable, high frequency-high power connectors, and high frequency-high power transformers. All the components were developed to the prototype level and will be installed in the Lewis Research Center Space Station power system test bed.

  12. Power components for the space station 20-kHz power distribution system

    NASA Technical Reports Server (NTRS)

    Renz, David D.

    1988-01-01

    Since 1984, NASA Lewis Research Center was developing high power, high frequency space power components as part of The Space Station Advanced Development program. The purpose of The Advanced Development program was to accelerate existing component programs to ensure their availability for use on the Space Station. These components include a rotary power transfer device, remote power controllers, remote bus isolators, high power semiconductor, a high power semiconductor package, high frequency-high power cable, high frequency-high power connectors, and high frequency-high power transformers. All the components were developed to the prototype level and will be installed in the Lewis Research Center Space Station power system test bed.

  13. Development of a RadFET Linear Array for Intracavitary in vivo Dosimetry During External Beam Radiotherapy and Brachytherapy

    NASA Astrophysics Data System (ADS)

    Price, R. A.; Benson, C.; Joyce, M. J.; Rodgers, K.

    2004-08-01

    We present the details of a new linear array dosimeter consisting of a chain of semiconductors mounted on an ultra-thin (50 /spl mu/m thick) flexible substrate and housed in an intracavitary catheter. The semiconductors, manufactured by NMRC Cork, have not been packaging and incorporate a passivation layer that allows them to be mounted on the substrate using flip-chip-bonding. This paper reports, for the first time, the construction of a multiple (ten) detector array suited to in vivo dosimetry in the rectum, esophagus and vagina during external beam radiotherapy, as well as being adaptable to in vivo dosimetry during brachytherapy and diagnostic radiology.

  14. Bibliography of Soviet Laser Developments, No. 18, October - December 1974

    DTIC Science & Technology

    1975-04-25

    IIV Lasers, Laser Theory , Laser Biological Effects, Laser Communications, Laser Computer Technology, Holography, Laser Chemical Effects...spectros.copy of laser materials; ultrashort pulse generation; crystal growing; theoretical aspects of advanced lasers; and general laser theory Laser...Semiconductor: Mixed Junction 5 6. Semiconductor: Heterojunction ^ 7. Semiconductor: Theory 8. Nd:Glass B. Liquid Lasers 1

  15. Advanced 3-V semiconductor technology assessment. [space communications

    NASA Technical Reports Server (NTRS)

    Nowogrodzki, M.

    1983-01-01

    Against a background of an extensive survey of the present state of the art in the field of III-V semiconductors for operation at microwave frequencies (or gigabit rate speeds), likely requirements of future space communications systems are identified, competing technologies and physical device limitations are discussed, and difficulties in implementing emerging technologies are projected. On the basis of these analyses, specific research and development programs required for the development of future systems components are recommended.

  16. Integrated Approach to Industrial Packaging Design

    NASA Astrophysics Data System (ADS)

    Vorobeva, O.

    2017-11-01

    The article reviews studies in the field of industrial packaging design. The major factors which influence technological, ergonomic, economic and ecological features of packaging are established. The main modern trends in packaging design are defined, the principles of marketing communications and their influence on consumers’ consciousness are indicated, and the function of packaging as a transmitter of brand values is specified. Peculiarities of packaging technology and printing techniques in modern printing industry are considered. The role of designers in the stage-by-stage development of the construction, form and graphic design concept of packaging is defined. The examples of authentic packaging are given and the mention of the tetrahedron packaging history is made. At the end of the article, conclusions on the key research aspects are made.

  17. PACKAGE PLANTS FOR SMALL SYSTEMS: A FIELD STUDY

    EPA Science Inventory

    A joint field study was conducted by AWWA and the Drinking Water Research Division of USEPA to evaluate existing small community systems that use package plant technology. Forty-eight package plant systems representing a geographic and technological cross section were evaluated t...

  18. Will Future Measurement Needs of the Semiconductor Industry Be Met?

    PubMed

    Bennett, Herbert S

    2007-01-01

    We discuss the ability of the nation's measurement system to meet future metrology needs of the semiconductor industry. Lacking an acceptable metric for assessing the health of metrology for the semiconductor industry, we identify a limited set of unmet measurement needs. Assuming that this set of needs may serve as proxy for the galaxy of semiconductor measurement needs, we examine it from the perspective of what will be required to continue the semiconductor industry's powerful impact in the world's macro-economy and maintain its exceptional record of numerous technological innovations. This paper concludes with suggestions about ways to strengthen the measurement system for the semiconductor industry.

  19. Quartz/fused silica chip carriers

    NASA Technical Reports Server (NTRS)

    1992-01-01

    The primary objective of this research and development effort was to develop monolithic microwave integrated circuit (MMIC) packaging which will operate efficiently at millimeter-wave frequencies. The packages incorporated fused silica as the substrate material which was selected due to its favorable electrical properties and potential performance improvement over more conventional materials for Ka-band operation. The first step towards meeting this objective is to develop a package that meets standard mechanical and thermal requirements using fused silica and to be compatible with semiconductor devices operating up to at least 44 GHz. The second step is to modify the package design and add multilayer and multicavity capacity to allow for application specific integrated circuits (ASIC's) to control multiple phase shifters. The final step is to adapt the package design to a phased array module with integral radiating elements. The first task was a continuation of the SBIR Phase 1 work. Phase 1 identified fused silica as a viable substrate material by demonstrating various plating, machining, and adhesion properties. In Phase 2 Task 1, a package was designed and fabricated to validate these findings. Task 2 was to take the next step in packaging and fabricate a multilayer, multichip module (MCM). This package is the predecessor to the phased array module and demonstrates the ability to via fill, circuit print, laminate, and to form vertical interconnects. The final task was to build a phased array module. The radiating elements were to be incorporated into the package instead of connecting to it with wire or ribbon bonds.

  20. Participation in the Center for Advanced Processing and Packaging Studies

    DTIC Science & Technology

    2009-11-24

    University, the University ofCalifomia, Davis, and North Carolina State University to assist in advancing food processing and packaging technology and...University, the University of California, Davis, and North Carolina State University to assist in advancing food processing and packaging technology and...amyloliquefaciens, spore inactivation, FT-IR spectroscopy, infrared 11 spectroscopy 12 13 14 15 16 17 Department of Food Science and Technology

  1. Silicon carbide semiconductor technology for high temperature and radiation environments

    NASA Technical Reports Server (NTRS)

    Matus, Lawrence G.

    1993-01-01

    Viewgraphs on silicon carbide semiconductor technology and its potential for enabling electronic devices to function in high temperature and high radiation environments are presented. Topics covered include silicon carbide; sublimation growth of 6H-SiC boules; SiC chemical vapor deposition reaction system; 6H silicon carbide p-n junction diode; silicon carbide MOSFET; and silicon carbide JFET radiation response.

  2. Microelectronics used for Semiconductor Imaging Detectors

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Heijne, Erik H. M.

    Semiconductor crystal technology, microelectronics developments and nuclear particle detection have been in a relation of symbiosis, all the way from the beginning. The increase of complexity in electronics chips can now be applied to obtain much more information on the incident nuclear radiation. Some basic technologies are described, in order to acquire insight in possibilities and limitations for the most recent detectors.

  3. Novel Ruggedized Packaging Technology for VCSELs

    DTIC Science & Technology

    2017-03-01

    Novel Ruggedized Packaging Technology for VCSELs Charlie Kuznia ckuznia@ultracomm-inc.com Ultra Communications, Inc. Vista, CA, USA, 92081...n ac hieve l ow-power, E MI-immune links within hi gh-performance m ilitary computing an d sensor systems. Figure 1. Chip-scale-packaging of

  4. The Packaging Technology Study on Smart Composite Structure Based on The Embedded FBG Sensor

    NASA Astrophysics Data System (ADS)

    Zhang, Youhong; Chang, Xinlong; Zhang, Xiaojun; He, Xiangyong

    2018-03-01

    It is convenient to carry out the health monitoring of the solid rocket engine composite shell based on the embedded FBG sensor. In this paper, the packaging technology using one-way fiber layer of prepreg fiberglass/epoxy resin was proposed. The proposed packaging process is simple, and the packaged sensor structure size is flexible and convenient to use, at the mean time, the packaged structure has little effect on the pristine composite material structure.

  5. A QR code identification technology in package auto-sorting system

    NASA Astrophysics Data System (ADS)

    di, Yi-Juan; Shi, Jian-Ping; Mao, Guo-Yong

    2017-07-01

    Traditional manual sorting operation is not suitable for the development of Chinese logistics. For better sorting packages, a QR code recognition technology is proposed to identify the QR code label on the packages in package auto-sorting system. The experimental results compared with other algorithms in literatures demonstrate that the proposed method is valid and its performance is superior to other algorithms.

  6. Lithography for enabling advances in integrated circuits and devices.

    PubMed

    Garner, C Michael

    2012-08-28

    Because the transistor was fabricated in volume, lithography has enabled the increase in density of devices and integrated circuits. With the invention of the integrated circuit, lithography enabled the integration of higher densities of field-effect transistors through evolutionary applications of optical lithography. In 1994, the semiconductor industry determined that continuing the increase in density transistors was increasingly difficult and required coordinated development of lithography and process capabilities. It established the US National Technology Roadmap for Semiconductors and this was expanded in 1999 to the International Technology Roadmap for Semiconductors to align multiple industries to provide the complex capabilities to continue increasing the density of integrated circuits to nanometre scales. Since the 1960s, lithography has become increasingly complex with the evolution from contact printers, to steppers, pattern reduction technology at i-line, 248 nm and 193 nm wavelengths, which required dramatic improvements of mask-making technology, photolithography printing and alignment capabilities and photoresist capabilities. At the same time, pattern transfer has evolved from wet etching of features, to plasma etch and more complex etching capabilities to fabricate features that are currently 32 nm in high-volume production. To continue increasing the density of devices and interconnects, new pattern transfer technologies will be needed with options for the future including extreme ultraviolet lithography, imprint technology and directed self-assembly. While complementary metal oxide semiconductors will continue to be extended for many years, these advanced pattern transfer technologies may enable development of novel memory and logic technologies based on different physical phenomena in the future to enhance and extend information processing.

  7. Wafer-level vacuum/hermetic packaging technologies for MEMS

    NASA Astrophysics Data System (ADS)

    Lee, Sang-Hyun; Mitchell, Jay; Welch, Warren; Lee, Sangwoo; Najafi, Khalil

    2010-02-01

    An overview of wafer-level packaging technologies developed at the University of Michigan is presented. Two sets of packaging technologies are discussed: (i) a low temperature wafer-level packaging processes for vacuum/hermeticity sealing, and (ii) an environmentally resistant packaging (ERP) technology for thermal and mechanical control as well as vacuum packaging. The low temperature wafer-level encapsulation processes are implemented using solder bond rings which are first patterned on a cap wafer and then mated with a device wafer in order to encircle and encapsulate the device at temperatures ranging from 200 to 390 °C. Vacuum levels below 10 mTorr were achieved with yields in an optimized process of better than 90%. Pressures were monitored for more than 4 years yielding important information on reliability and process control. The ERP adopts an environment isolation platform in the packaging substrate. The isolation platform is designed to provide low power oven-control, vibration isolation and shock protection. It involves batch flip-chip assembly of a MEMS device onto the isolation platform wafer. The MEMS device and isolation structure are encapsulated at the wafer-level by another substrate with vertical feedthroughs for vacuum/hermetic sealing and electrical signal connections. This technology was developed for high performance gyroscopes, but can be applied to any type of MEMS device.

  8. Experimental Durability Testing of 4H SiC JFET Integrated Circuit Technology at 727 C

    NASA Technical Reports Server (NTRS)

    Spry, David; Neudeck, Phil; Chen, Liangyu; Chang, Carl; Lukco, Dorothy; Beheim, Glenn M

    2016-01-01

    We have reported SiC integrated circuits (IC's) with two levels of metal interconnect that have demonstrated prolonged operation for thousands of hours at their intended peak ambient operational temperature of 500 C [1, 2]. However, it is recognized that testing of semiconductor microelectronics at temperatures above their designed operating envelope is vital to qualification. Towards this end, we previously reported operation of a 4H-SiC JFET IC ring oscillator on an initial fast thermal ramp test through 727 C [3]. However, this thermal ramp was not ended until a peak temperature of 880 C (well beyond failure) was attained. Further experiments are necessary to better understand failure mechanisms and upper temperature limit of this extreme-temperature capable 4H-SiC IC technology. Here we report on additional experimental testing of custom-packaged 4H-SiC JFET IC devices at temperatures above 500 C. In one test, the temperature was ramped and then held at 727 C, and the devices were periodically measured until electrical failure was observed. A 4H-SiC JFET on this chip electrically functioned with little change for around 25 hours at 727 C before rapid increases in device resistance caused failure. In a second test, devices from our next generation 4H-SiC JFET ICs were ramped up and then held at 700 C (which is below the maximum deposition temperature of the dielectrics). Three ring oscillators functioned for 8 hours at this temperature before degradation. In a third experiment, an alternative die attach of gold paste and package lid was used, and logic circuit operation was demonstrated for 143.5 hours at 700 C.

  9. Experimental Durability Testing of 4H SiC JFET Integrated Circuit Technology at 727 Degrees Centigrade

    NASA Technical Reports Server (NTRS)

    Spry, David J.; Neudeck, Philip G.; Chen, Liangyu; Chang, Carl W.; Lukco, Dorothy; Beheim, Glenn M.

    2016-01-01

    We have reported SiC integrated circuits (ICs) with two levels of metal interconnect that have demonstrated prolonged operation for thousands of hours at their intended peak ambient operational temperature of 500 degrees Centigrade. However, it is recognized that testing of semiconductor microelectronics at temperatures above their designed operating envelope is vital to qualification. Towards this end, we previously reported operation of a 4H-SiC JFET IC ring oscillator on an initial fast thermal ramp test through 727 degrees Centigrade. However, this thermal ramp was not ended until a peak temperature of 880 degrees Centigrade (well beyond failure) was attained. Further experiments are necessary to better understand failure mechanisms and upper temperature limit of this extreme-temperature capable 4H-SiC IC technology.Here we report on additional experimental testing of custom-packaged 4H-SiC JFET IC devices at temperatures above 500 degrees Centigrade. In one test, the temperature was ramped and then held at 727 degrees Centigrade, and the devices were periodically measured until electrical failure was observed. A 4H-SiC JFET on this chip electrically functioned with little change for around 25 hours at 727 degrees Centigrade before rapid increases in device resistance caused failure. In a second test, devices from our next generation 4H-SiC JFET ICs were ramped up and then held at 700 degrees Centigrade (which is below the maximum deposition temperature of the dielectrics). Three ring oscillators functioned for 8 hours at this temperature before degradation. In a third experiment, an alternative die attach of gold paste and package lid was used, and logic circuit operation was demonstrated for 143.5 hours at 700 degrees Centigrade.

  10. 75 FR 447 - In the Matter of Certain Semiconductor Chips With Minimized Chip Package Size and Products...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2010-01-05

    ... review (1) the finding that the claim term ``top layer'' recited in claim 1 of the '106 patent means ``an outer layer of the chip assembly upon which the terminals are fixed,'' the requirement that ``the `top layer' is a single layer,'' and the effect of the findings on the infringement analysis, invalidity...

  11. Testing methodologies and systems for semiconductor optical amplifiers

    NASA Astrophysics Data System (ADS)

    Wieckowski, Michael

    Semiconductor optical amplifiers (SOA's) are gaining increased prominence in both optical communication systems and high-speed optical processing systems, due primarily to their unique nonlinear characteristics. This in turn, has raised questions regarding their lifetime performance reliability and has generated a demand for effective testing techniques. This is especially critical for industries utilizing SOA's as components for system-in-package products. It is important to note that very little research to date has been conducted in this area, even though production volume and market demand has continued to increase. In this thesis, the reliability of dilute-mode InP semiconductor optical amplifiers is studied experimentally and theoretically. The aging characteristics of the production level devices are demonstrated and the necessary techniques to accurately characterize them are presented. In addition, this work proposes a new methodology for characterizing the optical performance of these devices using measurements in the electrical domain. It is shown that optical performance degradation, specifically with respect to gain, can be directly qualified through measurements of electrical subthreshold differential resistance. This metric exhibits a linear proportionality to the defect concentration in the active region, and as such, can be used for prescreening devices before employing traditional optical testing methods. A complete theoretical analysis is developed in this work to explain this relationship based upon the device's current-voltage curve and its associated leakage and recombination currents. These results are then extended to realize new techniques for testing semiconductor optical amplifiers and other similarly structured devices. These techniques can be employed after fabrication and during packaged operation through the use of a proposed stand-alone testing system, or using a proposed integrated CMOS self-testing circuit. Both methods are capable of ascertaining SOA performance based solely on the subthreshold differential resistance signature, and are a first step toward the inevitable integration of self-testing circuits into complex optoelectronic systems.

  12. New developments in power semiconductors

    NASA Technical Reports Server (NTRS)

    Sundberg, G. R.

    1983-01-01

    This paper represents an overview of some recent power semiconductor developments and spotlights new technologies that may have significant impact for aircraft electric secondary power. Primary emphasis will be on NASA-Lewis-supported developments in transistors, diodes, a new family of semiconductors, and solid-state remote power controllers. Several semiconductor companies that are moving into the power arena with devices rated at 400 V and 50 A and above are listed, with a brief look at a few devices.

  13. Organic Spin-Valves and Beyond: Spin Injection and Transport in Organic Semiconductors and the Effect of Interfacial Engineering.

    PubMed

    Jang, Hyuk-Jae; Richter, Curt A

    2017-01-01

    Since the first observation of the spin-valve effect through organic semiconductors, efforts to realize novel spintronic technologies based on organic semiconductors have been rapidly growing. However, a complete understanding of spin-polarized carrier injection and transport in organic semiconductors is still lacking and under debate. For example, there is still no clear understanding of major spin-flip mechanisms in organic semiconductors and the role of hybrid metal-organic interfaces in spin injection. Recent findings suggest that organic single crystals can provide spin-transport media with much less structural disorder relative to organic thin films, thus reducing momentum scattering. Additionally, modification of the band energetics, morphology, and even spin magnetic moment at the metal-organic interface by interface engineering can greatly impact the efficiency of spin-polarized carrier injection. Here, progress on efficient spin-polarized carrier injection into organic semiconductors from ferromagnetic metals by using various interface engineering techniques is presented, such as inserting a metallic interlayer, a molecular self-assembled monolayer (SAM), and a ballistic carrier emitter. In addition, efforts to realize long spin transport in single-crystalline organic semiconductors are discussed. The focus here is on understanding and maximizing spin-polarized carrier injection and transport in organic semiconductors and insight is provided for the realization of emerging organic spintronics technologies. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  14. An Ultrathin Single Crystalline Relaxor Ferroelectric Integrated on a High Mobility Semiconductor.

    PubMed

    Moghadam, Reza M; Xiao, Zhiyong; Ahmadi-Majlan, Kamyar; Grimley, Everett D; Bowden, Mark; Ong, Phuong-Vu; Chambers, Scott A; Lebeau, James M; Hong, Xia; Sushko, Peter V; Ngai, Joseph H

    2017-10-11

    The epitaxial growth of multifunctional oxides on semiconductors has opened a pathway to introduce new functionalities to semiconductor device technologies. In particular, the integration of gate materials that enable nonvolatile or hysteretic functionality in field-effect transistors could lead to device technologies that consume less power or allow for novel modalities in computing. Here we present electrical characterization of ultrathin single crystalline SrZr x Ti 1-x O 3 (x = 0.7) films epitaxially grown on a high mobility semiconductor, Ge. Epitaxial films of SrZr x Ti 1-x O 3 exhibit relaxor behavior, characterized by a hysteretic polarization that can modulate the surface potential of Ge. We find that gate layers as thin as 5 nm corresponding to an equivalent-oxide thickness of just 1.0 nm exhibit a ∼2 V hysteretic window in the capacitance-voltage characteristics. The development of hysteretic metal-oxide-semiconductor capacitors with nanoscale gate thicknesses opens new vistas for nanoelectronic devices.

  15. Flexible, Photopatterned, Colloidal CdSe Semiconductor Nanocrystal Integrated Circuits

    NASA Astrophysics Data System (ADS)

    Stinner, F. Scott

    As semiconductor manufacturing pushes towards smaller and faster transistors, a parallel goal exists to create transistors which are not nearly as small. These transistors are not intended to match the performance of traditional crystalline semiconductors; they are designed to be significantly lower in cost and manufactured using methods that can make them physically flexible for applications where form is more important than speed. One of the developing technologies for this application is semiconductor nanocrystals. We first explore methods to develop CdSe nanocrystal semiconducting "inks" into large-scale, high-speed integrated circuits. We demonstrate photopatterned transistors with mobilities of 10 cm2/Vs on Kapton substrates. We develop new methods for vertical interconnect access holes to demonstrate multi-device integrated circuits including inverting amplifiers with 7 kHz bandwidths, ring oscillators with <10 micros stage delays, and NAND and NOR logic gates. In order to produce higher performance and more consistent transistors, we develop a new hybrid procedure for processing the CdSe nanocrystals. This procedure produces transistors with repeatable performance exceeding 40 cm2/Vs when fabricated on silicon wafers and 16 cm 2/vs when fabricated as part of photopatterned integrated circuits on Kapton substrates. In order to demonstrate the full potential of these transistors, methods to create high-frequency oscillators were developed. These methods allow for transistors to operate at higher voltages as well as provide a means for wirebonding to the Kapton substrate, both of which are required for operating and probing high-frequency oscillators. Simulations of this system show the potential for operation at MHz frequencies. Demonstration of these transistors in this frequency range would open the door for development of CdSe integrated circuits for high-performance sensor, display, and audio applications. To develop further applications of electronics on flexible substrates, procedures are developed for the integration of polychromatic displays on polyethylene terephthalate (PET) substrates and a commercial near field communication (NFC) link. The device draws its power from the NFC transmitter common on smartphones and eliminates the need for a fixed battery. This allows for the mass deployment of flexible, interactive displays on product packaging.

  16. Change in dielectric relaxation with the presence of water in highly filled composites

    NASA Astrophysics Data System (ADS)

    Tuncer, Enis

    It is important to determine the dielectric characteristics of semiconductor encapsulation materials based on epoxy resins. We employed the dielectric spectroscopy technique to investigate the dielectric relaxation in the presence of water and how it changes the relaxation. It was observed that the dielectric relaxation of the material was significantly influenced by absorbed water, the local segmental motion (also known as Johari-Goldstein (β) relaxation) was influenced most by the presence of the water, it was modified by the wet sample compared to dry one, and required high activation energy. The relaxation related to the glass transition was contributed by the cooperative motion (the α-relaxation) of the epoxy resin system. The α-relaxation was shifted to a low temperature in the wet sample compared to dry one. The relaxation was modeled with a clear Vogel-Fulcher-Tammann-Hesse (VFTH) behavior; the Vogel temperature of the wet sample was 8K lower than the dry sample. The presence of water acts as a plasticizer for the molecular relaxation, and speed-up the cooperative process. The measured data were also used to estimate the electrical properties of the resin system by employing an effective-medium model together with a porous media continuum model by taking into account the physical properties of the system. It is already known that the influence of water in semiconductor packaging is important in sensitive applications. The presented measurements and the analysis method would be appreciated within the semiconductor packaging community to improve material selection and performance evaluation efforts.

  17. A silicon-on-insulator complementary-metal-oxide-semiconductor compatible flexible electronics technology

    NASA Astrophysics Data System (ADS)

    Tu, Hongen; Xu, Yong

    2012-07-01

    This paper reports a simple flexible electronics technology that is compatible with silicon-on-insulator (SOI) complementary-metal-oxide-semiconductor (CMOS) processes. Compared with existing technologies such as direct fabrication on flexible substrates and transfer printing, the main advantage of this technology is its post-SOI-CMOS compatibility. Consequently, high-performance and high-density CMOS circuits can be first fabricated on SOI wafers using commercial foundry and then be integrated into flexible substrates. The yield is also improved by eliminating the transfer printing step. Furthermore, this technology allows the integration of various sensors and microfluidic devices. To prove the concept of this technology, flexible MOSFETs have been demonstrated.

  18. MEMS packaging: state of the art and future trends

    NASA Astrophysics Data System (ADS)

    Bossche, Andre; Cotofana, Carmen V. B.; Mollinger, Jeff R.

    1998-07-01

    Now that the technology for Integrated sensor and MEMS devices has become sufficiently mature to allow mass production, it is expected that the prices of bare chips will drop dramatically. This means that the package prices will become a limiting factor in market penetration, unless low cost packaging solutions become available. This paper will discuss the developments in packaging technology. Both single-chip and multi-chip packaging solutions will be addressed. It first starts with a discussion on the different requirements that have to be met; both from a device point of view (open access paths to the environment, vacuum cavities, etc.) and from the application point of view (e.g. environmental hostility). Subsequently current technologies are judged on their applicability for MEMS and sensor packaging and a forecast is given for future trends. It is expected that the large majority of sensing devices will be applied in relative friendly environments for which plastic packages would suffice. Therefore, on the short term an important role is foreseen for recently developed plastic packaging techniques such as precision molding and precision dispensing. Just like in standard electronic packaging, complete wafer level packaging methods for sensing devices still have a long way to go before they can compete with the highly optimized and automated plastic packaging processes.

  19. An evaluation of the effectiveness of FreshCase technology to extend the storage life of whole-muscle pork and ground pork sausage.

    PubMed

    Yang, X; Woerner, D R; McCullough, K R; Hasty, J D; Geornaras, I; Smith, G C; Sofos, J N; Belk, K E

    2016-11-01

    The objective of this study was to identify the maximum time of refrigerated storage before aerobic psychrotrophic bacteria grew to a level indicative of spoilage (7 log cfu/g) or other indicators of spoilage were observed for whole-muscle pork and ground pork sausage packaged using FreshCase technology. Pork chops and pork sausage were packaged using conventional vacuum packaging without nitrite in film (Control) or using FreshCase technology and were compared with respect to microbial counts, pH, instrumental color measurements, lipid oxidation level, and sensory properties. The storage life was 45 d for pork chops stored in FreshCase packages at 1°C and 19 d for ground pork sausage stored under the same condition. Results indicated that both pork chops and sausage stored in FreshCase packages retained redder color ( < 0.05) than those stored in Control packages. No differences ( > 0.05) existed between Control and FreshCase packaged samples for any off-odor detection for either pork chops or sausage. Moreover, levels of oxidative rancidity in all packages had low thiobarbituric acid reactive substances values. The results indicated that FreshCase technology can be used to extend storage life of pork products without having adverse effects on pork quality.

  20. Miniature Trace Gas Detector Based on Microfabricated Optical Resonators

    NASA Technical Reports Server (NTRS)

    Aveline, David C.; Yu, Nan; Thompson, Robert J.; Strekalov, Dmitry V.

    2013-01-01

    While a variety of techniques exist to monitor trace gases, methods relying on absorption of laser light are the most commonly used in terrestrial applications. Cavity-enhanced absorption techniques typically use high-reflectivity mirrors to form a resonant cavity, inside of which a sample gas can be analyzed. The effective absorption length is augmented by the cavity's high quality factor, or Q, because the light reflects many times between the mirrors. The sensitivity of such mirror-based sensors scales with size, generally making them somewhat bulky in volume. Also, specialized coatings for the high-reflectivity mirrors have limited bandwidth (typically just a few nanometers), and the delicate mirror surfaces can easily be degraded by dust or chemical films. As a highly sensitive and compact alternative, JPL is developing a novel trace gas sensor based on a monolithic optical resonator structure that has been modified such that a gas sample can be directly injected into the cavity. This device concept combines ultra-high Q optical whispering gallery mode resonators (WGMR) with microfabrication technology used in the semiconductor industry. For direct access to the optical mode inside a resonator, material can be precisely milled from its perimeter, creating an open gap within the WGMR. Within this open notch, the full optical mode of the resonator can be accessed. While this modification may limit the obtainable Q, calculations show that the reduction is not significant enough to outweigh its utility for trace gas detection. The notch can be milled from the high- Q crystalline WGMR with a focused ion beam (FIB) instrument with resolution much finer than an optical wavelength, thereby minimizing scattering losses and preserving the optical quality. Initial experimental demonstrations have shown that these opened cavities still support high-Q whispering gallery modes. This technology could provide ultrasensitive detection of a variety of molecular species in an extremely compact and robust package. With this type of modified WGMR, one can inject a gas sample into the open gap, allowing highly sensitive trace molecule detection within a roughly 1-cm volume. Other critical components of the instrument, such as the detector and a semiconductor laser, could be directly packaged with the resonator so as to not significantly increase the size of the device. Besides its low mass, volume, and power consumption, the monolithic design makes these resonators intrinsically robust devices, capable of handling significant temperature excursions, without moving parts to wear out or delicate coatings that can be easily damaged. A sensor could integrate with microfluidics technology for a chip-scale device. It could be mounted to the end of a deployable arm, or inserted into a borehole. Also, a network of individual sensors could be dispersed to monitor conditions over a wide region

  1. Electrical Characterization of Semiconductor Materials and Devices

    NASA Astrophysics Data System (ADS)

    Deen, M.; Pascal, Fabien

    Semiconductor materials and devices continue to occupy a preeminent technological position due to their importance when building integrated electronic systems used in a wide range of applications from computers, cell-phones, personal digital assistants, digital cameras and electronic entertainment systems, to electronic instrumentation for medical diagnositics and environmental monitoring. Key ingredients of this technological dominance have been the rapid advances made in the quality and processing of materials - semiconductors, conductors and dielectrics - which have given metal oxide semiconductor device technology its important characteristics of negligible standby power dissipation, good input-output isolation, surface potential control and reliable operation. However, when assessing material quality and device reliability, it is important to have fast, nondestructive, accurate and easy-to-use electrical characterization techniques available, so that important parameters such as carrier doping density, type and mobility of carriers, interface quality, oxide trap density, semiconductor bulk defect density, contact and other parasitic resistances and oxide electrical integrity can be determined. This chapter describes some of the more widely employed and popular techniques that are used to determine these important parameters. The techniques presented in this chapter range in both complexity and test structure requirements from simple current-voltage measurements to more sophisticated low-frequency noise, charge pumping and deep-level transient spectroscopy techniques.

  2. Integrated Avionics System (IAS), Integrating 3-D Technology On A Spacecraft Panel

    NASA Technical Reports Server (NTRS)

    Hunter, Don J.; Halpert, Gerald

    1999-01-01

    As spacecraft designs converge toward miniaturization, and with the volumetric and mass challenges placed on avionics, programs will continue to advance the "state of the art" in spacecraft system development with new challenges to reduce power, mass and volume. Traditionally, the trend is to focus on high-density 3-D packaging technologies. Industry has made significant progress in 3-D technologies, and other related internal and external interconnection schemes. Although new technologies have improved packaging densities, a system packaging architecture is required that not only reduces spacecraft volume and mass budgets, but increase integration efficiencies, provide modularity and flexibility to accommodate multiple missions while maintaining a low recurring cost. With these challenges in mind, a novel system packaging approach incorporates solutions that provide broader environmental applications, more flexible system interconnectivity, scalability, and simplified assembly test and integration schemes. The Integrated Avionics System (IAS) provides for a low-mass, modular distributed or centralized packaging architecture which combines ridged-flex technologies, high-density COTS hardware and a new 3-D mechanical packaging approach, Horizontal Mounted Cube (HMC). This paper will describe the fundamental elements of the IAS, HMC hardware design, system integration and environmental test results.

  3. MOlecular MAterials Property Prediction Package (MOMAP) 1.0: a software package for predicting the luminescent properties and mobility of organic functional materials

    NASA Astrophysics Data System (ADS)

    Niu, Yingli; Li, Wenqiang; Peng, Qian; Geng, Hua; Yi, Yuanping; Wang, Linjun; Nan, Guangjun; Wang, Dong; Shuai, Zhigang

    2018-04-01

    MOlecular MAterials Property Prediction Package (MOMAP) is a software toolkit for molecular materials property prediction. It focuses on luminescent properties and charge mobility properties. This article contains a brief descriptive introduction of key features, theoretical models and algorithms of the software, together with examples that illustrate the performance. First, we present the theoretical models and algorithms for molecular luminescent properties calculation, which includes the excited-state radiative/non-radiative decay rate constant and the optical spectra. Then, a multi-scale simulation approach and its algorithm for the molecular charge mobility are described. This approach is based on hopping model and combines with Kinetic Monte Carlo and molecular dynamics simulations, and it is especially applicable for describing a large category of organic semiconductors, whose inter-molecular electronic coupling is much smaller than intra-molecular charge reorganisation energy.

  4. Evolution of corundum-structured III-oxide semiconductors: Growth, properties, and devices

    NASA Astrophysics Data System (ADS)

    Fujita, Shizuo; Oda, Masaya; Kaneko, Kentaro; Hitora, Toshimi

    2016-12-01

    The recent progress and development of corundum-structured III-oxide semiconductors are reviewed. They allow bandgap engineering from 3.7 to ∼9 eV and function engineering, leading to highly durable electronic devices and deep ultraviolet optical devices as well as multifunctional devices. Mist chemical vapor deposition can be a simple and safe growth technology and is advantageous for reducing energy and cost for the growth. This is favorable for the wide commercial use of devices at low cost. The III-oxide semiconductors are promising candidates for new devices contributing to sustainable social, economic, and technological development for the future.

  5. Transition-Metal Substitution Doping in Synthetic Atomically Thin Semiconductors

    DOE PAGES

    Gao, Jian; Kim, Young Duck; Liang, Liangbo; ...

    2016-09-20

    Semiconductor impurity doping has enabled an entire generation of technology. The emergence of alternative semiconductor material systems, such as transition metal dichalcogenides (TMDCs), requires the development of scalable doping strategies. We report an unprecedented one-pot synthesis for transition-metal substitution in large-area, synthetic monolayer TMDCs. Electron microscopy, optical and electronic transport characterization and ab initio calculations indicate that our doping strategy preserves the attractive qualities of TMDC monolayers, including semiconducting transport and strong direct-gap luminescence. These results are expected to encourage exploration of transition-metal substitution in two-dimensional systems, potentially enabling next-generation optoelectronic technology in the atomically-thin regime.

  6. Will Future Measurement Needs of the Semiconductor Industry Be Met?

    PubMed Central

    Bennett, Herbert S.

    2007-01-01

    We discuss the ability of the nation’s measurement system to meet future metrology needs of the semiconductor industry. Lacking an acceptable metric for assessing the health of metrology for the semiconductor industry, we identify a limited set of unmet measurement needs. Assuming that this set of needs may serve as proxy for the galaxy of semiconductor measurement needs, we examine it from the perspective of what will be required to continue the semiconductor industry’s powerful impact in the world’s macro-economy and maintain its exceptional record of numerous technological innovations. This paper concludes with suggestions about ways to strengthen the measurement system for the semiconductor industry. PMID:27110452

  7. Transportable GPU (General Processor Units) chip set technology for standard computer architectures

    NASA Astrophysics Data System (ADS)

    Fosdick, R. E.; Denison, H. C.

    1982-11-01

    The USAFR-developed GPU Chip Set has been utilized by Tracor to implement both USAF and Navy Standard 16-Bit Airborne Computer Architectures. Both configurations are currently being delivered into DOD full-scale development programs. Leadless Hermetic Chip Carrier packaging has facilitated implementation of both architectures on single 41/2 x 5 substrates. The CMOS and CMOS/SOS implementations of the GPU Chip Set have allowed both CPU implementations to use less than 3 watts of power each. Recent efforts by Tracor for USAF have included the definition of a next-generation GPU Chip Set that will retain the application-proven architecture of the current chip set while offering the added cost advantages of transportability across ISO-CMOS and CMOS/SOS processes and across numerous semiconductor manufacturers using a newly-defined set of common design rules. The Enhanced GPU Chip Set will increase speed by an approximate factor of 3 while significantly reducing chip counts and costs of standard CPU implementations.

  8. Improving Sustainability of Ion Implant Modules

    NASA Astrophysics Data System (ADS)

    Mayer, Jim

    2011-01-01

    Semiconductor fabs have long been pressured to manage capital costs, reduce energy consumption and increasingly improve efforts to recycle and recover resources. Ion implant tools have been high-profile offenders on all three fronts. They draw such large volumes of air for heat dissipation and risk reduction that historically, they are the largest consumer of cleanroom air of any process tool—and develop energy usage and resource profiles to match. This paper presents a documented approach to reduce their energy consumption and dramatically downsize on-site facilities support for cleanroom air manufacture and abatement. The combination produces significant capital expenditure savings. The case entails applying SAGS Type 1 (sub-atmospheric gas systems) toxic gas packaging to enable engineering adaptations that deliver the energy savings and cost benefits without any reduction in environmental health and safety. The paper also summarizes benefits as they relate to reducing a fabs carbon emission footprint (and longer range advantages relative to potential cap and trade programs) with existing technology.

  9. Thermal-Aware Test Access Mechanism and Wrapper Design Optimization for System-on-Chips

    NASA Astrophysics Data System (ADS)

    Yu, Thomas Edison; Yoneda, Tomokazu; Chakrabarty, Krishnendu; Fujiwara, Hideo

    Rapid advances in semiconductor manufacturing technology have led to higher chip power densities, which places greater emphasis on packaging and temperature control during testing. For system-on-chips, peak power-based scheduling algorithms have been used to optimize tests under specified power constraints. However, imposing power constraints does not always solve the problem of overheating due to the non-uniform distribution of power across the chip. This paper presents a TAM/Wrapper co-design methodology for system-on-chips that ensures thermal safety while still optimizing the test schedule. The method combines a simplified thermal-cost model with a traditional bin-packing algorithm to minimize test time while satisfying temperature constraints. Furthermore, for temperature checking, thermal simulation is done using cycle-accurate power profiles for more realistic results. Experiments show that even a minimal sacrifice in test time can yield a considerable decrease in test temperature as well as the possibility of further lowering temperatures beyond those achieved using traditional power-based test scheduling.

  10. Mask strategy at International SEMATECH

    NASA Astrophysics Data System (ADS)

    Kimmel, Kurt R.

    2002-08-01

    International SEMATECH (ISMT) is a consortium consisting of 13 leading semiconductor manufacturers from around the globe. Its objective is to develop the infrastructure necessary for its member companies to realize the International Technology Roadmap for Semiconductors (ITRS) through efficiencies of shared development resources and knowledge. The largest area of effort is lithography, recognized as a crucial enabler for microelectronics technology progress. Within the Lithography Division, most of the efforts center on mask-related issues. The development strategy at International SEMATCH will be presented and the interlock of lithography projects clarified. Because of the limited size of the mask production equipment market, the business case is weak for aggressive investment commensurate with the pace of the International Technology Roadmap for Semiconductors. With masks becoming the overwhelming component of lithography cost, new ways of reducing or eliminating mask costs are being explored. Will mask technology survive without a strong business case? Will the mask industry limit the growth of the semiconductor industry? Are advanced masks worth their escalating cost? An analysis of mask cost from the perspective of mask value imparted to the user is presented with examples and generic formulas for the reader to apply independently. A key part to the success for both International SEMATECH and the industry globally will be partnerships on both the local level between mask-maker and mask-user, and the macro level where global collaborations will be necessary to resolve technology development cost challenges.

  11. Flight Avionics Hardware Roadmap

    NASA Technical Reports Server (NTRS)

    Some, Raphael; Goforth, Monte; Chen, Yuan; Powell, Wes; Paulick, Paul; Vitalpur, Sharada; Buscher, Deborah; Wade, Ray; West, John; Redifer, Matt; hide

    2014-01-01

    The Avionics Technology Roadmap takes an 80% approach to technology investment in spacecraft avionics. It delineates a suite of technologies covering foundational, component, and subsystem-levels, which directly support 80% of future NASA space mission needs. The roadmap eschews high cost, limited utility technologies in favor of lower cost, and broadly applicable technologies with high return on investment. The roadmap is also phased to support future NASA mission needs and desires, with a view towards creating an optimized investment portfolio that matures specific, high impact technologies on a schedule that matches optimum insertion points of these technologies into NASA missions. The roadmap looks out over 15+ years and covers some 114 technologies, 58 of which are targeted for TRL6 within 5 years, with 23 additional technologies to be at TRL6 by 2020. Of that number, only a few are recommended for near term investment: 1. Rad Hard High Performance Computing 2. Extreme temperature capable electronics and packaging 3. RFID/SAW-based spacecraft sensors and instruments 4. Lightweight, low power 2D displays suitable for crewed missions 5. Radiation tolerant Graphics Processing Unit to drive crew displays 6. Distributed/reconfigurable, extreme temperature and radiation tolerant, spacecraft sensor controller and sensor modules 7. Spacecraft to spacecraft, long link data communication protocols 8. High performance and extreme temperature capable C&DH subsystem In addition, the roadmap team recommends several other activities that it believes are necessary to advance avionics technology across NASA: center dot Engage the OCT roadmap teams to coordinate avionics technology advances and infusion into these roadmaps and their mission set center dot Charter a team to develop a set of use cases for future avionics capabilities in order to decouple this roadmap from specific missions center dot Partner with the Software Steering Committee to coordinate computing hardware and software technology roadmaps and investment recommendations center dot Continue monitoring foundational technologies upon which future avionics technologies will be dependent, e.g., RHBD and COTS semiconductor technologies

  12. Packaging of silicon photonic devices: from prototypes to production

    NASA Astrophysics Data System (ADS)

    Morrissey, Padraic E.; Gradkowski, Kamil; Carroll, Lee; O'Brien, Peter

    2018-02-01

    The challenges associated with the photonic packaging of silicon devices is often underestimated and remains technically challenging. In this paper, we review some key enabling technologies that will allow us to overcome the current bottleneck in silicon photonic packaging; while also describing the recent developments in standardisation, including the establishment of PIXAPP as the worlds first open-access PIC packaging and assembly Pilot Line. These developments will allow the community to move from low volume prototype photonic packaged devices to large scale volume manufacturing, where the full commercialisation of PIC technology can be realised.

  13. Insulator Charging in RF MEMS Capacitive Switches

    DTIC Science & Technology

    2005-06-01

    and Simulations,” Journal of Microelectromechanical Systems, 8: 208-217 (June 1999). 5. Neaman , Donald. Semiconductor Physics & Devices. Boston...227-230 (2001). 5. Sze, S.M. Semiconductor Devices: Physics and Technology. New York: Wiley, 1985. 6. Neaman , Donald A. Semiconductor Physics...Radiation Response of Hafnium-Silicate Capacitors,” IEEE Transactions on Nuclear Science, 49: 3191-3196 (December 2002). 3. Neaman , D.A

  14. Impact of external influences on food packaging.

    PubMed

    Brody, A L

    1977-09-01

    Since the food supply is dependent upon an effective packaging system, threats to packaging represent implied threats to food processing and distribution. Enacted and potential legislation and regulation are retarding technological and commercial progress in food packaging and have already restricted some food packaging/processins systems. The results of these external influences is not simply the sum of the individual acts, but is a cascading self-imposed arresting of food packaging/processing advancement. The technological bases for the enacted and proposed legislation and regulation are presented in the enumeration of the external influences on food packaging. Economic and sociological arguments and facts surrounding the issues are also presented. Among the external influences on food packaging detailed are indirect additives, nutritional labeling, benefit:risk, solid waste and litter, environmental pollution, universal product code, and food industry productivity. The magnitude of the total impact of these external influences upon the food supply is so large that assertive action must be taken to channel these influences into more productive awareness. An objective and comprehensive public communications program supported by the technological community appears mandatory.

  15. Radiometric packaging of uncooled bolometric infrared focal plane arrays

    NASA Astrophysics Data System (ADS)

    García-Blanco, Sonia; Pope, Timothy; Côté, Patrice; Leclerc, Mélanie; Ngo Phong, Linh; Châteauneuf, François

    2017-11-01

    INO has a wide experience in the design and fabrication of different kinds of microbolometer focal plane arrays (FPAs). In particular, a 512x3 pixel microbolometer FPA has been selected as the sensor for the New Infrared Sensor Technology (NIRST) instrument, one of the payloads of the SACD/Aquarius mission. In order to make the absolute temperature measurements necessary for many infrared Earth observation applications, the microbolometer FPA must be integrated into a package offering a very stable thermal environment. The radiometric packaging technology developed at INO presents an innovative approach since it was conceived to be modular and adaptable for the packaging of different microbolometer FPAs and for different sets of assembly requirements without need for requalification of the assembly process. The development of the radiometric packaging technology has broadened the position of INO as a supplier of radiometric detector modules integrating FPAs of microbolometers inside a radiometric package capable of achieving the requirements of different space missions. This paper gives an overview of the design of INO's radiometric package. Key performance parameters are also discussed and the test campaign conducted with the radiometric package is presented.

  16. Physics-based process modeling, reliability prediction, and design guidelines for flip-chip devices

    NASA Astrophysics Data System (ADS)

    Michaelides, Stylianos

    Flip Chip on Board (FCOB) and Chip-Scale Packages (CSPs) are relatively new technologies that are being increasingly used in the electronic packaging industry. Compared to the more widely used face-up wirebonding and TAB technologies, flip-chips and most CSPs provide the shortest possible leads, lower inductance, higher frequency, better noise control, higher density, greater input/output (I/O), smaller device footprint and lower profile. However, due to the short history and due to the introduction of several new electronic materials, designs, and processing conditions, very limited work has been done to understand the role of material, geometry, and processing parameters on the reliability of flip-chip devices. Also, with the ever-increasing complexity of semiconductor packages and with the continued reduction in time to market, it is too costly to wait until the later stages of design and testing to discover that the reliability is not satisfactory. The objective of the research is to develop integrated process-reliability models that will take into consideration the mechanics of assembly processes to be able to determine the reliability of face-down devices under thermal cycling and long-term temperature dwelling. The models incorporate the time and temperature-dependent constitutive behavior of various materials in the assembly to be able to predict failure modes such as die cracking and solder cracking. In addition, the models account for process-induced defects and macro-micro features of the assembly. Creep-fatigue and continuum-damage mechanics models for the solder interconnects and fracture-mechanics models for the die have been used to determine the reliability of the devices. The results predicted by the models have been successfully validated against experimental data. The validated models have been used to develop qualification and test procedures for implantable medical devices. In addition, the research has helped develop innovative face-down devices without the underfill, based on the thorough understanding of the failure modes. Also, practical design guidelines for material, geometry and process parameters for reliable flip-chip devices have been developed.

  17. Use of optical technique for inspection of warpage of IC packages

    NASA Astrophysics Data System (ADS)

    Toh, Siew-Lok; Chau, Fook S.; Ong, Sim Heng

    2001-06-01

    The packaging of IC packages has changed over the years, form dual-in-line, wire-bond, and pin-through-hole in printed wiring board technologies in the 1970s to ball grid array, chip scale and surface mount technologies in the 1990s. Reliability has been a big problem for manufacturers for some moisture-sensitive packages. One of the potential problems in plastic IC packages is moisture-induced popcorn effect which can arise during the reflow process. Shearography is a non-destructive inspection technique that may be used to detect the delamination and warpage of IC packages. It is non-contacting and permits a full-field observation of surface displacement derivatives. Another advantage of this technique is that it is able to give the real-time formation of the fringes which indicate flaws in the IC package under real-time simulation condition of Surface Mount Technology (SMT) IR reflow profile. It is extremely fast and convenient to study the true behavior of the packaging deformation during the SMT process. It can be concluded that shearography has the potential for the real- time detection, in situ and non-destructive inspection of IC packages during the surface mount process.

  18. Quality and safety aspects of meat products as affected by various physical manipulations of packaging materials.

    PubMed

    Lee, Keun Taik

    2010-09-01

    This article explores the effects of physically manipulated packaging materials on the quality and safety of meat products. Recently, innovative measures for improving quality and extending the shelf-life of packaged meat products have been developed, utilizing technologies including barrier film, active packaging, nanotechnology, microperforation, irradiation, plasma and far-infrared ray (FIR) treatments. Despite these developments, each technology has peculiar drawbacks which will need to be addressed by meat scientists in the future. To develop successful meat packaging systems, key product characteristics affecting stability, environmental conditions during storage until consumption, and consumers' packaging expectations must all be taken into consideration. Furthermore, the safety issues related to packaging materials must also be taken into account when processing, packaging and storing meat products.

  19. Miniature stick-packaging--an industrial technology for pre-storage and release of reagents in lab-on-a-chip systems.

    PubMed

    van Oordt, Thomas; Barb, Yannick; Smetana, Jan; Zengerle, Roland; von Stetten, Felix

    2013-08-07

    Stick-packaging of goods in tubular-shaped composite-foil pouches has become a popular technology for food and drug packaging. We miniaturized stick-packaging for use in lab-on-a-chip (LOAC) systems to pre-store and on-demand release the liquid and dry reagents in a volume range of 80-500 μl. An integrated frangible seal enables the pressure-controlled release of reagents and simplifies the layout of LOAC systems, thereby making the package a functional microfluidic release unit. The frangible seal is adjusted to defined burst pressures ranging from 20 to 140 kPa. The applied ultrasonic welding process allows the packaging of temperature sensitive reagents. Stick-packs have been successfully tested applying recovery tests (where 99% (STDV = 1%) of 250 μl pre-stored liquid is released), long-term storage tests (where there is loss of only <0.5% for simulated 2 years) and air transport simulation tests. The developed technology enables the storage of a combination of liquid and dry reagents. It is a scalable technology suitable for rapid prototyping and low-cost mass production.

  20. IFT Scientific Status Summary 2008: Innovative Food Packaging Solutions

    USDA-ARS?s Scientific Manuscript database

    Food and beverage packaging comprises 55-65% of the $110 billion value of packaging in the United States. This review provides a summary of innovative technology developments in food packaging. The expanded role of food and beverage packaging is reviewed. Active and intelligent food packaging, ba...

  1. JTEC Panel report on electronic manufacturing and packaging in Japan

    NASA Technical Reports Server (NTRS)

    Kelly, Michael J.; Boulton, William R. (Editor); Kukowski, John; Meieran, Gene; Pecht, Michael; Peeples, John; Tummala, Rao; Dehaemer, Michael J.; Holdridge, Geoff (Editor); Gamota, George

    1995-01-01

    This report summarizes the status of electronic manufacturing and packaging technology in Japan in comparison to that in the United States, and its impact on competition in electronic manufacturing in general. In addition to electronic manufacturing technologies, the report covers technology and manufacturing infrastructure, electronics manufacturing and assembly, quality assurance and reliability in the Japanese electronics industry, and successful product realization strategies. The panel found that Japan leads the United States in almost every electronics packaging technology. Japan clearly has achieved a strategic advantage in electronics production and process technologies. Panel members believe that Japanese competitors could be leading U.S. firms by as much as a decade in some electronics process technologies.

  2. Chip packaging technique

    NASA Technical Reports Server (NTRS)

    Jayaraj, Kumaraswamy (Inventor); Noll, Thomas E. (Inventor); Lockwood, Harry F. (Inventor)

    2001-01-01

    A hermetically sealed package for at least one semiconductor chip is provided which is formed of a substrate having electrical interconnects thereon to which the semiconductor chips are selectively bonded, and a lid which preferably functions as a heat sink, with a hermetic seal being formed around the chips between the substrate and the heat sink. The substrate is either formed of or includes a layer of a thermoplastic material having low moisture permeability which material is preferably a liquid crystal polymer (LCP) and is a multiaxially oriented LCP material for preferred embodiments. Where the lid is a heat sink, the heat sink is formed of a material having high thermal conductivity and preferably a coefficient of thermal expansion which substantially matches that of the chip. A hermetic bond is formed between the side of each chip opposite that connected to the substrate and the heat sink. The thermal bond between the substrate and the lid/heat sink may be a pinched seal or may be provided, for example by an LCP frame which is hermetically bonded or sealed on one side to the substrate and on the other side to the lid/heat sink. The chips may operate in the RF or microwave bands with suitable interconnects on the substrate and the chips may also include optical components with optical fibers being sealed into the substrate and aligned with corresponding optical components to transmit light in at least one direction. A plurality of packages may be physically and electrically connected together in a stack to form a 3D array.

  3. Flexible Packaging by Film-Assisted Molding for Microintegration of Inertia Sensors

    PubMed Central

    Hera, Daniel; Berndt, Armin; Günther, Thomas; Schmiel, Stephan; Harendt, Christine; Zimmermann, André

    2017-01-01

    Packaging represents an important part in the microintegration of sensors based on microelectromechanical system (MEMS). Besides miniaturization and integration density, functionality and reliability in combination with flexibility in packaging design at moderate costs and consequently high-mix, low-volume production are the main requirements for future solutions in packaging. This study investigates possibilities employing printed circuit board (PCB-)based assemblies to provide high flexibility for circuit designs together with film-assisted transfer molding (FAM) to package sensors. The feasibility of FAM in combination with PCB and MEMS as a packaging technology for highly sensitive inertia sensors is being demonstrated. The results prove the technology to be a viable method for damage-free packaging of stress- and pressure-sensitive MEMS. PMID:28653992

  4. Performance assessment of small-package-class nonintrusive inspection systems

    NASA Astrophysics Data System (ADS)

    Spradling, Michael L.; Hyatt, Roger

    1997-02-01

    The DoD Counterdrug Technology Development Program has addressed the development and demonstration of technology to enhance nonintrusive inspection of small packages such as passenger baggage, commercially delivered parcels, and breakbulk cargo items. Within the past year they have supported several small package-class nonintrusive inspection system performance assessment activities. All performance assessment programs involved the use of a red/blue team concept and were conducted in accordance with approved assessment protocols. This paper presents a discussion related to the systematic performance assessment of small package-class nonintrusive inspection technologies, including transmission, backscatter and computed tomography x-ray imaging, and protocol-related considerations for the assessment of these systems.

  5. The United States digital recording industry

    NASA Technical Reports Server (NTRS)

    Simonds, John L.

    1993-01-01

    The recording industry resembles the semiconductor industry in several aspects. Both are large (greater than $60 Billion/year revenues); both are considered critical technologies supporting national objectives; both are experiencing increased competition from foreign suppliers; they recognize significant opportunities for both technological and market growth in the decade to come; and both realize that a key to this future growth lies in alliances among industry, academia, and government. The semiconductor industry has made significant investments in alliances relating to manufacturing technologies (SEMATECH) and to joint long-term technology research centered in universities (SRC). The federal government has provided funding support of these efforts in recognition of the critical roles semiconductor technologies play in national interests. The recording industry is now also forming critical alliances, but has been slower in starting and in gaining broad recognition by government agencies and legislators that the industry needs federal support. Traditionally, the recording industry has been viewed as mature, stable, and, while critical to national interests, able to chart and fund its own course toward future national needs. That perception is fortunately changing.

  6. Advanced Packaging Technology Used in Fabricating a High-Temperature Silicon Carbide Pressure Sensor

    NASA Technical Reports Server (NTRS)

    Beheim, Glenn M.

    2003-01-01

    The development of new aircraft engines requires the measurement of pressures in hot areas such as the combustor and the final stages of the compressor. The needs of the aircraft engine industry are not fully met by commercially available high-temperature pressure sensors, which are fabricated using silicon. Kulite Semiconductor Products and the NASA Glenn Research Center have been working together to develop silicon carbide (SiC) pressure sensors for use at high temperatures. At temperatures above 850 F, silicon begins to lose its nearly ideal elastic properties, so the output of a silicon pressure sensor will drift. SiC, however, maintains its nearly ideal mechanical properties to extremely high temperatures. Given a suitable sensor material, a key to the development of a practical high-temperature pressure sensor is the package. A SiC pressure sensor capable of operating at 930 F was fabricated using a newly developed package. The durability of this sensor was demonstrated in an on-engine test. The SiC pressure sensor uses a SiC diaphragm, which is fabricated using deep reactive ion etching. SiC strain gauges on the surface of the diaphragm sense the pressure difference across the diaphragm. Conventionally, the SiC chip is mounted to the package with the strain gauges outward, which exposes the sensitive metal contacts on the chip to the hostile measurement environment. In the new Kulite leadless package, the SiC chip is flipped over so that the metal contacts are protected from oxidation by a hermetic seal around the perimeter of the chip. In the leadless package, a conductive glass provides the electrical connection between the pins of the package and the chip, which eliminates the fragile gold wires used previously. The durability of the leadless SiC pressure sensor was demonstrated when two 930 F sensors were tested in the combustor of a Pratt & Whitney PW4000 series engine. Since the gas temperatures in these locations reach 1200 to 1300 F, the sensors were installed in water-cooled jackets, as shown. This was a severe test because the pressure-sensing chips were exposed to the hot combustion gases. Prior to the installation of the SiC pressure sensors, two high-temperature silicon sensors, installed in the same locations, did not survive a single engine run. The durability of the leadless SiC pressure sensor was demonstrated when both SiC sensors operated properly throughout the two runs that were conducted.

  7. EDITORIAL: The 24th Nordic Semiconductor Meeting The 24th Nordic Semiconductor Meeting

    NASA Astrophysics Data System (ADS)

    Páll Gunnlaugsson, Haraldur; Nylandsted Larsen, Arne; Uhrenfeldt, Christian

    2012-03-01

    A Nordic Semiconductor Meeting is held every other year with the venue rotating amongst the Nordic countries of Denmark, Finland, Iceland, Norway and Sweden. The focus of these meetings remains 'original research and science being carried out on semiconductor materials, devices and systems'. Reports on industrial activity have usually featured. The topics have ranged from fundamental research on point defects in a semiconductor to system architecture of semiconductor electronic devices. Proceedings from these events are regularly published as a Topical Issue of Physica Scripta. All of the papers in this Topical Issue have undergone critical peer review and we wish to thank the reviewers and the authors for their cooperation, which has been instrumental in meeting the high scientific standards and quality of the series. This 24th meeting of the Nordic Semiconductor community, NSM 2011, was held at Fuglsøcentret, close to Aarhus, Denmark, 19-22 June 2011. Support was provided by the Carlsberg Foundation, Danfysik and the semiconductor group at Aarhus University. Over 30 participants presented a broad range of topics covering semiconductor materials and devices as well as related material science interests. The conference provided a forum for Nordic and international scientists to present and discuss new results and ideas concerning the fundamentals and applications of semiconductor materials. The aim of the meeting was to advance the progress of Nordic science and thus aid in future worldwide technological advances concerning technology, education, energy and the environment. The 25th Nordic Semiconductor Meeting will be organized in June 2013 in Finland, chaired by Dr Filip Tuomisto, Aalto University. A Nordic Summer School on Semiconductor Science will be organized in connection with the conference (just before), chaired by Dr Jonatan Slotte, Aalto University. Information on these events can be found at physics.aalto.fi/nsm2013. List of participants Søren Vejling AndersenAalborg University, Aalborg, Denmark Pia BomholtAarhus University, Aarhus, Denmark Hafliði P GíslasonUniversity of Iceland, Reykjavik, Iceland Haraldur Páll GunnlaugssonAarhus University, Aarhus, Denmark John HansenAarhus University, Aarhus, Denmark Britta JohansenAarhus University, Aarhus, Denmark Volodymyr KhranovskyyLinköping University, Linköping, Sweden Arne Nylandsted LarsenAarhus University, Denmark Helge MalmbekkUniversity of Oslo, Oslo, Norway Erik Stensrud MarsteinInstitute for Energy Technology, Kjeller, Norway Antonio MartiUniversidad Politécnica de Madrid, Madrid, Spain Torben MølholtUniversity of Iceland, Reykjavik, Iceland Sveinn ÓlafssonUniversity of Iceland, Reykjavik, Iceland Thomas PedersenTechnical University of Denmark, Kgs. Lyngby, Denmark Thomas Garm PedersenAalborg University, Aalborg, Denmark Dirch Hjorth PetersenTechnical University of Denmark, Kgs. Lyngby, Denmark Vincent QuemenerUniversity of Oslo, Oslo, Norway Henry RadamsonKTH Royal Institute of Technology, Kista, Sweden Bahman RaeissiUniversity of Oslo, Oslo, Norway Jonatan SlotteAalto University, Aalto, Finland Xin SongUniversity of Oslo, Oslo, Norway Einar Örn SveinbjörnssonUniversity of Iceland, Reykjavik, Iceland Mikael SyväjärviLinköping University, Linköping, Sweden Chi Kwong TangUniversity of Oslo, Oslo, Norway Erik V ThomsenTechnical University of Denmark, Kgs. Lyngby, Denmark Christian UhrenfeldtAarhus University, Aarhus, Denmark Hans Ulrik UlriksenAalborg University, Aalborg, Denmark Muhammad UsmanKTH Royal Institute of Technology, Kista, Sweden Lasse VinesUniversity of Oslo, Oslo, Norway Ulrich WahlUnidade de Física e Aceleradores, Sacavém, Portugal Helge WemanNTNU, Trondheim, Norway Gerd WeyerAarhus University, Denmark

  8. Microplasma fabrication: from semiconductor technology for 2D-chips and microfluidic channels to rapid prototyping and 3D-printing of microplasma devices

    NASA Astrophysics Data System (ADS)

    Shatford, R.; Karanassios, Vassili

    2014-05-01

    Microplasmas are receiving attention in recent conferences and current scientific literature. In our laboratory, microplasmas-on-chips proved to be particularly attractive. The 2D- and 3D-chips we developed became hybrid because they were fitted with a quartz plate (quartz was used due to its transparency to UV). Fabrication of 2D- and 3D-chips for microplasma research is described. The fabrication methods described ranged from semiconductor fabrication technology, to Computer Numerical Control (CNC) machining, to 3D-printing. These methods may prove to be useful for those contemplating in entering microplasma research but have no access to expensive semiconductor fabrication equipment.

  9. Semiconductor chips, genes, and stem cells: new wine for new bottles?

    PubMed

    Rose, Simone A

    2012-01-01

    This Article analogizes early semiconductor technology and its surrounding economics with isolated genes, stem cells, and related bioproducts, and their surrounding economics, to make the case for sui generis (of its own class) intellectual property protection for isolated bioproducts. Just as early semiconductors failed to meet the patent social bargain requiring novelty and non-obviousness in the 1980s, isolated genes and stem cells currently fail to meet the patent bargain requirements of non-obviousness and eligible subject matter that entitle them to traditional intellectual property protection. Like early semiconductor chip designs, nevertheless, the high cost of upstream bioproduct research and development, coupled with the need to sustain continued economic growth of the biotechnology industry, mandates that Congress provide some level of exclusive rights to ensure continued funding for this research. Sui generis intellectual property protection for isolated bioproducts would preserve the incentive to continue innovation in the field. As illustrated by the semiconductor industry, however, such sui generis protection for this technology must include limitations that address the need to provide an appropriate level of public access to facilitate downstream product development and enrich the public domain.

  10. Crystal Growth of ZnSe and Related Ternary Compound Semiconductors by Vapor Transport

    NASA Technical Reports Server (NTRS)

    Su, Ching-Hua; Burger, Arnold; Dudley, Michael; Matyi, Richard J.; Ramachandran, Narayanan; Sha, Yi-Gao; Volz, Martin; Shih, Hung-Dah

    1998-01-01

    Interest in optical devices which can operate in the visible spectrum has motivated research interest in the II-VI wide band gap semiconductor materials. The recent challenge for semiconductor opto-electronics is the development of a laser which can operate at short visible wavelengths, In the past several years, major advances in thin film technology such as molecular beam epitaxy and metal organic chemical vapor deposition have demonstrated the applicability of II-VI materials to important devices such as light-emitting diodes, lasers, and ultraviolet detectors.The demonstration of its optical bistable properties in bulk and thin film forms also make ZnSe a possible candidate material for the building blocks of a digital optical computer. Despite this, developments in the crystal growth of bulk II-VI semiconductor materials has not advanced far enough to provide the low price, high quality substrates needed for the thin film growth technology. The electrical and optical properties of semiconductor materials depend on the native point defects, (the deviation from stoichiometry), and the impurity or dopant distribution. To date, the bulk growth of ZnSe substrates has been plagued with problems related to defects such as non-uniform distributions of native defects, impurities and dopants, lattice strain, dislocations, grain boundaries, and second phase inclusions which greatly effect the device performance. In the bulk crystal growth of some technologically important semiconductors, such as ZnTe, CdS, ZnSe and ZnS, vapor growth techniques have significant advantages over melt growth techniques due to the high melting points of these materials.

  11. Technology Assessment Software Package: Final Report.

    ERIC Educational Resources Information Center

    Hutinger, Patricia L.

    This final report describes the Technology Assessment Software Package (TASP) Project, which produced developmentally appropriate technology assessment software for children from 18 months through 8 years of age who have moderate to severe disabilities that interfere with their interaction with people, objects, tasks, and events in their…

  12. Technological challenges of addressing new and more complex migrating products from novel food packaging materials.

    PubMed

    Munro, Ian C; Haighton, Lois A; Lynch, Barry S; Tafazoli, Shahrzad

    2009-12-01

    The risk assessment of migration products resulting from packaging material has and continues to pose a difficult challenge. In most jurisdictions, there are regulatory requirements for the approval or notification of food contact substances that will be used in packaging. These processes generally require risk assessment to ensure safety concerns are addressed. The science of assessing food contact materials was instrumental in the development of the concept of Threshold of Regulation and the Threshold of Toxicological Concern procedures. While the risk assessment process is in place, the technology of food packaging continues to evolve to include new initiatives, such as the inclusion of antimicrobial substances or enzyme systems to prevent spoilage, use of plastic packaging intended to remain on foods as they are being cooked, to the introduction of more rigid, stable and reusable materials, and active packaging to extend the shelf-life of food. Each new technology brings with it the potential for exposure to new and possibly novel substances as a result of migration, interaction with other chemical packaging components, or, in the case of plastics now used in direct cooking of products, degradation products formed during heating. Furthermore, the presence of trace levels of certain chemicals from packaging that were once accepted as being of low risk based on traditional toxicology studies are being challenged on the basis of reports of adverse effects, particularly with respect to endocrine disruption, alleged to occur at very low doses. A recent example is the case of bisphenol A. The way forward to assess new packaging technologies and reports of very low dose effects in non-standard studies of food contact substances is likely to remain controversial. However, the risk assessment paradigm is sufficiently robust and flexible to be adapted to meet these challenges. The use of the Threshold of Regulation and the Threshold of Toxicological Concern concepts may play a critical role in the risk assessment of new food packaging technologies in the future.

  13. Advanced Manufacturing Systems in Food Processing and Packaging Industry

    NASA Astrophysics Data System (ADS)

    Shafie Sani, Mohd; Aziz, Faieza Abdul

    2013-06-01

    In this paper, several advanced manufacturing systems in food processing and packaging industry are reviewed, including: biodegradable smart packaging and Nano composites, advanced automation control system consists of fieldbus technology, distributed control system and food safety inspection features. The main purpose of current technology in food processing and packaging industry is discussed due to major concern on efficiency of the plant process, productivity, quality, as well as safety. These application were chosen because they are robust, flexible, reconfigurable, preserve the quality of the food, and efficient.

  14. Foundational Forces & Hidden Variables in Technology Commercialization

    NASA Astrophysics Data System (ADS)

    Barnett, Brandon

    2011-03-01

    The science of physics seems vastly different from the process of technology commercialization. Physics strives to understand our world through the experimental deduction of immutable laws and dependent variables and the resulting macro-scale phenomenon. In comparison, the~goal of business is to make a profit by addressing the needs, preferences, and whims of individuals in a market. It may seem that this environment is too dynamic to identify all the hidden variables and deduct the foundational forces that impact a business's ability to commercialize innovative technologies. One example of a business ``force'' is found in the semiconductor industry. In 1965, Intel co-founder Gordon Moore predicted that the number of transistors incorporated in a chip will approximately double every 24 months. Known as Moore's Law, this prediction has become the guiding principle for the semiconductor industry for the last 40 years. Of course, Moore's Law is not really a law of nature; rather it is the result of efforts by Intel and the entire semiconductor industry. A closer examination suggests that there are foundational principles of business that underlie the macro-scale phenomenon of Moore's Law. Principles of profitability, incentive, and strategic alignment have resulted in a coordinated influx of resources that has driven technologies to market, increasing the profitability of the semiconductor industry and optimizing the fitness of its participants. New innovations in technology are subject to these same principles. So, in addition to traditional market forces, these often unrecognized forces and variables create challenges for new technology commercialization. In this talk, I will draw from ethnographic research, complex adaptive theory, and industry data to suggest a framework with which to think about new technology commercialization. Intel's bio-silicon initiative provides a case study.

  15. Recent developments in intelligent packaging for enhancing food quality and safety.

    PubMed

    Sohail, Muhammad; Sun, Da-Wen; Zhu, Zhiwei

    2018-03-07

    The role of packaging cannot be denied in the life cycle of any food product. Intelligent packaging is an emerging technology in the food packaging sector. Although it still needs its full emergence in the market, its importance has been proved for the maintenance of food quality and safety. The present review describes several aspects of intelligent packaging. It first highlights different tools used in intelligent packaging and elucidates the role of these packaging devices for maintaining the quality of different food items in terms of controlling microbial growth and gas concentration, and for providing convenience and easiness to its users in the form of time temperature indication. This review also discusses other intelligent packaging solutions in supply chain management of food products to control theft and counterfeiting conducts and broaden the image of the food companies in terms of branding and marketing. Overall, intelligent packaging can ensure food quality and safety in the food industry, however there are still some concerns over this emerging technology including high cost and legal aspects, and thus future work should be performed to overcome these problems for further promoting its applications in the food industry. Moreover, work should also be carried out to combine several single intelligent packaging devices into a single one, so that most of the benefits from this emerging technology can be achieved.

  16. Porous Diblock Copolymer Thin Films in High-Performance Semiconductor Microelectronics

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Black, C.T.

    2011-02-01

    The engine fueling more than 40 years of performance improvements in semiconductor integrated circuits (ICs) has been industry's ability to pattern circuit elements at ever-higher resolution and with ever-greater precision. Steady advances in photolithography - the process wherein ultraviolet light chemically changes a photosensitive polymer resist material in order to create a latent image - have resulted in scaling of minimum printed feature sizes from tens of microns during the 1980s to sub-50 nanometer transistor gate lengths in today's state-of-the-art ICs. The history of semiconductor technology scaling as well as future technology requirements is documented in the International Technology Roadmapmore » for Semiconductors (ITRS). The progression of the semiconductor industry to the realm of nanometer-scale sizes has brought enormous challenges to device and circuit fabrication, rendering performance improvements by conventional scaling alone increasingly difficult. Most often this discussion is couched in terms of field effect transistor (FET) feature sizes such as the gate length or gate oxide thickness, however these challenges extend to many other aspects of the IC, including interconnect dimensions and pitch, device packing density, power consumption, and heat dissipation. The ITRS Technology Roadmap forecasts a difficult set of scientific and engineering challenges with no presently-known solutions. The primary focus of this chapter is the research performed at IBM on diblock copolymer films composed of polystyrene (PS) and poly(methyl-methacrylate) (PMMA) (PS-b-PMMA) with total molecular weights M{sub n} in the range of {approx}60K (g/mol) and polydispersities (PD) of {approx}1.1. These materials self assemble to form patterns having feature sizes in the range of 15-20nm. PS-b-PMMA was selected as a self-assembling patterning material due to its compatibility with the semiconductor microelectronics manufacturing infrastructure, as well as the significant body of existing research on understanding its material properties.« less

  17. Complete indium-free CW 200W passively cooled high power diode laser array using double-side cooling technology

    NASA Astrophysics Data System (ADS)

    Wang, Jingwei; Zhu, Pengfei; Liu, Hui; Liang, Xuejie; Wu, Dihai; Liu, Yalong; Yu, Dongshan; Zah, Chung-en; Liu, Xingsheng

    2017-02-01

    High power diode lasers have been widely used in many fields. To meet the requirements of high power and high reliability, passively cooled single bar CS-packaged diode lasers must be robust to withstand thermal fatigue and operate long lifetime. In this work, a novel complete indium-free double-side cooling technology has been applied to package passively cooled high power diode lasers. Thermal behavior of hard solder CS-package diode lasers with different packaging structures was simulated and analyzed. Based on these results, the device structure and packaging process of double-side cooled CS-packaged diode lasers were optimized. A series of CW 200W 940nm high power diode lasers were developed and fabricated using hard solder bonding technology. The performance of the CW 200W 940nm high power diode lasers, such as output power, spectrum, thermal resistance, near field, far field, smile, lifetime, etc., is characterized and analyzed.

  18. Doped Aluminum Gallium Arsenide (AlGaAs)/Gallium Arsenide (GaAs) Photoconductive Semiconductor Switch (PCSS) Fabrication

    DTIC Science & Technology

    2016-09-27

    contact regions and epitaxial capping layer are fabricated to investigate the advantages of both approaches. Devices were fabricated with various... Contacts 7 2.5 Packaging 11 3. Conclusions 12 4. References 13 Appendix. Detailed Fabrication Process 15 List of Symbols, Abbreviations, and...regions in violet (overlaying previous patterns) .......7 Fig. 6 Mask 4: intrinsic device contact window regions in orange (overlaying previous

  19. HfSe2 and ZrSe2: Two-dimensional semiconductors with native high-κ oxides

    PubMed Central

    Mleczko, Michal J.; Zhang, Chaofan; Lee, Hye Ryoung; Kuo, Hsueh-Hui; Magyari-Köpe, Blanka; Moore, Robert G.; Shen, Zhi-Xun; Fisher, Ian R.; Nishi, Yoshio; Pop, Eric

    2017-01-01

    The success of silicon as a dominant semiconductor technology has been enabled by its moderate band gap (1.1 eV), permitting low-voltage operation at reduced leakage current, and the existence of SiO2 as a high-quality “native” insulator. In contrast, other mainstream semiconductors lack stable oxides and must rely on deposited insulators, presenting numerous compatibility challenges. We demonstrate that layered two-dimensional (2D) semiconductors HfSe2 and ZrSe2 have band gaps of 0.9 to 1.2 eV (bulk to monolayer) and technologically desirable “high-κ” native dielectrics HfO2 and ZrO2, respectively. We use spectroscopic and computational studies to elucidate their electronic band structure and then fabricate air-stable transistors down to three-layer thickness with careful processing and dielectric encapsulation. Electronic measurements reveal promising performance (on/off ratio > 106; on current, ~30 μA/μm), with native oxides reducing the effects of interfacial traps. These are the first 2D materials to demonstrate technologically relevant properties of silicon, in addition to unique compatibility with high-κ dielectrics, and scaling benefits from their atomically thin nature. PMID:28819644

  20. Progress in ion torrent semiconductor chip based sequencing.

    PubMed

    Merriman, Barry; Rothberg, Jonathan M

    2012-12-01

    In order for next-generation sequencing to become widely used as a diagnostic in the healthcare industry, sequencing instrumentation will need to be mass produced with a high degree of quality and economy. One way to achieve this is to recast DNA sequencing in a format that fully leverages the manufacturing base created for computer chips, complementary metal-oxide semiconductor chip fabrication, which is the current pinnacle of large scale, high quality, low-cost manufacturing of high technology. To achieve this, ideally the entire sensory apparatus of the sequencer would be embodied in a standard semiconductor chip, manufactured in the same fab facilities used for logic and memory chips. Recently, such a sequencing chip, and the associated sequencing platform, has been developed and commercialized by Ion Torrent, a division of Life Technologies, Inc. Here we provide an overview of this semiconductor chip based sequencing technology, and summarize the progress made since its commercial introduction. We described in detail the progress in chip scaling, sequencing throughput, read length, and accuracy. We also summarize the enhancements in the associated platform, including sample preparation, data processing, and engagement of the broader development community through open source and crowdsourcing initiatives. © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  1. Process Control in Production-Worthy Plasma Doping Technology

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Winder, Edmund J.; Fang Ziwei; Arevalo, Edwin

    2006-11-13

    As the semiconductor industry continues to scale devices of smaller dimensions and improved performance, many ion implantation processes require lower energy and higher doses. Achieving these high doses (in some cases {approx}1x1016 ions/cm2) at low energies (<3 keV) while maintaining throughput is increasingly challenging for traditional beamline implant tools because of space-charge effects that limit achievable beam density at low energies. Plasma doping is recognized as a technology which can overcome this problem. In this paper, we highlight the technology available to achieve process control for all implant parameters associated with modem semiconductor manufacturing.

  2. Radiation evaluation study of LSI RAM technologies

    NASA Astrophysics Data System (ADS)

    Dinger, G. L.; Knoll, M. G.

    1980-01-01

    Five commercial LSI static random access memory technologies having a 1 kilobit capacity were radiation characterized. Arrays from the transistor-transistor-logic (TTL), Schottky TTL, n-channel metal oxide semiconductor, complementary metal oxide semiconductor (CMOS), and CMOS/silicon on sapphire families were evaluated. Radiation failure thresholds for gamma doserate logic upset, total gamma dose survivability, and neutron fluence survivability were determined. A brief analysis of the radiation failure mechanism for each of the logic families tested is included.

  3. Nanodroplet impact onto solid platinum surface: Spreading and bouncing

    NASA Astrophysics Data System (ADS)

    Lussier, Daniel; Ventikos, Yiannis

    2009-11-01

    The impact of droplets onto solid surfaces is found in a huge variety of natural and technological applications, from rain drops splashing on the pavement, to material manufacturing by molten droplet deposition. Taking inspiration from existing microfluidic technologies (i.e. lab-on-chip), there is increasing interest in the use of nanodroplets (D < 100 nm) for a number of applications such as drug delivery and semiconductor device manufacturing. However, as the size of the droplet is reduced into the nanoscale, the direct use of previously obtained macroscopic results is not guaranteed. At the nanoscale, important effects due to the molecular nature of the fluid, thermal fluctuations and reduced dimensionality can play a critical role in determining system dynamics. In this paper we present the results of large-scale, fully atomistic, three-dimensional molecular dynamics (MD) simulation of an argon nanodroplet (D = 18 nm, 54 000 atoms) impact onto a solid platinum surface, using the LAMMPS software package. The fluid argon is modeled using the well-known Lennard-Jones (LJ) potential, while the embedded-atom model (EAM) potential is used for the solid platinum. By varying both the impact velocities (10-1000 m/s) and the wettability of the solid surface a wide range of impact behaviors is observed, from smooth spreading, to bouncing recoil, pointing towards a wide array of potential applications.

  4. Pick-and-place process for sensitivity improvement of the capacitive type CMOS MEMS 2-axis tilt sensor

    NASA Astrophysics Data System (ADS)

    Chang, Chun-I.; Tsai, Ming-Han; Liu, Yu-Chia; Sun, Chih-Ming; Fang, Weileun

    2013-09-01

    This study exploits the foundry available complimentary metal-oxide-semiconductor (CMOS) process and the packaging house available pick-and-place technology to implement a capacitive type micromachined 2-axis tilt sensor. The suspended micro mechanical structures such as the spring, stage and sensing electrodes are fabricated using the CMOS microelectromechanical systems (MEMS) processes. A bulk block is assembled onto the suspended stage by pick-and-place technology to increase the proof-mass of the tilt sensor. The low temperature UV-glue dispensing and curing processes are employed to bond the block onto the stage. Thus, the sensitivity of the CMOS MEMS capacitive type 2-axis tilt sensor is significantly improved. In application, this study successfully demonstrates the bonding of a bulk solder ball of 100 µm in diameter with a 2-axis tilt sensor fabricated using the standard TSMC 0.35 µm 2P4M CMOS process. Measurements show the sensitivities of the 2-axis tilt sensor are increased for 2.06-fold (x-axis) and 1.78-fold (y-axis) after adding the solder ball. Note that the sensitivity can be further improved by reducing the parasitic capacitance and the mismatch of sensing electrodes caused by the solder ball.

  5. Recent trends and future of pharmaceutical packaging technology

    PubMed Central

    Zadbuke, Nityanand; Shahi, Sadhana; Gulecha, Bhushan; Padalkar, Abhay; Thube, Mahesh

    2013-01-01

    The pharmaceutical packaging market is constantly advancing and has experienced annual growth of at least five percent per annum in the past few years. The market is now reckoned to be worth over $20 billion a year. As with most other packaged goods, pharmaceuticals need reliable and speedy packaging solutions that deliver a combination of product protection, quality, tamper evidence, patient comfort and security needs. Constant innovations in the pharmaceuticals themselves such as, blow fill seal (BFS) vials, anti-counterfeit measures, plasma impulse chemical vapor deposition (PICVD) coating technology, snap off ampoules, unit dose vials, two-in-one prefilled vial design, prefilled syringes and child-resistant packs have a direct impact on the packaging. The review details several of the recent pharmaceutical packaging trends that are impacting packaging industry, and offers some predictions for the future. PMID:23833515

  6. Ultra-thin silicon (UTSi) on insulator CMOS transceiver and time-division multiplexed switch chips for smart pixel integration

    NASA Astrophysics Data System (ADS)

    Zhang, Liping; Sawchuk, Alexander A.

    2001-12-01

    We describe the design, fabrication and functionality of two different 0.5 micron CMOS optoelectronic integrated circuit (OEIC) chips based on the Peregrine Semiconductor Ultra-Thin Silicon on insulator technology. The Peregrine UTSi silicon- on-sapphire (SOS) technology is a member of the silicon-on- insulator (SOI) family. The low-loss synthetic sapphire substrate is optically transparent and has good thermal conductivity and coefficient of thermal expansion properties, which meet the requirements for flip-chip bonding of VCSELs and other optoelectronic input-output components. One chip contains transceiver and network components, including four channel high-speed CMOS transceiver modules, pseudo-random bit stream (PRBS) generators, a voltage controlled oscillator (VCO) and other test circuits. The transceiver chips can operate in both self-testing mode and networking mode. An on- chip clock and true-single-phase-clock (TSPC) D-flip-flop have been designed to generate a PRBS at over 2.5 Gb/s for the high-speed transceiver arrays to operate in self-testing mode. In the networking mode, an even number of transceiver chips forms a ring network through free-space or fiber ribbon interconnections. The second chip contains four channel optical time-division multiplex (TDM) switches, optical transceiver arrays, an active pixel detector and additional test devices. The eventual applications of these chips will require monolithic OEICs with integrated optical input and output. After fabrication and testing, the CMOS transceiver array dies will be packaged with 850 nm vertical cavity surface emitting lasers (VCSELs), and metal-semiconductor- metal (MSM) or GaAs p-i-n detector die arrays to achieve high- speed optical interconnections. The hybrid technique could be either wire bonding or flip-chip bonding of the CMOS SOS smart-pixel arrays with arrays of VCSELs and photodetectors onto an optoelectronic chip carrier as a multi-chip module (MCM).

  7. Innovative on-chip packaging applied to uncooled IRFPA

    NASA Astrophysics Data System (ADS)

    Dumont, Geoffroy; Arnaud, Agnès; Impérinetti, Pierre; Vialle, Claire; Rabaud, Wilfried; Goudon, Valérie; Yon, Jean-Jacques

    2008-04-01

    The Laboratoire Infrarouge (LIR) of the Laboratoire d'Electronique et de Technologie de l'Information (LETI) has been involved in the development of microbolometers for over fifteen years. Two generations of technology have been transferred to ULIS and LETI is still working to improve performances of low cost detectors. Simultaneously, packaging still represents a significant part of detectors price. Reducing production costs would contribute to keep on extending applications of uncooled IRFPA to high volume markets like automotive. Therefore LETI is developing an on-chip packaging technology dedicated to microbolometers. This paper presents an original microcap structure that enables the use of IR window materials as sealing layers to maintain the expected vacuum level. The modelling and integration of an IR window suitable for this structure is also presented. This monolithic packaging technology is performed in a standard collective way, in continuation of bolometers' technology. The CEA-LETI, MINATEC presents status of these developments concerning this innovating technology including optical simulations results and SEM views of technical realizations.

  8. MEMS Applications in Aerodynamic Measurement Technology

    NASA Technical Reports Server (NTRS)

    Reshotko, E.; Mehregany, M.; Bang, C.

    1998-01-01

    Microelectromechanical systems (MEMS) embodies the integration of sensors, actuators, and electronics on a single substrate using integrated circuit fabrication techniques and compatible bulk and surface micromachining processes. Silicon and its derivatives form the material base for the MEMS technology. MEMS devices, including microsensors and microactuators, are attractive because they can be made small (characteristic dimension about 100 microns), be produced in large numbers with uniform performance, include electronics for high performance and sophisticated functionality, and be inexpensive. For aerodynamic measurements, it is preferred that sensors be small so as to approximate measurement at a point, and in fact, MEMS pressure sensors, wall shear-stress sensors, heat flux sensors and micromachined hot wires are nearing application. For the envisioned application to wind tunnel models, MEMS sensors can be placed on the surface or in very shallow grooves. MEMS devices have often been fabricated on stiff, flat silicon substrates, about 0.5 mm thick, and therefore were not easily mounted on curved surfaces. However, flexible substrates are now available and heat-flux sensor arrays have been wrapped around a curved turbine blade. Electrical leads can also be built into the flexible substrate. Thus MEMS instrumented wind tunnel models do not require deep spanwise grooves for tubes and leads that compromise the strength of conventionally instrumented models. With MEMS, even the electrical leads can potentially be eliminated if telemetry of the signals to an appropriate receiver can be implemented. While semiconductor silicon is well known for its electronic properties, it is also an excellent mechanical material for MEMS applications. However, silicon electronics are limited to operations below about 200 C, and silicon's mechanical properties start to diminish above 400 C. In recent years, silicon carbide (SiC) has emerged as the leading material candidate for applications in high temperature environments and can be used for high-temperature MEMS applications. With SiC, diodes and more complex electronics have been shown to operate to about 600 C, while the mechanical properties of SiC are maintained to much higher temperatures. Even when MEMS devices show benefits in the laboratory, there are many packaging challenges for any aeronautics application. Incorporating MEMS into these applications requires new approaches to packaging that goes beyond traditional integrated circuit (IC) packaging technologies. MEMS must interact mechanically, as well as electrically with their environment, making most traditional chip packaging and mounting techniques inadequate. Wind tunnels operate over wide temperature ranges in an environment that is far from being a 'clean-room.' In flight, aircraft are exposed to natural elements (e.g. rain, sun, ice, insects and dirt) and operational interferences(e.g. cleaning and deicing fluids, and maintenance crews). In propulsion systems applications, MEMS devices will have to operate in environments containing gases with very high temperatures, abrasive particles and combustion products. Hence deployment and packaging that maintains the integrity of the MEMS system is crucial. This paper presents an overview of MEMS fabrication and materials, descriptions of available sensors with more details on those being developed in our laboratories, and a discussion of sensor deployment options for wind tunnel and flight applications.

  9. Room-temperature semiconductor heterostructure refrigeration

    NASA Astrophysics Data System (ADS)

    Chao, K. A.; Larsson, Magnus; Mal'shukov, A. G.

    2005-07-01

    With the proper design of semiconductor tunneling barrier structures, we can inject low-energy electrons via resonant tunneling, and take out high-energy electrons via a thermionic process. This is the operation principle of our semiconductor heterostructure refrigerator (SHR) without the need of applying a temperature gradient across the device. Even for the bad thermoelectric material AlGaAs, our calculation shows that at room temperature, the SHR can easily lower the temperature by 5-7K. Such devices can be fabricated with the present semiconductor technology. Besides its use as a kitchen refrigerator, the SHR can efficiently cool microelectronic devices.

  10. Trends in Food Packaging.

    ERIC Educational Resources Information Center

    Ott, Dana B.

    1988-01-01

    This article discusses developments in food packaging, processing, and preservation techniques in terms of packaging materials, technologies, consumer benefits, and current and potential food product applications. Covers implications due to consumer life-style changes, cost-effectiveness of packaging materials, and the ecological impact of…

  11. SMALL DRINKING WATER SYSTEMS HANDBOOK A GUIDE TO "PACKAGED" FILTRATION AND DISINFECTION TECHNOLOGIES WITH REMOTE MONITORING AND CONTROL TOOLS

    EPA Science Inventory

    The intent of this handbook is to highlight information appropriate to small systems with an emphasis on filtration and disinfection technologies and how they can be "packaged" with remote monitoring and control technologies to provide a healthy and affordable solution for small ...

  12. Excitonic Materials for Hybrid Solar Cells and Energy Efficient Lighting

    NASA Astrophysics Data System (ADS)

    Kabra, Dinesh; Lu, Li Ping; Vaynzof, Yana; Song, Myounghoon; Snaith, Henry J.; Friend, Richard H.

    2011-07-01

    Conventional photovoltaic technology will certainly contribute this century, but to generate a significant fraction of our global power from solar energy, a radically new disruptive technology is required. Research primarily focused on developing the physics and technologies being low cost photovoltaic concepts are required. The materials with carbon-based solution processible organic semiconductors with power conversion efficiency as high as ˜8.2%, which have emerged over the last decade as promising alternatives to expensive silicon based technologies. We aim at exploring the morphological and optoelectronic properties of blends of newly synthesized polymer semiconductors as a route to enhance the performance of organic semiconductor based optoelectronic devices, like photovoltaic diodes (PV) and Light Emitting Diodes (LED). OLED efficiency has reached upto 150 lm/W and going to be next generation cheap and eco friendly solid state lighting solution. Hybrid electronics represent a valuable alternative for the production of easy processible, flexible and reliable optoelectronic thin film devices. I will be presenting recent advancement of my work in the area of hybrid photovoltaics, PLED and research path towards realization electrically injectable organic laser diodes.

  13. Design Brief--Packaging: More than Just a Box! Communications: Getting the Message across with Advertising. Technology Learning Activities.

    ERIC Educational Resources Information Center

    Technology Teacher, 1991

    1991-01-01

    Each technology learning activity in this article includes content description, objectives, required materials, challenge, and evaluation questions. Subjects are designing product packages and communication through advertising. (SK)

  14. High Frequency Electronic Packaging Technology

    NASA Technical Reports Server (NTRS)

    Herman, M.; Lowry, L.; Lee, K.; Kolawa, E.; Tulintseff, A.; Shalkhauser, K.; Whitaker, J.; Piket-May, M.

    1994-01-01

    Commercial and government communication, radar, and information systems face the challenge of cost and mass reduction via the application of advanced packaging technology. A majority of both government and industry support has been focused on low frequency digital electronics.

  15. Advanced Space Suit Portable Life Support Subsystem Packaging Design

    NASA Technical Reports Server (NTRS)

    Howe, Robert; Diep, Chuong; Barnett, Bob; Thomas, Gretchen; Rouen, Michael; Kobus, Jack

    2006-01-01

    This paper discusses the Portable Life Support Subsystem (PLSS) packaging design work done by the NASA and Hamilton Sundstrand in support of the 3 future space missions; Lunar, Mars and zero-g. The goal is to seek ways to reduce the weight of PLSS packaging, and at the same time, develop a packaging scheme that would make PLSS technology changes less costly than the current packaging methods. This study builds on the results of NASA s in-house 1998 study, which resulted in the "Flex PLSS" concept. For this study the present EMU schematic (low earth orbit) was used so that the work team could concentrate on the packaging. The Flex PLSS packaging is required to: protect, connect, and hold the PLSS and its components together internally and externally while providing access to PLSS components internally for maintenance and for technology change without extensive redesign impact. The goal of this study was two fold: 1. Bring the advanced space suit integrated Flex PLSS concept from its current state of development to a preliminary design level and build a proof of concept mockup of the proposed design, and; 2. "Design" a Design Process, which accommodates both the initial Flex PLSS design and the package modifications, required to accommodate new technology.

  16. Literacity: A multimedia adult literacy package combining NASA technology, recursive ID theory, and authentic instruction theory

    NASA Technical Reports Server (NTRS)

    Willis, Jerry; Willis, Dee Anna; Walsh, Clare; Stephens, Elizabeth; Murphy, Timothy; Price, Jerry; Stevens, William; Jackson, Kevin; Villareal, James A.; Way, Bob

    1994-01-01

    An important part of NASA's mission involves the secondary application of its technologies in the public and private sectors. One current application under development is LiteraCity, a simulation-based instructional package for adults who do not have functional reading skills. Using fuzzy logic routines and other technologies developed by NASA's Information Systems Directorate and hypermedia sound, graphics, and animation technologies the project attempts to overcome the limited impact of adult literacy assessment and instruction by involving the adult in an interactive simulation of real-life literacy activities. The project uses a recursive instructional development model and authentic instruction theory. This paper describes one component of a project to design, develop, and produce a series of computer-based, multimedia instructional packages. The packages are being developed for use in adult literacy programs, particularly in correctional education centers. They use the concepts of authentic instruction and authentic assessment to guide development. All the packages to be developed are instructional simulations. The first is a simulation of 'finding a friend a job.'

  17. Special Section on InterPACK 2017—Part 1

    DOE PAGES

    Mysore, Kaushik; Narumanchi, Sreekant; Dede, Ercan; ...

    2018-03-02

    InterPACK is a premier international forum for exchange of state-of-the-art knowledge in research, development, manufacturing, and applications of micro-electronics packaging. It is the flagship conference of the ASME Electronic and Photonic Packaging Division (EPPD) founded in 1992 as an ASME-JSME joint biannual conference. Rapid changes in the semiconductor landscape together with findings from InterPACK Pathfinding workshop (IPW) in 2016 led to a significant reset of InterPACK conference priorities and focus to comprehensively address needs of the InterPACK community. As a result, starting in 2017, InterPACK has become an annual conference and the scope of the conference has increased significantly togethermore » with a systems-focus to include some of the most cutting-edge topics in electronics packaging, device integration, and reliability. These topics are organized across five different tracks: (1) heterogeneous integration: microsystems with diverse functionality, (2) servers of the future, (3) structural and physical health monitoring, (4) energy conversion and storage, and (5) transportation: autonomous and electric vehicles.« less

  18. Low cost solar aray project: Experimental process system development unit for producing semiconductor-grade silicon using the silane-to-silicon process

    NASA Technical Reports Server (NTRS)

    1981-01-01

    This phase consists of the engineering design, fabrication, assembly, operation, economic analysis, and process support R&D for an Experimental Process System Development Unit (EPSDU). The mechanical bid package was issued and the bid responses are under evaluation. Similarly, the electrical bid package was issued, however, responses are not yet due. The majority of all equipment is on order or has been received at the EPSDU site. The pyrolysis/consolidation process design package was issued. Preparation of process and instrumentation diagram for the free-space reactor was started. In the area of melting/consolidation, Kayex successfully melted chunk silicon and have produced silicon shot. The free-space reactor powder was successfully transported pneumatically from a storage bin to the auger feeder twenty-five feet up and was melted. The fluid-bed PDU has successfully operated at silane feed concentrations up to 21%. The writing of the operating manual has started. Overall, the design phase is nearing completion.

  19. Special Section on InterPACK 2017—Part 1

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Mysore, Kaushik; Narumanchi, Sreekant; Dede, Ercan

    InterPACK is a premier international forum for exchange of state-of-the-art knowledge in research, development, manufacturing, and applications of micro-electronics packaging. It is the flagship conference of the ASME Electronic and Photonic Packaging Division (EPPD) founded in 1992 as an ASME-JSME joint biannual conference. Rapid changes in the semiconductor landscape together with findings from InterPACK Pathfinding workshop (IPW) in 2016 led to a significant reset of InterPACK conference priorities and focus to comprehensively address needs of the InterPACK community. As a result, starting in 2017, InterPACK has become an annual conference and the scope of the conference has increased significantly togethermore » with a systems-focus to include some of the most cutting-edge topics in electronics packaging, device integration, and reliability. These topics are organized across five different tracks: (1) heterogeneous integration: microsystems with diverse functionality, (2) servers of the future, (3) structural and physical health monitoring, (4) energy conversion and storage, and (5) transportation: autonomous and electric vehicles.« less

  20. Guest Editorial: Special Section on InterPACK 2017 - Part 2

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Narumanchi, Sreekant V; Mysore, Kaushik; Dede, Ercan

    InterPACK is a premier international forum for exchange of state-of-the-art knowledge in research, development, manufacturing, and applications of micro-electronics packaging. It is the flagship conference of the ASME Electronic and Photonic Packaging Division (EPPD) founded in 1992 as an ASME-JSME joint biannual conference. Rapid changes in the semiconductor landscape together with findings from InterPACK Pathfinding workshop (IPW) in 2016 led to a significant reset of InterPACK conference priorities and focus to comprehensively address needs of the InterPACK community. As a result, starting in 2017, InterPACK has become an annual conference and the scope of the conference has increased significantly togethermore » with a systems-focus to include some of the most cutting-edge topics in electronics packaging, device integration, and reliability. These topics are organized across five different tracks: (1) heterogeneous integration: microsystems with diverse functionality, (2) servers of the future, (3) structural and physical health monitoring, (4) energy conversion and storage, and (5) transportation: autonomous and electric vehicles.« less

  1. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Nurmikko, Arto V

    Synthesis of semiconductor nanomaterials by low-cost, solution-based methods is shown to lead to new classes of thin film light emitting materials. These materials have been integrated to demonstrative compact laser device testbeds to illustrate their potential for coherent emitters across the visible spectrum to disrupt established photonics technologies, particularly semiconductor lasers?

  2. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Moghadam, Reza M.; Xiao, Zhiyong; Ahmadi-Majlan, Kamyar

    The epitaxial growth of multifunctional oxides on semiconductors has opened a pathway to introduce new functionalities to semiconductor device technologies. In particular, ferroelectric materials integrated on semiconductors could lead to low-power field-effect devices that can be used for logic or memory. Essential to realizing such field-effect devices is the development of ferroelectric metal-oxide-semiconductor (MOS) capacitors, in which the polarization of a ferroelectric gate is coupled to the surface potential of a semiconducting channel. Here we demonstrate that ferroelectric MOS capacitors can be realized using single crystalline SrZrxTi1-xO3 (x= 0.7) that has been epitaxially grown on Ge. We find that themore » ferroelectric properties of SrZrxTi1-xO3 are exceptionally robust, as gate layers as thin as 5 nm give rise to hysteretic capacitance-voltage characteristics that are 2 V in width. The development of ferroelectric MOS capacitors with gate thicknesses that are technologically relevant opens a pathway to realize scalable ferroelectric field-effect devices.« less

  3. Growth of Wide Band Gap II-VI Compound Semiconductors by Physical Vapor Transport

    NASA Technical Reports Server (NTRS)

    Su, Ching-Hua; Sha, Yi-Gao

    1995-01-01

    The studies on the crystal growth and characterization of II-VI wide band gap compound semiconductors, such as ZnTe, CdS, ZnSe and ZnS, have been conducted over the past three decades. The research was not quite as extensive as that on Si, III-V, or even narrow band gap II-VI semiconductors because of the high melting temperatures as well as the specialized applications associated with these wide band gap semiconductors. In the past several years, major advances in the thin film technology such as Molecular Beam Epitaxy (MBE) and Metal Organic Chemical Vapor Deposition (MOCVD) have demonstrated the applications of these materials for the important devices such as light-emitting diode, laser and ultraviolet detectors and the tunability of energy band gap by employing ternary or even quaternary systems of these compounds. At the same time, the development in the crystal growth of bulk materials has not advanced far enough to provide low price, high quality substrates needed for the thin film growth technology.

  4. Packaging and Embedded Electronics for the Next Generation

    NASA Technical Reports Server (NTRS)

    Sampson, Michael J.

    2010-01-01

    This viewgraph presentation describes examples of electronic packaging that protects an electronic element from handling, contamination, shock, vibration and light penetration. The use of Hermetic and non-hermetic packaging is also discussed. The topics include: 1) What is Electronic Packaging? 2) Why Package Electronic Parts? 3) Evolution of Packaging; 4) General Packaging Discussion; 5) Advanced non-hermetic packages; 6) Discussion of Hermeticity; 7) The Class Y Concept and Possible Extensions; 8) Embedded Technologies; and 9) NEPP Activities.

  5. Flexible MEMS: A novel technology to fabricate flexible sensors and electronics

    NASA Astrophysics Data System (ADS)

    Tu, Hongen

    This dissertation presents the design and fabrication techniques used to fabricate flexible MEMS (Micro Electro Mechanical Systems) devices. MEMS devices and CMOS(Complementary Metal-Oxide-Semiconductor) circuits are traditionally fabricated on rigid substrates with inorganic semiconductor materials such as Silicon. However, it is highly desirable that functional elements like sensors, actuators or micro fluidic components to be fabricated on flexible substrates for a wide variety of applications. Due to the fact that flexible substrate is temperature sensitive, typically only low temperature materials, such as polymers, metals, and organic semiconductor materials, can be directly fabricated on flexible substrates. A novel technology based on XeF2(xenon difluoride) isotropic silicon etching and parylene conformal coating, which is able to monolithically incorporate high temperature materials and fluidic channels, was developed at Wayne State University. The technology was first implemented in the development of out-of-plane parylene microneedle arrays that can be individually addressed by integrated flexible micro-channels. These devices enable the delivery of chemicals with controlled temporal and spatial patterns and allow us to study neurotransmitter-based retinal prosthesis. The technology was further explored by adopting the conventional SOI-CMOS processes. High performance and high density CMOS circuits can be first fabricated on SOI wafers, and then be integrated into flexible substrates. Flexible p-channel MOSFETs (Metal-Oxide-Semiconductor Field-Effect-Transistors) were successfully integrated and tested. Integration of pressure sensors and flow sensors based on single crystal silicon has also been demonstrated. A novel smart yarn technology that enables the invisible integration of sensors and electronics into fabrics has been developed. The most significant advantage of this technology is its post-MEMS and post-CMOS compatibility. Various high-performance MEMS devices and electronics can be integrated into flexible substrates. The potential of our technology is enormous. Many wearable and implantable devices can be developed based on this technology.

  6. THz semiconductor-based front-end receiver technology for space applications

    NASA Technical Reports Server (NTRS)

    Mehdi, Imran; Siegel, Peter

    2004-01-01

    Advances in the design and fabrication of very low capacitance planar Schottky diodes and millimeter-wave power amplifiers, more accurate device and circuit models for commercial 3-D electromagnetic simulators, and the availability of both MEMS and high precision metal machining, have enabled RF engineers to extend traditional waveguide-based sensor and source technologies well into the TI-Iz frequency regime. This short paper will highlight recent progress in realizing THz space-qualified receiver front-ends based on room temperature semiconductor devices.

  7. Semiconductor ring lasers subject to both on-chip filtered optical feedback and external conventional optical feedback

    NASA Astrophysics Data System (ADS)

    Khoder, Mulham; Van der Sande, Guy; Danckaert, Jan; Verschaffelt, Guy

    2016-05-01

    It is well known that the performance of semiconductor lasers is very sensitive to external optical feedback. This feedback can lead to changes in lasing characteristics and a variety of dynamical effects including chaos and coherence collapse. One way to avoid this external feedback is by using optical isolation, but these isolators and their packaging will increase the cost of the total system. Semiconductor ring lasers nowadays are promising sources in photonic integrated circuits because they do not require cleaved facets or mirrors to form a laser cavity. Recently, some of us proposed to combine semiconductor ring lasers with on chip filtered optical feedback to achieve tunable lasers. The feedback is realized by employing two arrayed waveguide gratings to split/recombine light into different wavelength channels. Semiconductor optical amplifier gates are used to control the feedback strength. In this work, we investigate how such lasers with filtered feedback are influenced by an external conventional optical feedback. The experimental results show intensity fluctuations in the time traces in both the clockwise and counterclockwise directions due to the conventional feedback. We quantify the strength of the conventional feedback induced dynamics be extracting the standard deviation of the intensity fluctuations in the time traces. By using filtered feedback, we can shift the onset of the conventional feedback induced dynamics to larger values of the feedback rate [ Khoder et al, IEEE Photon. Technol. Lett. DOI: 10.1109/LPT.2016.2522184]. The on-chip filtered optical feedback thus makes the semiconductor ring laser less senstive to the effect of (long) conventional optical feedback. We think these conclusions can be extended to other types of lasers.

  8. Qualification of an evaluated butterfly-packaged DFB laser designed for space applications

    NASA Astrophysics Data System (ADS)

    Tornow, S.; Stier, C.; Buettner, T.; Laurent, T.; Kneier, M.; Bru, J.; Lien, Y.

    2017-11-01

    An extended qualification program has proven the quality of a previously evaluated semiconductor laser diode, which is intended to be used in a subsystem for the GAIA mission. We report on results of several reliability tests performed in subgroups. The requirements of the procurement specification with respect to reliability and desired manufacturing processes were confirmed. This is an example for successful collaboration between component supplier, system integrator and payload responsible party.

  9. Latest Progress in High Power VECSELs

    DTIC Science & Technology

    2013-01-01

    are more efficient, and can be tailored to an application. In this manuscript we lay out some advantages to VECSELs as compared to many in-plane...semiconductor lasers. We review common fabrication and packaging techniques in Section 2. In Section 3, we discuss both small- signal and large-signal... out LR coating MQW DBR VECSEL chip Heat Spreader output coupler HR flat mirror BF at Brewster’s angle HR flat mirror HR curved mirror signal beam out

  10. Electromagnetic Field Effects in Semiconductor Crystal Growth

    NASA Technical Reports Server (NTRS)

    Dulikravich, George S.

    1996-01-01

    This proposed two-year research project was to involve development of an analytical model, a numerical algorithm for its integration, and a software for the analysis of a solidification process under the influence of electric and magnetic fields in microgravity. Due to the complexity of the analytical model that was developed and its boundary conditions, only a preliminary version of the numerical algorithm was developed while the development of the software package was not completed.

  11. 32nd International Conference on the Physics of Semiconductors

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Chelikowsky, James

    The International Conference on the Physics of Semiconductors (ICPS) continues a series of biennial conferences that began in the 1950's. ICPS is the premier meeting for reporting all aspects of semiconductor physics including electronic, structural, optical, magnetic and transport properties with an emphasis on new materials and their applications. The meeting will reflect the state of art in the semiconductor physics field and will serve as a forum where scholars, researchers, and specialists can interact to discuss future research directions and technological advancements. The conference typically draws 1,000 international physicists, scientists, and students. This is one of the largest sciencemore » meetings on semiconductors and related materials to be held in the United States.« less

  12. MSM-Metal Semiconductor Metal Photo-detector Using Black Silicon Germanium (SiGe) for Extended Wavelength Near Infrared Detection

    DTIC Science & Technology

    2012-09-01

    MSM) photodectors fabricated using black silicon-germanium on silicon substrate (Si1–xGex//Si) for I-V, optical response, external quantum ...material for Si for many applications in low-power and high-speed semiconductor device technologies (4, 5). It is a promising material for quantum well ...MSM-Metal Semiconductor Metal Photo-detector Using Black Silicon Germanium (SiGe) for Extended Wavelength Near Infrared Detection by Fred

  13. The NASA Electronic Parts and Packaging (NEPP) Program: Insertion of New Electronics Technologies

    NASA Technical Reports Server (NTRS)

    LaBel, Kenneth A.; Sampson, Michael J.

    2007-01-01

    This viewgraph presentation gives an overview of NASA Electronic Parts and Packaging (NEPP) Program's new electronics technology trends. The topics include: 1) The Changing World of Radiation Testing of Memories; 2) Even Application-Specific Tests are Costly!; 3) Hypothetical New Technology Part Qualification Cost; 4) Where we are; 5) Approaching FPGAs as a More Than a "Part" for Reliability; 6) FPGAs Beget Novel Radiation Test Setups; 7) Understanding the Complex Radiation Data; 8) Tracking Packaging Complexity and Reliability for FPGAs; 9) Devices Supporting the FPGA Need to be Considered; 10) Summary of the New Electronic Technologies and Insertion into Flight Programs Workshop; and 11) Highlights of Panel Notes and Comments

  14. (abstract) Electronic Packaging for Microspacecraft Applications

    NASA Technical Reports Server (NTRS)

    Wasler, David

    1993-01-01

    The intent of this presentation is to give a brief look into the future of electronic packaging for microspacecraft applications. Advancements in electronic packaging technology areas have developed to the point where a system engineer's visions, concepts, and requirements for a microspacecraft can now be a reality. These new developments are ideal candidates for microspacecraft applications. These technologies are capable of bringing about major changes in how we design future spacecraft while taking advantage of the benefits due to size, weight, power, performance, reliability , and cost. This presentation will also cover some advantages and limitations of surface mount technology (SMT), multichip modules (MCM), and wafer scale integration (WSI), and what is needed to implement these technologies into microspacecraft.

  15. Integrating Asynchronous Digital Design Into the Computer Engineering Curriculum

    ERIC Educational Resources Information Center

    Smith, S. C.; Al-Assadi, W. K.; Di, J.

    2010-01-01

    As demand increases for circuits with higher performance, higher complexity, and decreased feature size, asynchronous (clockless) paradigms will become more widely used in the semiconductor industry, as evidenced by the International Technology Roadmap for Semiconductors' (ITRS) prediction of a likely shift from synchronous to asynchronous design…

  16. Adoption of Aquaculture Technology by Fish Farmers in Imo State of Nigeria

    ERIC Educational Resources Information Center

    Ike, Nwachukwu; Roseline, Onuegbu

    2007-01-01

    This paper evaluated the level of adoption of aquaculture technology extended to farmers in Imo State, Nigeria. To improve aquaculture practice in Nigeria, a technology package was developed and disseminated to farmers in the state. This package included ten practices that the farmers were supposed to adopt. Eighty-two respondents were randomly…

  17. The Integration of an API619 Screw Compressor Package into the Industrial Internet of Things

    NASA Astrophysics Data System (ADS)

    Milligan, W. J.; Poli, G.; Harrison, D. K.

    2017-08-01

    The Industrial Internet of Things (IIoT) is the industrial subset of the Internet of Things (IoT). IIoT incorporates big data technology, harnessing the instrumentation data, machine to machine communication and automation technologies that have existed in industrial settings for years. As industry in general trends towards the IIoT and as the screw compressor packages developed by Howden Compressors are designed with a minimum design life of 25 years, it is imperative this technology is embedded immediately. This paper provides the reader with a description on the Industrial Internet of Things before moving onto describing the scope of the problem for an organisation like Howden Compressors who deploy multiple compressor technologies across multiple locations and focuses on the critical measurements particular to high specification screw compressor packages. A brief analysis of how this differs from high volume package manufacturers deploying similar systems is offered. Then follows a description on how the measured information gets from the tip of the instrument in the process pipework or drive train through the different layers, with a description of each layer, into the final presentation layer. The functions available within the presentation layer are taken in turn and the benefits analysed with specific focus on efficiency and availability. The paper concludes with how packagers adopting the IIoT can not only optimise their package but by utilising the machine learning technology and pattern detection applications can adopt completely new business models.

  18. Technological substitution: the potential of plastic as primary packaging material in the US brewing industry

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Roeleveld, J.J.

    1985-01-01

    This dissertation develops a general model of technological substitution that could be of help to planners and decision makers in industry who are faced with the problems created by continual technological change. The model as presented differs from existing models in the theoretical literature because of its emphasis on analyzing current and potential technologies in an attempt to understand the underlying factors contributing to technological substitution. The general model and the cost model that is part of it belong to that step in the interactive planning cycle called the formulation of the mess. The methodology underlying the cost model ismore » a combination of life-cycle analysis (i.e., from raw materials in nature, through all intermediate products, to waste returned to the environment) and resoumetrics, which is an engineering approach to measuring all physical inputs required to produce a certain level of output. The models are illustrated with a specific field of interest: substitution of primary packaging technologies in the US brewing industry. The physical costs of packaging beer in different containers are compared. Strategic considerations for a brewery deciding to adopt plastic packaging technology are discussed. Attention is given to another potential fruitful application of the model in the field of technology transfer to developing countries.« less

  19. Technology Development of Miniaturized Far-Infrared Sources for Biomolecular Spectroscopy

    NASA Technical Reports Server (NTRS)

    Kono, Junichiro

    2003-01-01

    The objective of this project was to develop a purely solid-state based, thus miniaturized, far-infrared (FIR) (also known as terahertz (THz)) wave source using III-V semiconductor nanostructures for biomolecular detection and sensing. Many biomolecules, such as DNA and proteins, have distinct spectroscopic features in the FIR wavelength range as a result of vibration-rotation-tunneling motions and various inter- and intra-molecule collective motions. Spectroscopic characterization of such molecules requires narrow linewidth, sufficiently high power, tunable (in wavelength), and coherent FIR sources. Unfortunately, the FIR frequency is one of the least technologically developed ranges in the electromagnetic spectrum. Currently available FIR sources based on non-solid state technology are bulky, inefficient, and very often incoherent. In this project we investigated antimonide based compound semiconductor (ABCS) nanostructures as the active medium to generate FIR radiation. The final goal of this project was to demonstrate a semiconductor THz source integrated with a pumping diode laser module to achieve a compact system for biomolecular applications.

  20. The FinFET Breakthrough and Networks of Innovation in the Semiconductor Industry, 1980-2005: Applying Digital Tools to the History of Technology.

    PubMed

    O'Reagan, Douglas; Fleming, Lee

    2018-01-01

    The "FinFET" design for transistors, developed at the University of California, Berkeley, in the 1990s, represented a major leap forward in the semiconductor industry. Understanding its origins and importance requires deep knowledge of local factors, such as the relationships among the lab's principal investigators, students, staff, and the institution. It also requires understanding this lab within the broader network of relationships that comprise the semiconductor industry-a much more difficult task using traditional historical methods, due to the paucity of sources on industrial research. This article is simultaneously 1) a history of an impactful technology and its social context, 2) an experiment in using data tools and visualizations as a complement to archival and oral history sources, to clarify and explore these "big picture" dimensions, and 3) an introduction to specific data visualization tools that we hope will be useful to historians of technology more generally.

  1. A review of the semiconductor storage of television signals. Part 2: Applications 1975-1986

    NASA Astrophysics Data System (ADS)

    Riley, J. L.

    1987-08-01

    This is the second of two reports. In the first, the emerging semiconductor memory technology over the last two decades and some of the important operational characteristics of each ensuing generation of device are described together with the design philosophy for forming the devices into useful tools for the storage of television signals. The second of these reports describes some of the applications. These include improved television synchronizers, high quality PAL decoders, television noise reducers, film dirt concealment equipment and buffer storage for television picture processing equipment such as stills stores. The continuing developments in the technology promise still further increases of memory capacity and there is a proposal to build a mass semiconductor television picture sequence store, initially as a research tool.

  2. Advanced Electrical Materials and Components Being Developed

    NASA Technical Reports Server (NTRS)

    Schwarze, Gene E.

    2004-01-01

    All aerospace systems require power management and distribution (PMAD) between the energy and power source and the loads. The PMAD subsystem can be broadly described as the conditioning and control of unregulated power from the energy source and its transmission to a power bus for distribution to the intended loads. All power and control circuits for PMAD require electrical components for switching, energy storage, voltage-to-current transformation, filtering, regulation, protection, and isolation. Advanced electrical materials and component development technology is a key technology to increasing the power density, efficiency, reliability, and operating temperature of the PMAD. The primary means to develop advanced electrical components is to develop new and/or significantly improved electronic materials for capacitors, magnetic components, and semiconductor switches and diodes. The next important step is to develop the processing techniques to fabricate electrical and electronic components that exceed the specifications of presently available state-of-the-art components. The NASA Glenn Research Center's advanced electrical materials and component development technology task is focused on the following three areas: 1) New and/or improved dielectric materials for the development of power capacitors with increased capacitance volumetric efficiency, energy density, and operating temperature; 2) New and/or improved high-frequency, high-temperature soft magnetic materials for the development of transformers and inductors with increased power density, energy density, electrical efficiency, and operating temperature; 3) Packaged high-temperature, high-power density, high-voltage, and low-loss SiC diodes and switches.

  3. How architecture wins technology wars.

    PubMed

    Morris, C R; Ferguson, C H

    1993-01-01

    Signs of revolutionary transformation in the global computer industry are everywhere. A roll call of the major industry players reads like a waiting list in the emergency room. The usual explanations for the industry's turmoil are at best inadequate. Scale, friendly government policies, manufacturing capabilities, a strong position in desktop markets, excellent software, top design skills--none of these is sufficient, either by itself or in combination, to ensure competitive success in information technology. A new paradigm is required to explain patterns of success and failure. Simply stated, success flows to the company that manages to establish proprietary architectural control over a broad, fast-moving, competitive space. Architectural strategies have become crucial to information technology because of the astonishing rate of improvement in microprocessors and other semiconductor components. Since no single vendor can keep pace with the outpouring of cheap, powerful, mass-produced components, customers insist on stitching together their own local systems solutions. Architectures impose order on the system and make the interconnections possible. The architectural controller is the company that controls the standard by which the entire information package is assembled. Microsoft's Windows is an excellent example of this. Because of the popularity of Windows, companies like Lotus must conform their software to its parameters in order to compete for market share. In the 1990s, proprietary architectural control is not only possible but indispensable to competitive success. What's more, it has broader implications for organizational structure: architectural competition is giving rise to a new form of business organization.

  4. Precision depth measurement of through silicon vias (TSVs) on 3D semiconductor packaging process.

    PubMed

    Jin, Jonghan; Kim, Jae Wan; Kang, Chu-Shik; Kim, Jong-Ahn; Lee, Sunghun

    2012-02-27

    We have proposed and demonstrated a novel method to measure depths of through silicon vias (TSVs) at high speed. TSVs are fine and deep holes fabricated in silicon wafers for 3D semiconductors; they are used for electrical connections between vertically stacked wafers. Because the high-aspect ratio hole of the TSV makes it difficult for light to reach the bottom surface, conventional optical methods using visible lights cannot determine the depth value. By adopting an optical comb of a femtosecond pulse laser in the infra-red range as a light source, the depths of TSVs having aspect ratio of about 7 were measured. This measurement was done at high speed based on spectral resolved interferometry. The proposed method is expected to be an alternative method for depth inspection of TSVs.

  5. Semiconductor laser technology for remote sensing experiments

    NASA Technical Reports Server (NTRS)

    Katz, Joseph

    1988-01-01

    Semiconductor injection lasers are required for implementing virtually all spaceborne remote sensing systems. Their main advantages are high reliability and efficiency, and their main roles are envisioned in pumping and injection locking of solid state lasers. In some shorter range applications they may even be utilized directly as the sources.

  6. Production of 35S for a Liquid Semiconductor Betavoltaic

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Meier, David E.; Garnov, A. Y.; Robertson, J. D.

    2009-10-01

    The specific energy density from radioactive decay is five to six orders of magnitude greater than the specific energy density in conventional chemical battery and fuel cell technologies. We are currently investigating the use of liquid semiconductor based betavoltaics as a way to directly convert the energy of radioactive decay into electrical power and potentially avoid the radiation damage that occurs in solid state semiconductor devices due to non-ionizing energy loss. Sulfur-35 was selected as the isotope for the liquid semiconductor demonstrations because it can be produced in high specific activity and it is chemically compatible with known liquid semiconductormore » media.« less

  7. Direct conversion semiconductor detectors in positron emission tomography

    NASA Astrophysics Data System (ADS)

    Cates, Joshua W.; Gu, Yi; Levin, Craig S.

    2015-05-01

    Semiconductor detectors are playing an increasing role in ongoing research to improve image resolution, contrast, and quantitative accuracy in preclinical applications of positron emission tomography (PET). These detectors serve as a medium for direct detection of annihilation photons. Early clinical translation of this technology has shown improvements in image quality and tumor delineation for head and neck cancers, relative to conventional scintillator-based systems. After a brief outline of the basics of PET imaging and the physical detection mechanisms for semiconductor detectors, an overview of ongoing detector development work is presented. The capabilities of semiconductor-based PET systems and the current state of these devices are discussed.

  8. Editorial

    NASA Astrophysics Data System (ADS)

    Bruzzi, Mara; Cartiglia, Nicolo; Pace, Emanuele; Talamonti, Cinzia

    2015-10-01

    The 10th edition of the International Conference on Radiation Effects on Semiconductor Materials, Detectors and Devices (RESMDD) was held in Florence, at Dipartimento di Fisica ed Astronomia on October 8-10, 2014. It has been aimed at discussing frontier research activities in several application fields as nuclear and particle physics, astrophysics, medical and solid-state physics. Main topics discussed in this conference concern performance of heavily irradiated silicon detectors, developments required for the luminosity upgrade of the Large Hadron Collider (HL-LHC), ultra-fast silicon detectors design and manufacturing, high-band gap semiconductor detectors, novel semiconductor-based devices for medical applications, radiation damage issues in semiconductors and related radiation-hardening technologies.

  9. High-pressure processing and antimicrobial biodegradable packaging to control Listeria monocytogenes during storage of cooked ham.

    PubMed

    Marcos, Begonya; Aymerich, Teresa; Monfort, Josep M; Garriga, Margarita

    2008-02-01

    The efficiency of combining high-pressure processing (HPP) and active packaging technologies to control Listeria monocytogenes growth during the shelf life of artificially inoculated cooked ham was assessed. Three lots of cooked ham were prepared: control, packaging with alginate films, and packaging with antimicrobial alginate films containing enterocins. After packaging, half of the samples were pressurized. Sliced cooked ham stored at 6 degrees C experienced a quick growth of L. monocytogenes. Both antimicrobial packaging and pressurization delayed the growth of the pathogen. However, at 6 degrees C the combination of antimicrobial packaging and HPP was necessary to achieve a reduction of inoculated levels without recovery during 60 days of storage. Further storage at 6 degrees C of pressurized antimicrobial packed cooked ham resulted in L. monocytogenes levels below the detection limit (day 90). On the other hand, storage at 1 degrees C controlled the growth of the pathogen until day 39 in non-pressurized ham, while antimicrobial packaging and storage at 1 degrees C exerted a bacteriostatic effect for 60 days. All HPP lots stored at 1 degrees C led to counts <100CFU/g at day 60. Similar results were observed when combining both technologies. After a cold chain break no growth of L. monocytogenes was observed in pressurized ham packed with antimicrobial films, showing the efficiency of combining both technologies.

  10. Semiconductor lasers for versatile applications from global communications to on-chip interconnects

    NASA Astrophysics Data System (ADS)

    Arai, Shigehisa

    2015-01-01

    Since semiconductor lasers were realized in 1962, various efforts have been made to enrich human life thorough novel equipments and services. Among them optical fiber communications in global communications have brought out marvelous information technology age represented by the internet. In this paper, emerging topics made on GaInAsP/InP based long-wavelength lasers toward ultra-low power consumption semiconductor lasers for optical interconnects in supercomputers as well as in future LSIs are presented.

  11. From Vacuum Tubes to a Semiconductor Triode

    NASA Astrophysics Data System (ADS)

    Mil'shtein, S.

    2005-06-01

    Current study presents a brief review of an electronic technology evolution: from vacuum tubes, to transistors, to a novel, recently developed semiconductor triode, where electrons travel vertically about 600 angstroms from the filament to the anode. We plotted I-V and transfer curves for the semiconductor triodes. The very first prototypes proved to carry a maximum gain of about 15db and fT=8GHz. Filaments of variable length were produced to study mutual electrostatic interaction of the electrodes in the triode.

  12. Introducing Current Technologies

    NASA Technical Reports Server (NTRS)

    Mitchell, Tiffany

    1995-01-01

    The objective of the study was a continuation of the 'technology push' activities that the Technology Transfer Team conducts at this time. It was my responsibility to research current technologies at Langley Research Center and find a commercial market for these technologies in the private industry. After locating a market for the technologies, a mailing package was put together which informed the companies of the benefits of NASA Langley's technologies. The mailing package included articles written about the technology, patent material, abstracts from technical papers, and one-pagers which were used at the Technology Opportunities Showcase (TOPS) exhibitions. The companies were encouraged to consult key team members for further information on the technologies.

  13. Vertical-cavity surface-emitting laser sources for gigahertz-bandwidth, multiwavelength frequency-domain photon migration

    NASA Astrophysics Data System (ADS)

    O'Sullivan, Thomas D.; No, Keunsik; Matlock, Alex; Warren, Robert V.; Hill, Brian; Cerussi, Albert E.; Tromberg, Bruce J.

    2017-10-01

    Frequency-domain photon migration (FDPM) uses modulated laser light to measure the bulk optical properties of turbid media and is increasingly applied for noninvasive functional medical imaging in the near-infrared. Although semiconductor edge-emitting laser diodes have been traditionally used as miniature light sources for this application, we show that vertical-cavity surface-emitting lasers (VCSELs) exhibit output power and modulation performance characteristics suitable for FDPM measurements of tissue optical properties at modulation frequencies exceeding 1 GHz. We also show that an array of multiple VCSEL devices can be coherently modulated at frequencies suitable for FDPM and can improve optical power. In addition, their small size and simple packaging make them an attractive choice as components in wearable sensors and clinical FDPM-based optical spectroscopy systems. We demonstrate the benefits of VCSEL technology by fabricating and testing a unique, compact VCSEL-based optical probe with an integrated avalanche photodiode. We demonstrate sensitivity of the VCSEL-based probe to subcutaneous tissue hemodynamics that was induced during an arterial cuff occlusion of the upper arm in a human subject.

  14. Optically pumped quantum-dot Cd(Zn)Se/ZnSe laser and microchip converter for yellow-green spectral region

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Lutsenko, E V; Voinilovich, A G; Rzheutskii, N V

    2013-05-31

    The room temperature laser generation in the yellow-green ({lambda} = 558.5-566.7 nm) spectral range has been demonstrated under optical pumping by a pulsed nitrogen laser of Cd(Zn)Se/ZnSe quantum dot heterostructures. The maximum achieved laser wavelength was as high as {lambda} = 566.7 nm at a laser cavity length of 945 {mu}m. High values of both the output pulsed power (up to 50 W) and the external differential quantum efficiency ({approx}60%) were obtained at a cavity length of 435 {mu}m. Both a high quality of the laser heterostructure and a low lasing threshold ({approx}2 kW cm{sup -2}) make it possible tomore » use a pulsed InGaN laser diode as a pump source. A laser microchip converter based on this heterostructure has demonstrated a maximum output pulse power of {approx}90 mW at {lambda} = 560 nm. The microchip converter was placed in a standard TO-18 (5.6 mm in diameter) laser diode package. (semiconductor lasers. physics and technology)« less

  15. Fecundity of Tribolium castaneum and Tribolium confusum adults after exposure to deltamethrin packaging

    USDA-ARS?s Scientific Manuscript database

    The red flour beetle, Tribolium castaneum (Herbst), and the confused flour beetle, Tribolium confusum Jacquelin du Val, are packaging invaders and will exploit any rip, tear, or defect in packaged food and infest the contents. Impregnating packaging materials with insecticides is a novel technologic...

  16. Semiconductor Nanotechnology: Novel Materials and Devices for Electronics, Photonics, and Renewable Energy Applications

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Goodnick, Stephen; Korkin, Anatoli; Krstic, Predrag S

    2010-03-01

    Electronic and photonic information technology and renewable energy alternatives, such as solar energy, fuel cells and batteries, have now reached an advanced stage in their development. Cost-effective improvements to current technological approaches have made great progress, but certain challenges remain. As feature sizes of the latest generations of electronic devices are approaching atomic dimensions, circuit speeds are now being limited by interconnect bottlenecks. This has prompted innovations such as the introduction of new materials into microelectronics manufacturing at an unprecedented rate and alternative technologies to silicon CMOS architectures. Despite the environmental impact of conventional fossil fuel consumption, the low costmore » of these energy sources has been a long-standing economic barrier to the development of alternative and more efficient renewable energy sources, fuel cells and batteries. In the face of mounting environmental concerns, interest in such alternative energy sources has grown. It is now widely accepted that nanotechnology offers potential solutions for securing future progress in information and energy technologies. The Canadian Semiconductor Technology Conference (CSTC) forum was established 25 years ago in Ottawa as an important symbol of the intrinsic strength of the Canadian semiconductor research and development community, and the Canadian semiconductor industry as a whole. In 2007, the 13th CSTC was held in Montreal, moving for the first time outside the national capital region. The first three meetings in the series of Nano and Giga Challenges in Electronics and Photonics NGCM2002 in Moscow, NGCM2004 in Krakow, and NGC2007 in Phoenix were focused on interdisciplinary research from the fundamentals of materials science to the development of new system architectures. In 2009 NGC2009 and the 14th Canadian Semiconductor Technology Conference (CSTC2009) were held as a joint event, hosted by McMaster University (10 14 August, Hamilton, Ontario, Canada) and the scope was expanded to include renewable energy research and development. This special issue of Nanotechnology is devoted to a better understanding of the function and design of semiconductor devices that are relevant to information technology (both electronics and photonics based) and renewable energy applications. The papers contained in this special issue are selected from the NGC/CSTC2009 symposium. Among them is a report by Ray LaPierre from McMaster University and colleagues at the University of Waterloo in Canada on the ability to manipulate single spins in nanowire quantum bits. The paper also reports the development of a testbed of a few qubits for general quantum information processing tasks [1]. Lower cost and greater energy conversion efficiency compared with thin film devices have led to a high level of activity in nanowire research related to photovoltaic applications. This special issue also contains results from an impedance spectroscopy study of core shell GaAs nanowires to throw light on the transport and recombination mechanisms relevant to solar cell research [2]. Information technology research and renewable energy sources are research areas of enormous public interest. This special issue addresses both theoretical and experimental achievements and provides a stimulating outlook for technological developments in these highly topical fields of research. References [1] Caram J, Sandoval C, Tirado M, Comedi D, Czaban J, Thompson D A and LaPierre R R 2010 Electrical characteristics of core shell p-n GaAs nanowire structures with Te as the n-dopant Nanotechnology 21 134007 [2] Baugh J, Fung J S and LaPierre R R 2010 Building a spin quantum bit register using semiconductor nanowires Nanotechnology 21 134018« less

  17. EDITORIAL: Semiconductor nanotechnology: novel materials and devices for electronics, photonics and renewable energy applications Semiconductor nanotechnology: novel materials and devices for electronics, photonics and renewable energy applications

    NASA Astrophysics Data System (ADS)

    Goodnick, Stephen; Korkin, Anatoli; Krstic, Predrag; Mascher, Peter; Preston, John; Zaslavsky, Alex

    2010-04-01

    Electronic and photonic information technology and renewable energy alternatives, such as solar energy, fuel cells and batteries, have now reached an advanced stage in their development. Cost-effective improvements to current technological approaches have made great progress, but certain challenges remain. As feature sizes of the latest generations of electronic devices are approaching atomic dimensions, circuit speeds are now being limited by interconnect bottlenecks. This has prompted innovations such as the introduction of new materials into microelectronics manufacturing at an unprecedented rate and alternative technologies to silicon CMOS architectures. Despite the environmental impact of conventional fossil fuel consumption, the low cost of these energy sources has been a long-standing economic barrier to the development of alternative and more efficient renewable energy sources, fuel cells and batteries. In the face of mounting environmental concerns, interest in such alternative energy sources has grown. It is now widely accepted that nanotechnology offers potential solutions for securing future progress in information and energy technologies. The Canadian Semiconductor Technology Conference (CSTC) forum was established 25 years ago in Ottawa as an important symbol of the intrinsic strength of the Canadian semiconductor research and development community, and the Canadian semiconductor industry as a whole. In 2007, the 13th CSTC was held in Montreal, moving for the first time outside the national capital region. The first three meetings in the series of 'Nano and Giga Challenges in Electronics and Photonics'— NGCM2002 in Moscow, NGCM2004 in Krakow, and NGC2007 in Phoenix— were focused on interdisciplinary research from the fundamentals of materials science to the development of new system architectures. In 2009 NGC2009 and the 14th Canadian Semiconductor Technology Conference (CSTC2009) were held as a joint event, hosted by McMaster University (10-14 August, Hamilton, Ontario, Canada) and the scope was expanded to include renewable energy research and development. This special issue of Nanotechnology is devoted to a better understanding of the function and design of semiconductor devices that are relevant to information technology (both electronics and photonics based) and renewable energy applications. The papers contained in this special issue are selected from the NGC/CSTC2009 symposium. Among them is a report by Ray LaPierre from McMaster University and colleagues at the University of Waterloo in Canada on the ability to manipulate single spins in nanowire quantum bits. The paper also reports the development of a testbed of a few qubits for general quantum information processing tasks [1]. Lower cost and greater energy conversion efficiency compared with thin film devices have led to a high level of activity in nanowire research related to photovoltaic applications. This special issue also contains results from an impedance spectroscopy study of core-shell GaAs nanowires to throw light on the transport and recombination mechanisms relevant to solar cell research [2]. Information technology research and renewable energy sources are research areas of enormous public interest. This special issue addresses both theoretical and experimental achievements and provides a stimulating outlook for technological developments in these highly topical fields of research. References [1] Caram J, Sandoval C, Tirado M, Comedi D, Czaban J, Thompson D A and LaPierre R R 2101 Nanotechnology 21 134007 [2] Baugh J, Fung J S and LaPierre RR 2010 Nanotechnology 21 134018

  18. Japan's electronic packaging technologies

    NASA Technical Reports Server (NTRS)

    Tummala, Rao R.; Pecht, Michael

    1995-01-01

    The JTEC panel found Japan to have significant leadership over the United States in the strategic area of electronic packaging. Many technologies and products once considered the 'heart and soul' of U.S. industry have been lost over the past decades to Japan and other Asian countries. The loss of consumer electronics technologies and products is the most notable of these losses, because electronics is the United States' largest employment sector and is critical for growth businesses in consumer products, computers, automobiles, aerospace, and telecommunications. In the past there was a distinction between consumer and industrial product technologies. While Japan concentrated on the consumer market, the United States dominated the industrial sector. No such distinction is anticipated in the future; the consumer-oriented technologies Japan has dominated are expected to characterize both domains. The future of U.S. competitiveness will, therefore, depend on the ability of the United States to rebuild its technological capabilities in the area of portable electronic packaging.

  19. Silicon material technology status. [assessment for electronic and photovoltaic applications

    NASA Technical Reports Server (NTRS)

    Lutwack, R.

    1983-01-01

    Silicon has been the basic element for the electronic and photovoltaic industries. The use of silicon as the primary element for terrestrial photovoltaic solar arrays is projected to continue. The reasons for this projection are related to the maturity of silicon technology, the ready availability of extremely pure silicon, the performance of silicon solar cells, and the considerable present investment in technology and manufacturing facilities. The technologies for producing semiconductor grade silicon and, to a lesser extent, refined metallurgical grade silicon are considered. It is pointed out that nearly all of the semiconductor grade silicon is produced by processes based on the Siemens deposition reactor, a technology developed 26 years ago. The state-of-the-art for producing silicon by this process is discussed. It is expected that efforts to reduce polysilicon process costs will continue.

  20. Next-generation avionics packaging and cooling 'test results from a prototype system'

    NASA Astrophysics Data System (ADS)

    Seals, J. D.

    The author reports on the design, material characteristics, and test results obtained under the US Air Force's advanced aircraft avionics packaging technologies (AAAPT) program, whose charter is to investigate new designs and technologies for reliable packaging, interconnection, and thermal management. Under this program, AT&T Bell Laboratories has completed the preliminary testing of and is evaluating a number of promising materials and technologies, including conformal encapsulation, liquid flow-through cooling, and a cyanate ester backplane. A fifty-two module system incorporating these and and other technologies has undergone preliminary cooling efficiency, shock, sine and random vibration, and maintenance testing. One of the primary objectives was to evaluate the interaction compatibility of new materials and designs with other components in the system.

  1. Electron beam accelerators—trends in radiation processing technology for industrial and environmental applications in Latin America and the Caribbean

    NASA Astrophysics Data System (ADS)

    Parejo Calvo, Wilson A.; Duarte, Celina L.; Machado, Luci Diva B.; Manzoli, Jose E.; Geraldo, Aurea Beatriz C.; Kodama, Yasko; Silva, Leonardo Gondim A.; Pino, Eddy S.; Somessari, Elizabeth S. R.; Silveira, Carlos G.; Rela, Paulo R.

    2012-08-01

    The radiation processing technology for industrial and environmental applications has been developed and used worldwide. In Latin America and the Caribbean and particularly in Brazil there are 24 and 16 industrial electron beam accelerators (EBA) respectively with energy from 200 keV to 10 MeV, operating in private companies and governmental institutions to enhance the physical and chemical properties of materials. However, there are more than 1500 high-current electron beam accelerators in commercial use throughout the world. The major needs and end-use markets for these electron beam (EB) units are R and D, wire and electric cables, heat shrinkable tubes and films, PE foams, tires, components, semiconductors and multilayer packaging films. Nowadays, the emerging opportunities in Latin America and the Caribbean are paints, adhesives and coatings cure in order to eliminate VOCs and for less energy use than thermal process; disinfestations of seeds; and films and multilayer packaging irradiation. For low-energy EBA (from 150 keV to 300 keV). For mid-energy EBA (from 300 keV to 5 MeV), they are flue gas treatment (SO2 and NOX removal); composite and nanocomposite materials; biodegradable composites based on biorenewable resources; human tissue sterilization; carbon and silicon carbide fibers irradiation; irradiated grafting ion-exchange membranes for fuel cells application; electrocatalysts nanoparticles production; and natural polymers irradiation and biodegradable blends production. For high-energy EBA (from 5 MeV to 10 MeV), they are sterilization of medical, pharmaceutical and biological products; gemstone enhancement; treatment of industrial and domestic effluents and sludge; preservation and disinfestations of foods and agricultural products; soil disinfestations; lignocellulosic material irradiation as a pretreatment to produce ethanol biofuel; decontamination of pesticide packing; solid residues remediation; organic compounds removal from wastewater; and treatment of effluent from petroleum production units and liquid irradiation process to treat vessel water ballast. On the other hand, there is a growing need of mobile EB facilities for different applications in South America.

  2. SONOS technology for commercial and military nonvolatile memory applications

    NASA Astrophysics Data System (ADS)

    Adams, D.; Farrell, P.; Jacunski, M.; Williams, D.; Jakubczak, J.; Knoll, M.; Murray, J.

    Silicon Oxide Nitride Oxide Semiconductor (SONOS) technology is well suited for military and commercial nonvolatile memory applications. Excellent long term memory retention, radiation hardness, and endurance has been demonstrated with this technology. This paper summarizes our data in these areas for SONOS technology.

  3. Exploring new packaging and delivery options for the immunization supply chain.

    PubMed

    Zehrung, Darin; Jarrahian, Courtney; Giersing, Birgitte; Kristensen, Debra

    2017-04-19

    A variety of vaccine packaging and delivery technologies may benefit the immunization supply chain. These include alternative primary packaging, such as blow-fill-seal polymer containers, and novel delivery technologies, such intradermal delivery devices, microarray patches, and sublingual formulations of vaccines, and others in development. The potential timeline to availability of these technologies varies and depends on their stage of development and the type of data necessary to achieve licensure. Some new delivery devices are anticipated to be introduced in 2017, such as intradermal devices for delivery of inactivated poliovirus vaccine to stretch vaccine supplies due to a supply limitation. Other new technologies requiring vaccine reformulation, such as microarray patches and sublingual vaccines, may become available in the long term (2021 and beyond). Development of many new technologies requires partnership between vaccine and technology manufacturers and identification of the applicable regulatory pathway. Interaction with public-sector stakeholders early on (through engagement with forums such as the World Health Organization's Immunization Practices Advisory Committee Delivery Technologies Working Group) is important to ensure suitability for immunization program use. Key considerations for programmatic suitability of a new vaccine, packaging, and delivery device include cold chain volume, costs, and health impact. Copyright © 2017 The Authors. Published by Elsevier Ltd.. All rights reserved.

  4. Testing methods and techniques: Testing electrical and electronic devices: A compilation

    NASA Technical Reports Server (NTRS)

    1972-01-01

    The methods, techniques, and devices used in testing various electrical and electronic apparatus are presented. The items described range from semiconductor package leak detectors to automatic circuit analyzer and antenna simulators for system checkout. In many cases the approaches can result in considerable cost savings and improved quality control. The testing of various electronic components, assemblies, and systems; the testing of various electrical devices; and the testing of cables and connectors are explained.

  5. Extremely Low Frequency-Magnetic Field (ELF-MF) Exposure Characteristics among Semiconductor Workers

    PubMed Central

    Choi, Sangjun; Cha, Wonseok; Kim, Won; Yoon, Chungsik; Park, Ju-Hyun; Ha, Kwonchul; Park, Donguk

    2018-01-01

    We assessed the exposure of semiconductor workers to extremely low frequency-magnetic fields (ELF-MF) and identified job characteristics affecting ELF-MF exposure. These were demonstrated by assessing the exposure of 117 workers involved in wafer fabrication (fab) and chip packaging wearing personal dosimeters for a full shift. A portable device was used to monitor ELF-MF in high temporal resolution. All measurements were categorized by operation, job and working activity during working time. ELF-MF exposure of workers were classified based on the quartiles of ELF-MF distribution. The average levels of ELF-MF exposure were 0.56 µT for fab workers, 0.59 µT for chip packaging workers and 0.89 µT for electrical engineers, respectively. Exposure to ELF-MF differed among types of factory, operation, job and activity. Workers engaged in the diffusion and chip testing activities showed the highest ELF-MF exposure. The ELF-MF exposures of process operators were found to be higher than those of maintenance engineers, although peak exposure and/or patterns varied. The groups with the highest quartile ELF-MF exposure level are operators in diffusion, ion implantation, module and testing operations, and maintenance engineers in diffusion, module and testing operations. In conclusion, ELF-MF exposure among workers can be substantially affected by the type of operation and job, and the activity or location. PMID:29614730

  6. Computer Technology: State of the Art.

    ERIC Educational Resources Information Center

    Withington, Frederic G.

    1981-01-01

    Describes the nature of modern general-purpose computer systems, including hardware, semiconductor electronics, microprocessors, computer architecture, input output technology, and system control programs. Seven suggested readings are cited. (FM)

  7. Trends in solid state electronics, part 2

    NASA Technical Reports Server (NTRS)

    Gassaway, J. D.

    1972-01-01

    Developments in the fields of semiconductors and magnetics are surveyed. Materials, devices, theory, and fabrication technology are discussed. Important events up until the present time are reported, and events are interpreted through historical perspective. A brief analysis of forces which have driven the development of today's electronic technology and some projections of present trends are given. More detailed discussions are presented for four areas of contemporary interest: amorphous semiconductors, bubble domain devices, charge-coupled devices, and electron and ion beam techniques. Beam addressed magnetic memories are reviewed to a lesser extent.

  8. Semiconductor technology program. Progress briefs

    NASA Technical Reports Server (NTRS)

    Bullis, W. M. (Editor)

    1979-01-01

    The current status of NBS work on measurement technology for semiconductor materials, process control, and devices is reported. Results of both in-house and contract research are covered. Highlighted activities include modeling of diffusion processes, analysis of model spreading resistance data, and studies of resonance ionization spectroscopy, resistivity-dopant density relationships in p-type silicon, deep level measurements, photoresist sensitometry, random fault measurements, power MOSFET thermal characteristics, power transistor switching characteristics, and gross leak testing. New and selected on-going projects are described. Compilations of recent publications and publications in press are included.

  9. Design and evaluation of cellular power converter architectures

    NASA Astrophysics Data System (ADS)

    Perreault, David John

    Power electronic technology plays an important role in many energy conversion and storage applications, including machine drives, power supplies, frequency changers and UPS systems. Increases in performance and reductions in cost have been achieved through the development of higher performance power semiconductor devices and integrated control devices with increased functionality. Manufacturing techniques, however, have changed little. High power is typically achieved by paralleling multiple die in a sing!e package, producing the physical equivalent of a single large device. Consequently, both the device package and the converter in which the device is used continue to require large, complex mechanical structures, and relatively sophisticated heat transfer systems. An alternative to this approach is the use of a cellular power converter architecture, which is based upon the parallel connection of a large number of quasi-autonomous converters, called cells, each of which is designed for a fraction of the system rating. The cell rating is chosen such that single-die devices in inexpensive packages can be used, and the cell fabricated with an automated assembly process. The use of quasi-autonomous cells means that system performance is not compromised by the failure of a cell. This thesis explores the design of cellular converter architectures with the objective of achieving improvements in performance, reliability, and cost over conventional converter designs. New approaches are developed and experimentally verified for highly distributed control of cellular converters, including methods for ripple cancellation and current-sharing control. The performance of these techniques are quantified, and their dynamics are analyzed. Cell topologies suitable to the cellular architecture are investigated, and their use for systems in the 5-500 kVA range is explored. The design, construction, and experimental evaluation of a 6 kW cellular switched-mode rectifier is also addressed. This cellular system implements entirely distributed control, and achieves performance levels unattainable with an equivalent single converter. (Copies available exclusively from MIT Libraries, Rm. 14-0551, Cambridge, MA 02139-4307. Ph. 617-253-5668; Fax 617-253-1690.)

  10. Computers and Employment.

    ERIC Educational Resources Information Center

    McConnell, Sheila; And Others

    1996-01-01

    Includes "Role of Computers in Reshaping the Work Force" (McConnell); "Semiconductors" (Moris); "Computer Manufacturing" (Warnke); "Commercial Banking Transformed by Computer Technology" (Morisi); "Software, Engineering Industries: Threatened by Technological Change?" (Goodman); "Job Creation…

  11. Fundamentals handbook of electrical and computer engineering. Volume 1 Circuits fields and electronics

    NASA Astrophysics Data System (ADS)

    Chang, S. S. L.

    State of the art technology in circuits, fields, and electronics is discussed. The principles and applications of these technologies to industry, digital processing, microwave semiconductors, and computer-aided design are explained. Important concepts and methodologies in mathematics and physics are reviewed, and basic engineering sciences and associated design methods are dealt with, including: circuit theory and the design of magnetic circuits and active filter synthesis; digital signal processing, including FIR and IIR digital filter design; transmission lines, electromagnetic wave propagation and surface acoustic wave devices. Also considered are: electronics technologies, including power electronics, microwave semiconductors, GaAs devices, and magnetic bubble memories; digital circuits and logic design.

  12. High-Performance WSe2 Complementary Metal Oxide Semiconductor Technology and Integrated Circuits.

    PubMed

    Yu, Lili; Zubair, Ahmad; Santos, Elton J G; Zhang, Xu; Lin, Yuxuan; Zhang, Yuhao; Palacios, Tomás

    2015-08-12

    Because of their extraordinary structural and electrical properties, two-dimensional materials are currently being pursued for applications such as thin-film transistors and integrated circuit. One of the main challenges that still needs to be overcome for these applications is the fabrication of air-stable transistors with industry-compatible complementary metal oxide semiconductor (CMOS) technology. In this work, we experimentally demonstrate a novel high performance air-stable WSe2 CMOS technology with almost ideal voltage transfer characteristic, full logic swing and high noise margin with different supply voltages. More importantly, the inverter shows large voltage gain (∼38) and small static power (picowatts), paving the way for low power electronic system in 2D materials.

  13. Power Electronics Packaging Reliability | Transportation Research | NREL

    Science.gov Websites

    interface materials, are a key enabling technology for compact, lightweight, low-cost, and reliable power , reliability, and cost. High-temperature bonded interface materials are an important facilitating technology for compact, lightweight, low-cost, reliable power electronics packaging that fully utilizes the

  14. Biaxial stress driven tetragonal symmetry breaking and high-temperature ferromagnetic semiconductor from half-metallic CrO2

    NASA Astrophysics Data System (ADS)

    Xiao, Xiang-Bo; Liu, Bang-Gui

    2018-03-01

    It is highly desirable to combine the full spin polarization of carriers with modern semiconductor technology for spintronic applications. For this purpose, one needs good crystalline ferromagnetic (or ferrimagnetic) semiconductors with high Curie temperatures. Rutile CrO2 is a half-metallic spintronic material with Curie temperature 394 K and can have nearly full spin polarization at room temperature. Here, we find through first-principles investigation that when a biaxial compressive stress is applied on rutile CrO2, the density of states at the Fermi level decreases with the in-plane compressive strain, there is a structural phase transition to an orthorhombic phase at the strain of -5.6 % , and then appears an electronic phase transition to a semiconductor phase at -6.1 % . Further analysis shows that this structural transition, accompanying the tetragonal symmetry breaking, is induced by the stress-driven distortion and rotation of the oxygen octahedron of Cr, and the half-metal-semiconductor transition originates from the enhancement of the crystal field splitting due to the structural change. Importantly, our systematic total-energy comparison indicates the ferromagnetic Curie temperature remains almost independent of the strain, near 400 K. This biaxial stress can be realized by applying biaxial pressure or growing the CrO2 epitaxially on appropriate substrates. These results should be useful for realizing full (100%) spin polarization of controllable carriers as one uses in modern semiconductor technology.

  15. Electronics

    DTIC Science & Technology

    2001-01-01

    International Acer Incorporated, Hsin Chu, Taiwan Aerospace Industrial Development Corporation, Taichung, Taiwan American Institute of Taiwan, Taipei, Taiwan...Singapore and Malaysia .5 - 4 - The largest market for semiconductor products is the high technology consumer electronics industry that consumes up...Singapore, and Malaysia . A new semiconductor facility costs around $3 billion to build and takes about two years to become operational

  16. 78 FR 33859 - Notice Pursuant to the National Cooperative Research and Production Act of 1993-DIE Products...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2013-06-05

    ... Technologies, AG, Munich, Germany; Freescale Semiconductor, Inc., Austin, TX; Philips Semiconductors, Inc., San... DEPARTMENT OF JUSTICE Antitrust Division Notice Pursuant to the National Cooperative Research and... Section 6(a) of the National Cooperative Research and Production Act of 1993, 15 U.S.C. 4301 et seq...

  17. Methods to Account for Accelerated Semi-Conductor Device Wearout in Longlife Aerospace Applications

    DTIC Science & Technology

    2003-01-01

    Vasi, “Device scalling effects on hot-carrier induced interface and oxide-trappoing charge distributions in MOSFETs,” IEEE Transactions on Electron...Symposium Proceedings, pp. 248–254, 2002. [104] S. I. A. ( SIA ), “International technology roadmap for semiconductors.” <www.semichips.org>, 1999. 113

  18. Optical temperature sensor using thermochromic semiconductors

    DOEpatents

    Kronberg, J.W.

    1994-01-01

    Optical thermometry is a growing technological field which exploits the ability of certain materials to change their optical properties with temperature. A subclass of such materials are those which change their color as a reversible and reproducible function of temperature. These materials are thermochromic. This invention is a composition to measure temperature utilizing thermochromic semiconductors.

  19. A Brief History of ... Semiconductors

    ERIC Educational Resources Information Center

    Jenkins, Tudor

    2005-01-01

    The development of studies in semiconductor materials is traced from its beginnings with Michael Faraday in 1833 to the production of the first silicon transistor in 1954, which heralded the age of silicon electronics and microelectronics. Prior to the advent of band theory, work was patchy and driven by needs of technology. However, the arrival…

  20. An integrated semiconductor device enabling non-optical genome sequencing.

    PubMed

    Rothberg, Jonathan M; Hinz, Wolfgang; Rearick, Todd M; Schultz, Jonathan; Mileski, William; Davey, Mel; Leamon, John H; Johnson, Kim; Milgrew, Mark J; Edwards, Matthew; Hoon, Jeremy; Simons, Jan F; Marran, David; Myers, Jason W; Davidson, John F; Branting, Annika; Nobile, John R; Puc, Bernard P; Light, David; Clark, Travis A; Huber, Martin; Branciforte, Jeffrey T; Stoner, Isaac B; Cawley, Simon E; Lyons, Michael; Fu, Yutao; Homer, Nils; Sedova, Marina; Miao, Xin; Reed, Brian; Sabina, Jeffrey; Feierstein, Erika; Schorn, Michelle; Alanjary, Mohammad; Dimalanta, Eileen; Dressman, Devin; Kasinskas, Rachel; Sokolsky, Tanya; Fidanza, Jacqueline A; Namsaraev, Eugeni; McKernan, Kevin J; Williams, Alan; Roth, G Thomas; Bustillo, James

    2011-07-20

    The seminal importance of DNA sequencing to the life sciences, biotechnology and medicine has driven the search for more scalable and lower-cost solutions. Here we describe a DNA sequencing technology in which scalable, low-cost semiconductor manufacturing techniques are used to make an integrated circuit able to directly perform non-optical DNA sequencing of genomes. Sequence data are obtained by directly sensing the ions produced by template-directed DNA polymerase synthesis using all-natural nucleotides on this massively parallel semiconductor-sensing device or ion chip. The ion chip contains ion-sensitive, field-effect transistor-based sensors in perfect register with 1.2 million wells, which provide confinement and allow parallel, simultaneous detection of independent sequencing reactions. Use of the most widely used technology for constructing integrated circuits, the complementary metal-oxide semiconductor (CMOS) process, allows for low-cost, large-scale production and scaling of the device to higher densities and larger array sizes. We show the performance of the system by sequencing three bacterial genomes, its robustness and scalability by producing ion chips with up to 10 times as many sensors and sequencing a human genome.

  1. Performance Stability of Silicone Oxide-Coated Plastic Parenteral Vials.

    PubMed

    Weikart, Christopher M; Pantano, Carlo G; Shallenberger, Jeff R

    2017-01-01

    A new packaging system was developed for parenteral pharmaceuticals that combines the best attributes of plastic and glass without their respective drawbacks. This technological advancement is based on the synergy between high-precision injection-molded plastics and plasma coating technology. The result is a shatter-resistant, optically clear, low-particulate, and chemically durable packaging system. The demand for this product is driven by the expanding market, regulatory constraints, and product recalls for injectable drugs and biologics packaged in traditional glass materials. It is shown that this new packaging system meets or exceeds the important performance characteristics of glass, especially in eliminating the glass delamination and breakage that has been observed in many products. The new packaging system is an engineered, multilayer, glass-coated plastic composite that provides a chemically stable contact surface and oxygen barrier performance that exceeds a 2 year shelf life requirement. Evaluation of the coating system characteristics and performance stability to chemical, temperature, and mechanical extremes are reported herein. LAY ABSTRACT: A new packaging system for parenteral pharmaceuticals was developed that combines the best attributes of plastic and glass without their respective drawbacks. This technological advancement is based on the synergy between high-precision injection-molded plastics and plasma coating technology. The result is a shatter-resistant, optically clear, low-particulate, and chemically durable packaging system. It is shown that this new packaging system meets or exceeds the important performance characteristics of glass, especially in eliminating the glass delamination and breakage that has been observed in many products. The new packaging system is an engineered, multilayer, glass-coated plastic composite that provides a chemically stable contact surface and oxygen barrier performance that exceeds a 2 year shelf life requirement. Evaluation of the coating system characteristics and performance stability to chemical, temperature, and mechanical extremes are reported herein. © PDA, Inc. 2017.

  2. Metal oxide semiconductor thin-film transistors for flexible electronics

    NASA Astrophysics Data System (ADS)

    Petti, Luisa; Münzenrieder, Niko; Vogt, Christian; Faber, Hendrik; Büthe, Lars; Cantarella, Giuseppe; Bottacchi, Francesca; Anthopoulos, Thomas D.; Tröster, Gerhard

    2016-06-01

    The field of flexible electronics has rapidly expanded over the last decades, pioneering novel applications, such as wearable and textile integrated devices, seamless and embedded patch-like systems, soft electronic skins, as well as imperceptible and transient implants. The possibility to revolutionize our daily life with such disruptive appliances has fueled the quest for electronic devices which yield good electrical and mechanical performance and are at the same time light-weight, transparent, conformable, stretchable, and even biodegradable. Flexible metal oxide semiconductor thin-film transistors (TFTs) can fulfill all these requirements and are therefore considered the most promising technology for tomorrow's electronics. This review reflects the establishment of flexible metal oxide semiconductor TFTs, from the development of single devices, large-area circuits, up to entirely integrated systems. First, an introduction on metal oxide semiconductor TFTs is given, where the history of the field is revisited, the TFT configurations and operating principles are presented, and the main issues and technological challenges faced in the area are analyzed. Then, the recent advances achieved for flexible n-type metal oxide semiconductor TFTs manufactured by physical vapor deposition methods and solution-processing techniques are summarized. In particular, the ability of flexible metal oxide semiconductor TFTs to combine low temperature fabrication, high carrier mobility, large frequency operation, extreme mechanical bendability, together with transparency, conformability, stretchability, and water dissolubility is shown. Afterward, a detailed analysis of the most promising metal oxide semiconducting materials developed to realize the state-of-the-art flexible p-type TFTs is given. Next, the recent progresses obtained for flexible metal oxide semiconductor-based electronic circuits, realized with both unipolar and complementary technology, are reported. In particular, the realization of large-area digital circuitry like flexible near field communication tags and analog integrated circuits such as bendable operational amplifiers is presented. The last topic of this review is devoted for emerging flexible electronic systems, from foldable displays, power transmission elements to integrated systems for large-area sensing and data storage and transmission. Finally, the conclusions are drawn and an outlook over the field with a prediction for the future is provided.

  3. Metal oxide semiconductor thin-film transistors for flexible electronics

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Petti, Luisa; Vogt, Christian; Büthe, Lars

    The field of flexible electronics has rapidly expanded over the last decades, pioneering novel applications, such as wearable and textile integrated devices, seamless and embedded patch-like systems, soft electronic skins, as well as imperceptible and transient implants. The possibility to revolutionize our daily life with such disruptive appliances has fueled the quest for electronic devices which yield good electrical and mechanical performance and are at the same time light-weight, transparent, conformable, stretchable, and even biodegradable. Flexible metal oxide semiconductor thin-film transistors (TFTs) can fulfill all these requirements and are therefore considered the most promising technology for tomorrow's electronics. This reviewmore » reflects the establishment of flexible metal oxide semiconductor TFTs, from the development of single devices, large-area circuits, up to entirely integrated systems. First, an introduction on metal oxide semiconductor TFTs is given, where the history of the field is revisited, the TFT configurations and operating principles are presented, and the main issues and technological challenges faced in the area are analyzed. Then, the recent advances achieved for flexible n-type metal oxide semiconductor TFTs manufactured by physical vapor deposition methods and solution-processing techniques are summarized. In particular, the ability of flexible metal oxide semiconductor TFTs to combine low temperature fabrication, high carrier mobility, large frequency operation, extreme mechanical bendability, together with transparency, conformability, stretchability, and water dissolubility is shown. Afterward, a detailed analysis of the most promising metal oxide semiconducting materials developed to realize the state-of-the-art flexible p-type TFTs is given. Next, the recent progresses obtained for flexible metal oxide semiconductor-based electronic circuits, realized with both unipolar and complementary technology, are reported. In particular, the realization of large-area digital circuitry like flexible near field communication tags and analog integrated circuits such as bendable operational amplifiers is presented. The last topic of this review is devoted for emerging flexible electronic systems, from foldable displays, power transmission elements to integrated systems for large-area sensing and data storage and transmission. Finally, the conclusions are drawn and an outlook over the field with a prediction for the future is provided.« less

  4. Technology for Space Station Evolution. Executive summary and overview

    NASA Technical Reports Server (NTRS)

    1990-01-01

    NASA's Office of Aeronautics and Space Technology (OAST) conducted a workshop on technology for space station evolution 16-19 Jan. 1990. The purpose of this workshop was to collect and clarify Space Station Freedom technology requirements for evolution and to describe technologies that can potentially fill those requirements. These proceedings are organized into an Executive Summary and Overview and five volumes containing the technology discipline presentations. The Executive Summary and Overview contains an executive summary for the workshop, the technology discipline summary packages, and the keynote address. The executive summary provides a synopsis of the events and results of the workshop and the technology discipline summary packages.

  5. Advanced Packaging Materials and Techniques for High Power TR Module: Standard Flight vs. Advanced Packaging

    NASA Technical Reports Server (NTRS)

    Hoffman, James Patrick; Del Castillo, Linda; Miller, Jennifer; Jenabi, Masud; Hunter, Donald; Birur, Gajanana

    2011-01-01

    The higher output power densities required of modern radar architectures, such as the proposed DESDynI [Deformation, Ecosystem Structure, and Dynamics of Ice] SAR [Synthetic Aperture Radar] Instrument (or DSI) require increasingly dense high power electronics. To enable these higher power densities, while maintaining or even improving hardware reliability, requires advances in integrating advanced thermal packaging technologies into radar transmit/receive (TR) modules. New materials and techniques have been studied and compared to standard technologies.

  6. Transmitter experiment package for the communications technology satellite

    NASA Technical Reports Server (NTRS)

    Farber, B.; Goldin, D. S.; Marcus, B.; Mock, P.

    1977-01-01

    The operating requirements, system design characteristics, high voltage packaging considerations, nonstandard components development, and test results for the transmitter experiment package (TEP) are described. The TEP is used for broadcasting power transmission from the Communications Technology Satellite. The TEP consists of a 12 GHz, 200-watt output stage tube (OST), a high voltage processing system that converts the unregulated spacecraft solar array power to the regulated voltages required for OST operation, and a variable conductance heat pipe system that is used to cool the OST body.

  7. 78 FR 23472 - Amendments to Existing Validated End-User Authorizations: CSMC Technologies Corporation in the...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2013-04-19

    ... of Wuxi CR Semiconductor Wafers & Chips Co., Ltd. and CSMC Technologies Fab 1 Co., Ltd., which is... Validated End-User: CSMC Technologies Corporation. Eligible Destinations: CSMC Technologies Fab 1 Co., Ltd., 14 Liangxi Road, Wuxi, Jiangsu 214061, China. CSMC Technologies Fab 2 Co., Ltd., 8 Xinzhou Rd., Wuxi...

  8. Multimedia package for LRFD concrete bridge design.

    DOT National Transportation Integrated Search

    2009-02-01

    This Project developed a Load and Resistance Factor Design (LRFD) multimedia package to provide a practical introduction and an in-depth understanding of the technological advances in the design of concrete bridges. This package can be used to train ...

  9. DOE Office of Scientific and Technical Information (OSTI.GOV)

    Huang, Huafeng; Colabello, Diane M.; Sklute, Elizabeth C.

    The absolute absorption coefficient, α(E), is a critical design parameter for devices using semiconductors for light harvesting associated with renewable energy production, both for classic technologies such as photovoltaics and for emerging technologies such as direct solar fuel production. While α(E) is well-known for many classic simple semiconductors used in photovoltaic applications, the absolute values of α(E) are typically unknown for the complex semiconductors being explored for solar fuel production due to the absence of single crystals or crystalline epitaxial films that are needed for conventional methods of determining α(E). In this work, a simple self-referenced method for estimating bothmore » the refractive indices, n(E), and absolute absorption coefficients, α(E), for loose powder samples using diffuse reflectance data is demonstrated. In this method, the sample refractive index can be deduced by refining n to maximize the agreement between the relative absorption spectrum calculated from bidirectional reflectance data (calculated through a Hapke transform which depends on n) and integrating sphere diffuse reflectance data (calculated through a Kubleka–Munk transform which does not depend on n). This new method can be quickly used to screen the suitability of emerging semiconductor systems for light-harvesting applications. The effectiveness of this approach is tested using the simple classic semiconductors Ge and Fe 2O 3 as well as the complex semiconductors La 2MoO 5 and La 4Mo 2O 11. The method is shown to work well for powders with a narrow size distribution (exemplified by Fe 2O 3) and to be ineffective for semiconductors with a broad size distribution (exemplified by Ge). As such, it provides a means for rapidly estimating the absolute optical properties of complex solids which are only available as loose powders.« less

  10. Modeling and MBL: Software Tools for Science.

    ERIC Educational Resources Information Center

    Tinker, Robert F.

    Recent technological advances and new software packages put unprecedented power for experimenting and theory-building in the hands of students at all levels. Microcomputer-based laboratory (MBL) and model-solving tools illustrate the educational potential of the technology. These tools include modeling software and three MBL packages (which are…

  11. Solid-state semiconductor optical cryocooler based on CdS nanobelts.

    PubMed

    Li, Dehui; Zhang, Jun; Wang, Xinjiang; Huang, Baoling; Xiong, Qihua

    2014-08-13

    We demonstrate the laser cooling of silicon-on-insulator (SOI) substrate using CdS nanobelts. The local temperature change of the SOI substrate exactly beneath the CdS nanobelts is deduced from the ratio of the Stokes and anti-Stokes Raman intensities from the Si layer on the top of the SOI substrate. We have achieved a 30 and 20 K net cooling starting from 290 K under a 3.8 mW 514 nm and a 4.4 mW 532 nm pumping, respectively. In contrast, a laser heating effect has been observed pumped by 502 and 488 nm lasers. Theoretical analysis based on the general static heat conduction module in the Ansys program package is conducted, which agrees well with the experimental results. Our investigations demonstrate the laser cooling capability of an external thermal load, suggesting the applications of II-VI semiconductors in all-solid-state optical cryocoolers.

  12. Resin bleed improvement on surface mount semiconductor device

    NASA Astrophysics Data System (ADS)

    Rajoo, Indra Kumar; Tahir, Suraya Mohd; Aziz, Faieza Abdul; Shamsul Anuar, Mohd

    2018-04-01

    Resin bleed is a transparent layer of epoxy compound which occurs during molding process but is difficult to be detected after the molding process. Resin bleed on the lead on the unit from the focused package, SOD123, can cause solderability failure at end customer. This failed unit from the customer will be considered as a customer complaint. Generally, the semiconductor company has to perform visual inspection after the plating process to detect resin bleed. Mold chase with excess hole, split cavity & stepped design ejector pin hole have been found to be the major root cause of resin bleed in this company. The modifications of the mold chase, changing of split cavity to solid cavity and re-design of the ejector pin proposed were derived after a detailed study & analysis conducted to arrive at these solutions. The solutions proposed have yield good results during the pilot run with zero (0) occurrence of resin bleed for 3 consecutive months.

  13. New Technology CZT Detectors for High-Energy Flare Spectroscopy: The Room Temperature Semiconductor Spectrometer for JAWSAT

    NASA Technical Reports Server (NTRS)

    Vestrand, W. Thomas

    1999-01-01

    The goal of our Room Temperature Semiconductor Spectrometer (RTeSS) project is to develop a small high-energy solar flare spectrometer employing semiconductor detectors that do not require significant cooling when used as high-energy solar flare spectrometers. Specifically, the goal is to test Cadmium Zinc Telluride (CZT) detectors with coplanar grid electrodes as x-ray and gamma-ray spectrometers and to design an experiment that can be flown as a "piggy-back" payload on a satellite mission during the next solar maximum.

  14. Quartz 9-inch size mask blanks for ArF PSM (Phase Shift Mask)

    NASA Astrophysics Data System (ADS)

    Harashima, Noriyuki; Isozaki, Tatsuya; Kawanishi, Arata; Kanai, Shuichiro; Kageyama, Kagehiro; Iso, Hiroyuki; Chishima, Tatsuya

    2017-07-01

    Semiconductor technology nodes are steadily miniaturizing. On the other hand, various efforts have been made to reduce costs, mass production lines have shifted from 200 mmφ of Si wafer to 300 mmφ, and technology development of Si wafer 450 mmφ is also in progress. As a photomask, 6-inch size binary Cr mask has been used for many years, but in recent years, the use of 9-inch binary Cr masks for Proximity Lithography Process in automotive applications, MEMS, packages, etc. has increased, and cost reduction has been taken. Since the miniaturization will progress in the above applications in the future, products corresponding to miniaturization are also desired in 9-inch photomasks. The high grade Cr - binary mask blanks used in proximity exposure process, there is a prospect of being able to use it by ULVAC COATING CORPORATION's tireless research. As further demands for miniaturization, KrF and ArF Lithography Process, which are used for steppers and scanners , there are also a demand for 9-inch size Mask Blanks. In ULVAC COATING CORPORATION, we developed a 9 - inch size KrF PSM mask Blanks prototype in 2016 and proposed a new high grade 9 - inch photomask. This time, we have further investigated and developed 9-inch size ArF PSM Mask Blanks corresponding to ArF Lithography Process, so we report it.

  15. Terahertz MMICs and Antenna-in-Package Technology at 300 GHz for KIOSK Download System

    NASA Astrophysics Data System (ADS)

    Tajima, Takuro; Kosugi, Toshihiko; Song, Ho-Jin; Hamada, Hiroshi; El Moutaouakil, Amine; Sugiyama, Hiroki; Matsuzaki, Hideaki; Yaita, Makoto; Kagami, Osamu

    2016-12-01

    Toward the realization of ultra-fast wireless communications systems, the inherent broad bandwidth of the terahertz (THz) band is attracting attention, especially for short-range instant download applications. In this paper, we present our recent progress on InP-based THz MMICs and packaging techniques based on low-temperature co-fibered ceramic (LTCC) technology. The transmitter MMICs are based on 80-nm InP-based high electron mobility transistors (HEMTs). Using the transmitter packaged in an E-plane split-block waveguide and compact lens receiver packaged in LTCC multilayered substrates, we tested wireless data transmission up to 27 Gbps with the simple amplitude key shifting (ASK) modulation scheme. We also present several THz antenna-in-packaging solutions based on substrate integrated waveguide (SIW) technology. A vertical hollow (VH) SIW was applied to a compact medium-gain SIW antenna and low-loss interconnection integrated in LTCC multi-layer substrates. The size of the LTCC antennas with 15-dBi gain is less than 0.1 cm3. For feeding the antenna, we investigated an LTCC-integrated transition and polyimide transition to LTCC VH SIWs. These transitions exhibit around 1-dB estimated loss at 300 GHz and more than 35 GHz bandwidth with 10-dB return loss. The proposed package solutions make antennas and interconnections easy to integrate in a compact LTCC package with an MMIC chip for practical applications.

  16. PUBLISHER'S ANNOUNCEMENT: Important changes for 2008

    NASA Astrophysics Data System (ADS)

    Bedrock, Claire

    2008-01-01

    Having reviewed several aspects of IOP journal content, both in print and online, we have made some changes for 2008, some of which affect Semiconductor Science and Technology. Article numbering In common with many other IOP journals, Semiconductor Science and Technology has moved from sequential page numbering to an article numbering system. Articles will continue to be published on the web in advance of the print edition. The bibliographic citation will change slightly. Articles should be referenced using the six-digit article number in place of a page number, and this number must include any leading zeros. For instance: Surname X and Surname Y 2008 Semicond. Sci. Technol. 18 015003 A new look and feel Semiconductor Science and Technology has changed from European A4 format to a slightly smaller size, closer to US Letter format, and we have taken the opportunity to refresh the cover, in order to modernise the typography, and create a consistent look and feel across our range of publications. If you have any questions or comments about any of these changes, please contact us at sst@iop.org

  17. Hard X-ray and gamma-ray imaging spectroscopy for the next solar maximum

    NASA Technical Reports Server (NTRS)

    Hudson, H. S.; Crannell, C. J.; Dennis, B. R.; Spicer, D. S.; Davis, J. M.; Hurford, G. J.; Lin, R. P.

    1990-01-01

    The objectives and principles are described of a single spectroscopic imaging package that can provide effective imaging in the hard X- and gamma-ray ranges. Called the High-Energy Solar Physics (HESP) mission instrument for solar investigation, the device is based on rotating modulation collimators with germanium semiconductor spectrometers. The instrument is planned to incorporate thick modulation plates, and the range of coverage is discussed. The optics permit the coverage of high-contrast hard X-ray images from small- and medium-sized flares with large signal-to-noise ratios. The detectors allow angular resolution of less than 1 arcsec, time resolution of less than 1 arcsec, and spectral resolution of about 1 keV. The HESP package is considered an effective and important instrument for investigating the high-energy solar events of the near-term future efficiently.

  18. Investigating Time and Spectral Dependence in Neutron Radiation Environments for Semiconductor Damage Studies

    DTIC Science & Technology

    2014-09-18

    each of the four 20-min dosimetry -focused irradiations, a TLD crystal was included in the dosimetry package placed next to the BJTs. This TLD was then...4.75× 103 rad(Si). One reason the measured TLD response would be higher than the calculated value may be due to neutron-induced electron excitation that...there were also 14 TLDs . The dosimetry packet 122 for the 23.4% irradiation did not contain TLDs because they would have become too radioactive and would

  19. The Effects of Thermal Cycling on Gallium Nitride and Silicon Carbide Semiconductor Devices for Aerospace Use

    NASA Technical Reports Server (NTRS)

    Patterson, Richard L.; Hammoud, Ahmad

    2012-01-01

    Electronics designed for use in NASA space missions are required to work efficiently and reliably under harsh environment conditions. These Include radiation, extreme temperatures, thermal cycling, to name a few. Preliminary data obtained on new Gallium Nitride and Silicon Carbide power devices under exposure to radiation followed by long term thermal cycling are presented. This work was done in collaboration with GSFC and JPL in support of the NASA Electronic Parts and Packaging (NEPP) Program

  20. CarbAl Heat Transfer Material

    NASA Technical Reports Server (NTRS)

    Fink, Richard

    2015-01-01

    The increasing use of power electronics, such as high-current semiconductor devices and modules, within space vehicles is driving the need to develop specialty thermal management materials in both the packaging of these discrete devices and the packaging of modules consisting of these device arrays. Developed by Applied Nanotech, Inc. (ANI), CarbAl heat transfer material is uniquely characterized by its low density, high thermal diffusivity, and high thermal conductivity. Its coefficient of thermal expansion (CTE) is similar to most power electronic materials, making it an effective base plate substrate for state-of-the-art silicon carbide (SiC) super junction transistors. The material currently is being used to optimize hybrid vehicle inverter packaging. Adapting CarbAl-based substrates to space applications was a major focus of the SBIR project work. In Phase I, ANI completed modeling and experimentation to validate its deployment in a space environment. Key parameters related to cryogenic temperature scaling of CTE, thermal conductivity, and mechanical strength. In Phase II, the company concentrated on improving heat sinks and thermally conductive circuit boards for power electronic applications.

  1. Self-Referenced Method for Estimating Refractive Index and Absolute Absorption of Loose Semiconductor Powders

    DOE PAGES

    Huang, Huafeng; Colabello, Diane M.; Sklute, Elizabeth C.; ...

    2017-04-23

    The absolute absorption coefficient, α(E), is a critical design parameter for devices using semiconductors for light harvesting associated with renewable energy production, both for classic technologies such as photovoltaics and for emerging technologies such as direct solar fuel production. While α(E) is well-known for many classic simple semiconductors used in photovoltaic applications, the absolute values of α(E) are typically unknown for the complex semiconductors being explored for solar fuel production due to the absence of single crystals or crystalline epitaxial films that are needed for conventional methods of determining α(E). In this work, a simple self-referenced method for estimating bothmore » the refractive indices, n(E), and absolute absorption coefficients, α(E), for loose powder samples using diffuse reflectance data is demonstrated. In this method, the sample refractive index can be deduced by refining n to maximize the agreement between the relative absorption spectrum calculated from bidirectional reflectance data (calculated through a Hapke transform which depends on n) and integrating sphere diffuse reflectance data (calculated through a Kubleka–Munk transform which does not depend on n). This new method can be quickly used to screen the suitability of emerging semiconductor systems for light-harvesting applications. The effectiveness of this approach is tested using the simple classic semiconductors Ge and Fe 2O 3 as well as the complex semiconductors La 2MoO 5 and La 4Mo 2O 11. The method is shown to work well for powders with a narrow size distribution (exemplified by Fe 2O 3) and to be ineffective for semiconductors with a broad size distribution (exemplified by Ge). As such, it provides a means for rapidly estimating the absolute optical properties of complex solids which are only available as loose powders.« less

  2. The Semiconductor Industry and Emerging Technologies: A Study Using a Modified Delphi Method

    ERIC Educational Resources Information Center

    Jordan, Edgar A.

    2010-01-01

    The purpose of this qualitative descriptive study was to determine what leaders in the semiconductor industry thought the future of computing would look like and what emerging materials showed the most promise to overcome the current theoretical limit of 10 nanometers for silicon dioxide. The researcher used a modified Delphi technique in two…

  3. SEMICONDUCTOR TECHNOLOGY Supercritical carbon dioxide process for releasing stuck cantilever beams

    NASA Astrophysics Data System (ADS)

    Yu, Hui; Chaoqun, Gao; Lei, Wang; Yupeng, Jing

    2010-10-01

    The multi-SCCO2 (supercritical carbon dioxide) release and dry process based on our specialized SCCO2 semiconductor process equipment is investigated and the releasing mechanism is discussed. The experiment results show that stuck cantilever beams were held up again under SCCO2 high pressure treatment and the repeatability of this process is nearly 100%.

  4. Organizational Growth: Linking Founding Team, Strategy, Environment, and Growth among U.S. Semiconductor Ventures, 1978-1988.

    ERIC Educational Resources Information Center

    Eisenhardt, Kathleen M.; Schoonhoven, Claudia Bird

    1990-01-01

    Summarizes a study exploring organizational growth in technology-based ventures. Characteristics of the founding top-management team, strategy, and environment are matched to the sales growth of newly founded semiconductor firms. Results show that the effects of the founding team and environment grew instead of fading with time. Includes 54…

  5. A stable solution-processed polymer semiconductor with record high-mobility for printed transistors

    PubMed Central

    Li, Jun; Zhao, Yan; Tan, Huei Shuan; Guo, Yunlong; Di, Chong-An; Yu, Gui; Liu, Yunqi; Lin, Ming; Lim, Suo Hon; Zhou, Yuhua; Su, Haibin; Ong, Beng S.

    2012-01-01

    Microelectronic circuits/arrays produced via high-speed printing instead of traditional photolithographic processes offer an appealing approach to creating the long-sought after, low-cost, large-area flexible electronics. Foremost among critical enablers to propel this paradigm shift in manufacturing is a stable, solution-processable, high-performance semiconductor for printing functionally capable thin-film transistors — fundamental building blocks of microelectronics. We report herein the processing and optimisation of solution-processable polymer semiconductors for thin-film transistors, demonstrating very high field-effect mobility, high on/off ratio, and excellent shelf-life and operating stabilities under ambient conditions. Exceptionally high-gain inverters and functional ring oscillator devices on flexible substrates have been demonstrated. This optimised polymer semiconductor represents a significant progress in semiconductor development, dispelling prevalent skepticism surrounding practical usability of organic semiconductors for high-performance microelectronic devices, opening up application opportunities hitherto functionally or economically inaccessible with silicon technologies, and providing an excellent structural framework for fundamental studies of charge transport in organic systems. PMID:23082244

  6. Combining an Analytic Hierarchy Process and TOPSIS for Selecting Postharvest Technology Method for Selayar Citrus in Indonesia

    NASA Astrophysics Data System (ADS)

    Dirpan, Andi

    2018-05-01

    This research was intended to select the best handling methods or postharvest technologies that can be used to maintain the quality of citrus fruit in Selayar, South Sulawesi, Indonesia among (1) modified atmosphere packaging (MAP (2) Controlled atmosphere storage (CAS) (3) coatings (4) hot water treatment (5) Hot Calcium Dip (HCD) by using combination between an analytic hierarchy process (AHP) and TOPSIS. Improving quality, applicability, increasing shelf life and reducing cost are used as the criteria to determine the best postharvest technologies. The results show that the most important criteria for selecting postharvest technology is improving quality followed by increasing shelf life, reducing cost and applicability. Furthermore, by using TOPSIS, it is clear that the postharvest technology that had the lowest rangking is modified atmosphere packaging (MAP), followed by controlled atmosphere storage (CAS), coatings, hot calcium dip (HCD) and hot water treatment (HWT). Therefore, it can be concluded that the best postharvest technology method for Selayar citrus is modified atmosphere packaging (MAP).

  7. High barrier multilayer packaging by the coextrusion method: The effect of nanocomposites and biodegradable polymers on flexible film properties

    NASA Astrophysics Data System (ADS)

    Thellen, Christopher T.

    The objective of this research was to investigate the use of nanocomposite and multilayer co-extrusion technologies for the development of high gas barrier packaging that is more environmentally friendly than many current packaging system. Co-extruded bio-based and biodegradable polymers that could be composted in a municipal landfill were one direction that this research was aimed. Down-gauging of high performance barrier films using nanocomposite technology and co-extrusion was also investigated in order to reduce the amount of solid waste being generated by the packaging. Although the research is focused on military ration packaging, the technologies could easily be introduced into the commercial flexible packaging market. Multilayer packaging consisting of poly(m-xylylene adipamide) nanocomposite layers along with adhesive and tie layers was co-extruded using both laboratory and pilot-scale film extrusion equipment. Co-extrusion of biodegradable polyhydroxyalkanoates (PHA) along with polyvinyl alcohol (PVOH) and tie layers was also accomplished using similar co-extrusion technology. All multilayer films were characterized for gas barrier, mechanical, and thermal properties. The biodegradability of the PVOH and PHA materials in a marine environment was also investigated. The research has shown that co-extrusion of these materials is possible at a research and pilot level. The use of nanocomposite poly(m-xylylene adipamide) was effective in down-gauging the un-filled barrier film to thinner structures. Bio-based PHA/PVOH films required the use of a malefic anhydride grafted PHA tie layer to improve layer to layer adhesion in the structure to avoid delamination. The PHA polymer demonstrated a high rate of biodegradability/mineralization in the marine environment while the rate of biodegradation of the PVOH polymer was slower.

  8. Modular avionics packaging standardization

    NASA Astrophysics Data System (ADS)

    Austin, M.; McNichols, J. K.

    The Modular Avionics Packaging (MAP) Program for packaging future military avionics systems with the objective of improving reliability, maintainability, and supportability, and reducing equipment life cycle costs is addressed. The basic MAP packaging concepts called the Standard Avionics Module, the Standard Enclosure, and the Integrated Rack are summarized, and the benefits of modular avionics packaging, including low risk design, technology independence with common functions, improved maintainability and life cycle costs are discussed. Progress made in MAP is briefly reviewed.

  9. Use of Dual Electromagnetic Radiation Technology to Reduce Salmonella and Listeria monocytogenes Risk on Cooked and Packaged Meat Products

    USDA-ARS?s Scientific Manuscript database

    Pathogenic bacteria including Salmonella and Listeria can potentially contaminate ready-to-eat meats. These bacteria compromise the safety of our food supply. The objective of this research was to develop and test new low temperature pasteurization technology for packaged or thermally sensitive food...

  10. Imaging detectors and electronics—a view of the future

    NASA Astrophysics Data System (ADS)

    Spieler, Helmuth

    2004-09-01

    Imaging sensors and readout electronics have made tremendous strides in the past two decades. The application of modern semiconductor fabrication techniques and the introduction of customized monolithic integrated circuits have made large-scale imaging systems routine in high-energy physics. This technology is now finding its way into other areas, such as space missions, synchrotron light sources, and medical imaging. I review current developments and discuss the promise and limits of new technologies. Several detector systems are described as examples of future trends. The discussion emphasizes semiconductor detector systems, but I also include recent developments for large-scale superconducting detector arrays.

  11. Economics of polysilicon processes

    NASA Technical Reports Server (NTRS)

    Yaws, C. L.; Li, K. Y.; Chou, S. M.

    1986-01-01

    Techniques are being developed to provide lower cost polysilicon material for solar cells. Existing technology which normally provides semiconductor industry polysilicon material is undergoing changes and also being used to provide polysilicon material for solar cells. Economics of new and existing technologies are presented for producing polysilicon. The economics are primarily based on the preliminary process design of a plant producing 1,000 metric tons/year of silicon. The polysilicon processes include: Siemen's process (hydrogen reduction of trichlorosilane); Union Carbide process (silane decomposition); and Hemlock Semiconductor process (hydrogen reduction of dichlorosilane). The economics include cost estimates of capital investment and product cost to produce polysilicon via the technology. Sensitivity analysis results are also presented to disclose the effect of major paramentes such as utilities, labor, raw materials and capital investment.

  12. Computing technology in the 1980's. [computers

    NASA Technical Reports Server (NTRS)

    Stone, H. S.

    1978-01-01

    Advances in computing technology have been led by consistently improving semiconductor technology. The semiconductor industry has turned out ever faster, smaller, and less expensive devices since transistorized computers were first introduced 20 years ago. For the next decade, there appear to be new advances possible, with the rate of introduction of improved devices at least equal to the historic trends. The implication of these projections is that computers will enter new markets and will truly be pervasive in business, home, and factory as their cost diminishes and their computational power expands to new levels. The computer industry as we know it today will be greatly altered in the next decade, primarily because the raw computer system will give way to computer-based turn-key information and control systems.

  13. Advanced 3-V semiconductor technology assessment

    NASA Technical Reports Server (NTRS)

    Nowogrodzki, M.

    1983-01-01

    Components required for extensions of currently planned space communications systems are discussed for large antennas, crosslink systems, single sideband systems, Aerostat systems, and digital signal processing. Systems using advanced modulation concepts and new concepts in communications satellites are included. The current status and trends in materials technology are examined with emphasis on bulk growth of semi-insulating GaAs and InP, epitaxial growth, and ion implantation. Microwave solid state discrete active devices, multigigabit rate GaAs digital integrated circuits, microwave integrated circuits, and the exploratory development of GaInAs devices, heterojunction devices, and quasi-ballistic devices is considered. Competing technologies such as RF power generation, filter structures, and microwave circuit fabrication are discussed. The fundamental limits of semiconductor devices and problems in implementation are explored.

  14. Limits on silicon nanoelectronics for terascale integration.

    PubMed

    Meindl, J D; Chen, Q; Davis, J A

    2001-09-14

    Throughout the past four decades, silicon semiconductor technology has advanced at exponential rates in both performance and productivity. Concerns have been raised, however, that the limits of silicon technology may soon be reached. Analysis of fundamental, material, device, circuit, and system limits reveals that silicon technology has an enormous remaining potential to achieve terascale integration (TSI) of more than 1 trillion transistors per chip. Such massive-scale integration is feasible assuming the development and economical mass production of double-gate metal-oxide-semiconductor field effect transistors with gate oxide thickness of about 1 nanometer, silicon channel thickness of about 3 nanometers, and channel length of about 10 nanometers. The development of interconnecting wires for these transistors presents a major challenge to the achievement of nanoelectronics for TSI.

  15. New semiconductor laser technology for gas sensing applications in the 1650nm range

    NASA Astrophysics Data System (ADS)

    Morrison, Gordon B.; Sherman, Jes; Estrella, Steven; Moreira, Renan L.; Leisher, Paul O.; Mashanovitch, Milan L.; Stephen, Mark; Numata, Kenji; Wu, Stewart; Riris, Haris

    2017-08-01

    Atmospheric methane (CH4) is the second most important anthropogenic greenhouse gas with approximately 25 times the radiative forcing of carbon dioxide (CO2) per molecule. CH4 also contributes to pollution in the lower atmosphere through chemical reactions leading to ozone production. Recent developments of LIDAR measurement technology for CH4 have been previously reported by Goddard Space Flight Center (GSFC). In this paper, we report on a novel, high-performance tunable semiconductor laser technology developed by Freedom Photonics for the 1650nm wavelength range operation, and for LIDAR detection of CH4. Devices described are monolithic, with simple control, and compatible with low-cost fabrication techniques. We present 3 different types of tunable lasers implemented for this application.

  16. Riding the Technology Wave.

    ERIC Educational Resources Information Center

    Malan, Pierre

    This paper presents an overview of information technology development. The first section sets the scene, comparing the first WAN (Wide Area Network) and Intel processor to current technology. The birth of the microcomputer is described in the second section, including historical background on semiconductors, microprocessors, and the microcomputer.…

  17. Body of Knowledge (BOK) for Leadless Quad Flat No-Lead/bottom Termination Components (QFN/BTC) Package Trends and Reliability

    NASA Technical Reports Server (NTRS)

    Ghaffarian, Reza

    2014-01-01

    Bottom terminated components and quad flat no-lead (BTC/QFN) packages have been extensively used by commercial industry for more than a decade. Cost and performance advantages and the closeness of the packages to the boards make them especially unique for radio frequency (RF) applications. A number of high-reliability parts are now available in this style of package configuration. This report presents a summary of literature surveyed and provides a body of knowledge (BOK) gathered on the status of BTC/QFN and their advanced versions of multi-row QFN (MRQFN) packaging technologies. The report provides a comprehensive review of packaging trends and specifications on design, assembly, and reliability. Emphasis is placed on assembly reliability and associated key design and process parameters because they show lower life than standard leaded package assembly under thermal cycling exposures. Inspection of hidden solder joints for assuring quality is challenging and is similar to ball grid arrays (BGAs). Understanding the key BTC/QFN technology trends, applications, processing parameters, workmanship defects, and reliability behavior is important when judicially selecting and narrowing the follow-on packages for evaluation and testing, as well as for the low risk insertion in high-reliability applications.

  18. Body of Knowledge (BOK) for Leadless Quad Flat No-Lead/Bottom Termination Components (QFN/BTC) Package Trends and Reliability

    NASA Technical Reports Server (NTRS)

    Ghaffarian, Reza

    2014-01-01

    Bottom terminated components and quad flat no-lead (BTC/QFN) packages have been extensively used by commercial industry for more than a decade. Cost and performance advantages and the closeness of the packages to the boards make them especially unique for radio frequency (RF) applications. A number of high-reliability parts are now available in this style of package configuration. This report presents a summary of literature surveyed and provides a body of knowledge (BOK) gathered on the status of BTC/QFN and their advanced versions of multi-row QFN (MRQFN) packaging technologies. The report provides a comprehensive review of packaging trends and specifications on design, assembly, and reliability. Emphasis is placed on assembly reliability and associated key design and process parameters because they show lower life than standard leaded package assembly under thermal cycling exposures. Inspection of hidden solder joints for assuring quality is challenging and is similar to ball grid arrays (BGAs). Understanding the key BTC/QFN technology trends, applications, processing parameters, workmanship defects, and reliability behavior is important when judicially selecting and narrowing the follow-on packages for evaluation and testing, as well as for the low risk insertion in high-reliability applications.

  19. Low-Cost and Large-Area Electronics, Roll-to-Roll Processing and Beyond

    NASA Astrophysics Data System (ADS)

    Wiesenhütter, Katarzyna; Skorupa, Wolfgang

    In the following chapter, the authors conduct a literature survey of current advances in state-of-the-art low-cost, flexible electronics. A new emerging trend in the design of modern semiconductor devices dedicated to scaling-up, rather than reducing, their dimensions is presented. To realize volume manufacturing, alternative semiconductor materials with superior performance, fabricated by innovative processing methods, are essential. This review provides readers with a general overview of the material and technology evolution in the area of macroelectronics. Herein, the term macroelectronics (MEs) refers to electronic systems that can cover a large area of flexible media. In stark contrast to well-established micro- and nano-scale semiconductor devices, where property improvement is associated with downscaling the dimensions of the functional elements, in macroelectronic systems their overall size defines the ultimate performance (Sun and Rogers in Adv. Mater. 19:1897-1916, 2007). The major challenges of large-scale production are discussed. Particular attention has been focused on describing advanced, short-term heat treatment approaches, which offer a range of advantages compared to conventional annealing methods. There is no doubt that large-area, flexible electronic systems constitute an important research topic for the semiconductor industry. The ability to fabricate highly efficient macroelectronics by inexpensive processes will have a significant impact on a range of diverse technology sectors. A new era "towards semiconductor volume manufacturing…" has begun.

  20. 16th Russian Youth Conference on Physics of Semiconductors and Nanostructures, Opto- and Nanoelectronics

    NASA Astrophysics Data System (ADS)

    Suris, Robert A.; Vorobjev, Leonid E.; Firsov, Dmitry A.

    2015-01-01

    The 16th Russian Youth Conference on Physics of Semiconductors and Nanostructures, Opto- and Nanoelectronics was held on November 24 - 28 at St. Petersburg Polytechnic University. The program of the Conference included semiconductor technology, heterostructures with quantum wells and quantum dots, opto- and nanoelectronic devices, and new materials. A large number of participants with about 200 attendees from many regions of Russia provided a perfect platform for the valuable discussions between students and experienced scientists. The Conference included two invited talks given by a corresponding member of RAS P.S. Kopyev ("Nitrides: the 4th Nobel Prize on semiconductor heterostructures") and Dr. A.V. Ivanchik ("XXI century is the era of precision cosmology"). Students, graduate and postgraduate students presented their results on plenary and poster sessions. The total number of accepted papers published in Russian (the official conference language) was 92. Here we publish 18 of them in English. Like previous years, the participants were involved in the competition for the best report. Certificates and cash prizes were awarded to a number of participants for the presentations selected by the Program Committee. Two special E.F. Gross Prizes were given for the best presentations in semiconductor optics. Works with potential applications were recommended for participation in the following competition for support from the Russian Foundation for Assistance to Small Innovative Enterprises in Science and Technology. The Conference was supported by the Russian Foundation for Basic Research, the "Dynasty" foundation and the innovation company "ATC - Semiconductor Devices", St. Petersburg. The official Conference website is http://www.semicond.spbstu.ru/conf2014-eng.html

  1. Deep Cryogenic Low Power 24 Bits Analog to Digital Converter with Active Reverse Cryostat

    NASA Astrophysics Data System (ADS)

    Turqueti, Marcos; Prestemon, Soren; Albright, Robert

    LBNL is developing an innovative data acquisition module for superconductive magnets where the front-end electronics and digitizer resides inside the cryostat. This electronic package allows conventional electronic technologies such as enhanced metal-oxide-semiconductor to work inside cryostats at temperatures as low as 4.2 K. This is achieved by careful management of heat inside the module that keeps the electronic envelop at approximately 85 K. This approach avoids all the difficulties that arise from changes in carrier mobility that occur in semiconductors at deep cryogenic temperatures. There are several advantages in utilizing this system. A significant reduction in electrical noise from signals captured inside the cryostat occurs due to the low temperature that the electronics is immersed in, reducing the thermal noise. The shorter distance that signals are transmitted before digitalization reduces pickup and cross-talk between channels. This improved performance in signal-to-noise rate by itself is a significant advantage. Another important advantage is the simplification of the feedthrough interface on the cryostat head. Data coming out of the cryostat is digital and serial, dramatically reducing the number of lines going through the cryostat feedthrough interface. It is important to notice that all lines coming out of the cryostat are digital and low voltage, reducing the possibility of electric breakdown inside the cryostat. This paper will explain in details the architecture and inner workings of this data acquisition system. It will also provide the performance of the analog to digital converter when the system is immersed in liquid helium, and in liquid nitrogen. Parameters such as power dissipation, integral non-linearity, effective number of bits, signal-to-noise and distortion, will be presented for both temperatures.

  2. Microelectromechanical System (MEMS) Device Being Developed for Active Cooling and Temperature Control

    NASA Technical Reports Server (NTRS)

    Beach, Duane E.

    2003-01-01

    High-capacity cooling options remain limited for many small-scale applications such as microelectronic components, miniature sensors, and microsystems. A microelectromechanical system (MEMS) using a Stirling thermodynamic cycle to provide cooling or heating directly to a thermally loaded surface is being developed at the NASA Glenn Research Center to meet this need. The device can be used strictly in the cooling mode or can be switched between cooling and heating modes in milliseconds for precise temperature control. Fabrication and assembly employ techniques routinely used in the semiconductor processing industry. Benefits of the MEMS cooler include scalability to fractions of a millimeter, modularity for increased capacity and staging to low temperatures, simple interfaces, limited failure modes, and minimal induced vibration. The MEMS cooler has potential applications across a broad range of industries such as the biomedical, computer, automotive, and aerospace industries. The basic capabilities it provides can be categorized into four key areas: 1) Extended environmental temperature range in harsh environments; 2) Lower operating temperatures for electronics and other components; 3) Precision spatial and temporal thermal control for temperature-sensitive devices; and 4) The enabling of microsystem devices that require active cooling and/or temperature control. The rapidly expanding capabilities of semiconductor processing in general, and microsystems packaging in particular, present a new opportunity to extend Stirling-cycle cooling to the MEMS domain. The comparatively high capacity and efficiency possible with a MEMS Stirling cooler provides a level of active cooling that is impossible at the microscale with current state-of-the-art techniques. The MEMS cooler technology builds on decades of research at Glenn on Stirling-cycle machines, and capitalizes on Glenn s emerging microsystems capabilities.

  3. Deep Cryogenic Low Power 24 Bits Analog to Digital Converter with Active Reverse Cryostat

    DOE PAGES

    Turqueti, Marcos; Prestemon, Soren; Albright, Robert

    2015-07-15

    LBNL is developing an innovative data acquisition module for superconductive magnets where the front-end electronics and digitizer resides inside the cryostat. This electronic package allows conventional electronic technologies such as enhanced metal–oxide–semiconductor to work inside cryostats at temperatures as low as 4.2 K. This is achieved by careful management of heat inside the module that keeps the electronic envelop at approximately 85 K. This approach avoids all the difficulties that arise from changes in carrier mobility that occur in semiconductors at deep cryogenic temperatures. There are several advantages in utilizing this system. A significant reduction in electrical noise from signalsmore » captured inside the cryostat occurs due to the low temperature that the electronics is immersed in, reducing the thermal noise. The shorter distance that signals are transmitted before digitalization reduces pickup and cross-talk between channels. This improved performance in signal-to-noise rate by itself is a significant advantage. Another important advantage is the simplification of the feedthrough interface on the cryostat head. Data coming out of the cryostat is digital and serial, dramatically reducing the number of lines going through the cryostat feedthrough interface. It is important to notice that all lines coming out of the cryostat are digital and low voltage, reducing the possibility of electric breakdown inside the cryostat. This paper will explain in details the architecture and inner workings of this data acquisition system. It will also provide the performance of the analog to digital converter when the system is immersed in liquid helium, and in liquid nitrogen. Parameters such as power dissipation, integral non-linearity, effective number of bits, signal-to-noise and distortion, will be presented for both temperatures.« less

  4. Semiconductor optoelectronic devices for free-space optical communications

    NASA Technical Reports Server (NTRS)

    Katz, J.

    1983-01-01

    The properties of individual injection lasers are reviewed, and devices of greater complexity are described. These either include or are relevant to monolithic integration configurations of the lasers with their electronic driving circuitry, power combining methods of semiconductor lasers, and electronic methods of steering the radiation patterns of semiconductor lasers and laser arrays. The potential of AlGaAs laser technology for free-space optical communications systems is demonstrated. These solid-state components, which can generate and modulate light, combine the power of a number of sources and perform at least part of the beam pointing functions. Methods are proposed for overcoming the main drawback of semiconductor lasers, that is, their inability to emit the needed amount of optical power in a single-mode operation.

  5. Compact, Interactive Electric Vehicle Charger: Gallium-Nitride Switch Technology for Bi-directional Battery-to-Grid Charger Applications

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    None

    2010-10-01

    ADEPT Project: HRL Laboratories is using gallium nitride (GaN) semiconductors to create battery chargers for electric vehicles (EVs) that are more compact and efficient than traditional EV chargers. Reducing the size and weight of the battery charger is important because it would help improve the overall performance of the EV. GaN semiconductors process electricity faster than the silicon semiconductors used in most conventional EV battery chargers. These high-speed semiconductors can be paired with lighter-weight electrical circuit components, which helps decrease the overall weight of the EV battery charger. HRL Laboratories is combining the performance advantages of GaN semiconductors with anmore » innovative, interactive battery-to-grid energy distribution design. This design would support 2-way power flow, enabling EV battery chargers to not only draw energy from the power grid, but also store and feed energy back into it.« less

  6. Semiconductor systems utilizing materials that form rectifying junctions in both N and P-type doping regions, whether metallurgically or field induced, and methods of use

    DOEpatents

    Welch, James D.

    2000-01-01

    Disclosed are semiconductor systems, such as integrated circuits utilizing Schotky barrier and/or diffused junction technology, which semiconductor systems incorporate material(s) that form rectifying junctions in both metallurgically and/or field induced N and P-type doping regions, and methods of their use. Disclosed are Schottky barrier based inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems and which can be operated as modulators, N and P-channel MOSFETS and CMOS formed therefrom, and (MOS) gate voltage controlled rectification direction and gate voltage controlled switching devices, and use of such material(s) to block parasitic current flow pathways. Simple demonstrative five mask fabrication procedures for inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems are also presented.

  7. Polymer dispensing and embossing technology for the lens type LED packaging

    NASA Astrophysics Data System (ADS)

    Chien, Chien-Lin Chang; Huang, Yu-Che; Hu, Syue-Fong; Chang, Chung-Min; Yip, Ming-Chuen; Fang, Weileun

    2013-06-01

    This study presents a ring-type micro-structure design on the substrate and its corresponding micro fabrication processes for a lens-type light-emitting diode (LED) package. The dome-type or crater-type silicone lenses are achieved by a dispensing and embossing process rather than a molding process. Silicone with a high viscosity and thixotropy index is used as the encapsulant material. The ring-type micro structure is adopted to confine the dispensed silicone encapsulant so as to form the packaged lens. With the architecture and process described, this LED package technology herein has three merits: (1) the flexibility of lens-type LED package designs is enhanced; (2) a dome-type package design is used to enhance the intensity; (3) a crater-type package design is used to enhance the view angle. Measurement results show the ratio between the lens height and lens radius can vary from 0.4 to 1 by changing the volume of dispensed silicone. The view angles of dome-type and crater-type packages can reach 155° ± 5° and 175° ± 5°, respectively. As compared with the commercial plastic leaded chip carrier-type package, the luminous flux of a monochromatic blue light LED is improved by 15% by the dome-type package (improved by 7% by the crater-type package) and the luminous flux of a white light LED is improved by 25% by the dome-type package (improved by 13% by the crater-type package). The luminous flux of monochromatic blue light LED and white light LED are respectively improved by 8% and 12% by the dome-type package as compare with the crater-type package.

  8. Packaging for Food Service

    NASA Technical Reports Server (NTRS)

    Stilwell, E. J.

    1985-01-01

    Most of the key areas of concern in packaging the three principle food forms for the space station were covered. It can be generally concluded that there are no significant voids in packaging materials availability or in current packaging technology. However, it must also be concluded that the process by which packaging decisions are made for the space station feeding program will be very synergistic. Packaging selection will depend heavily on the preparation mechanics, the preferred presentation and the achievable disposal systems. It will be important that packaging be considered as an integral part of each decision as these systems are developed.

  9. Japan's technology and manufacturing infrastructure

    NASA Astrophysics Data System (ADS)

    Boulton, William R.; Meieran, Eugene S.; Tummala, Rao R.

    1995-02-01

    The JTEC panel found that, after four decades of development in electronics and manufacturing technologies, Japanese electronics companies are leaders in the development, support, and management of complex, low-cost packaging and assembly technologies used in the production of a broad range of consumer electronics products. The electronics industry's suppliers provide basic materials and equipment required for electronic packaging applications. Panelists concluded that some Japanese firms could be leading U.S. competitors by as much as a decade in these areas. Japan's technology and manufacturing infrastructure is an integral part of its microelectronics industry's success.

  10. Japan's technology and manufacturing infrastructure

    NASA Technical Reports Server (NTRS)

    Boulton, William R.; Meieran, Eugene S.; Tummala, Rao R.

    1995-01-01

    The JTEC panel found that, after four decades of development in electronics and manufacturing technologies, Japanese electronics companies are leaders in the development, support, and management of complex, low-cost packaging and assembly technologies used in the production of a broad range of consumer electronics products. The electronics industry's suppliers provide basic materials and equipment required for electronic packaging applications. Panelists concluded that some Japanese firms could be leading U.S. competitors by as much as a decade in these areas. Japan's technology and manufacturing infrastructure is an integral part of its microelectronics industry's success.

  11. Information Technology and the Third Industrial Revolution.

    ERIC Educational Resources Information Center

    Fitzsimmons, Joe

    1994-01-01

    Discusses the so-called third industrial revolution, or the information revolution. Topics addressed include the progression of the revolution in the U.S. economy, in Europe, and in Third World countries; the empowering technologies, including digital switches, optical fiber, semiconductors, CD-ROM, networks, and combining technologies; and future…

  12. Ferroelectrics for semiconductor devices

    NASA Astrophysics Data System (ADS)

    Sayer, M.; Wu, Z.; Vasant Kumar, C. V. R.; Amm, D. T.; Griswold, E. M.

    1992-11-01

    The technology for the implementation of the integration of thin film ferroelectrics with silicon processing for various devices is described, and factors affecting the integration of ferroelectric films with semiconductor processing are discussed. Consideration is also given to film properties, the properties of electrode materials and structures, and the phenomena of ferroelectric fatigue and aging. Particular attention is given to the nonmemory device application of ferroelectrics.

  13. Photonic Arbitrary Waveform Generation Technology

    DTIC Science & Technology

    2006-06-01

    locked external- cavity semiconductor diode ring laser “, Optics Letters, Vol. 27, No. 9 , 719-721, (2002). [22] S. Gee, F. Quinlan, S. Ozharar... optical pulses that one is accustomed to. Modelocked semiconductor lasers are used to generate a set of phase locked optical frequencies on a periodic...The corresponding optical spectrum of the laser consists of a comb of periodically spaced, phase - locked

  14. Improvement of screening methods for silicon planar semiconductor devices

    NASA Technical Reports Server (NTRS)

    Berger, W. M.

    1972-01-01

    The results of the program for the development of a more sensitive method for selecting silicon planar semiconductor devices for long life applications are reported. The manufacturing technologies (MOS and Bipolar) are discussed along with the screening procedures developed as a result of the tests and evaluations, and the effectiveness of the MOS and Bilayer screening procedures are evaluated.

  15. Comparison of TAPS Packages for Engineering

    ERIC Educational Resources Information Center

    Sidhu, S. Manjit

    2008-01-01

    Purpose: This paper aims to present the development of technology-assisted problem solving (TAPS) packages at University Tenaga Nasional (UNITEN). The project is the further work of the development of interactive multimedia based packages targeted for students having problems in understanding the subject of engineering mechanics dynamics.…

  16. 10 CFR 431.92 - Definitions concerning commercial air conditioners and heat pumps.

    Code of Federal Regulations, 2014 CFR

    2014-01-01

    ... measurement. Commercial package air-conditioning and heating equipment means air-cooled, water-cooled... Conditioner means a basic model of commercial package air-conditioning and heating equipment (packaged or split) that is: Used in computer rooms, data processing rooms, or other information technology cooling...

  17. Apparatus and methods for packaging integrated circuit chips with antenna modules providing closed electromagnetic environment for integrated antennas

    NASA Technical Reports Server (NTRS)

    Gaucher, Brian P. (Inventor); Grzyb, Janusz (Inventor); Liu, Duixian (Inventor); Pfeiffer, Ullrich R. (Inventor)

    2008-01-01

    Apparatus and methods are provided for packaging IC chips together with integrated antenna modules designed to provide a closed EM (electromagnetic) environment for antenna radiators, thereby allowing antennas to be designed independent from the packaging technology.

  18. Technology Instructional Package Mediated Instruction and Senior Secondary School Students' Academic Performance in Biology Concepts

    ERIC Educational Resources Information Center

    Yaki, Akawo Angwal; Babagana, Mohammed

    2016-01-01

    The paper examined the effects of a Technological Instructional Package (TIP) on secondary school students' performance in biology. The study adopted a pre-test, post-test experimental control group design. The sample size of the study was 80 students from Minna metropolis, Niger state, Nigeria; the samples were randomly assigned into treatment…

  19. Using a Computerised Graphics Package to Achieve a Technology-Oriented Classroom

    ERIC Educational Resources Information Center

    Aladejana, Francisca; Idowu, Lanre

    2009-01-01

    The present situation in Nigeria involves students of fine arts, a practical-oriented subject, being exposed to poor methods of teaching with consequent poor performances. This study examined the extent to which the use of a computerised graphics package could make the classroom technology-oriented and affect the performance of learners. This is…

  20. Technology transfer package on seismic base isolation - Volume II

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    NONE

    1995-02-14

    This Technology Transfer Package provides some detailed information for the U.S. Department of Energy (DOE) and its contractors about seismic base isolation. Intended users of this three-volume package are DOE Design and Safety Engineers as well as DOE Facility Managers who are responsible for reducing the effects of natural phenomena hazards (NPH), specifically earthquakes, on their facilities. The package was developed as part of DOE's efforts to study and implement techniques for protecting lives and property from the effects of natural phenomena and to support the International Decade for Natural Disaster Reduction. Volume II contains the proceedings for the Shortmore » Course on Seismic Base Isolation held in Berkeley, California, August 10-14, 1992.« less

  1. Innovative on-chip packaging applied to uncooled IRFPA

    NASA Astrophysics Data System (ADS)

    Dumont, Geoffroy; Arnaud, Agnès; Imperinetti, Pierre; Mottin, Eric; Simoens, François; Vialle, Claire; Rabaud, Wilfried; Grand, Gilles; Baclet, Nathalie

    2008-03-01

    The Laboratoire Infrarouge (LIR) of the Laboratoire d'Electronique et de Technologie de l'Information (LETI) has been involved in the development of microbolometers for over fifteen years. Two generations of technology have been transferred to ULIS and LETI is still working to improve performances of low cost detectors. Simultaneously, packaging still represents a significant part of detectors price. Reducing production costs would contribute to keep on extending applications of uncooled IRFPA to high volume markets like automotive. Therefore LETI develops an onchip packaging technology dedicated to microbolometers. The efficiency of a micropackaging technology for microbolometers relies on two major technical specifications. First, it must include an optical window with a high transmittance for the IR band, so as to maximize the detector absorption. Secondly, in order to preserve the thermal insulation of the detector, the micropackaging must be hermetically closed to maintain a vacuum level lower than 10 -3mbar. This paper presents an original microcap structure that enables the use of IR window materials as sealing layers to maintain the expected vacuum level. The modelling and integration of an IR window suitable for this structure is also presented. This zero level packaging technology is performed in a standard collective way, in continuation of bolometers' technology. The CEA-LETI, MINATEC presents status of these developments concerning this innovating technology including optical simulations results and SEM views of technical realizations.

  2. Canputer Science and Technology: Introduction to Software Packages

    DTIC Science & Technology

    1984-04-01

    Table 5 Sources of Software Packages.20 Table 6 Reference Services Matrix . 33 Table 7 Reference Matrix.40 LIST OF FIGURES Figure 1 Document...consideration should be given to the acquisition of appropriate software packages to replace or upgrade existing services and to provide services not...Consequently, there are many companies that produce only software packages, and are committed to providing training, service , and support. These vendors

  3. Packaging Technologies for High Temperature Electronics and Sensors

    NASA Technical Reports Server (NTRS)

    Chen, Liang-Yu; Hunter, Gary W.; Neudeck, Philip G.; Beheim, Glenn M.; Spry, David J.; Meredith, Roger D.

    2013-01-01

    This paper reviews ceramic substrates and thick-film metallization based packaging technologies in development for 500 C silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chip-level packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550 C. A 96% alumina based edge connector for a PCB level subsystem interconnection has also been demonstrated recently. The 96% alumina packaging system composed of chip-level packages and PCBs has been tested with high temperature SiC devices at 500 C for over 10,000 hours. In addition to tests in a laboratory environment, a SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE-7 suite to the International Space Station via a Shuttle mission. This packaged SiC transistor was successfully tested in orbit for eighteen months. A spark-plug type sensor package designed for high temperature SiC capacitive pressure sensors was developed. This sensor package combines the high temperature interconnection system with a commercial high temperature high pressure stainless steel seal gland (electrical feed-through). Test results of a packaged high temperature capacitive pressure sensor at 500 C are also discussed. In addition to the pressure sensor package, efforts for packaging high temperature SiC diode-based gas chemical sensors are in process.

  4. Packaging Technologies for High Temperature Electronics and Sensors

    NASA Technical Reports Server (NTRS)

    Chen, Liangyu; Hunter, Gary W.; Neudeck, Philip G.; Beheim, Glenn M.; Spry, David J.; Meredith, Roger D.

    2013-01-01

    This paper reviews ceramic substrates and thick-film metallization based packaging technologies in development for 500degC silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chiplevel packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550degC. A 96% alumina based edge connector for a PCB level subsystem interconnection has also been demonstrated recently. The 96% alumina packaging system composed of chip-level packages and PCBs has been tested with high temperature SiC devices at 500degC for over 10,000 hours. In addition to tests in a laboratory environment, a SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE-7 suite to the International Space Station via a Shuttle mission. This packaged SiC transistor was successfully tested in orbit for eighteen months. A spark-plug type sensor package designed for high temperature SiC capacitive pressure sensors was developed. This sensor package combines the high temperature interconnection system with a commercial high temperature high pressure stainless steel seal gland (electrical feed-through). Test results of a packaged high temperature capacitive pressure sensor at 500degC are also discussed. In addition to the pressure sensor package, efforts for packaging high temperature SiC diode-based gas chemical sensors are in process.

  5. Short communication: Effect of active food packaging materials on fluid milk quality and shelf life.

    PubMed

    Wong, Dana E; Goddard, Julie M

    2014-01-01

    Active packaging, in which active agents are embedded into or on the surface of food packaging materials, can enhance the nutritive value, economics, and stability of food, as well as enable in-package processing. In one embodiment of active food packaging, lactase was covalently immobilized onto packaging films for in-package lactose hydrolysis. In prior work, lactase was covalently bound to low-density polyethylene using polyethyleneimine and glutaraldehyde cross-linkers to form the packaging film. Because of the potential contaminants of proteases, lipases, and spoilage organisms in typical enzyme preparations, the goal of the current work was to determine the effect of immobilized-lactase active packaging technology on unanticipated side effects, such as shortened shelf-life and reduced product quality. Results suggested no evidence of lipase or protease activity on the active packaging films, indicating that such active packaging films could enable in-package lactose hydrolysis without adversely affecting product quality in terms of dairy protein or lipid stability. Storage stability studies indicated that lactase did not migrate from the film over a 49-d period, and that dry storage resulted in 13.41% retained activity, whereas wet storage conditions enabled retention of 62.52% activity. Results of a standard plate count indicated that the film modification reagents introduced minor microbial contamination; however, the microbial population remained under the 20,000 cfu/mL limit through the manufacturer's suggested 14-d storage period for all film samples. This suggests that commercially produced immobilized lactase active packaging should use purified cross-linkers and enzymes. Characterization of unanticipated effects of active packaging on food quality reported here is important in demonstrating the commercial potential of such technologies. Copyright © 2014 American Dairy Science Association. Published by Elsevier Inc. All rights reserved.

  6. Metrology-based control and profitability in the semiconductor industry

    NASA Astrophysics Data System (ADS)

    Weber, Charles

    2001-06-01

    This paper summarizes three studies of the semiconductor industry conducted at SEMATECH and MIT's Sloan School of Management. In conjunction they lead to the conclusion that rapid problem solving is an essential component of profitability in the semiconductor industry, and that metrology-based control is instrumental to rapid problem solving. The studies also identify the need for defect attribution. Once a source of a defect has been identified, the appropriate resources--human and technological--need to be brought into the physically optimal location for corrective action. The Internet is likely to enable effective defect attribution by inducing collaboration between different companies.

  7. Ring resonator based narrow-linewidth semiconductor lasers

    NASA Technical Reports Server (NTRS)

    Ksendzov, Alexander (Inventor)

    2005-01-01

    The present invention is a method and apparatus for using ring resonators to produce narrow linewidth hybrid semiconductor lasers. According to one embodiment of the present invention, the narrow linewidths are produced by combining the semiconductor gain chip with a narrow pass band external feedback element. The semi conductor laser is produced using a ring resonator which, combined with a Bragg grating, acts as the external feedback element. According to another embodiment of the present invention, the proposed integrated optics ring resonator is based on plasma enhanced chemical vapor deposition (PECVD) SiO.sub.2 /SiON/SiO.sub.2 waveguide technology.

  8. Semiconductor Ion Implanters

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    MacKinnon, Barry A.; Ruffell, John P.

    In 1953 the Raytheon CK722 transistor was priced at $7.60. Based upon this, an Intel Xeon Quad Core processor containing 820,000,000 transistors should list at $6.2 billion. Particle accelerator technology plays an important part in the remarkable story of why that Intel product can be purchased today for a few hundred dollars. Most people of the mid twentieth century would be astonished at the ubiquity of semiconductors in the products we now buy and use every day. Though relatively expensive in the nineteen fifties they now exist in a wide range of items from high-end multicore microprocessors like the Intelmore » product to disposable items containing 'only' hundreds or thousands like RFID chips and talking greeting cards. This historical development has been fueled by continuous advancement of the several individual technologies involved in the production of semiconductor devices including Ion Implantation and the charged particle beamlines at the heart of implant machines. In the course of its 40 year development, the worldwide implanter industry has reached annual sales levels around $2B, installed thousands of dedicated machines and directly employs thousands of workers. It represents in all these measures, as much and possibly more than any other industrial application of particle accelerator technology. This presentation discusses the history of implanter development. It touches on some of the people involved and on some of the developmental changes and challenges imposed as the requirements of the semiconductor industry evolved.« less

  9. Deep sub-micron low-Tc Josephson technology - The opportunities and the challenges

    NASA Astrophysics Data System (ADS)

    Ketchen, M. B.

    1993-03-01

    It is suggested that the possibility now exists of highly leveraging existing semiconductor technology to explore submicrometer Josephson technology. Some of the opportunities and challenges of such an undertaking are discussed in the context of SQUIDs and digital applications. In the area of digital Josephson, a 50-100-ps cycle-time 64-b reduced instruction set computer (RISC) microprocessor is proposed as a long-term goal. While it is unlikely that one will see a sub-100-ps system like this in the near term, research results supporting its feasibility may ultimately help build the case for the resources needed to produce it. Fabrication has been and will probably continue to be an impediment to the exploration of sub- and deep sub-micrometer Josephson technology. Coupling to existing semiconductor fabrication capability should help considerably in this area and should help to lay the groundwork for eventual manufacturing of sub-micrometer Josephson products.

  10. An evaluation of the effectiveness of FreshCase technology to extend the storage life of whole muscle beef and ground beef.

    PubMed

    Yang, X; Woerner, D R; Hasty, J D; McCullough, K R; Geornaras, I; Sofos, J N; Belk, K E

    2016-11-01

    The objective of this study was to identify the maximum time of refrigerated storage before aerobic psychrotrophic bacteria (APB) grew to a level indicative of spoilage (7 log cfu/g) or other indicators of spoilage were observed for whole muscle beef and ground beef packaged using FreshCase technology. Storage life for beef steaks stored in FreshCase packages at 4°C was 36 d, with ground beef stored in FreshCase packages at 4°C lasting 10 d. Additionally, greater ( < 0.05) a* (redness) values were detected in FreshCase packaged samples of both beef steaks and ground beef over storage time. At the point of spoilage, off-odors were detected at very low levels in all samples along with low thiobarbituric acid values (< 2 mg malonaldehyde/kg). Therefore, use of FreshCase technology in whole muscle beef and ground beef is a viable option to extend storage life.

  11. Packaging and testing of multi-wavelength DFB laser array using REC technology

    NASA Astrophysics Data System (ADS)

    Ni, Yi; Kong, Xuan; Gu, Xiaofeng; Chen, Xiangfei; Zheng, Guanghui; Luan, Jia

    2014-02-01

    Packaging of distributed feedback (DFB) laser array based on reconstruction-equivalent-chirp (REC) technology is a bridge from chip to system, and influences the practical process of REC chip. In this paper, DFB laser arrays of 4-channel @1310 nm and 8-channel @1550 nm are packaged. Our experimental results show that both these laser arrays have uniform wavelength spacing and larger than 35 dB average Side Mode Suppression Ratio (SMSR). When I=35 mA, we obtain the total output power of 1 mW for 4-channel @1310 nm, and 227 μw for 8-channel @1550 nm respectively. The high frequency characteristics of the packaged chips are also obtained, and the requirements for 4×10 G or even 8×10 G systems can be reached. Our results demonstrate the practical and low cost performance of REC technology and indicate its potential in the future fiber-to-the-home (FTTH) application.

  12. Nanotechnology: An Untapped Resource for Food Packaging.

    PubMed

    Sharma, Chetan; Dhiman, Romika; Rokana, Namita; Panwar, Harsh

    2017-01-01

    Food commodities are packaged and hygienically transported to protect and preserve them from any un-acceptable alteration in quality, before reaching the end-consumer. Food packaging continues to evolve along-with the innovations in material science and technology, as well as in light of consumer's demand. Presently, the modern consumers of competitive economies demands for food with natural quality, assured safety, minimal processing, extended shelf-life and ready-to-eat concept. Innovative packaging systems, not only ascertains transit preservation and effective distribution, but also facilitates communication at the consumer levels. The technological advances in the domain of food packaging in twenty-first century are mainly chaired by nanotechnology, the science of nano-materials. Nanotechnology manipulates and creates nanometer scale materials, of commercial and scientific relevance. Introduction of nanotechnology in food packaging sector has significantly addressed the food quality, safety and stability concerns. Besides, nanotechnology based packaging intimate's consumers about the real time quality of food product. Additionally, nanotechnology has been explored for controlled release of preservatives/antimicrobials, extending the product shelf life within the package. The promising reports for nanotechnology interventions in food packaging have established this as an independent priority research area. Nanoparticles based food packages offer improved barrier and mechanical properties, along with food preservation and have gained welcoming response from market and end users. In contrary, recent advances and up-liftment in this area have raised various ethical, environmental and safety concerns. Policies and regulation regarding nanoparticles incorporation in food packaging are being reviewed. This review presents the existing knowledge, recent advances, concerns and future applications of nanotechnology in food packaging sector.

  13. Nanotechnology: An Untapped Resource for Food Packaging

    PubMed Central

    Sharma, Chetan; Dhiman, Romika; Rokana, Namita; Panwar, Harsh

    2017-01-01

    Food commodities are packaged and hygienically transported to protect and preserve them from any un-acceptable alteration in quality, before reaching the end-consumer. Food packaging continues to evolve along-with the innovations in material science and technology, as well as in light of consumer's demand. Presently, the modern consumers of competitive economies demands for food with natural quality, assured safety, minimal processing, extended shelf-life and ready-to-eat concept. Innovative packaging systems, not only ascertains transit preservation and effective distribution, but also facilitates communication at the consumer levels. The technological advances in the domain of food packaging in twenty-first century are mainly chaired by nanotechnology, the science of nano-materials. Nanotechnology manipulates and creates nanometer scale materials, of commercial and scientific relevance. Introduction of nanotechnology in food packaging sector has significantly addressed the food quality, safety and stability concerns. Besides, nanotechnology based packaging intimate's consumers about the real time quality of food product. Additionally, nanotechnology has been explored for controlled release of preservatives/antimicrobials, extending the product shelf life within the package. The promising reports for nanotechnology interventions in food packaging have established this as an independent priority research area. Nanoparticles based food packages offer improved barrier and mechanical properties, along with food preservation and have gained welcoming response from market and end users. In contrary, recent advances and up-liftment in this area have raised various ethical, environmental and safety concerns. Policies and regulation regarding nanoparticles incorporation in food packaging are being reviewed. This review presents the existing knowledge, recent advances, concerns and future applications of nanotechnology in food packaging sector. PMID:28955314

  14. Life testing of reflowed and reworked advanced CCGA surface mount packages in harsh thermal environments

    NASA Astrophysics Data System (ADS)

    Ramesham, Rajeshuni

    2013-03-01

    Life testing/qualification of reflowed (1st reflow) and reworked (1st reflow, 1st removal, and then 1st rework) advanced ceramic column grid array (CCGA) surface mount interconnect electronic packaging technologies for future flight projects has been studied to enhance the mission assurance of JPL-NASA projects. The reliability of reworked/reflowed surface mount technology (SMT) packages is very important for short-duration and long-duration deep space harsh extreme thermal environmental missions. The life testing of CCGA electronic packages under extreme thermal environments (for example: -185°C to +125°C) has been performed with reference to various JPL/NASA project requirements which encompass the temperature range studied. The test boards of reflowed and reworked CCGA packages (717 Xilinx package, 624, 1152, and 1272 column Actel Packages) were selected for the study to survive three times the total number of expected temperature cycles resulting from all environmental and operational exposures occurring over the life of the flight hardware including all relevant manufacturing, ground operations, and mission phases or cycles to failure to assess the life of the hardware. Qualification/life testing was performed by subjecting test boards to the environmental harsh temperature extremes and assessing any structural failures, mechanical failures or degradation in electrical performance solder-joint failures due to either overstress or thermal cycle fatigue. The large, high density, high input/output (I/O) electronic interconnect SMT packages such as CCGA have increased usage in avionics hardware of NASA projects during the last two decades. The test boards built with CCGA packages are expensive and often require a rework to replace a reflowed, reprogrammed, failed, redesigned, etc., CCGA packages. Theoretically speaking, a good rework process should have similar temperature-time profile as that used for the original manufacturing process of solder reflow. A multiple rework processes may be implemented with CCGA packaging technology to understand the effect of number of reworks on the reliability of this technology for harsh thermal environments. In general, reliability of the assembled electronic packages reduces as a function of number of reworks and the extent is not known yet. A CCGA rework process has been tried and implemented to design a daisy-chain test board consists of 624 and 717 packages. Reworked CCGA interconnect electronic packages of printed wiring polyimide boards have been assembled and inspected using non-destructive x-ray imaging and optical microscope techniques. The assembled boards after 1st rework and 1st reflow were subjected to extreme temperature thermal atmospheric cycling to assess their reliability for future deep space JPL/NASA for moderate to harsh thermal mission environments. The resistance of daisy-chained interconnect sections were monitored continuously during thermal cycling to determine intermittent failures. This paper provides the experimental reliability test results to failure of assemblies for the first time of reflowed and reworked CCGA packages under extreme harsh thermal environments.

  15. Nano-scale measurement of biomolecules by optical microscopy and semiconductor nanoparticles

    PubMed Central

    Ichimura, Taro; Jin, Takashi; Fujita, Hideaki; Higuchi, Hideo; Watanabe, Tomonobu M.

    2014-01-01

    Over the past decade, great developments in optical microscopy have made this technology increasingly compatible with biological studies. Fluorescence microscopy has especially contributed to investigating the dynamic behaviors of live specimens and can now resolve objects with nanometer precision and resolution due to super-resolution imaging. Additionally, single particle tracking provides information on the dynamics of individual proteins at the nanometer scale both in vitro and in cells. Complementing advances in microscopy technologies has been the development of fluorescent probes. The quantum dot, a semi-conductor fluorescent nanoparticle, is particularly suitable for single particle tracking and super-resolution imaging. This article overviews the principles of single particle tracking and super resolution along with describing their application to the nanometer measurement/observation of biological systems when combined with quantum dot technologies. PMID:25120488

  16. EDITORIAL: Semiconductor lasers: the first fifty years Semiconductor lasers: the first fifty years

    NASA Astrophysics Data System (ADS)

    Calvez, S.; Adams, M. J.

    2012-09-01

    Anniversaries call for celebrations. Since it is now fifty years since the first semiconductor lasers were reported, it is highly appropriate to celebrate this anniversary with a Special Issue dedicated to the topic. The semiconductor laser now has a major effect on our daily lives since it has been a key enabler in the development of optical fibre communications (and hence the internet and e-mail), optical storage (CDs, DVDs, etc) and barcode scanners. In the early 1960s it was impossible for most people (with the exception of very few visionaries) to foresee any of these future developments, and the first applications identified were for military purposes (range-finders, target markers, etc). Of course, many of the subsequent laser applications were made possible by developments in semiconductor materials, in the associated growth and fabrication technology, and in the increased understanding of the underlying fundamental physics. These developments continue today, so that the subject of semiconductor lasers, although mature, is in good health and continues to grow. Hence, we can be confident that the pervasive influence of semiconductor lasers will continue to develop as optoelectronics technology makes further advances into other sectors such as healthcare, security and a whole host of applications based on the global imperatives to reduce energy consumption, minimise environmental impact and conserve resources. The papers in this Special Issue are intended to tell some of the story of the last fifty years of laser development as well as to provide evidence of the current state of semiconductor laser research. Hence, there are a number of papers where the early developments are recalled by authors who played prominent parts in the story, followed by a selection of papers from authors who are active in today's exciting research. The twenty-fifth anniversary of the semiconductor laser was celebrated by the publication of a number of papers dealing with the early achievements in the June 1987 Special Issue of IEEE Journal of Quantum Electronics. The Millennium Issue of IEEE Journal of Selected Topics in Quantum Electronics presented a further set of articles on historical aspects of the subject as well as a 'snapshot' of current research in June 2000. It is not the intention here to duplicate any of this historical material that is already available, but rather to complement it with personal recollections from researchers who were involved in laser development in the USA, France, Russia and the UK. Hence, in addition to fascinating accounts of the discovery of the theoretical condition for stimulated emission from semiconductors and of the pioneering work at IBM, there are two complementary views of the laser research at the Lebedev Institute, and personal insights into the developments at STL and at Bell Laboratories. These are followed by an account of the scientific and technological connections between the early pioneering breakthroughs and the commercialisation of semiconductor laser products. Turning to the papers from today's researchers, there is coverage of many of the current 'hot' topics including quantum cascade lasers, mid-infrared lasers, high-power lasers, the exciting developments in understanding and exploiting the nonlinear dynamics of lasers, and photonic integrated circuits with extremely high communication data capacity, as well as reports of recent progress on laser materials such as dilute nitrides and bismides, photonic crystals, quantum dots and organic semiconductors. Thanks are due to Jarlath McKenna for sterling support from IOP Publishing and to Peter Blood for instigating this Special Issue and inviting us to serve as Guest Editors.

  17. Technology transfer initiatives

    NASA Technical Reports Server (NTRS)

    Mccain, Wayne; Schroer, Bernard J.; Ziemke, M. Carl

    1994-01-01

    This report summarizes the University of Alabama in Huntsville (UAH) technology transfer activities with the Marshall Space Flight Center (MSFC) for the period of April 1993 through December 1993. Early in 1993, the MSFC/TUO and UAH conceived of the concept of developing stand-alone, integrated data packages on MSFC technology that would serve industrial needs previously determined to be critical. Furthermore, after reviewing over 500 problem statements received by MSFC, it became obvious that many of these requests could be satisfied by a standard type of response. As a result, UAH has developed two critical area response (CAR) packages: CFC (chlorofluorocarbon) replacements and modular manufacturing and simulation. Publicity included news releases, seminars, articles and conference papers. The Huntsville Chamber of Commerce established the Technology Transfer Subcommittee with the charge to identify approaches for the Chamber to assist its members, as well as non-members, access to the technologies at the federal laboratories in North Alabama. The Birmingham Chamber of Commerce has expressed interest in establishing a similar technology transfer program. This report concludes with a section containing a tabulation of the problem statements, including CAR packages, submitted to MSFC from January 1992 through December 1993.

  18. Cavity-Mediated Coherent Coupling between Distant Quantum Dots

    NASA Astrophysics Data System (ADS)

    Nicolí, Giorgio; Ferguson, Michael Sven; Rössler, Clemens; Wolfertz, Alexander; Blatter, Gianni; Ihn, Thomas; Ensslin, Klaus; Reichl, Christian; Wegscheider, Werner; Zilberberg, Oded

    2018-06-01

    Scalable architectures for quantum information technologies require one to selectively couple long-distance qubits while suppressing environmental noise and cross talk. In semiconductor materials, the coherent coupling of a single spin on a quantum dot to a cavity hosting fermionic modes offers a new solution to this technological challenge. Here, we demonstrate coherent coupling between two spatially separated quantum dots using an electronic cavity design that takes advantage of whispering-gallery modes in a two-dimensional electron gas. The cavity-mediated, long-distance coupling effectively minimizes undesirable direct cross talk between the dots and defines a scalable architecture for all-electronic semiconductor-based quantum information processing.

  19. The Fundamentals of Using the Digital Micromirror Device (DMD(TM)) for Projection Display

    NASA Technical Reports Server (NTRS)

    Yoder, Lars A.

    1995-01-01

    Developed by Texas Instruments (TI) the digital micromirror device (DMD(tm)) is a quickly emerging and highly useful micro-electro-mechanical structures (MEMS) device. Using standard semiconductor fabrication technology, the DMD's simplicity in concept and design will provide advantageous solutions for many different applications. At the rudimentary level, the DMD is a precision, semiconductor light switch. In the initial commercial development of DMD technology, TI has concentrated on projection display and hardcopy. This paper will focus on how the DMD is used for projection display. Other application areas are being explored and evaluated to find appropriate and beneficial uses for the DMD.

  20. Polycrystalline silicon study: Low-cost silicon refining technology prospects and semiconductor-grade polycrystalline silicon availability through 1988

    NASA Technical Reports Server (NTRS)

    Costogue, E. N.; Ferber, R.; Lutwack, R.; Lorenz, J. H.; Pellin, R.

    1984-01-01

    Photovoltaic arrays that convert solar energy into electrical energy can become a cost effective bulk energy generation alternative, provided that an adequate supply of low cost materials is available. One of the key requirements for economic photovoltaic cells is reasonably priced silicon. At present, the photovoltaic industry is dependent upon polycrystalline silicon refined by the Siemens process primarily for integrated circuits, power devices, and discrete semiconductor devices. This dependency is expected to continue until the DOE sponsored low cost silicon refining technology developments have matured to the point where they are in commercial use. The photovoltaic industry can then develop its own source of supply. Silicon material availability and market pricing projections through 1988 are updated based on data collected early in 1984. The silicon refining industry plans to meet the increasing demands of the semiconductor device and photovoltaic product industries are overviewed. In addition, the DOE sponsored technology research for producing low cost polycrystalline silicon, probabilistic cost analysis for the two most promising production processes for achieving the DOE cost goals, and the impacts of the DOE photovoltaics program silicon refining research upon the commercial polycrystalline silicon refining industry are addressed.

  1. Fresh meat packaging: consumer acceptance of modified atmosphere packaging including carbon monoxide.

    PubMed

    Grebitus, Carola; Jensen, Helen H; Roosen, Jutta; Sebranek, Joseph G

    2013-01-01

    Consumers' perceptions and evaluations of meat quality attributes such as color and shelf life influence purchasing decisions, and these product attributes can be affected by the type of fresh meat packaging system. Modified atmosphere packaging (MAP) extends the shelf life of fresh meat and, with the inclusion of carbon monoxide (CO-MAP), achieves significant color stabilization. The objective of this study was to assess whether consumers would accept specific packaging technologies and what value consumers place on ground beef packaged under various atmospheres when their choices involved the attributes of color and shelf life. The study used nonhypothetical consumer choice experiments to determine the premiums that consumers are willing to pay for extended shelf life resulting from MAP and for the "cherry red" color in meat resulting from CO-MAP. The experimental design allowed determination of whether consumers would discount foods with MAP or CO-MAP when (i) they are given more detailed information about the technologies and (ii) they have different levels of individual knowledge and media exposure. The empirical analysis was conducted using multinomial logit models. Results indicate that consumers prefer an extension of shelf life as long as the applied technology is known and understood. Consumers had clear preferences for brighter (aerobic and CO) red color and were willing to pay $0.16/lb ($0.35/kg) for each level of change to the preferred color. More information on MAP for extending the shelf life and on CO-MAP for stabilizing color decreased consumers' willingness to pay. An increase in personal knowledge and media exposure influenced acceptance of CO-MAP negatively. The results provide quantitative measures of how packaging affects consumers' acceptance and willingness to pay for products. Such information can benefit food producers and retailers who make decisions about investing in new packaging methods.

  2. A multimedia adult literacy program: Combining NASA technology, instructional design theory, and authentic literacy concepts

    NASA Technical Reports Server (NTRS)

    Willis, Jerry W.

    1993-01-01

    For a number of years, the Software Technology Branch of the Information Systems Directorate has been involved in the application of cutting edge hardware and software technologies to instructional tasks related to NASA projects. The branch has developed intelligent computer aided training shells, instructional applications of virtual reality and multimedia, and computer-based instructional packages that use fuzzy logic for both instructional and diagnostic decision making. One outcome of the work on space-related technology-supported instruction has been the creation of a significant pool of human talent in the branch with current expertise on the cutting edges of instructional technologies. When the human talent is combined with advanced technologies for graphics, sound, video, CD-ROM, and high speed computing, the result is a powerful research and development group that both contributes to the applied foundations of instructional technology and creates effective instructional packages that take advantage of a range of advanced technologies. Several branch projects are currently underway that combine NASA-developed expertise to significant instructional problems in public education. The branch, for example, has developed intelligent computer aided software to help high school students learn physics and staff are currently working on a project to produce educational software for young children with language deficits. This report deals with another project, the adult literacy tutor. Unfortunately, while there are a number of computer-based instructional packages available for adult literacy instruction, most of them are based on the same instructional models that failed these students when they were in school. The teacher-centered, discrete skill and drill-oriented, instructional strategies, even when they are supported by color computer graphics and animation, that form the foundation for most of the computer-based literacy packages currently on the market may not be the most effective or most desirable way to use computer technology in literacy programs. This project is developing a series of instructional packages that are based on a different instructional model - authentic instruction. The instructional development model used to create these packages is also different. Instead of using the traditional five stage linear, sequential model based on behavioral learning theory, the project uses the recursive, reflective design and development model (R2D2) that is based on cognitive learning theory, particularly the social constructivism of Vygotsky, and an epistemology based on critical theory. Using alternative instructional and instructional development theories, the result of the summer faculty fellowship is LiteraCity, a multimedia adult literacy instructional package that is a simulation of finding and applying for a job. The program, which is about 120 megabytes, is distributed on CD-ROM.

  3. Solution-Processed Donor-Acceptor Polymer Nanowire Network Semiconductors For High-Performance Field-Effect Transistors

    PubMed Central

    Lei, Yanlian; Deng, Ping; Li, Jun; Lin, Ming; Zhu, Furong; Ng, Tsz-Wai; Lee, Chun-Sing; Ong, Beng S.

    2016-01-01

    Organic field-effect transistors (OFETs) represent a low-cost transistor technology for creating next-generation large-area, flexible and ultra-low-cost electronics. Conjugated electron donor-acceptor (D-A) polymers have surfaced as ideal channel semiconductor candidates for OFETs. However, high-molecular weight (MW) D-A polymer semiconductors, which offer high field-effect mobility, generally suffer from processing complications due to limited solubility. Conversely, the readily soluble, low-MW D-A polymers give low mobility. We report herein a facile solution process which transformed a lower-MW, low-mobility diketopyrrolopyrrole-dithienylthieno[3,2-b]thiophene (I) into a high crystalline order and high-mobility semiconductor for OFETs applications. The process involved solution fabrication of a channel semiconductor film from a lower-MW (I) and polystyrene blends. With the help of cooperative shifting motion of polystyrene chain segments, (I) readily self-assembled and crystallized out in the polystyrene matrix as an interpenetrating, nanowire semiconductor network, providing significantly enhanced mobility (over 8 cm2V−1s−1), on/off ratio (107), and other desirable field-effect properties that meet impactful OFET application requirements. PMID:27091315

  4. Metal-optic and Plasmonic Semiconductor-based Nanolasers

    DTIC Science & Technology

    2012-05-07

    provides a means to integrate laser sources for silicon photonics technology. Using wafer bonding techniques, the metal- clad nanocavity can be integrated...SUPPLEMENTARY NOTES 14. ABSTRACT Over the past few decades, semiconductor lasers have relentlessly followed the path towards miniaturization...Smaller lasers are more energy e cient, are cheaper to make, and open up new applications in sensing and displays, among many other things. Yet, up until

  5. Oxide semiconductor thin-film transistors: a review of recent advances.

    PubMed

    Fortunato, E; Barquinha, P; Martins, R

    2012-06-12

    Transparent electronics is today one of the most advanced topics for a wide range of device applications. The key components are wide bandgap semiconductors, where oxides of different origins play an important role, not only as passive component but also as active component, similar to what is observed in conventional semiconductors like silicon. Transparent electronics has gained special attention during the last few years and is today established as one of the most promising technologies for leading the next generation of flat panel display due to its excellent electronic performance. In this paper the recent progress in n- and p-type oxide based thin-film transistors (TFT) is reviewed, with special emphasis on solution-processed and p-type, and the major milestones already achieved with this emerging and very promising technology are summarizeed. After a short introduction where the main advantages of these semiconductors are presented, as well as the industry expectations, the beautiful history of TFTs is revisited, including the main landmarks in the last 80 years, finishing by referring to some papers that have played an important role in shaping transparent electronics. Then, an overview is presented of state of the art n-type TFTs processed by physical vapour deposition methods, and finally one of the most exciting, promising, and low cost but powerful technologies is discussed: solution-processed oxide TFTs. Moreover, a more detailed focus analysis will be given concerning p-type oxide TFTs, mainly centred on two of the most promising semiconductor candidates: copper oxide and tin oxide. The most recent data related to the production of complementary metal oxide semiconductor (CMOS) devices based on n- and p-type oxide TFT is also be presented. The last topic of this review is devoted to some emerging applications, finalizing with the main conclusions. Related work that originated at CENIMAT|I3N during the last six years is included in more detail, which has led to the fabrication of high performance n- and p-type oxide transistors as well as the fabrication of CMOS devices with and on paper. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  6. MEDEA+ project 2T302 MUSCLE: masks through user's supply chain: leadership by excellence

    NASA Astrophysics Data System (ADS)

    Torsy, Andreas

    2008-04-01

    The rapid evolution of our information society depends on the continuous developments and innovations of semiconductor products. The cost per chip functionality keeps reducing by a factor of 2 every 18 month. However, this performance and success of the semiconductor industry critically depends on the quality of the lithographic photomasks. The need for the high quality of photomask drives lithography costs sensitively, which is a key factor in the manufacture of microelectronics devices. Therefore, the aim is to reduce production costs while overcoming challenges in terms of feature sizes, complexity and cycle times. Consequently, lithography processes must provide highest possible quality at reasonable prices. This way, the leadership in the lithographic area can be maintained and European chipmakers can stay competitive with manufacturers in the Far East and the USA. Under the umbrella of MEDEA+, a project called MUSCLE (<< Masks through User's Supply Chain: Leadership by Excellence >>) has been started among leading semiconductor companies in Europe: ALTIS Semiconductor (Project Leader), ALCATEL Vacuum, ATMEL, CEA/LETI, Entegris, NXP Semiconductors, TOPPAN Photomasks, AMTC, Carl ZEISS SMS, DMS, Infineon Technologies, VISTEC Semiconductor, NIKON Precision, SCHOTT Lithotec, ASML, PHOTRONICS, IMEC, DCE, DNP Photomask, STMicroelectronics, XYALIS and iCADA. MUSCLE focuses particularly on mask data flow, photomask carrier, photomask defect characterization and photomask data handling. In this paper, we will discuss potential solutions like standardization and automation of the photomask data flow based on SEMI P10, the performance and the impact of the supply chain parameter within the photomask process, the standardization of photomask defect characterization and a discussion of the impact of new Reticle Enhancement Technologies (RET) such as mask process correction and finally a generic model to describe the photomasks key performance indicators for prototype photomasks.

  7. Rare resource supply crisis and solution technology for semiconductor manufacturing

    NASA Astrophysics Data System (ADS)

    Fukuda, Hitomi; Hu, Sophia; Yoo, Youngsun; Takahisa, Kenji; Enami, Tatsuo

    2016-03-01

    There are growing concerns over future environmental impact and earth resource shortage throughout the world and in many industries. Our semiconductor industry is not excluded. "Green" has become an important topic as production volume become larger and more powerful. Especially, the rare gases are widely used in semiconductor manufacturing because of its inertness and extreme chemical stability. One major component of an Excimer laser system is Neon. It is used as a buffer gas for Argon (Ar) and Krypton (Kr) gases used in deep ultraviolet (DUV) lithography laser systems. Since Neon gas accounting for more than 96% of the laser gas mixture, a fairly large amount of neon gas is consumed to run these DUV lasers. However, due to country's instability both in politics and economics in Ukraine, the main producer of neon gas today, supply reduction has become an issue and is causing increasing concern. This concern is not only based on price increases, but has escalated to the point of supply shortages in 2015. This poses a critical situation for the semiconductor industry, which represents the leading consumer of neon gas in the world. Helium is another noble gas used for Excimer laser operation. It is used as a purge gas for optical component modules to prevent from being damaged by active gases and impurities. Helium has been used in various industries, including for medical equipment, linear motor cars, and semiconductors, and is indispensable for modern life. But consumption of helium in manufacturing has been increased dramatically, and its unstable supply and price rise has been a serious issue today. In this article, recent global supply issue of rare resources, especially Neon gas and Helium gas, and its solution technology to support semiconductor industry will be discussed.

  8. Spin Coherence at the Nanoscale: Polymer Surfaces and Interfaces

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Epstein, Arthur J.

    2013-09-10

    Breakthrough results were achieved during the reporting period in the areas of organic spintronics. (A) For the first time the giant magnetic resistance (GMR) was observed in spin valve with an organic spacer. Thus we demonstrated the ability of organic semiconductors to transport spin in GMR devices using rubrene as a prototype for organic semiconductors. (B) We discovered the electrical bistability and spin valve effect in a ferromagnet /organic semiconductor/ ferromagnet heterojunction. The mechanism of switching between conducting phases and its potential applications were suggested. (C) The ability of V(TCNE)x to inject spin into organic semiconductors such as rubrene wasmore » demonstrated for the first time. The mechanisms of spin injection and transport from and into organic magnets as well through organic semiconductors were elucidated. (D) In collaboration with the group of OSU Prof. Johnston-Halperin we reported the successful extraction of spin polarized current from a thin film of the organic-based room temperature ferrimagnetic semiconductor V[TCNE]x and its subsequent injection into a GaAs/AlGaAs light-emitting diode (LED). Thus all basic steps for fabrication of room temperature, light weight, flexible all organic spintronic devices were successfully performed. (E) A new synthesis/processing route for preparation of V(TCNE)x enabling control of interface and film thicknesses at the nanoscale was developed at OSU. Preliminary results show these films are higher quality and what is extremely important they are substantially more air stable than earlier prepared V(TCNE)x. In sum the breakthrough results we achieved in the past two years form the basis of a promising new technology, Multifunctional Flexible Organic-based Spintronics (MFOBS). MFOBS technology enables us fabrication of full function flexible spintronic devices that operate at room temperature.« less

  9. Memory technology survey

    NASA Technical Reports Server (NTRS)

    1981-01-01

    The current status of semiconductor, magnetic, and optical memory technologies is described. Projections based on these research activities planned for the shot term are presented. Conceptual designs of specific memory buffer pplications employing bipola, CMOS, GaAs, and Magnetic Bubble devices are discussed.

  10. PHOTOCATALYTIC REACTORS AND KINETICS FOR CLEAN CHEMICAL SYNTHESIS [POSTER PRESENTATION

    EPA Science Inventory

    Semiconductor photocatalysis has been tested at a potential technology for synthesizing alcohols, ketones and aldehydes from linear and cyclic hydrocarbons. The technology couples UV light with photocatalyst overcoming many of the drawbacks of conventional reacors. Various hydr...

  11. Employment Lessons from the Electronics Industry.

    ERIC Educational Resources Information Center

    Alic, John A.; Harris, Martha Caldwell

    1986-01-01

    Semiskilled and "unskilled" workers in semiconductors, computer manufacturing, and consumer electronics industries are more likely than other workers to lose jobs because of technology, imports, and offshore production. However, advances in technology do tend to create jobs for skilled workers. (CT)

  12. Merging parallel optics packaging and surface mount technologies

    NASA Astrophysics Data System (ADS)

    Kopp, Christophe; Volpert, Marion; Routin, Julien; Bernabé, Stéphane; Rossat, Cyrille; Tournaire, Myriam; Hamelin, Régis

    2008-02-01

    Optical links are well known to present significant advantages over electrical links for very high-speed data rate at 10Gpbs and above per channel. However, the transition towards optical interconnects solutions for short and very short reach applications requires the development of innovative packaging solutions that would deal with very high volume production capability and very low cost per unit. Moreover, the optoelectronic transceiver components must be able to move from the edge to anywhere on the printed circuit board, for instance close to integrated circuits with high speed IO. In this paper, we present an original packaging design to manufacture parallel optic transceivers that are surface mount devices. The package combines highly integrated Multi-Chip-Module on glass and usual IC ceramics packaging. The use of ceramic and the development of sealing technologies achieve hermetic requirements. Moreover, thanks to a chip scale package approach the final device exhibits a much minimized footprint. One of the main advantages of the package is its flexibility to be soldered or plugged anywhere on the printed circuit board as any other electronic device. As a demonstrator we present a 2 by 4 10Gbps transceiver operating at 850nm.

  13. The Development of SiC MOSFET-based Switching Power Amplifiers for Fusion Science

    NASA Astrophysics Data System (ADS)

    Prager, James; Ziemba, Timothy; Miller, Kenneth; Picard, Julian

    2015-11-01

    Eagle Harbor Technologies (EHT), Inc. is developing a switching power amplifier (SPA) based on silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET). SiC MOSFETs offer many advantages over IGBTs including lower drive energy requirements, lower conduction and switching losses, and higher switching frequency capabilities. When comparing SiC and traditional silicon-based MOSFETs, SiC MOSFETs provide higher current carrying capability allowing for smaller package weights and sizes and lower operating temperature. EHT has conducted single device testing that directly compares the capabilities of SiC MOSFETs and IGBTs to demonstrate the utility of SiC MOSFETs for fusion science applications. These devices have been built into a SPA that can drive resistive loads and resonant tank loads at 800 V, 4.25 kA at pulse repetition frequencies up to 1 MHz. During the Phase II program, EHT will finalize the design of the SPA. In Year 2, EHT will replace the SPAs used in the HIT-SI lab at the University of Washington to allow for operation over 100 kHz. SPA prototype results will be presented. This work is supported under DOE Grant # DE-SC0011907.

  14. High-performance wire-grid polarizers using jet and Flash™ imprint lithography

    NASA Astrophysics Data System (ADS)

    Ahn, Se Hyun; Yang, Shuqiang; Miller, Mike; Ganapathisubramanian, Maha; Menezes, Marlon; Choi, Jin; Xu, Frank; Resnick, Douglas J.; Sreenivasan, S. V.

    2013-07-01

    Extremely large-area roll-to-roll (R2R) manufacturing on flexible substrates is ubiquitous for applications such as paper and plastic processing. It combines the benefits of high speed and inexpensive substrates to deliver a commodity product at low cost. The challenge is to extend this approach to the realm of nanopatterning and realize similar benefits. In order to achieve low-cost nanopatterning, it is imperative to move toward high-speed imprinting, less complex tools, near zero waste of consumables, and low-cost substrates. We have developed a roll-based J-FIL process and applied it to a technology demonstrator tool, the LithoFlex 100, to fabricate large-area flexible bilayer wire-grid polarizers (WGPs) and high-performance WGPs on rigid glass substrates. Extinction ratios of better than 10,000 are obtained for the glass-based WGPs. Two simulation packages are also employed to understand the effects of pitch, aluminum thickness, and pattern defectivity on the optical performance of the WGP devices. It is determined that the WGPs can be influenced by both clear and opaque defects in the gratings; however, the defect densities are relaxed relative to the requirements of a high-density semiconductor device.

  15. High volume nanoscale roll-based imprinting using jet and flash imprint lithography

    NASA Astrophysics Data System (ADS)

    Ahn, Se Hyun; Miller, Mike; Yang, Shuqiang; Ganapathisubramanian, Maha; Menezes, Marlon; Singh, Vik; Choi, Jin; Xu, Frank; LaBrake, Dwayne; Resnick, Douglas J.; Sreenivasan, S. V.

    2013-09-01

    Extremely large-area roll-to-roll (R2R) manufacturing on flexible substrates is ubiquitous for applications such as paper and plastic processing. It combines the benefits of high speed and inexpensive substrates to deliver a commodity product at low cost. The challenge is to extend this approach to the realm of nanopatterning and realize similar benefits. In order to achieve low-cost nanopatterning, it is imperative to move toward high-speed imprinting, less complex tools, near zero waste of consumables, and low-cost substrates. We have developed a roll-based J-FIL process and applied it to a technology demonstrator tool, the LithoFlex 100, to fabricate large-area flexible bilayer wire-grid polarizers (WGPs) and high-performance WGPs on rigid glass substrates. Extinction ratios of better than 10,000 are obtained for the glass-based WGPs. Two simulation packages are also employed to understand the effects of pitch, aluminum thickness, and pattern defectivity on the optical performance of the WGP devices. It is determined that the WGPs can be influenced by both clear and opaque defects in the gratings; however, the defect densities are relaxed relative to the requirements of a high-density semiconductor device.

  16. Selection of human consumables for future space missions

    NASA Technical Reports Server (NTRS)

    Bourland, C. T.; Smith, M. C.

    1991-01-01

    Consumables for human spaceflight include oxygen, water, food and food packaging, personal hygiene items, and clothing. This paper deals with the requirements for food and water, and their impact on waste product generation. Just as urbanization of society has been made possible by improved food processing and packaging, manned spaceflight has benefitted from this technology. The downside of this technology is increased food package waste product. Since consumables make up a major portion of the vehicle onboard stowage and generate most of the waste products, selection of consumables is a very critical process. Food and package waste comprise the majority of the trash generated on the current shuttle orbiter missions. Plans for future missions must include accurate assessment of the waste products to be generated, and the methods for processing and disposing of these wastes.

  17. Design Approaches and Comparison of TAPS Packages for Engineering

    ERIC Educational Resources Information Center

    Sidhu, S. Manjit

    2007-01-01

    Purpose: The paper's purpose is to promote the use of modern technologies such as multimedia packages to engineering students. The aim is to help them to learning in their learning, visualization, problem solving and understanding engineering concepts such as in mechanics dynamics. Design/methodology/approach: TAPS packages are developed to help…

  18. A TAPS Interactive Multimedia Package to Solve Engineering Dynamics Problem

    ERIC Educational Resources Information Center

    Sidhu, S. Manjit; Selvanathan, N.

    2005-01-01

    Purpose: To expose engineering students to using modern technologies, such as multimedia packages, to learn, visualize and solve engineering problems, such as in mechanics dynamics. Design/methodology/approach: A multimedia problem-solving prototype package is developed to help students solve an engineering problem in a step-by-step approach. A…

  19. 21 CFR 801.40 - Form of a unique device identifier.

    Code of Federal Regulations, 2014 CFR

    2014-04-01

    ...) Automatic identification and data capture (AIDC) technology. (b) The UDI must include a device identifier... evident upon visual examination of the label or device package, the label or device package must disclose... label and device packages is deemed to meet all requirements of subpart B of this part. The UPC will...

  20. Packaging & Other Structures. Stuff That Works! A Technology Curriculum for the Elementary Grades.

    ERIC Educational Resources Information Center

    Benenson, Gary

    This book explores all kinds of packaging materials including bags, boxes, etc. and how they are used to protect and display products. Contents are divided into six chapters: (1) "Appetizers" includes activities that can be done individually to become familiar with the topic of packaging and structures; (2) "Concepts" provides…

  1. A Wireless, Passive Sensor for Quantifying Packaged Food Quality

    PubMed Central

    Tan, Ee Lim; Ng, Wen Ni; Shao, Ranyuan; Pereles, Brandon D.; Ong, Keat Ghee

    2007-01-01

    This paper describes the fabrication of a wireless, passive sensor based on an inductive-capacitive resonant circuit, and its application for in situ monitoring of the quality of dry, packaged food such as cereals, and fried and baked snacks. The sensor is made of a planar inductor and capacitor printed on a paper substrate. To monitor food quality, the sensor is embedded inside the food package by adhering it to the package's inner wall; its response is remotely detected through a coil connected to a sensor reader. As food quality degrades due to increasing humidity inside the package, the paper substrate absorbs water vapor, changing the capacitor's capacitance and the sensor's resonant frequency. Therefore, the taste quality of the packaged food can be indirectly determined by measuring the change in the sensor's resonant frequency. The novelty of this sensor technology is its wireless and passive nature, which allows in situ determination of food quality. In addition, the simple fabrication process and inexpensive sensor material ensure a low sensor cost, thus making this technology economically viable. PMID:28903195

  2. Technology and characterization of Thin-Film Transistors (TFTs) with a-IGZO semiconductor and high-k dielectric layer

    NASA Astrophysics Data System (ADS)

    Mroczyński, R.; Wachnicki, Ł.; Gierałtowska, S.

    2016-12-01

    In this work, we present the design of the technology and fabrication of TFTs with amorphous IGZO semiconductor and high-k gate dielectric layer in the form of hafnium oxide (HfOx). In the course of this work, the IGZO fabrication was optimized by means of Taguchi orthogonal tables approach in order to obtain an active semiconductor with reasonable high concentration of charge carriers, low roughness and relatively high mobility. The obtained Thin-Film Transistors can be characterized by very good electrical parameters, i.e., the effective mobility (μeff ≍ 12.8 cm2V-1s-1) significantly higher than that for a-Si TFTs (μeff ≍ 1 cm2V-1s-1). However, the value of sub-threshold swing (i.e., 640 mV/dec) points that the interfacial properties of IGZO/HfOx stack is characterized by high value of interface states density (Dit) which, in turn, demands further optimization for future applications of the demonstrated TFT structures.

  3. Department of Defense statement on the X-ray Lithography Program to the Research and Development Subcommittee of the House Armed Services Committee of 100th Congress, second session

    NASA Astrophysics Data System (ADS)

    Maynard, E. D., Jr.

    1988-03-01

    The Department has a broad and necessarily diverse program in semiconductor science and technology. The three principal goals of that effort are: Reduce the gap between commercial integrated circuit usage and its deployment in military systems, assure a healthy on-shore industrial base to support our defense needs, enhance the producibility of specialized military semiconductor products. The major effort to achieve the first of these objectives is the Very High Speed Integrated Circuits (VHSIC) Program which is nearing completion. The Microwave/millimeter wave Monolithic Integrated Circuit (MIMIC) program has just completed a study program to define the product mix needed to meet military system requirements for radar, electronic warfare, smart weapons and telecommunications. We are bringing together the system requirements of all DoD with the device fabrication and product delivery capabilities of industry in an Infrared Focal Plane Array (IRFPA) program. The goal of the Software Initiative is to enhance our warfighting capability through development of efficient software generation technology and products plus the creation of a technology infusion infrastructure to couple the technology and products to system applications. The X-Ray Lithography Program will begin to establish the industrial base which will be required to sustain U.S. leadership in the semiconductor industry for the late 1990s.

  4. SEMATECH, A Case Study: Analysis of a Government-Industry Partnership

    DTIC Science & Technology

    1993-09-23

    profit potential in the private market. Often, public sector technologies do not. Commercial technologies must be technically and economically...and Private Spending .................. 80 ix I. INTRODUCTION AND BACKGROUND Critics proclaim the Semiconductor Manufacturing Technology Initiative...in the R&D market and in the product market." (Katz and Ordover, 1990, p. 150) Technological spillovers result primarily from private R&D investment

  5. Impact of surface chemistry

    PubMed Central

    Somorjai, Gabor A.; Li, Yimin

    2011-01-01

    The applications of molecular surface chemistry in heterogeneous catalyst technology, semiconductor-based technology, medical technology, anticorrosion and lubricant technology, and nanotechnology are highlighted in this perspective. The evolution of surface chemistry at the molecular level is reviewed, and the key roles of surface instrumentation developments for in situ studies of the gas–solid, liquid–solid, and solid–solid interfaces under reaction conditions are emphasized. PMID:20880833

  6. Multipoint dynamically reconfigure adaptive distributed fiber optic acoustic emission sensor (FAESense) system for condition based maintenance

    NASA Astrophysics Data System (ADS)

    Mendoza, Edgar; Prohaska, John; Kempen, Connie; Esterkin, Yan; Sun, Sunjian; Krishnaswamy, Sridhar

    2010-09-01

    This paper describes preliminary results obtained under a Navy SBIR contract by Redondo Optics Inc. (ROI), in collaboration with Northwestern University towards the development and demonstration of a next generation, stand-alone and fully integrated, dynamically reconfigurable, adaptive fiber optic acoustic emission sensor (FAESense™) system for the in-situ unattended detection and localization of shock events, impact damage, cracks, voids, and delaminations in new and aging critical infrastructures found in ships, submarines, aircraft, and in next generation weapon systems. ROI's FAESense™ system is based on the integration of proven state-of-the-art technologies: 1) distributed array of in-line fiber Bragg gratings (FBGs) sensors sensitive to strain, vibration, and acoustic emissions, 2) adaptive spectral demodulation of FBG sensor dynamic signals using two-wave mixing interferometry on photorefractive semiconductors, and 3) integration of all the sensor system passive and active optoelectronic components within a 0.5-cm x 1-cm photonic integrated circuit microchip. The adaptive TWM demodulation methodology allows the measurement of dynamic high frequnency acoustic emission events, while compensating for passive quasi-static strain and temperature drifts. It features a compact, low power, environmentally robust 1-inch x 1-inch x 4-inch small form factor (SFF) package with no moving parts. The FAESense™ interrogation system is microprocessor-controlled using high data rate signal processing electronics for the FBG sensors calibration, temperature compensation and the detection and analysis of acoustic emission signals. Its miniaturized package, low power operation, state-of-the-art data communications, and low cost makes it a very attractive solution for a large number of applications in naval and maritime industries, aerospace, civil structures, the oil and chemical industry, and for homeland security applications.

  7. Transformation of food packaging from passive to innovative via nanotechnology: concepts and critiques.

    PubMed

    Mlalila, Nichrous; Kadam, Dattatreya M; Swai, Hulda; Hilonga, Askwar

    2016-09-01

    In recent decades, there is a global advancement in manufacturing industry due to increased applications of nanotechnology. Food industry also has been tremendously changing from passive packaging to innovative packaging, to cope with global trends, technological advancements, and consumer preferences. Active research is taking place in food industry and other scientific fields to develop innovative packages including smart, intelligent and active food packaging for more effective and efficient packaging materials with balanced environmental issues. However, in food industry the features behind smart packaging are narrowly defined to be distinguished from intelligent packaging as in other scientific fields, where smart materials are under critical investigations. This review presents some scientific concepts and features pertaining innovative food packaging. The review opens new research window in innovative food packaging to cover the existing disparities for further precise research and development of food packaging industry.

  8. A microelectronics approach for the ROSETTA surface science package

    NASA Technical Reports Server (NTRS)

    Sandau, Rainer (Editor); Alkalaj, Leon

    1996-01-01

    In relation to the Rosetta surface science package, the benefits of the application of advanced microelectronics packaging technologies and other output from the Mars environmental survey (MESUR) integrated microelectronics study are reported on. The surface science package will be designed to operate for tens of hours. Its limited mass and power consumption make necessary a highly integrated design with all the instruments and subunits operated from a centralized control and information management subsystem.

  9. New materials and structures for photovoltaics

    NASA Astrophysics Data System (ADS)

    Zunger, Alex; Wagner, S.; Petroff, P. M.

    1993-01-01

    Despite the fact that over the years crystal chemists have discovered numerous semiconducting substances, and that modern epitaxial growth techniques are able to produce many novel atomic-scale architectures, current electronic and opto-electronic technologies are based but on a handful of ˜10 traditional semiconductor core materials. This paper surveys a number of yet-unexploited classes of semiconductors, pointing to the much-needed research in screening, growing, and characterizing promising members of these classes. In light of the unmanageably large number of a-priori possibilities, we emphasize the role that structural chemistry and modern computer-aided design must play in screening potentially important candidates. The basic classes of materials discussed here include nontraditional alloys, such as non-isovalent and heterostructural semiconductors, materials at reduced dimensionality, including superlattices, zeolite-caged nanostructures and organic semiconductors, spontaneously ordered alloys, interstitial semiconductors, filled tetrahedral structures, ordered vacancy compounds, and compounds based on d and f electron elements. A collaborative effort among material predictor, material grower, and material characterizer holds the promise for a successful identification of new and exciting systems.

  10. Efficient light emission from inorganic and organic semiconductor hybrid structures by energy-level tuning

    PubMed Central

    Schlesinger, R.; Bianchi, F.; Blumstengel, S.; Christodoulou, C.; Ovsyannikov, R.; Kobin, B.; Moudgil, K.; Barlow, S.; Hecht, S.; Marder, S.R.; Henneberger, F.; Koch, N.

    2015-01-01

    The fundamental limits of inorganic semiconductors for light emitting applications, such as holographic displays, biomedical imaging and ultrafast data processing and communication, might be overcome by hybridization with their organic counterparts, which feature enhanced frequency response and colour range. Innovative hybrid inorganic/organic structures exploit efficient electrical injection and high excitation density of inorganic semiconductors and subsequent energy transfer to the organic semiconductor, provided that the radiative emission yield is high. An inherent obstacle to that end is the unfavourable energy level offset at hybrid inorganic/organic structures, which rather facilitates charge transfer that quenches light emission. Here, we introduce a technologically relevant method to optimize the hybrid structure's energy levels, here comprising ZnO and a tailored ladder-type oligophenylene. The ZnO work function is substantially lowered with an organometallic donor monolayer, aligning the frontier levels of the inorganic and organic semiconductors. This increases the hybrid structure's radiative emission yield sevenfold, validating the relevance of our approach. PMID:25872919

  11. Determination of diffusion coefficient in disordered organic semiconductors

    NASA Astrophysics Data System (ADS)

    Rani, Varsha; Sharma, Akanksha; Ghosh, Subhasis

    2016-05-01

    Charge carrier transport in organic semiconductors is dominated by positional and energetic disorder in Gaussian density of states (GDOS) and is characterized by hopping through localized states. Due to the immobilization of charge carriers in these localized states, significant non-uniform carrier distribution exists, resulting diffusive transport. A simple, nevertheless powerful technique to determine diffusion coefficient D in disordered organic semiconductors has been presented. Diffusion coefficients of charge carriers in two technologically important organic molecular semiconductors, Pentacene and copper phthalocyanine (CuPc) have been measured from current-voltage (J-V) characteristics of Al/Pentacene/Au and Al/CuPc/Au based Schottky diodes. Ideality factor g and carrier mobility μ have been calculated from the exponential and space charge limited region respectively of J-V characteristics. Classical Einstein relation is not valid in organic semiconductors due to energetic disorders in DOS. Using generalized Einstein relation, diffusion coefficients have been obtained to be 1.31×10-6 and 1.73×10-7 cm2/s for Pentacene and CuPc respectively.

  12. Efficient light emission from inorganic and organic semiconductor hybrid structures by energy-level tuning.

    PubMed

    Schlesinger, R; Bianchi, F; Blumstengel, S; Christodoulou, C; Ovsyannikov, R; Kobin, B; Moudgil, K; Barlow, S; Hecht, S; Marder, S R; Henneberger, F; Koch, N

    2015-04-15

    The fundamental limits of inorganic semiconductors for light emitting applications, such as holographic displays, biomedical imaging and ultrafast data processing and communication, might be overcome by hybridization with their organic counterparts, which feature enhanced frequency response and colour range. Innovative hybrid inorganic/organic structures exploit efficient electrical injection and high excitation density of inorganic semiconductors and subsequent energy transfer to the organic semiconductor, provided that the radiative emission yield is high. An inherent obstacle to that end is the unfavourable energy level offset at hybrid inorganic/organic structures, which rather facilitates charge transfer that quenches light emission. Here, we introduce a technologically relevant method to optimize the hybrid structure's energy levels, here comprising ZnO and a tailored ladder-type oligophenylene. The ZnO work function is substantially lowered with an organometallic donor monolayer, aligning the frontier levels of the inorganic and organic semiconductors. This increases the hybrid structure's radiative emission yield sevenfold, validating the relevance of our approach.

  13. Transient Heat Conduction Simulation around Microprocessor Die

    NASA Astrophysics Data System (ADS)

    Nishi, Koji

    This paper explains about fundamental formula of calculating power consumption of CMOS (Complementary Metal-Oxide-Semiconductor) devices and its voltage and temperature dependency, then introduces equation for estimating power consumption of the microprocessor for notebook PC (Personal Computer). The equation is applied to heat conduction simulation with simplified thermal model and evaluates in sub-millisecond time step calculation. In addition, the microprocessor has two major heat conduction paths; one is from the top of the silicon die via thermal solution and the other is from package substrate and pins via PGA (Pin Grid Array) socket. Even though the dominant factor of heat conduction is the former path, the latter path - from package substrate and pins - plays an important role in transient heat conduction behavior. Therefore, this paper tries to focus the path from package substrate and pins, and to investigate more accurate method of estimating heat conduction paths of the microprocessor. Also, cooling performance expression of heatsink fan is one of key points to assure result with practical accuracy, while finer expression requires more computation resources which results in longer computation time. Then, this paper discusses the expression to minimize computation workload with a practical accuracy of the result.

  14. CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES: Switching Characteristics of Phase Change Memory Cell Integrated with Metal-Oxide Semiconductor Field Effect Transistor

    NASA Astrophysics Data System (ADS)

    Xu, Cheng; Liu, Bo; Chen, Yi-Feng; Liang, Shuang; Song, Zhi-Tang; Feng, Song-Lin; Wan, Xu-Dong; Yang, Zuo-Ya; Xie, Joseph; Chen, Bomy

    2008-05-01

    A Ge2Sb2Te5 based phase change memory device cell integrated with metal-oxide semiconductor field effect transistor (MOSFET) is fabricated using standard 0. 18 μm complementary metal-oxide semiconductor process technology. It shows steady switching characteristics in the dc current-voltage measurement. The phase changing phenomenon from crystalline state to amorphous state with a voltage pulse altitude of 2.0 V and pulse width of 50 ns is also obtained. These results show the feasibility of integrating phase change memory cell with MOSFET.

  15. The Beginning of Semiconductor Research in Cuba

    NASA Astrophysics Data System (ADS)

    Veltfort, Theodore

    I was invited to Cuba in 1962 to initiate some efforts in semiconductor development. I had been a physicist and senior research engineer with various electronic companies of the "Silicon Valley" of California, south of San Francisco. I had heard of the efforts made by the new revolutionary government of Cuba to advance the level of science and technology, and I was anxious to see what I could do to help.

  16. Preparation methodologies and nano/microstructural evaluation of metal/semiconductor thin films.

    PubMed

    Chen, Zhiwen; Jiao, Zheng; Wu, Minghong; Shek, Chan-Hung; Wu, C M Lawrence; Lai, Joseph K L

    2012-01-01

    Metal/semiconductor thin films are a class of unique materials that are widespread technological applications, particularly in the field of microelectronic devices. Assessment strategies of fractal and tures are of fundamental importance in the development of nano/microdevices. This review presents the preparation methodologies and nano/microstructural evaluation of metal/semiconductor thin films including Au/Ge bilayer films and Pd-Ge alloy thin films, which show in the form of fractals and nanocrystals. Firstly, the extended version of Au/Ge thin films for the fractal crystallization of amorphous Ge and the formation of nanocrystals developed with improved micro- and nanostructured features are described in Section 2. Secondly, the nano/microstructural characteristics of Pd/Ge alloy thin films during annealing have been investigated in detail and described in Section 3. Finally, we will draw the conclusions from the present work as shown in Section 4. It is expected that the preparation methodologies developed and the knowledge of nano/microstructural evolution gained in metal/semiconductor thin films, including Au/Ge bilayer films and Pd-Ge alloy thin films, will provide an important fundamental basis underpinning further interdisciplinary research in these fields such as physics, chemistry, materials science, and nanoscience and nanotechnology, leading to promising exciting opportunities for future technological applications involving these thin films.

  17. Real-time two-dimensional imaging of potassium ion distribution using an ion semiconductor sensor with charged coupled device technology.

    PubMed

    Hattori, Toshiaki; Masaki, Yoshitomo; Atsumi, Kazuya; Kato, Ryo; Sawada, Kazuaki

    2010-01-01

    Two-dimensional real-time observation of potassium ion distributions was achieved using an ion imaging device based on charge-coupled device (CCD) and metal-oxide semiconductor technologies, and an ion selective membrane. The CCD potassium ion image sensor was equipped with an array of 32 × 32 pixels (1024 pixels). It could record five frames per second with an area of 4.16 × 4.16 mm(2). Potassium ion images were produced instantly. The leaching of potassium ion from a 3.3 M KCl Ag/AgCl reference electrode was dynamically monitored in aqueous solution. The potassium ion selective membrane on the semiconductor consisted of plasticized poly(vinyl chloride) (PVC) with bis(benzo-15-crown-5). The addition of a polyhedral oligomeric silsesquioxane to the plasticized PVC membrane greatly improved adhesion of the membrane onto Si(3)N(4) of the semiconductor surface, and the potential response was stabilized. The potential response was linear from 10(-2) to 10(-5) M logarithmic concentration of potassium ion. The selectivity coefficients were K(K(+),Li(+))(pot) = 10(-2.85), K(K(+),Na(+))(pot) = 10(-2.30), K(K(+),Rb(+))(pot) =10(-1.16), and K(K(+),Cs(+))(pot) = 10(-2.05).

  18. Review on the dynamics of semiconductor nanowire lasers

    NASA Astrophysics Data System (ADS)

    Röder, Robert; Ronning, Carsten

    2018-03-01

    Semiconductor optoelectronic devices have contributed tremendously to the technological progress in the past 50-60 years. Today, they also play a key role in nanophotonics stimulated by the inherent limitations of electronic integrated circuits and the growing demand for faster communications on chip. In particular, the field of ‘nanowire photonics’ has emerged including the search for coherent light sources with a nano-scaled footprint. The past decade has been dedicated to find suitable semiconductor nanowire (NW) materials for such nanolasers. Nowadays, such NW lasers consistently work at room temperature covering a huge spectral range from the ultraviolet down to the mid-infrared depending on the band gap of the NW material. Furthermore, first approaches towards the modification and optimization of such NW laser devices have been demonstrated. The underlying dynamics of the electronic and photonic NW systems have also been studied very recently, as they need to be understood in order to push the technological relevance of nano-scaled coherent light sources. Therefore, this review will first present novel measurement approaches in order to study the ultrafast temporal and optical mode dynamics of individual NW laser devices. Furthermore, these fundamental new insights are reviewed and deeply discussed towards the efficient control and adjustment of the dynamics in semiconductor NW lasers.

  19. Metrology needs for the semiconductor industry over the next decade

    NASA Astrophysics Data System (ADS)

    Melliar-Smith, Mark; Diebold, Alain C.

    1998-11-01

    Metrology will continue to be a key enabler for the development and manufacture of future generations of integrated circuits. During 1997, the Semiconductor Industry Association renewed the National Technology Roadmap for Semiconductors (NTRS) through the 50 nm technology generation and for the first time included a Metrology Roadmap (1). Meeting the needs described in the Metrology Roadmap will be both a technological and financial challenge. In an ideal world, metrology capability would be available at the start of process and tool development, and silicon suppliers would have 450 mm wafer capable metrology tools in time for development of that wafer size. Unfortunately, a majority of the metrology suppliers are small companies that typically can't afford the additional two to three year wait for return on R&D investment. Therefore, the success of the semiconductor industry demands that we expand cooperation between NIST, SEMATECH, the National Labs, SRC, and the entire community. In this paper, we will discuss several critical metrology topics including the role of sensor-based process control, in-line microscopy, focused measurements for transistor and interconnect fabrication, and development needs. Improvements in in-line microscopy must extend existing critical dimension measurements up to 100 nm generations and new methods may be required for sub 100 nm generations. Through development, existing metrology dielectric thickness and dopant dose and junction methods can be extended to 100 nm, but new and possibly in-situ methods are needed beyond 100 nm. Interconnect process control will undergo change before 100 nm due to the introduction of copper metallization, low dielectric constant interlevel dielectrics, and Damascene process flows.

  20. Control Technologies for Room Air-conditioner and Packaged Air-conditioner

    NASA Astrophysics Data System (ADS)

    Ito, Nobuhisa

    Trends of control technologies about air-conditioning machineries, especially room or packaged air conditioners, are presented in this paper. Multiple air conditioning systems for office buildings are mainly described as one application of the refrigeration cycle control technologies including sensors for thermal comfort and heating/ cooling loads are also described as one of the system control technologies. Inverter systems and related technologies for driving variable speed compressors are described in both case of including induction motors and brushless DC motors. Technologies for more accurate control to meet various kind of regulations such as ozone layer destruction, energy saving and global warming, and for eliminating harmonic distortion of power source current, as a typical EMC problem, will be urgently desired.

  1. Mechanical Anisotropic and Electronic Properties of Amm2-carbon under Pressure*

    NASA Astrophysics Data System (ADS)

    Xing, Meng-Jiang; Li, Xiao-Zhen; Yu, Shao-Jun; Wang, Fu-Yan

    2017-09-01

    Structural, electronic properties and mechanical anisotropy of Amm2-carbon are investigated utilizing frist-principles calculations by Cambridge Serial Total Energy Package (CASTEP) code. The work is performed with the generalized gradient approximation in the form of Perdew-Burke-Ernzerhof (PBE), PBEsol, Wu and Cohen (WC) and local density approximation in the form of Ceperley and Alder data as parameterized by Perdew and Zunger (CA-PZ). The mechanical anisotropy calculations show that Amm2-carbon exhibit large anisotropy in elastic moduli, such as Poisson’s ratio, shear modulus and Young’s modulus, and other anisotropy factors, such as the shear anisotropic factor and the universal anisotropic index AU. It is interestingly that the anisotropy in shear modulus and Young’s modulus, universal anisotropic index and the shear anisotropic factor all increases with increasing pressure, but the anisotropy in Poisson’s ratio decreases. The band structure calculations reveal that Amm2-carbon is a direct-band-gap semiconductor at ambient pressure, but with the pressure increasing, it becomes an indirect-band-gap semiconductor.

  2. The effect of body bias of the metal-oxide-semiconductor field-effect transistor in the resistive network on spatial current distribution in a bio-inspired complementary metal-oxide-semiconductor vision chip

    NASA Astrophysics Data System (ADS)

    Kong, Jae-Sung; Hyun, Hyo-Young; Seo, Sang-Ho; Shin, Jang-Kyoo

    2008-11-01

    Complementary metal-oxide-semiconductor (CMOS) vision chips for edge detection based on a resistive circuit have recently been developed. These chips help in the creation of neuromorphic systems of a compact size, high speed of operation, and low power dissipation. The output of the vision chip depends predominantly upon the electrical characteristics of the resistive network which consists of a resistive circuit. In this paper, the body effect of the metal-oxide-semiconductor field-effect transistor for current distribution in a resistive circuit is discussed with a simple model. In order to evaluate the model, two 160 × 120 CMOS vision chips have been fabricated using a standard CMOS technology. The experimental results nicely match our prediction.

  3. Automated work packages architecture: An initial set of human factors and instrumentation and controls requirements

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Agarwal, Vivek; Oxstrand, Johanna H.; Le Blanc, Katya L.

    The work management process in current fleets of national nuclear power plants is so highly dependent on large technical staffs and quality of work instruction, i.e., paper-based, that this puts nuclear energy at somewhat of a long-term economic disadvantage and increase the possibility of human errors. Technologies like mobile portable devices and computer-based procedures can play a key role in improving the plant work management process, thereby increasing productivity and decreasing cost. Automated work packages are a fundamentally an enabling technology for improving worker productivity and human performance in nuclear power plants work activities because virtually every plant work activitymore » is accomplished using some form of a work package. As part of this year’s research effort, automated work packages architecture is identified and an initial set of requirements identified, that are essential and necessary for implementation of automated work packages in nuclear power plants.« less

  4. Comparison of Traditional and Innovative Techniques to Solve Technical Challenges

    NASA Technical Reports Server (NTRS)

    Perchonok, Michele

    2011-01-01

    This slide presentation reviews the use of traditional and innovative techniques to solve technical challenges in food storage technology. The planning for a mission to Mars is underway, and the food storage technology improvements requires that improvements be made. This new technology is required, because current food storage technology is inadequate,refrigerators or freezers are not available for food preservation, and that a shelf life of 5 years is expected. A 10 year effort to improve food packaging technology has not enhanced significantly food packaging capabilities. Two innovation techniques were attempted InnoCentive and Yet2.com and have provided good results, and are still under due diligence for solver verification.

  5. Rocksalt nitride metal/semiconductor superlattices: A new class of artificially structured materials

    NASA Astrophysics Data System (ADS)

    Saha, Bivas; Shakouri, Ali; Sands, Timothy D.

    2018-06-01

    Artificially structured materials in the form of superlattice heterostructures enable the search for exotic new physics and novel device functionalities, and serve as tools to push the fundamentals of scientific and engineering knowledge. Semiconductor heterostructures are the most celebrated and widely studied artificially structured materials, having led to the development of quantum well lasers, quantum cascade lasers, measurements of the fractional quantum Hall effect, and numerous other scientific concepts and practical device technologies. However, combining metals with semiconductors at the atomic scale to develop metal/semiconductor superlattices and heterostructures has remained a profoundly difficult scientific and engineering challenge. Though the potential applications of metal/semiconductor heterostructures could range from energy conversion to photonic computing to high-temperature electronics, materials challenges primarily had severely limited progress in this pursuit until very recently. In this article, we detail the progress that has taken place over the last decade to overcome the materials engineering challenges to grow high quality epitaxial, nominally single crystalline metal/semiconductor superlattices based on transition metal nitrides (TMN). The epitaxial rocksalt TiN/(Al,Sc)N metamaterials are the first pseudomorphic metal/semiconductor superlattices to the best of our knowledge, and their physical properties promise a new era in superlattice physics and device engineering.

  6. Introduction to Human Services, Chapter III. Video Script Package, Text, and Audio Script Package.

    ERIC Educational Resources Information Center

    Miami-Dade Community Coll., FL.

    Video, textual, and audio components of the third module of a multi-media, introductory course on Human Services are presented. The module packages, developed at Miami-Dade Community College, deal with technology, social change, and problem dependencies. A video cassette script is first provided that explores the "traditional,""inner," and "other…

  7. An Integrated Software Package to Enable Predictive Simulation Capabilities

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Chen, Yousu; Fitzhenry, Erin B.; Jin, Shuangshuang

    The power grid is increasing in complexity due to the deployment of smart grid technologies. Such technologies vastly increase the size and complexity of power grid systems for simulation and modeling. This increasing complexity necessitates not only the use of high-performance-computing (HPC) techniques, but a smooth, well-integrated interplay between HPC applications. This paper presents a new integrated software package that integrates HPC applications and a web-based visualization tool based on a middleware framework. This framework can support the data communication between different applications. Case studies with a large power system demonstrate the predictive capability brought by the integrated software package,more » as well as the better situational awareness provided by the web-based visualization tool in a live mode. Test results validate the effectiveness and usability of the integrated software package.« less

  8. Food system advances towards more nutritious and sustainable mantou production in China.

    PubMed

    Hu, Xinzhong; Sheng, Xialu; Liu, Liu; Ma, Zhen; Li, Xiaoping; Zhao, Wuqi

    2015-01-01

    Mantou, a traditional Chinese food, is widely consumed in the North China due to its nutritional value and good mouth-feel. However, its current family-style production is impeded due to short shelf-life caused by mold and starch retrogradation. The current packaging and storage methods are not efficient enough for mantou preservation. Recently, a novel, hot online package technology has attracted attention due to its high processing efficiency and low cost. Most importantly, by using this methodology, secondary contamination by microbes can be avoided and starch retrogradation can be markedly delayed, with mantou shelf-life under room temperature extended from a few to at least 90 days without any additives. In this review, the mechanisms of mantou quality deterioration are explained and the advantages of hot package technology addressed and compared with other packaging methods, such as frozen chain storage. In this way, not only wheat, but also other grains (including whole-grains) and ingredients may be mantou constituents, to enhance nutrition of traditional mantou. There is now a technological opportunity for mantou to become a more nutritious, sustainable and affordable foodstuff in local communities.

  9. Solvent-Free Toner Printing of Organic Semiconductor Layer in Flexible Thin-Film Transistors

    NASA Astrophysics Data System (ADS)

    Sakai, Masatoshi; Koh, Tokuyuki; Toyoshima, Kenji; Nakamori, Kouta; Okada, Yugo; Yamauchi, Hiroshi; Sadamitsu, Yuichi; Shinamura, Shoji; Kudo, Kazuhiro

    2017-07-01

    A solvent-free printing process for printed electronics is successfully developed using toner-type patterning of organic semiconductor toner particles and the subsequent thin-film formation. These processes use the same principle as that used for laser printing. The organic thin-film transistors are prepared by electrically distributing the charged toner onto a Au electrode on a substrate film, followed by thermal lamination. The thermal lamination is effective for obtaining an oriented and crystalline thin film. Toner printing is environmentally friendly compared with other printing technologies because it is solvent free, saves materials, and enables easy recycling. In addition, this technology simultaneously enables both wide-area and high-resolution printing.

  10. Visible light laser voltage probing on thinned substrates

    DOEpatents

    Beutler, Joshua; Clement, John Joseph; Miller, Mary A.; Stevens, Jeffrey; Cole, Jr., Edward I.

    2017-03-21

    The various technologies presented herein relate to utilizing visible light in conjunction with a thinned structure to enable characterization of operation of one or more features included in an integrated circuit (IC). Short wavelength illumination (e.g., visible light) is applied to thinned samples (e.g., ultra-thinned samples) to achieve a spatial resolution for laser voltage probing (LVP) analysis to be performed on smaller technology node silicon-on-insulator (SOI) and bulk devices. Thinning of a semiconductor material included in the IC (e.g., backside material) can be controlled such that the thinned semiconductor material has sufficient thickness to enable operation of one or more features comprising the IC during LVP investigation.

  11. Science& Technology Review November 2003

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    McMahon, D

    2003-11-01

    This issue of Science & Technology Review covers the following topics: (1) We Will Always Need Basic Science--Commentary by Tomas Diaz de la Rubia; (2) When Semiconductors Go Nano--experiments and computer simulations reveal some surprising behavior of semiconductors at the nanoscale; (3) Retinal Prosthesis Provides Hope for Restoring Sight--A microelectrode array is being developed for a retinal prosthesis; (4) Maglev on the Development Track for Urban Transportation--Inductrack, a Livermore concept to levitate train cars using permanent magnets, will be demonstrated on a 120-meter-long test track; and (5) Power Plant on a Chip Moves Closer to Reality--Laboratory-designed fuel processor gives powermore » boost to dime-size fuel cell.« less

  12. “Playing around” with Field-Effect Sensors on the Basis of EIS Structures, LAPS and ISFETs

    PubMed Central

    Schöning, Michael J.

    2005-01-01

    Microfabricated semiconductor devices are becoming increasingly relevant, also for the detection of biological and chemical quantities. Especially, the “marriage” of biomolecules and silicon technology often yields successful new sensor concepts. The fabrication techniques of such silicon-based chemical sensors and biosensors, respectively, will have a distinct impact in different fields of application such as medicine, food technology, environment, chemistry and biotechnology as well as information processing. Moreover, scientists and engineers are interested in the analytical benefits of miniaturised and microfabricated sensor devices. This paper gives a survey on different types of semiconductor-based field-effect structures that have been recently developed in our laboratory.

  13. CSP Manufacturing Challenges and Assembly Reliability

    NASA Technical Reports Server (NTRS)

    Ghaffarian, Reza

    2000-01-01

    Although the expression of CSP is widely used by industry from suppliers to users, its implied definition had evolved as the technology has matured. There are "expert definition"- package that is up to 1.5 time die- or "interim definition". CSPs are miniature new packages that industry is starting to implement and there are many unresolved technical issues associated with their implementation. For example, in early 1997, packages with 1 mm pitch and lower were the dominant CSPs, whereas in early 1998 packages with 0.8 mm and lower became the norm for CSPs. Other changes included the use of flip chip die rather than wire bond in CSP. Nonetheless the emerging CSPs are competing with bare die assemblies and are becoming the package of choice for size reduction applications. These packages provide the benefits of small size and performance of the bare die or flip chip, with the advantage of standard die packages. The JPL-led MicrotypeBGA Consortium of enterprises representing government agencies and private companies have jointed together to pool in-kind resources for developing the quality and reliability of chip scale packages (CSPs) for a variety of projects. This talk will cover specifically the experience of our consortium on technology implementation challenges, including design and build of both standard and microvia boards, assembly of two types of test vehicles, and the most current environmental thermal cycling test results.

  14. Comparison of Traditional and Innovative Techniques to Solve Technical Challenges

    NASA Technical Reports Server (NTRS)

    Perchonok, Michele

    2010-01-01

    Although NASA has an adequate food system for current missions, research is required to accommodate new requirements for future NASA exploration missions. The Inadequate Food System risk reflects the need to develop requirements and technologies that will enable NASA to provide the crew with a safe, nutritious and acceptable food system while effectively balancing appropriate resources such as mass, volume, and crew time in exploratory missions. As we go deeper into space or spend more time on the International Space Station (ISS), there will be requirements for packaged food to be stored for 3 5 years. New food packaging technologies are needed that have adequate oxygen and water barrier properties to maintain the foods' quality over this extended shelf life. NASA has been unsuccessful in identify packaging materials that meet the necessary requirements when using several traditional routes including literature reviews, workshops, and internal shelf life studies on foods packaged in various packaging materials. Small Business Innovative Research grants were used for accelerating food packaging materials research with limited success. In order to accelerate the process, a theoretical challenge was submitted to InnoCentive resulting in a partial award. A similar food packaging challenge was submitted to Yet2.com and several potential commercial packaging material suppliers were identified that, at least partially, met the requirements. Comparisons and results of these challenges will be discussed.

  15. Efficacy of Antimicrobial Agents for Food Contact Applications: Biological Activity, Incorporation into Packaging, and Assessment Methods: A Review.

    PubMed

    Mousavi Khaneghah, Amin; Hashemi, Seyed Mohammad Bagher; Eş, Ismail; Fracassetti, Daniela; Limbo, Sara

    2018-07-01

    Interest in the utilization of antimicrobial active packaging for food products has increased in recent years. Antimicrobial active packaging involves the incorporation of antimicrobial compounds into packaging materials, with the aim of maintaining or extending food quality and shelf life. Plant extracts, essential oils, organic acids, bacteriocins, inorganic substances, enzymes, and proteins are used as antimicrobial agents in active packaging. Evaluation of the antimicrobial activity of packaging materials using different methods has become a critical issue for both food safety and the commercial utilization of such packaging technology. This article reviews the different types of antimicrobial agents used for active food packaging materials, the main incorporation techniques, and the assessment methods used to examine the antimicrobial activity of packaging materials, taking into account their safety as food contact materials.

  16. Chip-on-Board Technology 1996 Year-end Report (Design, Manufacturing, and Reliability Study)

    NASA Technical Reports Server (NTRS)

    Le, Binh Q.; Nhan, Elbert; Maurer, Richard H.; Lew, Ark L.; Lander, Juan R.

    1996-01-01

    The major impetus for flight qualifying Chip-On-Board (COB) packaging technology is the shift in emphasis for space missions to smaller, better, and cheaper spacecraft and satellites resulting from the NASA New Millenium initiative and similar requirements in DoD-sponsored programs. The most important benefit that can potentially be derived from miniaturizing spacecraft and satellites is the significant cost saving realizable if a smaller launch vehicle may be employed. Besides the program cost saving, there are several other advantages to building COB-based space hardware. First, once a well-controlled process is established, COB can be low cost compared to standard Multi-Chip Module (MCM) technology. This cost competitiveness is regarded as a result of the generally greater availability and lower cost of Known Good Die (KGD). Coupled with the elimination of the first level of packaging (chip package), compact, high-density circuit boards can be realized with Printed Wiring Boards (PWB) that can now be made with ever-decreasing feature size in line width and via hole. Since the COB packaging technique in this study is based mainly on populating bare dice on a suitable multi-layer laminate substrate which is not hermetically sealed, die coating for protection from the environment is required. In recent years, significant improvements have been made in die coating materials which further enhance the appeal of COB. Hysol epoxies, silicone, parylene and silicon nitride are desirable because of their compatible Thermal Coefficient of Expansion (TCE) and good moisture resistant capability. These die coating materials have all been used in the space and other industries with varying degrees of success. COB technology, specifically siliconnitride coated hardware, has been flown by Lockheed on the Polar satellite. In addition, DARPA has invested a substantial amount of resources on MCM and COB-related activities recently. With COB on the verge of becoming a dominant player in DoD programs, DARPA is increasing its support of the availability of KGDs which will help decrease their cost. Aside from the various major developments and trends in the space and defense industries that are favorable to the acceptance and widespread use of'COB packaging technology, implementing COB can be appealing in other aspects. Since the interconnection interface is usually the weak link in a system, the overall circuit or system reliability may actually be improved because of the elimination of a level of interconnect/packaging at the chip. With COB, mixing packaging technologies is possible. Because some devices are only available in commercial plastic packages, populating a multi-layer laminate substrate with both bare dice and plastic-package parts is inevitable. Another attractive feature of COB is that re-workability is possible if die coating is applied only on the die top. This method allows local replacement of individual dice that were found to be defective instead of replacing an entire board. In terms of thermal management, unpackaged devices offer a shorter thermal resistance path than their packaged counterparts thereby improving thermal sinking and heat removal from the parts.

  17. Multispectral Linear Array detector technology

    NASA Astrophysics Data System (ADS)

    Tower, J. R.; McCarthy, B. M.; Pellon, L. E.; Strong, R. T.; Elabd, H.

    1984-01-01

    The Multispectral Linear Array (MLA) program sponsored by NASA has the aim to extend space-based remote sensor capabilities. The technology development effort involves the realization of very large, all-solid-state, pushbroom focal planes. The pushbroom, staring focal planes will contain thousands of detectors with the objective to provide two orders of magnitude improvement in detector dwell time compared to present Landsat mechanically scanned systems. Attenton is given to visible and near-infrared sensor development, the shortwave infrared sensor, aspects of filter technology development, the packaging concept, and questions of system performance. First-sample, four-band interference filters have been fabricated successfully, and a hybrid packaging technology is being developed.

  18. Technical Support Document: 50% Energy Savings Design Technology Packages for Highway Lodging Buildings

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Jiang, Wei; Gowri, Krishnan; Lane, Michael D.

    2009-09-28

    This Technical Support Document (TSD) describes the process, methodology and assumptions for development of the 50% Energy Savings Design Technology Packages for Highway Lodging Buildings, a design guidance document intended to provide recommendations for achieving 50% energy savings in highway lodging properties over the energy-efficiency levels contained in ANSI/ASHRAE/IESNA Standard 90.1-2004, Energy Standard for Buildings Except Low-Rise Residential Buildings.

  19. 78 FR 18370 - Investigations Regarding Eligibility To Apply for Worker Adjustment Assistance

    Federal Register 2010, 2011, 2012, 2013, 2014

    2013-03-26

    ... (State/One-Stop) 82538 Zebra Technologies (Company) Lincoln, RI 03/08/13 03/07/13 82539 Elster Solutions... Semiconductor, Clarksville, TN....... 03/08/13 03/07/13 L.L.C. (Company) 82543 Zebra Technologies (Company... NewPage Duluth Paper Mill Duluth, MN 03/04/13 03/01/13 (State/One-Stop) 82522 United Technologies...

  20. Using federal technology policy to strength the US microelectronics industry

    NASA Astrophysics Data System (ADS)

    Gover, J. E.; Gwyn, C. W.

    1994-07-01

    A review of US and Japanese experiences with using microelectronics consortia as a tool for strengthening their respective industries reveals major differences. Japan has established catch-up consortia with focused goals. These consortia have a finite life targeted from the beginning, and emphasis is on work that supports or leads to product and process-improvement-driven commercialization. Japan's government has played a key role in facilitating the development of consortia and has used consortia promote domestic competition. US consortia, on the other hand, have often emphasized long-range research with considerably less focus than those in Japan. The US consortia have searched for and often made revolutionary technology advancements. However, technology transfer to their members has been difficult. Only SEMATECH has assisted its members with continuous improvements, compressing product cycles, establishing relationships, and strengthening core competencies. The US government has not been a catalyst nor provided leadership in consortia creation and operation. We propose that in order to regain world leadership in areas where US companies lag foreign competition, the US should create industry-wide, horizontal-vertical, catch-up consortia or continue existing consortia in the six areas where the US lags behind Japan -- optoelectronics, displays, memories, materials, packaging, and manufacturing equipment. In addition, we recommend that consortia be established for special government microelectronics and microelectronics research integration and application. We advocate that these consortia be managed by an industry-led Microelectronics Alliance, whose establishment would be coordinated by the Department of Commerce. We further recommend that the Semiconductor Research Corporation, the National Science Foundation Engineering Research Centers, and relevant elements of other federal programs be integrated into this consortia complex.

  1. Spinoff 2010

    NASA Technical Reports Server (NTRS)

    2010-01-01

    Topics covered include: Burnishing Techniques Strengthen Hip Implants; Signal Processing Methods Monitor Cranial Pressure; Ultraviolet-Blocking Lenses Protect, Enhance Vision; Hyperspectral Systems Increase Imaging Capabilities; Programs Model the Future of Air Traffic Management; Tail Rotor Airfoils Stabilize Helicopters, Reduce Noise; Personal Aircraft Point to the Future of Transportation; Ducted Fan Designs Lead to Potential New Vehicles; Winglets Save Billions of Dollars in Fuel Costs; Sensor Systems Collect Critical Aerodynamics Data; Coatings Extend Life of Engines and Infrastructure; Radiometers Optimize Local Weather Prediction; Energy-Efficient Systems Eliminate Icing Danger for UAVs; Rocket-Powered Parachutes Rescue Entire Planes; Technologies Advance UAVs for Science, Military; Inflatable Antennas Support Emergency Communication; Smart Sensors Assess Structural Health; Hand-Held Devices Detect Explosives and Chemical Agents; Terahertz Tools Advance Imaging for Security, Industry; LED Systems Target Plant Growth; Aerogels Insulate Against Extreme Temperatures; Image Sensors Enhance Camera Technologies; Lightweight Material Patches Allow for Quick Repairs; Nanomaterials Transform Hairstyling Tools; Do-It-Yourself Additives Recharge Auto Air Conditioning; Systems Analyze Water Quality in Real Time; Compact Radiometers Expand Climate Knowledge; Energy Servers Deliver Clean, Affordable Power; Solutions Remediate Contaminated Groundwater; Bacteria Provide Cleanup of Oil Spills, Wastewater; Reflective Coatings Protect People and Animals; Innovative Techniques Simplify Vibration Analysis; Modeling Tools Predict Flow in Fluid Dynamics; Verification Tools Secure Online Shopping, Banking; Toolsets Maintain Health of Complex Systems; Framework Resources Multiply Computing Power; Tools Automate Spacecraft Testing, Operation; GPS Software Packages Deliver Positioning Solutions; Solid-State Recorders Enhance Scientific Data Collection; Computer Models Simulate Fine Particle Dispersion; Composite Sandwich Technologies Lighten Components; Cameras Reveal Elements in the Short Wave Infrared; Deformable Mirrors Correct Optical Distortions; Stitching Techniques Advance Optics Manufacturing; Compact, Robust Chips Integrate Optical Functions; Fuel Cell Stations Automate Processes, Catalyst Testing; Onboard Systems Record Unique Videos of Space Missions; Space Research Results Purify Semiconductor Materials; and Toolkits Control Motion of Complex Robotics.

  2. Using federal technology policy to strength the US microelectronics industry

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Gover, J.E.; Gwyn, C.W.

    1994-07-01

    A review of US and Japanese experiences with using microelectronics consortia as a tool for strengthening their respective industries reveals major differences. Japan has established catch-up consortia with focused goals. These consortia have a finite life targeted from the beginning, and emphasis is on work that supports or leads to product and process-improvement-driven commercialization. Japan`s government has played a key role in facilitating the development of consortia and has used consortia promote domestic competition. US consortia, on the other hand, have often emphasized long-range research with considerably less focus than those in Japan. The US consortia have searched for andmore » often made revolutionary technology advancements. However, technology transfer to their members has been difficult. Only SEMATECH has assisted its members with continuous improvements, compressing product cycles, establishing relationships, and strengthening core competencies. The US government has not been a catalyst nor provided leadership in consortia creation and operation. We propose that in order to regain world leadership in areas where US companies lag foreign competition, the US should create industry-wide, horizontal-vertical, catch-up consortia or continue existing consortia in the six areas where the US lags behind Japan -- optoelectronics, displays, memories, materials, packaging, and manufacturing equipment. In addition, we recommend that consortia be established for special government microelectronics and microelectronics research integration and application. We advocate that these consortia be managed by an industry-led Microelectronics Alliance, whose establishment would be coordinated by the Department of Commerce. We further recommend that the Semiconductor Research Corporation, the National Science Foundation Engineering Research Centers, and relevant elements of other federal programs be integrated into this consortia complex.« less

  3. SiC Technology

    NASA Technical Reports Server (NTRS)

    Neudeck, Philip G.

    1998-01-01

    Silicon carbide (SiC)-based semiconductor electronic devices and circuits are presently being developed for use in high-temperature, high-power, and/or high-radiation conditions under which conventional semiconductors cannot adequately perform. Silicon carbide's ability to function under such extreme conditions is expected to enable significant improvements to a far-ranging variety of applications and systems. These range from greatly improved high-voltage switching [1- 4] for energy savings in public electric power distribution and electric motor drives to more powerful microwave electronics for radar and communications [5-7] to sensors and controls for cleaner-burning more fuel-efficient jet aircraft and automobile engines. In the particular area of power devices, theoretical appraisals have indicated that SiC power MOSFET's and diode rectifiers would operate over higher voltage and temperature ranges, have superior switching characteristics, and yet have die sizes nearly 20 times smaller than correspondingly rated silicon-based devices [8]. However, these tremendous theoretical advantages have yet to be realized in experimental SiC devices, primarily due to the fact that SiC's relatively immature crystal growth and device fabrication technologies are not yet sufficiently developed to the degree required for reliable incorporation into most electronic systems [9]. This chapter briefly surveys the SiC semiconductor electronics technology. In particular, the differences (both good and bad) between SiC electronics technology and well-known silicon VLSI technology are highlighted. Projected performance benefits of SiC electronics are highlighted for several large-scale applications. Key crystal growth and device-fabrication issues that presently limit the performance and capability of high temperature and/or high power SiC electronics are identified.

  4. Silicon Carbide Technology

    NASA Technical Reports Server (NTRS)

    Neudeck, Philip G.

    2006-01-01

    Silicon carbide based semiconductor electronic devices and circuits are presently being developed for use in high-temperature, high-power, and high-radiation conditions under which conventional semiconductors cannot adequately perform. Silicon carbide's ability to function under such extreme conditions is expected to enable significant improvements to a far-ranging variety of applications and systems. These range from greatly improved high-voltage switching for energy savings in public electric power distribution and electric motor drives to more powerful microwave electronics for radar and communications to sensors and controls for cleaner-burning more fuel-efficient jet aircraft and automobile engines. In the particular area of power devices, theoretical appraisals have indicated that SiC power MOSFET's and diode rectifiers would operate over higher voltage and temperature ranges, have superior switching characteristics, and yet have die sizes nearly 20 times smaller than correspondingly rated silicon-based devices [8]. However, these tremendous theoretical advantages have yet to be widely realized in commercially available SiC devices, primarily owing to the fact that SiC's relatively immature crystal growth and device fabrication technologies are not yet sufficiently developed to the degree required for reliable incorporation into most electronic systems. This chapter briefly surveys the SiC semiconductor electronics technology. In particular, the differences (both good and bad) between SiC electronics technology and the well-known silicon VLSI technology are highlighted. Projected performance benefits of SiC electronics are highlighted for several large-scale applications. Key crystal growth and device-fabrication issues that presently limit the performance and capability of high-temperature and high-power SiC electronics are identified.

  5. Construction of vesicle CdSe nano-semiconductors photocatalysts with improved photocatalytic activity: Enhanced photo induced carriers separation efficiency and mechanism insight.

    PubMed

    Wen, Jiangsu; Ma, Changchang; Huo, Pengwei; Liu, Xinlin; Wei, Maobin; Liu, Yang; Yao, Xin; Ma, Zhongfei; Yan, Yongsheng

    2017-10-01

    Visible-light-driven photocatalysis as a green technology has attracted a lot of attention due to its potential applications in environmental remediation. Vesicle CdSe nano-semiconductor photocatalyst are successfully prepared by a gas template method and characterized by a variety of methods. The vesicle CdSe nano-semiconductors display enhanced photocatalytic performance for the degradation of tetracycline hydrochloride, the photodegradation rate of 78.824% was achieved by vesicle CdSe, which exhibited an increase of 31.779% compared to granular CdSe. Such an exceptional photocatalytic capability can be attributed to the unique structure of the vesicle CdSe nano-semiconductor with enhanced light absorption ability and excellent carrier transport capability. Meanwhile, the large surface area of the vesicle CdSe nano-semiconductor can increase the contact probability between catalyst and target and provide more surface-active centers. The photocatalytic mechanisms are analyzed by active species quenching. It indicates that h + and O 2 - are the main active species which play a major role in catalyzing environmental toxic pollutants. Simultaneously, the vesicle CdSe nano-semiconductor had high efficiency and stability. Copyright © 2017. Published by Elsevier B.V.

  6. Packaging of electro-microfluidic devices

    DOEpatents

    Benavides, Gilbert L.; Galambos, Paul C.; Emerson, John A.; Peterson, Kenneth A.; Giunta, Rachel K.; Zamora, David Lee; Watson, Robert D.

    2003-04-15

    A new architecture for packaging surface micromachined electro-microfluidic devices is presented. This architecture relies on two scales of packaging to bring fluid to the device scale (picoliters) from the macro-scale (microliters). The architecture emulates and utilizes electronics packaging technology. The larger package consists of a circuit board with embedded fluidic channels and standard fluidic connectors (e.g. Fluidic Printed Wiring Board). The embedded channels connect to the smaller package, an Electro-Microfluidic Dual-Inline-Package (EMDIP) that takes fluid to the microfluidic integrated circuit (MIC). The fluidic connection is made to the back of the MIC through Bosch-etched holes that take fluid to surface micromachined channels on the front of the MIC. Electrical connection is made to bond pads on the front of the MIC.

  7. Packaging of electro-microfluidic devices

    DOEpatents

    Benavides, Gilbert L.; Galambos, Paul C.; Emerson, John A.; Peterson, Kenneth A.; Giunta, Rachel K.; Watson, Robert D.

    2002-01-01

    A new architecture for packaging surface micromachined electro-microfluidic devices is presented. This architecture relies on two scales of packaging to bring fluid to the device scale (picoliters) from the macro-scale (microliters). The architecture emulates and utilizes electronics packaging technology. The larger package consists of a circuit board with embedded fluidic channels and standard fluidic connectors (e.g. Fluidic Printed Wiring Board). The embedded channels connect to the smaller package, an Electro-Microfluidic Dual-Inline-Package (EMDIP) that takes fluid to the microfluidic integrated circuit (MIC). The fluidic connection is made to the back of the MIC through Bosch-etched holes that take fluid to surface micromachined channels on the front of the MIC. Electrical connection is made to bond pads on the front of the MIC.

  8. Sterile Product Packaging and Delivery Systems.

    PubMed

    Akers, Michael J

    2015-01-01

    Both conventional and more advanced product container and delivery systems are the focus of this brief article. Six different product container systems will be discussed, plus advances in primary packaging for special delivery systems and needle technology.

  9. Three fundamental devices in one: a reconfigurable multifunctional device in two-dimensional WSe2

    NASA Astrophysics Data System (ADS)

    Dhakras, Prathamesh; Agnihotri, Pratik; Lee, Ji Ung

    2017-06-01

    The three pillars of semiconductor device technologies are (1) the p-n diode, (2) the metal-oxide-semiconductor field-effect transistor and (3) the bipolar junction transistor. They have enabled the unprecedented growth in the field of information technology that we see today. Until recently, the technological revolution for better, faster and more efficient devices has been governed by scaling down the device dimensions following Moore’s Law. With the slowing of Moore’s law, there is a need for alternative materials and computing technologies that can continue the advancement in functionality. Here, we describe a single, dynamically reconfigurable device that implements these three fundamental device functions. The device uses buried gates to achieve n- and p-channels and fits into a larger effort to develop devices with enhanced functionalities, including logic functions, over device scaling. As they are all surface conducting devices, we use one material parameter, the interface trap density of states, to describe the key figure-of-merit of each device.

  10. Applications of Optical Coherent Transient Technology to Pulse Shaping, Spectral Filtering, Arbitrary Waveform Generation and RF Beamforming

    DTIC Science & Technology

    2006-04-15

    was amplified by injection locking of a high power diode laser and further amplified to -300 mW with a semiconductor optical amplifier. This light...amplifiers at 793nm, cascaded injection locked amplifiers at 793nm, and frequency chirped lasers at 793nm. 15. SUBJECT TERMS Optical Coherent Transients...injection- locking for broadband optical signal amplification ................. 34 2.10. Tapered semiconductor optical amplifier

  11. A 94GHz Temperature Compensated Low Noise Amplifier in 45nm Silicon-on-Insulator Complementary Metal-Oxide Semiconductor (SOI CMOS)

    DTIC Science & Technology

    2014-01-01

    ring oscillator based temperature sensor will be designed to compensate for gain variations over temperature. For comparison to a competing solution...Simulated (Green) Capacitance of the GSG Pads ........................ 9 Figure 6: Die Picture and Schematic of the L-2L Coplanar Waveguides...complementary metal-oxide-semiconductor (CMOS) technology. A ring oscillator based temperature sensor was designed to compensate for gain variations

  12. IIP Update: A Packaged Coherent Doppler Wind Lidar Transceiver. Doppler Aerosol WiNd Lidar (DAWN)

    NASA Technical Reports Server (NTRS)

    Kavaya, Michael J.; Koch, Grady J.; Yu, Jirong; Trieu, Bo C.; Amzajerdian, Farzin; Singh, Upendra N.; Petros, Mulugeta

    2006-01-01

    The state-of-the-art 2-micron coherent Doppler wind lidar breadboard at NASA/LaRC will be engineered and compactly packaged consistent with future aircraft flights. The packaged transceiver will be integrated into a coherent Doppler wind lidar system test bed at LaRC. Atmospheric wind measurements will be made to validate the packaged technology. This will greatly advance the coherent part of the hybrid Doppler wind lidar solution to the need for global tropospheric wind measurements.

  13. Delidding and resealing hybrid microelectronic packages

    NASA Astrophysics Data System (ADS)

    Luce, W. F.

    1982-05-01

    The objective of this single phase MM and T contract was to develop the manufacturing technology necessary for the precision removal (delidding) and replacement (resealing) of covers on hermetically sealed hybrid microelectronic packages. The equipment and processes developed provide a rework technique which does not degrade the reliability of the package of the enclosed circuitry. A qualification test was conducted on 88 functional hybrid packages, with excellent results. A petition will be filed, accompanied by this report, requesting Mil-M-38510 be amended to allow this rework method.

  14. From Amorphous to Defined: Balancing the Risks of Spiral Development

    DTIC Science & Technology

    2007-04-30

    630 675 720 765 810 855 900 Time (Week) Work started and active PhIt [Requirements,Iter1] : JavelinCalibration work packages1 1 1 Work started and...active PhIt [Technology,Iter1] : JavelinCalibration work packages2 2 2 Work started and active PhIt [Design,Iter1] : JavelinCalibration work packages3 3 3 3...Work started and active PhIt [Manufacturing,Iter1] : JavelinCalibration work packages4 4 Work started and active PhIt [Use,Iter1] : JavelinCalibration

  15. Status and Trend of Automotive Power Packaging

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Liang, Zhenxian

    2012-01-01

    Comprehensive requirements in aspects of cost, reliability, efficiency, form factor, weight, and volume for power electronics modules in modern electric drive vehicles have driven the development of automotive power packaging technology intensively. Innovation in materials, interconnections, and processing techniques is leading to enormous improvements in power modules. In this paper, the technical development of and trends in power module packaging are evaluated by examining technical details with examples of industrial products. The issues and development directions for future automotive power module packaging are also discussed.

  16. Design requirements for SRB production control system. Volume 3: Package evaluation, modification and hardware

    NASA Technical Reports Server (NTRS)

    1981-01-01

    The software package evaluation was designed to analyze commercially available, field-proven, production control or manufacturing resource planning management technology and software package. The analysis was conducted by comparing SRB production control software requirements and conceptual system design to software package capabilities. The methodology of evaluation and the findings at each stage of evaluation are described. Topics covered include: vendor listing; request for information (RFI) document; RFI response rate and quality; RFI evaluation process; and capabilities versus requirements.

  17. Challenges to Scaling CIGS Photovoltaics

    NASA Astrophysics Data System (ADS)

    Stanbery, B. J.

    2011-03-01

    The challenges of scaling any photovoltaic technology to terawatts of global capacity are arguably more economic than technological or resource constraints. All commercial thin-film PV technologies are based on direct bandgap semiconductors whose absorption coefficient and bandgap alignment with the solar spectrum enable micron-thick coatings in lieu to hundreds of microns required using indirect-bandgap c-Si. Although thin-film PV reduces semiconductor materials cost, its manufacture is more capital intensive than c-Si production, and proportional to deposition rate. Only when combined with sufficient efficiency and cost of capital does this tradeoff yield lower manufacturing cost. CIGS has the potential to become the first thin film technology to achieve the terawatt benchmark because of its superior conversion efficiency, making it the only commercial thin film technology which demonstrably delivers performance comparable to the dominant incumbent, c-Si. Since module performance leverages total systems cost, this competitive advantage bears directly on CIGS' potential to displace c-Si and attract the requisite capital to finance the tens of gigawatts of annual production capacity needed to manufacture terawatts of PV modules apace with global demand growth.

  18. Enabling iron pyrite (FeS2) and related ternary pyrite compounds for high-performance solar energy applications

    NASA Astrophysics Data System (ADS)

    Caban Acevedo, Miguel

    The success of solar energy technologies depends not only on highly efficient solar-to-electrical energy conversion, charge storage or chemical fuel production, but also on dramatically reduced cost, to meet the future terawatt energy challenges we face. The enormous scale involved in the development of impactful solar energy technologies demand abundant and inexpensive materials, as well as energy-efficient and cost-effective processes. As a result, the investigation of semiconductor, catalyst and electrode materials made of earth-abundant and sustainable elements may prove to be of significant importance for the long-term adaptation of solar energy technologies on a larger scale. Among earth-abundant semiconductors, iron pyrite (cubic FeS2) has been considered the most promising solar energy absorber with the potential to achieve terawatt energy-scale deployment. Despite extensive synthetic progress and device efforts, the solar conversion efficiency of iron pyrite has remained below 3% since the 1990s, primarily due to a low open circuit voltage (V oc). The low photovoltage (Voc) of iron pyrite has puzzled scientists for decades and limited the development of cost-effective solar energy technologies based on this otherwise promising semiconductor. Here I report a comprehensive investigation of the syntheses and properties of iron pyrite materials, which reveals that the Voc of iron pyrite is limited by the ionization of a high density of intrinsic bulk defect states despite high density surface states and strong surface Fermi level pinning. Contrary to popular belief, bulk defects most-likely caused by intrinsic sulfur vacancies in iron pyrite must be controlled in order to enable this earth-abundant semiconductor for cost-effective and sustainable solar energy conversion. Lastly, the investigation of iron pyrite presented here lead to the discovery of ternary pyrite-type cobalt phosphosulfide (CoPS) as a highly-efficient earth-abundant catalyst material for electrochemical and solar energy driven hydrogen production.

  19. Carbon Nanotube based Nanotechnolgy

    NASA Astrophysics Data System (ADS)

    Meyyappan, M.

    2000-10-01

    Carbon nanotube(CNT) was discovered in the early 1990s and is an off-spring of C60(the fullerene or buckyball). CNT, depending on chirality and diameter, can be metallic or semiconductor and thus allows formation of metal-semiconductor and semiconductor-semiconductor junctions. CNT exhibits extraordinary electrical and mechanical properties and offers remarkable potential for revolutionary applications in electronics devices, computing and data storage technology, sensors, composites, storage of hydrogen or lithium for battery development, nanoelectromechanical systems(NEMS), and as tip in scanning probe microscopy(SPM) for imaging and nanolithography. Thus the CNT synthesis, characterization and applications touch upon all disciplines of science and engineering. A common growth method now is based on CVD though surface catalysis is key to synthesis, in contrast to many CVD applications common in microelectronics. A plasma based variation is gaining some attention. This talk will provide an overview of CNT properties, growth methods, applications, and research challenges and opportunities ahead.

  20. Quantum information density scaling and qubit operation time constraints of CMOS silicon-based quantum computer architectures

    NASA Astrophysics Data System (ADS)

    Rotta, Davide; Sebastiano, Fabio; Charbon, Edoardo; Prati, Enrico

    2017-06-01

    Even the quantum simulation of an apparently simple molecule such as Fe2S2 requires a considerable number of qubits of the order of 106, while more complex molecules such as alanine (C3H7NO2) require about a hundred times more. In order to assess such a multimillion scale of identical qubits and control lines, the silicon platform seems to be one of the most indicated routes as it naturally provides, together with qubit functionalities, the capability of nanometric, serial, and industrial-quality fabrication. The scaling trend of microelectronic devices predicting that computing power would double every 2 years, known as Moore's law, according to the new slope set after the 32-nm node of 2009, suggests that the technology roadmap will achieve the 3-nm manufacturability limit proposed by Kelly around 2020. Today, circuital quantum information processing architectures are predicted to take advantage from the scalability ensured by silicon technology. However, the maximum amount of quantum information per unit surface that can be stored in silicon-based qubits and the consequent space constraints on qubit operations have never been addressed so far. This represents one of the key parameters toward the implementation of quantum error correction for fault-tolerant quantum information processing and its dependence on the features of the technology node. The maximum quantum information per unit surface virtually storable and controllable in the compact exchange-only silicon double quantum dot qubit architecture is expressed as a function of the complementary metal-oxide-semiconductor technology node, so the size scale optimizing both physical qubit operation time and quantum error correction requirements is assessed by reviewing the physical and technological constraints. According to the requirements imposed by the quantum error correction method and the constraints given by the typical strength of the exchange coupling, we determine the workable operation frequency range of a silicon complementary metal-oxide-semiconductor quantum processor to be within 1 and 100 GHz. Such constraint limits the feasibility of fault-tolerant quantum information processing with complementary metal-oxide-semiconductor technology only to the most advanced nodes. The compatibility with classical complementary metal-oxide-semiconductor control circuitry is discussed, focusing on the cryogenic complementary metal-oxide-semiconductor operation required to bring the classical controller as close as possible to the quantum processor and to enable interfacing thousands of qubits on the same chip via time-division, frequency-division, and space-division multiplexing. The operation time range prospected for cryogenic control electronics is found to be compatible with the operation time expected for qubits. By combining the forecast of the development of scaled technology nodes with operation time and classical circuitry constraints, we derive a maximum quantum information density for logical qubits of 2.8 and 4 Mqb/cm2 for the 10 and 7-nm technology nodes, respectively, for the Steane code. The density is one and two orders of magnitude less for surface codes and for concatenated codes, respectively. Such values provide a benchmark for the development of fault-tolerant quantum algorithms by circuital quantum information based on silicon platforms and a guideline for other technologies in general.

  1. Solar energy harvesting by magnetic-semiconductor nanoheterostructure in water treatment technology.

    PubMed

    Mahmoodi, Vahid; Bastami, Tahereh Rohani; Ahmadpour, Ali

    2018-03-01

    Photocatalytic degradation of toxic organic pollutants in the wastewater using dispersed semiconductor nanophotocatalysts has a number of advantages such as high activity, cost effectiveness, and utilization of free solar energy. However, it is difficult to recover and recycle nanophotocatalysts since the fine dispersed nanoparticles are easily suspended in waters. Furthermore, a large amount of photocatalysts will lead to color contamination. Thus, it is necessary to prepare photocatalysts with easy separation for the reusable application. To take advantage of high photocatalysis activity and reusability, magnetic photocatalysts with separation function were utilized. In this review, the photocatalytic principle, structure, and application of the magnetic-semiconductor nanoheterostructure photocatalysts under solar light are evaluated. Graphical abstract ᅟ.

  2. Composition-matched molecular “solders” for semiconductors

    NASA Astrophysics Data System (ADS)

    Dolzhnikov, Dmitriy S.; Zhang, Hao; Jang, Jaeyoung; Son, Jae Sung; Panthani, Matthew G.; Shibata, Tomohiro; Chattopadhyay, Soma; Talapin, Dmitri V.

    2015-01-01

    We propose a general strategy to synthesize largely unexplored soluble chalcogenidometallates of cadmium, lead, and bismuth. These compounds can be used as “solders” for semiconductors widely used in photovoltaics and thermoelectrics. The addition of solder helped to bond crystal surfaces and link nano- or mesoscale particles together. For example, CdSe nanocrystals with Na2Cd2Se3 solder was used as a soluble precursor for CdSe films with electron mobilities exceeding 300 square centimeters per volt-second. CdTe, PbTe, and Bi2Te3 powders were molded into various shapes in the presence of a small additive of composition-matched chalcogenidometallate or chalcogel, thus opening new design spaces for semiconductor technologies.

  3. Cadmium Telluride Semiconductor Detector for Improved Spatial and Energy Resolution Radioisotopic Imaging

    PubMed Central

    Abbaspour, Samira; Mahmoudian, Babak; Islamian, Jalil Pirayesh

    2017-01-01

    The detector in single-photon emission computed tomography has played a key role in the quality of the images. Over the past few decades, developments in semiconductor detector technology provided an appropriate substitution for scintillation detectors in terms of high sensitivity, better energy resolution, and also high spatial resolution. One of the considered detectors is cadmium telluride (CdTe). The purpose of this paper is to review the CdTe semiconductor detector used in preclinical studies, small organ and small animal imaging, also research in nuclear medicine and other medical imaging modalities by a complete inspect on the material characteristics, irradiation principles, applications, and epitaxial growth method. PMID:28553175

  4. Advanced Microelectronics Technologies for Future Small Satellite Systems

    NASA Technical Reports Server (NTRS)

    Alkalai, Leon

    1999-01-01

    Future small satellite systems for both Earth observation as well as deep-space exploration are greatly enabled by the technological advances in deep sub-micron microelectronics technologies. Whereas these technological advances are being fueled by the commercial (non-space) industries, more recently there has been an exciting new synergism evolving between the two otherwise disjointed markets. In other words, both the commercial and space industries are enabled by advances in low-power, highly integrated, miniaturized (low-volume), lightweight, and reliable real-time embedded systems. Recent announcements by commercial semiconductor manufacturers to introduce Silicon On Insulator (SOI) technology into their commercial product lines is driven by the need for high-performance low-power integrated devices. Moreover, SOI has been the technology of choice for many space semiconductor manufacturers where radiation requirements are critical. This technology has inherent radiation latch-up immunity built into the process, which makes it very attractive to space applications. In this paper, we describe the advanced microelectronics and avionics technologies under development by NASA's Deep Space Systems Technology Program (also known as X2000). These technologies are of significant benefit to both the commercial satellite as well as the deep-space and Earth orbiting science missions. Such a synergistic technology roadmap may truly enable quick turn-around, low-cost, and highly capable small satellite systems for both Earth observation as well as deep-space missions.

  5. Efficient Solar Energy Conversion Systems for Hydrogen Production from Water using Semiconductor Photoelectrodes and Photocatalysts

    NASA Astrophysics Data System (ADS)

    Sayama, K.; Arai, T.

    2008-02-01

    Efficient solar energy conversion system for hydrogen production from water, solar-hydrogen system, is one of most important technologies for genuinely sustainable development of the society in the world wide scale. However, there are many problems to breakthrough such as low solar-to-H2 efficiency (STH), high cost, low stability, etc in order to realize the system practically and economically. The solar-hydrogen systems using semiconductors are mainly classified as follows; solar cell-electrolysis system, semiconductor photoelectrode system, and photocatalyst system. There are various merits and demerits in each system. The solar cell-electrolysis system is very efficient but is very high cost. The photocatalyst system is very simple and relatively low cost, but the efficiency is still very low. On the other hand, various semiconductor systems with high efficiency have been investigated. A high STH more than 10% was reported using non-oxide semiconductor photoelectrodes such as InGaP, while the preparation methods were costly. In a European project, some simple oxide semiconductor photoelectrodes such as Fe2O3 and WO3 are mainly studied. Here, we investigated various photoelectrodes using mixed metal oxide especially on BiVO4 semiconductor, and a high throughput screening system of new visible light responsible semiconductors for photoelectrode and photocatalyst. Moreover, photocatalysis-electrolysis hybrid system for economical H2 production is studied to overcome the demerit of photocatalyst system on the gas separation and low efficiency.

  6. Nanoscience and Nanotechnology: From Energy Applications to Advanced Medical Therapies

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Tijana Rajh

    2009-10-14

    Dr. Rajh will present a general talk on nanotechnology – an overview of why nanotechnology is important and how it is useful in various fields. The specific focus will be on Solar energy conversion, environmental applications and advanced medical therapies. She has broad expertise in synthesis and characterization of nanomaterials that are used in nanotechnology including novel hybrid systems connecting semiconductors to biological molecules like DNA and antibodies. This technology could lead to new gene therapy procedures, cancer treatments and other medical applications. She will also discuss technologies made possible by organizing small semiconductor particles called quantum dots, materials thatmore » exhibit a rich variety of phenomena that are size and shape dependent. Development of these new materials that harnesses the unique properties of materials at the 1-100 nanometer scale resulted in the new field of nanotechnology that currently affects many applications in technological and medical fields.« less

  7. An overview of silicon carbide device technology

    NASA Technical Reports Server (NTRS)

    Neudeck, Philip G.; Matus, Lawrence G.

    1992-01-01

    Recent progress in the development of silicon carbide (SiC) as a semiconductor is briefly reviewed. This material shows great promise towards providing electronic devices that can operate under the high-temperature, high-radiation, and/or high-power conditions where current semiconductor technologies fail. High quality single crystal wafers have become available, and techniques for growing high quality epilayers have been refined to the point where experimental SiC devices and circuits can be developed. The prototype diodes and transistors that have been produced to date show encouraging characteristics, but by the same token they also exhibit some device-related problems that are not unlike those faced in the early days of silicon technology development. Although these problems will not prevent the implementation of some useful circuits, the performance and operating regime of SiC electronics will be limited until these device-related issues are solved.

  8. Picosecond UV single photon detectors with lateral drift field: Concept and technologies

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Yakimov, M.; Oktyabrsky, S.; Murat, P.

    2015-09-01

    Group III–V semiconductor materials are being considered as a Si replacement for advanced logic devices for quite some time. Advances in III–V processing technologies, such as interface and surface passivation, large area deep submicron lithography with high-aspect ratio etching primarily driven by the metal-oxide-semiconductor field-effect transistor development can also be used for other applications. In this paper we will focus on photodetectors with the drift field parallel to the surface. We compare the proposed concept to the state-of-the-art Si-based technology and discuss requirements which need to be satisfied for such detectors to be used in a single photon counting modemore » in blue and ultraviolet spectral region with about 10 ps photon timing resolution essential for numerous applications ranging from high-energy physics to medical imaging.« less

  9. Nanoscience and Nanotechnology: From Energy Applications to Advanced Medical Therapies

    ScienceCinema

    Tijana Rajh

    2017-12-09

    Dr. Rajh will present a general talk on nanotechnology – an overview of why nanotechnology is important and how it is useful in various fields. The specific focus will be on Solar energy conversion, environmental applications and advanced medical therapies. She has broad expertise in synthesis and characterization of nanomaterials that are used in nanotechnology including novel hybrid systems connecting semiconductors to biological molecules like DNA and antibodies. This technology could lead to new gene therapy procedures, cancer treatments and other medical applications. She will also discuss technologies made possible by organizing small semiconductor particles called quantum dots, materials that exhibit a rich variety of phenomena that are size and shape dependent. Development of these new materials that harnesses the unique properties of materials at the 1-100 nanometer scale resulted in the new field of nanotechnology that currently affects many applications in technological and medical fields.

  10. Risk Management of Microelectronics: The NASA Electronic Parts and Packaging (NEPP) Program

    NASA Technical Reports Server (NTRS)

    LaBel, Kenneth A.; Sampson, Michael J.

    2005-01-01

    This viewgraph information provides information on how the NASA Electronic Parts and Packaging (NEPP) Program evaluates the reliability of technologies for Electrical, Electronic, and Electromechanical (EEE) parts, and their suitability for spacecraft applications.

  11. Water-soluble nanocrystalline cellulose films with highly transparent and oxygen barrier properties

    NASA Astrophysics Data System (ADS)

    Cheng, Shaoling; Zhang, Yapei; Cha, Ruitao; Yang, Jinliang; Jiang, Xingyu

    2015-12-01

    By mixing a guar gum (GG) solution with a nanocrystalline cellulose (NCC) dispersion using a novel circular casting technology, we manufactured biodegradable films as packaging materials with improved optical and mechanical properties. These films could act as barriers for oxygen and could completely dissolve in water within 5 h. We also compared the effect of nanocomposite films and commercial food packaging materials on the preservation of food.By mixing a guar gum (GG) solution with a nanocrystalline cellulose (NCC) dispersion using a novel circular casting technology, we manufactured biodegradable films as packaging materials with improved optical and mechanical properties. These films could act as barriers for oxygen and could completely dissolve in water within 5 h. We also compared the effect of nanocomposite films and commercial food packaging materials on the preservation of food. Electronic supplementary information (ESI) available. See DOI: 10.1039/c5nr07647a

  12. Evaluation Framework and Analyses for Thermal Energy Storage Integrated with Packaged Air Conditioning

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Kung, F.; Deru, M.; Bonnema, E.

    2013-10-01

    Few third-party guidance documents or tools are available for evaluating thermal energy storage (TES) integrated with packaged air conditioning (AC), as this type of TES is relatively new compared to TES integrated with chillers or hot water systems. To address this gap, researchers at the National Renewable Energy Laboratory conducted a project to improve the ability of potential technology adopters to evaluate TES technologies. Major project outcomes included: development of an evaluation framework to describe key metrics, methodologies, and issues to consider when assessing the performance of TES systems integrated with packaged AC; application of multiple concepts from the evaluationmore » framework to analyze performance data from four demonstration sites; and production of a new simulation capability that enables modeling of TES integrated with packaged AC in EnergyPlus. This report includes the evaluation framework and analysis results from the project.« less

  13. Test program for transmitter experiment package and heat pipe system for the communications technology satellite

    NASA Technical Reports Server (NTRS)

    Depauw, J. F.; Reader, K. E.; Staskus, J. V.

    1976-01-01

    The test program is described for the 200 watt transmitter experiment package and the variable conductance heat pipe system which are components of the high-power transponder aboard the Communications Technology Satellite. The program includes qualification tests to demonstrate design adequacy, acceptance tests to expose latent defects in flight hardware, and development tests to integrate the components into the transponder system and to demonstrate compatibility.

  14. Conceptual definition of a high voltage power supply test facility

    NASA Technical Reports Server (NTRS)

    Biess, John J.; Chu, Teh-Ming; Stevens, N. John

    1989-01-01

    NASA Lewis Research Center is presently developing a 60 GHz traveling wave tube for satellite cross-link communications. The operating voltage for this new tube is - 20 kV. There is concern about the high voltage insulation system and NASA is planning a space station high voltage experiment that will demonstrate both the 60 GHz communications and high voltage electronics technology. The experiment interfaces, requirements, conceptual design, technology issues and safety issues are determined. A block diagram of the high voltage power supply test facility was generated. It includes the high voltage power supply, the 60 GHz traveling wave tube, the communications package, the antenna package, a high voltage diagnostics package and a command and data processor system. The interfaces with the space station and the attached payload accommodations equipment were determined. A brief description of the different subsystems and a discussion of the technology development needs are presented.

  15. Effect of nickel silicide gettering on metal-induced crystallized polycrystalline-silicon thin-film transistors

    NASA Astrophysics Data System (ADS)

    Kim, Hyung Yoon; Seok, Ki Hwan; Chae, Hee Jae; Lee, Sol Kyu; Lee, Yong Hee; Joo, Seung Ki

    2017-06-01

    Low-temperature polycrystalline-silicon (poly-Si) thin-film transistors (TFTs) fabricated via metal-induced crystallization (MIC) are attractive candidates for use in active-matrix flat-panel displays. However, these exhibit a large leakage current due to the nickel silicide being trapped at the grain boundaries of the poly-Si. We reduced the leakage current of the MIC poly-Si TFTs by developing a gettering method to remove the Ni impurities using a Si getter layer and natively-formed SiO2 as the etch stop interlayer. The Ni trap state density (Nt) in the MIC poly-Si film decreased after the Ni silicide gettering, and as a result, the leakage current of the MIC poly-Si TFTs decreased. Furthermore, the leakage current of MIC poly-Si TFTs gradually decreased with additional gettering. To explain the gettering effect on MIC poly-Si TFTs, we suggest an appropriate model. He received the B.S. degree in School of Advanced Materials Engineering from Kookmin University, Seoul, South Korea in 2012, and the M.S. degree in Department of Materials Science and Engineering from Seoul National University, Seoul, South Korea in 2014. He is currently pursuing the Ph.D. degree with the Department of Materials Science and Engineering, Seoul National University, Seoul. He is involved in semiconductor device fabrication technology and top-gate polycrystalline-silicon thin-film transistors. He received the M.S. degree in innovation technology from Ecol Polytechnique, Palaiseau, France in 2013. He is currently pursuing the Ph.D. degree with the Department of Materials Science and Engineering, Seoul National University, Seoul. He is involved in semiconductor device fabrication technology and bottom-gate polycrystalline-silicon thin-film transistors. He is currently pursuing the integrated M.S and Ph.D course with the Department of Materials Science and Engineering, Seoul National University, Seoul. He is involved in semiconductor device fabrication technology and copper-gate polycrystalline-silicon thin-film transistors. He is currently pursuing the integrated M.S and Ph.D course with the Department of Materials Science and Engineering, Seoul National University, Seoul. He is involved in semiconductor device fabrication technology and bottom-gate polycrystalline-silicon thin-film transistors. He is currently pursuing the integrated M.S and Ph.D course with the Department of Materials Science and Engineering, Seoul National University, Seoul. He is involved in semiconductor device fabrication technology and bottom-gate polycrystalline-silicon thin-film transistors. He received the B.S. degree in metallurgical engineering from Seoul National University, Seoul, South Korea, in 1974, and the M.S. and Ph.D. degrees in material science and engineering from Stanford University, Stanford, CA, USA, in 1980 and 1983, respectively. He is currently a Professor with the Department of Materials Science and Engineering, Seoul National University, Seoul.

  16. Electronics Troubleshooting. High-Technology Training Module.

    ERIC Educational Resources Information Center

    Lodahl, Dan

    This learning module for a postsecondary electronics course in solid state circuits is designed to help teachers lead students through electronics troubleshooting. The module is intended to be used for a second-semester technical college course for electromechanical technology majors. The module introduces students to semiconductor devices and…

  17. High Definition Television: A New Challenge for Telecommunication Policy.

    ERIC Educational Resources Information Center

    Hongcharu, Boonchai

    The telecommunications industry has now entered the most critical period of evolution in television technology since the introduction of color television. The transition to high definition television (HDTV), with related technologies such as semiconductors and computers, would mean a multi-billion dollar business for the telecommunications…

  18. Naval Science & Technology: Enabling the Future Force

    DTIC Science & Technology

    2013-04-01

    corn for disruptive technologies Laser Cooling Spintronics Bz 1st U.S. Intel satellite GRAB Semiconductors GaAs, GaN, SiC GPS...Payoff • Innovative and game-changing • Approved by Corporate Board • Delivers prototype Innovative Naval Prototypes (5-10 Year) Disruptive ... Technologies Free Electron Laser Integrated Topside EM Railgun Sea Base Enablers Tactical Satellite Large Displacement UUV AACUS Directed

  19. Single-silicon CCD-CMOS platform for multi-spectral detection from terahertz to x-rays.

    PubMed

    Shalaby, Mostafa; Vicario, Carlo; Hauri, Christoph P

    2017-11-15

    Charge-coupled devices (CCDs) are a well-established imaging technology in the visible and x-ray frequency ranges. However, the small quantum photon energies of terahertz radiation have hindered the use of this mature semiconductor technological platform in this frequency range, leaving terahertz imaging totally dependent on low-resolution bolometer technologies. Recently, it has been shown that silicon CCDs can detect terahertz photons at a high field, but the detection sensitivity is limited. Here we show that silicon, complementary metal-oxide-semiconductor (CMOS) technology offers enhanced detection sensitivity of almost two orders of magnitude, compared to CCDs. Our findings allow us to extend the low-frequency terahertz cutoff to less than 2 THz, nearly closing the technological gap with electronic imagers operating up to 1 THz. Furthermore, with the silicon CCD/CMOS technology being sensitive to mid-infrared (mid-IR) and the x-ray ranges, we introduce silicon as a single detector platform from 1 EHz to 2 THz. This overcomes the present challenge in spatially overlapping a terahertz/mid-IR pump and x-ray probe radiation at facilities such as free electron lasers, synchrotron, and laser-based x-ray sources.

  20. Computational Modeling of Ultrafast Pulse Propagation in Nonlinear Optical Materials

    NASA Technical Reports Server (NTRS)

    Goorjian, Peter M.; Agrawal, Govind P.; Kwak, Dochan (Technical Monitor)

    1996-01-01

    There is an emerging technology of photonic (or optoelectronic) integrated circuits (PICs or OEICs). In PICs, optical and electronic components are grown together on the same chip. rib build such devices and subsystems, one needs to model the entire chip. Accurate computer modeling of electromagnetic wave propagation in semiconductors is necessary for the successful development of PICs. More specifically, these computer codes would enable the modeling of such devices, including their subsystems, such as semiconductor lasers and semiconductor amplifiers in which there is femtosecond pulse propagation. Here, the computer simulations are made by solving the full vector, nonlinear, Maxwell's equations, coupled with the semiconductor Bloch equations, without any approximations. The carrier is retained in the description of the optical pulse, (i.e. the envelope approximation is not made in the Maxwell's equations), and the rotating wave approximation is not made in the Bloch equations. These coupled equations are solved to simulate the propagation of femtosecond optical pulses in semiconductor materials. The simulations describe the dynamics of the optical pulses, as well as the interband and intraband.

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