seu-based interconnect errors: Topics by Science.gov

Sample records for seu-based interconnect errors

Verification of a SEU model for advanced 1-micron CMOS structures using heavy ions

NASA Technical Reports Server (NTRS)

Cable, J. S.; Carter, J. R.; Witteles, A. A.

1986-01-01

Modeling and test results are reported for 1 micron CMOS circuits. Analytical predictions are correlated with experimental data, and sensitivities to process and design variations are discussed. Unique features involved in predicting the SEU performance of these devices are described. The results show that the critical charge for upset exhibits a strong dependence on pulse width for very fast devices, and upset predictions must factor in the pulse shape. Acceptable SEU error rates can be achieved for a 1 micron bulk CMOS process. A thin retrograde well provides complete SEU immunity for N channel hits at normal incidence angle. Source interconnect resistance can be important parameter in determining upset rates, and Cf-252 testing can be a valuable tool for cost-effective SEU testing.
SEU induced errors observed in microprocessor systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Asenek, V.; Underwood, C.; Oldfield, M.

In this paper, the authors present software tools for predicting the rate and nature of observable SEU induced errors in microprocessor systems. These tools are built around a commercial microprocessor simulator and are used to analyze real satellite application systems. Results obtained from simulating the nature of SEU induced errors are shown to correlate with ground-based radiation test data.
Single-Event Upset Characterization of Common First- and Second-Order All-Digital Phase-Locked Loops

NASA Astrophysics Data System (ADS)

Chen, Y. P.; Massengill, L. W.; Kauppila, J. S.; Bhuva, B. L.; Holman, W. T.; Loveless, T. D.

2017-08-01

The single-event upset (SEU) vulnerability of common first- and second-order all-digital-phase-locked loops (ADPLLs) is investigated through field-programmable gate array-based fault injection experiments. SEUs in the highest order pole of the loop filter and fraction-based phase detectors (PDs) may result in the worst case error response, i.e., limit cycle errors, often requiring system restart. SEUs in integer-based linear PDs may result in loss-of-lock errors, while SEUs in bang-bang PDs only result in temporary-frequency errors. ADPLLs with the same frequency tuning range but fewer bits in the control word exhibit better overall SEU performance.
An SEU resistant 256K SOI SRAM

NASA Astrophysics Data System (ADS)

Hite, L. R.; Lu, H.; Houston, T. W.; Hurta, D. S.; Bailey, W. E.

1992-12-01

A novel SEU (single event upset) resistant SRAM (static random access memory) cell has been implemented in a 256K SOI (silicon on insulator) SRAM that has attractive performance characteristics over the military temperature range of -55 to +125 C. These include worst-case access time of 40 ns with an active power of only 150 mW at 25 MHz, and a worst-case minimum WRITE pulse width of 20 ns. Measured SEU performance gives an Adams 10 percent worst-case error rate of 3.4 x 10 exp -11 errors/bit-day using the CRUP code with a conservative first-upset LET threshold. Modeling does show that higher bipolar gain than that measured on a sample from the SRAM lot would produce a lower error rate. Measurements show the worst-case supply voltage for SEU to be 5.5 V. Analysis has shown this to be primarily caused by the drain voltage dependence of the beta of the SOI parasitic bipolar transistor. Based on this, SEU experiments with SOI devices should include measurements as a function of supply voltage, rather than the traditional 4.5 V, to determine the worst-case condition.
SEU System Analysis: Not Just the Sum of All Parts

NASA Technical Reports Server (NTRS)

Berg, Melanie D.; Label, Kenneth

2014-01-01

Single event upset (SEU) analysis of complex systems is challenging. Currently, system SEU analysis is performed by component level partitioning and then either: the most dominant SEU cross-sections (SEUs) are used in system error rate calculations; or the partition SEUs are summed to eventually obtain a system error rate. In many cases, system error rates are overestimated because these methods generally overlook system level derating factors. The problem with overestimating is that it can cause overdesign and consequently negatively affect the following: cost, schedule, functionality, and validation/verification. The scope of this presentation is to discuss the risks involved with our current scheme of SEU analysis for complex systems; and to provide alternative methods for improvement.
Soft-error tolerance and energy consumption evaluation of embedded computer with magnetic random access memory in practical systems using computer simulations

NASA Astrophysics Data System (ADS)

Nebashi, Ryusuke; Sakimura, Noboru; Sugibayashi, Tadahiko

2017-08-01

We evaluated the soft-error tolerance and energy consumption of an embedded computer with magnetic random access memory (MRAM) using two computer simulators. One is a central processing unit (CPU) simulator of a typical embedded computer system. We simulated the radiation-induced single-event-upset (SEU) probability in a spin-transfer-torque MRAM cell and also the failure rate of a typical embedded computer due to its main memory SEU error. The other is a delay tolerant network (DTN) system simulator. It simulates the power dissipation of wireless sensor network nodes of the system using a revised CPU simulator and a network simulator. We demonstrated that the SEU effect on the embedded computer with 1 Gbit MRAM-based working memory is less than 1 failure in time (FIT). We also demonstrated that the energy consumption of the DTN sensor node with MRAM-based working memory can be reduced to 1/11. These results indicate that MRAM-based working memory enhances the disaster tolerance of embedded computers.
Single event induced transients in I/O devices - A characterization

NASA Technical Reports Server (NTRS)

Newberry, D. M.; Kaye, D. H.; Soli, G. A.

1990-01-01

The results of single-event upset (SEU) testing performed to evaluate the parametric transients, i.e., amplitude and duration, in several I/O devices, and the impact of these transients are discussed. The failure rate of these devices is dependent on the susceptibility of interconnected devices to the resulting transient change in the output of the I/O device. This failure rate, which is a function of the susceptibility of the interconnected device as well as the SEU response of the I/O device itself, may be significantly different from an upset rate calculated without taking these factors into account. The impact at the system level is discussed by way of an example.
DOE Office of Scientific and Technical Information (OSTI.GOV)

Batista, Antonio J. N.; Santos, Bruno; Fernandes, Ana

The data acquisition and control instrumentation cubicles room of the ITER tokamak will be irradiated with neutrons during the fusion reactor operation. A Virtex-6 FPGA from Xilinx (XC6VLX365T-1FFG1156C) is used on the ATCA-IO-PROCESSOR board, included in the ITER Catalog of I and C products - Fast Controllers. The Virtex-6 is a re-programmable logic device where the configuration is stored in Static RAM (SRAM), functional data stored in dedicated Block RAM (BRAM) and functional state logic in Flip-Flops. Single Event Upsets (SEU) due to the ionizing radiation of neutrons causes soft errors, unintended changes (bit-flips) to the values stored in statemore » elements of the FPGA. The SEU monitoring and soft errors repairing, when possible, were explored in this work. An FPGA built-in Soft Error Mitigation (SEM) controller detects and corrects soft errors in the FPGA configuration memory. Novel SEU sensors with Error Correction Code (ECC) detect and repair the BRAM memories. Proper management of SEU can increase reliability and availability of control instrumentation hardware for nuclear applications. The results of the tests performed using the SEM controller and the BRAM SEU sensors are presented for a Virtex-6 FPGA (XC6VLX240T-1FFG1156C) when irradiated with neutrons from the Portuguese Research Reactor (RPI), a 1 MW nuclear fission reactor operated by IST in the neighborhood of Lisbon. Results show that the proposed SEU mitigation technique is able to repair the majority of the detected SEU errors in the configuration and BRAM memories. (authors)« less
Individual pore and interconnection size analysis of macroporous ceramic scaffolds using high-resolution X-ray tomography

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jerban, Saeed, E-mail: saeed.jerban@usherbrooke.ca

2016-08-15

The pore interconnection size of β-tricalcium phosphate scaffolds plays an essential role in the bone repair process. Although, the μCT technique is widely used in the biomaterial community, it is rarely used to measure the interconnection size because of the lack of algorithms. In addition, discrete nature of the μCT introduces large systematic errors due to the convex geometry of interconnections. We proposed, verified and validated a novel pore-level algorithm to accurately characterize the individual pores and interconnections. Specifically, pores and interconnections were isolated, labeled, and individually analyzed with high accuracy. The technique was verified thoroughly by visually inspecting andmore » verifying over 3474 properties of randomly selected pores. This extensive verification process has passed a one-percent accuracy criterion. Scanning errors inherent in the discretization, which lead to both dummy and significantly overestimated interconnections, have been examined using computer-based simulations and additional high-resolution scanning. Then accurate correction charts were developed and used to reduce the scanning errors. Only after the corrections, both the μCT and SEM-based results converged, and the novel algorithm was validated. Material scientists with access to all geometrical properties of individual pores and interconnections, using the novel algorithm, will have a more-detailed and accurate description of the substitute architecture and a potentially deeper understanding of the link between the geometric and biological interaction. - Highlights: •An algorithm is developed to analyze individually all pores and interconnections. •After pore isolating, the discretization errors in interconnections were corrected. •Dummy interconnections and overestimated sizes were due to thin material walls. •The isolating algorithm was verified through visual inspection (99% accurate). •After correcting for the systematic errors, algorithm was validated successfully.« less
The single event upset environment for avionics at high latitude

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sims, A.J.; Dyer, C.S.; Peerless, C.L.

1994-12-01

Modern avionic systems for civil and military applications are becoming increasingly reliant upon embedded microprocessors and associated memory devices. The phenomenon of single event upset (SEU) is well known in space systems and designers have generally been careful to use SEU tolerant devices or to implement error detection and correction (EDAC) techniques where appropriate. In the past, avionics designers have had no reason to consider SEU effects but is clear that the more prevalent use of memory devices combined with increasing levels of IC integration will make SEU mitigation an important design consideration for future avionic systems. To this end,more » it is necessary to work towards producing models of the avionics SEU environment which will permit system designers to choose components and EDAC techniques which are based on predictions of SEU rates correct to much better than an order of magnitude. Measurements of the high latitude SEU environment at avionics altitude have been made on board a commercial airliner. Results are compared with models of primary and secondary cosmic rays and atmospheric neutrons. Ground based SEU tests of static RAMs are used to predict rates in flight.« less
SRAM Based Re-programmable FPGA for Space Applications

NASA Technical Reports Server (NTRS)

Wang, J. J.; Sun, J. S.; Cronquist, B. E.; McCollum, J. L.; Speers, T. M.; Plants, W. C.; Katz, R. B.

1999-01-01

An SRAM (static random access memory)-based reprogrammable FPGA (field programmable gate array) is investigated for space applications. A new commercial prototype, named the RS family, was used as an example for the investigation. The device is fabricated in a 0.25 micrometers CMOS technology. Its architecture is reviewed to provide a better understanding of the impact of single event upset (SEU) on the device during operation. The SEU effect of different memories available on the device is evaluated. Heavy ion test data and SPICE simulations are used integrally to extract the threshold LET (linear energy transfer). Together with the saturation cross-section measurement from the layout, a rate prediction is done on each memory type. The SEU in the configuration SRAM is identified as the dominant failure mode and is discussed in detail. The single event transient error in combinational logic is also investigated and simulated by SPICE. SEU mitigation by hardening the memories and employing EDAC (error detection and correction) at the device level are presented. For the configuration SRAM (CSRAM) cell, the trade-off between resistor de-coupling and redundancy hardening techniques are investigated with interesting results. Preliminary heavy ion test data show no sign of SEL (single event latch-up). With regard to ionizing radiation effects, the increase in static leakage current (static I(sub CC)) measured indicates a device tolerance of approximately 50krad(Si).
An advanced SEU tolerant latch based on error detection

NASA Astrophysics Data System (ADS)

Xu, Hui; Zhu, Jianwei; Lu, Xiaoping; Li, Jingzhao

2018-05-01

This paper proposes a latch that can mitigate SEUs via an error detection circuit. The error detection circuit is hardened by a C-element and a stacked PMOS. In the hold state, a particle strikes the latch or the error detection circuit may cause a fault logic state of the circuit. The error detection circuit can detect the upset node in the latch and the fault output will be corrected. The upset node in the error detection circuit can be corrected by the C-element. The power dissipation and propagation delay of the proposed latch are analyzed by HSPICE simulations. The proposed latch consumes about 77.5% less energy and 33.1% less propagation delay than the triple modular redundancy (TMR) latch. Simulation results demonstrate that the proposed latch can mitigate SEU effectively. Project supported by the National Natural Science Foundation of China (Nos. 61404001, 61306046), the Anhui Province University Natural Science Research Major Project (No. KJ2014ZD12), the Huainan Science and Technology Program (No. 2013A4011), and the National Natural Science Foundation of China (No. 61371025).
Effects of Temperature and Supply Voltage on SEU- and SET-Induced Errors in Bulk 40-nm Sequential Circuits

NASA Astrophysics Data System (ADS)

Chen, R. M.; Diggins, Z. J.; Mahatme, N. N.; Wang, L.; Zhang, E. X.; Chen, Y. P.; Zhang, H.; Liu, Y. N.; Narasimham, B.; Witulski, A. F.; Bhuva, B. L.; Fleetwood, D. M.

2017-08-01

The single-event sensitivity of bulk 40-nm sequential circuits is investigated as a function of temperature and supply voltage. An overall increase in SEU cross section versus temperature is observed at relatively high supply voltages. However, at low supply voltages, there is a threshold temperature beyond which the SEU cross section decreases with further increases in temperature. Single-event transient induced errors in flip-flops also increase versus temperature at relatively high supply voltages and are more sensitive to temperature variation than those caused by single-event upsets.
Single event upset (SEU) testing at JPL

NASA Technical Reports Server (NTRS)

Coss, James R.

1987-01-01

It is believed that the increase in SEUs with more modern devices may have serious consequences for future space missions. The physics behind an SEU is discussed as well as SEU test philosophy and equipment, and testing results. It is concluded that the problem may be ameliorated by careful device selection and the use of redundancy or error correction.
Impact of Temporal Masking of Flip-Flop Upsets on Soft Error Rates of Sequential Circuits

NASA Astrophysics Data System (ADS)

Chen, R. M.; Mahatme, N. N.; Diggins, Z. J.; Wang, L.; Zhang, E. X.; Chen, Y. P.; Liu, Y. N.; Narasimham, B.; Witulski, A. F.; Bhuva, B. L.; Fleetwood, D. M.

2017-08-01

Reductions in single-event (SE) upset (SEU) rates for sequential circuits due to temporal masking effects are evaluated. The impacts of supply voltage, combinational-logic delay, flip-flop (FF) SEU performance, and particle linear energy transfer (LET) values are analyzed for SE cross sections of sequential circuits. Alpha particles and heavy ions with different LET values are used to characterize the circuits fabricated at the 40-nm bulk CMOS technology node. Experimental results show that increasing the delay of the logic circuit present between FFs and decreasing the supply voltage are two effective ways of reducing SE error rates for sequential circuits for particles with low LET values due to temporal masking. SEU-hardened FFs benefit less from temporal masking than conventional FFs. Circuit hardening implications for SEU-hardened and unhardened FFs are discussed.
A method to compute SEU fault probabilities in memory arrays with error correction

NASA Technical Reports Server (NTRS)

Gercek, Gokhan

1994-01-01

With the increasing packing densities in VLSI technology, Single Event Upsets (SEU) due to cosmic radiations are becoming more of a critical issue in the design of space avionics systems. In this paper, a method is introduced to compute the fault (mishap) probability for a computer memory of size M words. It is assumed that a Hamming code is used for each word to provide single error correction. It is also assumed that every time a memory location is read, single errors are corrected. Memory is read randomly whose distribution is assumed to be known. In such a scenario, a mishap is defined as two SEU's corrupting the same memory location prior to a read. The paper introduces a method to compute the overall mishap probability for the entire memory for a mission duration of T hours.
Low-Energy Proton Testing Methodology

NASA Technical Reports Server (NTRS)

Pellish, Jonathan A.; Marshall, Paul W.; Heidel, David F.; Schwank, James R.; Shaneyfelt, Marty R.; Xapsos, M.A.; Ladbury, Raymond L.; LaBel, Kenneth A.; Berg, Melanie; Kim, Hak S.;

2009-01-01

Use of low-energy protons and high-energy light ions is becoming necessary to investigate current-generation SEU thresholds. Systematic errors can dominate measurements made with low-energy protons. Range and energy straggling contribute to systematic error. Low-energy proton testing is not a step-and-repeat process. Low-energy protons and high-energy light ions can be used to measure SEU cross section of single sensitive features; important for simulation.

Studies Of Single-Event-Upset Models

NASA Technical Reports Server (NTRS)

Zoutendyk, J. A.; Smith, L. S.; Soli, G. A.

1988-01-01

Report presents latest in series of investigations of "soft" bit errors known as single-event upsets (SEU). In this investigation, SEU response of low-power, Schottky-diode-clamped, transistor/transistor-logic (TTL) static random-access memory (RAM) observed during irradiation by Br and O ions in ranges of 100 to 240 and 20 to 100 MeV, respectively. Experimental data complete verification of computer model used to simulate SEU in this circuit.
Performance optimization of dense-array concentrator photovoltaic system considering effects of circumsolar radiation and slope error.

PubMed

Wong, Chee-Woon; Chong, Kok-Keong; Tan, Ming-Hui

2015-07-27

This paper presents an approach to optimize the electrical performance of dense-array concentrator photovoltaic system comprised of non-imaging dish concentrator by considering the circumsolar radiation and slope error effects. Based on the simulated flux distribution, a systematic methodology to optimize the layout configuration of solar cells interconnection circuit in dense array concentrator photovoltaic module has been proposed by minimizing the current mismatch caused by non-uniformity of concentrated sunlight. An optimized layout of interconnection solar cells circuit with minimum electrical power loss of 6.5% can be achieved by minimizing the effects of both circumsolar radiation and slope error.
Prediction of error rates in dose-imprinted memories on board CRRES by two different methods. [Combined Release and Radiation Effects Satellite

NASA Technical Reports Server (NTRS)

Brucker, G. J.; Stassinopoulos, E. G.

1991-01-01

An analysis of the expected space radiation effects on the single event upset (SEU) properties of CMOS/bulk memories onboard the Combined Release and Radiation Effects Satellite (CRRES) is presented. Dose-imprint data from ground test irradiations of identical devices are applied to the predictions of cosmic-ray-induced space upset rates in the memories onboard the spacecraft. The calculations take into account the effect of total dose on the SEU sensitivity of the devices as the dose accumulates in orbit. Estimates of error rates, which involved an arbitrary selection of a single pair of threshold linear energy transfer (LET) and asymptotic cross-section values, were compared to the results of an integration over the cross-section curves versus LET. The integration gave lower upset rates than the use of the selected values of the SEU parameters. Since the integration approach is more accurate and eliminates the need for an arbitrary definition of threshold LET and asymptotic cross section, it is recommended for all error rate predictions where experimental sigma-versus-LET curves are available.

In-memory interconnect protocol configuration registers

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cheng, Kevin Y.; Roberts, David A.

Systems, apparatuses, and methods for moving the interconnect protocol configuration registers into the main memory space of a node. The region of memory used for storing the interconnect protocol configuration registers may also be made cacheable to reduce the latency of accesses to the interconnect protocol configuration registers. Interconnect protocol configuration registers which are used during a startup routine may be prefetched into the host's cache to make the startup routine more efficient. The interconnect protocol configuration registers for various interconnect protocols may include one or more of device capability tables, memory-side statistics (e.g., to support two-level memory data mappingmore » decisions), advanced memory and interconnect features such as repair resources and routing tables, prefetching hints, error correcting code (ECC) bits, lists of device capabilities, set and store base address, capability, device ID, status, configuration, capabilities, and other settings.« less
Estimating Single-Event Logic Cross Sections in Advanced Technologies

NASA Astrophysics Data System (ADS)

Harrington, R. C.; Kauppila, J. S.; Warren, K. M.; Chen, Y. P.; Maharrey, J. A.; Haeffner, T. D.; Loveless, T. D.; Bhuva, B. L.; Bounasser, M.; Lilja, K.; Massengill, L. W.

2017-08-01

Reliable estimation of logic single-event upset (SEU) cross section is becoming increasingly important for predicting the overall soft error rate. As technology scales and single-event transient (SET) pulse widths shrink to widths on the order of the setup-and-hold time of flip-flops, the probability of latching an SET as an SEU must be reevaluated. In this paper, previous assumptions about the relationship of SET pulsewidth to the probability of latching an SET are reconsidered and a model for transient latching probability has been developed for advanced technologies. A method using the improved transient latching probability and SET data is used to predict logic SEU cross section. The presented model has been used to estimate combinational logic SEU cross sections in 32-nm partially depleted silicon-on-insulator (SOI) technology given experimental heavy-ion SET data. Experimental SEU data show good agreement with the model presented in this paper.
Analysis of Soft Error Rates in 65- and 28-nm FD-SOI Processes Depending on BOX Region Thickness and Body Bias by Monte-Carlo Based Simulations

NASA Astrophysics Data System (ADS)

Zhang, Kuiyuan; Umehara, Shigehiro; Yamaguchi, Junki; Furuta, Jun; Kobayashi, Kazutoshi

2016-08-01

This paper analyzes how body bias and BOX region thickness affect soft error rates in 65-nm SOTB (Silicon on Thin BOX) and 28-nm UTBB (Ultra Thin Body and BOX) FD-SOI processes. Soft errors are induced by alpha-particle and neutron irradiation and the results are then analyzed by Monte Carlo based simulation using PHITS-TCAD. The alpha-particle-induced single event upset (SEU) cross-section and neutron-induced soft error rate (SER) obtained by simulation are consistent with measurement results. We clarify that SERs decreased in response to an increase in the BOX thickness for SOTB while SERs in UTBB are independent of BOX thickness. We also discover SOTB develops a higher tolerance to soft errors when reverse body bias is applied while UTBB become more susceptible.
Neural-Network-Based Adaptive Decentralized Fault-Tolerant Control for a Class of Interconnected Nonlinear Systems.

PubMed

Li, Xiao-Jian; Yang, Guang-Hong

2018-01-01

This paper is concerned with the adaptive decentralized fault-tolerant tracking control problem for a class of uncertain interconnected nonlinear systems with unknown strong interconnections. An algebraic graph theory result is introduced to address the considered interconnections. In addition, to achieve the desirable tracking performance, a neural-network-based robust adaptive decentralized fault-tolerant control (FTC) scheme is given to compensate the actuator faults and system uncertainties. Furthermore, via the Lyapunov analysis method, it is proven that all the signals of the resulting closed-loop system are semiglobally bounded, and the tracking errors of each subsystem exponentially converge to a compact set, whose radius is adjustable by choosing different controller design parameters. Finally, the effectiveness and advantages of the proposed FTC approach are illustrated with two simulated examples.
The contribution of low-energy protons to the total on-orbit SEU rate

DOE PAGES

Dodds, Nathaniel Anson; Martinez, Marino J.; Dodd, Paul E.; ...

2015-11-10

Low- and high-energy proton experimental data and error rate predictions are presented for many bulk Si and SOI circuits from the 20-90 nm technology nodes to quantify how much low-energy protons (LEPs) can contribute to the total on-orbit single-event upset (SEU) rate. Every effort was made to predict LEP error rates that are conservatively high; even secondary protons generated in the spacecraft shielding have been included in the analysis. Across all the environments and circuits investigated, and when operating within 10% of the nominal operating voltage, LEPs were found to increase the total SEU rate to up to 4.3 timesmore » as high as it would have been in the absence of LEPs. Therefore, the best approach to account for LEP effects may be to calculate the total error rate from high-energy protons and heavy ions, and then multiply it by a safety margin of 5. If that error rate can be tolerated then our findings suggest that it is justified to waive LEP tests in certain situations. Trends were observed in the LEP angular responses of the circuits tested. As a result, grazing angles were the worst case for the SOI circuits, whereas the worst-case angle was at or near normal incidence for the bulk circuits.« less
Heavy Ion Irradiation Fluence Dependence for Single-Event Upsets of NAND Flash Memory

NASA Technical Reports Server (NTRS)

Chen, Dakai; Wilcox, Edward; Ladbury, Raymond; Kim, Hak; Phan, Anthony; Seidleck, Christina; LaBel, Kenneth

2016-01-01

We investigated the single-event effect (SEE) susceptibility of the Micron 16 nm NAND flash, and found the single-event upset (SEU) cross section varied inversely with fluence. The SEU cross section decreased with increasing fluence. We attribute the effect to the variable upset sensitivities of the memory cells. The current test standards and procedures assume that SEU follow a Poisson process and do not take into account the variability in the error rate with fluence. Therefore, heavy ion irradiation of devices with variable upset sensitivity distribution using typical fluence levels may underestimate the cross section and on-orbit event rate.
Computing in the presence of soft bit errors. [caused by single event upset on spacecraft

NASA Technical Reports Server (NTRS)

Rasmussen, R. D.

1984-01-01

It is shown that single-event-upsets (SEUs) due to cosmic rays are a significant source of single bit error in spacecraft computers. The physical mechanism of SEU, electron hole generation by means of Linear Energy Transfer (LET), it discussed with reference made to the results of a study of the environmental effects on computer systems of the Galileo spacecraft. Techniques for making software more tolerant of cosmic ray effects are considered, including: reducing the number of registers used by the software; continuity testing of variables; redundant execution of major procedures for error detection; and encoding state variables to detect single-bit changes. Attention is also given to design modifications which may reduce the cosmic ray exposure of on-board hardware. These modifications include: shielding components operating in LEO; removing low-power Schottky parts; and the use of CMOS diodes. The SEU parameters of different electronic components are listed in a table.
Two-dimensional optoelectronic interconnect-processor and its operational bit error rate

NASA Astrophysics Data System (ADS)

Liu, J. Jiang; Gollsneider, Brian; Chang, Wayne H.; Carhart, Gary W.; Vorontsov, Mikhail A.; Simonis, George J.; Shoop, Barry L.

2004-10-01

Two-dimensional (2-D) multi-channel 8x8 optical interconnect and processor system were designed and developed using complementary metal-oxide-semiconductor (CMOS) driven 850-nm vertical-cavity surface-emitting laser (VCSEL) arrays and the photodetector (PD) arrays with corresponding wavelengths. We performed operation and bit-error-rate (BER) analysis on this free-space integrated 8x8 VCSEL optical interconnects driven by silicon-on-sapphire (SOS) circuits. Pseudo-random bit stream (PRBS) data sequence was used in operation of the interconnects. Eye diagrams were measured from individual channels and analyzed using a digital oscilloscope at data rates from 155 Mb/s to 1.5 Gb/s. Using a statistical model of Gaussian distribution for the random noise in the transmission, we developed a method to compute the BER instantaneously with the digital eye-diagrams. Direct measurements on this interconnects were also taken on a standard BER tester for verification. We found that the results of two methods were in the same order and within 50% accuracy. The integrated interconnects were investigated in an optoelectronic processing architecture of digital halftoning image processor. Error diffusion networks implemented by the inherently parallel nature of photonics promise to provide high quality digital halftoned images.
Effects of Target Fragmentation on Evaluation of LET Spectra From Space Radiation in Low-Earth Orbit (LEO) Environment: Impact on SEU Predictions

NASA Technical Reports Server (NTRS)

Shinn, J. L.; Cucinotta, F. A.; Badhwar, G. D.; ONeill, P. M.; Badavi, F. F.

1995-01-01

Recent improvements in the radiation transport code HZETRN/BRYNTRN and galactic cosmic ray environmental model have provided an opportunity to investigate the effects of target fragmentation on estimates of single event upset (SEU) rates for spacecraft memory devices. Since target fragments are mostly of very low energy, an SEU prediction model has been derived in terms of particle energy rather than linear energy transfer (LET) to account for nonlinear relationship between range and energy. Predictions are made for SEU rates observed on two Shuttle flights, each at low and high inclination orbit. Corrections due to track structure effects are made for both high energy ions with track structure larger than device sensitive volume and for low energy ions with dense track where charge recombination is important. Results indicate contributions from target fragments are relatively important at large shield depths (or any thick structure material) and at low inclination orbit. Consequently, a more consistent set of predictions for upset rates observed in these two flights is reached when compared to an earlier analysis with CREME model. It is also observed that the errors produced by assuming linear relationship in range and energy in the earlier analysis have fortuitously canceled out the errors for not considering target fragmentation and track structure effects.
Injecting Artificial Memory Errors Into a Running Computer Program

NASA Technical Reports Server (NTRS)

Bornstein, Benjamin J.; Granat, Robert A.; Wagstaff, Kiri L.

2008-01-01

Single-event upsets (SEUs) or bitflips are computer memory errors caused by radiation. BITFLIPS (Basic Instrumentation Tool for Fault Localized Injection of Probabilistic SEUs) is a computer program that deliberately injects SEUs into another computer program, while the latter is running, for the purpose of evaluating the fault tolerance of that program. BITFLIPS was written as a plug-in extension of the open-source Valgrind debugging and profiling software. BITFLIPS can inject SEUs into any program that can be run on the Linux operating system, without needing to modify the program s source code. Further, if access to the original program source code is available, BITFLIPS offers fine-grained control over exactly when and which areas of memory (as specified via program variables) will be subjected to SEUs. The rate of injection of SEUs is controlled by specifying either a fault probability or a fault rate based on memory size and radiation exposure time, in units of SEUs per byte per second. BITFLIPS can also log each SEU that it injects and, if program source code is available, report the magnitude of effect of the SEU on a floating-point value or other program variable.
Using Pipelined XNOR Logic to Reduce SEU Risks in State Machines

NASA Technical Reports Server (NTRS)

Le, Martin; Zheng, Xin; Katanyoutant, Sunant

2008-01-01

Single-event upsets (SEUs) pose great threats to avionic systems state machine control logic, which are frequently used to control sequence of events and to qualify protocols. The risks of SEUs manifest in two ways: (a) the state machine s state information is changed, causing the state machine to unexpectedly transition to another state; (b) due to the asynchronous nature of SEU, the state machine's state registers become metastable, consequently causing any combinational logic associated with the metastable registers to malfunction temporarily. Effect (a) can be mitigated with methods such as triplemodular redundancy (TMR). However, effect (b) cannot be eliminated and can degrade the effectiveness of any mitigation method of effect (a). Although there is no way to completely eliminate the risk of SEU-induced errors, the risk can be made very small by use of a combination of very fast state-machine logic and error-detection logic. Therefore, one goal of two main elements of the present method is to design the fastest state-machine logic circuitry by basing it on the fastest generic state-machine design, which is that of a one-hot state machine. The other of the two main design elements is to design fast error-detection logic circuitry and to optimize it for implementation in a field-programmable gate array (FPGA) architecture: In the resulting design, the one-hot state machine is fitted with a multiple-input XNOR gate for detection of illegal states. The XNOR gate is implemented with lookup tables and with pipelines for high speed. In this method, the task of designing all the logic must be performed manually because no currently available logic synthesis software tool can produce optimal solutions of design problems of this type. However, some assistance is provided by a script, written for this purpose in the Python language (an object-oriented interpretive computer language) to automatically generate hardware description language (HDL) code from state-transition rules.
Adaptive Neural Networks Prescribed Performance Control Design for Switched Interconnected Uncertain Nonlinear Systems.

PubMed

Li, Yongming; Tong, Shaocheng

2017-06-28

In this paper, an adaptive neural networks (NNs)-based decentralized control scheme with the prescribed performance is proposed for uncertain switched nonstrict-feedback interconnected nonlinear systems. It is assumed that nonlinear interconnected terms and nonlinear functions of the concerned systems are unknown, and also the switching signals are unknown and arbitrary. A linear state estimator is constructed to solve the problem of unmeasured states. The NNs are employed to approximate unknown interconnected terms and nonlinear functions. A new output feedback decentralized control scheme is developed by using the adaptive backstepping design technique. The control design problem of nonlinear interconnected switched systems with unknown switching signals can be solved by the proposed scheme, and only a tuning parameter is needed for each subsystem. The proposed scheme can ensure that all variables of the control systems are semi-globally uniformly ultimately bounded and the tracking errors converge to a small residual set with the prescribed performance bound. The effectiveness of the proposed control approach is verified by some simulation results.
Method of making silicon on insalator material using oxygen implantation

DOEpatents

Hite, Larry R.; Houston, Ted; Matloubian, Mishel

1989-01-01

The described embodiments of the present invention provide a semiconductor on insulator structure providing a semiconductor layer less susceptible to single event upset errors (SEU) due to radiation. The semiconductor layer is formed by implanting ions which form an insulating layer beneath the surface of a crystalline semiconductor substrate. The remaining crystalline semiconductor layer above the insulating layer provides nucleation sites for forming a crystalline semiconductor layer above the insulating layer. The damage caused by implantation of the ions for forming an insulating layer is left unannealed before formation of the semiconductor layer by epitaxial growth. The epitaxial layer, thus formed, provides superior characteristics for prevention of SEU errors, in that the carrier lifetime within the epitaxial layer, thus formed, is less than the carrier lifetime in epitaxial layers formed on annealed material while providing adequate semiconductor characteristics.
Radiation Tests on 2Gb NAND Flash Memories

NASA Technical Reports Server (NTRS)

Nguyen, Duc N.; Guertin, Steven M.; Patterson, J. D.

2006-01-01

We report on SEE and TID tests of highly scaled Samsung 2Gbits flash memories. Both in-situ and biased interval irradiations were used to characterize the response of the total accumulated dose failures. The radiation-induced failures can be categorized as followings: single event upset (SEU) read errors in biased and unbiased modes, write errors, and single-event-functional-interrupt (SEFI) failures.
Prediction Accuracy of Error Rates for MPTB Space Experiment

NASA Technical Reports Server (NTRS)

Buchner, S. P.; Campbell, A. B.; Davis, D.; McMorrow, D.; Petersen, E. L.; Stassinopoulos, E. G.; Ritter, J. C.

1998-01-01

This paper addresses the accuracy of radiation-induced upset-rate predictions in space using the results of ground-based measurements together with standard environmental and device models. The study is focused on two part types - 16 Mb NEC DRAM's (UPD4216) and 1 Kb SRAM's (AMD93L422) - both of which are currently in space on board the Microelectronics and Photonics Test Bed (MPTB). To date, ground-based measurements of proton-induced single event upset (SEM cross sections as a function of energy have been obtained and combined with models of the proton environment to predict proton-induced error rates in space. The role played by uncertainties in the environmental models will be determined by comparing the modeled radiation environment with the actual environment measured aboard MPTB. Heavy-ion induced upsets have also been obtained from MPTB and will be compared with the "predicted" error rate following ground testing that will be done in the near future. These results should help identify sources of uncertainty in predictions of SEU rates in space.
Comparison of two reconfigurable N×N interconnects for a recurrent neural network

NASA Astrophysics Data System (ADS)

Berger, Christoph; Collings, Neil; Pourzand, Ali R.; Volkel, Reinnard

1996-11-01

Two different methods of pattern replication (conventional and interlaced fan-out) have been investigated and experimentally tested in a reconfigurable 5X5 optical interconnect. Similar alignment problems due to imaging errors (field curvature) were observed in both systems. We conclude that of the two methods the interlaced fan-out is better suited to avoid these imaging errors, to reduce system size and to implement an optical feedback loop.
Passivity-based control of linear time-invariant systems modelled by bond graph

NASA Astrophysics Data System (ADS)

Galindo, R.; Ngwompo, R. F.

2018-02-01

Closed-loop control systems are designed for linear time-invariant (LTI) controllable and observable systems modelled by bond graph (BG). Cascade and feedback interconnections of BG models are realised through active bonds with no loading effect. The use of active bonds may lead to non-conservation of energy and the overall system is modelled by proposed pseudo-junction structures. These structures are build by adding parasitic elements to the BG models and the overall system may become singularly perturbed. The structures for these interconnections can be seen as consisting of inner structures that satisfy energy conservation properties and outer structures including multiport-coupled dissipative fields. These fields highlight energy properties like passivity that are useful for control design. In both interconnections, junction structures and dissipative fields for the controllers are proposed, and passivity is guaranteed for the closed-loop systems assuring robust stability. The cascade interconnection is applied to the structural representation of closed-loop transfer functions, when a stabilising controller is applied to a given nominal plant. Applications are given when the plant and the controller are described by state-space realisations. The feedback interconnection is used getting necessary and sufficient stability conditions based on the closed-loop characteristic polynomial, solving a pole-placement problem and achieving zero-stationary state error.
Reliability analysis of magnetic logic interconnect wire subjected to magnet edge imperfections

NASA Astrophysics Data System (ADS)

Zhang, Bin; Yang, Xiaokuo; Liu, Jiahao; Li, Weiwei; Xu, Jie

2018-02-01

Nanomagnet logic (NML) devices have been proposed as one of the best candidates for the next generation of integrated circuits thanks to its substantial advantages of nonvolatility, radiation hardening and potentially low power. In this article, errors of nanomagnetic interconnect wire subjected to magnet edge imperfections have been evaluated for the purpose of reliable logic propagation. The missing corner defects of nanomagnet in the wire are modeled with a triangle, and the interconnect fabricated with various magnetic materials is thoroughly investigated by micromagnetic simulations under different corner defect amplitudes and device spacings. The results show that as the defect amplitude increases, the success rate of logic propagation in the interconnect decreases. More results show that from the interconnect wire fabricated with materials, iron demonstrates the best defect tolerance ability among three representative and frequently used NML materials, also logic transmission errors can be mitigated by adjusting spacing between nanomagnets. These findings can provide key technical guides for designing reliable interconnects. Project supported by the National Natural Science Foundation of China (No. 61302022) and the Scientific Research Foundation for Postdoctor of Air Force Engineering University (Nos. 2015BSKYQD03, 2016KYMZ06).
The Effectiveness of TAG or Guard-Gates in SET Suppression Using Delay and Dual-Rail Configurations at 0.35 microns

NASA Technical Reports Server (NTRS)

Shuler, Robert L.; Balasubramanian, Anupama; Narasimham, Balaji; Bhuva, Bharat; O'Neill, Patrick M.; Kouba, Coy

2006-01-01

Design options for decreasing the susceptibility of integrated circuits to Single Event Upset (SEU) fall into two categories: (1) increasing the critical charge to cause an upset at a particular node, and (2) employing redundancy to mask or correct errors. With decreasing device sizes on an Integrated Circuit (IC), the amount of charge required to represent a logic state has steadily reduced. Critical charge methods such as increasing drive strength or increasing the time required to change state as in capacitive or resistive hardening or delay based approaches extract a steadily increasing penalty as a percentage of device resources and performance. Dual redundancy is commonly assumed only to provide error detection with Triple Modular Redundancy (TMR) required for correction, but less well known methods employ dual redundancy to achieve full error correction by voting two inputs with a prior state to resolve ambiguity. This requires special circuits such as the Whitaker latch [1], or the guard-gate [2] which some of us have called a Transition AND Gate (TAG) [3]. A 2-input guard gate is shown in Figure 1. It is similar to a Muller Completion Element [4] and relies on capacitance at node "out" to retain the prior state when inputs disagree, while eliminating any output buffer which would be susceptible to radiation strikes. This paper experimentally compares delay based and dual rail flip-flop designs wherein both types of circuits employ guard-gates to optimize layout and performance, and draws conclusions about design criteria and suitability of each option. In both cases a design goal is protection against Single Event Transients (SET) in combinational logic as well as SEU in the storage elements. For the delay based design, it is also a goal to allow asynchronous clear or preset inputs on the storage elements, which are often not available in radiation tolerant designs.
Inorganic scintillation detectors based on Eu-activated phosphors for 192Ir brachytherapy

PubMed Central

Kertzscher, Gustavo; Beddar, Sam

2017-01-01

The availability of real-time treatment verification during high-dose-rate (HDR) brachytherapy is currently limited. Therefore, we studied the luminescence properties of the widely commercially available scintillators using the inorganic materials Eu-activated phosphors Y2O3:Eu, YVO4:Eu, Y2O2S:Eu, and Gd2O2S:Eu to determine whether they could be used to accurately and precisely verify HDR brachytherapy doses in real time. The suitability for HDR brachytherapy of inorganic scintillation detectors (ISDs) based on the 4 Eu-activated phosphors in powder form was determined based on experiments with a 192Ir HDR brachytherapy source. The scintillation intensities of the phosphors were 16 to 134 times greater than that of the commonly used organic plastic scintillator BCF-12. High signal intensities were achieved with an optimized packing density of the phosphor mixture and with a shortened fiber-optic cable. The influence of contaminating Cerenkov and fluorescence light induced in the fiber-optic cable (stem signal) was adequately suppressed by inserting between the fiber-optic cable and the photodetector a 25-nm band-pass filter centered at the emission peak. The spurious photoluminescence signal induced by the stem signal was suppressed by placing a long-pass filter between the scintillation detector volume and the fiber-optic cable. The time-dependent luminescence properties of the phosphors were quantified by measuring the non-constant scintillation during irradiation and the afterglow after the brachytherapy source had retracted. We demonstrated that a mixture of Y2O3:Eu and YVO4:Eu suppressed the time-dependence of the ISDs and that the time-dependence of Y2O2S:Eu and Gd2O2S:Eu introduced large measurement inaccuracies. We conclude that ISDs based on a mixture of Y2O3:Eu and YVO4:Eu are promising candidates for accurate and precise real-time verification technology for HDR BT that is cost effective and straightforward to manufacture. Widespread dissemination of this technology could lead to an improved understanding of error types and frequencies during BT and to improved patient safety during treatment. PMID:28475494

Inorganic scintillation detectors based on Eu-activated phosphors for 192Ir brachytherapy

NASA Astrophysics Data System (ADS)

Kertzscher, Gustavo; Beddar, Sam

2017-06-01

The availability of real-time treatment verification during high-dose-rate (HDR) brachytherapy is currently limited. Therefore, we studied the luminescence properties of the widely commercially available scintillators using the inorganic materials Eu-activated phosphors Y2O3:Eu, YVO4:Eu, Y2O2S:Eu, and Gd2O2S:Eu to determine whether they could be used to accurately and precisely verify HDR brachytherapy doses in real time. The suitability for HDR brachytherapy of inorganic scintillation detectors (ISDs) based on the 4 Eu-activated phosphors in powder form was determined based on experiments with a 192Ir HDR brachytherapy source. The scintillation intensities of the phosphors were 16-134 times greater than that of the commonly used organic plastic scintillator BCF-12. High signal intensities were achieved with an optimized packing density of the phosphor mixture and with a shortened fiber-optic cable. The influence of contaminating Cerenkov and fluorescence light induced in the fiber-optic cable (stem signal) was adequately suppressed by inserting between the fiber-optic cable and the photodetector a 25 nm band-pass filter centered at the emission peak. The spurious photoluminescence signal induced by the stem signal was suppressed by placing a long-pass filter between the scintillation detector volume and the fiber-optic cable. The time-dependent luminescence properties of the phosphors were quantified by measuring the non-constant scintillation during irradiation and the afterglow after the brachytherapy source had retracted. We demonstrated that a mixture of Y2O3:Eu and YVO4:Eu suppressed the time-dependence of the ISDs and that the time-dependence of Y2O2S:Eu and Gd2O2S:Eu introduced large measurement inaccuracies. We conclude that ISDs based on a mixture of Y2O3:Eu and YVO4:Eu are promising candidates for accurate and precise real-time verification technology for HDR BT that is cost effective and straightforward to manufacture. Widespread dissemination of this technology could lead to an improved understanding of error types and frequencies during BT and to improved patient safety during treatment.
Application of the fractional Fourier transform to the design of LCOS based optical interconnects and fiber switches.

PubMed

Robertson, Brian; Zhang, Zichen; Yang, Haining; Redmond, Maura M; Collings, Neil; Liu, Jinsong; Lin, Ruisheng; Jeziorska-Chapman, Anna M; Moore, John R; Crossland, William A; Chu, D P

2012-04-20

It is shown that reflective liquid crystal on silicon (LCOS) spatial light modulator (SLM) based interconnects or fiber switches that use defocus to reduce crosstalk can be evaluated and optimized using a fractional Fourier transform if certain optical symmetry conditions are met. Theoretically the maximum allowable linear hologram phase error compared to a Fourier switch is increased by a factor of six before the target crosstalk for telecom applications of -40 dB is exceeded. A Gerchberg-Saxton algorithm incorporating a fractional Fourier transform modified for use with a reflective LCOS SLM is used to optimize multi-casting holograms in a prototype telecom switch. Experiments are in close agreement to predicted performance.
High performance interconnection between high data rate networks

NASA Technical Reports Server (NTRS)

Foudriat, E. C.; Maly, K.; Overstreet, C. M.; Zhang, L.; Sun, W.

1992-01-01

The bridge/gateway system needed to interconnect a wide range of computer networks to support a wide range of user quality-of-service requirements is discussed. The bridge/gateway must handle a wide range of message types including synchronous and asynchronous traffic, large, bursty messages, short, self-contained messages, time critical messages, etc. It is shown that messages can be classified into three basic classes, synchronous and large and small asynchronous messages. The first two require call setup so that packet identification, buffer handling, etc. can be supported in the bridge/gateway. Identification enables resequences in packet size. The third class is for messages which do not require call setup. Resequencing hardware based to handle two types of resequencing problems is presented. The first is for a virtual parallel circuit which can scramble channel bytes. The second system is effective in handling both synchronous and asynchronous traffic between networks with highly differing packet sizes and data rates. The two other major needs for the bridge/gateway are congestion and error control. A dynamic, lossless congestion control scheme which can easily support effective error correction is presented. Results indicate that the congestion control scheme provides close to optimal capacity under congested conditions. Under conditions where error may develop due to intervening networks which are not lossless, intermediate error recovery and correction takes 1/3 less time than equivalent end-to-end error correction under similar conditions.
Upper-Bound Estimates Of SEU in CMOS

NASA Technical Reports Server (NTRS)

Edmonds, Larry D.

1990-01-01

Theory of single-event upsets (SEU) (changes in logic state caused by energetic charged subatomic particles) in complementary metal oxide/semiconductor (CMOS) logic devices extended to provide upper-bound estimates of rates of SEU when limited experimental information available and configuration and dimensions of SEU-sensitive regions of devices unknown. Based partly on chord-length-distribution method.
Implementing QML for radiation hardness assurance

NASA Astrophysics Data System (ADS)

Winokur, P. S.; Sexton, F. W.; Fleetwood, D. M.; Terry, M. D.; Shaneyfelt, M. R.

1990-12-01

The US government has proposed a qualified manufacturers list (QML) methodology to qualify integrated circuits for high reliability and radiation hardness. An approach to implementing QML for single-event upset (SEU) immunity on 16k SRAMs that involves relating values of feedback resistance to system error rates is demonstrated. It is seen that the process capability indices, Cp and Cpk, for the manufacture of 400-k-ohm feedback resistors required to provide SEU tolerance do not conform to 6 sigma quality standards. For total-dose, interface trap charge, Delta Vit, shifts measured on transistors are correlated with circuit response in the space environment. Statistical process control (SPC) is illustrated for Delta Vit, and violations of SPC rules are interpreted in terms of continuous improvement. Design validation for SEU and quality conformance inspections for total-dose are identified as major obstacles to cost-effective QML implementation. Techniques and tools that will help QML provide real cost savings are identified as physical models, 3-D device-plus-circuit codes, and improved design simulators.
Heavy Ion Irradiation Fluence Dependence for Single-Event Upsets in a NAND Flash Memory

NASA Technical Reports Server (NTRS)

Chen, Dakai; Wilcox, Edward; Ladbury, Raymond L.; Kim, Hak; Phan, Anthony; Seidleck, Christina; Label, Kenneth

2016-01-01

We investigated the single-event effect (SEE) susceptibility of the Micron 16 nm NAND flash, and found that the single-event upset (SEU) cross section varied inversely with cumulative fluence. We attribute the effect to the variable upset sensitivities of the memory cells. Furthermore, the effect impacts only single cell upsets in general. The rate of multiple-bit upsets remained relatively constant with fluence. The current test standards and procedures assume that SEU follow a Poisson process and do not take into account the variability in the error rate with fluence. Therefore, traditional SEE testing techniques may underestimate the on-orbit event rate for a device with variable upset sensitivity.
Apparatus for and method of eliminating single event upsets in combinational logic

NASA Technical Reports Server (NTRS)

Gambles, Jody W. (Inventor); Hass, Kenneth J. (Inventor); Cameron, Kelly B. (Inventor)

2001-01-01

An apparatus for and method of eliminating single event upsets (or SEU) in combinational logic are used to prevent error propagation as a result of cosmic particle strikes to the combinational logic. The apparatus preferably includes a combinational logic block electrically coupled to a delay element, a latch and an output buffer. In operation, a signal from the combinational logic is electrically coupled to a first input of the latch. In addition, the signal is routed through the delay element to produce a delayed signal. The delayed signal is routed to a second input of the latch. The latch used in the apparatus for preventing SEU preferably includes latch outputs and a feature that the latch outputs will not change state unless both latch inputs are correct. For example, the latch outputs may not change state unless both latch inputs have the same logical state. When a cosmic particle strikes the combinational logic, a transient disturbance with a predetermined length may appear in the signal. However, a function of the delay element is to preferably provide a time delay greater than the length of the transient disturbance. Therefore, the transient disturbance will not reach both latch inputs simultaneously. As a result, the latch outputs will not permanently change state in error due to the transient disturbance. In addition, the output buffer preferably combines the latch outputs in such a way that the correct state is preserved at all times. Thus, combinational logic with protection from SEU is provided.
Error-rate prediction for programmable circuits: methodology, tools and studied cases

NASA Astrophysics Data System (ADS)

Velazco, Raoul

2013-05-01

This work presents an approach to predict the error rates due to Single Event Upsets (SEU) occurring in programmable circuits as a consequence of the impact or energetic particles present in the environment the circuits operate. For a chosen application, the error-rate is predicted by combining the results obtained from radiation ground testing and the results of fault injection campaigns performed off-beam during which huge numbers of SEUs are injected during the execution of the studied application. The goal of this strategy is to obtain accurate results about different applications' error rates, without using particle accelerator facilities, thus significantly reducing the cost of the sensitivity evaluation. As a case study, this methodology was applied a complex processor, the Power PC 7448 executing a program issued from a real space application and a crypto-processor application implemented in an SRAM-based FPGA and accepted to be embedded in the payload of a scientific satellite of NASA. The accuracy of predicted error rates was confirmed by comparing, for the same circuit and application, predictions with measures issued from radiation ground testing performed at the cyclotron Cyclone cyclotron of HIF (Heavy Ion Facility) of Louvain-la-Neuve (Belgium).
A Fully Implemented 12 × 12 Data Vortex Optical Packet Switching Interconnection Network

NASA Astrophysics Data System (ADS)

Shacham, Assaf; Small, Benjamin A.; Liboiron-Ladouceur, Odile; Bergman, Keren

2005-10-01

A fully functional optical packet switching (OPS) interconnection network based on the data vortex architecture is presented. The photonic switching fabric uniquely capitalizes on the enormous bandwidth advantage of wavelength division multiplexing (WDM) wavelength parallelism while delivering minimal packet transit latency. Utilizing semiconductor optical amplifier (SOA)-based switching nodes and conventional fiber-optic technology, the 12-port system exhibits a capacity of nearly 1 Tb/s. Optical packets containing an eight-wavelength WDM payload with 10 Gb/s per wavelength are routed successfully to all 12 ports while maintaining a bit error rate (BER) of 10-12 or better. Median port-to-port latencies of 110 ns are achieved with a distributed deflection routing network that resolves packet contention on-the-fly without the use of optical buffers and maintains the entire payload path in the optical domain.
SEU Performance of TAG Based Flip Flops

NASA Technical Reports Server (NTRS)

Shuler, Robert L.; Kouba, Coy; O'Neill, Patrick M.

2005-01-01

We describe heavy ion test results for two new SEU tolerant latches based on transition nand gates, one for single rail asynchronous and the other for dual rail synchronous designs, implemented in AMI 0.5microprocess.
Single event upset susceptibilities of latchup immune CMOS process programmable gate arrays

NASA Astrophysics Data System (ADS)

Koga, R.; Crain, W. R.; Crawford, K. B.; Hansel, S. J.; Lau, D. D.; Tsubota, T. K.

Single event upsets (SEU) and latchup susceptibilities of complementary metal oxide semiconductor programmable gate arrays (CMOS PPGA's) were measured at the Lawrence Berkeley Laboratory 88-in. cyclotron facility with Xe (603 MeV), Cu (290 MeV), and Ar (180 MeV) ion beams. The PPGA devices tested were those which may be used in space. Most of the SEU measurements were taken with a newly constructed tester called the Bus Access Storage and Comparison System (BASACS) operating via a Macintosh II computer. When BASACS finds that an output does not match a prerecorded pattern, the state of all outputs, position in the test cycle, and other necessary information is transmitted and stored in the Macintosh. The upset rate was kept between 1 and 3 per second. After a sufficient number of errors are stored, the test is stopped and the total fluence of particles and total errors are recorded. The device power supply current was closely monitored to check for occurrence of latchup. Results of the tests are presented, indicating that some of the PPGA's are good candidates for selected space applications.
Photorefractor ocular screening system

NASA Technical Reports Server (NTRS)

Richardson, John R. (Inventor); Kerr, Joseph H. (Inventor)

1987-01-01

A method and apparatus for detecting human eye defects, particularly detection of refractive error is presented. Eye reflex is recorded on color film when the eyes are exposed to a flash of light. The photographs are compared with predetermined standards to detect eye defects. The base structure of the ocular screening system is a folding interconnect structure, comprising hinged sections. Attached to one end of the structure is a head positioning station which comprises vertical support, a head positioning bracket having one end attached to the top of the support, and two head positioning lamps to verify precise head positioning. At the opposite end of the interconnect structure is a camera station with camera, electronic flash unit, and blinking fixation lamp, for photographing the eyes of persons being evaluated.
Decentralized stabilization for a class of continuous-time nonlinear interconnected systems using online learning optimal control approach.

PubMed

Liu, Derong; Wang, Ding; Li, Hongliang

2014-02-01

In this paper, using a neural-network-based online learning optimal control approach, a novel decentralized control strategy is developed to stabilize a class of continuous-time nonlinear interconnected large-scale systems. First, optimal controllers of the isolated subsystems are designed with cost functions reflecting the bounds of interconnections. Then, it is proven that the decentralized control strategy of the overall system can be established by adding appropriate feedback gains to the optimal control policies of the isolated subsystems. Next, an online policy iteration algorithm is presented to solve the Hamilton-Jacobi-Bellman equations related to the optimal control problem. Through constructing a set of critic neural networks, the cost functions can be obtained approximately, followed by the control policies. Furthermore, the dynamics of the estimation errors of the critic networks are verified to be uniformly and ultimately bounded. Finally, a simulation example is provided to illustrate the effectiveness of the present decentralized control scheme.
Demonstration of Inexact Computing Implemented in the JPEG Compression Algorithm using Probabilistic Boolean Logic applied to CMOS Components

DTIC Science & Technology

2015-12-24

Ripple-Carry RCA Ripple-Carry Adder RF Radio Frequency RMS Root-Mean-Square SEU Single Event Upset SIPI Signal and Image Processing Institute SNR...correctness, where 0.5 < p < 1, and a probability (1−p) of error. Errors could be caused by noise, radio frequency (RF) interference, crosstalk...utilized in the Apollo Guidance Computer is the three input NOR Gate. . . At the time that the decision was made to use in- 11 tegrated circuits, the
Demonstration of Inexact Computing Implemented in the JPEG Compression Algorithm Using Probabilistic Boolean Logic Applied to CMOS Components

DTIC Science & Technology

2015-12-24

Ripple-Carry RCA Ripple-Carry Adder RF Radio Frequency RMS Root-Mean-Square SEU Single Event Upset SIPI Signal and Image Processing Institute SNR...correctness, where 0.5 < p < 1, and a probability (1−p) of error. Errors could be caused by noise, radio frequency (RF) interference, crosstalk...utilized in the Apollo Guidance Computer is the three input NOR Gate. . . At the time that the decision was made to use in- 11 tegrated circuits, the
Fast Determination of Distribution-Connected PV Impacts Using a Variable Time-Step Quasi-Static Time-Series Approach: Preprint

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mather, Barry

The increasing deployment of distribution-connected photovoltaic (DPV) systems requires utilities to complete complex interconnection studies. Relatively simple interconnection study methods worked well for low penetrations of photovoltaic systems, but more complicated quasi-static time-series (QSTS) analysis is required to make better interconnection decisions as DPV penetration levels increase. Tools and methods must be developed to support this. This paper presents a variable-time-step solver for QSTS analysis that significantly shortens the computational time and effort to complete a detailed analysis of the operation of a distribution circuit with many DPV systems. Specifically, it demonstrates that the proposed variable-time-step solver can reduce themore » required computational time by as much as 84% without introducing any important errors to metrics, such as the highest and lowest voltage occurring on the feeder, number of voltage regulator tap operations, and total amount of losses realized in the distribution circuit during a 1-yr period. Further improvement in computational speed is possible with the introduction of only modest errors in these metrics, such as a 91 percent reduction with less than 5 percent error when predicting voltage regulator operations.« less
Single Event Effect Testing of the Micron MT46V128M8

NASA Technical Reports Server (NTRS)

Stansberry, Scott; Campola, Michael; Wilcox, Ted; Seidleck, Christina; Phan, Anthony

2017-01-01

The Micron MT46V128M8 was tested for single event effects (SEE) at the Texas AM University Cyclotron Facility (TAMU) in June of 2017. Testing revealed a sensitivity to device hang-ups classified as single event functional interrupts (SEFI) and possible soft data errors classified as single event upsets (SEU).
SEUSS and PIF4 Coordinately Regulate Light and Temperature Signaling Pathways to Control Plant Growth.

PubMed

Huai, Junling; Zhang, Xinyu; Li, Jialong; Ma, Tingting; Zha, Ping; Jing, Yanjun; Lin, Rongcheng

2018-05-02

Plants continuously monitor environmental conditions (such as light and temperature) and adjust their growth and development accordingly. The transcription factor PHYTOCHROME-INTERACTING FACTOR4 (PIF4) regulates both light and temperature signaling pathways. Here, we identified ENHANCED PHOTOMORPHOGENIC2 (EPP2) as a new repressor of photomorphogenesis in red, far-red, and blue light. Map-based cloning revealed that EPP2 encodes the SEUSS (SEU) transcription regulator. The C-terminus of SEU has transcriptional activation activity and SEU physically interacts with PIF4. Moreover, SEU promotes the expression of many genes, including auxin biosynthetic and responsive genes, and regulates IAA levels in plants. SEU associates with regulatory regions in INDOLE-3-ACETIC ACID INDUCIBLE6 (IAA6) and IAA19 in a PIF4-independent manner, whereas the binding of PIF4 to these genes requires SEU. Furthermore, mutations in SEU affect H3K4me3 methylation at IAA6 and IAA19, and SEU positively regulates warm temperature-mediated hypocotyl growth together with PIF4. Therefore, our results reveal that SEU acts as a central regulator to integrate light and temperature signals to control plant growth by coordinating with PIF4. Copyright © 2018 The Author. Published by Elsevier Inc. All rights reserved.
Performance Analysis of an Inter-Relay Co-operation in FSO Communication System

NASA Astrophysics Data System (ADS)

Khanna, Himanshu; Aggarwal, Mona; Ahuja, Swaran

2018-04-01

In this work, we analyze the outage and error performance of a one-way inter-relay assisted free space optical link. The assumption of the absence of direct link between the source and destination node is being made for the analysis, and the feasibility of such system configuration is studied. We consider the influence of path loss, atmospheric turbulence and pointing error impairments, and investigate the effect of these parameters on the system performance. The turbulence-induced fading is modeled by independent but not necessarily identically distributed gamma-gamma fading statistics. The closed-form expressions for outage probability and probability of error are derived and illustrated by numerical plots. It is concluded that the absence of line of sight path between source and destination nodes does not lead to significant performance degradation. Moreover, for the system model under consideration, interconnected relaying provides better error performance than the non-interconnected relaying and dual-hop serial relaying techniques.
Fault Tolerance for VLSI Multicomputers

DTIC Science & Technology

1985-08-01

that consists of hundreds or thousands of VLSI computation nodes interconnected by dedicated links. Some important applications of high-end computers...technology, and intended applications . A proposed fault tolerance scheme combines hardware that performs error detection and system-level protocols for...order to recover from the error and resume correct operation, a valid system state must be restored. A low-overhead, application -transparent error

Comparisons of single event vulnerability of GaAs SRAMS

NASA Astrophysics Data System (ADS)

Weatherford, T. R.; Hauser, J. R.; Diehl, S. E.

1986-12-01

A GaAs MESFET/JFET model incorporated into SPICE has been used to accurately describe C-EJFET, E/D MESFET and D MESFET/resistor GaAs memory technologies. These cells have been evaluated for critical charges due to gate-to-drain and drain-to-source charge collection. Low gate-to-drain critical charges limit conventional GaAs SRAM soft error rates to approximately 1E-6 errors/bit-day. SEU hardening approaches including decoupling resistors, diodes, and FETs have been investigated. Results predict GaAs RAM cell critical charges can be increased to over 0.1 pC. Soft error rates in such hardened memories may approach 1E-7 errors/bit-day without significantly reducing memory speed. Tradeoffs between hardening level, performance and fabrication complexity are discussed.
Optical Oversampled Analog-to-Digital Conversion

DTIC Science & Technology

1992-06-29

hologram weights and interconnects in the digital image halftoning configuration. First, no temporal error diffusion occurs in the digital image... halftoning error diffusion ar- chitecture as demonstrated by Equation (6.1). Equation (6.2) ensures that the hologram weights sum to one so that the exact...optimum halftone image should be faster. Similarly, decreased convergence time suggests that an error diffusion filter with larger spatial dimensions
The Quantum Socket: Wiring for Superconducting Qubits - Part 3

NASA Astrophysics Data System (ADS)

Mariantoni, M.; Bejianin, J. H.; McConkey, T. G.; Rinehart, J. R.; Bateman, J. D.; Earnest, C. T.; McRae, C. H.; Rohanizadegan, Y.; Shiri, D.; Penava, B.; Breul, P.; Royak, S.; Zapatka, M.; Fowler, A. G.

The implementation of a quantum computer requires quantum error correction codes, which allow to correct errors occurring on physical quantum bits (qubits). Ensemble of physical qubits will be grouped to form a logical qubit with a lower error rate. Reaching low error rates will necessitate a large number of physical qubits. Thus, a scalable qubit architecture must be developed. Superconducting qubits have been used to realize error correction. However, a truly scalable qubit architecture has yet to be demonstrated. A critical step towards scalability is the realization of a wiring method that allows to address qubits densely and accurately. A quantum socket that serves this purpose has been designed and tested at microwave frequencies. In this talk, we show results where the socket is used at millikelvin temperatures to measure an on-chip superconducting resonator. The control electronics is another fundamental element for scalability. We will present a proposal based on the quantum socket to interconnect a classical control hardware to a superconducting qubit hardware, where both are operated at millikelvin temperatures.
Anomalous annealing of floating gate errors due to heavy ion irradiation

NASA Astrophysics Data System (ADS)

Yin, Yanan; Liu, Jie; Sun, Youmei; Hou, Mingdong; Liu, Tianqi; Ye, Bing; Ji, Qinggang; Luo, Jie; Zhao, Peixiong

2018-03-01

Using the heavy ions provided by the Heavy Ion Research Facility in Lanzhou (HIRFL), the annealing of heavy-ion induced floating gate (FG) errors in 34 nm and 25 nm NAND Flash memories has been studied. The single event upset (SEU) cross section of FG and the evolution of the errors after irradiation depending on the ion linear energy transfer (LET) values, data pattern and feature size of the device are presented. Different rates of annealing for different ion LET and different pattern are observed in 34 nm and 25 nm memories. The variation of the percentage of different error patterns in 34 nm and 25 nm memories with annealing time shows that the annealing of FG errors induced by heavy-ion in memories will mainly take place in the cells directly hit under low LET ion exposure and other cells affected by heavy ions when the ion LET is higher. The influence of Multiple Cell Upsets (MCUs) on the annealing of FG errors is analyzed. MCUs with high error multiplicity which account for the majority of the errors can induce a large percentage of annealed errors.
Cost-effective parallel optical interconnection module based on fully passive-alignment process

NASA Astrophysics Data System (ADS)

Son, Dong Hoon; Heo, Young Soon; Park, Hyoung-Jun; Kang, Hyun Seo; Kim, Sung Chang

2017-11-01

In optical interconnection technology, high-speed and large data transitions with low error rate and cost reduction are key issues for the upcoming 8K media era. The researchers present notable types of optical manufacturing structures of a four-channel parallel optical module by fully passive alignment, which are able to reduce manufacturing time and cost. Each of the components, such as vertical-cavity surface laser/positive-intrinsic negative-photodiode array, microlens array, fiber array, and receiver (RX)/transmitter (TX) integrated circuit, is integrated successfully using flip-chip bonding, die bonding, and passive alignment with a microscope. Clear eye diagrams are obtained by 25.78-Gb/s (for TX) and 25.7-Gb/s (for RX) nonreturn-to-zero signals of pseudorandom binary sequence with a pattern length of 231 to 1. The measured responsivity and minimum sensitivity of the RX are about 0.5 A/W and ≤-6.5 dBm at a bit error rate (BER) of 10-12, respectively. The optical power margin at a BER of 10-12 is 7.5 dB, and cross talk by the adjacent channel is ≤1 dB.
A Survey on Multimedia-Based Cross-Layer Optimization in Visual Sensor Networks

PubMed Central

Costa, Daniel G.; Guedes, Luiz Affonso

2011-01-01

Visual sensor networks (VSNs) comprised of battery-operated electronic devices endowed with low-resolution cameras have expanded the applicability of a series of monitoring applications. Those types of sensors are interconnected by ad hoc error-prone wireless links, imposing stringent restrictions on available bandwidth, end-to-end delay and packet error rates. In such context, multimedia coding is required for data compression and error-resilience, also ensuring energy preservation over the path(s) toward the sink and improving the end-to-end perceptual quality of the received media. Cross-layer optimization may enhance the expected efficiency of VSNs applications, disrupting the conventional information flow of the protocol layers. When the inner characteristics of the multimedia coding techniques are exploited by cross-layer protocols and architectures, higher efficiency may be obtained in visual sensor networks. This paper surveys recent research on multimedia-based cross-layer optimization, presenting the proposed strategies and mechanisms for transmission rate adjustment, congestion control, multipath selection, energy preservation and error recovery. We note that many multimedia-based cross-layer optimization solutions have been proposed in recent years, each one bringing a wealth of contributions to visual sensor networks. PMID:22163908
Application of SEU imaging for analysis of device architecture using a 25 MeV/u 86Kr ion microbeam at HIRFL

NASA Astrophysics Data System (ADS)

Liu, Tianqi; Yang, Zhenlei; Guo, Jinlong; Du, Guanghua; Tong, Teng; Wang, Xiaohui; Su, Hong; Liu, Wenjing; Liu, Jiande; Wang, Bin; Ye, Bing; Liu, Jie

2017-08-01

The heavy-ion imaging of single event upset (SEU) in a flash-based field programmable gate array (FPGA) device was carried out for the first time at Heavy Ion Research Facility in Lanzhou (HIRFL). The three shift register chains with separated input and output configurations in device under test (DUT) were used to identify the corresponding logical area rapidly once an upset occurred. The logic units in DUT were partly configured in order to distinguish the registers in SEU images. Based on the above settings, the partial architecture of shift register chains in DUT was imaged by employing the microbeam of 86Kr ion with energy of 25 MeV/u in air. The results showed that the physical distribution of registers in DUT had a high consistency with its logical arrangement by comparing SEU image with logic configuration in scanned area.
VCSELs for exascale computing, computer farms, and green photonics

NASA Astrophysics Data System (ADS)

Hofmann, Werner; Moser, Philip; Wolf, Philip; Larisch, Gunter; Li, Hui; Li, Wei; Lott, James; Bimberg, Dieter

2012-11-01

The bandwidth-induced communication bottleneck due to the intrinsic limitations of metal interconnects is inhibiting the performance and environmental friendliness of todaýs supercomputers, data centers, and in fact all other modern electrically interconnected and interoperable networks such as data farms and "cloud" fabrics. The same is true for systems of optical interconnects (OIs), where even when the metal interconnects are replaced with OIs the systems remain limited by bandwidth, physical size, and most critically the power consumption and lifecycle operating costs. Vertical-cavity surface-emitting lasers (VCSELs) are ideally suited to solve this dilemma. Global communication providers like Google Inc., Intel Inc., HP Inc., and IBM Inc. are now producing optical interconnects based on VCSELs. The optimal bandwidth per link may be analyzed by by using Amdahĺs Law and depends on the architecture of the data center and the performance of the servers within the data center. According to Google Inc., a bandwidth of 40 Gb/s has to be accommodated in the future. IBM Inc. demands 80 Tbps interconnects between solitary server chips in 2020. We recently realized ultrahigh bit rate VCSELs up to 49 Gb/s suited for such optical interconnects emitting at 980 nm. These devices show error-free transmission at temperatures up to 155°C and operate beyond 200°C. Single channel data-rates of 40 Gb/s were achieved up to 75°C. Record high energy efficiencies close to 50 fJ/bit were demonstrated for VCSELs emitting at 850 nm. Our devices are fabricated using a full three-inch wafer process, and the apertures were formed by in-situ controlled selective wet oxidation using stainless steel-based vacuum equipment of our own design. assembly, and operation. All device data are measured, recorded, and evaluated by our proprietary fully automated wafer mapping probe station. The bandwidth density of our present devices is expected to be scalable from about 100 Gbps/mm² to a physical limit of roughly 15 Tbps/mm² based on the current 12.5 Gb/s VCSEL technology. Still more energy-efficient and smaller volume laser diode devices dissipating less heat are mandatory for further up scaling of the bandwidth. Novel metal-clad VCSELs enable a reduction of the device's footprint for potentially ultrashort range interconnects by 1 to 2 orders of magnitude compared to conventional VCSELs thus enabling a similar increase of device density and bandwidth.
High-speed receiver based on waveguide germanium photodetector wire-bonded to 90nm SOI CMOS amplifier.

PubMed

Pan, Huapu; Assefa, Solomon; Green, William M J; Kuchta, Daniel M; Schow, Clint L; Rylyakov, Alexander V; Lee, Benjamin G; Baks, Christian W; Shank, Steven M; Vlasov, Yurii A

2012-07-30

The performance of a receiver based on a CMOS amplifier circuit designed with 90nm ground rules wire-bonded to a waveguide germanium photodetector is characterized at data rates up to 40Gbps. Both chips were fabricated through the IBM Silicon CMOS Integrated Nanophotonics process on specialty photonics-enabled SOI wafers. At the data rate of 28Gbps which is relevant to the new generation of optical interconnects, a sensitivity of -7.3dBm average optical power is demonstrated with 3.4pJ/bit power-efficiency and 0.6UI horizontal eye opening at a bit-error-rate of 10(-12). The receiver operates error-free (bit-error-rate < 10(-12)) up to 40Gbps with optimized power supply settings demonstrating an energy efficiency of 1.4pJ/bit and 4pJ/bit at data rates of 32Gbps and 40Gbps, respectively, with an average optical power of -0.8dBm.
Single event upsets in semiconductor devices induced by highly ionising particles.

PubMed

Sannikov, A V

2004-01-01

A new model of single event upsets (SEUs), created in memory cells by heavy ions and high energy hadrons, has been developed. The model takes into account the spatial distribution of charge collection efficiency over the cell area not considered in previous approaches. Three-dimensional calculations made by the HADRON code have shown good agreement with experimental data for the energy dependence of proton SEU cross sections, sensitive depths and other SEU observables. The model is promising for prediction of SEU rates for memory chips exposed in space and in high-energy experiments as well as for the development of a high-energy neutron dosemeter based on the SEU effect.
The Quantum Socket: Wiring for Superconducting Qubits - Part 1

NASA Astrophysics Data System (ADS)

McConkey, T. G.; Bejanin, J. H.; Rinehart, J. R.; Bateman, J. D.; Earnest, C. T.; McRae, C. H.; Rohanizadegan, Y.; Shiri, D.; Mariantoni, M.; Penava, B.; Breul, P.; Royak, S.; Zapatka, M.; Fowler, A. G.

Quantum systems with ten superconducting quantum bits (qubits) have been realized, making it possible to show basic quantum error correction (QEC) algorithms. However, a truly scalable architecture has not been developed yet. QEC requires a two-dimensional array of qubits, restricting any interconnection to external classical systems to the third axis. In this talk, we introduce an interconnect solution for solid-state qubits: The quantum socket. The quantum socket employs three-dimensional wires and makes it possible to connect classical electronics with quantum circuits more densely and accurately than methods based on wire bonding. The three-dimensional wires are based on spring-loaded pins engineered to insure compatibility with quantum computing applications. Extensive design work and machining was required, with focus on material quality to prevent magnetic impurities. Microwave simulations were undertaken to optimize the design, focusing on the interface between the micro-connector and an on-chip coplanar waveguide pad. Simulations revealed good performance from DC to 10 GHz and were later confirmed against experimental measurements.
High accuracy electronic material level sensor

DOEpatents

McEwan, T.E.

1997-03-11

The High Accuracy Electronic Material Level Sensor (electronic dipstick) is a sensor based on time domain reflectometry (TDR) of very short electrical pulses. Pulses are propagated along a transmission line or guide wire that is partially immersed in the material being measured; a launcher plate is positioned at the beginning of the guide wire. Reflected pulses are produced at the material interface due to the change in dielectric constant. The time difference of the reflections at the launcher plate and at the material interface are used to determine the material level. Improved performance is obtained by the incorporation of: (1) a high accuracy time base that is referenced to a quartz crystal, (2) an ultrawideband directional sampler to allow operation without an interconnect cable between the electronics module and the guide wire, (3) constant fraction discriminators (CFDs) that allow accurate measurements regardless of material dielectric constants, and reduce or eliminate errors induced by triple-transit or ``ghost`` reflections on the interconnect cable. These improvements make the dipstick accurate to better than 0.1%. 4 figs.
High accuracy electronic material level sensor

DOEpatents

McEwan, Thomas E.

1997-01-01

The High Accuracy Electronic Material Level Sensor (electronic dipstick) is a sensor based on time domain reflectometry (TDR) of very short electrical pulses. Pulses are propagated along a transmission line or guide wire that is partially immersed in the material being measured; a launcher plate is positioned at the beginning of the guide wire. Reflected pulses are produced at the material interface due to the change in dielectric constant. The time difference of the reflections at the launcher plate and at the material interface are used to determine the material level. Improved performance is obtained by the incorporation of: 1) a high accuracy time base that is referenced to a quartz crystal, 2) an ultrawideband directional sampler to allow operation without an interconnect cable between the electronics module and the guide wire, 3) constant fraction discriminators (CFDs) that allow accurate measurements regardless of material dielectric constants, and reduce or eliminate errors induced by triple-transit or "ghost" reflections on the interconnect cable. These improvements make the dipstick accurate to better than 0.1%.
Event-triggered decentralized adaptive fault-tolerant control of uncertain interconnected nonlinear systems with actuator failures.

PubMed

Choi, Yun Ho; Yoo, Sung Jin

2018-06-01

This paper investigates the event-triggered decentralized adaptive tracking problem of a class of uncertain interconnected nonlinear systems with unexpected actuator failures. It is assumed that local control signals are transmitted to local actuators with time-varying faults whenever predefined conditions for triggering events are satisfied. Compared with the existing control-input-based event-triggering strategy for adaptive control of uncertain nonlinear systems, the aim of this paper is to propose a tracking-error-based event-triggering strategy in the decentralized adaptive fault-tolerant tracking framework. The proposed approach can relax drastic changes in control inputs caused by actuator faults in the existing triggering strategy. The stability of the proposed event-triggering control system is analyzed in the Lyapunov sense. Finally, simulation comparisons of the proposed and existing approaches are provided to show the effectiveness of the proposed theoretical result in the presence of actuator faults. Copyright © 2018 ISA. Published by Elsevier Ltd. All rights reserved.
Time skewing and amplitude nonlinearity mitigation by feedback equalization for 56 Gbps VCSEL-based PAM-4 links

NASA Astrophysics Data System (ADS)

You, Yue; Zhang, Wenjia; Sun, Lin; Du, Jiangbing; Liang, Chenyu; Yang, Fan; He, Zuyuan

2018-03-01

The vertical cavity surface emitting laser (VCSEL)-based multimode optical transceivers enabled by pulse amplitude modulation (PAM)-4 will be commercialized in near future to meet the 400-Gbps standard short reach optical interconnects. It is still challenging to achieve over 56/112-Gbps with the multilevel signaling as the multimode property of the device and link would introduce the nonlinear temporal response for the different levels. In this work, we scrutinize the distortions that relates to the multilevel feature of PAM-4 modulation, and propose an effective feedback equalization scheme for 56-Gbps VCSEL-based PAM-4 optical interconnects system to mitigate the distortions caused by eye timing-skew and nonlinear power-dependent noise. Level redistribution at Tx side is theoretically modeled and constructed to achieve equivalent symbol error ratios (SERs) of four levels and improved BER performance. The cause of the eye skewing and the mitigation approach are also simulated at 100-Gbps and experimentally investigated at 56-Gbps. The results indicate more than 2-dB power penalty improvement has been achieved by using such a distortion aware equalizer.
Experimental demonstration of the optical multi-mesh hypercube: scaleable interconnection network for multiprocessors and multicomputers.

PubMed

Louri, A; Furlonge, S; Neocleous, C

1996-12-10

A prototype of a novel topology for scaleable optical interconnection networks called the optical multi-mesh hypercube (OMMH) is experimentally demonstrated to as high as a 150-Mbit/s data rate (2(7) - 1 nonreturn-to-zero pseudo-random data pattern) at a bit error rate of 10(-13)/link by the use of commercially available devices. OMMH is a scaleable network [Appl. Opt. 33, 7558 (1994); J. Lightwave Technol. 12, 704 (1994)] architecture that combines the positive features of the hypercube (small diameter, connectivity, symmetry, simple routing, and fault tolerance) and the mesh (constant node degree and size scaleability). The optical implementation method is divided into two levels: high-density local connections for the hypercube modules, and high-bit-rate, low-density, long connections for the mesh links connecting the hypercube modules. Free-space imaging systems utilizing vertical-cavity surface-emitting laser (VCSEL) arrays, lenslet arrays, space-invariant holographic techniques, and photodiode arrays are demonstrated for the local connections. Optobus fiber interconnects from Motorola are used for the long-distance connections. The OMMH was optimized to operate at the data rate of Motorola's Optobus (10-bit-wide, VCSEL-based bidirectional data interconnects at 150 Mbits/s). Difficulties encountered included the varying fan-out efficiencies of the different orders of the hologram, misalignment sensitivity of the free-space links, low power (1 mW) of the individual VCSEL's, and noise.
Error modelling of quantum Hall array resistance standards

NASA Astrophysics Data System (ADS)

Marzano, Martina; Oe, Takehiko; Ortolano, Massimo; Callegaro, Luca; Kaneko, Nobu-Hisa

2018-04-01

Quantum Hall array resistance standards (QHARSs) are integrated circuits composed of interconnected quantum Hall effect elements that allow the realization of virtually arbitrary resistance values. In recent years, techniques were presented to efficiently design QHARS networks. An open problem is that of the evaluation of the accuracy of a QHARS, which is affected by contact and wire resistances. In this work, we present a general and systematic procedure for the error modelling of QHARSs, which is based on modern circuit analysis techniques and Monte Carlo evaluation of the uncertainty. As a practical example, this method of analysis is applied to the characterization of a 1 MΩ QHARS developed by the National Metrology Institute of Japan. Software tools are provided to apply the procedure to other arrays.
Formation stability analysis of unmanned multi-vehicles under interconnection topologies

NASA Astrophysics Data System (ADS)

Yang, Aolei; Naeem, Wasif; Fei, Minrui

2015-04-01

In this paper, the overall formation stability of an unmanned multi-vehicle is mathematically presented under interconnection topologies. A novel definition of formation error is first given and followed by the proposed formation stability hypothesis. Based on this hypothesis, a unique extension-decomposition-aggregation scheme is then employed to support the stability analysis for the overall multi-vehicle formation under a mesh topology. It is proved that the overall formation control system consisting of N number of nonlinear vehicles is not only asymptotically stable, but also exponentially stable in the sense of Lyapunov within a neighbourhood of the desired formation. This technique is shown to be applicable for a mesh topology but is equally applicable for other topologies. A simulation study of the formation manoeuvre of multiple Aerosonde UAVs (unmanned aerial vehicles), in 3-D space, is finally carried out verifying the achieved formation stability result.
VCSEL-based fiber optic link for avionics: implementation and performance analyses

NASA Astrophysics Data System (ADS)

Shi, Jieqin; Zhang, Chunxi; Duan, Jingyuan; Wen, Huaitao

2006-11-01

A Gb/s fiber optic link with built-in test capability (BIT) basing on vertical-cavity surface-emitting laser (VCSEL) sources for military avionics bus for next generation has been presented in this paper. To accurately predict link performance, statistical methods and Bit Error Rate (BER) measurements have been examined. The results show that the 1Gb/s fiber optic link meets the BER requirement and values for link margin can reach up to 13dB. Analysis shows that the suggested photonic network may provide high performance and low cost interconnections alternative for future military avionics.
A new method for using Cf-252 in SEU testing

NASA Astrophysics Data System (ADS)

Costantine, A.; Howard, J. W.; Becker, M.; Block, R. C.; Smith, L. S.; Soli, G. A.; Stauber, M. C.

1990-12-01

A system using Cf-252 and associated nuclear instrumentation has determined the single-event upset (SEU) cross section versus linear energy transfer (LET) curve for several 2K x 8 static random access memories (SRAMs). The Cf-252 fission fragments pass through a thin-film organic scintillator detector (TFD) on the way to the device under test (DUT). The TFD provides energy information for each transiting fragment. Data analysis provides the energy of the individual ion responsible for each SEU; thus, separate upset cross sections can be developed for different energy and mass regions of the californium spectrum. This californium-based device is quite small and fits onto a bench top. It provides a convenient and inexpensive supplement or alternative to accelerator and high-altitude/space SEU testing.

An Examination of Environment Perturbation Effects on Single Event Upset Rates

NASA Technical Reports Server (NTRS)

Gates, Michele M.; Leidecker, Henning W.; Lewis, Mark J.

1997-01-01

This paper presents an analysis of the sensitivity of single event upset (SEU) rate predictions to changes in the direct ionization-inducing environment. An examination based on the nature of the SEU rate equation is presented for the case in which the perturbation is constant across varying particle linear energy transfer (LET). It is shown that the relative variation in SEU rate is equal to the relative perturbation in flux. Results are also presented for the case in which the environment perturbations exist in small LET bins. Through this analysis it is shown that the relative variation in expected SEU rate is equal to that in flux only for the LET regime in which the product of the cross section and differential flux is maximum.
A new method for using Cf-252 in SEU testing

NASA Technical Reports Server (NTRS)

Costantine, A.; Howard, J. W.; Becker, M.; Block, R. C.; Smith, L. S.; Soli, G. A.; Stauber, M. C.

1990-01-01

A system using Cf-252 and associated nuclear instrumentation has determined the single-event upset (SEU) cross section versus linear energy transfer (LET) curve for several 2K x 8 static random access memories (SRAMs). The Cf-252 fission fragments pass through a thin-film organic scintillator detector (TFD) on the way to the device under test (DUT). The TFD provides energy information for each transiting fragment. Data analysis provides the energy of the individual ion responsible for each SEU; thus, separate upset cross sections can be developed for different energy and mass regions of the californium spectrum. This californium-based device is quite small and fits onto a bench top. It provides a convenient and inexpensive supplement or alternative to accelerator and high-altitude/space SEU testing.
Event-Triggered Distributed Approximate Optimal State and Output Control of Affine Nonlinear Interconnected Systems.

PubMed

Narayanan, Vignesh; Jagannathan, Sarangapani

2017-06-08

This paper presents an approximate optimal distributed control scheme for a known interconnected system composed of input affine nonlinear subsystems using event-triggered state and output feedback via a novel hybrid learning scheme. First, the cost function for the overall system is redefined as the sum of cost functions of individual subsystems. A distributed optimal control policy for the interconnected system is developed using the optimal value function of each subsystem. To generate the optimal control policy, forward-in-time, neural networks are employed to reconstruct the unknown optimal value function at each subsystem online. In order to retain the advantages of event-triggered feedback for an adaptive optimal controller, a novel hybrid learning scheme is proposed to reduce the convergence time for the learning algorithm. The development is based on the observation that, in the event-triggered feedback, the sampling instants are dynamic and results in variable interevent time. To relax the requirement of entire state measurements, an extended nonlinear observer is designed at each subsystem to recover the system internal states from the measurable feedback. Using a Lyapunov-based analysis, it is demonstrated that the system states and the observer errors remain locally uniformly ultimately bounded and the control policy converges to a neighborhood of the optimal policy. Simulation results are presented to demonstrate the performance of the developed controller.
Multi-bits error detection and fast recovery in RISC cores

NASA Astrophysics Data System (ADS)

Jing, Wang; Xing, Yang; Yuanfu, Zhao; Weigong, Zhang; Jiao, Shen; Keni, Qiu

2015-11-01

The particles-induced soft errors are a major threat to the reliability of microprocessors. Even worse, multi-bits upsets (MBUs) are ever-increased due to the rapidly shrinking feature size of the IC on a chip. Several architecture-level mechanisms have been proposed to protect microprocessors from soft errors, such as dual and triple modular redundancies (DMR and TMR). However, most of them are inefficient to combat the growing multi-bits errors or cannot well balance the critical paths delay, area and power penalty. This paper proposes a novel architecture, self-recovery dual-pipeline (SRDP), to effectively provide soft error detection and recovery with low cost for general RISC structures. We focus on the following three aspects. First, an advanced DMR pipeline is devised to detect soft error, especially MBU. Second, SEU/MBU errors can be located by enhancing self-checking logic into pipelines stage registers. Third, a recovery scheme is proposed with a recovery cost of 1 or 5 clock cycles. Our evaluation of a prototype implementation exhibits that the SRDP can successfully detect particle-induced soft errors up to 100% and recovery is nearly 95%, the other 5% will inter a specific trap.
Fan-out Estimation in Spin-based Quantum Computer Scale-up.

PubMed

Nguyen, Thien; Hill, Charles D; Hollenberg, Lloyd C L; James, Matthew R

2017-10-17

Solid-state spin-based qubits offer good prospects for scaling based on their long coherence times and nexus to large-scale electronic scale-up technologies. However, high-threshold quantum error correction requires a two-dimensional qubit array operating in parallel, posing significant challenges in fabrication and control. While architectures incorporating distributed quantum control meet this challenge head-on, most designs rely on individual control and readout of all qubits with high gate densities. We analysed the fan-out routing overhead of a dedicated control line architecture, basing the analysis on a generalised solid-state spin qubit platform parameterised to encompass Coulomb confined (e.g. donor based spin qubits) or electrostatically confined (e.g. quantum dot based spin qubits) implementations. The spatial scalability under this model is estimated using standard electronic routing methods and present-day fabrication constraints. Based on reasonable assumptions for qubit control and readout we estimate 10 2 -10 5 physical qubits, depending on the quantum interconnect implementation, can be integrated and fanned-out independently. Assuming relatively long control-free interconnects the scalability can be extended. Ultimately, the universal quantum computation may necessitate a much higher number of integrated qubits, indicating that higher dimensional electronics fabrication and/or multiplexed distributed control and readout schemes may be the preferredstrategy for large-scale implementation.
An overview of intravenous-related medication administration errors as reported to MEDMARX, a national medication error-reporting program.

PubMed

Hicks, Rodney W; Becker, Shawn C

2006-01-01

Medication errors can be harmful, especially if they involve the intravenous (IV) route of administration. A mixed-methodology study using a 5-year review of 73,769 IV-related medication errors from a national medication error reporting program indicates that between 3% and 5% of these errors were harmful. The leading type of error was omission, and the leading cause of error involved clinician performance deficit. Using content analysis, three themes-product shortage, calculation errors, and tubing interconnectivity-emerge and appear to predispose patients to harm. Nurses often participate in IV therapy, and these findings have implications for practice and patient safety. Voluntary medication error-reporting programs afford an opportunity to improve patient care and to further understanding about the nature of IV-related medication errors.
Study of run time errors of the ATLAS pixel detector in the 2012 data taking period

NASA Astrophysics Data System (ADS)

Gandrajula, Reddy Pratap

The high resolution silicon Pixel detector is critical in event vertex reconstruction and in particle track reconstruction in the ATLAS detector. During the pixel data taking operation, some modules (Silicon Pixel sensor +Front End Chip+ Module Control Chip (MCC)) go to an auto-disable state, where the Modules don't send the data for storage. Modules become operational again after reconfiguration. The source of the problem is not fully understood. One possible source of the problem is traced to the occurrence of single event upset (SEU) in the MCC. Such a module goes to either a Timeout or Busy state. This report is the study of different types and rates of errors occurring in the Pixel data taking operation. Also, the study includes the error rate dependency on Pixel detector geometry.
Physicians' medication prescribing in primary care . in Riyadh City, Saudi Arabia. Literature review, part 3: prescribing errors.

PubMed

Qureshi, N A; Neyaz, Y; Khoja, T; Magzoub, M A; Haycox, A; Walley, T

2011-02-01

Medication errors are globally huge in magnitude and associated with high morbidity and mortality together with high costs and legal problems. Medication errors are caused by multiple factors related to health providers, consumers and health system, but most prescribing errors are preventable. This paper is the third of 3 review articles that form the background for a series of 5 interconnected studies of prescribing patterns and medication errors in the public and private primary health care sectors of Saudi Arabia. A MEDLINE search was conducted to identify papers published in peer-reviewed journals over the previous 3 decades. The paper reviews the etiology, prevention strategies, reporting mechanisms and the myriad consequences of medication errors.
Using Classical Reliability Models and Single Event Upset (SEU) Data to Determine Optimum Implementation Schemes for Triple Modular Redundancy (TMR) in SRAM-Based Field Programmable Gate Array (FPGA) Devices

NASA Technical Reports Server (NTRS)

Berg, M.; Kim, H.; Phan, A.; Seidleck, C.; LaBel, K.; Pellish, J.; Campola, M.

2015-01-01

Space applications are complex systems that require intricate trade analyses for optimum implementations. We focus on a subset of the trade process, using classical reliability theory and SEU data, to illustrate appropriate TMR scheme selection.
Evaluation of the Radiation Susceptibility of a 3D NAND Flash Memory

NASA Technical Reports Server (NTRS)

Chen, Dakai; Wilcox, Edward; Ladbury, Raymond; Seidleck, Christina; Kim, Hak; Phan, Anthony; LaBel, Kenneth

2017-01-01

We evaluated the heavy ion and proton-induced single-event effects (SEE) for a 3D NAND flash. The 3D NAND showed similar single-event upset (SEU) sensitivity to a planar NAND of similar density and performance in the multiple-cell level (MLC) storage mode. However, the single-level-cell (SLC) storage mode of the 3D NAND showed significantly reduced SEU susceptibility. Additionally, the 3D NAND showed less MBU susceptibility than the planar NAND, with reduced number of upset bits per byte and reduced cross sections overall. However, the 3D architecture exhibited angular sensitivities for both base and face angles, reflecting the anisotropic nature of the SEU vulnerability in space. Furthermore, the SEU cross section decreased with increasing fluence for both the 3D NAND and the latest generation planar NAND, indicating a variable upset rate for a space mission. These unique characteristics introduce complexity to traditional ground irradiation test procedures.
A 25-Gbps high-sensitivity optical receiver with 10-Gbps photodiode using inductive input coupling for optical interconnects

NASA Astrophysics Data System (ADS)

Oku, Hideki; Narita, Kiyomi; Shiraishi, Takashi; Ide, Satoshi; Tanaka, Kazuhiro

2012-01-01

A 25-Gbps high-sensitivity optical receiver with a 10-Gbps photodiode (PD) using inductive input coupling has been demonstrated for optical interconnects. We introduced the inductive input coupling technique to achieve the 25-Gbps optical receiver using a 10-Gbps PD. We implemented an input inductor (Lin) between the PD and trans-impedance amplifier (TIA), and optimized inductance to enhance the bandwidth and reduce the input referred noise current through simulation with the RF PD-model. Near the resonance frequency of the tank circuit formed by PD capacitance, Lin, and TIA input capacitance, the PD photo-current through Lin into the TIA is enhanced. This resonance has the effects of enhancing the bandwidth at TIA input and reducing the input equivalent value of the noise current from TIA. We fabricated the 25-Gbps optical receiver with the 10-Gbps PD using an inductive input coupling technique. Due to the application of an inductor, the receiver bandwidth is enhanced from 10 GHz to 14.2 GHz. Thanks to this wide-band and low-noise performance, we were able to improve the sensitivity at an error rate of 1E-12 from non-error-free to -6.5 dBm. These results indicate that our technique is promising for cost-effective optical interconnects.
Silicon quantum processor with robust long-distance qubit couplings

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tosi, Guilherme; Mohiyaddin, Fahd A.; Schmitt, Vivien

Practical quantum computers require a large network of highly coherent qubits, interconnected in a design robust against errors. Donor spins in silicon provide state-of-the-art coherence and quantum gate fidelities, in a platform adapted from industrial semiconductor processing. Here we present a scalable design for a silicon quantum processor that does not require precise donor placement and leaves ample space for the routing of interconnects and readout devices. We introduce the flip-flop qubit, a combination of the electron-nuclear spin states of a phosphorus donor that can be controlled by microwave electric fields. Two-qubit gates exploit a second-order electric dipole-dipole interaction, allowingmore » selective coupling beyond the nearest-neighbor, at separations of hundreds of nanometers, while microwave resonators can extend the entanglement to macroscopic distances. We predict gate fidelities within fault-tolerance thresholds using realistic noise models. This design provides a realizable blueprint for scalable spin-based quantum computers in silicon.« less
Adaptive Neural Networks Decentralized FTC Design for Nonstrict-Feedback Nonlinear Interconnected Large-Scale Systems Against Actuator Faults.

PubMed

Li, Yongming; Tong, Shaocheng

The problem of active fault-tolerant control (FTC) is investigated for the large-scale nonlinear systems in nonstrict-feedback form. The nonstrict-feedback nonlinear systems considered in this paper consist of unstructured uncertainties, unmeasured states, unknown interconnected terms, and actuator faults (e.g., bias fault and gain fault). A state observer is designed to solve the unmeasurable state problem. Neural networks (NNs) are used to identify the unknown lumped nonlinear functions so that the problems of unstructured uncertainties and unknown interconnected terms can be solved. By combining the adaptive backstepping design principle with the combination Nussbaum gain function property, a novel NN adaptive output-feedback FTC approach is developed. The proposed FTC controller can guarantee that all signals in all subsystems are bounded, and the tracking errors for each subsystem converge to a small neighborhood of zero. Finally, numerical results of practical examples are presented to further demonstrate the effectiveness of the proposed control strategy.The problem of active fault-tolerant control (FTC) is investigated for the large-scale nonlinear systems in nonstrict-feedback form. The nonstrict-feedback nonlinear systems considered in this paper consist of unstructured uncertainties, unmeasured states, unknown interconnected terms, and actuator faults (e.g., bias fault and gain fault). A state observer is designed to solve the unmeasurable state problem. Neural networks (NNs) are used to identify the unknown lumped nonlinear functions so that the problems of unstructured uncertainties and unknown interconnected terms can be solved. By combining the adaptive backstepping design principle with the combination Nussbaum gain function property, a novel NN adaptive output-feedback FTC approach is developed. The proposed FTC controller can guarantee that all signals in all subsystems are bounded, and the tracking errors for each subsystem converge to a small neighborhood of zero. Finally, numerical results of practical examples are presented to further demonstrate the effectiveness of the proposed control strategy.
Chip-to-chip interconnects based on 3D stacking of optoelectrical dies on Si

NASA Astrophysics Data System (ADS)

Duan, P.; Raz, O.; Smalbrugge, B. E.; Duis, J.; Dorren, H. J. S.

2012-01-01

We demonstrate a new approach to increase the optical interconnection bandwidth density by stacking the opto-electrical dies directly on the CMOS driver. The suggested implementation is aiming to provide a wafer scale process which will make the use of wire bonding redundant and will allow for impedance matched metallic wiring between the electronic driving circuit and its opto-electronic counter part. We suggest the use of a thick photoresist ramp between CMOS driver and opto-electrical dies surface as the bridge for supporting co-plannar waveguides (CPW) electrically plated with lithographic accuracy. In this way all three dimensions of the interconnecting metal layer, width, length and thickness can be completely controlled. In this 1st demonstration all processing is done on commercially available devices and products, and is compatible with CMOS processing technology. To test the applicability of CPW instead of wire bonds for interconnecting the CMOS circuit and opto-electronic chips, we have made test samples and tested their performance at speeds up to 10 Gbps. In this demonstration, a silicon substrate was used on which we evaporated gold co-planar waveguides (CPW) to mimic a wire on the driver. An optical link consisting of a VCSEL chip and a photodiode chip has been assembled and fully characterized using optical coupling into and out of a multimode fiber (MMF). A 10 Gb/s 27-1 NRZ PRBS signal transmitted from one chip to another chip was detected error free. A 4 dB receiver sensitivity penalty is measured for the integrated device compared to a commercial link.
47 CFR 52.34 - Obligations regarding local number porting to and from interconnected VoIP or Internet-based TRS...

Code of Federal Regulations, 2010 CFR

2010-10-01

... and from interconnected VoIP or Internet-based TRS providers. 52.34 Section 52.34 Telecommunication... Portability § 52.34 Obligations regarding local number porting to and from interconnected VoIP or Internet-based TRS providers. (a) An interconnected VoIP or VRS or IP Relay provider must facilitate an end-user...
47 CFR 52.34 - Obligations regarding local number porting to and from interconnected VoIP or Internet-based TRS...

Code of Federal Regulations, 2011 CFR

2011-10-01

... and from interconnected VoIP or Internet-based TRS providers. 52.34 Section 52.34 Telecommunication... Portability § 52.34 Obligations regarding local number porting to and from interconnected VoIP or Internet-based TRS providers. (a) An interconnected VoIP or VRS or IP Relay provider must facilitate an end-user...
Radiation-Hardened Electronics for Advanced Communications Systems

NASA Technical Reports Server (NTRS)

Whitaker, Sterling

2015-01-01

Novel approach enables high-speed special-purpose processors Advanced reconfigurable and reprogrammable communication systems will require sub-130-nanometer electronics. Legacy single event upset (SEU) radiation-tolerant circuits are ineffective at speeds greater than 125 megahertz. In Phase I of this project, ICs, LLC, demonstrated new base-level logic circuits that provide SEU immunity for sub-130-nanometer high-speed circuits. In Phase II, the company developed an innovative self-restoring logic (SRL) circuit and a system approach that provides high-speed, SEU-tolerant solutions that are effective for sub-130-nanometer electronics scalable to at least 22-nanometer processes. The SRL system can be used in the design of NASA's next-generation special-purpose processors, especially reconfigurable communication processors.
Configurable Aperture Space Telescope

NASA Technical Reports Server (NTRS)

Ennico, Kimberly; Vassigh, Kenny; Bendek, Selman; Young, Zion W; Lynch, Dana H.

2015-01-01

In December 2014, we were awarded Center Innovation Fund to evaluate an optical and mechanical concept for a novel implementation of a segmented telescope based on modular, interconnected small sats (satlets). The concept is called CAST, a Configurable Aperture Space Telescope. With a current TRL is 2 we will aim to reach TLR 3 in Sept 2015 by demonstrating a 2x2 mirror system to validate our optical model and error budget, provide strawman mechanical architecture and structural damping analyses, and derive future satlet-based observatory performance requirements. CAST provides an alternative access to visible andor UV wavelength space telescope with 1-meter or larger aperture for NASA SMD Astrophysics and Planetary Science community after the retirement of HST.
Multi-petascale highly efficient parallel supercomputer

DOE Office of Scientific and Technical Information (OSTI.GOV)

Asaad, Sameh; Bellofatto, Ralph E.; Blocksome, Michael A.

A Multi-Petascale Highly Efficient Parallel Supercomputer of 100 petaflop-scale includes node architectures based upon System-On-a-Chip technology, where each processing node comprises a single Application Specific Integrated Circuit (ASIC). The ASIC nodes are interconnected by a five dimensional torus network that optimally maximize the throughput of packet communications between nodes and minimize latency. The network implements collective network and a global asynchronous network that provides global barrier and notification functions. Integrated in the node design include a list-based prefetcher. The memory system implements transaction memory, thread level speculation, and multiversioning cache that improves soft error rate at the same time andmore » supports DMA functionality allowing for parallel processing message-passing.« less
Configurable Aperture Space Telescope

NASA Technical Reports Server (NTRS)

Ennico, Kimberly; Bendek, Eduardo

2015-01-01

In December 2014, we were awarded Center Innovation Fund to evaluate an optical and mechanical concept for a novel implementation of a segmented telescope based on modular, interconnected small sats (satlets). The concept is called CAST, a Configurable Aperture Space Telescope. With a current TRL is 2 we will aim to reach TLR 3 in Sept 2015 by demonstrating a 2x2 mirror system to validate our optical model and error budget, provide straw man mechanical architecture and structural damping analyses, and derive future satlet-based observatory performance requirements. CAST provides an alternative access to visible and/or UV wavelength space telescope with 1-meter or larger aperture for NASA SMD Astrophysics and Planetary Science community after the retirement of HST

Heavy Ion and Proton-Induced Single Event Upset Characteristics of a 3D NAND Flash Memory

NASA Technical Reports Server (NTRS)

Chen, Dakai; Wilcox, Edward; Ladbury, Raymond; Seidleck, Christina; Kim, Hak; Phan, Anthony; Label, Kenneth

2017-01-01

We evaluated the effects of heavy ion and proton irradiation for a 3D NAND flash. The 3D NAND showed similar single-event upset (SEU) sensitivity to a planar NAND of identical density in the multiple-cell level (MLC) storage mode. The 3D NAND showed significantly reduced SEU susceptibility in single-level-cell (SLC) storage mode. Additionally, the 3D NAND showed less multiple-bit upset susceptibility than the planar NAND, with fewer number of upset bits per byte and smaller cross sections overall. However, the 3D architecture exhibited angular sensitivities for both base and face angles, reflecting the anisotropic nature of the SEU vulnerability in space. Furthermore, the SEU cross section decreased with increasing fluence for both the 3D NAND and the Micron 16 nm planar NAND, which suggests that typical heavy ion test fluences will underestimate the upset rate during a space mission. These unique characteristics introduce complexity to traditional ground irradiation test procedures.
Silicon quantum processor with robust long-distance qubit couplings.

PubMed

Tosi, Guilherme; Mohiyaddin, Fahd A; Schmitt, Vivien; Tenberg, Stefanie; Rahman, Rajib; Klimeck, Gerhard; Morello, Andrea

2017-09-06

Practical quantum computers require a large network of highly coherent qubits, interconnected in a design robust against errors. Donor spins in silicon provide state-of-the-art coherence and quantum gate fidelities, in a platform adapted from industrial semiconductor processing. Here we present a scalable design for a silicon quantum processor that does not require precise donor placement and leaves ample space for the routing of interconnects and readout devices. We introduce the flip-flop qubit, a combination of the electron-nuclear spin states of a phosphorus donor that can be controlled by microwave electric fields. Two-qubit gates exploit a second-order electric dipole-dipole interaction, allowing selective coupling beyond the nearest-neighbor, at separations of hundreds of nanometers, while microwave resonators can extend the entanglement to macroscopic distances. We predict gate fidelities within fault-tolerance thresholds using realistic noise models. This design provides a realizable blueprint for scalable spin-based quantum computers in silicon.Quantum computers will require a large network of coherent qubits, connected in a noise-resilient way. Tosi et al. present a design for a quantum processor based on electron-nuclear spins in silicon, with electrical control and coupling schemes that simplify qubit fabrication and operation.
A novel optimized hybrid fuzzy logic intelligent PID controller for an interconnected multi-area power system with physical constraints and boiler dynamics.

PubMed

Gomaa Haroun, A H; Li, Yin-Ya

2017-11-01

In the fast developing world nowadays, load frequency control (LFC) is considered to be a most significant role for providing the power supply with good quality in the power system. To deliver a reliable power, LFC system requires highly competent and intelligent control technique. Hence, in this article, a novel hybrid fuzzy logic intelligent proportional-integral-derivative (FLiPID) controller has been proposed for LFC of interconnected multi-area power systems. A four-area interconnected thermal power system incorporated with physical constraints and boiler dynamics is considered and the adjustable parameters of the FLiPID controller are optimized using particle swarm optimization (PSO) scheme employing an integral square error (ISE) criterion. The proposed method has been established to enhance the power system performances as well as to reduce the oscillations of uncertainties due to variations in the system parameters and load perturbations. The supremacy of the suggested method is demonstrated by comparing the simulation results with some recently reported heuristic methods such as fuzzy logic proportional-integral (FLPI) and intelligent proportional-integral-derivative (PID) controllers for the same electrical power system. the investigations showed that the FLiPID controller provides a better dynamic performance and outperform compared to the other approaches in terms of the settling time, and minimum undershoots of the frequency as well as tie-line power flow deviations following a perturbation, in addition to perform appropriate settlement of integral absolute error (IAE). Finally, the sensitivity analysis of the plant is inspected by varying the system parameters and operating load conditions from their nominal values. It is observed that the suggested controller based optimization algorithm is robust and perform satisfactorily with the variations in operating load condition, system parameters and load pattern. Copyright © 2017 ISA. Published by Elsevier Ltd. All rights reserved.
Navigation of the autonomous vehicle reverse movement

NASA Astrophysics Data System (ADS)

Rachkov, M.; Petukhov, S.

2018-02-01

The paper presents a mathematical formulation of the vehicle reverse motion along a multi-link polygonal trajectory consisting of rectilinear segments interconnected by nodal points. Relevance of the problem is caused by the need to solve a number of tasks: to save the vehicle in the event of а communication break by returning along the trajectory already passed, to avoid a turn on the ground in constrained obstacles or dangerous conditions, or a partial return stroke for the subsequent bypass of the obstacle and continuation of the forward movement. The method of navigation with direct movement assumes that the reverse path is elaborated by using landmarks. To measure landmarks on board, a block of cameras is placed on a vehicle controlled by the operator through the radio channel. Errors in estimating deviation from the nominal trajectory of motion are determined using the multidimensional correlation analysis apparatus based on the dynamics of a lateral deviation error and a vehicle speed error. The result of the experiment showed a relatively high accuracy in determining the state vector that provides the vehicle reverse motion relative to the reference trajectory with a practically acceptable error while returning to the start point.
Primary investigation the impacts of the external memory (DDR3) failures on the performance of Xilinx Zynq-7010 SoC based system (MicroZed) using laser irradiation

NASA Astrophysics Data System (ADS)

Liu, Shuhuan; Du, Xuecheng; Du, Xiaozhi; Zhang, Yao; Mubashiru, Lawal Olarewaju; Luo, Dongyang; yuan, Yuan; Deng, Tianxiang; Li, Zhuoqi; Zang, Hang; Li, Yonghong; He, Chaohui; Ma, Yingqi; Shangguan, Shipeng

2017-09-01

The impacts of the external dynamic memory (DDR3) failures on the performance of 28 nm Xilinx Zynq-7010 SoC based system (MicroZed) were investigated with two sets of 1064 nm laser platforms. The failure sensitive area distributionsons on the back surface of the test DDR3 were primarily localized with a CW laser irradiation platform. During the CW laser scanning on the back surface of the DDR3 of the test board system, various failure modes except SEU and SEL (MBU, SEFI, data storage address error, rebooting, etc) were found in the testing embedded modules (ALU, PL, Register, Cache and DMA, etc) of SoC. Moreover, the experimental results demonstrated that there were 16 failure sensitive blocks symmetrically distributed on the back surface of the DDR3 with every sensitive block area measured was about 1 mm × 0.5 mm. The influence factors on the failure modes of the embedded modules were primarily analyzed and the SEE characteristics of DDR3 induced by the picoseconds pulsed laser were tested. The failure modes of DDR3 found were SEU, SEFI, SEL, test board rebooting by itself, unknown data, etc. Furthermore, the time interval distributions of failure occurrence in DDR3 changes with the pulsed laser irradiation energy and the CPU operating frequency were measured and compared. Meanwhile, the failure characteristics of DDR3 induced by pulsed laser irradiation were primarily explored. The measured results and the testing techniques designed in this paper provide some reference information for evaluating the reliability of the test system or other similar electronic system in harsh environment.
Accurate Modeling Method for Cu Interconnect

NASA Astrophysics Data System (ADS)

Yamada, Kenta; Kitahara, Hiroshi; Asai, Yoshihiko; Sakamoto, Hideo; Okada, Norio; Yasuda, Makoto; Oda, Noriaki; Sakurai, Michio; Hiroi, Masayuki; Takewaki, Toshiyuki; Ohnishi, Sadayuki; Iguchi, Manabu; Minda, Hiroyasu; Suzuki, Mieko

This paper proposes an accurate modeling method of the copper interconnect cross-section in which the width and thickness dependence on layout patterns and density caused by processes (CMP, etching, sputtering, lithography, and so on) are fully, incorporated and universally expressed. In addition, we have developed specific test patterns for the model parameters extraction, and an efficient extraction flow. We have extracted the model parameters for 0.15μm CMOS using this method and confirmed that 10%τpd error normally observed with conventional LPE (Layout Parameters Extraction) was completely dissolved. Moreover, it is verified that the model can be applied to more advanced technologies (90nm, 65nm and 55nm CMOS). Since the interconnect delay variations due to the processes constitute a significant part of what have conventionally been treated as random variations, use of the proposed model could enable one to greatly narrow the guardbands required to guarantee a desired yield, thereby facilitating design closure.
On-orbit observations of single event upset in Harris HM-6508 1K RAMs, reissue A

NASA Astrophysics Data System (ADS)

Blake, J. B.; Mandel, R.

1987-02-01

The Harris HM-6508 1K x 1 RAMs are part of a subsystem of a satellite in a low, polar orbit. The memory module, used in the subsystem containing the RAMs, consists of three printed circuit cards, with each card containing eight 2K byte memory hybrids, for a total of 48K bytes. Each memory hybrid contains 16 HM-6508 RAM chips. On a regular basis all but 256 bytes of the 48K bytes are examined for bit errors. Two different techniques were used for detecting bit errors. The first technique, a memory check sum, was capable of automatically detecting all single bit and some double bit errors which occurred within a page of memory. A memory page consists of 256 bytes. Memory check sum tests are performed approximately every 90 minutes. To detect a multiple error or to determine the exact location of the bit error within the page the entire contents of the memory is dumped and compared to the load file. Memory dumps are normally performed once a month, or immediately after the check sum routine detects an error. Once the exact location of the error is found, the correct value is reloaded into memory. After the memory is reloaded, the contents of the memory location in question is verified in order to determine if the error was a soft error generated by an SEU or a hard error generated by a part failure or cosmic-ray induced latchup.
Elastic all-optical multi-hop interconnection in data centers with adaptive spectrum allocation

NASA Astrophysics Data System (ADS)

Hong, Yuanyuan; Hong, Xuezhi; Chen, Jiajia; He, Sailing

2017-01-01

In this paper, a novel flex-grid all-optical interconnect scheme that supports transparent multi-hop connections in data centers is proposed. An inter-rack all-optical multi-hop connection is realized with an optical loop employed at flex-grid wavelength selective switches (WSSs) in an intermediate rack rather than by relaying through optical-electric-optical (O-E-O) conversions. Compared with the conventional O-E-O based approach, the proposed all-optical scheme is able to off-load the traffic at intermediate racks, leading to a reduction of the power consumption and cost. The transmission performance of the proposed flex-grid multi-hop all-optical interconnect scheme with various modulation formats, including both coherently detected and directly detected approaches, are investigated by Monte-Carlo simulations. To enhance the spectrum efficiency (SE), number-of-hop adaptive bandwidth allocation is introduced. Numerical results show that the SE can be improved by up to 33.3% at 40 Gbps, and by up to 25% at 100 Gbps. The impact of parameters, such as targeted bit error rate (BER) level and insertion loss of components, on the transmission performance of the proposed approach are also explored. The results show that the maximum SE improvement of the adaptive approach over the non-adaptive one is enhanced with the decrease of the targeted BER levels and the component insertion loss.
Nested neural networks

NASA Technical Reports Server (NTRS)

Baram, Yoram

1988-01-01

Nested neural networks, consisting of small interconnected subnetworks, allow for the storage and retrieval of neural state patterns of different sizes. The subnetworks are naturally categorized by layers of corresponding to spatial frequencies in the pattern field. The storage capacity and the error correction capability of the subnetworks generally increase with the degree of connectivity between layers (the nesting degree). Storage of only few subpatterns in each subnetworks results in a vast storage capacity of patterns and subpatterns in the nested network, maintaining high stability and error correction capability.
Modulated error diffusion CGHs for neural nets

NASA Astrophysics Data System (ADS)

Vermeulen, Pieter J. E.; Casasent, David P.

1990-05-01

New modulated error diffusion CGHs (computer generated holograms) for optical computing are considered. Specific attention is given to their use in optical matrix-vector, associative processor, neural net and optical interconnection architectures. We consider lensless CGH systems (many CGHs use an external Fourier transform (FT) lens), the Fresnel sampling requirements, the effects of finite CGH apertures (sample and hold inputs), dot size correction (for laser recorders), and new applications for this novel encoding method (that devotes attention to quantization noise effects).
Multi-scale reflection modulator-based optical interconnects

NASA Astrophysics Data System (ADS)

Nair, Rohit

This dissertation describes the design, analysis, and experimental validation of micro- and macro-optical components for implementing optical interconnects at multiple scales for varied applications. Three distance scales are explored: millimeter, centimeter, and meter-scales. At the millimeter-scale, we propose the use of optical interconnects at the intra-chip level. With the rapid scaling down of CMOS critical dimensions in accordance to Moore's law, the bandwidth requirements of global interconnects in microprocessors has exceeded the capabilities of metal links. These are the wires that connect the most remote parts of the chip and are disproportionately problematic in terms of chip area and power consumption. Consequently, in the mid-2000s, we saw a shift in the chip architecture: a move towards multicore designs. However, this only delays the inevitable communication bottleneck between cores. To satisfy this bandwidth, we propose to replace the global metal interconnects with optical interconnects. We propose to use the hybrid integration of silicon with GaAs/AlAs-based multiple quantum well devices as optical modulators and photodetectors along with polymeric waveguides to transport the light. We use grayscale lithography to fabricate curved facets into the waveguides to couple light into the modulators and photodetectors. Next, at the chip-to-chip level in high-performance multiprocessor computing systems, communication distances vary from a few centimeters to tens of centimeters. An optical design for coupling light from off-chip lasers to on-chip surface-normal modulators is proposed in order to implement chip-to-chip free-space optical interconnects. The method uses a dual-prism module constructed from prisms made of two different glasses. The various alignment tolerances of the proposed system are investigated and found to be well within pick-and-place accuracies. For the off-chip lasers, vertical cavity surface emitting lasers (VCSELs) are proposed. The rationale behind using on-chip modulators rather than VCSELs is to avoid VCSEL thermal loads on chip, and because of higher reliability of modulators than VCSELs. Particularly above 10Gbps, an empirical model developed shows the rapid decrease of VCSEL median time to failure vs. data rate. Thus the proposed interconnect scheme which utilizes continuous wave VCSELs that are externally modulated by on-chip multiple quantum well modulators is applicable for chip-to-chip optical interconnects at 20Gbps and higher line data rates. Finally, for applications such as remote telemetry, where the interrogation distances can vary from a few meters to tens or even hundreds of meters we demonstrate a modulated retroreflector that utilizes InGaAs/InAlAs-based large-area multiple quantum well modulators on all three faces of a retroreflector. The large-area devices, fabricated by metalorganic chemical vapor deposition, are characterized in terms of the yield and leakage currents. A yield higher than that achieved previously using devices fabricated by molecular beam epitaxy is observed. The retroreflector module is constructed using standard FR4 printed circuit boards, thereby simplifying the wiring issue. A high optical contrast ratio of 8.23dB is observed for a drive of 20V. A free-standing PCB retroreflector is explored and found to have insufficient angular tolerances (+/-0.5 degrees). We show that the angular errors in the corner-cube construction can be corrected for using off-the-shelf optical components as opposed to mounting the PCBs on a precision corner cube, as has been done previously.
A New Partial Reconfiguration-Based Fault-Injection System to Evaluate SEU Effects in SRAM-Based FPGAs

NASA Astrophysics Data System (ADS)

Sterpone, L.; Violante, M.

2007-08-01

Modern SRAM-based field programmable gate array (FPGA) devices offer high capability in implementing complex system. Unfortunately, SRAM-based FPGAs are extremely sensitive to single event upsets (SEUs) induced by radiation particles. In order to successfully deploy safety- or mission-critical applications, designer need to validate the correctness of the obtained designs. In this paper we describe a system based on partial-reconfiguration for running fault-injection experiments within the configuration memory of SRAM-based FPGAs. The proposed fault-injection system uses the internal configuration capabilities that modern FPGAs offer in order to inject SEU within the configuration memory. Detailed experimental results show that the technique is orders of magnitude faster than previously proposed ones.
The Single Event Effect Characteristics of the 486-DX4 Microprocessor

NASA Technical Reports Server (NTRS)

Kouba, Coy; Choi, Gwan

1996-01-01

This research describes the development of an experimental radiation testing environment to investigate the single event effect (SEE) susceptibility of the 486-DX4 microprocessor. SEE effects are caused by radiation particles that disrupt the logic state of an operating semiconductor, and include single event upsets (SEU) and single event latchup (SEL). The relevance of this work can be applied directly to digital devices that are used in spaceflight computer systems. The 486-DX4 is a powerful commercial microprocessor that is currently under consideration for use in several spaceflight systems. As part of its selection process, it must be rigorously tested to determine its overall reliability in the space environment, including its radiation susceptibility. The goal of this research is to experimentally test and characterize the single event effects of the 486-DX4 microprocessor using a cyclotron facility as the fault-injection source. The test philosophy is to focus on the "operational susceptibility," by executing real software and monitoring for errors while the device is under irradiation. This research encompasses both experimental and analytical techniques, and yields a characterization of the 486-DX4's behavior for different operating modes. Additionally, the test methodology can accommodate a wide range of digital devices, such as microprocessors, microcontrollers, ASICS, and memory modules, for future testing. The goals were achieved by testing with three heavy-ion species to provide different linear energy transfer rates, and a total of six microprocessor parts were tested from two different vendors. A consistent set of error modes were identified that indicate the manner in which the errors were detected in the processor. The upset cross-section curves were calculated for each error mode, and the SEU threshold and saturation levels were identified for each processor. Results show a distinct difference in the upset rate for different configurations of the on-chip cache, as well as proving that one vendor is superior to the other in terms of latchup susceptibility. Results from this testing were also used to provide a mean-time-between-failure estimate of the 486-DX4 operating in the radiation environment for the International Space Station.
Eddy current measurement of the thickness of top Cu film of the multilayer interconnects in the integrated circuit (IC) manufacturing process

NASA Astrophysics Data System (ADS)

Qu, Zilian; Meng, Yonggang; Zhao, Qian

2015-03-01

This paper proposes a new eddy current method, named equivalent unit method (EUM), for the thickness measurement of the top copper film of multilayer interconnects in the chemical mechanical polishing (CMP) process, which is an important step in the integrated circuit (IC) manufacturing. The influence of the underneath circuit layers on the eddy current is modeled and treated as an equivalent film thickness. By subtracting this equivalent film component, the accuracy of the thickness measurement of the top copper layer with an eddy current sensor is improved and the absolute error is 3 nm for sampler measurement.
Cascade solar cell having conductive interconnects

DOEpatents

Borden, Peter G.; Saxena, Ram R.

1982-10-26

Direct ohmic contact between the cells in an epitaxially grown cascade solar cell is obtained by means of conductive interconnects formed through grooves etched intermittently in the upper cell. The base of the upper cell is directly connected by the conductive interconnects to the emitter of the bottom cell. The conductive interconnects preferably terminate on a ledge formed in the base of the upper cell.
Neuro-Fuzzy Computational Technique to Control Load Frequency in Hydro-Thermal Interconnected Power System

NASA Astrophysics Data System (ADS)

Prakash, S.; Sinha, S. K.

2015-09-01

In this research work, two areas hydro-thermal power system connected through tie-lines is considered. The perturbation of frequencies at the areas and resulting tie line power flows arise due to unpredictable load variations that cause mismatch between the generated and demanded powers. Due to rising and falling power demand, the real and reactive power balance is harmed; hence frequency and voltage get deviated from nominal value. This necessitates designing of an accurate and fast controller to maintain the system parameters at nominal value. The main purpose of system generation control is to balance the system generation against the load and losses so that the desired frequency and power interchange between neighboring systems are maintained. The intelligent controllers like fuzzy logic, artificial neural network (ANN) and hybrid fuzzy neural network approaches are used for automatic generation control for the two area interconnected power systems. Area 1 consists of thermal reheat power plant whereas area 2 consists of hydro power plant with electric governor. Performance evaluation is carried out by using intelligent (ANFIS, ANN and fuzzy) control and conventional PI and PID control approaches. To enhance the performance of controller sliding surface i.e. variable structure control is included. The model of interconnected power system has been developed with all five types of said controllers and simulated using MATLAB/SIMULINK package. The performance of the intelligent controllers has been compared with the conventional PI and PID controllers for the interconnected power system. A comparison of ANFIS, ANN, Fuzzy and PI, PID based approaches shows the superiority of proposed ANFIS over ANN, fuzzy and PI, PID. Thus the hybrid fuzzy neural network controller has better dynamic response i.e., quick in operation, reduced error magnitude and minimized frequency transients.
Integrated five-port non-blocking optical router based on mode-selective property

NASA Astrophysics Data System (ADS)

Jia, Hao; Zhou, Ting; Fu, Xin; Ding, Jianfeng; Zhang, Lei; Yang, Lin

2018-05-01

In this paper, we propose and demonstrate a five-port optical router based on mode-selective property. It utilizes different combinations of four spatial modes at input and output ports as labels to distinguish its 20 routing paths. It can direct signals from the source port to the destination port intelligently without power consumption and additional switching time to realize various path steering. The proposed architecture is constructed by asymmetric directional coupler based mode-multiplexers/de-multiplexers, multimode interference based waveguide crossings and single-mode interconnect waveguides. The broad optical bandwidths of these constituents make the device suitable to combine with wavelength division multiplexing signal transmission, which can effectively increase the data throughput. Measurement results show that the insertion loss of its 20 routing paths are lower than 8.5 dB and the optical signal-to-noise ratios are larger than 16.3 dB at 1525-1565 nm. To characterize its routing functionality, a 40-Gbps data transmission with bit-error-rate (BER) measurement is implemented. The power penalties for the error-free switching (BER<10-9) are 1.0 dB and 0.8 dB at 1545 nm and 1565 nm, respectively.
Zee electrical interconnect

NASA Technical Reports Server (NTRS)

Rust, Thomas M. (Inventor); Gaddy, Edward M. (Inventor); Herriage, Michael J. (Inventor); Patterson, Robert E. (Inventor); Partin, Richard D. (Inventor)

2001-01-01

An interconnect, having some length, that reliably connects two conductors separated by the length of the interconnect when the connection is made but in which one length if unstressed would change relative to the other in operation. The interconnect comprises a base element an intermediate element and a top element. Each element is rectangular and formed of a conducting material and has opposed ends. The elements are arranged in a generally Z-shape with the base element having one end adapted to be connected to one conductor. The top element has one end adapted to be connected to another conductor and the intermediate element has its ends disposed against the other end of the base and the top element. Brazes mechanically and electrically interconnect the intermediate element to the base and the top elements proximate the corresponding ends of the elements. When the respective ends of the base and the top elements are connected to the conductors, an electrical connection is formed therebetween, and when the conductors are relatively moved or the interconnect elements change length the elements accommodate the changes and the associated compression and tension forces in such a way that the interconnect does not mechanically fatigue.
Radiation characterization report for the GPS Receiver microcontroller chip. Final report

DOE Office of Scientific and Technical Information (OSTI.GOV)

Not Available

1994-06-20

The overall objective of this characterization test was to determine the sensitivity of the Motorola 68332 32-bit microcontroller to radiation induced single event upset and latch-up (SEU/SEL). The microcontroller is a key component of the GPS Receiver which will be a subsystem of the satellite required for the {open_quotes}FORTE{close_quotes} experiment. Testing was conducted at the Single Event Effects Laboratory at Brookhaven National Laboratory. The results obtained included a latch-up (SEL) threshold LET (Linear Energy Transfer) of 20 MeV-CM{sub 2}/mg and an upset (SEU) threshold LET of 5 MeV-CM{sup 2}/mg. The SEU threshold is typical of this technology, commercial 0.8{mu}m HCMOS.more » Some flow errors were observed that were not reset by the internal watchdog timer of the 68332. It is important that the Receiver design include a monitor of the device, such as an external watch-dog timer, that would initiate a reset of the program when this type of upset occurs. The SEL threshold is lower than would be expected for this 12{mu}m epi layer process and suggests the need for a strategy that would allow for a hard reset of the controller when a latch-up event occurs. Analysis of the galactic cosmic ray spectrum for the FORTE orbit was done and the results indicate a worst case latch-up rate for this device of 6.3 {times} 10{sup {minus}5} latch-ups per device day or roughly one latch-up per 43.5 device years.« less
FPGA-Based, Self-Checking, Fault-Tolerant Computers

NASA Technical Reports Server (NTRS)

Some, Raphael; Rennels, David

2004-01-01

A proposed computer architecture would exploit the capabilities of commercially available field-programmable gate arrays (FPGAs) to enable computers to detect and recover from bit errors. The main purpose of the proposed architecture is to enable fault-tolerant computing in the presence of single-event upsets (SEUs). [An SEU is a spurious bit flip (also called a soft error) caused by a single impact of ionizing radiation.] The architecture would also enable recovery from some soft errors caused by electrical transients and, to some extent, from intermittent and permanent (hard) errors caused by aging of electronic components. A typical FPGA of the current generation contains one or more complete processor cores, memories, and highspeed serial input/output (I/O) channels, making it possible to shrink a board-level processor node to a single integrated-circuit chip. Custom, highly efficient microcontrollers, general-purpose computers, custom I/O processors, and signal processors can be rapidly and efficiently implemented by use of FPGAs. Unfortunately, FPGAs are susceptible to SEUs. Prior efforts to mitigate the effects of SEUs have yielded solutions that degrade performance of the system and require support from external hardware and software. In comparison with other fault-tolerant- computing architectures (e.g., triple modular redundancy), the proposed architecture could be implemented with less circuitry and lower power demand. Moreover, the fault-tolerant computing functions would require only minimal support from circuitry outside the central processing units (CPUs) of computers, would not require any software support, and would be largely transparent to software and to other computer hardware. There would be two types of modules: a self-checking processor module and a memory system (see figure). The self-checking processor module would be implemented on a single FPGA and would be capable of detecting its own internal errors. It would contain two CPUs executing identical programs in lock step, with comparison of their outputs to detect errors. It would also contain various cache local memory circuits, communication circuits, and configurable special-purpose processors that would use self-checking checkers. (The basic principle of the self-checking checker method is to utilize logic circuitry that generates error signals whenever there is an error in either the checker or the circuit being checked.) The memory system would comprise a main memory and a hardware-controlled check-pointing system (CPS) based on a buffer memory denoted the recovery cache. The main memory would contain random-access memory (RAM) chips and FPGAs that would, in addition to everything else, implement double-error-detecting and single-error-correcting memory functions to enable recovery from single-bit errors.

Radiation effects in advanced microelectronics technologies

NASA Astrophysics Data System (ADS)

Johnston, A. H.

1998-06-01

The pace of device scaling has increased rapidly in recent years. Experimental CMOS devices have been produced with feature sizes below 0.1 /spl mu/m, demonstrating that devices with feature sizes between 0.1 and 0.25 /spl mu/m will likely be available in mainstream technologies after the year 2000. This paper discusses how the anticipated changes in device dimensions and design are likely to affect their radiation response in space environments. Traditional problems, such as total dose effects, SEU and latchup are discussed, along with new phenomena. The latter include hard errors from heavy ions (microdose and gate-rupture errors), and complex failure modes related to advanced circuit architecture. The main focus of the paper is on commercial devices, which are displacing hardened device technologies in many space applications. However, the impact of device scaling on hardened devices is also discussed.
Analysis of physical layer performance of data center with optical wavelength switches based on advanced modulation formats

NASA Astrophysics Data System (ADS)

Ahmad, Iftikhar; Chughtai, Mohsan Niaz

2018-05-01

In this paper the IRIS (Integrated Router Interconnected spectrally), an optical domain architecture for datacenter network is analyzed. The IRIS integrated with advanced modulation formats (M-QAM) and coherent optical receiver is analyzed. The channel impairments are compensated using the DSP algorithms following the coherent receiver. The proposed scheme allows N2 multiplexed wavelengths for N×N size. The performance of the N×N-IRIS switch with and without wavelength conversion is analyzed for different Baud rates over M-QAM modulation formats. The performance of the system is analyzed in terms of bit error rate (BER) vs OSNR curves.
Comprehensive evaluation of global energy interconnection development index

NASA Astrophysics Data System (ADS)

Liu, Lin; Zhang, Yi

2018-04-01

Under the background of building global energy interconnection and realizing green and low-carbon development, this article constructed the global energy interconnection development index system which based on the current situation of global energy interconnection development. Through using the entropy method for the weight analysis of global energy interconnection development index, and then using gray correlation method to analyze the selected countries, this article got the global energy interconnection development index ranking and level classification.
High-speed real-time OFDM transmission based on FPGA

NASA Astrophysics Data System (ADS)

Xiao, Xin; Li, Fan; Yu, Jianjun

2016-02-01

In this paper, we review our recent research progresses on real-time orthogonal frequency division multiplexing (OFDM) transmission based on FPGA. We successfully demonstrated four-channel wavelength-division multiplexing (WDM) 256.51Gb/s 16-ary quadrature amplitude modulation (16QAM)-OFDM signal transmission system for short-reach optical amplifier free inter-connection with real-time reception. Four optical carriers are modulated by four different 16QAM-OFDM signals via 10G-class direct modulation lasers (DMLs). We achieved highest capacity real-time reception optical OFDM signal transmission over 2.4-km SMF with the bit-error ratio (BER) under soft-decision forward error correction (SD-FEC) limitation of 2.4×10-2. In order to achieve higher spectrum efficiency (SE), we demonstrate 4-channel high level QAM-OFDM transmission over 20-km SMF-28 with real-time reception. 58.72-Gb/s 256QAM-OFDM and 56.4-Gb/s 128QAM-OFDM signal transmission within 25-GHz grid is achieved with the BER under 2.4×10-2 and real-time reception.
Modeling, estimation and identification methods for static shape determination of flexible structures. [for large space structure design

NASA Technical Reports Server (NTRS)

Rodriguez, G.; Scheid, R. E., Jr.

1986-01-01

This paper outlines methods for modeling, identification and estimation for static determination of flexible structures. The shape estimation schemes are based on structural models specified by (possibly interconnected) elliptic partial differential equations. The identification techniques provide approximate knowledge of parameters in elliptic systems. The techniques are based on the method of maximum-likelihood that finds parameter values such that the likelihood functional associated with the system model is maximized. The estimation methods are obtained by means of a function-space approach that seeks to obtain the conditional mean of the state given the data and a white noise characterization of model errors. The solutions are obtained in a batch-processing mode in which all the data is processed simultaneously. After methods for computing the optimal estimates are developed, an analysis of the second-order statistics of the estimates and of the related estimation error is conducted. In addition to outlining the above theoretical results, the paper presents typical flexible structure simulations illustrating performance of the shape determination methods.
Monolithic InP strictly non-blocking 8×8 switch for high-speed WDM optical interconnection.

PubMed

Kwack, Myung-Joon; Tanemura, Takuo; Higo, Akio; Nakano, Yoshiaki

2012-12-17

A strictly non-blocking 8 × 8 switch for high-speed WDM optical interconnection is realized on InP by using the phased-array scheme for the first time. The matrix switch architecture consists of over 200 functional devices such as star couplers, phase-shifters and so on without any waveguide cross-section. We demonstrate ultra-broad optical bandwidth covering the entire C-band through several Input/Output ports combination with extinction ratio performance of more than 20dB. Also, nanoseconds reconfiguration time was successfully achieved by dynamic switching experiment. Error-free transmission was verified for 40-Gbps (10-Gbps × 4ch) WDM signal.
A High-Q Resonant Pressure Microsensor with Through-Glass Electrical Interconnections Based on Wafer-Level MEMS Vacuum Packaging

PubMed Central

Luo, Zhenyu; Chen, Deyong; Wang, Junbo; Li, Yinan; Chen, Jian

2014-01-01

This paper presents a high-Q resonant pressure microsensor with through-glass electrical interconnections based on wafer-level MEMS vacuum packaging. An approach to maintaining high-vacuum conditions by integrating the MEMS fabrication process with getter material preparation is presented in this paper. In this device, the pressure under measurement causes a deflection of a pressure-sensitive silicon square diaphragm, which is further translated to stress build up in “H” type doubly-clamped micro resonant beams, leading to a resonance frequency shift. The device geometries were optimized using FEM simulation and a 4-inch SOI wafer was used for device fabrication, which required only three photolithographic steps. In the device fabrication, a non-evaporable metal thin film as the getter material was sputtered on a Pyrex 7740 glass wafer, which was then anodically bonded to the patterned SOI wafer for vacuum packaging. Through-glass via holes predefined in the glass wafer functioned as the electrical interconnections between the patterned SOI wafer and the surrounding electrical components. Experimental results recorded that the Q-factor of the resonant beam was beyond 22,000, with a differential sensitivity of 89.86 Hz/kPa, a device resolution of 10 Pa and a nonlinearity of 0.02% F.S with the pressure varying from 50 kPa to 100 kPa. In addition, the temperature drift coefficient was less than −0.01% F.S/°C in the range of −40 °C to 70 °C, the long-term stability error was quantified as 0.01% F.S over a 5-month period and the accuracy of the microsensor was better than 0.01% F.S. PMID:25521385
A high-Q resonant pressure microsensor with through-glass electrical interconnections based on wafer-level MEMS vacuum packaging.

PubMed

Luo, Zhenyu; Chen, Deyong; Wang, Junbo; Li, Yinan; Chen, Jian

2014-12-16

This paper presents a high-Q resonant pressure microsensor with through-glass electrical interconnections based on wafer-level MEMS vacuum packaging. An approach to maintaining high-vacuum conditions by integrating the MEMS fabrication process with getter material preparation is presented in this paper. In this device, the pressure under measurement causes a deflection of a pressure-sensitive silicon square diaphragm, which is further translated to stress build up in "H" type doubly-clamped micro resonant beams, leading to a resonance frequency shift. The device geometries were optimized using FEM simulation and a 4-inch SOI wafer was used for device fabrication, which required only three photolithographic steps. In the device fabrication, a non-evaporable metal thin film as the getter material was sputtered on a Pyrex 7740 glass wafer, which was then anodically bonded to the patterned SOI wafer for vacuum packaging. Through-glass via holes predefined in the glass wafer functioned as the electrical interconnections between the patterned SOI wafer and the surrounding electrical components. Experimental results recorded that the Q-factor of the resonant beam was beyond 22,000, with a differential sensitivity of 89.86 Hz/kPa, a device resolution of 10 Pa and a nonlinearity of 0.02% F.S with the pressure varying from 50 kPa to 100 kPa. In addition, the temperature drift coefficient was less than -0.01% F.S/°C in the range of -40 °C to 70 °C, the long-term stability error was quantified as 0.01% F.S over a 5-month period and the accuracy of the microsensor was better than 0.01% F.S.
Feedforward Equalizers for MDM-WDM in Multimode Fiber Interconnects

NASA Astrophysics Data System (ADS)

Masunda, Tendai; Amphawan, Angela

2018-04-01

In this paper, we present new tap configurations of a feedforward equalizer to mitigate mode coupling in a 60-Gbps 18-channel mode-wavelength division multiplexing system in a 2.5-km-long multimode fiber. The performance of the equalization is measured through analyses on eye diagrams, power coupling coefficients and bit-error rates.
Single event test methodology for integrated optoelectronics

NASA Technical Reports Server (NTRS)

Label, Kenneth A.; Cooley, James A.; Stassinopoulos, E. G.; Marshall, Paul; Crabtree, Christina

1993-01-01

A single event upset (SEU), defined as a transient or glitch on the output of a device, and its applicability to integrated optoelectronics are discussed in the context of spacecraft design and the need for more than a bit error rate viewpoint for testing and analysis. A methodology for testing integrated optoelectronic receivers and transmitters for SEUs is presented, focusing on the actual test requirements and system schemes needed for integrated optoelectronic devices. Two main causes of single event effects in the space environment, including protons and galactic cosmic rays, are considered along with ground test facilities for simulating the space environment.
47 CFR 52.34 - Obligations regarding local number porting to and from interconnected VoIP or Internet-based TRS...

Code of Federal Regulations, 2012 CFR

2012-10-01

... and from interconnected VoIP or Internet-based TRS providers. 52.34 Section 52.34 Telecommunication... Portability § 52.34 Obligations regarding local number porting to and from interconnected VoIP or Internet... customer's or a Registered Internet-based TRS User's valid number portability request, as it is defined in...
47 CFR 52.34 - Obligations regarding local number porting to and from interconnected VoIP or Internet-based TRS...

Code of Federal Regulations, 2013 CFR

2013-10-01

... and from interconnected VoIP or Internet-based TRS providers. 52.34 Section 52.34 Telecommunication... Portability § 52.34 Obligations regarding local number porting to and from interconnected VoIP or Internet... customer's or a Registered Internet-based TRS User's valid number portability request, as it is defined in...
47 CFR 52.34 - Obligations regarding local number porting to and from interconnected VoIP or Internet-based TRS...

Code of Federal Regulations, 2014 CFR

2014-10-01

... and from interconnected VoIP or Internet-based TRS providers. 52.34 Section 52.34 Telecommunication... Portability § 52.34 Obligations regarding local number porting to and from interconnected VoIP or Internet... customer's or a Registered Internet-based TRS User's valid number portability request, as it is defined in...
Blueprint for a microwave trapped ion quantum computer.

PubMed

Lekitsch, Bjoern; Weidt, Sebastian; Fowler, Austin G; Mølmer, Klaus; Devitt, Simon J; Wunderlich, Christof; Hensinger, Winfried K

2017-02-01

The availability of a universal quantum computer may have a fundamental impact on a vast number of research fields and on society as a whole. An increasingly large scientific and industrial community is working toward the realization of such a device. An arbitrarily large quantum computer may best be constructed using a modular approach. We present a blueprint for a trapped ion-based scalable quantum computer module, making it possible to create a scalable quantum computer architecture based on long-wavelength radiation quantum gates. The modules control all operations as stand-alone units, are constructed using silicon microfabrication techniques, and are within reach of current technology. To perform the required quantum computations, the modules make use of long-wavelength radiation-based quantum gate technology. To scale this microwave quantum computer architecture to a large size, we present a fully scalable design that makes use of ion transport between different modules, thereby allowing arbitrarily many modules to be connected to construct a large-scale device. A high error-threshold surface error correction code can be implemented in the proposed architecture to execute fault-tolerant operations. With appropriate adjustments, the proposed modules are also suitable for alternative trapped ion quantum computer architectures, such as schemes using photonic interconnects.
Interconnection network architectures based on integrated orbital angular momentum emitters

NASA Astrophysics Data System (ADS)

Scaffardi, Mirco; Zhang, Ning; Malik, Muhammad Nouman; Lazzeri, Emma; Klitis, Charalambos; Lavery, Martin; Sorel, Marc; Bogoni, Antonella

2018-02-01

Novel architectures for two-layer interconnection networks based on concentric OAM emitters are presented. A scalability analysis is done in terms of devices characteristics, power budget and optical signal to noise ratio by exploiting experimentally measured parameters. The analysis shows that by exploiting optical amplifications, the proposed interconnection networks can support a number of ports higher than 100. The OAM crosstalk induced-penalty, evaluated through an experimental characterization, do not significantly affect the interconnection network performance.
Power interconnection projects in the ASEAN region: Definitional-mission report No. 1. Export trade information

DOE Office of Scientific and Technical Information (OSTI.GOV)

Not Available

1992-06-01

In response to a request from the Association of Southeast Asian Nations (ASEAN), the U.S. Trade and Development Program (TDP) conducted a definitional mission to evaluate the prospects of TDP funding for five Power Interconnection Projects in the ASEAN region. These projects included: Batam-Singapore Interconnection; Sumatera-Peninsular Malaysia Interconnection; Sarawak-West Kalimantan Interconnection; Sarawak-Brunei-Sabah Interconnection; and Java-Sumatera Interconnection. Based on a review of the proposed scopes of work for the projects and the discussions in the field, the report summarizes the technical details and the costs of implementation for the projects.
Laser as a Tool to Study Radiation Effects in CMOS

NASA Astrophysics Data System (ADS)

Ajdari, Bahar

Energetic particles from cosmic ray or terrestrial sources can strike sensitive areas of CMOS devices and cause soft errors. Understanding the effects of such interactions is crucial as the device technology advances, and chip reliability has become more important than ever. Particle accelerator testing has been the standard method to characterize the sensitivity of chips to single event upsets (SEUs). However, because of their costs and availability limitations, other techniques have been explored. Pulsed laser has been a successful tool for characterization of SEU behavior, but to this day, laser has not been recognized as a comparable method to beam testing. In this thesis, I propose a methodology of correlating laser soft error rate (SER) to particle beam gathered data. Additionally, results are presented showing a temperature dependence of SER and the "neighbor effect" phenomenon where due to the close proximity of devices a "weakening effect" in the ON state can be observed.
On Nibbles and Bytes: The Conundrum of Memory for Space Systems - NASA Electronic Parts and Packaging (NEPP) and Efforts in Memories

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Ladbury, Ray; Pellish, Jonathan; Sheldon, Douglas; Oldham, Timothy; Berg, Melanie D.; Cohn, Lewis M.

2009-01-01

Radiation requirements and trends. TID: 1) >90% of NASA applications are < 100 krads-Si in piecepart requirements. a) Many commercial devices (NVM and SDRAMs) meet or come close to this. b) Charge pump TID tolerance has improved an order magnitude over the last 10 years. 2) There are always a few programs with higher level needs and, of course, defense needs SEL: 1) Prefer none or rates that are considered low risk. a) Latent damage is a bear to deal with. 2) As we re packing cells tighter and even with lower Vdd, we re seeing SEL on commercial devices regularly (<90nm). a) Often in power conversion, I/O, or control areas. SEU: 1) It s not the bit errors, it s the SEFIs errors that are the biggest issues. a) Scrubbing concerns for risk, power, speed.
A Lateral Differential Resonant Pressure Microsensor Based on SOI-Glass Wafer-Level Vacuum Packaging.

PubMed

Xie, Bo; Xing, Yonghao; Wang, Yanshuang; Chen, Jian; Chen, Deyong; Wang, Junbo

2015-09-21

This paper presents the fabrication and characterization of a resonant pressure microsensor based on SOI-glass wafer-level vacuum packaging. The SOI-based pressure microsensor consists of a pressure-sensitive diaphragm at the handle layer and two lateral resonators (electrostatic excitation and capacitive detection) on the device layer as a differential setup. The resonators were vacuum packaged with a glass cap using anodic bonding and the wire interconnection was realized using a mask-free electrochemical etching approach by selectively patterning an Au film on highly topographic surfaces. The fabricated resonant pressure microsensor with dual resonators was characterized in a systematic manner, producing a quality factor higher than 10,000 (~6 months), a sensitivity of about 166 Hz/kPa and a reduced nonlinear error of 0.033% F.S. Based on the differential output, the sensitivity was increased to two times and the temperature-caused frequency drift was decreased to 25%.
A Lateral Differential Resonant Pressure Microsensor Based on SOI-Glass Wafer-Level Vacuum Packaging

PubMed Central

Xie, Bo; Xing, Yonghao; Wang, Yanshuang; Chen, Jian; Chen, Deyong; Wang, Junbo

2015-01-01

This paper presents the fabrication and characterization of a resonant pressure microsensor based on SOI-glass wafer-level vacuum packaging. The SOI-based pressure microsensor consists of a pressure-sensitive diaphragm at the handle layer and two lateral resonators (electrostatic excitation and capacitive detection) on the device layer as a differential setup. The resonators were vacuum packaged with a glass cap using anodic bonding and the wire interconnection was realized using a mask-free electrochemical etching approach by selectively patterning an Au film on highly topographic surfaces. The fabricated resonant pressure microsensor with dual resonators was characterized in a systematic manner, producing a quality factor higher than 10,000 (~6 months), a sensitivity of about 166 Hz/kPa and a reduced nonlinear error of 0.033% F.S. Based on the differential output, the sensitivity was increased to two times and the temperature-caused frequency drift was decreased to 25%. PMID:26402679

Grade 11 Students' Interconnected Use of Conceptual Knowledge, Procedural Skills, and Strategic Competence in Algebra: A Mixed Method Study of Error Analysis

ERIC Educational Resources Information Center

Egodawatte, Gunawardena; Stoilescu, Dorian

2015-01-01

The purpose of this mixed-method study was to investigate grade 11 university/college stream mathematics students' difficulties in applying conceptual knowledge, procedural skills, strategic competence, and algebraic thinking in solving routine (instructional) algebraic problems. A standardized algebra test was administered to thirty randomly…
Reconfigurable optical interconnections via dynamic computer-generated holograms

NASA Technical Reports Server (NTRS)

Liu, Hua-Kuang (Inventor); Zhou, Shaomin (Inventor)

1994-01-01

A system is proposed for optically providing one-to-many irregular interconnections, and strength-adjustable many-to-many irregular interconnections which may be provided with strengths (weights) w(sub ij) using multiple laser beams which address multiple holograms and means for combining the beams modified by the holograms to form multiple interconnections, such as a cross-bar switching network. The optical means for interconnection is based on entering a series of complex computer-generated holograms on an electrically addressed spatial light modulator for real-time reconfigurations, thus providing flexibility for interconnection networks for largescale practical use. By employing multiple sources and holograms, the number of interconnection patterns achieved is increased greatly.
Single-Event Upset (SEU) model verification and threshold determination using heavy ions in a bipolar static RAM

NASA Technical Reports Server (NTRS)

Zoutendyk, J. A.; Smith, L. S.; Soli, G. A.; Thieberger, P.; Wegner, H. E.

1985-01-01

Single-Event Upset (SEU) response of a bipolar low-power Schottky-diode-clamped TTL static RAM has been observed using Br ions in the 100-240 MeV energy range and O ions in the 20-100 MeV range. These data complete the experimental verification of circuit-simulation SEU modeling for this device. The threshold for onset of SEU has been observed by the variation of energy, ion species and angle of incidence. The results obtained from the computer circuit-simulation modeling and experimental model verification demonstrate a viable methodology for modeling SEU in bipolar integrated circuits.
Closed Loop Fuzzy Logic Controlled PV Based Cascaded Boost Five-Level Inverter System

NASA Astrophysics Data System (ADS)

Revana, Guruswamy; Kota, Venkata Reddy

2018-04-01

Recent developments in intelligent control methods and power electronics have produced PV based DC to AC converters related to AC drives. Cascaded boost converter and inverter find their way in interconnecting PV and Induction Motor. This paper deals with digital simulation and implementation of closed loop controlled five-level inverter based Photo-Voltaic (PV) system. The objective of this work is to reduce the harmonics using Multi Level Inverter based system. The DC output from the PV panel is boosted using cascaded-boost-converters. The DC output of these cascaded boost converters is applied to the bridges of the cascaded inverter. The AC output voltage is obtained by the series cascading of the output voltage of the two inverters. The investigations are done with Induction motor load. Cascaded boost-converter is proposed in the present work to produce the required DC Voltage at the input of the bridge inverter. A simple FLC is applied to CBFLIIM system. The FLC is proposed to reduce the steady state error. The simulation results are compared with the hardware results. The results of the comparison are made to show the improvement in dynamic response in terms of settling time and steady state error. Design procedure and control strategy are presented in detail.
Closed Loop Fuzzy Logic Controlled PV Based Cascaded Boost Five-Level Inverter System

NASA Astrophysics Data System (ADS)

Revana, Guruswamy; Kota, Venkata Reddy

2017-12-01

Recent developments in intelligent control methods and power electronics have produced PV based DC to AC converters related to AC drives. Cascaded boost converter and inverter find their way in interconnecting PV and Induction Motor. This paper deals with digital simulation and implementation of closed loop controlled five-level inverter based Photo-Voltaic (PV) system. The objective of this work is to reduce the harmonics using Multi Level Inverter based system. The DC output from the PV panel is boosted using cascaded-boost-converters. The DC output of these cascaded boost converters is applied to the bridges of the cascaded inverter. The AC output voltage is obtained by the series cascading of the output voltage of the two inverters. The investigations are done with Induction motor load. Cascaded boost-converter is proposed in the present work to produce the required DC Voltage at the input of the bridge inverter. A simple FLC is applied to CBFLIIM system. The FLC is proposed to reduce the steady state error. The simulation results are compared with the hardware results. The results of the comparison are made to show the improvement in dynamic response in terms of settling time and steady state error. Design procedure and control strategy are presented in detail.
Decentralized state estimation for a large-scale spatially interconnected system.

PubMed

Liu, Huabo; Yu, Haisheng

2018-03-01

A decentralized state estimator is derived for the spatially interconnected systems composed of many subsystems with arbitrary connection relations. An optimization problem on the basis of linear matrix inequality (LMI) is constructed for the computations of improved subsystem parameter matrices. Several computationally effective approaches are derived which efficiently utilize the block-diagonal characteristic of system parameter matrices and the sparseness of subsystem connection matrix. Moreover, this decentralized state estimator is proved to converge to a stable system and obtain a bounded covariance matrix of estimation errors under certain conditions. Numerical simulations show that the obtained decentralized state estimator is attractive in the synthesis of a large-scale networked system. Copyright © 2018 ISA. Published by Elsevier Ltd. All rights reserved.
Analyzing System on A Chip Single Event Upset Responses using Single Event Upset Data, Classical Reliability Models, and Space Environment Data

NASA Technical Reports Server (NTRS)

Berg, Melanie; LaBel, Kenneth; Campola, Michael; Xapsos, Michael

2017-01-01

We are investigating the application of classical reliability performance metrics combined with standard single event upset (SEU) analysis data. We expect to relate SEU behavior to system performance requirements. Our proposed methodology will provide better prediction of SEU responses in harsh radiation environments with confidence metrics. single event upset (SEU), single event effect (SEE), field programmable gate array devises (FPGAs)
Pore Interconnectivity Influences Growth Factor-Mediated Vascularization in Sphere-Templated Hydrogels

PubMed Central

Somo, Sami I.; Akar, Banu; Bayrak, Elif S.; Larson, Jeffery C.; Appel, Alyssa A.; Mehdizadeh, Hamidreza; Cinar, Ali

2015-01-01

Rapid and controlled vascularization within biomaterials is essential for many applications in regenerative medicine. The extent of vascularization is influenced by a number of factors, including scaffold architecture. While properties such as pore size and total porosity have been studied extensively, the importance of controlling the interconnectivity of pores has received less attention. A sintering method was used to generate hydrogel scaffolds with controlled pore interconnectivity. Poly(methyl methacrylate) microspheres were used as a sacrificial agent to generate porous poly(ethylene glycol) diacrylate hydrogels with interconnectivity varying based on microsphere sintering conditions. Interconnectivity levels increased with sintering time and temperature with resultant hydrogel structure showing agreement with template structure. Porous hydrogels with a narrow pore size distribution (130–150 μm) and varying interconnectivity were investigated for their ability to influence vascularization in response to gradients of platelet-derived growth factor-BB (PDGF-BB). A rodent subcutaneous model was used to evaluate vascularized tissue formation in the hydrogels in vivo. Vascularized tissue invasion varied with interconnectivity. At week 3, higher interconnectivity hydrogels had completely vascularized with twice as much invasion. Interconnectivity also influenced PDGF-BB transport within the scaffolds. An agent-based model was used to explore the relative roles of steric and transport effects on the observed results. In conclusion, a technique for the preparation of hydrogels with controlled pore interconnectivity has been developed and evaluated. This method has been used to show that pore interconnectivity can independently influence vascularization of biomaterials. PMID:25603533
Event-Triggered Distributed Control of Nonlinear Interconnected Systems Using Online Reinforcement Learning With Exploration.

PubMed

Narayanan, Vignesh; Jagannathan, Sarangapani

2017-09-07

In this paper, a distributed control scheme for an interconnected system composed of uncertain input affine nonlinear subsystems with event triggered state feedback is presented by using a novel hybrid learning scheme-based approximate dynamic programming with online exploration. First, an approximate solution to the Hamilton-Jacobi-Bellman equation is generated with event sampled neural network (NN) approximation and subsequently, a near optimal control policy for each subsystem is derived. Artificial NNs are utilized as function approximators to develop a suite of identifiers and learn the dynamics of each subsystem. The NN weight tuning rules for the identifier and event-triggering condition are derived using Lyapunov stability theory. Taking into account, the effects of NN approximation of system dynamics and boot-strapping, a novel NN weight update is presented to approximate the optimal value function. Finally, a novel strategy to incorporate exploration in online control framework, using identifiers, is introduced to reduce the overall cost at the expense of additional computations during the initial online learning phase. System states and the NN weight estimation errors are regulated and local uniformly ultimately bounded results are achieved. The analytical results are substantiated using simulation studies.
A surface code quantum computer in silicon

PubMed Central

Hill, Charles D.; Peretz, Eldad; Hile, Samuel J.; House, Matthew G.; Fuechsle, Martin; Rogge, Sven; Simmons, Michelle Y.; Hollenberg, Lloyd C. L.

2015-01-01

The exceptionally long quantum coherence times of phosphorus donor nuclear spin qubits in silicon, coupled with the proven scalability of silicon-based nano-electronics, make them attractive candidates for large-scale quantum computing. However, the high threshold of topological quantum error correction can only be captured in a two-dimensional array of qubits operating synchronously and in parallel—posing formidable fabrication and control challenges. We present an architecture that addresses these problems through a novel shared-control paradigm that is particularly suited to the natural uniformity of the phosphorus donor nuclear spin qubit states and electronic confinement. The architecture comprises a two-dimensional lattice of donor qubits sandwiched between two vertically separated control layers forming a mutually perpendicular crisscross gate array. Shared-control lines facilitate loading/unloading of single electrons to specific donors, thereby activating multiple qubits in parallel across the array on which the required operations for surface code quantum error correction are carried out by global spin control. The complexities of independent qubit control, wave function engineering, and ad hoc quantum interconnects are explicitly avoided. With many of the basic elements of fabrication and control based on demonstrated techniques and with simulated quantum operation below the surface code error threshold, the architecture represents a new pathway for large-scale quantum information processing in silicon and potentially in other qubit systems where uniformity can be exploited. PMID:26601310
A surface code quantum computer in silicon.

PubMed

Hill, Charles D; Peretz, Eldad; Hile, Samuel J; House, Matthew G; Fuechsle, Martin; Rogge, Sven; Simmons, Michelle Y; Hollenberg, Lloyd C L

2015-10-01

The exceptionally long quantum coherence times of phosphorus donor nuclear spin qubits in silicon, coupled with the proven scalability of silicon-based nano-electronics, make them attractive candidates for large-scale quantum computing. However, the high threshold of topological quantum error correction can only be captured in a two-dimensional array of qubits operating synchronously and in parallel-posing formidable fabrication and control challenges. We present an architecture that addresses these problems through a novel shared-control paradigm that is particularly suited to the natural uniformity of the phosphorus donor nuclear spin qubit states and electronic confinement. The architecture comprises a two-dimensional lattice of donor qubits sandwiched between two vertically separated control layers forming a mutually perpendicular crisscross gate array. Shared-control lines facilitate loading/unloading of single electrons to specific donors, thereby activating multiple qubits in parallel across the array on which the required operations for surface code quantum error correction are carried out by global spin control. The complexities of independent qubit control, wave function engineering, and ad hoc quantum interconnects are explicitly avoided. With many of the basic elements of fabrication and control based on demonstrated techniques and with simulated quantum operation below the surface code error threshold, the architecture represents a new pathway for large-scale quantum information processing in silicon and potentially in other qubit systems where uniformity can be exploited.
A comparative investigation of Lu2SiO5:Ce and Gd2O2S:Eu powder scintillators for use in x-ray mammography detectors

NASA Astrophysics Data System (ADS)

Michail, C. M.; Fountos, G. P.; David, S. L.; Valais, I. G.; Toutountzis, A. E.; Kalyvas, N. E.; Kandarakis, I. S.; Panayiotakis, G. S.

2009-10-01

The dominant powder scintillator in most medical imaging modalities for decades has been Gd2O2S:Tb due to the very good intrinsic properties and overall efficiency. Apart from Gd2O2S:Tb, there are alternative powder phosphor scintillators such as Lu2SiO5:Ce and Gd2O2S:Eu that have been suggested for use in various medical imaging modalities. Gd2O2S:Eu emits red light and can be combined mainly with digital mammography detectors such as CCDs. Lu2SiO5:Ce emits blue light and can be combined with blue sensitivity films, photocathodes and some photodiodes. For the purposes of the present study, two scintillating screens, one from Lu2SiO5:Ce and the other from Gd2O2S:Eu powders, were prepared using the method of sedimentation. The screen coating thicknesses were 25.0 and 33.1 mg cm-2 respectively. The screens were investigated by evaluating the following parameters: the output signal, the modulation transfer function, the noise equivalent passband, the informational efficiency, the quantum detection efficiency and the zero-frequency detective quantum efficiency. Furthermore, the spectral compatibility of those materials with various optical detectors was determined. Results were compared to published data for the commercially employed 'Kodak Min-R film-screen system', based on a 31.7 mg cm-2 thick Gd2O2S:Tb phosphor. For Gd2O2S:Eu, MTF data were found comparable to those of Gd2O2S:Tb, while the MTF of Lu2SiO5:Ce was even higher resulting in better spatial resolution and image sharpness properties. On the other hand, Gd2O2S:Eu was found to exhibit higher output signal and zero-frequency detective quantum efficiency than Lu2SiO5:Ce.
Synthesis and Characterization of Three Dimensional Nanostructures Based on Interconnected Carbon Nanomaterials

NASA Astrophysics Data System (ADS)

Koizumi, Ryota

This thesis addresses various types of synthetic methods for novel three dimensional nanomaterials and nanostructures based on interconnected carbon nanomaterials using solution chemistry and chemical vapor deposition (CVD) methods. Carbon nanotube (CNT) spheres with porous and scaffold structures consisting of interconnected CNTs were synthesized by solution chemistry followed by freeze-drying, which have high elasticity under nano-indentation tests. This allows the CNT spheres to be potentially applied to mechanical dampers. CNTs were also grown on two dimensional materials--such as reduced graphene oxide (rGO) and hexagonal boron nitride (h-BN)--by CVD methods, which are chemically interconnected. CNTs on rGO and h-BN interconnected structures performed well as electrodes for supercapacitors. Furthermore, unique interconnected flake structures of alpha-phase molybdenum carbide were developed by a CVD method. The molybdenum carbide can be used for a catalyst of hydrogen evolution reaction activity as well as an electrode for supercapacitors.
Reconfigurable Optical Interconnections Via Dynamic Computer-Generated Holograms

NASA Technical Reports Server (NTRS)

Liu, Hua-Kuang (Inventor); Zhou, Shao-Min (Inventor)

1996-01-01

A system is presented for optically providing one-to-many irregular interconnections, and strength-adjustable many-to-many irregular interconnections which may be provided with strengths (weights) w(sub ij) using multiple laser beams which address multiple holograms and means for combining the beams modified by the holograms to form multiple interconnections, such as a cross-bar switching network. The optical means for interconnection is based on entering a series of complex computer-generated holograms on an electrically addressed spatial light modulator for real-time reconfigurations, thus providing flexibility for interconnection networks for large-scale practical use. By employing multiple sources and holograms, the number of interconnection patterns achieved is increased greatly.
SEE induced in SRAM operating in a superconducting electron linear accelerator environment

NASA Astrophysics Data System (ADS)

Makowski, D.; Mukherjee, Bhaskar; Grecki, M.; Simrock, Stefan

2005-02-01

Strong fields of bremsstrahlung photons and photoneutrons are produced during the operation of high-energy electron linacs. Therefore, a mixed gamma and neutron radiation field dominates the accelerators environment. The gamma radiation induced Total Ionizing Dose (TID) effect manifests the long-term deterioration of the electronic devices operating in accelerator environment. On the other hand, the neutron radiation is responsible for Single Event Effects (SEE) and may cause a temporal loss of functionality of electronic systems. This phenomenon is known as Single Event Upset (SEU). The neutron dose (KERMA) was used to scale the neutron induced SEU in the SRAM chips. Hence, in order to estimate the neutron KERMA conversion factor for Silicon (Si), dedicated calibration experiments using an Americium-Beryllium (241Am/Be) neutron standard source was carried out. Single Event Upset (SEU) influences the short-term operation of SRAM compared to the gamma induced TID effect. We are at present investigating the feasibility of an SRAM based real-time beam-loss monitor for high-energy accelerators utilizing the SEU caused by fast neutrons. This paper highlights the effects of gamma and neutron radiations on Static Random Access Memory (SRAM), placed at selected locations near the Superconducting Linear Accelerator driving the Vacuum UV Free Electron Laser (VUVFEL) of DESY.
NASA Education Forum at SAO on the Structure and Evolution of the Universe

NASA Technical Reports Server (NTRS)

Rosendhal, Jeffrey (Technical Monitor); Gould, Roy R.

2003-01-01

NASA's Structure and Evolution of the Universe (SEU) science theme offers an unparalleled opportunity to capture the public's imagination and inspire the next generation of scientific explorers-the generation that will determine America's lead in science and technology in the 21st century. The missions and research programs of SEU science are transporting the public to some of the universe's most exotic destinations: the beginning of time, the edge of space at the entrance to a black hole, and the great cycles of matter and energy that have slowly brought life to the universe. NASA's Office of Space Science (OSS) has put in place an Education and Public Outreach (EPO) initiative designed to do just that. Spanning all of NASA's OSS science themes, the initiative is a far-reaching partnership with the education community. As a result, NASA space science now reaches every avenue of education-from the nation's schools, science museums and planetariums, to libraries, community groups and after-school programs. As a partner in this enterprise, the,SEU Forum has successfully brought SEU science to a large and diverse audience. But this is an ongoing process, and much still needs to be done. Working with our colleagues in the OSS Support Network, and with our partners in the space science and education communities, we look forward to ensuring that the public supports and participates in the great explorations of the SEU theme. Working with the SEU missions and members of the OSS Support Network, the Forum will harness the assets of the SEU science community to: Inform, inspire, and involve the public in the explorations of the SEU science theme. Use the unique resources of the SEU science theme to enhance K-14 science, technology, and mathematics education. Identify and develop high-leverage opportunities for the SEU science community to contribute to education and outreach.
Application Of Ti-Based Self-Formation Barrier Layers To Cu Dual-Damascene Interconnects

NASA Astrophysics Data System (ADS)

Ito, Kazuhiro; Ohmori, Kazuyuki; Kohama, Kazuyuki; Mori, Kenichi; Maekawa, Kazuyoshi; Asai, Koyu; Murakami, Masanori

2010-11-01

Cu interconnects have been used extensively in ULSI devices. However, large resistance-capacitance delay and poor device reliability have been critical issues as the device feature size has reduced to nanometer scale. In order to achieve low resistance and high reliability of Cu interconnects, we have applied a thin Ti-based self-formed barrier (SFB) using Cu(Ti) alloy seed to 45nm-node dual damascene interconnects and evaluated its performance. The line resistance and via resistance decreased significantly, compared with those of conventional Ta/TaN barriers. The stress migration performance was also drastically improved using the SFB process. A performance of time dependent dielectric breakdown revealed superior endurance. These results suggest that the Ti-based SFB process is one of the most promising candidates for advanced Cu interconnects. TEM and X-ray photoelectron spectroscopy observations for characterization of the Ti-based SFB structure were also performed. The Ti-based SFB consisted of mainly amorphous Ti oxides. Amorphous or crystalline Ti compounds such as TiC, TiN, and TiSi formed beneath Cu alloy films, and the formation varied with dielectric.
OR.NET: a service-oriented architecture for safe and dynamic medical device interoperability.

PubMed

Kasparick, Martin; Schmitz, Malte; Andersen, Björn; Rockstroh, Max; Franke, Stefan; Schlichting, Stefan; Golatowski, Frank; Timmermann, Dirk

2018-02-23

Modern surgical departments are characterized by a high degree of automation supporting complex procedures. It recently became apparent that integrated operating rooms can improve the quality of care, simplify clinical workflows, and mitigate equipment-related incidents and human errors. Particularly using computer assistance based on data from integrated surgical devices is a promising opportunity. However, the lack of manufacturer-independent interoperability often prevents the deployment of collaborative assistive systems. The German flagship project OR.NET has therefore developed, implemented, validated, and standardized concepts for open medical device interoperability. This paper describes the universal OR.NET interoperability concept enabling a safe and dynamic manufacturer-independent interconnection of point-of-care (PoC) medical devices in the operating room and the whole clinic. It is based on a protocol specifically addressing the requirements of device-to-device communication, yet also provides solutions for connecting the clinical information technology (IT) infrastructure. We present the concept of a service-oriented medical device architecture (SOMDA) as well as an introduction to the technical specification implementing the SOMDA paradigm, currently being standardized within the IEEE 11073 service-oriented device connectivity (SDC) series. In addition, the Session concept is introduced as a key enabler for safe device interconnection in highly dynamic ensembles of networked medical devices; and finally, some security aspects of a SOMDA are discussed.
Shunt regulation electric power system

NASA Technical Reports Server (NTRS)

Wright, W. H.; Bless, J. J. (Inventor)

1971-01-01

A regulated electric power system having load and return bus lines is described. A plurality of solar cells interconnected in a power supplying relationship and having a power shunt tap point electrically spaced from the bus lines is provided. A power dissipator is connected to the shunt tap point and provides for a controllable dissipation of excess energy supplied by the solar cells. A dissipation driver is coupled to the power dissipator and controls its conductance and dissipation and is also connected to the solar cells in a power taping relationship to derive operating power therefrom. An error signal generator is coupled to the load bus and to a reference signal generator to provide an error output signal which is representative of the difference between the electric parameters existing at the load bus and the reference signal generator. An error amplifier is coupled to the error signal generator and the dissipation driver to provide the driver with controlling signals.
Recent Results on SEU Hardening of SiGe HBT Logic Circuits

NASA Technical Reports Server (NTRS)

Krithivasan, Ramkumar; Marshall, Paul W.; Nayeem, Mustayeen; Sutton, Akil K.; Kuo, Wei-Min Lance; Haugerud, Becca M.; Najafizadeh, Laieh; Cressler, John D.; Carts, martin A.; Marshall, Cheryl J.

2006-01-01

A viewgraph presentation on SEU tolerant SiGe HBT technology is shown. The topics include: 1) Introduction; 2) TID and SEU in SiGe Technology; 3) RHBD Techniques; 4) Experiment; 5) Heavy-Ion Data and Analysis; and 6) Summary.

Empirical modeling of Single-Event Upset (SEU) in NMOS depletion-mode-load static RAM (SRAM) chips

NASA Technical Reports Server (NTRS)

Zoutendyk, J. A.; Smith, L. S.; Soli, G. A.; Smith, S. L.; Atwood, G. E.

1986-01-01

A detailed experimental investigation of single-event upset (SEU) in static RAM (SRAM) chips fabricated using a family of high-performance NMOS (HMOS) depletion-mode-load process technologies, has been done. Empirical SEU models have been developed with the aid of heavy-ion data obtained with a three-stage tandem van de Graaff accelerator. The results of this work demonstrate a method by which SEU may be empirically modeled in NMOS integrated circuits.
Local network interconnection through a satellite point-to-multipoint link. Ph.D. Thesis - Ecole Nationale Superieure des Telecommunications, 6 Jul. 1985

NASA Technical Reports Server (NTRS)

Duarte, O. Muniz Bandeira

1986-01-01

Four architectures to implement a point to multipoint satellite link protocol for communication services offered by the Telecom 1 satellite network are presented. A safe communication service with error correction and flow control facilities is described. It is shown that a time transparent communication system combines simplicity and cost advantages.
Wideband characterization of printed circuit board materials up to 50 ghz

NASA Astrophysics Data System (ADS)

Rakov, Aleksei

A traveling-wave technique developed a few years ago in the Missouri S&T EMC Laboratory has been employed until now for characterization of PCB materials over a broad frequency range up to 30 GHz. This technique includes measuring S-parameters of the specially designed PCB test vehicles. An extension of the frequency range of printed circuit board laminate dielectric and copper foil characterization is an important problem. In this work, a new PCB test vehicle design for operating up to 50 GHz has been proposed. As the frequency range of measurements increases, the analysis of errors and uncertainties in measuring dielectric properties becomes increasingly important. Formulas for quantification of two major groups of errors, repeatability (manufacturing variability) and reproducibility (systematic) errors, in extracting dielectric constant (DK) and dissipation factor (DK) have been derived, and computations for a number of cases are presented. Conductor (copper foil) surface roughness of PCB interconnects is an important factor, which affects accuracy of DK and DF measurements. This work describes a new algorithm for semi-automatic characterization of copper foil profiles on optical or scanning electron microscopy (SEM) pictures of signal traces. The collected statistics of numerous copper foil roughness profiles allows for introducing a new metric for roughness characterization of PCB interconnects. This is an important step to refining the measured DK and DF parameters from roughness contributions. The collected foil profile data and its analysis allow for developing "design curves", which could be used by SI engineers and electronics developers in their designs.
Periodic Application of Concurrent Error Detection in Processor Array Architectures. PhD. Thesis -

NASA Technical Reports Server (NTRS)

Chen, Paul Peichuan

1993-01-01

Processor arrays can provide an attractive architecture for some applications. Featuring modularity, regular interconnection and high parallelism, such arrays are well-suited for VLSI/WSI implementations, and applications with high computational requirements, such as real-time signal processing. Preserving the integrity of results can be of paramount importance for certain applications. In these cases, fault tolerance should be used to ensure reliable delivery of a system's service. One aspect of fault tolerance is the detection of errors caused by faults. Concurrent error detection (CED) techniques offer the advantage that transient and intermittent faults may be detected with greater probability than with off-line diagnostic tests. Applying time-redundant CED techniques can reduce hardware redundancy costs. However, most time-redundant CED techniques degrade a system's performance.
Characterization of System Level Single Event Upset (SEU) Responses using SEU Data, Classical Reliability Models, and Space Environment Data

NASA Technical Reports Server (NTRS)

Berg, Melanie; Label, Kenneth; Campola, Michael; Xapsos, Michael

2017-01-01

We propose a method for the application of single event upset (SEU) data towards the analysis of complex systems using transformed reliability models (from the time domain to the particle fluence domain) and space environment data.
Analyzing Test-As-You-Fly Single Event Upset (SEU) Responses using SEU Data, Classical Reliability Models, and Space Environment Data

NASA Technical Reports Server (NTRS)

Berg, Melanie; Label, Kenneth; Campola, Michael; Xapsos, Michael

2017-01-01

We propose a method for the application of single event upset (SEU) data towards the analysis of complex systems using transformed reliability models (from the time domain to the particle fluence domain) and space environment data.
Subjective Expected Utility: A Model of Decision-Making.

ERIC Educational Resources Information Center

Fischoff, Baruch; And Others

1981-01-01

Outlines a model of decision making known to researchers in the field of behavioral decision theory (BDT) as subjective expected utility (SEU). The descriptive and predictive validity of the SEU model, probability and values assessment using SEU, and decision contexts are examined, and a 54-item reference list is provided. (JL)
Characterization of System on a Chip (SoC) Single Event Upset (SEU) Responses Using SEU Data, Classical Reliability Models, and Space Environment Data

NASA Technical Reports Server (NTRS)

Berg, Melanie; Label, Kenneth; Campola, Michael; Xapsos, Michael

2017-01-01

We propose a method for the application of single event upset (SEU) data towards the analysis of complex systems using transformed reliability models (from the time domain to the particle fluence domain) and space environment data.
Printed interconnects for photovoltaic modules

DOE PAGES

Fields, J. D.; Pach, G.; Horowitz, K. A. W.; ...

2016-10-21

Film-based photovoltaic modules employ monolithic interconnects to minimize resistance loss and enhance module voltage via series connection. Conventional interconnect construction occurs sequentially, with a scribing step following deposition of the bottom electrode, a second scribe after deposition of absorber and intermediate layers, and a third following deposition of the top electrode. This method produces interconnect widths of about 300 µm, and the area comprised by interconnects within a module (generally about 3%) does not contribute to power generation. The present work reports on an increasingly popular strategy capable of reducing the interconnect width to less than 100 µm: printing interconnects.more » Cost modeling projects a savings of about $0.02/watt for CdTe module production through the use of printed interconnects, with savings coming from both reduced capital expense and increased module power output. Printed interconnect demonstrations with copper-indium-gallium-diselenide and cadmium-telluride solar cells show successful voltage addition and miniaturization down to 250 µm. As a result, material selection guidelines and considerations for commercialization are discussed.« less
Experimental demonstration of free-space based 120 Gb/s reconfigurable card-to-card optical interconnects.

PubMed

Wang, Ke; Nirmalathas, Ampalavanapillai; Lim, Christina; Skafidas, Efstratios; Alameh, Kamal

2014-10-01

In this Letter, we propose and experimentally demonstrate a free-space based reconfigurable card-to-card optical interconnect architecture with 16-carrierless-amplitude-phase modulation. Experimental results show that up to 120 Gb/s (3×40 Gb/s) flexible interconnection can be achieved for up to 30 cm distance with a worst-case receiver sensitivity of -9.70 dBm.
The Self in Decision Making and Decision Implementation.

ERIC Educational Resources Information Center

Beach, Lee Roy; Mitchell, Terence R.

Since the early 1950's the principal prescriptive model in the psychological study of decision making has been maximization of Subjective Expected Utility (SEU). This SEU maximization has come to be regarded as a description of how people go about making decisions. However, while observed decision processes sometimes resemble the SEU model,…
Simulation of SRAM SEU Sensitivity at Reduced Operating Temperatures

NASA Technical Reports Server (NTRS)

Sanathanamurthy, S.; Ramachandran, V.; Alles, M. L.; Reed, R. A.; Massengill, L. W.; Raman, A.; Turowski, M.; Mantooth, A.; Woods, B.; Barlow, M.;

2009-01-01

A new NanoTCAD-to-Spectre interface is applied to perform mixed-mode SEU simulations of an SRAM cell. Results using newly calibrated TCAD cold temperature substrate mobility models, and BSIM3 compact models extracted explicitly for the cold temperature designs, indicate a 33% reduction in SEU threshold for the range of temperatures simulated.

Single Event Effect Testing of the Analog Devices ADV212

NASA Technical Reports Server (NTRS)

Wilcox, Ted; Campola, Michael; Kadari, Madhu; Nadendla, Seshagiri R.

2017-01-01

The Analog Devices ADV212 was initially tested for single event effects (SEE) at the Texas AM University Cyclotron Facility (TAMU) in July of 2013. Testing revealed a sensitivity to device hang-ups classified as single event functional interrupts (SEFI), soft data errors classified as single event upsets (SEU), and, of particular concern, single event latch-ups (SEL). All error types occurred so frequently as to make accurate measurements of the exposure time, and thus total particle fluence, challenging. To mitigate some of the risk posed by single event latch-ups, circuitry was added to the electrical design to detect a high current event and automatically recycle power and reboot the device. An additional heavy-ion test was scheduled to validate the operation of the recovery circuitry and the continuing functionality of the ADV212 after a substantial number of latch-up events. As a secondary goal, more precise data would be gathered by an improved test method, described in this test report.
Methods and circuitry for reconfigurable SEU/SET tolerance

NASA Technical Reports Server (NTRS)

Shuler, Jr., Robert L. (Inventor)

2010-01-01

A device is disclosed in one embodiment that has multiple identical sets of programmable functional elements, programmable routing resources, and majority voters that correct errors. The voters accept a mode input for a redundancy mode and a split mode. In the redundancy mode, the programmable functional elements are identical and are programmed identically so the voters produce an output corresponding to the majority of inputs that agree. In a split mode, each voter selects a particular programmable functional element output as the output of the voter. Therefore, in the split mode, the programmable functional elements can perform different functions, operate independently, and/or be connected together to process different parts of the same problem.
All-zigzag graphene nanoribbons for planar interconnect application

NASA Astrophysics Data System (ADS)

Chen, Po-An; Chiang, Meng-Hsueh; Hsu, Wei-Chou

2017-07-01

A feasible "lightning-shaped" zigzag graphene nanoribbon (ZGNR) structure for planar interconnects is proposed. Based on the density functional theory and non-equilibrium Green's function, the electron transport properties are evaluated. The lightning-shaped structure increases significantly the conductance of the graphene interconnect with an odd number of zigzag chains. This proposed technique can effectively utilize the linear I-V characteristic of asymmetric ZGNRs for interconnect application. Variability study accounting for width/length variation and the edge effect is also included. The transmission spectra, transmission eigenstates, and transmission pathways are analyzed to gain the physical insights. This lightning-shaped ZGNR enables all 2D material-based devices and circuits on flexible and transparent substrates.
Reliability of Memories Protected by Multibit Error Correction Codes Against MBUs

NASA Astrophysics Data System (ADS)

Ming, Zhu; Yi, Xiao Li; Chang, Liu; Wei, Zhang Jian

2011-02-01

As technology scales, more and more memory cells can be placed in a die. Therefore, the probability that a single event induces multiple bit upsets (MBUs) in adjacent memory cells gets greater. Generally, multibit error correction codes (MECCs) are effective approaches to mitigate MBUs in memories. In order to evaluate the robustness of protected memories, reliability models have been widely studied nowadays. Instead of irradiation experiments, the models can be used to quickly evaluate the reliability of memories in the early design. To build an accurate model, some situations should be considered. Firstly, when MBUs are presented in memories, the errors induced by several events may overlap each other, which is more frequent than single event upset (SEU) case. Furthermore, radiation experiments show that the probability of MBUs strongly depends on angles of the radiation event. However, reliability models which consider the overlap of multiple bit errors and angles of radiation event have not been proposed in the present literature. In this paper, a more accurate model of memories with MECCs is presented. Both the overlap of multiple bit errors and angles of event are considered in the model, which produces a more precise analysis in the calculation of mean time to failure (MTTF) for memory systems under MBUs. In addition, memories with scrubbing and nonscrubbing are analyzed in the proposed model. Finally, we evaluate the reliability of memories under MBUs in Matlab. The simulation results verify the validity of the proposed model.
VCSEL-based optical transceiver module for high-speed short-reach interconnect

NASA Astrophysics Data System (ADS)

Yagisawa, Takatoshi; Oku, Hideki; Mori, Tatsuhiro; Tsudome, Rie; Tanaka, Kazuhiro; Daikuhara, Osamu; Komiyama, Takeshi; Ide, Satoshi

2017-02-01

Interconnects have been more important in high-performance computing systems and high-end servers beside its improvements in computing capability. Recently, active optical cables (AOCs) have started being used for this purpose instead of conventionally used copper cables. The AOC enables to extend the transmission distance of the high-speed signals dramatically by its broadband characteristics, however, it tend to increase the cost. In this paper, we report our developed quad small form-factor pluggable (QSFP) AOC utilizing cost-effective optical-module technologies. These are a unique structure using generally used flexible printed circuit (FPC) in combination with an optical waveguide that enables low-cost high-precision assembly with passive alignment, a lens-integrated ferrule that improves productivity by eliminating a polishing process for physical contact of standard PMT connector for the optical waveguide, and an overdrive technology that enables 100 Gb/s (25 Gb/s × 4-channel) operation with low-cost 14 Gb/s vertical-cavity surfaceemitting laser (VCSEL) array. The QSFP AOC demonstrated clear eye opening and error-free operation at 100 Gb/s with high yield rate even though the 14 Gb/s VCSEL was used thanks to the low-coupling loss resulting from the highprecision alignment of optical devices and the over-drive technology.
Sense and nonsense of logic-level optical interconnect: reflections on an experiment

NASA Astrophysics Data System (ADS)

Van Campenhout, Jan M.; Brunfaut, Marnik; Meeus, Wim; Dambre, Joni; De Wilde, Michiel

2001-12-01

Centimeter-range high-density optical interconnect between chips is coming into reach with current optical interconnect technology. Many theoretical studies have identified several good reasons why to use such types of interconnect as a replacement of various layers of the traditional electronic interconnect hierarchy. However, the true feasibility and usefulness of optical interconnects can only be established by actually building and evaluating them in a real system setting. This contribution reports on our experience in using short-range high-density optical inter-chip interconnects. It is based on the design and construction of a fully functional optoelectronic demonstrator system. We discuss the rationale for building the demonstrator in the first place, the implications of using many low-level optical interconnections in electronic systems, and the degree to which our expectations have been fulfilled by the demonstrator. The detailed description of the architecture, design and implementation of the demonstrator is not presented here, but can be found elsewhere in this issue.
? observer-based decentralised fuzzy control design for nonlinear interconnected systems: an application to vehicle dynamics

NASA Astrophysics Data System (ADS)

Latrach, Chedia; Kchaou, Mourad; Guéguen, Hervé

2017-05-01

In this study, a decentralised output learning control strategy for a class of nonlinear interconnected systems is studied. Based on Takagi-Sugeno fuzzy (TS) model to approximate the considered interconnected nonlinear systems, a decentralised observer-based control scheme is designed to override the external disturbances such that the ? performance is achieved. The appealing attributes of this approach include: (1) the closed-loop system exhibits a robustness against nonlinear interconnections and external disturbance, (2) by one-step procedure, the gain matrices of observer and controller are obtained on a single step. In simulation results, the controller design is evaluated on the steering stability of a car where the nonlinear model describes the side slip, roll and yaw motions of the automotive vehicle equipped with four-wheel-steering and active suspension.
Immortality of Cu damascene interconnects

NASA Astrophysics Data System (ADS)

Hau-Riege, Stefan P.

2002-04-01

We have studied short-line effects in fully-integrated Cu damascene interconnects through electromigration experiments on lines of various lengths and embedded in different dielectric materials. We compare these results with results from analogous experiments on subtractively-etched Al-based interconnects. It is known that Al-based interconnects exhibit three different behaviors, depending on the magnitude of the product of current density, j, and line length, L: For small values of (jL), no void nucleation occurs, and the line is immortal. For intermediate values, voids nucleate, but the line does not fail because the current can flow through the higher-resistivity refractory-metal-based shunt layers. Here, the resistance of the line increases but eventually saturates, and the relative resistance increase is proportional to (jL/B), where B is the effective elastic modulus of the metallization system. For large values of (jL/B), voiding leads to an unacceptably high resistance increase, and the line is considered failed. By contrast, we observed only two regimes for Cu-based interconnects: Either the resistance of the line stays constant during the duration of the experiment, and the line is considered immortal, or the line fails due to an abrupt open-circuit failure. The absence of an intermediate regime in which the resistance saturates is due to the absence of a shunt layer that is able to support a large amount of current once voiding occurs. Since voids nucleate much more easily in Cu- than in Al-based interconnects, a small fraction of short Cu lines fails even at low current densities. It is therefore more appropriate to consider the probability of immortality in the case of Cu rather than assuming a sharp boundary between mortality and immortality. The probability of immortality decreases with increasing amount of material depleted from the cathode, which is proportional to (jL2/B) at steady state. By contrast, the immortality of Al-based interconnects is described by (jL) if no voids nucleate, and (jL/B) if voids nucleate.

Interconnect fatigue design for terrestrial photovoltaic modules

NASA Technical Reports Server (NTRS)

Mon, G. R.; Moore, D. M.; Ross, R. G., Jr.

1982-01-01

The results of comprehensive investigation of interconnect fatigue that has led to the definition of useful reliability-design and life-prediction algorithms are presented. Experimental data indicate that the classical strain-cycle (fatigue) curve for the interconnect material is a good model of mean interconnect fatigue performance, but it fails to account for the broad statistical scatter, which is critical to reliability prediction. To fill this shortcoming the classical fatigue curve is combined with experimental cumulative interconnect failure rate data to yield statistical fatigue curves (having failure probability as a parameter) which enable (1) the prediction of cumulative interconnect failures during the design life of an array field, and (2) the unambiguous--ie., quantitative--interpretation of data from field-service qualification (accelerated thermal cycling) tests. Optimal interconnect cost-reliability design algorithms are derived based on minimizing the cost of energy over the design life of the array field.
Interconnect fatigue design for terrestrial photovoltaic modules

NASA Astrophysics Data System (ADS)

Mon, G. R.; Moore, D. M.; Ross, R. G., Jr.

1982-03-01

The results of comprehensive investigation of interconnect fatigue that has led to the definition of useful reliability-design and life-prediction algorithms are presented. Experimental data indicate that the classical strain-cycle (fatigue) curve for the interconnect material is a good model of mean interconnect fatigue performance, but it fails to account for the broad statistical scatter, which is critical to reliability prediction. To fill this shortcoming the classical fatigue curve is combined with experimental cumulative interconnect failure rate data to yield statistical fatigue curves (having failure probability as a parameter) which enable (1) the prediction of cumulative interconnect failures during the design life of an array field, and (2) the unambiguous--ie., quantitative--interpretation of data from field-service qualification (accelerated thermal cycling) tests. Optimal interconnect cost-reliability design algorithms are derived based on minimizing the cost of energy over the design life of the array field.
Adaptive Code Division Multiple Access Protocol for Wireless Network-on-Chip Architectures

NASA Astrophysics Data System (ADS)

Vijayakumaran, Vineeth

Massive levels of integration following Moore's Law ushered in a paradigm shift in the way on-chip interconnections were designed. With higher and higher number of cores on the same die traditional bus based interconnections are no longer a scalable communication infrastructure. On-chip networks were proposed enabled a scalable plug-and-play mechanism for interconnecting hundreds of cores on the same chip. Wired interconnects between the cores in a traditional Network-on-Chip (NoC) system, becomes a bottleneck with increase in the number of cores thereby increasing the latency and energy to transmit signals over them. Hence, there has been many alternative emerging interconnect technologies proposed, namely, 3D, photonic and multi-band RF interconnects. Although they provide better connectivity, higher speed and higher bandwidth compared to wired interconnects; they also face challenges with heat dissipation and manufacturing difficulties. On-chip wireless interconnects is one other alternative proposed which doesn't need physical interconnection layout as data travels over the wireless medium. They are integrated into a hybrid NOC architecture consisting of both wired and wireless links, which provides higher bandwidth, lower latency, lesser area overhead and reduced energy dissipation in communication. However, as the bandwidth of the wireless channels is limited, an efficient media access control (MAC) scheme is required to enhance the utilization of the available bandwidth. This thesis proposes using a multiple access mechanism such as Code Division Multiple Access (CDMA) to enable multiple transmitter-receiver pairs to send data over the wireless channel simultaneously. It will be shown that such a hybrid wireless NoC with an efficient CDMA based MAC protocol can significantly increase the performance of the system while lowering the energy dissipation in data transfer. In this work it is shown that the wireless NoC with the proposed CDMA based MAC protocol outperformed the wired counterparts and several other wireless architectures proposed in literature in terms of bandwidth and packet energy dissipation. Significant gains were observed in packet energy dissipation and bandwidth even with scaling the system to higher number of cores. Non-uniform traffic simulations showed that the proposed CDMA-WiNoC was consistent in bandwidth across all traffic patterns. It is also shown that the CDMA based MAC scheme does not introduce additional reliability concerns in data transfer over the on-chip wireless interconnects.
TRIGA: Telecommunications Protocol Processing Subsystem Using Reconfigurable Interoperable Gate Arrays

NASA Technical Reports Server (NTRS)

Pang, Jackson; Pingree, Paula J.; Torgerson, J. Leigh

2006-01-01

We present the Telecommunications protocol processing subsystem using Reconfigurable Interoperable Gate Arrays (TRIGA), a novel approach that unifies fault tolerance, error correction coding and interplanetary communication protocol off-loading to implement CCSDS File Delivery Protocol and Datalink layers. The new reconfigurable architecture offers more than one order of magnitude throughput increase while reducing footprint requirements in memory, command and data handling processor utilization, communication system interconnects and power consumption.
The NASA Education Forum at SAO on the Structure and Evolution of the Universe

NASA Technical Reports Server (NTRS)

Gould, Roy; Rosendhal, Jeffrey (Technical Monitor)

2001-01-01

During the past year the SEU Forum has made significant progress on a number of fronts: (1) the Forum has brought several large education projects close to completion; (2) we have greatly expanded our relationship with the SEU missions and programs; and (3) we have started a significant program to better involve space scientists in education and outreach activities. Among our accomplishments for the past year: (1) completed planning and design for Cosmic Questions, a national traveling exhibition on SEU themes; (2) launched the informal Science Education Resource Directory; (3) Coordinating with the SEU and Origins missions; and (4) promoted scientist-educator partnerships.
DOE Office of Scientific and Technical Information (OSTI.GOV)

Tweedie, A.; Doris, E.

Establishing interconnection to the grid is a recognized barrier to the deployment of distributed energy generation. This report compares interconnection processes for photovoltaic projects in California and Germany. This report summarizes the steps of the interconnection process for developers and utilities, the average length of time utilities take to process applications, and paperwork required of project developers. Based on a review of the available literature, this report finds that while the interconnection procedures and timelines are similar in California and Germany, differences in the legal and regulatory frameworks are substantial.
Advanced optical network architecture for integrated digital avionics

NASA Astrophysics Data System (ADS)

Morgan, D. Reed

1996-12-01

For the first time in the history of avionics, the network designer now has a choice in selecting the media that interconnects the sources and sinks of digital data on aircraft. Electrical designs are already giving way to photonics in application areas where the data rate times distance product is large or where special design requirements such as low weight or EMI considerations are critical. Future digital avionic architectures will increasingly favor the use of photonic interconnects as network data rates of one gigabit/second and higher are needed to support real-time operation of high-speed integrated digital processing. As the cost of optical network building blocks is reduced and as temperature-rugged laser sources are matured, metal interconnects will be forced to retreat to applications spanning shorter and shorter distances. Although the trend is already underway, the widespread use of digital optics will first occur at the system level, where gigabit/second, real-time interconnects between sensors, processors, mass memories and displays separated by a least of few meters will be required. The application of photonic interconnects for inter-printed wiring board signalling across the backplane will eventually find application for gigabit/second applications since signal degradation over copper traces occurs before one gigabit/second and 0.5 meters are reached. For the foreseeable future however, metal interconnects will continue to be used to interconnect devices on printed wiring boards since 5 gigabit/second signals can be sent over metal up to around 15 centimeters. Current-day applications of optical interconnects at the system level are described and a projection of how advanced optical interconnect technology will be driven by the use of high speed integrated digital processing on future aircraft is presented. The recommended advanced network for application in the 2010 time frame is a fiber-based system with a signalling speed of around 2-3 gigabits per second. This switch-based unified network will interconnect sensors, displays, mass memory and controls and displays to computer modules within the processing complex. The characteristics of required building blocks needed for the future are described. These building blocks include the fiber, an optical switch, a laser-based transceiver, blind-mate connectors and an optical backplane.
76 FR 27052 - Information Collection Being Submitted for Review by the Federal Communication Commission

Federal Register 2010, 2011, 2012, 2013, 2014

2011-05-10

... both within 120 km of the center of the city, and with 120 km of the interconnected base station... interconnection of private land mobile radio service stations with the public switched telephone network as follows: (1) Pursuant to 47 CFR section 90.477(a), licensees of interconnected land stations must maintain...
47 CFR 90.483 - Permissible methods and requirements of interconnecting private and public systems of...

Code of Federal Regulations, 2010 CFR

2010-10-01

... must be installed at the base station to prevent activation of the transmitter when signals of co... located within a 120 kilometer (75 mile) radius of the interconnected base station transmitter. A... more than one system, automatic monitoring equipment must be installed at the base station to prevent...
20 Gbps operation of membrane-based GaInAs/InP waveguide-type p-i-n photodiode bonded on Si substrate

NASA Astrophysics Data System (ADS)

Gu, Zhichen; Inoue, Daisuke; Amemiya, Tomohiro; Nishiyama, Nobuhiko; Arai, Shigehisa

2018-02-01

A GaInAs/InP waveguide-type p-i-n membrane photodetector is shown to be a strong candidate for on-chip optical interconnection. A responsivity of 0.95 A/W is estimated for a device length of 30 µm. The 3 dB cutoff frequency is measured to be 13.3 GHz at a reverse bias of 3 V, which is in good agreement with the observed clear eye opening pattern up to 20 Gbps for a non-return-to-zero signal. Moreover, a bit error rate of less than 1 × 10-9 is obtained at data rates of 20 and 10 Gbps with input powers of -10 and -13 dBm, respectively.
Substrate structures for InP-based devices

DOEpatents

Wanlass, Mark W.; Sheldon, Peter

1990-01-01

A substrate structure for an InP-based semiconductor device having an InP based film is disclosed. The substrate structure includes a substrate region having a lightweight bulk substrate and an upper GaAs layer. An interconnecting region is disposed between the substrate region and the InP-based device. The interconnecting region includes a compositionally graded intermediate layer substantially lattice-matched at one end to the GaAs layer and substantially lattice-matched at the opposite end to the InP-based film. The interconnecting region further includes a dislocation mechanism disposed between the GaAs layer and the InP-based film in cooperation with the graded intermediate layer, the buffer mechanism blocking and inhibiting propagation of threading dislocations between the substrate region, and the InP-based device.
Neural networks with multiple general neuron models: a hybrid computational intelligence approach using Genetic Programming.

PubMed

Barton, Alan J; Valdés, Julio J; Orchard, Robert

2009-01-01

Classical neural networks are composed of neurons whose nature is determined by a certain function (the neuron model), usually pre-specified. In this paper, a type of neural network (NN-GP) is presented in which: (i) each neuron may have its own neuron model in the form of a general function, (ii) any layout (i.e network interconnection) is possible, and (iii) no bias nodes or weights are associated to the connections, neurons or layers. The general functions associated to a neuron are learned by searching a function space. They are not provided a priori, but are rather built as part of an Evolutionary Computation process based on Genetic Programming. The resulting network solutions are evaluated based on a fitness measure, which may, for example, be based on classification or regression errors. Two real-world examples are presented to illustrate the promising behaviour on classification problems via construction of a low-dimensional representation of a high-dimensional parameter space associated to the set of all network solutions.
Analysis of the influencing factors of global energy interconnection development

NASA Astrophysics Data System (ADS)

Zhang, Yi; He, Yongxiu; Ge, Sifan; Liu, Lin

2018-04-01

Under the background of building global energy interconnection and achieving green and low-carbon development, this paper grasps a new round of energy restructuring and the trend of energy technology change, based on the present situation of global and China's global energy interconnection development, established the index system of the impact of global energy interconnection development factors. A subjective and objective weight analysis of the factors affecting the development of the global energy interconnection was conducted separately by network level analysis and entropy method, and the weights are summed up by the method of additive integration, which gives the comprehensive weight of the influencing factors and the ranking of their influence.
Optical Interconnections for VLSI Computational Systems Using Computer-Generated Holography.

NASA Astrophysics Data System (ADS)

Feldman, Michael Robert

Optical interconnects for VLSI computational systems using computer generated holograms are evaluated in theory and experiment. It is shown that by replacing particular electronic connections with free-space optical communication paths, connection of devices on a single chip or wafer and between chips or modules can be improved. Optical and electrical interconnects are compared in terms of power dissipation, communication bandwidth, and connection density. Conditions are determined for which optical interconnects are advantageous. Based on this analysis, it is shown that by applying computer generated holographic optical interconnects to wafer scale fine grain parallel processing systems, dramatic increases in system performance can be expected. Some new interconnection networks, designed to take full advantage of optical interconnect technology, have been developed. Experimental Computer Generated Holograms (CGH's) have been designed, fabricated and subsequently tested in prototype optical interconnected computational systems. Several new CGH encoding methods have been developed to provide efficient high performance CGH's. One CGH was used to decrease the access time of a 1 kilobit CMOS RAM chip. Another was produced to implement the inter-processor communication paths in a shared memory SIMD parallel processor array.
Adaptive constructive processes and the future of memory.

PubMed

Schacter, Daniel L

2012-11-01

Memory serves critical functions in everyday life but is also prone to error. This article examines adaptive constructive processes, which play a functional role in memory and cognition but can also produce distortions, errors, and illusions. The article describes several types of memory errors that are produced by adaptive constructive processes and focuses in particular on the process of imagining or simulating events that might occur in one's personal future. Simulating future events relies on many of the same cognitive and neural processes as remembering past events, which may help to explain why imagination and memory can be easily confused. The article considers both pitfalls and adaptive aspects of future event simulation in the context of research on planning, prediction, problem solving, mind-wandering, prospective and retrospective memory, coping and positivity bias, and the interconnected set of brain regions known as the default network. PsycINFO Database Record (c) 2012 APA, all rights reserved.
CMOS chip planarization by chemical mechanical polishing for a vertically stacked metal MEMS integration

NASA Astrophysics Data System (ADS)

Lee, Hocheol; Miller, Michele H.; Bifano, Thomas G.

2004-01-01

In this paper we present the planarization process of a CMOS chip for the integration of a microelectromechanical systems (MEMS) metal mirror array. The CMOS chip, which comes from a commercial foundry, has a bumpy passivation layer due to an underlying aluminum interconnect pattern (1.8 µm high), which is used for addressing individual micromirror array elements. To overcome the tendency for tilt error in the CMOS chip planarization, the approach is to sputter a thick layer of silicon nitride at low temperature and to surround the CMOS chip with dummy silicon pieces that define a polishing plane. The dummy pieces are first lapped down to the height of the CMOS chip, and then all pieces are polished. This process produced a chip surface with a root-mean-square flatness error of less than 100 nm, including tilt and curvature errors.
Applications of SPICE for modeling miniaturized biomedical sensor systems

NASA Technical Reports Server (NTRS)

Mundt, C. W.; Nagle, H. T.

2000-01-01

This paper proposes a model for a miniaturized signal conditioning system for biopotential and ion-selective electrode arrays. The system consists of three main components: sensors, interconnections, and signal conditioning chip. The model for this system is based on SPICE. Transmission-line based equivalent circuits are used to represent the sensors, lumped resistance-capacitance circuits describe the interconnections, and a model for the signal conditioning chip is extracted from its layout. A system for measurements of biopotentials and ionic activities can be miniaturized and optimized for cardiovascular applications based on the development of an integrated SPICE system model of its electrochemical, interconnection, and electronic components.
Optical computing research

NASA Astrophysics Data System (ADS)

Goodman, Joseph W.

1987-10-01

Work Accomplished: OPTICAL INTERCONNECTIONS - the powerful interconnect abilities of optical beams have led much optimism about the possible roles for optics in solving interconnect problems at various levels of computer architecture. Examined were the powerful requirements of optical interconnects at the gate-to-gate and chip-to-chip levels. OPTICAL NEUTRAL NETWORKS - basic studies of the convergence properties on the Holfield model, based on mathematical approach - graph theory. OPTICS AND ARTIFICIAL INTELLIGENCE - review the field of optical processing and artificial intelligence, with the aim of finding areas that might be particularly attractive for future investigation(s).
Critical issues regarding SEU in avionics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Normand, E.; McNulty, P.J.

1993-01-01

The energetic neutrons in the atmosphere cause microelectronics in avionic system to malfunction through a mechanism called single-event upsets (SEUs), and single-event latchup is a potential threat. Data from military and experimental flights as well as laboratory testing indicate that typical non-radiation-hardened 64K and 256K static random access memories (SRAMs) can experience a significant SEU rate at aircraft altitudes. Microelectronics in avionics systems have been demonstrated to be susceptible to SEU. Of all device types, RAMs are the most sensitive because they have the largest number of bits on a chip (e.g., an SRAM may have from 64K to 1Mmore » bits, a microprocessor 3K to 10K bits, and a logic device like an analog-to-digital converter, 12 bits). Avionics designers will need to take this susceptibility into account in current and future designs. A number of techniques are available for dealing with SEU: EDAC, redundancy, use of SEU-hard parts, reset and/or watchdog timer capability, etc. Specifications should be developed to guide avionics vendors in the analysis, prevention, and verification of neutron-induced SEU. Areas for additional research include better definition of the atmospheric neutrons and protons, development of better calculational models (e.g., those used for protons[sup 11]), and better characterization of neutron-induced latchup.« less
Efficient Parallel Algorithms on Restartable Fail-Stop Processors

DTIC Science & Technology

1991-01-01

resource (memory), and ( 3 ) that processors, memory and their interconnection must be The model of parallel computation known as the Par- perfectly...setting), arid ure an(I restart errors. We describe these arguments if] [AAtPS 871 (in a deterministic setting). Fault-tolerance Section 3 . of...grannmarity at the processor level --- for recent work on where Al is the nmber of failures during this step’s gate granilarities see [All 90, Pip 85

Mode selecting switch using multimode interference for on-chip optical interconnects.

PubMed

Priti, Rubana B; Pishvai Bazargani, Hamed; Xiong, Yule; Liboiron-Ladouceur, Odile

2017-10-15

A novel mode selecting switch (MSS) is experimentally demonstrated for on-chip mode-division multiplexing (MDM) optical interconnects. The MSS consists of a Mach-Zehnder interferometer with tapered multi-mode interference couplers and TiN thermo-optic phase shifters for conversion and switching between the optical data encoded on the fundamental and first-order quasi-transverse electric (TE) modes. The C-band MSS exhibits a >25 dB switching extinction ratio and < -12 dB crosstalk. We validate the dynamic switching with a 25.8 kHz gating signal measuring switching times for both TE0 and TE1 modes of <10.9 μs. All channels exhibit less than 1.7 dB power penalty at a 10 -12 bit error rate, while switching the non-return-to-zero PRBS-31 data signals at 10 Gb/s.
Characterization of radiation effects in 65 nm digital circuits with the DRAD digital radiation test chip

NASA Astrophysics Data System (ADS)

Jara Casas, L. M.; Ceresa, D.; Kulis, S.; Miryala, S.; Christiansen, J.; Francisco, R.; Gnani, D.

2017-02-01

A Digital RADiation (DRAD) test chip has been specifically designed to study the impact of Total Ionizing Dose (TID) (<1 Grad) and Single Event Upset (SEU) on digital logic gates in a 65 nm CMOS technology. Nine different versions of standard cell libraries are studied in this chip, basically differing in the device dimensions, Vt flavor and layout of the device. Each library has eighteen test structures specifically designed to characterize delay degradation and power consumption of the standard cells. For SEU study, a dedicated test structure based on a shift register is designed for each library. TID results up to 500 Mrad are reported.
Cascading failures in interconnected networks with dynamical redistribution of loads

NASA Astrophysics Data System (ADS)

Zhao, Zhuang; Zhang, Peng; Yang, Hujiang

2015-09-01

Cascading failures of loads in isolated networks and coupled networks have been studied in the past few years. In most of the corresponding results, the topologies of the networks are destroyed. Here, we present an interconnected network model considering cascading failures based on the dynamic redistribution of flow in the networks. Compared with the results of single scale-free networks, we find that interconnected scale-free networks have higher vulnerability. Additionally, the network heterogeneity plays an important role in the robustness of interconnected networks under intentional attacks. Considering the effects of various coupling preferences, the results show that there are almost no differences. Finally, the application of our model to the Beijing interconnected traffic network, which consists of a subway network and a bus network, shows that the subway network suffers more damage under the attack. Moreover, the interconnected traffic network may be more exposed to damage after initial attacks on the bus network. These discussions are important for the design and optimization of interconnected networks.
Causes of medication administration errors in hospitals: a systematic review of quantitative and qualitative evidence.

PubMed

Keers, Richard N; Williams, Steven D; Cooke, Jonathan; Ashcroft, Darren M

2013-11-01

Underlying systems factors have been seen to be crucial contributors to the occurrence of medication errors. By understanding the causes of these errors, the most appropriate interventions can be designed and implemented to minimise their occurrence. This study aimed to systematically review and appraise empirical evidence relating to the causes of medication administration errors (MAEs) in hospital settings. Nine electronic databases (MEDLINE, EMBASE, International Pharmaceutical Abstracts, ASSIA, PsycINFO, British Nursing Index, CINAHL, Health Management Information Consortium and Social Science Citations Index) were searched between 1985 and May 2013. Inclusion and exclusion criteria were applied to identify eligible publications through title analysis followed by abstract and then full text examination. English language publications reporting empirical data on causes of MAEs were included. Reference lists of included articles and relevant review papers were hand searched for additional studies. Studies were excluded if they did not report data on specific MAEs, used accounts from individuals not directly involved in the MAE concerned or were presented as conference abstracts with insufficient detail. A total of 54 unique studies were included. Causes of MAEs were categorised according to Reason's model of accident causation. Studies were assessed to determine relevance to the research question and how likely the results were to reflect the potential underlying causes of MAEs based on the method(s) used. Slips and lapses were the most commonly reported unsafe acts, followed by knowledge-based mistakes and deliberate violations. Error-provoking conditions influencing administration errors included inadequate written communication (prescriptions, documentation, transcription), problems with medicines supply and storage (pharmacy dispensing errors and ward stock management), high perceived workload, problems with ward-based equipment (access, functionality), patient factors (availability, acuity), staff health status (fatigue, stress) and interruptions/distractions during drug administration. Few studies sought to determine the causes of intravenous MAEs. A number of latent pathway conditions were less well explored, including local working culture and high-level managerial decisions. Causes were often described superficially; this may be related to the use of quantitative surveys and observation methods in many studies, limited use of established error causation frameworks to analyse data and a predominant focus on issues other than the causes of MAEs among studies. As only English language publications were included, some relevant studies may have been missed. Limited evidence from studies included in this systematic review suggests that MAEs are influenced by multiple systems factors, but if and how these arise and interconnect to lead to errors remains to be fully determined. Further research with a theoretical focus is needed to investigate the MAE causation pathway, with an emphasis on ensuring interventions designed to minimise MAEs target recognised underlying causes of errors to maximise their impact.
Clad metals, roll bonding and their applications for SOFC interconnects

NASA Astrophysics Data System (ADS)

Chen, Lichun; Yang, Zhenguo; Jha, Bijendra; Xia, Guanguang; Stevenson, Jeffry W.

Metallic interconnects have been becoming an increasingly interesting topic in the development in intermediate temperature solid oxide fuel cells (SOFC). High temperature oxidation resistant alloys are currently considered as candidate materials. Among these alloys however, different groups of alloys demonstrate different advantages and disadvantages, and few if any can completely satisfy the stringent requirements for the application. To integrate the advantages and avoid the disadvantages of different groups of alloys, clad metal has been proposed for SOFC interconnect applications and interconnect structures. This paper gives a brief overview of the cladding approach and its applications, and discuss the viability of this technology to fabricate the metallic layered-structure interconnects. To examine the feasibility of this approach, the austenitic Ni-base alloy Haynes 230 and the ferritic stainless steel AL 453 were selected as examples and manufactured into a clad metal. Its suitability as an interconnect construction material was investigated.
IC layout adjustment method and tool for improving dielectric reliability at interconnects

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kahng, Andrew B.; Chan, Tuck Boon

Method for adjusting a layout used in making an integrated circuit includes one or more interconnects in the layout that are susceptible to dielectric breakdown are selected. One or more selected interconnects are adjusted to increase via to wire spacing with respect to at least one via and one wire of the one or more selected interconnects. Preferably, the selecting analyzes signal patterns of interconnects, and estimates the stress ratio based on state probability of routed signal nets in the layout. An annotated layout is provided that describes distances by which one or more via or wire segment edges aremore » to be shifted. Adjustments can include thinning and shifting of wire segments, and rotation of vias.« less
Decentralized automatic generation control of interconnected power systems incorporating asynchronous tie-lines.

PubMed

Ibraheem; Hasan, Naimul; Hussein, Arkan Ahmed

2014-01-01

This Paper presents the design of decentralized automatic generation controller for an interconnected power system using PID, Genetic Algorithm (GA) and Particle Swarm Optimization (PSO). The designed controllers are tested on identical two-area interconnected power systems consisting of thermal power plants. The area interconnections between two areas are considered as (i) AC tie-line only (ii) Asynchronous tie-line. The dynamic response analysis is carried out for 1% load perturbation. The performance of the intelligent controllers based on GA and PSO has been compared with the conventional PID controller. The investigations of the system dynamic responses reveal that PSO has the better dynamic response result as compared with PID and GA controller for both type of area interconnection.
Planned development of a 3D computer based on free-space optical interconnects

NASA Astrophysics Data System (ADS)

Neff, John A.; Guarino, David R.

1994-05-01

Free-space optical interconnection has the potential to provide upwards of a million data channels between planes of electronic circuits. This may result in the planar board and backplane structures of today giving away to 3-D stacks of wafers or multi-chip modules interconnected via channels running perpendicular to the processor planes, thereby eliminating much of the packaging overhead. Three-dimensional packaging is very appealing for tightly coupled fine-grained parallel computing where the need for massive numbers of interconnections is severely taxing the capabilities of the planar structures. This paper describes a coordinated effort by four research organizations to demonstrate an operational fine-grained parallel computer that achieves global connectivity through the use of free space optical interconnects.
Survey of critical failure events in on-chip interconnect by fault tree analysis

NASA Astrophysics Data System (ADS)

Yokogawa, Shinji; Kunii, Kyousuke

2018-07-01

In this paper, a framework based on reliability physics is proposed for adopting fault tree analysis (FTA) to the on-chip interconnect system of a semiconductor. By integrating expert knowledge and experience regarding the possibilities of failure on basic events, critical issues of on-chip interconnect reliability will be evaluated by FTA. In particular, FTA is used to identify the minimal cut sets with high risk priority. Critical events affecting the on-chip interconnect reliability are identified and discussed from the viewpoint of long-term reliability assessment. The moisture impact is evaluated as an external event.
Design and implementation of a modulator-based free-space optical backplane for multiprocessor applications.

PubMed

Kirk, Andrew G; Plant, David V; Szymanski, Ted H; Vranesic, Zvonko G; Tooley, Frank A P; Rolston, David R; Ayliffe, Michael H; Lacroix, Frederic K; Robertson, Brian; Bernier, Eric; Brosseau, Daniel F

2003-05-10

Design and implementation of a free-space optical backplane for multiprocessor applications is presented. The system is designed to interconnect four multiprocessor nodes that communicate by using multiplexed 32-bit packets. Each multiprocessor node is electrically connected to an optoelectronic VLSI chip which implements the hyperplane interconnection architecture. The chips each contain 256 optical transmitters (implemented as dual-rail multiple quantum-well modulators) and 256 optical receivers. A rigid free-space microoptical interconnection system that interconnects the transceiver chips in a 512-channel unidirectional ring is implemented. Full design, implementation, and operational details are provided.
Design and implementation of a modulator-based free-space optical backplane for multiprocessor applications

NASA Astrophysics Data System (ADS)

Kirk, Andrew G.; Plant, David V.; Szymanski, Ted H.; Vranesic, Zvonko G.; Tooley, Frank A. P.; Rolston, David R.; Ayliffe, Michael H.; Lacroix, Frederic K.; Robertson, Brian; Bernier, Eric; Brosseau, Daniel F.

2003-05-01

Design and implementation of a free-space optical backplane for multiprocessor applications is presented. The system is designed to interconnect four multiprocessor nodes that communicate by using multiplexed 32-bit packets. Each multiprocessor node is electrically connected to an optoelectronic VLSI chip which implements the hyperplane interconnection architecture. The chips each contain 256 optical transmitters (implemented as dual-rail multiple quantum-well modulators) and 256 optical receivers. A rigid free-space microoptical interconnection system that interconnects the transceiver chips in a 512-channel unidirectional ring is implemented. Full design, implementation, and operational details are provided.
Multi-physics modelling contributions to investigate the atmospheric cosmic rays on the single event upset sensitivity along the scaling trend of CMOS technologies.

PubMed

Hubert, G; Regis, D; Cheminet, A; Gatti, M; Lacoste, V

2014-10-01

Particles originating from primary cosmic radiation, which hit the Earth's atmosphere give rise to a complex field of secondary particles. These particles include neutrons, protons, muons, pions, etc. Since the 1980s it has been known that terrestrial cosmic rays can penetrate the natural shielding of buildings, equipment and circuit package and induce soft errors in integrated circuits. Recently, research has shown that commercial static random access memories are now so small and sufficiently sensitive that single event upsets (SEUs) may be induced from the electronic stopping of a proton. With continued advancements in process size, this downward trend in sensitivity is expected to continue. Then, muon soft errors have been predicted for nano-electronics. This paper describes the effects in the specific cases such as neutron-, proton- and muon-induced SEU observed in complementary metal-oxide semiconductor. The results will allow investigating the technology node sensitivity along the scaling trend. © The Author 2014. Published by Oxford University Press. All rights reserved. For Permissions, please email: journals.permissions@oup.com.
A Conceptual Framework Based on Activity Theory for Mobile CSCL

ERIC Educational Resources Information Center

Zurita, Gustavo; Nussbaum, Miguel

2007-01-01

There is a need for collaborative group activities that promote student social interaction in the classroom. Handheld computers interconnected by a wireless network allow people who work on a common task to interact face to face while maintaining the mediation afforded by a technology-based system. Wirelessly interconnected handhelds open up new…
Reconfigurable fault tolerant avionics system

NASA Astrophysics Data System (ADS)

Ibrahim, M. M.; Asami, K.; Cho, Mengu

This paper presents the design of a reconfigurable avionics system based on modern Static Random Access Memory (SRAM)-based Field Programmable Gate Array (FPGA) to be used in future generations of nano satellites. A major concern in satellite systems and especially nano satellites is to build robust systems with low-power consumption profiles. The system is designed to be flexible by providing the capability of reconfiguring itself based on its orbital position. As Single Event Upsets (SEU) do not have the same severity and intensity in all orbital locations, having the maximum at the South Atlantic Anomaly (SAA) and the polar cusps, the system does not have to be fully protected all the time in its orbit. An acceptable level of protection against high-energy cosmic rays and charged particles roaming in space is provided within the majority of the orbit through software fault tolerance. Check pointing and roll back, besides control flow assertions, is used for that level of protection. In the minority part of the orbit where severe SEUs are expected to exist, a reconfiguration for the system FPGA is initiated where the processor systems are triplicated and protection through Triple Modular Redundancy (TMR) with feedback is provided. This technique of reconfiguring the system as per the level of the threat expected from SEU-induced faults helps in reducing the average dynamic power consumption of the system to one-third of its maximum. This technique can be viewed as a smart protection through system reconfiguration. The system is built on the commercial version of the (XC5VLX50) Xilinx Virtex5 FPGA on bulk silicon with 324 IO. Simulations of orbit SEU rates were carried out using the SPENVIS web-based software package.
The Development of an IMU Integrated Clothes for Postural Monitoring Using Conductive Yarn and Interconnecting Technology.

PubMed

Kang, Sung-Won; Choi, Hyeob; Park, Hyung-Il; Choi, Byoung-Gun; Im, Hyobin; Shin, Dongjun; Jung, Young-Giu; Lee, Jun-Young; Park, Hong-Won; Park, Sukyung; Roh, Jung-Sim

2017-11-07

Spinal disease is a common yet important condition that occurs because of inappropriate posture. Prevention could be achieved by continuous posture monitoring, but most measurement systems cannot be used in daily life due to factors such as burdensome wires and large sensing modules. To improve upon these weaknesses, we developed comfortable "smart wear" for posture measurement using conductive yarn for circuit patterning and a flexible printed circuit board (FPCB) for interconnections. The conductive yarn was made by twisting polyester yarn and metal filaments, and the resistance per unit length was about 0.05 Ω/cm. An embroidered circuit was made using the conductive yarn, which showed increased yield strength and uniform electrical resistance per unit length. Circuit networks of sensors and FPCBs for interconnection were integrated into clothes using a computer numerical control (CNC) embroidery process. The system was calibrated and verified by comparing the values measured by the smart wear with those measured by a motion capture camera system. Six subjects performed fixed movements and free computer work, and, with this system, we were able to measure the anterior/posterior direction tilt angle with an error of less than 4°. The smart wear does not have excessive wires, and its structure will be optimized for better posture estimation in a later study.
Design and qualification of the SEU/TD Radiation Monitor chip

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Blaes, Brent R.; Soli, George A.; Zamani, Nasser; Hicks, Kenneth A.

1992-01-01

This report describes the design, fabrication, and testing of the Single-Event Upset/Total Dose (SEU/TD) Radiation Monitor chip. The Radiation Monitor is scheduled to fly on the Mid-Course Space Experiment Satellite (MSX). The Radiation Monitor chip consists of a custom-designed 4-bit SRAM for heavy ion detection and three MOSFET's for monitoring total dose. In addition the Radiation Monitor chip was tested along with three diagnostic chips: the processor monitor and the reliability and fault chips. These chips revealed the quality of the CMOS fabrication process. The SEU/TD Radiation Monitor chip had an initial functional yield of 94.6 percent. Forty-three (43) SEU SRAM's and 14 Total Dose MOSFET's passed the hermeticity and final electrical tests and were delivered to LL.
Quantum Clique Gossiping.

PubMed

Li, Bo; Li, Shuang; Wu, Junfeng; Qi, Hongsheng

2018-02-09

This paper establishes a framework of quantum clique gossiping by introducing local clique operations to networks of interconnected qubits. Cliques are local structures in complex networks being complete subgraphs, which can be used to accelerate classical gossip algorithms. Based on cyclic permutations, clique gossiping leads to collective multi-party qubit interactions. We show that at reduced states, these cliques have the same acceleration effects as their roles in accelerating classical gossip algorithms. For randomized selection of cliques, such improved rate of convergence is precisely characterized. On the other hand, the rate of convergence at the coherent states of the overall quantum network is proven to be decided by the spectrum of a mean-square error evolution matrix. Remarkably, the use of larger quantum cliques does not necessarily increase the speed of the network density aggregation, suggesting quantum network dynamics is not entirely decided by its classical topology.
Distributed computing methodology for training neural networks in an image-guided diagnostic application.

PubMed

Plagianakos, V P; Magoulas, G D; Vrahatis, M N

2006-03-01

Distributed computing is a process through which a set of computers connected by a network is used collectively to solve a single problem. In this paper, we propose a distributed computing methodology for training neural networks for the detection of lesions in colonoscopy. Our approach is based on partitioning the training set across multiple processors using a parallel virtual machine. In this way, interconnected computers of varied architectures can be used for the distributed evaluation of the error function and gradient values, and, thus, training neural networks utilizing various learning methods. The proposed methodology has large granularity and low synchronization, and has been implemented and tested. Our results indicate that the parallel virtual machine implementation of the training algorithms developed leads to considerable speedup, especially when large network architectures and training sets are used.
High-speed, bi-directional dual-core fiber transmission system for high-density, short-reach optical interconnects

NASA Astrophysics Data System (ADS)

Geng, Ying; Li, Shenping; Li, Ming-Jun; Sutton, Clifford G.; McCollum, Robert L.; McClure, Randy L.; Koklyushkin, Alexander V.; Matthews, Karen I.; Luther, James P.; Butler, Douglas L.

2015-03-01

A complete single mode dual-core fiber system for short-reach optical interconnects is fabricated and tested for high-speed data transmission. It includes dual-core fibers capable of bi-directional data transmission, dual-core simplex LC connectors, and fan-outs. The transmission system offers simplified bi-directional traffic engineering with integrated bidirectional transceivers and compact system design, utilizing simplex dual-core LC connectors that use half the space while increasing the bandwidth density by a factor of two. The fiber has two cores that are compatible with single mode fiber and conforms to the industry standard outer diameter of 125 μm. This reduces operational complexity by reducing the size and number of fibers, cables and connectors. Measured OTDR loss for both cores was 0.34 dB/km at 1310 nm and 0.19 dB/km at 1550 nm. Crosstalk for a piece of 5.8 km long dual-core fiber was measured to be below -75 dB at 1310 nm, and below -40 dB at 1550 nm. Both free-space optics fan-outs and tapered-fiber-coupler based MCF fan-outs were evaluated for the transmission system. Error-free and penalty-free 25 Gb/s bi-directional transmission performance was demonstrated for three different fiber lengths, 200 m, 2 km and 10 km, using the complete all-fiber-based system including connectors and fan-outs. This single mode, dual-core fiber transmission system adds complementary value to systems where additional increases in bandwidth density can come from wavelength division multiplexing and multiple bits per symbol.
High-performance parallel interface to synchronous optical network gateway

DOEpatents

St. John, Wallace B.; DuBois, David H.

1996-01-01

A system of sending and receiving gateways interconnects high speed data interfaces, e.g., HIPPI interfaces, through fiber optic links, e.g., a SONET network. An electronic stripe distributor distributes bytes of data from a first interface at the sending gateway onto parallel fiber optics of the fiber optic link to form transmitted data. An electronic stripe collector receives the transmitted data on the parallel fiber optics and reforms the data into a format effective for input to a second interface at the receiving gateway. Preferably, an error correcting syndrome is constructed at the sending gateway and sent with a data frame so that transmission errors can be detected and corrected in a real-time basis. Since the high speed data interface operates faster than any of the fiber optic links the transmission rate must be adapted to match the available number of fiber optic links so the sending and receiving gateways monitor the availability of fiber links and adjust the data throughput accordingly. In another aspect, the receiving gateway must have sufficient available buffer capacity to accept an incoming data frame. A credit-based flow control system provides for continuously updating the sending gateway on the available buffer capacity at the receiving gateway.

Reflectively Coupled Waveguide Photodetector for High Speed Optical Interconnection

PubMed Central

Hsu*, Shih-Hsiang

2010-01-01

To fully utilize GaAs high drift mobility, techniques to monolithically integrate In0.53Ga0.47As p-i-n photodetectors with GaAs based optical waveguides using total internal reflection coupling are reviewed. Metal coplanar waveguides, deposited on top of the polyimide layer for the photodetector’s planarization and passivation, were then uniquely connected as a bridge between the photonics and electronics to illustrate the high-speed monitoring function. The photodetectors were efficiently implemented and imposed on the echelle grating circle for wavelength division multiplexing monitoring. In optical filtering performance, the monolithically integrated photodetector channel spacing was 2 nm over the 1,520–1,550 nm wavelength range and the pass band was 1 nm at the −1 dB level. For high-speed applications the full-width half-maximum of the temporal response and 3-dB bandwidth for the reflectively coupled waveguide photodetectors were demonstrated to be 30 ps and 11 GHz, respectively. The bit error rate performance of this integrated photodetector at 10 Gbit/s with 27-1 long pseudo-random bit sequence non-return to zero input data also showed error-free operation. PMID:22163502
The Catalog Takes to the Highway.

ERIC Educational Resources Information Center

Chesbro, Melinda

1999-01-01

Discusses new developments in online library catalogs, including Web-based catalogs; interconnectivity within the library; interconnectivity between libraries; graphical user interfaces; pricing models; and a checklist of questions to ask when purchasing a new online catalog. (LRW)
A 1 GHz integrated circuit with carbon nanotube interconnects and silicon transistors.

PubMed

Close, Gael F; Yasuda, Shinichi; Paul, Bipul; Fujita, Shinobu; Wong, H-S Philip

2008-02-01

Due to their excellent electrical properties, metallic carbon nanotubes are promising materials for interconnect wires in future integrated circuits. Simulations have shown that the use of metallic carbon nanotube interconnects could yield more energy efficient and faster integrated circuits. The next step is to build an experimental prototype integrated circuit using carbon nanotube interconnects operating at high speed. Here, we report the fabrication of the first stand-alone integrated circuit combining silicon transistors and individual carbon nanotube interconnect wires on the same chip operating above 1 GHz. In addition to setting a milestone by operating above 1 GHz, this prototype is also a tool to investigate carbon nanotubes on a silicon-based platform at high frequencies, paving the way for future multi-GHz nanoelectronics.
Experimental evidence for a new single-event upset (SEU) mode in a CMOS SRAM obtained from model verification

NASA Technical Reports Server (NTRS)

Zoutendyk, J. A.; Smith, L. S.; Soli, G. A.; Lo, R. Y.

1987-01-01

Modeling of SEU has been done in a CMOS static RAM containing 1-micron-channel-length transistors fabricated from a p-well epilayer process using both circuit-simulation and numerical-simulation techniques. The modeling results have been experimentally verified with the aid of heavy-ion beams obtained from a three-stage tandem van de Graaff accelerator. Experimental evidence for a novel SEU mode in an ON n-channel device is presented.
Solar Particle Induced Upsets in the TDRS-1 Attitude Control System RAM During the October 1989 Solar Particle Events

NASA Technical Reports Server (NTRS)

Croley, D. R.; Garrett, H. B.; Murphy, G. B.; Garrard,T. L.

1995-01-01

The three large solar particle events, beginning on October 19, 1989 and lasting approximately six days, were characterized by high fluences of solar protons and heavy ions at 1 AU. During these events, an abnormally large number of upsets (243) were observed in the random access memory of the attitude control system (ACS) control processing electronics (CPE) on-board the geosynchronous TDRS-1 (Telemetry and Data Relay Satellite). The RAM unit affected was composed of eight Fairchild 93L422 memory chips. The Galileo spacecraft, launched on October 18, 1989 (one day prior to the solar particle events) observed the fluxes of heavy ions experienced by TDRS-1. Two solid-state detector telescopes on-board Galileo, designed to measure heavy ion species and energy, were turned on during time periods within each of the three separate events. The heavy ion data have been modeled and the time history of the events reconstructed to estimate heavy ion fluences. These fluences were converted to effective LET spectra after transport through the estimated shielding distribution around the TDRS-1 ACS system. The number of single event upsets (SEU) expected was calculated by integrating the measured cross section for the Fairchild 93L422 memory chip with average effective LET spectrum. The expected number of heavy ion induced SEU's calculated was 176. GOES-7 proton data, observed during the solar particle events, were used to estimate the number of proton-induced SEU's by integrating the proton fluence spectrum incident on the memory chips, with the two-parameter Bendel cross section for proton SEU'S. The proton fluence spectrum at the device level was gotten by transporting the protons through the estimated shielding distribution. The number of calculated proton-induced SEU's was 72, yielding a total of 248 predicted SEU'S, very dose to the 243 observed SEU'S. These calculations uniquely demonstrate the roles that solar heavy ions and protons played in the production of SEU's during the October 1989 solar particle events.
Self-assembly of three-dimensional interconnected graphene-based aerogels and its application in supercapacitors.

PubMed

Ji, Chen-Chen; Xu, Mao-Wen; Bao, Shu-Juan; Cai, Chang-Jun; Lu, Zheng-Jiang; Chai, Hui; Yang, Fan; Wei, Hua

2013-10-01

Homogeneously distributed self-assembling hybrid graphene-based aerogels with 3D interconnected pores, employing three types of carbohydrates (glucose, β-cyclodextrin, and chitosan), have been fabricated by a simple hydrothermal route. Using three types of carbohydrates as morphology oriented agents and reductants can effectively tailor the microstructures, physical properties, and electrochemical performances of the products. The effects of different carbohydrates on graphene oxide reduction to form graphene-based aerogels with different microcosmic morphologies and physical properties were also systemically discussed. The electrochemical behaviors of all graphene-based aerogel samples showed remarkably strong and stable performances, which indicated that all the 3D interpenetrating microstructure graphene-based aerogel samples with well-developed porous nanostructures and interconnected conductive networks could provide fast ionic channels for electrochemical energy storage. These results demonstrate that this strategy would offer an easy and effective way to fabricate graphene-based materials. Copyright © 2013 Elsevier Inc. All rights reserved.
A smart-pixel holographic competitive learning network

NASA Astrophysics Data System (ADS)

Slagle, Timothy Michael

Neural networks are adaptive classifiers which modify their decision boundaries based on feedback from externally- or internally-generated error signals. Optics is an attractive technology for neural network implementation because it offers the possibility of parallel, nearly instantaneous computation of the weighted neuron inputs by the propagation of light through the optical system. Using current optical device technology, system performance levels of 3 × 1011 connection updates per second can be achieved. This thesis presents an architecture for an optical competitive learning network which offers advantages over previous optical implementations, including smart-pixel-based optical neurons, phase- conjugate self-alignment of a single neuron plane, and high-density, parallel-access weight storage, interconnection, and learning in a volume hologram. The competitive learning algorithm with modifications for optical implementation is described, and algorithm simulations are performed for an example problem. The optical competitive learning architecture is then introduced. The optical system is simulated using the ``beamprop'' algorithm at the level of light propagating through the system components, and results showing competitive learning operation in agreement with the algorithm simulations are presented. The optical competitive learning requires a non-linear, non-local ``winner-take-all'' (WTA) neuron function. Custom-designed smart-pixel WTA neuron arrays were fabricated using CMOS VLSI/liquid crystal technology. Results of laboratory tests of the WTA arrays' switching characteristics, time response, and uniformity are then presented. The system uses a phase-conjugate mirror to write the self-aligning interconnection weight holograms, and energy gain is required from the reflection to minimize erasure of the existing weights. An experimental system for characterizing the PCM response is described. Useful gains of 20 were obtained with a polarization-multiplexed PCM readout, and gains of up to 60 were observed when a time-sequential read-out technique was used. Finally, the optical competitive learning laboratory system is described, including some necessary modifications to the previous architectures, and the data acquisition and control system developed for the system. Experimental results showing phase conjugation of the WTA outputs, holographic interconnect storage, associative storage between input images and WTA neuron outputs, and WTA array switching are presented, demonstrating the functions necessary for the operation of the optical learning system.
Novel optical interconnect devices and coupling methods applying self-written waveguide technology

NASA Astrophysics Data System (ADS)

Nakama, Kenichi; Mikami, Osamu

2011-05-01

For the use in cost-effective optical interconnection of opt-electronic printed wiring boards (OE-PWBs), we have developed novel optical interconnect devices and coupling methods simplifying board to board optical interconnect. All these are based on the self-written waveguide (SWW) technology by the mask-transfer method with light-curable resin. This method enables fabrication of arrayed M × N optical channels at one shot of UV light. Very precise patterns, as an example, optical rod with diameters of 50μm to 500μm, can be easily fabricated. The length of the fabricated patterns ,, typically up to about 1000μm , can be controlled by a spacer placed between the photomask and the substrate. Using these technologies, several new optical interfaces have been demonstrated. These are a chip VCSEL with an optical output rod and new coupling methods of "plug-in" alignment and "optical socket" based on SWW.
A SEU-Hard Flip-Flop for Antifuse FPGAs

NASA Technical Reports Server (NTRS)

Katz, R.; Wang, J. J.; McCollum, J.; Cronquist, B.; Chan, R.; Yu, D.; Kleyner, I.; Day, John H. (Technical Monitor)

2001-01-01

A single event upset (SEU)-hardened flip-flop has been designed and developed for antifuse Field Programmable Gate Array (FPGA) application. Design and application issues, testability, test methods, simulation, and results are discussed.
Research on SEU hardening of heterogeneous Dual-Core SoC

NASA Astrophysics Data System (ADS)

Huang, Kun; Hu, Keliu; Deng, Jun; Zhang, Tao

2017-08-01

The implementation of Single-Event Upsets (SEU) hardening has various schemes. However, some of them require a lot of human, material and financial resources. This paper proposes an easy scheme on SEU hardening for Heterogeneous Dual-core SoC (HD SoC) which contains three techniques. First, the automatic Triple Modular Redundancy (TMR) technique is adopted to harden the register heaps of the processor and the instruction-fetching module. Second, Hamming codes are used to harden the random access memory (RAM). Last, a software signature technique is applied to check the programs which are running on CPU. The scheme need not to consume additional resources, and has little influence on the performance of CPU. These technologies are very mature, easy to implement and needs low cost. According to the simulation result, the scheme can satisfy the basic demand of SEU-hardening.
Evidence for a distributed hierarchy of action representation in the brain

PubMed Central

Grafton, Scott T.; de C. Hamilton, Antonia F.

2007-01-01

Complex human behavior is organized around temporally distal outcomes. Behavioral studies based on tasks such as normal prehension, multi-step object use and imitation establish the existence of relative hierarchies of motor control. The retrieval errors in apraxia also support the notion of a hierarchical model for representing action in the brain. In this review, three functional brain imaging studies of action observation using the method of repetition suppression are used to identify a putative neural architecture that supports action understanding at the level of kinematics, object centered goals and ultimately, motor outcomes. These results, based on observation, may match a similar functional anatomic hierarchy for action planning and execution. If this is true, then the findings support a functional anatomic model that is distributed across a set of interconnected brain areas that are differentially recruited for different aspects of goal oriented behavior, rather than a homogeneous mirror neuron system for organizing and understanding all behavior. PMID:17706312
Clad metals by roll bonding for SOFC interconnects

NASA Astrophysics Data System (ADS)

Chen, L.; Jha, B.; Yang, Zhenguo; Xia, Guang-Guang; Stevenson, Jeffry W.; Singh, Prabhakar

2006-08-01

High-temperature oxidation-resistant alloys are currently considered as a candidate material for construction of interconnects in intermediate-temperature solid oxide fuel cells. Among these alloys, however, different groups of alloys demonstrate different advantages and disadvantages, and few, if any, can completely satisfy the stringent requirements for the application. To integrate the advantages and avoid the disadvantages of different groups of alloys, cladding has been proposed as one approach in fabricating metallic layered interconnect structures. To examine the feasibility of this approach, the austenitic Ni-base alloy Haynes 230 and the ferritic stainless steel AL 453 were selected as examples and manufactured into a clad metal. Its suitability as an interconnect construction material was investigated. This paper provides a brief overview of the cladding approach and discusses the viability of this technology to fabricate the metallic layered-structure interconnects.
High-performance parallel processors based on star-coupled wavelength division multiplexing optical interconnects

DOEpatents

Deri, Robert J.; DeGroot, Anthony J.; Haigh, Ronald E.

2002-01-01

As the performance of individual elements within parallel processing systems increases, increased communication capability between distributed processor and memory elements is required. There is great interest in using fiber optics to improve interconnect communication beyond that attainable using electronic technology. Several groups have considered WDM, star-coupled optical interconnects. The invention uses a fiber optic transceiver to provide low latency, high bandwidth channels for such interconnects using a robust multimode fiber technology. Instruction-level simulation is used to quantify the bandwidth, latency, and concurrency required for such interconnects to scale to 256 nodes, each operating at 1 GFLOPS performance. Performance scales have been shown to .apprxeq.100 GFLOPS for scientific application kernels using a small number of wavelengths (8 to 32), only one wavelength received per node, and achievable optoelectronic bandwidth and latency.
Total Ionizing Dose Influence on the Single-Event Upset Sensitivity of 130-nm PD SOI SRAMs

NASA Astrophysics Data System (ADS)

Zheng, Qiwen; Cui, Jiangwei; Liu, Mengxin; Zhou, Hang; Liu, Mohan; Wei, Ying; Su, Dandan; Ma, Teng; Lu, Wu; Yu, Xuefeng; Guo, Qi; He, Chengfa

2017-07-01

Effect of total ionizing dose (TID) on single-event upset (SEU) hardness of 130 nm partially depleted (PD) silicon-on-insulator (SOI) static random access memories (SRAMs) is investigated in this paper. The measurable synergistic effect of TID on SEU sensitivity of 130-nm PD SOI SRAM was observed in our experiment, even though that is far less than micrometer and submicrometer devices. Moreover, SEU cross section after TID irradiation has no dependence on the data pattern that was applied during TID exposure: SEU cross sections are characterized by TID data pattern and its complement data pattern are decreased consistently rather than a preferred state and a nonpreferred state as micrometer and sub-micrometer SRAMs. The memory cell test structure allowing direct measurement of static noise margin (SNM) under standby operation was designed using identical memory cell layout of SRAM. Direct measurement of the memory cell SNM shows that both data sides' SNM is decreased by TID, indicating that SEU cross section of 130-nm PD SOI SRAM will be increased by TID. And, the decreased SNM is caused by threshold shift in memory cell transistors induced by “radiation-induced narrow channel effect”.
3-D integrated heterogeneous intra-chip free-space optical interconnect.

PubMed

Ciftcioglu, Berkehan; Berman, Rebecca; Wang, Shang; Hu, Jianyun; Savidis, Ioannis; Jain, Manish; Moore, Duncan; Huang, Michael; Friedman, Eby G; Wicks, Gary; Wu, Hui

2012-02-13

This paper presents the first chip-scale demonstration of an intra-chip free-space optical interconnect (FSOI) we recently proposed. This interconnect system provides point-to-point free-space optical links between any two communication nodes, and hence constructs an all-to-all intra-chip communication fabric, which can be extended for inter-chip communications as well. Unlike electrical and other waveguide-based optical interconnects, FSOI exhibits low latency, high energy efficiency, and large bandwidth density, and hence can significantly improve the performance of future many-core chips. In this paper, we evaluate the performance of the proposed FSOI interconnect, and compare it to a waveguide-based optical interconnect with wavelength division multiplexing (WDM). It shows that the FSOI system can achieve significantly lower loss and higher energy efficiency than the WDM system, even with optimistic assumptions for the latter. A 1×1-cm2 chip prototype is fabricated on a germanium substrate with integrated photodetectors. Commercial 850-nm GaAs vertical-cavity-surface-emitting-lasers (VCSELs) and fabricated fused silica microlenses are 3-D integrated on top of the substrate. At 1.4-cm distance, the measured optical transmission loss is 5 dB, the crosstalk is less than -20 dB, and the electrical-to-electrical bandwidth is 3.3 GHz. The latter is mainly limited by the 5-GHz VCSEL.
Improvement of nursing students' learning outcomes through scenario-based skills training.

PubMed

Uysal, Nurcan

2016-08-08

this study analyzed the influence of scenario-based skills training on students' learning skills. the author evaluated the nursing skills laboratory exam papers of 605 sophomores in nursing programs for seven years. The study determined the common mistakes of students and the laboratory work was designed in a scenario-based format. The effectiveness of this method was evaluated by assessing the number of errors the students committed and their achievement scores in laboratory examinations. This study presents the students' common mistakes in intramuscular and subcutaneous injection and their development of intravenous access skills, included in the nursing skills laboratory examination. an analysis of the students' most common mistakes revealed that the most common was not following the principles of asepsis for all three skills (intramuscular, subcutaneous injection, intravenous access) in the first year of the scenario-based training. The students' exam achievement scores increased gradually, except in the fall semester of the academic year 2009-2010. The study found that the scenario-based skills training reduced students' common mistakes in examinations and enhanced their performance on exams. this method received a positive response from both students and instructors. The scenario-based training is available for use in addition to other skills training methods. en este estudio fue analizada la influencia de la capacitación basada en escenarios en las capacidades de aprendizaje de los alumnos. el autor evaluó los textos de exámenes de laboratorio de habilidades de enfermería producidos por 605 alumnos de segundo año en cursos de enfermería durante siete años. El estudio determinó los errores comunes de los alumnos y el trabajo en laboratorio adoptó el formato basado en escenarios. La eficacia de ese método fue evaluada mediante la cantidad de errores que los alumnos cometieron y sus notas de desempeño en exámenes de laboratorio. Este estudio presenta los errores comunes de los alumnos en la ejecución de inyecciones intramuscular y subcutánea y su desarrollo de capacidades de acceso intravenoso, tratadas en el examen de laboratorio de habilidades de enfermería. un análisis de los errores más comunes de los alumnos reveló que el más común fue el no seguimiento de los principios de asepsia para las tres habilidades ((intramuscular, inyección subcutánea, acceso intravenoso) en el primer año de la capacitación basada en escenarios. Las notas de desempeño de los alumnos en la prueba aumentaron gradualmente, excepto en el semestre de otoño del año académico 2009-2010. Fue observado que la capacitación basada en escenarios redujo los errores comunes de los alumnos en los exámenes y aumentó su desempeño en las pruebas. tanto los alumnos como los profesores respondieron positivamente a ese método. La capacitación basada en escenarios está disponible para uso en combinación con otros métodos de capacitación. neste estudo se analisou a influência da formação de capacidades baseada em cenários nas capacidades de aprendizagem de alunos. o autor avaliou os textos de exames de laboratório de habilidades de enfermagem produzidos por 605 alunos de segundo ano em cursos de enfermagem durante sete anos. O estudo determinou os erros comuns dos alunos e o trabalho em laboratório adotou o formato baseado em cenários. A eficácia desse método foi avaliada mediante o número de erros que os alunos cometeram e suas notas de desempenho em exames de laboratório. Este estudo apresenta os erros comuns dos alunos na execução de injeções intramuscular e subcutânea e seu desenvolvimento de habilidades de acesso intravenoso, tratadas no exame de laboratório de habilidades de enfermagem. uma análise dos erros mais comuns dos alunos revelou que o mais comum foi o não seguimento dos princípios de assepsia para as três habilidades (intramuscular, injeção subcutânea, acesso intravenoso) no primeiro ano da capacitação baseada em cenários. As notas de desempenho dos alunos no exame aumentaram gradualmente, exceto no semestre de outono do ano académico 2009-2010. Observou-se que a capacitação baseada em cenários reduziu os erros comuns dos alunos nos exames e aumentou seu desempenho nas provas. tanto os alunos como os professores responderam positivamente a esse método. A capacitação baseada em cenários está disponível para uso em combinação com outros métodos de capacitação.
The Single Event Upset (SEU) response to 590 MeV protons

NASA Technical Reports Server (NTRS)

Nichols, D. K.; Price, W. E.; Smith, L. S.; Soli, G. A.

1984-01-01

The presence of high-energy protons in cosmic rays, solar flares, and trapped radiation belts around Jupiter poses a threat to the Galileo project. Results of a test of 10 device types (including 1K RAM, 4-bit microP sequencer, 4-bit slice, 9-bit data register, 4-bit shift register, octal flip-flop, and 4-bit counter) exposed to 590 MeV protons at the Swiss Institute of Nuclear Research are presented to clarify the picture of SEU response to the high-energy proton environment of Jupiter. It is concluded that the data obtained should remove the concern that nuclear reaction products generated by protons external to the device can cause significant alteration in the device SEU response. The data also show only modest increases in SEU cross section as proton energies are increased up to the upper limits of energy for both the terrestrial and Jovian trapped proton belts.
Motion control of nonlinear gantry crane system via priority-based fitness scheme in firefly algorithm

NASA Astrophysics Data System (ADS)

Jaafar, Hazriq Izzuan; Latif, Norfaneysa Abd; Kassim, Anuar Mohamed; Abidin, Amar Faiz Zainal; Hussien, Sharifah Yuslinda Syed; Aras, Mohd Shahrieel Mohd

2015-05-01

Advanced manufacturing technology made Gantry Crane System (GCS) is one of the suitable heavy machinery transporters and frequently employed in handling with huge materials. The interconnection of trolley movement and payload oscillation has a technical impact which needs to be considered. Once the trolley moves to the desired position with high speed, this will induce undesirable's payload oscillation. This frequent unavoidable load swing causes an efficiency drop, load damages and even accidents. In this paper, a new control strategy of Firefly Algorithm (FA) will be developed to obtain five optimal controller parameters (PID and PD) via Priority-based Fitness Scheme (PFS). Combinations of these five parameters are utilized for controlling trolley movement and minimizing the angle of payload oscillation. This PFS is prioritized based on steady-state error (SSE), overshoot (OS) and settling time (Ts) according to the needs and circumstances. Lagrange equation will be chosen for modeling and simulation will be conducted by using related software. Simulation results show that the proposed control strategy is efficient to control the trolley movement to the desired position and minimize the angle of payload oscillation.
Wavelength-addressed intra-board optical interconnection by plug-in alignment with a micro hole array

NASA Astrophysics Data System (ADS)

Nakama, Kenichi; Tokiwa, Yuu; Mikami, Osamu

2010-09-01

Intra-board interconnection between optical waveguide channels is suitable for assembling high-speed optoelectronic printed wiring boards (OE-PWB). Here, we propose a novel optical interconnection method combining techniques for both wavelength-based optical waveguide addressing and plug-in optical waveguide alignment with a micro-hole array (MHA). This array was fabricated by the mask transfer method. For waveguide addressing, we used a micro passive wavelength selector (MPWS) module, which is a type of Littrow mount monochromator consisting of an optical diffraction grating, a focusing lens, and the MHA. From the experimental results, we found that the wavelength addressing operation of the MPWS module was effective for intra-board optical interconnection.
Optically interconnected phased arrays

NASA Technical Reports Server (NTRS)

Bhasin, Kul B.; Kunath, Richard R.

1988-01-01

Phased-array antennas are required for many future NASA missions. They will provide agile electronic beam forming for communications and tracking in the range of 1 to 100 GHz. Such phased arrays are expected to use several hundred GaAs monolithic integrated circuits (MMICs) as transmitting and receiving elements. However, the interconnections of these elements by conventional coaxial cables and waveguides add weight, reduce flexibility, and increase electrical interference. Alternative interconnections based on optical fibers, optical processing, and holography are under evaluation as possible solutions. In this paper, the current status of these techniques is described. Since high-frequency optical components such as photodetectors, lasers, and modulators are key elements in these interconnections, their performance and limitations are discussed.

Real-time validation of receiver state information in optical space-time block code systems.

PubMed

Alamia, John; Kurzweg, Timothy

2014-06-15

Free space optical interconnect (FSOI) systems are a promising solution to interconnect bottlenecks in high-speed systems. To overcome some sources of diminished FSOI performance caused by close proximity of multiple optical channels, multiple-input multiple-output (MIMO) systems implementing encoding schemes such as space-time block coding (STBC) have been developed. These schemes utilize information pertaining to the optical channel to reconstruct transmitted data. The STBC system is dependent on accurate channel state information (CSI) for optimal system performance. As a result of dynamic changes in optical channels, a system in operation will need to have updated CSI. Therefore, validation of the CSI during operation is a necessary tool to ensure FSOI systems operate efficiently. In this Letter, we demonstrate a method of validating CSI, in real time, through the use of moving averages of the maximum likelihood decoder data, and its capacity to predict the bit error rate (BER) of the system.
Small-Signal Analysis of Autonomous Hybrid Distributed Generation Systems in Presence of Ultracapacitor and Tie-Line Operation

NASA Astrophysics Data System (ADS)

Ray, Prakash K.; Mohanty, Soumya R.; Kishor, Nand

2010-07-01

This paper presents small-signal analysis of isolated as well as interconnected autonomous hybrid distributed generation system for sudden variation in load demand, wind speed and solar radiation. The hybrid systems comprise of different renewable energy resources such as wind, photovoltaic (PV) fuel cell (FC) and diesel engine generator (DEG) along with the energy storage devices such as flywheel energy storage system (FESS) and battery energy storage system (BESS). Further ultracapacitors (UC) as an alternative energy storage element and interconnection of hybrid systems through tie-line is incorporated into the system for improved performance. A comparative assessment of deviation of frequency profile for different hybrid systems in the presence of different storage system combinations is carried out graphically as well as in terms of the performance index (PI), ie integral square error (ISE). Both qualitative and quantitative analysis reflects the improvements of the deviation in frequency profiles in the presence of the ultracapacitors (UC) as compared to other energy storage elements.
The Chemical Modeling of Electronic Materials and Interconnections

NASA Astrophysics Data System (ADS)

Kivilahti, J. K.

2002-12-01

Thermodynamic and kinetic modeling, together with careful experimental work, is of great help for developing new electronic materials such as lead-free solders, their compatible metallizations and diffusion-barrier layers, as well as joining and bonding processes for advanced electronics manufacturing. When combined, these modeling techniques lead to a rationalization of the trial-and-error methods employed in the electronics industry, limiting experimentation and, thus, reducing significantly time-to-market of new products. This modeling provides useful information on the stabilities of phases (microstructures), driving forces for chemical reactions, and growth rates of reaction products occurring in interconnections or thin-film structures during processing, testing, and in longterm use of electronic devices. This is especially important when manufacturing advanced lead-free electronics where solder joint volumes are decreasing while the number of dissimilar reactive materials is increasing markedly. Therefore, a new concept of local nominal composition was introduced and applied together with the relevant ternary and multicomponent phase diagrams to some solder/conductor systems.
Agent-Based Simulation for Interconnection-Scale Renewable Integration and Demand Response Studies

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chassin, David P.; Behboodi, Sahand; Crawford, Curran

This paper collects and synthesizes the technical requirements, implementation, and validation methods for quasi-steady agent-based simulations of interconnectionscale models with particular attention to the integration of renewable generation and controllable loads. Approaches for modeling aggregated controllable loads are presented and placed in the same control and economic modeling framework as generation resources for interconnection planning studies. Model performance is examined with system parameters that are typical for an interconnection approximately the size of the Western Electricity Coordinating Council (WECC) and a control area about 1/100 the size of the system. These results are used to demonstrate and validate the methodsmore » presented.« less
The Linked System Project : a network interconnection project between three major bibliographic utilities and LC

NASA Astrophysics Data System (ADS)

Kurihara, Shin'ichi

The Linked Systems Project (LSP) is the first network project based on the Open Systems Interconnection (OSI) in the world. The purpose of the project is to interconnect between three major bibliographic utilities and LC, and to perform as one system on the whole. The first application developed for the LSP is the sharing of name authority data based on the Name Authority Cooperative (NACO) Project. In 1985, LC began to send name authority records to RLG/RLIN. Since 1987, RLG/RLIN and OCLC send name authority records to LC. Bibliographic records will be sent mutually between three major bibliographic utilities and LC near future.
Agent-Based Simulation for Interconnection-Scale Renewable Integration and Demand Response Studies

DOE PAGES

Chassin, David P.; Behboodi, Sahand; Crawford, Curran; ...

2015-12-23

This paper collects and synthesizes the technical requirements, implementation, and validation methods for quasi-steady agent-based simulations of interconnectionscale models with particular attention to the integration of renewable generation and controllable loads. Approaches for modeling aggregated controllable loads are presented and placed in the same control and economic modeling framework as generation resources for interconnection planning studies. Model performance is examined with system parameters that are typical for an interconnection approximately the size of the Western Electricity Coordinating Council (WECC) and a control area about 1/100 the size of the system. These results are used to demonstrate and validate the methodsmore » presented.« less
Comparative Assessment of Tactics to Improve Primary Frequency Response Without Curtailing Solar Output in High Photovoltaic Interconnection Grids

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tan, Jin; Zhang, Yingchen; You, Shutang

Power grid primary frequency response will be significantly impaired by Photovoltaic (PV) penetration increase because of the decrease in inertia and governor response. PV inertia and governor emulation requires reserving PV output and leads to solar energy waste. This paper exploits current grid resources and explores energy storage for primary frequency response under high PV penetration at the interconnection level. Based on the actual models of the U.S. Eastern Interconnection grid and the Texas grid, effects of multiple factors associated with primary frequency response, including the governor ratio, governor deadband, droop rate, fast load response. are assessed under high PVmore » penetration scenarios. In addition, performance of batteries and supercapacitors using different control strategies is studied in the two interconnections. The paper quantifies the potential of various resources to improve interconnection-level primary frequency response under high PV penetration without curtailing solar output.« less
Advanced Platform for Development and Evaluation of Grid Interconnection Systems Using Hardware-in-the-Loop: Part III -- Grid Interconnection System Evaluator: Preprint

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lundstrom, B.; Shirazi, M.; Coddington, M.

2013-01-01

This paper, presented at the IEEE Green Technologies Conference 2013, describes a Grid Interconnection System Evaluator (GISE) that leverages hardware-in-the-loop (HIL) simulation techniques to rapidly evaluate the grid interconnection standard conformance of an ICS according to the procedures in IEEE Std 1547.1 (TM). The architecture and test sequencing of this evaluation tool, along with a set of representative ICS test results from three different photovoltaic (PV) inverters, are presented. The GISE adds to the National Renewable Energy Laboratory's (NREL) evaluation platform that now allows for rapid development of ICS control algorithms using controller HIL (CHIL) techniques, the ability to testmore » the dc input characteristics of PV-based ICSs through the use of a PV simulator capable of simulating real-world dynamics using power HIL (PHIL), and evaluation of ICS grid interconnection conformance.« less
Advanced Platform for Development and Evaluation of Grid Interconnection Systems Using Hardware-in-the-Loop: Part III - Grid Interconnection System Evaluator

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lundstrom, B.; Shirazi, M.; Coddington, M.

2013-01-01

This paper describes a Grid Interconnection System Evaluator (GISE) that leverages hardware-in-the-loop (HIL) simulation techniques to rapidly evaluate the grid interconnection standard conformance of an ICS according to the procedures in IEEE Std 1547.1. The architecture and test sequencing of this evaluation tool, along with a set of representative ICS test results from three different photovoltaic (PV) inverters, are presented. The GISE adds to the National Renewable Energy Laboratory's (NREL) evaluation platform that now allows for rapid development of ICS control algorithms using controller HIL (CHIL) techniques, the ability to test the dc input characteristics of PV-based ICSs through themore » use of a PV simulator capable of simulating real-world dynamics using power HIL (PHIL), and evaluation of ICS grid interconnection conformance.« less
Probabilistic immortality of Cu damascene interconnects

NASA Astrophysics Data System (ADS)

Hau-Riege, Stefan P.

2002-02-01

We have studied electromigration short-line effects in Cu damascene interconnects through experiments on lines of various lengths L, stressed at a variety of current densities j, and embedded in different dielectric materials. We observed two modes of resistance evolution: Either the resistance of the lines remains constant for the duration of the test, so that the lines are considered immortal, or the lines fail due to abrupt open-circuit failure. The resistance was not observed to gradually increase and then saturate, as commonly observed in Al-based interconnects, because the barrier is too thin and resistive to serve as a redundant current path should voiding occur. The critical stress for void nucleation was found to be smaller than 41 MPa, since voiding occurred even under the mildest test conditions of j=2 MA/cm2 and L=10.5 μm at 300 °C. A small fraction of short Cu lines failed even at low current densities, which deems necessary a concept of probabilistic immortality rather than deterministic immortality. Experiments and modeling suggest that the probability of immortality is described by (jL2/B), where B is the effective elastic modulus of the metallization scheme. By contrast, the immortality of Al-based interconnects with shunt layers is described by (jL) if no voids nucleate, and (jL/B) if voids do nucleate. Even though the phenomenology of short-line effects differs for Al- and Cu-based interconnects, the immortality of interconnects of either materials system can be explained by the phenomena of nucleation barriers for void formation and void-growth saturation. The differences are due solely to the absence of a shunt layer and the low critical stress for void nucleation in the case of Cu.
Reactions in Electrodeposited Cu/Sn and Cu/Ni/Sn Nanoscale Multilayers for Interconnects

PubMed Central

Chia, Pay Ying; Haseeb, A. S. M. A.; Mannan, Samjid Hassan

2016-01-01

Miniaturization of electronic devices has led to the development of 3D IC packages which require ultra-small-scale interconnections. Such small interconnects can be completely converted into Cu-Sn based intermetallic compounds (IMCs) after reflow. In an effort to improve IMC based interconnects, an attempt is made to add Ni to Cu-Sn-based IMCs. Multilayer interconnects consisting of stacks of Cu/Sn/Cu/Sn/Cu or Cu/Ni/Sn/Ni/Sn/Cu/Ni/Sn/Ni/Cu with Ni = 35 nm, 70 nm, and 150 nm were electrodeposited sequentially using copper pyrophosphate, tin methanesulfonic, and nickel Watts baths, respectively. These multilayer interconnects were investigated under room temperature aging conditions and for solid-liquid reactions, where the samples were subjected to 250 °C reflow for 60 s and also 300 °C for 3600 s. The progress of the reaction in the multilayers was monitored by using X-ray Diffraction, Scanning Electron Microscope, and Energy dispersive X-ray Spectroscopy. FIB-milled samples were also prepared for investigation under room temperature aging conditions. Results show that by inserting a 70 nanometres thick Ni layer between copper and tin, premature reaction between Cu and Sn at room temperature can be avoided. During short reflow, the addition of Ni suppresses formation of Cu3Sn IMC. With increasing Ni thickness, Cu consumption is decreased and Ni starts acting as a barrier layer. On the other hand, during long reflow, two types of IMC were found in the Cu/Ni/Sn samples which are the (Cu,Ni)6Sn5 and (Cu,Ni)3Sn, respectively. Details of the reaction sequence and mechanisms are discussed. PMID:28773552
Scaling induced performance challenges/limitations of on-chip metal interconnects and comparisons with optical interconnects

NASA Astrophysics Data System (ADS)

Kapur, Pawan

The miniaturization paradigm for silicon integrated circuits has resulted in a tremendous cost and performance advantage. Aggressive shrinking of devices provides faster transistors and a greater functionality for circuit design. However, scaling induced smaller wire cross-sections coupled with longer lengths owing to larger chip areas, result in a steady deterioration of interconnects. This degradation in interconnect trends threatens to slow down the rapid growth along Moore's law. This work predicts that the situation is worse than anticipated. It shows that in the light of technology and reliability constraints, scaling induced increase in electron surface scattering, fractional cross section area occupied by the highly resistive barrier, and realistic interconnect operation temperature will lead to a significant rise in effective resistivity of modern copper based interconnects. We start by discussing various technology factors affecting copper resistivity. We, next, develop simulation tools to model these effects. Using these tools, we quantify the increase in realistic copper resistivity as a function of future technology nodes, under various technology assumptions. Subsequently, we evaluate the impact of these technology effects on delay and power dissipation of global signaling interconnects. Modern long on-chip wires use repeaters, which dramatically improves their delay and bandwidth. We quantify the repeated wire delays and power dissipation using realistic resistance trends at future nodes. With the motivation of reducing power, we formalize a methodology, which trades power with delay very efficiently for repeated wires. Using this method, we find that although the repeater power comes down, the total power dissipation due to wires is still found to be very large at future nodes. Finally, we explore optical interconnects as a possible substitute, for specific interconnect applications. We model an optical receiver and waveguides. Using this we assess future optical system performance. Finally, we compare the delay and power of future metal interconnects with that of optical interconnects for global signaling application. We also compare the power dissipation of the two approaches for an upper level clock distribution application. We find that for long on-chip communication links, optical interconnects have lower latencies than future metal interconnects at comparable levels of power dissipation.
Chip-scale integrated optical interconnects: a key enabler for future high-performance computing

NASA Astrophysics Data System (ADS)

Haney, Michael; Nair, Rohit; Gu, Tian

2012-01-01

High Performance Computing (HPC) systems are putting ever-increasing demands on the throughput efficiency of their interconnection fabrics. In this paper, the limits of conventional metal trace-based inter-chip interconnect fabrics are examined in the context of state-of-the-art HPC systems, which currently operate near the 1 GFLOPS/W level. The analysis suggests that conventional metal trace interconnects will limit performance to approximately 6 GFLOPS/W in larger HPC systems that require many computer chips to be interconnected in parallel processing architectures. As the HPC communications bottlenecks push closer to the processing chips, integrated Optical Interconnect (OI) technology may provide the ultra-high bandwidths needed at the inter- and intra-chip levels. With inter-chip photonic link energies projected to be less than 1 pJ/bit, integrated OI is projected to enable HPC architecture scaling to the 50 GFLOPS/W level and beyond - providing a path to Peta-FLOPS-level HPC within a single rack, and potentially even Exa-FLOPSlevel HPC for large systems. A new hybrid integrated chip-scale OI approach is described and evaluated. The concept integrates a high-density polymer waveguide fabric directly on top of a multiple quantum well (MQW) modulator array that is area-bonded to the Silicon computing chip. Grayscale lithography is used to fabricate 5 μm x 5 μm polymer waveguides and associated novel small-footprint total internal reflection-based vertical input/output couplers directly onto a layer containing an array of GaAs MQW devices configured to be either absorption modulators or photodetectors. An external continuous wave optical "power supply" is coupled into the waveguide links. Contrast ratios were measured using a test rider chip in place of a Silicon processing chip. The results suggest that sub-pJ/b chip-scale communication is achievable with this concept. When integrated into high-density integrated optical interconnect fabrics, it could provide a seamless interconnect fabric spanning the intra-
The Development of an IMU Integrated Clothes for Postural Monitoring Using Conductive Yarn and Interconnecting Technology

PubMed Central

Kang, Sung-Won; Park, Hyung-Il; Choi, Byoung-Gun; Shin, Dongjun; Jung, Young-Giu; Lee, Jun-Young; Park, Hong-Won; Park, Sukyung

2017-01-01

Spinal disease is a common yet important condition that occurs because of inappropriate posture. Prevention could be achieved by continuous posture monitoring, but most measurement systems cannot be used in daily life due to factors such as burdensome wires and large sensing modules. To improve upon these weaknesses, we developed comfortable “smart wear” for posture measurement using conductive yarn for circuit patterning and a flexible printed circuit board (FPCB) for interconnections. The conductive yarn was made by twisting polyester yarn and metal filaments, and the resistance per unit length was about 0.05 Ω/cm. An embroidered circuit was made using the conductive yarn, which showed increased yield strength and uniform electrical resistance per unit length. Circuit networks of sensors and FPCBs for interconnection were integrated into clothes using a computer numerical control (CNC) embroidery process. The system was calibrated and verified by comparing the values measured by the smart wear with those measured by a motion capture camera system. Six subjects performed fixed movements and free computer work, and, with this system, we were able to measure the anterior/posterior direction tilt angle with an error of less than 4°. The smart wear does not have excessive wires, and its structure will be optimized for better posture estimation in a later study. PMID:29112125
High-speed highly temperature stable 980 nm VCSELs operating at 25 Gb/s at up to 85 °C for short reach optical interconnects

NASA Astrophysics Data System (ADS)

Mutig, Alex; Lott, James A.; Blokhin, Sergey A.; Moser, Philip; Wolf, Philip; Hofmann, Werner; Nadtochiy, Alexey M.; Bimberg, Dieter

2011-03-01

The progressive penetration of optical communication links into traditional copper interconnect markets greatly expands the applications of vertical cavity surface emitting lasers (VCSELs) for the next-generation of board-to-board, moduleto- module, chip-to-chip, and on-chip optical interconnects. Stability of the VCSEL parameters at high temperatures is indispensable for such applications, since these lasers typically reside directly on or near integrated circuit chips. Here we present 980 nm oxide-confined VCSELs operating error-free at bit rates up to 25 Gbit/s at temperatures as high as 85 °C without adjustment of the drive current and peak-to-peak modulation voltage. The driver design is therefore simplified and the power consumption of the driver electronics is lowered, reducing the production and operational costs. Small and large signal modulation experiments at various temperatures from 20 up to 85 °C for lasers with different oxide aperture diameters are presented in order to analyze the physical processes controlling the performance of the VCSELs. Temperature insensitive maximum -3 dB bandwidths of around 13-15 GHz for VCSELs with aperture diameters of 10 μm and corresponding parasitic cut-off frequencies exceeding 22 GHz are observed. Presented results demonstrate the suitability of our VCSELs for practical high speed and high temperature stable short-reach optical links.
Analysis of Effective Interconnectivity of DegraPol-foams Designed for Negative Pressure Wound Therapy

PubMed Central

Milleret, Vincent; Bittermann, Anne Greet; Mayer, Dieter; Hall, Heike

2009-01-01

Many wounds heal slowly and are difficult to manage. Therefore Negative Pressure Wound Therapy (NPWT) was developed where polymer foams are applied and a defined negative pressure removes wound fluid, reduces bacterial burden and increases the formation of granulation tissue. Although NPWT is used successfully, its mechanisms are not well understood. In particular, different NPWT dressings were never compared. Here a poly-ester urethane Degrapol® (DP)-foam was produced and compared with commercially available dressings (polyurethane-based and polyvinyl-alcohol-based) in terms of apparent pore sizes, swelling and effective interconnectivity of foam pores. DP-foams contain relatively small interconnected pores; PU-foams showed large pore size and interconnectivity; whereas PVA-foams displayed heterogeneous and poorly interconnected pores. PVA-foams swelled by 40 %, whereas DP- and PU-foams remained almost without swelling. Effective interconnectivity was investigated by submitting fluorescent beads of 3, 20 and 45 μm diameter through the foams. DP- and PU-foams removed 70-90 % of all beads within 4 h, independent of the bead diameter or bead pre-adsorption with serum albumin. For PVA-foams albumin pre-adsorbed beads circulated longer, where 20 % of 3 μm and 10 % of 20 μm diameter beads circulated after 96 h. The studies indicate that efficient bead perfusion does not only depend on pore size and swelling capacity, but effective interconnectivity might also depend on chemical composition of the foam itself. In addition due to the efficient sieve-effect of the foams uptake of wound components in vivo might occur only for short time suggesting other mechanisms being decisive for success of NPWT.
Simulation of SEU Cross-sections using MRED under Conditions of Limited Device Information

NASA Technical Reports Server (NTRS)

Lauenstein, J. M.; Reed, R. A.; Weller, R. A.; Mendenhall, M. H.; Warren, K. M.; Pellish, J. A.; Schrimpf, R. D.; Sierawski, B. D.; Massengill, L. W.; Dodd, P. E.;

2007-01-01

This viewgraph presentation reviews the simulation of Single Event Upset (SEU) cross sections using the membrane electrode assembly (MEA) resistance and electrode diffusion (MRED) tool using "Best guess" assumptions about the process and geometry, and direct ionization, low-energy beam test results. This work will also simulate SEU cross-sections including angular and high energy responses and compare the simulated results with beam test data for the validation of the model. Using MRED, we produced a reasonably accurate upset response model of a low-critical charge SRAM without detailed information about the circuit, device geometry, or fabrication process

Gamma irradiation induced method in preparation of Gd2O2S:Eu3+ phosphors: the effect of dose towards luminescent properties

NASA Astrophysics Data System (ADS)

Rahim, S.; Hasim, M. H.; Ayob, M. T. M.; Rahman, I. A.; Radiman, S.

2018-01-01

A novel gamma irradiation induced synthesis method of Gd2O2S:Eu3+ phosphors was investigated in the presence of cetyltrimethylammonium bromide (CTAB). The effect of irradiation doses (50-150kGy) on structural and morphology analysis as well as luminescence properties were characterized by X-ray diffraction (XRD), field emission scanning microscopy (FESEM) and photoluminescence spectrometer (PL). The results show that gamma radiation is potentially induced formation of Gd2O2S:Eu3+ phosphors from radiation reduction and/or precipitation of insoluble compounds as the hexagonal phase structure was formed without any impurities as proven in XRD pattern. The morphologies were observed that the obtained Gd2O2S:Eu3+ phosphors possess sphere structure with smooth surface at 100 kGy irradiated dose. PL spectroscopy reveals that the strongest red emission peaks is located at 626 nm under 325 nm light excitation, which corresponds to 5D0→7F2 transition of Eu3+ ions. An optimized dose for excellent luminescent was observed at 100 kGy. The results suggested that the Gd2O2S:Eu3+ phosphors may have a beneficial approach in field of imaging device or media.
Trust and Reputation Management for Critical Infrastructure Protection

NASA Astrophysics Data System (ADS)

Caldeira, Filipe; Monteiro, Edmundo; Simões, Paulo

Today's Critical Infrastructures (CI) depend of Information and Communication Technologies (ICT) to deliver their services with the required level of quality and availability. ICT security plays a major role in CI protection and risk prevention for single and also for interconnected CIs were cascading effects might occur because of the interdependencies that exist among different CIs. This paper addresses the problem of ICT security in interconnected CIs. Trust and reputation management using the Policy Based Management paradigm is the proposed solution to be applied at the CI interconnection points for information exchange. The proposed solution is being applied to the Security Mediation Gateway being developed in the European FP7 MICIE project, to allow for information exchange among interconnected CIs.
Importance of ion energy on SEU in CMOS SRAMs

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dodd, P.E.; Shaneyfelt, M.R.; Sexton, F.W.

1998-03-01

The single-event upset (SEU) responses of 16 Kbit to 1 Mbit SRAMs irradiated with low and high-energy heavy ions are reported. Standard low-energy heavy ion tests appear to be sufficiently conservative for technologies down to 0.5 {micro}m.

Authentication in Virtual Organizations: A Reputation Based PKI Interconnection Model

NASA Astrophysics Data System (ADS)

Wazan, Ahmad Samer; Laborde, Romain; Barrere, Francois; Benzekri, Abdelmalek

Authentication mechanism constitutes a central part of the virtual organization work. The PKI technology is used to provide the authentication in each organization involved in the virtual organization. Different trust models are proposed to interconnect the different PKIs in order to propagate the trust between them. While the existing trust models contain many drawbacks, we propose a new trust model based on the reputation of PKIs.
Advances in Pb-free solder microstructure control and interconnect design

DOE PAGES

Reeve, Kathlene N.; Holaday, John R.; Choquette, Stephanie M.; ...

2016-06-09

New electronics applications demanding enhanced performance and higher operating temperatures have led to continued research in the field of Pb-free solder designs and interconnect solutions. In this paper, recent advances in the microstructural design of Pb-free solders and interconnect systems were discussed by highlighting two topics: increasing β-Sn nucleation in Sn-based solders, and isothermally solidified interconnects using transient liquid phases. Issues in β-Sn nucleation in Sn-based solders were summarized in the context of Swenson’s 2007 review of the topic. Recent advancements in the areas of alloy composition manipulation, nucleating heterogeneities, and rapid solidification were discussed, and a proposal based onmore » a multi-faceted solidification approach involving the promotion of constitutional undercooling and nucleating heterogeneities was outlined for future research. The second half of the paper analyzed two different approaches to liquid phase diffusion bonding as a replacement for high-Pb solders, one based on the application of the pseudo-binary Cu-Ni-Sn ternary system, and the other on a proposed thermodynamic framework for identifying potential ternary alloys for liquid phase diffusion bonding. Furthermore, all of the concepts reviewed relied upon the fundamentals of thermodynamics, kinetics, and solidification, to which Jack Smith substantially contributed during his scientific career.« less
Oxidation of interconnect alloys in an electric field

DOE Office of Scientific and Technical Information (OSTI.GOV)

Holcomb, G.R.; Alman, D.E.; Adler, T.A.

The effect of an electric field on the oxidation of interconnect alloys was examined with a representative array of materials: an iron-base ferritic chromia former (E-brite), an iron-base ferritic chromia former with Mn and La (Crofer 22APU), a nickel-base chromia former (IN-718), and a nickelbase chromia former with Mn and La (Haynes 230). Environmental variables include temperature and oxygen partial pressure. The resulting scales were examined to determine if applied electrical current induces changes in mechanism or scale growth kinetics.
CMOS plasmonics in WDM data transmission: 200 Gb/s (8 × 25Gb/s) transmission over aluminum plasmonic waveguides.

PubMed

Dabos, G; Manolis, A; Papaioannou, S; Tsiokos, D; Markey, L; Weeber, J-C; Dereux, A; Giesecke, A L; Porschatis, C; Chmielak, B; Pleros, N

2018-05-14

We demonstrate wavelength-division-multiplexed (WDM) 200 Gb/s (8 × 25 Gb/s) data transmission over 100 μm long aluminum (Al) surface-plasmon-polariton (SPP) waveguides on a Si 3 N 4 waveguide platform at telecom wavelengths. The Al SPP waveguide was evaluated in terms of signal integrity by performing bit-error-rate (BER) measurements that revealed error-free operation for all eight 25 Gb/s non-return-to-zero (NRZ) modulated data channels with power penalties not exceeding 0.2 dB at 10 -9 . To the best of our knowledge, this is the first demonstration of WDM enabled data transmission over complementary-metal-oxide-semiconductor (CMOS) SPP waveguides fueling future development of CMOS compatible plasmo-photonic devices for on-chip optical interconnections.
Polymer-based platform for microfluidic systems

DOEpatents

Benett, William [Livermore, CA; Krulevitch, Peter [Pleasanton, CA; Maghribi, Mariam [Livermore, CA; Hamilton, Julie [Tracy, CA; Rose, Klint [Boston, MA; Wang, Amy W [Oakland, CA

2009-10-13

A method of forming a polymer-based microfluidic system platform using network building blocks selected from a set of interconnectable network building blocks, such as wire, pins, blocks, and interconnects. The selected building blocks are interconnectably assembled and fixedly positioned in precise positions in a mold cavity of a mold frame to construct a three-dimensional model construction of a microfluidic flow path network preferably having meso-scale dimensions. A hardenable liquid, such as poly (dimethylsiloxane) is then introduced into the mold cavity and hardened to form a platform structure as well as to mold the microfluidic flow path network having channels, reservoirs and ports. Pre-fabricated elbows, T's and other joints are used to interconnect various building block elements together. After hardening the liquid the building blocks are removed from the platform structure to make available the channels, cavities and ports within the platform structure. Microdevices may be embedded within the cast polymer-based platform, or bonded to the platform structure subsequent to molding, to create an integrated microfluidic system. In this manner, the new microfluidic platform is versatile and capable of quickly generating prototype systems, and could easily be adapted to a manufacturing setting.
Incorporating Probability Models of Complex Test Structures to Perform Technology Independent FPGA Single Event Upset Analysis

NASA Technical Reports Server (NTRS)

Berg, M. D.; Kim, H. S.; Friendlich, M. A.; Perez, C. E.; Seidlick, C. M.; LaBel, K. A.

2011-01-01

We present SEU test and analysis of the Microsemi ProASIC3 FPGA. SEU Probability models are incorporated for device evaluation. Included is a comparison to the RTAXS FPGA illustrating the effectiveness of the overall testing methodology.
Origin of high photoconductive gain in fully transparent heterojunction nanocrystalline oxide image sensors and interconnects.

PubMed

Jeon, Sanghun; Song, Ihun; Lee, Sungsik; Ryu, Byungki; Ahn, Seung-Eon; Lee, Eunha; Kim, Young; Nathan, Arokia; Robertson, John; Chung, U-In

2014-11-05

A technique for invisible image capture using a photosensor array based on transparent conducting oxide semiconductor thin-film transistors and transparent interconnection technologies is presented. A transparent conducting layer is employed for the sensor electrodes as well as interconnection in the array, providing about 80% transmittance at visible-light wavelengths. The phototransistor is a Hf-In-Zn-O/In-Zn-O heterostructure yielding a high quantum-efficiency in the visible range. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
High-performance parallel interface to synchronous optical network gateway

DOEpatents

St. John, W.B.; DuBois, D.H.

1996-12-03

Disclosed is a system of sending and receiving gateways interconnects high speed data interfaces, e.g., HIPPI interfaces, through fiber optic links, e.g., a SONET network. An electronic stripe distributor distributes bytes of data from a first interface at the sending gateway onto parallel fiber optics of the fiber optic link to form transmitted data. An electronic stripe collector receives the transmitted data on the parallel fiber optics and reforms the data into a format effective for input to a second interface at the receiving gateway. Preferably, an error correcting syndrome is constructed at the sending gateway and sent with a data frame so that transmission errors can be detected and corrected in a real-time basis. Since the high speed data interface operates faster than any of the fiber optic links the transmission rate must be adapted to match the available number of fiber optic links so the sending and receiving gateways monitor the availability of fiber links and adjust the data throughput accordingly. In another aspect, the receiving gateway must have sufficient available buffer capacity to accept an incoming data frame. A credit-based flow control system provides for continuously updating the sending gateway on the available buffer capacity at the receiving gateway. 7 figs.
MEMS Lens Scanners for Free-Space Optical Interconnects

DTIC Science & Technology

2011-12-15

22] D. C. O ? Brien , G. E. Faulkner, T. D. Wilkinson, B. Robertson, and D. G. Leyva, “Design and Analysis of an Adaptive Board-to-Board Dynamic...trenches on 20 µm device layer. (c-d) Deposit and pattern low-stress nitride and polysilicon for electrical isolation. (e) DRIE for MEMS structures...Telecentric Lateral Shift Board Translation (mm) D is p la c e m e n t o f S p o t (  m ) 0 0.5 1 1.5 2 0 100 200 300 400 Tilt Error Board Tilt (deg) D
Real-Time Reed-Solomon Decoder

NASA Technical Reports Server (NTRS)

Maki, Gary K.; Cameron, Kelly B.; Owsley, Patrick A.

1994-01-01

Generic Reed-Solomon decoder fast enough to correct errors in real time in practical applications designed to be implemented in fewer and smaller very-large-scale integrated, VLSI, circuit chips. Configured to operate in pipelined manner. One outstanding aspect of decoder design is that Euclid multiplier and divider modules contain Galoisfield multipliers configured as combinational-logic cells. Operates at speeds greater than older multipliers. Cellular configuration highly regular and requires little interconnection area, making it ideal for implementation in extraordinarily dense VLSI circuitry. Flight electronics single chip version of this technology implemented and available.
Upset due to a single particle caused propagated transients in a bulk CMOS microprocessor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Leavy, J.F.; Hoffmann, L.F.; Shoran, R.W.

1991-12-01

This paper reports on data pattern advances observed in preset, single event upset (SEU) hardened clocked flip-flops, during static Cf-252 exposures on a bulk CMOS microprocessor, that were attributable to particle caused anomalous clock signals, or propagated transients. SPICE simulations established that particle strikes in the output nodes of a clock control logic flip-flop could produce transients of sufficient amplitude and duration to be accepted as legitimate pulses by clock buffers fed by the flip-flop's output nodes. The buffers would then output false clock pulses, thereby advancing the state of the present flip-flops. Masking the clock logic on one ofmore » the test chips made the flip-flop data advance cease, confirming the clock logic as the source of the SEU. By introducing N{sub 2} gas, at reduced pressures, into the SEU test chamber to attenuate Cf-252 particle LET's, a 24-26 MeV-cm{sup 2}/mg LET threshold was deduced. Subsequent tests, at the 88-inch cyclotron at Berkeley, established an LET threshold of 30 MeV-cm{sup 2}/mg (283 MeV Cu at 0{degrees}) for the generation of false clocks. Cyclotron SEU tests are considered definitive, while Cf-252 data usually is not. However, in this instance Cf-252 tests proved analytically useful, providing SEU characterization data that was both timely and inexpensive.« less
A nanostructure based on metasurfaces for optical interconnects

NASA Astrophysics Data System (ADS)

Lin, Shulang; Gu, Huarong

2017-08-01

Optical-electronic Integrated Neural Co-processor takes vital part in optical neural network, which is mainly realized by optical interconnects. Because of the accuracy requirement and long-term goal of integration, optical interconnects should be effective and pint-size. In traditional solutions of optical interconnects, holography built on crystalloid or law of Fresnel diffraction exploited on zone plate was used. However, holographic method cannot meet the efficiency requirement and zone plate is too bulk to make the optical neural unit miniaturization. Thus, this paper aims to find a way to replace holographic method or zone plate with enough diffraction efficiency and smaller size. Metasurfaces are composed of subwavelength-spaced phase shifters at an interface of medium. Metasurfaces allow for unprecedented control of light properties. They also have advanced optical technology of enabling versatile functionalities in a planar structure. In this paper, a nanostructure is presented for optical interconnects. The comparisons of light splitting ability and simulated crosstalk between nanostructure and zone plate are also made.
Experimental comparison of direct detection Nyquist SSB transmission based on silicon dual-drive and IQ Mach-Zehnder modulators with electrical packaging.

PubMed

Ruan, Xiaoke; Li, Ke; Thomson, David J; Lacava, Cosimo; Meng, Fanfan; Demirtzioglou, Iosif; Petropoulos, Periklis; Zhu, Yixiao; Reed, Graham T; Zhang, Fan

2017-08-07

We have designed and fabricated a silicon photonic in-phase-quadrature (IQ) modulator based on a nested dual-drive Mach-Zehnder structure incorporating electrical packaging. We have assessed its use for generating Nyquist-shaped single sideband (SSB) signals by operating it either as an IQ Mach-Zehnder modulator (IQ-MZM) or using just a single branch of the dual-drive Mach-Zehnder modulator (DD-MZM). The impact of electrical packaging on the modulator bandwidth is also analyzed. We demonstrate 40 Gb/s (10Gbaud) 16-ary quadrature amplitude modulation (16-QAM) Nyquist-shaped SSB transmission over 160 km standard single mode fiber (SSMF). Without using any chromatic dispersion compensation, the bit error rates (BERs) of 5.4 × 10 -4 and 9.0 × 10 -5 were measured for the DD-MZM and IQ-MZM, respectively, far below the 7% hard-decision forward error correction threshold. The performance difference between IQ-MZM and DD-MZM is most likely due to the non-ideal electrical packaging. Our work is the first experimental comparison between silicon IQ-MZM and silicon DD-MZM in generating SSB signals. We also demonstrate 50 Gb/s (12.5Gbaud) 16-QAM Nyquist-shaped SSB transmission over 320 km SSMF with a BER of 2.7 × 10 -3 . Both the silicon IQ-MZM and the DD-MZM show potential for optical transmission at metro scale and for data center interconnection.
Intra-Chip Free-Space Optical Interconnect: System, Device, Integration and Prototyping

NASA Astrophysics Data System (ADS)

Ciftcioglu, Berkehan

Currently, on-chip optical interconnect schemes already proposed utilize circuit switching using wavelength division multiplexing (WDM) or all-optical packet switching, all based on planar optical waveguides and related photonic devices such as microrings. These proposed approaches pose significant challenges in latency, energy efficiency, integration, and scalability. This thesis presents a new alternative approach by utilizing free-space optics. This 3-D integrated intra-chip free-space optical interconnect (FSOI) leverages mature photonic devices such as integrated lasers, photodiodes, microlenses and mirrors. It takes full advantages of the latest developments in 3-D integration technologies. This interconnect system provides point-to-point free-space optical links between any two communication nodes to construct an all-to-all intra-chip communication network with little or no arbitration. Therefore, it has significant networking advantages over conventional electrical and waveguide-based optical interconnects. An FSOI system is evaluated based on the real device parameters, predictive technology models and International Roadmap of Semiconductor's predictions. A single FSOI link achieves 10-Gbps data rate with 0.5-pJ/bit energy efficiency and less than 10--12 bit-error-rate (BER). A system using this individual link can provide scalability up to 36 nodes, providing 10-Tbps aggregate bandwidth. A comparison analysis performed between a WDM-based waveguide interconnect system and the proposed FSOI system shows that FSOI achieves better energy efficiency than the WDM one as the technology scales. Similarly, network simulation on a 16-core microprocessor using the proposed FSOI system instead of mesh networks has been shown to speed up the system by 12% and reduce the energy consumption by 33%. As a part of the development of a 3-D integrated FSOI system, operating at 850 nm with a 10-Gbps data rate per optical link, the photonics devices and optical components are individually designed and fabricated. The photodiodes (PDs) are designed to have large area for efficient light coupling and low capacitance to achieve large bandwidth, while achieving reasonably high responsivity. A metal-semiconductor-metal (MSM) structure is chosen over p-i-n ones to reduce parasitic capacitance per area, to allow less stringent microlens-to-PD alignment for efficient light coupling with a large bandwidth. A novel MSM germanium PD is implemented using an amorphous silicon (a-Si) layer on top of the undoped germanium substrate, serving as a barrier enhancement layer, mitigating the low Schottky barrier height for holes due to fermi level pinning and a surface passivation layer, preventing charge accumulation and image force lowering of the barrier. Therefore, the dark current is reduced and low-frequency gain is eliminated. The PDs achieve a 13-GHz bandwidth with a 0.315-A/W responsivity and a 1.7-nAmum² dark current density. The microlenses are fabricated on a fused silica substrate based on the photoresist melt-and-reflow technique, followed by dry etching into fused silica substrate. The measured focal length of a 220-mum aperture size microlens is 350-mum away from the backside of the substrate. The vertical-cavity surface-emitting lasers (VCSELs) are fabricated on a commercial molecular beam epitaxially (MBE) grown GaAs wafer. The fabricated 8-mum aperture size VCSEL can achieve 0.65-mW optical power at a 1.5-mA forward bias current with a threshold current of 0.48 mA and a 0.67-A/W slope efficiency. Three prototypes are implemented via integrating the individually fabricated components using non-conductive epoxy and wirebonding. The first prototype, built on a printed circuit board (PCB) using commercial VCSEL arrays, achieves a 5-dB transmission loss and less than -30-dB crosstalk at 1-cm distance with a small-signal bandwidth of 10 GHz, limited by the VCSEL. The second board-level prototype uses all fabricated components integrated on a PCB. The prototype achieves a 9-dB transmission loss at 3-cm distance and a 4.4-GHz bandwidth. The chip-level prototype is built on a germanium carrier with integrated MSM Ge PDs, microlenses on fused silica and VCSEL chip on GaAs substrates. The prototype achieves 4-dB transmission loss at 1 cm and 3.3-GHz bandwidth, limited by commercial VCSEL bandwidth. (Abstract shortened by UMI.)
Study of complete interconnect reliability for a GaAs MMIC power amplifier

NASA Astrophysics Data System (ADS)

Lin, Qian; Wu, Haifeng; Chen, Shan-ji; Jia, Guoqing; Jiang, Wei; Chen, Chao

2018-05-01

By combining the finite element analysis (FEA) and artificial neural network (ANN) technique, the complete prediction of interconnect reliability for a monolithic microwave integrated circuit (MMIC) power amplifier (PA) at the both of direct current (DC) and alternating current (AC) operation conditions is achieved effectively in this article. As a example, a MMIC PA is modelled to study the electromigration failure of interconnect. This is the first time to study the interconnect reliability for an MMIC PA at the conditions of DC and AC operation simultaneously. By training the data from FEA, a high accuracy ANN model for PA reliability is constructed. Then, basing on the reliability database which is obtained from the ANN model, it can give important guidance for improving the reliability design for IC.
Reciprocity in spatial evolutionary public goods game on double-layered network

NASA Astrophysics Data System (ADS)

Kim, Jinho; Yook, Soon-Hyung; Kim, Yup

2016-08-01

Spatial evolutionary games have mainly been studied on a single, isolated network. However, in real world systems, many interaction topologies are not isolated but many different types of networks are inter-connected to each other. In this study, we investigate the spatial evolutionary public goods game (SEPGG) on double-layered random networks (DRN). Based on the mean-field type arguments and numerical simulations, we find that SEPGG on DRN shows very rich interesting phenomena, especially, depending on the size of each layer, intra-connectivity, and inter-connected couplings, the network reciprocity of SEPGG on DRN can be drastically enhanced through the inter-connected coupling. Furthermore, SEPGG on DRN can provide a more general framework which includes the evolutionary dynamics on multiplex networks and inter-connected networks at the same time.
Reciprocity in spatial evolutionary public goods game on double-layered network

PubMed Central

Kim, Jinho; Yook, Soon-Hyung; Kim, Yup

2016-01-01

Spatial evolutionary games have mainly been studied on a single, isolated network. However, in real world systems, many interaction topologies are not isolated but many different types of networks are inter-connected to each other. In this study, we investigate the spatial evolutionary public goods game (SEPGG) on double-layered random networks (DRN). Based on the mean-field type arguments and numerical simulations, we find that SEPGG on DRN shows very rich interesting phenomena, especially, depending on the size of each layer, intra-connectivity, and inter-connected couplings, the network reciprocity of SEPGG on DRN can be drastically enhanced through the inter-connected coupling. Furthermore, SEPGG on DRN can provide a more general framework which includes the evolutionary dynamics on multiplex networks and inter-connected networks at the same time. PMID:27503801
Scalability analysis methodology for passive optical interconnects in data center networks using PAM

NASA Astrophysics Data System (ADS)

Lin, R.; Szczerba, Krzysztof; Agrell, Erik; Wosinska, Lena; Tang, M.; Liu, D.; Chen, J.

2017-11-01

A framework is developed for modeling the fundamental impairments in optical datacenter interconnects, i.e., the power loss and the receiver noises. This framework makes it possible, to analyze the trade-offs between data rates, modulation order, and number of ports that can be supported in optical interconnect architectures, while guaranteeing that the required signal-to-noise ratios are satisfied. To the best of our knowledge, this important assessment methodology is not yet available. As a case study, the trade-offs are investigated for three coupler-based top-of-rack interconnect architectures, which suffer from serious insertion loss. The results show that using single-port transceivers with 10 GHz bandwidth, avalanche photodiode detectors, and quadratical pulse amplitude modulation, more than 500 ports can be supported.
Factors Involved in Juveniles' Decisions about Crime.

ERIC Educational Resources Information Center

Cimler, Edward; Beach, Lee Roy

1981-01-01

Investigated whether delinquency is the result of a rational decision. The Subjective Expected Utility (SEU) model from decision theory was used with male juvenile offenders (N=45) as the model of the decision process. Results showed that the SEU model predicted 62.7 percent of the subjects' decisions. (Author/RC)
New Mode For Single-Event Upsets

NASA Technical Reports Server (NTRS)

Zoutendyk, John A.; Smith, Lawrence S.; Soli, George A.; Lo, Roger Y.

1988-01-01

Report presents theory and experimental data regarding newly discovered mode for single-event upsets, (SEU's) in complementary metal-oxide/semiconductor, static random-access memories, CMOS SRAM's. SEU cross sections larger than those expected from previously known modes given rise to speculation regarding additional mode, and subsequent cross-section measurements appear to confirm speculation.

Functional neuroanatomy of amygdalohippocampal interconnections and their role in learning and memory.

PubMed

McDonald, Alexander J; Mott, David D

2017-03-01

The amygdalar nuclear complex and hippocampal/parahippocampal region are key components of the limbic system that play a critical role in emotional learning and memory. This Review discusses what is currently known about the neuroanatomy and neurotransmitters involved in amygdalo-hippocampal interconnections, their functional roles in learning and memory, and their involvement in mnemonic dysfunctions associated with neuropsychiatric and neurological diseases. Tract tracing studies have shown that the interconnections between discrete amygdalar nuclei and distinct layers of individual hippocampal/parahippocampal regions are robust and complex. Although it is well established that glutamatergic pyramidal cells in the amygdala and hippocampal region are the major players mediating interconnections between these regions, recent studies suggest that long-range GABAergic projection neurons are also involved. Whereas neuroanatomical studies indicate that the amygdala only has direct interconnections with the ventral hippocampal region, electrophysiological studies and behavioral studies investigating fear conditioning and extinction, as well as amygdalar modulation of hippocampal-dependent mnemonic functions, suggest that the amygdala interacts with dorsal hippocampal regions via relays in the parahippocampal cortices. Possible pathways for these indirect interconnections, based on evidence from previous tract tracing studies, are discussed in this Review. Finally, memory disorders associated with dysfunction or damage to the amygdala, hippocampal region, and/or their interconnections are discussed in relation to Alzheimer's disease, posttraumatic stress disorder (PTSD), and temporal lobe epilepsy. © 2016 Wiley Periodicals, Inc. © 2016 Wiley Periodicals, Inc.
Interconnects for intermediate temperature solid oxide fuel cells

NASA Astrophysics Data System (ADS)

Huang, Wenhua

Presently, one of the principal goals of solid oxide fuel cells (SOFCs) research is to reduce the stack operating temperature to between 600 and 800°C. However, one of the principal technological barriers is the non-availability of a suitable material satisfying all of the stability requirements for the interconnect. In this work two approaches for intermediate temperature SOFC interconnects have been explored. The first approach comprises an interconnect consisting of a bi-layer structure, a p-type oxide (La0.96Sr0.08MnO 2.001/LSM) layer exposed to a cathodic environment, and an n-type oxide (Y0.08Sr0.88Ti0.95Al0.05O 3-delta/YSTA) layer exposed to anodic conditions. Theoretical analysis based on the bi-layer structure has established design criteria to implement this approach. The analysis shows that the interfacial oxygen partial pressure, which determines the interconnect stability, is independent of the electronic conductivities of both layers but dependent on the oxygen ion layer interconnects, the oxygen ion conductivities of LSM and YSTA were measured as a function of temperature and oxygen partial pressure. Based on the measured data, it has been determined that if the thickness of YSTA layer is around 0.1cm, the thickness of LSM layer should be around 0.6 mum in order to maintain the stability of LSM. In a second approach, a less expensive stainless steel interconnect has been studied. However, one of the major concerns associated with the use of metallic interconnects is the development of a semi-conducting or insulating oxide scale and chromium volatility during extended exposure to the SOFC operating environment. Dense and well adhered Mn-Cu spinet oxide coatings were successfully deposited on stainless steel by an electrophoretic deposition (EPD) technique. It was found that the Mn-Cu-O coating significantly reduced the oxidation rate of the stainless steel and the volatility of chromium. The area specific resistance (ASR) of coated Crofer 22 APU is expected to he around 1.2x10 -2Ocm2 after exposure to air at 800°C for 50000 hours. This demonstrates that Crofer 22 APU with CuMn1.8O 4 coating deposited by EPD is suitable for application as interconnects in intermediate temperature SOFCs.
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Federal Register 2010, 2011, 2012, 2013, 2014

2011-05-03

... the center of the city, and with 120 km of the interconnected base station transmitter. Consensual... mobile radio service stations with the public switched telephone network as follows: (1) Pursuant to 47 CFR section 90.477(a), licensees of interconnected land stations must maintain as part of their...
Home page | prc.gatech.edu | Georgia Institute of Technology | Atlanta, GA

Science.gov Websites

Interconnections & Assembly Low Cost Glass Interposers & Packages MEMS and Sensors GRA Opportunities addressing electrical, mechanical and thermal barriers. Low-cost Glass Interposer and Package Panel-based ultra-thin glass as a high performance, high I/O density, and low cost platform. Interconnections and
Stochastic architecture for Hopfield neural nets

NASA Technical Reports Server (NTRS)

Pavel, Sandy

1992-01-01

An expandable stochastic digital architecture for recurrent (Hopfield like) neural networks is proposed. The main features and basic principles of stochastic processing are presented. The stochastic digital architecture is based on a chip with n full interconnected neurons with a pipeline, bit processing structure. For large applications, a flexible way to interconnect many such chips is provided.
High-resolution determination of the stress in individual interconnect lines and the variation due to electromigration

NASA Astrophysics Data System (ADS)

Ma, Qing; Chiras, S.; Clarke, D. R.; Suo, Z.

1995-08-01

Large tensile stresses usually exist in metallic interconnect lines on silicon substrates as a result of thermal mismatch. When a current is subsequently passed any divergence of atomic flux can create superimposed stress variations along the line. Together, these stresses can significantly influence the growth of voids and therefore affect interconnect reliability. In this work, a high-resolution (˜2 μm) optical spectroscopy method has been used to measure the localized stresses around passivated aluminum lines on a silicon wafer, both as-fabricated and after electromigration testing. The method is based on the piezospectroscopic properties of silicon, specifically the frequency shift of the Raman line at 520 R cm-1. By focusing a laser beam at points adjacent to the aluminum lines, the Raman signal was excited and collected. The stresses in the aluminum lines can then be derived from the stresses in the silicon using finite element methods. Large variations of stress along an electromigration-tested line were observed and compared to a theoretical model based on differences in effective diffusivities from grain to grain in a polycrystalline interconnect line.
Stretchable multilayer self-aligned interconnects fabricated using excimer laser photoablation and in situ masking

NASA Astrophysics Data System (ADS)

Lin, Kevin L.; Jain, Kanti

2009-02-01

Stretchable interconnects are essential to large-area flexible circuits and large-area sensor array systems, and they play an important role towards the realization of the realm of systems which include wearable electronics, sensor arrays for structural health monitoring, and sensor skins for tactile feedback. These interconnects must be reliable and robust for viability, and must be flexible, stretchable, and conformable to non-planar surfaces. This research describes the design, modeling, fabrication, and testing of stretchable interconnects on polymer substrates using metal patterns both as functional interconnect layers and as in-situ masks for excimer laser photoablation. Excimer laser photoablation is often used for patterning of polymers and thin-film metals. The fluences for photoablation of polymers are generally much lower than the threshold fluence for removal or damage of high-thermallyconductive metals; thus, metal thin films can be used as in-situ masks for polymers if the proper fluence is used. Selfaligned single-layer and multi-layer interconnects of various designs (rectilinear and 'meandering') have been fabricated, and certain 'meandering' interconnect designs can be stretched up to 50% uniaxially while maintaining good electrical conductivity and structural integrity. These results are compared with Finite Element Analysis (FEA) models and are observed to be in good accordance with them. This fabrication approach eliminates masks and microfabrication processing steps as compared to traditional fabrication approaches; furthermore, this technology is scalable for large-area sensor arrays and electronic circuits, adaptable for a variety of materials and interconnects designs, and compatible with MEMS-based capacitive sensor technology.
WDM package enabling high-bandwidth optical intrasystem interconnects for high-performance computer systems

NASA Astrophysics Data System (ADS)

Schrage, J.; Soenmez, Y.; Happel, T.; Gubler, U.; Lukowicz, P.; Mrozynski, G.

2006-02-01

From long haul, metro access and intersystem links the trend goes to applying optical interconnection technology at increasingly shorter distances. Intrasystem interconnects such as data busses between microprocessors and memory blocks are still based on copper interconnects today. This causes a bottleneck in computer systems since the achievable bandwidth of electrical interconnects is limited through the underlying physical properties. Approaches to solve this problem by embedding optical multimode polymer waveguides into the board (electro-optical circuit board technology, EOCB) have been reported earlier. The principle feasibility of optical interconnection technology in chip-to-chip applications has been validated in a number of projects. For reasons of cost considerations waveguides with large cross sections are used in order to relax alignment requirements and to allow automatic placement and assembly without any active alignment of components necessary. On the other hand the bandwidth of these highly multimodal waveguides is restricted due to mode dispersion. The advance of WDM technology towards intrasystem applications will provide sufficiently high bandwidth which is required for future high-performance computer systems: Assuming that, for example, 8 wavelength-channels with 12Gbps (SDR1) each are given, then optical on-board interconnects with data rates a magnitude higher than the data rates of electrical interconnects for distances typically found at today's computer boards and backplanes can be realized. The data rate will be twice as much, if DDR2 technology is considered towards the optical signals as well. In this paper we discuss an approach for a hybrid integrated optoelectronic WDM package which might enable the application of WDM technology to EOCB.
Behavioral modeling of VCSELs for high-speed optical interconnects

NASA Astrophysics Data System (ADS)

Szczerba, Krzysztof; Kocot, Chris

2018-02-01

Transition from on-off keying to 4-level pulse amplitude modulation (PAM) in VCSEL based optical interconnects allows for an increase of data rates, at the cost of 4.8 dB sensitivity penalty. The resulting strained link budget creates a need for accurate VCSEL models for driver integrated circuit (IC) design and system level simulations. Rate equation based equivalent circuit models are convenient for the IC design, but system level analysis requires computationally efficient closed form behavioral models based Volterra series and neural networks. In this paper we present and compare these models.
Board-level optical clock signal distribution using Si CMOS-compatible polyimide-based 1- to 48-fanout H-tree

NASA Astrophysics Data System (ADS)

Wu, Linghui; Bihari, Bipin; Gan, Jianhua; Chen, Ray T.; Tang, Suning

1998-08-01

Si-CMOS compatible polymer-based waveguides for optoelectronic interconnects and packaging have been fabricated and characterized. A 1-to-48 fanout optoelectronic interconnection layer (OIL) structure based on Ultradel 9120/9020 for the high-speed massive clock signal distribution for a Cray T-90 supercomputer board has been constructed. The OIL employs multimode polymeric channel waveguides in conjunction with surface-normal waveguide output coupler and 1-to-2 splitter. A total insertion loss of 7.98 dB at 850 nm was measured experimentally.
Development of a Multi-Agent m-Health Application Based on Various Protocols for Chronic Disease Self-Management.

PubMed

Park, Hyun Sang; Cho, Hune; Kim, Hwa Sun

2016-01-01

The purpose of this study was to develop and evaluate a mobile health application (Self-Management mobile Personal Health Record: "SmPHR") to ensure the interoperability of various personal health devices (PHDs) and electronic medical record systems (EMRs) for continuous self-management of chronic disease patients. The SmPHR was developed for Android 4.0.3, and implemented according to the optimized standard protocol for each interface of healthcare services adopted by the Continua Health Alliance (CHA). That is, the Personal Area Network (PAN) interface between the application and PHD implements ISO/IEEE 11073-20,601, 10,404, 10,407, 10,415, 10,417, and Bluetooth Health Device Profile (HDP), and EMRs with a wide area network (WAN) interface implement HL7 V2.6; the Health Record Network (HRN) interface implements Continuity of Care Document (CCD) and Continuity of Care Record (CCR). Also, for SmPHR, we evaluated the transmission error rate between the interface using four PHDs and personal health record systems (PHRs) from previous research, with 611 users and elderly people after receiving institutional review board (IRB) approval. In the evaluation, the PAN interface showed 15 (2.4 %) errors, and the WAN and HRN interface showed 13 (2.1 %) errors in a total of 611 transmission attempts. Also, we received opinions regarding SmPHR from 15 healthcare professionals who took part in the clinical trial. Thus, SmPHR can be provided as an interconnected PHR mobile health service to patients, allowing 'plug and play' of PHDs and EMRs through various standard protocols.
Additive manufacturing and analysis of high frequency interconnects for microwave devices

NASA Astrophysics Data System (ADS)

Harper, Elicia K.

Wire bond interconnects have been the main approach to interconnecting microelectronic devices within a package. Conventional wirebonding however offers little control of the impedance of the interconnect and also introduces parasitic inductance that can degrade performance at microwave frequencies. The size and compactness of microchips is often an issue when it comes to attaching wirebonds to the microchip or other components within a microwave module. This work demonstrates the use of additive manufacturing for printing interconnects directly between bare die microchips and other components within a microwave module. A test structure was developed consisting of a GaAs microchip sandwiched between two alumina blocks patterned with coplanar waveguides (CPW). A printed dielectric ink is used to fill the gap between the alumina CPW blocks and the GaAs chip. Conductive interconnects are printed on top of the dielectric bridge material to connect the CPW traces to the bonding pads on the GaAs microchip. Simulations of these structures were modeled in the electromagnetics simulation tool by ANSYS, high frequency structure simulation (HFSS), to optimize the printed interconnects at 1-40 GHz (ANSYS Inc., Canonsburg, PA). The dielectric constant and loss tangent of the simulated dielectric was varied along with the dimensions of the conductive interconnects. The best combination of dielectric properties and interconnect dimensions was chosen for impedance matching by analyzing the insertion losses and return losses. A dielectric ink, which was chosen based on the simulated results, was experimentally printed between the two CPW blocks and the GaAs chip and subsequently cured. The conductive interconnects were then printed with an aerosol jet printer, connecting the CPW traces to the bonding pads on the GaAs microchip. The experimental prototype was then measured with a network analyzer and the measured data were compared to simulations. Results show good agreement between the simulated and measured S-parameters. This work demonstrates the potential for using additive manufacturing technology to create impedance- matched interconnects between high frequency ICs and other module components such as high frequency CPW transmission lines.
Asymptotically suboptimal control of weakly interconnected dynamical systems

NASA Astrophysics Data System (ADS)

Dmitruk, N. M.; Kalinin, A. I.

2016-10-01

Optimal control problems for a group of systems with weak dynamical interconnections between its constituent subsystems are considered. A method for decentralized control is proposed which distributes the control actions between several controllers calculating in real time control inputs only for theirs subsystems based on the solution of the local optimal control problem. The local problem is solved by asymptotic methods that employ the representation of the weak interconnection by a small parameter. Combination of decentralized control and asymptotic methods allows to significantly reduce the dimension of the problems that have to be solved in the course of the control process.
Analysis of the prospective energy interconnections in Northeast Asia and development of the data portal

NASA Astrophysics Data System (ADS)

Churkin, Andrey; Bialek, Janusz

2018-01-01

Development of power interconnections in Northeast Asia becomes not only engineering but also a political issue. More research institutes are involved in the Asian Super Grid initiative discussion, as well as more politicians mention power interconnection opportunities. UNESCAP started providing a platform for intragovernmental discussion of the issue. However, there are still a lack of comprehensive modern research of the Asian Super Grid. Moreover, there is no unified data base and no unified power routes concept. Therefore, this article discusses a tool for optimal power routes selection and suggest a concept of the unified data portal.
Making A D-Latch Sensitive To Alpha Particles

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Blaes, Brent R.; Nixon, Robert H.

1994-01-01

Standard complementary metal oxide/semiconductor (CMOS) D-latch integrated circuit modified to increase susceptibility to single-event upsets (SEU's) (changes in logic state) caused by impacts of energetic alpha particles. Suitable for use in relatively inexpensive bench-scale SEU tests of itself and of related integrated circuits like static random-access memories.
Test results for SEU and SEL immune memory circuits

NASA Technical Reports Server (NTRS)

Wiseman, D.; Canaris, J.; Whitaker, S.; Gambles, J.; Arave, K.; Arave, L.

1993-01-01

Test results for three SEU logic/circuit hardened CMOS memory circuits verify upset and latch-up immunity for two configurations to be in excess of 120 MeV cm(exp 2)/mg using a commercial, non-radiation hardened CMOS process. Test chips from three separate fabrication runs in two different process were evaluated.
Single event effects and laser simulation studies

NASA Technical Reports Server (NTRS)

Kim, Q.; Schwartz, H.; Mccarty, K.; Coss, J.; Barnes, C.

1993-01-01

The single event upset (SEU) linear energy transfer threshold (LETTH) of radiation hardened 64K Static Random Access Memories (SRAM's) was measured with a picosecond pulsed dye laser system. These results were compared with standard heavy ion accelerator (Brookhaven National Laboratory (BNL)) measurements of the same SRAM's. With heavy ions, the LETTH of the Honeywell HC6364 was 27 MeV-sq cm/mg at 125 C compared with a value of 24 MeV-sq cm/mg obtained with the laser. In the case of the second type of 64K SRAM, the IBM640lCRH no upsets were observed at 125 C with the highest LET ions used at BNL. In contrast, the pulsed dye laser tests indicated a value of 90 MeV-sq cm/mg at room temperature for the SEU-hardened IBM SRAM. No latchups or multiple SEU's were observed on any of the SRAM's even under worst case conditions. The results of this study suggest that the laser can be used as an inexpensive laboratory SEU prescreen tool in certain cases.
General Conversion for Obtaining Strongly Existentially Unforgeable Signatures

NASA Astrophysics Data System (ADS)

Teranishi, Isamu; Oyama, Takuro; Ogata, Wakaha

We say that a signature scheme is strongly existentially unforgeable (SEU) if no adversary, given message/signature pairs adaptively, can generate a signature on a new message or a new signature on a previously signed message. We propose a general and efficient conversion in the standard model that transforms a secure signature scheme to SEU signature scheme. In order to construct that conversion, we use a chameleon commitment scheme. Here a chameleon commitment scheme is a variant of commitment scheme such that one can change the committed value after publishing the commitment if one knows the secret key. We define the chosen message security notion for the chameleon commitment scheme, and show that the signature scheme transformed by our proposed conversion satisfies the SEU property if the chameleon commitment scheme is chosen message secure. By modifying the proposed conversion, we also give a general and efficient conversion in the random oracle model, that transforms a secure signature scheme into a SEU signature scheme. This second conversion also uses a chameleon commitment scheme but only requires the key only attack security for it.
Advanced Platform for Development and Evaluation of Grid Interconnection Systems Using Hardware-in-the-Loop (Poster)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lundstrom, B.; Shirazi, M.; Coddington, M.

2013-02-01

This poster describes a Grid Interconnection System Evaluator (GISE) that leverages hardware-in-the-loop (HIL) simulation techniques to rapidly evaluate the grid interconnection standard conformance of an ICS according to the procedures in IEEE Std 1547.1TM. The architecture and test sequencing of this evaluation tool, along with a set of representative ICS test results from three different photovoltaic (PV) inverters, are presented. The GISE adds to the National Renewable Energy Laboratory's (NREL) evaluation platform that now allows for rapid development of ICS control algorithms using controller HIL (CHIL) techniques, the ability to test the dc input characteristics of PV-based ICSs through themore » use of a PV simulator capable of simulating real-world dynamics using power HIL (PHIL), and evaluation of ICS grid interconnection conformance.« less
Bi cluster-assembled interconnects produced using SU8 templates

NASA Astrophysics Data System (ADS)

Partridge, J. G.; Matthewson, T.; Brown, S. A.

2007-04-01

Bi clusters with an average diameter of 25 nm have been deposited from an inert gas aggregation source and assembled into thin-film interconnects which are formed between planar electrical contacts and supported on Si substrates passivated with Si3N4 or thermally grown oxide. A layer of SU8 (a negative photoresist based on EPON SU-8 epoxy resin) is patterned using optical or electron-beam lithography, and it defines the position and dimensions of the cluster film. The conduction between the contacts is monitored throughout the deposition/assembly process, and subsequent I(V) characterization is performed in situ. Bi cluster-assembled interconnects have been fabricated with nanoscale widths and with up to 1:1 thickness:width aspect ratios. The conductivity of these interconnects has been increased, post-deposition, using a simple thermal annealing process.

Time-domain finite-difference based analysis of induced crosstalk in multiwall carbon nanotube interconnects

NASA Astrophysics Data System (ADS)

Kumar, Amit; Nehra, Vikas; Kaushik, Brajesh Kumar

2017-08-01

Graphene rolled-up cylindrical sheets i.e. carbon nanotubes (CNTs) is one of the finest and emerging research area. This paper presents the investigation of induced crosstalk in coupled on-chip multiwalled carbon nanotube (MWCNT) interconnects using finite-difference analysis (FDA) in time-domain i.e. the finite-difference time-domain (FDTD) method. The exceptional properties of versatile MWCNTs profess their candidacy to replace conventional on-chip copper interconnects. Time delay and crosstalk noise have been evaluated for coupled on-chip MWCNT interconnects. With a decrease in CNT length, the obtained results for an MWCNT shows that transmission performance improves as the number of shells increases. It has been observed that the obtained results using the finite-difference time domain (FDTD) technique shows a very close match with the HSPICE simulated results.
Review of PREPA Technical Requirements for Interconnecting Wind and Solar Generation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gevorgian, Vahan; Booth, Sarah

2013-11-01

The Puerto Rico Electric Power Authority developed the minimum technical requirements for interconnection of wind turbine generation and photovoltaic power plants. NREL has conducted a review of these requirements based on generic technical aspects and electrical characteristics of wind and photovoltaic power plants, and on existing requirements from other utilities (both U.S. and European).
Joint Services Electronics Program.

DTIC Science & Technology

1993-03-05

Mary- land, June 1992. Interconnection Network Design Based on Packaging Considerations Professor Abhiram Ranade with M. T. Raghunath A central...characterized by our abstract models of packaging technology. JSEP Publications [1] M.T. Raghunath and Abhiram Ranade, "Customizing Interconnection...94720, January 1993. [21 M.T. Raghunath and Abhiram Ranade, "Fault-Tolerant Routing in Partitioned Butterfly Networks," submitted to the 1993
Between Two Advisors: Interconnecting Academic and Workplace Settings in an Emerging Field

ERIC Educational Resources Information Center

Hytönen, Kaisa; Palonen, Tuire; Lehtinen, Erno; Hakkarainen, Kai

2016-01-01

This article examines a new training design for continuing professional development that aims to support the learning of the novel knowledge and skills needed in emerging professional fields by interconnecting academic and workplace settings. The training design is based on using two advisors, one from working life and the other from an academic…
Impact of Isothermal Aging and Testing Temperature on Large Flip-Chip BGA Interconnect Mechanical Shock Performance

NASA Astrophysics Data System (ADS)

Lee, Tae-Kyu; Chen, Zhiqiang; Guirguis, Cherif; Akinade, Kola

2017-10-01

The stability of solder interconnects in a mechanical shock environment is crucial for large body size flip-chip ball grid array (FCBGA) electronic packages. Additionally, the junction temperature increases with higher electric power condition, which brings the component into an elevated temperature environment, thus introducing another consideration factor for mechanical stability of interconnection joints. Since most of the shock performance data available were produced at room temperature, the effect of elevated temperature is of interest to ensure the reliability of the device in a mechanical shock environment. To achieve a stable␣interconnect in a dynamic shock environment, the interconnections must tolerate mechanical strain, which is induced by the shock wave input and reaches the particular component interconnect joint. In this study, large body size (52.5 × 52.5 mm2) FCBGA components assembled on 2.4-mm-thick boards were tested with various isothermal pre-conditions and testing conditions. With a heating element embedded in the test board, a test temperature range from room temperature to 100°C was established. The effects of elevated temperature on mechanical shock performance were investigated. Failure and degradation mechanisms are identified and discussed based on the microstructure evolution and grain structure transformations.
A novel FPGA-programmable switch matrix interconnection element in quantum-dot cellular automata

NASA Astrophysics Data System (ADS)

Hashemi, Sara; Rahimi Azghadi, Mostafa; Zakerolhosseini, Ali; Navi, Keivan

2015-04-01

The Quantum-dot cellular automata (QCA) is a novel nanotechnology, promising extra low-power, extremely dense and very high-speed structure for the construction of logical circuits at a nanoscale. In this paper, initially previous works on QCA-based FPGA's routing elements are investigated, and then an efficient, symmetric and reliable QCA programmable switch matrix (PSM) interconnection element is introduced. This element has a simple structure and offers a complete routing capability. It is implemented using a bottom-up design approach that starts from a dense and high-speed 2:1 multiplexer and utilise it to build the target PSM interconnection element. In this study, simulations of the proposed circuits are carried out using QCAdesigner, a layout and simulation tool for QCA circuits. The results demonstrate high efficiency of the proposed designs in QCA-based FPGA routing.
Optical interconnects for in-plane high-speed signal distribution at 10 Gb/s: Analysis and demonstration

NASA Astrophysics Data System (ADS)

Chang, Yin-Jung

With decreasing transistor size, increasing chip speed, and larger numbers of processors in a system, the performance of a module/system is being limited by the off-chip and off-module bandwidth-distance products. Optical links have moved from fiber-based long distance communications to the cabinet level of 1m--100m, and recently to the backplane-level (10cm--1m). Board-level inter-chip parallel optical interconnects have been demonstrated recently by researchers from Intel, IBM, Fujitsu, NTT and a few research groups in universities. However, the board-level signal/clock distribution function using optical interconnects, the lightwave circuits, the system design, a practically convenient integration scheme committed to the implementation of a system prototype have not been explored or carefully investigated. In this dissertation, the development of a board-level 1 x 4 optical-to-electrical signal distribution at 10Gb/s is presented. In contrast to other prototypes demonstrating board-level parallel optical interconnects that have been drawing much attention for the past decade, the optical link design for the high-speed signal broadcasting is even more complicated and the pitch between receivers could be varying as opposed to fixed-pitch design that has been widely-used in the parallel optical interconnects. New challenges for the board-level high-speed signal broadcasting include, but are not limited to, a new optical link design, a lightwave circuit as a distribution network, and a novel integration scheme that can be a complete radical departure from the traditional assembly method. One of the key building blocks in the lightwave circuit is the distribution network in which a 1 x 4 multimode interference (MMI) splitter is employed. MMI devices operating at high data rates are important in board-level optical interconnects and need to be characterized in the application of board-level signal broadcasting. To determine the speed limitations of MMI devices, the ultra-short pulse response of these devices is modeled based on the guided-mode theory incorporated with Fourier transform technique. For example, for 50 fs Gaussian input pulses into a 1 x 16 splitter, the output pulses are severely degraded in coupling efficiency (48%) and completely broken up in time primarily due to inter-modal and intra-modal (waveguide) dispersion. Material dispersion is found to play only a minor role in the pulse response of MMI devices. However, for 1ps input pulses into the same 1 x 16 splitter, the output pulses are only moderately degraded in coupling efficiency (86%) and only slightly degraded in shape. With the understanding of the necessary condition of the distortionless high-speed signal transmission through MMI devices, high-speed data transmission at 40Gb/s per channel with a total bandwidth of 320Gb/s for 8 output ports is demonstrated for the first time on a 1 x 8 photo-definable polymer-based MMI power splitter. The device is designed with multimode input/output waveguides of 10mum in width and 7.6mum in height for a better input coupling efficiency for which the high-speed testing demands. The eye diagrams are all clear and fully open with an extinction ratio of 10.1dB and a jitter of 1.65 ps. The transmission validity is further confirmed by the bit-error-rate testing at the pseudoramdom binary sequence of 27--1. The fabrication process developed lays the cornerstone of the integration scheme and system design for the prototype of hybrid interconnects. An important problem regarding the guided-mode attenuation associated with optical-interconnect-polymer waveguides fabricated on FR-4 printed-circuit boards is also quantified for the first time. On-board optical waveguides are receiving more attention recently from Fujitsu American Laboratory, IBM Watson Research Center, and Packaging Research Center here at Georgia Tech. This branch of research work is part of the effort in investigating, scientifically, the attenuation mechanism and the effects of the buffer layer thickness on board-level in-plane optical interconnects. The rigorous transmission-line network approach is used and the FR-4 substrate is treated as a long-period substrate grating. A quantitative metric for an appropriate matrix truncation is presented. The peaks of attenuation are shown to occur near the Bragg conditions that characterize the leaky-wave stop bands. For a typical 400mum period FR-4 substrate with an 8mum corrugation depth, a buffer layer thickness of about 40mum is found to be needed to make the attenuation negligibly small. An experimental prototype for on-board optical-to-electrical signal broadcasting operating at 10Gb/s per channel over an interconnect distance of 10cm is demonstrated. An improved 1 x 4 multimode interference (MMI) splitter at 1550nm with linearly-tapered output facet is heterogeneously integrated with four p-i-n photodetectors (PDs) on a Silicon (Si) bench. The Si bench itself is hybrid integrated onto an FR-4 printed-circuit board with four receiver channels. A novel fabrication/integration approach demonstrates the simultaneous alignment between the four waveguides and the four PDs during the MMI fabrication process. The entire system is fully functional at 10Gb/s.
WDM mid-board optics for chip-to-chip wavelength routing interconnects in the H2020 ICT-STREAMS

NASA Astrophysics Data System (ADS)

Kanellos, G. T.; Pleros, N.

2017-02-01

Multi-socket server boards have emerged to increase the processing power density on the board level and further flatten the data center networks beyond leaf-spine architectures. Scaling however the number of processors per board puts current electronic technologies into challenge, as it requires high bandwidth interconnects and high throughput switches with increased number of ports that are currently unavailable. On-board optical interconnection has proved the potential to efficiently satisfy the bandwidth needs, but their use has been limited to parallel links without performing any smart routing functionality. With CWDM optical interconnects already a commodity, cyclical wavelength routing proposed to fit the datacom for rack-to-rack and board-to-board communication now becomes a promising on-board routing platform. ICT-STREAMS is a European research project that aims to combine WDM parallel on-board transceivers with a cyclical AWGR, in order to create a new board-level, chip-to-chip interconnection paradigm that will leverage WDM parallel transmission to a powerful wavelength routing platform capable to interconnect multiple processors with unprecedented bandwidth and throughput capacity. Direct, any-to-any, on-board interconnection of multiple processors will significantly contribute to further flatten the data centers and facilitate east-west communication. In the present communication, we present ICT-STREAMS on-board wavelength routing architecture for multiple chip-to-chip interconnections and evaluate the overall system performance in terms of throughput and latency for several schemes and traffic profiles. We also review recent advances of the ICT-STREAMS platform key-enabling technologies that span from Si in-plane lasers and polymer based electro-optical circuit boards to silicon photonics transceivers and photonic-crystal amplifiers.
Using Cf-252 for single event upset testing

NASA Astrophysics Data System (ADS)

Howard, J. W.; Chen, R.; Block, R. C.; Becker, M.; Costantine, A. G.; Smith, L. S.; Soli, G. A.; Stauber, M. C.

An improved system using Cf-252 and associated nuclear instrumentation has been used to determine single event upset (SEU) cross section versus linear energy transfer (LET) curve for several static random access memory (SRAM) devices. Through the use of a thin-film scintillator, providing energy information on each fission fragment, individual SEU's and ion energy can be associated to calculate the cross section curves. Results are presented from tests of several SRAM's over the 17-43 MeV-cm squared/mg LET range. Values obtained for SEU cross sections and LET thresholds are in good agreement with the results from accelerator testing. The equipment is described, the theory of thin-film scintillation detector response is summarized, experimental procedures are reviewed, and the test results are discussed.
Heavy-ion induced single-event upset in integrated circuits

NASA Technical Reports Server (NTRS)

Zoutendyk, J. A.

1991-01-01

The cosmic ray environment in space can affect the operation of Integrated Circuit (IC) devices via the phenomenon of Single Event Upset (SEU). In particular, heavy ions passing through an IC can induce sufficient integrated current (charge) to alter the state of a bistable circuit, for example a memory cell. The SEU effect is studied in great detail in both static and dynamic memory devices, as well as microprocessors fabricated from bipolar, Complementary Metal Oxide Semiconductor (CMOS) and N channel Metal Oxide Semiconductor (NMOS) technologies. Each device/process reflects its individual characteristics (minimum scale geometry/process parameters) via a unique response to the direct ionization of electron hole pairs by heavy ion tracks. A summary of these analytical and experimental SEU investigations is presented.
Electricity exchange and the valuation of transnational transmission access: A case study of intra-regional integration of the electric industries of Argentina and Chile

NASA Astrophysics Data System (ADS)

Brereton, Beverly Ann

The interconnection of neighboring electricity networks provides opportunities for the realization of synergies between electricity systems. Examples of the synergies to be realized are the rationalized management of the electricity networks whose fuel source domination differs, and the exploitation of non-coincident system peak demands. These factors allow technology diversity in the satisfaction of electricity demand, the coordination of planning and maintenance schedules between the networks by exploiting the cost differences in the pool of generation assets and the load configuration differences in the neighboring locations. The interconnection decision studied in this dissertation focused on the electricity networks of Argentina and Chile whose electricity systems operate in isolation at the current time. The cooperative game-theoretic framework was applied in the analysis of the decision facing the two countries and the net surplus to be derived from interconnection was evaluated. Measurement of the net gains from interconnection used in this study were reflected in changes in generating costs under the assumption that demand is fixed under all scenarios. With the demand for electricity assumed perfectly inelastic, passive or aggressive bidding strategies were considered under the scenarios for the generators in the two countries. The interconnection decision was modeled using a linear power flow model which utilizes linear programming techniques to reflect dispatch procedures based on generation bids. Results of the study indicate that the current interconnection project between Argentina and Chile will not result in positive net surplus under a variety of scenarios. Only under significantly reduced interconnection cost will the venture prove attractive. Possible sharing mechanisms were also explored in the research and a symmetric distribution of the net surplus to be derived under the reduced interconnection cost scenario was recommended to preserve equity in the allocation of the interconnection gains.
Clustering and Recurring Anomaly Identification: Recurring Anomaly Detection System (ReADS)

NASA Technical Reports Server (NTRS)

McIntosh, Dawn

2006-01-01

This viewgraph presentation reviews the Recurring Anomaly Detection System (ReADS). The Recurring Anomaly Detection System is a tool to analyze text reports, such as aviation reports and maintenance records: (1) Text clustering algorithms group large quantities of reports and documents; Reduces human error and fatigue (2) Identifies interconnected reports; Automates the discovery of possible recurring anomalies; (3) Provides a visualization of the clusters and recurring anomalies We have illustrated our techniques on data from Shuttle and ISS discrepancy reports, as well as ASRS data. ReADS has been integrated with a secure online search
Power-Constrained Fuzzy Logic Control of Video Streaming over a Wireless Interconnect

NASA Astrophysics Data System (ADS)

Razavi, Rouzbeh; Fleury, Martin; Ghanbari, Mohammed

2008-12-01

Wireless communication of video, with Bluetooth as an example, represents a compromise between channel conditions, display and decode deadlines, and energy constraints. This paper proposes fuzzy logic control (FLC) of automatic repeat request (ARQ) as a way of reconciling these factors, with a 40% saving in power in the worst channel conditions from economizing on transmissions when channel errors occur. Whatever the channel conditions are, FLC is shown to outperform the default Bluetooth scheme and an alternative Bluetooth-adaptive ARQ scheme in terms of reduced packet loss and delay, as well as improved video quality.
Photolithography-Based Patterning of Liquid Metal Interconnects for Monolithically Integrated Stretchable Circuits.

PubMed

Park, Chan Woo; Moon, Yu Gyeong; Seong, Hyejeong; Jung, Soon Won; Oh, Ji-Young; Na, Bock Soon; Park, Nae-Man; Lee, Sang Seok; Im, Sung Gap; Koo, Jae Bon

2016-06-22

We demonstrate a new patterning technique for gallium-based liquid metals on flat substrates, which can provide both high pattern resolution (∼20 μm) and alignment precision as required for highly integrated circuits. In a very similar manner as in the patterning of solid metal films by photolithography and lift-off processes, the liquid metal layer painted over the whole substrate area can be selectively removed by dissolving the underlying photoresist layer, leaving behind robust liquid patterns as defined by the photolithography. This quick and simple method makes it possible to integrate fine-scale interconnects with preformed devices precisely, which is indispensable for realizing monolithically integrated stretchable circuits. As a way for constructing stretchable integrated circuits, we propose a hybrid configuration composed of rigid device regions and liquid interconnects, which is constructed on a rigid substrate first but highly stretchable after being transferred onto an elastomeric substrate. This new method can be useful in various applications requiring both high-resolution and precisely aligned patterning of gallium-based liquid metals.
A Thermal Model for Carbon Nanotube Interconnects

PubMed Central

Mohsin, Kaji Muhammad; Srivastava, Ashok; Sharma, Ashwani K.; Mayberry, Clay

2013-01-01

In this work, we have studied Joule heating in carbon nanotube based very large scale integration (VLSI) interconnects and incorporated Joule heating influenced scattering in our previously developed current transport model. The theoretical model explains breakdown in carbon nanotube resistance which limits the current density. We have also studied scattering parameters of carbon nanotube (CNT) interconnects and compared with the earlier work. For 1 µm length single-wall carbon nanotube, 3 dB frequency in S12 parameter reduces to ~120 GHz from 1 THz considering Joule heating. It has been found that bias voltage has little effect on scattering parameters, while length has very strong effect on scattering parameters. PMID:28348333
Load Frequency Control of AC Microgrid Interconnected Thermal Power System

NASA Astrophysics Data System (ADS)

Lal, Deepak Kumar; Barisal, Ajit Kumar

2017-08-01

In this paper, a microgrid (MG) power generation system is interconnected with a single area reheat thermal power system for load frequency control study. A new meta-heuristic optimization algorithm i.e. Moth-Flame Optimization (MFO) algorithm is applied to evaluate optimal gains of the fuzzy based proportional, integral and derivative (PID) controllers. The system dynamic performance is studied by comparing the results with MFO optimized classical PI/PID controllers. Also the system performance is investigated with fuzzy PID controller optimized by recently developed grey wolf optimizer (GWO) algorithm, which has proven its superiority over other previously developed algorithm in many interconnected power systems.
Distributed Optimal Power Flow of AC/DC Interconnected Power Grid Using Synchronous ADMM

NASA Astrophysics Data System (ADS)

Liang, Zijun; Lin, Shunjiang; Liu, Mingbo

2017-05-01

Distributed optimal power flow (OPF) is of great importance and challenge to AC/DC interconnected power grid with different dispatching centres, considering the security and privacy of information transmission. In this paper, a fully distributed algorithm for OPF problem of AC/DC interconnected power grid called synchronous ADMM is proposed, and it requires no form of central controller. The algorithm is based on the fundamental alternating direction multiplier method (ADMM), by using the average value of boundary variables of adjacent regions obtained from current iteration as the reference values of both regions for next iteration, which realizes the parallel computation among different regions. The algorithm is tested with the IEEE 11-bus AC/DC interconnected power grid, and by comparing the results with centralized algorithm, we find it nearly no differences, and its correctness and effectiveness can be validated.
Joint Services Electronics Program

DTIC Science & Technology

1992-03-05

Packaging Considerations M. T. Raghunath (Professor Abhiram Ranade) A central issue in massively parallel computation is the design of the interconnection...programs on promising network architectures. Publications: [1] M. T. Raghunath and A. G. Ranade, A Simulation-Based Compari- son of Interconnection Networks...more difficult analog function approximation task. Network Design Issues for Fast Global Communication Professor A. Ranade with M.T. Raghunath A
Bandwidth Management in Resource Constrained Networks

DTIC Science & Technology

2012-03-01

Postgraduate School OSI Open Systems Interconnection QoS Quality of Service TCP Transmission Control Protocol/Internet Protocol TCP/IP Transmission...filtering. B. NORMAL TCP/IP COMMUNICATIONS The Internet is a “complex network WAN that connects LANs and clients around the globe” (Dean, 2009...of the Open Systems Interconnection ( OSI ) model allowing them to route traffic based on MAC address (Kurose & Ross, 2009). While switching
Mechanical reliability and life prediction of coated metallic interconnects within solid oxide fuel cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Xu, Zhijie; Xu, Wei; Stephens, Elizabeth

Metallic cell interconnects (IC) made of ferritic stainless steels, i.e., iron-based alloys, have been increasingly favored in the recent development of planar solid oxide fuel cells (SOFCs) because of their advantages in excellent imperviousness, low electrical resistance, ease in fabrication, and cost effectiveness. Typical SOFC operating conditions inevitably lead to the formation of oxide scales on the surface of ferritic stainless steel, which could cause delamination, buckling, and spallation resulting from the mismatch of the coefficient of thermal expansion and eventually reduce the lifetime of the interconnect components. Various protective coating techniques have been applied to alleviate these drawbacks. Inmore » the present work, a fracture-mechanics-based quantitative modeling framework has been established to predict the mechanical reliability and lifetime of the spinel-coated, surface-modified specimens under an isothermal cooling cycle. Analytical solutions have been formulated to evaluate the scale/substrate interfacial strength and determine the critical oxide thickness in terms of a variety of design factors, such as coating thickness, material properties, and uncertainties. In conclusion, the findings then are correlated with the experimentally measured oxide scale growth kinetics to quantify the predicted lifetime of the metallic interconnects.« less

Optomechanical Design and Characterization of a Printed-Circuit-Board-Based Free-Space Optical Interconnect Package

NASA Astrophysics Data System (ADS)

Zheng, Xuezhe; Marchand, Philippe J.; Huang, Dawei; Kibar, Osman; Ozkan, Nur S. E.; Esener, Sadik C.

1999-09-01

We present a proof of concept and a feasibility demonstration of a practical packaging approach in which free-space optical interconnects (FSOI s) can be integrated simply on electronic multichip modules (MCM s) for intra-MCM board interconnects. Our system-level packaging architecture is based on a modified folded 4 f imaging system that has been implemented with only off-the-shelf optics, conventional electronic packaging, and passive-assembly techniques to yield a potentially low-cost and manufacturable packaging solution. The prototypical system as built supports 48 independent FSOI channels with 8 separate laser and detector chips, for which each chip consists of a one-dimensional array of 12 devices. All the chips are assembled on a single substrate that consists of a printed circuit board or a ceramic MCM. Optical link channel efficiencies of greater than 90% and interchannel cross talk of less than 20 dB at low frequency have been measured. The system is compact at only 10 in. 3 (25.4 cm 3 ) and is scalable, as it can easily accommodate additional chips as well as two-dimensional optoelectronic device arrays for increased interconnection density.
Mechanical reliability and life prediction of coated metallic interconnects within solid oxide fuel cells

DOE PAGES

Xu, Zhijie; Xu, Wei; Stephens, Elizabeth; ...

2017-07-03

Metallic cell interconnects (IC) made of ferritic stainless steels, i.e., iron-based alloys, have been increasingly favored in the recent development of planar solid oxide fuel cells (SOFCs) because of their advantages in excellent imperviousness, low electrical resistance, ease in fabrication, and cost effectiveness. Typical SOFC operating conditions inevitably lead to the formation of oxide scales on the surface of ferritic stainless steel, which could cause delamination, buckling, and spallation resulting from the mismatch of the coefficient of thermal expansion and eventually reduce the lifetime of the interconnect components. Various protective coating techniques have been applied to alleviate these drawbacks. Inmore » the present work, a fracture-mechanics-based quantitative modeling framework has been established to predict the mechanical reliability and lifetime of the spinel-coated, surface-modified specimens under an isothermal cooling cycle. Analytical solutions have been formulated to evaluate the scale/substrate interfacial strength and determine the critical oxide thickness in terms of a variety of design factors, such as coating thickness, material properties, and uncertainties. In conclusion, the findings then are correlated with the experimentally measured oxide scale growth kinetics to quantify the predicted lifetime of the metallic interconnects.« less
Fiber optic interconnect and optoelectronic packaging challenges for future generation avionics

NASA Astrophysics Data System (ADS)

Beranek, Mark W.

2007-02-01

Forecasting avionics industry fiber optic interconnect and optoelectronic packaging challenges that lie ahead first requires an assumption that military avionics architectures will evolve from today's centralized/unified concept based on gigabit laser, optical-to-electrical-to-optical switching and optical backplane technology, to a future federated/distributed or centralized/unified concept based on gigabit tunable laser, electro-optical switch and add-drop wavelength division multiplexing (WDM) technology. The requirement to incorporate avionics optical built-in test (BIT) in military avionics fiber optic systems is also assumed to be correct. Taking these assumptions further indicates that future avionics systems engineering will use WDM technology combined with photonic circuit integration and advanced packaging to form the technical basis of the next generation military avionics onboard local area network (LAN). Following this theme, fiber optic cable plants will evolve from today's multimode interconnect solution to a single mode interconnect solution that is highly installable, maintainable, reliable and supportable. Ultimately optical BIT for fiber optic fault detection and isolation will be incorporated as an integral part of a total WDM-based avionics LAN solution. Cost-efficient single mode active and passive photonic component integration and packaging integration is needed to enable reliable operation in the harsh military avionics application environment. Rugged multimode fiber-based transmitters and receivers (transceivers) with in-package optical BIT capability are also needed to enable fully BIT capable single-wavelength fiber optic links on both legacy and future aerospace platforms.
Mathematical modelling of flow distribution in the human cardiovascular system

NASA Technical Reports Server (NTRS)

Sud, V. K.; Srinivasan, R. S.; Charles, J. B.; Bungo, M. W.

1992-01-01

The paper presents a detailed model of the entire human cardiovascular system which aims to study the changes in flow distribution caused by external stimuli, changes in internal parameters, or other factors. The arterial-venous network is represented by 325 interconnected elastic segments. The mathematical description of each segment is based on equations of hydrodynamics and those of stress/strain relationships in elastic materials. Appropriate input functions provide for the pumping of blood by the heart through the system. The analysis employs the finite-element technique which can accommodate any prescribed boundary conditions. Values of model parameters are from available data on physical and rheological properties of blood and blood vessels. As a representative example, simulation results on changes in flow distribution with changes in the elastic properties of blood vessels are discussed. They indicate that the errors in the calculated overall flow rates are not significant even in the extreme case of arteries and veins behaving as rigid tubes.
Adolescent Contraceptive Use: Models, Research, and Directions.

ERIC Educational Resources Information Center

Whitley, Bernard E., Jr.; Schofield, Janet Ward

Both the career model and the decision model have been proposed to explain patterns of contraceptive use in teenagers. The career model views contraceptive use as a symbol of a woman's sexuality and implies a clear decision to be sexually active. The decision model is based on the subjective expected utility (SEU) theory which holds that people…
Numerical simulation of CTE mismatch and thermal-structural stresses in the design of interconnects

NASA Astrophysics Data System (ADS)

Peter, Geoffrey John M.

With the ever-increasing chip complexity, interconnects have to be designed to meet the new challenges. Advances in optical lithography have made chip feature sizes available today at 70 nm dimensions. With advances in Extreme Ultraviolet Lithography, X-ray Lithography, and Ion Projection Lithography it is expected that the line width will further decrease to 20 nm or less. With the decrease in feature size, the number of active devices on the chip increases. With higher levels of circuit integration, the challenge is to dissipate the increased heat flux from the chip surface area. Thermal management considerations include coefficient of thermal expansion (CTE) matching to prevent failure between the chip and the board. This in turn calls for improved system performance and reliability of the electronic structural systems. Experience has shown that in most electronic systems, failures are mostly due to CTE mismatch between the chip, board, and the solder joint (solder interconnect). The resulting high thermal-structural stress and strain due to CTE mismatch produces cracks in the solder joints with eventual failure of the electronic component. In order to reduce the thermal stress between the chip, board, and the solder joint, this dissertation examines the effect of inserting wire bundle (wire interconnect) between the chip and the board. The flexibility of the wires or fibers would reduce the stress at the rigid joints. Numerical simulations of two, and three-dimensional models of the solder and wire interconnects are examined. The numerical simulation is linear in nature and is based on linear isotropic material properties. The effect of different wire material properties is examined. The effect of varying the wire diameter is studied by changing the wire diameter. A major cause of electronic equipment failure is due to fatigue failure caused by thermal cycling, and vibrations. A two-dimensional modal and harmonic analysis was simulated for the wire interconnect and the solder interconnect. The numerical model simulated using ANSYS program was validated with the numerical/experimental results of other published researchers. In addition the results were cross-checked by IDEAS program. A prototype non-working wire interconnect is proposed to emphasize practical application. The numerical analysis, in this dissertation is based on a U.S. Patent granted to G. Peter(42).
Optical interconnection network for parallel access to multi-rank memory in future computing systems.

PubMed

Wang, Kang; Gu, Huaxi; Yang, Yintang; Wang, Kun

2015-08-10

With the number of cores increasing, there is an emerging need for a high-bandwidth low-latency interconnection network, serving core-to-memory communication. In this paper, aiming at the goal of simultaneous access to multi-rank memory, we propose an optical interconnection network for core-to-memory communication. In the proposed network, the wavelength usage is delicately arranged so that cores can communicate with different ranks at the same time and broadcast for flow control can be achieved. A distributed memory controller architecture that works in a pipeline mode is also designed for efficient optical communication and transaction address processes. The scaling method and wavelength assignment for the proposed network are investigated. Compared with traditional electronic bus-based core-to-memory communication, the simulation results based on the PARSEC benchmark show that the bandwidth enhancement and latency reduction are apparent.
The Nuclear Weapons Effects National Enterprise

DTIC Science & Technology

2010-06-01

dependent on computers and electrical circuitry for effectiveness. The danger from radiation induced upset or burnout of improperly or unshielded...for Unmanned Systems Radiation Effect Thermal mechanical shock - X-ray Prompt X-ray/gamma dose rate - Rail-span collapse - Photoionization burnout ...event upset (SEU) or even single-event burnout . SEU results when enough ionization charge is deposited by a high-energy particle (natural or man
[Keratosis palmoplantaris maculosa seu papulosa (Davies-Colley) simulating multiple cornua cutanea].

PubMed

Schreiber, D; Stücker, M; Hoffmann, K; Bacharach-Buhles, M; Altmeyer, P

1997-08-01

Patient with extensive keratosis palmoplantaris maculosa seu papulosa (Davies-Colley) presented with multiple cutaneous horns. The clinical picture, the histology, the electro microscopic examination, the negative tumor screening and the viral classification in the tissue allowed the differentiation from other palmoplantar keratoses. The patient was treated successfully using a combination of acitretin with physical and chemical measures.
QCAPUF: QCA-based physically unclonable function as a hardware security primitive

NASA Astrophysics Data System (ADS)

Abutaleb, M. M.

2018-04-01

Physically unclonable functions (PUFs) are increasingly used as innovative security primitives to provide the hardware authentication and identification as well as the secret key generation based on unique and random variations in identically fabricated devices. Security and low power have appeared to become two crucial necessities to modern designs. As an emerging nanoelectronic technology, a quantum-dot cellular automata (QCA) can achieve ultra-low power consumption as well as an extremely small area for implementing digital designs. However, there are various classes of permanent defects that can happen during the manufacture of QCA devices. The recent extensive research has been focused on how to eliminate errors in QCA structures resulting from fabrication variances. By a completely different vision, to turn this disadvantage into an advantage, this paper presents a novel QCA-based PUF (QCAPUF) architecture to exploit the unique physical characteristics of fabricated QCA cells in order to produce different hardware fingerprint instances. This architecture is composed of proposed logic and interconnect blocks that have critical vulnerabilities and perform unexpected logical operations. The behaviour of QCAPUF is thoroughly analysed through physical relations and simulations. Results confirm that the proposed QCAPUF has state of the art PUF characteristics in the QCA technology. This paper will serve as a basis for further research into QCA-based hardware security primitives and applications.
New insights gained on mechanisms of low-energy proton-induced SEUs by minimizing energy straggle

DOE PAGES

Dodds, Nathaniel Anson; Dodd, Paul E.; Shaneyfelt, Marty R.; ...

2015-12-01

In this study, we present low-energy proton single-event upset (SEU) data on a 65 nm SOI SRAM whose substrate has been completely removed. Since the protons only had to penetrate a very thin buried oxide layer, these measurements were affected by far less energy loss, energy straggle, flux attrition, and angular scattering than previous datasets. The minimization of these common sources of experimental interference allows more direct interpretation of the data and deeper insight into SEU mechanisms. The results show a strong angular dependence, demonstrate that energy straggle, flux attrition, and angular scattering affect the measured SEU cross sections, andmore » prove that proton direct ionization is the dominant mechanism for low-energy proton-induced SEUs in these circuits.« less
Fabrication of a novel gigabit/second free-space optical interconnect - photodetector characterization and testing and system development

NASA Technical Reports Server (NTRS)

Savich, Gregory R.

2004-01-01

The time when computing power is limited by the copper wire inherent in the computer system and not the speed of the microprocessor is rapidly approaching. With constant advances in computer technology, many researchers believe that in only a few years, optical interconnects will begin to replace copper wires in your Central Processing Unit (CPU). On a more macroscopic scale, the telecommunications industry has already made the switch to optical data transmission as, to date, fiber optic technology is the only reasonable method of reliable, long range data transmission. Within the span of a decade, we will see optical technologies move from the macroscopic world of the telecommunications industry to the microscopic world of the computer chip. Already, the communications industry is marketing commercially available optical links to connect two personal computers, thereby eliminating the need for standard and comparatively slow wired and wireless Ethernet transfers and greatly increasing the distance the computers can be separated. As processing demands continue to increase, the realm of optical communications will continue to move closer to the microprocessor and quite possibly onto the microprocessor itself. A day may come when copper connections are used only to supply power, not transfer data. This summer s work marks some of the beginning stages of a 5 to 10 year, long-term research project to create and study a free-space, 1 Gigabit/sec optical interconnect. The research will result in a novel fabricated, chip-to-chip interconnect consisting of a Vertical Cavity Surface Emitting Laser (VCSEL) Diode linked through free space to a Metal- Semiconductor-Metal (MSM) Photodetector with the possible integration of microlenses for signal focusing and Micro-Electromechanical Systems (MEMS) devices for optical signal steering. The advantages, disadvantages, and practicality of incorporating flip-chip mounting technologies will also be addressed. My work began with the design and construction of a test setup for the experiment and then appropriate characterization of the test system. Specifically, I am involved in the characterization of a commercially available 1550nm wavelength, 5mW diode laser and a study of its modulation bandwidth. Commercially produced photodetectors as well as the incorporation of microwave technology, in the form of RF input and output, are used in the characterization procedure. The next stage involves the use of a probe station and network analyzer to characterize and test a series of photodetectors fabricated on a 2 inch, Indium Gallium Arsenide (InGaAs) wafer in the Branch s microlithography lab. Other project responsibilities include, but are not limited to the incorporation of a transimpedance amplifier to the photodetector circuit; a study of VCSEL technology; bit error rate analysis of an optical interconnect system; and analysis of free space divergence of the VCSEL, optical path length of the interconnect; and any other pertinent optical properties of the one gigabit per second interconnect for fabrication and testing.
White beam analysis of coupling between precipitation and plasticdeformation during electromigration in a passivated Al(0.5wt. percent Cu)interconnect

DOE Office of Scientific and Technical Information (OSTI.GOV)

Barabash, R.I.; Ice, G.E.; Tamura, N.

2005-09-01

The scaling of device dimensions with a simultaneous increase in functional density imposes a challenge to materials technology and reliability of interconnects. White beam X-ray microdiffraction is particularly well suited for the in situ study of electromigration. M.A. Krivoglaz theory was applied for the interpretation of white beam diffraction. The technique was used to probe microstructure in interconnects and has recently been able to monitor the onset of plastic deformation induced by mass transport during electromigration in Al(Cu) lines even before any macroscopic damage became visible. In the present paper, we demonstrate that the evolution of the dislocation structure duringmore » electromigration is highly inhomogeneous and results in the formation of unpaired randomly distributed geometrically necessary dislocations as well as geometrically necessary dislocation boundaries. When almost all unpaired dislocations and dislocation walls with the density n+ are parallel (as in the case of Al-based interconnects), the anisotropy in the scattering properties of the material becomes important, and the electrical properties of the interconnect depend strongly on the direction of the electric current relative to the orientation of the dislocation network. A coupling between the dissolution, growth and reprecipitation of Al2Cu precipitates and the electromigration-induced plastic deformation of grains in interconnects is observed.« less
Fully optical backplane system using novel optical plug and slot

NASA Astrophysics Data System (ADS)

Cho, In-Kui; Ahn, Seung-Ho; Lee, Woo-Jin; Han, Sang-Pil; Kim, Jin-Tae; Choi, Chun-Ki; Shin, Kyung-Up; Yoon, Keun Byoung; Jeong, Myung-Yung; Park, Hyo Hoon

2005-10-01

A fully optical PCB with transmitter/receiver system boards and optical bakcplane was prepared, which is board-to-board interconnection by an optical slot. We report a 10 Gb/s PRBS NRZ data transmission between transmitter system board and optical backplane embedded multimode polymeric waveguide arrays. The basic concept of the optical PCB is as follows; 1) Metal optical bench is integrated with optoelectronic devices, driver and receiver circuits, polymeric waveguide and access line PCB module. 2) Multimode polymeric waveguide inside an optical backplane, which is embedded into PCB, 3) Optical slot and plug for high-density (channel pitch : 500 um) board-to-board interconnection. The polymeric waveguide technology can be used for transmission of data between transmitter/receiver processing boards and backplane boards. The main components are low-loss tapered polymeric waveguides and a novel optical plug and slot for board-to-board interconnections, respectively. The transmitter/receiver processing boards are designed as plug types, and can be easily plugged-in and -out at an optical backplane board. The optical backplane boards are prepared by employing the lamination processes for conventional electrical PCBs. A practical optical backplane system was implemented with two processing boards and an optical backplane. As connection components between the transmitter/receiver processing boards and backplane board, optical slots made of a 90°-bending structure-embedded optical plug was used. A 10 Gb/s data link was successfully demonstrated. The bit error rate (BER) was determined and is 5.6×10 -9(@10Gb/s) and the BER of 8 Gb/s is < 10 -12.
Autonomous self-configuration of artificial neural networks for data classification or system control

NASA Astrophysics Data System (ADS)

Fink, Wolfgang

2009-05-01

Artificial neural networks (ANNs) are powerful methods for the classification of multi-dimensional data as well as for the control of dynamic systems. In general terms, ANNs consist of neurons that are, e.g., arranged in layers and interconnected by real-valued or binary neural couplings or weights. ANNs try mimicking the processing taking place in biological brains. The classification and generalization capabilities of ANNs are given by the interconnection architecture and the coupling strengths. To perform a certain classification or control task with a particular ANN architecture (i.e., number of neurons, number of layers, etc.), the inter-neuron couplings and their accordant coupling strengths must be determined (1) either by a priori design (i.e., manually) or (2) using training algorithms such as error back-propagation. The more complex the classification or control task, the less obvious it is how to determine an a priori design of an ANN, and, as a consequence, the architecture choice becomes somewhat arbitrary. Furthermore, rather than being able to determine for a given architecture directly the corresponding coupling strengths necessary to perform the classification or control task, these have to be obtained/learned through training of the ANN on test data. We report on the use of a Stochastic Optimization Framework (SOF; Fink, SPIE 2008) for the autonomous self-configuration of Artificial Neural Networks (i.e., the determination of number of hidden layers, number of neurons per hidden layer, interconnections between neurons, and respective coupling strengths) for performing classification or control tasks. This may provide an approach towards cognizant and self-adapting computing architectures and systems.
Experiment in Onboard Synthetic Aperture Radar Data Processing

NASA Technical Reports Server (NTRS)

Holland, Matthew

2011-01-01

Single event upsets (SEUs) are a threat to any computing system running on hardware that has not been physically radiation hardened. In addition to mandating the use of performance-limited, hardened heritage equipment, prior techniques for dealing with the SEU problem often involved hardware-based error detection and correction (EDAC). With limited computing resources, software- based EDAC, or any more elaborate recovery methods, were often not feasible. Synthetic aperture radars (SARs), when operated in the space environment, are interesting due to their relevance to NASAs objectives, but problematic in the sense of producing prodigious amounts of raw data. Prior implementations of the SAR data processing algorithm have been too slow, too computationally intensive, and require too much application memory for onboard execution to be a realistic option when using the type of heritage processing technology described above. This standard C-language implementation of SAR data processing is distributed over many cores of a Tilera Multicore Processor, and employs novel Radiation Hardening by Software (RHBS) techniques designed to protect the component processes (one per core) and their shared application memory from the sort of SEUs expected in the space environment. The source code includes calls to Tilera APIs, and a specialized Tilera compiler is required to produce a Tilera executable. The compiled application reads input data describing the position and orientation of a radar platform, as well as its radar-burst data, over time and writes out processed data in a form that is useful for analysis of the radar observations.
Parallel processor-based raster graphics system architecture

DOEpatents

Littlefield, Richard J.

1990-01-01

An apparatus for generating raster graphics images from the graphics command stream includes a plurality of graphics processors connected in parallel, each adapted to receive any part of the graphics command stream for processing the command stream part into pixel data. The apparatus also includes a frame buffer for mapping the pixel data to pixel locations and an interconnection network for interconnecting the graphics processors to the frame buffer. Through the interconnection network, each graphics processor may access any part of the frame buffer concurrently with another graphics processor accessing any other part of the frame buffer. The plurality of graphics processors can thereby transmit concurrently pixel data to pixel locations in the frame buffer.
Interconnect assembly for an electronic assembly and assembly method therefor

DOEpatents

Gerbsch, Erich William

2003-06-10

An interconnect assembly and method for a semiconductor device, in which the interconnect assembly can be used in lieu of wirebond connections to form an electronic assembly. The interconnect assembly includes first and second interconnect members. The first interconnect member has a first surface with a first contact and a second surface with a second contact electrically connected to the first contact, while the second interconnect member has a flexible finger contacting the second contact of the first interconnect member. The first interconnect member is adapted to be aligned and registered with a semiconductor device having a contact on a first surface thereof, so that the first contact of the first interconnect member electrically contacts the contact of the semiconductor device. Consequently, the assembly method does not require any wirebonds, but instead merely entails aligning and registering the first interconnect member with the semiconductor device so that the contacts of the first interconnect member and the semiconductor device make electrically contact, and then contacting the second contact of the first interconnect member with the flexible finger of the second interconnect member.
Application of RADSAFE to Model Single Event Upset Response of a 0.25 micron CMOS SRAM

NASA Technical Reports Server (NTRS)

Warren, Kevin M.; Weller, Robert A.; Sierawski, Brian; Reed, Robert A.; Mendenhall, Marcus H.; Schrimpf, Ronald D.; Massengill, Lloyd; Porter, Mark; Wilkerson, Jeff; LaBel, Kenneth A.;

2006-01-01

The RADSAFE simulation framework is described and applied to model Single Event Upsets (SEU) in a 0.25 micron CMOS 4Mbit Static Random Access Memory (SRAM). For this circuit, the RADSAFE approach produces trends similar to those expected from classical models, but more closely represents the physical mechanisms responsible for SEU in the SRAM circuit.

Altitude and latitude variations in avionics SEU and atmospheric neutron flux

DOE Office of Scientific and Technical Information (OSTI.GOV)

Normand, E.; Baker, T.J.

1993-12-01

The direct cause of single event upsets in SRAMs at aircraft altitudes by the atmospheric neutrons has previously been documented. The variation of the in-flight SEU rate with latitude is demonstrated by new data over a wide range of geographical locations. New measurements and models of the atmospheric neutron flux are also evaluated to characterize its variation with altitude, latitude and solar activity.

Confidence intervals in Flow Forecasting by using artificial neural networks

NASA Astrophysics Data System (ADS)

Panagoulia, Dionysia; Tsekouras, George

2014-05-01

One of the major inadequacies in implementation of Artificial Neural Networks (ANNs) for flow forecasting is the development of confidence intervals, because the relevant estimation cannot be implemented directly, contrasted to the classical forecasting methods. The variation in the ANN output is a measure of uncertainty in the model predictions based on the training data set. Different methods for uncertainty analysis, such as bootstrap, Bayesian, Monte Carlo, have already proposed for hydrologic and geophysical models, while methods for confidence intervals, such as error output, re-sampling, multi-linear regression adapted to ANN have been used for power load forecasting [1-2]. The aim of this paper is to present the re-sampling method for ANN prediction models and to develop this for flow forecasting of the next day. The re-sampling method is based on the ascending sorting of the errors between real and predicted values for all input vectors. The cumulative sample distribution function of the prediction errors is calculated and the confidence intervals are estimated by keeping the intermediate value, rejecting the extreme values according to the desired confidence levels, and holding the intervals symmetrical in probability. For application of the confidence intervals issue, input vectors are used from the Mesochora catchment in western-central Greece. The ANN's training algorithm is the stochastic training back-propagation process with decreasing functions of learning rate and momentum term, for which an optimization process is conducted regarding the crucial parameters values, such as the number of neurons, the kind of activation functions, the initial values and time parameters of learning rate and momentum term etc. Input variables are historical data of previous days, such as flows, nonlinearly weather related temperatures and nonlinearly weather related rainfalls based on correlation analysis between the under prediction flow and each implicit input variable of different ANN structures [3]. The performance of each ANN structure is evaluated by the voting analysis based on eleven criteria, which are the root mean square error (RMSE), the correlation index (R), the mean absolute percentage error (MAPE), the mean percentage error (MPE), the mean percentage error (ME), the percentage volume in errors (VE), the percentage error in peak (MF), the normalized mean bias error (NMBE), the normalized root mean bias error (NRMSE), the Nash-Sutcliffe model efficiency coefficient (E) and the modified Nash-Sutcliffe model efficiency coefficient (E1). The next day flow for the test set is calculated using the best ANN structure's model. Consequently, the confidence intervals of various confidence levels for training, evaluation and test sets are compared in order to explore the generalisation dynamics of confidence intervals from training and evaluation sets. [1] H.S. Hippert, C.E. Pedreira, R.C. Souza, "Neural networks for short-term load forecasting: A review and evaluation," IEEE Trans. on Power Systems, vol. 16, no. 1, 2001, pp. 44-55. [2] G. J. Tsekouras, N.E. Mastorakis, F.D. Kanellos, V.T. Kontargyri, C.D. Tsirekis, I.S. Karanasiou, Ch.N. Elias, A.D. Salis, P.A. Kontaxis, A.A. Gialketsi: "Short term load forecasting in Greek interconnected power system using ANN: Confidence Interval using a novel re-sampling technique with corrective Factor", WSEAS International Conference on Circuits, Systems, Electronics, Control & Signal Processing, (CSECS '10), Vouliagmeni, Athens, Greece, December 29-31, 2010. [3] D. Panagoulia, I. Trichakis, G. J. Tsekouras: "Flow Forecasting via Artificial Neural Networks - A Study for Input Variables conditioned on atmospheric circulation", European Geosciences Union, General Assembly 2012 (NH1.1 / AS1.16 - Extreme meteorological and hydrological events induced by severe weather and climate change), Vienna, Austria, 22-27 April 2012.
Misalignment corrections in optical interconnects

NASA Astrophysics Data System (ADS)

Song, Deqiang

Optical interconnects are considered a promising solution for long distance and high bitrate data transmissions, outperforming electrical interconnects in terms of loss and dispersion. Due to the bandwidth and distance advantage of optical interconnects, longer links have been implemented with optics. Recent studies show that optical interconnects have clear advantages even at very short distances---intra system interconnects. The biggest challenge for such optical interconnects is the alignment tolerance. Many free space optical components require very precise assembly and installation, and therefore the overall cost could be increased. This thesis studied the misalignment tolerance and possible alignment correction solutions for optical interconnects at backplane or board level. First the alignment tolerance for free space couplers was simulated and the result indicated the most critical alignments occur between the VCSEL, waveguide and microlens arrays. An in-situ microlens array fabrication method was designed and experimentally demonstrated, with no observable misalignment with the waveguide array. At the receiver side, conical lens arrays were proposed to replace simple microlens arrays for a larger angular alignment tolerance. Multilayer simulation models in CodeV were built to optimized the refractive index and shape profiles of the conical lens arrays. Conical lenses fabricated with micro injection molding machine and fiber etching were characterized. Active component VCSOA was used to correct misalignment in optical connectors between the board and backplane. The alignment correction capability were characterized for both DC and AC (1GHz) optical signal. The speed and bandwidth of the VCSOA was measured and compared with a same structure VCSEL. Based on the optical inverter being studied in our lab, an all-optical flip-flop was demonstrated using a pair of VCSOAs. This memory cell with random access ability can store one bit optical signal with set or reset beam. The operating conditions were studied to generate two stable states between the VCSOA pair. The entire functionality test was implemented with free space optical components.
Boundary pressure of inter-connection of Fe-Ni-S melt in olivine based on in-situ X-ray tomography: Implication to core formation in asteroids

NASA Astrophysics Data System (ADS)

Terasaki, H.; Urakawa, S.; Uesugi, K.; Nakatsuka, A.; Funakoshi, K.; Ohtani, E.

2011-12-01

Interconnectivity of Fe-alloy melt in crystalline silicates is important property for the core formation mechanism in planetary interior. In previous studies, the interconnectivity of Fe-alloy melt has been studied based on textural observation of recovered samples from high pressure and temperature. However, there is no observation under high pressure and temperature. We have developed 80-ton uni-axial press for X-ray computed micro-tomography (X-CT) and performed X-CT measurement under high pressure (Urakawa et al. 2010). Here we report X-CT measurement of Fe-Ni-S melt in crystalline olivine and interconnectivity of the melt up to 3.5 GPa and 1273 K. X-CT measurements were carried out at BL20B2 beamline, SPring-8 synchrotron facility. The sample was powder mixture of Fe-Ni-S and olivine, which was enclosed in graphite capsule. Heating was performed using a cylindrical graphite furnace. Pressure was generated using opposed toroidal-shape WC anvil. The uni-axial press was set on the rotational stage and X-ray radiography image of the sample was collected using CCD camera from 0°to 180°with 0.3° step. 3-D image of the sample was obtained by reconstructing the 2-D radiography image. The 3-D CT image shows that the size of the Fe-Ni-S melt increased significantly compared to that before melting below 2.5 GPa, suggesting that the melt was interconnected in olivine crystals. On the other hand, 3-D texture of the sample at 3.5 GPa did not show difference from that before melting. Therefore, the boundary of inter-connection of Fe-Ni-S melt is likely to locate between 2.5 and 3.5 GPa. This result is important application for the core formation mechanism especially in small bodies, such as differentiated asteroids.
Single-event effects in avionics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Normand, E.

1996-04-01

The occurrence of single-event upset (SEU) in aircraft electronics has evolved from a series of interesting anecdotal incidents to accepted fact. A study completed in 1992 demonstrated that SEU`s are real, that the measured in-flight rates correlate with the atmospheric neutron flux, and that the rates can be calculated using laboratory SEU data. Once avionics DEU was shown to be an actual effect, it had to be dealt with in avionics designs. The major concern is in random access memories (RAM`s), both static (SRAM`s) and dynamic (DRAM`s), because these microelectronic devices contain the largest number of bits, but other parts,more » such as microprocessors, are also potentially susceptible to upset. In addition, other single-event effects (SEE`s), specifically latch-up and burnout, can also be induced by atmospheric neutrons.« less
Integrated Flexible Electronic Devices Based on Passive Alignment for Physiological Measurement

PubMed Central

Ryu, Jin Hwa; Byun, Sangwon; Baek, In-Bok; Lee, Bong Kuk; Jang, Won Ick; Jang, Eun-Hye; Kim, Ah-Yung; Yu, Han Yung

2017-01-01

This study proposes a simple method of fabricating flexible electronic devices using a metal template for passive alignment between chip components and an interconnect layer, which enabled efficient alignment with high accuracy. An electrocardiogram (ECG) sensor was fabricated using 20 µm thick polyimide (PI) film as a flexible substrate to demonstrate the feasibility of the proposed method. The interconnect layer was fabricated by a two-step photolithography process and evaporation. After applying solder paste, the metal template was placed on top of the interconnect layer. The metal template had rectangular holes at the same position as the chip components on the interconnect layer. Rectangular hole sizes were designed to account for alignment tolerance of the chips. Passive alignment was performed by simply inserting the components in the holes of the template, which resulted in accurate alignment with positional tolerance of less than 10 µm based on the structural design, suggesting that our method can efficiently perform chip mounting with precision. Furthermore, a fabricated flexible ECG sensor was easily attachable to the curved skin surface and able to measure ECG signals from a human subject. These results suggest that the proposed method can be used to fabricate epidermal sensors, which are mounted on the skin to measure various physiological signals. PMID:28420219
Single-chip photonic transceiver based on bulk-silicon, as a chip-level photonic I/O platform for optical interconnects.

PubMed

Kim, Gyungock; Park, Hyundai; Joo, Jiho; Jang, Ki-Seok; Kwack, Myung-Joon; Kim, Sanghoon; Kim, In Gyoo; Oh, Jin Hyuk; Kim, Sun Ae; Park, Jaegyu; Kim, Sanggi

2015-06-10

When silicon photonic integrated circuits (PICs), defined for transmitting and receiving optical data, are successfully monolithic-integrated into major silicon electronic chips as chip-level optical I/Os (inputs/outputs), it will bring innovative changes in data computing and communications. Here, we propose new photonic integration scheme, a single-chip optical transceiver based on a monolithic-integrated vertical photonic I/O device set including light source on bulk-silicon. This scheme can solve the major issues which impede practical implementation of silicon-based chip-level optical interconnects. We demonstrated a prototype of a single-chip photonic transceiver with monolithic-integrated vertical-illumination type Ge-on-Si photodetectors and VCSELs-on-Si on the same bulk-silicon substrate operating up to 50 Gb/s and 20 Gb/s, respectively. The prototype realized 20 Gb/s low-power chip-level optical interconnects for λ ~ 850 nm between fabricated chips. This approach can have a significant impact on practical electronic-photonic integration in high performance computers (HPC), cpu-memory interface, hybrid memory cube, and LAN, SAN, data center and network applications.
Biwavelength transceiver module for parallel simultaneous bidirectional optical interconnections

NASA Astrophysics Data System (ADS)

Nguyen, Nga T. H.; Ukaegbu, Ikechi A.; Sangirov, Jamshid; Cho, Mu-Hee; Lee, Tae-Woo; Park, Hyo-Hoon

2013-12-01

The design of a biwavelength transceiver (TRx) module for parallel simultaneous bidirectional optical interconnects is described. The TRx module has been implemented using two different wavelengths, 850 and 1060 nm, to send and receive signals simultaneously through a common optical interface while optimizing cost and performance. Filtering mirrors are formed in the optical fibers which are embedded on a V-grooved silicon substrate for reflecting and filtering optical signals from/to vertical-cavity surface-emitting laser (VCSEL)/photodiode (PD). The VCSEL and PD are flip-chip bonded on individual silicon optical benches, which are attached on the silicon substrate for optical signal coupling from the VCSEL to fiber and from fiber to the PD. A high-speed and low-loss ceramic printed circuit board, which has a compact size of 0.033 cc, has been designed to carry transmitter and receiver chips for easy packaging of the TRx module. Applied for quad small form-factor pluggable applications at 40-Gbps operation, the four-channel biwavelength TRx module showed clear eye diagrams with a bit error rate (BER) of 10-12 at input powers of -5 and -5.8 dBm for 1060 and 850 nm operation modes, respectively.
Integrated MEMS-tunable VCSELs for reconfigurable optical interconnects

NASA Astrophysics Data System (ADS)

Kögel, Benjamin; Debernardi, Pierluigi; Westbergh, Petter; Gustavsson, Johan S.; Haglund, Åsa; Haglund, Erik; Bengtsson, Jörgen; Larsson, Anders

2012-03-01

A simple and low-cost technology for tunable vertical-cavity surface-emitting lasers (VCSELs) with curved movable micromirror is presented. The micro-electro-mechanical system (MEMS) is integrated with the active optical component (so-called half-VCSEL) by means of surface-micromachining using a reflown photoresist droplet as sacrificial layer. The technology is demonstrated for electrically pumped, short-wavelength (850 nm) tunable VCSELs. Fabricated devices with 10 μm oxide aperture are singlemode with sidemode suppression >35 dB, tunable over 24 nm with output power up to 0.5mW, and have a beam divergence angle <6 °. An improved high-speed design with reduced parasitic capacitance enables direct modulation with 3dB-bandwidths up to 6GHz and error-free data transmission at 5Gbit/s. The modulation response of the MEMS under electrothermal actuation has a bandwidth of 400 Hz corresponding to switching times of about 10ms. The thermal crosstalk between MEMS and half-VCSEL is negligible and not degrading the device performance. With these characteristics the integrated MEMS-tunable VCSELs are basically suitable for use in reconfigurable optical interconnects and ready for test in a prototype system. Schemes for improving output power, tuning speed, and modulation bandwidth are briefly discussed.
Statistical analysis of early failures in electromigration

NASA Astrophysics Data System (ADS)

Gall, M.; Capasso, C.; Jawarani, D.; Hernandez, R.; Kawasaki, H.; Ho, P. S.

2001-07-01

The detection of early failures in electromigration (EM) and the complicated statistical nature of this important reliability phenomenon have been difficult issues to treat in the past. A satisfactory experimental approach for the detection and the statistical analysis of early failures has not yet been established. This is mainly due to the rare occurrence of early failures and difficulties in testing of large sample populations. Furthermore, experimental data on the EM behavior as a function of varying number of failure links are scarce. In this study, a technique utilizing large interconnect arrays in conjunction with the well-known Wheatstone Bridge is presented. Three types of structures with a varying number of Ti/TiN/Al(Cu)/TiN-based interconnects were used, starting from a small unit of five lines in parallel. A serial arrangement of this unit enabled testing of interconnect arrays encompassing 480 possible failure links. In addition, a Wheatstone Bridge-type wiring using four large arrays in each device enabled simultaneous testing of 1920 interconnects. In conjunction with a statistical deconvolution to the single interconnect level, the results indicate that the electromigration failure mechanism studied here follows perfect lognormal behavior down to the four sigma level. The statistical deconvolution procedure is described in detail. Over a temperature range from 155 to 200 °C, a total of more than 75 000 interconnects were tested. None of the samples have shown an indication of early, or alternate, failure mechanisms. The activation energy of the EM mechanism studied here, namely the Cu incubation time, was determined to be Q=1.08±0.05 eV. We surmise that interface diffusion of Cu along the Al(Cu) sidewalls and along the top and bottom refractory layers, coupled with grain boundary diffusion within the interconnects, constitutes the Cu incubation mechanism.
Characterization of low temperature Cu/In bonding for fine-pitch interconnects in three-dimensional integration

NASA Astrophysics Data System (ADS)

Panchenko, Iuliana; Bickel, Steffen; Meyer, Jörg; Mueller, Maik; Wolf, Jürgen M.

2018-02-01

This study presents the results for Cu/In bonding based on the solid-liquid interdiffusion (SLID) principle for fine-pitch interconnects in three-dimensional integration. The microbumps were fabricated on Si wafers (55 µm pitch, 25 µm top bump diameter, 35 µm bottom bump diameter). In was electroplated directly on Cu only on the top die microbumps. Two different In thicknesses were manufactured (3 and 5 µm). The interconnects were successfully fabricated at a bonding temperature of 170 °C. High temperature storage was carried out at 150 and 200 °C for different times between 2 and 72 h directly after the interconnect formation in order to investigate the temperature stability. The microstructure was analyzed by scanning electron microscopy (SEM) and energy dispersive X-ray spectroscopy (EDX). The intermetallic compound (IMC) found in the microbumps after electroplating was CuIn2. The intermetallic interlayer consists of Cu11In9 and a thin layer of Cu2In after bonding and isothermal storage.
Cu6Sn5 Whiskers Precipitated in Sn3.0Ag0.5Cu/Cu Interconnection in Concentrator Silicon Solar Cells Solder Layer

PubMed Central

Zhang, Liang; Liu, Zhi-quan; Yang, Fan; Zhong, Su-juan

2017-01-01

Cu6Sn5 whiskers precipitated in Sn3.0Ag0.5Cu/Cu interconnection in concentrator silicon solar cells solder layer were found and investigated after reflow soldering and during aging. Ag3Sn fibers can be observed around Cu6Sn5 whiskers in the matrix microstructure, which can play an active effect on the reliability of interconnection. Different morphologies of Cu6Sn5 whiskers can be observed, and hexagonal rod structure is the main morphology of Cu6Sn5 whiskers. A hollow structure can be observed in hexagonal Cu6Sn5 whiskers, and a screw dislocation mechanism was used to represent the Cu6Sn5 growth. Based on mechanical property testing and finite element simulation, Cu6Sn5 whiskers were regarded as having a negative effect on the durability of Sn3.0Ag0.5Cu/Cu interconnection in concentrator silicon solar cells solder layer. PMID:28772686
DOE Office of Scientific and Technical Information (OSTI.GOV)

Reeve, Kathlene N.; Holaday, John R.; Choquette, Stephanie M.

New electronics applications demanding enhanced performance and higher operating temperatures have led to continued research in the field of Pb-free solder designs and interconnect solutions. In this paper, recent advances in the microstructural design of Pb-free solders and interconnect systems were discussed by highlighting two topics: increasing β-Sn nucleation in Sn-based solders, and isothermally solidified interconnects using transient liquid phases. Issues in β-Sn nucleation in Sn-based solders were summarized in the context of Swenson’s 2007 review of the topic. Recent advancements in the areas of alloy composition manipulation, nucleating heterogeneities, and rapid solidification were discussed, and a proposal based onmore » a multi-faceted solidification approach involving the promotion of constitutional undercooling and nucleating heterogeneities was outlined for future research. The second half of the paper analyzed two different approaches to liquid phase diffusion bonding as a replacement for high-Pb solders, one based on the application of the pseudo-binary Cu-Ni-Sn ternary system, and the other on a proposed thermodynamic framework for identifying potential ternary alloys for liquid phase diffusion bonding. Furthermore, all of the concepts reviewed relied upon the fundamentals of thermodynamics, kinetics, and solidification, to which Jack Smith substantially contributed during his scientific career.« less
Radiation-Tolerant, SpaceWire-Compatible Switching Fabric

NASA Technical Reports Server (NTRS)

Katzman, Vladimir

2011-01-01

Current and future near-Earth and deep space exploration programs and space defense programs require the development of robust intra-spacecraft serial data transfer electronics that must be reconfigurable, fault-tolerant, and have the ability to operate effectively for long periods of time in harsh environmental conditions. Existing data transfer systems based on state-of-the-art serial data transfer protocols or passive backplanes are slow, power-hungry, and poorly reconfigurable. They provide limited expandability and poor tolerance to radiation effects and total ionizing dose (TID) in particular, which presents harmful threats to modern submicron electronics. This novel approach is based on a standard library of differential cells tolerant to TID, and patented, multi-level serial interface architecture that ensures the reliable operation of serial interconnects without application of a data-strobe or other encoding techniques. This proprietary, high-speed differential interface presents a lowpower solution fully compatible with the SpaceWire (SW) protocol. It replaces a dual data-strobe link with two identical independent data channels, thus improving the system s tolerance to harsh environments through additional double redundancy. Each channel incorporates an automatic line integrity control circuitry that delivers error signals in case of broken or shorted lines.
Photonic crystal lasers using wavelength-scale embedded active region

NASA Astrophysics Data System (ADS)

Matsuo, Shinji; Sato, Tomonari; Takeda, Koji; Shinya, Akihiko; Nozaki, Kengo; Kuramochi, Eiichi; Taniyama, Hideaki; Notomi, Masaya; Fujii, Takuro; Hasebe, Koichi; Kakitsuka, Takaaki

2014-01-01

Lasers with ultra-low operating energy are desired for use in chip-to-chip and on-chip optical interconnects. If we are to reduce the operating energy, we must reduce the active volume. Therefore, a photonic crystal (PhC) laser with a wavelength-scale cavity has attracted a lot of attention because a PhC provides a large Q-factor with a small volume. To improve this device's performance, we employ an embedded active region structure in which the wavelength-scale active region is buried with an InP PhC slab. This structure enables us to achieve effective confinement of both carriers and photons, and to improve the thermal resistance of the device. Thus, we have obtained a large external differential quantum efficiency of 55% and an output power of -10 dBm by optical pumping. For electrical pumping, we use a lateral p-i-n structure that employs Zn diffusion and Si ion implantation for p-type and n-type doping, respectively. We have achieved room-temperature continuous-wave operation with a threshold current of 7.8 µA and a maximum 3 dB bandwidth of 16.2 GHz. The results of an experimental bit error rate measurement with a 10 Gbit s-1 NRZ signal reveal the minimum operating energy for transferring a single bit of 5.5 fJ. These results show the potential of this laser to be used for very short reach interconnects. We also describe the optimal design of cavity quality (Q) factor in terms of achieving a large output power with a low operating energy using a calculation based on rate equations. When we assume an internal absorption loss of 20 cm-1, the optimized coupling Q-factor is 2000.
Interconnections Seam Study | Energy Analysis | NREL

Science.gov Websites

Interconnections Seam Study Interconnections Seam Study Through the Interconnections Seam Study between the interconnections. This study will quantify the value of strengthening the connections (or Peer Review - Interconnections Seam Study to learn more. Our Approach To quantify the value of
An IMU-to-Body Alignment Method Applied to Human Gait Analysis.

PubMed

Vargas-Valencia, Laura Susana; Elias, Arlindo; Rocon, Eduardo; Bastos-Filho, Teodiano; Frizera, Anselmo

2016-12-10

This paper presents a novel calibration procedure as a simple, yet powerful, method to place and align inertial sensors with body segments. The calibration can be easily replicated without the need of any additional tools. The proposed method is validated in three different applications: a computer mathematical simulation; a simplified joint composed of two semi-spheres interconnected by a universal goniometer; and a real gait test with five able-bodied subjects. Simulation results demonstrate that, after the calibration method is applied, the joint angles are correctly measured independently of previous sensor placement on the joint, thus validating the proposed procedure. In the cases of a simplified joint and a real gait test with human volunteers, the method also performs correctly, although secondary plane errors appear when compared with the simulation results. We believe that such errors are caused by limitations of the current inertial measurement unit (IMU) technology and fusion algorithms. In conclusion, the presented calibration procedure is an interesting option to solve the alignment problem when using IMUs for gait analysis.
A digital wide range neutron flux measuring system for HL-2A

NASA Astrophysics Data System (ADS)

Yuan, Chen; Wu, Jun; Yin, Zejie

2017-08-01

To achieve wide-range, high-integration, and real-time performance on the neutron flux measurement on the HL-2A tokamak, a digital neutron flux measuring (DNFM) system based on the peripheral component interconnection (PCI) eXtension for Instrumentation express (PXIe) bus was designed. This system comprises a charge-sensitive preamplifier and a field programmable gate array (FPGA)-based main electronics plug-in. The DNFM totally covers source-range and intermediate-range neutron flux measurements, and increases system integration by a large margin through joining the pulse-counting mode and Campbell mode. Meanwhile, the neutron flux estimation method based on pulse piling proportions is able to choose and switch measuring modes in accordance with current flux, and this ensures the accuracy of measurements when the neutron flux changes suddenly. It has been demonstrated by simulated signals that the DNFM enhances the full-scale measuring range up to 1.9 × 108 cm-2 s-1, with relative error below 6.1%. The DNFM has been verified to provide a high temporal sensitivity at 10 ms time intervals on a single fission chamber on HL-2A. Contributed paper, published as part of the Proceedings of the 3rd Domestic Electromagnetic Plasma Diagnostics Workshop, September 2016, Hefei, China.
xiSPEC: web-based visualization, analysis and sharing of proteomics data.

PubMed

Kolbowski, Lars; Combe, Colin; Rappsilber, Juri

2018-05-08

We present xiSPEC, a standard compliant, next-generation web-based spectrum viewer for visualizing, analyzing and sharing mass spectrometry data. Peptide-spectrum matches from standard proteomics and cross-linking experiments are supported. xiSPEC is to date the only browser-based tool supporting the standardized file formats mzML and mzIdentML defined by the proteomics standards initiative. Users can either upload data directly or select files from the PRIDE data repository as input. xiSPEC allows users to save and share their datasets publicly or password protected for providing access to collaborators or readers and reviewers of manuscripts. The identification table features advanced interaction controls and spectra are presented in three interconnected views: (i) annotated mass spectrum, (ii) peptide sequence fragmentation key and (iii) quality control error plots of matched fragments. Highlighting or selecting data points in any view is represented in all other views. Views are interactive scalable vector graphic elements, which can be exported, e.g. for use in publication. xiSPEC allows for re-annotation of spectra for easy hypothesis testing by modifying input data. xiSPEC is freely accessible at http://spectrumviewer.org and the source code is openly available on https://github.com/Rappsilber-Laboratory/xiSPEC.
Blueprint for a microwave trapped ion quantum computer

PubMed Central

Lekitsch, Bjoern; Weidt, Sebastian; Fowler, Austin G.; Mølmer, Klaus; Devitt, Simon J.; Wunderlich, Christof; Hensinger, Winfried K.

2017-01-01

The availability of a universal quantum computer may have a fundamental impact on a vast number of research fields and on society as a whole. An increasingly large scientific and industrial community is working toward the realization of such a device. An arbitrarily large quantum computer may best be constructed using a modular approach. We present a blueprint for a trapped ion–based scalable quantum computer module, making it possible to create a scalable quantum computer architecture based on long-wavelength radiation quantum gates. The modules control all operations as stand-alone units, are constructed using silicon microfabrication techniques, and are within reach of current technology. To perform the required quantum computations, the modules make use of long-wavelength radiation–based quantum gate technology. To scale this microwave quantum computer architecture to a large size, we present a fully scalable design that makes use of ion transport between different modules, thereby allowing arbitrarily many modules to be connected to construct a large-scale device. A high error–threshold surface error correction code can be implemented in the proposed architecture to execute fault-tolerant operations. With appropriate adjustments, the proposed modules are also suitable for alternative trapped ion quantum computer architectures, such as schemes using photonic interconnects. PMID:28164154
High Resolution Fabrication of Interconnection Lines Using Picosecond Laser and Controlled Deposition of Gold Nanoparticles

NASA Astrophysics Data System (ADS)

Shahmoon, Asaf; Strauß, Johnnes; Zafri, Hadar; Schmidt, Michael; Zalevsky, Zeev

In this paper we present the fabrication procedure as well as the preliminary experimental results of a novel method for construction of high resolution nanometric interconnection lines. The fabrication procedure relies on a self-assembly process of gold nanoparticles at specific predetermined nanostructures. The nanostructures for the self-assembly process are based on the focused ion beam (FIB) or scanning electron beam (SEM) technology. The assembled nanoparticles are being illuminated using a picosecond laser with a wavelength of 532 nm. Different pulse energies have been investigated. The paper aimed at developing a novel and reliable process for fabrication of interconnection lines encompass three different disciplines, self-assembly of nanometric particles, optics and microelectronic.

Single-mode glass waveguide technology for optical interchip communication on board level

NASA Astrophysics Data System (ADS)

Brusberg, Lars; Neitz, Marcel; Schröder, Henning

2012-01-01

The large bandwidth demand in long-distance telecom networks lead to single-mode fiber interconnects as result of low dispersion, low loss and dense wavelength multiplexing possibilities. In contrast, multi-mode interconnects are suitable for much shorter lengths up to 300 meters and are promising for optical links between racks and on board level. Active optical cables based on multi-mode fiber links are at the market and research in multi-mode waveguide integration on board level is still going on. Compared to multi-mode, a single-mode waveguide has much more integration potential because of core diameters of around 20% of a multi-mode waveguide by a much larger bandwidth. But light coupling in single-mode waveguides is much more challenging because of lower coupling tolerances. Together with the silicon photonics technology, a single-mode waveguide technology on board-level will be the straight forward development goal for chip-to-chip optical interconnects integration. Such a hybrid packaging platform providing 3D optical single-mode links bridges the gap between novel photonic integrated circuits and the glass fiber based long-distance telecom networks. Following we introduce our 3D photonic packaging approach based on thin glass substrates with planar integrated optical single-mode waveguides for fiber-to-chip and chip-to-chip interconnects. This novel packaging approach merges micro-system packaging and glass integrated optics. It consists of a thin glass substrate with planar integrated singlemode waveguide circuits, optical mirrors and lenses providing an integration platform for photonic IC assembly and optical fiber interconnect. Thin glass is commercially available in panel and wafer formats and characterizes excellent optical and high-frequency properties. That makes it perfect for microsystem packaging. The paper presents recent results in single-mode waveguide technology on wafer level and waveguide characterization. Furthermore the integration in a hybrid packaging process and design issues are discussed.
A CWDM photoreceiver module for 10 Gb/s x 4ch interconnection based on a vertical-illumination-type Ge-on-Si photodetectors and a silica-based AWG

NASA Astrophysics Data System (ADS)

Jang, Ki-Seok; Joo, Jiho; Kim, Taeyong; Kim, Sanghoon; Oh, Jin Hyuk; Kim, In Gyoo; Kim, Sun Ae; Kim, Gyungock

2015-03-01

We report a 40 Gb/s photoreceiver based on vertical-illumination type Ge-on-Si photodetectors and a silica-based AWG demultiplexer by employing 4-channel CWDM. The 60um-diameter Ge-on-Si photodetector arrays, grown on a bulk silicon wafer by RPCVD and fabricated with CMOS-compatible process, have ~0.9 A/W responsivity with 13 GHz bandwidth at λ ~ 1330nm. Ge-on-Si photodetector arrays are hybrid-integrated with TIA/LAs and directly-coupled to the AWG. The low-cost FPCB-package based photoreceiver module shows 10.3 Gb/s × 4-channel interconnection with -11 ~ -12.2 dBm sensitivity at a BER = 10-12.
Low-power chip-level optical interconnects based on bulk-silicon single-chip photonic transceivers

NASA Astrophysics Data System (ADS)

Kim, Gyungock; Park, Hyundai; Joo, Jiho; Jang, Ki-Seok; Kwack, Myung-Joon; Kim, Sanghoon; Kim, In Gyoo; Kim, Sun Ae; Oh, Jin Hyuk; Park, Jaegyu; Kim, Sanggi

2016-03-01

We present new scheme for chip-level photonic I/Os, based on monolithically integrated vertical photonic devices on bulk silicon, which increases the integration level of PICs to a complete photonic transceiver (TRx) including chip-level light source. A prototype of the single-chip photonic TRx based on a bulk silicon substrate demonstrated 20 Gb/s low power chip-level optical interconnects between fabricated chips, proving that this scheme can offer compact low-cost chip-level I/O solutions and have a significant impact on practical electronic-photonic integration in high performance computers (HPC), cpu-memory interface, 3D-IC, and LAN/SAN/data-center and network applications.
Nitrogen-doped biomass-based ultra-thin carbon nanosheets with interconnected framework for High-Performance Lithium-Ion Batteries

NASA Astrophysics Data System (ADS)

Guo, Shasha; Chen, Yaxin; Shi, Liluo; Dong, Yue; Ma, Jing; Chen, Xiaohong; Song, Huaihe

2018-04-01

In this paper, a low-cost and environmental friendly synthesis strategy is proposed to fabricate nitrogen-doped biomass-based ultra-thin carbon nanosheets (N-CNS) with interconnected framework by using soybean milk as the carbon precursor and sodium chloride as the template. The interconnected porous nanosheet structure is beneficial for lithium ion transportation, and the defects introduced by pyridine nitrogen doping are favorable for lithium storage. When used as the anodes for lithium-ion batteries, the N-CNS electrode shows a high initial reversible specific capacity of 1334 mAh g-1 at 50 mA g-1, excellent rate performance (1212, 555 and 336 mAh g-1 at 0.05, 0.5 and 2 A g-1, respectively) and good cycling stability (355 mAh g-1 at 1 A g-1 after 1000 cycles). Furthermore, this study demonstrates the prospects of biomass and soybean milk, as the potential anode for the application of electrochemical energy storage devices.
A new decentralised controller design method for a class of strongly interconnected systems

NASA Astrophysics Data System (ADS)

Duan, Zhisheng; Jiang, Zhong-Ping; Huang, Lin

2017-02-01

In this paper, two interconnected structures are first discussed, under which some closed-loop subsystems must be unstable to make the whole interconnected system stable, which can be viewed as a kind of strongly interconnected systems. Then, comparisons with small gain theorem are discussed and large gain interconnected characteristics are shown. A new approach for the design of decentralised controllers is presented by determining the Lyapunov function structure previously, which allows the existence of unstable subsystems. By fully utilising the orthogonal space information of input matrix, some new understandings are presented for the construction of Lyapunov matrix. This new method can deal with decentralised state feedback, static output feedback and dynamic output feedback controllers in a unified framework. Furthermore, in order to reduce the design conservativeness and deal with robustness, a new robust decentralised controller design method is given by combining with the parameter-dependent Lyapunov function method. Some basic rules are provided for the choice of initial variables in Lyapunov matrix or new introduced slack matrices. As byproducts, some linear matrix inequality based sufficient conditions are established for centralised static output feedback stabilisation. Effects of unstable subsystems in nonlinear Lur'e systems are further discussed. The corresponding decentralised controller design method is presented for absolute stability. The examples illustrate that the new method is significantly effective.
NEPP Update of Independent Single Event Upset Field Programmable Gate Array Testing

NASA Technical Reports Server (NTRS)

Berg, Melanie; Label, Kenneth; Campola, Michael; Pellish, Jonathan

2017-01-01

This presentation provides a NASA Electronic Parts and Packaging (NEPP) Program update of independent Single Event Upset (SEU) Field Programmable Gate Array (FPGA) testing including FPGA test guidelines, Microsemi RTG4 heavy-ion results, Xilinx Kintex-UltraScale heavy-ion results, Xilinx UltraScale+ single event effect (SEE) test plans, development of a new methodology for characterizing SEU system response, and NEPP involvement with FPGA security and trust.
SEU hardened memory cells for a CCSDS Reed Solomon encoder

DOE Office of Scientific and Technical Information (OSTI.GOV)

Whitaker, S.; Canaris, J.; Liu, K.

This paper reports on design technique to harden CMOS memory circuits against Single Event Upset (SEU) in the space environment. The design technique provides a recovery mechanism which is independent of the shape of the upsetting event. A RAM cell and Flip Flop design are presented to demonstrate the method. The Flip Flop was used in the control circuitry for a Reed Solomon encoder designed for the Space Station and Explorer platforms.
Single Event Upset in Static Random Access Memories in Atmospheric Neutron Environments

NASA Astrophysics Data System (ADS)

Arita, Yutaka; Takai, Mikio; Ogawa, Izumi; Kishimoto, Tadafumi

2003-07-01

Single-event upsets (SEUs) in a 0.4 μm 4 Mbit complementary metal oxide semiconductor (CMOS) static random access memory (SRAM) were investigated in various atmospheric neutron environments at sea level, at an altitude of 2612 m mountain, at an altitude of commercial airplane, and at an underground depth of 476 m. Neutron-induced SEUs increase with the increase in altitude. For a device with a borophosphosilicate glass (BPSG) film, SEU rates induced by thermal neutrons increase with the decrease in the cell charge of a memory cell. A thermal neutron-induced SEU is significant in SRAMs with a small cell charge. With the conditions of small cell charge, thermal neutron-induced SEUs account for 60% or more of the total neutron-induced SEUs. The SEU rate induced by atmospheric thermal neutrons can be estimated by an acceleration test using 252Cf.
Packaging Technology Designed, Fabricated, and Assembled for High-Temperature SiC Microsystems

NASA Technical Reports Server (NTRS)

Chen, Liang-Yu

2003-01-01

A series of ceramic substrates and thick-film metalization-based prototype microsystem packages designed for silicon carbide (SiC) high-temperature microsystems have been developed for operation in 500 C harsh environments. These prototype packages were designed, fabricated, and assembled at the NASA Glenn Research Center. Both the electrical interconnection system and the die-attach scheme for this packaging system have been tested extensively at high temperatures. Printed circuit boards used to interconnect these chip-level packages and passive components also are being fabricated and tested. NASA space and aeronautical missions need harsh-environment, especially high-temperature, operable microsystems for probing the inner solar planets and for in situ monitoring and control of next-generation aeronautical engines. Various SiC high-temperature-operable microelectromechanical system (MEMS) sensors, actuators, and electronics have been demonstrated at temperatures as high as 600 C, but most of these devices were demonstrated only in the laboratory environment partially because systematic packaging technology for supporting these devices at temperatures of 500 C and beyond was not available. Thus, the development of a systematic high-temperature packaging technology is essential for both in situ testing and the commercialization of high-temperature SiC MEMS. Researchers at Glenn developed new prototype packages for high-temperature microsystems using ceramic substrates (aluminum nitride and 96- and 90-wt% aluminum oxides) and gold (Au) thick-film metalization. Packaging components, which include a thick-film metalization-based wirebond interconnection system and a low-electrical-resistance SiC die-attachment scheme, have been tested at temperatures up to 500 C. The interconnection system composed of Au thick-film printed wire and 1-mil Au wire bond was tested in 500 C oxidizing air with and without 50-mA direct current for over 5000 hr. The Au thick-film metalization-based wirebond electrical interconnection system was also tested in an extremely dynamic thermal environment to assess thermal reliability. The I-V curve1 of a SiC high-temperature diode was measured in oxidizing air at 500 C for 1000 hr to electrically test the Au thick-film material-based die-attach assembly.
DOE Office of Scientific and Technical Information (OSTI.GOV)

Alderfer, B.; Eldridge, M.; Starrs, T.

Distributed power is modular electric generation or storage located close to the point of use. Based on interviews of distributed generation project proponents, this report reviews the barriers that distributed generators of electricity are encountering when attempting to interconnect to the electrical grid. Descriptions of 26 of 65 case studies are included in the report. The survey found and the report describes a wide range of technical, business-practice, and regulatory barriers to interconnection. An action plan for reducing the impact of these barriers is also included.
Frequency-dependent failure mechanisms of nanocrystalline gold interconnect lines under general alternating current

NASA Astrophysics Data System (ADS)

Luo, X. M.; Zhang, B.; Zhang, G. P.

2014-09-01

Thermal fatigue failure of metallization interconnect lines subjected to alternating currents (AC) is becoming a severe threat to the long-term reliability of micro/nanodevices with increasing electrical current density/power. Here, thermal fatigue failure behaviors and damage mechanisms of nanocrystalline Au interconnect lines on the silicon glass substrate have been investigated by applying general alternating currents (the pure alternating current coupled with a direct current (DC) component) with different frequencies ranging from 0.05 Hz to 5 kHz. We observed both thermal fatigue damages caused by Joule heating-induced cyclic strain/stress and electromigration (EM) damages caused by the DC component. Besides, the damage formation showed a strong electrically-thermally-mechanically coupled effect and frequency dependence. At lower frequencies, thermal fatigue damages were dominant and the main damage forms were grain coarsening with grain boundary (GB) cracking/voiding and grain thinning. At higher frequencies, EM damages took over and the main damage forms were GB cracking/voiding of smaller grains and hillocks. Furthermore, the healing effect of the reversing current was considered to elucidate damage mechanisms of the nanocrystalline Au lines generated by the general AC. Lastly, a modified model was proposed to predict the lifetime of the nanocrystalline metal interconnect lines, i.e., that was a competing drift velocity-based approach based on the threshold time required for reverse diffusion/healing to occur.
High-bandwidth and low-loss multimode polymer waveguides and waveguide components for high-speed board-level optical interconnects

NASA Astrophysics Data System (ADS)

Bamiedakis, N.; Chen, J.; Penty, R. V.; White, I. H.

2016-03-01

Multimode polymer waveguides are being increasingly considered for use in short-reach board-level optical interconnects as they exhibit favourable optical properties and allow direct integration onto standard PCBs with conventional methods of the electronics industry. Siloxane-based multimode waveguides have been demonstrated with excellent optical transmission performance, while a wide range of passive waveguide components that offer routing flexibility and enable the implementation of complex on-board interconnection architectures has been reported. In recent work, we have demonstrated that these polymer waveguides can exhibit very high bandwidth-length products in excess of 30 GHz×m despite their highly-multimoded nature, while it has been shown that even larger values of > 60 GHz×m can be achieved by adjusting their refractive index profile. Furthermore, the combination of refractive index engineering and launch conditioning schemes can ensure high bandwidth (> 100 GHz×m) and high coupling efficiency (<1 dB) with standard multimode fibre inputs with relatively large alignment tolerances (~17×15 μm2). In the work presented here, we investigate the effects of refractive index engineering on the performance of passive waveguide components (crossings, bends) and provide suitable design rules for their on-board use. It is shown that, depending on the interconnection layout and link requirements, appropriate choice of refractive index profile can provide enhanced component performance, ensuring low loss interconnection and adequate link bandwidth. The results highlight the strong potential of this versatile optical technology for the formation of high-performance board-level optical interconnects with high routing flexibility.
Towards energy-efficient photonic interconnects

NASA Astrophysics Data System (ADS)

Demir, Yigit; Hardavellas, Nikos

2015-03-01

Silicon photonics have emerged as a promising solution to meet the growing demand for high-bandwidth, low-latency, and energy-efficient on-chip and off-chip communication in many-core processors. However, current silicon-photonic interconnect designs for many-core processors waste a significant amount of power because (a) lasers are always on, even during periods of interconnect inactivity, and (b) microring resonators employ heaters which consume a significant amount of power just to overcome thermal variations and maintain communication on the photonic links, especially in a 3D-stacked design. The problem of high laser power consumption is particularly important as lasers typically have very low energy efficiency, and photonic interconnects often remain underutilized both in scientific computing (compute-intensive execution phases underutilize the interconnect), and in server computing (servers in Google-scale datacenters have a typical utilization of less than 30%). We address the high laser power consumption by proposing EcoLaser+, which is a laser control scheme that saves energy by predicting the interconnect activity and opportunistically turning the on-chip laser off when possible, and also by scaling the width of the communication link based on a runtime prediction of the expected message length. Our laser control scheme can save up to 62 - 92% of the laser energy, and improve the energy efficiency of a manycore processor with negligible performance penalty. We address the high trimming (heating) power consumption of the microrings by proposing insulation methods that reduce the impact of localized heating induced by highly-active components on the 3D-stacked logic die.
A reference model for space data system interconnection services

NASA Astrophysics Data System (ADS)

Pietras, John; Theis, Gerhard

1993-03-01

The widespread adoption of standard packet-based data communication protocols and services for spaceflight missions provides the foundation for other standard space data handling services. These space data handling services can be defined as increasingly sophisticated processing of data or information received from lower-level services, using a layering approach made famous in the International Organization for Standardization (ISO) Open System Interconnection Reference Model (OSI-RM). The Space Data System Interconnection Reference Model (SDSI-RM) incorporates the conventions of the OSIRM to provide a framework within which a complete set of space data handling services can be defined. The use of the SDSI-RM is illustrated through its application to data handling services and protocols that have been defined by, or are under consideration by, the Consultative Committee for Space Data Systems (CCSDS).
A reference model for space data system interconnection services

NASA Technical Reports Server (NTRS)

Pietras, John; Theis, Gerhard

1993-01-01

The widespread adoption of standard packet-based data communication protocols and services for spaceflight missions provides the foundation for other standard space data handling services. These space data handling services can be defined as increasingly sophisticated processing of data or information received from lower-level services, using a layering approach made famous in the International Organization for Standardization (ISO) Open System Interconnection Reference Model (OSI-RM). The Space Data System Interconnection Reference Model (SDSI-RM) incorporates the conventions of the OSIRM to provide a framework within which a complete set of space data handling services can be defined. The use of the SDSI-RM is illustrated through its application to data handling services and protocols that have been defined by, or are under consideration by, the Consultative Committee for Space Data Systems (CCSDS).
Nano-Nucleation Characteristic of Cu-Ag Alloy Directly Electrodeposited on W Diffusion Barrier for Microelectronic Device Interconnect.

PubMed

Kim, Kang O; Kim, Sunjung

2016-05-01

Cu-Ag alloy interconnect is promising for ultra-large-scale integration (ULSI) microelectronic system of which device dimension keeps shrinking. In this study, seedless electrodeposition of Cu-Ag alloy directly on W diffusion barrier as interconnect technology is presented in respect of nano-nucleation control. Chemical equilibrium state of electrolyte was fundamentally investigated according to the pH of electrolyte because direct nano-nucleation of Cu-Ag alloy on W surface is challenging. Chelation behavior of Cu2+ and Ag+ ions with citrate (Cit) and ammonia ligands was dependent on the pH of electrolyte. The amount and kind of Cu- and Ag-based complexes determine the deposition rate, size, elemental composition, and surface morphology of Cu-Ag alloy nano-nuclei formed on W surface.
The power grid AGC frequency bias coefficient online identification method based on wide area information

NASA Astrophysics Data System (ADS)

Wang, Zian; Li, Shiguang; Yu, Ting

2015-12-01

This paper propose online identification method of regional frequency deviation coefficient based on the analysis of interconnected grid AGC adjustment response mechanism of regional frequency deviation coefficient and the generator online real-time operation state by measured data through PMU, analyze the optimization method of regional frequency deviation coefficient in case of the actual operation state of the power system and achieve a more accurate and efficient automatic generation control in power system. Verify the validity of the online identification method of regional frequency deviation coefficient by establishing the long-term frequency control simulation model of two-regional interconnected power system.
Performance evaluation of multi-stratum resources integrated resilience for software defined inter-data center interconnect.

PubMed

Yang, Hui; Zhang, Jie; Zhao, Yongli; Ji, Yuefeng; Wu, Jialin; Lin, Yi; Han, Jianrui; Lee, Young

2015-05-18

Inter-data center interconnect with IP over elastic optical network (EON) is a promising scenario to meet the high burstiness and high-bandwidth requirements of data center services. In our previous work, we implemented multi-stratum resources integration among IP networks, optical networks and application stratums resources that allows to accommodate data center services. In view of this, this study extends to consider the service resilience in case of edge optical node failure. We propose a novel multi-stratum resources integrated resilience (MSRIR) architecture for the services in software defined inter-data center interconnect based on IP over EON. A global resources integrated resilience (GRIR) algorithm is introduced based on the proposed architecture. The MSRIR can enable cross stratum optimization and provide resilience using the multiple stratums resources, and enhance the data center service resilience responsiveness to the dynamic end-to-end service demands. The overall feasibility and efficiency of the proposed architecture is experimentally verified on the control plane of our OpenFlow-based enhanced SDN (eSDN) testbed. The performance of GRIR algorithm under heavy traffic load scenario is also quantitatively evaluated based on MSRIR architecture in terms of path blocking probability, resilience latency and resource utilization, compared with other resilience algorithms.
Chain-Based Communication in Cylindrical Underwater Wireless Sensor Networks

PubMed Central

Javaid, Nadeem; Jafri, Mohsin Raza; Khan, Zahoor Ali; Alrajeh, Nabil; Imran, Muhammad; Vasilakos, Athanasios

2015-01-01

Appropriate network design is very significant for Underwater Wireless Sensor Networks (UWSNs). Application-oriented UWSNs are planned to achieve certain objectives. Therefore, there is always a demand for efficient data routing schemes, which can fulfill certain requirements of application-oriented UWSNs. These networks can be of any shape, i.e., rectangular, cylindrical or square. In this paper, we propose chain-based routing schemes for application-oriented cylindrical networks and also formulate mathematical models to find a global optimum path for data transmission. In the first scheme, we devise four interconnected chains of sensor nodes to perform data communication. In the second scheme, we propose routing scheme in which two chains of sensor nodes are interconnected, whereas in third scheme single-chain based routing is done in cylindrical networks. After finding local optimum paths in separate chains, we find global optimum paths through their interconnection. Moreover, we develop a computational model for the analysis of end-to-end delay. We compare the performance of the above three proposed schemes with that of Power Efficient Gathering System in Sensor Information Systems (PEGASIS) and Congestion adjusted PEGASIS (C-PEGASIS). Simulation results show that our proposed 4-chain based scheme performs better than the other selected schemes in terms of network lifetime, end-to-end delay, path loss, transmission loss, and packet sending rate. PMID:25658394
Performance evaluation of multi-stratum resources integration based on network function virtualization in software defined elastic data center optical interconnect.

PubMed

Yang, Hui; Zhang, Jie; Ji, Yuefeng; Tian, Rui; Han, Jianrui; Lee, Young

2015-11-30

Data center interconnect with elastic optical network is a promising scenario to meet the high burstiness and high-bandwidth requirements of data center services. In our previous work, we implemented multi-stratum resilience between IP and elastic optical networks that allows to accommodate data center services. In view of this, this study extends to consider the resource integration by breaking the limit of network device, which can enhance the resource utilization. We propose a novel multi-stratum resources integration (MSRI) architecture based on network function virtualization in software defined elastic data center optical interconnect. A resource integrated mapping (RIM) scheme for MSRI is introduced in the proposed architecture. The MSRI can accommodate the data center services with resources integration when the single function or resource is relatively scarce to provision the services, and enhance globally integrated optimization of optical network and application resources. The overall feasibility and efficiency of the proposed architecture are experimentally verified on the control plane of OpenFlow-based enhanced software defined networking (eSDN) testbed. The performance of RIM scheme under heavy traffic load scenario is also quantitatively evaluated based on MSRI architecture in terms of path blocking probability, provisioning latency and resource utilization, compared with other provisioning schemes.

Chemical-mechanical planarization of aluminum and copper interconnects with magnetic liners

NASA Astrophysics Data System (ADS)

Wang, Bin

2000-10-01

Chemical Mechanical Planarization (CMP) has been employed to achieve Damascene patterning of aluminum and copper interconnects with unique magnetic liners. A one-step process was developed for each interconnect scheme, using a double-layered pad with mesh cells, pores, and perforations on a top hard layer. In a hydrogen peroxide-based slurry, aluminum CMP was a process of periodic removal and formation of a surface oxide layer. Cu CMP in the same slurry, however, was found to be a dissolution dominant process. In a potassium iodate-based slurry, copper removal was the result of two competing reactions: copper dissolution and a non-native surface layer formation. Guided by electrochemistry, slurries were developed to remove nickel in different regimes of the corrosion kinetics diagram. Nickel CMP in a ferric sulfate-based slurry resulted in periodic removal and formation of a passive surface layer. In a potassium permanganate-based slurry, nickel removal is a dissolution dominant process. Visible Al(Cu) surface damages obtained with copper-doped aluminum could be eliminated by understanding the interactions between the substrate, the pad, and the abrasive agglomerate. Increasing substrate hardness by annealing prior to CMP led to a surface finish free of visible scratches. A similar result was also obtained by preventing formation of abrasive agglomerates and minimizing their contact with the substrate.
Single-chip photonic transceiver based on bulk-silicon, as a chip-level photonic I/O platform for optical interconnects

PubMed Central

Kim, Gyungock; Park, Hyundai; Joo, Jiho; Jang, Ki-Seok; Kwack, Myung-Joon; Kim, Sanghoon; Gyoo Kim, In; Hyuk Oh, Jin; Ae Kim, Sun; Park, Jaegyu; Kim, Sanggi

2015-01-01

When silicon photonic integrated circuits (PICs), defined for transmitting and receiving optical data, are successfully monolithic-integrated into major silicon electronic chips as chip-level optical I/Os (inputs/outputs), it will bring innovative changes in data computing and communications. Here, we propose new photonic integration scheme, a single-chip optical transceiver based on a monolithic-integrated vertical photonic I/O device set including light source on bulk-silicon. This scheme can solve the major issues which impede practical implementation of silicon-based chip-level optical interconnects. We demonstrated a prototype of a single-chip photonic transceiver with monolithic-integrated vertical-illumination type Ge-on-Si photodetectors and VCSELs-on-Si on the same bulk-silicon substrate operating up to 50 Gb/s and 20 Gb/s, respectively. The prototype realized 20 Gb/s low-power chip-level optical interconnects for λ ~ 850 nm between fabricated chips. This approach can have a significant impact on practical electronic-photonic integration in high performance computers (HPC), cpu-memory interface, hybrid memory cube, and LAN, SAN, data center and network applications. PMID:26061463
Performance evaluation of time-aware enhanced software defined networking (TeSDN) for elastic data center optical interconnection.

PubMed

Yang, Hui; Zhang, Jie; Zhao, Yongli; Ji, Yuefeng; Li, Hui; Lin, Yi; Li, Gang; Han, Jianrui; Lee, Young; Ma, Teng

2014-07-28

Data center interconnection with elastic optical networks is a promising scenario to meet the high burstiness and high-bandwidth requirements of data center services. We previously implemented enhanced software defined networking over elastic optical network for data center application [Opt. Express 21, 26990 (2013)]. On the basis of it, this study extends to consider the time-aware data center service scheduling with elastic service time and service bandwidth according to the various time sensitivity requirements. A novel time-aware enhanced software defined networking (TeSDN) architecture for elastic data center optical interconnection has been proposed in this paper, by introducing a time-aware resources scheduling (TaRS) scheme. The TeSDN can accommodate the data center services with required QoS considering the time dimensionality, and enhance cross stratum optimization of application and elastic optical network stratums resources based on spectrum elasticity, application elasticity and time elasticity. The overall feasibility and efficiency of the proposed architecture is experimentally verified on our OpenFlow-based testbed. The performance of TaRS scheme under heavy traffic load scenario is also quantitatively evaluated based on TeSDN architecture in terms of blocking probability and resource occupation rate.
3 x 3 free-space optical router based on crossbar network and its control algorithm

NASA Astrophysics Data System (ADS)

Hou, Peipei; Sun, Jianfeng; Yu, Zhou; Lu, Wei; Wang, Lijuan; Liu, Liren

2015-08-01

A 3 × 3 free-space optical router, which comprises optical switches and polarizing beam splitter (PBS) and based on crossbar network, is proposed in this paper. A control algorithm for the 3 × 3 free-space optical router is also developed to achieve rapid control without rearrangement. In order to test the performance of the network based on 3 × 3 free-space optical router and that of the algorithm developed for the optical router, experiments are designed. The experiment results show that the interconnection network based on the 3 × 3 free-space optical router has low cross talk, fast connection speed. Under the control of the algorithm developed, a non-block and real free interconnection network is obtained based on the 3 × 3 free-space optical router we proposed.
Marker-based reconstruction of the kinematics of a chain of segments: a new method that incorporates joint kinematic constraints.

PubMed

Klous, Miriam; Klous, Sander

2010-07-01

The aim of skin-marker-based motion analysis is to reconstruct the motion of a kinematical model from noisy measured motion of skin markers. Existing kinematic models for reconstruction of chains of segments can be divided into two categories: analytical methods that do not take joint constraints into account and numerical global optimization methods that do take joint constraints into account but require numerical optimization of a large number of degrees of freedom, especially when the number of segments increases. In this study, a new and largely analytical method for a chain of rigid bodies is presented, interconnected in spherical joints (chain-method). In this method, the number of generalized coordinates to be determined through numerical optimization is three, irrespective of the number of segments. This new method is compared with the analytical method of Veldpaus et al. [1988, "A Least-Squares Algorithm for the Equiform Transformation From Spatial Marker Co-Ordinates," J. Biomech., 21, pp. 45-54] (Veldpaus-method, a method of the first category) and the numerical global optimization method of Lu and O'Connor [1999, "Bone Position Estimation From Skin-Marker Co-Ordinates Using Global Optimization With Joint Constraints," J. Biomech., 32, pp. 129-134] (Lu-method, a method of the second category) regarding the effects of continuous noise simulating skin movement artifacts and regarding systematic errors in joint constraints. The study is based on simulated data to allow a comparison of the results of the different algorithms with true (noise- and error-free) marker locations. Results indicate a clear trend that accuracy for the chain-method is higher than the Veldpaus-method and similar to the Lu-method. Because large parts of the equations in the chain-method can be solved analytically, the speed of convergence in this method is substantially higher than in the Lu-method. With only three segments, the average number of required iterations with the chain-method is 3.0+/-0.2 times lower than with the Lu-method when skin movement artifacts are simulated by applying a continuous noise model. When simulating systematic errors in joint constraints, the number of iterations for the chain-method was almost a factor 5 lower than the number of iterations for the Lu-method. However, the Lu-method performs slightly better than the chain-method. The RMSD value between the reconstructed and actual marker positions is approximately 57% of the systematic error on the joint center positions for the Lu-method compared with 59% for the chain-method.
Active power control of solar PV generation for large interconnection frequency regulation and oscillation damping

DOE PAGES

Liu, Yong; Zhu, Lin; Zhan, Lingwei; ...

2015-06-23

Because of zero greenhouse gas emission and decreased manufacture cost, solar photovoltaic (PV) generation is expected to account for a significant portion of future power grid generation portfolio. Because it is indirectly connected to the power grid via power electronic devices, solar PV generation system is fully decoupled from the power grid, which will influence the interconnected power grid dynamic characteristics as a result. In this study, the impact of solar PV penetration on large interconnected power system frequency response and inter-area oscillation is evaluated, taking the United States Eastern Interconnection (EI) as an example. Furthermore, based on the constructedmore » solar PV electrical control model with additional active power control loops, the potential contributions of solar PV generation to power system frequency regulation and oscillation damping are examined. The advantages of solar PV frequency support over that of wind generator are also discussed. Finally, simulation results demonstrate that solar PV generations can effectively work as ‘actuators’ in alleviating the negative impacts they bring about.« less
Highly Efficient Perovskite Solar Modules by Scalable Fabrication and Interconnection Optimization

DOE PAGES

Yang, Mengjin; Kim, Dong Hoe; Klein, Talysa R.; ...

2018-01-02

To push perovskite solar cell (PSC) technology toward practical applications, large-area perovskite solar modules with multiple subcells need to be developed by fully scalable deposition approaches. Here, we demonstrate a deposition scheme for perovskite module fabrication with spray coating of a TiO2 electron transport layer (ETL) and blade coating of both a perovskite absorber layer and a spiro-OMeTAD-based hole transport layer (HTL). The TiO2 ETL remaining in the interconnection between subcells significantly affects the module performance. Reducing the TiO2 thickness changes the interconnection contact from a Schottky diode to ohmic behavior. Owing to interconnection resistance reduction, the perovskite modules withmore » a 10 nm TiO2 layer show enhanced performance mainly associated with an improved fill factor. Finally, we demonstrate a four-cell MA0.7FA0.3PbI3 perovskite module with a stabilized power conversion efficiency (PCE) of 15.6% measured from an aperture area of ~10.36 cm2, corresponding to an active-area module PCE of 17.9% with a geometric fill factor of ~87.3%.« less
Highly Efficient Perovskite Solar Modules by Scalable Fabrication and Interconnection Optimization

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yang, Mengjin; Kim, Dong Hoe; Klein, Talysa R.

To push perovskite solar cell (PSC) technology toward practical applications, large-area perovskite solar modules with multiple subcells need to be developed by fully scalable deposition approaches. Here, we demonstrate a deposition scheme for perovskite module fabrication with spray coating of a TiO2 electron transport layer (ETL) and blade coating of both a perovskite absorber layer and a spiro-OMeTAD-based hole transport layer (HTL). The TiO2 ETL remaining in the interconnection between subcells significantly affects the module performance. Reducing the TiO2 thickness changes the interconnection contact from a Schottky diode to ohmic behavior. Owing to interconnection resistance reduction, the perovskite modules withmore » a 10 nm TiO2 layer show enhanced performance mainly associated with an improved fill factor. Finally, we demonstrate a four-cell MA0.7FA0.3PbI3 perovskite module with a stabilized power conversion efficiency (PCE) of 15.6% measured from an aperture area of ~10.36 cm2, corresponding to an active-area module PCE of 17.9% with a geometric fill factor of ~87.3%.« less
Wireless Interconnects for Intra-chip & Inter-chip Transmission

NASA Astrophysics Data System (ADS)

Narde, Rounak Singh

With the emergence of Internet of Things and information revolution, the demand of high performance computing systems is increasing. The copper interconnects inside the computing chips have evolved into a sophisticated network of interconnects known as Network on Chip (NoC) comprising of routers, switches, repeaters, just like computer networks. When network on chip is implemented on a large scale like in Multicore Multichip (MCMC) systems for High Performance Computing (HPC) systems, length of interconnects increases and so are the problems like power dissipation, interconnect delays, clock synchronization and electrical noise. In this thesis, wireless interconnects are chosen as the substitute for wired copper interconnects. Wireless interconnects offer easy integration with CMOS fabrication and chip packaging. Using wireless interconnects working at unlicensed mm-wave band (57-64GHz), high data rate of Gbps can be achieved. This thesis presents study of transmission between zigzag antennas as wireless interconnects for Multichip multicores (MCMC) systems and 3D IC. For MCMC systems, a four-chips 16-cores model is analyzed with only four wireless interconnects in three configurations with different antenna orientations and locations. Return loss and transmission coefficients are simulated in ANSYS HFSS. Moreover, wireless interconnects are designed, fabricated and tested on a 6'' silicon wafer with resistivity of 55O-cm using a basic standard CMOS process. Wireless interconnect are designed to work at 30GHz using ANSYS HFSS. The fabricated antennas are resonating around 20GHz with a return loss of less than -10dB. The transmission coefficients between antenna pair within a 20mm x 20mm silicon die is found to be varying between -45dB to -55dB. Furthermore, wireless interconnect approach is extended for 3D IC. Wireless interconnects are implemented as zigzag antenna. This thesis extends the work of analyzing the wireless interconnects in 3D IC with different configurations of antenna orientations and coolants. The return loss and transmission coefficients are simulated using ANSYS HFSS.
Characterizing SRAM Single Event Upset in Terms of Single and Double Node Charge Collection

NASA Technical Reports Server (NTRS)

Black, J. D.; Ball, D. R., II; Robinson, W. H.; Fleetwood, D. M.; Schrimpf, R. D.; Reed, R. A.; Black, D. A.; Warren, K. M.; Tipton, A. D.; Dodd, P. E.;

2008-01-01

A well-collapse source-injection mode for SRAM SEU is demonstrated through TCAD modeling. The recovery of the SRAM s state is shown to be based upon the resistive path from the p+-sources in the SRAM to the well. Multiple cell upset patterns for direct charge collection and the well-collapse source-injection mechanisms are then predicted and compared to recent SRAM test data.

Empirical tools for simulating salinity in the estuaries in Everglades National Park, Florida

NASA Astrophysics Data System (ADS)

Marshall, F. E.; Smith, D. T.; Nickerson, D. M.

2011-12-01

Salinity in a shallow estuary is affected by upland freshwater inputs (surface runoff, stream/canal flows, groundwater), atmospheric processes (precipitation, evaporation), marine connectivity, and wind patterns. In Everglades National Park (ENP) in South Florida, the unique Everglades ecosystem exists as an interconnected system of fresh, brackish, and salt water marshes, mangroves, and open water. For this effort a coastal aquifer conceptual model of the Everglades hydrologic system was used with traditional correlation and regression hydrologic techniques to create a series of multiple linear regression (MLR) salinity models from observed hydrologic, marine, and weather data. The 37 ENP MLR salinity models cover most of the estuarine areas of ENP and produce daily salinity simulations that are capable of estimating 65-80% of the daily variability in salinity depending upon the model. The Root Mean Squared Error is typically about 2-4 salinity units, and there is little bias in the predictions. However, the absolute error of a model prediction in the nearshore embayments and the mangrove zone of Florida Bay may be relatively large for a particular daily simulation during the seasonal transitions. Comparisons show that the models group regionally by similar independent variables and salinity regimes. The MLR salinity models have approximately the same expected range of simulation accuracy and error as higher spatial resolution salinity models.
Testing interconnected VLSI circuits in the Big Viterbi Decoder

NASA Technical Reports Server (NTRS)

Onyszchuk, I. M.

1991-01-01

The Big Viterbi Decoder (BVD) is a powerful error-correcting hardware device for the Deep Space Network (DSN), in support of the Galileo and Comet Rendezvous Asteroid Flyby (CRAF)/Cassini Missions. Recently, a prototype was completed and run successfully at 400,000 or more decoded bits per second. This prototype is a complex digital system whose core arithmetic unit consists of 256 identical very large scale integration (VLSI) gate-array chips, 16 on each of 16 identical boards which are connected through a 28-layer, printed-circuit backplane using 4416 wires. Special techniques were developed for debugging, testing, and locating faults inside individual chips, on boards, and within the entire decoder. The methods are based upon hierarchical structure in the decoder, and require that chips or boards be wired themselves as Viterbi decoders. The basic procedure consists of sending a small set of known, very noisy channel symbols through a decoder, and matching observables against values computed by a software simulation. Also, tests were devised for finding open and short-circuited wires which connect VLSI chips on the boards and through the backplane.
Ground Motion Prediction Model Using Artificial Neural Network

NASA Astrophysics Data System (ADS)

Dhanya, J.; Raghukanth, S. T. G.

2018-03-01

This article focuses on developing a ground motion prediction equation based on artificial neural network (ANN) technique for shallow crustal earthquakes. A hybrid technique combining genetic algorithm and Levenberg-Marquardt technique is used for training the model. The present model is developed to predict peak ground velocity, and 5% damped spectral acceleration. The input parameters for the prediction are moment magnitude ( M w), closest distance to rupture plane ( R rup), shear wave velocity in the region ( V s30) and focal mechanism ( F). A total of 13,552 ground motion records from 288 earthquakes provided by the updated NGA-West2 database released by Pacific Engineering Research Center are utilized to develop the model. The ANN architecture considered for the model consists of 192 unknowns including weights and biases of all the interconnected nodes. The performance of the model is observed to be within the prescribed error limits. In addition, the results from the study are found to be comparable with the existing relations in the global database. The developed model is further demonstrated by estimating site-specific response spectra for Shimla city located in Himalayan region.
Dolphin Sounds-Inspired Covert Underwater Acoustic Communication and Micro-Modem

PubMed Central

Qiao, Gang; Liu, Songzuo; Bilal, Muhammad

2017-01-01

A novel portable underwater acoustic modem is proposed in this paper for covert communication between divers or underwater unmanned vehicles (UUVs) and divers at a short distance. For the first time, real dolphin calls are used in the modem to realize biologically inspired Covert Underwater Acoustic Communication (CUAC). A variety of dolphin whistles and clicks stored in an SD card inside the modem helps to realize different biomimetic CUAC algorithms based on the specified covert scenario. In this paper, the information is conveyed during the time interval between dolphin clicks. TMS320C6748 and TLV320AIC3106 are the core processors used in our unique modem for fast digital processing and interconnection with other terminals or sensors. Simulation results show that the bit error rate (BER) of the CUAC algorithm is less than 10−5 when the signal to noise ratio is over ‒5 dB. The modem was tested in an underwater pool, and a data rate of 27.1 bits per second at a distance of 10 m was achieved. PMID:29068363
DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, Shaobu; Lu, Shuai; Zhou, Ning

In interconnected power systems, dynamic model reduction can be applied on generators outside the area of interest to mitigate the computational cost with transient stability studies. This paper presents an approach of deriving the reduced dynamic model of the external area based on dynamic response measurements, which comprises of three steps, dynamic-feature extraction, attribution and reconstruction (DEAR). In the DEAR approach, a feature extraction technique, such as singular value decomposition (SVD), is applied to the measured generator dynamics after a disturbance. Characteristic generators are then identified in the feature attribution step for matching the extracted dynamic features with the highestmore » similarity, forming a suboptimal ‘basis’ of system dynamics. In the reconstruction step, generator state variables such as rotor angles and voltage magnitudes are approximated with a linear combination of the characteristic generators, resulting in a quasi-nonlinear reduced model of the original external system. Network model is un-changed in the DEAR method. Tests on several IEEE standard systems show that the proposed method gets better reduction ratio and response errors than the traditional coherency aggregation methods.« less
Review of Interconnection Practices and Costs in the Western States

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bird, Lori A; Flores-Espino, Francisco; Volpi, Christina M

The objective of this report is to evaluate the nature of barriers to interconnecting distributed PV, assess costs of interconnection, and compare interconnection practices across various states in the Western Interconnection. The report addresses practices for interconnecting both residential and commercial-scale PV systems to the distribution system. This study is part of a larger, joint project between the Western Interstate Energy Board (WIEB) and the National Renewable Energy Laboratory (NREL), funded by the U.S. Department of Energy, to examine barriers to distributed PV in the 11 states wholly within the Western Interconnection.
Opportunities and Benefits for Increasing Transmission Capacity between the US Eastern and Western Interconnections

NASA Astrophysics Data System (ADS)

Figueroa-Acevedo, Armando L.

Historically, the primary justification for building wide-area transmission lines in the US and around the world has been based on reliability and economic criteria. Today, the influence of renewable portfolio standards (RPS), Environmental Protection Agency (EPA) regulations, transmission needs, load diversity, and grid flexibility requirements drives interest in high capacity wide-area transmission. By making use of an optimization model to perform long-term (15 years) co-optimized generation and transmission expansion planning, this work explored the benefits of increasing transmission capacity between the US Eastern and Western Interconnections under different policy and futures assumptions. The model assessed tradeoffs between investments in cross-interconnection HVDC transmission, AC transmission needs within each interconnection, generation investment costs, and operational costs, while satisfying different policy compliance constraints. Operational costs were broken down into the following market products: energy, up-/down regulation reserve, and contingency reserve. In addition, the system operating flexibility requirements were modeled as a function of net-load variability so that the flexibility of the non-wind/non-solar resources increases with increased wind and solar investment. In addition, planning reserve constraints are imposed under the condition that they be deliverable to the load. Thus, the model allows existing and candidate generation resources for both operating reserves and deliverable planning reserves to be shared throughout the interconnections, a feature which significantly drives identification of least-cost investments. This model is used with a 169-bus representation of the North American power grid to design four different high-capacity wide-area transmission infrastructures. Results from this analysis suggest that, under policy that imposes a high-renewable future, the benefits of high capacity transmission between the Eastern and Western Interconnections outweigh its cost. A sensitivity analysis is included to test the robustness of each design under different future assumptions and approximate upper and lower bounds for cross-seam transmission between the Eastern and Western Interconnections.
Design and realization of flash translation layer in tiny embedded system

NASA Astrophysics Data System (ADS)

Ren, Xiaoping; Sui, Chaoya; Luo, Zhenghua; Cao, Wenji

2018-05-01

We design a solution of tiny embedded device NAND Flash storage system on the basis of deeply studying the characteristics of widely used NAND Flash in the embedded devices in order to adapt to the development of intelligent interconnection trend and solve the storage problem of large data volume in tiny embedded system. The hierarchical structure and function purposes of the system are introduced. The design and realization of address mapping, error correction, bad block management, wear balance, garbage collection and other algorithms in flash memory transformation layer are described in details. NAND Flash drive and management are realized on STM32 micro-controller, thereby verifying design effectiveness and feasibility.
A random access memory immune to single event upset using a T-Resistor

DOEpatents

Ochoa, A. Jr.

1987-10-28

In a random access memory cell, a resistance ''T'' decoupling network in each leg of the cell reduces random errors caused by the interaction of energetic ions with the semiconductor material forming the cell. The cell comprises two parallel legs each containing a series pair of complementary MOS transistors having a common gate connected to the node between the transistors of the opposite leg. The decoupling network in each leg is formed by a series pair of resistors between the transistors together with a third resistor interconnecting the junction between the pair of resistors and the gate of the transistor pair forming the opposite leg of the cell. 4 figs.
Static shape control for flexible structures

NASA Technical Reports Server (NTRS)

Rodriguez, G.; Scheid, R. E., Jr.

1986-01-01

An integrated methodology is described for defining static shape control laws for large flexible structures. The techniques include modeling, identifying and estimating the control laws of distributed systems characterized in terms of infinite dimensional state and parameter spaces. The models are expressed as interconnected elliptic partial differential equations governing a range of static loads, with the capability of analyzing electromagnetic fields around antenna systems. A second-order analysis is carried out for statistical errors, and model parameters are determined by maximizing an appropriate defined likelihood functional which adjusts the model to observational data. The parameter estimates are derived from the conditional mean of the observational data, resulting in a least squares superposition of shape functions obtained from the structural model.

Random access memory immune to single event upset using a T-resistor

DOEpatents

Ochoa, Jr., Agustin

1989-01-01

In a random access memory cell, a resistance "T" decoupling network in each leg of the cell reduces random errors caused by the interaction of energetic ions with the semiconductor material forming the cell. The cell comprises two parallel legs each containing a series pair of complementary MOS transistors having a common gate connected to the node between the transistors of the opposite leg. The decoupling network in each leg is formed by a series pair of resistors between the transistors together with a third resistor interconnecting the junction between the pair of resistors and the gate of the transistor pair forming the opposite leg of the cell.
The Reliability of Microalloyed Sn-Ag-Cu Solder Interconnections Under Cyclic Thermal and Mechanical Shock Loading

NASA Astrophysics Data System (ADS)

Mattila, Toni T.; Hokka, Jussi; Paulasto-Kröckel, Mervi

2014-11-01

In this study, the performance of three microalloyed Sn-Ag-Cu solder interconnection compositions (Sn-3.1Ag-0.52Cu, Sn-3.0Ag-0.52Cu-0.24Bi, and Sn-1.1Ag-0.52Cu-0.1Ni) was compared under mechanical shock loading (JESD22-B111 standard) and cyclic thermal loading (40 ± 125°C, 42 min cycle) conditions. In the drop tests, the component boards with the low-silver nickel-containing composition (Sn-Ag-Cu-Ni) showed the highest average number of drops-to-failure, while those with the bismuth-containing alloy (Sn-Ag-Cu-Bi) showed the lowest. Results of the thermal cycling tests showed that boards with Sn-Ag-Cu-Bi interconnections performed the best, while those with Sn-Ag-Cu-Ni performed the worst. Sn-Ag-Cu was placed in the middle in both tests. In this paper, we demonstrate that solder strength is an essential reliability factor and that higher strength can be beneficial for thermal cycling reliability but detrimental to drop reliability. We discuss these findings from the perspective of the microstructures and mechanical properties of the three solder interconnection compositions and, based on a comprehensive literature review, investigate how the differences in the solder compositions influence the mechanical properties of the interconnections and discuss how the differences are reflected in the failure mechanisms under both loading conditions.
Semiconductor lasers for versatile applications from global communications to on-chip interconnects

NASA Astrophysics Data System (ADS)

Arai, Shigehisa

2015-01-01

Since semiconductor lasers were realized in 1962, various efforts have been made to enrich human life thorough novel equipments and services. Among them optical fiber communications in global communications have brought out marvelous information technology age represented by the internet. In this paper, emerging topics made on GaInAsP/InP based long-wavelength lasers toward ultra-low power consumption semiconductor lasers for optical interconnects in supercomputers as well as in future LSIs are presented.
Implementation of virtual LANs over ATM WANs

NASA Astrophysics Data System (ADS)

Braun, Torsten; Maehler, Martin

1998-09-01

Virtual LANs (VLANs) allow to interconnect users over campus or wide area networks and gives the users the impression as they would be connected to the same local area network (LAN). The implementation of VLANs is based on ATM Forum's LAN Emulation and LAN/ATM switches providing interconnection of emulated LANs over ATM and the LAN ports to which the user's end systems are attached to. The paper discusses possible implementation architectures and describes advanced features such as ATM short-cuts, QoS, and redundancy concepts.
Hyperswitch Network For Hypercube Computer

NASA Technical Reports Server (NTRS)

Chow, Edward; Madan, Herbert; Peterson, John

1989-01-01

Data-driven dynamic switching enables high speed data transfer. Proposed hyperswitch network based on mixed static and dynamic topologies. Routing header modified in response to congestion or faults encountered as path established. Static topology meets requirement if nodes have switching elements that perform necessary routing header revisions dynamically. Hypercube topology now being implemented with switching element in each computer node aimed at designing very-richly-interconnected multicomputer system. Interconnection network connects great number of small computer nodes, using fixed hypercube topology, characterized by point-to-point links between nodes.
Silicon photonic IC embedded optical-PCB for high-speed interconnect application

NASA Astrophysics Data System (ADS)

Kallega, Rakshitha; Nambiar, Siddharth; Kumar, Abhai; Ranganath, Praveen; Selvaraja, Shankar Kumar

2018-02-01

Optical-Printed Circuit Board (PCB) is an emerging optical interconnect technology to bridge the gap between the board edge and the processing module. The technology so far has been used as a broadband transmitter using polymer waveguides in the PCB. In this paper, we report a Silicon Nitride based photonic IC embedded in the PCB along with the polymers as waveguides in the PCB. The motivation for such integration is to bring routing capability and to reduce the power loss due to broadcasting mode.
Soft error rate simulation and initial design considerations of neutron intercepting silicon chip (NISC)

NASA Astrophysics Data System (ADS)

Celik, Cihangir

Advances in microelectronics result in sub-micrometer electronic technologies as predicted by Moore's Law, 1965, which states the number of transistors in a given space would double every two years. The most available memory architectures today have submicrometer transistor dimensions. The International Technology Roadmap for Semiconductors (ITRS), a continuation of Moore's Law, predicts that Dynamic Random Access Memory (DRAM) will have an average half pitch size of 50 nm and Microprocessor Units (MPU) will have an average gate length of 30 nm over the period of 2008-2012. Decreases in the dimensions satisfy the producer and consumer requirements of low power consumption, more data storage for a given space, faster clock speed, and portability of integrated circuits (IC), particularly memories. On the other hand, these properties also lead to a higher susceptibility of IC designs to temperature, magnetic interference, power supply, and environmental noise, and radiation. Radiation can directly or indirectly affect device operation. When a single energetic particle strikes a sensitive node in the micro-electronic device, it can cause a permanent or transient malfunction in the device. This behavior is called a Single Event Effect (SEE). SEEs are mostly transient errors that generate an electric pulse which alters the state of a logic node in the memory device without having a permanent effect on the functionality of the device. This is called a Single Event Upset (SEU) or Soft Error . Contrary to SEU, Single Event Latchup (SEL), Single Event Gate Rapture (SEGR), or Single Event Burnout (SEB) they have permanent effects on the device operation and a system reset or recovery is needed to return to proper operations. The rate at which a device or system encounters soft errors is defined as Soft Error Rate (SER). The semiconductor industry has been struggling with SEEs and is taking necessary measures in order to continue to improve system designs in nano-scale technologies. Prevention of SEEs has been studied and applied in the semiconductor industry by including radiation protection precautions in the system architecture or by using corrective algorithms in the system operation. Decreasing 10B content (20%of natural boron) in the natural boron of Borophosphosilicate glass (BPSG) layers that are conventionally used in the fabrication of semiconductor devices was one of the major radiation protection approaches for the system architecture. Neutron interaction in the BPSG layer was the origin of the SEEs because of the 10B (n,alpha) 7Li reaction products. Both of the particles produced have the capability of ionization in the silicon substrate region, whose thickness is comparable to the ranges of these particles. Using the soft error phenomenon in exactly the opposite manner of the semiconductor industry can provide a new neutron detection system based on the SERs in the semiconductor memories. By investigating the soft error mechanisms in the available semiconductor memories and enhancing the soft error occurrences in these devices, one can convert all memory using intelligent systems into portable, power efficient, directiondependent neutron detectors. The Neutron Intercepting Silicon Chip (NISC) project aims to achieve this goal by introducing 10B-enriched BPSG layers to the semiconductor memory architectures. This research addresses the development of a simulation tool, the NISC Soft Error Analysis Tool (NISCSAT), for soft error modeling and analysis in the semiconductor memories to provide basic design considerations for the NISC. NISCSAT performs particle transport and calculates the soft error probabilities, or SER, depending on energy depositions of the particles in a given memory node model of the NISC. Soft error measurements were performed with commercially available, off-the-shelf semiconductor memories and microprocessors to observe soft error variations with the neutron flux and memory supply voltage. Measurement results show that soft errors in the memories increase proportionally with the neutron flux, whereas they decrease with increasing the supply voltages. NISC design considerations include the effects of device scaling, 10B content in the BPSG layer, incoming neutron energy, and critical charge of the node for this dissertation. NISCSAT simulations were performed with various memory node models to account these effects. Device scaling simulations showed that any further increase in the thickness of the BPSG layer beyond 2 mum causes self-shielding of the incoming neutrons due to the BPSG layer and results in lower detection efficiencies. Moreover, if the BPSG layer is located more than 4 mum apart from the depletion region in the node, there are no soft errors in the node due to the fact that both of the reaction products have lower ranges in the silicon or any possible node layers. Calculation results regarding the critical charge indicated that the mean charge deposition of the reaction products in the sensitive volume of the node is about 15 fC. It is evident that the NISC design should have a memory architecture with a critical charge of 15 fC or less to obtain higher detection efficiencies. Moreover, the sensitive volume should be placed in close proximity to the BPSG layers so that its location would be within the range of alpha and 7Li particles. Results showed that the distance between the BPSG layer and the sensitive volume should be less than 2 mum to increase the detection efficiency of the NISC. Incoming neutron energy was also investigated by simulations and the results obtained from these simulations showed that NISC neutron detection efficiency is related with the neutron cross-sections of 10B (n,alpha) 7Li reaction, e.g., ratio of the thermal (0.0253 eV) to fast (2 MeV) neutron detection efficiencies is approximately equal to 8000:1. Environmental conditions and their effects on the NISC performance were also studied in this research. Cosmic rays were modeled and simulated via NISCSAT to investigate detection reliability of the NISC. Simulation results show that cosmic rays account for less than 2 % of the soft errors for the thermal neutron detection. On the other hand, fast neutron detection by the NISC, which already has a poor efficiency due to the low neutron cross-sections, becomes almost impossible at higher altitudes where the cosmic ray fluxes and their energies are higher. NISCSAT simulations regarding soft error dependency of the NISC for temperature and electromagnetic fields show that there are no significant effects in the NISC detection efficiency. Furthermore, the detection efficiency of the NISC decreases with both air humidity and use of moderators since the incoming neutrons scatter away before reaching the memory surface.
National Assessment of Energy Storage for Grid Balancing and Arbitrage: Phase 1, WECC

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kintner-Meyer, Michael CW; Balducci, Patrick J.; Colella, Whitney G.

2012-06-01

To examine the role that energy storage could play in mitigating the impacts of the stochastic variability of wind generation on regional grid operation, the Pacific Northwest National Laboratory (PNNL) examined a hypothetical 2020 grid scenario in which additional wind generation capacity is built to meet renewable portfolio standard targets in the Western Interconnection. PNNL developed a stochastic model for estimating the balancing requirements using historical wind statistics and forecasting error, a detailed engineering model to analyze the dispatch of energy storage and fast-ramping generation devices for estimating size requirements of energy storage and generation systems for meeting new balancingmore » requirements, and financial models for estimating the life-cycle cost of storage and generation systems in addressing the future balancing requirements for sub-regions in the Western Interconnection. Evaluated technologies include combustion turbines, sodium sulfur (Na-S) batteries, lithium ion batteries, pumped-hydro energy storage, compressed air energy storage, flywheels, redox flow batteries, and demand response. Distinct power and energy capacity requirements were estimated for each technology option, and battery size was optimized to minimize costs. Modeling results indicate that in a future power grid with high-penetration of renewables, the most cost competitive technologies for meeting balancing requirements include Na-S batteries and flywheels.« less
Vibration isolation mounting system

NASA Technical Reports Server (NTRS)

Carter, Sam D. (Inventor); Bastin, Paul H. (Inventor)

1995-01-01

A system is disclosed for mounting a vibration producing device onto a spacecraft structure and also for isolating the vibration forces thereof from the structure. The system includes a mount on which the device is securely mounted and inner and outer rings. The rings and mount are concentrically positioned. The system includes a base (secured to the structure) and a set of links which are interconnected by a set of torsion bars which allow and resist relative rotational movement therebetween. The set of links are also rotatably connected to a set of brackets which are rigidly connected to the outer ring. Damped leaf springs interconnect the inner and outer rings and the mount allow relative translational movement therebetween in X and Y directions. The links, brackets and base are interconnected and configured so that they allow and resist translational movement of the device in the Z direction so that in combination with the springs they provide absorption of vibrational energy produced by the device in all three dimensions while providing rotational stiffness about all three axes to prevent undesired rotational motions.
Evaluation of hybrid polymers for high-precision manufacturing of 3D optical interconnects by two-photon absorption lithography

NASA Astrophysics Data System (ADS)

Schleunitz, A.; Klein, J. J.; Krupp, A.; Stender, B.; Houbertz, R.; Gruetzner, G.

2017-02-01

The fabrication of optical interconnects has been widely investigated for the generation of optical circuit boards. Twophoton absorption (TPA) lithography (or high-precision 3D printing) as an innovative production method for direct manufacture of individual 3D photonic structures gains more and more attention when optical polymers are employed. In this regard, we have evaluated novel ORMOCER-based hybrid polymers tailored for the manufacture of optical waveguides by means of high-precision 3D printing. In order to facilitate future industrial implementation, the processability was evaluated and the optical performance of embedded waveguides was assessed. The results illustrate that hybrid polymers are not only viable consumables for industrial manufacture of polymeric micro-optics using generic processes such as UV molding. They also are potential candidates to fabricate optical waveguide systems down to the chip level where TPA-based emerging manufacturing techniques are engaged. Hence, it is shown that hybrid polymers continue to meet the increasing expectations of dynamically growing markets of micro-optics and optical interconnects due to the flexibility of the employed polymer material concept.
The Binary System Laboratory Activities Based on Students Mental Model

NASA Astrophysics Data System (ADS)

Albaiti, A.; Liliasari, S.; Sumarna, O.; Martoprawiro, M. A.

2017-09-01

Generic science skills (GSS) are required to develop student conception in learning binary system. The aim of this research was to know the improvement of students GSS through the binary system labotoratory activities based on their mental model using hypothetical-deductive learning cycle. It was a mixed methods embedded experimental model research design. This research involved 15 students of a university in Papua, Indonesia. Essay test of 7 items was used to analyze the improvement of students GSS. Each items was designed to interconnect macroscopic, sub-microscopic and symbolic levels. Students worksheet was used to explore students mental model during investigation in laboratory. The increase of students GSS could be seen in their N-Gain of each GSS indicators. The results were then analyzed descriptively. Students mental model and GSS have been improved from this study. They were interconnect macroscopic and symbolic levels to explain binary systems phenomena. Furthermore, they reconstructed their mental model with interconnecting the three levels of representation in Physical Chemistry. It necessary to integrate the Physical Chemistry Laboratory into a Physical Chemistry course for effectiveness and efficiency.
Time-variant analysis of rotorcraft systems dynamics - An exploitation of vector processors

NASA Technical Reports Server (NTRS)

Amirouche, F. M. L.; Xie, M.; Shareef, N. H.

1993-01-01

In this paper a generalized algorithmic procedure is presented for handling constraints in mechanical transmissions. The latter are treated as multibody systems of interconnected rigid/flexible bodies. The constraint Jacobian matrices are generated automatically and suitably updated in time, depending on the geometrical and kinematical constraint conditions describing the interconnection between shafts or gears. The type of constraints are classified based on the interconnection of the bodies by assuming that one or more points of contact exist between them. The effects due to elastic deformation of the flexible bodies are included by allowing each body element to undergo small deformations. The procedure is based on recursively formulated Kane's dynamical equations of motion and the finite element method, including the concept of geometrical stiffening effects. The method is implemented on an IBM-3090-600j vector processor with pipe-lining capabilities. A significant increase in the speed of execution is achieved by vectorizing the developed code in computationally intensive areas. An example consisting of two meshing disks rotating at high angular velocity is presented. Applications are intended for the study of the dynamic behavior of helicopter transmissions.
Flexible interconnects for fuel cell stacks

DOEpatents

Lenz, David J.; Chung, Brandon W.; Pham, Ai Quoc

2004-11-09

An interconnect that facilitates electrical connection and mechanical support with minimal mechanical stress for fuel cell stacks. The interconnects are flexible and provide mechanically robust fuel cell stacks with higher stack performance at lower cost. The flexible interconnects replace the prior rigid rib interconnects with flexible "fingers" or contact pads which will accommodate the imperfect flatness of the ceramic fuel cells. Also, the mechanical stress of stacked fuel cells will be smaller due to the flexibility of the fingers. The interconnects can be one-sided or double-sided.
Manufacture and quality control of interconnecting wire hardnesses, Volume 1

NASA Technical Reports Server (NTRS)

1972-01-01

A standard is presented for manufacture, installation, and quality control of eight types of interconnecting wire harnesses. The processes, process controls, and inspection and test requirements reflected are based on acknowledgment of harness design requirements, acknowledgment of harness installation requirements, identification of the various parts, materials, etc., utilized in harness manufacture, and formulation of a typical manufacturing flow diagram for identification of each manufacturing and quality control process, operation, inspection, and test. The document covers interconnecting wire harnesses defined in the design standard, including type 1, enclosed in fluorocarbon elastomer convolute, tubing; type 2, enclosed in TFE convolute tubing lines with fiberglass braid; type 3, enclosed in TFE convolute tubing; and type 5, combination of types 3 and 4. Knowledge gained through experience on the Saturn 5 program coupled with recent advances in techniques, materials, and processes was incorporated.
Development of automatic through-insulation welding for microelectric interconnections

NASA Technical Reports Server (NTRS)

Arnett, J. C.

1972-01-01

The capability to automatically route, remove insulation from, and weld small-diameter solid conductor wire is presented. This would facilitate the economical small-quantity production of complex miniature electronic assemblies. An engineering model of equipment having this capability was developed and evaluated. Whereas early work in the use of welded magnet wire interconnections was concentrated on opposed electrode systems, and generally used heat to melt the wire insulation, the present method is based on a concentric electrode system and a wire feed system which splits the insulation by application of pressure prior to welding. The work deals with the design, fabrication, and evaluation testing of an improved version of this concentric electrode system. Two different approaches to feeding the wire to the concentric electrodes were investigated. It was concluded that the process is feasible for the interconnection of complex miniature electronic assemblies.
Generic three-dimensional wavelength routers based on cross connects of multilayer diffractive elements

NASA Astrophysics Data System (ADS)

Deng, Xuegong; Chen, Ray T.

2001-05-01

We report a generic method to construct 3D wavelength routers by adapting a novel design for multi-optical wavelength interconnects (MOWI's). Optical wavelength- selective (WS) interconnections are realized by resorting to layered diffractive phase elements. Besides, we simultaneously carry out several other integrated operations on the incident beams according to their wavelengths. We demonstrate an 4 X 4 inline 3D WS optical crossconnect and a 1D 1 X 8 WS perfect shuffler. The devices are well feasible for mass production by using current standard microelectronics technologies. It is plausible that the proposed WS MOWI scenario will find critical applications in module-to-module and board-to-board optical interconnect systems, as well as in other devices for short-link multi- wavelength networks that would benefit from function integration.
Design guidelines for advanced LSI microcircuit packaging using thick film multilayer technology

NASA Technical Reports Server (NTRS)

Peckinpaugh, C. J.

1974-01-01

Ceramic multilayer circuitry results from the sequential build-up of two or more layers of pre-determined conductive interconnections separated by dielectric layers and fired at an elevated temperature to form a solidly fused structure. The resultant ceramic interconnect matrix is used as a base to mount active and passive devices and provide the necessary electrical interconnection to accomplish the desired electrical circuit. Many methods are known for developing multilevel conductor mechanisms such as multilayer printed circuits, welded wire matrices, flexible copper tape conductors, and thin and thick-film ceramic multilayers. Each method can be considered as a specialized field with each possessing its own particular set of benefits and problems. This design guide restricts itself to the art of design, fabrication and assembly of ceramic multilayer circuitry and the reliability of the end product.
Gigascale Silicon Photonic Transmitters Integrating HBT-based Carrier-injection Electroabsorption Modulator Structures

NASA Astrophysics Data System (ADS)

Fu, Enjin

Demand for more bandwidth is rapidly increasing, which is driven by data intensive applications such as high-definition (HD) video streaming, cloud storage, and terascale computing applications. Next-generation high-performance computing systems require power efficient chip-to-chip and intra-chip interconnect yielding densities on the order of 1Tbps/cm2. The performance requirements of such system are the driving force behind the development of silicon integrated optical interconnect, providing a cost-effective solution for fully integrated optical interconnect systems on a single substrate. Compared to conventional electrical interconnect, optical interconnects have several advantages, including frequency independent insertion loss resulting in ultra wide bandwidth and link latency reduction. For high-speed optical transmitter modules, the optical modulator is a key component of the optical I/O channel. This thesis presents a silicon integrated optical transmitter module design based on a novel silicon HBT-based carrier injection electroabsorption modulator (EAM), which has the merits of wide optical bandwidth, high speed, low power, low drive voltage, small footprint, and high modulation efficiency. The structure, mechanism, and fabrication of the modulator structure will be discussed which is followed by the electrical modeling of the post-processed modulator device. The design and realization of a 10Gbps monolithic optical transmitter module integrating the driver circuit architecture and the HBT-based EAM device in a 130nm BiCMOS process is discussed. For high power efficiency, a 6Gbps ultra-low power driver IC implemented in a 130nm BiCMOS process is presented. The driver IC incorporates an integrated 27-1 pseudo-random bit sequence (PRBS) generator for reliable high-speed testing, and a driver circuit featuring digitally-tuned pre-emphasis signal strength. With outstanding drive capability, the driver module can be applied to a wide range of carrier injection modulators and light-emitting diodes (LED) with drive voltage requirements below 1.5V. Measurement results show an optical link based on a 70MHz red LED work well at 300Mbps by using the pre-emphasis driver module. A traveling wave electrode (TWE) modulator structure is presented, including a novel design methodology to address process limitations imposed by a commercial silicon fabrication technology. Results from 3D full wave EM simulation demonstrate the application of the design methodology to achieve specifications, including phase velocity matching, insertion loss, and impedance matching. Results show the HBT-based TWE-EAM system has the bandwidth higher than 60GHz.
Solar Interconnection Standards & Policies

EPA Pesticide Factsheets

The Toolbox for Renewable Energy Project Development's Solar Interconnection Standards and Policies page provides an overview of the interconnection policy and standards, as well as, resources to help you understand the interconnection policy landscape.
Super-stretchable metallic interconnects on polymer with a linear strain of up to 100%

DOE Office of Scientific and Technical Information (OSTI.GOV)

Arafat, Yeasir; Dutta, Indranath; Panat, Rahul, E-mail: Rahul.panat@wsu.edu

Metal interconnects in flexible and wearable devices are heterogeneous metal-polymer systems that are expected to sustain large deformation without failure. The principal strategy to make strain tolerant interconnect lines on flexible substrates has comprised of creating serpentine structures of metal films with either in-plane or out-of-plane waves, using porous substrates, or using highly ductile materials such as gold. The wavy and helical serpentine patterns preclude high-density packing of interconnect lines on devices, while ductile materials such as Au are cost prohibitive for real world applications. Ductile copper films can be stretched if bonded to the substrate, but show high levelmore » of cracking beyond few tens of % strain. In this paper, we demonstrate a material system consisting of Indium metal film over an elastomer (PDMS) with a discontinuous Cr layer such that the metal interconnect can be stretched to extremely high linear strain (up to 100%) without any visible cracks. Such linear strain in metal interconnects exceeds that reported in literature and is obtained without the use of any geometrical manipulations or porous substrates. Systematic experimentation is carried out to explain the mechanisms that allow the Indium film to sustain the high strain level without failure. The islands forming the discontinuous Cr layer are shown to move apart from each other during stretching without delamination, providing strong adhesion to the Indium film while accommodating the large strain in the system. The Indium film is shown to form surface wrinkles upon release from the large strain, confirming its strong adhesion to PDMS. A model is proposed based upon the observations that can explain the high level of stretch-ability of the Indium metal film over the PDMS substrate.« less

Electrode and interconnect for miniature fuel cells using direct methanol feed

NASA Technical Reports Server (NTRS)

Narayanan, Sekharipuram R. (Inventor); Valdez, Thomas I. (Inventor); Clara, Filiberto (Inventor)

2004-01-01

An improved system for interconnects in a fuel cell. In one embodiment, the membranes are located in parallel with one another, and current flow between them is facilitated by interconnects. In another embodiment, all of the current flow is through the interconnects which are located on the membranes. The interconnects are located between two electrodes.
Local interconnection neural networks

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhang Jiajun; Zhang Li; Yan Dapen

1993-06-01

The idea of a local interconnection neural network (LINN) is presentd and compared with the globally interconnected Hopfield model. Under the storage limit requirement, LINN is shown to offer the same associative memory capability as the global interconnection neural network while having a much smaller interconnection matrix. LINN can be readily implemented optically using the currently available spatial light modulators. 15 refs.
76 FR 16405 - Notice of Attendance at PJM INterconnection, L.L.C., Meetings

Federal Register 2010, 2011, 2012, 2013, 2014

2011-03-23

... INterconnection, L.L.C., Meetings The Federal Energy Regulatory Commission (Commission) hereby gives notice that members of the Commission and Commission staff may attend upcoming PJM Interconnection, L.L.C., (PJM...: Docket No. EL05-121, PJM Interconnection, L.L.C. Docket No. ER06-456, PJM Interconnection, L.L.C. Docket...
Radiation tolerance of readout electronics for Belle II

NASA Astrophysics Data System (ADS)

Higuchi, T.; Nakao, M.; Nakano, E.

2012-02-01

We plan to start the Belle II experiment in 2015 and to continue data taking for more than ten years. Because some of the front-end electronics cards of Belle II are located inside the detector, radiation effects onto their components will be a severe problem. Using experimental exposure facilities of neutrons and γ rays, we study the radiation effects from these particles to the Virtex-5 FPGA, optical transceivers, and voltage regulators. The Virtex-5 FPGA is found to keep its operation after irradiation of more than 20-year-equivalent neutron flux of Belle II and 88-year-equivalent γ-ray dose. We observe single event upsets (SEUs) and multiple bit upsets (MBUs) in the Virtex-5 FPGA in the neutron irradiation. We also find almost doubled SEU counts in the Virtex-5 FPGA bombarded from its tail side than its head side. We extrapolate the observed SEU and MBU counts in the Virtex-5 FPGA to the entire readout system of the Belle II central drift chamber, and expect the SEU and MBU rates as one SEU per four minutes and one MBU per 11.5 hours, respectively. The optical transceivers are found to keep its operation after integration of 12-year-equivalent neutron flux, while they are killed by about 3-year-equivalent γ-ray dose, which should be solved in the future research. The voltage regulators are found to keep its operation for more than 10-year-equivalent γ-ray dose.
Controllability of multi-agent systems with time-delay in state and switching topology

NASA Astrophysics Data System (ADS)

Ji, Zhijian; Wang, Zidong; Lin, Hai; Wang, Zhen

2010-02-01

In this article, the controllability issue is addressed for an interconnected system of multiple agents. The network associated with the system is of the leader-follower structure with some agents taking leader role and others being followers interconnected via the neighbour-based rule. Sufficient conditions are derived for the controllability of multi-agent systems with time-delay in state, as well as a graph-based uncontrollability topology structure is revealed. Both single and double integrator dynamics are considered. For switching topology, two algebraic necessary and sufficient conditions are derived for the controllability of multi-agent systems. Several examples are also presented to illustrate how to control the system to shape into the desired configurations.
Selection and Evaluation of Priority Domains in Global Energy Internet Standard Development Based on Technology Foresight

NASA Astrophysics Data System (ADS)

Jin, Yang; Ciwei, Gao; Jing, Zhang; Min, Sun; Jie, Yu

2017-05-01

The selection and evaluation of priority domains in Global Energy Internet standard development will help to break through limits of national investment, thus priority will be given to standardizing technical areas with highest urgency and feasibility. Therefore, in this paper, the process of Delphi survey based on technology foresight is put forward, the evaluation index system of priority domains is established, and the index calculation method is determined. Afterwards, statistical method is used to evaluate the alternative domains. Finally the top four priority domains are determined as follows: Interconnected Network Planning and Simulation Analysis, Interconnected Network Safety Control and Protection, Intelligent Power Transmission and Transformation, and Internet of Things.
High-speed free-space based reconfigurable card-to-card optical interconnects with broadcast capability.

PubMed

Wang, Ke; Nirmalathas, Ampalavanapillai; Lim, Christina; Skafidas, Efstratios; Alameh, Kamal

2013-07-01

In this paper, we propose and experimentally demonstrate a free-space based high-speed reconfigurable card-to-card optical interconnect architecture with broadcast capability, which is required for control functionalities and efficient parallel computing applications. Experimental results show that 10 Gb/s data can be broadcast to all receiving channels for up to 30 cm with a worst-case receiver sensitivity better than -12.20 dBm. In addition, arbitrary multicasting with the same architecture is also investigated. 10 Gb/s reconfigurable point-to-point link and multicast channels are simultaneously demonstrated with a measured receiver sensitivity power penalty of ~1.3 dB due to crosstalk.
76 FR 46793 - PJM Interconnection, L.L.C.; PJM Power Providers Group v. PJM Interconnection, L.L.C.; Notice...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-08-03

...-002; Docket No. EL11-20-001] PJM Interconnection, L.L.C.; PJM Power Providers Group v. PJM Interconnection, L.L.C.; Notice Establishing Post-Technical Comment Period As indicated in the June 29, 2011... issues related to PJM Interconnection, L.L.C. (PJM)'s Minimum Offer Price Rule (MOPR) and resources...
Planar high density sodium battery

DOEpatents

Lemmon, John P.; Meinhardt, Kerry D.

2016-03-01

A method of making a molten sodium battery is disclosed. A first metallic interconnect frame having a first interconnect vent hole is provided. A second metallic interconnect frame having a second interconnect vent hole is also provided. An electrolyte plate having a cathode vent hole and an anode vent hole is interposed between the metallic interconnect frames. The metallic interconnect frames and the electrolyte plate are sealed thereby forming gaseous communication between an anode chamber through the anode vent hole and gaseous communication between a cathode chamber through the cathode vent hole.
A neuronal model of predictive coding accounting for the mismatch negativity.

PubMed

Wacongne, Catherine; Changeux, Jean-Pierre; Dehaene, Stanislas

2012-03-14

The mismatch negativity (MMN) is thought to index the activation of specialized neural networks for active prediction and deviance detection. However, a detailed neuronal model of the neurobiological mechanisms underlying the MMN is still lacking, and its computational foundations remain debated. We propose here a detailed neuronal model of auditory cortex, based on predictive coding, that accounts for the critical features of MMN. The model is entirely composed of spiking excitatory and inhibitory neurons interconnected in a layered cortical architecture with distinct input, predictive, and prediction error units. A spike-timing dependent learning rule, relying upon NMDA receptor synaptic transmission, allows the network to adjust its internal predictions and use a memory of the recent past inputs to anticipate on future stimuli based on transition statistics. We demonstrate that this simple architecture can account for the major empirical properties of the MMN. These include a frequency-dependent response to rare deviants, a response to unexpected repeats in alternating sequences (ABABAA…), a lack of consideration of the global sequence context, a response to sound omission, and a sensitivity of the MMN to NMDA receptor antagonists. Novel predictions are presented, and a new magnetoencephalography experiment in healthy human subjects is presented that validates our key hypothesis: the MMN results from active cortical prediction rather than passive synaptic habituation.
Adaptive Control via Neural Output Feedback for a Class of Nonlinear Discrete-Time Systems in a Nested Interconnected Form.

PubMed

Li, Dong-Juan; Li, Da-Peng

2017-09-14

In this paper, an adaptive output feedback control is framed for uncertain nonlinear discrete-time systems. The considered systems are a class of multi-input multioutput nonaffine nonlinear systems, and they are in the nested lower triangular form. Furthermore, the unknown dead-zone inputs are nonlinearly embedded into the systems. These properties of the systems will make it very difficult and challenging to construct a stable controller. By introducing a new diffeomorphism coordinate transformation, the controlled system is first transformed into a state-output model. By introducing a group of new variables, an input-output model is finally obtained. Based on the transformed model, the implicit function theorem is used to determine the existence of the ideal controllers and the approximators are employed to approximate the ideal controllers. By using the mean value theorem, the nonaffine functions of systems can become an affine structure but nonaffine terms still exist. The adaptation auxiliary terms are skillfully designed to cancel the effect of the dead-zone input. Based on the Lyapunov difference theorem, the boundedness of all the signals in the closed-loop system can be ensured and the tracking errors are kept in a bounded compact set. The effectiveness of the proposed technique is checked by a simulation study.
Silicon photonic Mach Zehnder modulators for next-generation short-reach optical communication networks

NASA Astrophysics Data System (ADS)

Lacava, C.; Liu, Z.; Thomson, D.; Ke, Li; Fedeli, J. M.; Richardson, D. J.; Reed, G. T.; Petropoulos, P.

2016-02-01

Communication traffic grows relentlessly in today's networks, and with ever more machines connected to the network, this trend is set to continue for the foreseeable future. It is widely accepted that increasingly faster communications are required at the point of the end users, and consequently optical transmission plays a progressively greater role even in short- and medium-reach networks. Silicon photonic technologies are becoming increasingly attractive for such networks, due to their potential for low cost, energetically efficient, high-speed optical components. A representative example is the silicon-based optical modulator, which has been actively studied. Researchers have demonstrated silicon modulators in different types of structures, such as ring resonators or slow light based devices. These approaches have shown remarkably good performance in terms of modulation efficiency, however their operation could be severely affected by temperature drifts or fabrication errors. Mach-Zehnder modulators (MZM), on the other hand, show good performance and resilience to different environmental conditions. In this paper we present a CMOS-compatible compact silicon MZM. We study the application of the modulator to short-reach interconnects by realizing data modulation using some relevant advanced modulation formats, such as 4-level Pulse Amplitude Modulation (PAM-4) and Discrete Multi-Tone (DMT) modulation and compare the performance of the different systems in transmission.
Interconnection of Distributed Energy Resources

DOE Office of Scientific and Technical Information (OSTI.GOV)

Reiter, Emerson

2017-04-19

This is a presentation on interconnection of distributed energy resources, including the relationships between different aspects of interconnection, best practices and lessons learned from different areas of the U.S., and an update on technical advances and standards for interconnection.
Understanding Lustre Internals

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, Feiyi; Oral, H Sarp; Shipman, Galen M

2009-04-01

Lustre was initiated and funded, almost a decade ago, by the U.S. Department of Energy (DoE) Office of Science and National Nuclear Security Administration laboratories to address the need for an open source, highly-scalable, high-performance parallel filesystem on by then present and future supercomputing platforms. Throughout the last decade, it was deployed over numerous medium-to-large-scale supercomputing platforms and clusters, and it performed and met the expectations of the Lustre user community. As it stands at the time of writing this document, according to the Top500 list, 15 of the top 30 supercomputers in the world use Lustre filesystem. This reportmore » aims to present a streamlined overview on how Lustre works internally at reasonable details including relevant data structures, APIs, protocols and algorithms involved for Lustre version 1.6 source code base. More importantly, it tries to explain how various components interconnect with each other and function as a system. Portions of this report are based on discussions with Oak Ridge National Laboratory Lustre Center of Excellence team members and portions of it are based on our own understanding of how the code works. We, as the authors team bare all responsibilities for all errors and omissions in this document. We can only hope it helps current and future Lustre users and Lustre code developers as much as it helped us understanding the Lustre source code and its internal workings.« less
Innovative Networking Concepts Tested on the Advanced Communications Technology Satellite

NASA Technical Reports Server (NTRS)

Friedman, Daniel; Gupta, Sonjai; Zhang, Chuanguo; Ephremides, Anthony

1996-01-01

This paper describes a program of experiments conducted over the advanced communications technology satellite (ACTS) and the associated TI-VSAT (very small aperture terminal). The experiments were motivated by the commercial potential of low-cost receive only satellite terminals that can operate in a hybrid network environment, and by the desire to demonstrate frame relay technology over satellite networks. The first experiment tested highly adaptive methods of satellite bandwidth allocation in an integrated voice-data service environment. The second involved comparison of forward error correction (FEC) and automatic repeat request (ARQ) methods of error control for satellite communication with emphasis on the advantage that a hybrid architecture provides, especially in the case of multicasts. Finally, the third experiment demonstrated hybrid access to databases and compared the performance of internetworking protocols for interconnecting local area networks (LANs) via satellite. A custom unit termed frame relay access switch (FRACS) was developed by COMSAT Laboratories for these experiments; the preparation and conduct of these experiments involved a total of 20 people from the University of Maryland, the University of Colorado and COMSAT Laboratories, from late 1992 until 1995.
Two-Volt Josephson Arbitrary Waveform Synthesizer Using Wilkinson Dividers.

PubMed

Flowers-Jacobs, Nathan E; Fox, Anna E; Dresselhaus, Paul D; Schwall, Robert E; Benz, Samuel P

2016-09-01

The root-mean-square (rms) output voltage of the NIST Josephson arbitrary waveform synthesizer (JAWS) has been doubled from 1 V to a record 2 V by combining two new 1 V chips on a cryocooler. This higher voltage will improve calibrations of ac thermal voltage converters and precision voltage measurements that require state-of-the-art quantum accuracy, stability, and signal-to-noise ratio. We achieved this increase in output voltage by using four on-chip Wilkinson dividers and eight inner-outer dc blocks, which enable biasing of eight Josephson junction (JJ) arrays with high-speed inputs from only four high-speed pulse generator channels. This approach halves the number of pulse generator channels required in future JAWS systems. We also implemented on-chip superconducting interconnects between JJ arrays, which reduces systematic errors and enables a new modular chip package. Finally, we demonstrate a new technique for measuring and visualizing the operating current range that reduces the measurement time by almost two orders of magnitude and reveals the relationship between distortion in the output spectrum and output pulse sequence errors.
An IMU-to-Body Alignment Method Applied to Human Gait Analysis

PubMed Central

Vargas-Valencia, Laura Susana; Elias, Arlindo; Rocon, Eduardo; Bastos-Filho, Teodiano; Frizera, Anselmo

2016-01-01

This paper presents a novel calibration procedure as a simple, yet powerful, method to place and align inertial sensors with body segments. The calibration can be easily replicated without the need of any additional tools. The proposed method is validated in three different applications: a computer mathematical simulation; a simplified joint composed of two semi-spheres interconnected by a universal goniometer; and a real gait test with five able-bodied subjects. Simulation results demonstrate that, after the calibration method is applied, the joint angles are correctly measured independently of previous sensor placement on the joint, thus validating the proposed procedure. In the cases of a simplified joint and a real gait test with human volunteers, the method also performs correctly, although secondary plane errors appear when compared with the simulation results. We believe that such errors are caused by limitations of the current inertial measurement unit (IMU) technology and fusion algorithms. In conclusion, the presented calibration procedure is an interesting option to solve the alignment problem when using IMUs for gait analysis. PMID:27973406
Electronic interconnects and devices with topological surface states and methods for fabricating same

DOEpatents

Yazdani, Ali; Ong, N. Phuan; Cava, Robert J.

2017-04-04

An interconnect is disclosed with enhanced immunity of electrical conductivity to defects. The interconnect includes a material with charge carriers having topological surface states. Also disclosed is a method for fabricating such interconnects. Also disclosed is an integrated circuit including such interconnects. Also disclosed is a gated electronic device including a material with charge carriers having topological surface states.
Electronic interconnects and devices with topological surface states and methods for fabricating same

DOEpatents

Yazdani, Ali; Ong, N. Phuan; Cava, Robert J.

2016-05-03

An interconnect is disclosed with enhanced immunity of electrical conductivity to defects. The interconnect includes a material with charge carriers having topological surface states. Also disclosed is a method for fabricating such interconnects. Also disclosed is an integrated circuit including such interconnects. Also disclosed is a gated electronic device including a material with charge carriers having topological surface states.
Oxidation Resistant, Cr Retaining, Electrically Conductive Coatings on Metallic Alloys for SOFC Interconnects

DOE Office of Scientific and Technical Information (OSTI.GOV)

Vladimir Gorokhovsky

2008-03-31

This report describes significant results from an on-going, collaborative effort to enable the use of inexpensive metallic alloys as interconnects in planar solid oxide fuel cells (SOFCs) through the use of advanced coating technologies. Arcomac Surface Engineering, LLC, under the leadership of Dr. Vladimir Gorokhovsky, is investigating filtered-arc and filtered-arc plasma-assisted hybrid coating deposition technologies to promote oxidation resistance, eliminate Cr volatility, and stabilize the electrical conductivity of both standard and specialty steel alloys of interest for SOFC metallic interconnect (IC) applications. Arcomac has successfully developed technologies and processes to deposit coatings with excellent adhesion, which have demonstrated a substantialmore » increase in high temperature oxidation resistance, stabilization of low Area Specific Resistance values and significantly decrease Cr volatility. An extensive matrix of deposition processes, coating compositions and architectures was evaluated. Technical performance of coated and uncoated sample coupons during exposures to SOFC interconnect-relevant conditions is discussed, and promising future directions are considered. Cost analyses have been prepared based on assessment of plasma processing parameters, which demonstrate the feasibility of the proposed surface engineering process for SOFC metallic IC applications.« less

Embedded optical interconnect technology in data storage systems

NASA Astrophysics Data System (ADS)

Pitwon, Richard C. A.; Hopkins, Ken; Milward, Dave; Muggeridge, Malcolm

2010-05-01

As both data storage interconnect speeds increase and form factors in hard disk drive technologies continue to shrink, the density of printed channels on the storage array midplane goes up. The dominant interconnect protocol on storage array midplanes is expected to increase to 12 Gb/s by 2012 thereby exacerbating the performance bottleneck in future digital data storage systems. The design challenges inherent to modern data storage systems are discussed and an embedded optical infrastructure proposed to mitigate this bottleneck. The proposed solution is based on the deployment of an electro-optical printed circuit board and active interconnect technology. The connection architecture adopted would allow for electronic line cards with active optical edge connectors to be plugged into and unplugged from a passive electro-optical midplane with embedded polymeric waveguides. A demonstration platform has been developed to assess the viability of embedded electro-optical midplane technology in dense data storage systems and successfully demonstrated at 10.3 Gb/s. Active connectors incorporate optical transceiver interfaces operating at 850 nm and are connected in an in-plane coupling configuration to the embedded waveguides in the midplane. In addition a novel method of passively aligning and assembling passive optical devices to embedded polymer waveguide arrays has also been demonstrated.
Fuzzy-information-based robustness of interconnected networks against attacks and failures

NASA Astrophysics Data System (ADS)

Zhu, Qian; Zhu, Zhiliang; Wang, Yifan; Yu, Hai

2016-09-01

Cascading failure is fatal in applications and its investigation is essential and therefore became a focal topic in the field of complex networks in the last decade. In this paper, a cascading failure model is established for interconnected networks and the associated data-packet transport problem is discussed. A distinguished feature of the new model is its utilization of fuzzy information in resisting uncertain failures and malicious attacks. We numerically find that the giant component of the network after failures increases with tolerance parameter for any coupling preference and attacking ambiguity. Moreover, considering the effect of the coupling probability on the robustness of the networks, we find that the robustness of the assortative coupling and random coupling of the network model increases with the coupling probability. However, for disassortative coupling, there exists a critical phenomenon for coupling probability. In addition, a critical value that attacking information accuracy affects the network robustness is observed. Finally, as a practical example, the interconnected AS-level Internet in South Korea and Japan is analyzed. The actual data validates the theoretical model and analytic results. This paper thus provides some guidelines for preventing cascading failures in the design of architecture and optimization of real-world interconnected networks.
Study of the dynamics of orbital assemblies including interactions with geometrical appendages

NASA Technical Reports Server (NTRS)

Ness, D. J.

1972-01-01

The complete equations for the Unified Flexible Spacecraft Simulation (UFSS) program developed for the NASA/MSFC are presented. This general purpose simulation program is based on an algorithm which utilizes the digital computer to synthesize the dynamic and kinematic equations for a topological tree configuration of N interconnected bodies (the interconnected system of bodies forms no closed loops), the terminal members of which may be flexible. Necessary input quantities to the dynamic subroutine include the mass and inertia properties of each body and the flexible characteristics of each terminal member in addition to the specification, for each body, of those bodies to which it connects. This latter description involves the specification of the number of rotational degrees of freedom at each interconnection along with the associated position vectors defining these connections relative to the mass centers of the bodies involved. These position vectors can be input as time-varying functions if desired, thus affording the capability of studying the effects of time-varying hinge locations. Springs and dampers are assumed to act at each interconnection and structural damping in the flexible terminal members is included in the form of equivalent viscous damping.
Enhancing Ecoefficiency in Shrimp Farming through Interconnected Ponds

PubMed Central

Barraza-Guardado, Ramón Héctor; Arreola-Lizárraga, José Alfredo; Juárez-García, Manuel; Juvera-Hoyos, Antonio; Casillas-Hernández, Ramón

2015-01-01

The future development of shrimp farming needs to improve its ecoefficiency. The purpose of this study was to evaluate water quality, flows, and nitrogen balance and production parameters on a farm with interconnected pond design to improve the efficiency of the semi-intensive culture of Litopenaeus vannamei ponds. The study was conducted in 21 commercial culture ponds during 180 days at densities of 30–35 ind m−2 and daily water exchange <2%. Our study provides evidence that by interconnecting ponds nutrient recycling is favored by promoting the growth of primary producers of the pond as chlorophyll a. Based on the mass balance and flow of nutrients this culture system reduces the flow of solid, particulate organic matter, and nitrogen compounds to the environment and significantly increases the efficiency of water (5 to 6.5 m3 kg−1 cycle−1), when compared with traditional culture systems. With this culture system it is possible to recover up to 34% of the total nitrogen entering the system, with production in excess of 4,000 kg ha−1 shrimp. We believe that the production system with interconnected ponds is a technically feasible model to improve ecoefficiency production of shrimp farming. PMID:26525070
Demonstration of fully enabled data center subsystem with embedded optical interconnect

NASA Astrophysics Data System (ADS)

Pitwon, Richard; Worrall, Alex; Stevens, Paul; Miller, Allen; Wang, Kai; Schmidtke, Katharine

2014-03-01

The evolution of data storage communication protocols and corresponding in-system bandwidth densities is set to impose prohibitive cost and performance constraints on future data storage system designs, fuelling proposals for hybrid electronic and optical architectures in data centers. The migration of optical interconnect into the system enclosure itself can substantially mitigate the communications bottlenecks resulting from both the increase in data rate and internal interconnect link lengths. In order to assess the viability of embedding optical links within prevailing data storage architectures, we present the design and assembly of a fully operational data storage array platform, in which all internal high speed links have been implemented optically. This required the deployment of mid-board optical transceivers, an electro-optical midplane and proprietary pluggable optical connectors for storage devices. We present the design of a high density optical layout to accommodate the midplane interconnect requirements of a data storage enclosure with support for 24 Small Form Factor (SFF) solid state or rotating disk drives and the design of a proprietary optical connector and interface cards, enabling standard drives to be plugged into an electro-optical midplane. Crucially, we have also modified the platform to accommodate longer optical interconnect lengths up to 50 meters in order to investigate future datacenter architectures based on disaggregation of modular subsystems. The optically enabled data storage system has been fully validated for both 6 Gb/s and 12 Gb/s SAS data traffic conveyed along internal optical links.
Novel Highly Parallel and Systolic Architectures Using Quantum Dot-Based Hardware

NASA Technical Reports Server (NTRS)

Fijany, Amir; Toomarian, Benny N.; Spotnitz, Matthew

1997-01-01

VLSI technology has made possible the integration of massive number of components (processors, memory, etc.) into a single chip. In VLSI design, memory and processing power are relatively cheap and the main emphasis of the design is on reducing the overall interconnection complexity since data routing costs dominate the power, time, and area required to implement a computation. Communication is costly because wires occupy the most space on a circuit and it can also degrade clock time. In fact, much of the complexity (and hence the cost) of VLSI design results from minimization of data routing. The main difficulty in VLSI routing is due to the fact that crossing of the lines carrying data, instruction, control, etc. is not possible in a plane. Thus, in order to meet this constraint, the VLSI design aims at keeping the architecture highly regular with local and short interconnection. As a result, while the high level of integration has opened the way for massively parallel computation, practical and full exploitation of such a capability in many applications of interest has been hindered by the constraints on interconnection pattern. More precisely. the use of only localized communication significantly simplifies the design of interconnection architecture but at the expense of somewhat restricted class of applications. For example, there are currently commercially available products integrating; hundreds of simple processor elements within a single chip. However, the lack of adequate interconnection pattern among these processing elements make them inefficient for exploiting a large degree of parallelism in many applications.
The myth of interconnected plastids and related phenomena.

PubMed

Schattat, Martin H; Barton, Kiah A; Mathur, Jaideep

2015-01-01

Studies spread over nearly two and a half centuries have identified the primary plastid in autotrophic algae and plants as a pleomorphic, multifunctional organelle comprising of a double-membrane envelope enclosing an organization of internal membranes submerged in a watery stroma. All plastid units have been observed extending and retracting thin stroma-filled tubules named stromules sporadically. Observations on living plant cells often convey the impression that stromules connect two or more independent plastids with each other. When photo-bleaching techniques were used to suggest that macromolecules such as the green fluorescent protein could flow between already interconnected plastids, for many people this impression changed to conviction. However, it was noticed only recently that the concept of protein flow between plastids rests solely on the words "interconnected plastids" for which details have never been provided. We have critically reviewed botanical literature dating back to the 1880s for understanding this term and the phenomena that have become associated with it. We find that while meticulously detailed ontogenic studies spanning nearly 150 years have established the plastid as a singular unit organelle, there is no experimental support for the idea that interconnected plastids exist under normal conditions of growth and development. In this review, while we consider several possibilities that might allow a single elongated plastid to be misinterpreted as two or more interconnected plastids, our final conclusion is that the concept of direct protein flow between plastids is based on an unfounded assumption.
Compact Interconnection Networks Based on Quantum Dots

NASA Technical Reports Server (NTRS)

Fijany, Amir; Toomarian, Nikzad; Modarress, Katayoon; Spotnitz, Matthew

2003-01-01

Architectures that would exploit the distinct characteristics of quantum-dot cellular automata (QCA) have been proposed for digital communication networks that connect advanced digital computing circuits. In comparison with networks of wires in conventional very-large-scale integrated (VLSI) circuitry, the networks according to the proposed architectures would be more compact. The proposed architectures would make it possible to implement complex interconnection schemes that are required for some advanced parallel-computing algorithms and that are difficult (and in many cases impractical) to implement in VLSI circuitry. The difficulty of implementation in VLSI and the major potential advantage afforded by QCA were described previously in Implementing Permutation Matrices by Use of Quantum Dots (NPO-20801), NASA Tech Briefs, Vol. 25, No. 10 (October 2001), page 42. To recapitulate: Wherever two wires in a conventional VLSI circuit cross each other and are required not to be in electrical contact with each other, there must be a layer of electrical insulation between them. This, in turn, makes it necessary to resort to a noncoplanar and possibly a multilayer design, which can be complex, expensive, and even impractical. As a result, much of the cost of designing VLSI circuits is associated with minimization of data routing and assignment of layers to minimize crossing of wires. Heretofore, these considerations have impeded the development of VLSI circuitry to implement complex, advanced interconnection schemes. On the other hand, with suitable design and under suitable operating conditions, QCA-based signal paths can be allowed to cross each other in the same plane without adverse effect. In principle, this characteristic could be exploited to design compact, coplanar, simple (relative to VLSI) QCA-based networks to implement complex, advanced interconnection schemes. The proposed architectures require two advances in QCA-based circuitry beyond basic QCA-based binary-signal wires described in the cited prior article. One of these advances would be the development of QCA-based wires capable of bidirectional transmission of signals. The other advance would be the development of QCA circuits capable of high-impedance state outputs. The high-impedance states would be utilized along with the 0- and 1-state outputs of QCA.
78 FR 29672 - Small Generator Interconnection Agreements and Procedures

Federal Register 2010, 2011, 2012, 2013, 2014

2013-05-21

...] Small Generator Interconnection Agreements and Procedures AGENCY: Federal Energy Regulatory Commission... 7524). The regulations revised the pro forma Small Generator Interconnection Procedures (SGIP) and pro forma Small Generator Interconnection Agreement (SGIA) originally set forth in Order No. 2006. DATES...
Photovoltaic sub-cell interconnects

DOE Office of Scientific and Technical Information (OSTI.GOV)

van Hest, Marinus Franciscus Antonius Maria; Swinger Platt, Heather Anne

2017-05-09

Photovoltaic sub-cell interconnect systems and methods are provided. In one embodiment, a photovoltaic device comprises a thin film stack of layers deposited upon a substrate, wherein the thin film stack layers are subdivided into a plurality of sub-cells interconnected in series by a plurality of electrical interconnection structures; and wherein the plurality of electrical interconnection structures each comprise no more than two scribes that penetrate into the thin film stack layers.
High Coherence Qubit packaging

NASA Astrophysics Data System (ADS)

Pappas, David P.; Wu, Xian; Olivadese, Salvatore B.; Adiga, V. P.; Hertzberg, Jared B.; Bronn, Nicholas T.; Chow, Jerry M.; NIST Team; IBM Team

Development of sockets and associated interconnects for multi-qubit chips is presented. Considerations include thermalization, RF hygiene, non-magnetic environment, and self-alignment of the chips to allow for rapid testing, scalable integration, and high coherence operation. The sockets include wirebond free, vertical take-off launches with pogopins. This allows for high interconnectivity to non-trivial topology of qubits. Furthermore, vertical grounding is accomplished to reduce chip modes and suppress box modes. Low energy loss and high phase coherence is observed using this paradigm. We acknowledge support from IARPA, LPS, and the NIST Quantum Based Metrology Initiative.
Release Resistant Electrical Interconnections For Mems Devices

DOEpatents

Peterson, Kenneth A.; Garrett, Stephen E.; Reber, Cathleen A.

2005-02-22

A release resistant electrical interconnection comprising a gold-based electrical conductor compression bonded directly to a highly-doped polysilicon bonding pad in a MEMS, IMEMS, or MOEMS device, without using any intermediate layers of aluminum, titanium, solder, or conductive adhesive disposed in-between the conductor and polysilicon pad. After the initial compression bond has been formed, subsequent heat treatment of the joint above 363 C creates a liquid eutectic phase at the bondline comprising gold plus approximately 3 wt % silicon, which, upon re-solidification, significantly improves the bond strength by reforming and enhancing the initial bond. This type of electrical interconnection is resistant to chemical attack from acids used for releasing MEMS elements (HF, HCL), thereby enabling the use of a "package-first, release-second" sequence for fabricating MEMS devices. Likewise, the bond strength of an Au--Ge compression bond may be increased by forming a transient liquid eutectic phase comprising Au-12 wt % Ge.
Spine-like Nanostructured Carbon Interconnected by Graphene for High-performance Supercapacitors

NASA Astrophysics Data System (ADS)

Park, Sang-Hoon; Yoon, Seung-Beom; Kim, Hyun-Kyung; Han, Joong Tark; Park, Hae-Woong; Han, Joah; Yun, Seok-Min; Jeong, Han Gi; Roh, Kwang Chul; Kim, Kwang-Bum

2014-08-01

Recent studies on supercapacitors have focused on the development of hierarchical nanostructured carbons by combining two-dimensional graphene and other conductive sp2 carbons, which differ in dimensionality, to improve their electrochemical performance. Herein, we report a strategy for synthesizing a hierarchical graphene-based carbon material, which we shall refer to as spine-like nanostructured carbon, from a one-dimensional graphitic carbon nanofiber by controlling the local graphene/graphitic structure via an expanding process and a co-solvent exfoliation method. Spine-like nanostructured carbon has a unique hierarchical structure of partially exfoliated graphitic blocks interconnected by thin graphene sheets in the same manner as in the case of ligaments. Owing to the exposed graphene layers and interconnected sp2 carbon structure, this hierarchical nanostructured carbon possesses a large, electrochemically accessible surface area with high electrical conductivity and exhibits high electrochemical performance.
Spine-like nanostructured carbon interconnected by graphene for high-performance supercapacitors.

PubMed

Park, Sang-Hoon; Yoon, Seung-Beom; Kim, Hyun-Kyung; Han, Joong Tark; Park, Hae-Woong; Han, Joah; Yun, Seok-Min; Jeong, Han Gi; Roh, Kwang Chul; Kim, Kwang-Bum

2014-08-19

Recent studies on supercapacitors have focused on the development of hierarchical nanostructured carbons by combining two-dimensional graphene and other conductive sp(2) carbons, which differ in dimensionality, to improve their electrochemical performance. Herein, we report a strategy for synthesizing a hierarchical graphene-based carbon material, which we shall refer to as spine-like nanostructured carbon, from a one-dimensional graphitic carbon nanofiber by controlling the local graphene/graphitic structure via an expanding process and a co-solvent exfoliation method. Spine-like nanostructured carbon has a unique hierarchical structure of partially exfoliated graphitic blocks interconnected by thin graphene sheets in the same manner as in the case of ligaments. Owing to the exposed graphene layers and interconnected sp(2) carbon structure, this hierarchical nanostructured carbon possesses a large, electrochemically accessible surface area with high electrical conductivity and exhibits high electrochemical performance.
Spine-like Nanostructured Carbon Interconnected by Graphene for High-performance Supercapacitors

PubMed Central

Park, Sang-Hoon; Yoon, Seung-Beom; Kim, Hyun-Kyung; Han, Joong Tark; Park, Hae-Woong; Han, Joah; Yun, Seok-Min; Jeong, Han Gi; Roh, Kwang Chul; Kim, Kwang-Bum

2014-01-01

Recent studies on supercapacitors have focused on the development of hierarchical nanostructured carbons by combining two-dimensional graphene and other conductive sp2 carbons, which differ in dimensionality, to improve their electrochemical performance. Herein, we report a strategy for synthesizing a hierarchical graphene-based carbon material, which we shall refer to as spine-like nanostructured carbon, from a one-dimensional graphitic carbon nanofiber by controlling the local graphene/graphitic structure via an expanding process and a co-solvent exfoliation method. Spine-like nanostructured carbon has a unique hierarchical structure of partially exfoliated graphitic blocks interconnected by thin graphene sheets in the same manner as in the case of ligaments. Owing to the exposed graphene layers and interconnected sp2 carbon structure, this hierarchical nanostructured carbon possesses a large, electrochemically accessible surface area with high electrical conductivity and exhibits high electrochemical performance. PMID:25134517
Hexagonal boron nitride intercalated multi-layer graphene: a possible ultimate solution to ultra-scaled interconnect technology

NASA Astrophysics Data System (ADS)

Li, Yong-Jun; Sun, Qing-Qing; Chen, Lin; Zhou, Peng; Wang, Peng-Fei; Ding, Shi-Jin; Zhang, David Wei

2012-03-01

We proposed intercalation of hexagonal boron nitride (hBN) in multilayer graphene to improve its performance in ultra-scaled interconnects for integrated circuit. The effect of intercalated hBN layer in bilayer graphene is investigated using non-equilibrium Green's functions. We find the hBN intercalated bilayer graphene exhibit enhanced transport properties compared with pristine bilayer ones, and the improvement is attributed to suppression of interlayer scattering and good planar bonding condition of inbetween hBN layer. Based on these results, we proposed a via structure that not only benefits from suppressed interlayer scattering between multilayer graphene, but also sustains the unique electrical properties of graphene when many graphene layers are stacking together. The ideal current density across the structure can be as high as 4.6×109 A/cm2 at 1V, which is very promising for the future high-performance interconnect.
Asymmetric ZnO panel-like hierarchical architectures with highly interconnected pathways for free-electron transport and photovoltaic improvements.

PubMed

Shi, Yantao; Zhu, Chao; Wang, Lin; Li, Wei; Fung, Kwok Kwong; Wang, Ning

2013-01-02

Through a rapid and template-free precipitation approach, we synthesized an asymmetric panel-like ZnO hierarchical architecture (PHA) for photoanodes of dye-sensitized solar cells (DSCs). The two sides of the PHA are constructed differently using densely interconnected, mono-crystalline and ultrathin ZnO nanosheets. By mixing these PHAs with ZnO nanoparticles (NPs), we developed an effective and feasible strategy to improve the electrical transport and photovoltaic performance of the composite photoanodes of DSCs. The highly crystallized and interconnected ZnO nanosheets largely minimized the total grain boundaries within the composite photoanodes and thus served as direct pathways for the transport and effective collection of free electrons. Through low-temperature (200 °C) annealing, these novel composite photoanodes achieved high conversion efficiencies of up to 5.59% for ZnO-based quasi-solid DSCs. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
High-precision, large-domain three-dimensional manipulation of nano-materials for fabrication nanodevices

PubMed Central

2011-01-01

Nanoscaled materials are attractive building blocks for hierarchical assembly of functional nanodevices, which exhibit diverse performances and simultaneous functions. We innovatively fabricated semiconductor nano-probes of tapered ZnS nanowires through melting and solidifying by electro-thermal process; and then, as-prepared nano-probes can manipulate nanomaterials including semiconductor/metal nanowires and nanoparticles through sufficiently electrostatic force to the desired location without structurally and functionally damage. With some advantages of high precision and large domain, we can move and position and interconnect individual nanowires for contracting nanodevices. Interestingly, by the manipulating technique, the nanodevice made of three vertically interconnecting nanowires, i.e., diode, was realized and showed an excellent electrical property. This technique may be useful to fabricate electronic devices based on the nanowires' moving, positioning, and interconnecting and may overcome fundamental limitations of conventional mechanical fabrication. PMID:21794151
NMR Based Cerebrum Metabonomic Analysis Reveals Simultaneous Interconnected Changes during Chick Embryo Incubation.

PubMed

Feng, Yue; Zhu, Hang; Zhang, Xu; Wang, Xuxia; Xu, Fuqiang; Tang, Huiru; Ye, Chaohui; Liu, Maili

2015-01-01

To find out if content changes of the major functional cerebrum metabolites are interconnected and formed a network during the brain development, we obtained high-resolution magic-angle-spinning (HR-MAS) 1H NMR spectra of cerebrum tissues of chick embryo aged from incubation day 10 to 20, and postnatal day 1, and analyzed the data with principal component analysis (PCA). Within the examined time window, 26 biological important molecules were identified and 12 of them changed their relative concentration significantly in a time-dependent manner. These metabolites are generally belonged to three categories, neurotransmitters, nutrition sources, and neuronal or glial markers. The relative concentration changes of the metabolites were interconnected among/between the categories, and, more interestingly, associated with the number and size of Nissl-positive neurons. These results provided valuable biochemical and neurochemical information to understand the development of the embryonic brain.
NMR Based Cerebrum Metabonomic Analysis Reveals Simultaneous Interconnected Changes during Chick Embryo Incubation

PubMed Central

Feng, Yue; Zhu, Hang; Zhang, Xu; Wang, Xuxia; Xu, Fuqiang; Tang, Huiru; Ye, Chaohui; Liu, Maili

2015-01-01

To find out if content changes of the major functional cerebrum metabolites are interconnected and formed a network during the brain development, we obtained high-resolution magic-angle-spinning (HR-MAS) 1H NMR spectra of cerebrum tissues of chick embryo aged from incubation day 10 to 20, and postnatal day 1, and analyzed the data with principal component analysis (PCA). Within the examined time window, 26 biological important molecules were identified and 12 of them changed their relative concentration significantly in a time-dependent manner. These metabolites are generally belonged to three categories, neurotransmitters, nutrition sources, and neuronal or glial markers. The relative concentration changes of the metabolites were interconnected among/between the categories, and, more interestingly, associated with the number and size of Nissl-positive neurons. These results provided valuable biochemical and neurochemical information to understand the development of the embryonic brain. PMID:26485040

47 CFR 64.1600 - Definitions.

Code of Federal Regulations, 2011 CFR

2011-10-01

... using a telecommunications service or interconnected VoIP service. (d) Caller identification service..., a call made using a telecommunications service or interconnected VoIP service. (e) Calling party.... (h) Interconnected VoIP service. The term “interconnected VoIP service” has the same meaning given...
Variational Integrators for Interconnected Lagrange-Dirac Systems

NASA Astrophysics Data System (ADS)

Parks, Helen; Leok, Melvin

2017-10-01

Interconnected systems are an important class of mathematical models, as they allow for the construction of complex, hierarchical, multiphysics, and multiscale models by the interconnection of simpler subsystems. Lagrange-Dirac mechanical systems provide a broad category of mathematical models that are closed under interconnection, and in this paper, we develop a framework for the interconnection of discrete Lagrange-Dirac mechanical systems, with a view toward constructing geometric structure-preserving discretizations of interconnected systems. This work builds on previous work on the interconnection of continuous Lagrange-Dirac systems (Jacobs and Yoshimura in J Geom Mech 6(1):67-98, 2014) and discrete Dirac variational integrators (Leok and Ohsawa in Found Comput Math 11(5), 529-562, 2011). We test our results by simulating some of the continuous examples given in Jacobs and Yoshimura (2014).
Skylab observations of X-ray loops connecting separate active regions. [solar activity

NASA Technical Reports Server (NTRS)

Chase, R. C.; Krieger, A. S.; Svestka, Z.; Vaiana, G. S.

1976-01-01

One hundred loops interconnecting 94 separate active solar regions detectable in soft X-rays were identified during the Skylab mission. While close active regions are commonly interconnected with loops, the number of such interconnections decreases steeply for longer distances; the longest interconnecting loop observed in the Skylab data connected regions separated by 37 deg. Several arguments are presented which support the point of view that this is the actual limit of the size of magnetic interconnections between active regions. No sympathetic flares could be found in the interconnected regions. These results cast doubt on the hypothesis that accelerated particles can be guided in interconnecting loops from one active region to another over distances of 100 deg or more and eventually produce sympathetic flares in them.
Rainfall prediction with backpropagation method

NASA Astrophysics Data System (ADS)

Wahyuni, E. G.; Fauzan, L. M. F.; Abriyani, F.; Muchlis, N. F.; Ulfa, M.

2018-03-01

Rainfall is an important factor in many fields, such as aviation and agriculture. Although it has been assisted by technology but the accuracy can not reach 100% and there is still the possibility of error. Though current rainfall prediction information is needed in various fields, such as agriculture and aviation fields. In the field of agriculture, to obtain abundant and quality yields, farmers are very dependent on weather conditions, especially rainfall. Rainfall is one of the factors that affect the safety of aircraft. To overcome the problems above, then it’s required a system that can accurately predict rainfall. In predicting rainfall, artificial neural network modeling is applied in this research. The method used in modeling this artificial neural network is backpropagation method. Backpropagation methods can result in better performance in repetitive exercises. This means that the weight of the ANN interconnection can approach the weight it should be. Another advantage of this method is the ability in the learning process adaptively and multilayer owned on this method there is a process of weight changes so as to minimize error (fault tolerance). Therefore, this method can guarantee good system resilience and consistently work well. The network is designed using 4 input variables, namely air temperature, air humidity, wind speed, and sunshine duration and 3 output variables ie low rainfall, medium rainfall, and high rainfall. Based on the research that has been done, the network can be used properly, as evidenced by the results of the prediction of the system precipitation is the same as the results of manual calculations.
Legitimizing Security in the Ivory Tower: Canadian University Corporate Security Services' Public Quest for Legitimacy.

PubMed

Wilkinson, Blair

2016-05-01

This article examines how university corporate security (UCS) services engage in legitimation work in their attempts to make their university communities (i.e., faculty, staff, students) and political masters (i.e., university administrators, boards of governors, senators) believe that they are honest, trustworthy, and caring and have authority that should be deferred to. This is accomplished through the analysis of interview and observational data collected as part of a research project exploring UCS services at five Canadian universities and an examination of how UCS services at 14 Canadian universities communicate using the social media service Twitter. These UCS services were found to primarily use Twitter for the purposes of soliciting or requesting information and for networking. In communicating through Twitter, UCS services engage in public legitimation work in which they make claims about and attempt to demonstrate their expertise, authority, and accountability. This article argues that both UCS services' particular legitimacy problem (i.e., their possession of both private and public attributes) and the interactive nature of public legitimation work create tensions that may serve to disrupt UCS services' ability to attain legitimacy. Cet article examine la manière dont les services de sécurité d'entreprise à l'université (SEU) s'engagent à légitimer leurs tentatives de persuader leurs communautés universitaires (c'est-à-dire le corps professoral, le personnel et les étudiants) ainsi que la haute administration (c'est-à-dire les administrateurs de l'université, le conseil des gouverneurs et les sénateurs) qu'ils sont honnêtes, attentifs, dignes de confiance, et qu'ils possèdent un niveau d'autorité auquel quiconque devrait se référer. Ceci sera accompli en analysant un corpus d'entrevues et d'observations dans le cadre d'un projet de recherche examinant les services de type SEU dans cinq universités canadiennes, ainsi qu'une étude sur la manière dont les services de SEU dans quatorze universités canadiennes gèrent leurs communications sur le réseau de médias sociaux Twitter. Il a été établi que ces services de SEU utilisent principalement Twitter pour la sollicitation ou la demande d'informations, et pour le réseautage. En communiquant par Twitter, les services de SEU s'engagent dans un processus de légitimation par lequel ils revendiquent et tentent de démontrer leur expertise, autorité, transparence et responsabilité. Cet article propose l'argument suivant: la question de la légitimité particulière des services de SEU (c'est-à-dire leur possession d'attributs à la fois privés et publics) combinée avec la nature interactive du processus de légitimation publique crée des tensions qui peuvent en fin de compte perturber la capacité des services de SEU à atteindre réellement cette légitimité. © 2016 Canadian Sociological Association/La Société canadienne de sociologie.
Formation of interconnections to microfluidic devices

DOEpatents

Matzke, Carolyn M [Los Lunas, NM; Ashby, Carol I. H. [Edgewood, NM; Griego, Leonardo [Tijeras, NM

2003-07-29

A method is disclosed to form external interconnections to a microfluidic device for coupling of a fluid or light or both into a microchannel of the device. This method can be used to form optical or fluidic interconnections to microchannels previously formed on a substrate, or to form both the interconnections and microchannels during the same process steps. The optical and fluidic interconnections are formed parallel to the plane of the substrate, and are fluid tight.
Electrical contacts between cathodes and metallic interconnects in solid oxide fuel cells

NASA Astrophysics Data System (ADS)

Yang, Zhenguo; Xia, Guanguang; Singh, Prabhakar; Stevenson, Jeffry W.

In this work, simulated cathode/interconnect structures were used to investigate the effects of different contact materials on the contact resistance between a strontium doped lanthanum ferrite cathode and a Crofer22 APU interconnect. Among the materials studied, Pt, which has a prohibitive cost for the application, demonstrated the best performance as a contact paste. For the relatively cost-effective perovskites, the contact ASR was found to depend on their electrical conductivity, scale growth on the metallic interconnect, and interactions between the contact material and the metallic interconnect or particularly the scale grown on the interconnect. Manganites appeared to promote manganese-containing spinel interlayer formation that helped minimize the increase of contact ASR. Chromium from the interconnects reacted with strontium in the perovskites to form SrCrO 4. An improved performance was achieved by application of a thermally grown (Mn,Co) 3O 4 spinel protection layer on Crofer22 APU that dramatically minimized the contact resistance between the cathodes and interconnects.
Neural Network Prediction of Aluminum-Lithium Weld Strengths from Acoustic Emission Amplitude Data

NASA Technical Reports Server (NTRS)

Hill, Eric v. K.; Israel, Peggy L.; Knotts, Gregory L.

1993-01-01

Acoustic Emission (AE) flaw growth activity was monitored in aluminum-lithium weld specimens from the onset tensile loading to failure. Data on actual ultimate strengths together with AE data from the beginning of loading up to 25 percent of the expected ultimate strength were used to train a backpropagation neural network to predict ultimate strengths. Architecturally, the fully interconnected network consisted of an input layer for the AE amplitude data, a hidden layer to accommodate failure mechanism mapping, and an output layer for ultimate strength prediction. The trained network was the applied to the prediction of ultimate strengths in the remaining six specimens. The worst case prediction error was found to be +2.6 percent.
Early experiences building a software quality prediction model

NASA Technical Reports Server (NTRS)

Agresti, W. W.; Evanco, W. M.; Smith, M. C.

1990-01-01

Early experiences building a software quality prediction model are discussed. The overall research objective is to establish a capability to project a software system's quality from an analysis of its design. The technical approach is to build multivariate models for estimating reliability and maintainability. Data from 21 Ada subsystems were analyzed to test hypotheses about various design structures leading to failure-prone or unmaintainable systems. Current design variables highlight the interconnectivity and visibility of compilation units. Other model variables provide for the effects of reusability and software changes. Reported results are preliminary because additional project data is being obtained and new hypotheses are being developed and tested. Current multivariate regression models are encouraging, explaining 60 to 80 percent of the variation in error density of the subsystems.
Non-radiation hardened microprocessors in space-based remote sensing systems

NASA Astrophysics Data System (ADS)

DeCoursey, R.; Melton, Ryan; Estes, Robert R., Jr.

2006-09-01

The CALIPSO (Cloud-Aerosol Lidar and Infrared Pathfinder Satellite Observations) mission is a comprehensive suite of active and passive sensors including a 20Hz 230mj Nd:YAG lidar, a visible wavelength Earth-looking camera and an imaging infrared radiometer. CALIPSO flies in formation with the Earth Observing System Post-Meridian (EOS PM) train, provides continuous, near-simultaneous measurements and is a planned 3 year mission. CALIPSO was launched into a 98 degree sun synchronous Earth orbit in April of 2006 to study clouds and aerosols and acquires over 5 gigabytes of data every 24 hours. Figure 1 shows the ground track of one CALIPSO orbit as well as high and low intensity South Atlantic Anomaly outlines. CALIPSO passes through the SAA several times each day. Spaced based remote sensing systems that include multiple instruments and/or instruments such as lidar generate large volumes of data and require robust real-time hardware and software mechanisms and high throughput processors. Due to onboard storage restrictions and telemetry downlink limitations these systems must pre-process and reduce the data before sending it to the ground. This onboard processing and realtime requirement load may mean that newer more powerful processors are needed even though acceptable radiation-hardened versions have not yet been released. CALIPSO's single board computer payload controller processor is actually a set of four (4) voting non-radiation hardened COTS Power PC 603r's built on a single width VME card by General Dynamics Advanced Information Systems (GDAIS). Significant radiation concerns for CALIPSO and other Low Earth Orbit (LEO) satellites include the South Atlantic Anomaly (SAA), the north and south poles and strong solar events. Over much of South America and extending into the South Atlantic Ocean (see figure 1) the Van Allen radiation belts dip to just 200-800km and spacecraft entering this area are subjected to high energy protons and experience higher than normal Single Event Upset (SEU) and Single Event Latch-up (SEL) rates. Although less significant, spacecraft flying in the area around the poles experience similar upsets. Finally, powerful solar proton events in the range of 10MeV/10pfu to 100MeV/1pfu as are forecasted and tracked by NOAA's Space Environment Center in Colorado can result in SingleEvent Upset (SEU), Single Event Latch-up (SEL) and permanent failures such as Single Event Gate Rupture (SEGR) in some technologies. (Galactic Cosmic Rays (GCRs) are another source, especially for gate rupture) CALIPSO mitigates common radiation concerns in its data handling through the use of redundant processors, radiation-hardened Application Specific Integrated Circuits (ASIC), hardware-based Error Detection and Correction (EDAC), processor and memory scrubbing, redundant boot code and mirrored files. After presenting a system overview this paper will expand on each of these strategies. Where applicable, related on-orbit data collected since the CALIPSO initial boot on May 4, 2006 will be noted.
Non Radiation Hardened Microprocessors in Spaced Based Remote Sensing Systems

NASA Technical Reports Server (NTRS)

Decoursey, Robert J.; Estes, Robert F.; Melton, Ryan

2006-01-01

The CALIPSO (Cloud-Aerosol Lidar and Infrared Pathfinder Satellite Observations) mission is a comprehensive suite of active and passive sensors including a 20Hz 230mj Nd:YAG lidar, a visible wavelength Earth-looking camera and an imaging infrared radiometer. CALIPSO flies in formation with the Earth Observing System Post-Meridian (EOS PM) train, provides continuous, near-simultaneous measurements and is a planned 3 year mission. CALIPSO was launched into a 98 degree sun synchronous Earth orbit in April of 2006 to study clouds and aerosols and acquires over 5 gigabytes of data every 24 hours. The ground track of one CALIPSO orbit as well as high and low intensity South Atlantic Anomaly outlines is shown. CALIPSO passes through the SAA several times each day. Spaced based remote sensing systems that include multiple instruments and/or instruments such as lidar generate large volumes of data and require robust real-time hardware and software mechanisms and high throughput processors. Due to onboard storage restrictions and telemetry downlink limitations these systems must pre-process and reduce the data before sending it to the ground. This onboard processing and realtime requirement load may mean that newer more powerful processors are needed even though acceptable radiation-hardened versions have not yet been released. CALIPSO's single board computer payload controller processor is actually a set of four (4) voting non-radiation hardened COTS Power PC 603r's built on a single width VME card by General Dynamics Advanced Information Systems (GDAIS). Significant radiation concerns for CALIPSO and other Low Earth Orbit (LEO) satellites include the South Atlantic Anomaly (SAA), the north and south poles and strong solar events. Over much of South America and extending into the South Atlantic Ocean the Van Allen radiation belts dip to just 200-800km and spacecraft entering this area are subjected to high energy protons and experience higher than normal Single Event Upset (SEU) and Single Event Latch-up (SEL) rates. Although less significant, spacecraft flying in the area around the poles experience similar upsets. Finally, powerful solar proton events in the range of 10MeV/10pfu to 100MeV/1pfu as are forecasted and tracked by NOAA's Space Environment Center in Colorado can result in Single Event Upset (SEU), Single Event Latch-up (SEL) and permanent failures such as Single Event Gate Rupture (SEGR) in some technologies. (Galactic Cosmic Rays (GCRs) are another source, especially for gate rupture) CALIPSO mitigates common radiation concerns in its data handling through the use of redundant processors, radiation-hardened Application Specific Integrated Circuits (ASIC), hardware-based Error Detection and Correction (EDAC), processor and memory scrubbing, redundant boot code and mirrored files. After presenting a system overview this paper will expand on each of these strategies. Where applicable, related on-orbit data collected since the CALIPSO initial boot on May 4, 2006 will be noted.
Power inverter with optical isolation

DOEpatents

Duncan, Paul G.; Schroeder, John Alan

2005-12-06

An optically isolated power electronic power conversion circuit that includes an input electrical power source, a heat pipe, a power electronic switch or plurality of interconnected power electronic switches, a mechanism for connecting the switch to the input power source, a mechanism for connecting comprising an interconnecting cable and/or bus bar or plurality of interconnecting cables and/or input bus bars, an optically isolated drive circuit connected to the switch, a heat sink assembly upon which the power electronic switch or switches is mounted, an output load, a mechanism for connecting the switch to the output load, the mechanism for connecting including an interconnecting cable and/or bus bar or plurality of interconnecting cables and/or output bus bars, at least one a fiber optic temperature sensor mounted on the heat sink assembly, at least one fiber optic current sensor mounted on the load interconnection cable and/or output bus bar, at least one fiber optic voltage sensor mounted on the load interconnection cable and/or output bus bar, at least one fiber optic current sensor mounted on the input power interconnection cable and/or input bus bar, and at least one fiber optic voltage sensor mounted on the input power interconnection cable and/or input bus bar.
Gold-based electrical interconnections for microelectronic devices

DOEpatents

Peterson, Kenneth A.; Garrett, Stephen E.; Reber, Cathleen A.; Watson, Robert D.

2002-01-01

A method of making an electrical interconnection from a microelectronic device to a package, comprising ball or wedge compression bonding a gold-based conductor directly to a silicon surface, such as a polysilicon bonding pad in a MEMS or IMEMS device, without using layers of aluminum or titanium disposed in-between the conductor and the silicon surface. After compression bonding, optional heating of the bond above 363 C. allows formation of a liquid gold-silicon eutectic phase containing approximately 3% (by weight) silicon, which significantly improves the bond strength by reforming and enhancing the initial compression bond. The same process can be used for improving the bond strength of Au--Ge bonds by forming a liquid Au-12Ge eutectic phase.
DGIC Interconnection Insights | Distributed Generation Interconnection

Science.gov Websites

Collaborative | NREL The State of Pre-Application Reports June 2017 by Zachary Peterson opportunities for improving DER interconnection processes. Some state regulators have sought the use of pre -application reports to improve interconnection data availability and application processing. A pre-application
Microwave interconnection

NASA Astrophysics Data System (ADS)

Fry, P. E.

1993-06-01

A limited evaluation was made of two commonly found microwave interconnections: microstrip-to-microstrip and coaxial-to-microstrip. The evaluation attempted to select the interconnection technique which worked best for the particular interface type. Short ribbon wires worked best for the microstrip-to-microstrip interconnection. A published method of compensating the microstrip conductor had the best performance for the coaxial-to-microstrip interconnection. The work was conducted under the Microwave Technology Process Capability Assurance Program at Allied-Signal Inc., Kansas City Division.
The promotion of angiogenesis induced by three-dimensional porous beta-tricalcium phosphate scaffold with different interconnection sizes via activation of PI3K/Akt pathways

NASA Astrophysics Data System (ADS)

Xiao, Xin; Wang, Wei; Liu, Dong; Zhang, Haoqiang; Gao, Peng; Geng, Lei; Yuan, Yulin; Lu, Jianxi; Wang, Zhen

2015-03-01

The porous architectural characteristics of biomaterials play an important role in scaffold revascularization. However, no consensus exists regarding optimal interconnection sizes for vascularization and its scaffold bioperformance with different interconnection sizes. Therefore, a series of disk-type beta-tricalcium phosphates with the same pore sizes and variable interconnections were produced to evaluate how the interconnection size influenced biomaterial vascularization in vitro and in vivo. We incubated human umbilical vein endothelial cells on scaffolds with interconnections of various sizes. Results showed that scaffolds with a 150 μm interconnection size ameliorated endothelial cell function evidenced by promoting cell adhesion and migration, increasing cell proliferation and enhancing expression of platelet-endothelial cell adhesion molecules and vascular endothelial growth factor. In vivo study was performed on rabbit implanted with scaffolds into the bone defect on femoral condyles. Implantation with scaffolds with 150 μm interconnection size significantly improved neovascularization as shown by micro-CT as compared to scaffolds with 100 and 120 μm interconnection sizes. Moreover, the aforementioned positive effects were abolished by blocking PI3K/Akt/eNOS pathway with LY-294002. Our study explicitly demonstrates that the scaffold with 150 μm interconnection size improves neovascularization via the PI3K/Akt pathway and provides a target for biomaterial inner structure modification to attain improved clinical performance in implant vascularization.
Multilevel Dual Damascene copper interconnections

NASA Astrophysics Data System (ADS)

Lakshminarayanan, S.

Copper has been acknowledged as the interconnect material for future generations of ICs to overcome the bottlenecks on speed and reliability present with the current Al based wiring. A new set of challenges brought to the forefront when copper replaces aluminum, have to be met and resolved to make it a viable option. Unit step processes related to copper technology have been under development for the last few years. In this work, the application of copper as the interconnect material in multilevel structures with SiO2 as the interlevel dielectric has been explored, with emphasis on integration issues and complete process realization. Interconnect definition was achieved by the Dual Damascene approach using chemical mechanical polishing of oxide and copper. The choice of materials used as adhesion promoter/diffusion barrier included Ti, Ta and CVD TiN. Two different polish chemistries (NH4OH or HNO3 based) were used to form the interconnects. The diffusion barrier was removed during polishing (in the case of TiN) or by a post CMP etch (as with Ti or Ta). Copper surface passivation was performed using boron implantation and PECVD nitride encapsulation. The interlevel dielectric way composed of a multilayer stack of PECVD SiO2 and SixNy. A baseline process sequence which ensured the mechanical and thermal compatibility of the different unit steps was first created. A comprehensive test vehicle was designed and test structures were fabricated using the process flow developed. Suitable modifications were subsequently introduced in the sequence as and when processing problems were encountered. Electrical characterization was performed on the fabricated devices, interconnects, contacts and vias. The structures were subjected to thermal stressing to assess their stability and performance. The measurement of interconnect sheet resistances revealed lower copper loss due to dishing on samples polished using HNO3 based slurry. Interconnect resistances remained stable upto 400oC, 500oC and 600oC for Ti, TiN and Ta barriers respectively. Via resistivity on the order of 10-9/ /Omegacm2 was measured for Cu/Ta/Cu interfaces and no degradation in the via resistance was observed upto 600oC on the 2 μm and 3 μm wide contact windows. Characterization of diode leakage and subthreshold currents of CMOS transistors fabricated with Ta adhesion layers, showed the failure of the Ta barrier at 450oC. Despite the good barrier performance of the CVD TiN films, obtaining low contact resistivity may be a concern. The potential use of Cu-Mg alloy as the backend metallization has also been studied. Fully encapsulated wiring has been fabricated by causing the Mg to out- diffuse towards the Cu/SiO2 interfaces and the free copper surface. The inter-connects exhibited good stability and oxidation resistance, but via resistances were extremely high, probably due to the presence of insulating films like MgO or MgF2 at the interface between the two metal levels. It may be possible to decrease the via resistance to values comparable to Cu/Ta/Cu by altering the process flow and using a suitable via clean. When used at the contact level, undesirable interaction with the CoSi2 film was observed at temperatures as low as 350oC. Another problem was the high contact resistance at the Cu-Mg/CoSi2 interface. Hence the use of this alloy as a contact fill material is not feasible at this time. An additional barrier layer may be required between the Cu-Mg and CoSi2 films to protect the integrity of the silicide and provide low contact resistance.
IETI – Isogeometric Tearing and Interconnecting

PubMed Central

Kleiss, Stefan K.; Pechstein, Clemens; Jüttler, Bert; Tomar, Satyendra

2012-01-01

Finite Element Tearing and Interconnecting (FETI) methods are a powerful approach to designing solvers for large-scale problems in computational mechanics. The numerical simulation problem is subdivided into a number of independent sub-problems, which are then coupled in appropriate ways. NURBS- (Non-Uniform Rational B-spline) based isogeometric analysis (IGA) applied to complex geometries requires to represent the computational domain as a collection of several NURBS geometries. Since there is a natural decomposition of the computational domain into several subdomains, NURBS-based IGA is particularly well suited for using FETI methods. This paper proposes the new IsogEometric Tearing and Interconnecting (IETI) method, which combines the advanced solver design of FETI with the exact geometry representation of IGA. We describe the IETI framework for two classes of simple model problems (Poisson and linearized elasticity) and discuss the coupling of the subdomains along interfaces (both for matching interfaces and for interfaces with T-joints, i.e. hanging nodes). Special attention is paid to the construction of a suitable preconditioner for the iterative linear solver used for the interface problem. We report several computational experiments to demonstrate the performance of the proposed IETI method. PMID:24511167
SEM technique for imaging and measuring electronic transport in nanocomposites based on electric field induced contrast

DOEpatents

Jesse, Stephen [Knoxville, TN; Geohegan, David B [Knoxville, TN; Guillorn, Michael [Brooktondale, NY

2009-02-17

Methods and apparatus are described for SEM imaging and measuring electronic transport in nanocomposites based on electric field induced contrast. A method includes mounting a sample onto a sample holder, the sample including a sample material; wire bonding leads from the sample holder onto the sample; placing the sample holder in a vacuum chamber of a scanning electron microscope; connecting leads from the sample holder to a power source located outside the vacuum chamber; controlling secondary electron emission from the sample by applying a predetermined voltage to the sample through the leads; and generating an image of the secondary electron emission from the sample. An apparatus includes a sample holder for a scanning electron microscope having an electrical interconnect and leads on top of the sample holder electrically connected to the electrical interconnect; a power source and a controller connected to the electrical interconnect for applying voltage to the sample holder to control the secondary electron emission from a sample mounted on the sample holder; and a computer coupled to a secondary electron detector to generate images of the secondary electron emission from the sample.
Scalable Performance Environments for Parallel Systems

NASA Technical Reports Server (NTRS)

Reed, Daniel A.; Olson, Robert D.; Aydt, Ruth A.; Madhyastha, Tara M.; Birkett, Thomas; Jensen, David W.; Nazief, Bobby A. A.; Totty, Brian K.

1991-01-01

As parallel systems expand in size and complexity, the absence of performance tools for these parallel systems exacerbates the already difficult problems of application program and system software performance tuning. Moreover, given the pace of technological change, we can no longer afford to develop ad hoc, one-of-a-kind performance instrumentation software; we need scalable, portable performance analysis tools. We describe an environment prototype based on the lessons learned from two previous generations of performance data analysis software. Our environment prototype contains a set of performance data transformation modules that can be interconnected in user-specified ways. It is the responsibility of the environment infrastructure to hide details of module interconnection and data sharing. The environment is written in C++ with the graphical displays based on X windows and the Motif toolkit. It allows users to interconnect and configure modules graphically to form an acyclic, directed data analysis graph. Performance trace data are represented in a self-documenting stream format that includes internal definitions of data types, sizes, and names. The environment prototype supports the use of head-mounted displays and sonic data presentation in addition to the traditional use of visual techniques.

A three-sided rearrangeable switching network for a binary fat tree

NASA Astrophysics Data System (ADS)

Yen, Mao-Hsu; Yu, Chu; Shin, Haw-Yun; Chen, Sao-Jie

2011-06-01

A binary fat tree needs an internal node to interconnect the left-children, right-children and parent terminals to each other. In this article, we first propose a three-stage, 3-sided rearrangeable switching network for the implementation of a binary fat tree. The main component of this 3-sided switching network (3SSN) consists of a polygonal switch block (PSB) interconnected by crossbars. With the same size and the same number of switches as our 3SSN, a three-stage, 3-sided clique-based switching network is shown to be not rearrangeable. Also, the effects of the rearrangeable structure and the number of terminals on the network switch-efficiency are explored and a proper set of parameters has been determined to minimise the number of switches. We derive that a rearrangeable 3-sided switching network with switches proportional to N 3/2 is most suitable to interconnect N terminals. Moreover, we propose a new Polygonal Field Programmable Gate Array (PFPGA) that consists of logic blocks interconnected by our 3SSN, such that the logic blocks in this PFPGA can be grouped into clusters to implement different logic functions. Since the programmable switches usually have high resistance and capacitance and occupy a large area, we have to consider the effect of the 3SSN structure and the granularity of its cluster logic blocks on the switch efficiency of PFPGA. Experiments on benchmark circuits show that the switch and speed performances are significantly improved. Based on the experimental results, we can determine the parameters of PFPGA for the VLSI implementation.
Seulimeum segment characteristic indicated by 2-D resistivity imaging method

NASA Astrophysics Data System (ADS)

Syukri, M.; Saad, R.

2017-06-01

The study conducted at Aceh (Indonesia) within Krueng Raya and Ie Seu Um vicinity with the same geology setting (Lam Teuba volcanic), to study Seulimeum Segment characteristic using 2-D resistivity imaging method. The 2-D resistivity survey applied Pole-dipole array with minimum electrode spacing of 2 and 5 m for Ie Seu Um study area, while 10 m for Krueng Raya area. Resistivity value of Ie Seu Um study area has been correlated and validated with existing outcrops and hot springs which the value used to identify overburden, saturated area and bedrock of Krueng Raya area. The resistivity value of overburden in Krueng Raya area was identify as <30 Ohm.m, bedrock is >30 Ohm.m and saturated zone is <9 Ohm.m. The imaging results used to identify the Seulimeum segment system, where the depth is increasing from southern part (20-50 m) to northern part (50-200 m) when approaching the Andaman Sea and breaks into two sections to produce horst and graben system which indicate that it produced from the moving plat.
Polycrystalline PLZT/ITO Ceramic Electro-Optic Phase Gratings: Electro- Optically Reconfigurable Diffractive Devices for Free-Space and In-Wafer Interconnects

DTIC Science & Technology

1994-09-01

free-space and waveguide interconnects is investigated through the fabrication, testing and modeling of polycrystalline PLZT/ITO ceramic electro - optic phase...only gratings. PLZT Diffraction grating, Electro - optic diffraction grating, Optical switching, Optical interconnects, Reconfigurable interconnect
76 FR 53672 - Combined Notice of Filings #2

Federal Register 2010, 2011, 2012, 2013, 2014

2011-08-29

.... Applicants: PJM Interconnection, L.L.C. Description: PJM Interconnection, L.L.C. submits tariff filing per 35... Time on Monday, September 12, 2011. Docket Numbers: ER11-4343-000. Applicants: PJM Interconnection, L.L.C. Description: PJM Interconnection, L.L.C. submits tariff filing per 35.13(a)(2)(iii: Certificate...
Oscillations in interconnected complex networks under intentional attack

NASA Astrophysics Data System (ADS)

Zhang, Wen-Ping; Xia, Yongxiang; Tan, Fei

2016-01-01

Many real-world networks are interconnected with each other. In this paper, we study the traffic dynamics in interconnected complex networks under an intentional attack. We find that with the shortest time delay routing strategy, the traffic dynamics can show the stable state, periodic, quasi-periodic and chaotic oscillations, when the capacity redundancy parameter changes. Moreover, compared with isolated complex networks, oscillations always take place in interconnected networks more easily. Thirdly, in interconnected networks, oscillations are affected strongly by the coupling probability and coupling preference.
Solar-cell interconnect design for terrestrial photovoltaic modules

NASA Technical Reports Server (NTRS)

Mon, G. R.; Moore, D. M.; Ross, R. G., Jr.

1984-01-01

Useful solar cell interconnect reliability design and life prediction algorithms are presented, together with experimental data indicating that the classical strain cycle (fatigue) curve for the interconnect material does not account for the statistical scatter that is required in reliability predictions. This shortcoming is presently addressed by fitting a functional form to experimental cumulative interconnect failure rate data, which thereby yields statistical fatigue curves enabling not only the prediction of cumulative interconnect failures during the design life of an array field, but also the quantitative interpretation of data from accelerated thermal cycling tests. Optimal interconnect cost reliability design algorithms are also derived which may allow the minimization of energy cost over the design life of the array field.
Solar cell array interconnects

DOEpatents

Carey, P.G.; Thompson, J.B.; Colella, N.J.; Williams, K.A.

1995-11-14

Electrical interconnects are disclosed for solar cells or other electronic components using a silver-silicone paste or a lead-tin (Pb-Sn) no-clean fluxless solder cream, whereby the high breakage of thin (<6 mil thick) solar cells using conventional solder interconnect is eliminated. The interconnects of this invention employs copper strips which are secured to the solar cells by a silver-silicone conductive paste which can be used at room temperature, or by a Pb-Sn solder cream which eliminates undesired residue on the active surfaces of the solar cells. Electrical testing using the interconnects of this invention has shown that no degradation of the interconnects developed under high current testing, while providing a very low contact resistance value. 4 figs.
Solar cell array interconnects

DOEpatents

Carey, Paul G.; Thompson, Jesse B.; Colella, Nicolas J.; Williams, Kenneth A.

1995-01-01

Electrical interconnects for solar cells or other electronic components using a silver-silicone paste or a lead-tin (Pb-Sn) no-clean fluxless solder cream, whereby the high breakage of thin (<6 mil thick) solar cells using conventional solder interconnect is eliminated. The interconnects of this invention employs copper strips which are secured to the solar cells by a silver-silicone conductive paste which can be used at room temperature, or by a Pb-Sn solder cream which eliminates undesired residue on the active surfaces of the solar cells. Electrical testing using the interconnects of this invention has shown that no degradation of the interconnects developed under high current testing, while providing a very low contact resistance value.
Process for electrically interconnecting electrodes

DOEpatents

Carey, Paul G.; Thompson, Jesse B.; Colella, Nicolas J.; Williams, Kenneth A.

2002-01-01

Electrical interconnects for solar cells or other electronic components using a silver-silicone paste or a lead-tin (Pb--Sn) no-clean fluxless solder cream, whereby the high breakage of thin (<6 mil thick) solar cells using conventional solder interconnect is eliminated. The interconnects of this invention employs copper strips which are secured to the solar cells by a silver-silicone conductive paste which can be used at room temperature, or by a Pb--Sn solder cream which eliminates undesired residue on the active surfaces of the solar cells. Electrical testing using the interconnects of this invention has shown that no degradation of the interconnects developed under high current testing, while providing a very low contact resistance value.
Optical backplane interconnect switch for data processors and computers

NASA Technical Reports Server (NTRS)

Hendricks, Herbert D.; Benz, Harry F.; Hammer, Jacob M.

1989-01-01

An optoelectronic integrated device design is reported which can be used to implement an all-optical backplane interconnect switch. The switch is sized to accommodate an array of processors and memories suitable for direct replacement into the basic avionic multiprocessor backplane. The optical backplane interconnect switch is also suitable for direct replacement of the PI bus traffic switch and at the same time, suitable for supporting pipelining of the processor and memory. The 32 bidirectional switchable interconnects are configured with broadcast capability for controls, reconfiguration, and messages. The approach described here can handle a serial interconnection of data processors or a line-to-link interconnection of data processors. An optical fiber demonstration of this approach is presented.
Solar-cell interconnect design for terrestrial photovoltaic modules

NASA Astrophysics Data System (ADS)

Mon, G. R.; Moore, D. M.; Ross, R. G., Jr.

1984-11-01

Useful solar cell interconnect reliability design and life prediction algorithms are presented, together with experimental data indicating that the classical strain cycle (fatigue) curve for the interconnect material does not account for the statistical scatter that is required in reliability predictions. This shortcoming is presently addressed by fitting a functional form to experimental cumulative interconnect failure rate data, which thereby yields statistical fatigue curves enabling not only the prediction of cumulative interconnect failures during the design life of an array field, but also the quantitative interpretation of data from accelerated thermal cycling tests. Optimal interconnect cost reliability design algorithms are also derived which may allow the minimization of energy cost over the design life of the array field.
Design and development of a new-type terminal for smart electricity use in the energy USB system

NASA Astrophysics Data System (ADS)

Wang, Mian; Cheng, Lefeng; Liu, Bin; Jiang, Haorong; Tan, Zhukui; Yu, Tao

2017-11-01

With the in-depth development of energy Internet, the requirements for smart electricity use (SEU) in a comprehensive energy system is higher. Aiming at the current smart electricity controllers that can only realize the monitoring of voltage, current, power and electricity consumption, while neglecting the impact of environmental quality on electricity use behaviours, this paper designs and develops a new type of terminal for SEU in the energy universal service bus system (USB), based on the techniques of digital signal processing, wireless communication and intelligent sensing. A detailed modular hardware design is given for the terminal, as well as the software design, apart from the basic functions, the terminal can complete harmonic analysis, wireless communication, on-off controlling, data display, etc. in addition, take the user perception into account through collecting the ambient temperature and humidity, as well as detecting indoor environment comfort, so that promoting home electricity use optimization. The terminal developed can play an important role in the energy USB system under the background of energy Internet, and the paper ends by giving the testing results which verify the effectiveness, intelligence and practicability of the terminal.
Fast process flow, on-wafer interconnection and singulation for MEPV

DOE Office of Scientific and Technical Information (OSTI.GOV)

Okandan, Murat; Nielson, Gregory N.; Cruz-Campa, Jose Luis

2017-01-31

A method including providing a substrate comprising a device layer on which a plurality of device cells are defined; depositing a first dielectric layer on the device layer and metal interconnect such that the deposited interconnect is electrically connected to at least two of the device cells; depositing a second dielectric layer over the interconnect; and exposing at least one contact point on the interconnect through the second dielectric layer. An apparatus including a substrate having defined thereon a device layer including a plurality of device cells; a first dielectric layer disposed directly on the device layer; a plurality ofmore » metal interconnects, each of which is electrically connected to at least two of the device cells; and a second dielectric layer disposed over the first dielectric layer and over the interconnects, wherein the second dielectric layer is patterned in a positive or negative planar spring pattern.« less
Fast process flow, on-wafer interconnection and singulation for MEPV

DOE Office of Scientific and Technical Information (OSTI.GOV)

Okandan, Murat; Nielson, Gregory N.; Cruz-Campa, Jose Luis

2017-08-29

A method including providing a substrate comprising a device layer on which a plurality of device cells are defined; depositing a first dielectric layer on the device layer and metal interconnect such that the deposited interconnect is electrically connected to at least two of the device cells; depositing a second dielectric layer over the interconnect; and exposing at least one contact point on the interconnect through the second dielectric layer. An apparatus including a substrate having defined thereon a device layer including a plurality of device cells; a first dielectric layer disposed directly on the device layer; a plurality ofmore » metal interconnects, each of which is electrically connected to at least two of the device cells; and a second dielectric layer disposed over the first dielectric layer and over the interconnects, wherein the second dielectric layer is patterned in a positive or negative planar spring pattern.« less
77 FR 25088 - Extension of the Commission's Rules Regarding Outage Reporting to Interconnected Voice Over...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-04-27

... Commission's rules to interconnected Voice over Internet Protocol (VoIP) service providers and defers action... to outages resulting from complete loss of service and only to interconnected VoIP services... obligations of interconnected VoIP service providers. DATES: The rules in this document contain information...
Formed photovoltaic module busbars

DOEpatents

Rose, Douglas; Daroczi, Shan; Phu, Thomas

2015-11-10

A cell connection piece for a photovoltaic module is disclosed herein. The cell connection piece includes an interconnect bus, a plurality of bus tabs unitarily formed with the interconnect bus, and a terminal bus coupled with the interconnect bus. The plurality of bus tabs extend from the interconnect bus. The terminal bus includes a non-linear portion.
Reprogrammable field programmable gate array with integrated system for mitigating effects of single event upsets

NASA Technical Reports Server (NTRS)

Ng, Tak-kwong (Inventor); Herath, Jeffrey A. (Inventor)

2010-01-01

An integrated system mitigates the effects of a single event upset (SEU) on a reprogrammable field programmable gate array (RFPGA). The system includes (i) a RFPGA having an internal configuration memory, and (ii) a memory for storing a configuration associated with the RFPGA. Logic circuitry programmed into the RFPGA and coupled to the memory reloads a portion of the configuration from the memory into the RFPGA's internal configuration memory at predetermined times. Additional SEU mitigation can be provided by logic circuitry on the RFPGA that monitors and maintains synchronized operation of the RFPGA's digital clock managers.
47 CFR 69.124 - Interconnection charge.

Code of Federal Regulations, 2010 CFR

2010-10-01

... Telecommunication FEDERAL COMMUNICATIONS COMMISSION (CONTINUED) COMMON CARRIER SERVICES (CONTINUED) ACCESS CHARGES..., facilities-based rate elements in the future, from the part 69 transport revenue requirement, and dividing by... local exchange carrier anticipates will be reassigned to other, facilities-based rate elements in the...
Fabrication of Fresnel micro lens array in borosilicate glass by F2-laser ablation for glass interposer application

NASA Astrophysics Data System (ADS)

Brusberg, Lars; Neitz, Marcel; Schröder, Henning; Fricke-Begemann, Thomas; Ihlemann, Jürgen

2014-03-01

The future need for more bandwidth forces the development of optical transmission solutions for rack-to-rack, boardto- board and chip-to-chip interconnects. The goals are significant reduction of power consumption, highest density and potential for bandwidth scalability to overcome the limitations of the systems today with mostly copper based interconnects. For system integration the enabling of thin glass as a substrate material for electro-optical components with integrated micro-optics for efficient light coupling to integrated optical waveguides or fibers is becoming important. Our glass based packaging approach merges micro-system packaging and glass integrated optics. This kind of packaging consists of a thin glass substrate with integrated micro lenses providing a platform for photonic component assembly and optical fiber or waveguide interconnection. Thin glass is commercially available in panel and wafer size and characterizes excellent optical and high frequency properties. That makes it perfect for microsystem packaging. A suitable micro lens approach has to be comparable with different commercial glasses and withstand post-processing like soldering. A benefit of using laser ablated Fresnel lenses is the planar integration capability in the substrate for highest integration density. In the paper we introduce our glass based packaging concept and the Fresnel lens design for different scenarios like chip-to-fiber, chip-to-optical-printed-circuit-board coupling. Based on the design the Fresnel lenses were fabricated by using a 157 nm fluorine laser ablation system.
A MoTe2 based light emitting diode and photodetector for silicon photonic integrated circuits

NASA Astrophysics Data System (ADS)

Bie, Ya-Qing; Heuck, M.; Grosso, G.; Furchi, M.; Cao, Y.; Zheng, J.; Navarro-Moratalla, E.; Zhou, L.; Taniguchi, T.; Watanabe, K.; Kong, J.; Englund, D.; Jarillo-Herrero, P.

A key challenge in photonics today is to address the interconnects bottleneck in high-speed computing systems. Silicon photonics has emerged as a leading architecture, partly because many components such as waveguides, interferometers and modulators, could be integrated on silicon-based processors. However, light sources and photodetectors present continued challenges. Common approaches for light source include off-chip or wafer-bonded lasers based on III-V materials, but studies show advantages for directly modulated light sources. The most advanced photodetectors in silicon photonics are based on germanium growth which increases system cost. The emerging two dimensional transition metal dichalcogenides (TMDs) offer a path for optical interconnects components that can be integrated with the CMOS processing by back-end-of-the-line processing steps. Here we demonstrate a silicon waveguide-integrated light source and photodetector based on a p-n junction of bilayer MoTe2, a TMD semiconductor with infrared band gap. The state-of-the-art fabrication technology provides new opportunities for integrated optoelectronic systems.

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